296 files changed, 4689 insertions, 3411 deletions

diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index 60536779ed24..ff4daa780ae8 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -2833,7 +2833,7 @@
                         check bypass). With this option data leaks are possible
                         in the system.
 
-        nospectre_v2    [X86] Disable all mitigations for the Spectre variant 2
+        nospectre_v2    [X86,PPC_FSL_BOOK3E] Disable all mitigations for the Spectre variant 2
                         (indirect branch prediction) vulnerability. System may
                         allow data leaks with this option, which is equivalent
                         to spectre_v2=off.
diff --git a/Documentation/devicetree/bindings/clock/qoriq-clock.txt b/Documentation/devicetree/bindings/clock/qoriq-clock.txt
index 97f46adac85f..c655f28d5918 100644
--- a/Documentation/devicetree/bindings/clock/qoriq-clock.txt
+++ b/Documentation/devicetree/bindings/clock/qoriq-clock.txt
@@ -28,6 +28,12 @@ Required properties:
         * "fsl,p4080-clockgen"
         * "fsl,p5020-clockgen"
         * "fsl,p5040-clockgen"
+        * "fsl,t1023-clockgen"
+        * "fsl,t1024-clockgen"
+        * "fsl,t1040-clockgen"
+        * "fsl,t1042-clockgen"
+        * "fsl,t2080-clockgen"
+        * "fsl,t2081-clockgen"
         * "fsl,t4240-clockgen"
         * "fsl,b4420-clockgen"
         * "fsl,b4860-clockgen"
diff --git a/Documentation/powerpc/firmware-assisted-dump.txt b/Documentation/powerpc/firmware-assisted-dump.txt
index bdd344aa18d9..18c5feef2577 100644
--- a/Documentation/powerpc/firmware-assisted-dump.txt
+++ b/Documentation/powerpc/firmware-assisted-dump.txt
@@ -113,7 +113,15 @@ header, is usually reserved at an offset greater than boot memory
 size (see Fig. 1). This area is *not* released: this region will
 be kept permanently reserved, so that it can act as a receptacle
 for a copy of the boot memory content in addition to CPU state
-and HPTE region, in the case a crash does occur.
+and HPTE region, in the case a crash does occur. Since this reserved
+memory area is used only after the system crash, there is no point in
+blocking this significant chunk of memory from production kernel.
+Hence, the implementation uses the Linux kernel's Contiguous Memory
+Allocator (CMA) for memory reservation if CMA is configured for kernel.
+With CMA reservation this memory will be available for applications to
+use it, while kernel is prevented from using it. With this fadump will
+still be able to capture all of the kernel memory and most of the user
+space memory except the user pages that were present in CMA region.
 
   o Memory Reservation during first kernel
 
@@ -162,6 +170,9 @@ How to enable firmware-assisted dump (fadump):
 
 1. Set config option CONFIG_FA_DUMP=y and build kernel.
 2. Boot into linux kernel with 'fadump=on' kernel cmdline option.
+   By default, fadump reserved memory will be initialized as CMA area.
+   Alternatively, user can boot linux kernel with 'fadump=nocma' to
+   prevent fadump to use CMA.
 3. Optionally, user can also set 'crashkernel=' kernel cmdline
    to specify size of the memory to reserve for boot memory dump
    preservation.
@@ -172,6 +183,10 @@ NOTE: 1. 'fadump_reserve_mem=' parameter has been deprecated. Instead
       2. If firmware-assisted dump fails to reserve memory then it
          will fallback to existing kdump mechanism if 'crashkernel='
          option is set at kernel cmdline.
+      3. if user wants to capture all of user space memory and ok with
+         reserved memory not available to production system, then
+         'fadump=nocma' kernel parameter can be used to fallback to
+         old behaviour.
 
 Sysfs/debugfs files:
 ------------
diff --git a/Documentation/powerpc/isa-versions.rst b/Documentation/powerpc/isa-versions.rst
new file mode 100644
index 000000000000..812e20cc898c
--- /dev/null
+++ b/Documentation/powerpc/isa-versions.rst
@@ -0,0 +1,74 @@
+CPU to ISA Version Mapping
+==========================
+
+Mapping of some CPU versions to relevant ISA versions.
+
+========= ====================
+CPU       Architecture version
+========= ====================
+Power9    Power ISA v3.0B
+Power8    Power ISA v2.07
+Power7    Power ISA v2.06
+Power6    Power ISA v2.05
+PA6T      Power ISA v2.04
+Cell PPU  - Power ISA v2.02 with some minor exceptions
+          - Plus Altivec/VMX ~= 2.03
+Power5++  Power ISA v2.04 (no VMX)
+Power5+   Power ISA v2.03
+Power5    - PowerPC User Instruction Set Architecture Book I v2.02
+          - PowerPC Virtual Environment Architecture Book II v2.02
+          - PowerPC Operating Environment Architecture Book III v2.02
+PPC970    - PowerPC User Instruction Set Architecture Book I v2.01
+          - PowerPC Virtual Environment Architecture Book II v2.01
+          - PowerPC Operating Environment Architecture Book III v2.01
+          - Plus Altivec/VMX ~= 2.03
+========= ====================
+
+
+Key Features
+------------
+
+========== ==================
+CPU        VMX (aka. Altivec)
+========== ==================
+Power9     Yes
+Power8     Yes
+Power7     Yes
+Power6     Yes
+PA6T       Yes
+Cell PPU   Yes
+Power5++   No
+Power5+    No
+Power5     No
+PPC970     Yes
+========== ==================
+
+========== ====
+CPU        VSX
+========== ====
+Power9     Yes
+Power8     Yes
+Power7     Yes
+Power6     No
+PA6T       No
+Cell PPU   No
+Power5++   No
+Power5+    No
+Power5     No
+PPC970     No
+========== ====
+
+========== ====================
+CPU        Transactional Memory
+========== ====================
+Power9     Yes (* see transactional_memory.txt)
+Power8     Yes
+Power7     No
+Power6     No
+PA6T       No
+Cell PPU   No
+Power5++   No
+Power5+    No
+Power5     No
+PPC970     No
+========== ====================
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 8be31261aec8..a1e858e42ada 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -128,6 +128,7 @@ config PPC
         #
         # Please keep this list sorted alphabetically.
         #
+        select ARCH_HAS_DEBUG_VIRTUAL
         select ARCH_HAS_DEVMEM_IS_ALLOWED
         select ARCH_HAS_DMA_SET_COHERENT_MASK
         select ARCH_HAS_ELF_RANDOMIZE
@@ -374,9 +375,9 @@ config PPC_ADV_DEBUG_DAC_RANGE
         depends on PPC_ADV_DEBUG_REGS && 44x
         default y
 
-config ZONE_DMA32
+config ZONE_DMA
         bool
-        default y if PPC64
+        default y if PPC_BOOK3E_64
 
 config PGTABLE_LEVELS
         int
@@ -556,7 +557,7 @@ config RELOCATABLE_TEST
 
 config CRASH_DUMP
         bool "Build a dump capture kernel"
-        depends on PPC64 || 6xx || FSL_BOOKE || (44x && !SMP)
+        depends on PPC64 || PPC_BOOK3S_32 || FSL_BOOKE || (44x && !SMP)
         select RELOCATABLE if PPC64 || 44x || FSL_BOOKE
         help
           Build a kernel suitable for use as a dump capture kernel.
@@ -869,10 +870,6 @@ config ISA
           have an IBM RS/6000 or pSeries machine, say Y.  If you have an
           embedded board, consult your board documentation.
 
-config ZONE_DMA
-        bool
-        default y
-
 config GENERIC_ISA_DMA
         bool
         depends on ISA_DMA_API
@@ -1096,7 +1093,7 @@ config PHYSICAL_START_BOOL
 
 config PHYSICAL_START
         hex "Physical address where the kernel is loaded" if PHYSICAL_START_BOOL
-        default "0x02000000" if PPC_STD_MMU && CRASH_DUMP && !NONSTATIC_KERNEL
+        default "0x02000000" if PPC_BOOK3S && CRASH_DUMP && !NONSTATIC_KERNEL
         default "0x00000000"
 
 config PHYSICAL_ALIGN
@@ -1146,7 +1143,7 @@ config PIN_TLB_DATA
 
 config PIN_TLB_IMMR
         bool "Pinned TLB for IMMR"
-        depends on PIN_TLB
+        depends on PIN_TLB || PPC_EARLY_DEBUG_CPM
         default y
 
 config PIN_TLB_TEXT
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index 854199c9ab7e..488c9edffa58 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -30,6 +30,10 @@ endif
 endif
 endif
 
+ifdef CONFIG_PPC_BOOK3S_32
+KBUILD_CFLAGS           += -mcpu=powerpc
+endif
+
 ifeq ($(CROSS_COMPILE),)
 KBUILD_DEFCONFIG := $(shell uname -m)_defconfig
 else
@@ -152,7 +156,14 @@ endif
 CFLAGS-$(CONFIG_PPC64)  += $(call cc-option,-mcmodel=medium,$(call cc-option,-mminimal-toc))
 CFLAGS-$(CONFIG_PPC64)  += $(call cc-option,-mno-pointers-to-nested-functions)
 
-CFLAGS-$(CONFIG_PPC32)  := -ffixed-r2 $(MULTIPLEWORD)
+# Clang unconditionally reserves r2 on ppc32 and does not support the flag
+# https://bugs.llvm.org/show_bug.cgi?id=39555
+CFLAGS-$(CONFIG_PPC32)  := $(call cc-option, -ffixed-r2)
+
+# Clang doesn't support -mmultiple / -mno-multiple
+# https://bugs.llvm.org/show_bug.cgi?id=39556
+CFLAGS-$(CONFIG_PPC32)  += $(call cc-option, $(MULTIPLEWORD))
+
 CFLAGS-$(CONFIG_PPC32)  += $(call cc-option,-mno-readonly-in-sdata)
 
 ifdef CONFIG_PPC_BOOK3S_64
@@ -237,10 +248,6 @@ KBUILD_CFLAGS	+= $(call cc-option,-fno-dwarf2-cfi-asm)
 # often slow when they are implemented at all
 KBUILD_CFLAGS           += $(call cc-option,-mno-string)
 
-ifdef CONFIG_6xx
-KBUILD_CFLAGS           += -mcpu=powerpc
-endif
-
 cpu-as-$(CONFIG_4xx)            += -Wa,-m405
 cpu-as-$(CONFIG_ALTIVEC)        += $(call as-option,-Wa$(comma)-maltivec)
 cpu-as-$(CONFIG_E200)           += -Wa,-me200
@@ -313,6 +320,14 @@ PHONY += ppc64le_defconfig
 ppc64le_defconfig:
         $(call merge_into_defconfig,ppc64_defconfig,le)
 
+PHONY += ppc64le_guest_defconfig
+ppc64le_guest_defconfig:
+        $(call merge_into_defconfig,ppc64_defconfig,le guest)
+
+PHONY += ppc64_guest_defconfig
+ppc64_guest_defconfig:
+        $(call merge_into_defconfig,ppc64_defconfig,be guest)
+
 PHONY += powernv_be_defconfig
 powernv_be_defconfig:
         $(call merge_into_defconfig,powernv_defconfig,be)
@@ -398,6 +413,9 @@ archclean:
 
 archprepare: checkbin
 
+archheaders:
+        $(Q)$(MAKE) $(build)=arch/powerpc/kernel/syscalls all
+
 ifdef CONFIG_STACKPROTECTOR
 prepare: stack_protector_prepare
 
diff --git a/arch/powerpc/boot/dts/bamboo.dts b/arch/powerpc/boot/dts/bamboo.dts
index 538e42b1120d..b5861fa3836c 100644
--- a/arch/powerpc/boot/dts/bamboo.dts
+++ b/arch/powerpc/boot/dts/bamboo.dts
@@ -268,8 +268,10 @@
                         /* Outbound ranges, one memory and one IO,
                          * later cannot be changed. Chip supports a second
                          * IO range but we don't use it for now
+                         * The chip also supports a larger memory range but
+                         * it's not naturally aligned, so our code will break
                          */
-                        ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x40000000
+                        ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x20000000
                                   0x02000000 0x00000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00100000
                                   0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
 
diff --git a/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi b/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
index 88d8423f8ac5..bb7b9b9f3f5f 100644
--- a/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
@@ -70,14 +70,14 @@
                 cpu0: PowerPC,e6500@0 {
                         device_type = "cpu";
                         reg = <0 1>;
-                        clocks = <&mux0>;
+                        clocks = <&clockgen 1 0>;
                         next-level-cache = <&L2_1>;
                         fsl,portid-mapping = <0x80000000>;
                 };
                 cpu1: PowerPC,e6500@2 {
                         device_type = "cpu";
                         reg = <2 3>;
-                        clocks = <&mux0>;
+                        clocks = <&clockgen 1 0>;
                         next-level-cache = <&L2_1>;
                         fsl,portid-mapping = <0x80000000>;
                 };
diff --git a/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi b/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
index f3f968c51f4b..388ba1b15f8c 100644
--- a/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
@@ -75,28 +75,28 @@
                 cpu0: PowerPC,e6500@0 {
                         device_type = "cpu";
                         reg = <0 1>;
-                        clocks = <&mux0>;
+                        clocks = <&clockgen 1 0>;
                         next-level-cache = <&L2_1>;
                         fsl,portid-mapping = <0x80000000>;
                 };
                 cpu1: PowerPC,e6500@2 {
                         device_type = "cpu";
                         reg = <2 3>;
-                        clocks = <&mux0>;
+                        clocks = <&clockgen 1 0>;
                         next-level-cache = <&L2_1>;
                         fsl,portid-mapping = <0x80000000>;
                 };
                 cpu2: PowerPC,e6500@4 {
                         device_type = "cpu";
                         reg = <4 5>;
-                        clocks = <&mux0>;
+                        clocks = <&clockgen 1 0>;
                         next-level-cache = <&L2_1>;
                         fsl,portid-mapping = <0x80000000>;
                 };
                 cpu3: PowerPC,e6500@6 {
                         device_type = "cpu";
                         reg = <6 7>;
-                        clocks = <&mux0>;
+                        clocks = <&clockgen 1 0>;
                         next-level-cache = <&L2_1>;
                         fsl,portid-mapping = <0x80000000>;
                 };
diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
index 1b33f5157c8a..4f044b41a776 100644
--- a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
@@ -398,21 +398,6 @@
         };
 
 /include/ "qoriq-clockgen2.dtsi"
-        clockgen: global-utilities@e1000 {
-                compatible = "fsl,b4-clockgen", "fsl,qoriq-clockgen-2.0";
-                reg = <0xe1000 0x1000>;
-
-                mux0: mux0@0 {
-                        #clock-cells = <0>;
-                        reg = <0x0 0x4>;
-                        compatible = "fsl,qoriq-core-mux-2.0";
-                        clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
-                                <&pll1 0>, <&pll1 1>, <&pll1 2>;
-                        clock-names = "pll0", "pll0-div2", "pll0-div4",
-                                "pll1", "pll1-div2", "pll1-div4";
-                        clock-output-names = "cmux0";
-                };
-        };
 
         rcpm: global-utilities@e2000 {
                 compatible = "fsl,b4-rcpm", "fsl,qoriq-rcpm-2.0";
diff --git a/arch/powerpc/boot/dts/fsl/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/fsl/mpc8641_hpcn.dts
index 11bea3e6a43f..58ac17496c89 100644
--- a/arch/powerpc/boot/dts/fsl/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/fsl/mpc8641_hpcn.dts
@@ -169,100 +169,100 @@
                 interrupt-map-mask = <0xff00 0 0 7>;
                 interrupt-map = <
                         /* IDSEL 0x11 func 0 - PCI slot 1 */
-                        0x8800 0 0 1 &mpic 2 1
-                        0x8800 0 0 2 &mpic 3 1
-                        0x8800 0 0 3 &mpic 4 1
-                        0x8800 0 0 4 &mpic 1 1
+                        0x8800 0 0 1 &mpic 2 1 0 0
+                        0x8800 0 0 2 &mpic 3 1 0 0
+                        0x8800 0 0 3 &mpic 4 1 0 0
+                        0x8800 0 0 4 &mpic 1 1 0 0
 
                         /* IDSEL 0x11 func 1 - PCI slot 1 */
-                        0x8900 0 0 1 &mpic 2 1
-                        0x8900 0 0 2 &mpic 3 1
-                        0x8900 0 0 3 &mpic 4 1
-                        0x8900 0 0 4 &mpic 1 1
+                        0x8900 0 0 1 &mpic 2 1 0 0
+                        0x8900 0 0 2 &mpic 3 1 0 0
+                        0x8900 0 0 3 &mpic 4 1 0 0
+                        0x8900 0 0 4 &mpic 1 1 0 0
 
                         /* IDSEL 0x11 func 2 - PCI slot 1 */
-                        0x8a00 0 0 1 &mpic 2 1
-                        0x8a00 0 0 2 &mpic 3 1
-                        0x8a00 0 0 3 &mpic 4 1
-                        0x8a00 0 0 4 &mpic 1 1
+                        0x8a00 0 0 1 &mpic 2 1 0 0
+                        0x8a00 0 0 2 &mpic 3 1 0 0
+                        0x8a00 0 0 3 &mpic 4 1 0 0
+                        0x8a00 0 0 4 &mpic 1 1 0 0
 
                         /* IDSEL 0x11 func 3 - PCI slot 1 */
-                        0x8b00 0 0 1 &mpic 2 1
-                        0x8b00 0 0 2 &mpic 3 1
-                        0x8b00 0 0 3 &mpic 4 1
-                        0x8b00 0 0 4 &mpic 1 1
+                        0x8b00 0 0 1 &mpic 2 1 0 0
+                        0x8b00 0 0 2 &mpic 3 1 0 0
+                        0x8b00 0 0 3 &mpic 4 1 0 0
+                        0x8b00 0 0 4 &mpic 1 1 0 0
 
                         /* IDSEL 0x11 func 4 - PCI slot 1 */
-                        0x8c00 0 0 1 &mpic 2 1
-                        0x8c00 0 0 2 &mpic 3 1
-                        0x8c00 0 0 3 &mpic 4 1
-                        0x8c00 0 0 4 &mpic 1 1
+                        0x8c00 0 0 1 &mpic 2 1 0 0
+                        0x8c00 0 0 2 &mpic 3 1 0 0
+                        0x8c00 0 0 3 &mpic 4 1 0 0
+                        0x8c00 0 0 4 &mpic 1 1 0 0
 
                         /* IDSEL 0x11 func 5 - PCI slot 1 */
-                        0x8d00 0 0 1 &mpic 2 1
-                        0x8d00 0 0 2 &mpic 3 1
-                        0x8d00 0 0 3 &mpic 4 1
-                        0x8d00 0 0 4 &mpic 1 1
+                        0x8d00 0 0 1 &mpic 2 1 0 0
+                        0x8d00 0 0 2 &mpic 3 1 0 0
+                        0x8d00 0 0 3 &mpic 4 1 0 0
+                        0x8d00 0 0 4 &mpic 1 1 0 0
 
                         /* IDSEL 0x11 func 6 - PCI slot 1 */
-                        0x8e00 0 0 1 &mpic 2 1
-                        0x8e00 0 0 2 &mpic 3 1
-                        0x8e00 0 0 3 &mpic 4 1
-                        0x8e00 0 0 4 &mpic 1 1
+                        0x8e00 0 0 1 &mpic 2 1 0 0
+                        0x8e00 0 0 2 &mpic 3 1 0 0
+                        0x8e00 0 0 3 &mpic 4 1 0 0
+                        0x8e00 0 0 4 &mpic 1 1 0 0
 
                         /* IDSEL 0x11 func 7 - PCI slot 1 */
-                        0x8f00 0 0 1 &mpic 2 1
-                        0x8f00 0 0 2 &mpic 3 1
-                        0x8f00 0 0 3 &mpic 4 1
-                        0x8f00 0 0 4 &mpic 1 1
+                        0x8f00 0 0 1 &mpic 2 1 0 0
+                        0x8f00 0 0 2 &mpic 3 1 0 0
+                        0x8f00 0 0 3 &mpic 4 1 0 0
+                        0x8f00 0 0 4 &mpic 1 1 0 0
 
                         /* IDSEL 0x12 func 0 - PCI slot 2 */
-                        0x9000 0 0 1 &mpic 3 1
-                        0x9000 0 0 2 &mpic 4 1
-                        0x9000 0 0 3 &mpic 1 1
-                        0x9000 0 0 4 &mpic 2 1
+                        0x9000 0 0 1 &mpic 3 1 0 0
+                        0x9000 0 0 2 &mpic 4 1 0 0
+                        0x9000 0 0 3 &mpic 1 1 0 0
+                        0x9000 0 0 4 &mpic 2 1 0 0
 
                         /* IDSEL 0x12 func 1 - PCI slot 2 */
-                        0x9100 0 0 1 &mpic 3 1
-                        0x9100 0 0 2 &mpic 4 1
-                        0x9100 0 0 3 &mpic 1 1
-                        0x9100 0 0 4 &mpic 2 1
+                        0x9100 0 0 1 &mpic 3 1 0 0
+                        0x9100 0 0 2 &mpic 4 1 0 0
+                        0x9100 0 0 3 &mpic 1 1 0 0
+                        0x9100 0 0 4 &mpic 2 1 0 0
 
                         /* IDSEL 0x12 func 2 - PCI slot 2 */
-                        0x9200 0 0 1 &mpic 3 1
-                        0x9200 0 0 2 &mpic 4 1
-                        0x9200 0 0 3 &mpic 1 1
-                        0x9200 0 0 4 &mpic 2 1
+                        0x9200 0 0 1 &mpic 3 1 0 0
+                        0x9200 0 0 2 &mpic 4 1 0 0
+                        0x9200 0 0 3 &mpic 1 1 0 0
+                        0x9200 0 0 4 &mpic 2 1 0 0
 
                         /* IDSEL 0x12 func 3 - PCI slot 2 */
-                        0x9300 0 0 1 &mpic 3 1
-                        0x9300 0 0 2 &mpic 4 1
-                        0x9300 0 0 3 &mpic 1 1
-                        0x9300 0 0 4 &mpic 2 1
+                        0x9300 0 0 1 &mpic 3 1 0 0
+                        0x9300 0 0 2 &mpic 4 1 0 0
+                        0x9300 0 0 3 &mpic 1 1 0 0
+                        0x9300 0 0 4 &mpic 2 1 0 0
 
                         /* IDSEL 0x12 func 4 - PCI slot 2 */
-                        0x9400 0 0 1 &mpic 3 1
-                        0x9400 0 0 2 &mpic 4 1
-                        0x9400 0 0 3 &mpic 1 1
-                        0x9400 0 0 4 &mpic 2 1
+                        0x9400 0 0 1 &mpic 3 1 0 0
+                        0x9400 0 0 2 &mpic 4 1 0 0
+                        0x9400 0 0 3 &mpic 1 1 0 0
+                        0x9400 0 0 4 &mpic 2 1 0 0
 
                         /* IDSEL 0x12 func 5 - PCI slot 2 */
-                        0x9500 0 0 1 &mpic 3 1
-                        0x9500 0 0 2 &mpic 4 1
-                        0x9500 0 0 3 &mpic 1 1
-                        0x9500 0 0 4 &mpic 2 1
+                        0x9500 0 0 1 &mpic 3 1 0 0
+                        0x9500 0 0 2 &mpic 4 1 0 0
+                        0x9500 0 0 3 &mpic 1 1 0 0
+                        0x9500 0 0 4 &mpic 2 1 0 0
 
                         /* IDSEL 0x12 func 6 - PCI slot 2 */
-                        0x9600 0 0 1 &mpic 3 1
-                        0x9600 0 0 2 &mpic 4 1
-                        0x9600 0 0 3 &mpic 1 1
-                        0x9600 0 0 4 &mpic 2 1
+                        0x9600 0 0 1 &mpic 3 1 0 0
+                        0x9600 0 0 2 &mpic 4 1 0 0
+                        0x9600 0 0 3 &mpic 1 1 0 0
+                        0x9600 0 0 4 &mpic 2 1 0 0
 
                         /* IDSEL 0x12 func 7 - PCI slot 2 */
-                        0x9700 0 0 1 &mpic 3 1
-                        0x9700 0 0 2 &mpic 4 1
-                        0x9700 0 0 3 &mpic 1 1
-                        0x9700 0 0 4 &mpic 2 1
+                        0x9700 0 0 1 &mpic 3 1 0 0
+                        0x9700 0 0 2 &mpic 4 1 0 0
+                        0x9700 0 0 3 &mpic 1 1 0 0
+                        0x9700 0 0 4 &mpic 2 1 0 0
 
                         // IDSEL 0x1c  USB
                         0xe000 0 0 1 &i8259 12 2
diff --git a/arch/powerpc/boot/dts/fsl/mpc8641_hpcn_36b.dts b/arch/powerpc/boot/dts/fsl/mpc8641_hpcn_36b.dts
index 7ff62046a9ea..e64b91e321f6 100644
--- a/arch/powerpc/boot/dts/fsl/mpc8641_hpcn_36b.dts
+++ b/arch/powerpc/boot/dts/fsl/mpc8641_hpcn_36b.dts
@@ -136,100 +136,100 @@
                 interrupt-map-mask = <0xff00 0 0 7>;
                 interrupt-map = <
                         /* IDSEL 0x11 func 0 - PCI slot 1 */
-                        0x8800 0 0 1 &mpic 2 1
-                        0x8800 0 0 2 &mpic 3 1
-                        0x8800 0 0 3 &mpic 4 1
-                        0x8800 0 0 4 &mpic 1 1
+                        0x8800 0 0 1 &mpic 2 1 0 0
+                        0x8800 0 0 2 &mpic 3 1 0 0
+                        0x8800 0 0 3 &mpic 4 1 0 0
+                        0x8800 0 0 4 &mpic 1 1 0 0
 
                         /* IDSEL 0x11 func 1 - PCI slot 1 */
-                        0x8900 0 0 1 &mpic 2 1
-                        0x8900 0 0 2 &mpic 3 1
-                        0x8900 0 0 3 &mpic 4 1
-                        0x8900 0 0 4 &mpic 1 1
+                        0x8900 0 0 1 &mpic 2 1 0 0
+                        0x8900 0 0 2 &mpic 3 1 0 0
+                        0x8900 0 0 3 &mpic 4 1 0 0
+                        0x8900 0 0 4 &mpic 1 1 0 0
 
                         /* IDSEL 0x11 func 2 - PCI slot 1 */
-                        0x8a00 0 0 1 &mpic 2 1
-                        0x8a00 0 0 2 &mpic 3 1
-                        0x8a00 0 0 3 &mpic 4 1
-                        0x8a00 0 0 4 &mpic 1 1
+                        0x8a00 0 0 1 &mpic 2 1 0 0
+                        0x8a00 0 0 2 &mpic 3 1 0 0
+                        0x8a00 0 0 3 &mpic 4 1 0 0
+                        0x8a00 0 0 4 &mpic 1 1 0 0
 
                         /* IDSEL 0x11 func 3 - PCI slot 1 */
-                        0x8b00 0 0 1 &mpic 2 1
-                        0x8b00 0 0 2 &mpic 3 1
-                        0x8b00 0 0 3 &mpic 4 1
-                        0x8b00 0 0 4 &mpic 1 1
+                        0x8b00 0 0 1 &mpic 2 1 0 0
+                        0x8b00 0 0 2 &mpic 3 1 0 0
+                        0x8b00 0 0 3 &mpic 4 1 0 0
+                        0x8b00 0 0 4 &mpic 1 1 0 0
 
                         /* IDSEL 0x11 func 4 - PCI slot 1 */
-                        0x8c00 0 0 1 &mpic 2 1
-                        0x8c00 0 0 2 &mpic 3 1
-                        0x8c00 0 0 3 &mpic 4 1
-                        0x8c00 0 0 4 &mpic 1 1
+                        0x8c00 0 0 1 &mpic 2 1 0 0
+                        0x8c00 0 0 2 &mpic 3 1 0 0
+                        0x8c00 0 0 3 &mpic 4 1 0 0
+                        0x8c00 0 0 4 &mpic 1 1 0 0
 
                         /* IDSEL 0x11 func 5 - PCI slot 1 */
-                        0x8d00 0 0 1 &mpic 2 1
-                        0x8d00 0 0 2 &mpic 3 1
-                        0x8d00 0 0 3 &mpic 4 1
-                        0x8d00 0 0 4 &mpic 1 1
+                        0x8d00 0 0 1 &mpic 2 1 0 0
+                        0x8d00 0 0 2 &mpic 3 1 0 0
+                        0x8d00 0 0 3 &mpic 4 1 0 0
+                        0x8d00 0 0 4 &mpic 1 1 0 0
 
                         /* IDSEL 0x11 func 6 - PCI slot 1 */
-                        0x8e00 0 0 1 &mpic 2 1
-                        0x8e00 0 0 2 &mpic 3 1
-                        0x8e00 0 0 3 &mpic 4 1
-                        0x8e00 0 0 4 &mpic 1 1
+                        0x8e00 0 0 1 &mpic 2 1 0 0
+                        0x8e00 0 0 2 &mpic 3 1 0 0
+                        0x8e00 0 0 3 &mpic 4 1 0 0
+                        0x8e00 0 0 4 &mpic 1 1 0 0
 
                         /* IDSEL 0x11 func 7 - PCI slot 1 */
-                        0x8f00 0 0 1 &mpic 2 1
-                        0x8f00 0 0 2 &mpic 3 1
-                        0x8f00 0 0 3 &mpic 4 1
-                        0x8f00 0 0 4 &mpic 1 1
+                        0x8f00 0 0 1 &mpic 2 1 0 0
+                        0x8f00 0 0 2 &mpic 3 1 0 0
+                        0x8f00 0 0 3 &mpic 4 1 0 0
+                        0x8f00 0 0 4 &mpic 1 1 0 0
 
                         /* IDSEL 0x12 func 0 - PCI slot 2 */
-                        0x9000 0 0 1 &mpic 3 1
-                        0x9000 0 0 2 &mpic 4 1
-                        0x9000 0 0 3 &mpic 1 1
-                        0x9000 0 0 4 &mpic 2 1
+                        0x9000 0 0 1 &mpic 3 1 0 0
+                        0x9000 0 0 2 &mpic 4 1 0 0
+                        0x9000 0 0 3 &mpic 1 1 0 0
+                        0x9000 0 0 4 &mpic 2 1 0 0
 
                         /* IDSEL 0x12 func 1 - PCI slot 2 */
-                        0x9100 0 0 1 &mpic 3 1
-                        0x9100 0 0 2 &mpic 4 1
-                        0x9100 0 0 3 &mpic 1 1
-                        0x9100 0 0 4 &mpic 2 1
+                        0x9100 0 0 1 &mpic 3 1 0 0
+                        0x9100 0 0 2 &mpic 4 1 0 0
+                        0x9100 0 0 3 &mpic 1 1 0 0
+                        0x9100 0 0 4 &mpic 2 1 0 0
 
                         /* IDSEL 0x12 func 2 - PCI slot 2 */
-                        0x9200 0 0 1 &mpic 3 1
-                        0x9200 0 0 2 &mpic 4 1
-                        0x9200 0 0 3 &mpic 1 1
-                        0x9200 0 0 4 &mpic 2 1
+                        0x9200 0 0 1 &mpic 3 1 0 0
+                        0x9200 0 0 2 &mpic 4 1 0 0
+                        0x9200 0 0 3 &mpic 1 1 0 0
+                        0x9200 0 0 4 &mpic 2 1 0 0
 
                         /* IDSEL 0x12 func 3 - PCI slot 2 */
-                        0x9300 0 0 1 &mpic 3 1
-                        0x9300 0 0 2 &mpic 4 1
-                        0x9300 0 0 3 &mpic 1 1
-                        0x9300 0 0 4 &mpic 2 1
+                        0x9300 0 0 1 &mpic 3 1 0 0
+                        0x9300 0 0 2 &mpic 4 1 0 0
+                        0x9300 0 0 3 &mpic 1 1 0 0
+                        0x9300 0 0 4 &mpic 2 1 0 0
 
                         /* IDSEL 0x12 func 4 - PCI slot 2 */
-                        0x9400 0 0 1 &mpic 3 1
-                        0x9400 0 0 2 &mpic 4 1
-                        0x9400 0 0 3 &mpic 1 1
-                        0x9400 0 0 4 &mpic 2 1
+                        0x9400 0 0 1 &mpic 3 1 0 0
+                        0x9400 0 0 2 &mpic 4 1 0 0
+                        0x9400 0 0 3 &mpic 1 1 0 0
+                        0x9400 0 0 4 &mpic 2 1 0 0
 
                         /* IDSEL 0x12 func 5 - PCI slot 2 */
-                        0x9500 0 0 1 &mpic 3 1
-                        0x9500 0 0 2 &mpic 4 1
-                        0x9500 0 0 3 &mpic 1 1
-                        0x9500 0 0 4 &mpic 2 1
+                        0x9500 0 0 1 &mpic 3 1 0 0
+                        0x9500 0 0 2 &mpic 4 1 0 0
+                        0x9500 0 0 3 &mpic 1 1 0 0
+                        0x9500 0 0 4 &mpic 2 1 0 0
 
                         /* IDSEL 0x12 func 6 - PCI slot 2 */
-                        0x9600 0 0 1 &mpic 3 1
-                        0x9600 0 0 2 &mpic 4 1
-                        0x9600 0 0 3 &mpic 1 1
-                        0x9600 0 0 4 &mpic 2 1
+                        0x9600 0 0 1 &mpic 3 1 0 0
+                        0x9600 0 0 2 &mpic 4 1 0 0
+                        0x9600 0 0 3 &mpic 1 1 0 0
+                        0x9600 0 0 4 &mpic 2 1 0 0
 
                         /* IDSEL 0x12 func 7 - PCI slot 2 */
-                        0x9700 0 0 1 &mpic 3 1
-                        0x9700 0 0 2 &mpic 4 1
-                        0x9700 0 0 3 &mpic 1 1
-                        0x9700 0 0 4 &mpic 2 1
+                        0x9700 0 0 1 &mpic 3 1 0 0
+                        0x9700 0 0 2 &mpic 4 1 0 0
+                        0x9700 0 0 3 &mpic 1 1 0 0
+                        0x9700 0 0 4 &mpic 2 1 0 0
 
                         // IDSEL 0x1c  USB
                         0xe000 0 0 1 &i8259 12 2
diff --git a/arch/powerpc/boot/dts/fsl/mpc8641si-post.dtsi b/arch/powerpc/boot/dts/fsl/mpc8641si-post.dtsi
index eeb7c65d5f22..50039d4fa278 100644
--- a/arch/powerpc/boot/dts/fsl/mpc8641si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/mpc8641si-post.dtsi
@@ -97,6 +97,7 @@
 &pci0 {
         compatible = "fsl,mpc8641-pcie";
         device_type = "pci";
+        #interrupt-cells = <1>;
         #size-cells = <2>;
         #address-cells = <3>;
         bus-range = <0x0 0xff>;
@@ -123,6 +124,7 @@
 &pci1 {
         compatible = "fsl,mpc8641-pcie";
         device_type = "pci";
+        #interrupt-cells = <1>;
         #size-cells = <2>;
         #address-cells = <3>;
         bus-range = <0x0 0xff>;
diff --git a/arch/powerpc/boot/dts/fsl/p1020rdb-pc.dtsi b/arch/powerpc/boot/dts/fsl/p1020rdb-pc.dtsi
index 25f81eea60e0..a13876c05c1e 100644
--- a/arch/powerpc/boot/dts/fsl/p1020rdb-pc.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1020rdb-pc.dtsi
@@ -205,13 +205,13 @@
         mdio@24000 {
                 phy0: ethernet-phy@0 {
                         interrupt-parent = <&mpic>;
-                        interrupts = <3 1>;
+                        interrupts = <3 1 0 0>;
                         reg = <0x0>;
                 };
 
                 phy1: ethernet-phy@1 {
                         interrupt-parent = <&mpic>;
-                        interrupts = <2 1>;
+                        interrupts = <2 1 0 0>;
                         reg = <0x1>;
                 };
 
diff --git a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
index 51e975d7631a..872e4485dc3f 100644
--- a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
@@ -327,24 +327,6 @@
 /include/ "qoriq-clockgen1.dtsi"
         global-utilities@e1000 {
                 compatible = "fsl,p2041-clockgen", "fsl,qoriq-clockgen-1.0";
-
-                mux2: mux2@40 {
-                        #clock-cells = <0>;
-                        reg = <0x40 0x4>;
-                        compatible = "fsl,qoriq-core-mux-1.0";
-                        clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
-                        clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
-                        clock-output-names = "cmux2";
-                };
-
-                mux3: mux3@60 {
-                        #clock-cells = <0>;
-                        reg = <0x60 0x4>;
-                        compatible = "fsl,qoriq-core-mux-1.0";
-                        clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
-                        clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
-                        clock-output-names = "cmux3";
-                };
         };
 
         rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
index 941274c41f21..6318962e8d14 100644
--- a/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
@@ -89,7 +89,7 @@
                 cpu0: PowerPC,e500mc@0 {
                         device_type = "cpu";
                         reg = <0>;
-                        clocks = <&mux0>;
+                        clocks = <&clockgen 1 0>;
                         next-level-cache = <&L2_0>;
                         fsl,portid-mapping = <0x80000000>;
                         L2_0: l2-cache {
@@ -99,7 +99,7 @@
                 cpu1: PowerPC,e500mc@1 {
                         device_type = "cpu";
                         reg = <1>;
-                        clocks = <&mux1>;
+                        clocks = <&clockgen 1 1>;
                         next-level-cache = <&L2_1>;
                         fsl,portid-mapping = <0x40000000>;
                         L2_1: l2-cache {
@@ -109,7 +109,7 @@
                 cpu2: PowerPC,e500mc@2 {
                         device_type = "cpu";
                         reg = <2>;
-                        clocks = <&mux2>;
+                        clocks = <&clockgen 1 2>;
                         next-level-cache = <&L2_2>;
                         fsl,portid-mapping = <0x20000000>;
                         L2_2: l2-cache {
@@ -119,7 +119,7 @@
                 cpu3: PowerPC,e500mc@3 {
                         device_type = "cpu";
                         reg = <3>;
-                        clocks = <&mux3>;
+                        clocks = <&clockgen 1 3>;
                         next-level-cache = <&L2_3>;
                         fsl,portid-mapping = <0x10000000>;
                         L2_3: l2-cache {
diff --git a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
index 187676fa8d83..81bc75aca2e0 100644
--- a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
@@ -354,24 +354,6 @@
 /include/ "qoriq-clockgen1.dtsi"
         global-utilities@e1000 {
                 compatible = "fsl,p3041-clockgen", "fsl,qoriq-clockgen-1.0";
-
-                mux2: mux2@40 {
-                        #clock-cells = <0>;
-                        reg = <0x40 0x4>;
-                        compatible = "fsl,qoriq-core-mux-1.0";
-                        clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
-                        clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
-                        clock-output-names = "cmux2";
-                };
-
-                mux3: mux3@60 {
-                        #clock-cells = <0>;
-                        reg = <0x60 0x4>;
-                        compatible = "fsl,qoriq-core-mux-1.0";
-                        clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
-                        clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
-                        clock-output-names = "cmux3";
-                };
         };
 
         rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
index 50b73e8e638f..db92f1151a48 100644
--- a/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
@@ -90,7 +90,7 @@
                 cpu0: PowerPC,e500mc@0 {
                         device_type = "cpu";
                         reg = <0>;
-                        clocks = <&mux0>;
+                        clocks = <&clockgen 1 0>;
                         next-level-cache = <&L2_0>;
                         fsl,portid-mapping = <0x80000000>;
                         L2_0: l2-cache {
@@ -100,7 +100,7 @@
                 cpu1: PowerPC,e500mc@1 {
                         device_type = "cpu";
                         reg = <1>;
-                        clocks = <&mux1>;
+                        clocks = <&clockgen 1 1>;
                         next-level-cache = <&L2_1>;
                         fsl,portid-mapping = <0x40000000>;
                         L2_1: l2-cache {
@@ -110,7 +110,7 @@
                 cpu2: PowerPC,e500mc@2 {
                         device_type = "cpu";
                         reg = <2>;
-                        clocks = <&mux2>;
+                        clocks = <&clockgen 1 2>;
                         next-level-cache = <&L2_2>;
                         fsl,portid-mapping = <0x20000000>;
                         L2_2: l2-cache {
@@ -120,7 +120,7 @@
                 cpu3: PowerPC,e500mc@3 {
                         device_type = "cpu";
                         reg = <3>;
-                        clocks = <&mux3>;
+                        clocks = <&clockgen 1 3>;
                         next-level-cache = <&L2_3>;
                         fsl,portid-mapping = <0x10000000>;
                         L2_3: l2-cache {
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
index a0252085f858..4da49b6dd3f5 100644
--- a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
@@ -374,76 +374,6 @@
 /include/ "qoriq-clockgen1.dtsi"
         global-utilities@e1000 {
                 compatible = "fsl,p4080-clockgen", "fsl,qoriq-clockgen-1.0";
-
-                pll2: pll2@840 {
-                        #clock-cells = <1>;
-                        reg = <0x840 0x4>;
-                        compatible = "fsl,qoriq-core-pll-1.0";
-                        clocks = <&sysclk>;
-                        clock-output-names = "pll2", "pll2-div2";
-                };
-
-                pll3: pll3@860 {
-                        #clock-cells = <1>;
-                        reg = <0x860 0x4>;
-                        compatible = "fsl,qoriq-core-pll-1.0";
-                        clocks = <&sysclk>;
-                        clock-output-names = "pll3", "pll3-div2";
-                };
-
-                mux2: mux2@40 {
-                        #clock-cells = <0>;
-                        reg = <0x40 0x4>;
-                        compatible = "fsl,qoriq-core-mux-1.0";
-                        clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
-                        clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
-                        clock-output-names = "cmux2";
-                };
-
-                mux3: mux3@60 {
-                        #clock-cells = <0>;
-                        reg = <0x60 0x4>;
-                        compatible = "fsl,qoriq-core-mux-1.0";
-                        clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
-                        clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
-                        clock-output-names = "cmux3";
-                };
-
-                mux4: mux4@80 {
-                        #clock-cells = <0>;
-                        reg = <0x80 0x4>;
-                        compatible = "fsl,qoriq-core-mux-1.0";
-                        clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>;
-                        clock-names = "pll2", "pll2-div2", "pll3", "pll3-div2";
-                        clock-output-names = "cmux4";
-                };
-
-                mux5: mux5@a0 {
-                        #clock-cells = <0>;
-                        reg = <0xa0 0x4>;
-                        compatible = "fsl,qoriq-core-mux-1.0";
-                        clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>;
-                        clock-names = "pll2", "pll2-div2", "pll3", "pll3-div2";
-                        clock-output-names = "cmux5";
-                };
-
-                mux6: mux6@c0 {
-                        #clock-cells = <0>;
-                        reg = <0xc0 0x4>;
-                        compatible = "fsl,qoriq-core-mux-1.0";
-                        clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>;
-                        clock-names = "pll2", "pll2-div2", "pll3", "pll3-div2";
-                        clock-output-names = "cmux6";
-                };
-
-                mux7: mux7@e0 {
-                        #clock-cells = <0>;
-                        reg = <0xe0 0x4>;
-                        compatible = "fsl,qoriq-core-mux-1.0";
-                        clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>;
-                        clock-names = "pll2", "pll2-div2", "pll3", "pll3-div2";
-                        clock-output-names = "cmux7";
-                };
         };
 
         rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
index d56a546b73e6..0a7c65a00e5e 100644
--- a/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
@@ -94,7 +94,7 @@
                 cpu0: PowerPC,e500mc@0 {
                         device_type = "cpu";
                         reg = <0>;
-                        clocks = <&mux0>;
+                        clocks = <&clockgen 1 0>;
                         next-level-cache = <&L2_0>;
                         fsl,portid-mapping = <0x80000000>;
                         L2_0: l2-cache {
@@ -104,7 +104,7 @@
                 cpu1: PowerPC,e500mc@1 {
                         device_type = "cpu";
                         reg = <1>;
-                        clocks = <&mux1>;
+                        clocks = <&clockgen 1 1>;
                         next-level-cache = <&L2_1>;
                         fsl,portid-mapping = <0x40000000>;
                         L2_1: l2-cache {
@@ -114,7 +114,7 @@
                 cpu2: PowerPC,e500mc@2 {
                         device_type = "cpu";
                         reg = <2>;
-                        clocks = <&mux2>;
+                        clocks = <&clockgen 1 2>;
                         next-level-cache = <&L2_2>;
                         fsl,portid-mapping = <0x20000000>;
                         L2_2: l2-cache {
@@ -124,7 +124,7 @@
                 cpu3: PowerPC,e500mc@3 {
                         device_type = "cpu";
                         reg = <3>;
-                        clocks = <&mux3>;
+                        clocks = <&clockgen 1 3>;
                         next-level-cache = <&L2_3>;
                         fsl,portid-mapping = <0x10000000>;
                         L2_3: l2-cache {
@@ -134,7 +134,7 @@
                 cpu4: PowerPC,e500mc@4 {
                         device_type = "cpu";
                         reg = <4>;
-                        clocks = <&mux4>;
+                        clocks = <&clockgen 1 4>;
                         next-level-cache = <&L2_4>;
                         fsl,portid-mapping = <0x08000000>;
                         L2_4: l2-cache {
@@ -144,7 +144,7 @@
                 cpu5: PowerPC,e500mc@5 {
                         device_type = "cpu";
                         reg = <5>;
-                        clocks = <&mux5>;
+                        clocks = <&clockgen 1 5>;
                         next-level-cache = <&L2_5>;
                         fsl,portid-mapping = <0x04000000>;
                         L2_5: l2-cache {
@@ -154,7 +154,7 @@
                 cpu6: PowerPC,e500mc@6 {
                         device_type = "cpu";
                         reg = <6>;
-                        clocks = <&mux6>;
+                        clocks = <&clockgen 1 6>;
                         next-level-cache = <&L2_6>;
                         fsl,portid-mapping = <0x02000000>;
                         L2_6: l2-cache {
@@ -164,7 +164,7 @@
                 cpu7: PowerPC,e500mc@7 {
                         device_type = "cpu";
                         reg = <7>;
-                        clocks = <&mux7>;
+                        clocks = <&clockgen 1 7>;
                         next-level-cache = <&L2_7>;
                         fsl,portid-mapping = <0x01000000>;
                         L2_7: l2-cache {
diff --git a/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
index bfba0b4f1cbb..2d74ea85e5df 100644
--- a/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
@@ -96,7 +96,7 @@
                 cpu0: PowerPC,e5500@0 {
                         device_type = "cpu";
                         reg = <0>;
-                        clocks = <&mux0>;
+                        clocks = <&clockgen 1 0>;
                         next-level-cache = <&L2_0>;
                         fsl,portid-mapping = <0x80000000>;
                         L2_0: l2-cache {
@@ -106,7 +106,7 @@
                 cpu1: PowerPC,e5500@1 {
                         device_type = "cpu";
                         reg = <1>;
-                        clocks = <&mux1>;
+                        clocks = <&clockgen 1 1>;
                         next-level-cache = <&L2_1>;
                         fsl,portid-mapping = <0x40000000>;
                         L2_1: l2-cache {
diff --git a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
index e2bd9313e632..16b454b504e2 100644
--- a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
@@ -319,24 +319,6 @@
 /include/ "qoriq-clockgen1.dtsi"
         global-utilities@e1000 {
                 compatible = "fsl,p5040-clockgen", "fsl,qoriq-clockgen-1.0";
-
-                mux2: mux2@40 {
-                        #clock-cells = <0>;
-                        reg = <0x40 0x4>;
-                        compatible = "fsl,qoriq-core-mux-1.0";
-                        clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
-                        clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
-                        clock-output-names = "cmux2";
-                };
-
-                mux3: mux3@60 {
-                        #clock-cells = <0>;
-                        reg = <0x60 0x4>;
-                        compatible = "fsl,qoriq-core-mux-1.0";
-                        clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
-                        clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
-                        clock-output-names = "cmux3";
-                };
         };
 
         rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi
index dbd57750fc02..ed89dbbdacf0 100644
--- a/arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi
@@ -102,7 +102,7 @@
                 cpu0: PowerPC,e5500@0 {
                         device_type = "cpu";
                         reg = <0>;
-                        clocks = <&mux0>;
+                        clocks = <&clockgen 1 0>;
                         next-level-cache = <&L2_0>;
                         fsl,portid-mapping = <0x80000000>;
                         L2_0: l2-cache {
@@ -112,7 +112,7 @@
                 cpu1: PowerPC,e5500@1 {
                         device_type = "cpu";
                         reg = <1>;
-                        clocks = <&mux1>;
+                        clocks = <&clockgen 1 1>;
                         next-level-cache = <&L2_1>;
                         fsl,portid-mapping = <0x40000000>;
                         L2_1: l2-cache {
@@ -122,7 +122,7 @@
                 cpu2: PowerPC,e5500@2 {
                         device_type = "cpu";
                         reg = <2>;
-                        clocks = <&mux2>;
+                        clocks = <&clockgen 1 2>;
                         next-level-cache = <&L2_2>;
                         fsl,portid-mapping = <0x20000000>;
                         L2_2: l2-cache {
@@ -132,7 +132,7 @@
                 cpu3: PowerPC,e5500@3 {
                         device_type = "cpu";
                         reg = <3>;
-                        clocks = <&mux3>;
+                        clocks = <&clockgen 1 3>;
                         next-level-cache = <&L2_3>;
                         fsl,portid-mapping = <0x10000000>;
                         L2_3: l2-cache {
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-clockgen1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-clockgen1.dtsi
index 88cd70de4f86..463c1ed9ffdd 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-clockgen1.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-clockgen1.dtsi
@@ -34,53 +34,6 @@
 
 clockgen: global-utilities@e1000 {
         compatible = "fsl,qoriq-clockgen-1.0";
-        ranges = <0x0 0xe1000 0x1000>;
         reg = <0xe1000 0x1000>;
-        clock-frequency = <0>;
-        #address-cells = <1>;
-        #size-cells = <1>;
         #clock-cells = <2>;
-
-        sysclk: sysclk {
-                #clock-cells = <0>;
-                compatible = "fsl,qoriq-sysclk-1.0", "fixed-clock";
-                clock-output-names = "sysclk";
-        };
-        pll0: pll0@800 {
-                #clock-cells = <1>;
-                reg = <0x800 0x4>;
-                compatible = "fsl,qoriq-core-pll-1.0";
-                clocks = <&sysclk>;
-                clock-output-names = "pll0", "pll0-div2";
-        };
-        pll1: pll1@820 {
-                #clock-cells = <1>;
-                reg = <0x820 0x4>;
-                compatible = "fsl,qoriq-core-pll-1.0";
-                clocks = <&sysclk>;
-                clock-output-names = "pll1", "pll1-div2";
-        };
-        mux0: mux0@0 {
-                #clock-cells = <0>;
-                reg = <0x0 0x4>;
-                compatible = "fsl,qoriq-core-mux-1.0";
-                clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
-                clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
-                clock-output-names = "cmux0";
-        };
-        mux1: mux1@20 {
-                #clock-cells = <0>;
-                reg = <0x20 0x4>;
-                compatible = "fsl,qoriq-core-mux-1.0";
-                clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
-                clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
-                clock-output-names = "cmux1";
-        };
-        platform_pll: platform-pll@c00 {
-                #clock-cells = <1>;
-                reg = <0xc00 0x4>;
-                compatible = "fsl,qoriq-platform-pll-1.0";
-                clocks = <&sysclk>;
-                clock-output-names = "platform-pll", "platform-pll-div2";
-        };
 };
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-clockgen2.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-clockgen2.dtsi
index 6dfd7c5357ab..0361050bb56a 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-clockgen2.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-clockgen2.dtsi
@@ -34,36 +34,6 @@
 
 clockgen: global-utilities@e1000 {
         compatible = "fsl,qoriq-clockgen-2.0";
-        ranges = <0x0 0xe1000 0x1000>;
         reg = <0xe1000 0x1000>;
-        #address-cells = <1>;
-        #size-cells = <1>;
         #clock-cells = <2>;
-
-        sysclk: sysclk {
-                #clock-cells = <0>;
-                compatible = "fsl,qoriq-sysclk-2.0", "fixed-clock";
-                clock-output-names = "sysclk";
-        };
-        pll0: pll0@800 {
-                #clock-cells = <1>;
-                reg = <0x800 0x4>;
-                compatible = "fsl,qoriq-core-pll-2.0";
-                clocks = <&sysclk>;
-                clock-output-names = "pll0", "pll0-div2", "pll0-div4";
-        };
-        pll1: pll1@820 {
-                #clock-cells = <1>;
-                reg = <0x820 0x4>;
-                compatible = "fsl,qoriq-core-pll-2.0";
-                clocks = <&sysclk>;
-                clock-output-names = "pll1", "pll1-div2", "pll1-div4";
-        };
-        platform_pll: platform-pll@c00 {
-                #clock-cells = <1>;
-                reg = <0xc00 0x4>;
-                compatible = "fsl,qoriq-platform-pll-2.0";
-                clocks = <&sysclk>;
-                clock-output-names = "platform-pll", "platform-pll-div2";
-        };
 };
diff --git a/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
index 4908af501098..d552044c5afc 100644
--- a/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
@@ -345,22 +345,6 @@
 /include/ "qoriq-clockgen2.dtsi"
         global-utilities@e1000 {
                 compatible = "fsl,t1023-clockgen", "fsl,qoriq-clockgen-2.0";
-                mux0: mux0@0 {
-                        #clock-cells = <0>;
-                        reg = <0x0 4>;
-                        compatible = "fsl,core-mux-clock";
-                        clocks = <&pll0 0>, <&pll0 1>;
-                        clock-names = "pll0_0", "pll0_1";
-                        clock-output-names = "cmux0";
-                };
-                mux1: mux1@20 {
-                        #clock-cells = <0>;
-                        reg = <0x20 4>;
-                        compatible = "fsl,core-mux-clock";
-                        clocks = <&pll0 0>, <&pll0 1>;
-                        clock-names = "pll0_0", "pll0_1";
-                        clock-output-names = "cmux1";
-                };
         };
 
         rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi b/arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi
index 9d08a363bab3..d87ea13164f2 100644
--- a/arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi
@@ -74,7 +74,7 @@
                 cpu0: PowerPC,e5500@0 {
                         device_type = "cpu";
                         reg = <0>;
-                        clocks = <&mux0>;
+                        clocks = <&clockgen 1 0>;
                         next-level-cache = <&L2_1>;
                         #cooling-cells = <2>;
                         L2_1: l2-cache {
@@ -84,7 +84,7 @@
                 cpu1: PowerPC,e5500@1 {
                         device_type = "cpu";
                         reg = <1>;
-                        clocks = <&mux1>;
+                        clocks = <&clockgen 1 1>;
                         next-level-cache = <&L2_2>;
                         #cooling-cells = <2>;
                         L2_2: l2-cache {
diff --git a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
index 145c7f43b5b6..315d0557eefc 100644
--- a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
@@ -425,50 +425,6 @@
 /include/ "qoriq-clockgen2.dtsi"
         global-utilities@e1000 {
                 compatible = "fsl,t1040-clockgen", "fsl,qoriq-clockgen-2.0";
-
-                mux0: mux0@0 {
-                        #clock-cells = <0>;
-                        reg = <0x0 4>;
-                        compatible = "fsl,qoriq-core-mux-2.0";
-                        clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
-                                 <&pll1 0>, <&pll1 1>, <&pll1 2>;
-                        clock-names = "pll0", "pll0-div2", "pll1-div4",
-                                "pll1", "pll1-div2", "pll1-div4";
-                        clock-output-names = "cmux0";
-                };
-
-                mux1: mux1@20 {
-                        #clock-cells = <0>;
-                        reg = <0x20 4>;
-                        compatible = "fsl,qoriq-core-mux-2.0";
-                        clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
-                                 <&pll1 0>, <&pll1 1>, <&pll1 2>;
-                        clock-names = "pll0", "pll0-div2", "pll1-div4",
-                                "pll1", "pll1-div2", "pll1-div4";
-                        clock-output-names = "cmux1";
-                };
-
-                mux2: mux2@40 {
-                        #clock-cells = <0>;
-                        reg = <0x40 4>;
-                        compatible = "fsl,qoriq-core-mux-2.0";
-                        clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
-                                 <&pll1 0>, <&pll1 1>, <&pll1 2>;
-                        clock-names = "pll0", "pll0-div2", "pll1-div4",
-                                "pll1", "pll1-div2", "pll1-div4";
-                        clock-output-names = "cmux2";
-                };
-
-                mux3: mux3@60 {
-                        #clock-cells = <0>;
-                        reg = <0x60 4>;
-                        compatible = "fsl,qoriq-core-mux-2.0";
-                        clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
-                                 <&pll1 0>, <&pll1 1>, <&pll1 2>;
-                        clock-names = "pll0_0", "pll0_1", "pll0_2",
-                                "pll1_0", "pll1_1", "pll1_2";
-                        clock-output-names = "cmux3";
-                };
         };
 
         rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/t104xsi-pre.dtsi b/arch/powerpc/boot/dts/fsl/t104xsi-pre.dtsi
index 6db0ee8b1384..dd59e4b69480 100644
--- a/arch/powerpc/boot/dts/fsl/t104xsi-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t104xsi-pre.dtsi
@@ -74,7 +74,7 @@
                 cpu0: PowerPC,e5500@0 {
                         device_type = "cpu";
                         reg = <0>;
-                        clocks = <&mux0>;
+                        clocks = <&clockgen 1 0>;
                         next-level-cache = <&L2_1>;
                         #cooling-cells = <2>;
                         L2_1: l2-cache {
@@ -84,7 +84,7 @@
                 cpu1: PowerPC,e5500@1 {
                         device_type = "cpu";
                         reg = <1>;
-                        clocks = <&mux1>;
+                        clocks = <&clockgen 1 1>;
                         next-level-cache = <&L2_2>;
                         #cooling-cells = <2>;
                         L2_2: l2-cache {
@@ -94,7 +94,7 @@
                 cpu2: PowerPC,e5500@2 {
                         device_type = "cpu";
                         reg = <2>;
-                        clocks = <&mux2>;
+                        clocks = <&clockgen 1 2>;
                         next-level-cache = <&L2_3>;
                         #cooling-cells = <2>;
                         L2_3: l2-cache {
@@ -104,7 +104,7 @@
                 cpu3: PowerPC,e5500@3 {
                         device_type = "cpu";
                         reg = <3>;
-                        clocks = <&mux3>;
+                        clocks = <&clockgen 1 3>;
                         next-level-cache = <&L2_4>;
                         #cooling-cells = <2>;
                         L2_4: l2-cache {
diff --git a/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi b/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi
index a97296c64eb2..ecbb447920bc 100644
--- a/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi
@@ -535,28 +535,6 @@
 /include/ "qoriq-clockgen2.dtsi"
         global-utilities@e1000 {
                 compatible = "fsl,t2080-clockgen", "fsl,qoriq-clockgen-2.0";
-
-                mux0: mux0@0 {
-                        #clock-cells = <0>;
-                        reg = <0x0 4>;
-                        compatible = "fsl,qoriq-core-mux-2.0";
-                        clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
-                                 <&pll1 0>, <&pll1 1>, <&pll1 2>;
-                        clock-names = "pll0", "pll0-div2", "pll0-div4",
-                                "pll1", "pll1-div2", "pll1-div4";
-                        clock-output-names = "cmux0";
-                };
-
-                mux1: mux1@20 {
-                        #clock-cells = <0>;
-                        reg = <0x20 4>;
-                        compatible = "fsl,qoriq-core-mux-2.0";
-                        clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
-                                 <&pll1 0>, <&pll1 1>, <&pll1 2>;
-                        clock-names = "pll0", "pll0-div2", "pll0-div4",
-                                "pll1", "pll1-div2", "pll1-div4";
-                        clock-output-names = "cmux1";
-                };
         };
 
         rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/t208xsi-pre.dtsi b/arch/powerpc/boot/dts/fsl/t208xsi-pre.dtsi
index c2e57203910d..3f745de44284 100644
--- a/arch/powerpc/boot/dts/fsl/t208xsi-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t208xsi-pre.dtsi
@@ -81,28 +81,28 @@
                 cpu0: PowerPC,e6500@0 {
                         device_type = "cpu";
                         reg = <0 1>;
-                        clocks = <&mux0>;
+                        clocks = <&clockgen 1 0>;
                         next-level-cache = <&L2_1>;
                         fsl,portid-mapping = <0x80000000>;
                 };
                 cpu1: PowerPC,e6500@2 {
                         device_type = "cpu";
                         reg = <2 3>;
-                        clocks = <&mux0>;
+                        clocks = <&clockgen 1 0>;
                         next-level-cache = <&L2_1>;
                         fsl,portid-mapping = <0x80000000>;
                 };
                 cpu2: PowerPC,e6500@4 {
                         device_type = "cpu";
                         reg = <4 5>;
-                        clocks = <&mux0>;
+                        clocks = <&clockgen 1 0>;
                         next-level-cache = <&L2_1>;
                         fsl,portid-mapping = <0x80000000>;
                 };
                 cpu3: PowerPC,e6500@6 {
                         device_type = "cpu";
                         reg = <6 7>;
-                        clocks = <&mux0>;
+                        clocks = <&clockgen 1 0>;
                         next-level-cache = <&L2_1>;
                         fsl,portid-mapping = <0x80000000>;
                 };
diff --git a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
index 68c4eadc19e3..fcac73486d48 100644
--- a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
@@ -950,67 +950,6 @@
 /include/ "qoriq-clockgen2.dtsi"
         global-utilities@e1000 {
                 compatible = "fsl,t4240-clockgen", "fsl,qoriq-clockgen-2.0";
-
-                pll2: pll2@840 {
-                        #clock-cells = <1>;
-                        reg = <0x840 0x4>;
-                        compatible = "fsl,qoriq-core-pll-2.0";
-                        clocks = <&sysclk>;
-                        clock-output-names = "pll2", "pll2-div2", "pll2-div4";
-                };
-
-                pll3: pll3@860 {
-                        #clock-cells = <1>;
-                        reg = <0x860 0x4>;
-                        compatible = "fsl,qoriq-core-pll-2.0";
-                        clocks = <&sysclk>;
-                        clock-output-names = "pll3", "pll3-div2", "pll3-div4";
-                };
-
-                pll4: pll4@880 {
-                        #clock-cells = <1>;
-                        reg = <0x880 0x4>;
-                        compatible = "fsl,qoriq-core-pll-2.0";
-                        clocks = <&sysclk>;
-                        clock-output-names = "pll4", "pll4-div2", "pll4-div4";
-                };
-
-                mux0: mux0@0 {
-                        #clock-cells = <0>;
-                        reg = <0x0 0x4>;
-                        compatible = "fsl,qoriq-core-mux-2.0";
-                        clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
-                                <&pll1 0>, <&pll1 1>, <&pll1 2>,
-                                <&pll2 0>, <&pll2 1>, <&pll2 2>;
-                        clock-names = "pll0", "pll0-div2", "pll0-div4",
-                                "pll1", "pll1-div2", "pll1-div4",
-                                "pll2", "pll2-div2", "pll2-div4";
-                        clock-output-names = "cmux0";
-                };
-
-                mux1: mux1@20 {
-                        #clock-cells = <0>;
-                        reg = <0x20 0x4>;
-                        compatible = "fsl,qoriq-core-mux-2.0";
-                        clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
-                                <&pll1 0>, <&pll1 1>, <&pll1 2>,
-                                <&pll2 0>, <&pll2 1>, <&pll2 2>;
-                        clock-names = "pll0", "pll0-div2", "pll0-div4",
-                                "pll1", "pll1-div2", "pll1-div4",
-                                "pll2", "pll2-div2", "pll2-div4";
-                        clock-output-names = "cmux1";
-                };
-
-                mux2: mux2@40 {
-                        #clock-cells = <0>;
-                        reg = <0x40 0x4>;
-                        compatible = "fsl,qoriq-core-mux-2.0";
-                        clocks = <&pll3 0>, <&pll3 1>, <&pll3 2>,
-                                <&pll4 0>, <&pll4 1>, <&pll4 2>;
-                        clock-names = "pll3", "pll3-div2", "pll3-div4",
-                                "pll4", "pll4-div2", "pll4-div4";
-                        clock-output-names = "cmux2";
-                };
         };
 
         rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi
index 038cf8fadee4..632314c6faa9 100644
--- a/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi
@@ -90,84 +90,84 @@
                 cpu0: PowerPC,e6500@0 {
                         device_type = "cpu";
                         reg = <0 1>;
-                        clocks = <&mux0>;
+                        clocks = <&clockgen 1 0>;
                         next-level-cache = <&L2_1>;
                         fsl,portid-mapping = <0x80000000>;
                 };
                 cpu1: PowerPC,e6500@2 {
                         device_type = "cpu";
                         reg = <2 3>;
-                        clocks = <&mux0>;
+                        clocks = <&clockgen 1 0>;
                         next-level-cache = <&L2_1>;
                         fsl,portid-mapping = <0x80000000>;
                 };
                 cpu2: PowerPC,e6500@4 {
                         device_type = "cpu";
                         reg = <4 5>;
-                        clocks = <&mux0>;
+                        clocks = <&clockgen 1 0>;
                         next-level-cache = <&L2_1>;
                         fsl,portid-mapping = <0x80000000>;
                 };
                 cpu3: PowerPC,e6500@6 {
                         device_type = "cpu";
                         reg = <6 7>;
-                        clocks = <&mux0>;
+                        clocks = <&clockgen 1 0>;
                         next-level-cache = <&L2_1>;
                         fsl,portid-mapping = <0x80000000>;
                 };
                 cpu4: PowerPC,e6500@8 {
                         device_type = "cpu";
                         reg = <8 9>;
-                        clocks = <&mux1>;
+                        clocks = <&clockgen 1 1>;
                         next-level-cache = <&L2_2>;
                         fsl,portid-mapping = <0x40000000>;
                 };
                 cpu5: PowerPC,e6500@10 {
                         device_type = "cpu";
                         reg = <10 11>;
-                        clocks = <&mux1>;
+                        clocks = <&clockgen 1 1>;
                         next-level-cache = <&L2_2>;
                         fsl,portid-mapping = <0x40000000>;
                 };
                 cpu6: PowerPC,e6500@12 {
                         device_type = "cpu";
                         reg = <12 13>;
-                        clocks = <&mux1>;
+                        clocks = <&clockgen 1 1>;
                         next-level-cache = <&L2_2>;
                         fsl,portid-mapping = <0x40000000>;
                 };
                 cpu7: PowerPC,e6500@14 {
                         device_type = "cpu";
                         reg = <14 15>;
-                        clocks = <&mux1>;
+                        clocks = <&clockgen 1 1>;
                         next-level-cache = <&L2_2>;
                         fsl,portid-mapping = <0x40000000>;
                 };
                 cpu8: PowerPC,e6500@16 {
                         device_type = "cpu";
                         reg = <16 17>;
-                        clocks = <&mux2>;
+                        clocks = <&clockgen 1 2>;
                         next-level-cache = <&L2_3>;
                         fsl,portid-mapping = <0x20000000>;
                 };
                 cpu9: PowerPC,e6500@18 {
                         device_type = "cpu";
                         reg = <18 19>;
-                        clocks = <&mux2>;
+                        clocks = <&clockgen 1 2>;
                         next-level-cache = <&L2_3>;
                         fsl,portid-mapping = <0x20000000>;
                 };
                 cpu10: PowerPC,e6500@20 {
                         device_type = "cpu";
                         reg = <20 21>;
-                        clocks = <&mux2>;
+                        clocks = <&clockgen 1 2>;
                         next-level-cache = <&L2_3>;
                         fsl,portid-mapping = <0x20000000>;
                 };
                 cpu11: PowerPC,e6500@22 {
                         device_type = "cpu";
                         reg = <22 23>;
-                        clocks = <&mux2>;
+                        clocks = <&clockgen 1 2>;
                         next-level-cache = <&L2_3>;
                         fsl,portid-mapping = <0x20000000>;
                 };
diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts b/arch/powerpc/boot/dts/mpc832x_rdb.dts
index 647cae14c16d..be6ef3531b28 100644
--- a/arch/powerpc/boot/dts/mpc832x_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts
@@ -311,13 +311,9 @@
                         compatible = "fsl,ucc-mdio";
 
                         phy00:ethernet-phy@0 {
-                                interrupt-parent = <&ipic>;
-                                interrupts = <0>;
                                 reg = <0x0>;
                         };
                         phy04:ethernet-phy@4 {
-                                interrupt-parent = <&ipic>;
-                                interrupts = <0>;
                                 reg = <0x4>;
                         };
                 };
diff --git a/arch/powerpc/boot/serial.c b/arch/powerpc/boot/serial.c
index f045f8494bf9..b0491b8c0199 100644
--- a/arch/powerpc/boot/serial.c
+++ b/arch/powerpc/boot/serial.c
@@ -93,7 +93,8 @@ static void *serial_get_stdout_devp(void)
         if (devp == NULL)
                 goto err_out;
 
-        if (getprop(devp, "linux,stdout-path", path, MAX_PATH_LEN) > 0) {
+        if (getprop(devp, "linux,stdout-path", path, MAX_PATH_LEN) > 0 ||
+                getprop(devp, "stdout-path", path, MAX_PATH_LEN) > 0) {
                 devp = finddevice(path);
                 if (devp == NULL)
                         goto err_out;
diff --git a/arch/powerpc/configs/fsl-emb-nonhw.config b/arch/powerpc/configs/fsl-emb-nonhw.config
index e0567dc41968..d592ba27b122 100644
--- a/arch/powerpc/configs/fsl-emb-nonhw.config
+++ b/arch/powerpc/configs/fsl-emb-nonhw.config
@@ -25,6 +25,7 @@ CONFIG_CRYPTO_SHA256=y
 CONFIG_CRYPTO_SHA512=y
 CONFIG_DEBUG_FS=y
 CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_KERNEL=y
 CONFIG_DEBUG_SHIRQ=y
 CONFIG_DETECT_HUNG_TASK=y
 CONFIG_DEVTMPFS_MOUNT=y
diff --git a/arch/powerpc/configs/g5_defconfig b/arch/powerpc/configs/g5_defconfig
index f686cc1eac0b..ceb3c770786f 100644
--- a/arch/powerpc/configs/g5_defconfig
+++ b/arch/powerpc/configs/g5_defconfig
@@ -246,7 +246,6 @@ CONFIG_DEBUG_KERNEL=y
 CONFIG_DEBUG_MUTEXES=y
 CONFIG_LATENCYTOP=y
 CONFIG_BOOTX_TEXT=y
-CONFIG_PPC_EARLY_DEBUG=y
 CONFIG_CRYPTO_TEST=m
 CONFIG_CRYPTO_PCBC=m
 CONFIG_CRYPTO_HMAC=y
diff --git a/arch/powerpc/configs/guest.config b/arch/powerpc/configs/guest.config
new file mode 100644
index 000000000000..8b8cd18ecd7c
--- /dev/null
+++ b/arch/powerpc/configs/guest.config
@@ -0,0 +1,13 @@
+CONFIG_VIRTIO_BLK=y
+CONFIG_VIRTIO_BLK_SCSI=y
+CONFIG_SCSI_VIRTIO=y
+CONFIG_VIRTIO_NET=y
+CONFIG_NET_FAILOVER=y
+CONFIG_VIRTIO_CONSOLE=y
+CONFIG_VIRTIO=y
+CONFIG_VIRTIO_PCI=y
+CONFIG_KVM_GUEST=y
+CONFIG_EPAPR_PARAVIRT=y
+CONFIG_VIRTIO_BALLOON=y
+CONFIG_VHOST_NET=y
+CONFIG_VHOST=y
diff --git a/arch/powerpc/configs/maple_defconfig b/arch/powerpc/configs/maple_defconfig
index f71eddafb02f..c5f2005005d3 100644
--- a/arch/powerpc/configs/maple_defconfig
+++ b/arch/powerpc/configs/maple_defconfig
@@ -108,7 +108,6 @@ CONFIG_LATENCYTOP=y
 CONFIG_XMON=y
 CONFIG_XMON_DEFAULT=y
 CONFIG_BOOTX_TEXT=y
-CONFIG_PPC_EARLY_DEBUG=y
 CONFIG_CRYPTO_ECB=m
 CONFIG_CRYPTO_PCBC=m
 # CONFIG_CRYPTO_HW is not set
diff --git a/arch/powerpc/configs/pmac32_defconfig b/arch/powerpc/configs/pmac32_defconfig
index 62948d198d7f..50b610b48914 100644
--- a/arch/powerpc/configs/pmac32_defconfig
+++ b/arch/powerpc/configs/pmac32_defconfig
@@ -297,7 +297,6 @@ CONFIG_LATENCYTOP=y
 CONFIG_XMON=y
 CONFIG_XMON_DEFAULT=y
 CONFIG_BOOTX_TEXT=y
-CONFIG_PPC_EARLY_DEBUG=y
 CONFIG_CRYPTO_PCBC=m
 CONFIG_CRYPTO_MD4=m
 CONFIG_CRYPTO_SHA512=m
diff --git a/arch/powerpc/configs/ppc64_defconfig b/arch/powerpc/configs/ppc64_defconfig
index f2515674a1e2..91fdb619b484 100644
--- a/arch/powerpc/configs/ppc64_defconfig
+++ b/arch/powerpc/configs/ppc64_defconfig
@@ -1,4 +1,3 @@
-CONFIG_PPC64=y
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
 CONFIG_NO_HZ=y
@@ -9,21 +8,22 @@ CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=18
 CONFIG_LOG_CPU_MAX_BUF_SHIFT=13
+CONFIG_NUMA_BALANCING=y
 CONFIG_CGROUPS=y
+CONFIG_MEMCG=y
+CONFIG_CGROUP_SCHED=y
+CONFIG_CGROUP_FREEZER=y
 CONFIG_CPUSETS=y
+CONFIG_CGROUP_DEVICE=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_CGROUP_PERF=y
 CONFIG_CGROUP_BPF=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_BPF_SYSCALL=y
 # CONFIG_COMPAT_BRK is not set
 CONFIG_PROFILING=y
-CONFIG_OPROFILE=m
-CONFIG_KPROBES=y
-CONFIG_JUMP_LABEL=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-CONFIG_MODULE_SRCVERSION_ALL=y
-CONFIG_PARTITION_ADVANCED=y
+CONFIG_PPC64=y
+CONFIG_NR_CPUS=2048
 CONFIG_PPC_SPLPAR=y
 CONFIG_DTL=y
 CONFIG_SCANLOG=m
@@ -45,14 +45,11 @@ CONFIG_CPU_FREQ_GOV_USERSPACE=y
 CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
 CONFIG_CPU_FREQ_PMAC64=y
 CONFIG_HZ_100=y
-CONFIG_BINFMT_MISC=m
 CONFIG_PPC_TRANSACTIONAL_MEM=y
 CONFIG_KEXEC=y
 CONFIG_KEXEC_FILE=y
 CONFIG_CRASH_DUMP=y
 CONFIG_IRQ_ALL_CPUS=y
-CONFIG_KSM=y
-CONFIG_TRANSPARENT_HUGEPAGE=y
 CONFIG_PPC_64K_PAGES=y
 CONFIG_SCHED_SMT=y
 CONFIG_HOTPLUG_PCI=y
@@ -60,6 +57,23 @@ CONFIG_HOTPLUG_PCI_RPA=m
 CONFIG_HOTPLUG_PCI_RPA_DLPAR=m
 CONFIG_PCCARD=y
 CONFIG_ELECTRA_CF=y
+CONFIG_VIRTUALIZATION=y
+CONFIG_KVM_BOOK3S_64=m
+CONFIG_KVM_BOOK3S_64_HV=m
+CONFIG_VHOST_NET=m
+CONFIG_OPROFILE=m
+CONFIG_KPROBES=y
+CONFIG_JUMP_LABEL=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_BINFMT_MISC=m
+CONFIG_MEMORY_HOTPLUG=y
+CONFIG_MEMORY_HOTREMOVE=y
+CONFIG_KSM=y
+CONFIG_TRANSPARENT_HUGEPAGE=y
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
@@ -163,7 +177,6 @@ CONFIG_TIGON3=y
 CONFIG_BNX2X=m
 CONFIG_CHELSIO_T1=m
 CONFIG_BE2NET=m
-CONFIG_S2IO=m
 CONFIG_IBMVETH=m
 CONFIG_EHEA=m
 CONFIG_E100=y
@@ -174,6 +187,7 @@ CONFIG_IXGBE=m
 CONFIG_I40E=m
 CONFIG_MLX4_EN=m
 CONFIG_MYRI10GE=m
+CONFIG_S2IO=m
 CONFIG_PASEMI_MAC=y
 CONFIG_QLGE=m
 CONFIG_NETXEN_NIC=m
@@ -284,7 +298,7 @@ CONFIG_REISERFS_FS_SECURITY=y
 CONFIG_JFS_FS=m
 CONFIG_JFS_POSIX_ACL=y
 CONFIG_JFS_SECURITY=y
-CONFIG_XFS_FS=m
+CONFIG_XFS_FS=y
 CONFIG_XFS_POSIX_ACL=y
 CONFIG_BTRFS_FS=m
 CONFIG_BTRFS_FS_POSIX_ACL=y
@@ -323,25 +337,6 @@ CONFIG_NLS_CODEPAGE_437=y
 CONFIG_NLS_ASCII=y
 CONFIG_NLS_ISO8859_1=y
 CONFIG_NLS_UTF8=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_STACK_USAGE=y
-CONFIG_DEBUG_STACKOVERFLOW=y
-CONFIG_SOFTLOCKUP_DETECTOR=y
-CONFIG_HARDLOCKUP_DETECTOR=y
-CONFIG_DEBUG_MUTEXES=y
-CONFIG_LATENCYTOP=y
-CONFIG_FTRACE=y
-CONFIG_FUNCTION_TRACER=y
-CONFIG_FUNCTION_GRAPH_TRACER=y
-CONFIG_SCHED_TRACER=y
-CONFIG_BLK_DEV_IO_TRACE=y
-CONFIG_CODE_PATCHING_SELFTEST=y
-CONFIG_FTR_FIXUP_SELFTEST=y
-CONFIG_MSI_BITMAP_SELFTEST=y
-CONFIG_XMON=y
-CONFIG_BOOTX_TEXT=y
-CONFIG_PPC_EARLY_DEBUG=y
 CONFIG_CRYPTO_TEST=m
 CONFIG_CRYPTO_PCBC=m
 CONFIG_CRYPTO_HMAC=y
@@ -364,8 +359,20 @@ CONFIG_CRYPTO_LZO=m
 CONFIG_CRYPTO_DEV_NX=y
 CONFIG_CRYPTO_DEV_NX_ENCRYPT=m
 CONFIG_CRYPTO_DEV_VMX=y
-CONFIG_VIRTUALIZATION=y
-CONFIG_KVM_BOOK3S_64=m
-CONFIG_KVM_BOOK3S_64_HV=m
-CONFIG_VHOST_NET=m
 CONFIG_PRINTK_TIME=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_DEBUG_STACK_USAGE=y
+CONFIG_DEBUG_STACKOVERFLOW=y
+CONFIG_SOFTLOCKUP_DETECTOR=y
+CONFIG_HARDLOCKUP_DETECTOR=y
+CONFIG_DEBUG_MUTEXES=y
+CONFIG_LATENCYTOP=y
+CONFIG_FUNCTION_TRACER=y
+CONFIG_SCHED_TRACER=y
+CONFIG_BLK_DEV_IO_TRACE=y
+CONFIG_CODE_PATCHING_SELFTEST=y
+CONFIG_FTR_FIXUP_SELFTEST=y
+CONFIG_MSI_BITMAP_SELFTEST=y
+CONFIG_XMON=y
+CONFIG_BOOTX_TEXT=y
diff --git a/arch/powerpc/configs/ppc6xx_defconfig b/arch/powerpc/configs/ppc6xx_defconfig
index 7ee736f20774..53687c3a70c4 100644
--- a/arch/powerpc/configs/ppc6xx_defconfig
+++ b/arch/powerpc/configs/ppc6xx_defconfig
@@ -1155,7 +1155,6 @@ CONFIG_STACK_TRACER=y
 CONFIG_BLK_DEV_IO_TRACE=y
 CONFIG_XMON=y
 CONFIG_BOOTX_TEXT=y
-CONFIG_PPC_EARLY_DEBUG=y
 CONFIG_SECURITY=y
 CONFIG_SECURITY_NETWORK=y
 CONFIG_SECURITY_NETWORK_XFRM=y
diff --git a/arch/powerpc/configs/pseries_defconfig b/arch/powerpc/configs/pseries_defconfig
index 5e09a40cbcbf..ea79c519863d 100644
--- a/arch/powerpc/configs/pseries_defconfig
+++ b/arch/powerpc/configs/pseries_defconfig
@@ -290,9 +290,7 @@ CONFIG_DEBUG_STACKOVERFLOW=y
 CONFIG_SOFTLOCKUP_DETECTOR=y
 CONFIG_HARDLOCKUP_DETECTOR=y
 CONFIG_LATENCYTOP=y
-CONFIG_FTRACE=y
 CONFIG_FUNCTION_TRACER=y
-CONFIG_FUNCTION_GRAPH_TRACER=y
 CONFIG_SCHED_TRACER=y
 CONFIG_BLK_DEV_IO_TRACE=y
 CONFIG_CODE_PATCHING_SELFTEST=y
diff --git a/arch/powerpc/include/asm/Kbuild b/arch/powerpc/include/asm/Kbuild
index 3196d227e351..77ff7fb24823 100644
--- a/arch/powerpc/include/asm/Kbuild
+++ b/arch/powerpc/include/asm/Kbuild
@@ -1,3 +1,7 @@
+generated-y += syscall_table_32.h
+generated-y += syscall_table_64.h
+generated-y += syscall_table_c32.h
+generated-y += syscall_table_spu.h
 generic-y += div64.h
 generic-y += export.h
 generic-y += irq_regs.h
diff --git a/arch/powerpc/include/asm/asm-prototypes.h b/arch/powerpc/include/asm/asm-prototypes.h
index ec691d489656..6f201b199c02 100644
--- a/arch/powerpc/include/asm/asm-prototypes.h
+++ b/arch/powerpc/include/asm/asm-prototypes.h
@@ -61,7 +61,6 @@ void RunModeException(struct pt_regs *regs);
 void single_step_exception(struct pt_regs *regs);
 void program_check_exception(struct pt_regs *regs);
 void alignment_exception(struct pt_regs *regs);
-void slb_miss_bad_addr(struct pt_regs *regs);
 void StackOverflow(struct pt_regs *regs);
 void kernel_fp_unavailable_exception(struct pt_regs *regs);
 void altivec_unavailable_exception(struct pt_regs *regs);
diff --git a/arch/powerpc/include/asm/book3s/32/hash.h b/arch/powerpc/include/asm/book3s/32/hash.h
index f2892c7ab73e..2a0a467d2985 100644
--- a/arch/powerpc/include/asm/book3s/32/hash.h
+++ b/arch/powerpc/include/asm/book3s/32/hash.h
@@ -26,6 +26,7 @@
 #define _PAGE_WRITETHRU 0x040   /* W: cache write-through */
 #define _PAGE_DIRTY     0x080   /* C: page changed */
 #define _PAGE_ACCESSED  0x100   /* R: page referenced */
+#define _PAGE_EXEC      0x200   /* software: exec allowed */
 #define _PAGE_RW        0x400   /* software: user write access allowed */
 #define _PAGE_SPECIAL   0x800   /* software: Special page */
 
diff --git a/arch/powerpc/include/asm/book3s/32/mmu-hash.h b/arch/powerpc/include/asm/book3s/32/mmu-hash.h
index e38c91388c40..0c261ba2c826 100644
--- a/arch/powerpc/include/asm/book3s/32/mmu-hash.h
+++ b/arch/powerpc/include/asm/book3s/32/mmu-hash.h
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0 */
 #ifndef _ASM_POWERPC_BOOK3S_32_MMU_HASH_H_
 #define _ASM_POWERPC_BOOK3S_32_MMU_HASH_H_
+
 /*
  * 32-bit hash table MMU support
  */
@@ -9,6 +10,8 @@
  * BATs
  */
 
+#include <asm/page.h>
+
 /* Block size masks */
 #define BL_128K 0x000
 #define BL_256K 0x001
@@ -34,14 +37,20 @@
 #define BAT_PHYS_ADDR(x) ((u32)((x & 0x00000000fffe0000ULL) | \
                                 ((x & 0x0000000e00000000ULL) >> 24) | \
                                 ((x & 0x0000000100000000ULL) >> 30)))
+#define PHYS_BAT_ADDR(x) (((u64)(x) & 0x00000000fffe0000ULL) | \
+                          (((u64)(x) << 24) & 0x0000000e00000000ULL) | \
+                          (((u64)(x) << 30) & 0x0000000100000000ULL))
 #else
 #define BAT_PHYS_ADDR(x) (x)
+#define PHYS_BAT_ADDR(x) ((x) & 0xfffe0000)
 #endif
 
 struct ppc_bat {
         u32 batu;
         u32 batl;
 };
+
+typedef pte_t *pgtable_t;
 #endif /* !__ASSEMBLY__ */
 
 /*
@@ -83,6 +92,12 @@ typedef struct {
         unsigned long vdso_base;
 } mm_context_t;
 
+/* patch sites */
+extern s32 patch__hash_page_A0, patch__hash_page_A1, patch__hash_page_A2;
+extern s32 patch__hash_page_B, patch__hash_page_C;
+extern s32 patch__flush_hash_A0, patch__flush_hash_A1, patch__flush_hash_A2;
+extern s32 patch__flush_hash_B;
+
 #endif /* !__ASSEMBLY__ */
 
 /* We happily ignore the smaller BATs on 601, we don't actually use
diff --git a/arch/powerpc/include/asm/book3s/32/pgalloc.h b/arch/powerpc/include/asm/book3s/32/pgalloc.h
index 82e44b1a00ae..b5b955eb2fb7 100644
--- a/arch/powerpc/include/asm/book3s/32/pgalloc.h
+++ b/arch/powerpc/include/asm/book3s/32/pgalloc.h
@@ -25,10 +25,7 @@
 extern void __bad_pte(pmd_t *pmd);
 
 extern struct kmem_cache *pgtable_cache[];
-#define PGT_CACHE(shift) ({                             \
-                        BUG_ON(!(shift));               \
-                        pgtable_cache[(shift) - 1];     \
-                })
+#define PGT_CACHE(shift) pgtable_cache[shift]
 
 static inline pgd_t *pgd_alloc(struct mm_struct *mm)
 {
@@ -50,8 +47,6 @@ static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
 #define __pmd_free_tlb(tlb,x,a)         do { } while (0)
 /* #define pgd_populate(mm, pmd, pte)      BUG() */
 
-#ifndef CONFIG_BOOKE
-
 static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp,
                                        pte_t *pte)
 {
@@ -61,46 +56,31 @@ static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp,
 static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmdp,
                                 pgtable_t pte_page)
 {
-        *pmdp = __pmd((page_to_pfn(pte_page) << PAGE_SHIFT) | _PMD_PRESENT);
-}
-
-#define pmd_pgtable(pmd) pmd_page(pmd)
-#else
-
-static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp,
-                                       pte_t *pte)
-{
-        *pmdp = __pmd((unsigned long)pte | _PMD_PRESENT);
-}
-
-static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmdp,
-                                pgtable_t pte_page)
-{
-        *pmdp = __pmd((unsigned long)lowmem_page_address(pte_page) | _PMD_PRESENT);
+        *pmdp = __pmd(__pa(pte_page) | _PMD_PRESENT);
 }
 
-#define pmd_pgtable(pmd) pmd_page(pmd)
-#endif
+#define pmd_pgtable(pmd) ((pgtable_t)pmd_page_vaddr(pmd))
 
 extern pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr);
 extern pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long addr);
+void pte_frag_destroy(void *pte_frag);
+pte_t *pte_fragment_alloc(struct mm_struct *mm, unsigned long vmaddr, int kernel);
+void pte_fragment_free(unsigned long *table, int kernel);
 
 static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
 {
-        free_page((unsigned long)pte);
+        pte_fragment_free((unsigned long *)pte, 1);
 }
 
 static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage)
 {
-        pgtable_page_dtor(ptepage);
-        __free_page(ptepage);
+        pte_fragment_free((unsigned long *)ptepage, 0);
 }
 
 static inline void pgtable_free(void *table, unsigned index_size)
 {
         if (!index_size) {
-                pgtable_page_dtor(virt_to_page(table));
-                free_page((unsigned long)table);
+                pte_fragment_free((unsigned long *)table, 0);
         } else {
                 BUG_ON(index_size > MAX_PGTABLE_INDEX_SIZE);
                 kmem_cache_free(PGT_CACHE(index_size), table);
@@ -138,6 +118,6 @@ static inline void pgtable_free_tlb(struct mmu_gather *tlb,
 static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t table,
                                   unsigned long address)
 {
-        pgtable_free_tlb(tlb, page_address(table), 0);
+        pgtable_free_tlb(tlb, table, 0);
 }
 #endif /* _ASM_POWERPC_BOOK3S_32_PGALLOC_H */
diff --git a/arch/powerpc/include/asm/book3s/32/pgtable.h b/arch/powerpc/include/asm/book3s/32/pgtable.h
index c21d33704633..49d76adb9bc5 100644
--- a/arch/powerpc/include/asm/book3s/32/pgtable.h
+++ b/arch/powerpc/include/asm/book3s/32/pgtable.h
@@ -10,9 +10,9 @@
 /* And here we include common definitions */
 
 #define _PAGE_KERNEL_RO         0
-#define _PAGE_KERNEL_ROX        0
+#define _PAGE_KERNEL_ROX        (_PAGE_EXEC)
 #define _PAGE_KERNEL_RW         (_PAGE_DIRTY | _PAGE_RW)
-#define _PAGE_KERNEL_RWX        (_PAGE_DIRTY | _PAGE_RW)
+#define _PAGE_KERNEL_RWX        (_PAGE_DIRTY | _PAGE_RW | _PAGE_EXEC)
 
 #define _PAGE_HPTEFLAGS _PAGE_HASHPTE
 
@@ -66,11 +66,11 @@ static inline bool pte_user(pte_t pte)
  */
 #define PAGE_NONE       __pgprot(_PAGE_BASE)
 #define PAGE_SHARED     __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW)
-#define PAGE_SHARED_X   __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW)
+#define PAGE_SHARED_X   __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | _PAGE_EXEC)
 #define PAGE_COPY       __pgprot(_PAGE_BASE | _PAGE_USER)
-#define PAGE_COPY_X     __pgprot(_PAGE_BASE | _PAGE_USER)
+#define PAGE_COPY_X     __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
 #define PAGE_READONLY   __pgprot(_PAGE_BASE | _PAGE_USER)
-#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER)
+#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
 
 /* Permission masks used for kernel mappings */
 #define PAGE_KERNEL     __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)
@@ -318,7 +318,7 @@ static inline void __ptep_set_access_flags(struct vm_area_struct *vma,
                                            int psize)
 {
         unsigned long set = pte_val(entry) &
-                (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW);
+                (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC);
 
         pte_update(ptep, 0, set);
 
@@ -328,24 +328,10 @@ static inline void __ptep_set_access_flags(struct vm_area_struct *vma,
 #define __HAVE_ARCH_PTE_SAME
 #define pte_same(A,B)   (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HASHPTE) == 0)
 
-/*
- * Note that on Book E processors, the pmd contains the kernel virtual
- * (lowmem) address of the pte page.  The physical address is less useful
- * because everything runs with translation enabled (even the TLB miss
- * handler).  On everything else the pmd contains the physical address
- * of the pte page.  -- paulus
- */
-#ifndef CONFIG_BOOKE
 #define pmd_page_vaddr(pmd)     \
-        ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
+        ((unsigned long)__va(pmd_val(pmd) & ~(PTE_TABLE_SIZE - 1)))
 #define pmd_page(pmd)           \
         pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)
-#else
-#define pmd_page_vaddr(pmd)     \
-        ((unsigned long) (pmd_val(pmd) & PAGE_MASK))
-#define pmd_page(pmd)           \
-        pfn_to_page((__pa(pmd_val(pmd)) >> PAGE_SHIFT))
-#endif
 
 /* to find an entry in a kernel page-table-directory */
 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
@@ -360,7 +346,8 @@ static inline void __ptep_set_access_flags(struct vm_area_struct *vma,
 #define pte_offset_kernel(dir, addr)    \
         ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(addr))
 #define pte_offset_map(dir, addr)               \
-        ((pte_t *) kmap_atomic(pmd_page(*(dir))) + pte_index(addr))
+        ((pte_t *)(kmap_atomic(pmd_page(*(dir))) + \
+                   (pmd_page_vaddr(*(dir)) & ~PAGE_MASK)) + pte_index(addr))
 #define pte_unmap(pte)          kunmap_atomic(pte)
 
 /*
@@ -384,7 +371,7 @@ static inline int pte_dirty(pte_t pte)		{ return !!(pte_val(pte) & _PAGE_DIRTY);
 static inline int pte_young(pte_t pte)          { return !!(pte_val(pte) & _PAGE_ACCESSED); }
 static inline int pte_special(pte_t pte)        { return !!(pte_val(pte) & _PAGE_SPECIAL); }
 static inline int pte_none(pte_t pte)           { return (pte_val(pte) & ~_PTE_NONE_MASK) == 0; }
-static inline bool pte_exec(pte_t pte)          { return true; }
+static inline bool pte_exec(pte_t pte)          { return pte_val(pte) & _PAGE_EXEC; }
 
 static inline int pte_present(pte_t pte)
 {
@@ -451,7 +438,7 @@ static inline pte_t pte_wrprotect(pte_t pte)
 
 static inline pte_t pte_exprotect(pte_t pte)
 {
-        return pte;
+        return __pte(pte_val(pte) & ~_PAGE_EXEC);
 }
 
 static inline pte_t pte_mkclean(pte_t pte)
@@ -466,7 +453,7 @@ static inline pte_t pte_mkold(pte_t pte)
 
 static inline pte_t pte_mkexec(pte_t pte)
 {
-        return pte;
+        return __pte(pte_val(pte) | _PAGE_EXEC);
 }
 
 static inline pte_t pte_mkpte(pte_t pte)
@@ -524,7 +511,7 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
                                 pte_t *ptep, pte_t pte, int percpu)
 {
-#if defined(CONFIG_PPC_STD_MMU_32) && defined(CONFIG_SMP) && !defined(CONFIG_PTE_64BIT)
+#if defined(CONFIG_SMP) && !defined(CONFIG_PTE_64BIT)
         /* First case is 32-bit Hash MMU in SMP mode with 32-bit PTEs. We use the
          * helper pte_update() which does an atomic update. We need to do that
          * because a concurrent invalidation can clear _PAGE_HASHPTE. If it's a
@@ -537,7 +524,7 @@ static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
         else
                 pte_update(ptep, ~_PAGE_HASHPTE, pte_val(pte));
 
-#elif defined(CONFIG_PPC32) && defined(CONFIG_PTE_64BIT)
+#elif defined(CONFIG_PTE_64BIT)
         /* Second case is 32-bit with 64-bit PTE.  In this case, we
          * can just store as long as we do the two halves in the right order
          * with a barrier in between. This is possible because we take care,
@@ -560,7 +547,7 @@ static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
         : "=m" (*ptep), "=m" (*((unsigned char *)ptep+4))
         : "r" (pte) : "memory");
 
-#elif defined(CONFIG_PPC_STD_MMU_32)
+#else
         /* Third case is 32-bit hash table in UP mode, we need to preserve
          * the _PAGE_HASHPTE bit since we may not have invalidated the previous
          * translation in the hash yet (done in a subsequent flush_tlb_xxx())
@@ -568,9 +555,6 @@ static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
          */
         *ptep = __pte((pte_val(*ptep) & _PAGE_HASHPTE)
                       | (pte_val(pte) & ~_PAGE_HASHPTE));
-
-#else
-#error "Not supported "
 #endif
 }
 
diff --git a/arch/powerpc/include/asm/book3s/64/hash-4k.h b/arch/powerpc/include/asm/book3s/64/hash-4k.h
index 15bc16b1dc9c..cf5ba5254299 100644
--- a/arch/powerpc/include/asm/book3s/64/hash-4k.h
+++ b/arch/powerpc/include/asm/book3s/64/hash-4k.h
@@ -1,11 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0 */
 #ifndef _ASM_POWERPC_BOOK3S_64_HASH_4K_H
 #define _ASM_POWERPC_BOOK3S_64_HASH_4K_H
-/*
- * Entries per page directory level.  The PTE level must use a 64b record
- * for each page table entry.  The PMD and PGD level use a 32b record for
- * each entry by assuming that each entry is page aligned.
- */
+
 #define H_PTE_INDEX_SIZE  9
 #define H_PMD_INDEX_SIZE  7
 #define H_PUD_INDEX_SIZE  9
diff --git a/arch/powerpc/include/asm/book3s/64/mmu.h b/arch/powerpc/include/asm/book3s/64/mmu.h
index 6328857f259f..1ceee000c18d 100644
--- a/arch/powerpc/include/asm/book3s/64/mmu.h
+++ b/arch/powerpc/include/asm/book3s/64/mmu.h
@@ -2,6 +2,8 @@
 #ifndef _ASM_POWERPC_BOOK3S_64_MMU_H_
 #define _ASM_POWERPC_BOOK3S_64_MMU_H_
 
+#include <asm/page.h>
+
 #ifndef __ASSEMBLY__
 /*
  * Page size definition
@@ -24,6 +26,13 @@ struct mmu_psize_def {
 };
 extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
 
+/*
+ * For BOOK3s 64 with 4k and 64K linux page size
+ * we want to use pointers, because the page table
+ * actually store pfn
+ */
+typedef pte_t *pgtable_t;
+
 #endif /* __ASSEMBLY__ */
 
 /* 64-bit classic hash table MMU */
diff --git a/arch/powerpc/include/asm/book3s/64/pgalloc.h b/arch/powerpc/include/asm/book3s/64/pgalloc.h
index 391ed2c3b697..4aba625389c4 100644
--- a/arch/powerpc/include/asm/book3s/64/pgalloc.h
+++ b/arch/powerpc/include/asm/book3s/64/pgalloc.h
@@ -37,10 +37,7 @@ extern struct vmemmap_backing *vmemmap_list;
 #define MAX_PGTABLE_INDEX_SIZE  0xf
 
 extern struct kmem_cache *pgtable_cache[];
-#define PGT_CACHE(shift) ({                             \
-                        BUG_ON(!(shift));               \
-                        pgtable_cache[(shift) - 1];     \
-                })
+#define PGT_CACHE(shift) pgtable_cache[shift]
 
 extern pte_t *pte_fragment_alloc(struct mm_struct *, unsigned long, int);
 extern pmd_t *pmd_fragment_alloc(struct mm_struct *, unsigned long);
@@ -50,6 +47,7 @@ extern void pgtable_free_tlb(struct mmu_gather *tlb, void *table, int shift);
 #ifdef CONFIG_SMP
 extern void __tlb_remove_table(void *_table);
 #endif
+void pte_frag_destroy(void *pte_frag);
 
 static inline pgd_t *radix__pgd_alloc(struct mm_struct *mm)
 {
diff --git a/arch/powerpc/include/asm/book3s/64/pgtable.h b/arch/powerpc/include/asm/book3s/64/pgtable.h
index 6c99e846a8c9..2e6ada28da64 100644
--- a/arch/powerpc/include/asm/book3s/64/pgtable.h
+++ b/arch/powerpc/include/asm/book3s/64/pgtable.h
@@ -1304,7 +1304,7 @@ static inline int pgd_devmap(pgd_t pgd)
 }
 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
 
-static inline const int pud_pfn(pud_t pud)
+static inline int pud_pfn(pud_t pud)
 {
         /*
          * Currently all calls to pud_pfn() are gated around a pud_devmap()
diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h
index 66298461b640..40ea5b3781c6 100644
--- a/arch/powerpc/include/asm/cache.h
+++ b/arch/powerpc/include/asm/cache.h
@@ -71,7 +71,7 @@ extern struct ppc64_caches ppc64_caches;
 #else
 #define __read_mostly __attribute__((__section__(".data..read_mostly")))
 
-#ifdef CONFIG_6xx
+#ifdef CONFIG_PPC_BOOK3S_32
 extern long _get_L2CR(void);
 extern long _get_L3CR(void);
 extern void _set_L2CR(unsigned long);
diff --git a/arch/powerpc/include/asm/code-patching.h b/arch/powerpc/include/asm/code-patching.h
index 3d5acd2b113a..2074b40f3fb5 100644
--- a/arch/powerpc/include/asm/code-patching.h
+++ b/arch/powerpc/include/asm/code-patching.h
@@ -33,14 +33,33 @@ unsigned int create_cond_branch(const unsigned int *addr,
 int patch_branch(unsigned int *addr, unsigned long target, int flags);
 int patch_instruction(unsigned int *addr, unsigned int instr);
 int raw_patch_instruction(unsigned int *addr, unsigned int instr);
-int patch_instruction_site(s32 *addr, unsigned int instr);
-int patch_branch_site(s32 *site, unsigned long target, int flags);
 
 static inline unsigned long patch_site_addr(s32 *site)
 {
         return (unsigned long)site + *site;
 }
 
+static inline int patch_instruction_site(s32 *site, unsigned int instr)
+{
+        return patch_instruction((unsigned int *)patch_site_addr(site), instr);
+}
+
+static inline int patch_branch_site(s32 *site, unsigned long target, int flags)
+{
+        return patch_branch((unsigned int *)patch_site_addr(site), target, flags);
+}
+
+static inline int modify_instruction(unsigned int *addr, unsigned int clr,
+                                     unsigned int set)
+{
+        return patch_instruction(addr, (*addr & ~clr) | set);
+}
+
+static inline int modify_instruction_site(s32 *site, unsigned int clr, unsigned int set)
+{
+        return modify_instruction((unsigned int *)patch_site_addr(site), clr, set);
+}
+
 int instr_is_relative_branch(unsigned int instr);
 int instr_is_relative_link_branch(unsigned int instr);
 int instr_is_branch_to_addr(const unsigned int *instr, unsigned long addr);
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
index 29f49a35d6ee..d05f0c28e515 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -44,6 +44,7 @@ extern int machine_check_e500(struct pt_regs *regs);
 extern int machine_check_e200(struct pt_regs *regs);
 extern int machine_check_47x(struct pt_regs *regs);
 int machine_check_8xx(struct pt_regs *regs);
+int machine_check_83xx(struct pt_regs *regs);
 
 extern void cpu_down_flush_e500v2(void);
 extern void cpu_down_flush_e500mc(void);
@@ -296,7 +297,7 @@ static inline void cpu_feature_keys_init(void) { }
 #define CPU_FTRS_PPC601 (CPU_FTR_COMMON | CPU_FTR_601 | \
         CPU_FTR_COHERENT_ICACHE | CPU_FTR_UNIFIED_ID_CACHE | CPU_FTR_USE_RTC)
 #define CPU_FTRS_603    (CPU_FTR_COMMON | CPU_FTR_MAYBE_CAN_DOZE | \
-            CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE)
+            CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE | CPU_FTR_NOEXECUTE)
 #define CPU_FTRS_604    (CPU_FTR_COMMON | CPU_FTR_PPC_LE)
 #define CPU_FTRS_740_NOTAU      (CPU_FTR_COMMON | \
             CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_L2CR | \
@@ -367,15 +368,15 @@ static inline void cpu_feature_keys_init(void) { }
             CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \
             CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR | \
             CPU_FTR_PPC_LE | CPU_FTR_NEED_PAIRED_STWCX)
-#define CPU_FTRS_82XX   (CPU_FTR_COMMON | CPU_FTR_MAYBE_CAN_DOZE)
+#define CPU_FTRS_82XX   (CPU_FTR_COMMON | CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_NOEXECUTE)
 #define CPU_FTRS_G2_LE  (CPU_FTR_COMMON | CPU_FTR_MAYBE_CAN_DOZE | \
             CPU_FTR_MAYBE_CAN_NAP)
 #define CPU_FTRS_E300   (CPU_FTR_MAYBE_CAN_DOZE | \
             CPU_FTR_MAYBE_CAN_NAP | \
-            CPU_FTR_COMMON)
+            CPU_FTR_COMMON  | CPU_FTR_NOEXECUTE)
 #define CPU_FTRS_E300C2 (CPU_FTR_MAYBE_CAN_DOZE | \
             CPU_FTR_MAYBE_CAN_NAP | \
-            CPU_FTR_COMMON | CPU_FTR_FPU_UNAVAILABLE)
+            CPU_FTR_COMMON | CPU_FTR_FPU_UNAVAILABLE  | CPU_FTR_NOEXECUTE)
 #define CPU_FTRS_CLASSIC32      (CPU_FTR_COMMON)
 #define CPU_FTRS_8XX    (CPU_FTR_NOEXECUTE)
 #define CPU_FTRS_40X    (CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
diff --git a/arch/powerpc/include/asm/dma-mapping.h b/arch/powerpc/include/asm/dma-mapping.h
index 8fa394520af6..dacd0f93f2b2 100644
--- a/arch/powerpc/include/asm/dma-mapping.h
+++ b/arch/powerpc/include/asm/dma-mapping.h
@@ -39,9 +39,6 @@ extern int dma_nommu_mmap_coherent(struct device *dev,
  * to ensure it is consistent.
  */
 struct device;
-extern void *__dma_alloc_coherent(struct device *dev, size_t size,
-                                  dma_addr_t *handle, gfp_t gfp);
-extern void __dma_free_coherent(size_t size, void *vaddr);
 extern void __dma_sync(void *vaddr, size_t size, int direction);
 extern void __dma_sync_page(struct page *page, unsigned long offset,
                                  size_t size, int direction);
@@ -52,8 +49,6 @@ extern unsigned long __dma_get_coherent_pfn(unsigned long cpu_addr);
  * Cache coherent cores.
  */
 
-#define __dma_alloc_coherent(dev, gfp, size, handle)    NULL
-#define __dma_free_coherent(size, addr)         ((void)0)
 #define __dma_sync(addr, size, rw)              ((void)0)
 #define __dma_sync_page(pg, off, sz, rw)        ((void)0)
 
@@ -112,7 +107,5 @@ extern int dma_set_mask(struct device *dev, u64 dma_mask);
 
 extern u64 __dma_get_required_mask(struct device *dev);
 
-#define ARCH_HAS_DMA_MMAP_COHERENT
-
 #endif /* __KERNEL__ */
 #endif  /* _ASM_DMA_MAPPING_H */
diff --git a/arch/powerpc/include/asm/fadump.h b/arch/powerpc/include/asm/fadump.h
index 1e7a33592e29..188776befaf9 100644
--- a/arch/powerpc/include/asm/fadump.h
+++ b/arch/powerpc/include/asm/fadump.h
@@ -48,6 +48,10 @@
 
 #define memblock_num_regions(memblock_type)     (memblock.memblock_type.cnt)
 
+/* Alignement per CMA requirement. */
+#define FADUMP_CMA_ALIGNMENT    (PAGE_SIZE <<                           \
+                        max_t(unsigned long, MAX_ORDER - 1, pageblock_order))
+
 /* Firmware provided dump sections */
 #define FADUMP_CPU_STATE_DATA   0x0001
 #define FADUMP_HPTE_REGION      0x0002
@@ -141,6 +145,7 @@ struct fw_dump {
         unsigned long   fadump_supported:1;
         unsigned long   dump_active:1;
         unsigned long   dump_registered:1;
+        unsigned long   nocma:1;
 };
 
 /*
@@ -200,7 +205,7 @@ struct fad_crash_memory_ranges {
         unsigned long long      size;
 };
 
-extern int is_fadump_boot_memory_area(u64 addr, ulong size);
+extern int is_fadump_memory_area(u64 addr, ulong size);
 extern int early_init_dt_scan_fw_dump(unsigned long node,
                 const char *uname, int depth, void *data);
 extern int fadump_reserve_mem(void);
diff --git a/arch/powerpc/include/asm/feature-fixups.h b/arch/powerpc/include/asm/feature-fixups.h
index 33b6f9c892c8..40a6c9261a6b 100644
--- a/arch/powerpc/include/asm/feature-fixups.h
+++ b/arch/powerpc/include/asm/feature-fixups.h
@@ -221,6 +221,17 @@ label##3:					       	\
         FTR_ENTRY_OFFSET 953b-954b;                     \
         .popsection;
 
+#define START_BTB_FLUSH_SECTION                 \
+955:                                                    \
+
+#define END_BTB_FLUSH_SECTION                   \
+956:                                                    \
+        .pushsection __btb_flush_fixup,"a";     \
+        .align 2;                                                       \
+957:                                            \
+        FTR_ENTRY_OFFSET 955b-957b;                     \
+        FTR_ENTRY_OFFSET 956b-957b;                     \
+        .popsection;
 
 #ifndef __ASSEMBLY__
 #include <linux/types.h>
@@ -230,6 +241,7 @@ extern long __start___stf_entry_barrier_fixup, __stop___stf_entry_barrier_fixup;
 extern long __start___stf_exit_barrier_fixup, __stop___stf_exit_barrier_fixup;
 extern long __start___rfi_flush_fixup, __stop___rfi_flush_fixup;
 extern long __start___barrier_nospec_fixup, __stop___barrier_nospec_fixup;
+extern long __start__btb_flush_fixup, __stop__btb_flush_fixup;
 
 void apply_feature_fixups(void);
 void setup_feature_keys(void);
diff --git a/arch/powerpc/include/asm/hugetlb.h b/arch/powerpc/include/asm/hugetlb.h
index 383da1ab9e23..8d40565ad0c3 100644
--- a/arch/powerpc/include/asm/hugetlb.h
+++ b/arch/powerpc/include/asm/hugetlb.h
@@ -5,8 +5,6 @@
 #ifdef CONFIG_HUGETLB_PAGE
 #include <asm/page.h>
 
-extern struct kmem_cache *hugepte_cache;
-
 #ifdef CONFIG_PPC_BOOK3S_64
 
 #include <asm/book3s/64/hugetlb.h>
@@ -76,7 +74,9 @@ static inline pte_t *hugepte_offset(hugepd_t hpd, unsigned long addr,
         unsigned long idx = 0;
 
         pte_t *dir = hugepd_page(hpd);
-#ifndef CONFIG_PPC_FSL_BOOK3E
+#ifdef CONFIG_PPC_8xx
+        idx = (addr & ((1UL << pdshift) - 1)) >> PAGE_SHIFT;
+#elif !defined(CONFIG_PPC_FSL_BOOK3E)
         idx = (addr & ((1UL << pdshift) - 1)) >> hugepd_shift(hpd);
 #endif
 
@@ -129,15 +129,14 @@ static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm,
 static inline void huge_ptep_clear_flush(struct vm_area_struct *vma,
                                          unsigned long addr, pte_t *ptep)
 {
-        pte_t pte;
-        pte = huge_ptep_get_and_clear(vma->vm_mm, addr, ptep);
+        huge_ptep_get_and_clear(vma->vm_mm, addr, ptep);
         flush_hugetlb_page(vma, addr);
 }
 
 #define __HAVE_ARCH_HUGE_PTEP_SET_ACCESS_FLAGS
-extern int huge_ptep_set_access_flags(struct vm_area_struct *vma,
-                                      unsigned long addr, pte_t *ptep,
-                                      pte_t pte, int dirty);
+int huge_ptep_set_access_flags(struct vm_area_struct *vma,
+                               unsigned long addr, pte_t *ptep,
+                               pte_t pte, int dirty);
 
 static inline void arch_clear_hugepage_flags(struct page *page)
 {
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index e746becd9d6f..7f19fbd3ba55 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -29,12 +29,14 @@ extern struct pci_dev *isa_bridge_pcidev;
 
 #include <linux/device.h>
 #include <linux/compiler.h>
+#include <linux/mm.h>
 #include <asm/page.h>
 #include <asm/byteorder.h>
 #include <asm/synch.h>
 #include <asm/delay.h>
 #include <asm/mmu.h>
 #include <asm/ppc_asm.h>
+#include <asm/pgtable.h>
 
 #ifdef CONFIG_PPC64
 #include <asm/paca.h>
@@ -804,6 +806,8 @@ extern void __iounmap_at(void *ea, unsigned long size);
  */
 static inline unsigned long virt_to_phys(volatile void * address)
 {
+        WARN_ON(IS_ENABLED(CONFIG_DEBUG_VIRTUAL) && !virt_addr_valid(address));
+
         return __pa((unsigned long)address);
 }
 
@@ -827,7 +831,14 @@ static inline void * phys_to_virt(unsigned long address)
 /*
  * Change "struct page" to physical address.
  */
-#define page_to_phys(page)      ((phys_addr_t)page_to_pfn(page) << PAGE_SHIFT)
+static inline phys_addr_t page_to_phys(struct page *page)
+{
+        unsigned long pfn = page_to_pfn(page);
+
+        WARN_ON(IS_ENABLED(CONFIG_DEBUG_VIRTUAL) && !pfn_valid(pfn));
+
+        return PFN_PHYS(pfn);
+}
 
 /*
  * 32 bits still uses virt_to_bus() for it's implementation of DMA
diff --git a/arch/powerpc/include/asm/iommu.h b/arch/powerpc/include/asm/iommu.h
index 35db0cbc9222..e847ff69cb2b 100644
--- a/arch/powerpc/include/asm/iommu.h
+++ b/arch/powerpc/include/asm/iommu.h
@@ -215,11 +215,12 @@ struct iommu_table_group {
 
 extern void iommu_register_group(struct iommu_table_group *table_group,
                                  int pci_domain_number, unsigned long pe_num);
-extern int iommu_add_device(struct device *dev);
+extern int iommu_add_device(struct iommu_table_group *table_group,
+                struct device *dev);
 extern void iommu_del_device(struct device *dev);
-extern int __init tce_iommu_bus_notifier_init(void);
-extern long iommu_tce_xchg(struct iommu_table *tbl, unsigned long entry,
-                unsigned long *hpa, enum dma_data_direction *direction);
+extern long iommu_tce_xchg(struct mm_struct *mm, struct iommu_table *tbl,
+                unsigned long entry, unsigned long *hpa,
+                enum dma_data_direction *direction);
 #else
 static inline void iommu_register_group(struct iommu_table_group *table_group,
                                         int pci_domain_number,
@@ -227,7 +228,8 @@ static inline void iommu_register_group(struct iommu_table_group *table_group,
 {
 }
 
-static inline int iommu_add_device(struct device *dev)
+static inline int iommu_add_device(struct iommu_table_group *table_group,
+                struct device *dev)
 {
         return 0;
 }
@@ -235,11 +237,6 @@ static inline int iommu_add_device(struct device *dev)
 static inline void iommu_del_device(struct device *dev)
 {
 }
-
-static inline int __init tce_iommu_bus_notifier_init(void)
-{
-        return 0;
-}
 #endif /* !CONFIG_IOMMU_API */
 
 int dma_iommu_mapping_error(struct device *dev, dma_addr_t dma_addr);
diff --git a/arch/powerpc/include/asm/ipic.h b/arch/powerpc/include/asm/ipic.h
index fb59829983b8..3dbd47f2bffe 100644
--- a/arch/powerpc/include/asm/ipic.h
+++ b/arch/powerpc/include/asm/ipic.h
@@ -69,7 +69,6 @@ enum ipic_mcp_irq {
         IPIC_MCP_MU   = 7,
 };
 
-extern int ipic_set_priority(unsigned int irq, unsigned int priority);
 extern void ipic_set_highest_priority(unsigned int irq);
 extern void ipic_set_default_priority(void);
 extern void ipic_enable_mcp(enum ipic_mcp_irq mcp_irq);
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index eb20eb3b8fb0..25607604a7a5 100644
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -48,7 +48,7 @@
 #define MMU_FTR_USE_HIGH_BATS           ASM_CONST(0x00010000)
 
 /* Enable >32-bit physical addresses on 32-bit processor, only used
- * by CONFIG_6xx currently as BookE supports that from day 1
+ * by CONFIG_PPC_BOOK3S_32 currently as BookE supports that from day 1
  */
 #define MMU_FTR_BIG_PHYS                ASM_CONST(0x00020000)
 
@@ -131,16 +131,37 @@ DECLARE_PER_CPU(int, next_tlbcam_idx);
 #endif
 
 enum {
-        MMU_FTRS_POSSIBLE = MMU_FTR_HPTE_TABLE | MMU_FTR_TYPE_8xx |
-                MMU_FTR_TYPE_40x | MMU_FTR_TYPE_44x | MMU_FTR_TYPE_FSL_E |
-                MMU_FTR_TYPE_47x | MMU_FTR_USE_HIGH_BATS | MMU_FTR_BIG_PHYS |
-                MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_USE_TLBILX |
-                MMU_FTR_LOCK_BCAST_INVAL | MMU_FTR_NEED_DTLB_SW_LRU |
+        MMU_FTRS_POSSIBLE =
+#ifdef CONFIG_PPC_BOOK3S
+                MMU_FTR_HPTE_TABLE |
+#endif
+#ifdef CONFIG_PPC_8xx
+                MMU_FTR_TYPE_8xx |
+#endif
+#ifdef CONFIG_40x
+                MMU_FTR_TYPE_40x |
+#endif
+#ifdef CONFIG_44x
+                MMU_FTR_TYPE_44x |
+#endif
+#if defined(CONFIG_E200) || defined(CONFIG_E500)
+                MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | MMU_FTR_USE_TLBILX |
+#endif
+#ifdef CONFIG_PPC_47x
+                MMU_FTR_TYPE_47x | MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL |
+#endif
+#ifdef CONFIG_PPC_BOOK3S_32
+                MMU_FTR_USE_HIGH_BATS | MMU_FTR_NEED_DTLB_SW_LRU |
+#endif
+#ifdef CONFIG_PPC_BOOK3E_64
                 MMU_FTR_USE_TLBRSRV | MMU_FTR_USE_PAIRED_MAS |
+#endif
+#ifdef CONFIG_PPC_BOOK3S_64
                 MMU_FTR_NO_SLBIE_B | MMU_FTR_16M_PAGE | MMU_FTR_TLBIEL |
                 MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_CI_LARGE_PAGE |
                 MMU_FTR_1T_SEGMENT | MMU_FTR_TLBIE_CROP_VA |
                 MMU_FTR_KERNEL_RO | MMU_FTR_68_BIT_VA |
+#endif
 #ifdef CONFIG_PPC_RADIX_MMU
                 MMU_FTR_TYPE_RADIX |
 #endif
@@ -338,21 +359,11 @@ static inline void mmu_early_init_devtree(void) { }
 #endif /* __ASSEMBLY__ */
 #endif
 
-#if defined(CONFIG_PPC_STD_MMU_32)
+#if defined(CONFIG_PPC_BOOK3S_32)
 /* 32-bit classic hash table MMU */
 #include <asm/book3s/32/mmu-hash.h>
-#elif defined(CONFIG_40x)
-/* 40x-style software loaded TLB */
-#  include <asm/mmu-40x.h>
-#elif defined(CONFIG_44x)
-/* 44x-style software loaded TLB */
-#  include <asm/mmu-44x.h>
-#elif defined(CONFIG_PPC_BOOK3E_MMU)
-/* Freescale Book-E software loaded TLB or Book-3e (ISA 2.06+) MMU */
-#  include <asm/mmu-book3e.h>
-#elif defined (CONFIG_PPC_8xx)
-/* Motorola/Freescale 8xx software loaded TLB */
-#  include <asm/mmu-8xx.h>
+#elif defined(CONFIG_PPC_MMU_NOHASH)
+#include <asm/nohash/mmu.h>
 #endif
 
 #endif /* __KERNEL__ */
diff --git a/arch/powerpc/include/asm/mmu_context.h b/arch/powerpc/include/asm/mmu_context.h
index 0381394a425b..6ee8195a2ffb 100644
--- a/arch/powerpc/include/asm/mmu_context.h
+++ b/arch/powerpc/include/asm/mmu_context.h
@@ -21,9 +21,12 @@ struct mm_iommu_table_group_mem_t;
 
 extern int isolate_lru_page(struct page *page); /* from internal.h */
 extern bool mm_iommu_preregistered(struct mm_struct *mm);
-extern long mm_iommu_get(struct mm_struct *mm,
+extern long mm_iommu_new(struct mm_struct *mm,
                 unsigned long ua, unsigned long entries,
                 struct mm_iommu_table_group_mem_t **pmem);
+extern long mm_iommu_newdev(struct mm_struct *mm, unsigned long ua,
+                unsigned long entries, unsigned long dev_hpa,
+                struct mm_iommu_table_group_mem_t **pmem);
 extern long mm_iommu_put(struct mm_struct *mm,
                 struct mm_iommu_table_group_mem_t *mem);
 extern void mm_iommu_init(struct mm_struct *mm);
@@ -32,15 +35,23 @@ extern struct mm_iommu_table_group_mem_t *mm_iommu_lookup(struct mm_struct *mm,
                 unsigned long ua, unsigned long size);
 extern struct mm_iommu_table_group_mem_t *mm_iommu_lookup_rm(
                 struct mm_struct *mm, unsigned long ua, unsigned long size);
-extern struct mm_iommu_table_group_mem_t *mm_iommu_find(struct mm_struct *mm,
+extern struct mm_iommu_table_group_mem_t *mm_iommu_get(struct mm_struct *mm,
                 unsigned long ua, unsigned long entries);
 extern long mm_iommu_ua_to_hpa(struct mm_iommu_table_group_mem_t *mem,
                 unsigned long ua, unsigned int pageshift, unsigned long *hpa);
 extern long mm_iommu_ua_to_hpa_rm(struct mm_iommu_table_group_mem_t *mem,
                 unsigned long ua, unsigned int pageshift, unsigned long *hpa);
 extern void mm_iommu_ua_mark_dirty_rm(struct mm_struct *mm, unsigned long ua);
+extern bool mm_iommu_is_devmem(struct mm_struct *mm, unsigned long hpa,
+                unsigned int pageshift, unsigned long *size);
 extern long mm_iommu_mapped_inc(struct mm_iommu_table_group_mem_t *mem);
 extern void mm_iommu_mapped_dec(struct mm_iommu_table_group_mem_t *mem);
+#else
+static inline bool mm_iommu_is_devmem(struct mm_struct *mm, unsigned long hpa,
+                unsigned int pageshift, unsigned long *size)
+{
+        return false;
+}
 #endif
 extern void switch_slb(struct task_struct *tsk, struct mm_struct *mm);
 extern void set_context(unsigned long id, pgd_t *pgd);
@@ -217,13 +228,7 @@ static inline void enter_lazy_tlb(struct mm_struct *mm,
 #endif
 }
 
-static inline int arch_dup_mmap(struct mm_struct *oldmm,
-                                struct mm_struct *mm)
-{
-        return 0;
-}
-
-#ifndef CONFIG_PPC_BOOK3S_64
+#ifdef CONFIG_PPC_BOOK3E_64
 static inline void arch_exit_mmap(struct mm_struct *mm)
 {
 }
@@ -247,6 +252,7 @@ static inline void arch_bprm_mm_init(struct mm_struct *mm,
 #ifdef CONFIG_PPC_MEM_KEYS
 bool arch_vma_access_permitted(struct vm_area_struct *vma, bool write,
                                bool execute, bool foreign);
+void arch_dup_pkeys(struct mm_struct *oldmm, struct mm_struct *mm);
 #else /* CONFIG_PPC_MEM_KEYS */
 static inline bool arch_vma_access_permitted(struct vm_area_struct *vma,
                 bool write, bool execute, bool foreign)
@@ -259,6 +265,7 @@ static inline bool arch_vma_access_permitted(struct vm_area_struct *vma,
 #define thread_pkey_regs_save(thread)
 #define thread_pkey_regs_restore(new_thread, old_thread)
 #define thread_pkey_regs_init(thread)
+#define arch_dup_pkeys(oldmm, mm)
 
 static inline u64 pte_to_hpte_pkey_bits(u64 pteflags)
 {
@@ -267,5 +274,12 @@ static inline u64 pte_to_hpte_pkey_bits(u64 pteflags)
 
 #endif /* CONFIG_PPC_MEM_KEYS */
 
+static inline int arch_dup_mmap(struct mm_struct *oldmm,
+                                struct mm_struct *mm)
+{
+        arch_dup_pkeys(oldmm, mm);
+        return 0;
+}
+
 #endif /* __KERNEL__ */
 #endif /* __ASM_POWERPC_MMU_CONTEXT_H */
diff --git a/arch/powerpc/include/asm/mmu-40x.h b/arch/powerpc/include/asm/nohash/32/mmu-40x.h
index 74f4edb5916e..74f4edb5916e 100644
--- a/arch/powerpc/include/asm/mmu-40x.h
+++ b/arch/powerpc/include/asm/nohash/32/mmu-40x.h
diff --git a/arch/powerpc/include/asm/mmu-44x.h b/arch/powerpc/include/asm/nohash/32/mmu-44x.h
index 295b3dbb2698..28aa3b339c5e 100644
--- a/arch/powerpc/include/asm/mmu-44x.h
+++ b/arch/powerpc/include/asm/nohash/32/mmu-44x.h
@@ -111,6 +111,9 @@ typedef struct {
         unsigned long   vdso_base;
 } mm_context_t;
 
+/* patch sites */
+extern s32 patch__tlb_44x_hwater_D, patch__tlb_44x_hwater_I;
+
 #endif /* !__ASSEMBLY__ */
 
 #ifndef CONFIG_PPC_EARLY_DEBUG_44x
diff --git a/arch/powerpc/include/asm/mmu-8xx.h b/arch/powerpc/include/asm/nohash/32/mmu-8xx.h
index fa05aa566ece..b0f764c827c0 100644
--- a/arch/powerpc/include/asm/mmu-8xx.h
+++ b/arch/powerpc/include/asm/nohash/32/mmu-8xx.h
@@ -190,6 +190,7 @@ typedef struct {
         struct slice_mask mask_8m;
 # endif
 #endif
+        void *pte_frag;
 } mm_context_t;
 
 #define PHYS_IMMR_BASE (mfspr(SPRN_IMMR) & 0xfff80000)
@@ -244,6 +245,9 @@ extern s32 patch__itlbmiss_perf, patch__dtlbmiss_perf;
 #define mmu_virtual_psize       MMU_PAGE_4K
 #elif defined(CONFIG_PPC_16K_PAGES)
 #define mmu_virtual_psize       MMU_PAGE_16K
+#define PTE_FRAG_NR             4
+#define PTE_FRAG_SIZE_SHIFT     12
+#define PTE_FRAG_SIZE           (1UL << 12)
 #else
 #error "Unsupported PAGE_SIZE"
 #endif
diff --git a/arch/powerpc/include/asm/nohash/32/mmu.h b/arch/powerpc/include/asm/nohash/32/mmu.h
new file mode 100644
index 000000000000..7d94a36d57d2
--- /dev/null
+++ b/arch/powerpc/include/asm/nohash/32/mmu.h
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _ASM_POWERPC_NOHASH_32_MMU_H_
+#define _ASM_POWERPC_NOHASH_32_MMU_H_
+
+#include <asm/page.h>
+
+#if defined(CONFIG_40x)
+/* 40x-style software loaded TLB */
+#include <asm/nohash/32/mmu-40x.h>
+#elif defined(CONFIG_44x)
+/* 44x-style software loaded TLB */
+#include <asm/nohash/32/mmu-44x.h>
+#elif defined(CONFIG_PPC_BOOK3E_MMU)
+/* Freescale Book-E software loaded TLB or Book-3e (ISA 2.06+) MMU */
+#include <asm/nohash/mmu-book3e.h>
+#elif defined (CONFIG_PPC_8xx)
+/* Motorola/Freescale 8xx software loaded TLB */
+#include <asm/nohash/32/mmu-8xx.h>
+#endif
+
+#ifndef __ASSEMBLY__
+typedef pte_t *pgtable_t;
+#endif
+
+#endif /* _ASM_POWERPC_NOHASH_32_MMU_H_ */
diff --git a/arch/powerpc/include/asm/nohash/32/pgalloc.h b/arch/powerpc/include/asm/nohash/32/pgalloc.h
index 8825953c225b..17963951bdb0 100644
--- a/arch/powerpc/include/asm/nohash/32/pgalloc.h
+++ b/arch/powerpc/include/asm/nohash/32/pgalloc.h
@@ -25,10 +25,7 @@
 extern void __bad_pte(pmd_t *pmd);
 
 extern struct kmem_cache *pgtable_cache[];
-#define PGT_CACHE(shift) ({                             \
-                        BUG_ON(!(shift));               \
-                        pgtable_cache[(shift) - 1];     \
-                })
+#define PGT_CACHE(shift) pgtable_cache[shift]
 
 static inline pgd_t *pgd_alloc(struct mm_struct *mm)
 {
@@ -61,11 +58,10 @@ static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp,
 static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmdp,
                                 pgtable_t pte_page)
 {
-        *pmdp = __pmd((page_to_pfn(pte_page) << PAGE_SHIFT) | _PMD_USER |
-                      _PMD_PRESENT);
+        *pmdp = __pmd(__pa(pte_page) | _PMD_USER | _PMD_PRESENT);
 }
 
-#define pmd_pgtable(pmd) pmd_page(pmd)
+#define pmd_pgtable(pmd) ((pgtable_t)pmd_page_vaddr(pmd))
 #else
 
 static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp,
@@ -77,31 +73,32 @@ static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp,
 static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmdp,
                                 pgtable_t pte_page)
 {
-        *pmdp = __pmd((unsigned long)lowmem_page_address(pte_page) | _PMD_PRESENT);
+        *pmdp = __pmd((unsigned long)pte_page | _PMD_PRESENT);
 }
 
-#define pmd_pgtable(pmd) pmd_page(pmd)
+#define pmd_pgtable(pmd) ((pgtable_t)pmd_page_vaddr(pmd))
 #endif
 
 extern pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr);
 extern pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long addr);
+void pte_frag_destroy(void *pte_frag);
+pte_t *pte_fragment_alloc(struct mm_struct *mm, unsigned long vmaddr, int kernel);
+void pte_fragment_free(unsigned long *table, int kernel);
 
 static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
 {
-        free_page((unsigned long)pte);
+        pte_fragment_free((unsigned long *)pte, 1);
 }
 
 static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage)
 {
-        pgtable_page_dtor(ptepage);
-        __free_page(ptepage);
+        pte_fragment_free((unsigned long *)ptepage, 0);
 }
 
 static inline void pgtable_free(void *table, unsigned index_size)
 {
         if (!index_size) {
-                pgtable_page_dtor(virt_to_page(table));
-                free_page((unsigned long)table);
+                pte_fragment_free((unsigned long *)table, 0);
         } else {
                 BUG_ON(index_size > MAX_PGTABLE_INDEX_SIZE);
                 kmem_cache_free(PGT_CACHE(index_size), table);
@@ -140,6 +137,6 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t table,
                                   unsigned long address)
 {
         tlb_flush_pgtable(tlb, address);
-        pgtable_free_tlb(tlb, page_address(table), 0);
+        pgtable_free_tlb(tlb, table, 0);
 }
 #endif /* _ASM_POWERPC_PGALLOC_32_H */
diff --git a/arch/powerpc/include/asm/nohash/32/pgtable.h b/arch/powerpc/include/asm/nohash/32/pgtable.h
index 3ffb0ff5a038..bed433358260 100644
--- a/arch/powerpc/include/asm/nohash/32/pgtable.h
+++ b/arch/powerpc/include/asm/nohash/32/pgtable.h
@@ -232,7 +232,13 @@ static inline unsigned long pte_update(pte_t *p,
         : "cc" );
 #else /* PTE_ATOMIC_UPDATES */
         unsigned long old = pte_val(*p);
-        *p = __pte((old & ~clr) | set);
+        unsigned long new = (old & ~clr) | set;
+
+#if defined(CONFIG_PPC_8xx) && defined(CONFIG_PPC_16K_PAGES)
+        p->pte = p->pte1 = p->pte2 = p->pte3 = new;
+#else
+        *p = __pte(new);
+#endif
 #endif /* !PTE_ATOMIC_UPDATES */
 
 #ifdef CONFIG_44x
@@ -333,12 +339,12 @@ static inline int pte_young(pte_t pte)
  */
 #ifndef CONFIG_BOOKE
 #define pmd_page_vaddr(pmd)     \
-        ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
+        ((unsigned long)__va(pmd_val(pmd) & ~(PTE_TABLE_SIZE - 1)))
 #define pmd_page(pmd)           \
         pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)
 #else
 #define pmd_page_vaddr(pmd)     \
-        ((unsigned long) (pmd_val(pmd) & PAGE_MASK))
+        ((unsigned long)(pmd_val(pmd) & ~(PTE_TABLE_SIZE - 1)))
 #define pmd_page(pmd)           \
         pfn_to_page((__pa(pmd_val(pmd)) >> PAGE_SHIFT))
 #endif
@@ -357,7 +363,8 @@ static inline int pte_young(pte_t pte)
         (pmd_bad(*(dir)) ? NULL : (pte_t *)pmd_page_vaddr(*(dir)) + \
                                   pte_index(addr))
 #define pte_offset_map(dir, addr)               \
-        ((pte_t *) kmap_atomic(pmd_page(*(dir))) + pte_index(addr))
+        ((pte_t *)(kmap_atomic(pmd_page(*(dir))) + \
+                   (pmd_page_vaddr(*(dir)) & ~PAGE_MASK)) + pte_index(addr))
 #define pte_unmap(pte)          kunmap_atomic(pte)
 
 /*
diff --git a/arch/powerpc/include/asm/nohash/32/pte-40x.h b/arch/powerpc/include/asm/nohash/32/pte-40x.h
index 661f4599f2fc..12c6811e344b 100644
--- a/arch/powerpc/include/asm/nohash/32/pte-40x.h
+++ b/arch/powerpc/include/asm/nohash/32/pte-40x.h
@@ -33,7 +33,7 @@
  *   is cleared in the TLB miss handler before the TLB entry is loaded.
  * - All other bits of the PTE are loaded into TLBLO without
  *   modification, leaving us only the bits 20, 21, 24, 25, 26, 30 for
- *   software PTE bits.  We actually use use bits 21, 24, 25, and
+ *   software PTE bits.  We actually use bits 21, 24, 25, and
  *   30 respectively for the software bits: ACCESSED, DIRTY, RW, and
  *   PRESENT.
  */
diff --git a/arch/powerpc/include/asm/nohash/32/pte-8xx.h b/arch/powerpc/include/asm/nohash/32/pte-8xx.h
index 6bfe041ef59d..c9e4b2d90f65 100644
--- a/arch/powerpc/include/asm/nohash/32/pte-8xx.h
+++ b/arch/powerpc/include/asm/nohash/32/pte-8xx.h
@@ -65,9 +65,6 @@
 
 #define _PTE_NONE_MASK  0
 
-/* Until my rework is finished, 8xx still needs atomic PTE updates */
-#define PTE_ATOMIC_UPDATES      1
-
 #ifdef CONFIG_PPC_16K_PAGES
 #define _PAGE_PSIZE     _PAGE_SPS
 #else
diff --git a/arch/powerpc/include/asm/nohash/64/mmu.h b/arch/powerpc/include/asm/nohash/64/mmu.h
new file mode 100644
index 000000000000..e6585480dfc4
--- /dev/null
+++ b/arch/powerpc/include/asm/nohash/64/mmu.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _ASM_POWERPC_NOHASH_64_MMU_H_
+#define _ASM_POWERPC_NOHASH_64_MMU_H_
+
+/* Freescale Book-E software loaded TLB or Book-3e (ISA 2.06+) MMU */
+#include <asm/nohash/mmu-book3e.h>
+
+#ifndef __ASSEMBLY__
+typedef struct page *pgtable_t;
+#endif
+
+#endif /* _ASM_POWERPC_NOHASH_64_MMU_H_ */
diff --git a/arch/powerpc/include/asm/nohash/64/pgalloc.h b/arch/powerpc/include/asm/nohash/64/pgalloc.h
index e2d62d033708..e95eb499a174 100644
--- a/arch/powerpc/include/asm/nohash/64/pgalloc.h
+++ b/arch/powerpc/include/asm/nohash/64/pgalloc.h
@@ -36,10 +36,7 @@ extern struct vmemmap_backing *vmemmap_list;
 #define MAX_PGTABLE_INDEX_SIZE  0xf
 
 extern struct kmem_cache *pgtable_cache[];
-#define PGT_CACHE(shift) ({                             \
-                        BUG_ON(!(shift));               \
-                        pgtable_cache[(shift) - 1];     \
-                })
+#define PGT_CACHE(shift) pgtable_cache[shift]
 
 static inline pgd_t *pgd_alloc(struct mm_struct *mm)
 {
diff --git a/arch/powerpc/include/asm/mmu-book3e.h b/arch/powerpc/include/asm/nohash/mmu-book3e.h
index e20072972e35..e20072972e35 100644
--- a/arch/powerpc/include/asm/mmu-book3e.h
+++ b/arch/powerpc/include/asm/nohash/mmu-book3e.h
diff --git a/arch/powerpc/include/asm/nohash/mmu.h b/arch/powerpc/include/asm/nohash/mmu.h
new file mode 100644
index 000000000000..a037cb1efb57
--- /dev/null
+++ b/arch/powerpc/include/asm/nohash/mmu.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _ASM_POWERPC_NOHASH_MMU_H_
+#define _ASM_POWERPC_NOHASH_MMU_H_
+
+#ifdef CONFIG_PPC64
+#include <asm/nohash/64/mmu.h>
+#else
+#include <asm/nohash/32/mmu.h>
+#endif
+
+#endif /* _ASM_POWERPC_NOHASH_MMU_H_ */
diff --git a/arch/powerpc/include/asm/nohash/pgtable.h b/arch/powerpc/include/asm/nohash/pgtable.h
index 70ff23974b59..1ca1c1864b32 100644
--- a/arch/powerpc/include/asm/nohash/pgtable.h
+++ b/arch/powerpc/include/asm/nohash/pgtable.h
@@ -209,7 +209,11 @@ static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
         /* Anything else just stores the PTE normally. That covers all 64-bit
          * cases, and 32-bit non-hash with 32-bit PTEs.
          */
+#if defined(CONFIG_PPC_8xx) && defined(CONFIG_PPC_16K_PAGES)
+        ptep->pte = ptep->pte1 = ptep->pte2 = ptep->pte3 = pte_val(pte);
+#else
         *ptep = pte;
+#endif
 
         /*
          * With hardware tablewalk, a sync is needed to ensure that
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index ff3866473afe..a55b01c90bb1 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -347,6 +347,7 @@ extern int opal_async_comp_init(void);
 extern int opal_sensor_init(void);
 extern int opal_hmi_handler_init(void);
 extern int opal_event_init(void);
+int opal_power_control_init(void);
 
 extern int opal_machine_check(struct pt_regs *regs);
 extern bool opal_mce_check_early_recovery(struct pt_regs *regs);
diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h
index f6a1265face2..5c5ea2413413 100644
--- a/arch/powerpc/include/asm/page.h
+++ b/arch/powerpc/include/asm/page.h
@@ -289,7 +289,7 @@ static inline bool pfn_valid(unsigned long pfn)
  * page tables at arbitrary addresses, this breaks and will have to change.
  */
 #ifdef CONFIG_PPC64
-#define PD_HUGE 0x8000000000000000
+#define PD_HUGE 0x8000000000000000UL
 #else
 #define PD_HUGE 0x80000000
 #endif
@@ -335,23 +335,11 @@ void arch_free_page(struct page *page, int order);
 #endif
 
 struct vm_area_struct;
-#ifdef CONFIG_PPC_BOOK3S_64
-/*
- * For BOOK3s 64 with 4k and 64K linux page size
- * we want to use pointers, because the page table
- * actually store pfn
- */
-typedef pte_t *pgtable_t;
-#else
-#if defined(CONFIG_PPC_64K_PAGES) && defined(CONFIG_PPC64)
-typedef pte_t *pgtable_t;
-#else
-typedef struct page *pgtable_t;
-#endif
-#endif
 
 #include <asm-generic/memory_model.h>
 #endif /* __ASSEMBLY__ */
 #include <asm/slice.h>
 
+#define ARCH_ZONE_DMA_BITS 31
+
 #endif /* _ASM_POWERPC_PAGE_H */
diff --git a/arch/powerpc/include/asm/page_32.h b/arch/powerpc/include/asm/page_32.h
index 5c378e9b78c8..683dfbc67ca8 100644
--- a/arch/powerpc/include/asm/page_32.h
+++ b/arch/powerpc/include/asm/page_32.h
@@ -22,7 +22,8 @@
 #define PTE_FLAGS_OFFSET        0
 #endif
 
-#ifdef CONFIG_PPC_256K_PAGES
+#if defined(CONFIG_PPC_256K_PAGES) || \
+    (defined(CONFIG_PPC_8xx) && defined(CONFIG_PPC_16K_PAGES))
 #define PTE_SHIFT       (PAGE_SHIFT - PTE_T_LOG2 - 2)   /* 1/4 of a page */
 #else
 #define PTE_SHIFT       (PAGE_SHIFT - PTE_T_LOG2)       /* full page */
diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h
index 94d449031b18..aee4fcc24990 100644
--- a/arch/powerpc/include/asm/pci-bridge.h
+++ b/arch/powerpc/include/asm/pci-bridge.h
@@ -129,6 +129,7 @@ struct pci_controller {
 #endif  /* CONFIG_PPC64 */
 
         void *private_data;
+        struct npu *npu;
 };
 
 /* These are used for config access before all the PCI probing
diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h
index 2af9ded80540..0c72f1897063 100644
--- a/arch/powerpc/include/asm/pci.h
+++ b/arch/powerpc/include/asm/pci.h
@@ -129,5 +129,9 @@ extern void pcibios_scan_phb(struct pci_controller *hose);
 
 extern struct pci_dev *pnv_pci_get_gpu_dev(struct pci_dev *npdev);
 extern struct pci_dev *pnv_pci_get_npu_dev(struct pci_dev *gpdev, int index);
+extern int pnv_npu2_init(struct pci_controller *hose);
+extern int pnv_npu2_map_lpar_dev(struct pci_dev *gpdev, unsigned int lparid,
+                unsigned long msr);
+extern int pnv_npu2_unmap_lpar_dev(struct pci_dev *gpdev);
 
 #endif /* __ASM_POWERPC_PCI_H */
diff --git a/arch/powerpc/include/asm/perf_event.h b/arch/powerpc/include/asm/perf_event.h
index 16a49819da9a..35926cd6cd0b 100644
--- a/arch/powerpc/include/asm/perf_event.h
+++ b/arch/powerpc/include/asm/perf_event.h
@@ -39,4 +39,7 @@
                 (regs)->gpr[1] = current_stack_pointer();       \
                 asm volatile("mfmsr %0" : "=r" ((regs)->msr));  \
         } while (0)
+
+/* To support perf_regs sier update */
+extern bool is_sier_available(void);
 #endif
diff --git a/arch/powerpc/include/asm/perf_event_server.h b/arch/powerpc/include/asm/perf_event_server.h
index 67a8a9585d50..e60aeb46d6a0 100644
--- a/arch/powerpc/include/asm/perf_event_server.h
+++ b/arch/powerpc/include/asm/perf_event_server.h
@@ -41,6 +41,8 @@ struct power_pmu {
         void            (*get_mem_data_src)(union perf_mem_data_src *dsrc,
                                 u32 flags, struct pt_regs *regs);
         void            (*get_mem_weight)(u64 *weight);
+        unsigned long   group_constraint_mask;
+        unsigned long   group_constraint_val;
         u64             (*bhrb_filter_map)(u64 branch_sample_type);
         void            (*config_bhrb)(u64 pmu_bhrb_filter);
         void            (*disable_pmc)(unsigned int pmc, unsigned long mmcr[]);
diff --git a/arch/powerpc/include/asm/pgtable-types.h b/arch/powerpc/include/asm/pgtable-types.h
index eccb30b38b47..3b0edf041b2e 100644
--- a/arch/powerpc/include/asm/pgtable-types.h
+++ b/arch/powerpc/include/asm/pgtable-types.h
@@ -3,7 +3,11 @@
 #define _ASM_POWERPC_PGTABLE_TYPES_H
 
 /* PTE level */
+#if defined(CONFIG_PPC_8xx) && defined(CONFIG_PPC_16K_PAGES)
+typedef struct { pte_basic_t pte, pte1, pte2, pte3; } pte_t;
+#else
 typedef struct { pte_basic_t pte; } pte_t;
+#endif
 #define __pte(x)        ((pte_t) { (x) })
 static inline pte_basic_t pte_val(pte_t x)
 {
diff --git a/arch/powerpc/include/asm/pgtable.h b/arch/powerpc/include/asm/pgtable.h
index 9679b7519a35..dad1d27e196d 100644
--- a/arch/powerpc/include/asm/pgtable.h
+++ b/arch/powerpc/include/asm/pgtable.h
@@ -66,7 +66,6 @@ extern unsigned long empty_zero_page[];
 
 extern pgd_t swapper_pg_dir[];
 
-void limit_zone_pfn(enum zone_type zone, unsigned long max_pfn);
 int dma_pfn_limit_to_zone(u64 pfn_limit);
 extern void paging_init(void);
 
@@ -101,7 +100,7 @@ extern int gup_hugepte(pte_t *ptep, unsigned long sz, unsigned long addr,
 /* can we use this in kvm */
 unsigned long vmalloc_to_phys(void *vmalloc_addr);
 
-void pgtable_cache_add(unsigned shift, void (*ctor)(void *));
+void pgtable_cache_add(unsigned int shift);
 void pgtable_cache_init(void);
 
 #if defined(CONFIG_STRICT_KERNEL_RWX) || defined(CONFIG_PPC32)
@@ -110,6 +109,35 @@ void mark_initmem_nx(void);
 static inline void mark_initmem_nx(void) { }
 #endif
 
+/*
+ * When used, PTE_FRAG_NR is defined in subarch pgtable.h
+ * so we are sure it is included when arriving here.
+ */
+#ifdef PTE_FRAG_NR
+static inline void *pte_frag_get(mm_context_t *ctx)
+{
+        return ctx->pte_frag;
+}
+
+static inline void pte_frag_set(mm_context_t *ctx, void *p)
+{
+        ctx->pte_frag = p;
+}
+#else
+#define PTE_FRAG_NR             1
+#define PTE_FRAG_SIZE_SHIFT     PAGE_SHIFT
+#define PTE_FRAG_SIZE           (1UL << PTE_FRAG_SIZE_SHIFT)
+
+static inline void *pte_frag_get(mm_context_t *ctx)
+{
+        return NULL;
+}
+
+static inline void pte_frag_set(mm_context_t *ctx, void *p)
+{
+}
+#endif
+
 #endif /* __ASSEMBLY__ */
 
 #endif /* _ASM_POWERPC_PGTABLE_H */
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index a6e9e314c707..7f693e0f7499 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -257,6 +257,7 @@
 #define PPC_INST_MTSPR_DSCR_USER_MASK   0xfc1ffffe
 #define PPC_INST_MFVSRD                 0x7c000066
 #define PPC_INST_MTVSRD                 0x7c000166
+#define PPC_INST_SC                     0x44000002
 #define PPC_INST_SLBFEE                 0x7c0007a7
 #define PPC_INST_SLBIA                  0x7c0003e4
 
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index b5d023680801..e0637730a8e7 100644
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -480,26 +480,11 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
         ori     rd,rd,((KERNELBASE>>48)&0xFFFF);\
         rotldi  rd,rd,48
 #else
-/*
- * On APUS (Amiga PowerPC cpu upgrade board), we don't know the
- * physical base address of RAM at compile time.
- */
 #define toreal(rd)      tophys(rd,rd)
 #define fromreal(rd)    tovirt(rd,rd)
 
-#define tophys(rd,rs)                           \
-0:      addis   rd,rs,-PAGE_OFFSET@h;           \
-        .section ".vtop_fixup","aw";            \
-        .align  1;                              \
-        .long   0b;                             \
-        .previous
-
-#define tovirt(rd,rs)                           \
-0:      addis   rd,rs,PAGE_OFFSET@h;            \
-        .section ".ptov_fixup","aw";            \
-        .align  1;                              \
-        .long   0b;                             \
-        .previous
+#define tophys(rd, rs)  addis   rd, rs, -PAGE_OFFSET@h
+#define tovirt(rd, rs)  addis   rd, rs, PAGE_OFFSET@h
 #endif
 
 #ifdef CONFIG_PPC_BOOK3S_64
@@ -821,4 +806,14 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
         stringify_in_c(.long (_target) - . ;)   \
         stringify_in_c(.previous)
 
+#ifdef CONFIG_PPC_FSL_BOOK3E
+#define BTB_FLUSH(reg)                  \
+        lis reg,BUCSR_INIT@h;           \
+        ori reg,reg,BUCSR_INIT@l;       \
+        mtspr SPRN_BUCSR,reg;           \
+        isync;
+#else
+#define BTB_FLUSH(reg)
+#endif /* CONFIG_PPC_FSL_BOOK3E */
+
 #endif /* _ASM_POWERPC_PPC_ASM_H */
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index de52c3166ba4..1c98ef1f2d5b 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -582,7 +582,7 @@
 #define HID0_POWER9_RADIX       __MASK(63 - 8)
 
 #define SPRN_HID1       0x3F1           /* Hardware Implementation Register 1 */
-#ifdef CONFIG_6xx
+#ifdef CONFIG_PPC_BOOK3S_32
 #define HID1_EMCP       (1<<31)         /* 7450 Machine Check Pin Enable */
 #define HID1_DFS        (1<<22)         /* 7447A Dynamic Frequency Scaling */
 #define HID1_PC0        (1<<16)         /* 7450 PLL_CFG[0] */
@@ -769,6 +769,8 @@
 #define   SRR1_PROGTRAP         0x00020000 /* Trap */
 #define   SRR1_PROGADDR         0x00010000 /* SRR0 contains subsequent addr */
 
+#define   SRR1_MCE_MCP          0x00080000 /* Machine check signal caused interrupt */
+
 #define SPRN_HSRR0      0x13A   /* Save/Restore Register 0 */
 #define SPRN_HSRR1      0x13B   /* Save/Restore Register 1 */
 #define   HSRR1_DENORM          0x00100000 /* Denorm exception */
diff --git a/arch/powerpc/include/asm/setup.h b/arch/powerpc/include/asm/setup.h
index 1fffbba8d6a5..65676e2325b8 100644
--- a/arch/powerpc/include/asm/setup.h
+++ b/arch/powerpc/include/asm/setup.h
@@ -67,6 +67,13 @@ void do_barrier_nospec_fixups_range(bool enable, void *start, void *end);
 static inline void do_barrier_nospec_fixups_range(bool enable, void *start, void *end) { };
 #endif
 
+#ifdef CONFIG_PPC_FSL_BOOK3E
+void setup_spectre_v2(void);
+#else
+static inline void setup_spectre_v2(void) {};
+#endif
+void do_btb_flush_fixups(void);
+
 #endif /* !__ASSEMBLY__ */
 
 #endif  /* _ASM_POWERPC_SETUP_H */
diff --git a/arch/powerpc/include/asm/sfp-machine.h b/arch/powerpc/include/asm/sfp-machine.h
index d89beaba26ff..8b957aabb826 100644
--- a/arch/powerpc/include/asm/sfp-machine.h
+++ b/arch/powerpc/include/asm/sfp-machine.h
@@ -213,30 +213,18 @@
  * respectively.  The result is placed in HIGH_SUM and LOW_SUM.  Overflow
  * (i.e. carry out) is not stored anywhere, and is lost.
  */
-#define add_ssaaaa(sh, sl, ah, al, bh, bl)                              \
+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
   do {                                                                  \
     if (__builtin_constant_p (bh) && (bh) == 0)                         \
-      __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2"           \
-             : "=r" ((USItype)(sh)),                                    \
-               "=&r" ((USItype)(sl))                                    \
-             : "%r" ((USItype)(ah)),                                    \
-               "%r" ((USItype)(al)),                                    \
-               "rI" ((USItype)(bl)));                                   \
-    else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0)          \
-      __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2"           \
-             : "=r" ((USItype)(sh)),                                    \
-               "=&r" ((USItype)(sl))                                    \
-             : "%r" ((USItype)(ah)),                                    \
-               "%r" ((USItype)(al)),                                    \
-               "rI" ((USItype)(bl)));                                   \
+      __asm__ ("add%I4c %1,%3,%4\n\taddze %0,%2"                \
+             : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
+    else if (__builtin_constant_p (bh) && (bh) == ~(USItype) 0)         \
+      __asm__ ("add%I4c %1,%3,%4\n\taddme %0,%2"                \
+             : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
     else                                                                \
-      __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3"          \
-             : "=r" ((USItype)(sh)),                                    \
-               "=&r" ((USItype)(sl))                                    \
-             : "%r" ((USItype)(ah)),                                    \
-               "r" ((USItype)(bh)),                                     \
-               "%r" ((USItype)(al)),                                    \
-               "rI" ((USItype)(bl)));                                   \
+      __asm__ ("add%I5c %1,%4,%5\n\tadde %0,%2,%3"              \
+             : "=r" (sh), "=&r" (sl)                                    \
+             : "%r" (ah), "r" (bh), "%r" (al), "rI" (bl));              \
   } while (0)
 
 /* sub_ddmmss is used in op-2.h and udivmodti4.c and should be equivalent to
@@ -248,44 +236,24 @@
  * and LOW_DIFFERENCE.  Overflow (i.e. carry out) is not stored anywhere,
  * and is lost.
  */
-#define sub_ddmmss(sh, sl, ah, al, bh, bl)                              \
+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
   do {                                                                  \
     if (__builtin_constant_p (ah) && (ah) == 0)                         \
-      __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2"       \
-               : "=r" ((USItype)(sh)),                                  \
-                 "=&r" ((USItype)(sl))                                  \
-               : "r" ((USItype)(bh)),                                   \
-                 "rI" ((USItype)(al)),                                  \
-                 "r" ((USItype)(bl)));                                  \
-    else if (__builtin_constant_p (ah) && (ah) ==~(USItype) 0)          \
-      __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2"       \
-               : "=r" ((USItype)(sh)),                                  \
-                 "=&r" ((USItype)(sl))                                  \
-               : "r" ((USItype)(bh)),                                   \
-                 "rI" ((USItype)(al)),                                  \
-                 "r" ((USItype)(bl)));                                  \
+      __asm__ ("subf%I3c %1,%4,%3\n\tsubfze %0,%2"      \
+               : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
+    else if (__builtin_constant_p (ah) && (ah) == ~(USItype) 0)         \
+      __asm__ ("subf%I3c %1,%4,%3\n\tsubfme %0,%2"      \
+               : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
     else if (__builtin_constant_p (bh) && (bh) == 0)                    \
-      __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2"         \
-               : "=r" ((USItype)(sh)),                                  \
-                 "=&r" ((USItype)(sl))                                  \
-               : "r" ((USItype)(ah)),                                   \
-                 "rI" ((USItype)(al)),                                  \
-                 "r" ((USItype)(bl)));                                  \
-    else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0)          \
-      __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2"         \
-               : "=r" ((USItype)(sh)),                                  \
-                 "=&r" ((USItype)(sl))                                  \
-               : "r" ((USItype)(ah)),                                   \
-                 "rI" ((USItype)(al)),                                  \
-                 "r" ((USItype)(bl)));                                  \
+      __asm__ ("subf%I3c %1,%4,%3\n\taddme %0,%2"               \
+               : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
+    else if (__builtin_constant_p (bh) && (bh) == ~(USItype) 0)         \
+      __asm__ ("subf%I3c %1,%4,%3\n\taddze %0,%2"               \
+               : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
     else                                                                \
-      __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2"      \
-               : "=r" ((USItype)(sh)),                                  \
-                 "=&r" ((USItype)(sl))                                  \
-               : "r" ((USItype)(ah)),                                   \
-                 "r" ((USItype)(bh)),                                   \
-                 "rI" ((USItype)(al)),                                  \
-                 "r" ((USItype)(bl)));                                  \
+      __asm__ ("subf%I4c %1,%5,%4\n\tsubfe %0,%3,%2"    \
+               : "=r" (sh), "=&r" (sl)                                  \
+               : "r" (ah), "r" (bh), "rI" (al), "r" (bl));              \
   } while (0)
 
 /* asm fragments for mul and div */
@@ -294,13 +262,10 @@
  * UWtype integers MULTIPLER and MULTIPLICAND, and generates a two UWtype
  * word product in HIGH_PROD and LOW_PROD.
  */
-#define umul_ppmm(ph, pl, m0, m1)                                       \
+#define umul_ppmm(ph, pl, m0, m1) \
   do {                                                                  \
     USItype __m0 = (m0), __m1 = (m1);                                   \
-    __asm__ ("mulhwu %0,%1,%2"                                          \
-             : "=r" ((USItype)(ph))                                     \
-             : "%r" (__m0),                                             \
-               "r" (__m1));                                             \
+    __asm__ ("mulhwu %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1));      \
     (pl) = __m0 * __m1;                                                 \
   } while (0)
 
@@ -312,9 +277,10 @@
  * significant bit of DENOMINATOR must be 1, then the pre-processor symbol
  * UDIV_NEEDS_NORMALIZATION is defined to 1.
  */
-#define udiv_qrnnd(q, r, n1, n0, d)                                     \
+#define udiv_qrnnd(q, r, n1, n0, d) \
   do {                                                                  \
-    UWtype __d1, __d0, __q1, __q0, __r1, __r0, __m;                     \
+    UWtype __d1, __d0, __q1, __q0;                                      \
+    UWtype __r1, __r0, __m;                                             \
     __d1 = __ll_highpart (d);                                           \
     __d0 = __ll_lowpart (d);                                            \
                                                                         \
@@ -325,7 +291,7 @@
     if (__r1 < __m)                                                     \
       {                                                                 \
         __q1--, __r1 += (d);                                            \
-        if (__r1 >= (d)) /* we didn't get carry when adding to __r1 */  \
+        if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\
           if (__r1 < __m)                                               \
             __q1--, __r1 += (d);                                        \
       }                                                                 \
diff --git a/arch/powerpc/include/asm/slice.h b/arch/powerpc/include/asm/slice.h
index a595461c9cb0..44816cbc4198 100644
--- a/arch/powerpc/include/asm/slice.h
+++ b/arch/powerpc/include/asm/slice.h
@@ -10,6 +10,10 @@
 #include <asm/nohash/32/slice.h>
 #endif
 
+#ifndef __ASSEMBLY__
+
+struct mm_struct;
+
 #ifdef CONFIG_PPC_MM_SLICES
 
 #ifdef CONFIG_HUGETLB_PAGE
@@ -18,10 +22,6 @@
 #define HAVE_ARCH_UNMAPPED_AREA
 #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
 
-#ifndef __ASSEMBLY__
-
-struct mm_struct;
-
 unsigned long slice_get_unmapped_area(unsigned long addr, unsigned long len,
                                       unsigned long flags, unsigned int psize,
                                       int topdown);
@@ -34,8 +34,12 @@ void slice_set_range_psize(struct mm_struct *mm, unsigned long start,
 void slice_init_new_context_exec(struct mm_struct *mm);
 void slice_setup_new_exec(void);
 
-#endif /* __ASSEMBLY__ */
+#else /* CONFIG_PPC_MM_SLICES */
+
+static inline void slice_init_new_context_exec(struct mm_struct *mm) {}
 
 #endif /* CONFIG_PPC_MM_SLICES */
 
+#endif /* __ASSEMBLY__ */
+
 #endif /* _ASM_POWERPC_SLICE_H */
diff --git a/arch/powerpc/include/asm/syscall.h b/arch/powerpc/include/asm/syscall.h
index ab9f3f0a8637..1a0e7a8b1c81 100644
--- a/arch/powerpc/include/asm/syscall.h
+++ b/arch/powerpc/include/asm/syscall.h
@@ -18,9 +18,8 @@
 #include <linux/thread_info.h>
 
 /* ftrace syscalls requires exporting the sys_call_table */
-#ifdef CONFIG_FTRACE_SYSCALLS
 extern const unsigned long sys_call_table[];
-#endif /* CONFIG_FTRACE_SYSCALLS */
+extern const unsigned long compat_sys_call_table[];
 
 static inline int syscall_get_nr(struct task_struct *task, struct pt_regs *regs)
 {
diff --git a/arch/powerpc/include/asm/systbl.h b/arch/powerpc/include/asm/systbl.h
deleted file mode 100644
index 01b5171ea189..000000000000
--- a/arch/powerpc/include/asm/systbl.h
+++ /dev/null
@@ -1,396 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * List of powerpc syscalls. For the meaning of the _SPU suffix see
- * arch/powerpc/platforms/cell/spu_callbacks.c
- */
-
-SYSCALL(restart_syscall)
-SYSCALL(exit)
-PPC_SYS(fork)
-SYSCALL_SPU(read)
-SYSCALL_SPU(write)
-COMPAT_SYS_SPU(open)
-SYSCALL_SPU(close)
-SYSCALL_SPU(waitpid)
-SYSCALL_SPU(creat)
-SYSCALL_SPU(link)
-SYSCALL_SPU(unlink)
-COMPAT_SYS(execve)
-SYSCALL_SPU(chdir)
-COMPAT_SYS_SPU(time)
-SYSCALL_SPU(mknod)
-SYSCALL_SPU(chmod)
-SYSCALL_SPU(lchown)
-SYSCALL(ni_syscall)
-OLDSYS(stat)
-COMPAT_SYS_SPU(lseek)
-SYSCALL_SPU(getpid)
-COMPAT_SYS(mount)
-SYSX(sys_ni_syscall,sys_oldumount,sys_oldumount)
-SYSCALL_SPU(setuid)
-SYSCALL_SPU(getuid)
-COMPAT_SYS_SPU(stime)
-COMPAT_SYS(ptrace)
-SYSCALL_SPU(alarm)
-OLDSYS(fstat)
-SYSCALL(pause)
-COMPAT_SYS(utime)
-SYSCALL(ni_syscall)
-SYSCALL(ni_syscall)
-SYSCALL_SPU(access)
-SYSCALL_SPU(nice)
-SYSCALL(ni_syscall)
-SYSCALL_SPU(sync)
-SYSCALL_SPU(kill)
-SYSCALL_SPU(rename)
-SYSCALL_SPU(mkdir)
-SYSCALL_SPU(rmdir)
-SYSCALL_SPU(dup)
-SYSCALL_SPU(pipe)
-COMPAT_SYS_SPU(times)
-SYSCALL(ni_syscall)
-SYSCALL_SPU(brk)
-SYSCALL_SPU(setgid)
-SYSCALL_SPU(getgid)
-SYSCALL(signal)
-SYSCALL_SPU(geteuid)
-SYSCALL_SPU(getegid)
-SYSCALL(acct)
-SYSCALL(umount)
-SYSCALL(ni_syscall)
-COMPAT_SYS_SPU(ioctl)
-COMPAT_SYS_SPU(fcntl)
-SYSCALL(ni_syscall)
-SYSCALL_SPU(setpgid)
-SYSCALL(ni_syscall)
-SYSX(sys_ni_syscall,sys_olduname,sys_olduname)
-SYSCALL_SPU(umask)
-SYSCALL_SPU(chroot)
-COMPAT_SYS(ustat)
-SYSCALL_SPU(dup2)
-SYSCALL_SPU(getppid)
-SYSCALL_SPU(getpgrp)
-SYSCALL_SPU(setsid)
-SYS32ONLY(sigaction)
-SYSCALL_SPU(sgetmask)
-SYSCALL_SPU(ssetmask)
-SYSCALL_SPU(setreuid)
-SYSCALL_SPU(setregid)
-#define compat_sys_sigsuspend sys_sigsuspend
-SYS32ONLY(sigsuspend)
-SYSX(sys_ni_syscall,compat_sys_sigpending,sys_sigpending)
-SYSCALL_SPU(sethostname)
-COMPAT_SYS_SPU(setrlimit)
-SYSX(sys_ni_syscall,compat_sys_old_getrlimit,sys_old_getrlimit)
-COMPAT_SYS_SPU(getrusage)
-COMPAT_SYS_SPU(gettimeofday)
-COMPAT_SYS_SPU(settimeofday)
-SYSCALL_SPU(getgroups)
-SYSCALL_SPU(setgroups)
-SYSX(sys_ni_syscall,sys_ni_syscall,ppc_select)
-SYSCALL_SPU(symlink)
-OLDSYS(lstat)
-SYSCALL_SPU(readlink)
-SYSCALL(uselib)
-SYSCALL(swapon)
-SYSCALL(reboot)
-SYSX(sys_ni_syscall,compat_sys_old_readdir,sys_old_readdir)
-SYSCALL_SPU(mmap)
-SYSCALL_SPU(munmap)
-COMPAT_SYS_SPU(truncate)
-COMPAT_SYS_SPU(ftruncate)
-SYSCALL_SPU(fchmod)
-SYSCALL_SPU(fchown)
-SYSCALL_SPU(getpriority)
-SYSCALL_SPU(setpriority)
-SYSCALL(ni_syscall)
-COMPAT_SYS(statfs)
-COMPAT_SYS(fstatfs)
-SYSCALL(ni_syscall)
-COMPAT_SYS_SPU(socketcall)
-SYSCALL_SPU(syslog)
-COMPAT_SYS_SPU(setitimer)
-COMPAT_SYS_SPU(getitimer)
-COMPAT_SYS_SPU(newstat)
-COMPAT_SYS_SPU(newlstat)
-COMPAT_SYS_SPU(newfstat)
-SYSX(sys_ni_syscall,sys_uname,sys_uname)
-SYSCALL(ni_syscall)
-SYSCALL_SPU(vhangup)
-SYSCALL(ni_syscall)
-SYSCALL(ni_syscall)
-COMPAT_SYS_SPU(wait4)
-SYSCALL(swapoff)
-COMPAT_SYS_SPU(sysinfo)
-COMPAT_SYS(ipc)
-SYSCALL_SPU(fsync)
-SYS32ONLY(sigreturn)
-PPC_SYS(clone)
-SYSCALL_SPU(setdomainname)
-SYSCALL_SPU(newuname)
-SYSCALL(ni_syscall)
-COMPAT_SYS_SPU(adjtimex)
-SYSCALL_SPU(mprotect)
-SYSX(sys_ni_syscall,compat_sys_sigprocmask,sys_sigprocmask)
-SYSCALL(ni_syscall)
-SYSCALL(init_module)
-SYSCALL(delete_module)
-SYSCALL(ni_syscall)
-SYSCALL(quotactl)
-SYSCALL_SPU(getpgid)
-SYSCALL_SPU(fchdir)
-SYSCALL_SPU(bdflush)
-SYSCALL_SPU(sysfs)
-SYSX_SPU(ppc64_personality,ppc64_personality,sys_personality)
-SYSCALL(ni_syscall)
-SYSCALL_SPU(setfsuid)
-SYSCALL_SPU(setfsgid)
-SYSCALL_SPU(llseek)
-COMPAT_SYS_SPU(getdents)
-COMPAT_SPU_NEW(select)
-SYSCALL_SPU(flock)
-SYSCALL_SPU(msync)
-COMPAT_SYS_SPU(readv)
-COMPAT_SYS_SPU(writev)
-SYSCALL_SPU(getsid)
-SYSCALL_SPU(fdatasync)
-COMPAT_SYS(sysctl)
-SYSCALL_SPU(mlock)
-SYSCALL_SPU(munlock)
-SYSCALL_SPU(mlockall)
-SYSCALL_SPU(munlockall)
-SYSCALL_SPU(sched_setparam)
-SYSCALL_SPU(sched_getparam)
-SYSCALL_SPU(sched_setscheduler)
-SYSCALL_SPU(sched_getscheduler)
-SYSCALL_SPU(sched_yield)
-SYSCALL_SPU(sched_get_priority_max)
-SYSCALL_SPU(sched_get_priority_min)
-COMPAT_SYS_SPU(sched_rr_get_interval)
-COMPAT_SYS_SPU(nanosleep)
-SYSCALL_SPU(mremap)
-SYSCALL_SPU(setresuid)
-SYSCALL_SPU(getresuid)
-SYSCALL(ni_syscall)
-SYSCALL_SPU(poll)
-SYSCALL(ni_syscall)
-SYSCALL_SPU(setresgid)
-SYSCALL_SPU(getresgid)
-SYSCALL_SPU(prctl)
-COMPAT_SYS(rt_sigreturn)
-COMPAT_SYS(rt_sigaction)
-COMPAT_SYS(rt_sigprocmask)
-COMPAT_SYS(rt_sigpending)
-COMPAT_SYS(rt_sigtimedwait)
-COMPAT_SYS(rt_sigqueueinfo)
-COMPAT_SYS(rt_sigsuspend)
-COMPAT_SYS_SPU(pread64)
-COMPAT_SYS_SPU(pwrite64)
-SYSCALL_SPU(chown)
-SYSCALL_SPU(getcwd)
-SYSCALL_SPU(capget)
-SYSCALL_SPU(capset)
-COMPAT_SYS(sigaltstack)
-SYSX_SPU(sys_sendfile64,compat_sys_sendfile,sys_sendfile)
-SYSCALL(ni_syscall)
-SYSCALL(ni_syscall)
-PPC_SYS(vfork)
-COMPAT_SYS_SPU(getrlimit)
-COMPAT_SYS_SPU(readahead)
-SYS32ONLY(mmap2)
-SYS32ONLY(truncate64)
-SYS32ONLY(ftruncate64)
-SYSX(sys_ni_syscall,sys_stat64,sys_stat64)
-SYSX(sys_ni_syscall,sys_lstat64,sys_lstat64)
-SYSX(sys_ni_syscall,sys_fstat64,sys_fstat64)
-SYSCALL(pciconfig_read)
-SYSCALL(pciconfig_write)
-SYSCALL(pciconfig_iobase)
-SYSCALL(ni_syscall)
-SYSCALL_SPU(getdents64)
-SYSCALL_SPU(pivot_root)
-SYSX(sys_ni_syscall,compat_sys_fcntl64,sys_fcntl64)
-SYSCALL_SPU(madvise)
-SYSCALL_SPU(mincore)
-SYSCALL_SPU(gettid)
-SYSCALL_SPU(tkill)
-SYSCALL_SPU(setxattr)
-SYSCALL_SPU(lsetxattr)
-SYSCALL_SPU(fsetxattr)
-SYSCALL_SPU(getxattr)
-SYSCALL_SPU(lgetxattr)
-SYSCALL_SPU(fgetxattr)
-SYSCALL_SPU(listxattr)
-SYSCALL_SPU(llistxattr)
-SYSCALL_SPU(flistxattr)
-SYSCALL_SPU(removexattr)
-SYSCALL_SPU(lremovexattr)
-SYSCALL_SPU(fremovexattr)
-COMPAT_SYS_SPU(futex)
-COMPAT_SYS_SPU(sched_setaffinity)
-COMPAT_SYS_SPU(sched_getaffinity)
-SYSCALL(ni_syscall)
-SYSCALL(ni_syscall)
-SYS32ONLY(sendfile64)
-COMPAT_SYS_SPU(io_setup)
-SYSCALL_SPU(io_destroy)
-COMPAT_SYS_SPU(io_getevents)
-COMPAT_SYS_SPU(io_submit)
-SYSCALL_SPU(io_cancel)
-SYSCALL(set_tid_address)
-SYSX_SPU(sys_fadvise64,ppc32_fadvise64,sys_fadvise64)
-SYSCALL(exit_group)
-COMPAT_SYS(lookup_dcookie)
-SYSCALL_SPU(epoll_create)
-SYSCALL_SPU(epoll_ctl)
-SYSCALL_SPU(epoll_wait)
-SYSCALL_SPU(remap_file_pages)
-COMPAT_SYS_SPU(timer_create)
-COMPAT_SYS_SPU(timer_settime)
-COMPAT_SYS_SPU(timer_gettime)
-SYSCALL_SPU(timer_getoverrun)
-SYSCALL_SPU(timer_delete)
-COMPAT_SYS_SPU(clock_settime)
-COMPAT_SYS_SPU(clock_gettime)
-COMPAT_SYS_SPU(clock_getres)
-COMPAT_SYS_SPU(clock_nanosleep)
-SYSX(ppc64_swapcontext,ppc32_swapcontext,ppc_swapcontext)
-SYSCALL_SPU(tgkill)
-COMPAT_SYS_SPU(utimes)
-COMPAT_SYS_SPU(statfs64)
-COMPAT_SYS_SPU(fstatfs64)
-SYSX(sys_ni_syscall,ppc_fadvise64_64,ppc_fadvise64_64)
-SYSCALL_SPU(rtas)
-OLDSYS(debug_setcontext)
-SYSCALL(ni_syscall)
-COMPAT_SYS(migrate_pages)
-COMPAT_SYS(mbind)
-COMPAT_SYS(get_mempolicy)
-COMPAT_SYS(set_mempolicy)
-COMPAT_SYS(mq_open)
-SYSCALL(mq_unlink)
-COMPAT_SYS(mq_timedsend)
-COMPAT_SYS(mq_timedreceive)
-COMPAT_SYS(mq_notify)
-COMPAT_SYS(mq_getsetattr)
-COMPAT_SYS(kexec_load)
-SYSCALL(add_key)
-SYSCALL(request_key)
-COMPAT_SYS(keyctl)
-COMPAT_SYS(waitid)
-SYSCALL(ioprio_set)
-SYSCALL(ioprio_get)
-SYSCALL(inotify_init)
-SYSCALL(inotify_add_watch)
-SYSCALL(inotify_rm_watch)
-SYSCALL(spu_run)
-SYSCALL(spu_create)
-COMPAT_SYS(pselect6)
-COMPAT_SYS(ppoll)
-SYSCALL_SPU(unshare)
-SYSCALL_SPU(splice)
-SYSCALL_SPU(tee)
-COMPAT_SYS_SPU(vmsplice)
-COMPAT_SYS_SPU(openat)
-SYSCALL_SPU(mkdirat)
-SYSCALL_SPU(mknodat)
-SYSCALL_SPU(fchownat)
-COMPAT_SYS_SPU(futimesat)
-SYSX_SPU(sys_newfstatat,sys_fstatat64,sys_fstatat64)
-SYSCALL_SPU(unlinkat)
-SYSCALL_SPU(renameat)
-SYSCALL_SPU(linkat)
-SYSCALL_SPU(symlinkat)
-SYSCALL_SPU(readlinkat)
-SYSCALL_SPU(fchmodat)
-SYSCALL_SPU(faccessat)
-COMPAT_SYS_SPU(get_robust_list)
-COMPAT_SYS_SPU(set_robust_list)
-COMPAT_SYS_SPU(move_pages)
-SYSCALL_SPU(getcpu)
-COMPAT_SYS(epoll_pwait)
-COMPAT_SYS_SPU(utimensat)
-COMPAT_SYS_SPU(signalfd)
-SYSCALL_SPU(timerfd_create)
-SYSCALL_SPU(eventfd)
-COMPAT_SYS_SPU(sync_file_range2)
-COMPAT_SYS(fallocate)
-SYSCALL(subpage_prot)
-COMPAT_SYS_SPU(timerfd_settime)
-COMPAT_SYS_SPU(timerfd_gettime)
-COMPAT_SYS_SPU(signalfd4)
-SYSCALL_SPU(eventfd2)
-SYSCALL_SPU(epoll_create1)
-SYSCALL_SPU(dup3)
-SYSCALL_SPU(pipe2)
-SYSCALL(inotify_init1)
-SYSCALL_SPU(perf_event_open)
-COMPAT_SYS_SPU(preadv)
-COMPAT_SYS_SPU(pwritev)
-COMPAT_SYS(rt_tgsigqueueinfo)
-SYSCALL(fanotify_init)
-COMPAT_SYS(fanotify_mark)
-SYSCALL_SPU(prlimit64)
-SYSCALL_SPU(socket)
-SYSCALL_SPU(bind)
-SYSCALL_SPU(connect)
-SYSCALL_SPU(listen)
-SYSCALL_SPU(accept)
-SYSCALL_SPU(getsockname)
-SYSCALL_SPU(getpeername)
-SYSCALL_SPU(socketpair)
-SYSCALL_SPU(send)
-SYSCALL_SPU(sendto)
-COMPAT_SYS_SPU(recv)
-COMPAT_SYS_SPU(recvfrom)
-SYSCALL_SPU(shutdown)
-COMPAT_SYS_SPU(setsockopt)
-COMPAT_SYS_SPU(getsockopt)
-COMPAT_SYS_SPU(sendmsg)
-COMPAT_SYS_SPU(recvmsg)
-COMPAT_SYS_SPU(recvmmsg)
-SYSCALL_SPU(accept4)
-SYSCALL_SPU(name_to_handle_at)
-COMPAT_SYS_SPU(open_by_handle_at)
-COMPAT_SYS_SPU(clock_adjtime)
-SYSCALL_SPU(syncfs)
-COMPAT_SYS_SPU(sendmmsg)
-SYSCALL_SPU(setns)
-COMPAT_SYS(process_vm_readv)
-COMPAT_SYS(process_vm_writev)
-SYSCALL(finit_module)
-SYSCALL(kcmp) /* sys_kcmp */
-SYSCALL_SPU(sched_setattr)
-SYSCALL_SPU(sched_getattr)
-SYSCALL_SPU(renameat2)
-SYSCALL_SPU(seccomp)
-SYSCALL_SPU(getrandom)
-SYSCALL_SPU(memfd_create)
-SYSCALL_SPU(bpf)
-COMPAT_SYS(execveat)
-PPC64ONLY(switch_endian)
-SYSCALL_SPU(userfaultfd)
-SYSCALL_SPU(membarrier)
-SYSCALL(ni_syscall)
-SYSCALL(ni_syscall)
-SYSCALL(ni_syscall)
-SYSCALL(ni_syscall)
-SYSCALL(ni_syscall)
-SYSCALL(ni_syscall)
-SYSCALL(ni_syscall)
-SYSCALL(ni_syscall)
-SYSCALL(ni_syscall)
-SYSCALL(ni_syscall)
-SYSCALL(ni_syscall)
-SYSCALL(ni_syscall)
-SYSCALL(mlock2)
-SYSCALL(copy_file_range)
-COMPAT_SYS_SPU(preadv2)
-COMPAT_SYS_SPU(pwritev2)
-SYSCALL(kexec_file_load)
-SYSCALL(statx)
-SYSCALL(pkey_alloc)
-SYSCALL(pkey_free)
-SYSCALL(pkey_mprotect)
-SYSCALL(rseq)
-COMPAT_SYS(io_pgetevents)
diff --git a/arch/powerpc/include/asm/time.h b/arch/powerpc/include/asm/time.h
index b80d492ceb29..54bf7e68a7e1 100644
--- a/arch/powerpc/include/asm/time.h
+++ b/arch/powerpc/include/asm/time.h
@@ -43,7 +43,7 @@ struct div_result {
 
 /* Accessor functions for the timebase (RTC on 601) registers. */
 /* If one day CONFIG_POWER is added just define __USE_RTC as 1 */
-#ifdef CONFIG_6xx
+#ifdef CONFIG_PPC_BOOK3S_32
 #define __USE_RTC()     (cpu_has_feature(CPU_FTR_USE_RTC))
 #else
 #define __USE_RTC()     0
diff --git a/arch/powerpc/include/asm/tlb.h b/arch/powerpc/include/asm/tlb.h
index f0e571b2dc7c..e24c67d5ba75 100644
--- a/arch/powerpc/include/asm/tlb.h
+++ b/arch/powerpc/include/asm/tlb.h
@@ -40,7 +40,7 @@ extern void flush_hash_entry(struct mm_struct *mm, pte_t *ptep,
 static inline void __tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep,
                                           unsigned long address)
 {
-#ifdef CONFIG_PPC_STD_MMU_32
+#ifdef CONFIG_PPC_BOOK3S_32
         if (pte_val(*ptep) & _PAGE_HASHPTE)
                 flush_hash_entry(tlb->mm, ptep, address);
 #endif
diff --git a/arch/powerpc/include/asm/uaccess.h b/arch/powerpc/include/asm/uaccess.h
index 15bea9a0f260..ebc0b916dcf9 100644
--- a/arch/powerpc/include/asm/uaccess.h
+++ b/arch/powerpc/include/asm/uaccess.h
@@ -63,7 +63,7 @@ static inline int __access_ok(unsigned long addr, unsigned long size,
 #endif
 
 #define access_ok(type, addr, size)             \
-        (__chk_user_ptr(addr),                  \
+        (__chk_user_ptr(addr), (void)(type),            \
          __access_ok((__force unsigned long)(addr), (size), get_fs()))
 
 /*
diff --git a/arch/powerpc/include/asm/unistd.h b/arch/powerpc/include/asm/unistd.h
index b0de85b477e1..a3c35e6d6ffb 100644
--- a/arch/powerpc/include/asm/unistd.h
+++ b/arch/powerpc/include/asm/unistd.h
@@ -11,8 +11,7 @@
 
 #include <uapi/asm/unistd.h>
 
-
-#define NR_syscalls             389
+#define NR_syscalls     __NR_syscalls
 
 #define __NR__exit __NR_exit
 
diff --git a/arch/powerpc/include/uapi/asm/Kbuild b/arch/powerpc/include/uapi/asm/Kbuild
index 3712152206f3..8ab8ba1b71bc 100644
--- a/arch/powerpc/include/uapi/asm/Kbuild
+++ b/arch/powerpc/include/uapi/asm/Kbuild
@@ -1,6 +1,8 @@
 # UAPI Header export list
 include include/uapi/asm-generic/Kbuild.asm
 
+generated-y += unistd_32.h
+generated-y += unistd_64.h
 generic-y += param.h
 generic-y += poll.h
 generic-y += resource.h
diff --git a/arch/powerpc/include/uapi/asm/perf_regs.h b/arch/powerpc/include/uapi/asm/perf_regs.h
index 9e52c86ccbd3..ff91192407d1 100644
--- a/arch/powerpc/include/uapi/asm/perf_regs.h
+++ b/arch/powerpc/include/uapi/asm/perf_regs.h
@@ -46,6 +46,7 @@ enum perf_event_powerpc_regs {
         PERF_REG_POWERPC_TRAP,
         PERF_REG_POWERPC_DAR,
         PERF_REG_POWERPC_DSISR,
+        PERF_REG_POWERPC_SIER,
         PERF_REG_POWERPC_MAX,
 };
 #endif /* _UAPI_ASM_POWERPC_PERF_REGS_H */
diff --git a/arch/powerpc/include/uapi/asm/unistd.h b/arch/powerpc/include/uapi/asm/unistd.h
index 985534d0b448..5f84e3dc98d0 100644
--- a/arch/powerpc/include/uapi/asm/unistd.h
+++ b/arch/powerpc/include/uapi/asm/unistd.h
@@ -10,395 +10,10 @@
 #ifndef _UAPI_ASM_POWERPC_UNISTD_H_
 #define _UAPI_ASM_POWERPC_UNISTD_H_
 
-
-#define __NR_restart_syscall      0
-#define __NR_exit                 1
-#define __NR_fork                 2
-#define __NR_read                 3
-#define __NR_write                4
-#define __NR_open                 5
-#define __NR_close                6
-#define __NR_waitpid              7
-#define __NR_creat                8
-#define __NR_link                 9
-#define __NR_unlink              10
-#define __NR_execve              11
-#define __NR_chdir               12
-#define __NR_time                13
-#define __NR_mknod               14
-#define __NR_chmod               15
-#define __NR_lchown              16
-#define __NR_break               17
-#define __NR_oldstat             18
-#define __NR_lseek               19
-#define __NR_getpid              20
-#define __NR_mount               21
-#define __NR_umount              22
-#define __NR_setuid              23
-#define __NR_getuid              24
-#define __NR_stime               25
-#define __NR_ptrace              26
-#define __NR_alarm               27
-#define __NR_oldfstat            28
-#define __NR_pause               29
-#define __NR_utime               30
-#define __NR_stty                31
-#define __NR_gtty                32
-#define __NR_access              33
-#define __NR_nice                34
-#define __NR_ftime               35
-#define __NR_sync                36
-#define __NR_kill                37
-#define __NR_rename              38
-#define __NR_mkdir               39
-#define __NR_rmdir               40
-#define __NR_dup                 41
-#define __NR_pipe                42
-#define __NR_times               43
-#define __NR_prof                44
-#define __NR_brk                 45
-#define __NR_setgid              46
-#define __NR_getgid              47
-#define __NR_signal              48
-#define __NR_geteuid             49
-#define __NR_getegid             50
-#define __NR_acct                51
-#define __NR_umount2             52
-#define __NR_lock                53
-#define __NR_ioctl               54
-#define __NR_fcntl               55
-#define __NR_mpx                 56
-#define __NR_setpgid             57
-#define __NR_ulimit              58
-#define __NR_oldolduname         59
-#define __NR_umask               60
-#define __NR_chroot              61
-#define __NR_ustat               62
-#define __NR_dup2                63
-#define __NR_getppid             64
-#define __NR_getpgrp             65
-#define __NR_setsid              66
-#define __NR_sigaction           67
-#define __NR_sgetmask            68
-#define __NR_ssetmask            69
-#define __NR_setreuid            70
-#define __NR_setregid            71
-#define __NR_sigsuspend          72
-#define __NR_sigpending          73
-#define __NR_sethostname         74
-#define __NR_setrlimit           75
-#define __NR_getrlimit           76
-#define __NR_getrusage           77
-#define __NR_gettimeofday        78
-#define __NR_settimeofday        79
-#define __NR_getgroups           80
-#define __NR_setgroups           81
-#define __NR_select              82
-#define __NR_symlink             83
-#define __NR_oldlstat            84
-#define __NR_readlink            85
-#define __NR_uselib              86
-#define __NR_swapon              87
-#define __NR_reboot              88
-#define __NR_readdir             89
-#define __NR_mmap                90
-#define __NR_munmap              91
-#define __NR_truncate            92
-#define __NR_ftruncate           93
-#define __NR_fchmod              94
-#define __NR_fchown              95
-#define __NR_getpriority         96
-#define __NR_setpriority         97
-#define __NR_profil              98
-#define __NR_statfs              99
-#define __NR_fstatfs            100
-#define __NR_ioperm             101
-#define __NR_socketcall         102
-#define __NR_syslog             103
-#define __NR_setitimer          104
-#define __NR_getitimer          105
-#define __NR_stat               106
-#define __NR_lstat              107
-#define __NR_fstat              108
-#define __NR_olduname           109
-#define __NR_iopl               110
-#define __NR_vhangup            111
-#define __NR_idle               112
-#define __NR_vm86               113
-#define __NR_wait4              114
-#define __NR_swapoff            115
-#define __NR_sysinfo            116
-#define __NR_ipc                117
-#define __NR_fsync              118
-#define __NR_sigreturn          119
-#define __NR_clone              120
-#define __NR_setdomainname      121
-#define __NR_uname              122
-#define __NR_modify_ldt         123
-#define __NR_adjtimex           124
-#define __NR_mprotect           125
-#define __NR_sigprocmask        126
-#define __NR_create_module      127
-#define __NR_init_module        128
-#define __NR_delete_module      129
-#define __NR_get_kernel_syms    130
-#define __NR_quotactl           131
-#define __NR_getpgid            132
-#define __NR_fchdir             133
-#define __NR_bdflush            134
-#define __NR_sysfs              135
-#define __NR_personality        136
-#define __NR_afs_syscall        137 /* Syscall for Andrew File System */
-#define __NR_setfsuid           138
-#define __NR_setfsgid           139
-#define __NR__llseek            140
-#define __NR_getdents           141
-#define __NR__newselect         142
-#define __NR_flock              143
-#define __NR_msync              144
-#define __NR_readv              145
-#define __NR_writev             146
-#define __NR_getsid             147
-#define __NR_fdatasync          148
-#define __NR__sysctl            149
-#define __NR_mlock              150
-#define __NR_munlock            151
-#define __NR_mlockall           152
-#define __NR_munlockall         153
-#define __NR_sched_setparam             154
-#define __NR_sched_getparam             155
-#define __NR_sched_setscheduler         156
-#define __NR_sched_getscheduler         157
-#define __NR_sched_yield                158
-#define __NR_sched_get_priority_max     159
-#define __NR_sched_get_priority_min     160
-#define __NR_sched_rr_get_interval      161
-#define __NR_nanosleep          162
-#define __NR_mremap             163
-#define __NR_setresuid          164
-#define __NR_getresuid          165
-#define __NR_query_module       166
-#define __NR_poll               167
-#define __NR_nfsservctl         168
-#define __NR_setresgid          169
-#define __NR_getresgid          170
-#define __NR_prctl              171
-#define __NR_rt_sigreturn       172
-#define __NR_rt_sigaction       173
-#define __NR_rt_sigprocmask     174
-#define __NR_rt_sigpending      175
-#define __NR_rt_sigtimedwait    176
-#define __NR_rt_sigqueueinfo    177
-#define __NR_rt_sigsuspend      178
-#define __NR_pread64            179
-#define __NR_pwrite64           180
-#define __NR_chown              181
-#define __NR_getcwd             182
-#define __NR_capget             183
-#define __NR_capset             184
-#define __NR_sigaltstack        185
-#define __NR_sendfile           186
-#define __NR_getpmsg            187     /* some people actually want streams */
-#define __NR_putpmsg            188     /* some people actually want streams */
-#define __NR_vfork              189
-#define __NR_ugetrlimit         190     /* SuS compliant getrlimit */
-#define __NR_readahead          191
-#ifndef __powerpc64__                   /* these are 32-bit only */
-#define __NR_mmap2              192
-#define __NR_truncate64         193
-#define __NR_ftruncate64        194
-#define __NR_stat64             195
-#define __NR_lstat64            196
-#define __NR_fstat64            197
-#endif
-#define __NR_pciconfig_read     198
-#define __NR_pciconfig_write    199
-#define __NR_pciconfig_iobase   200
-#define __NR_multiplexer        201
-#define __NR_getdents64         202
-#define __NR_pivot_root         203
-#ifndef __powerpc64__
-#define __NR_fcntl64            204
-#endif
-#define __NR_madvise            205
-#define __NR_mincore            206
-#define __NR_gettid             207
-#define __NR_tkill              208
-#define __NR_setxattr           209
-#define __NR_lsetxattr          210
-#define __NR_fsetxattr          211
-#define __NR_getxattr           212
-#define __NR_lgetxattr          213
-#define __NR_fgetxattr          214
-#define __NR_listxattr          215
-#define __NR_llistxattr         216
-#define __NR_flistxattr         217
-#define __NR_removexattr        218
-#define __NR_lremovexattr       219
-#define __NR_fremovexattr       220
-#define __NR_futex              221
-#define __NR_sched_setaffinity  222
-#define __NR_sched_getaffinity  223
-/* 224 currently unused */
-#define __NR_tuxcall            225
 #ifndef __powerpc64__
-#define __NR_sendfile64         226
-#endif
-#define __NR_io_setup           227
-#define __NR_io_destroy         228
-#define __NR_io_getevents       229
-#define __NR_io_submit          230
-#define __NR_io_cancel          231
-#define __NR_set_tid_address    232
-#define __NR_fadvise64          233
-#define __NR_exit_group         234
-#define __NR_lookup_dcookie     235
-#define __NR_epoll_create       236
-#define __NR_epoll_ctl          237
-#define __NR_epoll_wait         238
-#define __NR_remap_file_pages   239
-#define __NR_timer_create       240
-#define __NR_timer_settime      241
-#define __NR_timer_gettime      242
-#define __NR_timer_getoverrun   243
-#define __NR_timer_delete       244
-#define __NR_clock_settime      245
-#define __NR_clock_gettime      246
-#define __NR_clock_getres       247
-#define __NR_clock_nanosleep    248
-#define __NR_swapcontext        249
-#define __NR_tgkill             250
-#define __NR_utimes             251
-#define __NR_statfs64           252
-#define __NR_fstatfs64          253
-#ifndef __powerpc64__
-#define __NR_fadvise64_64       254
-#endif
-#define __NR_rtas               255
-#define __NR_sys_debug_setcontext 256
-/* Number 257 is reserved for vserver */
-#define __NR_migrate_pages      258
-#define __NR_mbind              259
-#define __NR_get_mempolicy      260
-#define __NR_set_mempolicy      261
-#define __NR_mq_open            262
-#define __NR_mq_unlink          263
-#define __NR_mq_timedsend       264
-#define __NR_mq_timedreceive    265
-#define __NR_mq_notify          266
-#define __NR_mq_getsetattr      267
-#define __NR_kexec_load         268
-#define __NR_add_key            269
-#define __NR_request_key        270
-#define __NR_keyctl             271
-#define __NR_waitid             272
-#define __NR_ioprio_set         273
-#define __NR_ioprio_get         274
-#define __NR_inotify_init       275
-#define __NR_inotify_add_watch  276
-#define __NR_inotify_rm_watch   277
-#define __NR_spu_run            278
-#define __NR_spu_create         279
-#define __NR_pselect6           280
-#define __NR_ppoll              281
-#define __NR_unshare            282
-#define __NR_splice             283
-#define __NR_tee                284
-#define __NR_vmsplice           285
-#define __NR_openat             286
-#define __NR_mkdirat            287
-#define __NR_mknodat            288
-#define __NR_fchownat           289
-#define __NR_futimesat          290
-#ifdef __powerpc64__
-#define __NR_newfstatat         291
+#include <asm/unistd_32.h>
 #else
-#define __NR_fstatat64          291
+#include <asm/unistd_64.h>
 #endif
-#define __NR_unlinkat           292
-#define __NR_renameat           293
-#define __NR_linkat             294
-#define __NR_symlinkat          295
-#define __NR_readlinkat         296
-#define __NR_fchmodat           297
-#define __NR_faccessat          298
-#define __NR_get_robust_list    299
-#define __NR_set_robust_list    300
-#define __NR_move_pages         301
-#define __NR_getcpu             302
-#define __NR_epoll_pwait        303
-#define __NR_utimensat          304
-#define __NR_signalfd           305
-#define __NR_timerfd_create     306
-#define __NR_eventfd            307
-#define __NR_sync_file_range2   308
-#define __NR_fallocate          309
-#define __NR_subpage_prot       310
-#define __NR_timerfd_settime    311
-#define __NR_timerfd_gettime    312
-#define __NR_signalfd4          313
-#define __NR_eventfd2           314
-#define __NR_epoll_create1      315
-#define __NR_dup3               316
-#define __NR_pipe2              317
-#define __NR_inotify_init1      318
-#define __NR_perf_event_open    319
-#define __NR_preadv             320
-#define __NR_pwritev            321
-#define __NR_rt_tgsigqueueinfo  322
-#define __NR_fanotify_init      323
-#define __NR_fanotify_mark      324
-#define __NR_prlimit64          325
-#define __NR_socket             326
-#define __NR_bind               327
-#define __NR_connect            328
-#define __NR_listen             329
-#define __NR_accept             330
-#define __NR_getsockname        331
-#define __NR_getpeername        332
-#define __NR_socketpair         333
-#define __NR_send               334
-#define __NR_sendto             335
-#define __NR_recv               336
-#define __NR_recvfrom           337
-#define __NR_shutdown           338
-#define __NR_setsockopt         339
-#define __NR_getsockopt         340
-#define __NR_sendmsg            341
-#define __NR_recvmsg            342
-#define __NR_recvmmsg           343
-#define __NR_accept4            344
-#define __NR_name_to_handle_at  345
-#define __NR_open_by_handle_at  346
-#define __NR_clock_adjtime      347
-#define __NR_syncfs             348
-#define __NR_sendmmsg           349
-#define __NR_setns              350
-#define __NR_process_vm_readv   351
-#define __NR_process_vm_writev  352
-#define __NR_finit_module       353
-#define __NR_kcmp               354
-#define __NR_sched_setattr      355
-#define __NR_sched_getattr      356
-#define __NR_renameat2          357
-#define __NR_seccomp            358
-#define __NR_getrandom          359
-#define __NR_memfd_create       360
-#define __NR_bpf                361
-#define __NR_execveat           362
-#define __NR_switch_endian      363
-#define __NR_userfaultfd        364
-#define __NR_membarrier         365
-#define __NR_mlock2             378
-#define __NR_copy_file_range    379
-#define __NR_preadv2            380
-#define __NR_pwritev2           381
-#define __NR_kexec_file_load    382
-#define __NR_statx              383
-#define __NR_pkey_alloc         384
-#define __NR_pkey_free          385
-#define __NR_pkey_mprotect      386
-#define __NR_rseq               387
-#define __NR_io_pgetevents      388
 
 #endif /* _UAPI_ASM_POWERPC_UNISTD_H_ */
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index 53d4b8d5b54d..cb7f0bb9ee71 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -69,7 +69,7 @@ obj-$(CONFIG_FA_DUMP)		+= fadump.o
 ifdef CONFIG_PPC32
 obj-$(CONFIG_E500)              += idle_e500.o
 endif
-obj-$(CONFIG_6xx)               += idle_6xx.o l2cr_6xx.o cpu_setup_6xx.o
+obj-$(CONFIG_PPC_BOOK3S_32)     += idle_6xx.o l2cr_6xx.o cpu_setup_6xx.o
 obj-$(CONFIG_TAU)               += tau_6xx.o
 obj-$(CONFIG_HIBERNATION)       += swsusp.o suspend.o
 ifdef CONFIG_FSL_BOOKE
@@ -160,16 +160,6 @@ extra-$(CONFIG_ALTIVEC)		+= vector.o
 extra-$(CONFIG_PPC64)           += entry_64.o
 extra-$(CONFIG_PPC_OF_BOOT_TRAMPOLINE)  += prom_init.o
 
-extra-y                         += systbl_chk.i
-$(obj)/systbl.o:                systbl_chk
-
-quiet_cmd_systbl_chk = CALL    $<
-      cmd_systbl_chk = $(CONFIG_SHELL) $< $(obj)/systbl_chk.i
-
-PHONY += systbl_chk
-systbl_chk: $(src)/systbl_chk.sh $(obj)/systbl_chk.i
-        $(call cmd,systbl_chk)
-
 ifdef CONFIG_PPC_OF_BOOT_TRAMPOLINE
 $(obj)/built-in.a:              prom_init_check
 
diff --git a/arch/powerpc/kernel/btext.c b/arch/powerpc/kernel/btext.c
index b4241ed1456e..6dfceaa820e4 100644
--- a/arch/powerpc/kernel/btext.c
+++ b/arch/powerpc/kernel/btext.c
@@ -232,20 +232,12 @@ static int btext_initialize(struct device_node *np)
 
 int __init btext_find_display(int allow_nonstdout)
 {
-        const char *name;
-        struct device_node *np = NULL; 
+        struct device_node *np = of_stdout;
         int rc = -ENODEV;
 
-        name = of_get_property(of_chosen, "linux,stdout-path", NULL);
-        if (name != NULL) {
-                np = of_find_node_by_path(name);
-                if (np != NULL) {
-                        if (strcmp(np->type, "display") != 0) {
-                                printk("boot stdout isn't a display !\n");
-                                of_node_put(np);
-                                np = NULL;
-                        }
-                }
+        if (!of_node_is_type(np, "display")) {
+                printk("boot stdout isn't a display !\n");
+                np = NULL;
         }
         if (np)
                 rc = btext_initialize(np);
diff --git a/arch/powerpc/kernel/cacheinfo.c b/arch/powerpc/kernel/cacheinfo.c
index be57bd07596d..53102764fd2f 100644
--- a/arch/powerpc/kernel/cacheinfo.c
+++ b/arch/powerpc/kernel/cacheinfo.c
@@ -428,7 +428,7 @@ static void link_cache_lists(struct cache *smaller, struct cache *bigger)
 static void do_subsidiary_caches_debugcheck(struct cache *cache)
 {
         WARN_ON_ONCE(cache->level != 1);
-        WARN_ON_ONCE(strcmp(cache->ofnode->type, "cpu"));
+        WARN_ON_ONCE(!of_node_is_type(cache->ofnode, "cpu"));
 }
 
 static void do_subsidiary_caches(struct cache *cache)
diff --git a/arch/powerpc/kernel/cpu_setup_6xx.S b/arch/powerpc/kernel/cpu_setup_6xx.S
index fa3c2c91290c..8c069e96c478 100644
--- a/arch/powerpc/kernel/cpu_setup_6xx.S
+++ b/arch/powerpc/kernel/cpu_setup_6xx.S
@@ -326,7 +326,7 @@ _GLOBAL(__save_cpu_setup)
         lis     r5,cpu_state_storage@h
         ori     r5,r5,cpu_state_storage@l
 
-        /* Save HID0 (common to all CONFIG_6xx cpus) */
+        /* Save HID0 (common to all CONFIG_PPC_BOOK3S_32 cpus) */
         mfspr   r3,SPRN_HID0
         stw     r3,CS_HID0(r5)
 
diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
index 8d142e5d84cd..5fbc890d1094 100644
--- a/arch/powerpc/kernel/cpu_setup_fsl_booke.S
+++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
@@ -17,7 +17,7 @@
 #include <asm/processor.h>
 #include <asm/cputable.h>
 #include <asm/ppc_asm.h>
-#include <asm/mmu-book3e.h>
+#include <asm/nohash/mmu-book3e.h>
 #include <asm/asm-offsets.h>
 #include <asm/mpc85xx.h>
 
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 2da01340c84c..1eab54bc6ee9 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -1141,6 +1141,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .machine_check          = machine_check_generic,
                 .platform               = "ppc603",
         },
+#ifdef CONFIG_PPC_83xx
         {       /* e300c1 (a 603e core, plus some) on 83xx */
                 .pvr_mask               = 0x7fff0000,
                 .pvr_value              = 0x00830000,
@@ -1151,7 +1152,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_603,
-                .machine_check          = machine_check_generic,
+                .machine_check          = machine_check_83xx,
                 .platform               = "ppc603",
         },
         {       /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
@@ -1165,7 +1166,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_603,
-                .machine_check          = machine_check_generic,
+                .machine_check          = machine_check_83xx,
                 .platform               = "ppc603",
         },
         {       /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
@@ -1179,7 +1180,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_603,
-                .machine_check          = machine_check_generic,
+                .machine_check          = machine_check_83xx,
                 .num_pmcs               = 4,
                 .oprofile_cpu_type      = "ppc/e300",
                 .oprofile_type          = PPC_OPROFILE_FSL_EMB,
@@ -1196,12 +1197,13 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_603,
-                .machine_check          = machine_check_generic,
+                .machine_check          = machine_check_83xx,
                 .num_pmcs               = 4,
                 .oprofile_cpu_type      = "ppc/e300",
                 .oprofile_type          = PPC_OPROFILE_FSL_EMB,
                 .platform               = "ppc603",
         },
+#endif
         {       /* default match, we assume split I/D cache & TB (non-601)... */
                 .pvr_mask               = 0x00000000,
                 .pvr_value              = 0x00000000,
diff --git a/arch/powerpc/kernel/dma-iommu.c b/arch/powerpc/kernel/dma-iommu.c
index f9fe2080ceb9..2ca6cfaebf65 100644
--- a/arch/powerpc/kernel/dma-iommu.c
+++ b/arch/powerpc/kernel/dma-iommu.c
@@ -6,7 +6,6 @@
  * busses using the iommu infrastructure
  */
 
-#include <linux/export.h>
 #include <asm/iommu.h>
 
 /*
@@ -123,4 +122,3 @@ struct dma_map_ops dma_iommu_ops = {
         .get_required_mask      = dma_iommu_get_required_mask,
         .mapping_error          = dma_iommu_mapping_error,
 };
-EXPORT_SYMBOL(dma_iommu_ops);
diff --git a/arch/powerpc/kernel/dma-swiotlb.c b/arch/powerpc/kernel/dma-swiotlb.c
index 5fc335f4d9cd..678811abccfc 100644
--- a/arch/powerpc/kernel/dma-swiotlb.c
+++ b/arch/powerpc/kernel/dma-swiotlb.c
@@ -108,12 +108,8 @@ int __init swiotlb_setup_bus_notifier(void)
 
 void __init swiotlb_detect_4g(void)
 {
-        if ((memblock_end_of_DRAM() - 1) > 0xffffffff) {
+        if ((memblock_end_of_DRAM() - 1) > 0xffffffff)
                 ppc_swiotlb_enable = 1;
-#ifdef CONFIG_ZONE_DMA32
-                limit_zone_pfn(ZONE_DMA32, (1ULL << 32) >> PAGE_SHIFT);
-#endif
-        }
 }
 
 static int __init check_swiotlb_enabled(void)
diff --git a/arch/powerpc/kernel/dma.c b/arch/powerpc/kernel/dma.c
index dbfc7056d7df..b1903ebb2e9c 100644
--- a/arch/powerpc/kernel/dma.c
+++ b/arch/powerpc/kernel/dma.c
@@ -50,7 +50,8 @@ static int dma_nommu_dma_supported(struct device *dev, u64 mask)
                 return 1;
 
 #ifdef CONFIG_FSL_SOC
-        /* Freescale gets another chance via ZONE_DMA/ZONE_DMA32, however
+        /*
+         * Freescale gets another chance via ZONE_DMA, however
          * that will have to be refined if/when they support iommus
          */
         return 1;
@@ -62,18 +63,12 @@ static int dma_nommu_dma_supported(struct device *dev, u64 mask)
 #endif
 }
 
+#ifndef CONFIG_NOT_COHERENT_CACHE
 void *__dma_nommu_alloc_coherent(struct device *dev, size_t size,
                                   dma_addr_t *dma_handle, gfp_t flag,
                                   unsigned long attrs)
 {
         void *ret;
-#ifdef CONFIG_NOT_COHERENT_CACHE
-        ret = __dma_alloc_coherent(dev, size, dma_handle, flag);
-        if (ret == NULL)
-                return NULL;
-        *dma_handle += get_dma_offset(dev);
-        return ret;
-#else
         struct page *page;
         int node = dev_to_node(dev);
 #ifdef CONFIG_FSL_SOC
@@ -94,13 +89,10 @@ void *__dma_nommu_alloc_coherent(struct device *dev, size_t size,
         }
 
         switch (zone) {
+#ifdef CONFIG_ZONE_DMA
         case ZONE_DMA:
                 flag |= GFP_DMA;
                 break;
-#ifdef CONFIG_ZONE_DMA32
-        case ZONE_DMA32:
-                flag |= GFP_DMA32;
-                break;
 #endif
         };
 #endif /* CONFIG_FSL_SOC */
@@ -113,19 +105,15 @@ void *__dma_nommu_alloc_coherent(struct device *dev, size_t size,
         *dma_handle = __pa(ret) + get_dma_offset(dev);
 
         return ret;
-#endif
 }
 
 void __dma_nommu_free_coherent(struct device *dev, size_t size,
                                 void *vaddr, dma_addr_t dma_handle,
                                 unsigned long attrs)
 {
-#ifdef CONFIG_NOT_COHERENT_CACHE
-        __dma_free_coherent(size, vaddr);
-#else
         free_pages((unsigned long)vaddr, get_order(size));
-#endif
 }
+#endif /* !CONFIG_NOT_COHERENT_CACHE */
 
 static void *dma_nommu_alloc_coherent(struct device *dev, size_t size,
                                        dma_addr_t *dma_handle, gfp_t flag,
@@ -210,10 +198,15 @@ static int dma_nommu_map_sg(struct device *dev, struct scatterlist *sgl,
         return nents;
 }
 
-static void dma_nommu_unmap_sg(struct device *dev, struct scatterlist *sg,
+static void dma_nommu_unmap_sg(struct device *dev, struct scatterlist *sgl,
                                 int nents, enum dma_data_direction direction,
                                 unsigned long attrs)
 {
+        struct scatterlist *sg;
+        int i;
+
+        for_each_sg(sgl, sg, nents, i)
+                __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction);
 }
 
 static u64 dma_nommu_get_required_mask(struct device *dev)
@@ -247,6 +240,8 @@ static inline void dma_nommu_unmap_page(struct device *dev,
                                          enum dma_data_direction direction,
                                          unsigned long attrs)
 {
+        if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
+                __dma_sync(bus_to_virt(dma_address), size, direction);
 }
 
 #ifdef CONFIG_NOT_COHERENT_CACHE
diff --git a/arch/powerpc/kernel/eeh.c b/arch/powerpc/kernel/eeh.c
index 6cae6b56ffd6..3230137469ab 100644
--- a/arch/powerpc/kernel/eeh.c
+++ b/arch/powerpc/kernel/eeh.c
@@ -1808,10 +1808,10 @@ static int eeh_freeze_dbgfs_get(void *data, u64 *val)
         return 0;
 }
 
-DEFINE_SIMPLE_ATTRIBUTE(eeh_enable_dbgfs_ops, eeh_enable_dbgfs_get,
-                        eeh_enable_dbgfs_set, "0x%llx\n");
-DEFINE_SIMPLE_ATTRIBUTE(eeh_freeze_dbgfs_ops, eeh_freeze_dbgfs_get,
-                        eeh_freeze_dbgfs_set, "0x%llx\n");
+DEFINE_DEBUGFS_ATTRIBUTE(eeh_enable_dbgfs_ops, eeh_enable_dbgfs_get,
+                         eeh_enable_dbgfs_set, "0x%llx\n");
+DEFINE_DEBUGFS_ATTRIBUTE(eeh_freeze_dbgfs_ops, eeh_freeze_dbgfs_get,
+                         eeh_freeze_dbgfs_set, "0x%llx\n");
 #endif
 
 static int __init eeh_init_proc(void)
@@ -1819,12 +1819,12 @@ static int __init eeh_init_proc(void)
         if (machine_is(pseries) || machine_is(powernv)) {
                 proc_create_single("powerpc/eeh", 0, NULL, proc_eeh_show);
 #ifdef CONFIG_DEBUG_FS
-                debugfs_create_file("eeh_enable", 0600,
-                                    powerpc_debugfs_root, NULL,
-                                    &eeh_enable_dbgfs_ops);
-                debugfs_create_file("eeh_max_freezes", 0600,
-                                    powerpc_debugfs_root, NULL,
-                                    &eeh_freeze_dbgfs_ops);
+                debugfs_create_file_unsafe("eeh_enable", 0600,
+                                           powerpc_debugfs_root, NULL,
+                                           &eeh_enable_dbgfs_ops);
+                debugfs_create_file_unsafe("eeh_max_freezes", 0600,
+                                           powerpc_debugfs_root, NULL,
+                                           &eeh_freeze_dbgfs_ops);
 #endif
         }
 
diff --git a/arch/powerpc/kernel/eeh_driver.c b/arch/powerpc/kernel/eeh_driver.c
index 9446248eb6b8..99eab7bc7edc 100644
--- a/arch/powerpc/kernel/eeh_driver.c
+++ b/arch/powerpc/kernel/eeh_driver.c
@@ -60,7 +60,7 @@ static int eeh_result_priority(enum pci_ers_result result)
         }
 };
 
-const char *pci_ers_result_name(enum pci_ers_result result)
+static const char *pci_ers_result_name(enum pci_ers_result result)
 {
         switch (result) {
         case PCI_ERS_RESULT_NONE:
diff --git a/arch/powerpc/kernel/eeh_event.c b/arch/powerpc/kernel/eeh_event.c
index 61c9356bf9c9..227e57f980df 100644
--- a/arch/powerpc/kernel/eeh_event.c
+++ b/arch/powerpc/kernel/eeh_event.c
@@ -35,7 +35,7 @@
  */
 
 static DEFINE_SPINLOCK(eeh_eventlist_lock);
-static struct semaphore eeh_eventlist_sem;
+static DECLARE_COMPLETION(eeh_eventlist_event);
 static LIST_HEAD(eeh_eventlist);
 
 /**
@@ -55,7 +55,7 @@ static int eeh_event_handler(void * dummy)
         struct eeh_pe *pe;
 
         while (!kthread_should_stop()) {
-                if (down_interruptible(&eeh_eventlist_sem))
+                if (wait_for_completion_interruptible(&eeh_eventlist_event))
                         break;
 
                 /* Fetch EEH event from the queue */
@@ -102,9 +102,6 @@ int eeh_event_init(void)
         struct task_struct *t;
         int ret = 0;
 
-        /* Initialize semaphore */
-        sema_init(&eeh_eventlist_sem, 0);
-
         t = kthread_run(eeh_event_handler, NULL, "eehd");
         if (IS_ERR(t)) {
                 ret = PTR_ERR(t);
@@ -142,7 +139,7 @@ int eeh_send_failure_event(struct eeh_pe *pe)
         spin_unlock_irqrestore(&eeh_eventlist_lock, flags);
 
         /* For EEH deamon to knick in */
-        up(&eeh_eventlist_sem);
+        complete(&eeh_eventlist_event);
 
         return 0;
 }
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 77decded1175..0768dfd8a64e 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -200,14 +200,14 @@ transfer_to_handler:
         cmplw   r1,r9                   /* if r1 <= ksp_limit */
         ble-    stack_ovf               /* then the kernel stack overflowed */
 5:
-#if defined(CONFIG_6xx) || defined(CONFIG_E500)
+#if defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_E500)
         CURRENT_THREAD_INFO(r9, r1)
         tophys(r9,r9)                   /* check local flags */
         lwz     r12,TI_LOCAL_FLAGS(r9)
         mtcrf   0x01,r12
         bt-     31-TLF_NAPPING,4f
         bt-     31-TLF_SLEEPING,7f
-#endif /* CONFIG_6xx || CONFIG_E500 */
+#endif /* CONFIG_PPC_BOOK3S_32 || CONFIG_E500 */
         .globl transfer_to_handler_cont
 transfer_to_handler_cont:
 3:
@@ -273,7 +273,7 @@ reenable_mmu:				/* re-enable mmu so we can */
         RFI                             /* jump to handler, enable MMU */
 #endif /* CONFIG_TRACE_IRQFLAGS */
 
-#if defined (CONFIG_6xx) || defined(CONFIG_E500)
+#if defined (CONFIG_PPC_BOOK3S_32) || defined(CONFIG_E500)
 4:      rlwinm  r12,r12,0,~_TLF_NAPPING
         stw     r12,TI_LOCAL_FLAGS(r9)
         b       power_save_ppc32_restore
@@ -612,7 +612,7 @@ ppc_swapcontext:
 handle_page_fault:
         stw     r4,_DAR(r1)
         addi    r3,r1,STACK_FRAME_OVERHEAD
-#ifdef CONFIG_6xx
+#ifdef CONFIG_PPC_BOOK3S_32
         andis.  r0,r5,DSISR_DABRMATCH@h
         bne-    handle_dabr_fault
 #endif
@@ -629,7 +629,7 @@ handle_page_fault:
         bl      bad_page_fault
         b       ret_from_except_full
 
-#ifdef CONFIG_6xx
+#ifdef CONFIG_PPC_BOOK3S_32
         /* We have a data breakpoint exception - handle it */
 handle_dabr_fault:
         SAVE_NVGPRS(r1)
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 7b1693adff2a..435927f549c4 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -54,6 +54,9 @@
 SYS_CALL_TABLE:
         .tc sys_call_table[TC],sys_call_table
 
+COMPAT_SYS_CALL_TABLE:
+        .tc compat_sys_call_table[TC],compat_sys_call_table
+
 /* This value is used to mark exception frames on the stack. */
 exception_marker:
         .tc     ID_EXC_MARKER[TC],STACK_FRAME_REGS_MARKER
@@ -80,6 +83,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_TM)
         std     r0,GPR0(r1)
         std     r10,GPR1(r1)
         beq     2f                      /* if from kernel mode */
+#ifdef CONFIG_PPC_FSL_BOOK3E
+START_BTB_FLUSH_SECTION
+        BTB_FLUSH(r10)
+END_BTB_FLUSH_SECTION
+#endif
         ACCOUNT_CPU_USER_ENTRY(r13, r10, r11)
 2:      std     r2,GPR2(r1)
         std     r3,GPR3(r1)
@@ -173,7 +181,7 @@ system_call:			/* label this so stack traces look sane */
         ld      r11,SYS_CALL_TABLE@toc(2)
         andis.  r10,r10,_TIF_32BIT@h
         beq     15f
-        addi    r11,r11,8       /* use 32-bit syscall entries */
+        ld      r11,COMPAT_SYS_CALL_TABLE@toc(2)
         clrldi  r3,r3,32
         clrldi  r4,r4,32
         clrldi  r5,r5,32
@@ -181,7 +189,7 @@ system_call:			/* label this so stack traces look sane */
         clrldi  r7,r7,32
         clrldi  r8,r8,32
 15:
-        slwi    r0,r0,4
+        slwi    r0,r0,3
 
         barrier_nospec_asm
         /*
@@ -286,6 +294,10 @@ BEGIN_FTR_SECTION
         HMT_MEDIUM_LOW
 END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
 
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
+        std     r8, PACATMSCRATCH(r13)
+#endif
+
         ld      r13,GPR13(r1)   /* only restore r13 if returning to usermode */
         ld      r2,GPR2(r1)
         ld      r1,GPR1(r1)
diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S
index 6d6e144a28ce..afb638778f44 100644
--- a/arch/powerpc/kernel/exceptions-64e.S
+++ b/arch/powerpc/kernel/exceptions-64e.S
@@ -296,7 +296,8 @@ ret_from_mc_except:
         andi.   r10,r11,MSR_PR;         /* save stack pointer */            \
         beq     1f;                     /* branch around if supervisor */   \
         ld      r1,PACAKSAVE(r13);      /* get kernel stack coming from usr */\
-1:      cmpdi   cr1,r1,0;               /* check if SP makes sense */       \
+1:      type##_BTB_FLUSH                \
+        cmpdi   cr1,r1,0;               /* check if SP makes sense */       \
         bge-    cr1,exc_##n##_bad_stack;/* bad stack (TODO: out of line) */ \
         mfspr   r10,SPRN_##type##_SRR0; /* read SRR0 before touching stack */
 
@@ -328,6 +329,29 @@ ret_from_mc_except:
 #define SPRN_MC_SRR0    SPRN_MCSRR0
 #define SPRN_MC_SRR1    SPRN_MCSRR1
 
+#ifdef CONFIG_PPC_FSL_BOOK3E
+#define GEN_BTB_FLUSH                   \
+        START_BTB_FLUSH_SECTION         \
+                beq 1f;                 \
+                BTB_FLUSH(r10)                  \
+                1:              \
+        END_BTB_FLUSH_SECTION
+
+#define CRIT_BTB_FLUSH                  \
+        START_BTB_FLUSH_SECTION         \
+                BTB_FLUSH(r10)          \
+        END_BTB_FLUSH_SECTION
+
+#define DBG_BTB_FLUSH CRIT_BTB_FLUSH
+#define MC_BTB_FLUSH CRIT_BTB_FLUSH
+#define GDBELL_BTB_FLUSH GEN_BTB_FLUSH
+#else
+#define GEN_BTB_FLUSH
+#define CRIT_BTB_FLUSH
+#define DBG_BTB_FLUSH
+#define GDBELL_BTB_FLUSH
+#endif
+
 #define NORMAL_EXCEPTION_PROLOG(n, intnum, addition)                        \
         EXCEPTION_PROLOG(n, intnum, GEN, addition##_GEN(n))
 
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index db2691ff4c0b..9e253ce27e08 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -1040,7 +1040,7 @@ TRAMP_REAL_BEGIN(hmi_exception_early)
         EXCEPTION_PROLOG_COMMON_2(PACA_EXGEN)
         EXCEPTION_PROLOG_COMMON_3(0xe60)
         addi    r3,r1,STACK_FRAME_OVERHEAD
-        BRANCH_LINK_TO_FAR(hmi_exception_realmode) /* Function call ABI */
+        BRANCH_LINK_TO_FAR(DOTSYM(hmi_exception_realmode)) /* Function call ABI */
         cmpdi   cr0,r3,0
 
         /* Windup the stack. */
diff --git a/arch/powerpc/kernel/fadump.c b/arch/powerpc/kernel/fadump.c
index 761b28b1427d..45a8d0be1c96 100644
--- a/arch/powerpc/kernel/fadump.c
+++ b/arch/powerpc/kernel/fadump.c
@@ -35,6 +35,7 @@
 #include <linux/kobject.h>
 #include <linux/sysfs.h>
 #include <linux/slab.h>
+#include <linux/cma.h>
 
 #include <asm/debugfs.h>
 #include <asm/page.h>
@@ -46,6 +47,9 @@
 static struct fw_dump fw_dump;
 static struct fadump_mem_struct fdm;
 static const struct fadump_mem_struct *fdm_active;
+#ifdef CONFIG_CMA
+static struct cma *fadump_cma;
+#endif
 
 static DEFINE_MUTEX(fadump_mutex);
 struct fad_crash_memory_ranges *crash_memory_ranges;
@@ -53,6 +57,67 @@ int crash_memory_ranges_size;
 int crash_mem_ranges;
 int max_crash_mem_ranges;
 
+#ifdef CONFIG_CMA
+/*
+ * fadump_cma_init() - Initialize CMA area from a fadump reserved memory
+ *
+ * This function initializes CMA area from fadump reserved memory.
+ * The total size of fadump reserved memory covers for boot memory size
+ * + cpu data size + hpte size and metadata.
+ * Initialize only the area equivalent to boot memory size for CMA use.
+ * The reamining portion of fadump reserved memory will be not given
+ * to CMA and pages for thoes will stay reserved. boot memory size is
+ * aligned per CMA requirement to satisy cma_init_reserved_mem() call.
+ * But for some reason even if it fails we still have the memory reservation
+ * with us and we can still continue doing fadump.
+ */
+int __init fadump_cma_init(void)
+{
+        unsigned long long base, size;
+        int rc;
+
+        if (!fw_dump.fadump_enabled)
+                return 0;
+
+        /*
+         * Do not use CMA if user has provided fadump=nocma kernel parameter.
+         * Return 1 to continue with fadump old behaviour.
+         */
+        if (fw_dump.nocma)
+                return 1;
+
+        base = fw_dump.reserve_dump_area_start;
+        size = fw_dump.boot_memory_size;
+
+        if (!size)
+                return 0;
+
+        rc = cma_init_reserved_mem(base, size, 0, "fadump_cma", &fadump_cma);
+        if (rc) {
+                pr_err("Failed to init cma area for firmware-assisted dump,%d\n", rc);
+                /*
+                 * Though the CMA init has failed we still have memory
+                 * reservation with us. The reserved memory will be
+                 * blocked from production system usage.  Hence return 1,
+                 * so that we can continue with fadump.
+                 */
+                return 1;
+        }
+
+        /*
+         * So we now have successfully initialized cma area for fadump.
+         */
+        pr_info("Initialized 0x%lx bytes cma area at %ldMB from 0x%lx "
+                "bytes of memory reserved for firmware-assisted dump\n",
+                cma_get_size(fadump_cma),
+                (unsigned long)cma_get_base(fadump_cma) >> 20,
+                fw_dump.reserve_dump_area_size);
+        return 1;
+}
+#else
+static int __init fadump_cma_init(void) { return 1; }
+#endif /* CONFIG_CMA */
+
 /* Scan the Firmware Assisted dump configuration details. */
 int __init early_init_dt_scan_fw_dump(unsigned long node,
                         const char *uname, int depth, void *data)
@@ -118,13 +183,19 @@ int __init early_init_dt_scan_fw_dump(unsigned long node,
 
 /*
  * If fadump is registered, check if the memory provided
- * falls within boot memory area.
+ * falls within boot memory area and reserved memory area.
  */
-int is_fadump_boot_memory_area(u64 addr, ulong size)
+int is_fadump_memory_area(u64 addr, ulong size)
 {
+        u64 d_start = fw_dump.reserve_dump_area_start;
+        u64 d_end = d_start + fw_dump.reserve_dump_area_size;
+
         if (!fw_dump.dump_registered)
                 return 0;
 
+        if (((addr + size) > d_start) && (addr <= d_end))
+                return 1;
+
         return (addr + size) > RMA_START && addr <= fw_dump.boot_memory_size;
 }
 
@@ -172,6 +243,35 @@ static int is_boot_memory_area_contiguous(void)
         return ret;
 }
 
+/*
+ * Returns true, if there are no holes in reserved memory area,
+ * false otherwise.
+ */
+static bool is_reserved_memory_area_contiguous(void)
+{
+        struct memblock_region *reg;
+        unsigned long start, end;
+        unsigned long d_start = fw_dump.reserve_dump_area_start;
+        unsigned long d_end = d_start + fw_dump.reserve_dump_area_size;
+
+        for_each_memblock(memory, reg) {
+                start = max(d_start, (unsigned long)reg->base);
+                end = min(d_end, (unsigned long)(reg->base + reg->size));
+                if (d_start < end) {
+                        /* Memory hole from d_start to start */
+                        if (start > d_start)
+                                break;
+
+                        if (end == d_end)
+                                return true;
+
+                        d_start = end + 1;
+                }
+        }
+
+        return false;
+}
+
 /* Print firmware assisted dump configurations for debugging purpose. */
 static void fadump_show_config(void)
 {
@@ -378,8 +478,15 @@ int __init fadump_reserve_mem(void)
          */
         if (fdm_active)
                 fw_dump.boot_memory_size = be64_to_cpu(fdm_active->rmr_region.source_len);
-        else
+        else {
                 fw_dump.boot_memory_size = fadump_calculate_reserve_size();
+#ifdef CONFIG_CMA
+                if (!fw_dump.nocma)
+                        fw_dump.boot_memory_size =
+                                ALIGN(fw_dump.boot_memory_size,
+                                                        FADUMP_CMA_ALIGNMENT);
+#endif
+        }
 
         /*
          * Calculate the memory boundary.
@@ -426,8 +533,9 @@ int __init fadump_reserve_mem(void)
                 fw_dump.fadumphdr_addr =
                                 be64_to_cpu(fdm_active->rmr_region.destination_address) +
                                 be64_to_cpu(fdm_active->rmr_region.source_len);
-                pr_debug("fadumphdr_addr = %p\n",
-                                (void *) fw_dump.fadumphdr_addr);
+                pr_debug("fadumphdr_addr = %pa\n", &fw_dump.fadumphdr_addr);
+                fw_dump.reserve_dump_area_start = base;
+                fw_dump.reserve_dump_area_size = size;
         } else {
                 size = get_fadump_area_size();
 
@@ -455,10 +563,11 @@ int __init fadump_reserve_mem(void)
                         (unsigned long)(size >> 20),
                         (unsigned long)(base >> 20),
                         (unsigned long)(memblock_phys_mem_size() >> 20));
-        }
 
-        fw_dump.reserve_dump_area_start = base;
-        fw_dump.reserve_dump_area_size = size;
+                fw_dump.reserve_dump_area_start = base;
+                fw_dump.reserve_dump_area_size = size;
+                return fadump_cma_init();
+        }
         return 1;
 }
 
@@ -477,6 +586,10 @@ static int __init early_fadump_param(char *p)
                 fw_dump.fadump_enabled = 1;
         else if (strncmp(p, "off", 3) == 0)
                 fw_dump.fadump_enabled = 0;
+        else if (strncmp(p, "nocma", 5) == 0) {
+                fw_dump.fadump_enabled = 1;
+                fw_dump.nocma = 1;
+        }
 
         return 0;
 }
@@ -525,8 +638,10 @@ static int register_fw_dump(struct fadump_mem_struct *fdm)
                 break;
         case -3:
                 if (!is_boot_memory_area_contiguous())
-                        pr_err("Can't have holes in boot memory area while "
-                               "registering fadump\n");
+                        pr_err("Can't have holes in boot memory area while registering fadump\n");
+                else if (!is_reserved_memory_area_contiguous())
+                        pr_err("Can't have holes in reserved memory area while"
+                               " registering fadump\n");
 
                 printk(KERN_ERR "Failed to register firmware-assisted kernel"
                         " dump. Parameter Error(%d).\n", rc);
@@ -1229,7 +1344,7 @@ static int fadump_unregister_dump(struct fadump_mem_struct *fdm)
         return 0;
 }
 
-static int fadump_invalidate_dump(struct fadump_mem_struct *fdm)
+static int fadump_invalidate_dump(const struct fadump_mem_struct *fdm)
 {
         int rc = 0;
         unsigned int wait_time;
@@ -1260,9 +1375,8 @@ void fadump_cleanup(void)
 {
         /* Invalidate the registration only if dump is active. */
         if (fw_dump.dump_active) {
-                init_fadump_mem_struct(&fdm,
-                        be64_to_cpu(fdm_active->cpu_state_data.destination_address));
-                fadump_invalidate_dump(&fdm);
+                /* pass the same memory dump structure provided by platform */
+                fadump_invalidate_dump(fdm_active);
         } else if (fw_dump.dump_registered) {
                 /* Un-register Firmware-assisted dump if it was registered. */
                 fadump_unregister_dump(&fdm);
@@ -1531,17 +1645,7 @@ static struct kobj_attribute fadump_register_attr = __ATTR(fadump_registered,
                                                 0644, fadump_register_show,
                                                 fadump_register_store);
 
-static int fadump_region_open(struct inode *inode, struct file *file)
-{
-        return single_open(file, fadump_region_show, inode->i_private);
-}
-
-static const struct file_operations fadump_region_fops = {
-        .open    = fadump_region_open,
-        .read    = seq_read,
-        .llseek  = seq_lseek,
-        .release = single_release,
-};
+DEFINE_SHOW_ATTRIBUTE(fadump_region);
 
 static void fadump_init_files(void)
 {
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index 61ca27929355..05b08db3901d 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -176,10 +176,10 @@ __after_mmu_off:
         bl      reloc_offset
         li      r24,0                   /* cpu# */
         bl      call_setup_cpu          /* Call setup_cpu for this CPU */
-#ifdef CONFIG_6xx
+#ifdef CONFIG_PPC_BOOK3S_32
         bl      reloc_offset
         bl      init_idle_6xx
-#endif /* CONFIG_6xx */
+#endif /* CONFIG_PPC_BOOK3S_32 */
 
 
 /*
@@ -393,7 +393,9 @@ DataAccess:
         bne     1f                      /* if not, try to put a PTE */
         mfspr   r4,SPRN_DAR             /* into the hash table */
         rlwinm  r3,r10,32-15,21,21      /* DSISR_STORE -> _PAGE_RW */
+BEGIN_MMU_FTR_SECTION
         bl      hash_page
+END_MMU_FTR_SECTION_IFSET(MMU_FTR_HPTE_TABLE)
 1:      lwz     r5,_DSISR(r11)          /* get DSISR value */
         mfspr   r4,SPRN_DAR
         EXC_XFER_LITE(0x300, handle_page_fault)
@@ -408,7 +410,9 @@ InstructionAccess:
         beq     1f                      /* if so, try to put a PTE */
         li      r3,0                    /* into the hash table */
         mr      r4,r12                  /* SRR0 is fault address */
+BEGIN_MMU_FTR_SECTION
         bl      hash_page
+END_MMU_FTR_SECTION_IFSET(MMU_FTR_HPTE_TABLE)
 1:      mr      r4,r12
         andis.  r5,r9,DSISR_SRR1_MATCH_32S@h /* Filter relevant SRR1 bits */
         EXC_XFER_LITE(0x400, handle_page_fault)
@@ -499,7 +503,7 @@ InstructionTLBMiss:
         lis     r1,PAGE_OFFSET@h                /* check if kernel address */
         cmplw   0,r1,r3
         mfspr   r2,SPRN_SPRG_THREAD
-        li      r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */
+        li      r1,_PAGE_USER|_PAGE_PRESENT|_PAGE_EXEC /* low addresses tested as user */
         lwz     r2,PGDIR(r2)
         bge-    112f
         mfspr   r2,SPRN_SRR1            /* and MSR_PR bit from SRR1 */
@@ -836,10 +840,10 @@ __secondary_start:
         lis     r3,-KERNELBASE@h
         mr      r4,r24
         bl      call_setup_cpu          /* Call setup_cpu for this CPU */
-#ifdef CONFIG_6xx
+#ifdef CONFIG_PPC_BOOK3S_32
         lis     r3,-KERNELBASE@h
         bl      init_idle_6xx
-#endif /* CONFIG_6xx */
+#endif /* CONFIG_PPC_BOOK3S_32 */
 
         /* get current_thread_info and current */
         lis     r1,secondary_ti@ha
@@ -880,14 +884,14 @@ __secondary_start:
 
 /*
  * Those generic dummy functions are kept for CPUs not
- * included in CONFIG_6xx
+ * included in CONFIG_PPC_BOOK3S_32
  */
-#if !defined(CONFIG_6xx)
+#if !defined(CONFIG_PPC_BOOK3S_32)
 _ENTRY(__save_cpu_setup)
         blr
 _ENTRY(__restore_cpu_setup)
         blr
-#endif /* !defined(CONFIG_6xx) */
+#endif /* !defined(CONFIG_PPC_BOOK3S_32) */
 
 
 /*
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S
index 37e4a7cf0065..bf23c19c92d6 100644
--- a/arch/powerpc/kernel/head_44x.S
+++ b/arch/powerpc/kernel/head_44x.S
@@ -40,6 +40,7 @@
 #include <asm/ptrace.h>
 #include <asm/synch.h>
 #include <asm/export.h>
+#include <asm/code-patching-asm.h>
 #include "head_booke.h"
 
 
@@ -382,10 +383,9 @@ interrupt_base:
         /* Increment, rollover, and store TLB index */
         addi    r13,r13,1
 
+        patch_site 0f, patch__tlb_44x_hwater_D
         /* Compare with watermark (instruction gets patched) */
-        .globl tlb_44x_patch_hwater_D
-tlb_44x_patch_hwater_D:
-        cmpwi   0,r13,1                 /* reserve entries */
+0:      cmpwi   0,r13,1                 /* reserve entries */
         ble     5f
         li      r13,0
 5:
@@ -478,10 +478,9 @@ tlb_44x_patch_hwater_D:
         /* Increment, rollover, and store TLB index */
         addi    r13,r13,1
 
+        patch_site 0f, patch__tlb_44x_hwater_I
         /* Compare with watermark (instruction gets patched) */
-        .globl tlb_44x_patch_hwater_I
-tlb_44x_patch_hwater_I:
-        cmpwi   0,r13,1                 /* reserve entries */
+0:      cmpwi   0,r13,1                 /* reserve entries */
         ble     5f
         li      r13,0
 5:
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index 3b67b9533c82..57deb1e9ffea 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -106,6 +106,23 @@ turn_on_mmu:
         mtspr   SPRN_SRR0,r0
         rfi                             /* enables MMU */
 
+
+#ifdef CONFIG_PERF_EVENTS
+        .align  4
+
+        .globl  itlb_miss_counter
+itlb_miss_counter:
+        .space  4
+
+        .globl  dtlb_miss_counter
+dtlb_miss_counter:
+        .space  4
+
+        .globl  instruction_counter
+instruction_counter:
+        .space  4
+#endif
+
 /*
  * Exception entry code.  This code runs with address translation
  * turned off, i.e. using physical addresses.
@@ -149,6 +166,9 @@ turn_on_mmu:
         li      r10,MSR_KERNEL & ~(MSR_IR|MSR_DR); /* can take exceptions */ \
         mtmsr   r10;            \
         stw     r0,GPR0(r11);   \
+        lis     r10, STACK_FRAME_REGS_MARKER@ha; /* exception frame marker */ \
+        addi    r10, r10, STACK_FRAME_REGS_MARKER@l; \
+        stw     r10, 8(r11);    \
         SAVE_4GPRS(3, r11);     \
         SAVE_2GPRS(7, r11)
 
@@ -275,7 +295,7 @@ SystemCall:
         . = 0x1100
 /*
  * For the MPC8xx, this is a software tablewalk to load the instruction
- * TLB.  The task switch loads the M_TW register with the pointer to the first
+ * TLB.  The task switch loads the M_TWB register with the pointer to the first
  * level table.
  * If we discover there is no second level table (value is zero) or if there
  * is an invalid pte, we load that into the TLB, which causes another fault
@@ -285,186 +305,154 @@ SystemCall:
  */
 
 #ifdef CONFIG_8xx_CPU15
-#define INVALIDATE_ADJACENT_PAGES_CPU15(tmp, addr)      \
-        addi    tmp, addr, PAGE_SIZE;   \
-        tlbie   tmp;                    \
-        addi    tmp, addr, -PAGE_SIZE;  \
-        tlbie   tmp
+#define INVALIDATE_ADJACENT_PAGES_CPU15(addr)   \
+        addi    addr, addr, PAGE_SIZE;  \
+        tlbie   addr;                   \
+        addi    addr, addr, -(PAGE_SIZE << 1);  \
+        tlbie   addr;                   \
+        addi    addr, addr, PAGE_SIZE
 #else
-#define INVALIDATE_ADJACENT_PAGES_CPU15(tmp, addr)
+#define INVALIDATE_ADJACENT_PAGES_CPU15(addr)
 #endif
 
 InstructionTLBMiss:
         mtspr   SPRN_SPRG_SCRATCH0, r10
+#if defined(ITLB_MISS_KERNEL) || defined(CONFIG_SWAP)
         mtspr   SPRN_SPRG_SCRATCH1, r11
-#if defined(ITLB_MISS_KERNEL) || defined(CONFIG_HUGETLB_PAGE)
-        mtspr   SPRN_SPRG_SCRATCH2, r12
 #endif
 
         /* If we are faulting a kernel address, we have to use the
          * kernel page tables.
          */
         mfspr   r10, SPRN_SRR0  /* Get effective address of fault */
-        INVALIDATE_ADJACENT_PAGES_CPU15(r11, r10)
+        INVALIDATE_ADJACENT_PAGES_CPU15(r10)
+        mtspr   SPRN_MD_EPN, r10
         /* Only modules will cause ITLB Misses as we always
          * pin the first 8MB of kernel memory */
-#if defined(ITLB_MISS_KERNEL) || defined(CONFIG_HUGETLB_PAGE)
-        mfcr    r12
-#endif
 #ifdef ITLB_MISS_KERNEL
+        mfcr    r11
 #if defined(SIMPLE_KERNEL_ADDRESS) && defined(CONFIG_PIN_TLB_TEXT)
-        andis.  r11, r10, 0x8000        /* Address >= 0x80000000 */
+        cmpi    cr0, r10, 0     /* Address >= 0x80000000 */
 #else
-        rlwinm  r11, r10, 16, 0xfff8
-        cmpli   cr0, r11, PAGE_OFFSET@h
+        rlwinm  r10, r10, 16, 0xfff8
+        cmpli   cr0, r10, PAGE_OFFSET@h
 #ifndef CONFIG_PIN_TLB_TEXT
         /* It is assumed that kernel code fits into the first 8M page */
-0:      cmpli   cr7, r11, (PAGE_OFFSET + 0x0800000)@h
+0:      cmpli   cr7, r10, (PAGE_OFFSET + 0x0800000)@h
         patch_site      0b, patch__itlbmiss_linmem_top
 #endif
 #endif
 #endif
-        mfspr   r11, SPRN_M_TW  /* Get level 1 table */
+        mfspr   r10, SPRN_M_TWB /* Get level 1 table */
 #ifdef ITLB_MISS_KERNEL
 #if defined(SIMPLE_KERNEL_ADDRESS) && defined(CONFIG_PIN_TLB_TEXT)
-        beq+    3f
+        bge+    3f
 #else
         blt+    3f
 #endif
 #ifndef CONFIG_PIN_TLB_TEXT
         blt     cr7, ITLBMissLinear
 #endif
-        lis     r11, (swapper_pg_dir-PAGE_OFFSET)@ha
+        rlwinm  r10, r10, 0, 20, 31
+        oris    r10, r10, (swapper_pg_dir - PAGE_OFFSET)@ha
 3:
 #endif
-        /* Insert level 1 index */
-        rlwimi  r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
-        lwz     r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)        /* Get the level 1 entry */
+        lwz     r10, (swapper_pg_dir-PAGE_OFFSET)@l(r10)        /* Get level 1 entry */
+        mtspr   SPRN_MI_TWC, r10        /* Set segment attributes */
 
-        /* Extract level 2 index */
-        rlwinm  r10, r10, 32 - (PAGE_SHIFT - 2), 32 - PAGE_SHIFT, 29
-#ifdef CONFIG_HUGETLB_PAGE
-        mtcr    r11
-        bt-     28, 10f         /* bit 28 = Large page (8M) */
-        bt-     29, 20f         /* bit 29 = Large page (8M or 512k) */
-#endif
-        rlwimi  r10, r11, 0, 0, 32 - PAGE_SHIFT - 1     /* Add level 2 base */
+        mtspr   SPRN_MD_TWC, r10
+        mfspr   r10, SPRN_MD_TWC
         lwz     r10, 0(r10)     /* Get the pte */
-4:
-#if defined(ITLB_MISS_KERNEL) || defined(CONFIG_HUGETLB_PAGE)
-        mtcr    r12
+#ifdef ITLB_MISS_KERNEL
+        mtcr    r11
 #endif
-        /* Load the MI_TWC with the attributes for this "segment." */
-        mtspr   SPRN_MI_TWC, r11        /* Set segment attributes */
-
 #ifdef CONFIG_SWAP
         rlwinm  r11, r10, 32-5, _PAGE_PRESENT
         and     r11, r11, r10
         rlwimi  r10, r11, 0, _PAGE_PRESENT
 #endif
-        li      r11, RPN_PATTERN | 0x200
         /* The Linux PTE won't go exactly into the MMU TLB.
          * Software indicator bits 20 and 23 must be clear.
          * Software indicator bits 22, 24, 25, 26, and 27 must be
          * set.  All other Linux PTE bits control the behavior
          * of the MMU.
          */
-        rlwimi  r11, r10, 4, 0x0400     /* Copy _PAGE_EXEC into bit 21 */
-        rlwimi  r10, r11, 0, 0x0ff0     /* Set 22, 24-27, clear 20,23 */
+        rlwimi  r10, r10, 0, 0x0f00     /* Clear bits 20-23 */
+        rlwimi  r10, r10, 4, 0x0400     /* Copy _PAGE_EXEC into bit 21 */
+        ori     r10, r10, RPN_PATTERN | 0x200 /* Set 22 and 24-27 */
         mtspr   SPRN_MI_RPN, r10        /* Update TLB entry */
 
         /* Restore registers */
 0:      mfspr   r10, SPRN_SPRG_SCRATCH0
+#if defined(ITLB_MISS_KERNEL) || defined(CONFIG_SWAP)
         mfspr   r11, SPRN_SPRG_SCRATCH1
-#if defined(ITLB_MISS_KERNEL) || defined(CONFIG_HUGETLB_PAGE)
-        mfspr   r12, SPRN_SPRG_SCRATCH2
 #endif
         rfi
         patch_site      0b, patch__itlbmiss_exit_1
 
 #ifdef CONFIG_PERF_EVENTS
         patch_site      0f, patch__itlbmiss_perf
-0:      lis     r10, (itlb_miss_counter - PAGE_OFFSET)@ha
-        lwz     r11, (itlb_miss_counter - PAGE_OFFSET)@l(r10)
-        addi    r11, r11, 1
-        stw     r11, (itlb_miss_counter - PAGE_OFFSET)@l(r10)
-#endif
+0:      lwz     r10, (itlb_miss_counter - PAGE_OFFSET)@l(0)
+        addi    r10, r10, 1
+        stw     r10, (itlb_miss_counter - PAGE_OFFSET)@l(0)
         mfspr   r10, SPRN_SPRG_SCRATCH0
+#if defined(ITLB_MISS_KERNEL) || defined(CONFIG_SWAP)
         mfspr   r11, SPRN_SPRG_SCRATCH1
-#if defined(ITLB_MISS_KERNEL) || defined(CONFIG_HUGETLB_PAGE)
-        mfspr   r12, SPRN_SPRG_SCRATCH2
 #endif
         rfi
-
-#ifdef CONFIG_HUGETLB_PAGE
-10:     /* 8M pages */
-#ifdef CONFIG_PPC_16K_PAGES
-        /* Extract level 2 index */
-        rlwinm  r10, r10, 32 - (PAGE_SHIFT_8M - PAGE_SHIFT), 32 + PAGE_SHIFT_8M - (PAGE_SHIFT << 1), 29
-        /* Add level 2 base */
-        rlwimi  r10, r11, 0, 0, 32 + PAGE_SHIFT_8M - (PAGE_SHIFT << 1) - 1
-#else
-        /* Level 2 base */
-        rlwinm  r10, r11, 0, ~HUGEPD_SHIFT_MASK
 #endif
-        lwz     r10, 0(r10)     /* Get the pte */
-        b       4b
 
-20:     /* 512k pages */
-        /* Extract level 2 index */
-        rlwinm  r10, r10, 32 - (PAGE_SHIFT_512K - PAGE_SHIFT), 32 + PAGE_SHIFT_512K - (PAGE_SHIFT << 1), 29
-        /* Add level 2 base */
-        rlwimi  r10, r11, 0, 0, 32 + PAGE_SHIFT_512K - (PAGE_SHIFT << 1) - 1
-        lwz     r10, 0(r10)     /* Get the pte */
-        b       4b
+#ifndef CONFIG_PIN_TLB_TEXT
+ITLBMissLinear:
+        mtcr    r11
+        /* Set 8M byte page and mark it valid */
+        li      r11, MI_PS8MEG | MI_SVALID
+        mtspr   SPRN_MI_TWC, r11
+        rlwinm  r10, r10, 20, 0x0f800000        /* 8xx supports max 256Mb RAM */
+        ori     r10, r10, 0xf0 | MI_SPS16K | _PAGE_SH | _PAGE_DIRTY | \
+                          _PAGE_PRESENT
+        mtspr   SPRN_MI_RPN, r10        /* Update TLB entry */
+
+0:      mfspr   r10, SPRN_SPRG_SCRATCH0
+        mfspr   r11, SPRN_SPRG_SCRATCH1
+        rfi
+        patch_site      0b, patch__itlbmiss_exit_2
 #endif
 
         . = 0x1200
 DataStoreTLBMiss:
         mtspr   SPRN_SPRG_SCRATCH0, r10
         mtspr   SPRN_SPRG_SCRATCH1, r11
-        mtspr   SPRN_SPRG_SCRATCH2, r12
-        mfcr    r12
+        mfcr    r11
 
         /* If we are faulting a kernel address, we have to use the
          * kernel page tables.
          */
         mfspr   r10, SPRN_MD_EPN
-        rlwinm  r11, r10, 16, 0xfff8
-        cmpli   cr0, r11, PAGE_OFFSET@h
-        mfspr   r11, SPRN_M_TW  /* Get level 1 table */
-        blt+    3f
-        rlwinm  r11, r10, 16, 0xfff8
+        rlwinm  r10, r10, 16, 0xfff8
+        cmpli   cr0, r10, PAGE_OFFSET@h
 #ifndef CONFIG_PIN_TLB_IMMR
-        cmpli   cr0, r11, VIRT_IMMR_BASE@h
+        cmpli   cr6, r10, VIRT_IMMR_BASE@h
 #endif
-0:      cmpli   cr7, r11, (PAGE_OFFSET + 0x1800000)@h
+0:      cmpli   cr7, r10, (PAGE_OFFSET + 0x1800000)@h
         patch_site      0b, patch__dtlbmiss_linmem_top
+
+        mfspr   r10, SPRN_M_TWB /* Get level 1 table */
+        blt+    3f
 #ifndef CONFIG_PIN_TLB_IMMR
-0:      beq-    DTLBMissIMMR
+0:      beq-    cr6, DTLBMissIMMR
         patch_site      0b, patch__dtlbmiss_immr_jmp
 #endif
         blt     cr7, DTLBMissLinear
-        lis     r11, (swapper_pg_dir-PAGE_OFFSET)@ha
+        rlwinm  r10, r10, 0, 20, 31
+        oris    r10, r10, (swapper_pg_dir - PAGE_OFFSET)@ha
 3:
-
-        /* Insert level 1 index */
-        rlwimi  r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
-        lwz     r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)        /* Get the level 1 entry */
-
-        /* We have a pte table, so load fetch the pte from the table.
-         */
-        /* Extract level 2 index */
-        rlwinm  r10, r10, 32 - (PAGE_SHIFT - 2), 32 - PAGE_SHIFT, 29
-#ifdef CONFIG_HUGETLB_PAGE
         mtcr    r11
-        bt-     28, 10f         /* bit 28 = Large page (8M) */
-        bt-     29, 20f         /* bit 29 = Large page (8M or 512k) */
-#endif
-        rlwimi  r10, r11, 0, 0, 32 - PAGE_SHIFT - 1     /* Add level 2 base */
+        lwz     r11, (swapper_pg_dir-PAGE_OFFSET)@l(r10)        /* Get level 1 entry */
+
+        mtspr   SPRN_MD_TWC, r11
+        mfspr   r10, SPRN_MD_TWC
         lwz     r10, 0(r10)     /* Get the pte */
-4:
-        mtcr    r12
 
         /* Insert the Guarded flag into the TWC from the Linux PTE.
          * It is bit 27 of both the Linux PTE and the TWC (at least
@@ -503,44 +491,55 @@ DataStoreTLBMiss:
 
 0:      mfspr   r10, SPRN_SPRG_SCRATCH0
         mfspr   r11, SPRN_SPRG_SCRATCH1
-        mfspr   r12, SPRN_SPRG_SCRATCH2
         rfi
         patch_site      0b, patch__dtlbmiss_exit_1
 
 #ifdef CONFIG_PERF_EVENTS
         patch_site      0f, patch__dtlbmiss_perf
-0:      lis     r10, (dtlb_miss_counter - PAGE_OFFSET)@ha
-        lwz     r11, (dtlb_miss_counter - PAGE_OFFSET)@l(r10)
-        addi    r11, r11, 1
-        stw     r11, (dtlb_miss_counter - PAGE_OFFSET)@l(r10)
-#endif
+0:      lwz     r10, (dtlb_miss_counter - PAGE_OFFSET)@l(0)
+        addi    r10, r10, 1
+        stw     r10, (dtlb_miss_counter - PAGE_OFFSET)@l(0)
         mfspr   r10, SPRN_SPRG_SCRATCH0
         mfspr   r11, SPRN_SPRG_SCRATCH1
-        mfspr   r12, SPRN_SPRG_SCRATCH2
         rfi
-
-#ifdef CONFIG_HUGETLB_PAGE
-10:     /* 8M pages */
-        /* Extract level 2 index */
-#ifdef CONFIG_PPC_16K_PAGES
-        rlwinm  r10, r10, 32 - (PAGE_SHIFT_8M - PAGE_SHIFT), 32 + PAGE_SHIFT_8M - (PAGE_SHIFT << 1), 29
-        /* Add level 2 base */
-        rlwimi  r10, r11, 0, 0, 32 + PAGE_SHIFT_8M - (PAGE_SHIFT << 1) - 1
-#else
-        /* Level 2 base */
-        rlwinm  r10, r11, 0, ~HUGEPD_SHIFT_MASK
 #endif
-        lwz     r10, 0(r10)     /* Get the pte */
-        b       4b
 
-20:     /* 512k pages */
-        /* Extract level 2 index */
-        rlwinm  r10, r10, 32 - (PAGE_SHIFT_512K - PAGE_SHIFT), 32 + PAGE_SHIFT_512K - (PAGE_SHIFT << 1), 29
-        /* Add level 2 base */
-        rlwimi  r10, r11, 0, 0, 32 + PAGE_SHIFT_512K - (PAGE_SHIFT << 1) - 1
-        lwz     r10, 0(r10)     /* Get the pte */
-        b       4b
-#endif
+DTLBMissIMMR:
+        mtcr    r11
+        /* Set 512k byte guarded page and mark it valid */
+        li      r10, MD_PS512K | MD_GUARDED | MD_SVALID
+        mtspr   SPRN_MD_TWC, r10
+        mfspr   r10, SPRN_IMMR                  /* Get current IMMR */
+        rlwinm  r10, r10, 0, 0xfff80000         /* Get 512 kbytes boundary */
+        ori     r10, r10, 0xf0 | MD_SPS16K | _PAGE_SH | _PAGE_DIRTY | \
+                          _PAGE_PRESENT | _PAGE_NO_CACHE
+        mtspr   SPRN_MD_RPN, r10        /* Update TLB entry */
+
+        li      r11, RPN_PATTERN
+        mtspr   SPRN_DAR, r11   /* Tag DAR */
+
+0:      mfspr   r10, SPRN_SPRG_SCRATCH0
+        mfspr   r11, SPRN_SPRG_SCRATCH1
+        rfi
+        patch_site      0b, patch__dtlbmiss_exit_2
+
+DTLBMissLinear:
+        mtcr    r11
+        /* Set 8M byte page and mark it valid */
+        li      r11, MD_PS8MEG | MD_SVALID
+        mtspr   SPRN_MD_TWC, r11
+        rlwinm  r10, r10, 20, 0x0f800000        /* 8xx supports max 256Mb RAM */
+        ori     r10, r10, 0xf0 | MD_SPS16K | _PAGE_SH | _PAGE_DIRTY | \
+                          _PAGE_PRESENT
+        mtspr   SPRN_MD_RPN, r10        /* Update TLB entry */
+
+        li      r11, RPN_PATTERN
+        mtspr   SPRN_DAR, r11   /* Tag DAR */
+
+0:      mfspr   r10, SPRN_SPRG_SCRATCH0
+        mfspr   r11, SPRN_SPRG_SCRATCH1
+        rfi
+        patch_site      0b, patch__dtlbmiss_exit_3
 
 /* This is an instruction TLB error on the MPC8xx.  This could be due
  * to many reasons, such as executing guarded memory or illegal instruction
@@ -625,16 +624,13 @@ DataBreakpoint:
         . = 0x1d00
 InstructionBreakpoint:
         mtspr   SPRN_SPRG_SCRATCH0, r10
-        mtspr   SPRN_SPRG_SCRATCH1, r11
-        lis     r10, (instruction_counter - PAGE_OFFSET)@ha
-        lwz     r11, (instruction_counter - PAGE_OFFSET)@l(r10)
-        addi    r11, r11, -1
-        stw     r11, (instruction_counter - PAGE_OFFSET)@l(r10)
+        lwz     r10, (instruction_counter - PAGE_OFFSET)@l(0)
+        addi    r10, r10, -1
+        stw     r10, (instruction_counter - PAGE_OFFSET)@l(0)
         lis     r10, 0xffff
         ori     r10, r10, 0x01
         mtspr   SPRN_COUNTA, r10
         mfspr   r10, SPRN_SPRG_SCRATCH0
-        mfspr   r11, SPRN_SPRG_SCRATCH1
         rfi
 #else
         EXCEPTION(0x1d00, Trap_1d, unknown_exception, EXC_XFER_EE)
@@ -644,67 +640,6 @@ InstructionBreakpoint:
 
         . = 0x2000
 
-/*
- * Bottom part of DataStoreTLBMiss handlers for IMMR area and linear RAM.
- * not enough space in the DataStoreTLBMiss area.
- */
-DTLBMissIMMR:
-        mtcr    r12
-        /* Set 512k byte guarded page and mark it valid */
-        li      r10, MD_PS512K | MD_GUARDED | MD_SVALID
-        mtspr   SPRN_MD_TWC, r10
-        mfspr   r10, SPRN_IMMR                  /* Get current IMMR */
-        rlwinm  r10, r10, 0, 0xfff80000         /* Get 512 kbytes boundary */
-        ori     r10, r10, 0xf0 | MD_SPS16K | _PAGE_SH | _PAGE_DIRTY | \
-                          _PAGE_PRESENT | _PAGE_NO_CACHE
-        mtspr   SPRN_MD_RPN, r10        /* Update TLB entry */
-
-        li      r11, RPN_PATTERN
-        mtspr   SPRN_DAR, r11   /* Tag DAR */
-
-0:      mfspr   r10, SPRN_SPRG_SCRATCH0
-        mfspr   r11, SPRN_SPRG_SCRATCH1
-        mfspr   r12, SPRN_SPRG_SCRATCH2
-        rfi
-        patch_site      0b, patch__dtlbmiss_exit_2
-
-DTLBMissLinear:
-        mtcr    r12
-        /* Set 8M byte page and mark it valid */
-        li      r11, MD_PS8MEG | MD_SVALID
-        mtspr   SPRN_MD_TWC, r11
-        rlwinm  r10, r10, 0, 0x0f800000 /* 8xx supports max 256Mb RAM */
-        ori     r10, r10, 0xf0 | MD_SPS16K | _PAGE_SH | _PAGE_DIRTY | \
-                          _PAGE_PRESENT
-        mtspr   SPRN_MD_RPN, r10        /* Update TLB entry */
-
-        li      r11, RPN_PATTERN
-        mtspr   SPRN_DAR, r11   /* Tag DAR */
-
-0:      mfspr   r10, SPRN_SPRG_SCRATCH0
-        mfspr   r11, SPRN_SPRG_SCRATCH1
-        mfspr   r12, SPRN_SPRG_SCRATCH2
-        rfi
-        patch_site      0b, patch__dtlbmiss_exit_3
-
-#ifndef CONFIG_PIN_TLB_TEXT
-ITLBMissLinear:
-        mtcr    r12
-        /* Set 8M byte page and mark it valid */
-        li      r11, MI_PS8MEG | MI_SVALID
-        mtspr   SPRN_MI_TWC, r11
-        rlwinm  r10, r10, 0, 0x0f800000 /* 8xx supports max 256Mb RAM */
-        ori     r10, r10, 0xf0 | MI_SPS16K | _PAGE_SH | _PAGE_DIRTY | \
-                          _PAGE_PRESENT
-        mtspr   SPRN_MI_RPN, r10        /* Update TLB entry */
-
-0:      mfspr   r10, SPRN_SPRG_SCRATCH0
-        mfspr   r11, SPRN_SPRG_SCRATCH1
-        mfspr   r12, SPRN_SPRG_SCRATCH2
-        rfi
-        patch_site      0b, patch__itlbmiss_exit_2
-#endif
-
 /* This is the procedure to calculate the data EA for buggy dcbx,dcbi instructions
  * by decoding the registers used by the dcbx instruction and adding them.
  * DAR is set to the calculated address.
@@ -712,12 +647,13 @@ ITLBMissLinear:
  /* define if you don't want to use self modifying code */
 #define NO_SELF_MODIFYING_CODE
 FixupDAR:/* Entry point for dcbx workaround. */
-        mtspr   SPRN_SPRG_SCRATCH2, r10
+        mtspr   SPRN_M_TW, r10
         /* fetch instruction from memory. */
         mfspr   r10, SPRN_SRR0
+        mtspr   SPRN_MD_EPN, r10
         rlwinm  r11, r10, 16, 0xfff8
         cmpli   cr0, r11, PAGE_OFFSET@h
-        mfspr   r11, SPRN_M_TW  /* Get level 1 table */
+        mfspr   r11, SPRN_M_TWB /* Get level 1 table */
         blt+    3f
         rlwinm  r11, r10, 16, 0xfff8
 
@@ -727,17 +663,17 @@ FixupDAR:/* Entry point for dcbx workaround. */
         /* create physical page address from effective address */
         tophys(r11, r10)
         blt-    cr7, 201f
-        lis     r11, (swapper_pg_dir-PAGE_OFFSET)@ha
-        /* Insert level 1 index */
-3:      rlwimi  r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
+        mfspr   r11, SPRN_M_TWB /* Get level 1 table */
+        rlwinm  r11, r11, 0, 20, 31
+        oris    r11, r11, (swapper_pg_dir - PAGE_OFFSET)@ha
+3:
         lwz     r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)        /* Get the level 1 entry */
+        mtspr   SPRN_MD_TWC, r11
         mtcr    r11
+        mfspr   r11, SPRN_MD_TWC
+        lwz     r11, 0(r11)     /* Get the pte */
         bt      28,200f         /* bit 28 = Large page (8M) */
         bt      29,202f         /* bit 29 = Large page (8M or 512K) */
-        rlwinm  r11, r11,0,0,19 /* Extract page descriptor page address */
-        /* Insert level 2 index */
-        rlwimi  r11, r10, 32 - (PAGE_SHIFT - 2), 32 - PAGE_SHIFT, 29
-        lwz     r11, 0(r11)     /* Get the pte */
         /* concat physical page address(r11) and page offset(r10) */
         rlwimi  r11, r10, 0, 32 - PAGE_SHIFT, 31
 201:    lwz     r11,0(r11)
@@ -756,26 +692,15 @@ FixupDAR:/* Entry point for dcbx workaround. */
         beq+    142f
         cmpwi   cr0, r10, 1964  /* Is icbi? */
         beq+    142f
-141:    mfspr   r10,SPRN_SPRG_SCRATCH2
+141:    mfspr   r10,SPRN_M_TW
         b       DARFixed        /* Nope, go back to normal TLB processing */
 
-        /* concat physical page address(r11) and page offset(r10) */
 200:
-#ifdef CONFIG_PPC_16K_PAGES
-        rlwinm  r11, r11, 0, 0, 32 + PAGE_SHIFT_8M - (PAGE_SHIFT << 1) - 1
-        rlwimi  r11, r10, 32 - (PAGE_SHIFT_8M - 2), 32 + PAGE_SHIFT_8M - (PAGE_SHIFT << 1), 29
-#else
-        rlwinm  r11, r10, 0, ~HUGEPD_SHIFT_MASK
-#endif
-        lwz     r11, 0(r11)     /* Get the pte */
         /* concat physical page address(r11) and page offset(r10) */
         rlwimi  r11, r10, 0, 32 - PAGE_SHIFT_8M, 31
         b       201b
 
 202:
-        rlwinm  r11, r11, 0, 0, 32 + PAGE_SHIFT_512K - (PAGE_SHIFT << 1) - 1
-        rlwimi  r11, r10, 32 - (PAGE_SHIFT_512K - 2), 32 + PAGE_SHIFT_512K - (PAGE_SHIFT << 1), 29
-        lwz     r11, 0(r11)     /* Get the pte */
         /* concat physical page address(r11) and page offset(r10) */
         rlwimi  r11, r10, 0, 32 - PAGE_SHIFT_512K, 31
         b       201b
@@ -802,7 +727,7 @@ modified_instr:
         bne+    143f
         subf    r10,r0,r10      /* r10=r10-r0, only if reg RA is r0 */
 143:    mtdar   r10             /* store faulting EA in DAR */
-        mfspr   r10,SPRN_SPRG_SCRATCH2
+        mfspr   r10,SPRN_M_TW
         b       DARFixed        /* Go back to normal TLB handling */
 #else
         mfctr   r10
@@ -856,7 +781,7 @@ modified_instr:
         mfdar   r11
         mtctr   r11                     /* restore ctr reg from DAR */
         mtdar   r10                     /* save fault EA to DAR */
-        mfspr   r10,SPRN_SPRG_SCRATCH2
+        mfspr   r10,SPRN_M_TW
         b       DARFixed                /* Go back to normal TLB handling */
 
         /* special handling for r10,r11 since these are modified already */
@@ -891,7 +816,7 @@ start_here:
 
         lis     r6, swapper_pg_dir@ha
         tophys(r6,r6)
-        mtspr   SPRN_M_TW, r6
+        mtspr   SPRN_M_TWB, r6
 
         bl      early_init      /* We have to do this with MMU on */
 
@@ -1065,17 +990,3 @@ swapper_pg_dir:
  */
 abatron_pteptrs:
         .space  8
-
-#ifdef CONFIG_PERF_EVENTS
-        .globl  itlb_miss_counter
-itlb_miss_counter:
-        .space  4
-
-        .globl  dtlb_miss_counter
-dtlb_miss_counter:
-        .space  4
-
-        .globl  instruction_counter
-instruction_counter:
-        .space  4
-#endif
diff --git a/arch/powerpc/kernel/head_booke.h b/arch/powerpc/kernel/head_booke.h
index d0862a100d29..15ac51072eb3 100644
--- a/arch/powerpc/kernel/head_booke.h
+++ b/arch/powerpc/kernel/head_booke.h
@@ -43,6 +43,9 @@
         andi.   r11, r11, MSR_PR;       /* check whether user or kernel    */\
         mr      r11, r1;                                                     \
         beq     1f;                                                          \
+START_BTB_FLUSH_SECTION                                 \
+        BTB_FLUSH(r11)                                          \
+END_BTB_FLUSH_SECTION                                   \
         /* if from user, start at top of this thread's kernel stack */       \
         lwz     r11, THREAD_INFO-THREAD(r10);                                \
         ALLOC_STACK_FRAME(r11, THREAD_SIZE);                                 \
@@ -128,6 +131,9 @@
         stw     r9,_CCR(r8);            /* save CR on stack                */\
         mfspr   r11,exc_level_srr1;     /* check whether user or kernel    */\
         DO_KVM  BOOKE_INTERRUPT_##intno exc_level_srr1;                      \
+START_BTB_FLUSH_SECTION                                                         \
+        BTB_FLUSH(r10)                                                                  \
+END_BTB_FLUSH_SECTION                                                           \
         andi.   r11,r11,MSR_PR;                                              \
         mfspr   r11,SPRN_SPRG_THREAD;   /* if from user, start at top of   */\
         lwz     r11,THREAD_INFO-THREAD(r11); /* this thread's kernel stack */\
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index e2750b856c8f..2386ce2a9c6e 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -453,6 +453,13 @@ END_FTR_SECTION_IFSET(CPU_FTR_EMB_HV)
         mfcr    r13
         stw     r13, THREAD_NORMSAVE(3)(r10)
         DO_KVM  BOOKE_INTERRUPT_DTLB_MISS SPRN_SRR1
+START_BTB_FLUSH_SECTION
+        mfspr r11, SPRN_SRR1
+        andi. r10,r11,MSR_PR
+        beq 1f
+        BTB_FLUSH(r10)
+1:
+END_BTB_FLUSH_SECTION
         mfspr   r10, SPRN_DEAR          /* Get faulting address */
 
         /* If we are faulting a kernel address, we have to use the
@@ -547,6 +554,14 @@ END_FTR_SECTION_IFSET(CPU_FTR_EMB_HV)
         mfcr    r13
         stw     r13, THREAD_NORMSAVE(3)(r10)
         DO_KVM  BOOKE_INTERRUPT_ITLB_MISS SPRN_SRR1
+START_BTB_FLUSH_SECTION
+        mfspr r11, SPRN_SRR1
+        andi. r10,r11,MSR_PR
+        beq 1f
+        BTB_FLUSH(r10)
+1:
+END_BTB_FLUSH_SECTION
+
         mfspr   r10, SPRN_SRR0          /* Get faulting address */
 
         /* If we are faulting a kernel address, we have to use the
diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c
index f0dc680e659a..9d5d109f15c0 100644
--- a/arch/powerpc/kernel/iommu.c
+++ b/arch/powerpc/kernel/iommu.c
@@ -47,6 +47,7 @@
 #include <asm/fadump.h>
 #include <asm/vio.h>
 #include <asm/tce.h>
+#include <asm/mmu_context.h>
 
 #define DBG(...)
 
@@ -993,15 +994,19 @@ int iommu_tce_check_gpa(unsigned long page_shift, unsigned long gpa)
 }
 EXPORT_SYMBOL_GPL(iommu_tce_check_gpa);
 
-long iommu_tce_xchg(struct iommu_table *tbl, unsigned long entry,
-                unsigned long *hpa, enum dma_data_direction *direction)
+long iommu_tce_xchg(struct mm_struct *mm, struct iommu_table *tbl,
+                unsigned long entry, unsigned long *hpa,
+                enum dma_data_direction *direction)
 {
         long ret;
+        unsigned long size = 0;
 
         ret = tbl->it_ops->exchange(tbl, entry, hpa, direction);
 
         if (!ret && ((*direction == DMA_FROM_DEVICE) ||
-                        (*direction == DMA_BIDIRECTIONAL)))
+                        (*direction == DMA_BIDIRECTIONAL)) &&
+                        !mm_iommu_is_devmem(mm, *hpa, tbl->it_page_shift,
+                                        &size))
                 SetPageDirty(pfn_to_page(*hpa >> PAGE_SHIFT));
 
         /* if (unlikely(ret))
@@ -1073,11 +1078,8 @@ void iommu_release_ownership(struct iommu_table *tbl)
 }
 EXPORT_SYMBOL_GPL(iommu_release_ownership);
 
-int iommu_add_device(struct device *dev)
+int iommu_add_device(struct iommu_table_group *table_group, struct device *dev)
 {
-        struct iommu_table *tbl;
-        struct iommu_table_group_link *tgl;
-
         /*
          * The sysfs entries should be populated before
          * binding IOMMU group. If sysfs entries isn't
@@ -1093,32 +1095,10 @@ int iommu_add_device(struct device *dev)
                 return -EBUSY;
         }
 
-        tbl = get_iommu_table_base(dev);
-        if (!tbl) {
-                pr_debug("%s: Skipping device %s with no tbl\n",
-                         __func__, dev_name(dev));
-                return 0;
-        }
-
-        tgl = list_first_entry_or_null(&tbl->it_group_list,
-                        struct iommu_table_group_link, next);
-        if (!tgl) {
-                pr_debug("%s: Skipping device %s with no group\n",
-                         __func__, dev_name(dev));
-                return 0;
-        }
         pr_debug("%s: Adding %s to iommu group %d\n",
-                 __func__, dev_name(dev),
-                 iommu_group_id(tgl->table_group->group));
-
-        if (PAGE_SIZE < IOMMU_PAGE_SIZE(tbl)) {
-                pr_err("%s: Invalid IOMMU page size %lx (%lx) on %s\n",
-                       __func__, IOMMU_PAGE_SIZE(tbl),
-                       PAGE_SIZE, dev_name(dev));
-                return -EINVAL;
-        }
+                 __func__, dev_name(dev),  iommu_group_id(table_group->group));
 
-        return iommu_group_add_device(tgl->table_group->group, dev);
+        return iommu_group_add_device(table_group->group, dev);
 }
 EXPORT_SYMBOL_GPL(iommu_add_device);
 
@@ -1138,31 +1118,4 @@ void iommu_del_device(struct device *dev)
         iommu_group_remove_device(dev);
 }
 EXPORT_SYMBOL_GPL(iommu_del_device);
-
-static int tce_iommu_bus_notifier(struct notifier_block *nb,
-                unsigned long action, void *data)
-{
-        struct device *dev = data;
-
-        switch (action) {
-        case BUS_NOTIFY_ADD_DEVICE:
-                return iommu_add_device(dev);
-        case BUS_NOTIFY_DEL_DEVICE:
-                if (dev->iommu_group)
-                        iommu_del_device(dev);
-                return 0;
-        default:
-                return 0;
-        }
-}
-
-static struct notifier_block tce_iommu_bus_nb = {
-        .notifier_call = tce_iommu_bus_notifier,
-};
-
-int __init tce_iommu_bus_notifier_init(void)
-{
-        bus_register_notifier(&pci_bus_type, &tce_iommu_bus_nb);
-        return 0;
-}
 #endif /* CONFIG_IOMMU_API */
diff --git a/arch/powerpc/kernel/isa-bridge.c b/arch/powerpc/kernel/isa-bridge.c
index fda3ae48480c..0e7099da4f25 100644
--- a/arch/powerpc/kernel/isa-bridge.c
+++ b/arch/powerpc/kernel/isa-bridge.c
@@ -327,8 +327,7 @@ static int isa_bridge_notify(struct notifier_block *nb, unsigned long action,
                 /* Check if we have no ISA device, and this happens to be one,
                  * register it as such if it has an OF device
                  */
-                if (!isa_bridge_devnode && devnode && devnode->type &&
-                    !strcmp(devnode->type, "isa"))
+                if (!isa_bridge_devnode && of_node_is_type(devnode, "isa"))
                         isa_bridge_find_late(pdev, devnode);
 
                 return 0;
diff --git a/arch/powerpc/kernel/legacy_serial.c b/arch/powerpc/kernel/legacy_serial.c
index 5b9dce17f0c9..7cea5978f21f 100644
--- a/arch/powerpc/kernel/legacy_serial.c
+++ b/arch/powerpc/kernel/legacy_serial.c
@@ -192,7 +192,7 @@ static int __init add_legacy_soc_port(struct device_node *np,
         /* Add port, irq will be dealt with later. We passed a translated
          * IO port value. It will be fixed up later along with the irq
          */
-        if (tsi && !strcmp(tsi->type, "tsi-bridge"))
+        if (of_node_is_type(tsi, "tsi-bridge"))
                 return add_legacy_port(np, -1, UPIO_TSI, addr, addr,
                                        0, legacy_port_flags, 0);
         else
@@ -400,8 +400,7 @@ void __init find_legacy_serial_ports(void)
         /* Next, fill our array with ISA ports */
         for_each_node_by_type(np, "serial") {
                 struct device_node *isa = of_get_parent(np);
-                if (isa && (!strcmp(isa->name, "isa") ||
-                            !strcmp(isa->name, "lpc"))) {
+                if (of_node_name_eq(isa, "isa") || of_node_name_eq(isa, "lpc")) {
                         if (of_device_is_available(np)) {
                                 index = add_legacy_isa_port(np, isa);
                                 if (index >= 0 && np == stdout)
@@ -415,11 +414,12 @@ void __init find_legacy_serial_ports(void)
         /* Next, try to locate PCI ports */
         for (np = NULL; (np = of_find_all_nodes(np));) {
                 struct device_node *pci, *parent = of_get_parent(np);
-                if (parent && !strcmp(parent->name, "isa")) {
+                if (of_node_name_eq(parent, "isa")) {
                         of_node_put(parent);
                         continue;
                 }
-                if (strcmp(np->name, "serial") && strcmp(np->type, "serial")) {
+                if (!of_node_name_eq(np, "serial") &&
+                    !of_node_is_type(np, "serial")) {
                         of_node_put(parent);
                         continue;
                 }
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index 695b24a2d954..57d2ffb2d45c 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -153,7 +153,7 @@ _GLOBAL(call_setup_cpu)
         mtctr   r5
         bctr
 
-#if defined(CONFIG_CPU_FREQ_PMAC) && defined(CONFIG_6xx)
+#if defined(CONFIG_CPU_FREQ_PMAC) && defined(CONFIG_PPC_BOOK3S_32)
 
 /* This gets called by via-pmu.c to switch the PLL selection
  * on 750fx CPU. This function should really be moved to some
@@ -223,7 +223,7 @@ _GLOBAL(low_choose_7447a_dfs)
         mtmsr   r7
         blr
 
-#endif /* CONFIG_CPU_FREQ_PMAC && CONFIG_6xx */
+#endif /* CONFIG_CPU_FREQ_PMAC && CONFIG_PPC_BOOK3S_32 */
 
 /*
  * complement mask on the msr then "or" some values on.
diff --git a/arch/powerpc/kernel/nvram_64.c b/arch/powerpc/kernel/nvram_64.c
index 22e9d281324d..06e2eda2430e 100644
--- a/arch/powerpc/kernel/nvram_64.c
+++ b/arch/powerpc/kernel/nvram_64.c
@@ -809,6 +809,7 @@ static long dev_nvram_ioctl(struct file *file, unsigned int cmd,
 #ifdef CONFIG_PPC_PMAC
         case OBSOLETE_PMAC_NVRAM_GET_OFFSET:
                 printk(KERN_WARNING "nvram: Using obsolete PMAC_NVRAM_GET_OFFSET ioctl\n");
+                /* fall through */
         case IOC_NVRAM_GET_OFFSET: {
                 int part, offset;
 
diff --git a/arch/powerpc/kernel/pci_of_scan.c b/arch/powerpc/kernel/pci_of_scan.c
index 98f04725def7..24191ea2d9a7 100644
--- a/arch/powerpc/kernel/pci_of_scan.c
+++ b/arch/powerpc/kernel/pci_of_scan.c
@@ -125,16 +125,13 @@ struct pci_dev *of_create_pci_dev(struct device_node *node,
                                  struct pci_bus *bus, int devfn)
 {
         struct pci_dev *dev;
-        const char *type;
 
         dev = pci_alloc_dev(bus);
         if (!dev)
                 return NULL;
-        type = of_get_property(node, "device_type", NULL);
-        if (type == NULL)
-                type = "";
 
-        pr_debug("    create device, devfn: %x, type: %s\n", devfn, type);
+        pr_debug("    create device, devfn: %x, type: %s\n", devfn,
+                 of_node_get_device_type(node));
 
         dev->dev.of_node = of_node_get(node);
         dev->dev.parent = bus->bridge;
@@ -167,12 +164,12 @@ struct pci_dev *of_create_pci_dev(struct device_node *node,
         /* Early fixups, before probing the BARs */
         pci_fixup_device(pci_fixup_early, dev);
 
-        if (!strcmp(type, "pci") || !strcmp(type, "pciex")) {
+        if (of_node_is_type(node, "pci") || of_node_is_type(node, "pciex")) {
                 /* a PCI-PCI bridge */
                 dev->hdr_type = PCI_HEADER_TYPE_BRIDGE;
                 dev->rom_base_reg = PCI_ROM_ADDRESS1;
                 set_pcie_hotplug_bridge(dev);
-        } else if (!strcmp(type, "cardbus")) {
+        } else if (of_node_is_type(node, "cardbus")) {
                 dev->hdr_type = PCI_HEADER_TYPE_CARDBUS;
         } else {
                 dev->hdr_type = PCI_HEADER_TYPE_NORMAL;
diff --git a/arch/powerpc/kernel/pmc.c b/arch/powerpc/kernel/pmc.c
index 58eaa3ddf7b9..2de71faca911 100644
--- a/arch/powerpc/kernel/pmc.c
+++ b/arch/powerpc/kernel/pmc.c
@@ -29,7 +29,7 @@ static void dummy_perf(struct pt_regs *regs)
 {
 #if defined(CONFIG_FSL_EMB_PERFMON)
         mtpmr(PMRN_PMGC0, mfpmr(PMRN_PMGC0) & ~PMGC0_PMIE);
-#elif defined(CONFIG_PPC64) || defined(CONFIG_6xx)
+#elif defined(CONFIG_PPC64) || defined(CONFIG_PPC_BOOK3S_32)
         if (cur_cpu_spec->pmc_type == PPC_PMC_IBM)
                 mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~(MMCR0_PMXE|MMCR0_PMAO));
 #else
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index fe758cedb93f..4181ec715f88 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -124,12 +124,12 @@ static void __init move_device_tree(void)
         size = fdt_totalsize(initial_boot_params);
 
         if ((memory_limit && (start + size) > PHYSICAL_START + memory_limit) ||
-                        overlaps_crashkernel(start, size) ||
-                        overlaps_initrd(start, size)) {
+            !memblock_is_memory(start + size - 1) ||
+            overlaps_crashkernel(start, size) || overlaps_initrd(start, size)) {
                 p = __va(memblock_phys_alloc(size, PAGE_SIZE));
                 memcpy(p, initial_boot_params, size);
                 initial_boot_params = p;
-                DBG("Moved device tree to 0x%p\n", p);
+                DBG("Moved device tree to 0x%px\n", p);
         }
 
         DBG("<- move_device_tree\n");
@@ -689,7 +689,7 @@ void __init early_init_devtree(void *params)
 {
         phys_addr_t limit;
 
-        DBG(" -> early_init_devtree(%p)\n", params);
+        DBG(" -> early_init_devtree(%px)\n", params);
 
         /* Too early to BUG_ON(), do it by hand */
         if (!early_init_dt_verify(params))
@@ -749,7 +749,7 @@ void __init early_init_devtree(void *params)
         memblock_allow_resize();
         memblock_dump_all();
 
-        DBG("Phys. mem: %llx\n", memblock_phys_mem_size());
+        DBG("Phys. mem: %llx\n", (unsigned long long)memblock_phys_mem_size());
 
         /* We may need to relocate the flat tree, do it now.
          * FIXME .. and the initrd too? */
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 714c3480c52d..cdd5d1d3ae41 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -3263,32 +3263,40 @@ static inline int do_seccomp(struct pt_regs *regs) { return 0; }
  */
 long do_syscall_trace_enter(struct pt_regs *regs)
 {
+        u32 flags;
+
         user_exit();
 
-        if (test_thread_flag(TIF_SYSCALL_EMU)) {
-                /*
-                 * A nonzero return code from tracehook_report_syscall_entry()
-                 * tells us to prevent the syscall execution, but we are not
-                 * going to execute it anyway.
-                 *
-                 * Returning -1 will skip the syscall execution. We want to
-                 * avoid clobbering any register also, thus, not 'gotoing'
-                 * skip label.
-                 */
-                if (tracehook_report_syscall_entry(regs))
-                        ;
-                return -1;
-        }
+        flags = READ_ONCE(current_thread_info()->flags) &
+                (_TIF_SYSCALL_EMU | _TIF_SYSCALL_TRACE);
 
-        /*
-         * The tracer may decide to abort the syscall, if so tracehook
-         * will return !0. Note that the tracer may also just change
-         * regs->gpr[0] to an invalid syscall number, that is handled
-         * below on the exit path.
-         */
-        if (test_thread_flag(TIF_SYSCALL_TRACE) &&
-            tracehook_report_syscall_entry(regs))
-                goto skip;
+        if (flags) {
+                int rc = tracehook_report_syscall_entry(regs);
+
+                if (unlikely(flags & _TIF_SYSCALL_EMU)) {
+                        /*
+                         * A nonzero return code from
+                         * tracehook_report_syscall_entry() tells us to prevent
+                         * the syscall execution, but we are not going to
+                         * execute it anyway.
+                         *
+                         * Returning -1 will skip the syscall execution. We want
+                         * to avoid clobbering any registers, so we don't goto
+                         * the skip label below.
+                         */
+                        return -1;
+                }
+
+                if (rc) {
+                        /*
+                         * The tracer decided to abort the syscall. Note that
+                         * the tracer may also just change regs->gpr[0] to an
+                         * invalid syscall number, that is handled below on the
+                         * exit path.
+                         */
+                        goto skip;
+                }
+        }
 
         /* Run seccomp after ptrace; allow it to set gpr[3]. */
         if (do_seccomp(regs))
diff --git a/arch/powerpc/kernel/security.c b/arch/powerpc/kernel/security.c
index f6f469fc4073..9b8631533e02 100644
--- a/arch/powerpc/kernel/security.c
+++ b/arch/powerpc/kernel/security.c
@@ -4,6 +4,7 @@
 //
 // Copyright 2018, Michael Ellerman, IBM Corporation.
 
+#include <linux/cpu.h>
 #include <linux/kernel.h>
 #include <linux/device.h>
 #include <linux/seq_buf.h>
@@ -22,10 +23,14 @@ enum count_cache_flush_type {
         COUNT_CACHE_FLUSH_SW    = 0x2,
         COUNT_CACHE_FLUSH_HW    = 0x4,
 };
-static enum count_cache_flush_type count_cache_flush_type;
+static enum count_cache_flush_type count_cache_flush_type = COUNT_CACHE_FLUSH_NONE;
 
 bool barrier_nospec_enabled;
 static bool no_nospec;
+static bool btb_flush_enabled;
+#ifdef CONFIG_PPC_FSL_BOOK3E
+static bool no_spectrev2;
+#endif
 
 static void enable_barrier_nospec(bool enable)
 {
@@ -101,6 +106,23 @@ static __init int barrier_nospec_debugfs_init(void)
 device_initcall(barrier_nospec_debugfs_init);
 #endif /* CONFIG_DEBUG_FS */
 
+#ifdef CONFIG_PPC_FSL_BOOK3E
+static int __init handle_nospectre_v2(char *p)
+{
+        no_spectrev2 = true;
+
+        return 0;
+}
+early_param("nospectre_v2", handle_nospectre_v2);
+void setup_spectre_v2(void)
+{
+        if (no_spectrev2)
+                do_btb_flush_fixups();
+        else
+                btb_flush_enabled = true;
+}
+#endif /* CONFIG_PPC_FSL_BOOK3E */
+
 #ifdef CONFIG_PPC_BOOK3S_64
 ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr, char *buf)
 {
@@ -191,8 +213,11 @@ ssize_t cpu_show_spectre_v2(struct device *dev, struct device_attribute *attr, c
 
                 if (count_cache_flush_type == COUNT_CACHE_FLUSH_HW)
                         seq_buf_printf(&s, "(hardware accelerated)");
-        } else
+        } else if (btb_flush_enabled) {
+                seq_buf_printf(&s, "Mitigation: Branch predictor state flush");
+        } else {
                 seq_buf_printf(&s, "Vulnerable");
+        }
 
         seq_buf_printf(&s, "\n");
 
diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c
index 93ee3703b42f..ca00fbb97cf8 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -687,7 +687,7 @@ int check_legacy_ioport(unsigned long base_port)
                 return ret;
         parent = of_get_parent(np);
         if (parent) {
-                if (strcmp(parent->type, "isa") == 0)
+                if (of_node_is_type(parent, "isa"))
                         ret = 0;
                 of_node_put(parent);
         }
@@ -800,7 +800,7 @@ static __init void print_system_info(void)
 #ifdef CONFIG_PPC_BOOK3S_64
         pr_info("ppc64_pft_size    = 0x%llx\n", ppc64_pft_size);
 #endif
-#ifdef CONFIG_PPC_STD_MMU_32
+#ifdef CONFIG_PPC_BOOK3S_32
         pr_info("Hash_size         = 0x%lx\n", Hash_size);
 #endif
         pr_info("phys_mem_size     = 0x%llx\n",
@@ -830,7 +830,7 @@ static __init void print_system_info(void)
         if (htab_hash_mask)
                 pr_info("htab_hash_mask    = 0x%lx\n", htab_hash_mask);
 #endif
-#ifdef CONFIG_PPC_STD_MMU_32
+#ifdef CONFIG_PPC_BOOK3S_32
         if (Hash)
                 pr_info("Hash              = 0x%p\n", Hash);
         if (Hash_mask)
@@ -974,6 +974,7 @@ void __init setup_arch(char **cmdline_p)
                 ppc_md.setup_arch();
 
         setup_barrier_nospec();
+        setup_spectre_v2();
 
         paging_init();
 
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index 81909600013a..947f904688b0 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -59,7 +59,6 @@ unsigned long ISA_DMA_THRESHOLD;
 unsigned int DMA_MODE_READ;
 unsigned int DMA_MODE_WRITE;
 
-EXPORT_SYMBOL(ISA_DMA_THRESHOLD);
 EXPORT_SYMBOL(DMA_MODE_READ);
 EXPORT_SYMBOL(DMA_MODE_WRITE);
 
@@ -101,8 +100,7 @@ notrace unsigned long __init early_init(unsigned long dt_ptr)
  */
 notrace void __init machine_init(u64 dt_ptr)
 {
-        unsigned int *addr = (unsigned int *)((unsigned long)&patch__memset_nocache +
-                                               patch__memset_nocache);
+        unsigned int *addr = (unsigned int *)patch_site_addr(&patch__memset_nocache);
         unsigned long insn;
 
         /* Configure static keys first, now that we're relocated. */
@@ -240,7 +238,7 @@ void __init exc_lvl_early_init(void)
 
 void __init setup_power_save(void)
 {
-#ifdef CONFIG_6xx
+#ifdef CONFIG_PPC_BOOK3S_32
         if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
             cpu_has_feature(CPU_FTR_CAN_NAP))
                 ppc_md.power_save = ppc6xx_idle;
diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/kernel/signal_32.c
index e6474a45cef5..2d47cc79e5b3 100644
--- a/arch/powerpc/kernel/signal_32.c
+++ b/arch/powerpc/kernel/signal_32.c
@@ -470,9 +470,9 @@ static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame,
                 return 1;
 
         if (sigret) {
-                /* Set up the sigreturn trampoline: li r0,sigret; sc */
-                if (__put_user(0x38000000UL + sigret, &frame->tramp[0])
-                    || __put_user(0x44000002UL, &frame->tramp[1]))
+                /* Set up the sigreturn trampoline: li 0,sigret; sc */
+                if (__put_user(PPC_INST_ADDI + sigret, &frame->tramp[0])
+                    || __put_user(PPC_INST_SC, &frame->tramp[1]))
                         return 1;
                 flush_icache_range((unsigned long) &frame->tramp[0],
                                    (unsigned long) &frame->tramp[2]);
@@ -619,9 +619,9 @@ static int save_tm_user_regs(struct pt_regs *regs,
         if (__put_user(msr, &frame->mc_gregs[PT_MSR]))
                 return 1;
         if (sigret) {
-                /* Set up the sigreturn trampoline: li r0,sigret; sc */
-                if (__put_user(0x38000000UL + sigret, &frame->tramp[0])
-                    || __put_user(0x44000002UL, &frame->tramp[1]))
+                /* Set up the sigreturn trampoline: li 0,sigret; sc */
+                if (__put_user(PPC_INST_ADDI + sigret, &frame->tramp[0])
+                    || __put_user(PPC_INST_SC, &frame->tramp[1]))
                         return 1;
                 flush_icache_range((unsigned long) &frame->tramp[0],
                                    (unsigned long) &frame->tramp[2]);
@@ -848,7 +848,23 @@ static long restore_tm_user_regs(struct pt_regs *regs,
         /* If TM bits are set to the reserved value, it's an invalid context */
         if (MSR_TM_RESV(msr_hi))
                 return 1;
-        /* Pull in the MSR TM bits from the user context */
+
+        /*
+         * Disabling preemption, since it is unsafe to be preempted
+         * with MSR[TS] set without recheckpointing.
+         */
+        preempt_disable();
+
+        /*
+         * CAUTION:
+         * After regs->MSR[TS] being updated, make sure that get_user(),
+         * put_user() or similar functions are *not* called. These
+         * functions can generate page faults which will cause the process
+         * to be de-scheduled with MSR[TS] set but without calling
+         * tm_recheckpoint(). This can cause a bug.
+         *
+         * Pull in the MSR TM bits from the user context
+         */
         regs->msr = (regs->msr & ~MSR_TS_MASK) | (msr_hi & MSR_TS_MASK);
         /* Now, recheckpoint.  This loads up all of the checkpointed (older)
          * registers, including FP and V[S]Rs.  After recheckpointing, the
@@ -873,6 +889,8 @@ static long restore_tm_user_regs(struct pt_regs *regs,
         }
 #endif
 
+        preempt_enable();
+
         return 0;
 }
 #endif
@@ -1140,11 +1158,11 @@ SYSCALL_DEFINE0(rt_sigreturn)
 {
         struct rt_sigframe __user *rt_sf;
         struct pt_regs *regs = current_pt_regs();
+        int tm_restore = 0;
 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
         struct ucontext __user *uc_transact;
         unsigned long msr_hi;
         unsigned long tmp;
-        int tm_restore = 0;
 #endif
         /* Always make any pending restarted system calls return -EINTR */
         current->restart_block.fn = do_no_restart_syscall;
@@ -1192,11 +1210,19 @@ SYSCALL_DEFINE0(rt_sigreturn)
                                 goto bad;
                 }
         }
-        if (!tm_restore)
-                /* Fall through, for non-TM restore */
+        if (!tm_restore) {
+                /*
+                 * Unset regs->msr because ucontext MSR TS is not
+                 * set, and recheckpoint was not called. This avoid
+                 * hitting a TM Bad thing at RFID
+                 */
+                regs->msr &= ~MSR_TS_MASK;
+        }
+        /* Fall through, for non-TM restore */
 #endif
-        if (do_setcontext(&rt_sf->uc, regs, 1))
-                goto bad;
+        if (!tm_restore)
+                if (do_setcontext(&rt_sf->uc, regs, 1))
+                        goto bad;
 
         /*
          * It's not clear whether or why it is desirable to save the
diff --git a/arch/powerpc/kernel/signal_64.c b/arch/powerpc/kernel/signal_64.c
index 83d51bf586c7..0935fe6c282a 100644
--- a/arch/powerpc/kernel/signal_64.c
+++ b/arch/powerpc/kernel/signal_64.c
@@ -467,20 +467,6 @@ static long restore_tm_sigcontexts(struct task_struct *tsk,
         if (MSR_TM_RESV(msr))
                 return -EINVAL;
 
-        /* pull in MSR TS bits from user context */
-        regs->msr = (regs->msr & ~MSR_TS_MASK) | (msr & MSR_TS_MASK);
-
-        /*
-         * Ensure that TM is enabled in regs->msr before we leave the signal
-         * handler. It could be the case that (a) user disabled the TM bit
-         * through the manipulation of the MSR bits in uc_mcontext or (b) the
-         * TM bit was disabled because a sufficient number of context switches
-         * happened whilst in the signal handler and load_tm overflowed,
-         * disabling the TM bit. In either case we can end up with an illegal
-         * TM state leading to a TM Bad Thing when we return to userspace.
-         */
-        regs->msr |= MSR_TM;
-
         /* pull in MSR LE from user context */
         regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE);
 
@@ -572,6 +558,34 @@ static long restore_tm_sigcontexts(struct task_struct *tsk,
         tm_enable();
         /* Make sure the transaction is marked as failed */
         tsk->thread.tm_texasr |= TEXASR_FS;
+
+        /*
+         * Disabling preemption, since it is unsafe to be preempted
+         * with MSR[TS] set without recheckpointing.
+         */
+        preempt_disable();
+
+        /* pull in MSR TS bits from user context */
+        regs->msr = (regs->msr & ~MSR_TS_MASK) | (msr & MSR_TS_MASK);
+
+        /*
+         * Ensure that TM is enabled in regs->msr before we leave the signal
+         * handler. It could be the case that (a) user disabled the TM bit
+         * through the manipulation of the MSR bits in uc_mcontext or (b) the
+         * TM bit was disabled because a sufficient number of context switches
+         * happened whilst in the signal handler and load_tm overflowed,
+         * disabling the TM bit. In either case we can end up with an illegal
+         * TM state leading to a TM Bad Thing when we return to userspace.
+         *
+         * CAUTION:
+         * After regs->MSR[TS] being updated, make sure that get_user(),
+         * put_user() or similar functions are *not* called. These
+         * functions can generate page faults which will cause the process
+         * to be de-scheduled with MSR[TS] set but without calling
+         * tm_recheckpoint(). This can cause a bug.
+         */
+        regs->msr |= MSR_TM;
+
         /* This loads the checkpointed FP/VEC state, if used */
         tm_recheckpoint(&tsk->thread);
 
@@ -585,6 +599,8 @@ static long restore_tm_sigcontexts(struct task_struct *tsk,
                 regs->msr |= MSR_VEC;
         }
 
+        preempt_enable();
+
         return err;
 }
 #endif
@@ -598,11 +614,12 @@ static long setup_trampoline(unsigned int syscall, unsigned int __user *tramp)
         long err = 0;
 
         /* addi r1, r1, __SIGNAL_FRAMESIZE  # Pop the dummy stackframe */
-        err |= __put_user(0x38210000UL | (__SIGNAL_FRAMESIZE & 0xffff), &tramp[0]);
+        err |= __put_user(PPC_INST_ADDI | __PPC_RT(R1) | __PPC_RA(R1) |
+                          (__SIGNAL_FRAMESIZE & 0xffff), &tramp[0]);
         /* li r0, __NR_[rt_]sigreturn| */
-        err |= __put_user(0x38000000UL | (syscall & 0xffff), &tramp[1]);
+        err |= __put_user(PPC_INST_ADDI | (syscall & 0xffff), &tramp[1]);
         /* sc */
-        err |= __put_user(0x44000002UL, &tramp[2]);
+        err |= __put_user(PPC_INST_SC, &tramp[2]);
 
         /* Minimal traceback info */
         for (i=TRAMP_TRACEBACK; i < TRAMP_SIZE ;i++)
@@ -740,11 +757,23 @@ SYSCALL_DEFINE0(rt_sigreturn)
                                            &uc_transact->uc_mcontext))
                         goto badframe;
         }
-        else
-        /* Fall through, for non-TM restore */
 #endif
-        if (restore_sigcontext(current, NULL, 1, &uc->uc_mcontext))
-                goto badframe;
+        /* Fall through, for non-TM restore */
+        if (!MSR_TM_ACTIVE(msr)) {
+                /*
+                 * Unset MSR[TS] on the thread regs since MSR from user
+                 * context does not have MSR active, and recheckpoint was
+                 * not called since restore_tm_sigcontexts() was not called
+                 * also.
+                 *
+                 * If not unsetting it, the code can RFID to userspace with
+                 * MSR[TS] set, but without CPU in the proper state,
+                 * causing a TM bad thing.
+                 */
+                current->thread.regs->msr &= ~MSR_TS_MASK;
+                if (restore_sigcontext(current, NULL, 1, &uc->uc_mcontext))
+                        goto badframe;
+        }
 
         if (restore_altstack(&uc->uc_stack))
                 goto badframe;
diff --git a/arch/powerpc/kernel/syscalls/Makefile b/arch/powerpc/kernel/syscalls/Makefile
new file mode 100644
index 000000000000..27b48954808d
--- /dev/null
+++ b/arch/powerpc/kernel/syscalls/Makefile
@@ -0,0 +1,63 @@
+# SPDX-License-Identifier: GPL-2.0
+kapi := arch/$(SRCARCH)/include/generated/asm
+uapi := arch/$(SRCARCH)/include/generated/uapi/asm
+
+_dummy := $(shell [ -d '$(uapi)' ] || mkdir -p '$(uapi)')       \
+          $(shell [ -d '$(kapi)' ] || mkdir -p '$(kapi)')
+
+syscall := $(srctree)/$(src)/syscall.tbl
+syshdr := $(srctree)/$(src)/syscallhdr.sh
+systbl := $(srctree)/$(src)/syscalltbl.sh
+
+quiet_cmd_syshdr = SYSHDR  $@
+      cmd_syshdr = $(CONFIG_SHELL) '$(syshdr)' '$<' '$@'        \
+                   '$(syshdr_abis_$(basetarget))'               \
+                   '$(syshdr_pfx_$(basetarget))'                \
+                   '$(syshdr_offset_$(basetarget))'
+
+quiet_cmd_systbl = SYSTBL  $@
+      cmd_systbl = $(CONFIG_SHELL) '$(systbl)' '$<' '$@'        \
+                   '$(systbl_abis_$(basetarget))'               \
+                   '$(systbl_abi_$(basetarget))'                \
+                   '$(systbl_offset_$(basetarget))'
+
+syshdr_abis_unistd_32 := common,nospu,32
+$(uapi)/unistd_32.h: $(syscall) $(syshdr)
+        $(call if_changed,syshdr)
+
+syshdr_abis_unistd_64 := common,nospu,64
+$(uapi)/unistd_64.h: $(syscall) $(syshdr)
+        $(call if_changed,syshdr)
+
+systbl_abis_syscall_table_32 := common,nospu,32
+systbl_abi_syscall_table_32 := 32
+$(kapi)/syscall_table_32.h: $(syscall) $(systbl)
+        $(call if_changed,systbl)
+
+systbl_abis_syscall_table_64 := common,nospu,64
+systbl_abi_syscall_table_64 := 64
+$(kapi)/syscall_table_64.h: $(syscall) $(systbl)
+        $(call if_changed,systbl)
+
+systbl_abis_syscall_table_c32 := common,nospu,32
+systbl_abi_syscall_table_c32 := c32
+$(kapi)/syscall_table_c32.h: $(syscall) $(systbl)
+        $(call if_changed,systbl)
+
+systbl_abis_syscall_table_spu := common,spu
+systbl_abi_syscall_table_spu := spu
+$(kapi)/syscall_table_spu.h: $(syscall) $(systbl)
+        $(call if_changed,systbl)
+
+uapisyshdr-y            += unistd_32.h unistd_64.h
+kapisyshdr-y            += syscall_table_32.h           \
+                           syscall_table_64.h           \
+                           syscall_table_c32.h          \
+                           syscall_table_spu.h
+
+targets += $(uapisyshdr-y) $(kapisyshdr-y)
+
+PHONY += all
+all: $(addprefix $(uapi)/,$(uapisyshdr-y))
+all: $(addprefix $(kapi)/,$(kapisyshdr-y))
+        @:
diff --git a/arch/powerpc/kernel/syscalls/syscall.tbl b/arch/powerpc/kernel/syscalls/syscall.tbl
new file mode 100644
index 000000000000..db3bbb8744af
--- /dev/null
+++ b/arch/powerpc/kernel/syscalls/syscall.tbl
@@ -0,0 +1,427 @@
+# SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
+#
+# system call numbers and entry vectors for powerpc
+#
+# The format is:
+# <number> <abi> <name> <entry point> <compat entry point>
+#
+# The <abi> can be common, spu, nospu, 64, or 32 for this file.
+#
+0       nospu   restart_syscall                 sys_restart_syscall
+1       nospu   exit                            sys_exit
+2       nospu   fork                            ppc_fork
+3       common  read                            sys_read
+4       common  write                           sys_write
+5       common  open                            sys_open                        compat_sys_open
+6       common  close                           sys_close
+7       common  waitpid                         sys_waitpid
+8       common  creat                           sys_creat
+9       common  link                            sys_link
+10      common  unlink                          sys_unlink
+11      nospu   execve                          sys_execve                      compat_sys_execve
+12      common  chdir                           sys_chdir
+13      common  time                            sys_time                        compat_sys_time
+14      common  mknod                           sys_mknod
+15      common  chmod                           sys_chmod
+16      common  lchown                          sys_lchown
+17      common  break                           sys_ni_syscall
+18      32      oldstat                         sys_stat                        sys_ni_syscall
+18      64      oldstat                         sys_ni_syscall
+18      spu     oldstat                         sys_ni_syscall
+19      common  lseek                           sys_lseek                       compat_sys_lseek
+20      common  getpid                          sys_getpid
+21      nospu   mount                           sys_mount                       compat_sys_mount
+22      32      umount                          sys_oldumount
+22      64      umount                          sys_ni_syscall
+22      spu     umount                          sys_ni_syscall
+23      common  setuid                          sys_setuid
+24      common  getuid                          sys_getuid
+25      common  stime                           sys_stime                       compat_sys_stime
+26      nospu   ptrace                          sys_ptrace                      compat_sys_ptrace
+27      common  alarm                           sys_alarm
+28      32      oldfstat                        sys_fstat                       sys_ni_syscall
+28      64      oldfstat                        sys_ni_syscall
+28      spu     oldfstat                        sys_ni_syscall
+29      nospu   pause                           sys_pause
+30      nospu   utime                           sys_utime                       compat_sys_utime
+31      common  stty                            sys_ni_syscall
+32      common  gtty                            sys_ni_syscall
+33      common  access                          sys_access
+34      common  nice                            sys_nice
+35      common  ftime                           sys_ni_syscall
+36      common  sync                            sys_sync
+37      common  kill                            sys_kill
+38      common  rename                          sys_rename
+39      common  mkdir                           sys_mkdir
+40      common  rmdir                           sys_rmdir
+41      common  dup                             sys_dup
+42      common  pipe                            sys_pipe
+43      common  times                           sys_times                       compat_sys_times
+44      common  prof                            sys_ni_syscall
+45      common  brk                             sys_brk
+46      common  setgid                          sys_setgid
+47      common  getgid                          sys_getgid
+48      nospu   signal                          sys_signal
+49      common  geteuid                         sys_geteuid
+50      common  getegid                         sys_getegid
+51      nospu   acct                            sys_acct
+52      nospu   umount2                         sys_umount
+53      common  lock                            sys_ni_syscall
+54      common  ioctl                           sys_ioctl                       compat_sys_ioctl
+55      common  fcntl                           sys_fcntl                       compat_sys_fcntl
+56      common  mpx                             sys_ni_syscall
+57      common  setpgid                         sys_setpgid
+58      common  ulimit                          sys_ni_syscall
+59      32      oldolduname                     sys_olduname
+59      64      oldolduname                     sys_ni_syscall
+59      spu     oldolduname                     sys_ni_syscall
+60      common  umask                           sys_umask
+61      common  chroot                          sys_chroot
+62      nospu   ustat                           sys_ustat                       compat_sys_ustat
+63      common  dup2                            sys_dup2
+64      common  getppid                         sys_getppid
+65      common  getpgrp                         sys_getpgrp
+66      common  setsid                          sys_setsid
+67      32      sigaction                       sys_sigaction                   compat_sys_sigaction
+67      64      sigaction                       sys_ni_syscall
+67      spu     sigaction                       sys_ni_syscall
+68      common  sgetmask                        sys_sgetmask
+69      common  ssetmask                        sys_ssetmask
+70      common  setreuid                        sys_setreuid
+71      common  setregid                        sys_setregid
+72      32      sigsuspend                      sys_sigsuspend
+72      64      sigsuspend                      sys_ni_syscall
+72      spu     sigsuspend                      sys_ni_syscall
+73      32      sigpending                      sys_sigpending                  compat_sys_sigpending
+73      64      sigpending                      sys_ni_syscall
+73      spu     sigpending                      sys_ni_syscall
+74      common  sethostname                     sys_sethostname
+75      common  setrlimit                       sys_setrlimit                   compat_sys_setrlimit
+76      32      getrlimit                       sys_old_getrlimit               compat_sys_old_getrlimit
+76      64      getrlimit                       sys_ni_syscall
+76      spu     getrlimit                       sys_ni_syscall
+77      common  getrusage                       sys_getrusage                   compat_sys_getrusage
+78      common  gettimeofday                    sys_gettimeofday                compat_sys_gettimeofday
+79      common  settimeofday                    sys_settimeofday                compat_sys_settimeofday
+80      common  getgroups                       sys_getgroups
+81      common  setgroups                       sys_setgroups
+82      32      select                          ppc_select                      sys_ni_syscall
+82      64      select                          sys_ni_syscall
+82      spu     select                          sys_ni_syscall
+83      common  symlink                         sys_symlink
+84      32      oldlstat                        sys_lstat                       sys_ni_syscall
+84      64      oldlstat                        sys_ni_syscall
+84      spu     oldlstat                        sys_ni_syscall
+85      common  readlink                        sys_readlink
+86      nospu   uselib                          sys_uselib
+87      nospu   swapon                          sys_swapon
+88      nospu   reboot                          sys_reboot
+89      32      readdir                         sys_old_readdir                 compat_sys_old_readdir
+89      64      readdir                         sys_ni_syscall
+89      spu     readdir                         sys_ni_syscall
+90      common  mmap                            sys_mmap
+91      common  munmap                          sys_munmap
+92      common  truncate                        sys_truncate                    compat_sys_truncate
+93      common  ftruncate                       sys_ftruncate                   compat_sys_ftruncate
+94      common  fchmod                          sys_fchmod
+95      common  fchown                          sys_fchown
+96      common  getpriority                     sys_getpriority
+97      common  setpriority                     sys_setpriority
+98      common  profil                          sys_ni_syscall
+99      nospu   statfs                          sys_statfs                      compat_sys_statfs
+100     nospu   fstatfs                         sys_fstatfs                     compat_sys_fstatfs
+101     common  ioperm                          sys_ni_syscall
+102     common  socketcall                      sys_socketcall                  compat_sys_socketcall
+103     common  syslog                          sys_syslog
+104     common  setitimer                       sys_setitimer                   compat_sys_setitimer
+105     common  getitimer                       sys_getitimer                   compat_sys_getitimer
+106     common  stat                            sys_newstat                     compat_sys_newstat
+107     common  lstat                           sys_newlstat                    compat_sys_newlstat
+108     common  fstat                           sys_newfstat                    compat_sys_newfstat
+109     32      olduname                        sys_uname
+109     64      olduname                        sys_ni_syscall
+109     spu     olduname                        sys_ni_syscall
+110     common  iopl                            sys_ni_syscall
+111     common  vhangup                         sys_vhangup
+112     common  idle                            sys_ni_syscall
+113     common  vm86                            sys_ni_syscall
+114     common  wait4                           sys_wait4                       compat_sys_wait4
+115     nospu   swapoff                         sys_swapoff
+116     common  sysinfo                         sys_sysinfo                     compat_sys_sysinfo
+117     nospu   ipc                             sys_ipc                         compat_sys_ipc
+118     common  fsync                           sys_fsync
+119     32      sigreturn                       sys_sigreturn                   compat_sys_sigreturn
+119     64      sigreturn                       sys_ni_syscall
+119     spu     sigreturn                       sys_ni_syscall
+120     nospu   clone                           ppc_clone
+121     common  setdomainname                   sys_setdomainname
+122     common  uname                           sys_newuname
+123     common  modify_ldt                      sys_ni_syscall
+124     common  adjtimex                        sys_adjtimex                    compat_sys_adjtimex
+125     common  mprotect                        sys_mprotect
+126     32      sigprocmask                     sys_sigprocmask                 compat_sys_sigprocmask
+126     64      sigprocmask                     sys_ni_syscall
+126     spu     sigprocmask                     sys_ni_syscall
+127     common  create_module                   sys_ni_syscall
+128     nospu   init_module                     sys_init_module
+129     nospu   delete_module                   sys_delete_module
+130     common  get_kernel_syms                 sys_ni_syscall
+131     nospu   quotactl                        sys_quotactl
+132     common  getpgid                         sys_getpgid
+133     common  fchdir                          sys_fchdir
+134     common  bdflush                         sys_bdflush
+135     common  sysfs                           sys_sysfs
+136     32      personality                     sys_personality                 ppc64_personality
+136     64      personality                     ppc64_personality
+136     spu     personality                     ppc64_personality
+137     common  afs_syscall                     sys_ni_syscall
+138     common  setfsuid                        sys_setfsuid
+139     common  setfsgid                        sys_setfsgid
+140     common  _llseek                         sys_llseek
+141     common  getdents                        sys_getdents                    compat_sys_getdents
+142     common  _newselect                      sys_select                      compat_sys_select
+143     common  flock                           sys_flock
+144     common  msync                           sys_msync
+145     common  readv                           sys_readv                       compat_sys_readv
+146     common  writev                          sys_writev                      compat_sys_writev
+147     common  getsid                          sys_getsid
+148     common  fdatasync                       sys_fdatasync
+149     nospu   _sysctl                         sys_sysctl                      compat_sys_sysctl
+150     common  mlock                           sys_mlock
+151     common  munlock                         sys_munlock
+152     common  mlockall                        sys_mlockall
+153     common  munlockall                      sys_munlockall
+154     common  sched_setparam                  sys_sched_setparam
+155     common  sched_getparam                  sys_sched_getparam
+156     common  sched_setscheduler              sys_sched_setscheduler
+157     common  sched_getscheduler              sys_sched_getscheduler
+158     common  sched_yield                     sys_sched_yield
+159     common  sched_get_priority_max          sys_sched_get_priority_max
+160     common  sched_get_priority_min          sys_sched_get_priority_min
+161     common  sched_rr_get_interval           sys_sched_rr_get_interval       compat_sys_sched_rr_get_interval
+162     common  nanosleep                       sys_nanosleep                   compat_sys_nanosleep
+163     common  mremap                          sys_mremap
+164     common  setresuid                       sys_setresuid
+165     common  getresuid                       sys_getresuid
+166     common  query_module                    sys_ni_syscall
+167     common  poll                            sys_poll
+168     common  nfsservctl                      sys_ni_syscall
+169     common  setresgid                       sys_setresgid
+170     common  getresgid                       sys_getresgid
+171     common  prctl                           sys_prctl
+172     nospu   rt_sigreturn                    sys_rt_sigreturn                compat_sys_rt_sigreturn
+173     nospu   rt_sigaction                    sys_rt_sigaction                compat_sys_rt_sigaction
+174     nospu   rt_sigprocmask                  sys_rt_sigprocmask              compat_sys_rt_sigprocmask
+175     nospu   rt_sigpending                   sys_rt_sigpending               compat_sys_rt_sigpending
+176     nospu   rt_sigtimedwait                 sys_rt_sigtimedwait             compat_sys_rt_sigtimedwait
+177     nospu   rt_sigqueueinfo                 sys_rt_sigqueueinfo             compat_sys_rt_sigqueueinfo
+178     nospu   rt_sigsuspend                   sys_rt_sigsuspend               compat_sys_rt_sigsuspend
+179     common  pread64                         sys_pread64                     compat_sys_pread64
+180     common  pwrite64                        sys_pwrite64                    compat_sys_pwrite64
+181     common  chown                           sys_chown
+182     common  getcwd                          sys_getcwd
+183     common  capget                          sys_capget
+184     common  capset                          sys_capset
+185     nospu   sigaltstack                     sys_sigaltstack                 compat_sys_sigaltstack
+186     32      sendfile                        sys_sendfile                    compat_sys_sendfile
+186     64      sendfile                        sys_sendfile64
+186     spu     sendfile                        sys_sendfile64
+187     common  getpmsg                         sys_ni_syscall
+188     common  putpmsg                         sys_ni_syscall
+189     nospu   vfork                           ppc_vfork
+190     common  ugetrlimit                      sys_getrlimit                   compat_sys_getrlimit
+191     common  readahead                       sys_readahead                   compat_sys_readahead
+192     32      mmap2                           sys_mmap2                       compat_sys_mmap2
+193     32      truncate64                      sys_truncate64                  compat_sys_truncate64
+194     32      ftruncate64                     sys_ftruncate64                 compat_sys_ftruncate64
+195     32      stat64                          sys_stat64
+196     32      lstat64                         sys_lstat64
+197     32      fstat64                         sys_fstat64
+198     nospu   pciconfig_read                  sys_pciconfig_read
+199     nospu   pciconfig_write                 sys_pciconfig_write
+200     nospu   pciconfig_iobase                sys_pciconfig_iobase
+201     common  multiplexer                     sys_ni_syscall
+202     common  getdents64                      sys_getdents64
+203     common  pivot_root                      sys_pivot_root
+204     32      fcntl64                         sys_fcntl64                     compat_sys_fcntl64
+205     common  madvise                         sys_madvise
+206     common  mincore                         sys_mincore
+207     common  gettid                          sys_gettid
+208     common  tkill                           sys_tkill
+209     common  setxattr                        sys_setxattr
+210     common  lsetxattr                       sys_lsetxattr
+211     common  fsetxattr                       sys_fsetxattr
+212     common  getxattr                        sys_getxattr
+213     common  lgetxattr                       sys_lgetxattr
+214     common  fgetxattr                       sys_fgetxattr
+215     common  listxattr                       sys_listxattr
+216     common  llistxattr                      sys_llistxattr
+217     common  flistxattr                      sys_flistxattr
+218     common  removexattr                     sys_removexattr
+219     common  lremovexattr                    sys_lremovexattr
+220     common  fremovexattr                    sys_fremovexattr
+221     common  futex                           sys_futex                       compat_sys_futex
+222     common  sched_setaffinity               sys_sched_setaffinity           compat_sys_sched_setaffinity
+223     common  sched_getaffinity               sys_sched_getaffinity           compat_sys_sched_getaffinity
+# 224 unused
+225     common  tuxcall                         sys_ni_syscall
+226     32      sendfile64                      sys_sendfile64                  compat_sys_sendfile64
+227     common  io_setup                        sys_io_setup                    compat_sys_io_setup
+228     common  io_destroy                      sys_io_destroy
+229     common  io_getevents                    sys_io_getevents                compat_sys_io_getevents
+230     common  io_submit                       sys_io_submit                   compat_sys_io_submit
+231     common  io_cancel                       sys_io_cancel
+232     nospu   set_tid_address                 sys_set_tid_address
+233     common  fadvise64                       sys_fadvise64                   ppc32_fadvise64
+234     nospu   exit_group                      sys_exit_group
+235     nospu   lookup_dcookie                  sys_lookup_dcookie              compat_sys_lookup_dcookie
+236     common  epoll_create                    sys_epoll_create
+237     common  epoll_ctl                       sys_epoll_ctl
+238     common  epoll_wait                      sys_epoll_wait
+239     common  remap_file_pages                sys_remap_file_pages
+240     common  timer_create                    sys_timer_create                compat_sys_timer_create
+241     common  timer_settime                   sys_timer_settime               compat_sys_timer_settime
+242     common  timer_gettime                   sys_timer_gettime               compat_sys_timer_gettime
+243     common  timer_getoverrun                sys_timer_getoverrun
+244     common  timer_delete                    sys_timer_delete
+245     common  clock_settime                   sys_clock_settime               compat_sys_clock_settime
+246     common  clock_gettime                   sys_clock_gettime               compat_sys_clock_gettime
+247     common  clock_getres                    sys_clock_getres                compat_sys_clock_getres
+248     common  clock_nanosleep                 sys_clock_nanosleep             compat_sys_clock_nanosleep
+249     32      swapcontext                     ppc_swapcontext                 ppc32_swapcontext
+249     64      swapcontext                     ppc64_swapcontext
+249     spu     swapcontext                     sys_ni_syscall
+250     common  tgkill                          sys_tgkill
+251     common  utimes                          sys_utimes                      compat_sys_utimes
+252     common  statfs64                        sys_statfs64                    compat_sys_statfs64
+253     common  fstatfs64                       sys_fstatfs64                   compat_sys_fstatfs64
+254     32      fadvise64_64                    ppc_fadvise64_64
+254     spu     fadvise64_64                    sys_ni_syscall
+255     common  rtas                            sys_rtas
+256     32      sys_debug_setcontext            sys_debug_setcontext            sys_ni_syscall
+256     64      sys_debug_setcontext            sys_ni_syscall
+256     spu     sys_debug_setcontext            sys_ni_syscall
+# 257 reserved for vserver
+258     nospu   migrate_pages                   sys_migrate_pages               compat_sys_migrate_pages
+259     nospu   mbind                           sys_mbind                       compat_sys_mbind
+260     nospu   get_mempolicy                   sys_get_mempolicy               compat_sys_get_mempolicy
+261     nospu   set_mempolicy                   sys_set_mempolicy               compat_sys_set_mempolicy
+262     nospu   mq_open                         sys_mq_open                     compat_sys_mq_open
+263     nospu   mq_unlink                       sys_mq_unlink
+264     nospu   mq_timedsend                    sys_mq_timedsend                compat_sys_mq_timedsend
+265     nospu   mq_timedreceive                 sys_mq_timedreceive             compat_sys_mq_timedreceive
+266     nospu   mq_notify                       sys_mq_notify                   compat_sys_mq_notify
+267     nospu   mq_getsetattr                   sys_mq_getsetattr               compat_sys_mq_getsetattr
+268     nospu   kexec_load                      sys_kexec_load                  compat_sys_kexec_load
+269     nospu   add_key                         sys_add_key
+270     nospu   request_key                     sys_request_key
+271     nospu   keyctl                          sys_keyctl                      compat_sys_keyctl
+272     nospu   waitid                          sys_waitid                      compat_sys_waitid
+273     nospu   ioprio_set                      sys_ioprio_set
+274     nospu   ioprio_get                      sys_ioprio_get
+275     nospu   inotify_init                    sys_inotify_init
+276     nospu   inotify_add_watch               sys_inotify_add_watch
+277     nospu   inotify_rm_watch                sys_inotify_rm_watch
+278     nospu   spu_run                         sys_spu_run
+279     nospu   spu_create                      sys_spu_create
+280     nospu   pselect6                        sys_pselect6                    compat_sys_pselect6
+281     nospu   ppoll                           sys_ppoll                       compat_sys_ppoll
+282     common  unshare                         sys_unshare
+283     common  splice                          sys_splice
+284     common  tee                             sys_tee
+285     common  vmsplice                        sys_vmsplice                    compat_sys_vmsplice
+286     common  openat                          sys_openat                      compat_sys_openat
+287     common  mkdirat                         sys_mkdirat
+288     common  mknodat                         sys_mknodat
+289     common  fchownat                        sys_fchownat
+290     common  futimesat                       sys_futimesat                   compat_sys_futimesat
+291     32      fstatat64                       sys_fstatat64
+291     64      newfstatat                      sys_newfstatat
+291     spu     newfstatat                      sys_newfstatat
+292     common  unlinkat                        sys_unlinkat
+293     common  renameat                        sys_renameat
+294     common  linkat                          sys_linkat
+295     common  symlinkat                       sys_symlinkat
+296     common  readlinkat                      sys_readlinkat
+297     common  fchmodat                        sys_fchmodat
+298     common  faccessat                       sys_faccessat
+299     common  get_robust_list                 sys_get_robust_list             compat_sys_get_robust_list
+300     common  set_robust_list                 sys_set_robust_list             compat_sys_set_robust_list
+301     common  move_pages                      sys_move_pages                  compat_sys_move_pages
+302     common  getcpu                          sys_getcpu
+303     nospu   epoll_pwait                     sys_epoll_pwait                 compat_sys_epoll_pwait
+304     common  utimensat                       sys_utimensat                   compat_sys_utimensat
+305     common  signalfd                        sys_signalfd                    compat_sys_signalfd
+306     common  timerfd_create                  sys_timerfd_create
+307     common  eventfd                         sys_eventfd
+308     common  sync_file_range2                sys_sync_file_range2            compat_sys_sync_file_range2
+309     nospu   fallocate                       sys_fallocate                   compat_sys_fallocate
+310     nospu   subpage_prot                    sys_subpage_prot
+311     common  timerfd_settime                 sys_timerfd_settime             compat_sys_timerfd_settime
+312     common  timerfd_gettime                 sys_timerfd_gettime             compat_sys_timerfd_gettime
+313     common  signalfd4                       sys_signalfd4                   compat_sys_signalfd4
+314     common  eventfd2                        sys_eventfd2
+315     common  epoll_create1                   sys_epoll_create1
+316     common  dup3                            sys_dup3
+317     common  pipe2                           sys_pipe2
+318     nospu   inotify_init1                   sys_inotify_init1
+319     common  perf_event_open                 sys_perf_event_open
+320     common  preadv                          sys_preadv                      compat_sys_preadv
+321     common  pwritev                         sys_pwritev                     compat_sys_pwritev
+322     nospu   rt_tgsigqueueinfo               sys_rt_tgsigqueueinfo           compat_sys_rt_tgsigqueueinfo
+323     nospu   fanotify_init                   sys_fanotify_init
+324     nospu   fanotify_mark                   sys_fanotify_mark               compat_sys_fanotify_mark
+325     common  prlimit64                       sys_prlimit64
+326     common  socket                          sys_socket
+327     common  bind                            sys_bind
+328     common  connect                         sys_connect
+329     common  listen                          sys_listen
+330     common  accept                          sys_accept
+331     common  getsockname                     sys_getsockname
+332     common  getpeername                     sys_getpeername
+333     common  socketpair                      sys_socketpair
+334     common  send                            sys_send
+335     common  sendto                          sys_sendto
+336     common  recv                            sys_recv                        compat_sys_recv
+337     common  recvfrom                        sys_recvfrom                    compat_sys_recvfrom
+338     common  shutdown                        sys_shutdown
+339     common  setsockopt                      sys_setsockopt                  compat_sys_setsockopt
+340     common  getsockopt                      sys_getsockopt                  compat_sys_getsockopt
+341     common  sendmsg                         sys_sendmsg                     compat_sys_sendmsg
+342     common  recvmsg                         sys_recvmsg                     compat_sys_recvmsg
+343     common  recvmmsg                        sys_recvmmsg                    compat_sys_recvmmsg
+344     common  accept4                         sys_accept4
+345     common  name_to_handle_at               sys_name_to_handle_at
+346     common  open_by_handle_at               sys_open_by_handle_at           compat_sys_open_by_handle_at
+347     common  clock_adjtime                   sys_clock_adjtime               compat_sys_clock_adjtime
+348     common  syncfs                          sys_syncfs
+349     common  sendmmsg                        sys_sendmmsg                    compat_sys_sendmmsg
+350     common  setns                           sys_setns
+351     nospu   process_vm_readv                sys_process_vm_readv            compat_sys_process_vm_readv
+352     nospu   process_vm_writev               sys_process_vm_writev           compat_sys_process_vm_writev
+353     nospu   finit_module                    sys_finit_module
+354     nospu   kcmp                            sys_kcmp
+355     common  sched_setattr                   sys_sched_setattr
+356     common  sched_getattr                   sys_sched_getattr
+357     common  renameat2                       sys_renameat2
+358     common  seccomp                         sys_seccomp
+359     common  getrandom                       sys_getrandom
+360     common  memfd_create                    sys_memfd_create
+361     common  bpf                             sys_bpf
+362     nospu   execveat                        sys_execveat                    compat_sys_execveat
+363     32      switch_endian                   sys_ni_syscall
+363     64      switch_endian                   ppc_switch_endian
+363     spu     switch_endian                   sys_ni_syscall
+364     common  userfaultfd                     sys_userfaultfd
+365     common  membarrier                      sys_membarrier
+378     nospu   mlock2                          sys_mlock2
+379     nospu   copy_file_range                 sys_copy_file_range
+380     common  preadv2                         sys_preadv2                     compat_sys_preadv2
+381     common  pwritev2                        sys_pwritev2                    compat_sys_pwritev2
+382     nospu   kexec_file_load                 sys_kexec_file_load
+383     nospu   statx                           sys_statx
+384     nospu   pkey_alloc                      sys_pkey_alloc
+385     nospu   pkey_free                       sys_pkey_free
+386     nospu   pkey_mprotect                   sys_pkey_mprotect
+387     nospu   rseq                            sys_rseq
+388     nospu   io_pgetevents                   sys_io_pgetevents               compat_sys_io_pgetevents
diff --git a/arch/powerpc/kernel/syscalls/syscallhdr.sh b/arch/powerpc/kernel/syscalls/syscallhdr.sh
new file mode 100644
index 000000000000..c0a9a32937f1
--- /dev/null
+++ b/arch/powerpc/kernel/syscalls/syscallhdr.sh
@@ -0,0 +1,37 @@
+#!/bin/sh
+# SPDX-License-Identifier: GPL-2.0
+
+in="$1"
+out="$2"
+my_abis=`echo "($3)" | tr ',' '|'`
+prefix="$4"
+offset="$5"
+
+fileguard=_UAPI_ASM_POWERPC_`basename "$out" | sed \
+        -e 'y/abcdefghijklmnopqrstuvwxyz/ABCDEFGHIJKLMNOPQRSTUVWXYZ/' \
+        -e 's/[^A-Z0-9_]/_/g' -e 's/__/_/g'`
+grep -E "^[0-9A-Fa-fXx]+[[:space:]]+${my_abis}" "$in" | sort -n | (
+        printf "#ifndef %s\n" "${fileguard}"
+        printf "#define %s\n" "${fileguard}"
+        printf "\n"
+
+        nxt=0
+        while read nr abi name entry compat ; do
+                if [ -z "$offset" ]; then
+                        printf "#define __NR_%s%s\t%s\n" \
+                                "${prefix}" "${name}" "${nr}"
+                else
+                        printf "#define __NR_%s%s\t(%s + %s)\n" \
+                                "${prefix}" "${name}" "${offset}" "${nr}"
+                fi
+                nxt=$((nr+1))
+        done
+
+        printf "\n"
+        printf "#ifdef __KERNEL__\n"
+        printf "#define __NR_syscalls\t%s\n" "${nxt}"
+        printf "#endif\n"
+        printf "\n"
+        printf "#endif /* %s */" "${fileguard}"
+        printf "\n"
+) > "$out"
diff --git a/arch/powerpc/kernel/syscalls/syscalltbl.sh b/arch/powerpc/kernel/syscalls/syscalltbl.sh
new file mode 100644
index 000000000000..fd620490a542
--- /dev/null
+++ b/arch/powerpc/kernel/syscalls/syscalltbl.sh
@@ -0,0 +1,36 @@
+#!/bin/sh
+# SPDX-License-Identifier: GPL-2.0
+
+in="$1"
+out="$2"
+my_abis=`echo "($3)" | tr ',' '|'`
+my_abi="$4"
+offset="$5"
+
+emit() {
+        t_nxt="$1"
+        t_nr="$2"
+        t_entry="$3"
+
+        while [ $t_nxt -lt $t_nr ]; do
+                printf "__SYSCALL(%s,sys_ni_syscall, )\n" "${t_nxt}"
+                t_nxt=$((t_nxt+1))
+        done
+        printf "__SYSCALL(%s,%s, )\n" "${t_nxt}" "${t_entry}"
+}
+
+grep -E "^[0-9A-Fa-fXx]+[[:space:]]+${my_abis}" "$in" | sort -n | (
+        nxt=0
+        if [ -z "$offset" ]; then
+                offset=0
+        fi
+
+        while read nr abi name entry compat ; do
+                if [ "$my_abi" = "c32" ] && [ ! -z "$compat" ]; then
+                        emit $((nxt+offset)) $((nr+offset)) $compat
+                else
+                        emit $((nxt+offset)) $((nr+offset)) $entry
+                fi
+                nxt=$((nr+1))
+        done
+) > "$out"
diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c
index 755dc98a57ae..e8e93c2c7d03 100644
--- a/arch/powerpc/kernel/sysfs.c
+++ b/arch/powerpc/kernel/sysfs.c
@@ -457,7 +457,7 @@ static ssize_t __used \
 #define HAS_PPC_PMC_CLASSIC     1
 #define HAS_PPC_PMC_IBM         1
 #define HAS_PPC_PMC_PA6T        1
-#elif defined(CONFIG_6xx)
+#elif defined(CONFIG_PPC_BOOK3S_32)
 #define HAS_PPC_PMC_CLASSIC     1
 #define HAS_PPC_PMC_IBM         1
 #define HAS_PPC_PMC_G4          1
diff --git a/arch/powerpc/kernel/systbl.S b/arch/powerpc/kernel/systbl.S
index 919a32746ede..23265a28740b 100644
--- a/arch/powerpc/kernel/systbl.S
+++ b/arch/powerpc/kernel/systbl.S
@@ -16,28 +16,6 @@
 
 #include <asm/ppc_asm.h>
 
-#ifdef CONFIG_PPC64
-#define SYSCALL(func)           .8byte  DOTSYM(sys_##func),DOTSYM(sys_##func)
-#define COMPAT_SYS(func)        .8byte  DOTSYM(sys_##func),DOTSYM(compat_sys_##func)
-#define PPC_SYS(func)           .8byte  DOTSYM(ppc_##func),DOTSYM(ppc_##func)
-#define OLDSYS(func)            .8byte  DOTSYM(sys_ni_syscall),DOTSYM(sys_ni_syscall)
-#define SYS32ONLY(func)         .8byte  DOTSYM(sys_ni_syscall),DOTSYM(compat_sys_##func)
-#define PPC64ONLY(func)         .8byte  DOTSYM(ppc_##func),DOTSYM(sys_ni_syscall)
-#define SYSX(f, f3264, f32)     .8byte  DOTSYM(f),DOTSYM(f3264)
-#else
-#define SYSCALL(func)           .long   sys_##func
-#define COMPAT_SYS(func)        .long   sys_##func
-#define PPC_SYS(func)           .long   ppc_##func
-#define OLDSYS(func)            .long   sys_##func
-#define SYS32ONLY(func)         .long   sys_##func
-#define PPC64ONLY(func)         .long   sys_ni_syscall
-#define SYSX(f, f3264, f32)     .long   f32
-#endif
-#define SYSCALL_SPU(func)       SYSCALL(func)
-#define COMPAT_SYS_SPU(func)    COMPAT_SYS(func)
-#define COMPAT_SPU_NEW(func)    COMPAT_SYS(func)
-#define SYSX_SPU(f, f3264, f32) SYSX(f, f3264, f32)
-
 .section .rodata,"a"
 
 #ifdef CONFIG_PPC64
@@ -46,5 +24,21 @@
 
 .globl sys_call_table
 sys_call_table:
+#ifdef CONFIG_PPC64
+#define __SYSCALL(nr, entry, nargs) .8byte DOTSYM(entry)
+#include <asm/syscall_table_64.h>
+#undef __SYSCALL
+#else
+#define __SYSCALL(nr, entry, nargs) .long entry
+#include <asm/syscall_table_32.h>
+#undef __SYSCALL
+#endif
 
-#include <asm/systbl.h>
+#ifdef CONFIG_COMPAT
+.globl compat_sys_call_table
+compat_sys_call_table:
+#define compat_sys_sigsuspend   sys_sigsuspend
+#define __SYSCALL(nr, entry, nargs) .8byte DOTSYM(entry)
+#include <asm/syscall_table_c32.h>
+#undef __SYSCALL
+#endif
diff --git a/arch/powerpc/kernel/systbl_chk.c b/arch/powerpc/kernel/systbl_chk.c
deleted file mode 100644
index 4653258722ac..000000000000
--- a/arch/powerpc/kernel/systbl_chk.c
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * This file, when run through CPP produces a list of syscall numbers
- * in the order of systbl.h.  That way we can check for gaps and syscalls
- * that are out of order.
- *
- * Unfortunately, we cannot check for the correct ordering of entries
- * using SYSX().
- *
- * Copyright © IBM Corporation
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#include <asm/unistd.h>
-
-#define SYSCALL(func)           __NR_##func
-#define COMPAT_SYS(func)        __NR_##func
-#define PPC_SYS(func)           __NR_##func
-#ifdef CONFIG_PPC64
-#define OLDSYS(func)            -1
-#define SYS32ONLY(func)         -1
-#define PPC64ONLY(func)         __NR_##func
-#else
-#define OLDSYS(func)            __NR_old##func
-#define SYS32ONLY(func)         __NR_##func
-#define PPC64ONLY(func)         -1
-#endif
-#define SYSX(f, f3264, f32)     -1
-
-#define SYSCALL_SPU(func)       SYSCALL(func)
-#define COMPAT_SYS_SPU(func)    COMPAT_SYS(func)
-#define COMPAT_SPU_NEW(func)    COMPAT_SYS(_new##func)
-#define SYSX_SPU(f, f3264, f32) SYSX(f, f3264, f32)
-
-/* Just insert a marker for ni_syscalls */
-#define __NR_ni_syscall         -1
-
-/*
- * These are the known exceptions.
- * Hopefully, there will be no more.
- */
-#define __NR_llseek             __NR__llseek
-#undef  __NR_umount
-#define __NR_umount             __NR_umount2
-#define __NR_old_getrlimit      __NR_getrlimit
-#define __NR_newstat            __NR_stat
-#define __NR_newlstat           __NR_lstat
-#define __NR_newfstat           __NR_fstat
-#define __NR_newuname           __NR_uname
-#define __NR_sysctl             __NR__sysctl
-#define __NR_olddebug_setcontext        __NR_sys_debug_setcontext
-
-/* We call sys_ugetrlimit for syscall number __NR_getrlimit */
-#define getrlimit               ugetrlimit
-
-START_TABLE
-#include <asm/systbl.h>
-END_TABLE NR_syscalls
diff --git a/arch/powerpc/kernel/trace/ftrace.c b/arch/powerpc/kernel/trace/ftrace.c
index b65c8a34ad6e..29746dc28df5 100644
--- a/arch/powerpc/kernel/trace/ftrace.c
+++ b/arch/powerpc/kernel/trace/ftrace.c
@@ -107,7 +107,7 @@ static int is_b_op(unsigned int op)
 
 static unsigned long find_bl_target(unsigned long ip, unsigned int op)
 {
-        static int offset;
+        int offset;
 
         offset = (op & 0x03fffffc);
         /* make it signed */
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 9a86572db1ef..00af2c4febf4 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -1434,7 +1434,8 @@ void program_check_exception(struct pt_regs *regs)
                         goto bail;
                 } else {
                         printk(KERN_EMERG "Unexpected TM Bad Thing exception "
-                               "at %lx (msr 0x%lx)\n", regs->nip, regs->msr);
+                               "at %lx (msr 0x%lx) tm_scratch=%llx\n",
+                               regs->nip, regs->msr, get_paca()->tm_scratch);
                         die("Unrecoverable exception", regs, SIGABRT);
                 }
         }
diff --git a/arch/powerpc/kernel/vdso.c b/arch/powerpc/kernel/vdso.c
index 65b3bdb99f0b..7725a9714736 100644
--- a/arch/powerpc/kernel/vdso.c
+++ b/arch/powerpc/kernel/vdso.c
@@ -671,15 +671,18 @@ static void __init vdso_setup_syscall_map(void)
 {
         unsigned int i;
         extern unsigned long *sys_call_table;
+#ifdef CONFIG_PPC64
+        extern unsigned long *compat_sys_call_table;
+#endif
         extern unsigned long sys_ni_syscall;
 
 
         for (i = 0; i < NR_syscalls; i++) {
 #ifdef CONFIG_PPC64
-                if (sys_call_table[i*2] != sys_ni_syscall)
+                if (sys_call_table[i] != sys_ni_syscall)
                         vdso_data->syscall_map_64[i >> 5] |=
                                 0x80000000UL >> (i & 0x1f);
-                if (sys_call_table[i*2+1] != sys_ni_syscall)
+                if (compat_sys_call_table[i] != sys_ni_syscall)
                         vdso_data->syscall_map_32[i >> 5] |=
                                 0x80000000UL >> (i & 0x1f);
 #else /* CONFIG_PPC64 */
diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S
index 434581bcd5b4..ad1c77f71f54 100644
--- a/arch/powerpc/kernel/vmlinux.lds.S
+++ b/arch/powerpc/kernel/vmlinux.lds.S
@@ -170,6 +170,14 @@ SECTIONS
         }
 #endif /* CONFIG_PPC_BARRIER_NOSPEC */
 
+#ifdef CONFIG_PPC_FSL_BOOK3E
+        . = ALIGN(8);
+        __spec_btb_flush_fixup : AT(ADDR(__spec_btb_flush_fixup) - LOAD_OFFSET) {
+                __start__btb_flush_fixup = .;
+                *(__btb_flush_fixup)
+                __stop__btb_flush_fixup = .;
+        }
+#endif
         EXCEPTION_TABLE(0)
 
         NOTES :kernel :notes
@@ -206,12 +214,6 @@ SECTIONS
 
         .init.data : AT(ADDR(.init.data) - LOAD_OFFSET) {
                 INIT_DATA
-                __vtop_table_begin = .;
-                KEEP(*(.vtop_fixup));
-                __vtop_table_end = .;
-                __ptov_table_begin = .;
-                KEEP(*(.ptov_fixup));
-                __ptov_table_end = .;
         }
 
         .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET) {
@@ -308,6 +310,10 @@ SECTIONS
 #ifdef CONFIG_PPC32
         .data : AT(ADDR(.data) - LOAD_OFFSET) {
                 DATA_DATA
+#ifdef CONFIG_UBSAN
+                *(.data..Lubsan_data*)
+                *(.data..Lubsan_type*)
+#endif
                 *(.data.rel*)
                 *(SDATA_MAIN)
                 *(.sdata2)
diff --git a/arch/powerpc/kvm/book3s_64_vio.c b/arch/powerpc/kvm/book3s_64_vio.c
index 62a8d03ba7e9..532ab79734c7 100644
--- a/arch/powerpc/kvm/book3s_64_vio.c
+++ b/arch/powerpc/kvm/book3s_64_vio.c
@@ -397,12 +397,13 @@ static long kvmppc_tce_validate(struct kvmppc_spapr_tce_table *stt,
         return H_SUCCESS;
 }
 
-static void kvmppc_clear_tce(struct iommu_table *tbl, unsigned long entry)
+static void kvmppc_clear_tce(struct mm_struct *mm, struct iommu_table *tbl,
+                unsigned long entry)
 {
         unsigned long hpa = 0;
         enum dma_data_direction dir = DMA_NONE;
 
-        iommu_tce_xchg(tbl, entry, &hpa, &dir);
+        iommu_tce_xchg(mm, tbl, entry, &hpa, &dir);
 }
 
 static long kvmppc_tce_iommu_mapped_dec(struct kvm *kvm,
@@ -433,7 +434,7 @@ static long kvmppc_tce_iommu_do_unmap(struct kvm *kvm,
         unsigned long hpa = 0;
         long ret;
 
-        if (WARN_ON_ONCE(iommu_tce_xchg(tbl, entry, &hpa, &dir)))
+        if (WARN_ON_ONCE(iommu_tce_xchg(kvm->mm, tbl, entry, &hpa, &dir)))
                 return H_TOO_HARD;
 
         if (dir == DMA_NONE)
@@ -441,7 +442,7 @@ static long kvmppc_tce_iommu_do_unmap(struct kvm *kvm,
 
         ret = kvmppc_tce_iommu_mapped_dec(kvm, tbl, entry);
         if (ret != H_SUCCESS)
-                iommu_tce_xchg(tbl, entry, &hpa, &dir);
+                iommu_tce_xchg(kvm->mm, tbl, entry, &hpa, &dir);
 
         return ret;
 }
@@ -487,7 +488,7 @@ long kvmppc_tce_iommu_do_map(struct kvm *kvm, struct iommu_table *tbl,
         if (mm_iommu_mapped_inc(mem))
                 return H_TOO_HARD;
 
-        ret = iommu_tce_xchg(tbl, entry, &hpa, &dir);
+        ret = iommu_tce_xchg(kvm->mm, tbl, entry, &hpa, &dir);
         if (WARN_ON_ONCE(ret)) {
                 mm_iommu_mapped_dec(mem);
                 return H_TOO_HARD;
@@ -566,7 +567,7 @@ long kvmppc_h_put_tce(struct kvm_vcpu *vcpu, unsigned long liobn,
                                         entry, ua, dir);
 
                 if (ret != H_SUCCESS) {
-                        kvmppc_clear_tce(stit->tbl, entry);
+                        kvmppc_clear_tce(vcpu->kvm->mm, stit->tbl, entry);
                         goto unlock_exit;
                 }
         }
@@ -655,7 +656,8 @@ long kvmppc_h_put_tce_indirect(struct kvm_vcpu *vcpu,
                                         iommu_tce_direction(tce));
 
                         if (ret != H_SUCCESS) {
-                                kvmppc_clear_tce(stit->tbl, entry);
+                                kvmppc_clear_tce(vcpu->kvm->mm, stit->tbl,
+                                                entry);
                                 goto unlock_exit;
                         }
                 }
@@ -704,7 +706,7 @@ long kvmppc_h_stuff_tce(struct kvm_vcpu *vcpu,
                                 return ret;
 
                         WARN_ON_ONCE(1);
-                        kvmppc_clear_tce(stit->tbl, entry);
+                        kvmppc_clear_tce(vcpu->kvm->mm, stit->tbl, entry);
                 }
         }
 
diff --git a/arch/powerpc/kvm/bookehv_interrupts.S b/arch/powerpc/kvm/bookehv_interrupts.S
index 051af7d97327..4e5081e58409 100644
--- a/arch/powerpc/kvm/bookehv_interrupts.S
+++ b/arch/powerpc/kvm/bookehv_interrupts.S
@@ -75,6 +75,10 @@
         PPC_LL  r1, VCPU_HOST_STACK(r4)
         PPC_LL  r2, HOST_R2(r1)
 
+START_BTB_FLUSH_SECTION
+        BTB_FLUSH(r10)
+END_BTB_FLUSH_SECTION
+
         mfspr   r10, SPRN_PID
         lwz     r8, VCPU_HOST_PID(r4)
         PPC_LL  r11, VCPU_SHARED(r4)
diff --git a/arch/powerpc/kvm/e500.h b/arch/powerpc/kvm/e500.h
index 94f04fcb373e..962ee90a0dfe 100644
--- a/arch/powerpc/kvm/e500.h
+++ b/arch/powerpc/kvm/e500.h
@@ -20,7 +20,7 @@
 #define KVM_E500_H
 
 #include <linux/kvm_host.h>
-#include <asm/mmu-book3e.h>
+#include <asm/nohash/mmu-book3e.h>
 #include <asm/tlb.h>
 #include <asm/cputhreads.h>
 
diff --git a/arch/powerpc/kvm/e500_emulate.c b/arch/powerpc/kvm/e500_emulate.c
index 3f8189eb56ed..fde1de08b4d7 100644
--- a/arch/powerpc/kvm/e500_emulate.c
+++ b/arch/powerpc/kvm/e500_emulate.c
@@ -277,6 +277,13 @@ int kvmppc_core_emulate_mtspr_e500(struct kvm_vcpu *vcpu, int sprn, ulong spr_va
                 vcpu->arch.pwrmgtcr0 = spr_val;
                 break;
 
+        case SPRN_BUCSR:
+                /*
+                 * If we are here, it means that we have already flushed the
+                 * branch predictor, so just return to guest.
+                 */
+                break;
+
         /* extra exceptions */
 #ifdef CONFIG_SPE_POSSIBLE
         case SPRN_IVOR32:
diff --git a/arch/powerpc/lib/code-patching.c b/arch/powerpc/lib/code-patching.c
index 89502cbccb1b..506413a2c25e 100644
--- a/arch/powerpc/lib/code-patching.c
+++ b/arch/powerpc/lib/code-patching.c
@@ -204,22 +204,6 @@ int patch_branch(unsigned int *addr, unsigned long target, int flags)
         return patch_instruction(addr, create_branch(addr, target, flags));
 }
 
-int patch_branch_site(s32 *site, unsigned long target, int flags)
-{
-        unsigned int *addr;
-
-        addr = (unsigned int *)((unsigned long)site + *site);
-        return patch_instruction(addr, create_branch(addr, target, flags));
-}
-
-int patch_instruction_site(s32 *site, unsigned int instr)
-{
-        unsigned int *addr;
-
-        addr = (unsigned int *)((unsigned long)site + *site);
-        return patch_instruction(addr, instr);
-}
-
 bool is_offset_in_branch_range(long offset)
 {
         /*
diff --git a/arch/powerpc/lib/feature-fixups.c b/arch/powerpc/lib/feature-fixups.c
index e613b02bb2f0..5169cc805464 100644
--- a/arch/powerpc/lib/feature-fixups.c
+++ b/arch/powerpc/lib/feature-fixups.c
@@ -118,7 +118,7 @@ void do_feature_fixups(unsigned long value, void *fixup_start, void *fixup_end)
 }
 
 #ifdef CONFIG_PPC_BOOK3S_64
-void do_stf_entry_barrier_fixups(enum stf_barrier_type types)
+static void do_stf_entry_barrier_fixups(enum stf_barrier_type types)
 {
         unsigned int instrs[3], *dest;
         long *start, *end;
@@ -168,7 +168,7 @@ void do_stf_entry_barrier_fixups(enum stf_barrier_type types)
                                                            : "unknown");
 }
 
-void do_stf_exit_barrier_fixups(enum stf_barrier_type types)
+static void do_stf_exit_barrier_fixups(enum stf_barrier_type types)
 {
         unsigned int instrs[6], *dest;
         long *start, *end;
@@ -347,6 +347,29 @@ void do_barrier_nospec_fixups_range(bool enable, void *fixup_start, void *fixup_
 
         printk(KERN_DEBUG "barrier-nospec: patched %d locations\n", i);
 }
+
+static void patch_btb_flush_section(long *curr)
+{
+        unsigned int *start, *end;
+
+        start = (void *)curr + *curr;
+        end = (void *)curr + *(curr + 1);
+        for (; start < end; start++) {
+                pr_devel("patching dest %lx\n", (unsigned long)start);
+                patch_instruction(start, PPC_INST_NOP);
+        }
+}
+
+void do_btb_flush_fixups(void)
+{
+        long *start, *end;
+
+        start = PTRRELOC(&__start__btb_flush_fixup);
+        end = PTRRELOC(&__stop__btb_flush_fixup);
+
+        for (; start < end; start += 2)
+                patch_btb_flush_section(start);
+}
 #endif /* CONFIG_PPC_FSL_BOOK3E */
 
 void do_lwsync_fixups(unsigned long value, void *fixup_start, void *fixup_end)
diff --git a/arch/powerpc/mm/44x_mmu.c b/arch/powerpc/mm/44x_mmu.c
index 12d92518e898..ea2b9af08a48 100644
--- a/arch/powerpc/mm/44x_mmu.c
+++ b/arch/powerpc/mm/44x_mmu.c
@@ -29,6 +29,7 @@
 #include <asm/mmu.h>
 #include <asm/page.h>
 #include <asm/cacheflush.h>
+#include <asm/code-patching.h>
 
 #include "mmu_decl.h"
 
@@ -43,22 +44,13 @@ unsigned long tlb_47x_boltmap[1024/8];
 
 static void ppc44x_update_tlb_hwater(void)
 {
-        extern unsigned int tlb_44x_patch_hwater_D[];
-        extern unsigned int tlb_44x_patch_hwater_I[];
-
         /* The TLB miss handlers hard codes the watermark in a cmpli
          * instruction to improve performances rather than loading it
          * from the global variable. Thus, we patch the instructions
          * in the 2 TLB miss handlers when updating the value
          */
-        tlb_44x_patch_hwater_D[0] = (tlb_44x_patch_hwater_D[0] & 0xffff0000) |
-                tlb_44x_hwater;
-        flush_icache_range((unsigned long)&tlb_44x_patch_hwater_D[0],
-                           (unsigned long)&tlb_44x_patch_hwater_D[1]);
-        tlb_44x_patch_hwater_I[0] = (tlb_44x_patch_hwater_I[0] & 0xffff0000) |
-                tlb_44x_hwater;
-        flush_icache_range((unsigned long)&tlb_44x_patch_hwater_I[0],
-                           (unsigned long)&tlb_44x_patch_hwater_I[1]);
+        modify_instruction_site(&patch__tlb_44x_hwater_D, 0xffff, tlb_44x_hwater);
+        modify_instruction_site(&patch__tlb_44x_hwater_I, 0xffff, tlb_44x_hwater);
 }
 
 /*
diff --git a/arch/powerpc/mm/8xx_mmu.c b/arch/powerpc/mm/8xx_mmu.c
index 01b7f5107c3a..bfa503cff351 100644
--- a/arch/powerpc/mm/8xx_mmu.c
+++ b/arch/powerpc/mm/8xx_mmu.c
@@ -100,11 +100,7 @@ static void __init mmu_mapin_immr(void)
 
 static void __init mmu_patch_cmp_limit(s32 *site, unsigned long mapped)
 {
-        unsigned int instr = *(unsigned int *)patch_site_addr(site);
-
-        instr &= 0xffff0000;
-        instr |= (unsigned long)__va(mapped) >> 16;
-        patch_instruction_site(site, instr);
+        modify_instruction_site(site, 0xffff, (unsigned long)__va(mapped) >> 16);
 }
 
 unsigned long __init mmu_mapin_ram(unsigned long top)
@@ -175,12 +171,12 @@ void set_context(unsigned long id, pgd_t *pgd)
         *(ptr + 1) = pgd;
 #endif
 
-        /* Register M_TW will contain base address of level 1 table minus the
+        /* Register M_TWB will contain base address of level 1 table minus the
          * lower part of the kernel PGDIR base address, so that all accesses to
          * level 1 table are done relative to lower part of kernel PGDIR base
          * address.
          */
-        mtspr(SPRN_M_TW, __pa(pgd) - offset);
+        mtspr(SPRN_M_TWB, __pa(pgd) - offset);
 
         /* Update context */
         mtspr(SPRN_M_CASID, id - 1);
diff --git a/arch/powerpc/mm/Makefile b/arch/powerpc/mm/Makefile
index ca96e7be4d0e..f965fc33a8b7 100644
--- a/arch/powerpc/mm/Makefile
+++ b/arch/powerpc/mm/Makefile
@@ -15,10 +15,13 @@ obj-$(CONFIG_PPC_MMU_NOHASH)	+= mmu_context_nohash.o tlb_nohash.o \
 obj-$(CONFIG_PPC_BOOK3E)        += tlb_low_$(BITS)e.o
 hash64-$(CONFIG_PPC_NATIVE)     := hash_native_64.o
 obj-$(CONFIG_PPC_BOOK3E_64)   += pgtable-book3e.o
-obj-$(CONFIG_PPC_BOOK3S_64)     += pgtable-hash64.o hash_utils_64.o slb.o $(hash64-y) mmu_context_book3s64.o pgtable-book3s64.o
+obj-$(CONFIG_PPC_BOOK3S_64)     += pgtable-hash64.o hash_utils_64.o slb.o \
+                                   $(hash64-y) mmu_context_book3s64.o \
+                                   pgtable-book3s64.o pgtable-frag.o
+obj-$(CONFIG_PPC32)             += pgtable-frag.o
 obj-$(CONFIG_PPC_RADIX_MMU)     += pgtable-radix.o tlb-radix.o
-obj-$(CONFIG_PPC_STD_MMU_32)    += ppc_mmu_32.o hash_low_32.o mmu_context_hash32.o
-obj-$(CONFIG_PPC_STD_MMU)       += tlb_hash$(BITS).o
+obj-$(CONFIG_PPC_BOOK3S_32)     += ppc_mmu_32.o hash_low_32.o mmu_context_hash32.o
+obj-$(CONFIG_PPC_BOOK3S)        += tlb_hash$(BITS).o
 ifdef CONFIG_PPC_BOOK3S_64
 obj-$(CONFIG_PPC_4K_PAGES)      += hash64_4k.o
 obj-$(CONFIG_PPC_64K_PAGES)     += hash64_64k.o
@@ -47,7 +50,7 @@ ifdef CONFIG_PPC_PTDUMP
 obj-$(CONFIG_4xx)               += dump_linuxpagetables-generic.o
 obj-$(CONFIG_PPC_8xx)           += dump_linuxpagetables-8xx.o
 obj-$(CONFIG_PPC_BOOK3E_MMU)    += dump_linuxpagetables-generic.o
-obj-$(CONFIG_PPC_BOOK3S_32)     += dump_linuxpagetables-generic.o
+obj-$(CONFIG_PPC_BOOK3S_32)     += dump_linuxpagetables-generic.o dump_bats.o dump_sr.o
 obj-$(CONFIG_PPC_BOOK3S_64)     += dump_linuxpagetables-book3s64.o
 endif
 obj-$(CONFIG_PPC_HTDUMP)        += dump_hashpagetable.o
diff --git a/arch/powerpc/mm/dma-noncoherent.c b/arch/powerpc/mm/dma-noncoherent.c
index b6e7b5952ab5..e955539686a4 100644
--- a/arch/powerpc/mm/dma-noncoherent.c
+++ b/arch/powerpc/mm/dma-noncoherent.c
@@ -29,7 +29,7 @@
 #include <linux/string.h>
 #include <linux/types.h>
 #include <linux/highmem.h>
-#include <linux/dma-mapping.h>
+#include <linux/dma-direct.h>
 #include <linux/export.h>
 
 #include <asm/tlbflush.h>
@@ -151,8 +151,8 @@ static struct ppc_vm_region *ppc_vm_region_find(struct ppc_vm_region *head, unsi
  * Allocate DMA-coherent memory space and return both the kernel remapped
  * virtual and bus address for that space.
  */
-void *
-__dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)
+void *__dma_nommu_alloc_coherent(struct device *dev, size_t size,
+                dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
 {
         struct page *page;
         struct ppc_vm_region *c;
@@ -223,7 +223,7 @@ __dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t
                 /*
                  * Set the "dma handle"
                  */
-                *handle = page_to_phys(page);
+                *dma_handle = phys_to_dma(dev, page_to_phys(page));
 
                 do {
                         SetPageReserved(page);
@@ -249,12 +249,12 @@ __dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t
  no_page:
         return NULL;
 }
-EXPORT_SYMBOL(__dma_alloc_coherent);
 
 /*
  * free a page as defined by the above mapping.
  */
-void __dma_free_coherent(size_t size, void *vaddr)
+void __dma_nommu_free_coherent(struct device *dev, size_t size, void *vaddr,
+                dma_addr_t dma_handle, unsigned long attrs)
 {
         struct ppc_vm_region *c;
         unsigned long flags, addr;
@@ -309,7 +309,6 @@ void __dma_free_coherent(size_t size, void *vaddr)
                __func__, vaddr);
         dump_stack();
 }
-EXPORT_SYMBOL(__dma_free_coherent);
 
 /*
  * make an area consistent.
@@ -401,7 +400,7 @@ EXPORT_SYMBOL(__dma_sync_page);
 
 /*
  * Return the PFN for a given cpu virtual address returned by
- * __dma_alloc_coherent. This is used by dma_mmap_coherent()
+ * __dma_nommu_alloc_coherent. This is used by dma_mmap_coherent()
  */
 unsigned long __dma_get_coherent_pfn(unsigned long cpu_addr)
 {
diff --git a/arch/powerpc/mm/dump_bats.c b/arch/powerpc/mm/dump_bats.c
new file mode 100644
index 000000000000..a0d23e96e841
--- /dev/null
+++ b/arch/powerpc/mm/dump_bats.c
@@ -0,0 +1,173 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2018, Christophe Leroy CS S.I.
+ * <christophe.leroy@c-s.fr>
+ *
+ * This dumps the content of BATS
+ */
+
+#include <asm/debugfs.h>
+#include <asm/pgtable.h>
+#include <asm/cpu_has_feature.h>
+
+static char *pp_601(int k, int pp)
+{
+        if (pp == 0)
+                return k ? "NA" : "RWX";
+        if (pp == 1)
+                return k ? "ROX" : "RWX";
+        if (pp == 2)
+                return k ? "RWX" : "RWX";
+        return k ? "ROX" : "ROX";
+}
+
+static void bat_show_601(struct seq_file *m, int idx, u32 lower, u32 upper)
+{
+        u32 blpi = upper & 0xfffe0000;
+        u32 k = (upper >> 2) & 3;
+        u32 pp = upper & 3;
+        phys_addr_t pbn = PHYS_BAT_ADDR(lower);
+        u32 bsm = lower & 0x3ff;
+        u32 size = (bsm + 1) << 17;
+
+        seq_printf(m, "%d: ", idx);
+        if (!(lower & 0x40)) {
+                seq_puts(m, "        -\n");
+                return;
+        }
+
+        seq_printf(m, "0x%08x-0x%08x ", blpi, blpi + size - 1);
+#ifdef CONFIG_PHYS_64BIT
+        seq_printf(m, "0x%016llx ", pbn);
+#else
+        seq_printf(m, "0x%08x ", pbn);
+#endif
+
+        seq_printf(m, "Kernel %s User %s", pp_601(k & 2, pp), pp_601(k & 1, pp));
+
+        if (lower & _PAGE_WRITETHRU)
+                seq_puts(m, "write through ");
+        if (lower & _PAGE_NO_CACHE)
+                seq_puts(m, "no cache ");
+        if (lower & _PAGE_COHERENT)
+                seq_puts(m, "coherent ");
+        seq_puts(m, "\n");
+}
+
+#define BAT_SHOW_601(_m, _n, _l, _u) bat_show_601(_m, _n, mfspr(_l), mfspr(_u))
+
+static int bats_show_601(struct seq_file *m, void *v)
+{
+        seq_puts(m, "---[ Block Address Translation ]---\n");
+
+        BAT_SHOW_601(m, 0, SPRN_IBAT0L, SPRN_IBAT0U);
+        BAT_SHOW_601(m, 1, SPRN_IBAT1L, SPRN_IBAT1U);
+        BAT_SHOW_601(m, 2, SPRN_IBAT2L, SPRN_IBAT2U);
+        BAT_SHOW_601(m, 3, SPRN_IBAT3L, SPRN_IBAT3U);
+
+        return 0;
+}
+
+static void bat_show_603(struct seq_file *m, int idx, u32 lower, u32 upper, bool is_d)
+{
+        u32 bepi = upper & 0xfffe0000;
+        u32 bl = (upper >> 2) & 0x7ff;
+        u32 k = upper & 3;
+        phys_addr_t brpn = PHYS_BAT_ADDR(lower);
+        u32 size = (bl + 1) << 17;
+
+        seq_printf(m, "%d: ", idx);
+        if (k == 0) {
+                seq_puts(m, "        -\n");
+                return;
+        }
+
+        seq_printf(m, "0x%08x-0x%08x ", bepi, bepi + size - 1);
+#ifdef CONFIG_PHYS_64BIT
+        seq_printf(m, "0x%016llx ", brpn);
+#else
+        seq_printf(m, "0x%08x ", brpn);
+#endif
+
+        if (k == 1)
+                seq_puts(m, "User ");
+        else if (k == 2)
+                seq_puts(m, "Kernel ");
+        else
+                seq_puts(m, "Kernel/User ");
+
+        if (lower & BPP_RX)
+                seq_puts(m, is_d ? "RO " : "EXEC ");
+        else if (lower & BPP_RW)
+                seq_puts(m, is_d ? "RW " : "EXEC ");
+        else
+                seq_puts(m, is_d ? "NA " : "NX   ");
+
+        if (lower & _PAGE_WRITETHRU)
+                seq_puts(m, "write through ");
+        if (lower & _PAGE_NO_CACHE)
+                seq_puts(m, "no cache ");
+        if (lower & _PAGE_COHERENT)
+                seq_puts(m, "coherent ");
+        if (lower & _PAGE_GUARDED)
+                seq_puts(m, "guarded ");
+        seq_puts(m, "\n");
+}
+
+#define BAT_SHOW_603(_m, _n, _l, _u, _d) bat_show_603(_m, _n, mfspr(_l), mfspr(_u), _d)
+
+static int bats_show_603(struct seq_file *m, void *v)
+{
+        seq_puts(m, "---[ Instruction Block Address Translation ]---\n");
+
+        BAT_SHOW_603(m, 0, SPRN_IBAT0L, SPRN_IBAT0U, false);
+        BAT_SHOW_603(m, 1, SPRN_IBAT1L, SPRN_IBAT1U, false);
+        BAT_SHOW_603(m, 2, SPRN_IBAT2L, SPRN_IBAT2U, false);
+        BAT_SHOW_603(m, 3, SPRN_IBAT3L, SPRN_IBAT3U, false);
+        if (mmu_has_feature(MMU_FTR_USE_HIGH_BATS)) {
+                BAT_SHOW_603(m, 4, SPRN_IBAT4L, SPRN_IBAT4U, false);
+                BAT_SHOW_603(m, 5, SPRN_IBAT5L, SPRN_IBAT5U, false);
+                BAT_SHOW_603(m, 6, SPRN_IBAT6L, SPRN_IBAT6U, false);
+                BAT_SHOW_603(m, 7, SPRN_IBAT7L, SPRN_IBAT7U, false);
+        }
+
+        seq_puts(m, "\n---[ Data Block Address Translation ]---\n");
+
+        BAT_SHOW_603(m, 0, SPRN_DBAT0L, SPRN_DBAT0U, true);
+        BAT_SHOW_603(m, 1, SPRN_DBAT1L, SPRN_DBAT1U, true);
+        BAT_SHOW_603(m, 2, SPRN_DBAT2L, SPRN_DBAT2U, true);
+        BAT_SHOW_603(m, 3, SPRN_DBAT3L, SPRN_DBAT3U, true);
+        if (mmu_has_feature(MMU_FTR_USE_HIGH_BATS)) {
+                BAT_SHOW_603(m, 4, SPRN_DBAT4L, SPRN_DBAT4U, true);
+                BAT_SHOW_603(m, 5, SPRN_DBAT5L, SPRN_DBAT5U, true);
+                BAT_SHOW_603(m, 6, SPRN_DBAT6L, SPRN_DBAT6U, true);
+                BAT_SHOW_603(m, 7, SPRN_DBAT7L, SPRN_DBAT7U, true);
+        }
+
+        return 0;
+}
+
+static int bats_open(struct inode *inode, struct file *file)
+{
+        if (cpu_has_feature(CPU_FTR_601))
+                return single_open(file, bats_show_601, NULL);
+
+        return single_open(file, bats_show_603, NULL);
+}
+
+static const struct file_operations bats_fops = {
+        .open           = bats_open,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = single_release,
+};
+
+static int __init bats_init(void)
+{
+        struct dentry *debugfs_file;
+
+        debugfs_file = debugfs_create_file("block_address_translation", 0400,
+                                           powerpc_debugfs_root, NULL, &bats_fops);
+        return debugfs_file ? 0 : -ENOMEM;
+}
+device_initcall(bats_init);
diff --git a/arch/powerpc/mm/dump_linuxpagetables-generic.c b/arch/powerpc/mm/dump_linuxpagetables-generic.c
index 1e3829ec1348..3fe98a0974c6 100644
--- a/arch/powerpc/mm/dump_linuxpagetables-generic.c
+++ b/arch/powerpc/mm/dump_linuxpagetables-generic.c
@@ -21,13 +21,11 @@ static const struct flag_info flag_array[] = {
                 .set    = "rw",
                 .clear  = "r ",
         }, {
-#ifndef CONFIG_PPC_BOOK3S_32
                 .mask   = _PAGE_EXEC,
                 .val    = _PAGE_EXEC,
                 .set    = " X ",
                 .clear  = "   ",
         }, {
-#endif
                 .mask   = _PAGE_PRESENT,
                 .val    = _PAGE_PRESENT,
                 .set    = "present",
diff --git a/arch/powerpc/mm/dump_sr.c b/arch/powerpc/mm/dump_sr.c
new file mode 100644
index 000000000000..501843664bb9
--- /dev/null
+++ b/arch/powerpc/mm/dump_sr.c
@@ -0,0 +1,64 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2018, Christophe Leroy CS S.I.
+ * <christophe.leroy@c-s.fr>
+ *
+ * This dumps the content of Segment Registers
+ */
+
+#include <asm/debugfs.h>
+
+static void seg_show(struct seq_file *m, int i)
+{
+        u32 val = mfsrin(i << 28);
+
+        seq_printf(m, "0x%01x0000000-0x%01xfffffff ", i, i);
+        seq_printf(m, "Kern key %d ", (val >> 30) & 1);
+        seq_printf(m, "User key %d ", (val >> 29) & 1);
+        if (val & 0x80000000) {
+                seq_printf(m, "Device 0x%03x", (val >> 20) & 0x1ff);
+                seq_printf(m, "-0x%05x", val & 0xfffff);
+        } else {
+                if (val & 0x10000000)
+                        seq_puts(m, "No Exec ");
+                seq_printf(m, "VSID 0x%06x", val & 0xffffff);
+        }
+        seq_puts(m, "\n");
+}
+
+static int sr_show(struct seq_file *m, void *v)
+{
+        int i;
+
+        seq_puts(m, "---[ User Segments ]---\n");
+        for (i = 0; i < TASK_SIZE >> 28; i++)
+                seg_show(m, i);
+
+        seq_puts(m, "\n---[ Kernel Segments ]---\n");
+        for (; i < 16; i++)
+                seg_show(m, i);
+
+        return 0;
+}
+
+static int sr_open(struct inode *inode, struct file *file)
+{
+        return single_open(file, sr_show, NULL);
+}
+
+static const struct file_operations sr_fops = {
+        .open           = sr_open,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = single_release,
+};
+
+static int __init sr_init(void)
+{
+        struct dentry *debugfs_file;
+
+        debugfs_file = debugfs_create_file("segment_registers", 0400,
+                                           powerpc_debugfs_root, NULL, &sr_fops);
+        return debugfs_file ? 0 : -ENOMEM;
+}
+device_initcall(sr_init);
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index 2e6fb1d758c3..a6dcfda3e11e 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -226,7 +226,9 @@ static int mm_fault_error(struct pt_regs *regs, unsigned long addr,
 static bool bad_kernel_fault(bool is_exec, unsigned long error_code,
                              unsigned long address)
 {
-        if (is_exec && (error_code & (DSISR_NOEXEC_OR_G | DSISR_KEYFAULT))) {
+        /* NX faults set DSISR_PROTFAULT on the 8xx, DSISR_NOEXEC_OR_G on others */
+        if (is_exec && (error_code & (DSISR_NOEXEC_OR_G | DSISR_KEYFAULT |
+                                      DSISR_PROTFAULT))) {
                 printk_ratelimited(KERN_CRIT "kernel tried to execute"
                                    " exec-protected page (%lx) -"
                                    "exploit attempt? (uid: %d)\n",
@@ -341,10 +343,21 @@ static inline void cmo_account_page_fault(void)
 static inline void cmo_account_page_fault(void) { }
 #endif /* CONFIG_PPC_SMLPAR */
 
-#ifdef CONFIG_PPC_STD_MMU
-static void sanity_check_fault(bool is_write, unsigned long error_code)
+#ifdef CONFIG_PPC_BOOK3S
+static void sanity_check_fault(bool is_write, bool is_user,
+                               unsigned long error_code, unsigned long address)
 {
         /*
+         * Userspace trying to access kernel address, we get PROTFAULT for that.
+         */
+        if (is_user && address >= TASK_SIZE) {
+                pr_crit_ratelimited("%s[%d]: User access of kernel address (%lx) - exploit attempt? (uid: %d)\n",
+                                   current->comm, current->pid, address,
+                                   from_kuid(&init_user_ns, current_uid()));
+                return;
+        }
+
+        /*
          * For hash translation mode, we should never get a
          * PROTFAULT. Any update to pte to reduce access will result in us
          * removing the hash page table entry, thus resulting in a DSISR_NOHPTE
@@ -373,12 +386,15 @@ static void sanity_check_fault(bool is_write, unsigned long error_code)
          * For radix, we can get prot fault for autonuma case, because radix
          * page table will have them marked noaccess for user.
          */
-        if (!radix_enabled() && !is_write)
-                WARN_ON_ONCE(error_code & DSISR_PROTFAULT);
+        if (radix_enabled() || is_write)
+                return;
+
+        WARN_ON_ONCE(error_code & DSISR_PROTFAULT);
 }
 #else
-static void sanity_check_fault(bool is_write, unsigned long error_code) { }
-#endif /* CONFIG_PPC_STD_MMU */
+static void sanity_check_fault(bool is_write, bool is_user,
+                               unsigned long error_code, unsigned long address) { }
+#endif /* CONFIG_PPC_BOOK3S */
 
 /*
  * Define the correct "is_write" bit in error_code based
@@ -435,7 +451,7 @@ static int __do_page_fault(struct pt_regs *regs, unsigned long address,
         }
 
         /* Additional sanity check(s) */
-        sanity_check_fault(is_write, error_code);
+        sanity_check_fault(is_write, is_user, error_code, address);
 
         /*
          * The kernel should never take an execute fault nor should it
@@ -637,21 +653,22 @@ void bad_page_fault(struct pt_regs *regs, unsigned long address, int sig)
         case 0x300:
         case 0x380:
         case 0xe00:
-                printk(KERN_ALERT "Unable to handle kernel paging request for "
-                        "data at address 0x%08lx\n", regs->dar);
+                pr_alert("BUG: %s at 0x%08lx\n",
+                         regs->dar < PAGE_SIZE ? "Kernel NULL pointer dereference" :
+                         "Unable to handle kernel data access", regs->dar);
                 break;
         case 0x400:
         case 0x480:
-                printk(KERN_ALERT "Unable to handle kernel paging request for "
-                        "instruction fetch\n");
+                pr_alert("BUG: Unable to handle kernel instruction fetch%s",
+                         regs->nip < PAGE_SIZE ? " (NULL pointer?)\n" : "\n");
                 break;
         case 0x600:
-                printk(KERN_ALERT "Unable to handle kernel paging request for "
-                        "unaligned access at address 0x%08lx\n", regs->dar);
+                pr_alert("BUG: Unable to handle kernel unaligned access at 0x%08lx\n",
+                         regs->dar);
                 break;
         default:
-                printk(KERN_ALERT "Unable to handle kernel paging request for "
-                        "unknown fault\n");
+                pr_alert("BUG: Unable to handle unknown paging fault at 0x%08lx\n",
+                         regs->dar);
                 break;
         }
         printk(KERN_ALERT "Faulting instruction address: 0x%08lx\n",
diff --git a/arch/powerpc/mm/hash_low_32.S b/arch/powerpc/mm/hash_low_32.S
index 26acf6c8c20c..1e2df3e9f9ea 100644
--- a/arch/powerpc/mm/hash_low_32.S
+++ b/arch/powerpc/mm/hash_low_32.S
@@ -28,6 +28,7 @@
 #include <asm/asm-offsets.h>
 #include <asm/export.h>
 #include <asm/feature-fixups.h>
+#include <asm/code-patching-asm.h>
 
 #ifdef CONFIG_SMP
         .section .bss
@@ -337,11 +338,13 @@ END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT)
         rlwimi  r5,r4,10,26,31          /* put in API (abbrev page index) */
         SET_V(r5)                       /* set V (valid) bit */
 
+        patch_site      0f, patch__hash_page_A0
+        patch_site      1f, patch__hash_page_A1
+        patch_site      2f, patch__hash_page_A2
         /* Get the address of the primary PTE group in the hash table (r3) */
-_GLOBAL(hash_page_patch_A)
-        addis   r0,r7,Hash_base@h       /* base address of hash table */
-        rlwimi  r0,r3,LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT    /* VSID -> hash */
-        rlwinm  r3,r4,20+LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT /* PI -> hash */
+0:      addis   r0,r7,Hash_base@h       /* base address of hash table */
+1:      rlwimi  r0,r3,LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT    /* VSID -> hash */
+2:      rlwinm  r3,r4,20+LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT /* PI -> hash */
         xor     r3,r3,r0                /* make primary hash */
         li      r0,8                    /* PTEs/group */
 
@@ -366,10 +369,10 @@ _GLOBAL(hash_page_patch_A)
         bdnzf   2,1b                    /* loop while ctr != 0 && !cr0.eq */
         beq+    found_slot
 
+        patch_site      0f, patch__hash_page_B
         /* Search the secondary PTEG for a matching PTE */
         ori     r5,r5,PTE_H             /* set H (secondary hash) bit */
-_GLOBAL(hash_page_patch_B)
-        xoris   r4,r3,Hash_msk>>16      /* compute secondary hash */
+0:      xoris   r4,r3,Hash_msk>>16      /* compute secondary hash */
         xori    r4,r4,(-PTEG_SIZE & 0xffff)
         addi    r4,r4,-HPTE_SIZE
         mtctr   r0
@@ -393,10 +396,10 @@ _GLOBAL(hash_page_patch_B)
         addi    r6,r6,1
         stw     r6,primary_pteg_full@l(r4)
 
+        patch_site      0f, patch__hash_page_C
         /* Search the secondary PTEG for an empty slot */
         ori     r5,r5,PTE_H             /* set H (secondary hash) bit */
-_GLOBAL(hash_page_patch_C)
-        xoris   r4,r3,Hash_msk>>16      /* compute secondary hash */
+0:      xoris   r4,r3,Hash_msk>>16      /* compute secondary hash */
         xori    r4,r4,(-PTEG_SIZE & 0xffff)
         addi    r4,r4,-HPTE_SIZE
         mtctr   r0
@@ -577,11 +580,13 @@ _GLOBAL(flush_hash_pages)
         stwcx.  r8,0,r5                 /* update the pte */
         bne-    33b
 
+        patch_site      0f, patch__flush_hash_A0
+        patch_site      1f, patch__flush_hash_A1
+        patch_site      2f, patch__flush_hash_A2
         /* Get the address of the primary PTE group in the hash table (r3) */
-_GLOBAL(flush_hash_patch_A)
-        addis   r8,r7,Hash_base@h       /* base address of hash table */
-        rlwimi  r8,r3,LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT    /* VSID -> hash */
-        rlwinm  r0,r4,20+LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT /* PI -> hash */
+0:      addis   r8,r7,Hash_base@h       /* base address of hash table */
+1:      rlwimi  r8,r3,LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT    /* VSID -> hash */
+2:      rlwinm  r0,r4,20+LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT /* PI -> hash */
         xor     r8,r0,r8                /* make primary hash */
 
         /* Search the primary PTEG for a PTE whose 1st (d)word matches r5 */
@@ -593,11 +598,11 @@ _GLOBAL(flush_hash_patch_A)
         bdnzf   2,1b                    /* loop while ctr != 0 && !cr0.eq */
         beq+    3f
 
+        patch_site      0f, patch__flush_hash_B
         /* Search the secondary PTEG for a matching PTE */
         ori     r11,r11,PTE_H           /* set H (secondary hash) bit */
         li      r0,8                    /* PTEs/group */
-_GLOBAL(flush_hash_patch_B)
-        xoris   r12,r8,Hash_msk>>16     /* compute secondary hash */
+0:      xoris   r12,r8,Hash_msk>>16     /* compute secondary hash */
         xori    r12,r12,(-PTEG_SIZE & 0xffff)
         addi    r12,r12,-HPTE_SIZE
         mtctr   r0
diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c
index 4c01e9a01a74..9e732bb2c84a 100644
--- a/arch/powerpc/mm/hugetlbpage.c
+++ b/arch/powerpc/mm/hugetlbpage.c
@@ -42,6 +42,8 @@ EXPORT_SYMBOL(HPAGE_SHIFT);
 
 #define hugepd_none(hpd)        (hpd_val(hpd) == 0)
 
+#define PTE_T_ORDER     (__builtin_ffs(sizeof(pte_t)) - __builtin_ffs(sizeof(void *)))
+
 pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr, unsigned long sz)
 {
         /*
@@ -61,14 +63,17 @@ static int __hugepte_alloc(struct mm_struct *mm, hugepd_t *hpdp,
         int num_hugepd;
 
         if (pshift >= pdshift) {
-                cachep = hugepte_cache;
+                cachep = PGT_CACHE(PTE_T_ORDER);
                 num_hugepd = 1 << (pshift - pdshift);
+        } else if (IS_ENABLED(CONFIG_PPC_8xx)) {
+                cachep = PGT_CACHE(PTE_INDEX_SIZE);
+                num_hugepd = 1;
         } else {
                 cachep = PGT_CACHE(pdshift - pshift);
                 num_hugepd = 1;
         }
 
-        new = kmem_cache_zalloc(cachep, pgtable_gfp_flags(mm, GFP_KERNEL));
+        new = kmem_cache_alloc(cachep, pgtable_gfp_flags(mm, GFP_KERNEL));
 
         BUG_ON(pshift > HUGEPD_SHIFT_MASK);
         BUG_ON((unsigned long)new & HUGEPD_SHIFT_MASK);
@@ -264,7 +269,7 @@ static void hugepd_free_rcu_callback(struct rcu_head *head)
         unsigned int i;
 
         for (i = 0; i < batch->index; i++)
-                kmem_cache_free(hugepte_cache, batch->ptes[i]);
+                kmem_cache_free(PGT_CACHE(PTE_T_ORDER), batch->ptes[i]);
 
         free_page((unsigned long)batch);
 }
@@ -277,7 +282,7 @@ static void hugepd_free(struct mmu_gather *tlb, void *hugepte)
 
         if (atomic_read(&tlb->mm->mm_users) < 2 ||
             mm_is_thread_local(tlb->mm)) {
-                kmem_cache_free(hugepte_cache, hugepte);
+                kmem_cache_free(PGT_CACHE(PTE_T_ORDER), hugepte);
                 put_cpu_var(hugepd_freelist_cur);
                 return;
         }
@@ -329,6 +334,9 @@ static void free_hugepd_range(struct mmu_gather *tlb, hugepd_t *hpdp, int pdshif
 
         if (shift >= pdshift)
                 hugepd_free(tlb, hugepte);
+        else if (IS_ENABLED(CONFIG_PPC_8xx))
+                pgtable_free_tlb(tlb, hugepte,
+                                 get_hugepd_cache_index(PTE_INDEX_SIZE));
         else
                 pgtable_free_tlb(tlb, hugepte,
                                  get_hugepd_cache_index(pdshift - shift));
@@ -652,7 +660,6 @@ static int __init hugepage_setup_sz(char *str)
 }
 __setup("hugepagesz=", hugepage_setup_sz);
 
-struct kmem_cache *hugepte_cache;
 static int __init hugetlbpage_init(void)
 {
         int psize;
@@ -699,24 +706,13 @@ static int __init hugetlbpage_init(void)
                  * if we have pdshift and shift value same, we don't
                  * use pgt cache for hugepd.
                  */
-                if (pdshift > shift)
-                        pgtable_cache_add(pdshift - shift, NULL);
+                if (pdshift > shift && IS_ENABLED(CONFIG_PPC_8xx))
+                        pgtable_cache_add(PTE_INDEX_SIZE);
+                else if (pdshift > shift)
+                        pgtable_cache_add(pdshift - shift);
 #if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_8xx)
-                else if (!hugepte_cache) {
-                        /*
-                         * Create a kmem cache for hugeptes.  The bottom bits in
-                         * the pte have size information encoded in them, so
-                         * align them to allow this
-                         */
-                        hugepte_cache = kmem_cache_create("hugepte-cache",
-                                                          sizeof(pte_t),
-                                                          HUGEPD_SHIFT_MASK + 1,
-                                                          0, NULL);
-                        if (hugepte_cache == NULL)
-                                panic("%s: Unable to create kmem cache "
-                                      "for hugeptes\n", __func__);
-
-                }
+                else
+                        pgtable_cache_add(PTE_T_ORDER);
 #endif
         }
 
diff --git a/arch/powerpc/mm/init-common.c b/arch/powerpc/mm/init-common.c
index 2b656e67f2ea..1e6910eb70ed 100644
--- a/arch/powerpc/mm/init-common.c
+++ b/arch/powerpc/mm/init-common.c
@@ -25,22 +25,40 @@
 #include <asm/pgalloc.h>
 #include <asm/pgtable.h>
 
-static void pgd_ctor(void *addr)
-{
-        memset(addr, 0, PGD_TABLE_SIZE);
+#define CTOR(shift) static void ctor_##shift(void *addr) \
+{                                                       \
+        memset(addr, 0, sizeof(void *) << (shift));     \
 }
 
-static void pud_ctor(void *addr)
-{
-        memset(addr, 0, PUD_TABLE_SIZE);
-}
+CTOR(0); CTOR(1); CTOR(2); CTOR(3); CTOR(4); CTOR(5); CTOR(6); CTOR(7);
+CTOR(8); CTOR(9); CTOR(10); CTOR(11); CTOR(12); CTOR(13); CTOR(14); CTOR(15);
 
-static void pmd_ctor(void *addr)
+static inline void (*ctor(int shift))(void *)
 {
-        memset(addr, 0, PMD_TABLE_SIZE);
+        BUILD_BUG_ON(MAX_PGTABLE_INDEX_SIZE != 15);
+
+        switch (shift) {
+        case 0: return ctor_0;
+        case 1: return ctor_1;
+        case 2: return ctor_2;
+        case 3: return ctor_3;
+        case 4: return ctor_4;
+        case 5: return ctor_5;
+        case 6: return ctor_6;
+        case 7: return ctor_7;
+        case 8: return ctor_8;
+        case 9: return ctor_9;
+        case 10: return ctor_10;
+        case 11: return ctor_11;
+        case 12: return ctor_12;
+        case 13: return ctor_13;
+        case 14: return ctor_14;
+        case 15: return ctor_15;
+        }
+        return NULL;
 }
 
-struct kmem_cache *pgtable_cache[MAX_PGTABLE_INDEX_SIZE];
+struct kmem_cache *pgtable_cache[MAX_PGTABLE_INDEX_SIZE + 1];
 EXPORT_SYMBOL_GPL(pgtable_cache);       /* used by kvm_hv module */
 
 /*
@@ -50,7 +68,7 @@ EXPORT_SYMBOL_GPL(pgtable_cache);	/* used by kvm_hv module */
  * everything else.  Caches created by this function are used for all
  * the higher level pagetables, and for hugepage pagetables.
  */
-void pgtable_cache_add(unsigned shift, void (*ctor)(void *))
+void pgtable_cache_add(unsigned int shift)
 {
         char *name;
         unsigned long table_size = sizeof(void *) << shift;
@@ -71,19 +89,19 @@ void pgtable_cache_add(unsigned shift, void (*ctor)(void *))
          * moment, gcc doesn't seem to recognize is_power_of_2 as a
          * constant expression, so so much for that. */
         BUG_ON(!is_power_of_2(minalign));
-        BUG_ON((shift < 1) || (shift > MAX_PGTABLE_INDEX_SIZE));
+        BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
 
         if (PGT_CACHE(shift))
                 return; /* Already have a cache of this size */
 
         align = max_t(unsigned long, align, minalign);
         name = kasprintf(GFP_KERNEL, "pgtable-2^%d", shift);
-        new = kmem_cache_create(name, table_size, align, 0, ctor);
+        new = kmem_cache_create(name, table_size, align, 0, ctor(shift));
         if (!new)
                 panic("Could not allocate pgtable cache for order %d", shift);
 
         kfree(name);
-        pgtable_cache[shift - 1] = new;
+        pgtable_cache[shift] = new;
 
         pr_debug("Allocated pgtable cache for order %d\n", shift);
 }
@@ -91,15 +109,15 @@ EXPORT_SYMBOL_GPL(pgtable_cache_add);	/* used by kvm_hv module */
 
 void pgtable_cache_init(void)
 {
-        pgtable_cache_add(PGD_INDEX_SIZE, pgd_ctor);
+        pgtable_cache_add(PGD_INDEX_SIZE);
 
-        if (PMD_CACHE_INDEX && !PGT_CACHE(PMD_CACHE_INDEX))
-                pgtable_cache_add(PMD_CACHE_INDEX, pmd_ctor);
+        if (PMD_CACHE_INDEX)
+                pgtable_cache_add(PMD_CACHE_INDEX);
         /*
          * In all current configs, when the PUD index exists it's the
          * same size as either the pgd or pmd index except with THP enabled
          * on book3s 64
          */
-        if (PUD_CACHE_INDEX && !PGT_CACHE(PUD_CACHE_INDEX))
-                pgtable_cache_add(PUD_CACHE_INDEX, pud_ctor);
+        if (PUD_CACHE_INDEX)
+                pgtable_cache_add(PUD_CACHE_INDEX);
 }
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index 0a64fffabee1..20394e52fe27 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -246,35 +246,19 @@ static int __init mark_nonram_nosave(void)
 }
 #endif
 
-static bool zone_limits_final;
-
 /*
- * The memory zones past TOP_ZONE are managed by generic mm code.
- * These should be set to zero since that's what every other
- * architecture does.
+ * Zones usage:
+ *
+ * We setup ZONE_DMA to be 31-bits on all platforms and ZONE_NORMAL to be
+ * everything else. GFP_DMA32 page allocations automatically fall back to
+ * ZONE_DMA.
+ *
+ * By using 31-bit unconditionally, we can exploit ARCH_ZONE_DMA_BITS to
+ * inform the generic DMA mapping code.  32-bit only devices (if not handled
+ * by an IOMMU anyway) will take a first dip into ZONE_NORMAL and get
+ * otherwise served by ZONE_DMA.
  */
-static unsigned long max_zone_pfns[MAX_NR_ZONES] = {
-        [0            ... TOP_ZONE        ] = ~0UL,
-        [TOP_ZONE + 1 ... MAX_NR_ZONES - 1] = 0
-};
-
-/*
- * Restrict the specified zone and all more restrictive zones
- * to be below the specified pfn.  May not be called after
- * paging_init().
- */
-void __init limit_zone_pfn(enum zone_type zone, unsigned long pfn_limit)
-{
-        int i;
-
-        if (WARN_ON(zone_limits_final))
-                return;
-
-        for (i = zone; i >= 0; i--) {
-                if (max_zone_pfns[i] > pfn_limit)
-                        max_zone_pfns[i] = pfn_limit;
-        }
-}
+static unsigned long max_zone_pfns[MAX_NR_ZONES];
 
 /*
  * Find the least restrictive zone that is entirely below the
@@ -324,11 +308,14 @@ void __init paging_init(void)
         printk(KERN_DEBUG "Memory hole size: %ldMB\n",
                (long int)((top_of_ram - total_ram) >> 20));
 
+#ifdef CONFIG_ZONE_DMA
+        max_zone_pfns[ZONE_DMA] = min(max_low_pfn, 0x7fffffffUL >> PAGE_SHIFT);
+#endif
+        max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
 #ifdef CONFIG_HIGHMEM
-        limit_zone_pfn(ZONE_NORMAL, lowmem_end_addr >> PAGE_SHIFT);
+        max_zone_pfns[ZONE_HIGHMEM] = max_pfn;
 #endif
-        limit_zone_pfn(TOP_ZONE, top_of_ram >> PAGE_SHIFT);
-        zone_limits_final = true;
+
         free_area_init_nodes(max_zone_pfns);
 
         mark_nonram_nosave();
@@ -503,7 +490,7 @@ EXPORT_SYMBOL(flush_icache_user_range);
 void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
                       pte_t *ptep)
 {
-#ifdef CONFIG_PPC_STD_MMU
+#ifdef CONFIG_PPC_BOOK3S
         /*
          * We don't need to worry about _PAGE_PRESENT here because we are
          * called with either mm->page_table_lock held or ptl lock held
@@ -541,7 +528,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
         }
 
         hash_preload(vma->vm_mm, address, is_exec, trap);
-#endif /* CONFIG_PPC_STD_MMU */
+#endif /* CONFIG_PPC_BOOK3S */
 #if (defined(CONFIG_PPC_BOOK3E_64) || defined(CONFIG_PPC_FSL_BOOK3E)) \
         && defined(CONFIG_HUGETLB_PAGE)
         if (is_vm_hugetlb_page(vma))
diff --git a/arch/powerpc/mm/mmu_context.c b/arch/powerpc/mm/mmu_context.c
index f84e14f23e50..bb52320b7369 100644
--- a/arch/powerpc/mm/mmu_context.c
+++ b/arch/powerpc/mm/mmu_context.c
@@ -15,6 +15,7 @@
 #include <linux/sched/mm.h>
 
 #include <asm/mmu_context.h>
+#include <asm/pgalloc.h>
 
 #if defined(CONFIG_PPC32)
 static inline void switch_mm_pgdir(struct task_struct *tsk,
@@ -97,3 +98,12 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
         switch_mmu_context(prev, next, tsk);
 }
 
+#ifdef CONFIG_PPC32
+void arch_exit_mmap(struct mm_struct *mm)
+{
+        void *frag = pte_frag_get(&mm->context);
+
+        if (frag)
+                pte_frag_destroy(frag);
+}
+#endif
diff --git a/arch/powerpc/mm/mmu_context_book3s64.c b/arch/powerpc/mm/mmu_context_book3s64.c
index 510f103d7813..f720c5cc0b5e 100644
--- a/arch/powerpc/mm/mmu_context_book3s64.c
+++ b/arch/powerpc/mm/mmu_context_book3s64.c
@@ -164,21 +164,6 @@ static void destroy_contexts(mm_context_t *ctx)
         }
 }
 
-static void pte_frag_destroy(void *pte_frag)
-{
-        int count;
-        struct page *page;
-
-        page = virt_to_page(pte_frag);
-        /* drop all the pending references */
-        count = ((unsigned long)pte_frag & ~PAGE_MASK) >> PTE_FRAG_SIZE_SHIFT;
-        /* We allow PTE_FRAG_NR fragments from a PTE page */
-        if (atomic_sub_and_test(PTE_FRAG_NR - count, &page->pt_frag_refcount)) {
-                pgtable_page_dtor(page);
-                __free_page(page);
-        }
-}
-
 static void pmd_frag_destroy(void *pmd_frag)
 {
         int count;
diff --git a/arch/powerpc/mm/mmu_context_iommu.c b/arch/powerpc/mm/mmu_context_iommu.c
index 56c2234cc6ae..a712a650a8b6 100644
--- a/arch/powerpc/mm/mmu_context_iommu.c
+++ b/arch/powerpc/mm/mmu_context_iommu.c
@@ -36,6 +36,8 @@ struct mm_iommu_table_group_mem_t {
         u64 ua;                 /* userspace address */
         u64 entries;            /* number of entries in hpas[] */
         u64 *hpas;              /* vmalloc'ed */
+#define MM_IOMMU_TABLE_INVALID_HPA      ((uint64_t)-1)
+        u64 dev_hpa;            /* Device memory base address */
 };
 
 static long mm_iommu_adjust_locked_vm(struct mm_struct *mm,
@@ -126,7 +128,8 @@ static int mm_iommu_move_page_from_cma(struct page *page)
         return 0;
 }
 
-long mm_iommu_get(struct mm_struct *mm, unsigned long ua, unsigned long entries,
+static long mm_iommu_do_alloc(struct mm_struct *mm, unsigned long ua,
+                unsigned long entries, unsigned long dev_hpa,
                 struct mm_iommu_table_group_mem_t **pmem)
 {
         struct mm_iommu_table_group_mem_t *mem;
@@ -140,12 +143,6 @@ long mm_iommu_get(struct mm_struct *mm, unsigned long ua, unsigned long entries,
 
         list_for_each_entry_rcu(mem, &mm->context.iommu_group_mem_list,
                         next) {
-                if ((mem->ua == ua) && (mem->entries == entries)) {
-                        ++mem->used;
-                        *pmem = mem;
-                        goto unlock_exit;
-                }
-
                 /* Overlap? */
                 if ((mem->ua < (ua + (entries << PAGE_SHIFT))) &&
                                 (ua < (mem->ua +
@@ -156,11 +153,13 @@ long mm_iommu_get(struct mm_struct *mm, unsigned long ua, unsigned long entries,
 
         }
 
-        ret = mm_iommu_adjust_locked_vm(mm, entries, true);
-        if (ret)
-                goto unlock_exit;
+        if (dev_hpa == MM_IOMMU_TABLE_INVALID_HPA) {
+                ret = mm_iommu_adjust_locked_vm(mm, entries, true);
+                if (ret)
+                        goto unlock_exit;
 
-        locked_entries = entries;
+                locked_entries = entries;
+        }
 
         mem = kzalloc(sizeof(*mem), GFP_KERNEL);
         if (!mem) {
@@ -168,6 +167,13 @@ long mm_iommu_get(struct mm_struct *mm, unsigned long ua, unsigned long entries,
                 goto unlock_exit;
         }
 
+        if (dev_hpa != MM_IOMMU_TABLE_INVALID_HPA) {
+                mem->pageshift = __ffs(dev_hpa | (entries << PAGE_SHIFT));
+                mem->dev_hpa = dev_hpa;
+                goto good_exit;
+        }
+        mem->dev_hpa = MM_IOMMU_TABLE_INVALID_HPA;
+
         /*
          * For a starting point for a maximum page size calculation
          * we use @ua and @entries natural alignment to allow IOMMU pages
@@ -236,6 +242,7 @@ populate:
                 mem->hpas[i] = page_to_pfn(page) << PAGE_SHIFT;
         }
 
+good_exit:
         atomic64_set(&mem->mapped, 1);
         mem->used = 1;
         mem->ua = ua;
@@ -252,13 +259,31 @@ unlock_exit:
 
         return ret;
 }
-EXPORT_SYMBOL_GPL(mm_iommu_get);
+
+long mm_iommu_new(struct mm_struct *mm, unsigned long ua, unsigned long entries,
+                struct mm_iommu_table_group_mem_t **pmem)
+{
+        return mm_iommu_do_alloc(mm, ua, entries, MM_IOMMU_TABLE_INVALID_HPA,
+                        pmem);
+}
+EXPORT_SYMBOL_GPL(mm_iommu_new);
+
+long mm_iommu_newdev(struct mm_struct *mm, unsigned long ua,
+                unsigned long entries, unsigned long dev_hpa,
+                struct mm_iommu_table_group_mem_t **pmem)
+{
+        return mm_iommu_do_alloc(mm, ua, entries, dev_hpa, pmem);
+}
+EXPORT_SYMBOL_GPL(mm_iommu_newdev);
 
 static void mm_iommu_unpin(struct mm_iommu_table_group_mem_t *mem)
 {
         long i;
         struct page *page = NULL;
 
+        if (!mem->hpas)
+                return;
+
         for (i = 0; i < mem->entries; ++i) {
                 if (!mem->hpas[i])
                         continue;
@@ -300,6 +325,7 @@ static void mm_iommu_release(struct mm_iommu_table_group_mem_t *mem)
 long mm_iommu_put(struct mm_struct *mm, struct mm_iommu_table_group_mem_t *mem)
 {
         long ret = 0;
+        unsigned long entries, dev_hpa;
 
         mutex_lock(&mem_list_mutex);
 
@@ -321,9 +347,12 @@ long mm_iommu_put(struct mm_struct *mm, struct mm_iommu_table_group_mem_t *mem)
         }
 
         /* @mapped became 0 so now mappings are disabled, release the region */
+        entries = mem->entries;
+        dev_hpa = mem->dev_hpa;
         mm_iommu_release(mem);
 
-        mm_iommu_adjust_locked_vm(mm, mem->entries, false);
+        if (dev_hpa == MM_IOMMU_TABLE_INVALID_HPA)
+                mm_iommu_adjust_locked_vm(mm, entries, false);
 
 unlock_exit:
         mutex_unlock(&mem_list_mutex);
@@ -368,27 +397,32 @@ struct mm_iommu_table_group_mem_t *mm_iommu_lookup_rm(struct mm_struct *mm,
         return ret;
 }
 
-struct mm_iommu_table_group_mem_t *mm_iommu_find(struct mm_struct *mm,
+struct mm_iommu_table_group_mem_t *mm_iommu_get(struct mm_struct *mm,
                 unsigned long ua, unsigned long entries)
 {
         struct mm_iommu_table_group_mem_t *mem, *ret = NULL;
 
+        mutex_lock(&mem_list_mutex);
+
         list_for_each_entry_rcu(mem, &mm->context.iommu_group_mem_list, next) {
                 if ((mem->ua == ua) && (mem->entries == entries)) {
                         ret = mem;
+                        ++mem->used;
                         break;
                 }
         }
 
+        mutex_unlock(&mem_list_mutex);
+
         return ret;
 }
-EXPORT_SYMBOL_GPL(mm_iommu_find);
+EXPORT_SYMBOL_GPL(mm_iommu_get);
 
 long mm_iommu_ua_to_hpa(struct mm_iommu_table_group_mem_t *mem,
                 unsigned long ua, unsigned int pageshift, unsigned long *hpa)
 {
         const long entry = (ua - mem->ua) >> PAGE_SHIFT;
-        u64 *va = &mem->hpas[entry];
+        u64 *va;
 
         if (entry >= mem->entries)
                 return -EFAULT;
@@ -396,6 +430,12 @@ long mm_iommu_ua_to_hpa(struct mm_iommu_table_group_mem_t *mem,
         if (pageshift > mem->pageshift)
                 return -EFAULT;
 
+        if (!mem->hpas) {
+                *hpa = mem->dev_hpa + (ua - mem->ua);
+                return 0;
+        }
+
+        va = &mem->hpas[entry];
         *hpa = (*va & MM_IOMMU_TABLE_GROUP_PAGE_MASK) | (ua & ~PAGE_MASK);
 
         return 0;
@@ -406,7 +446,6 @@ long mm_iommu_ua_to_hpa_rm(struct mm_iommu_table_group_mem_t *mem,
                 unsigned long ua, unsigned int pageshift, unsigned long *hpa)
 {
         const long entry = (ua - mem->ua) >> PAGE_SHIFT;
-        void *va = &mem->hpas[entry];
         unsigned long *pa;
 
         if (entry >= mem->entries)
@@ -415,7 +454,12 @@ long mm_iommu_ua_to_hpa_rm(struct mm_iommu_table_group_mem_t *mem,
         if (pageshift > mem->pageshift)
                 return -EFAULT;
 
-        pa = (void *) vmalloc_to_phys(va);
+        if (!mem->hpas) {
+                *hpa = mem->dev_hpa + (ua - mem->ua);
+                return 0;
+        }
+
+        pa = (void *) vmalloc_to_phys(&mem->hpas[entry]);
         if (!pa)
                 return -EFAULT;
 
@@ -435,6 +479,9 @@ extern void mm_iommu_ua_mark_dirty_rm(struct mm_struct *mm, unsigned long ua)
         if (!mem)
                 return;
 
+        if (mem->dev_hpa != MM_IOMMU_TABLE_INVALID_HPA)
+                return;
+
         entry = (ua - mem->ua) >> PAGE_SHIFT;
         va = &mem->hpas[entry];
 
@@ -445,6 +492,33 @@ extern void mm_iommu_ua_mark_dirty_rm(struct mm_struct *mm, unsigned long ua)
         *pa |= MM_IOMMU_TABLE_GROUP_PAGE_DIRTY;
 }
 
+bool mm_iommu_is_devmem(struct mm_struct *mm, unsigned long hpa,
+                unsigned int pageshift, unsigned long *size)
+{
+        struct mm_iommu_table_group_mem_t *mem;
+        unsigned long end;
+
+        list_for_each_entry_rcu(mem, &mm->context.iommu_group_mem_list, next) {
+                if (mem->dev_hpa == MM_IOMMU_TABLE_INVALID_HPA)
+                        continue;
+
+                end = mem->dev_hpa + (mem->entries << PAGE_SHIFT);
+                if ((mem->dev_hpa <= hpa) && (hpa < end)) {
+                        /*
+                         * Since the IOMMU page size might be bigger than
+                         * PAGE_SIZE, the amount of preregistered memory
+                         * starting from @hpa might be smaller than 1<<pageshift
+                         * and the caller needs to distinguish this situation.
+                         */
+                        *size = min(1UL << pageshift, end - hpa);
+                        return true;
+                }
+        }
+
+        return false;
+}
+EXPORT_SYMBOL_GPL(mm_iommu_is_devmem);
+
 long mm_iommu_mapped_inc(struct mm_iommu_table_group_mem_t *mem)
 {
         if (atomic64_inc_not_zero(&mem->mapped))
diff --git a/arch/powerpc/mm/mmu_context_nohash.c b/arch/powerpc/mm/mmu_context_nohash.c
index 2faca46ad720..22d71a58167f 100644
--- a/arch/powerpc/mm/mmu_context_nohash.c
+++ b/arch/powerpc/mm/mmu_context_nohash.c
@@ -372,7 +372,6 @@ int init_new_context(struct task_struct *t, struct mm_struct *mm)
 {
         pr_hard("initing context for mm @%p\n", mm);
 
-#ifdef  CONFIG_PPC_MM_SLICES
         /*
          * We have MMU_NO_CONTEXT set to be ~0. Hence check
          * explicitly against context.id == 0. This ensures that we properly
@@ -382,9 +381,9 @@ int init_new_context(struct task_struct *t, struct mm_struct *mm)
          */
         if (mm->context.id == 0)
                 slice_init_new_context_exec(mm);
-#endif
         mm->context.id = MMU_NO_CONTEXT;
         mm->context.active = 0;
+        pte_frag_set(&mm->context, NULL);
         return 0;
 }
 
@@ -487,4 +486,3 @@ void __init mmu_context_init(void)
         next_context = FIRST_CONTEXT;
         nr_free_contexts = LAST_CONTEXT - FIRST_CONTEXT + 1;
 }
-
diff --git a/arch/powerpc/mm/mmu_decl.h b/arch/powerpc/mm/mmu_decl.h
index 8574fbbc45e0..c4a717da65eb 100644
--- a/arch/powerpc/mm/mmu_decl.h
+++ b/arch/powerpc/mm/mmu_decl.h
@@ -155,7 +155,7 @@ struct tlbcam {
 };
 #endif
 
-#if defined(CONFIG_6xx) || defined(CONFIG_FSL_BOOKE) || defined(CONFIG_PPC_8xx)
+#if defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_FSL_BOOKE) || defined(CONFIG_PPC_8xx)
 /* 6xx have BATS */
 /* FSL_BOOKE have TLBCAM */
 /* 8xx have LTLB */
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index ce28ae5ca080..87f0dd004295 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -1475,7 +1475,7 @@ static int dt_update_callback(struct notifier_block *nb,
 
         switch (action) {
         case OF_RECONFIG_UPDATE_PROPERTY:
-                if (!of_prop_cmp(update->dn->type, "cpu") &&
+                if (of_node_is_type(update->dn, "cpu") &&
                     !of_prop_cmp(update->prop->name, "ibm,associativity")) {
                         u32 core_id;
                         of_property_read_u32(update->dn, "reg", &core_id);
diff --git a/arch/powerpc/mm/pgtable-book3s64.c b/arch/powerpc/mm/pgtable-book3s64.c
index 9f93c9f985c5..f3c31f5e1026 100644
--- a/arch/powerpc/mm/pgtable-book3s64.c
+++ b/arch/powerpc/mm/pgtable-book3s64.c
@@ -244,6 +244,9 @@ static pmd_t *get_pmd_from_cache(struct mm_struct *mm)
 {
         void *pmd_frag, *ret;
 
+        if (PMD_FRAG_NR == 1)
+                return NULL;
+
         spin_lock(&mm->page_table_lock);
         ret = mm->context.pmd_frag;
         if (ret) {
@@ -322,91 +325,6 @@ void pmd_fragment_free(unsigned long *pmd)
         }
 }
 
-static pte_t *get_pte_from_cache(struct mm_struct *mm)
-{
-        void *pte_frag, *ret;
-
-        spin_lock(&mm->page_table_lock);
-        ret = mm->context.pte_frag;
-        if (ret) {
-                pte_frag = ret + PTE_FRAG_SIZE;
-                /*
-                 * If we have taken up all the fragments mark PTE page NULL
-                 */
-                if (((unsigned long)pte_frag & ~PAGE_MASK) == 0)
-                        pte_frag = NULL;
-                mm->context.pte_frag = pte_frag;
-        }
-        spin_unlock(&mm->page_table_lock);
-        return (pte_t *)ret;
-}
-
-static pte_t *__alloc_for_ptecache(struct mm_struct *mm, int kernel)
-{
-        void *ret = NULL;
-        struct page *page;
-
-        if (!kernel) {
-                page = alloc_page(PGALLOC_GFP | __GFP_ACCOUNT);
-                if (!page)
-                        return NULL;
-                if (!pgtable_page_ctor(page)) {
-                        __free_page(page);
-                        return NULL;
-                }
-        } else {
-                page = alloc_page(PGALLOC_GFP);
-                if (!page)
-                        return NULL;
-        }
-
-        atomic_set(&page->pt_frag_refcount, 1);
-
-        ret = page_address(page);
-        /*
-         * if we support only one fragment just return the
-         * allocated page.
-         */
-        if (PTE_FRAG_NR == 1)
-                return ret;
-        spin_lock(&mm->page_table_lock);
-        /*
-         * If we find pgtable_page set, we return
-         * the allocated page with single fragement
-         * count.
-         */
-        if (likely(!mm->context.pte_frag)) {
-                atomic_set(&page->pt_frag_refcount, PTE_FRAG_NR);
-                mm->context.pte_frag = ret + PTE_FRAG_SIZE;
-        }
-        spin_unlock(&mm->page_table_lock);
-
-        return (pte_t *)ret;
-}
-
-pte_t *pte_fragment_alloc(struct mm_struct *mm, unsigned long vmaddr, int kernel)
-{
-        pte_t *pte;
-
-        pte = get_pte_from_cache(mm);
-        if (pte)
-                return pte;
-
-        return __alloc_for_ptecache(mm, kernel);
-}
-
-void pte_fragment_free(unsigned long *table, int kernel)
-{
-        struct page *page = virt_to_page(table);
-
-        BUG_ON(atomic_read(&page->pt_frag_refcount) <= 0);
-        if (atomic_dec_and_test(&page->pt_frag_refcount)) {
-                if (!kernel)
-                        pgtable_page_dtor(page);
-                __free_page(page);
-        }
-}
-
 static inline void pgtable_free(void *table, int index)
 {
         switch (index) {
diff --git a/arch/powerpc/mm/pgtable-frag.c b/arch/powerpc/mm/pgtable-frag.c
new file mode 100644
index 000000000000..af23a587f019
--- /dev/null
+++ b/arch/powerpc/mm/pgtable-frag.c
@@ -0,0 +1,119 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/*
+ *  Handling Page Tables through page fragments
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/gfp.h>
+#include <linux/mm.h>
+#include <linux/percpu.h>
+#include <linux/hardirq.h>
+#include <linux/hugetlb.h>
+#include <asm/pgalloc.h>
+#include <asm/tlbflush.h>
+#include <asm/tlb.h>
+
+void pte_frag_destroy(void *pte_frag)
+{
+        int count;
+        struct page *page;
+
+        page = virt_to_page(pte_frag);
+        /* drop all the pending references */
+        count = ((unsigned long)pte_frag & ~PAGE_MASK) >> PTE_FRAG_SIZE_SHIFT;
+        /* We allow PTE_FRAG_NR fragments from a PTE page */
+        if (atomic_sub_and_test(PTE_FRAG_NR - count, &page->pt_frag_refcount)) {
+                pgtable_page_dtor(page);
+                __free_page(page);
+        }
+}
+
+static pte_t *get_pte_from_cache(struct mm_struct *mm)
+{
+        void *pte_frag, *ret;
+
+        if (PTE_FRAG_NR == 1)
+                return NULL;
+
+        spin_lock(&mm->page_table_lock);
+        ret = pte_frag_get(&mm->context);
+        if (ret) {
+                pte_frag = ret + PTE_FRAG_SIZE;
+                /*
+                 * If we have taken up all the fragments mark PTE page NULL
+                 */
+                if (((unsigned long)pte_frag & ~PAGE_MASK) == 0)
+                        pte_frag = NULL;
+                pte_frag_set(&mm->context, pte_frag);
+        }
+        spin_unlock(&mm->page_table_lock);
+        return (pte_t *)ret;
+}
+
+static pte_t *__alloc_for_ptecache(struct mm_struct *mm, int kernel)
+{
+        void *ret = NULL;
+        struct page *page;
+
+        if (!kernel) {
+                page = alloc_page(PGALLOC_GFP | __GFP_ACCOUNT);
+                if (!page)
+                        return NULL;
+                if (!pgtable_page_ctor(page)) {
+                        __free_page(page);
+                        return NULL;
+                }
+        } else {
+                page = alloc_page(PGALLOC_GFP);
+                if (!page)
+                        return NULL;
+        }
+
+        atomic_set(&page->pt_frag_refcount, 1);
+
+        ret = page_address(page);
+        /*
+         * if we support only one fragment just return the
+         * allocated page.
+         */
+        if (PTE_FRAG_NR == 1)
+                return ret;
+        spin_lock(&mm->page_table_lock);
+        /*
+         * If we find pgtable_page set, we return
+         * the allocated page with single fragement
+         * count.
+         */
+        if (likely(!pte_frag_get(&mm->context))) {
+                atomic_set(&page->pt_frag_refcount, PTE_FRAG_NR);
+                pte_frag_set(&mm->context, ret + PTE_FRAG_SIZE);
+        }
+        spin_unlock(&mm->page_table_lock);
+
+        return (pte_t *)ret;
+}
+
+pte_t *pte_fragment_alloc(struct mm_struct *mm, unsigned long vmaddr, int kernel)
+{
+        pte_t *pte;
+
+        pte = get_pte_from_cache(mm);
+        if (pte)
+                return pte;
+
+        return __alloc_for_ptecache(mm, kernel);
+}
+
+void pte_fragment_free(unsigned long *table, int kernel)
+{
+        struct page *page = virt_to_page(table);
+
+        BUG_ON(atomic_read(&page->pt_frag_refcount) <= 0);
+        if (atomic_dec_and_test(&page->pt_frag_refcount)) {
+                if (!kernel)
+                        pgtable_page_dtor(page);
+                __free_page(page);
+        }
+}
diff --git a/arch/powerpc/mm/pgtable.c b/arch/powerpc/mm/pgtable.c
index 010e1c616cb2..d3d61d29b4f1 100644
--- a/arch/powerpc/mm/pgtable.c
+++ b/arch/powerpc/mm/pgtable.c
@@ -74,7 +74,7 @@ static struct page *maybe_pte_to_page(pte_t pte)
  * support falls into the same category.
  */
 
-static pte_t set_pte_filter(pte_t pte)
+static pte_t set_pte_filter_hash(pte_t pte)
 {
         if (radix_enabled())
                 return pte;
@@ -93,14 +93,12 @@ static pte_t set_pte_filter(pte_t pte)
         return pte;
 }
 
-static pte_t set_access_flags_filter(pte_t pte, struct vm_area_struct *vma,
-                                     int dirty)
-{
-        return pte;
-}
-
 #else /* CONFIG_PPC_BOOK3S */
 
+static pte_t set_pte_filter_hash(pte_t pte) { return pte; }
+
+#endif /* CONFIG_PPC_BOOK3S */
+
 /* Embedded type MMU with HW exec support. This is a bit more complicated
  * as we don't have two bits to spare for _PAGE_EXEC and _PAGE_HWEXEC so
  * instead we "filter out" the exec permission for non clean pages.
@@ -109,6 +107,9 @@ static pte_t set_pte_filter(pte_t pte)
 {
         struct page *pg;
 
+        if (mmu_has_feature(MMU_FTR_HPTE_TABLE))
+                return set_pte_filter_hash(pte);
+
         /* No exec permission in the first place, move on */
         if (!pte_exec(pte) || !pte_looks_normal(pte))
                 return pte;
@@ -138,6 +139,9 @@ static pte_t set_access_flags_filter(pte_t pte, struct vm_area_struct *vma,
 {
         struct page *pg;
 
+        if (mmu_has_feature(MMU_FTR_HPTE_TABLE))
+                return pte;
+
         /* So here, we only care about exec faults, as we use them
          * to recover lost _PAGE_EXEC and perform I$/D$ coherency
          * if necessary. Also if _PAGE_EXEC is already set, same deal,
@@ -172,8 +176,6 @@ static pte_t set_access_flags_filter(pte_t pte, struct vm_area_struct *vma,
         return pte_mkexec(pte);
 }
 
-#endif /* CONFIG_PPC_BOOK3S */
-
 /*
  * set_pte stores a linux PTE into the linux page table.
  */
@@ -221,9 +223,9 @@ int ptep_set_access_flags(struct vm_area_struct *vma, unsigned long address,
 }
 
 #ifdef CONFIG_HUGETLB_PAGE
-extern int huge_ptep_set_access_flags(struct vm_area_struct *vma,
-                                      unsigned long addr, pte_t *ptep,
-                                      pte_t pte, int dirty)
+int huge_ptep_set_access_flags(struct vm_area_struct *vma,
+                               unsigned long addr, pte_t *ptep,
+                               pte_t pte, int dirty)
 {
 #ifdef HUGETLB_NEED_PRELOAD
         /*
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index bda3c6f1bd32..d67215248d82 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -45,32 +45,15 @@ extern char etext[], _stext[], _sinittext[], _einittext[];
 
 __ref pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
 {
-        pte_t *pte;
+        if (!slab_is_available())
+                return memblock_alloc(PTE_FRAG_SIZE, PTE_FRAG_SIZE);
 
-        if (slab_is_available()) {
-                pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_ZERO);
-        } else {
-                pte = __va(memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE));
-                if (pte)
-                        clear_page(pte);
-        }
-        return pte;
+        return (pte_t *)pte_fragment_alloc(mm, address, 1);
 }
 
 pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address)
 {
-        struct page *ptepage;
-
-        gfp_t flags = GFP_KERNEL | __GFP_ZERO | __GFP_ACCOUNT;
-
-        ptepage = alloc_pages(flags, 0);
-        if (!ptepage)
-                return NULL;
-        if (!pgtable_page_ctor(ptepage)) {
-                __free_page(ptepage);
-                return NULL;
-        }
-        return ptepage;
+        return (pgtable_t)pte_fragment_alloc(mm, address, 0);
 }
 
 void __iomem *
@@ -160,7 +143,7 @@ __ioremap_caller(phys_addr_t addr, unsigned long size, pgprot_t prot, void *call
          * Don't allow anybody to remap normal RAM that we're using.
          * mem_init() sets high_memory so only do the check after that.
          */
-        if (slab_is_available() && (p < virt_to_phys(high_memory)) &&
+        if (slab_is_available() && p <= virt_to_phys(high_memory - 1) &&
             page_is_ram(__phys_to_pfn(p))) {
                 printk("__ioremap(): phys addr 0x%llx is RAM lr %ps\n",
                        (unsigned long long)p, __builtin_return_address(0));
@@ -260,7 +243,7 @@ static void __init __mapin_ram_chunk(unsigned long offset, unsigned long top)
                 ktext = ((char *)v >= _stext && (char *)v < etext) ||
                         ((char *)v >= _sinittext && (char *)v < _einittext);
                 map_kernel_page(v, p, ktext ? PAGE_KERNEL_TEXT : PAGE_KERNEL);
-#ifdef CONFIG_PPC_STD_MMU_32
+#ifdef CONFIG_PPC_BOOK3S_32
                 if (ktext)
                         hash_preload(&init_mm, v, false, 0x300);
 #endif
diff --git a/arch/powerpc/mm/pkeys.c b/arch/powerpc/mm/pkeys.c
index b271b283c785..587807763737 100644
--- a/arch/powerpc/mm/pkeys.c
+++ b/arch/powerpc/mm/pkeys.c
@@ -6,20 +6,21 @@
  */
 
 #include <asm/mman.h>
+#include <asm/mmu_context.h>
 #include <asm/setup.h>
 #include <linux/pkeys.h>
 #include <linux/of_device.h>
 
 DEFINE_STATIC_KEY_TRUE(pkey_disabled);
-bool pkey_execute_disable_supported;
 int  pkeys_total;               /* Total pkeys as per device tree */
-bool pkeys_devtree_defined;     /* pkey property exported by device tree */
 u32  initial_allocation_mask;   /* Bits set for the initially allocated keys */
 u32  reserved_allocation_mask;  /* Bits set for reserved keys */
-u64  pkey_amr_mask;             /* Bits in AMR not to be touched */
-u64  pkey_iamr_mask;            /* Bits in AMR not to be touched */
-u64  pkey_uamor_mask;           /* Bits in UMOR not to be touched */
-int  execute_only_key = 2;
+static bool pkey_execute_disable_supported;
+static bool pkeys_devtree_defined;      /* property exported by device tree */
+static u64 pkey_amr_mask;               /* Bits in AMR not to be touched */
+static u64 pkey_iamr_mask;              /* Bits in AMR not to be touched */
+static u64 pkey_uamor_mask;             /* Bits in UMOR not to be touched */
+static int execute_only_key = 2;
 
 #define AMR_BITS_PER_PKEY 2
 #define AMR_RD_BIT 0x1UL
@@ -57,7 +58,7 @@ static inline bool pkey_mmu_enabled(void)
                 return cpu_has_feature(CPU_FTR_PKEY);
 }
 
-int pkey_initialize(void)
+static int pkey_initialize(void)
 {
         int os_reserved, i;
 
@@ -414,3 +415,13 @@ bool arch_vma_access_permitted(struct vm_area_struct *vma, bool write,
 
         return pkey_access_permitted(vma_pkey(vma), write, execute);
 }
+
+void arch_dup_pkeys(struct mm_struct *oldmm, struct mm_struct *mm)
+{
+        if (static_branch_likely(&pkey_disabled))
+                return;
+
+        /* Duplicate the oldmm pkey state in mm: */
+        mm_pkey_allocation_map(mm) = mm_pkey_allocation_map(oldmm);
+        mm->context.execute_only_pkey = oldmm->context.execute_only_pkey;
+}
diff --git a/arch/powerpc/mm/ppc_mmu_32.c b/arch/powerpc/mm/ppc_mmu_32.c
index f6f575bae3bc..3f4193201ee7 100644
--- a/arch/powerpc/mm/ppc_mmu_32.c
+++ b/arch/powerpc/mm/ppc_mmu_32.c
@@ -31,6 +31,7 @@
 #include <asm/prom.h>
 #include <asm/mmu.h>
 #include <asm/machdep.h>
+#include <asm/code-patching.h>
 
 #include "mmu_decl.h"
 
@@ -52,7 +53,7 @@ struct batrange {		/* stores address ranges mapped by BATs */
 phys_addr_t v_block_mapped(unsigned long va)
 {
         int b;
-        for (b = 0; b < 4; ++b)
+        for (b = 0; b < ARRAY_SIZE(bat_addrs); ++b)
                 if (va >= bat_addrs[b].start && va < bat_addrs[b].limit)
                         return bat_addrs[b].phys + (va - bat_addrs[b].start);
         return 0;
@@ -64,7 +65,7 @@ phys_addr_t v_block_mapped(unsigned long va)
 unsigned long p_block_mapped(phys_addr_t pa)
 {
         int b;
-        for (b = 0; b < 4; ++b)
+        for (b = 0; b < ARRAY_SIZE(bat_addrs); ++b)
                 if (pa >= bat_addrs[b].phys
                     && pa < (bat_addrs[b].limit-bat_addrs[b].start)
                               +bat_addrs[b].phys)
@@ -182,22 +183,8 @@ void __init MMU_init_hw(void)
         unsigned int hmask, mb, mb2;
         unsigned int n_hpteg, lg_n_hpteg;
 
-        extern unsigned int hash_page_patch_A[];
-        extern unsigned int hash_page_patch_B[], hash_page_patch_C[];
-        extern unsigned int hash_page[];
-        extern unsigned int flush_hash_patch_A[], flush_hash_patch_B[];
-
-        if (!mmu_has_feature(MMU_FTR_HPTE_TABLE)) {
-                /*
-                 * Put a blr (procedure return) instruction at the
-                 * start of hash_page, since we can still get DSI
-                 * exceptions on a 603.
-                 */
-                hash_page[0] = 0x4e800020;
-                flush_icache_range((unsigned long) &hash_page[0],
-                                   (unsigned long) &hash_page[1]);
+        if (!mmu_has_feature(MMU_FTR_HPTE_TABLE))
                 return;
-        }
 
         if ( ppc_md.progress ) ppc_md.progress("hash:enter", 0x105);
 
@@ -244,31 +231,19 @@ void __init MMU_init_hw(void)
         if (lg_n_hpteg > 16)
                 mb2 = 16 - LG_HPTEG_SIZE;
 
-        hash_page_patch_A[0] = (hash_page_patch_A[0] & ~0xffff)
-                | ((unsigned int)(Hash) >> 16);
-        hash_page_patch_A[1] = (hash_page_patch_A[1] & ~0x7c0) | (mb << 6);
-        hash_page_patch_A[2] = (hash_page_patch_A[2] & ~0x7c0) | (mb2 << 6);
-        hash_page_patch_B[0] = (hash_page_patch_B[0] & ~0xffff) | hmask;
-        hash_page_patch_C[0] = (hash_page_patch_C[0] & ~0xffff) | hmask;
-
-        /*
-         * Ensure that the locations we've patched have been written
-         * out from the data cache and invalidated in the instruction
-         * cache, on those machines with split caches.
-         */
-        flush_icache_range((unsigned long) &hash_page_patch_A[0],
-                           (unsigned long) &hash_page_patch_C[1]);
+        modify_instruction_site(&patch__hash_page_A0, 0xffff, (unsigned int)Hash >> 16);
+        modify_instruction_site(&patch__hash_page_A1, 0x7c0, mb << 6);
+        modify_instruction_site(&patch__hash_page_A2, 0x7c0, mb2 << 6);
+        modify_instruction_site(&patch__hash_page_B, 0xffff, hmask);
+        modify_instruction_site(&patch__hash_page_C, 0xffff, hmask);
 
         /*
          * Patch up the instructions in hashtable.S:flush_hash_page
          */
-        flush_hash_patch_A[0] = (flush_hash_patch_A[0] & ~0xffff)
-                | ((unsigned int)(Hash) >> 16);
-        flush_hash_patch_A[1] = (flush_hash_patch_A[1] & ~0x7c0) | (mb << 6);
-        flush_hash_patch_A[2] = (flush_hash_patch_A[2] & ~0x7c0) | (mb2 << 6);
-        flush_hash_patch_B[0] = (flush_hash_patch_B[0] & ~0xffff) | hmask;
-        flush_icache_range((unsigned long) &flush_hash_patch_A[0],
-                           (unsigned long) &flush_hash_patch_B[1]);
+        modify_instruction_site(&patch__flush_hash_A0, 0xffff, (unsigned int)Hash >> 16);
+        modify_instruction_site(&patch__flush_hash_A1, 0x7c0, mb << 6);
+        modify_instruction_site(&patch__flush_hash_A2, 0x7c0, mb2 << 6);
+        modify_instruction_site(&patch__flush_hash_B, 0xffff, hmask);
 
         if ( ppc_md.progress ) ppc_md.progress("hash:done", 0x205);
 }
diff --git a/arch/powerpc/mm/tlb_low_64e.S b/arch/powerpc/mm/tlb_low_64e.S
index 7fd20c52a8ec..9ed90064f542 100644
--- a/arch/powerpc/mm/tlb_low_64e.S
+++ b/arch/powerpc/mm/tlb_low_64e.S
@@ -70,6 +70,13 @@ END_FTR_SECTION_IFSET(CPU_FTR_EMB_HV)
         std     r15,EX_TLB_R15(r12)
         std     r10,EX_TLB_CR(r12)
 #ifdef CONFIG_PPC_FSL_BOOK3E
+START_BTB_FLUSH_SECTION
+        mfspr r11, SPRN_SRR1
+        andi. r10,r11,MSR_PR
+        beq 1f
+        BTB_FLUSH(r10)
+1:
+END_BTB_FLUSH_SECTION
         std     r7,EX_TLB_R7(r12)
 #endif
         TLB_MISS_PROLOG_STATS
diff --git a/arch/powerpc/oprofile/Makefile b/arch/powerpc/oprofile/Makefile
index 8d26d7416481..bb2d94c8cbe6 100644
--- a/arch/powerpc/oprofile/Makefile
+++ b/arch/powerpc/oprofile/Makefile
@@ -16,4 +16,4 @@ oprofile-$(CONFIG_OPROFILE_CELL) += op_model_cell.o \
                 cell/spu_task_sync.o
 oprofile-$(CONFIG_PPC_BOOK3S_64) += op_model_power4.o op_model_pa6t.o
 oprofile-$(CONFIG_FSL_EMB_PERFMON) += op_model_fsl_emb.o
-oprofile-$(CONFIG_6xx) += op_model_7450.o
+oprofile-$(CONFIG_PPC_BOOK3S_32) += op_model_7450.o
diff --git a/arch/powerpc/oprofile/common.c b/arch/powerpc/oprofile/common.c
index bf094c5a4bd9..a11132865504 100644
--- a/arch/powerpc/oprofile/common.c
+++ b/arch/powerpc/oprofile/common.c
@@ -212,7 +212,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
                         model = &op_model_pa6t;
                         break;
 #endif
-#ifdef CONFIG_6xx
+#ifdef CONFIG_PPC_BOOK3S_32
                 case PPC_OPROFILE_G4:
                         model = &op_model_7450;
                         break;
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index 81f8a0c838ae..b0723002a396 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -10,6 +10,7 @@
  */
 #include <linux/kernel.h>
 #include <linux/sched.h>
+#include <linux/sched/clock.h>
 #include <linux/perf_event.h>
 #include <linux/percpu.h>
 #include <linux/hardirq.h>
@@ -130,6 +131,14 @@ static inline void power_pmu_bhrb_read(struct cpu_hw_events *cpuhw) {}
 static void pmao_restore_workaround(bool ebb) { }
 #endif /* CONFIG_PPC32 */
 
+bool is_sier_available(void)
+{
+        if (ppmu->flags & PPMU_HAS_SIER)
+                return true;
+
+        return false;
+}
+
 static bool regs_use_siar(struct pt_regs *regs)
 {
         /*
@@ -864,6 +873,8 @@ static int power_check_constraints(struct cpu_hw_events *cpuhw,
         int i, j;
         unsigned long addf = ppmu->add_fields;
         unsigned long tadd = ppmu->test_adder;
+        unsigned long grp_mask = ppmu->group_constraint_mask;
+        unsigned long grp_val = ppmu->group_constraint_val;
 
         if (n_ev > ppmu->n_counter)
                 return -1;
@@ -884,15 +895,23 @@ static int power_check_constraints(struct cpu_hw_events *cpuhw,
         for (i = 0; i < n_ev; ++i) {
                 nv = (value | cpuhw->avalues[i][0]) +
                         (value & cpuhw->avalues[i][0] & addf);
-                if ((((nv + tadd) ^ value) & mask) != 0 ||
-                    (((nv + tadd) ^ cpuhw->avalues[i][0]) &
-                     cpuhw->amasks[i][0]) != 0)
+
+                if (((((nv + tadd) ^ value) & mask) & (~grp_mask)) != 0)
+                        break;
+
+                if (((((nv + tadd) ^ cpuhw->avalues[i][0]) & cpuhw->amasks[i][0])
+                        & (~grp_mask)) != 0)
                         break;
+
                 value = nv;
                 mask |= cpuhw->amasks[i][0];
         }
-        if (i == n_ev)
-                return 0;       /* all OK */
+        if (i == n_ev) {
+                if ((value & mask & grp_mask) != (mask & grp_val))
+                        return -1;
+                else
+                        return 0;       /* all OK */
+        }
 
         /* doesn't work, gather alternatives... */
         if (!ppmu->get_alternatives)
@@ -2148,7 +2167,7 @@ static bool pmc_overflow(unsigned long val)
 /*
  * Performance monitor interrupt stuff
  */
-static void perf_event_interrupt(struct pt_regs *regs)
+static void __perf_event_interrupt(struct pt_regs *regs)
 {
         int i, j;
         struct cpu_hw_events *cpuhw = this_cpu_ptr(&cpu_hw_events);
@@ -2232,6 +2251,14 @@ static void perf_event_interrupt(struct pt_regs *regs)
                 irq_exit();
 }
 
+static void perf_event_interrupt(struct pt_regs *regs)
+{
+        u64 start_clock = sched_clock();
+
+        __perf_event_interrupt(regs);
+        perf_sample_event_took(sched_clock() - start_clock);
+}
+
 static int power_pmu_prepare_cpu(unsigned int cpu)
 {
         struct cpu_hw_events *cpuhw = &per_cpu(cpu_hw_events, cpu);
diff --git a/arch/powerpc/perf/imc-pmu.c b/arch/powerpc/perf/imc-pmu.c
index 6954636b16d1..f292a3f284f1 100644
--- a/arch/powerpc/perf/imc-pmu.c
+++ b/arch/powerpc/perf/imc-pmu.c
@@ -28,13 +28,13 @@ static DEFINE_MUTEX(nest_init_lock);
 static DEFINE_PER_CPU(struct imc_pmu_ref *, local_nest_imc_refc);
 static struct imc_pmu **per_nest_pmu_arr;
 static cpumask_t nest_imc_cpumask;
-struct imc_pmu_ref *nest_imc_refc;
+static struct imc_pmu_ref *nest_imc_refc;
 static int nest_pmus;
 
 /* Core IMC data structures and variables */
 
 static cpumask_t core_imc_cpumask;
-struct imc_pmu_ref *core_imc_refc;
+static struct imc_pmu_ref *core_imc_refc;
 static struct imc_pmu *core_imc_pmu;
 
 /* Thread IMC data structures and variables */
@@ -43,7 +43,7 @@ static DEFINE_PER_CPU(u64 *, thread_imc_mem);
 static struct imc_pmu *thread_imc_pmu;
 static int thread_imc_mem_size;
 
-struct imc_pmu *imc_event_to_pmu(struct perf_event *event)
+static struct imc_pmu *imc_event_to_pmu(struct perf_event *event)
 {
         return container_of(event->pmu, struct imc_pmu, pmu);
 }
diff --git a/arch/powerpc/perf/isa207-common.c b/arch/powerpc/perf/isa207-common.c
index 177de814286f..a6c24d866b2f 100644
--- a/arch/powerpc/perf/isa207-common.c
+++ b/arch/powerpc/perf/isa207-common.c
@@ -148,6 +148,14 @@ static bool is_thresh_cmp_valid(u64 event)
         return true;
 }
 
+static unsigned int dc_ic_rld_quad_l1_sel(u64 event)
+{
+        unsigned int cache;
+
+        cache = (event >> EVENT_CACHE_SEL_SHIFT) & MMCR1_DC_IC_QUAL_MASK;
+        return cache;
+}
+
 static inline u64 isa207_find_source(u64 idx, u32 sub_idx)
 {
         u64 ret = PERF_MEM_NA;
@@ -226,8 +234,13 @@ void isa207_get_mem_weight(u64 *weight)
         u64 mmcra = mfspr(SPRN_MMCRA);
         u64 exp = MMCRA_THR_CTR_EXP(mmcra);
         u64 mantissa = MMCRA_THR_CTR_MANT(mmcra);
+        u64 sier = mfspr(SPRN_SIER);
+        u64 val = (sier & ISA207_SIER_TYPE_MASK) >> ISA207_SIER_TYPE_SHIFT;
 
-        *weight = mantissa << (2 * exp);
+        if (val == 0 || val == 7)
+                *weight = 0;
+        else
+                *weight = mantissa << (2 * exp);
 }
 
 int isa207_get_constraint(u64 event, unsigned long *maskp, unsigned long *valp)
@@ -274,19 +287,27 @@ int isa207_get_constraint(u64 event, unsigned long *maskp, unsigned long *valp)
         }
 
         if (unit >= 6 && unit <= 9) {
-                /*
-                 * L2/L3 events contain a cache selector field, which is
-                 * supposed to be programmed into MMCRC. However MMCRC is only
-                 * HV writable, and there is no API for guest kernels to modify
-                 * it. The solution is for the hypervisor to initialise the
-                 * field to zeroes, and for us to only ever allow events that
-                 * have a cache selector of zero. The bank selector (bit 3) is
-                 * irrelevant, as long as the rest of the value is 0.
-                 */
-                if (cache & 0x7)
+                if (cpu_has_feature(CPU_FTR_ARCH_300)) {
+                        mask  |= CNST_CACHE_GROUP_MASK;
+                        value |= CNST_CACHE_GROUP_VAL(event & 0xff);
+
+                        mask |= CNST_CACHE_PMC4_MASK;
+                        if (pmc == 4)
+                                value |= CNST_CACHE_PMC4_VAL;
+                } else if (cache & 0x7) {
+                        /*
+                         * L2/L3 events contain a cache selector field, which is
+                         * supposed to be programmed into MMCRC. However MMCRC is only
+                         * HV writable, and there is no API for guest kernels to modify
+                         * it. The solution is for the hypervisor to initialise the
+                         * field to zeroes, and for us to only ever allow events that
+                         * have a cache selector of zero. The bank selector (bit 3) is
+                         * irrelevant, as long as the rest of the value is 0.
+                         */
                         return -1;
+                }
 
-        } else if (event & EVENT_IS_L1) {
+        } else if (cpu_has_feature(CPU_FTR_ARCH_300) || (event & EVENT_IS_L1)) {
                 mask  |= CNST_L1_QUAL_MASK;
                 value |= CNST_L1_QUAL_VAL(cache);
         }
@@ -389,11 +410,14 @@ int isa207_compute_mmcr(u64 event[], int n_ev,
                 /* In continuous sampling mode, update SDAR on TLB miss */
                 mmcra_sdar_mode(event[i], &mmcra);
 
-                if (event[i] & EVENT_IS_L1) {
-                        cache = event[i] >> EVENT_CACHE_SEL_SHIFT;
-                        mmcr1 |= (cache & 1) << MMCR1_IC_QUAL_SHIFT;
-                        cache >>= 1;
-                        mmcr1 |= (cache & 1) << MMCR1_DC_QUAL_SHIFT;
+                if (cpu_has_feature(CPU_FTR_ARCH_300)) {
+                        cache = dc_ic_rld_quad_l1_sel(event[i]);
+                        mmcr1 |= (cache) << MMCR1_DC_IC_QUAL_SHIFT;
+                } else {
+                        if (event[i] & EVENT_IS_L1) {
+                                cache = dc_ic_rld_quad_l1_sel(event[i]);
+                                mmcr1 |= (cache) << MMCR1_DC_IC_QUAL_SHIFT;
+                        }
                 }
 
                 if (is_event_marked(event[i])) {
diff --git a/arch/powerpc/perf/isa207-common.h b/arch/powerpc/perf/isa207-common.h
index 0028f4b9490d..91350f42a662 100644
--- a/arch/powerpc/perf/isa207-common.h
+++ b/arch/powerpc/perf/isa207-common.h
@@ -134,6 +134,11 @@
 #define CNST_SAMPLE_VAL(v)      (((v) & EVENT_SAMPLE_MASK) << 16)
 #define CNST_SAMPLE_MASK        CNST_SAMPLE_VAL(EVENT_SAMPLE_MASK)
 
+#define CNST_CACHE_GROUP_VAL(v) (((v) & 0xffull) << 55)
+#define CNST_CACHE_GROUP_MASK   CNST_CACHE_GROUP_VAL(0xff)
+#define CNST_CACHE_PMC4_VAL     (1ull << 54)
+#define CNST_CACHE_PMC4_MASK    CNST_CACHE_PMC4_VAL
+
 /*
  * For NC we are counting up to 4 events. This requires three bits, and we need
  * the fifth event to overflow and set the 4th bit. To achieve that we bias the
@@ -163,8 +168,8 @@
 #define MMCR1_COMBINE_SHIFT(pmc)        (35 - ((pmc) - 1))
 #define MMCR1_PMCSEL_SHIFT(pmc)         (24 - (((pmc) - 1)) * 8)
 #define MMCR1_FAB_SHIFT                 36
-#define MMCR1_DC_QUAL_SHIFT             47
-#define MMCR1_IC_QUAL_SHIFT             46
+#define MMCR1_DC_IC_QUAL_MASK           0x3
+#define MMCR1_DC_IC_QUAL_SHIFT          46
 
 /* MMCR1 Combine bits macro for power9 */
 #define p9_MMCR1_COMBINE_SHIFT(pmc)     (38 - ((pmc - 1) * 2))
diff --git a/arch/powerpc/perf/perf_regs.c b/arch/powerpc/perf/perf_regs.c
index 09ceea6175ba..5c36b3a8d47a 100644
--- a/arch/powerpc/perf/perf_regs.c
+++ b/arch/powerpc/perf/perf_regs.c
@@ -69,6 +69,7 @@ static unsigned int pt_regs_offset[PERF_REG_POWERPC_MAX] = {
         PT_REGS_OFFSET(PERF_REG_POWERPC_TRAP, trap),
         PT_REGS_OFFSET(PERF_REG_POWERPC_DAR, dar),
         PT_REGS_OFFSET(PERF_REG_POWERPC_DSISR, dsisr),
+        PT_REGS_OFFSET(PERF_REG_POWERPC_SIER, dar),
 };
 
 u64 perf_reg_value(struct pt_regs *regs, int idx)
@@ -76,6 +77,12 @@ u64 perf_reg_value(struct pt_regs *regs, int idx)
         if (WARN_ON_ONCE(idx >= PERF_REG_POWERPC_MAX))
                 return 0;
 
+        if (idx == PERF_REG_POWERPC_SIER &&
+           (IS_ENABLED(CONFIG_FSL_EMB_PERF_EVENT) ||
+            IS_ENABLED(CONFIG_PPC32) ||
+            !is_sier_available()))
+                return 0;
+
         return regs_get_register(regs, pt_regs_offset[idx]);
 }
 
diff --git a/arch/powerpc/perf/power9-pmu.c b/arch/powerpc/perf/power9-pmu.c
index e012b1030a5b..0ff9c43733e9 100644
--- a/arch/powerpc/perf/power9-pmu.c
+++ b/arch/powerpc/perf/power9-pmu.c
@@ -63,16 +63,8 @@
  *      MMCRA[9:11] = thresh_cmp[0:2]
  *      MMCRA[12:18] = thresh_cmp[3:9]
  *
- * if unit == 6 or unit == 7
- *      MMCRC[53:55] = cache_sel[1:3]      (L2EVENT_SEL)
- * else if unit == 8 or unit == 9:
- *      if cache_sel[0] == 0: # L3 bank
- *              MMCRC[47:49] = cache_sel[1:3]  (L3EVENT_SEL0)
- *      else if cache_sel[0] == 1:
- *              MMCRC[50:51] = cache_sel[2:3]  (L3EVENT_SEL1)
- * else if cache_sel[1]: # L1 event
- *      MMCR1[16] = cache_sel[2]
- *     MMCR1[17] = cache_sel[3]
+ * MMCR1[16] = cache_sel[2]
+ * MMCR1[17] = cache_sel[3]
  *
  * if mark:
  *      MMCRA[63]    = 1                (SAMPLE_ENABLE)
@@ -179,8 +171,6 @@ CACHE_EVENT_ATTR(L1-icache-prefetches,		PM_IC_PREF_WRITE);
 CACHE_EVENT_ATTR(LLC-load-misses,               PM_DATA_FROM_L3MISS);
 CACHE_EVENT_ATTR(LLC-loads,                     PM_DATA_FROM_L3);
 CACHE_EVENT_ATTR(LLC-prefetches,                PM_L3_PREF_ALL);
-CACHE_EVENT_ATTR(LLC-store-misses,              PM_L2_ST_MISS);
-CACHE_EVENT_ATTR(LLC-stores,                    PM_L2_ST);
 CACHE_EVENT_ATTR(branch-load-misses,            PM_BR_MPRED_CMPL);
 CACHE_EVENT_ATTR(branch-loads,                  PM_BR_CMPL);
 CACHE_EVENT_ATTR(dTLB-load-misses,              PM_DTLB_MISS);
@@ -205,8 +195,6 @@ static struct attribute *power9_events_attr[] = {
         CACHE_EVENT_PTR(PM_DATA_FROM_L3MISS),
         CACHE_EVENT_PTR(PM_DATA_FROM_L3),
         CACHE_EVENT_PTR(PM_L3_PREF_ALL),
-        CACHE_EVENT_PTR(PM_L2_ST_MISS),
-        CACHE_EVENT_PTR(PM_L2_ST),
         CACHE_EVENT_PTR(PM_BR_MPRED_CMPL),
         CACHE_EVENT_PTR(PM_BR_CMPL),
         CACHE_EVENT_PTR(PM_DTLB_MISS),
@@ -354,8 +342,8 @@ static int power9_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
                         [ C(RESULT_MISS)   ] = PM_DATA_FROM_L3MISS,
                 },
                 [ C(OP_WRITE) ] = {
-                        [ C(RESULT_ACCESS) ] = PM_L2_ST,
-                        [ C(RESULT_MISS)   ] = PM_L2_ST_MISS,
+                        [ C(RESULT_ACCESS) ] = 0,
+                        [ C(RESULT_MISS)   ] = 0,
                 },
                 [ C(OP_PREFETCH) ] = {
                         [ C(RESULT_ACCESS) ] = PM_L3_PREF_ALL,
@@ -427,6 +415,8 @@ static struct power_pmu power9_pmu = {
         .n_counter              = MAX_PMU_COUNTERS,
         .add_fields             = ISA207_ADD_FIELDS,
         .test_adder             = ISA207_TEST_ADDER,
+        .group_constraint_mask  = CNST_CACHE_PMC4_MASK,
+        .group_constraint_val   = CNST_CACHE_PMC4_VAL,
         .compute_mmcr           = isa207_compute_mmcr,
         .config_bhrb            = power9_config_bhrb,
         .bhrb_filter_map        = power9_bhrb_filter_map,
diff --git a/arch/powerpc/platforms/44x/warp.c b/arch/powerpc/platforms/44x/warp.c
index a886c2c22097..f467247fd1c4 100644
--- a/arch/powerpc/platforms/44x/warp.c
+++ b/arch/powerpc/platforms/44x/warp.c
@@ -47,7 +47,7 @@ static int __init warp_probe(void)
         if (!of_machine_is_compatible("pika,warp"))
                 return 0;
 
-        /* For __dma_alloc_coherent */
+        /* For __dma_nommu_alloc_coherent */
         ISA_DMA_THRESHOLD = ~0L;
 
         return 1;
@@ -179,9 +179,9 @@ static int pika_setup_leds(void)
         }
 
         for_each_child_of_node(np, child)
-                if (strcmp(child->name, "green") == 0)
+                if (of_node_name_eq(child, "green"))
                         green_led = of_get_gpio(child, 0);
-                else if (strcmp(child->name, "red") == 0)
+                else if (of_node_name_eq(child, "red"))
                         red_led = of_get_gpio(child, 0);
 
         of_node_put(np);
diff --git a/arch/powerpc/platforms/4xx/ocm.c b/arch/powerpc/platforms/4xx/ocm.c
index f5bbd4563342..f2610a02844a 100644
--- a/arch/powerpc/platforms/4xx/ocm.c
+++ b/arch/powerpc/platforms/4xx/ocm.c
@@ -223,8 +223,6 @@ static void __init ocm_init_node(int count, struct device_node *node)
         INIT_LIST_HEAD(&ocm->c.list);
 
         ocm->ready = 1;
-
-        return;
 }
 
 static int ocm_debugfs_show(struct seq_file *m, void *v)
@@ -242,9 +240,7 @@ static int ocm_debugfs_show(struct seq_file *m, void *v)
                 seq_printf(m, "PhysAddr     : 0x%llx\n", ocm->phys);
                 seq_printf(m, "MemTotal     : %d Bytes\n", ocm->memtotal);
                 seq_printf(m, "MemTotal(NC) : %d Bytes\n", ocm->nc.memtotal);
-                seq_printf(m, "MemTotal(C)  : %d Bytes\n", ocm->c.memtotal);
-
-                seq_printf(m, "\n");
+                seq_printf(m, "MemTotal(C)  : %d Bytes\n\n", ocm->c.memtotal);
 
                 seq_printf(m, "NC.PhysAddr  : 0x%llx\n", ocm->nc.phys);
                 seq_printf(m, "NC.VirtAddr  : 0x%p\n", ocm->nc.virt);
@@ -256,9 +252,7 @@ static int ocm_debugfs_show(struct seq_file *m, void *v)
                                                         blk->size, blk->owner);
                 }
 
-                seq_printf(m, "\n");
-
-                seq_printf(m, "C.PhysAddr   : 0x%llx\n", ocm->c.phys);
+                seq_printf(m, "\nC.PhysAddr   : 0x%llx\n", ocm->c.phys);
                 seq_printf(m, "C.VirtAddr   : 0x%p\n", ocm->c.virt);
                 seq_printf(m, "C.MemTotal   : %d Bytes\n", ocm->c.memtotal);
                 seq_printf(m, "C.MemFree    : %d Bytes\n", ocm->c.memfree);
@@ -268,7 +262,7 @@ static int ocm_debugfs_show(struct seq_file *m, void *v)
                                                 blk->size, blk->owner);
                 }
 
-                seq_printf(m, "\n");
+                seq_putc(m, '\n');
         }
 
         return 0;
@@ -338,7 +332,6 @@ void *ppc4xx_ocm_alloc(phys_addr_t *phys, int size, int align,
 
                 ocm_blk = kzalloc(sizeof(*ocm_blk), GFP_KERNEL);
                 if (!ocm_blk) {
-                        printk(KERN_ERR "PPC4XX OCM: could not allocate ocm block");
                         rh_free(ocm_reg->rh, offset);
                         break;
                 }
@@ -392,10 +385,8 @@ static int __init ppc4xx_ocm_init(void)
                 return 0;
 
         ocm_nodes = kzalloc((count * sizeof(struct ocm_info)), GFP_KERNEL);
-        if (!ocm_nodes) {
-                printk(KERN_ERR "PPC4XX OCM: failed to allocate OCM nodes!\n");
+        if (!ocm_nodes)
                 return -ENOMEM;
-        }
 
         ocm_count = count;
         count = 0;
diff --git a/arch/powerpc/platforms/4xx/pci.c b/arch/powerpc/platforms/4xx/pci.c
index 5aca523551ae..e6e2adcc7b64 100644
--- a/arch/powerpc/platforms/4xx/pci.c
+++ b/arch/powerpc/platforms/4xx/pci.c
@@ -1399,7 +1399,6 @@ static void __init ppc_476fpe_pciex_check_link(struct ppc4xx_pciex_port *port)
                 printk(KERN_WARNING "PCIE%d: Link up failed\n", port->index);
 
         iounmap(mbase);
-        return;
 }
 
 static struct ppc4xx_pciex_hwops ppc_476fpe_pcie_hwops __initdata =
@@ -2081,7 +2080,6 @@ static void __init ppc4xx_probe_pciex_bridge(struct device_node *np)
         const u32 *pval;
         int portno;
         unsigned int dcrs;
-        const char *val;
 
         /* First, proceed to core initialization as we assume there's
          * only one PCIe core in the system
@@ -2127,10 +2125,9 @@ static void __init ppc4xx_probe_pciex_bridge(struct device_node *np)
          * Resulting from this setup this PCIe port will be configured
          * as root-complex or as endpoint.
          */
-        val = of_get_property(port->node, "device_type", NULL);
-        if (!strcmp(val, "pci-endpoint")) {
+        if (of_node_is_type(port->node, "pci-endpoint")) {
                 port->endpoint = 1;
-        } else if (!strcmp(val, "pci")) {
+        } else if (of_node_is_type(port->node, "pci")) {
                 port->endpoint = 0;
         } else {
                 printk(KERN_ERR "PCIE: missing or incorrect device_type for %pOF\n",
diff --git a/arch/powerpc/platforms/512x/Kconfig b/arch/powerpc/platforms/512x/Kconfig
index b59eab6cbb1b..0c495823152c 100644
--- a/arch/powerpc/platforms/512x/Kconfig
+++ b/arch/powerpc/platforms/512x/Kconfig
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0
 config PPC_MPC512x
         bool "512x-based boards"
-        depends on 6xx
+        depends on PPC_BOOK3S_32
         select COMMON_CLK
         select FSL_SOC
         select IPIC
diff --git a/arch/powerpc/platforms/52xx/Kconfig b/arch/powerpc/platforms/52xx/Kconfig
index 55a587070342..67f8c2d8fc0e 100644
--- a/arch/powerpc/platforms/52xx/Kconfig
+++ b/arch/powerpc/platforms/52xx/Kconfig
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0
 config PPC_MPC52xx
         bool "52xx-based boards"
-        depends on 6xx
+        depends on PPC_BOOK3S_32
         select COMMON_CLK
         select PPC_PCI_CHOICE
 
diff --git a/arch/powerpc/platforms/52xx/efika.c b/arch/powerpc/platforms/52xx/efika.c
index 1ecbf176d35a..61538869e88a 100644
--- a/arch/powerpc/platforms/52xx/efika.c
+++ b/arch/powerpc/platforms/52xx/efika.c
@@ -82,11 +82,9 @@ static void __init efika_pcisetup(void)
                 return;
         }
 
-        for (pcictrl = NULL;;) {
-                pcictrl = of_get_next_child(root, pcictrl);
-                if ((pcictrl == NULL) || (strcmp(pcictrl->name, "pci") == 0))
+        for_each_child_of_node(root, pcictrl)
+                if (of_node_name_eq(pcictrl, "pci"))
                         break;
-        }
 
         of_node_put(root);
 
diff --git a/arch/powerpc/platforms/82xx/Kconfig b/arch/powerpc/platforms/82xx/Kconfig
index 1947a88bc69f..1af81de1c4e6 100644
--- a/arch/powerpc/platforms/82xx/Kconfig
+++ b/arch/powerpc/platforms/82xx/Kconfig
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0
 menuconfig PPC_82xx
         bool "82xx-based boards (PQ II)"
-        depends on 6xx
+        depends on PPC_BOOK3S_32
 
 if PPC_82xx
 
@@ -54,7 +54,7 @@ config PQ2ADS
 
 config 8260
         bool
-        depends on 6xx
+        depends on PPC_BOOK3S_32
         select CPM2
         help
           The MPC8260 is a typical embedded CPU made by Freescale.  Selecting
diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig
index 071f53b0c0a0..ff0c69dfdf1a 100644
--- a/arch/powerpc/platforms/83xx/Kconfig
+++ b/arch/powerpc/platforms/83xx/Kconfig
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0
 menuconfig PPC_83xx
         bool "83xx-based boards"
-        depends on 6xx
+        depends on PPC_BOOK3S_32
         select PPC_UDBG_16550
         select PPC_PCI_CHOICE
         select FSL_PCI if PCI
diff --git a/arch/powerpc/platforms/83xx/misc.c b/arch/powerpc/platforms/83xx/misc.c
index d75c9816a5c9..2b6589fe812d 100644
--- a/arch/powerpc/platforms/83xx/misc.c
+++ b/arch/powerpc/platforms/83xx/misc.c
@@ -14,6 +14,7 @@
 #include <linux/of_platform.h>
 #include <linux/pci.h>
 
+#include <asm/debug.h>
 #include <asm/io.h>
 #include <asm/hw_irq.h>
 #include <asm/ipic.h>
@@ -150,3 +151,19 @@ void __init mpc83xx_setup_arch(void)
 
         mpc83xx_setup_pci();
 }
+
+int machine_check_83xx(struct pt_regs *regs)
+{
+        u32 mask = 1 << (31 - IPIC_MCP_WDT);
+
+        if (!(regs->msr & SRR1_MCE_MCP) || !(ipic_get_mcp_status() & mask))
+                return machine_check_generic(regs);
+        ipic_clear_mcp_status(mask);
+
+        if (debugger_fault_handler(regs))
+                return 1;
+
+        die("Watchdog NMI Reset", regs, 0);
+
+        return 1;
+}
diff --git a/arch/powerpc/platforms/85xx/corenet_generic.c b/arch/powerpc/platforms/85xx/corenet_generic.c
index ac191a7a1337..b0dac307bebf 100644
--- a/arch/powerpc/platforms/85xx/corenet_generic.c
+++ b/arch/powerpc/platforms/85xx/corenet_generic.c
@@ -68,16 +68,6 @@ void __init corenet_gen_setup_arch(void)
 
         swiotlb_detect_4g();
 
-#if defined(CONFIG_FSL_PCI) && defined(CONFIG_ZONE_DMA32)
-        /*
-         * Inbound windows don't cover the full lower 4 GiB
-         * due to conflicts with PCICSRBAR and outbound windows,
-         * so limit the DMA32 zone to 2 GiB, to allow consistent
-         * allocations to succeed.
-         */
-        limit_zone_pfn(ZONE_DMA32, 1UL << (31 - PAGE_SHIFT));
-#endif
-
         pr_info("%s board\n", ppc_md.name);
 
         mpc85xx_qe_init();
diff --git a/arch/powerpc/platforms/85xx/qemu_e500.c b/arch/powerpc/platforms/85xx/qemu_e500.c
index b63a8548366f..27631c607f3d 100644
--- a/arch/powerpc/platforms/85xx/qemu_e500.c
+++ b/arch/powerpc/platforms/85xx/qemu_e500.c
@@ -45,15 +45,6 @@ static void __init qemu_e500_setup_arch(void)
 
         fsl_pci_assign_primary();
         swiotlb_detect_4g();
-#if defined(CONFIG_FSL_PCI) && defined(CONFIG_ZONE_DMA32)
-        /*
-         * Inbound windows don't cover the full lower 4 GiB
-         * due to conflicts with PCICSRBAR and outbound windows,
-         * so limit the DMA32 zone to 2 GiB, to allow consistent
-         * allocations to succeed.
-         */
-        limit_zone_pfn(ZONE_DMA32, 1UL << (31 - PAGE_SHIFT));
-#endif
         mpc85xx_smp_init();
 }
 
diff --git a/arch/powerpc/platforms/85xx/t1042rdb_diu.c b/arch/powerpc/platforms/85xx/t1042rdb_diu.c
index dac36ba82fea..2d1652108ba1 100644
--- a/arch/powerpc/platforms/85xx/t1042rdb_diu.c
+++ b/arch/powerpc/platforms/85xx/t1042rdb_diu.c
@@ -39,7 +39,7 @@ struct device_node *cpld_node;
  */
 static void t1042rdb_set_monitor_port(enum fsl_diu_monitor_port port)
 {
-        static void __iomem *cpld_base;
+        void __iomem *cpld_base;
 
         cpld_base = of_iomap(cpld_node, 0);
         if (!cpld_base) {
diff --git a/arch/powerpc/platforms/86xx/Kconfig b/arch/powerpc/platforms/86xx/Kconfig
index bcd179d3ed92..df692aa6b578 100644
--- a/arch/powerpc/platforms/86xx/Kconfig
+++ b/arch/powerpc/platforms/86xx/Kconfig
@@ -2,7 +2,7 @@
 config PPC_86xx
 menuconfig PPC_86xx
         bool "86xx-based boards"
-        depends on 6xx
+        depends on PPC_BOOK3S_32
         select FSL_SOC
         select ALTIVEC
         help
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_smp.c b/arch/powerpc/platforms/86xx/mpc86xx_smp.c
index 020e84a47a32..9f2c1ecc85c3 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_smp.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_smp.c
@@ -86,8 +86,7 @@ smp_86xx_kick_cpu(int nr)
                 mdelay(1);
 
         /* Restore the exception vector */
-        *vector = save_vector;
-        flush_icache_range((unsigned long) vector, (unsigned long) vector + 4);
+        patch_instruction(vector, save_vector);
 
         local_irq_restore(flags);
 
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index 260a56b7602d..5c48dd823e15 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -40,7 +40,7 @@ config EPAPR_PARAVIRT
 
 config PPC_NATIVE
         bool
-        depends on 6xx || PPC64
+        depends on PPC_BOOK3S_32 || PPC64
         help
           Support for running natively on the hardware, i.e. without
           a hypervisor. This option is not user-selectable but should
@@ -48,7 +48,7 @@ config PPC_NATIVE
 
 config PPC_OF_BOOT_TRAMPOLINE
         bool "Support booting from Open Firmware or yaboot"
-        depends on 6xx || PPC64
+        depends on PPC_BOOK3S_32 || PPC64
         default y
         help
           Support from booting from Open Firmware or yaboot using an
@@ -197,7 +197,7 @@ endmenu
 
 config PPC601_SYNC_FIX
         bool "Workarounds for PPC601 bugs"
-        depends on 6xx && PPC_PMAC
+        depends on PPC_BOOK3S_32 && PPC_PMAC
         help
           Some versions of the PPC601 (the first PowerPC chip) have bugs which
           mean that extra synchronization instructions are required near
@@ -211,7 +211,7 @@ config PPC601_SYNC_FIX
 
 config TAU
         bool "On-chip CPU temperature sensor support"
-        depends on 6xx
+        depends on PPC_BOOK3S_32
         help
           G3 and G4 processors have an on-chip temperature sensor called the
           'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index f4e2c5729374..ab176fd3dfb5 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -24,6 +24,7 @@ choice
 config PPC_BOOK3S_32
         bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx"
         select PPC_FPU
+        select PPC_HAVE_PMU_SUPPORT
 
 config PPC_85xx
         bool "Freescale 85xx"
@@ -179,11 +180,6 @@ config PPC_BOOK3E
         def_bool y
         depends on PPC_BOOK3E_64
 
-config 6xx
-        def_bool y
-        depends on PPC32 && PPC_BOOK3S
-        select PPC_HAVE_PMU_SUPPORT
-
 config E500
         select FSL_EMB_PERFMON
         select PPC_FSL_BOOK3E
@@ -266,7 +262,7 @@ config PHYS_64BIT
 
 config ALTIVEC
         bool "AltiVec Support"
-        depends on 6xx || PPC_BOOK3S_64 || (PPC_E500MC && PPC64)
+        depends on PPC_BOOK3S_32 || PPC_BOOK3S_64 || (PPC_E500MC && PPC64)
         ---help---
           This option enables kernel support for the Altivec extensions to the
           PowerPC processor. The kernel currently supports saving and restoring
@@ -316,14 +312,6 @@ config SPE
 
           If in doubt, say Y here.
 
-config PPC_STD_MMU
-        def_bool y
-        depends on PPC_BOOK3S
-
-config PPC_STD_MMU_32
-        def_bool y
-        depends on PPC_STD_MMU && PPC32
-
 config ARCH_ENABLE_SPLIT_PMD_PTLOCK
         def_bool y
         depends on PPC_BOOK3S_64
@@ -358,7 +346,7 @@ config ARCH_ENABLE_HUGEPAGE_MIGRATION
 
 config PPC_MMU_NOHASH
         def_bool y
-        depends on !PPC_STD_MMU
+        depends on !PPC_BOOK3S
 
 config PPC_BOOK3E_MMU
         def_bool y
@@ -412,7 +400,8 @@ config NR_CPUS
 
 config NOT_COHERENT_CACHE
         bool
-        depends on 4xx || PPC_8xx || E200 || PPC_MPC512x || GAMECUBE_COMMON
+        depends on 4xx || PPC_8xx || E200 || PPC_MPC512x || \
+                GAMECUBE_COMMON || AMIGAONE
         default n if PPC_47x
         default y
 
diff --git a/arch/powerpc/platforms/amigaone/Kconfig b/arch/powerpc/platforms/amigaone/Kconfig
index 03dc1e37c25b..e03d26d41957 100644
--- a/arch/powerpc/platforms/amigaone/Kconfig
+++ b/arch/powerpc/platforms/amigaone/Kconfig
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0
 config AMIGAONE
         bool "Eyetech AmigaOne/MAI Teron"
-        depends on 6xx && BROKEN_ON_SMP
+        depends on PPC_BOOK3S_32 && BROKEN_ON_SMP
         select PPC_I8259
         select PPC_INDIRECT_PCI
         select PPC_UDBG_16550
diff --git a/arch/powerpc/platforms/cell/cbe_regs.c b/arch/powerpc/platforms/cell/cbe_regs.c
index b926438d73af..27ee65b89099 100644
--- a/arch/powerpc/platforms/cell/cbe_regs.c
+++ b/arch/powerpc/platforms/cell/cbe_regs.c
@@ -53,7 +53,7 @@ static struct cbe_regs_map *cbe_find_map(struct device_node *np)
         int i;
         struct device_node *tmp_np;
 
-        if (strcasecmp(np->type, "spe")) {
+        if (!of_node_is_type(np, "spe")) {
                 for (i = 0; i < cbe_regs_map_count; i++)
                         if (cbe_regs_maps[i].cpu_node == np ||
                             cbe_regs_maps[i].be_node == np)
@@ -70,8 +70,8 @@ static struct cbe_regs_map *cbe_find_map(struct device_node *np)
                 tmp_np = tmp_np->parent;
                 /* on a correct devicetree we wont get up to root */
                 BUG_ON(!tmp_np);
-        } while (strcasecmp(tmp_np->type, "cpu") &&
-                 strcasecmp(tmp_np->type, "be"));
+        } while (!of_node_is_type(tmp_np, "cpu") ||
+                 !of_node_is_type(tmp_np, "be"));
 
         np->data = cbe_find_map(tmp_np);
 
diff --git a/arch/powerpc/platforms/cell/setup.c b/arch/powerpc/platforms/cell/setup.c
index 7d31b8d14661..e2e1371a71e2 100644
--- a/arch/powerpc/platforms/cell/setup.c
+++ b/arch/powerpc/platforms/cell/setup.c
@@ -131,7 +131,7 @@ static int cell_setup_phb(struct pci_controller *phb)
 
         np = phb->dn;
         model = of_get_property(np, "model", NULL);
-        if (model == NULL || strcmp(np->name, "pci"))
+        if (model == NULL || !of_node_name_eq(np, "pci"))
                 return 0;
 
         /* Setup workarounds for spider */
@@ -168,8 +168,7 @@ static int __init cell_publish_devices(void)
          * platform devices for the PCI host bridges
          */
         for_each_child_of_node(root, np) {
-                if (np->type == NULL || (strcmp(np->type, "pci") != 0 &&
-                                         strcmp(np->type, "pciex") != 0))
+                if (!of_node_is_type(np, "pci") && !of_node_is_type(np, "pciex"))
                         continue;
                 of_platform_device_create(np, NULL, NULL);
         }
diff --git a/arch/powerpc/platforms/cell/spu_callbacks.c b/arch/powerpc/platforms/cell/spu_callbacks.c
index 8ae86200ef6c..125f2a5f02de 100644
--- a/arch/powerpc/platforms/cell/spu_callbacks.c
+++ b/arch/powerpc/platforms/cell/spu_callbacks.c
@@ -34,20 +34,9 @@
  */
 
 static void *spu_syscall_table[] = {
-#define SYSCALL(func)           sys_ni_syscall,
-#define COMPAT_SYS(func)        sys_ni_syscall,
-#define PPC_SYS(func)           sys_ni_syscall,
-#define OLDSYS(func)            sys_ni_syscall,
-#define SYS32ONLY(func)         sys_ni_syscall,
-#define PPC64ONLY(func)         sys_ni_syscall,
-#define SYSX(f, f3264, f32)     sys_ni_syscall,
-
-#define SYSCALL_SPU(func)       sys_##func,
-#define COMPAT_SYS_SPU(func)    sys_##func,
-#define COMPAT_SPU_NEW(func)    sys_##func,
-#define SYSX_SPU(f, f3264, f32) f,
-
-#include <asm/systbl.h>
+#define __SYSCALL(nr, entry, nargs) entry,
+#include <asm/syscall_table_spu.h>
+#undef __SYSCALL
 };
 
 long spu_sys_callback(struct spu_syscall_block *s)
diff --git a/arch/powerpc/platforms/cell/spu_manage.c b/arch/powerpc/platforms/cell/spu_manage.c
index f7e36373f6e0..bed935c51ec2 100644
--- a/arch/powerpc/platforms/cell/spu_manage.c
+++ b/arch/powerpc/platforms/cell/spu_manage.c
@@ -458,7 +458,6 @@ static void init_affinity_node(int cbe)
         struct device_node *vic_dn, *last_spu_dn;
         phandle avoid_ph;
         const phandle *vic_handles;
-        const char *name;
         int lenp, i, added;
 
         last_spu = list_first_entry(&cbe_spu_info[cbe].spus, struct spu,
@@ -480,12 +479,7 @@ static void init_affinity_node(int cbe)
                         if (!vic_dn)
                                 continue;
 
-                        /* a neighbour might be spe, mic-tm, or bif0 */
-                        name = of_get_property(vic_dn, "name", NULL);
-                        if (!name)
-                                continue;
-
-                        if (strcmp(name, "spe") == 0) {
+                        if (of_node_name_eq(vic_dn, "spe") ) {
                                 spu = devnode_spu(cbe, vic_dn);
                                 avoid_ph = last_spu_dn->phandle;
                         } else {
@@ -498,7 +492,7 @@ static void init_affinity_node(int cbe)
                                 spu = neighbour_spu(cbe, vic_dn, last_spu_dn);
                                 if (!spu)
                                         continue;
-                                if (!strcmp(name, "mic-tm")) {
+                                if (of_node_name_eq(vic_dn, "mic-tm")) {
                                         last_spu->has_mem_affinity = 1;
                                         spu->has_mem_affinity = 1;
                                 }
diff --git a/arch/powerpc/platforms/chrp/Kconfig b/arch/powerpc/platforms/chrp/Kconfig
index ead99eff875a..43a2484aad49 100644
--- a/arch/powerpc/platforms/chrp/Kconfig
+++ b/arch/powerpc/platforms/chrp/Kconfig
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0
 config PPC_CHRP
         bool "Common Hardware Reference Platform (CHRP) based machines"
-        depends on 6xx
+        depends on PPC_BOOK3S_32
         select HAVE_PCSPKR_PLATFORM
         select MPIC
         select PPC_I8259
diff --git a/arch/powerpc/platforms/chrp/pci.c b/arch/powerpc/platforms/chrp/pci.c
index 5ddb57b82921..b020c757d2bf 100644
--- a/arch/powerpc/platforms/chrp/pci.c
+++ b/arch/powerpc/platforms/chrp/pci.c
@@ -230,8 +230,8 @@ chrp_find_bridges(void)
                 else if (strncmp(machine, "Pegasos", 7) == 0)
                         is_pegasos = 1;
         }
-        for (dev = root->child; dev != NULL; dev = dev->sibling) {
-                if (dev->type == NULL || strcmp(dev->type, "pci") != 0)
+        for_each_child_of_node(root, dev) {
+                if (!of_node_is_type(dev, "pci"))
                         continue;
                 ++index;
                 /* The GG2 bridge on the LongTrail doesn't have an address */
diff --git a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c
index d6d8ffc0271e..e66644e0fb40 100644
--- a/arch/powerpc/platforms/chrp/setup.c
+++ b/arch/powerpc/platforms/chrp/setup.c
@@ -280,20 +280,14 @@ static __init void chrp_init(void)
         node = of_find_node_by_path(property);
         if (!node)
                 return;
-        property = of_get_property(node, "device_type", NULL);
-        if (!property)
-                goto out_put;
-        if (strcmp(property, "serial"))
+        if (!of_node_is_type(node, "serial"))
                 goto out_put;
         /*
          * The 9pin connector is either /failsafe
          * or /pci@80000000/isa@C/serial@i2F8
          * The optional graphics card has also type 'serial' in VGA mode.
          */
-        property = of_get_property(node, "name", NULL);
-        if (!property)
-                goto out_put;
-        if (!strcmp(property, "failsafe") || !strcmp(property, "serial"))
+        if (of_node_name_eq(node, "failsafe") || of_node_name_eq(node, "serial"))
                 add_preferred_console("ttyS", 0, NULL);
 out_put:
         of_node_put(node);
diff --git a/arch/powerpc/platforms/embedded6xx/Kconfig b/arch/powerpc/platforms/embedded6xx/Kconfig
index 8ea16db5ff48..527d4aa46537 100644
--- a/arch/powerpc/platforms/embedded6xx/Kconfig
+++ b/arch/powerpc/platforms/embedded6xx/Kconfig
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0
 config EMBEDDED6xx
         bool "Embedded 6xx/7xx/7xxx-based boards"
-        depends on 6xx && BROKEN_ON_SMP
+        depends on PPC_BOOK3S_32 && BROKEN_ON_SMP
 
 config LINKSTATION
         bool "Linkstation / Kurobox(HG) from Buffalo"
diff --git a/arch/powerpc/platforms/maple/pci.c b/arch/powerpc/platforms/maple/pci.c
index e3821379e86f..13fba004b7e7 100644
--- a/arch/powerpc/platforms/maple/pci.c
+++ b/arch/powerpc/platforms/maple/pci.c
@@ -604,10 +604,8 @@ void __init maple_pci_init(void)
                 printk(KERN_CRIT "maple_find_bridges: can't find root of device tree\n");
                 return;
         }
-        for (np = NULL; (np = of_get_next_child(root, np)) != NULL;) {
-                if (!np->type)
-                        continue;
-                if (strcmp(np->type, "pci") && strcmp(np->type, "ht"))
+        for_each_child_of_node(root, np) {
+                if (!of_node_is_type(np, "pci") && !of_node_is_type(np, "ht"))
                         continue;
                 if ((of_device_is_compatible(np, "u4-pcie") ||
                      of_device_is_compatible(np, "u3-agp")) &&
diff --git a/arch/powerpc/platforms/pasemi/dma_lib.c b/arch/powerpc/platforms/pasemi/dma_lib.c
index 53384eb42a76..d18d16489a15 100644
--- a/arch/powerpc/platforms/pasemi/dma_lib.c
+++ b/arch/powerpc/platforms/pasemi/dma_lib.c
@@ -255,15 +255,13 @@ int pasemi_dma_alloc_ring(struct pasemi_dmachan *chan, int ring_size)
 
         chan->ring_size = ring_size;
 
-        chan->ring_virt = dma_alloc_coherent(&dma_pdev->dev,
+        chan->ring_virt = dma_zalloc_coherent(&dma_pdev->dev,
                                              ring_size * sizeof(u64),
                                              &chan->ring_dma, GFP_KERNEL);
 
         if (!chan->ring_virt)
                 return -ENOMEM;
 
-        memset(chan->ring_virt, 0, ring_size * sizeof(u64));
-
         return 0;
 }
 EXPORT_SYMBOL(pasemi_dma_alloc_ring);
diff --git a/arch/powerpc/platforms/pasemi/pci.c b/arch/powerpc/platforms/pasemi/pci.c
index c3c64172482d..fdc839d93837 100644
--- a/arch/powerpc/platforms/pasemi/pci.c
+++ b/arch/powerpc/platforms/pasemi/pci.c
@@ -27,6 +27,7 @@
 #include <linux/pci.h>
 
 #include <asm/pci-bridge.h>
+#include <asm/isa-bridge.h>
 #include <asm/machdep.h>
 
 #include <asm/ppc-pci.h>
@@ -108,6 +109,61 @@ static int workaround_5945(struct pci_bus *bus, unsigned int devfn,
         return 1;
 }
 
+#ifdef CONFIG_PPC_PASEMI_NEMO
+#define PXP_ERR_CFG_REG 0x4
+#define PXP_IGNORE_PCIE_ERRORS  0x800
+#define SB600_BUS 5
+
+static void sb600_set_flag(int bus)
+{
+        static void __iomem *iob_mapbase = NULL;
+        struct resource res;
+        struct device_node *dn;
+        int err;
+
+        if (iob_mapbase == NULL) {
+                dn = of_find_compatible_node(NULL, "isa", "pasemi,1682m-iob");
+                if (!dn) {
+                        pr_crit("NEMO SB600 missing iob node\n");
+                        return;
+                }
+
+                err = of_address_to_resource(dn, 0, &res);
+                of_node_put(dn);
+
+                if (err) {
+                        pr_crit("NEMO SB600 missing resource\n");
+                        return;
+                }
+
+                pr_info("NEMO SB600 IOB base %08llx\n",res.start);
+
+                iob_mapbase = ioremap(res.start + 0x100, 0x94);
+        }
+
+        if (iob_mapbase != NULL) {
+                if (bus == SB600_BUS) {
+                        /*
+                         * This is the SB600's bus, tell the PCI-e root port
+                         * to allow non-zero devices to enumerate.
+                         */
+                        out_le32(iob_mapbase + PXP_ERR_CFG_REG, in_le32(iob_mapbase + PXP_ERR_CFG_REG) | PXP_IGNORE_PCIE_ERRORS);
+                } else {
+                        /*
+                         * Only scan device 0 on other busses
+                         */
+                        out_le32(iob_mapbase + PXP_ERR_CFG_REG, in_le32(iob_mapbase + PXP_ERR_CFG_REG) & ~PXP_IGNORE_PCIE_ERRORS);
+                }
+        }
+}
+
+#else
+
+static void sb600_set_flag(int bus)
+{
+}
+#endif
+
 static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn,
                               int offset, int len, u32 *val)
 {
@@ -126,6 +182,8 @@ static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn,
 
         addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset);
 
+        sb600_set_flag(bus->number);
+
         /*
          * Note: the caller has already checked that offset is
          * suitably aligned and that len is 1, 2 or 4.
@@ -160,6 +218,8 @@ static int pa_pxp_write_config(struct pci_bus *bus, unsigned int devfn,
 
         addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset);
 
+        sb600_set_flag(bus->number);
+
         /*
          * Note: the caller has already checked that offset is
          * suitably aligned and that len is 1, 2 or 4.
@@ -210,6 +270,12 @@ static int __init pas_add_bridge(struct device_node *dev)
         /* Interpret the "ranges" property */
         pci_process_bridge_OF_ranges(hose, dev, 1);
 
+        /*
+         * Scan for an isa bridge. This is needed to find the SB600 on the nemo
+         * and does nothing on machines without one.
+         */
+        isa_bridge_find_early(hose);
+
         return 0;
 }
 
diff --git a/arch/powerpc/platforms/pasemi/setup.c b/arch/powerpc/platforms/pasemi/setup.c
index 9a6eb04cca83..c0532999f854 100644
--- a/arch/powerpc/platforms/pasemi/setup.c
+++ b/arch/powerpc/platforms/pasemi/setup.c
@@ -34,6 +34,7 @@
 #include <asm/prom.h>
 #include <asm/iommu.h>
 #include <asm/machdep.h>
+#include <asm/i8259.h>
 #include <asm/mpic.h>
 #include <asm/smp.h>
 #include <asm/time.h>
@@ -72,6 +73,40 @@ static void __noreturn pas_restart(char *cmd)
                 out_le32(reset_reg, 0x6000000);
 }
 
+#ifdef CONFIG_PPC_PASEMI_NEMO
+void pas_shutdown(void)
+{
+        /* Set the PLD bit that makes the SB600 think the power button is being pressed */
+        void __iomem *pld_map = ioremap(0xf5000000,4096);
+        while (1)
+                out_8(pld_map+7,0x01);
+}
+
+/* RTC platform device structure as is not in device tree */
+static struct resource rtc_resource[] = {{
+        .name = "rtc",
+        .start = 0x70,
+        .end = 0x71,
+        .flags = IORESOURCE_IO,
+}, {
+        .name = "rtc",
+        .start = 8,
+        .end = 8,
+        .flags = IORESOURCE_IRQ,
+}};
+
+static inline void nemo_init_rtc(void)
+{
+        platform_device_register_simple("rtc_cmos", -1, rtc_resource, 2);
+}
+
+#else
+
+static inline void nemo_init_rtc(void)
+{
+}
+#endif
+
 #ifdef CONFIG_SMP
 static arch_spinlock_t timebase_lock;
 static unsigned long timebase;
@@ -183,6 +218,42 @@ static int __init pas_setup_mce_regs(void)
 }
 machine_device_initcall(pasemi, pas_setup_mce_regs);
 
+#ifdef CONFIG_PPC_PASEMI_NEMO
+static void sb600_8259_cascade(struct irq_desc *desc)
+{
+        struct irq_chip *chip = irq_desc_get_chip(desc);
+        unsigned int cascade_irq = i8259_irq();
+
+        if (cascade_irq)
+                generic_handle_irq(cascade_irq);
+
+        chip->irq_eoi(&desc->irq_data);
+}
+
+static void nemo_init_IRQ(struct mpic *mpic)
+{
+        struct device_node *np;
+        int gpio_virq;
+        /* Connect the SB600's legacy i8259 controller */
+        np = of_find_node_by_path("/pxp@0,e0000000");
+        i8259_init(np, 0);
+        of_node_put(np);
+
+        gpio_virq = irq_create_mapping(NULL, 3);
+        irq_set_irq_type(gpio_virq, IRQ_TYPE_LEVEL_HIGH);
+        irq_set_chained_handler(gpio_virq, sb600_8259_cascade);
+        mpic_unmask_irq(irq_get_irq_data(gpio_virq));
+
+        irq_set_default_host(mpic->irqhost);
+}
+
+#else
+
+static inline void nemo_init_IRQ(struct mpic *mpic)
+{
+}
+#endif
+
 static __init void pas_init_IRQ(void)
 {
         struct device_node *np;
@@ -243,6 +314,8 @@ static __init void pas_init_IRQ(void)
                 mpic_unmask_irq(irq_get_irq_data(nmi_virq));
         }
 
+        nemo_init_IRQ(mpic);
+
         of_node_put(mpic_node);
         of_node_put(root);
 }
@@ -404,6 +477,8 @@ static int __init pasemi_publish_devices(void)
         /* Publish OF platform devices for SDC and other non-PCI devices */
         of_platform_bus_probe(NULL, pasemi_bus_ids, NULL);
 
+        nemo_init_rtc();
+
         return 0;
 }
 machine_device_initcall(pasemi, pasemi_publish_devices);
@@ -418,6 +493,17 @@ static int __init pas_probe(void)
             !of_machine_is_compatible("pasemi,pwrficient"))
                 return 0;
 
+#ifdef CONFIG_PPC_PASEMI_NEMO
+        /*
+         * Check for the Nemo motherboard here, if we are running on one
+         * change the machine definition to fit
+         */
+        if (of_machine_is_compatible("pasemi,nemo")) {
+                pm_power_off            = pas_shutdown;
+                ppc_md.name             = "A-EON Amigaone X1000";
+        }
+#endif
+
         iommu_init_early_pasemi();
 
         return 1;
diff --git a/arch/powerpc/platforms/powermac/cache.S b/arch/powerpc/platforms/powermac/cache.S
index 27862feee4a5..f0641b6e6075 100644
--- a/arch/powerpc/platforms/powermac/cache.S
+++ b/arch/powerpc/platforms/powermac/cache.S
@@ -28,7 +28,7 @@
  */
 
 _GLOBAL(flush_disable_caches)
-#ifndef CONFIG_6xx
+#ifndef CONFIG_PPC_BOOK3S_32
         blr
 #else
 BEGIN_FTR_SECTION
@@ -356,4 +356,4 @@ END_FTR_SECTION_IFSET(CPU_FTR_L3CR)
         mtmsr   r11             /* restore DR and EE */
         isync
         blr
-#endif  /* CONFIG_6xx */
+#endif  /* CONFIG_PPC_BOOK3S_32 */
diff --git a/arch/powerpc/platforms/powermac/feature.c b/arch/powerpc/platforms/powermac/feature.c
index ed2f54b3f173..c3e5ee8b5175 100644
--- a/arch/powerpc/platforms/powermac/feature.c
+++ b/arch/powerpc/platforms/powermac/feature.c
@@ -51,7 +51,7 @@
 #define DBG(fmt...)
 #endif
 
-#ifdef CONFIG_6xx
+#ifdef CONFIG_PPC_BOOK3S_32
 extern int powersave_lowspeed;
 #endif
 
@@ -173,9 +173,9 @@ static long ohare_htw_scc_enable(struct device_node *node, long param,
         macio = macio_find(node, 0);
         if (!macio)
                 return -ENODEV;
-        if (!strcmp(node->name, "ch-a"))
+        if (of_node_name_eq(node, "ch-a"))
                 chan_mask = MACIO_FLAG_SCCA_ON;
-        else if (!strcmp(node->name, "ch-b"))
+        else if (of_node_name_eq(node, "ch-b"))
                 chan_mask = MACIO_FLAG_SCCB_ON;
         else
                 return -ENODEV;
@@ -610,9 +610,9 @@ static long core99_scc_enable(struct device_node *node, long param, long value)
         macio = macio_find(node, 0);
         if (!macio)
                 return -ENODEV;
-        if (!strcmp(node->name, "ch-a"))
+        if (of_node_name_eq(node, "ch-a"))
                 chan_mask = MACIO_FLAG_SCCA_ON;
-        else if (!strcmp(node->name, "ch-b"))
+        else if (of_node_name_eq(node, "ch-b"))
                 chan_mask = MACIO_FLAG_SCCB_ON;
         else
                 return -ENODEV;
@@ -1392,8 +1392,7 @@ static long g5_mpic_enable(struct device_node *node, long param, long value)
 
         if (parent == NULL)
                 return 0;
-        is_u3 = strcmp(parent->name, "u3") == 0 ||
-                strcmp(parent->name, "u4") == 0;
+        is_u3 = of_node_name_eq(parent, "u3") || of_node_name_eq(parent, "u4");
         of_node_put(parent);
         if (!is_u3)
                 return 0;
@@ -1471,6 +1470,7 @@ static long g5_i2s_enable(struct device_node *node, long param, long value)
         case 2:
                 if (macio->type == macio_shasta)
                         break;
+                /* fall through */
         default:
                 return -ENODEV;
         }
diff --git a/arch/powerpc/platforms/powermac/low_i2c.c b/arch/powerpc/platforms/powermac/low_i2c.c
index d4d411820597..4de058a20d2b 100644
--- a/arch/powerpc/platforms/powermac/low_i2c.c
+++ b/arch/powerpc/platforms/powermac/low_i2c.c
@@ -617,7 +617,7 @@ static void __init kw_i2c_probe(void)
                  * but not for now
                  */
                 child = of_get_next_child(np, NULL);
-                multibus = !child || strcmp(child->name, "i2c-bus");
+                multibus = !of_node_name_eq(child, "i2c-bus");
                 of_node_put(child);
 
                 /* For a multibus setup, we get the bus count based on the
@@ -917,10 +917,9 @@ static void __init smu_i2c_probe(void)
          * type as older device trees mix i2c busses and other things
          * at the same level
          */
-        for (busnode = NULL;
-             (busnode = of_get_next_child(controller, busnode)) != NULL;) {
-                if (strcmp(busnode->type, "i2c") &&
-                    strcmp(busnode->type, "i2c-bus"))
+        for_each_child_of_node(controller, busnode) {
+                if (!of_node_is_type(busnode, "i2c") &&
+                    !of_node_is_type(busnode, "i2c-bus"))
                         continue;
                 reg = of_get_property(busnode, "reg", NULL);
                 if (reg == NULL)
@@ -1206,7 +1205,7 @@ static void pmac_i2c_devscan(void (*callback)(struct device_node *dev,
                                 if (bus != pmac_i2c_find_bus(np))
                                         continue;
                         for (p = whitelist; p->name != NULL; p++) {
-                                if (strcmp(np->name, p->name))
+                                if (!of_node_name_eq(np, p->name))
                                         continue;
                                 if (p->compatible &&
                                     !of_device_is_compatible(np, p->compatible))
diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c
index 04527d13d5a4..3d7420503c37 100644
--- a/arch/powerpc/platforms/powermac/pci.c
+++ b/arch/powerpc/platforms/powermac/pci.c
@@ -501,9 +501,7 @@ static void __init init_p2pbridge(void)
         /* XXX it would be better here to identify the specific
            PCI-PCI bridge chip we have. */
         p2pbridge = of_find_node_by_name(NULL, "pci-bridge");
-        if (p2pbridge == NULL
-            || p2pbridge->parent == NULL
-            || strcmp(p2pbridge->parent->name, "pci") != 0)
+        if (p2pbridge == NULL || !of_node_name_eq(p2pbridge->parent, "pci"))
                 goto done;
         if (pci_device_from_OF_node(p2pbridge, &bus, &devfn) < 0) {
                 DBG("Can't find PCI infos for PCI<->PCI bridge\n");
@@ -828,14 +826,14 @@ static int __init pmac_add_bridge(struct device_node *dev)
         if (of_device_is_compatible(dev, "uni-north")) {
                 primary = setup_uninorth(hose, &rsrc);
                 disp_name = "UniNorth";
-        } else if (strcmp(dev->name, "pci") == 0) {
+        } else if (of_node_name_eq(dev, "pci")) {
                 /* XXX assume this is a mpc106 (grackle) */
                 setup_grackle(hose);
                 disp_name = "Grackle (MPC106)";
-        } else if (strcmp(dev->name, "bandit") == 0) {
+        } else if (of_node_name_eq(dev, "bandit")) {
                 setup_bandit(hose, &rsrc);
                 disp_name = "Bandit";
-        } else if (strcmp(dev->name, "chaos") == 0) {
+        } else if (of_node_name_eq(dev, "chaos")) {
                 setup_chaos(hose, &rsrc);
                 disp_name = "Chaos";
                 primary = 0;
@@ -914,16 +912,14 @@ void __init pmac_pci_init(void)
                        "of device tree\n");
                 return;
         }
-        for (np = NULL; (np = of_get_next_child(root, np)) != NULL;) {
-                if (np->name == NULL)
-                        continue;
-                if (strcmp(np->name, "bandit") == 0
-                    || strcmp(np->name, "chaos") == 0
-                    || strcmp(np->name, "pci") == 0) {
+        for_each_child_of_node(root, np) {
+                if (of_node_name_eq(np, "bandit")
+                    || of_node_name_eq(np, "chaos")
+                    || of_node_name_eq(np, "pci")) {
                         if (pmac_add_bridge(np) == 0)
                                 of_node_get(np);
                 }
-                if (strcmp(np->name, "ht") == 0) {
+                if (of_node_name_eq(np, "ht")) {
                         of_node_get(np);
                         ht = np;
                 }
@@ -983,7 +979,7 @@ static bool pmac_pci_enable_device_hook(struct pci_dev *dev)
         /* Firewire & GMAC were disabled after PCI probe, the driver is
          * claiming them, we must re-enable them now.
          */
-        if (uninorth_child && !strcmp(node->name, "firewire") &&
+        if (uninorth_child && of_node_name_eq(node, "firewire") &&
             (of_device_is_compatible(node, "pci106b,18") ||
              of_device_is_compatible(node, "pci106b,30") ||
              of_device_is_compatible(node, "pci11c1,5811"))) {
@@ -991,7 +987,7 @@ static bool pmac_pci_enable_device_hook(struct pci_dev *dev)
                 pmac_call_feature(PMAC_FTR_1394_ENABLE, node, 0, 1);
                 updatecfg = 1;
         }
-        if (uninorth_child && !strcmp(node->name, "ethernet") &&
+        if (uninorth_child && of_node_name_eq(node, "ethernet") &&
             of_device_is_compatible(node, "gmac")) {
                 pmac_call_feature(PMAC_FTR_GMAC_ENABLE, node, 0, 1);
                 updatecfg = 1;
@@ -1262,4 +1258,3 @@ struct pci_controller_ops pmac_pci_controller_ops = {
         .enable_device_hook     = pmac_pci_enable_device_hook,
 #endif
 };
-
diff --git a/arch/powerpc/platforms/powermac/pfunc_base.c b/arch/powerpc/platforms/powermac/pfunc_base.c
index fd2e210559c8..62311e84a423 100644
--- a/arch/powerpc/platforms/powermac/pfunc_base.c
+++ b/arch/powerpc/platforms/powermac/pfunc_base.c
@@ -101,9 +101,8 @@ static void macio_gpio_init_one(struct macio_chip *macio)
          * Find the "gpio" parent node
          */
 
-        for (gparent = NULL;
-             (gparent = of_get_next_child(macio->of_node, gparent)) != NULL;)
-                if (strcmp(gparent->name, "gpio") == 0)
+        for_each_child_of_node(macio->of_node, gparent)
+                if (of_node_name_eq(gparent, "gpio"))
                         break;
         if (gparent == NULL)
                 return;
@@ -313,7 +312,7 @@ static void uninorth_install_pfunc(void)
          * Install handlers for the hwclock child if any
          */
         for (np = NULL; (np = of_get_next_child(uninorth_node, np)) != NULL;)
-                if (strcmp(np->name, "hw-clock") == 0) {
+                if (of_node_name_eq(np, "hw-clock")) {
                         unin_hwclock = np;
                         break;
                 }
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c
index 57bbff465964..c292ffac2ed4 100644
--- a/arch/powerpc/platforms/powermac/pic.c
+++ b/arch/powerpc/platforms/powermac/pic.c
@@ -417,7 +417,7 @@ int of_irq_parse_oldworld(struct device_node *device, int index,
                 if (ints != NULL)
                         break;
                 device = device->parent;
-                if (device && strcmp(device->type, "pci") != 0)
+                if (!of_node_is_type(device, "pci"))
                         break;
         }
         if (ints == NULL)
@@ -553,13 +553,13 @@ void __init pmac_pic_init(void)
 
                 for_each_node_with_property(np, "interrupt-controller") {
                         /* Skip /chosen/interrupt-controller */
-                        if (strcmp(np->name, "chosen") == 0)
+                        if (of_node_name_eq(np, "chosen"))
                                 continue;
                         /* It seems like at least one person wants
                          * to use BootX on a machine with an AppleKiwi
                          * controller which happens to pretend to be an
                          * interrupt controller too. */
-                        if (strcmp(np->name, "AppleKiwi") == 0)
+                        if (of_node_name_eq(np, "AppleKiwi"))
                                 continue;
                         /* I think we found one ! */
                         of_irq_dflt_pic = np;
diff --git a/arch/powerpc/platforms/powermac/setup.c b/arch/powerpc/platforms/powermac/setup.c
index 2f00e3daafb0..2e8221e20ee8 100644
--- a/arch/powerpc/platforms/powermac/setup.c
+++ b/arch/powerpc/platforms/powermac/setup.c
@@ -560,15 +560,9 @@ static int __init check_pmac_serial_console(void)
         }
         pr_debug("stdout is %pOF\n", prom_stdout);
 
-        name = of_get_property(prom_stdout, "name", NULL);
-        if (!name) {
-                pr_debug(" stdout package has no name !\n");
-                goto not_found;
-        }
-
-        if (strcmp(name, "ch-a") == 0)
+        if (of_node_name_eq(prom_stdout, "ch-a"))
                 offset = 0;
-        else if (strcmp(name, "ch-b") == 0)
+        else if (of_node_name_eq(prom_stdout, "ch-b"))
                 offset = 1;
         else
                 goto not_found;
diff --git a/arch/powerpc/platforms/powermac/sleep.S b/arch/powerpc/platforms/powermac/sleep.S
index f89808b9713d..fb64b09cad9d 100644
--- a/arch/powerpc/platforms/powermac/sleep.S
+++ b/arch/powerpc/platforms/powermac/sleep.S
@@ -56,7 +56,7 @@
  * vector that will be called by the ROM on wakeup
  */
 _GLOBAL(low_sleep_handler)
-#ifndef CONFIG_6xx
+#ifndef CONFIG_PPC_BOOK3S_32
         blr
 #else
         mflr    r0
@@ -394,5 +394,5 @@ sleep_storage:
         .long 0
         .balign L1_CACHE_BYTES, 0
 
-#endif /* CONFIG_6xx */
+#endif /* CONFIG_PPC_BOOK3S_32 */
         .section .text
diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c
index 447da6db450a..35be6e0b886d 100644
--- a/arch/powerpc/platforms/powermac/smp.c
+++ b/arch/powerpc/platforms/powermac/smp.c
@@ -832,8 +832,7 @@ static int smp_core99_kick_cpu(int nr)
         mdelay(1);
 
         /* Restore our exception vector */
-        *vector = save_vector;
-        flush_icache_range((unsigned long) vector, (unsigned long) vector + 4);
+        patch_instruction(vector, save_vector);
 
         local_irq_restore(flags);
         if (ppc_md.progress) ppc_md.progress("smp_core99_kick_cpu done", 0x347);
diff --git a/arch/powerpc/platforms/powermac/udbg_adb.c b/arch/powerpc/platforms/powermac/udbg_adb.c
index 64f38f0d15ed..12158bb4fed7 100644
--- a/arch/powerpc/platforms/powermac/udbg_adb.c
+++ b/arch/powerpc/platforms/powermac/udbg_adb.c
@@ -194,7 +194,7 @@ int __init udbg_adb_init(int force_btext)
          */
         for_each_node_by_name(np, "keyboard") {
                 struct device_node *parent = of_get_parent(np);
-                int found = (parent && strcmp(parent->type, "adb") == 0);
+                int found = of_node_is_type(parent, "adb");
                 of_node_put(parent);
                 if (found)
                         break;
diff --git a/arch/powerpc/platforms/powermac/udbg_scc.c b/arch/powerpc/platforms/powermac/udbg_scc.c
index 8901973ed683..415b74d7c253 100644
--- a/arch/powerpc/platforms/powermac/udbg_scc.c
+++ b/arch/powerpc/platforms/powermac/udbg_scc.c
@@ -87,7 +87,7 @@ void udbg_scc_init(int force_scc)
         for (ch = NULL; (ch = of_get_next_child(escc, ch)) != NULL;) {
                 if (ch == stdout)
                         ch_def = of_node_get(ch);
-                if (strcmp(ch->name, "ch-a") == 0)
+                if (of_node_name_eq(ch, "ch-a"))
                         ch_a = of_node_get(ch);
         }
         if (ch_def == NULL && !force_scc)
diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c b/arch/powerpc/platforms/powernv/eeh-powernv.c
index abc0be7507c8..f38078976c5d 100644
--- a/arch/powerpc/platforms/powernv/eeh-powernv.c
+++ b/arch/powerpc/platforms/powernv/eeh-powernv.c
@@ -564,8 +564,8 @@ static void pnv_eeh_get_phb_diag(struct eeh_pe *pe)
 static int pnv_eeh_get_phb_state(struct eeh_pe *pe)
 {
         struct pnv_phb *phb = pe->phb->private_data;
-        u8 fstate;
-        __be16 pcierr;
+        u8 fstate = 0;
+        __be16 pcierr = 0;
         s64 rc;
         int result = 0;
 
@@ -603,8 +603,8 @@ static int pnv_eeh_get_phb_state(struct eeh_pe *pe)
 static int pnv_eeh_get_pe_state(struct eeh_pe *pe)
 {
         struct pnv_phb *phb = pe->phb->private_data;
-        u8 fstate;
-        __be16 pcierr;
+        u8 fstate = 0;
+        __be16 pcierr = 0;
         s64 rc;
         int result;
 
diff --git a/arch/powerpc/platforms/powernv/npu-dma.c b/arch/powerpc/platforms/powernv/npu-dma.c
index 75b935252981..d7f742ed48ba 100644
--- a/arch/powerpc/platforms/powernv/npu-dma.c
+++ b/arch/powerpc/platforms/powernv/npu-dma.c
@@ -9,32 +9,19 @@
  * License as published by the Free Software Foundation.
  */
 
-#include <linux/slab.h>
 #include <linux/mmu_notifier.h>
 #include <linux/mmu_context.h>
 #include <linux/of.h>
-#include <linux/export.h>
 #include <linux/pci.h>
 #include <linux/memblock.h>
-#include <linux/iommu.h>
 #include <linux/sizes.h>
 
 #include <asm/debugfs.h>
-#include <asm/tlb.h>
 #include <asm/powernv.h>
-#include <asm/reg.h>
-#include <asm/opal.h>
-#include <asm/io.h>
-#include <asm/iommu.h>
-#include <asm/pnv-pci.h>
-#include <asm/msi_bitmap.h>
 #include <asm/opal.h>
 
-#include "powernv.h"
 #include "pci.h"
 
-#define npu_to_phb(x) container_of(x, struct pnv_phb, npu)
-
 /*
  * spinlock to protect initialisation of an npu_context for a particular
  * mm_struct.
@@ -133,15 +120,25 @@ static struct pnv_ioda_pe *get_gpu_pci_dev_and_pe(struct pnv_ioda_pe *npe,
         return pe;
 }
 
-long pnv_npu_set_window(struct pnv_ioda_pe *npe, int num,
+static long pnv_npu_unset_window(struct iommu_table_group *table_group,
+                int num);
+
+static long pnv_npu_set_window(struct iommu_table_group *table_group, int num,
                 struct iommu_table *tbl)
 {
+        struct pnv_ioda_pe *npe = container_of(table_group, struct pnv_ioda_pe,
+                        table_group);
         struct pnv_phb *phb = npe->phb;
         int64_t rc;
         const unsigned long size = tbl->it_indirect_levels ?
                 tbl->it_level_size : tbl->it_size;
         const __u64 start_addr = tbl->it_offset << tbl->it_page_shift;
         const __u64 win_size = tbl->it_size << tbl->it_page_shift;
+        int num2 = (num == 0) ? 1 : 0;
+
+        /* NPU has just one TVE so if there is another table, remove it first */
+        if (npe->table_group.tables[num2])
+                pnv_npu_unset_window(&npe->table_group, num2);
 
         pe_info(npe, "Setting up window %llx..%llx pg=%lx\n",
                         start_addr, start_addr + win_size - 1,
@@ -167,11 +164,16 @@ long pnv_npu_set_window(struct pnv_ioda_pe *npe, int num,
         return 0;
 }
 
-long pnv_npu_unset_window(struct pnv_ioda_pe *npe, int num)
+static long pnv_npu_unset_window(struct iommu_table_group *table_group, int num)
 {
+        struct pnv_ioda_pe *npe = container_of(table_group, struct pnv_ioda_pe,
+                        table_group);
         struct pnv_phb *phb = npe->phb;
         int64_t rc;
 
+        if (!npe->table_group.tables[num])
+                return 0;
+
         pe_info(npe, "Removing DMA window\n");
 
         rc = opal_pci_map_pe_dma_window(phb->opal_id, npe->pe_number,
@@ -210,7 +212,8 @@ static void pnv_npu_dma_set_32(struct pnv_ioda_pe *npe)
         if (!gpe)
                 return;
 
-        rc = pnv_npu_set_window(npe, 0, gpe->table_group.tables[0]);
+        rc = pnv_npu_set_window(&npe->table_group, 0,
+                        gpe->table_group.tables[0]);
 
         /*
          * NVLink devices use the same TCE table configuration as
@@ -235,7 +238,7 @@ static int pnv_npu_dma_set_bypass(struct pnv_ioda_pe *npe)
         if (phb->type != PNV_PHB_NPU_NVLINK || !npe->pdev)
                 return -EINVAL;
 
-        rc = pnv_npu_unset_window(npe, 0);
+        rc = pnv_npu_unset_window(&npe->table_group, 0);
         if (rc != OPAL_SUCCESS)
                 return rc;
 
@@ -288,11 +291,15 @@ void pnv_npu_try_dma_set_bypass(struct pci_dev *gpdev, bool bypass)
         }
 }
 
+#ifdef CONFIG_IOMMU_API
 /* Switch ownership from platform code to external user (e.g. VFIO) */
-void pnv_npu_take_ownership(struct pnv_ioda_pe *npe)
+static void pnv_npu_take_ownership(struct iommu_table_group *table_group)
 {
+        struct pnv_ioda_pe *npe = container_of(table_group, struct pnv_ioda_pe,
+                        table_group);
         struct pnv_phb *phb = npe->phb;
         int64_t rc;
+        struct pci_dev *gpdev = NULL;
 
         /*
          * Note: NPU has just a single TVE in the hardware which means that
@@ -301,7 +308,7 @@ void pnv_npu_take_ownership(struct pnv_ioda_pe *npe)
          * if it was enabled at the moment of ownership change.
          */
         if (npe->table_group.tables[0]) {
-                pnv_npu_unset_window(npe, 0);
+                pnv_npu_unset_window(&npe->table_group, 0);
                 return;
         }
 
@@ -314,30 +321,315 @@ void pnv_npu_take_ownership(struct pnv_ioda_pe *npe)
                 return;
         }
         pnv_pci_ioda2_tce_invalidate_entire(npe->phb, false);
+
+        get_gpu_pci_dev_and_pe(npe, &gpdev);
+        if (gpdev)
+                pnv_npu2_unmap_lpar_dev(gpdev);
 }
 
-struct pnv_ioda_pe *pnv_pci_npu_setup_iommu(struct pnv_ioda_pe *npe)
+static void pnv_npu_release_ownership(struct iommu_table_group *table_group)
 {
-        struct pnv_phb *phb = npe->phb;
-        struct pci_bus *pbus = phb->hose->bus;
-        struct pci_dev *npdev, *gpdev = NULL, *gptmp;
-        struct pnv_ioda_pe *gpe = get_gpu_pci_dev_and_pe(npe, &gpdev);
+        struct pnv_ioda_pe *npe = container_of(table_group, struct pnv_ioda_pe,
+                        table_group);
+        struct pci_dev *gpdev = NULL;
+
+        get_gpu_pci_dev_and_pe(npe, &gpdev);
+        if (gpdev)
+                pnv_npu2_map_lpar_dev(gpdev, 0, MSR_DR | MSR_PR | MSR_HV);
+}
+
+static struct iommu_table_group_ops pnv_pci_npu_ops = {
+        .set_window = pnv_npu_set_window,
+        .unset_window = pnv_npu_unset_window,
+        .take_ownership = pnv_npu_take_ownership,
+        .release_ownership = pnv_npu_release_ownership,
+};
+#endif /* !CONFIG_IOMMU_API */
+
+/*
+ * NPU2 ATS
+ */
+/* Maximum possible number of ATSD MMIO registers per NPU */
+#define NV_NMMU_ATSD_REGS 8
+#define NV_NPU_MAX_PE_NUM       16
+
+/*
+ * A compound NPU IOMMU group which might consist of 1 GPU + 2xNPUs (POWER8) or
+ * up to 3 x (GPU + 2xNPUs) (POWER9).
+ */
+struct npu_comp {
+        struct iommu_table_group table_group;
+        int pe_num;
+        struct pnv_ioda_pe *pe[NV_NPU_MAX_PE_NUM];
+};
+
+/* An NPU descriptor, valid for POWER9 only */
+struct npu {
+        int index;
+        __be64 *mmio_atsd_regs[NV_NMMU_ATSD_REGS];
+        unsigned int mmio_atsd_count;
+
+        /* Bitmask for MMIO register usage */
+        unsigned long mmio_atsd_usage;
+
+        /* Do we need to explicitly flush the nest mmu? */
+        bool nmmu_flush;
+
+        struct npu_comp npucomp;
+};
+
+#ifdef CONFIG_IOMMU_API
+static long pnv_npu_peers_create_table_userspace(
+                struct iommu_table_group *table_group,
+                int num, __u32 page_shift, __u64 window_size, __u32 levels,
+                struct iommu_table **ptbl)
+{
+        struct npu_comp *npucomp = container_of(table_group, struct npu_comp,
+                        table_group);
+
+        if (!npucomp->pe_num || !npucomp->pe[0] ||
+                        !npucomp->pe[0]->table_group.ops ||
+                        !npucomp->pe[0]->table_group.ops->create_table)
+                return -EFAULT;
+
+        return npucomp->pe[0]->table_group.ops->create_table(
+                        &npucomp->pe[0]->table_group, num, page_shift,
+                        window_size, levels, ptbl);
+}
+
+static long pnv_npu_peers_set_window(struct iommu_table_group *table_group,
+                int num, struct iommu_table *tbl)
+{
+        int i, j;
+        long ret = 0;
+        struct npu_comp *npucomp = container_of(table_group, struct npu_comp,
+                        table_group);
+
+        for (i = 0; i < npucomp->pe_num; ++i) {
+                struct pnv_ioda_pe *pe = npucomp->pe[i];
+
+                if (!pe->table_group.ops->set_window)
+                        continue;
+
+                ret = pe->table_group.ops->set_window(&pe->table_group,
+                                num, tbl);
+                if (ret)
+                        break;
+        }
+
+        if (ret) {
+                for (j = 0; j < i; ++j) {
+                        struct pnv_ioda_pe *pe = npucomp->pe[j];
+
+                        if (!pe->table_group.ops->unset_window)
+                                continue;
+
+                        ret = pe->table_group.ops->unset_window(
+                                        &pe->table_group, num);
+                        if (ret)
+                                break;
+                }
+        } else {
+                table_group->tables[num] = iommu_tce_table_get(tbl);
+        }
+
+        return ret;
+}
 
-        if (!gpe || !gpdev)
+static long pnv_npu_peers_unset_window(struct iommu_table_group *table_group,
+                int num)
+{
+        int i, j;
+        long ret = 0;
+        struct npu_comp *npucomp = container_of(table_group, struct npu_comp,
+                        table_group);
+
+        for (i = 0; i < npucomp->pe_num; ++i) {
+                struct pnv_ioda_pe *pe = npucomp->pe[i];
+
+                WARN_ON(npucomp->table_group.tables[num] !=
+                                table_group->tables[num]);
+                if (!npucomp->table_group.tables[num])
+                        continue;
+
+                if (!pe->table_group.ops->unset_window)
+                        continue;
+
+                ret = pe->table_group.ops->unset_window(&pe->table_group, num);
+                if (ret)
+                        break;
+        }
+
+        if (ret) {
+                for (j = 0; j < i; ++j) {
+                        struct pnv_ioda_pe *pe = npucomp->pe[j];
+
+                        if (!npucomp->table_group.tables[num])
+                                continue;
+
+                        if (!pe->table_group.ops->set_window)
+                                continue;
+
+                        ret = pe->table_group.ops->set_window(&pe->table_group,
+                                        num, table_group->tables[num]);
+                        if (ret)
+                                break;
+                }
+        } else if (table_group->tables[num]) {
+                iommu_tce_table_put(table_group->tables[num]);
+                table_group->tables[num] = NULL;
+        }
+
+        return ret;
+}
+
+static void pnv_npu_peers_take_ownership(struct iommu_table_group *table_group)
+{
+        int i;
+        struct npu_comp *npucomp = container_of(table_group, struct npu_comp,
+                        table_group);
+
+        for (i = 0; i < npucomp->pe_num; ++i) {
+                struct pnv_ioda_pe *pe = npucomp->pe[i];
+
+                if (!pe->table_group.ops->take_ownership)
+                        continue;
+                pe->table_group.ops->take_ownership(&pe->table_group);
+        }
+}
+
+static void pnv_npu_peers_release_ownership(
+                struct iommu_table_group *table_group)
+{
+        int i;
+        struct npu_comp *npucomp = container_of(table_group, struct npu_comp,
+                        table_group);
+
+        for (i = 0; i < npucomp->pe_num; ++i) {
+                struct pnv_ioda_pe *pe = npucomp->pe[i];
+
+                if (!pe->table_group.ops->release_ownership)
+                        continue;
+                pe->table_group.ops->release_ownership(&pe->table_group);
+        }
+}
+
+static struct iommu_table_group_ops pnv_npu_peers_ops = {
+        .get_table_size = pnv_pci_ioda2_get_table_size,
+        .create_table = pnv_npu_peers_create_table_userspace,
+        .set_window = pnv_npu_peers_set_window,
+        .unset_window = pnv_npu_peers_unset_window,
+        .take_ownership = pnv_npu_peers_take_ownership,
+        .release_ownership = pnv_npu_peers_release_ownership,
+};
+
+static void pnv_comp_attach_table_group(struct npu_comp *npucomp,
+                struct pnv_ioda_pe *pe)
+{
+        if (WARN_ON(npucomp->pe_num == NV_NPU_MAX_PE_NUM))
+                return;
+
+        npucomp->pe[npucomp->pe_num] = pe;
+        ++npucomp->pe_num;
+}
+
+struct iommu_table_group *pnv_try_setup_npu_table_group(struct pnv_ioda_pe *pe)
+{
+        struct iommu_table_group *table_group;
+        struct npu_comp *npucomp;
+        struct pci_dev *gpdev = NULL;
+        struct pci_controller *hose;
+        struct pci_dev *npdev = NULL;
+
+        list_for_each_entry(gpdev, &pe->pbus->devices, bus_list) {
+                npdev = pnv_pci_get_npu_dev(gpdev, 0);
+                if (npdev)
+                        break;
+        }
+
+        if (!npdev)
+                /* It is not an NPU attached device, skip */
+                return NULL;
+
+        hose = pci_bus_to_host(npdev->bus);
+
+        if (hose->npu) {
+                table_group = &hose->npu->npucomp.table_group;
+
+                if (!table_group->group) {
+                        table_group->ops = &pnv_npu_peers_ops;
+                        iommu_register_group(table_group,
+                                        hose->global_number,
+                                        pe->pe_number);
+                }
+        } else {
+                /* Create a group for 1 GPU and attached NPUs for POWER8 */
+                pe->npucomp = kzalloc(sizeof(pe->npucomp), GFP_KERNEL);
+                table_group = &pe->npucomp->table_group;
+                table_group->ops = &pnv_npu_peers_ops;
+                iommu_register_group(table_group, hose->global_number,
+                                pe->pe_number);
+        }
+
+        /* Steal capabilities from a GPU PE */
+        table_group->max_dynamic_windows_supported =
+                pe->table_group.max_dynamic_windows_supported;
+        table_group->tce32_start = pe->table_group.tce32_start;
+        table_group->tce32_size = pe->table_group.tce32_size;
+        table_group->max_levels = pe->table_group.max_levels;
+        if (!table_group->pgsizes)
+                table_group->pgsizes = pe->table_group.pgsizes;
+
+        npucomp = container_of(table_group, struct npu_comp, table_group);
+        pnv_comp_attach_table_group(npucomp, pe);
+
+        return table_group;
+}
+
+struct iommu_table_group *pnv_npu_compound_attach(struct pnv_ioda_pe *pe)
+{
+        struct iommu_table_group *table_group;
+        struct npu_comp *npucomp;
+        struct pci_dev *gpdev = NULL;
+        struct pci_dev *npdev;
+        struct pnv_ioda_pe *gpe = get_gpu_pci_dev_and_pe(pe, &gpdev);
+
+        WARN_ON(!(pe->flags & PNV_IODA_PE_DEV));
+        if (!gpe)
                 return NULL;
 
-        list_for_each_entry(npdev, &pbus->devices, bus_list) {
-                gptmp = pnv_pci_get_gpu_dev(npdev);
+        /*
+         * IODA2 bridges get this set up from pci_controller_ops::setup_bridge
+         * but NPU bridges do not have this hook defined so we do it here.
+         * We do not setup other table group parameters as they won't be used
+         * anyway - NVLink bridges are subordinate PEs.
+         */
+        pe->table_group.ops = &pnv_pci_npu_ops;
+
+        table_group = iommu_group_get_iommudata(
+                        iommu_group_get(&gpdev->dev));
+
+        /*
+         * On P9 NPU PHB and PCI PHB support different page sizes,
+         * keep only matching. We expect here that NVLink bridge PE pgsizes is
+         * initialized by the caller.
+         */
+        table_group->pgsizes &= pe->table_group.pgsizes;
+        npucomp = container_of(table_group, struct npu_comp, table_group);
+        pnv_comp_attach_table_group(npucomp, pe);
+
+        list_for_each_entry(npdev, &pe->phb->hose->bus->devices, bus_list) {
+                struct pci_dev *gpdevtmp = pnv_pci_get_gpu_dev(npdev);
 
-                if (gptmp != gpdev)
+                if (gpdevtmp != gpdev)
                         continue;
 
-                pe_info(gpe, "Attached NPU %s\n", dev_name(&npdev->dev));
-                iommu_group_add_device(gpe->table_group.group, &npdev->dev);
+                iommu_add_device(table_group, &npdev->dev);
         }
 
-        return gpe;
+        return table_group;
 }
+#endif /* CONFIG_IOMMU_API */
 
 /* Maximum number of nvlinks per npu */
 #define NV_MAX_LINKS 6
@@ -490,7 +782,6 @@ static void acquire_atsd_reg(struct npu_context *npu_context,
         int i, j;
         struct npu *npu;
         struct pci_dev *npdev;
-        struct pnv_phb *nphb;
 
         for (i = 0; i <= max_npu2_index; i++) {
                 mmio_atsd_reg[i].reg = -1;
@@ -505,8 +796,10 @@ static void acquire_atsd_reg(struct npu_context *npu_context,
                         if (!npdev)
                                 continue;
 
-                        nphb = pci_bus_to_host(npdev->bus)->private_data;
-                        npu = &nphb->npu;
+                        npu = pci_bus_to_host(npdev->bus)->npu;
+                        if (!npu)
+                                continue;
+
                         mmio_atsd_reg[i].npu = npu;
                         mmio_atsd_reg[i].reg = get_mmio_atsd_reg(npu);
                         while (mmio_atsd_reg[i].reg < 0) {
@@ -671,9 +964,9 @@ struct npu_context *pnv_npu2_init_context(struct pci_dev *gpdev,
         u32 nvlink_index;
         struct device_node *nvlink_dn;
         struct mm_struct *mm = current->mm;
-        struct pnv_phb *nphb;
         struct npu *npu;
         struct npu_context *npu_context;
+        struct pci_controller *hose;
 
         /*
          * At present we don't support GPUs connected to multiple NPUs and I'm
@@ -681,13 +974,14 @@ struct npu_context *pnv_npu2_init_context(struct pci_dev *gpdev,
          */
         struct pci_dev *npdev = pnv_pci_get_npu_dev(gpdev, 0);
 
-        if (!firmware_has_feature(FW_FEATURE_OPAL))
-                return ERR_PTR(-ENODEV);
-
         if (!npdev)
                 /* No nvlink associated with this GPU device */
                 return ERR_PTR(-ENODEV);
 
+        /* We only support DR/PR/HV in pnv_npu2_map_lpar_dev() */
+        if (flags & ~(MSR_DR | MSR_PR | MSR_HV))
+                return ERR_PTR(-EINVAL);
+
         nvlink_dn = of_parse_phandle(npdev->dev.of_node, "ibm,nvlink", 0);
         if (WARN_ON(of_property_read_u32(nvlink_dn, "ibm,npu-link-index",
                                                         &nvlink_index)))
@@ -701,20 +995,10 @@ struct npu_context *pnv_npu2_init_context(struct pci_dev *gpdev,
                 return ERR_PTR(-EINVAL);
         }
 
-        nphb = pci_bus_to_host(npdev->bus)->private_data;
-        npu = &nphb->npu;
-
-        /*
-         * Setup the NPU context table for a particular GPU. These need to be
-         * per-GPU as we need the tables to filter ATSDs when there are no
-         * active contexts on a particular GPU. It is safe for these to be
-         * called concurrently with destroy as the OPAL call takes appropriate
-         * locks and refcounts on init/destroy.
-         */
-        rc = opal_npu_init_context(nphb->opal_id, mm->context.id, flags,
-                                PCI_DEVID(gpdev->bus->number, gpdev->devfn));
-        if (rc < 0)
-                return ERR_PTR(-ENOSPC);
+        hose = pci_bus_to_host(npdev->bus);
+        npu = hose->npu;
+        if (!npu)
+                return ERR_PTR(-ENODEV);
 
         /*
          * We store the npu pci device so we can more easily get at the
@@ -726,9 +1010,6 @@ struct npu_context *pnv_npu2_init_context(struct pci_dev *gpdev,
                 if (npu_context->release_cb != cb ||
                         npu_context->priv != priv) {
                         spin_unlock(&npu_context_lock);
-                        opal_npu_destroy_context(nphb->opal_id, mm->context.id,
-                                                PCI_DEVID(gpdev->bus->number,
-                                                        gpdev->devfn));
                         return ERR_PTR(-EINVAL);
                 }
 
@@ -754,9 +1035,6 @@ struct npu_context *pnv_npu2_init_context(struct pci_dev *gpdev,
 
                 if (rc) {
                         kfree(npu_context);
-                        opal_npu_destroy_context(nphb->opal_id, mm->context.id,
-                                        PCI_DEVID(gpdev->bus->number,
-                                                gpdev->devfn));
                         return ERR_PTR(rc);
                 }
 
@@ -776,7 +1054,7 @@ struct npu_context *pnv_npu2_init_context(struct pci_dev *gpdev,
          */
         WRITE_ONCE(npu_context->npdev[npu->index][nvlink_index], npdev);
 
-        if (!nphb->npu.nmmu_flush) {
+        if (!npu->nmmu_flush) {
                 /*
                  * If we're not explicitly flushing ourselves we need to mark
                  * the thread for global flushes
@@ -809,27 +1087,24 @@ void pnv_npu2_destroy_context(struct npu_context *npu_context,
                         struct pci_dev *gpdev)
 {
         int removed;
-        struct pnv_phb *nphb;
         struct npu *npu;
         struct pci_dev *npdev = pnv_pci_get_npu_dev(gpdev, 0);
         struct device_node *nvlink_dn;
         u32 nvlink_index;
+        struct pci_controller *hose;
 
         if (WARN_ON(!npdev))
                 return;
 
-        if (!firmware_has_feature(FW_FEATURE_OPAL))
+        hose = pci_bus_to_host(npdev->bus);
+        npu = hose->npu;
+        if (!npu)
                 return;
-
-        nphb = pci_bus_to_host(npdev->bus)->private_data;
-        npu = &nphb->npu;
         nvlink_dn = of_parse_phandle(npdev->dev.of_node, "ibm,nvlink", 0);
         if (WARN_ON(of_property_read_u32(nvlink_dn, "ibm,npu-link-index",
                                                         &nvlink_index)))
                 return;
         WRITE_ONCE(npu_context->npdev[npu->index][nvlink_index], NULL);
-        opal_npu_destroy_context(nphb->opal_id, npu_context->mm->context.id,
-                                PCI_DEVID(gpdev->bus->number, gpdev->devfn));
         spin_lock(&npu_context_lock);
         removed = kref_put(&npu_context->kref, pnv_npu2_release_context);
         spin_unlock(&npu_context_lock);
@@ -857,13 +1132,12 @@ int pnv_npu2_handle_fault(struct npu_context *context, uintptr_t *ea,
         u64 rc = 0, result = 0;
         int i, is_write;
         struct page *page[1];
+        const char __user *u;
+        char c;
 
         /* mmap_sem should be held so the struct_mm must be present */
         struct mm_struct *mm = context->mm;
 
-        if (!firmware_has_feature(FW_FEATURE_OPAL))
-                return -ENODEV;
-
         WARN_ON(!rwsem_is_locked(&mm->mmap_sem));
 
         for (i = 0; i < count; i++) {
@@ -872,18 +1146,17 @@ int pnv_npu2_handle_fault(struct npu_context *context, uintptr_t *ea,
                                         is_write ? FOLL_WRITE : 0,
                                         page, NULL, NULL);
 
-                /*
-                 * To support virtualised environments we will have to do an
-                 * access to the page to ensure it gets faulted into the
-                 * hypervisor. For the moment virtualisation is not supported in
-                 * other areas so leave the access out.
-                 */
                 if (rc != 1) {
                         status[i] = rc;
                         result = -EFAULT;
                         continue;
                 }
 
+                /* Make sure partition scoped tree gets a pte */
+                u = page_address(page[0]);
+                if (__get_user(c, u))
+                        result = -EFAULT;
+
                 status[i] = 0;
                 put_page(page[0]);
         }
@@ -892,42 +1165,127 @@ int pnv_npu2_handle_fault(struct npu_context *context, uintptr_t *ea,
 }
 EXPORT_SYMBOL(pnv_npu2_handle_fault);
 
-int pnv_npu2_init(struct pnv_phb *phb)
+int pnv_npu2_init(struct pci_controller *hose)
 {
         unsigned int i;
         u64 mmio_atsd;
-        struct device_node *dn;
-        struct pci_dev *gpdev;
         static int npu_index;
-        uint64_t rc = 0;
-
-        phb->npu.nmmu_flush =
-                of_property_read_bool(phb->hose->dn, "ibm,nmmu-flush");
-        for_each_child_of_node(phb->hose->dn, dn) {
-                gpdev = pnv_pci_get_gpu_dev(get_pci_dev(dn));
-                if (gpdev) {
-                        rc = opal_npu_map_lpar(phb->opal_id,
-                                PCI_DEVID(gpdev->bus->number, gpdev->devfn),
-                                0, 0);
-                        if (rc)
-                                dev_err(&gpdev->dev,
-                                        "Error %lld mapping device to LPAR\n",
-                                        rc);
-                }
-        }
+        struct npu *npu;
+        int ret;
+
+        npu = kzalloc(sizeof(*npu), GFP_KERNEL);
+        if (!npu)
+                return -ENOMEM;
 
-        for (i = 0; !of_property_read_u64_index(phb->hose->dn, "ibm,mmio-atsd",
-                                                        i, &mmio_atsd); i++)
-                phb->npu.mmio_atsd_regs[i] = ioremap(mmio_atsd, 32);
+        npu->nmmu_flush = of_property_read_bool(hose->dn, "ibm,nmmu-flush");
 
-        pr_info("NPU%lld: Found %d MMIO ATSD registers", phb->opal_id, i);
-        phb->npu.mmio_atsd_count = i;
-        phb->npu.mmio_atsd_usage = 0;
+        for (i = 0; i < ARRAY_SIZE(npu->mmio_atsd_regs) &&
+                        !of_property_read_u64_index(hose->dn, "ibm,mmio-atsd",
+                                i, &mmio_atsd); i++)
+                npu->mmio_atsd_regs[i] = ioremap(mmio_atsd, 32);
+
+        pr_info("NPU%d: Found %d MMIO ATSD registers", hose->global_number, i);
+        npu->mmio_atsd_count = i;
+        npu->mmio_atsd_usage = 0;
         npu_index++;
-        if (WARN_ON(npu_index >= NV_MAX_NPUS))
-                return -ENOSPC;
+        if (WARN_ON(npu_index >= NV_MAX_NPUS)) {
+                ret = -ENOSPC;
+                goto fail_exit;
+        }
         max_npu2_index = npu_index;
-        phb->npu.index = npu_index;
+        npu->index = npu_index;
+        hose->npu = npu;
+
+        return 0;
+
+fail_exit:
+        for (i = 0; i < npu->mmio_atsd_count; ++i)
+                iounmap(npu->mmio_atsd_regs[i]);
+
+        kfree(npu);
+
+        return ret;
+}
+
+int pnv_npu2_map_lpar_dev(struct pci_dev *gpdev, unsigned int lparid,
+                unsigned long msr)
+{
+        int ret;
+        struct pci_dev *npdev = pnv_pci_get_npu_dev(gpdev, 0);
+        struct pci_controller *hose;
+        struct pnv_phb *nphb;
+
+        if (!npdev)
+                return -ENODEV;
+
+        hose = pci_bus_to_host(npdev->bus);
+        nphb = hose->private_data;
+
+        dev_dbg(&gpdev->dev, "Map LPAR opalid=%llu lparid=%u\n",
+                        nphb->opal_id, lparid);
+        /*
+         * Currently we only support radix and non-zero LPCR only makes sense
+         * for hash tables so skiboot expects the LPCR parameter to be a zero.
+         */
+        ret = opal_npu_map_lpar(nphb->opal_id,
+                        PCI_DEVID(gpdev->bus->number, gpdev->devfn), lparid,
+                        0 /* LPCR bits */);
+        if (ret) {
+                dev_err(&gpdev->dev, "Error %d mapping device to LPAR\n", ret);
+                return ret;
+        }
+
+        dev_dbg(&gpdev->dev, "init context opalid=%llu msr=%lx\n",
+                        nphb->opal_id, msr);
+        ret = opal_npu_init_context(nphb->opal_id, 0/*__unused*/, msr,
+                        PCI_DEVID(gpdev->bus->number, gpdev->devfn));
+        if (ret < 0)
+                dev_err(&gpdev->dev, "Failed to init context: %d\n", ret);
+        else
+                ret = 0;
 
         return 0;
 }
+EXPORT_SYMBOL_GPL(pnv_npu2_map_lpar_dev);
+
+void pnv_npu2_map_lpar(struct pnv_ioda_pe *gpe, unsigned long msr)
+{
+        struct pci_dev *gpdev;
+
+        list_for_each_entry(gpdev, &gpe->pbus->devices, bus_list)
+                pnv_npu2_map_lpar_dev(gpdev, 0, msr);
+}
+
+int pnv_npu2_unmap_lpar_dev(struct pci_dev *gpdev)
+{
+        int ret;
+        struct pci_dev *npdev = pnv_pci_get_npu_dev(gpdev, 0);
+        struct pci_controller *hose;
+        struct pnv_phb *nphb;
+
+        if (!npdev)
+                return -ENODEV;
+
+        hose = pci_bus_to_host(npdev->bus);
+        nphb = hose->private_data;
+
+        dev_dbg(&gpdev->dev, "destroy context opalid=%llu\n",
+                        nphb->opal_id);
+        ret = opal_npu_destroy_context(nphb->opal_id, 0/*__unused*/,
+                        PCI_DEVID(gpdev->bus->number, gpdev->devfn));
+        if (ret < 0) {
+                dev_err(&gpdev->dev, "Failed to destroy context: %d\n", ret);
+                return ret;
+        }
+
+        /* Set LPID to 0 anyway, just to be safe */
+        dev_dbg(&gpdev->dev, "Map LPAR opalid=%llu lparid=0\n", nphb->opal_id);
+        ret = opal_npu_map_lpar(nphb->opal_id,
+                        PCI_DEVID(gpdev->bus->number, gpdev->devfn), 0 /*LPID*/,
+                        0 /* LPCR bits */);
+        if (ret)
+                dev_err(&gpdev->dev, "Error %d mapping device to LPAR\n", ret);
+
+        return ret;
+}
+EXPORT_SYMBOL_GPL(pnv_npu2_unmap_lpar_dev);
diff --git a/arch/powerpc/platforms/powernv/opal-power.c b/arch/powerpc/platforms/powernv/opal-power.c
index 58dc3308237f..89ab1da57657 100644
--- a/arch/powerpc/platforms/powernv/opal-power.c
+++ b/arch/powerpc/platforms/powernv/opal-power.c
@@ -138,7 +138,7 @@ static struct notifier_block opal_power_control_nb = {
         .priority       = 0,
 };
 
-static int __init opal_power_control_init(void)
+int __init opal_power_control_init(void)
 {
         int ret, supported = 0;
         struct device_node *np;
@@ -176,4 +176,3 @@ static int __init opal_power_control_init(void)
 
         return 0;
 }
-machine_subsys_initcall(powernv, opal_power_control_init);
diff --git a/arch/powerpc/platforms/powernv/opal.c b/arch/powerpc/platforms/powernv/opal.c
index beed86f4224b..79586f127521 100644
--- a/arch/powerpc/platforms/powernv/opal.c
+++ b/arch/powerpc/platforms/powernv/opal.c
@@ -877,7 +877,7 @@ static int __init opal_init(void)
         consoles = of_find_node_by_path("/ibm,opal/consoles");
         if (consoles) {
                 for_each_child_of_node(consoles, np) {
-                        if (strcmp(np->name, "serial"))
+                        if (!of_node_name_eq(np, "serial"))
                                 continue;
                         of_platform_device_create(np, NULL, NULL);
                 }
@@ -960,6 +960,9 @@ static int __init opal_init(void)
         /* Initialise OPAL sensor groups */
         opal_sensor_groups_init();
 
+        /* Initialise OPAL Power control interface */
+        opal_power_control_init();
+
         return 0;
 }
 machine_subsys_initcall(powernv, opal_init);
diff --git a/arch/powerpc/platforms/powernv/pci-ioda-tce.c b/arch/powerpc/platforms/powernv/pci-ioda-tce.c
index fe9691040f54..697449afb3f7 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda-tce.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda-tce.c
@@ -299,7 +299,7 @@ long pnv_pci_ioda2_table_alloc_pages(int nid, __u64 bus_offset,
         if (alloc_userspace_copy) {
                 offset = 0;
                 uas = pnv_pci_ioda2_table_do_alloc_pages(nid, level_shift,
-                                levels, tce_table_size, &offset,
+                                tmplevels, tce_table_size, &offset,
                                 &total_allocated_uas);
                 if (!uas)
                         goto free_tces_exit;
@@ -368,6 +368,7 @@ void pnv_pci_unlink_table_and_group(struct iommu_table *tbl,
         found = false;
         for (i = 0; i < IOMMU_TABLE_GROUP_MAX_TABLES; ++i) {
                 if (table_group->tables[i] == tbl) {
+                        iommu_tce_table_put(tbl);
                         table_group->tables[i] = NULL;
                         found = true;
                         break;
@@ -393,7 +394,7 @@ long pnv_pci_link_table_and_group(int node, int num,
         tgl->table_group = table_group;
         list_add_rcu(&tgl->next, &tbl->it_group_list);
 
-        table_group->tables[num] = tbl;
+        table_group->tables[num] = iommu_tce_table_get(tbl);
 
         return 0;
 }
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
index dd807446801e..1d6406a051f1 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -190,7 +190,8 @@ static void pnv_ioda_free_pe(struct pnv_ioda_pe *pe)
         unsigned int pe_num = pe->pe_number;
 
         WARN_ON(pe->pdev);
-
+        WARN_ON(pe->npucomp); /* NPUs are not supposed to be freed */
+        kfree(pe->npucomp);
         memset(pe, 0, sizeof(struct pnv_ioda_pe));
         clear_bit(pe_num, phb->ioda.pe_alloc);
 }
@@ -517,8 +518,6 @@ static void __init pnv_ioda_parse_m64_window(struct pnv_phb *phb)
                 phb->init_m64 = pnv_ioda1_init_m64;
         else
                 phb->init_m64 = pnv_ioda2_init_m64;
-        phb->reserve_m64_pe = pnv_ioda_reserve_m64_pe;
-        phb->pick_m64_pe = pnv_ioda_pick_m64_pe;
 }
 
 static void pnv_ioda_freeze_pe(struct pnv_phb *phb, int pe_no)
@@ -604,8 +603,8 @@ static int pnv_ioda_unfreeze_pe(struct pnv_phb *phb, int pe_no, int opt)
 static int pnv_ioda_get_pe_state(struct pnv_phb *phb, int pe_no)
 {
         struct pnv_ioda_pe *slave, *pe;
-        u8 fstate, state;
-        __be16 pcierr;
+        u8 fstate = 0, state;
+        __be16 pcierr = 0;
         s64 rc;
 
         /* Sanity check on PE number */
@@ -663,10 +662,6 @@ static int pnv_ioda_get_pe_state(struct pnv_phb *phb, int pe_no)
         return state;
 }
 
-/* Currently those 2 are only used when MSIs are enabled, this will change
- * but in the meantime, we need to protect them to avoid warnings
- */
-#ifdef CONFIG_PCI_MSI
 struct pnv_ioda_pe *pnv_ioda_get_pe(struct pci_dev *dev)
 {
         struct pci_controller *hose = pci_bus_to_host(dev->bus);
@@ -679,7 +674,6 @@ struct pnv_ioda_pe *pnv_ioda_get_pe(struct pci_dev *dev)
                 return NULL;
         return &phb->ioda.pe_array[pdn->pe_number];
 }
-#endif /* CONFIG_PCI_MSI */
 
 static int pnv_ioda_set_one_peltv(struct pnv_phb *phb,
                                   struct pnv_ioda_pe *parent,
@@ -1160,8 +1154,8 @@ static struct pnv_ioda_pe *pnv_ioda_setup_bus_PE(struct pci_bus *bus, bool all)
                 pe = &phb->ioda.pe_array[phb->ioda.root_pe_idx];
 
         /* Check if PE is determined by M64 */
-        if (!pe && phb->pick_m64_pe)
-                pe = phb->pick_m64_pe(bus, all);
+        if (!pe)
+                pe = pnv_ioda_pick_m64_pe(bus, all);
 
         /* The PE number isn't pinned by M64 */
         if (!pe)
@@ -1273,19 +1267,20 @@ static void pnv_ioda_setup_npu_PEs(struct pci_bus *bus)
 
 static void pnv_pci_ioda_setup_PEs(void)
 {
-        struct pci_controller *hose, *tmp;
+        struct pci_controller *hose;
         struct pnv_phb *phb;
         struct pci_bus *bus;
         struct pci_dev *pdev;
+        struct pnv_ioda_pe *pe;
 
-        list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
+        list_for_each_entry(hose, &hose_list, list_node) {
                 phb = hose->private_data;
                 if (phb->type == PNV_PHB_NPU_NVLINK) {
                         /* PE#0 is needed for error reporting */
                         pnv_ioda_reserve_pe(phb, 0);
                         pnv_ioda_setup_npu_PEs(hose->bus);
                         if (phb->model == PNV_PHB_MODEL_NPU2)
-                                pnv_npu2_init(phb);
+                                WARN_ON_ONCE(pnv_npu2_init(hose));
                 }
                 if (phb->type == PNV_PHB_NPU_OCAPI) {
                         bus = hose->bus;
@@ -1293,6 +1288,14 @@ static void pnv_pci_ioda_setup_PEs(void)
                                 pnv_ioda_setup_dev_PE(pdev);
                 }
         }
+        list_for_each_entry(hose, &hose_list, list_node) {
+                phb = hose->private_data;
+                if (phb->type != PNV_PHB_IODA2)
+                        continue;
+
+                list_for_each_entry(pe, &phb->ioda.pe_list, list)
+                        pnv_npu2_map_lpar(pe, MSR_DR | MSR_PR | MSR_HV);
+        }
 }
 
 #ifdef CONFIG_PCI_IOV
@@ -1531,6 +1534,11 @@ void pnv_pci_sriov_disable(struct pci_dev *pdev)
 
 static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb,
                                        struct pnv_ioda_pe *pe);
+#ifdef CONFIG_IOMMU_API
+static void pnv_ioda_setup_bus_iommu_group(struct pnv_ioda_pe *pe,
+                struct iommu_table_group *table_group, struct pci_bus *bus);
+
+#endif
 static void pnv_ioda_setup_vf_PE(struct pci_dev *pdev, u16 num_vfs)
 {
         struct pci_bus        *bus;
@@ -1584,6 +1592,9 @@ static void pnv_ioda_setup_vf_PE(struct pci_dev *pdev, u16 num_vfs)
                 mutex_unlock(&phb->ioda.pe_list_mutex);
 
                 pnv_pci_ioda2_setup_dma_pe(phb, pe);
+#ifdef CONFIG_IOMMU_API
+                pnv_ioda_setup_bus_iommu_group(pe, &pe->table_group, NULL);
+#endif
         }
 }
 
@@ -1923,21 +1934,16 @@ static u64 pnv_pci_ioda_dma_get_required_mask(struct pci_dev *pdev)
         return mask;
 }
 
-static void pnv_ioda_setup_bus_dma(struct pnv_ioda_pe *pe,
-                                   struct pci_bus *bus,
-                                   bool add_to_group)
+static void pnv_ioda_setup_bus_dma(struct pnv_ioda_pe *pe, struct pci_bus *bus)
 {
         struct pci_dev *dev;
 
         list_for_each_entry(dev, &bus->devices, bus_list) {
                 set_iommu_table_base(&dev->dev, pe->table_group.tables[0]);
                 set_dma_offset(&dev->dev, pe->tce_bypass_base);
-                if (add_to_group)
-                        iommu_add_device(&dev->dev);
 
                 if ((pe->flags & PNV_IODA_PE_BUS_ALL) && dev->subordinate)
-                        pnv_ioda_setup_bus_dma(pe, dev->subordinate,
-                                        add_to_group);
+                        pnv_ioda_setup_bus_dma(pe, dev->subordinate);
         }
 }
 
@@ -2366,16 +2372,8 @@ found:
         pe->table_group.tce32_size = tbl->it_size << tbl->it_page_shift;
         iommu_init_table(tbl, phb->hose->node);
 
-        if (pe->flags & PNV_IODA_PE_DEV) {
-                /*
-                 * Setting table base here only for carrying iommu_group
-                 * further down to let iommu_add_device() do the job.
-                 * pnv_pci_ioda_dma_dev_setup will override it later anyway.
-                 */
-                set_iommu_table_base(&pe->pdev->dev, tbl);
-                iommu_add_device(&pe->pdev->dev);
-        } else if (pe->flags & (PNV_IODA_PE_BUS | PNV_IODA_PE_BUS_ALL))
-                pnv_ioda_setup_bus_dma(pe, pe->pbus, true);
+        if (pe->flags & (PNV_IODA_PE_BUS | PNV_IODA_PE_BUS_ALL))
+                pnv_ioda_setup_bus_dma(pe, pe->pbus);
 
         return;
  fail:
@@ -2527,14 +2525,6 @@ static long pnv_pci_ioda2_setup_default_config(struct pnv_ioda_pe *pe)
         if (!pnv_iommu_bypass_disabled)
                 pnv_pci_ioda2_set_bypass(pe, true);
 
-        /*
-         * Setting table base here only for carrying iommu_group
-         * further down to let iommu_add_device() do the job.
-         * pnv_pci_ioda_dma_dev_setup will override it later anyway.
-         */
-        if (pe->flags & PNV_IODA_PE_DEV)
-                set_iommu_table_base(&pe->pdev->dev, tbl);
-
         return 0;
 }
 
@@ -2565,7 +2555,7 @@ static long pnv_pci_ioda2_unset_window(struct iommu_table_group *table_group,
 #endif
 
 #ifdef CONFIG_IOMMU_API
-static unsigned long pnv_pci_ioda2_get_table_size(__u32 page_shift,
+unsigned long pnv_pci_ioda2_get_table_size(__u32 page_shift,
                 __u64 window_size, __u32 levels)
 {
         unsigned long bytes = 0;
@@ -2616,7 +2606,7 @@ static void pnv_ioda2_take_ownership(struct iommu_table_group *table_group)
         pnv_pci_ioda2_set_bypass(pe, false);
         pnv_pci_ioda2_unset_window(&pe->table_group, 0);
         if (pe->pbus)
-                pnv_ioda_setup_bus_dma(pe, pe->pbus, false);
+                pnv_ioda_setup_bus_dma(pe, pe->pbus);
         iommu_tce_table_put(tbl);
 }
 
@@ -2627,7 +2617,7 @@ static void pnv_ioda2_release_ownership(struct iommu_table_group *table_group)
 
         pnv_pci_ioda2_setup_default_config(pe);
         if (pe->pbus)
-                pnv_ioda_setup_bus_dma(pe, pe->pbus, false);
+                pnv_ioda_setup_bus_dma(pe, pe->pbus);
 }
 
 static struct iommu_table_group_ops pnv_pci_ioda2_ops = {
@@ -2639,131 +2629,100 @@ static struct iommu_table_group_ops pnv_pci_ioda2_ops = {
         .release_ownership = pnv_ioda2_release_ownership,
 };
 
-static int gpe_table_group_to_npe_cb(struct device *dev, void *opaque)
+static void pnv_ioda_setup_bus_iommu_group_add_devices(struct pnv_ioda_pe *pe,
+                struct iommu_table_group *table_group,
+                struct pci_bus *bus)
 {
-        struct pci_controller *hose;
-        struct pnv_phb *phb;
-        struct pnv_ioda_pe **ptmppe = opaque;
-        struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
-        struct pci_dn *pdn = pci_get_pdn(pdev);
-
-        if (!pdn || pdn->pe_number == IODA_INVALID_PE)
-                return 0;
-
-        hose = pci_bus_to_host(pdev->bus);
-        phb = hose->private_data;
-        if (phb->type != PNV_PHB_NPU_NVLINK)
-                return 0;
+        struct pci_dev *dev;
 
-        *ptmppe = &phb->ioda.pe_array[pdn->pe_number];
+        list_for_each_entry(dev, &bus->devices, bus_list) {
+                iommu_add_device(table_group, &dev->dev);
 
-        return 1;
+                if ((pe->flags & PNV_IODA_PE_BUS_ALL) && dev->subordinate)
+                        pnv_ioda_setup_bus_iommu_group_add_devices(pe,
+                                        table_group, dev->subordinate);
+        }
 }
 
-/*
- * This returns PE of associated NPU.
- * This assumes that NPU is in the same IOMMU group with GPU and there is
- * no other PEs.
- */
-static struct pnv_ioda_pe *gpe_table_group_to_npe(
-                struct iommu_table_group *table_group)
+static void pnv_ioda_setup_bus_iommu_group(struct pnv_ioda_pe *pe,
+                struct iommu_table_group *table_group, struct pci_bus *bus)
 {
-        struct pnv_ioda_pe *npe = NULL;
-        int ret = iommu_group_for_each_dev(table_group->group, &npe,
-                        gpe_table_group_to_npe_cb);
 
-        BUG_ON(!ret || !npe);
+        if (pe->flags & PNV_IODA_PE_DEV)
+                iommu_add_device(table_group, &pe->pdev->dev);
 
-        return npe;
+        if ((pe->flags & (PNV_IODA_PE_BUS | PNV_IODA_PE_BUS_ALL)) || bus)
+                pnv_ioda_setup_bus_iommu_group_add_devices(pe, table_group,
+                                bus);
 }
 
-static long pnv_pci_ioda2_npu_set_window(struct iommu_table_group *table_group,
-                int num, struct iommu_table *tbl)
-{
-        struct pnv_ioda_pe *npe = gpe_table_group_to_npe(table_group);
-        int num2 = (num == 0) ? 1 : 0;
-        long ret = pnv_pci_ioda2_set_window(table_group, num, tbl);
-
-        if (ret)
-                return ret;
-
-        if (table_group->tables[num2])
-                pnv_npu_unset_window(npe, num2);
-
-        ret = pnv_npu_set_window(npe, num, tbl);
-        if (ret) {
-                pnv_pci_ioda2_unset_window(table_group, num);
-                if (table_group->tables[num2])
-                        pnv_npu_set_window(npe, num2,
-                                        table_group->tables[num2]);
-        }
-
-        return ret;
-}
+static unsigned long pnv_ioda_parse_tce_sizes(struct pnv_phb *phb);
 
-static long pnv_pci_ioda2_npu_unset_window(
-                struct iommu_table_group *table_group,
-                int num)
+static void pnv_pci_ioda_setup_iommu_api(void)
 {
-        struct pnv_ioda_pe *npe = gpe_table_group_to_npe(table_group);
-        int num2 = (num == 0) ? 1 : 0;
-        long ret = pnv_pci_ioda2_unset_window(table_group, num);
-
-        if (ret)
-                return ret;
-
-        if (!npe->table_group.tables[num])
-                return 0;
-
-        ret = pnv_npu_unset_window(npe, num);
-        if (ret)
-                return ret;
-
-        if (table_group->tables[num2])
-                ret = pnv_npu_set_window(npe, num2, table_group->tables[num2]);
-
-        return ret;
-}
+        struct pci_controller *hose;
+        struct pnv_phb *phb;
+        struct pnv_ioda_pe *pe;
 
-static void pnv_ioda2_npu_take_ownership(struct iommu_table_group *table_group)
-{
         /*
-         * Detach NPU first as pnv_ioda2_take_ownership() will destroy
-         * the iommu_table if 32bit DMA is enabled.
+         * There are 4 types of PEs:
+         * - PNV_IODA_PE_BUS: a downstream port with an adapter,
+         *   created from pnv_pci_setup_bridge();
+         * - PNV_IODA_PE_BUS_ALL: a PCI-PCIX bridge with devices behind it,
+         *   created from pnv_pci_setup_bridge();
+         * - PNV_IODA_PE_VF: a SRIOV virtual function,
+         *   created from pnv_pcibios_sriov_enable();
+         * - PNV_IODA_PE_DEV: an NPU or OCAPI device,
+         *   created from pnv_pci_ioda_fixup().
+         *
+         * Normally a PE is represented by an IOMMU group, however for
+         * devices with side channels the groups need to be more strict.
          */
-        pnv_npu_take_ownership(gpe_table_group_to_npe(table_group));
-        pnv_ioda2_take_ownership(table_group);
-}
+        list_for_each_entry(hose, &hose_list, list_node) {
+                phb = hose->private_data;
 
-static struct iommu_table_group_ops pnv_pci_ioda2_npu_ops = {
-        .get_table_size = pnv_pci_ioda2_get_table_size,
-        .create_table = pnv_pci_ioda2_create_table_userspace,
-        .set_window = pnv_pci_ioda2_npu_set_window,
-        .unset_window = pnv_pci_ioda2_npu_unset_window,
-        .take_ownership = pnv_ioda2_npu_take_ownership,
-        .release_ownership = pnv_ioda2_release_ownership,
-};
+                if (phb->type == PNV_PHB_NPU_NVLINK)
+                        continue;
 
-static void pnv_pci_ioda_setup_iommu_api(void)
-{
-        struct pci_controller *hose, *tmp;
-        struct pnv_phb *phb;
-        struct pnv_ioda_pe *pe, *gpe;
+                list_for_each_entry(pe, &phb->ioda.pe_list, list) {
+                        struct iommu_table_group *table_group;
+
+                        table_group = pnv_try_setup_npu_table_group(pe);
+                        if (!table_group) {
+                                if (!pnv_pci_ioda_pe_dma_weight(pe))
+                                        continue;
+
+                                table_group = &pe->table_group;
+                                iommu_register_group(&pe->table_group,
+                                                pe->phb->hose->global_number,
+                                                pe->pe_number);
+                        }
+                        pnv_ioda_setup_bus_iommu_group(pe, table_group,
+                                        pe->pbus);
+                }
+        }
 
         /*
          * Now we have all PHBs discovered, time to add NPU devices to
          * the corresponding IOMMU groups.
          */
-        list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
+        list_for_each_entry(hose, &hose_list, list_node) {
+                unsigned long  pgsizes;
+
                 phb = hose->private_data;
 
                 if (phb->type != PNV_PHB_NPU_NVLINK)
                         continue;
 
+                pgsizes = pnv_ioda_parse_tce_sizes(phb);
                 list_for_each_entry(pe, &phb->ioda.pe_list, list) {
-                        gpe = pnv_pci_npu_setup_iommu(pe);
-                        if (gpe)
-                                gpe->table_group.ops = &pnv_pci_ioda2_npu_ops;
+                        /*
+                         * IODA2 bridges get this set up from
+                         * pci_controller_ops::setup_bridge but NPU bridges
+                         * do not have this hook defined so we do it here.
+                         */
+                        pe->table_group.pgsizes = pgsizes;
+                        pnv_npu_compound_attach(pe);
                 }
         }
 }
@@ -2810,9 +2769,6 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb,
         /* TVE #1 is selected by PCI address bit 59 */
         pe->tce_bypass_base = 1ull << 59;
 
-        iommu_register_group(&pe->table_group, phb->hose->global_number,
-                        pe->pe_number);
-
         /* The PE will reserve all possible 32-bits space */
         pe_info(pe, "Setting up 32-bit TCE table at 0..%08x\n",
                 phb->ioda.m32_pci_base);
@@ -2833,10 +2789,9 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb,
                 return;
 
         if (pe->flags & (PNV_IODA_PE_BUS | PNV_IODA_PE_BUS_ALL))
-                pnv_ioda_setup_bus_dma(pe, pe->pbus, true);
+                pnv_ioda_setup_bus_dma(pe, pe->pbus);
 }
 
-#ifdef CONFIG_PCI_MSI
 int64_t pnv_opal_pci_msi_eoi(struct irq_chip *chip, unsigned int hw_irq)
 {
         struct pnv_phb *phb = container_of(chip, struct pnv_phb,
@@ -2982,9 +2937,6 @@ static void pnv_pci_init_ioda_msis(struct pnv_phb *phb)
         pr_info("  Allocated bitmap for %d MSIs (base IRQ 0x%x)\n",
                 count, phb->msi_base);
 }
-#else
-static void pnv_pci_init_ioda_msis(struct pnv_phb *phb) { }
-#endif /* CONFIG_PCI_MSI */
 
 #ifdef CONFIG_PCI_IOV
 static void pnv_pci_ioda_fixup_iov_resources(struct pci_dev *pdev)
@@ -3402,8 +3354,7 @@ static void pnv_pci_setup_bridge(struct pci_bus *bus, unsigned long type)
                 return;
 
         /* Reserve PEs according to used M64 resources */
-        if (phb->reserve_m64_pe)
-                phb->reserve_m64_pe(bus, NULL, all);
+        pnv_ioda_reserve_m64_pe(bus, NULL, all);
 
         /*
          * Assign PE. We might run here because of partial hotplug.
@@ -3687,6 +3638,15 @@ static void pnv_pci_release_device(struct pci_dev *pdev)
                 pnv_ioda_release_pe(pe);
 }
 
+static void pnv_npu_disable_device(struct pci_dev *pdev)
+{
+        struct eeh_dev *edev = pci_dev_to_eeh_dev(pdev);
+        struct eeh_pe *eehpe = edev ? edev->pe : NULL;
+
+        if (eehpe && eeh_ops && eeh_ops->reset)
+                eeh_ops->reset(eehpe, EEH_RESET_HOT);
+}
+
 static void pnv_pci_ioda_shutdown(struct pci_controller *hose)
 {
         struct pnv_phb *phb = hose->private_data;
@@ -3698,10 +3658,8 @@ static void pnv_pci_ioda_shutdown(struct pci_controller *hose)
 static const struct pci_controller_ops pnv_pci_ioda_controller_ops = {
         .dma_dev_setup          = pnv_pci_dma_dev_setup,
         .dma_bus_setup          = pnv_pci_dma_bus_setup,
-#ifdef CONFIG_PCI_MSI
         .setup_msi_irqs         = pnv_setup_msi_irqs,
         .teardown_msi_irqs      = pnv_teardown_msi_irqs,
-#endif
         .enable_device_hook     = pnv_pci_enable_device_hook,
         .release_device         = pnv_pci_release_device,
         .window_alignment       = pnv_pci_window_alignment,
@@ -3722,15 +3680,14 @@ static int pnv_npu_dma_set_mask(struct pci_dev *npdev, u64 dma_mask)
 
 static const struct pci_controller_ops pnv_npu_ioda_controller_ops = {
         .dma_dev_setup          = pnv_pci_dma_dev_setup,
-#ifdef CONFIG_PCI_MSI
         .setup_msi_irqs         = pnv_setup_msi_irqs,
         .teardown_msi_irqs      = pnv_teardown_msi_irqs,
-#endif
         .enable_device_hook     = pnv_pci_enable_device_hook,
         .window_alignment       = pnv_pci_window_alignment,
         .reset_secondary_bus    = pnv_pci_reset_secondary_bus,
         .dma_set_mask           = pnv_npu_dma_set_mask,
         .shutdown               = pnv_pci_ioda_shutdown,
+        .disable_device         = pnv_npu_disable_device,
 };
 
 static const struct pci_controller_ops pnv_npu_ocapi_ioda_controller_ops = {
diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c
index 13aef2323bbc..45fb70b4bfa7 100644
--- a/arch/powerpc/platforms/powernv/pci.c
+++ b/arch/powerpc/platforms/powernv/pci.c
@@ -160,7 +160,6 @@ exit:
 }
 EXPORT_SYMBOL_GPL(pnv_pci_set_power_state);
 
-#ifdef CONFIG_PCI_MSI
 int pnv_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
 {
         struct pci_controller *hose = pci_bus_to_host(pdev->bus);
@@ -229,7 +228,6 @@ void pnv_teardown_msi_irqs(struct pci_dev *pdev)
                 msi_bitmap_free_hwirqs(&phb->msi_bmp, hwirq - phb->msi_base, 1);
         }
 }
-#endif /* CONFIG_PCI_MSI */
 
 /* Nicely print the contents of the PE State Tables (PEST). */
 static void pnv_pci_dump_pest(__be64 pestA[], __be64 pestB[], int pest_size)
@@ -602,8 +600,8 @@ static void pnv_pci_handle_eeh_config(struct pnv_phb *phb, u32 pe_no)
 static void pnv_pci_config_check_eeh(struct pci_dn *pdn)
 {
         struct pnv_phb *phb = pdn->phb->private_data;
-        u8      fstate;
-        __be16  pcierr;
+        u8      fstate = 0;
+        __be16  pcierr = 0;
         unsigned int pe_no;
         s64     rc;
 
@@ -1127,4 +1125,45 @@ void __init pnv_pci_init(void)
         set_pci_dma_ops(&dma_iommu_ops);
 }
 
-machine_subsys_initcall_sync(powernv, tce_iommu_bus_notifier_init);
+static int pnv_tce_iommu_bus_notifier(struct notifier_block *nb,
+                unsigned long action, void *data)
+{
+        struct device *dev = data;
+        struct pci_dev *pdev;
+        struct pci_dn *pdn;
+        struct pnv_ioda_pe *pe;
+        struct pci_controller *hose;
+        struct pnv_phb *phb;
+
+        switch (action) {
+        case BUS_NOTIFY_ADD_DEVICE:
+                pdev = to_pci_dev(dev);
+                pdn = pci_get_pdn(pdev);
+                hose = pci_bus_to_host(pdev->bus);
+                phb = hose->private_data;
+
+                WARN_ON_ONCE(!phb);
+                if (!pdn || pdn->pe_number == IODA_INVALID_PE || !phb)
+                        return 0;
+
+                pe = &phb->ioda.pe_array[pdn->pe_number];
+                iommu_add_device(&pe->table_group, dev);
+                return 0;
+        case BUS_NOTIFY_DEL_DEVICE:
+                iommu_del_device(dev);
+                return 0;
+        default:
+                return 0;
+        }
+}
+
+static struct notifier_block pnv_tce_iommu_bus_nb = {
+        .notifier_call = pnv_tce_iommu_bus_notifier,
+};
+
+static int __init pnv_tce_iommu_bus_notifier_init(void)
+{
+        bus_register_notifier(&pci_bus_type, &pnv_tce_iommu_bus_nb);
+        return 0;
+}
+machine_subsys_initcall_sync(powernv, pnv_tce_iommu_bus_notifier_init);
diff --git a/arch/powerpc/platforms/powernv/pci.h b/arch/powerpc/platforms/powernv/pci.h
index 8b37b28e3831..8e36da379252 100644
--- a/arch/powerpc/platforms/powernv/pci.h
+++ b/arch/powerpc/platforms/powernv/pci.h
@@ -8,9 +8,6 @@
 
 struct pci_dn;
 
-/* Maximum possible number of ATSD MMIO registers per NPU */
-#define NV_NMMU_ATSD_REGS 8
-
 enum pnv_phb_type {
         PNV_PHB_IODA1           = 0,
         PNV_PHB_IODA2           = 1,
@@ -65,6 +62,7 @@ struct pnv_ioda_pe {
 
         /* "Base" iommu table, ie, 4K TCEs, 32-bit DMA */
         struct iommu_table_group table_group;
+        struct npu_comp         *npucomp;
 
         /* 64-bit TCE bypass region */
         bool                    tce_bypass_enabled;
@@ -106,20 +104,14 @@ struct pnv_phb {
         struct dentry           *dbgfs;
 #endif
 
-#ifdef CONFIG_PCI_MSI
         unsigned int            msi_base;
         unsigned int            msi32_support;
         struct msi_bitmap       msi_bmp;
-#endif
         int (*msi_setup)(struct pnv_phb *phb, struct pci_dev *dev,
                          unsigned int hwirq, unsigned int virq,
                          unsigned int is_64, struct msi_msg *msg);
         void (*dma_dev_setup)(struct pnv_phb *phb, struct pci_dev *pdev);
-        void (*fixup_phb)(struct pci_controller *hose);
         int (*init_m64)(struct pnv_phb *phb);
-        void (*reserve_m64_pe)(struct pci_bus *bus,
-                               unsigned long *pe_bitmap, bool all);
-        struct pnv_ioda_pe *(*pick_m64_pe)(struct pci_bus *bus, bool all);
         int (*get_pe_state)(struct pnv_phb *phb, int pe_no);
         void (*freeze_pe)(struct pnv_phb *phb, int pe_no);
         int (*unfreeze_pe)(struct pnv_phb *phb, int pe_no, int opt);
@@ -180,19 +172,6 @@ struct pnv_phb {
         unsigned int            diag_data_size;
         u8                      *diag_data;
 
-        /* Nvlink2 data */
-        struct npu {
-                int index;
-                __be64 *mmio_atsd_regs[NV_NMMU_ATSD_REGS];
-                unsigned int mmio_atsd_count;
-
-                /* Bitmask for MMIO register usage */
-                unsigned long mmio_atsd_usage;
-
-                /* Do we need to explicitly flush the nest mmu? */
-                bool nmmu_flush;
-        } npu;
-
         int p2p_target_count;
 };
 
@@ -210,6 +189,7 @@ extern void pnv_pci_init_ioda_hub(struct device_node *np);
 extern void pnv_pci_init_ioda2_phb(struct device_node *np);
 extern void pnv_pci_init_npu_phb(struct device_node *np);
 extern void pnv_pci_init_npu2_opencapi_phb(struct device_node *np);
+extern void pnv_npu2_map_lpar(struct pnv_ioda_pe *gpe, unsigned long msr);
 extern void pnv_pci_reset_secondary_bus(struct pci_dev *dev);
 extern int pnv_eeh_phb_reset(struct pci_controller *hose, int option);
 
@@ -220,6 +200,8 @@ extern void pnv_teardown_msi_irqs(struct pci_dev *pdev);
 extern struct pnv_ioda_pe *pnv_ioda_get_pe(struct pci_dev *dev);
 extern void pnv_set_msi_irq_chip(struct pnv_phb *phb, unsigned int virq);
 extern void pnv_pci_ioda2_set_bypass(struct pnv_ioda_pe *pe, bool enable);
+extern unsigned long pnv_pci_ioda2_get_table_size(__u32 page_shift,
+                __u64 window_size, __u32 levels);
 extern int pnv_eeh_post_init(void);
 
 extern void pe_level_printk(const struct pnv_ioda_pe *pe, const char *level,
@@ -235,12 +217,10 @@ extern void pe_level_printk(const struct pnv_ioda_pe *pe, const char *level,
 extern void pnv_npu_try_dma_set_bypass(struct pci_dev *gpdev, bool bypass);
 extern void pnv_pci_ioda2_tce_invalidate_entire(struct pnv_phb *phb, bool rm);
 extern struct pnv_ioda_pe *pnv_pci_npu_setup_iommu(struct pnv_ioda_pe *npe);
-extern long pnv_npu_set_window(struct pnv_ioda_pe *npe, int num,
-                struct iommu_table *tbl);
-extern long pnv_npu_unset_window(struct pnv_ioda_pe *npe, int num);
-extern void pnv_npu_take_ownership(struct pnv_ioda_pe *npe);
-extern void pnv_npu_release_ownership(struct pnv_ioda_pe *npe);
-extern int pnv_npu2_init(struct pnv_phb *phb);
+extern struct iommu_table_group *pnv_try_setup_npu_table_group(
+                struct pnv_ioda_pe *pe);
+extern struct iommu_table_group *pnv_npu_compound_attach(
+                struct pnv_ioda_pe *pe);
 
 /* pci-ioda-tce.c */
 #define POWERNV_IOMMU_DEFAULT_LEVELS    1
diff --git a/arch/powerpc/platforms/powernv/vas-debug.c b/arch/powerpc/platforms/powernv/vas-debug.c
index 4f7276ebdf9c..4d3929fbc08f 100644
--- a/arch/powerpc/platforms/powernv/vas-debug.c
+++ b/arch/powerpc/platforms/powernv/vas-debug.c
@@ -30,7 +30,7 @@ static char *cop_to_str(int cop)
         }
 }
 
-static int info_dbg_show(struct seq_file *s, void *private)
+static int info_show(struct seq_file *s, void *private)
 {
         struct vas_window *window = s->private;
 
@@ -49,17 +49,7 @@ unlock:
         return 0;
 }
 
-static int info_dbg_open(struct inode *inode, struct file *file)
-{
-        return single_open(file, info_dbg_show, inode->i_private);
-}
-
-static const struct file_operations info_fops = {
-        .open           = info_dbg_open,
-        .read           = seq_read,
-        .llseek         = seq_lseek,
-        .release        = single_release,
-};
+DEFINE_SHOW_ATTRIBUTE(info);
 
 static inline void print_reg(struct seq_file *s, struct vas_window *win,
                         char *name, u32 reg)
@@ -67,7 +57,7 @@ static inline void print_reg(struct seq_file *s, struct vas_window *win,
         seq_printf(s, "0x%016llx %s\n", read_hvwc_reg(win, name, reg), name);
 }
 
-static int hvwc_dbg_show(struct seq_file *s, void *private)
+static int hvwc_show(struct seq_file *s, void *private)
 {
         struct vas_window *window = s->private;
 
@@ -115,17 +105,7 @@ unlock:
         return 0;
 }
 
-static int hvwc_dbg_open(struct inode *inode, struct file *file)
-{
-        return single_open(file, hvwc_dbg_show, inode->i_private);
-}
-
-static const struct file_operations hvwc_fops = {
-        .open           = hvwc_dbg_open,
-        .read           = seq_read,
-        .llseek         = seq_lseek,
-        .release        = single_release,
-};
+DEFINE_SHOW_ATTRIBUTE(hvwc);
 
 void vas_window_free_dbgdir(struct vas_window *window)
 {
diff --git a/arch/powerpc/platforms/pseries/hotplug-memory.c b/arch/powerpc/platforms/pseries/hotplug-memory.c
index 2a983b5a52e1..d291b618a559 100644
--- a/arch/powerpc/platforms/pseries/hotplug-memory.c
+++ b/arch/powerpc/platforms/pseries/hotplug-memory.c
@@ -197,6 +197,7 @@ static int update_lmb_associativity_index(struct drmem_lmb *lmb)
 
         found = find_aa_index(dr_node, ala_prop, lmb_assoc, &aa_index);
 
+        of_node_put(dr_node);
         dlpar_free_cc_nodes(lmb_node);
 
         if (!found) {
@@ -313,7 +314,6 @@ out:
 
 static int pseries_remove_mem_node(struct device_node *np)
 {
-        const char *type;
         const __be32 *regs;
         unsigned long base;
         unsigned int lmb_size;
@@ -322,8 +322,7 @@ static int pseries_remove_mem_node(struct device_node *np)
         /*
          * Check to see if we are actually removing memory
          */
-        type = of_get_property(np, "device_type", NULL);
-        if (type == NULL || strcmp(type, "memory") != 0)
+        if (!of_node_is_type(np, "memory"))
                 return 0;
 
         /*
@@ -355,8 +354,11 @@ static bool lmb_is_removable(struct drmem_lmb *lmb)
         phys_addr = lmb->base_addr;
 
 #ifdef CONFIG_FA_DUMP
-        /* Don't hot-remove memory that falls in fadump boot memory area */
-        if (is_fadump_boot_memory_area(phys_addr, block_sz))
+        /*
+         * Don't hot-remove memory that falls in fadump boot memory area
+         * and memory that is reserved for capturing old kernel memory.
+         */
+        if (is_fadump_memory_area(phys_addr, block_sz))
                 return false;
 #endif
 
@@ -936,7 +938,6 @@ int dlpar_memory(struct pseries_hp_errorlog *hp_elog)
 
 static int pseries_add_mem_node(struct device_node *np)
 {
-        const char *type;
         const __be32 *regs;
         unsigned long base;
         unsigned int lmb_size;
@@ -945,8 +946,7 @@ static int pseries_add_mem_node(struct device_node *np)
         /*
          * Check to see if we are actually adding memory
          */
-        type = of_get_property(np, "device_type", NULL);
-        if (type == NULL || strcmp(type, "memory") != 0)
+        if (!of_node_is_type(np, "memory"))
                 return 0;
 
         /*
diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c
index 06f02960b439..8fc8fe0b9848 100644
--- a/arch/powerpc/platforms/pseries/iommu.c
+++ b/arch/powerpc/platforms/pseries/iommu.c
@@ -57,7 +57,6 @@ static struct iommu_table_group *iommu_pseries_alloc_group(int node)
 {
         struct iommu_table_group *table_group;
         struct iommu_table *tbl;
-        struct iommu_table_group_link *tgl;
 
         table_group = kzalloc_node(sizeof(struct iommu_table_group), GFP_KERNEL,
                            node);
@@ -68,22 +67,13 @@ static struct iommu_table_group *iommu_pseries_alloc_group(int node)
         if (!tbl)
                 goto free_group;
 
-        tgl = kzalloc_node(sizeof(struct iommu_table_group_link), GFP_KERNEL,
-                        node);
-        if (!tgl)
-                goto free_table;
-
         INIT_LIST_HEAD_RCU(&tbl->it_group_list);
         kref_init(&tbl->it_kref);
-        tgl->table_group = table_group;
-        list_add_rcu(&tgl->next, &tbl->it_group_list);
 
         table_group->tables[0] = tbl;
 
         return table_group;
 
-free_table:
-        kfree(tbl);
 free_group:
         kfree(table_group);
         return NULL;
@@ -93,23 +83,12 @@ static void iommu_pseries_free_group(struct iommu_table_group *table_group,
                 const char *node_name)
 {
         struct iommu_table *tbl;
-#ifdef CONFIG_IOMMU_API
-        struct iommu_table_group_link *tgl;
-#endif
 
         if (!table_group)
                 return;
 
         tbl = table_group->tables[0];
 #ifdef CONFIG_IOMMU_API
-        tgl = list_first_entry_or_null(&tbl->it_group_list,
-                        struct iommu_table_group_link, next);
-
-        WARN_ON_ONCE(!tgl);
-        if (tgl) {
-                list_del_rcu(&tgl->next);
-                kfree(tgl);
-        }
         if (table_group->group) {
                 iommu_group_put(table_group->group);
                 BUG_ON(table_group->group);
@@ -645,7 +624,6 @@ static void pci_dma_bus_setup_pSeries(struct pci_bus *bus)
         iommu_table_setparms(pci->phb, dn, tbl);
         tbl->it_ops = &iommu_table_pseries_ops;
         iommu_init_table(tbl, pci->phb->node);
-        iommu_register_group(pci->table_group, pci_domain_nr(bus), 0);
 
         /* Divide the rest (1.75GB) among the children */
         pci->phb->dma_window_size = 0x80000000ul;
@@ -756,10 +734,7 @@ static void pci_dma_dev_setup_pSeries(struct pci_dev *dev)
                 iommu_table_setparms(phb, dn, tbl);
                 tbl->it_ops = &iommu_table_pseries_ops;
                 iommu_init_table(tbl, phb->node);
-                iommu_register_group(PCI_DN(dn)->table_group,
-                                pci_domain_nr(phb->bus), 0);
                 set_iommu_table_base(&dev->dev, tbl);
-                iommu_add_device(&dev->dev);
                 return;
         }
 
@@ -770,11 +745,10 @@ static void pci_dma_dev_setup_pSeries(struct pci_dev *dev)
         while (dn && PCI_DN(dn) && PCI_DN(dn)->table_group == NULL)
                 dn = dn->parent;
 
-        if (dn && PCI_DN(dn)) {
+        if (dn && PCI_DN(dn))
                 set_iommu_table_base(&dev->dev,
                                 PCI_DN(dn)->table_group->tables[0]);
-                iommu_add_device(&dev->dev);
-        } else
+        else
                 printk(KERN_WARNING "iommu: Device %s has no iommu table\n",
                        pci_name(dev));
 }
@@ -964,6 +938,37 @@ struct failed_ddw_pdn {
 
 static LIST_HEAD(failed_ddw_pdn_list);
 
+static phys_addr_t ddw_memory_hotplug_max(void)
+{
+        phys_addr_t max_addr = memory_hotplug_max();
+        struct device_node *memory;
+
+        for_each_node_by_type(memory, "memory") {
+                unsigned long start, size;
+                int ranges, n_mem_addr_cells, n_mem_size_cells, len;
+                const __be32 *memcell_buf;
+
+                memcell_buf = of_get_property(memory, "reg", &len);
+                if (!memcell_buf || len <= 0)
+                        continue;
+
+                n_mem_addr_cells = of_n_addr_cells(memory);
+                n_mem_size_cells = of_n_size_cells(memory);
+
+                /* ranges in cell */
+                ranges = (len >> 2) / (n_mem_addr_cells + n_mem_size_cells);
+
+                start = of_read_number(memcell_buf, n_mem_addr_cells);
+                memcell_buf += n_mem_addr_cells;
+                size = of_read_number(memcell_buf, n_mem_size_cells);
+                memcell_buf += n_mem_size_cells;
+
+                max_addr = max_t(phys_addr_t, max_addr, start + size);
+        }
+
+        return max_addr;
+}
+
 /*
  * If the PE supports dynamic dma windows, and there is space for a table
  * that can map all pages in a linear offset, then setup such a table,
@@ -1053,7 +1058,7 @@ static u64 enable_ddw(struct pci_dev *dev, struct device_node *pdn)
         }
         /* verify the window * number of ptes will map the partition */
         /* check largest block * page size > max memory hotplug addr */
-        max_addr = memory_hotplug_max();
+        max_addr = ddw_memory_hotplug_max();
         if (query.largest_available_block < (max_addr >> page_shift)) {
                 dev_dbg(&dev->dev, "can't map partition max 0x%llx with %u "
                           "%llu-sized pages\n", max_addr,  query.largest_available_block,
@@ -1190,7 +1195,7 @@ static void pci_dma_dev_setup_pSeriesLP(struct pci_dev *dev)
         }
 
         set_iommu_table_base(&dev->dev, pci->table_group->tables[0]);
-        iommu_add_device(&dev->dev);
+        iommu_add_device(pci->table_group, &dev->dev);
 }
 
 static int dma_set_mask_pSeriesLP(struct device *dev, u64 dma_mask)
@@ -1395,4 +1400,27 @@ static int __init disable_multitce(char *str)
 
 __setup("multitce=", disable_multitce);
 
+static int tce_iommu_bus_notifier(struct notifier_block *nb,
+                unsigned long action, void *data)
+{
+        struct device *dev = data;
+
+        switch (action) {
+        case BUS_NOTIFY_DEL_DEVICE:
+                iommu_del_device(dev);
+                return 0;
+        default:
+                return 0;
+        }
+}
+
+static struct notifier_block tce_iommu_bus_nb = {
+        .notifier_call = tce_iommu_bus_notifier,
+};
+
+static int __init tce_iommu_bus_notifier_init(void)
+{
+        bus_register_notifier(&pci_bus_type, &tce_iommu_bus_nb);
+        return 0;
+}
 machine_subsys_initcall_sync(pseries, tce_iommu_bus_notifier_init);
diff --git a/arch/powerpc/platforms/pseries/pci.c b/arch/powerpc/platforms/pseries/pci.c
index 41d8a4d1d02e..7725825d887d 100644
--- a/arch/powerpc/platforms/pseries/pci.c
+++ b/arch/powerpc/platforms/pseries/pci.c
@@ -29,6 +29,7 @@
 #include <asm/pci-bridge.h>
 #include <asm/prom.h>
 #include <asm/ppc-pci.h>
+#include <asm/pci.h>
 #include "pseries.h"
 
 #if 0
@@ -237,6 +238,8 @@ static void __init pSeries_request_regions(void)
 
 void __init pSeries_final_fixup(void)
 {
+        struct pci_controller *hose;
+
         pSeries_request_regions();
 
         eeh_probe_devices();
@@ -246,6 +249,25 @@ void __init pSeries_final_fixup(void)
         ppc_md.pcibios_sriov_enable = pseries_pcibios_sriov_enable;
         ppc_md.pcibios_sriov_disable = pseries_pcibios_sriov_disable;
 #endif
+        list_for_each_entry(hose, &hose_list, list_node) {
+                struct device_node *dn = hose->dn, *nvdn;
+
+                while (1) {
+                        dn = of_find_all_nodes(dn);
+                        if (!dn)
+                                break;
+                        nvdn = of_parse_phandle(dn, "ibm,nvlink", 0);
+                        if (!nvdn)
+                                continue;
+                        if (!of_device_is_compatible(nvdn, "ibm,npu-link"))
+                                continue;
+                        if (!of_device_is_compatible(nvdn->parent,
+                                                "ibm,power9-npu"))
+                                continue;
+                        WARN_ON_ONCE(pnv_npu2_init(hose));
+                        break;
+                }
+        }
 }
 
 /*
diff --git a/arch/powerpc/platforms/pseries/pmem.c b/arch/powerpc/platforms/pseries/pmem.c
index a27f40eb57b1..27f0a915c8a9 100644
--- a/arch/powerpc/platforms/pseries/pmem.c
+++ b/arch/powerpc/platforms/pseries/pmem.c
@@ -52,8 +52,8 @@ static ssize_t pmem_drc_add_node(u32 drc_index)
         /* NB: The of reconfig notifier creates platform device from the node */
         rc = dlpar_attach_node(dn, pmem_node);
         if (rc) {
-                pr_err("Failed to attach node %s, rc: %d, drc index: %x\n",
-                        dn->name, rc, drc_index);
+                pr_err("Failed to attach node %pOF, rc: %d, drc index: %x\n",
+                        dn, rc, drc_index);
 
                 if (dlpar_release_drc(drc_index))
                         dlpar_free_cc_nodes(dn);
@@ -93,8 +93,8 @@ static ssize_t pmem_drc_remove_node(u32 drc_index)
 
         rc = dlpar_release_drc(drc_index);
         if (rc) {
-                pr_err("Failed to release drc (%x) for CPU %s, rc: %d\n",
-                        drc_index, dn->name, rc);
+                pr_err("Failed to release drc (%x) for CPU %pOFn, rc: %d\n",
+                        drc_index, dn, rc);
                 dlpar_attach_node(dn, pmem_node);
                 return rc;
         }
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c
index 0f553dcfa548..41f62ca27c63 100644
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -190,7 +190,7 @@ static void __init pseries_setup_i8259_cascade(void)
                 of_node_put(old);
                 if (np == NULL)
                         break;
-                if (strcmp(np->name, "pci") != 0)
+                if (!of_node_name_eq(np, "pci"))
                         continue;
                 addrp = of_get_property(np, "8259-interrupt-acknowledge", NULL);
                 if (addrp == NULL)
@@ -469,8 +469,8 @@ static void __init find_and_init_phbs(void)
         struct device_node *root = of_find_node_by_path("/");
 
         for_each_child_of_node(root, node) {
-                if (node->type == NULL || (strcmp(node->type, "pci") != 0 &&
-                                           strcmp(node->type, "pciex") != 0))
+                if (!of_node_is_type(node, "pci") &&
+                    !of_node_is_type(node, "pciex"))
                         continue;
 
                 phb = pcibios_alloc_controller(node);
@@ -978,11 +978,7 @@ static void pseries_power_off(void)
 
 static int __init pSeries_probe(void)
 {
-        const char *dtype = of_get_property(of_root, "device_type", NULL);
-
-        if (dtype == NULL)
-                return 0;
-        if (strcmp(dtype, "chrp"))
+        if (!of_node_is_type(of_root, "chrp"))
                 return 0;
 
         /* Cell blades firmware claims to be chrp while it's not. Until this
diff --git a/arch/powerpc/platforms/pseries/vio.c b/arch/powerpc/platforms/pseries/vio.c
index 88f1ad1d6309..93cc9eec6601 100644
--- a/arch/powerpc/platforms/pseries/vio.c
+++ b/arch/powerpc/platforms/pseries/vio.c
@@ -1356,9 +1356,9 @@ struct vio_dev *vio_register_device_node(struct device_node *of_node)
          */
         parent_node = of_get_parent(of_node);
         if (parent_node) {
-                if (!strcmp(parent_node->type, "ibm,platform-facilities"))
+                if (of_node_is_type(parent_node, "ibm,platform-facilities"))
                         family = PFO;
-                else if (!strcmp(parent_node->type, "vdevice"))
+                else if (of_node_is_type(parent_node, "vdevice"))
                         family = VDEVICE;
                 else {
                         pr_warn("%s: parent(%pOF) of %pOFn not recognized.\n",
@@ -1395,9 +1395,8 @@ struct vio_dev *vio_register_device_node(struct device_node *of_node)
         if (viodev->family == VDEVICE) {
                 unsigned int unit_address;
 
-                if (of_node->type != NULL)
-                        viodev->type = of_node->type;
-                else {
+                viodev->type = of_node_get_device_type(of_node);
+                if (!viodev->type) {
                         pr_warn("%s: node %pOFn is missing the 'device_type' "
                                         "property.\n", __func__, of_node);
                         goto out;
@@ -1672,32 +1671,30 @@ struct vio_dev *vio_find_node(struct device_node *vnode)
 {
         char kobj_name[20];
         struct device_node *vnode_parent;
-        const char *dev_type;
 
         vnode_parent = of_get_parent(vnode);
         if (!vnode_parent)
                 return NULL;
 
-        dev_type = of_get_property(vnode_parent, "device_type", NULL);
-        of_node_put(vnode_parent);
-        if (!dev_type)
-                return NULL;
-
         /* construct the kobject name from the device node */
-        if (!strcmp(dev_type, "vdevice")) {
+        if (of_node_is_type(vnode_parent, "vdevice")) {
                 const __be32 *prop;
                 
                 prop = of_get_property(vnode, "reg", NULL);
                 if (!prop)
-                        return NULL;
+                        goto out;
                 snprintf(kobj_name, sizeof(kobj_name), "%x",
                          (uint32_t)of_read_number(prop, 1));
-        } else if (!strcmp(dev_type, "ibm,platform-facilities"))
+        } else if (of_node_is_type(vnode_parent, "ibm,platform-facilities"))
                 snprintf(kobj_name, sizeof(kobj_name), "%pOFn", vnode);
         else
-                return NULL;
+                goto out;
 
+        of_node_put(vnode_parent);
         return vio_find_name(kobj_name);
+out:
+        of_node_put(vnode_parent);
+        return NULL;
 }
 EXPORT_SYMBOL(vio_find_node);
 
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 2caa4defdfb6..aaf23283ba0c 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -48,7 +48,7 @@ obj-$(CONFIG_PPC_MPC512x)	+= mpc5xxx_clocks.o
 obj-$(CONFIG_PPC_MPC52xx)       += mpc5xxx_clocks.o
 
 ifdef CONFIG_SUSPEND
-obj-$(CONFIG_6xx)               += 6xx-suspend.o
+obj-$(CONFIG_PPC_BOOK3S_32)     += 6xx-suspend.o
 endif
 
 obj-$(CONFIG_PPC_SCOM)          += scom.o
diff --git a/arch/powerpc/sysdev/fsl_rio.h b/arch/powerpc/sysdev/fsl_rio.h
index 12dd18fd4795..6c13d9a7b7b2 100644
--- a/arch/powerpc/sysdev/fsl_rio.h
+++ b/arch/powerpc/sysdev/fsl_rio.h
@@ -41,7 +41,7 @@
 #define DOORBELL_ROWAR_PCI      0x02000000 /* PCI window */
 #define DOORBELL_ROWAR_NREAD    0x00040000 /* NREAD */
 #define DOORBELL_ROWAR_MAINTRD  0x00070000  /* maintenance read */
-#define DOORBELL_ROWAR_RES      0x00002000 /* wrtpy: reserverd */
+#define DOORBELL_ROWAR_RES      0x00002000 /* wrtpy: reserved */
 #define DOORBELL_ROWAR_MAINTWD  0x00007000
 #define DOORBELL_ROWAR_SIZE     0x0000000b /* window size is 4k */
 
diff --git a/arch/powerpc/sysdev/fsl_rmu.c b/arch/powerpc/sysdev/fsl_rmu.c
index 88b35a3dcdc5..8b0ebf3940d2 100644
--- a/arch/powerpc/sysdev/fsl_rmu.c
+++ b/arch/powerpc/sysdev/fsl_rmu.c
@@ -756,15 +756,13 @@ fsl_open_outb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries)
         }
 
         /* Initialize outbound message descriptor ring */
-        rmu->msg_tx_ring.virt = dma_alloc_coherent(priv->dev,
+        rmu->msg_tx_ring.virt = dma_zalloc_coherent(priv->dev,
                                 rmu->msg_tx_ring.size * RIO_MSG_DESC_SIZE,
                                 &rmu->msg_tx_ring.phys, GFP_KERNEL);
         if (!rmu->msg_tx_ring.virt) {
                 rc = -ENOMEM;
                 goto out_dma;
         }
-        memset(rmu->msg_tx_ring.virt, 0,
-                        rmu->msg_tx_ring.size * RIO_MSG_DESC_SIZE);
         rmu->msg_tx_ring.tx_slot = 0;
 
         /* Point dequeue/enqueue pointers at first entry in ring */
diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c
index 6300123ce965..8030a0f55e96 100644
--- a/arch/powerpc/sysdev/ipic.c
+++ b/arch/powerpc/sysdev/ipic.c
@@ -771,34 +771,6 @@ struct ipic * __init ipic_init(struct device_node *node, unsigned int flags)
         return ipic;
 }
 
-int ipic_set_priority(unsigned int virq, unsigned int priority)
-{
-        struct ipic *ipic = ipic_from_irq(virq);
-        unsigned int src = virq_to_hw(virq);
-        u32 temp;
-
-        if (priority > 7)
-                return -EINVAL;
-        if (src > 127)
-                return -EINVAL;
-        if (ipic_info[src].prio == 0)
-                return -EINVAL;
-
-        temp = ipic_read(ipic->regs, ipic_info[src].prio);
-
-        if (priority < 4) {
-                temp &= ~(0x7 << (20 + (3 - priority) * 3));
-                temp |= ipic_info[src].prio_mask << (20 + (3 - priority) * 3);
-        } else {
-                temp &= ~(0x7 << (4 + (7 - priority) * 3));
-                temp |= ipic_info[src].prio_mask << (4 + (7 - priority) * 3);
-        }
-
-        ipic_write(ipic->regs, ipic_info[src].prio, temp);
-
-        return 0;
-}
-
 void ipic_set_highest_priority(unsigned int virq)
 {
         struct ipic *ipic = ipic_from_irq(virq);
diff --git a/arch/powerpc/sysdev/scom.c b/arch/powerpc/sysdev/scom.c
index 0f6fd5d04d33..a707b24a7ddb 100644
--- a/arch/powerpc/sysdev/scom.c
+++ b/arch/powerpc/sysdev/scom.c
@@ -60,7 +60,7 @@ scom_map_t scom_map_device(struct device_node *dev, int index)
         parent = scom_find_parent(dev);
 
         if (parent == NULL)
-                return 0;
+                return NULL;
 
         /*
          * We support "scom-reg" properties for adding scom registers
@@ -83,7 +83,7 @@ scom_map_t scom_map_device(struct device_node *dev, int index)
         size >>= 2;
 
         if (index >= (size / (2*cells)))
-                return 0;
+                return NULL;
 
         reg = of_read_number(&prop[index * cells * 2], cells);
         cnt = of_read_number(&prop[index * cells * 2 + cells], cells);
diff --git a/arch/powerpc/sysdev/xive/common.c b/arch/powerpc/sysdev/xive/common.c
index 9824074ec1b5..94a69a62f5db 100644
--- a/arch/powerpc/sysdev/xive/common.c
+++ b/arch/powerpc/sysdev/xive/common.c
@@ -309,7 +309,7 @@ static void xive_do_queue_eoi(struct xive_cpu *xc)
  * EOI an interrupt at the source. There are several methods
  * to do this depending on the HW version and source type
  */
-void xive_do_source_eoi(u32 hw_irq, struct xive_irq_data *xd)
+static void xive_do_source_eoi(u32 hw_irq, struct xive_irq_data *xd)
 {
         /* If the XIVE supports the new "store EOI facility, use it */
         if (xd->flags & XIVE_IRQ_FLAG_STORE_EOI)
diff --git a/arch/powerpc/tools/checkpatch.sh b/arch/powerpc/tools/checkpatch.sh
index 1fad3fb90e7c..3ce5c093b19d 100755
--- a/arch/powerpc/tools/checkpatch.sh
+++ b/arch/powerpc/tools/checkpatch.sh
@@ -19,4 +19,5 @@ exec $script_base/../../../scripts/checkpatch.pl \
         --ignore GLOBAL_INITIALISERS \
         --ignore LINE_SPACING \
         --ignore MULTIPLE_ASSIGNMENTS \
+        --ignore DT_SPLIT_BINDING_PATCH \
         $@
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 36b8dc47a3c3..757b8499aba2 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -75,6 +75,9 @@ static int xmon_gate;
 #define xmon_owner 0
 #endif /* CONFIG_SMP */
 
+#ifdef CONFIG_PPC_PSERIES
+static int set_indicator_token = RTAS_UNKNOWN_SERVICE;
+#endif
 static unsigned long in_xmon __read_mostly = 0;
 static int xmon_on = IS_ENABLED(CONFIG_XMON_DEFAULT);
 
@@ -273,7 +276,7 @@ Commands:\n\
   X     exit monitor and don't recover\n"
 #if defined(CONFIG_PPC64) && !defined(CONFIG_PPC_BOOK3E)
 "  u    dump segment table or SLB\n"
-#elif defined(CONFIG_PPC_STD_MMU_32)
+#elif defined(CONFIG_PPC_BOOK3S_32)
 "  u    dump segment registers\n"
 #elif defined(CONFIG_44x) || defined(CONFIG_PPC_BOOK3E)
 "  u    dump TLB\n"
@@ -358,7 +361,6 @@ static inline void disable_surveillance(void)
 #ifdef CONFIG_PPC_PSERIES
         /* Since this can't be a module, args should end up below 4GB. */
         static struct rtas_args args;
-        int token;
 
         /*
          * At this point we have got all the cpus we can into
@@ -367,11 +369,11 @@ static inline void disable_surveillance(void)
          * If we did try to take rtas.lock there would be a
          * real possibility of deadlock.
          */
-        token = rtas_token("set-indicator");
-        if (token == RTAS_UNKNOWN_SERVICE)
+        if (set_indicator_token == RTAS_UNKNOWN_SERVICE)
                 return;
 
-        rtas_call_unlocked(&args, token, 3, 1, NULL, SURVEILLANCE_TOKEN, 0, 0);
+        rtas_call_unlocked(&args, set_indicator_token, 3, 1, NULL,
+                           SURVEILLANCE_TOKEN, 0, 0);
 
 #endif /* CONFIG_PPC_PSERIES */
 }
@@ -1058,7 +1060,7 @@ cmds(struct pt_regs *excp)
                 case 'P':
                         show_tasks();
                         break;
-#ifdef CONFIG_PPC_STD_MMU
+#ifdef CONFIG_PPC_BOOK3S
                 case 'u':
                         dump_segments();
                         break;
@@ -2793,7 +2795,7 @@ print_address(unsigned long addr)
         xmon_print_symbol(addr, "\t# ", "");
 }
 
-void
+static void
 dump_log_buf(void)
 {
         struct kmsg_dumper dumper = { .active = 1 };
@@ -2994,13 +2996,13 @@ static void show_task(struct task_struct *tsk)
 
         printf("%px %016lx %6d %6d %c %2d %s\n", tsk,
                 tsk->thread.ksp,
-                tsk->pid, tsk->parent->pid,
+                tsk->pid, rcu_dereference(tsk->parent)->pid,
                 state, task_thread_info(tsk)->cpu,
                 tsk->comm);
 }
 
 #ifdef CONFIG_PPC_BOOK3S_64
-void format_pte(void *ptep, unsigned long pte)
+static void format_pte(void *ptep, unsigned long pte)
 {
         pte_t entry = __pte(pte);
 
@@ -3495,14 +3497,14 @@ void dump_segments(void)
 }
 #endif
 
-#ifdef CONFIG_PPC_STD_MMU_32
+#ifdef CONFIG_PPC_BOOK3S_32
 void dump_segments(void)
 {
         int i;
 
         printf("sr0-15 =");
         for (i = 0; i < 16; ++i)
-                printf(" %x", mfsrin(i));
+                printf(" %x", mfsrin(i << 28));
         printf("\n");
 }
 #endif
@@ -3688,6 +3690,14 @@ static void xmon_init(int enable)
                 __debugger_iabr_match = xmon_iabr_match;
                 __debugger_break_match = xmon_break_match;
                 __debugger_fault_handler = xmon_fault_handler;
+
+#ifdef CONFIG_PPC_PSERIES
+                /*
+                 * Get the token here to avoid trying to get a lock
+                 * during the crash, causing a deadlock.
+                 */
+                set_indicator_token = rtas_token("set-indicator");
+#endif
         } else {
                 __debugger = NULL;
                 __debugger_ipi = NULL;
@@ -4033,6 +4043,7 @@ static int do_spu_cmd(void)
                 subcmd = inchar();
                 if (isxdigit(subcmd) || subcmd == '\n')
                         termch = subcmd;
+                /* fall through */
         case 'f':
                 scanhex(&num);
                 if (num >= XMON_NUM_SPUS || !spu_info[num].spu) {
diff --git a/drivers/cpufreq/pmac32-cpufreq.c b/drivers/cpufreq/pmac32-cpufreq.c
index 61ae06ca008e..52f0d91d30c1 100644
--- a/drivers/cpufreq/pmac32-cpufreq.c
+++ b/drivers/cpufreq/pmac32-cpufreq.c
@@ -128,7 +128,7 @@ static int cpu_750fx_cpu_speed(int low_speed)
                         mtspr(SPRN_HID2, hid2);
                 }
         }
-#ifdef CONFIG_6xx
+#ifdef CONFIG_PPC_BOOK3S_32
         low_choose_750fx_pll(low_speed);
 #endif
         if (low_speed == 1) {
@@ -166,7 +166,7 @@ static int dfs_set_cpu_speed(int low_speed)
         }
 
         /* set frequency */
-#ifdef CONFIG_6xx
+#ifdef CONFIG_PPC_BOOK3S_32
         low_choose_7447a_dfs(low_speed);
 #endif
         udelay(100);
diff --git a/drivers/cpuidle/cpuidle-pseries.c b/drivers/cpuidle/cpuidle-pseries.c
index 9e56bc411061..74c247972bb3 100644
--- a/drivers/cpuidle/cpuidle-pseries.c
+++ b/drivers/cpuidle/cpuidle-pseries.c
@@ -247,7 +247,13 @@ static int pseries_idle_probe(void)
                 return -ENODEV;
 
         if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
-                if (lppaca_shared_proc(get_lppaca())) {
+                /*
+                 * Use local_paca instead of get_lppaca() since
+                 * preemption is not disabled, and it is not required in
+                 * fact, since lppaca_ptr does not need to be the value
+                 * associated to the current CPU, it can be from any CPU.
+                 */
+                if (lppaca_shared_proc(local_paca->lppaca_ptr)) {
                         cpuidle_state_table = shared_states;
                         max_idle_state = ARRAY_SIZE(shared_states);
                 } else {
diff --git a/drivers/crypto/amcc/crypto4xx_core.c b/drivers/crypto/amcc/crypto4xx_core.c
index 6eaec9ba0f68..63cb6956c948 100644
--- a/drivers/crypto/amcc/crypto4xx_core.c
+++ b/drivers/crypto/amcc/crypto4xx_core.c
@@ -596,7 +596,7 @@ static void crypto4xx_aead_done(struct crypto4xx_device *dev,
                                           pd->pd_ctl_len.bf.pkt_len,
                                           dst);
         } else {
-                __dma_sync_page(sg_page(dst), dst->offset, dst->length,
+                dma_unmap_page(dev->core_dev->device, pd->dest, dst->length,
                                 DMA_FROM_DEVICE);
         }
 
diff --git a/drivers/ide/pmac.c b/drivers/ide/pmac.c
index 203ed4adc04a..92f840365718 100644
--- a/drivers/ide/pmac.c
+++ b/drivers/ide/pmac.c
@@ -1046,7 +1046,7 @@ static int pmac_ide_setup_device(pmac_ide_hwif_t *pmif, struct ide_hw *hw)
                 d.port_ops = &pmac_ide_ata4_port_ops;
                 d.udma_mask = ATA_UDMA5;
         } else if (of_device_is_compatible(np, "keylargo-ata")) {
-                if (strcmp(np->name, "ata-4") == 0) {
+                if (of_node_name_eq(np, "ata-4")) {
                         pmif->kind = controller_kl_ata4;
                         d.port_ops = &pmac_ide_ata4_port_ops;
                         d.udma_mask = ATA_UDMA4;
diff --git a/drivers/macintosh/ans-lcd.c b/drivers/macintosh/ans-lcd.c
index c8e078b911c7..ef0c2366cf59 100644
--- a/drivers/macintosh/ans-lcd.c
+++ b/drivers/macintosh/ans-lcd.c
@@ -160,7 +160,7 @@ anslcd_init(void)
         struct device_node* node;
 
         node = of_find_node_by_name(NULL, "lcd");
-        if (!node || !node->parent || strcmp(node->parent->name, "gc")) {
+        if (!node || !of_node_name_eq(node->parent, "gc")) {
                 of_node_put(node);
                 return -ENODEV;
         }
diff --git a/drivers/macintosh/macio_asic.c b/drivers/macintosh/macio_asic.c
index 17d3bc917562..3543a82081de 100644
--- a/drivers/macintosh/macio_asic.c
+++ b/drivers/macintosh/macio_asic.c
@@ -190,11 +190,11 @@ static int macio_resource_quirks(struct device_node *np, struct resource *res,
                 return 0;
 
         /* Grand Central has too large resource 0 on some machines */
-        if (index == 0 && !strcmp(np->name, "gc"))
+        if (index == 0 && of_node_name_eq(np, "gc"))
                 res->end = res->start + 0x1ffff;
 
         /* Airport has bogus resource 2 */
-        if (index >= 2 && !strcmp(np->name, "radio"))
+        if (index >= 2 && of_node_name_eq(np, "radio"))
                 return 1;
 
 #ifndef CONFIG_PPC64
@@ -207,21 +207,21 @@ static int macio_resource_quirks(struct device_node *np, struct resource *res,
          * level of hierarchy, but I don't really feel the need
          * for it
          */
-        if (!strcmp(np->name, "escc"))
+        if (of_node_name_eq(np, "escc"))
                 return 1;
 
         /* ESCC has bogus resources >= 3 */
-        if (index >= 3 && !(strcmp(np->name, "ch-a") &&
-                            strcmp(np->name, "ch-b")))
+        if (index >= 3 && (of_node_name_eq(np, "ch-a") ||
+                           of_node_name_eq(np, "ch-b")))
                 return 1;
 
         /* Media bay has too many resources, keep only first one */
-        if (index > 0 && !strcmp(np->name, "media-bay"))
+        if (index > 0 && of_node_name_eq(np, "media-bay"))
                 return 1;
 
         /* Some older IDE resources have bogus sizes */
-        if (!(strcmp(np->name, "IDE") && strcmp(np->name, "ATA") &&
-              strcmp(np->type, "ide") && strcmp(np->type, "ata"))) {
+        if (of_node_name_eq(np, "IDE") || of_node_name_eq(np, "ATA") ||
+            of_node_is_type(np, "ide") || of_node_is_type(np, "ata")) {
                 if (index == 0 && (res->end - res->start) > 0xfff)
                         res->end = res->start + 0xfff;
                 if (index == 1 && (res->end - res->start) > 0xff)
@@ -260,7 +260,7 @@ static void macio_add_missing_resources(struct macio_dev *dev)
         irq_base = 64;
 
         /* Fix SCC */
-        if (strcmp(np->name, "ch-a") == 0) {
+        if (of_node_name_eq(np, "ch-a")) {
                 macio_create_fixup_irq(dev, 0, 15 + irq_base);
                 macio_create_fixup_irq(dev, 1,  4 + irq_base);
                 macio_create_fixup_irq(dev, 2,  5 + irq_base);
@@ -268,18 +268,18 @@ static void macio_add_missing_resources(struct macio_dev *dev)
         }
 
         /* Fix media-bay */
-        if (strcmp(np->name, "media-bay") == 0) {
+        if (of_node_name_eq(np, "media-bay")) {
                 macio_create_fixup_irq(dev, 0, 29 + irq_base);
                 printk(KERN_INFO "macio: fixed media-bay irq on gatwick\n");
         }
 
         /* Fix left media bay childs */
-        if (dev->media_bay != NULL && strcmp(np->name, "floppy") == 0) {
+        if (dev->media_bay != NULL && of_node_name_eq(np, "floppy")) {
                 macio_create_fixup_irq(dev, 0, 19 + irq_base);
                 macio_create_fixup_irq(dev, 1,  1 + irq_base);
                 printk(KERN_INFO "macio: fixed left floppy irqs\n");
         }
-        if (dev->media_bay != NULL && strcasecmp(np->name, "ata4") == 0) {
+        if (dev->media_bay != NULL && of_node_name_eq(np, "ata4")) {
                 macio_create_fixup_irq(dev, 0, 14 + irq_base);
                 macio_create_fixup_irq(dev, 0,  3 + irq_base);
                 printk(KERN_INFO "macio: fixed left ide irqs\n");
@@ -438,11 +438,8 @@ static struct macio_dev * macio_add_one_device(struct macio_chip *chip,
 
 static int macio_skip_device(struct device_node *np)
 {
-        if (strncmp(np->name, "battery", 7) == 0)
-                return 1;
-        if (strncmp(np->name, "escc-legacy", 11) == 0)
-                return 1;
-        return 0;
+        return of_node_name_prefix(np, "battery") ||
+               of_node_name_prefix(np, "escc-legacy");
 }
 
 /**
@@ -489,9 +486,9 @@ static void macio_pci_add_devices(struct macio_chip *chip)
                                             root_res);
                 if (mdev == NULL)
                         of_node_put(np);
-                else if (strncmp(np->name, "media-bay", 9) == 0)
+                else if (of_node_name_prefix(np, "media-bay"))
                         mbdev = mdev;
-                else if (strncmp(np->name, "escc", 4) == 0)
+                else if (of_node_name_prefix(np, "escc"))
                         sdev = mdev;
         }
 
diff --git a/drivers/macintosh/macio_sysfs.c b/drivers/macintosh/macio_sysfs.c
index d2451e58acb9..27f5eefc508f 100644
--- a/drivers/macintosh/macio_sysfs.c
+++ b/drivers/macintosh/macio_sysfs.c
@@ -3,17 +3,6 @@
 #include <linux/stat.h>
 #include <asm/macio.h>
 
-
-#define macio_config_of_attr(field, format_string)                      \
-static ssize_t                                                          \
-field##_show (struct device *dev, struct device_attribute *attr,        \
-              char *buf)                                                \
-{                                                                       \
-        struct macio_dev *mdev = to_macio_device (dev);                 \
-        return sprintf (buf, format_string, mdev->ofdev.dev.of_node->field); \
-}                                                                       \
-static DEVICE_ATTR_RO(field);
-
 static ssize_t
 compatible_show (struct device *dev, struct device_attribute *attr, char *buf)
 {
@@ -65,7 +54,12 @@ static ssize_t name_show(struct device *dev,
 }
 static DEVICE_ATTR_RO(name);
 
-macio_config_of_attr (type, "%s\n");
+static ssize_t type_show(struct device *dev,
+                         struct device_attribute *attr, char *buf)
+{
+        return sprintf(buf, "%s\n", of_node_get_device_type(dev->of_node));
+}
+static DEVICE_ATTR_RO(type);
 
 static struct attribute *macio_dev_attrs[] = {
         &dev_attr_name.attr,
diff --git a/drivers/macintosh/rack-meter.c b/drivers/macintosh/rack-meter.c
index 1f29d2413c74..3940e2a032f7 100644
--- a/drivers/macintosh/rack-meter.c
+++ b/drivers/macintosh/rack-meter.c
@@ -376,18 +376,19 @@ static int rackmeter_probe(struct macio_dev* mdev,
         pr_debug("rackmeter_probe()\n");
 
         /* Get i2s-a node */
-        while ((i2s = of_get_next_child(mdev->ofdev.dev.of_node, i2s)) != NULL)
-               if (strcmp(i2s->name, "i2s-a") == 0)
-                       break;
+        for_each_child_of_node(mdev->ofdev.dev.of_node, i2s)
+                if (of_node_name_eq(i2s, "i2s-a"))
+                        break;
+
         if (i2s == NULL) {
                 pr_debug("  i2s-a child not found\n");
                 goto bail;
         }
         /* Get lightshow or virtual sound */
-        while ((np = of_get_next_child(i2s, np)) != NULL) {
-               if (strcmp(np->name, "lightshow") == 0)
+        for_each_child_of_node(i2s, np) {
+               if (of_node_name_eq(np, "lightshow"))
                        break;
-               if ((strcmp(np->name, "sound") == 0) &&
+               if (of_node_name_eq(np, "sound") &&
                    of_get_property(np, "virtual", NULL) != NULL)
                        break;
         }
diff --git a/drivers/macintosh/via-pmu.c b/drivers/macintosh/via-pmu.c
index 60f57e2abf21..ac0cf37d6239 100644
--- a/drivers/macintosh/via-pmu.c
+++ b/drivers/macintosh/via-pmu.c
@@ -318,8 +318,8 @@ int __init find_via_pmu(void)
                         PMU_INT_ADB |
                         PMU_INT_TICK;
         
-        if (vias->parent->name && ((strcmp(vias->parent->name, "ohare") == 0)
-            || of_device_is_compatible(vias->parent, "ohare")))
+        if (of_node_name_eq(vias->parent, "ohare") ||
+            of_device_is_compatible(vias->parent, "ohare"))
                 pmu_kind = PMU_OHARE_BASED;
         else if (of_device_is_compatible(vias->parent, "paddington"))
                 pmu_kind = PMU_PADDINGTON_BASED;
diff --git a/drivers/macintosh/windfarm_fcu_controls.c b/drivers/macintosh/windfarm_fcu_controls.c
index fab7a21e9577..629f19875d7f 100644
--- a/drivers/macintosh/windfarm_fcu_controls.c
+++ b/drivers/macintosh/windfarm_fcu_controls.c
@@ -425,25 +425,25 @@ static void wf_fcu_lookup_fans(struct wf_fcu_priv *pv)
                 { "CPU B 2",            "cpu-fan-b-1",          },
                 { "CPU B 3",            "cpu-fan-c-1",          },
         };
-        struct device_node *np = NULL, *fcu = pv->i2c->dev.of_node;
+        struct device_node *np, *fcu = pv->i2c->dev.of_node;
         int i;
 
         DBG("Looking up FCU controls in device-tree...\n");
 
-        while ((np = of_get_next_child(fcu, np)) != NULL) {
+        for_each_child_of_node(fcu, np) {
                 int id, type = -1;
                 const char *loc;
                 const char *name;
                 const u32 *reg;
 
-                DBG(" control: %s, type: %s\n", np->name, np->type);
+                DBG(" control: %pOFn, type: %s\n", np, of_node_get_device_type(np));
 
                 /* Detect control type */
-                if (!strcmp(np->type, "fan-rpm-control") ||
-                    !strcmp(np->type, "fan-rpm"))
+                if (of_node_is_type(np, "fan-rpm-control") ||
+                    of_node_is_type(np, "fan-rpm"))
                         type = FCU_FAN_RPM;
-                if (!strcmp(np->type, "fan-pwm-control") ||
-                    !strcmp(np->type, "fan-pwm"))
+                if (of_node_is_type(np, "fan-pwm-control") ||
+                    of_node_is_type(np, "fan-pwm"))
                         type = FCU_FAN_PWM;
                 /* Only care about fans for now */
                 if (type == -1)
diff --git a/drivers/macintosh/windfarm_lm87_sensor.c b/drivers/macintosh/windfarm_lm87_sensor.c
index 35aa571d498a..09724acd70b6 100644
--- a/drivers/macintosh/windfarm_lm87_sensor.c
+++ b/drivers/macintosh/windfarm_lm87_sensor.c
@@ -110,8 +110,8 @@ static int wf_lm87_probe(struct i2c_client *client,
          * the Xserve G5 has several lm87's. However, for now we only
          * care about the internal temperature sensor
          */
-        while ((np = of_get_next_child(client->dev.of_node, np)) != NULL) {
-                if (strcmp(np->name, "int-temp"))
+        for_each_child_of_node(client->dev.of_node, np) {
+                if (!of_node_name_eq(np, "int-temp"))
                         continue;
                 loc = of_get_property(np, "location", NULL);
                 if (!loc)
diff --git a/drivers/macintosh/windfarm_smu_controls.c b/drivers/macintosh/windfarm_smu_controls.c
index 86d65462a61c..2cb9652a9998 100644
--- a/drivers/macintosh/windfarm_smu_controls.c
+++ b/drivers/macintosh/windfarm_smu_controls.c
@@ -267,7 +267,7 @@ static int __init smu_controls_init(void)
 
         /* Look for RPM fans */
         for (fans = NULL; (fans = of_get_next_child(smu, fans)) != NULL;)
-                if (!strcmp(fans->name, "rpm-fans") ||
+                if (of_node_name_eq(fans, "rpm-fans") ||
                     of_device_is_compatible(fans, "smu-rpm-fans"))
                         break;
         for (fan = NULL;
@@ -287,7 +287,7 @@ static int __init smu_controls_init(void)
 
         /* Look for PWM fans */
         for (fans = NULL; (fans = of_get_next_child(smu, fans)) != NULL;)
-                if (!strcmp(fans->name, "pwm-fans"))
+                if (of_node_name_eq(fans, "pwm-fans"))
                         break;
         for (fan = NULL;
              fans && (fan = of_get_next_child(fans, fan)) != NULL;) {
diff --git a/drivers/macintosh/windfarm_smu_sat.c b/drivers/macintosh/windfarm_smu_sat.c
index a0f61eb853c5..b4be718beba8 100644
--- a/drivers/macintosh/windfarm_smu_sat.c
+++ b/drivers/macintosh/windfarm_smu_sat.c
@@ -197,7 +197,7 @@ static int wf_sat_probe(struct i2c_client *client,
         struct wf_sat *sat;
         struct wf_sat_sensor *sens;
         const u32 *reg;
-        const char *loc, *type;
+        const char *loc;
         u8 chip, core;
         struct device_node *child;
         int shift, cpu, index;
@@ -220,7 +220,6 @@ static int wf_sat_probe(struct i2c_client *client,
         child = NULL;
         while ((child = of_get_next_child(dev, child)) != NULL) {
                 reg = of_get_property(child, "reg", NULL);
-                type = of_get_property(child, "device_type", NULL);
                 loc = of_get_property(child, "location", NULL);
                 if (reg == NULL || loc == NULL)
                         continue;
@@ -249,15 +248,15 @@ static int wf_sat_probe(struct i2c_client *client,
                         continue;
                 }
 
-                if (strcmp(type, "voltage-sensor") == 0) {
+                if (of_node_is_type(child, "voltage-sensor")) {
                         name = "cpu-voltage";
                         shift = 4;
                         vsens[core] = index;
-                } else if (strcmp(type, "current-sensor") == 0) {
+                } else if (of_node_is_type(child, "current-sensor")) {
                         name = "cpu-current";
                         shift = 8;
                         isens[core] = index;
-                } else if (strcmp(type, "temp-sensor") == 0) {
+                } else if (of_node_is_type(child, "temp-sensor")) {
                         name = "cpu-temp";
                         shift = 10;
                 } else
diff --git a/drivers/macintosh/windfarm_smu_sensors.c b/drivers/macintosh/windfarm_smu_sensors.c
index 172fd267dcf6..a58f6733381a 100644
--- a/drivers/macintosh/windfarm_smu_sensors.c
+++ b/drivers/macintosh/windfarm_smu_sensors.c
@@ -197,15 +197,14 @@ static const struct wf_sensor_ops smu_slotspow_ops = {
 static struct smu_ad_sensor *smu_ads_create(struct device_node *node)
 {
         struct smu_ad_sensor *ads;
-        const char *c, *l;
+        const char *l;
         const u32 *v;
 
         ads = kmalloc(sizeof(struct smu_ad_sensor), GFP_KERNEL);
         if (ads == NULL)
                 return NULL;
-        c = of_get_property(node, "device_type", NULL);
         l = of_get_property(node, "location", NULL);
-        if (c == NULL || l == NULL)
+        if (l == NULL)
                 goto fail;
 
         /* We currently pick the sensors based on the OF name and location
@@ -215,7 +214,7 @@ static struct smu_ad_sensor *smu_ads_create(struct device_node *node)
          * the names and locations consistents so I'll stick with the names
          * and locations for now.
          */
-        if (!strcmp(c, "temp-sensor") &&
+        if (of_node_is_type(node, "temp-sensor") &&
             !strcmp(l, "CPU T-Diode")) {
                 ads->sens.ops = &smu_cputemp_ops;
                 ads->sens.name = "cpu-temp";
@@ -224,7 +223,7 @@ static struct smu_ad_sensor *smu_ads_create(struct device_node *node)
                             SMU_SDB_CPUDIODE_ID);
                         goto fail;
                 }
-        } else if (!strcmp(c, "current-sensor") &&
+        } else if (of_node_is_type(node, "current-sensor") &&
                    !strcmp(l, "CPU Current")) {
                 ads->sens.ops = &smu_cpuamp_ops;
                 ads->sens.name = "cpu-current";
@@ -233,7 +232,7 @@ static struct smu_ad_sensor *smu_ads_create(struct device_node *node)
                             SMU_SDB_CPUVCP_ID);
                         goto fail;
                 }
-        } else if (!strcmp(c, "voltage-sensor") &&
+        } else if (of_node_is_type(node, "voltage-sensor") &&
                    !strcmp(l, "CPU Voltage")) {
                 ads->sens.ops = &smu_cpuvolt_ops;
                 ads->sens.name = "cpu-voltage";
@@ -242,7 +241,7 @@ static struct smu_ad_sensor *smu_ads_create(struct device_node *node)
                             SMU_SDB_CPUVCP_ID);
                         goto fail;
                 }
-        } else if (!strcmp(c, "power-sensor") &&
+        } else if (of_node_is_type(node, "power-sensor") &&
                    !strcmp(l, "Slots Power")) {
                 ads->sens.ops = &smu_slotspow_ops;
                 ads->sens.name = "slots-power";
@@ -425,7 +424,7 @@ static int __init smu_sensors_init(void)
         /* Look for sensors subdir */
         for (sensors = NULL;
              (sensors = of_get_next_child(smu, sensors)) != NULL;)
-                if (!strcmp(sensors->name, "sensors"))
+                if (of_node_name_eq(sensors, "sensors"))
                         break;
 
         of_node_put(smu);
diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index b66d832d3233..c79ba1c699ad 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c
@@ -1718,7 +1718,6 @@ int cxl_slot_is_switched(struct pci_dev *dev)
 {
         struct device_node *np;
         int depth = 0;
-        const __be32 *prop;
 
         if (!(np = pci_device_to_OF_node(dev))) {
                 pr_err("cxl: np = NULL\n");
@@ -1727,8 +1726,7 @@ int cxl_slot_is_switched(struct pci_dev *dev)
         of_node_get(np);
         while (np) {
                 np = of_get_next_parent(np);
-                prop = of_get_property(np, "device_type", NULL);
-                if (!prop || strcmp((char *)prop, "pciex"))
+                if (!of_node_is_type(np, "pciex"))
                         break;
                 depth++;
         }
diff --git a/drivers/misc/cxl/vphb.c b/drivers/misc/cxl/vphb.c
index 7908633d9204..49da2f744bbf 100644
--- a/drivers/misc/cxl/vphb.c
+++ b/drivers/misc/cxl/vphb.c
@@ -11,17 +11,6 @@
 #include <misc/cxl.h>
 #include "cxl.h"
 
-static int cxl_dma_set_mask(struct pci_dev *pdev, u64 dma_mask)
-{
-        if (dma_mask < DMA_BIT_MASK(64)) {
-                pr_info("%s only 64bit DMA supported on CXL", __func__);
-                return -EIO;
-        }
-
-        *(pdev->dev.dma_mask) = dma_mask;
-        return 0;
-}
-
 static int cxl_pci_probe_mode(struct pci_bus *bus)
 {
         return PCI_PROBE_NORMAL;
@@ -220,7 +209,6 @@ static struct pci_controller_ops cxl_pci_controller_ops =
         .reset_secondary_bus = cxl_pci_reset_secondary_bus,
         .setup_msi_irqs = cxl_setup_msi_irqs,
         .teardown_msi_irqs = cxl_teardown_msi_irqs,
-        .dma_set_mask = cxl_dma_set_mask,
 };
 
 int cxl_pci_vphb_add(struct cxl_afu *afu)
diff --git a/drivers/misc/ocxl/afu_irq.c b/drivers/misc/ocxl/afu_irq.c
index e70cfa24577f..11ab996657a2 100644
--- a/drivers/misc/ocxl/afu_irq.c
+++ b/drivers/misc/ocxl/afu_irq.c
@@ -2,7 +2,6 @@
 // Copyright 2017 IBM Corp.
 #include <linux/interrupt.h>
 #include <linux/eventfd.h>
-#include <asm/pnv-ocxl.h>
 #include "ocxl_internal.h"
 #include "trace.h"
 
diff --git a/drivers/misc/ocxl/config.c b/drivers/misc/ocxl/config.c
index 57a6bb1fd3c9..8f2c5d8bd2ee 100644
--- a/drivers/misc/ocxl/config.c
+++ b/drivers/misc/ocxl/config.c
@@ -318,7 +318,7 @@ static int read_afu_name(struct pci_dev *dev, struct ocxl_fn_config *fn,
                 if (rc)
                         return rc;
                 ptr = (u32 *) &afu->name[i];
-                *ptr = val;
+                *ptr = le32_to_cpu((__force __le32) val);
         }
         afu->name[OCXL_AFU_NAME_SZ - 1] = '\0'; /* play safe */
         return 0;
diff --git a/drivers/misc/ocxl/link.c b/drivers/misc/ocxl/link.c
index 31695a078485..d50b861d7e57 100644
--- a/drivers/misc/ocxl/link.c
+++ b/drivers/misc/ocxl/link.c
@@ -273,9 +273,9 @@ static int setup_xsl_irq(struct pci_dev *dev, struct link *link)
         spa->irq_name = kasprintf(GFP_KERNEL, "ocxl-xsl-%x-%x-%x",
                                 link->domain, link->bus, link->dev);
         if (!spa->irq_name) {
-                unmap_irq_registers(spa);
                 dev_err(&dev->dev, "Can't allocate name for xsl interrupt\n");
-                return -ENOMEM;
+                rc = -ENOMEM;
+                goto err_xsl;
         }
         /*
          * At some point, we'll need to look into allowing a higher
@@ -283,11 +283,10 @@ static int setup_xsl_irq(struct pci_dev *dev, struct link *link)
          */
         spa->virq = irq_create_mapping(NULL, hwirq);
         if (!spa->virq) {
-                kfree(spa->irq_name);
-                unmap_irq_registers(spa);
                 dev_err(&dev->dev,
                         "irq_create_mapping failed for translation interrupt\n");
-                return -EINVAL;
+                rc = -EINVAL;
+                goto err_name;
         }
 
         dev_dbg(&dev->dev, "hwirq %d mapped to virq %d\n", hwirq, spa->virq);
@@ -295,15 +294,21 @@ static int setup_xsl_irq(struct pci_dev *dev, struct link *link)
         rc = request_irq(spa->virq, xsl_fault_handler, 0, spa->irq_name,
                         link);
         if (rc) {
-                irq_dispose_mapping(spa->virq);
-                kfree(spa->irq_name);
-                unmap_irq_registers(spa);
                 dev_err(&dev->dev,
                         "request_irq failed for translation interrupt: %d\n",
                         rc);
-                return -EINVAL;
+                rc = -EINVAL;
+                goto err_mapping;
         }
         return 0;
+
+err_mapping:
+        irq_dispose_mapping(spa->virq);
+err_name:
+        kfree(spa->irq_name);
+err_xsl:
+        unmap_irq_registers(spa);
+        return rc;
 }
 
 static void release_xsl_irq(struct link *link)
@@ -566,7 +571,7 @@ int ocxl_link_update_pe(void *link_handle, int pasid, __u16 tid)
 
         mutex_lock(&spa->spa_lock);
 
-        pe->tid = tid;
+        pe->tid = cpu_to_be32(tid);
 
         /*
          * The barrier makes sure the PE is updated
diff --git a/drivers/vfio/pci/Kconfig b/drivers/vfio/pci/Kconfig
index 42dc1d3d71cf..d0f8e4f5a039 100644
--- a/drivers/vfio/pci/Kconfig
+++ b/drivers/vfio/pci/Kconfig
@@ -38,3 +38,9 @@ config VFIO_PCI_IGD
           and LPC bridge config space.
 
           To enable Intel IGD assignment through vfio-pci, say Y.
+
+config VFIO_PCI_NVLINK2
+        def_bool y
+        depends on VFIO_PCI && PPC_POWERNV
+        help
+          VFIO PCI support for P9 Witherspoon machine with NVIDIA V100 GPUs
diff --git a/drivers/vfio/pci/Makefile b/drivers/vfio/pci/Makefile
index 76d8ec058edd..9662c063a6b1 100644
--- a/drivers/vfio/pci/Makefile
+++ b/drivers/vfio/pci/Makefile
@@ -1,5 +1,6 @@
 
 vfio-pci-y := vfio_pci.o vfio_pci_intrs.o vfio_pci_rdwr.o vfio_pci_config.o
 vfio-pci-$(CONFIG_VFIO_PCI_IGD) += vfio_pci_igd.o
+vfio-pci-$(CONFIG_VFIO_PCI_NVLINK2) += vfio_pci_nvlink2.o
 
 obj-$(CONFIG_VFIO_PCI) += vfio-pci.o
diff --git a/drivers/vfio/pci/trace.h b/drivers/vfio/pci/trace.h
new file mode 100644
index 000000000000..228ccdb8d1c8
--- /dev/null
+++ b/drivers/vfio/pci/trace.h
@@ -0,0 +1,102 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * VFIO PCI mmap/mmap_fault tracepoints
+ *
+ * Copyright (C) 2018 IBM Corp.  All rights reserved.
+ *     Author: Alexey Kardashevskiy <aik@ozlabs.ru>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM vfio_pci
+
+#if !defined(_TRACE_VFIO_PCI_H) || defined(TRACE_HEADER_MULTI_READ)
+#define _TRACE_VFIO_PCI_H
+
+#include <linux/tracepoint.h>
+
+TRACE_EVENT(vfio_pci_nvgpu_mmap_fault,
+        TP_PROTO(struct pci_dev *pdev, unsigned long hpa, unsigned long ua,
+                        vm_fault_t ret),
+        TP_ARGS(pdev, hpa, ua, ret),
+
+        TP_STRUCT__entry(
+                __field(const char *, name)
+                __field(unsigned long, hpa)
+                __field(unsigned long, ua)
+                __field(int, ret)
+        ),
+
+        TP_fast_assign(
+                __entry->name = dev_name(&pdev->dev),
+                __entry->hpa = hpa;
+                __entry->ua = ua;
+                __entry->ret = ret;
+        ),
+
+        TP_printk("%s: %lx -> %lx ret=%d", __entry->name, __entry->hpa,
+                        __entry->ua, __entry->ret)
+);
+
+TRACE_EVENT(vfio_pci_nvgpu_mmap,
+        TP_PROTO(struct pci_dev *pdev, unsigned long hpa, unsigned long ua,
+                        unsigned long size, int ret),
+        TP_ARGS(pdev, hpa, ua, size, ret),
+
+        TP_STRUCT__entry(
+                __field(const char *, name)
+                __field(unsigned long, hpa)
+                __field(unsigned long, ua)
+                __field(unsigned long, size)
+                __field(int, ret)
+        ),
+
+        TP_fast_assign(
+                __entry->name = dev_name(&pdev->dev),
+                __entry->hpa = hpa;
+                __entry->ua = ua;
+                __entry->size = size;
+                __entry->ret = ret;
+        ),
+
+        TP_printk("%s: %lx -> %lx size=%lx ret=%d", __entry->name, __entry->hpa,
+                        __entry->ua, __entry->size, __entry->ret)
+);
+
+TRACE_EVENT(vfio_pci_npu2_mmap,
+        TP_PROTO(struct pci_dev *pdev, unsigned long hpa, unsigned long ua,
+                        unsigned long size, int ret),
+        TP_ARGS(pdev, hpa, ua, size, ret),
+
+        TP_STRUCT__entry(
+                __field(const char *, name)
+                __field(unsigned long, hpa)
+                __field(unsigned long, ua)
+                __field(unsigned long, size)
+                __field(int, ret)
+        ),
+
+        TP_fast_assign(
+                __entry->name = dev_name(&pdev->dev),
+                __entry->hpa = hpa;
+                __entry->ua = ua;
+                __entry->size = size;
+                __entry->ret = ret;
+        ),
+
+        TP_printk("%s: %lx -> %lx size=%lx ret=%d", __entry->name, __entry->hpa,
+                        __entry->ua, __entry->size, __entry->ret)
+);
+
+#endif /* _TRACE_VFIO_PCI_H */
+
+#undef TRACE_INCLUDE_PATH
+#define TRACE_INCLUDE_PATH .
+#undef TRACE_INCLUDE_FILE
+#define TRACE_INCLUDE_FILE trace
+
+/* This part must be outside protection */
+#include <trace/define_trace.h>
diff --git a/drivers/vfio/pci/vfio_pci.c b/drivers/vfio/pci/vfio_pci.c
index 50cdedfca9fe..a89fa5d4e877 100644
--- a/drivers/vfio/pci/vfio_pci.c
+++ b/drivers/vfio/pci/vfio_pci.c
@@ -289,14 +289,37 @@ static int vfio_pci_enable(struct vfio_pci_device *vdev)
                 if (ret) {
                         dev_warn(&vdev->pdev->dev,
                                  "Failed to setup Intel IGD regions\n");
-                        vfio_pci_disable(vdev);
-                        return ret;
+                        goto disable_exit;
+                }
+        }
+
+        if (pdev->vendor == PCI_VENDOR_ID_NVIDIA &&
+            IS_ENABLED(CONFIG_VFIO_PCI_NVLINK2)) {
+                ret = vfio_pci_nvdia_v100_nvlink2_init(vdev);
+                if (ret && ret != -ENODEV) {
+                        dev_warn(&vdev->pdev->dev,
+                                 "Failed to setup NVIDIA NV2 RAM region\n");
+                        goto disable_exit;
+                }
+        }
+
+        if (pdev->vendor == PCI_VENDOR_ID_IBM &&
+            IS_ENABLED(CONFIG_VFIO_PCI_NVLINK2)) {
+                ret = vfio_pci_ibm_npu2_init(vdev);
+                if (ret && ret != -ENODEV) {
+                        dev_warn(&vdev->pdev->dev,
+                                        "Failed to setup NVIDIA NV2 ATSD region\n");
+                        goto disable_exit;
                 }
         }
 
         vfio_pci_probe_mmaps(vdev);
 
         return 0;
+
+disable_exit:
+        vfio_pci_disable(vdev);
+        return ret;
 }
 
 static void vfio_pci_disable(struct vfio_pci_device *vdev)
@@ -750,6 +773,12 @@ static long vfio_pci_ioctl(void *device_data,
                         if (ret)
                                 return ret;
 
+                        if (vdev->region[i].ops->add_capability) {
+                                ret = vdev->region[i].ops->add_capability(vdev,
+                                                &vdev->region[i], &caps);
+                                if (ret)
+                                        return ret;
+                        }
                 }
                 }
 
@@ -1117,6 +1146,15 @@ static int vfio_pci_mmap(void *device_data, struct vm_area_struct *vma)
                 return -EINVAL;
         if ((vma->vm_flags & VM_SHARED) == 0)
                 return -EINVAL;
+        if (index >= VFIO_PCI_NUM_REGIONS) {
+                int regnum = index - VFIO_PCI_NUM_REGIONS;
+                struct vfio_pci_region *region = vdev->region + regnum;
+
+                if (region && region->ops && region->ops->mmap &&
+                    (region->flags & VFIO_REGION_INFO_FLAG_MMAP))
+                        return region->ops->mmap(vdev, region, vma);
+                return -EINVAL;
+        }
         if (index >= VFIO_PCI_ROM_REGION_INDEX)
                 return -EINVAL;
         if (!vdev->bar_mmap_supported[index])
diff --git a/drivers/vfio/pci/vfio_pci_nvlink2.c b/drivers/vfio/pci/vfio_pci_nvlink2.c
new file mode 100644
index 000000000000..054a2cf9dd8e
--- /dev/null
+++ b/drivers/vfio/pci/vfio_pci_nvlink2.c
@@ -0,0 +1,482 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * VFIO PCI NVIDIA Whitherspoon GPU support a.k.a. NVLink2.
+ *
+ * Copyright (C) 2018 IBM Corp.  All rights reserved.
+ *     Author: Alexey Kardashevskiy <aik@ozlabs.ru>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Register an on-GPU RAM region for cacheable access.
+ *
+ * Derived from original vfio_pci_igd.c:
+ * Copyright (C) 2016 Red Hat, Inc.  All rights reserved.
+ *      Author: Alex Williamson <alex.williamson@redhat.com>
+ */
+
+#include <linux/io.h>
+#include <linux/pci.h>
+#include <linux/uaccess.h>
+#include <linux/vfio.h>
+#include <linux/sched/mm.h>
+#include <linux/mmu_context.h>
+#include <asm/kvm_ppc.h>
+#include "vfio_pci_private.h"
+
+#define CREATE_TRACE_POINTS
+#include "trace.h"
+
+EXPORT_TRACEPOINT_SYMBOL_GPL(vfio_pci_nvgpu_mmap_fault);
+EXPORT_TRACEPOINT_SYMBOL_GPL(vfio_pci_nvgpu_mmap);
+EXPORT_TRACEPOINT_SYMBOL_GPL(vfio_pci_npu2_mmap);
+
+struct vfio_pci_nvgpu_data {
+        unsigned long gpu_hpa; /* GPU RAM physical address */
+        unsigned long gpu_tgt; /* TGT address of corresponding GPU RAM */
+        unsigned long useraddr; /* GPU RAM userspace address */
+        unsigned long size; /* Size of the GPU RAM window (usually 128GB) */
+        struct mm_struct *mm;
+        struct mm_iommu_table_group_mem_t *mem; /* Pre-registered RAM descr. */
+        struct pci_dev *gpdev;
+        struct notifier_block group_notifier;
+};
+
+static size_t vfio_pci_nvgpu_rw(struct vfio_pci_device *vdev,
+                char __user *buf, size_t count, loff_t *ppos, bool iswrite)
+{
+        unsigned int i = VFIO_PCI_OFFSET_TO_INDEX(*ppos) - VFIO_PCI_NUM_REGIONS;
+        struct vfio_pci_nvgpu_data *data = vdev->region[i].data;
+        loff_t pos = *ppos & VFIO_PCI_OFFSET_MASK;
+        loff_t posaligned = pos & PAGE_MASK, posoff = pos & ~PAGE_MASK;
+        size_t sizealigned;
+        void __iomem *ptr;
+
+        if (pos >= vdev->region[i].size)
+                return -EINVAL;
+
+        count = min(count, (size_t)(vdev->region[i].size - pos));
+
+        /*
+         * We map only a bit of GPU RAM for a short time instead of mapping it
+         * for the guest lifetime as:
+         *
+         * 1) we do not know GPU RAM size, only aperture which is 4-8 times
+         *    bigger than actual RAM size (16/32GB RAM vs. 128GB aperture);
+         * 2) mapping GPU RAM allows CPU to prefetch and if this happens
+         *    before NVLink bridge is reset (which fences GPU RAM),
+         *    hardware management interrupts (HMI) might happen, this
+         *    will freeze NVLink bridge.
+         *
+         * This is not fast path anyway.
+         */
+        sizealigned = _ALIGN_UP(posoff + count, PAGE_SIZE);
+        ptr = ioremap_cache(data->gpu_hpa + posaligned, sizealigned);
+        if (!ptr)
+                return -EFAULT;
+
+        if (iswrite) {
+                if (copy_from_user(ptr + posoff, buf, count))
+                        count = -EFAULT;
+                else
+                        *ppos += count;
+        } else {
+                if (copy_to_user(buf, ptr + posoff, count))
+                        count = -EFAULT;
+                else
+                        *ppos += count;
+        }
+
+        iounmap(ptr);
+
+        return count;
+}
+
+static void vfio_pci_nvgpu_release(struct vfio_pci_device *vdev,
+                struct vfio_pci_region *region)
+{
+        struct vfio_pci_nvgpu_data *data = region->data;
+        long ret;
+
+        /* If there were any mappings at all... */
+        if (data->mm) {
+                ret = mm_iommu_put(data->mm, data->mem);
+                WARN_ON(ret);
+
+                mmdrop(data->mm);
+        }
+
+        vfio_unregister_notifier(&data->gpdev->dev, VFIO_GROUP_NOTIFY,
+                        &data->group_notifier);
+
+        pnv_npu2_unmap_lpar_dev(data->gpdev);
+
+        kfree(data);
+}
+
+static vm_fault_t vfio_pci_nvgpu_mmap_fault(struct vm_fault *vmf)
+{
+        vm_fault_t ret;
+        struct vm_area_struct *vma = vmf->vma;
+        struct vfio_pci_region *region = vma->vm_private_data;
+        struct vfio_pci_nvgpu_data *data = region->data;
+        unsigned long vmf_off = (vmf->address - vma->vm_start) >> PAGE_SHIFT;
+        unsigned long nv2pg = data->gpu_hpa >> PAGE_SHIFT;
+        unsigned long vm_pgoff = vma->vm_pgoff &
+                ((1U << (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT)) - 1);
+        unsigned long pfn = nv2pg + vm_pgoff + vmf_off;
+
+        ret = vmf_insert_pfn(vma, vmf->address, pfn);
+        trace_vfio_pci_nvgpu_mmap_fault(data->gpdev, pfn << PAGE_SHIFT,
+                        vmf->address, ret);
+
+        return ret;
+}
+
+static const struct vm_operations_struct vfio_pci_nvgpu_mmap_vmops = {
+        .fault = vfio_pci_nvgpu_mmap_fault,
+};
+
+static int vfio_pci_nvgpu_mmap(struct vfio_pci_device *vdev,
+                struct vfio_pci_region *region, struct vm_area_struct *vma)
+{
+        int ret;
+        struct vfio_pci_nvgpu_data *data = region->data;
+
+        if (data->useraddr)
+                return -EPERM;
+
+        if (vma->vm_end - vma->vm_start > data->size)
+                return -EINVAL;
+
+        vma->vm_private_data = region;
+        vma->vm_flags |= VM_PFNMAP;
+        vma->vm_ops = &vfio_pci_nvgpu_mmap_vmops;
+
+        /*
+         * Calling mm_iommu_newdev() here once as the region is not
+         * registered yet and therefore right initialization will happen now.
+         * Other places will use mm_iommu_find() which returns
+         * registered @mem and does not go gup().
+         */
+        data->useraddr = vma->vm_start;
+        data->mm = current->mm;
+
+        atomic_inc(&data->mm->mm_count);
+        ret = (int) mm_iommu_newdev(data->mm, data->useraddr,
+                        (vma->vm_end - vma->vm_start) >> PAGE_SHIFT,
+                        data->gpu_hpa, &data->mem);
+
+        trace_vfio_pci_nvgpu_mmap(vdev->pdev, data->gpu_hpa, data->useraddr,
+                        vma->vm_end - vma->vm_start, ret);
+
+        return ret;
+}
+
+static int vfio_pci_nvgpu_add_capability(struct vfio_pci_device *vdev,
+                struct vfio_pci_region *region, struct vfio_info_cap *caps)
+{
+        struct vfio_pci_nvgpu_data *data = region->data;
+        struct vfio_region_info_cap_nvlink2_ssatgt cap = { 0 };
+
+        cap.header.id = VFIO_REGION_INFO_CAP_NVLINK2_SSATGT;
+        cap.header.version = 1;
+        cap.tgt = data->gpu_tgt;
+
+        return vfio_info_add_capability(caps, &cap.header, sizeof(cap));
+}
+
+static const struct vfio_pci_regops vfio_pci_nvgpu_regops = {
+        .rw = vfio_pci_nvgpu_rw,
+        .release = vfio_pci_nvgpu_release,
+        .mmap = vfio_pci_nvgpu_mmap,
+        .add_capability = vfio_pci_nvgpu_add_capability,
+};
+
+static int vfio_pci_nvgpu_group_notifier(struct notifier_block *nb,
+                unsigned long action, void *opaque)
+{
+        struct kvm *kvm = opaque;
+        struct vfio_pci_nvgpu_data *data = container_of(nb,
+                        struct vfio_pci_nvgpu_data,
+                        group_notifier);
+
+        if (action == VFIO_GROUP_NOTIFY_SET_KVM && kvm &&
+                        pnv_npu2_map_lpar_dev(data->gpdev,
+                                kvm->arch.lpid, MSR_DR | MSR_PR))
+                return NOTIFY_BAD;
+
+        return NOTIFY_OK;
+}
+
+int vfio_pci_nvdia_v100_nvlink2_init(struct vfio_pci_device *vdev)
+{
+        int ret;
+        u64 reg[2];
+        u64 tgt = 0;
+        struct device_node *npu_node, *mem_node;
+        struct pci_dev *npu_dev;
+        struct vfio_pci_nvgpu_data *data;
+        uint32_t mem_phandle = 0;
+        unsigned long events = VFIO_GROUP_NOTIFY_SET_KVM;
+
+        /*
+         * PCI config space does not tell us about NVLink presense but
+         * platform does, use this.
+         */
+        npu_dev = pnv_pci_get_npu_dev(vdev->pdev, 0);
+        if (!npu_dev)
+                return -ENODEV;
+
+        npu_node = pci_device_to_OF_node(npu_dev);
+        if (!npu_node)
+                return -EINVAL;
+
+        if (of_property_read_u32(npu_node, "memory-region", &mem_phandle))
+                return -EINVAL;
+
+        mem_node = of_find_node_by_phandle(mem_phandle);
+        if (!mem_node)
+                return -EINVAL;
+
+        if (of_property_read_variable_u64_array(mem_node, "reg", reg,
+                                ARRAY_SIZE(reg), ARRAY_SIZE(reg)) !=
+                        ARRAY_SIZE(reg))
+                return -EINVAL;
+
+        if (of_property_read_u64(npu_node, "ibm,device-tgt-addr", &tgt)) {
+                dev_warn(&vdev->pdev->dev, "No ibm,device-tgt-addr found\n");
+                return -EFAULT;
+        }
+
+        data = kzalloc(sizeof(*data), GFP_KERNEL);
+        if (!data)
+                return -ENOMEM;
+
+        data->gpu_hpa = reg[0];
+        data->gpu_tgt = tgt;
+        data->size = reg[1];
+
+        dev_dbg(&vdev->pdev->dev, "%lx..%lx\n", data->gpu_hpa,
+                        data->gpu_hpa + data->size - 1);
+
+        data->gpdev = vdev->pdev;
+        data->group_notifier.notifier_call = vfio_pci_nvgpu_group_notifier;
+
+        ret = vfio_register_notifier(&data->gpdev->dev, VFIO_GROUP_NOTIFY,
+                        &events, &data->group_notifier);
+        if (ret)
+                goto free_exit;
+
+        /*
+         * We have just set KVM, we do not need the listener anymore.
+         * Also, keeping it registered means that if more than one GPU is
+         * assigned, we will get several similar notifiers notifying about
+         * the same device again which does not help with anything.
+         */
+        vfio_unregister_notifier(&data->gpdev->dev, VFIO_GROUP_NOTIFY,
+                        &data->group_notifier);
+
+        ret = vfio_pci_register_dev_region(vdev,
+                        PCI_VENDOR_ID_NVIDIA | VFIO_REGION_TYPE_PCI_VENDOR_TYPE,
+                        VFIO_REGION_SUBTYPE_NVIDIA_NVLINK2_RAM,
+                        &vfio_pci_nvgpu_regops,
+                        data->size,
+                        VFIO_REGION_INFO_FLAG_READ |
+                        VFIO_REGION_INFO_FLAG_WRITE |
+                        VFIO_REGION_INFO_FLAG_MMAP,
+                        data);
+        if (ret)
+                goto free_exit;
+
+        return 0;
+free_exit:
+        kfree(data);
+
+        return ret;
+}
+
+/*
+ * IBM NPU2 bridge
+ */
+struct vfio_pci_npu2_data {
+        void *base; /* ATSD register virtual address, for emulated access */
+        unsigned long mmio_atsd; /* ATSD physical address */
+        unsigned long gpu_tgt; /* TGT address of corresponding GPU RAM */
+        unsigned int link_speed; /* The link speed from DT's ibm,nvlink-speed */
+};
+
+static size_t vfio_pci_npu2_rw(struct vfio_pci_device *vdev,
+                char __user *buf, size_t count, loff_t *ppos, bool iswrite)
+{
+        unsigned int i = VFIO_PCI_OFFSET_TO_INDEX(*ppos) - VFIO_PCI_NUM_REGIONS;
+        struct vfio_pci_npu2_data *data = vdev->region[i].data;
+        loff_t pos = *ppos & VFIO_PCI_OFFSET_MASK;
+
+        if (pos >= vdev->region[i].size)
+                return -EINVAL;
+
+        count = min(count, (size_t)(vdev->region[i].size - pos));
+
+        if (iswrite) {
+                if (copy_from_user(data->base + pos, buf, count))
+                        return -EFAULT;
+        } else {
+                if (copy_to_user(buf, data->base + pos, count))
+                        return -EFAULT;
+        }
+        *ppos += count;
+
+        return count;
+}
+
+static int vfio_pci_npu2_mmap(struct vfio_pci_device *vdev,
+                struct vfio_pci_region *region, struct vm_area_struct *vma)
+{
+        int ret;
+        struct vfio_pci_npu2_data *data = region->data;
+        unsigned long req_len = vma->vm_end - vma->vm_start;
+
+        if (req_len != PAGE_SIZE)
+                return -EINVAL;
+
+        vma->vm_flags |= VM_PFNMAP;
+        vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+
+        ret = remap_pfn_range(vma, vma->vm_start, data->mmio_atsd >> PAGE_SHIFT,
+                        req_len, vma->vm_page_prot);
+        trace_vfio_pci_npu2_mmap(vdev->pdev, data->mmio_atsd, vma->vm_start,
+                        vma->vm_end - vma->vm_start, ret);
+
+        return ret;
+}
+
+static void vfio_pci_npu2_release(struct vfio_pci_device *vdev,
+                struct vfio_pci_region *region)
+{
+        struct vfio_pci_npu2_data *data = region->data;
+
+        memunmap(data->base);
+        kfree(data);
+}
+
+static int vfio_pci_npu2_add_capability(struct vfio_pci_device *vdev,
+                struct vfio_pci_region *region, struct vfio_info_cap *caps)
+{
+        struct vfio_pci_npu2_data *data = region->data;
+        struct vfio_region_info_cap_nvlink2_ssatgt captgt = { 0 };
+        struct vfio_region_info_cap_nvlink2_lnkspd capspd = { 0 };
+        int ret;
+
+        captgt.header.id = VFIO_REGION_INFO_CAP_NVLINK2_SSATGT;
+        captgt.header.version = 1;
+        captgt.tgt = data->gpu_tgt;
+
+        capspd.header.id = VFIO_REGION_INFO_CAP_NVLINK2_LNKSPD;
+        capspd.header.version = 1;
+        capspd.link_speed = data->link_speed;
+
+        ret = vfio_info_add_capability(caps, &captgt.header, sizeof(captgt));
+        if (ret)
+                return ret;
+
+        return vfio_info_add_capability(caps, &capspd.header, sizeof(capspd));
+}
+
+static const struct vfio_pci_regops vfio_pci_npu2_regops = {
+        .rw = vfio_pci_npu2_rw,
+        .mmap = vfio_pci_npu2_mmap,
+        .release = vfio_pci_npu2_release,
+        .add_capability = vfio_pci_npu2_add_capability,
+};
+
+int vfio_pci_ibm_npu2_init(struct vfio_pci_device *vdev)
+{
+        int ret;
+        struct vfio_pci_npu2_data *data;
+        struct device_node *nvlink_dn;
+        u32 nvlink_index = 0;
+        struct pci_dev *npdev = vdev->pdev;
+        struct device_node *npu_node = pci_device_to_OF_node(npdev);
+        struct pci_controller *hose = pci_bus_to_host(npdev->bus);
+        u64 mmio_atsd = 0;
+        u64 tgt = 0;
+        u32 link_speed = 0xff;
+
+        /*
+         * PCI config space does not tell us about NVLink presense but
+         * platform does, use this.
+         */
+        if (!pnv_pci_get_gpu_dev(vdev->pdev))
+                return -ENODEV;
+
+        /*
+         * NPU2 normally has 8 ATSD registers (for concurrency) and 6 links
+         * so we can allocate one register per link, using nvlink index as
+         * a key.
+         * There is always at least one ATSD register so as long as at least
+         * NVLink bridge #0 is passed to the guest, ATSD will be available.
+         */
+        nvlink_dn = of_parse_phandle(npdev->dev.of_node, "ibm,nvlink", 0);
+        if (WARN_ON(of_property_read_u32(nvlink_dn, "ibm,npu-link-index",
+                        &nvlink_index)))
+                return -ENODEV;
+
+        if (of_property_read_u64_index(hose->dn, "ibm,mmio-atsd", nvlink_index,
+                        &mmio_atsd)) {
+                dev_warn(&vdev->pdev->dev, "No available ATSD found\n");
+                mmio_atsd = 0;
+        }
+
+        if (of_property_read_u64(npu_node, "ibm,device-tgt-addr", &tgt)) {
+                dev_warn(&vdev->pdev->dev, "No ibm,device-tgt-addr found\n");
+                return -EFAULT;
+        }
+
+        if (of_property_read_u32(npu_node, "ibm,nvlink-speed", &link_speed)) {
+                dev_warn(&vdev->pdev->dev, "No ibm,nvlink-speed found\n");
+                return -EFAULT;
+        }
+
+        data = kzalloc(sizeof(*data), GFP_KERNEL);
+        if (!data)
+                return -ENOMEM;
+
+        data->mmio_atsd = mmio_atsd;
+        data->gpu_tgt = tgt;
+        data->link_speed = link_speed;
+        if (data->mmio_atsd) {
+                data->base = memremap(data->mmio_atsd, SZ_64K, MEMREMAP_WT);
+                if (!data->base) {
+                        ret = -ENOMEM;
+                        goto free_exit;
+                }
+        }
+
+        /*
+         * We want to expose the capability even if this specific NVLink
+         * did not get its own ATSD register because capabilities
+         * belong to VFIO regions and normally there will be ATSD register
+         * assigned to the NVLink bridge.
+         */
+        ret = vfio_pci_register_dev_region(vdev,
+                        PCI_VENDOR_ID_IBM |
+                        VFIO_REGION_TYPE_PCI_VENDOR_TYPE,
+                        VFIO_REGION_SUBTYPE_IBM_NVLINK2_ATSD,
+                        &vfio_pci_npu2_regops,
+                        data->mmio_atsd ? PAGE_SIZE : 0,
+                        VFIO_REGION_INFO_FLAG_READ |
+                        VFIO_REGION_INFO_FLAG_WRITE |
+                        VFIO_REGION_INFO_FLAG_MMAP,
+                        data);
+        if (ret)
+                goto free_exit;
+
+        return 0;
+
+free_exit:
+        kfree(data);
+
+        return ret;
+}
diff --git a/drivers/vfio/pci/vfio_pci_private.h b/drivers/vfio/pci/vfio_pci_private.h
index cde3b5d3441a..127071b84dd7 100644
--- a/drivers/vfio/pci/vfio_pci_private.h
+++ b/drivers/vfio/pci/vfio_pci_private.h
@@ -59,6 +59,12 @@ struct vfio_pci_regops {
                       size_t count, loff_t *ppos, bool iswrite);
         void    (*release)(struct vfio_pci_device *vdev,
                            struct vfio_pci_region *region);
+        int     (*mmap)(struct vfio_pci_device *vdev,
+                        struct vfio_pci_region *region,
+                        struct vm_area_struct *vma);
+        int     (*add_capability)(struct vfio_pci_device *vdev,
+                                  struct vfio_pci_region *region,
+                                  struct vfio_info_cap *caps);
 };
 
 struct vfio_pci_region {
@@ -157,4 +163,18 @@ static inline int vfio_pci_igd_init(struct vfio_pci_device *vdev)
         return -ENODEV;
 }
 #endif
+#ifdef CONFIG_VFIO_PCI_NVLINK2
+extern int vfio_pci_nvdia_v100_nvlink2_init(struct vfio_pci_device *vdev);
+extern int vfio_pci_ibm_npu2_init(struct vfio_pci_device *vdev);
+#else
+static inline int vfio_pci_nvdia_v100_nvlink2_init(struct vfio_pci_device *vdev)
+{
+        return -ENODEV;
+}
+
+static inline int vfio_pci_ibm_npu2_init(struct vfio_pci_device *vdev)
+{
+        return -ENODEV;
+}
+#endif
 #endif /* VFIO_PCI_PRIVATE_H */
diff --git a/drivers/vfio/vfio_iommu_spapr_tce.c b/drivers/vfio/vfio_iommu_spapr_tce.c
index b30926e11d87..c424913324e3 100644
--- a/drivers/vfio/vfio_iommu_spapr_tce.c
+++ b/drivers/vfio/vfio_iommu_spapr_tce.c
@@ -152,11 +152,12 @@ static long tce_iommu_unregister_pages(struct tce_container *container,
         struct mm_iommu_table_group_mem_t *mem;
         struct tce_iommu_prereg *tcemem;
         bool found = false;
+        long ret;
 
         if ((vaddr & ~PAGE_MASK) || (size & ~PAGE_MASK))
                 return -EINVAL;
 
-        mem = mm_iommu_find(container->mm, vaddr, size >> PAGE_SHIFT);
+        mem = mm_iommu_get(container->mm, vaddr, size >> PAGE_SHIFT);
         if (!mem)
                 return -ENOENT;
 
@@ -168,9 +169,13 @@ static long tce_iommu_unregister_pages(struct tce_container *container,
         }
 
         if (!found)
-                return -ENOENT;
+                ret = -ENOENT;
+        else
+                ret = tce_iommu_prereg_free(container, tcemem);
 
-        return tce_iommu_prereg_free(container, tcemem);
+        mm_iommu_put(container->mm, mem);
+
+        return ret;
 }
 
 static long tce_iommu_register_pages(struct tce_container *container,
@@ -185,22 +190,24 @@ static long tce_iommu_register_pages(struct tce_container *container,
                         ((vaddr + size) < vaddr))
                 return -EINVAL;
 
-        mem = mm_iommu_find(container->mm, vaddr, entries);
+        mem = mm_iommu_get(container->mm, vaddr, entries);
         if (mem) {
                 list_for_each_entry(tcemem, &container->prereg_list, next) {
-                        if (tcemem->mem == mem)
-                                return -EBUSY;
+                        if (tcemem->mem == mem) {
+                                ret = -EBUSY;
+                                goto put_exit;
+                        }
                 }
+        } else {
+                ret = mm_iommu_new(container->mm, vaddr, entries, &mem);
+                if (ret)
+                        return ret;
         }
 
-        ret = mm_iommu_get(container->mm, vaddr, entries, &mem);
-        if (ret)
-                return ret;
-
         tcemem = kzalloc(sizeof(*tcemem), GFP_KERNEL);
         if (!tcemem) {
-                mm_iommu_put(container->mm, mem);
-                return -ENOMEM;
+                ret = -ENOMEM;
+                goto put_exit;
         }
 
         tcemem->mem = mem;
@@ -209,10 +216,22 @@ static long tce_iommu_register_pages(struct tce_container *container,
         container->enabled = true;
 
         return 0;
+
+put_exit:
+        mm_iommu_put(container->mm, mem);
+        return ret;
 }
 
-static bool tce_page_is_contained(struct page *page, unsigned page_shift)
+static bool tce_page_is_contained(struct mm_struct *mm, unsigned long hpa,
+                unsigned int page_shift)
 {
+        struct page *page;
+        unsigned long size = 0;
+
+        if (mm_iommu_is_devmem(mm, hpa, page_shift, &size))
+                return size == (1UL << page_shift);
+
+        page = pfn_to_page(hpa >> PAGE_SHIFT);
         /*
          * Check that the TCE table granularity is not bigger than the size of
          * a page we just found. Otherwise the hardware can get access to
@@ -371,6 +390,7 @@ static void tce_iommu_release(void *iommu_data)
 {
         struct tce_container *container = iommu_data;
         struct tce_iommu_group *tcegrp;
+        struct tce_iommu_prereg *tcemem, *tmtmp;
         long i;
 
         while (tce_groups_attached(container)) {
@@ -393,13 +413,8 @@ static void tce_iommu_release(void *iommu_data)
                 tce_iommu_free_table(container, tbl);
         }
 
-        while (!list_empty(&container->prereg_list)) {
-                struct tce_iommu_prereg *tcemem;
-
-                tcemem = list_first_entry(&container->prereg_list,
-                                struct tce_iommu_prereg, next);
-                WARN_ON_ONCE(tce_iommu_prereg_free(container, tcemem));
-        }
+        list_for_each_entry_safe(tcemem, tmtmp, &container->prereg_list, next)
+                WARN_ON(tce_iommu_prereg_free(container, tcemem));
 
         tce_iommu_disable(container);
         if (container->mm)
@@ -492,7 +507,8 @@ static int tce_iommu_clear(struct tce_container *container,
 
                 direction = DMA_NONE;
                 oldhpa = 0;
-                ret = iommu_tce_xchg(tbl, entry, &oldhpa, &direction);
+                ret = iommu_tce_xchg(container->mm, tbl, entry, &oldhpa,
+                                &direction);
                 if (ret)
                         continue;
 
@@ -530,7 +546,6 @@ static long tce_iommu_build(struct tce_container *container,
                 enum dma_data_direction direction)
 {
         long i, ret = 0;
-        struct page *page;
         unsigned long hpa;
         enum dma_data_direction dirtmp;
 
@@ -541,15 +556,16 @@ static long tce_iommu_build(struct tce_container *container,
                 if (ret)
                         break;
 
-                page = pfn_to_page(hpa >> PAGE_SHIFT);
-                if (!tce_page_is_contained(page, tbl->it_page_shift)) {
+                if (!tce_page_is_contained(container->mm, hpa,
+                                tbl->it_page_shift)) {
                         ret = -EPERM;
                         break;
                 }
 
                 hpa |= offset;
                 dirtmp = direction;
-                ret = iommu_tce_xchg(tbl, entry + i, &hpa, &dirtmp);
+                ret = iommu_tce_xchg(container->mm, tbl, entry + i, &hpa,
+                                &dirtmp);
                 if (ret) {
                         tce_iommu_unuse_page(container, hpa);
                         pr_err("iommu_tce: %s failed ioba=%lx, tce=%lx, ret=%ld\n",
@@ -576,7 +592,6 @@ static long tce_iommu_build_v2(struct tce_container *container,
                 enum dma_data_direction direction)
 {
         long i, ret = 0;
-        struct page *page;
         unsigned long hpa;
         enum dma_data_direction dirtmp;
 
@@ -589,8 +604,8 @@ static long tce_iommu_build_v2(struct tce_container *container,
                 if (ret)
                         break;
 
-                page = pfn_to_page(hpa >> PAGE_SHIFT);
-                if (!tce_page_is_contained(page, tbl->it_page_shift)) {
+                if (!tce_page_is_contained(container->mm, hpa,
+                                tbl->it_page_shift)) {
                         ret = -EPERM;
                         break;
                 }
@@ -603,7 +618,8 @@ static long tce_iommu_build_v2(struct tce_container *container,
                 if (mm_iommu_mapped_inc(mem))
                         break;
 
-                ret = iommu_tce_xchg(tbl, entry + i, &hpa, &dirtmp);
+                ret = iommu_tce_xchg(container->mm, tbl, entry + i, &hpa,
+                                &dirtmp);
                 if (ret) {
                         /* dirtmp cannot be DMA_NONE here */
                         tce_iommu_unuse_page_v2(container, tbl, entry + i);
diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h
index db023a92f3a4..077d797d1f60 100644
--- a/include/linux/mmzone.h
+++ b/include/linux/mmzone.h
@@ -314,7 +314,7 @@ enum zone_type {
          * Architecture         Limit
          * ---------------------------
          * parisc, ia64, sparc  <4G
-         * s390                 <2G
+         * s390, powerpc        <2G
          * arm                  Various
          * alpha                Unlimited or 0-16MB.
          *
diff --git a/include/uapi/linux/vfio.h b/include/uapi/linux/vfio.h
index 813102810f53..02bb7ad6e986 100644
--- a/include/uapi/linux/vfio.h
+++ b/include/uapi/linux/vfio.h
@@ -354,6 +354,21 @@ struct vfio_region_gfx_edid {
 };
 
 /*
+ * 10de vendor sub-type
+ *
+ * NVIDIA GPU NVlink2 RAM is coherent RAM mapped onto the host address space.
+ */
+#define VFIO_REGION_SUBTYPE_NVIDIA_NVLINK2_RAM  (1)
+
+/*
+ * 1014 vendor sub-type
+ *
+ * IBM NPU NVlink2 ATSD (Address Translation Shootdown) register of NPU
+ * to do TLB invalidation on a GPU.
+ */
+#define VFIO_REGION_SUBTYPE_IBM_NVLINK2_ATSD    (1)
+
+/*
  * The MSIX mappable capability informs that MSIX data of a BAR can be mmapped
  * which allows direct access to non-MSIX registers which happened to be within
  * the same system page.
@@ -363,6 +378,33 @@ struct vfio_region_gfx_edid {
  */
 #define VFIO_REGION_INFO_CAP_MSIX_MAPPABLE      3
 
+/*
+ * Capability with compressed real address (aka SSA - small system address)
+ * where GPU RAM is mapped on a system bus. Used by a GPU for DMA routing
+ * and by the userspace to associate a NVLink bridge with a GPU.
+ */
+#define VFIO_REGION_INFO_CAP_NVLINK2_SSATGT     4
+
+struct vfio_region_info_cap_nvlink2_ssatgt {
+        struct vfio_info_cap_header header;
+        __u64 tgt;
+};
+
+/*
+ * Capability with an NVLink link speed. The value is read by
+ * the NVlink2 bridge driver from the bridge's "ibm,nvlink-speed"
+ * property in the device tree. The value is fixed in the hardware
+ * and failing to provide the correct value results in the link
+ * not working with no indication from the driver why.
+ */
+#define VFIO_REGION_INFO_CAP_NVLINK2_LNKSPD     5
+
+struct vfio_region_info_cap_nvlink2_lnkspd {
+        struct vfio_info_cap_header header;
+        __u32 link_speed;
+        __u32 __pad;
+};
+
 /**
  * VFIO_DEVICE_GET_IRQ_INFO - _IOWR(VFIO_TYPE, VFIO_BASE + 9,
  *                                  struct vfio_irq_info)
diff --git a/lib/raid6/Makefile b/lib/raid6/Makefile
index 2f8b61dfd9b0..7ed43eaa02ef 100644
--- a/lib/raid6/Makefile
+++ b/lib/raid6/Makefile
@@ -18,6 +18,21 @@ quiet_cmd_unroll = UNROLL  $@
 
 ifeq ($(CONFIG_ALTIVEC),y)
 altivec_flags := -maltivec $(call cc-option,-mabi=altivec)
+
+ifdef CONFIG_CC_IS_CLANG
+# clang ppc port does not yet support -maltivec when -msoft-float is
+# enabled. A future release of clang will resolve this
+# https://bugs.llvm.org/show_bug.cgi?id=31177
+CFLAGS_REMOVE_altivec1.o  += -msoft-float
+CFLAGS_REMOVE_altivec2.o  += -msoft-float
+CFLAGS_REMOVE_altivec4.o  += -msoft-float
+CFLAGS_REMOVE_altivec8.o  += -msoft-float
+CFLAGS_REMOVE_altivec8.o  += -msoft-float
+CFLAGS_REMOVE_vpermxor1.o += -msoft-float
+CFLAGS_REMOVE_vpermxor2.o += -msoft-float
+CFLAGS_REMOVE_vpermxor4.o += -msoft-float
+CFLAGS_REMOVE_vpermxor8.o += -msoft-float
+endif
 endif
 
 # The GCC option -ffreestanding is required in order to compile code containing
diff --git a/lib/test_debug_virtual.c b/lib/test_debug_virtual.c
index d5a06addeb27..bf864c73e462 100644
--- a/lib/test_debug_virtual.c
+++ b/lib/test_debug_virtual.c
@@ -5,6 +5,7 @@
 #include <linux/vmalloc.h>
 #include <linux/slab.h>
 #include <linux/sizes.h>
+#include <linux/io.h>
 
 #include <asm/page.h>
 #ifdef CONFIG_MIPS
diff --git a/tools/arch/powerpc/include/uapi/asm/perf_regs.h b/tools/arch/powerpc/include/uapi/asm/perf_regs.h
index 9e52c86ccbd3..ff91192407d1 100644
--- a/tools/arch/powerpc/include/uapi/asm/perf_regs.h
+++ b/tools/arch/powerpc/include/uapi/asm/perf_regs.h
@@ -46,6 +46,7 @@ enum perf_event_powerpc_regs {
         PERF_REG_POWERPC_TRAP,
         PERF_REG_POWERPC_DAR,
         PERF_REG_POWERPC_DSISR,
+        PERF_REG_POWERPC_SIER,
         PERF_REG_POWERPC_MAX,
 };
 #endif /* _UAPI_ASM_POWERPC_PERF_REGS_H */
diff --git a/tools/perf/arch/powerpc/include/perf_regs.h b/tools/perf/arch/powerpc/include/perf_regs.h
index 00e37b106913..1076393e6f43 100644
--- a/tools/perf/arch/powerpc/include/perf_regs.h
+++ b/tools/perf/arch/powerpc/include/perf_regs.h
@@ -62,7 +62,8 @@ static const char *reg_names[] = {
         [PERF_REG_POWERPC_SOFTE] = "softe",
         [PERF_REG_POWERPC_TRAP] = "trap",
         [PERF_REG_POWERPC_DAR] = "dar",
-        [PERF_REG_POWERPC_DSISR] = "dsisr"
+        [PERF_REG_POWERPC_DSISR] = "dsisr",
+        [PERF_REG_POWERPC_SIER] = "sier"
 };
 
 static inline const char *perf_reg_name(int id)
diff --git a/tools/perf/arch/powerpc/util/perf_regs.c b/tools/perf/arch/powerpc/util/perf_regs.c
index ec50939b0418..07fcd977d93e 100644
--- a/tools/perf/arch/powerpc/util/perf_regs.c
+++ b/tools/perf/arch/powerpc/util/perf_regs.c
@@ -52,6 +52,7 @@ const struct sample_reg sample_reg_masks[] = {
         SMPL_REG(trap, PERF_REG_POWERPC_TRAP),
         SMPL_REG(dar, PERF_REG_POWERPC_DAR),
         SMPL_REG(dsisr, PERF_REG_POWERPC_DSISR),
+        SMPL_REG(sier, PERF_REG_POWERPC_SIER),
         SMPL_REG_END
 };
 
diff --git a/tools/testing/selftests/powerpc/include/utils.h b/tools/testing/selftests/powerpc/include/utils.h
index 49621822d7c3..ae43a614835d 100644
--- a/tools/testing/selftests/powerpc/include/utils.h
+++ b/tools/testing/selftests/powerpc/include/utils.h
@@ -82,6 +82,16 @@ do {								\
         }                                                       \
 } while (0)
 
+#define SKIP_IF_MSG(x, msg)                                     \
+do {                                                            \
+        if ((x)) {                                              \
+                fprintf(stderr,                                 \
+                "[SKIP] Test skipped on line %d: %s\n",         \
+                 __LINE__, msg);                                \
+                return MAGIC_SKIP_RETURN_VALUE;                 \
+        }                                                       \
+} while (0)
+
 #define _str(s) #s
 #define str(s) _str(s)
 
diff --git a/tools/testing/selftests/powerpc/ptrace/core-pkey.c b/tools/testing/selftests/powerpc/ptrace/core-pkey.c
index e23e2e199eb4..d5c64fee032d 100644
--- a/tools/testing/selftests/powerpc/ptrace/core-pkey.c
+++ b/tools/testing/selftests/powerpc/ptrace/core-pkey.c
@@ -352,10 +352,7 @@ static int write_core_pattern(const char *core_pattern)
         FILE *f;
 
         f = fopen(core_pattern_file, "w");
-        if (!f) {
-                perror("Error writing to core_pattern file");
-                return TEST_FAIL;
-        }
+        SKIP_IF_MSG(!f, "Try with root privileges");
 
         ret = fwrite(core_pattern, 1, len, f);
         fclose(f);
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c b/tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c
index 0b4ebcc2f485..ca29fafeed5d 100644
--- a/tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c
@@ -31,7 +31,7 @@ void gpr(void)
                 ASM_LOAD_GPR_IMMED(gpr_1)
                 ASM_LOAD_FPR_SINGLE_PRECISION(flt_1)
                 :
-                : [gpr_1]"i"(GPR_1), [flt_1] "r" (&a)
+                : [gpr_1]"i"(GPR_1), [flt_1] "b" (&a)
                 : "memory", "r6", "r7", "r8", "r9", "r10",
                 "r11", "r12", "r13", "r14", "r15", "r16", "r17",
                 "r18", "r19", "r20", "r21", "r22", "r23", "r24",
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c
index 59206b96e98a..a08a91594dbe 100644
--- a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c
@@ -59,8 +59,8 @@ trans:
                 "3: ;"
                 : [res] "=r" (result), [texasr] "=r" (texasr)
                 : [gpr_1]"i"(GPR_1), [gpr_2]"i"(GPR_2),
-                [sprn_texasr] "i" (SPRN_TEXASR), [flt_1] "r" (&a),
-                [flt_2] "r" (&b), [cptr1] "r" (&cptr[1])
+                [sprn_texasr] "i" (SPRN_TEXASR), [flt_1] "b" (&a),
+                [flt_2] "b" (&b), [cptr1] "b" (&cptr[1])
                 : "memory", "r7", "r8", "r9", "r10",
                 "r11", "r12", "r13", "r14", "r15", "r16",
                 "r17", "r18", "r19", "r20", "r21", "r22",
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c
index b3c061dc9512..f47174746231 100644
--- a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c
@@ -72,7 +72,7 @@ trans:
                 "3: ;"
 
                 : [res] "=r" (result), [texasr] "=r" (texasr)
-                : [val] "r" (cptr[1]), [sprn_dscr]"i"(SPRN_DSCR),
+                : [sprn_dscr]"i"(SPRN_DSCR),
                 [sprn_tar]"i"(SPRN_TAR), [sprn_ppr]"i"(SPRN_PPR),
                 [sprn_texasr]"i"(SPRN_TEXASR), [tar_1]"i"(TAR_1),
                 [dscr_1]"i"(DSCR_1), [tar_2]"i"(TAR_2), [dscr_2]"i"(DSCR_2),
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c
index 277dade1b382..18a685bf6a09 100644
--- a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c
@@ -77,8 +77,7 @@ trans:
 
                 "3: ;"
                 : [res] "=r" (result), [texasr] "=r" (texasr)
-                : [fp_load] "r" (fp_load), [fp_load_ckpt] "r" (fp_load_ckpt),
-                [sprn_texasr] "i"  (SPRN_TEXASR)
+                : [sprn_texasr] "i"  (SPRN_TEXASR)
                 : "memory", "r0", "r1", "r3", "r4",
                 "r7", "r8", "r9", "r10", "r11"
                 );
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c
index 51427a2465f6..ba04999254e3 100644
--- a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c
@@ -74,7 +74,7 @@ trans:
 
                 "3: ;"
                 : [tfhar] "=r" (tfhar), [res] "=r" (result),
-                [texasr] "=r" (texasr), [cptr1] "=r" (cptr1)
+                [texasr] "=r" (texasr), [cptr1] "=b" (cptr1)
                 : [sprn_texasr] "i"  (SPRN_TEXASR)
                 : "memory", "r0", "r8", "r31"
                 );
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c
index 48b462f75023..f70023b25e6e 100644
--- a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c
@@ -65,7 +65,7 @@ trans:
                 : [sprn_dscr]"i"(SPRN_DSCR), [sprn_tar]"i"(SPRN_TAR),
                 [sprn_ppr]"i"(SPRN_PPR), [sprn_texasr]"i"(SPRN_TEXASR),
                 [tar_1]"i"(TAR_1), [dscr_1]"i"(DSCR_1), [tar_2]"i"(TAR_2),
-                [dscr_2]"i"(DSCR_2), [cptr1] "r" (&cptr[1])
+                [dscr_2]"i"(DSCR_2), [cptr1] "b" (&cptr[1])
                 : "memory", "r0", "r1", "r3", "r4", "r5", "r6"
                 );
 
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c
index 17c23cabac3e..dfba80058977 100644
--- a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c
@@ -65,8 +65,7 @@ trans:
 
                 "3: ;"
                 : [res] "=r" (result), [texasr] "=r" (texasr)
-                : [fp_load] "r" (fp_load), [fp_load_ckpt] "r" (fp_load_ckpt),
-                [sprn_texasr] "i"  (SPRN_TEXASR), [cptr1] "r" (&cptr[1])
+                : [sprn_texasr] "i"  (SPRN_TEXASR), [cptr1] "b" (&cptr[1])
                 : "memory", "r0", "r1", "r3", "r4",
                 "r7", "r8", "r9", "r10", "r11"
                 );
diff --git a/tools/testing/selftests/powerpc/tm/.gitignore b/tools/testing/selftests/powerpc/tm/.gitignore
index c3ee8393dae8..208452a93e2c 100644
--- a/tools/testing/selftests/powerpc/tm/.gitignore
+++ b/tools/testing/selftests/powerpc/tm/.gitignore
@@ -11,6 +11,7 @@ tm-signal-context-chk-fpu
 tm-signal-context-chk-gpr
 tm-signal-context-chk-vmx
 tm-signal-context-chk-vsx
+tm-signal-sigreturn-nt
 tm-vmx-unavail
 tm-unavailable
 tm-trap
diff --git a/tools/testing/selftests/powerpc/tm/Makefile b/tools/testing/selftests/powerpc/tm/Makefile
index 9fc2cf6fbc92..75a685359129 100644
--- a/tools/testing/selftests/powerpc/tm/Makefile
+++ b/tools/testing/selftests/powerpc/tm/Makefile
@@ -4,7 +4,7 @@ SIGNAL_CONTEXT_CHK_TESTS := tm-signal-context-chk-gpr tm-signal-context-chk-fpu
 
 TEST_GEN_PROGS := tm-resched-dscr tm-syscall tm-signal-msr-resv tm-signal-stack \
         tm-vmxcopy tm-fork tm-tar tm-tmspr tm-vmx-unavail tm-unavailable tm-trap \
-        $(SIGNAL_CONTEXT_CHK_TESTS) tm-sigreturn
+        $(SIGNAL_CONTEXT_CHK_TESTS) tm-sigreturn tm-signal-sigreturn-nt
 
 top_srcdir = ../../../../..
 include ../../lib.mk
diff --git a/tools/testing/selftests/powerpc/tm/tm-signal-sigreturn-nt.c b/tools/testing/selftests/powerpc/tm/tm-signal-sigreturn-nt.c
new file mode 100644
index 000000000000..56fbf9f6bbf3
--- /dev/null
+++ b/tools/testing/selftests/powerpc/tm/tm-signal-sigreturn-nt.c
@@ -0,0 +1,46 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2018, Breno Leitao, Gustavo Romero, IBM Corp.
+ *
+ * A test case that creates a signal and starts a suspended transaction
+ * inside the signal handler.
+ *
+ * It returns from the signal handler with the CPU at suspended state, but
+ * without setting usercontext MSR Transaction State (TS) fields.
+ */
+
+#define _GNU_SOURCE
+#include <stdlib.h>
+#include <signal.h>
+
+#include "utils.h"
+
+void trap_signal_handler(int signo, siginfo_t *si, void *uc)
+{
+        ucontext_t *ucp = (ucontext_t *) uc;
+
+        asm("tbegin.; tsuspend.;");
+
+        /* Skip 'trap' instruction if it succeed */
+        ucp->uc_mcontext.regs->nip += 4;
+}
+
+int tm_signal_sigreturn_nt(void)
+{
+        struct sigaction trap_sa;
+
+        trap_sa.sa_flags = SA_SIGINFO;
+        trap_sa.sa_sigaction = trap_signal_handler;
+
+        sigaction(SIGTRAP, &trap_sa, NULL);
+
+        raise(SIGTRAP);
+
+        return EXIT_SUCCESS;
+}
+
+int main(int argc, char **argv)
+{
+        test_harness(tm_signal_sigreturn_nt, "tm_signal_sigreturn_nt");
+}
+