aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/ata
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/ata')
-rw-r--r--drivers/ata/Kconfig56
-rw-r--r--drivers/ata/Makefile2
-rw-r--r--drivers/ata/ahci.c355
-rw-r--r--drivers/ata/ata_generic.c7
-rw-r--r--drivers/ata/ata_piix.c37
-rw-r--r--drivers/ata/libata-acpi.c20
-rw-r--r--drivers/ata/libata-core.c142
-rw-r--r--drivers/ata/libata-eh.c104
-rw-r--r--drivers/ata/libata-pmp.c1
-rw-r--r--drivers/ata/libata-scsi.c119
-rw-r--r--drivers/ata/libata-sff.c95
-rw-r--r--drivers/ata/pata_acpi.c5
-rw-r--r--drivers/ata/pata_ali.c14
-rw-r--r--drivers/ata/pata_amd.c2
-rw-r--r--drivers/ata/pata_artop.c2
-rw-r--r--drivers/ata/pata_at32.c1
-rw-r--r--drivers/ata/pata_at91.c5
-rw-r--r--drivers/ata/pata_atiixp.c14
-rw-r--r--drivers/ata/pata_atp867x.c1
-rw-r--r--drivers/ata/pata_bf54x.c19
-rw-r--r--drivers/ata/pata_cmd640.c3
-rw-r--r--drivers/ata/pata_cmd64x.c38
-rw-r--r--drivers/ata/pata_cs5520.c39
-rw-r--r--drivers/ata/pata_cs5530.c2
-rw-r--r--drivers/ata/pata_cs5535.c6
-rw-r--r--drivers/ata/pata_cs5536.c4
-rw-r--r--drivers/ata/pata_cypress.c12
-rw-r--r--drivers/ata/pata_efar.c29
-rw-r--r--drivers/ata/pata_hpt366.c59
-rw-r--r--drivers/ata/pata_hpt37x.c296
-rw-r--r--drivers/ata/pata_hpt3x2n.c206
-rw-r--r--drivers/ata/pata_hpt3x3.c13
-rw-r--r--drivers/ata/pata_icside.c1
-rw-r--r--drivers/ata/pata_it8213.c29
-rw-r--r--drivers/ata/pata_it821x.c5
-rw-r--r--drivers/ata/pata_jmicron.c2
-rw-r--r--drivers/ata/pata_legacy.c14
-rw-r--r--drivers/ata/pata_macio.c1428
-rw-r--r--drivers/ata/pata_marvell.c6
-rw-r--r--drivers/ata/pata_mpc52xx.c2
-rw-r--r--drivers/ata/pata_netcell.c2
-rw-r--r--drivers/ata/pata_ns87410.c2
-rw-r--r--drivers/ata/pata_ns87415.c34
-rw-r--r--drivers/ata/pata_octeon_cf.c3
-rw-r--r--drivers/ata/pata_oldpiix.c4
-rw-r--r--drivers/ata/pata_opti.c2
-rw-r--r--drivers/ata/pata_optidma.c2
-rw-r--r--drivers/ata/pata_pcmcia.c26
-rw-r--r--drivers/ata/pata_pdc202xx_old.c17
-rw-r--r--drivers/ata/pata_piccolo.c140
-rw-r--r--drivers/ata/pata_radisys.c6
-rw-r--r--drivers/ata/pata_rb532_cf.c1
-rw-r--r--drivers/ata/pata_rdc.c3
-rw-r--r--drivers/ata/pata_rz1000.c13
-rw-r--r--drivers/ata/pata_sc1200.c2
-rw-r--r--drivers/ata/pata_serverworks.c7
-rw-r--r--drivers/ata/pata_sil680.c8
-rw-r--r--drivers/ata/pata_sis.c23
-rw-r--r--drivers/ata/pata_sl82c105.c2
-rw-r--r--drivers/ata/pata_triflex.c2
-rw-r--r--drivers/ata/pata_via.c272
-rw-r--r--drivers/ata/pdc_adma.c1
-rw-r--r--drivers/ata/sata_fsl.c25
-rw-r--r--drivers/ata/sata_inic162x.c1
-rw-r--r--drivers/ata/sata_mv.c147
-rw-r--r--drivers/ata/sata_nv.c5
-rw-r--r--drivers/ata/sata_promise.c3
-rw-r--r--drivers/ata/sata_qstor.c1
-rw-r--r--drivers/ata/sata_sil24.c10
-rw-r--r--drivers/ata/sata_sx4.c1
-rw-r--r--drivers/ata/sata_uli.c1
-rw-r--r--drivers/ata/sata_via.c23
72 files changed, 3211 insertions, 773 deletions
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index f2df6e2a224c..01c52c415bdc 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -3,7 +3,7 @@
3# 3#
4 4
5menuconfig ATA 5menuconfig ATA
6 tristate "Serial ATA (prod) and Parallel ATA (experimental) drivers" 6 tristate "Serial ATA and Parallel ATA drivers"
7 depends on HAS_IOMEM 7 depends on HAS_IOMEM
8 depends on BLOCK 8 depends on BLOCK
9 depends on !(M32R || M68K) || BROKEN 9 depends on !(M32R || M68K) || BROKEN
@@ -40,7 +40,6 @@ config ATA_VERBOSE_ERROR
40config ATA_ACPI 40config ATA_ACPI
41 bool "ATA ACPI Support" 41 bool "ATA ACPI Support"
42 depends on ACPI && PCI 42 depends on ACPI && PCI
43 select ACPI_DOCK
44 default y 43 default y
45 help 44 help
46 This option adds support for ATA-related ACPI objects. 45 This option adds support for ATA-related ACPI objects.
@@ -374,8 +373,8 @@ config PATA_HPT366
374 If unsure, say N. 373 If unsure, say N.
375 374
376config PATA_HPT37X 375config PATA_HPT37X
377 tristate "HPT 370/370A/371/372/374/302 PATA support (Experimental)" 376 tristate "HPT 370/370A/371/372/374/302 PATA support"
378 depends on PCI && EXPERIMENTAL 377 depends on PCI
379 help 378 help
380 This option enables support for the majority of the later HPT 379 This option enables support for the majority of the later HPT
381 PATA controllers via the new ATA layer. 380 PATA controllers via the new ATA layer.
@@ -383,8 +382,8 @@ config PATA_HPT37X
383 If unsure, say N. 382 If unsure, say N.
384 383
385config PATA_HPT3X2N 384config PATA_HPT3X2N
386 tristate "HPT 372N/302N PATA support (Experimental)" 385 tristate "HPT 372N/302N PATA support"
387 depends on PCI && EXPERIMENTAL 386 depends on PCI
388 help 387 help
389 This option enables support for the N variant HPT PATA 388 This option enables support for the N variant HPT PATA
390 controllers via the new ATA layer 389 controllers via the new ATA layer
@@ -401,7 +400,7 @@ config PATA_HPT3X3
401 If unsure, say N. 400 If unsure, say N.
402 401
403config PATA_HPT3X3_DMA 402config PATA_HPT3X3_DMA
404 bool "HPT 343/363 DMA support (Experimental)" 403 bool "HPT 343/363 DMA support"
405 depends on PATA_HPT3X3 404 depends on PATA_HPT3X3
406 help 405 help
407 This option enables DMA support for the HPT343/363 406 This option enables DMA support for the HPT343/363
@@ -447,9 +446,9 @@ config PATA_JMICRON
447 446
448config PATA_LEGACY 447config PATA_LEGACY
449 tristate "Legacy ISA PATA support (Experimental)" 448 tristate "Legacy ISA PATA support (Experimental)"
450 depends on ISA && EXPERIMENTAL 449 depends on (ISA || PCI) && EXPERIMENTAL
451 help 450 help
452 This option enables support for ISA/VLB bus legacy PATA 451 This option enables support for ISA/VLB/PCI bus legacy PATA
453 ports and allows them to be accessed via the new ATA layer. 452 ports and allows them to be accessed via the new ATA layer.
454 453
455 If unsure, say N. 454 If unsure, say N.
@@ -510,8 +509,8 @@ config PATA_NETCELL
510 If unsure, say N. 509 If unsure, say N.
511 510
512config PATA_NINJA32 511config PATA_NINJA32
513 tristate "Ninja32/Delkin Cardbus ATA support (Experimental)" 512 tristate "Ninja32/Delkin Cardbus ATA support"
514 depends on PCI && EXPERIMENTAL 513 depends on PCI
515 help 514 help
516 This option enables support for the Ninja32, Delkin and 515 This option enables support for the Ninja32, Delkin and
517 possibly other brands of Cardbus ATA adapter 516 possibly other brands of Cardbus ATA adapter
@@ -573,6 +572,14 @@ config PATA_PCMCIA
573 572
574 If unsure, say N. 573 If unsure, say N.
575 574
575config PATA_PDC2027X
576 tristate "Promise PATA 2027x support"
577 depends on PCI
578 help
579 This option enables support for Promise PATA pdc20268 to pdc20277 host adapters.
580
581 If unsure, say N.
582
576config PATA_PDC_OLD 583config PATA_PDC_OLD
577 tristate "Older Promise PATA controller support" 584 tristate "Older Promise PATA controller support"
578 depends on PCI 585 depends on PCI
@@ -643,14 +650,6 @@ config PATA_SERVERWORKS
643 650
644 If unsure, say N. 651 If unsure, say N.
645 652
646config PATA_PDC2027X
647 tristate "Promise PATA 2027x support"
648 depends on PCI
649 help
650 This option enables support for Promise PATA pdc20268 to pdc20277 host adapters.
651
652 If unsure, say N.
653
654config PATA_SIL680 653config PATA_SIL680
655 tristate "CMD / Silicon Image 680 PATA support" 654 tristate "CMD / Silicon Image 680 PATA support"
656 depends on PCI 655 depends on PCI
@@ -667,6 +666,15 @@ config PATA_SIS
667 666
668 If unsure, say N. 667 If unsure, say N.
669 668
669config PATA_TOSHIBA
670 tristate "Toshiba Piccolo support (Experimental)"
671 depends on PCI && EXPERIMENTAL
672 help
673 Support for the Toshiba Piccolo controllers. Currently only the
674 primary channel is supported by this driver.
675
676 If unsure, say N.
677
670config PATA_VIA 678config PATA_VIA
671 tristate "VIA PATA support" 679 tristate "VIA PATA support"
672 depends on PCI 680 depends on PCI
@@ -781,5 +789,15 @@ config PATA_BF54X
781 789
782 If unsure, say N. 790 If unsure, say N.
783 791
792config PATA_MACIO
793 tristate "Apple PowerMac/PowerBook internal 'MacIO' IDE"
794 depends on PPC_PMAC
795 help
796 Most IDE capable PowerMacs have IDE busses driven by a variant
797 of this controller which is part of the Apple chipset used on
798 most PowerMac models. Some models have multiple busses using
799 different chipsets, though generally, MacIO is one of them.
800
801
784endif # ATA_SFF 802endif # ATA_SFF
785endif # ATA 803endif # ATA
diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile
index 01e126f343b3..fc936d4471d6 100644
--- a/drivers/ata/Makefile
+++ b/drivers/ata/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_SATA_MV) += sata_mv.o
18obj-$(CONFIG_SATA_INIC162X) += sata_inic162x.o 18obj-$(CONFIG_SATA_INIC162X) += sata_inic162x.o
19obj-$(CONFIG_PDC_ADMA) += pdc_adma.o 19obj-$(CONFIG_PDC_ADMA) += pdc_adma.o
20obj-$(CONFIG_SATA_FSL) += sata_fsl.o 20obj-$(CONFIG_SATA_FSL) += sata_fsl.o
21obj-$(CONFIG_PATA_MACIO) += pata_macio.o
21 22
22obj-$(CONFIG_PATA_ALI) += pata_ali.o 23obj-$(CONFIG_PATA_ALI) += pata_ali.o
23obj-$(CONFIG_PATA_AMD) += pata_amd.o 24obj-$(CONFIG_PATA_AMD) += pata_amd.o
@@ -63,6 +64,7 @@ obj-$(CONFIG_PATA_RZ1000) += pata_rz1000.o
63obj-$(CONFIG_PATA_SC1200) += pata_sc1200.o 64obj-$(CONFIG_PATA_SC1200) += pata_sc1200.o
64obj-$(CONFIG_PATA_SERVERWORKS) += pata_serverworks.o 65obj-$(CONFIG_PATA_SERVERWORKS) += pata_serverworks.o
65obj-$(CONFIG_PATA_SIL680) += pata_sil680.o 66obj-$(CONFIG_PATA_SIL680) += pata_sil680.o
67obj-$(CONFIG_PATA_TOSHIBA) += pata_piccolo.o
66obj-$(CONFIG_PATA_VIA) += pata_via.o 68obj-$(CONFIG_PATA_VIA) += pata_via.o
67obj-$(CONFIG_PATA_WINBOND) += pata_sl82c105.o 69obj-$(CONFIG_PATA_WINBOND) += pata_sl82c105.o
68obj-$(CONFIG_PATA_WINBOND_VLB) += pata_winbond.o 70obj-$(CONFIG_PATA_WINBOND_VLB) += pata_winbond.o
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index a3241a1a710b..5326af28a410 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -42,6 +42,7 @@
42#include <linux/dma-mapping.h> 42#include <linux/dma-mapping.h>
43#include <linux/device.h> 43#include <linux/device.h>
44#include <linux/dmi.h> 44#include <linux/dmi.h>
45#include <linux/gfp.h>
45#include <scsi/scsi_host.h> 46#include <scsi/scsi_host.h>
46#include <scsi/scsi_cmnd.h> 47#include <scsi/scsi_cmnd.h>
47#include <linux/libata.h> 48#include <linux/libata.h>
@@ -93,6 +94,9 @@ enum {
93 AHCI_CMD_TBL_AR_SZ = AHCI_CMD_TBL_SZ * AHCI_MAX_CMDS, 94 AHCI_CMD_TBL_AR_SZ = AHCI_CMD_TBL_SZ * AHCI_MAX_CMDS,
94 AHCI_PORT_PRIV_DMA_SZ = AHCI_CMD_SLOT_SZ + AHCI_CMD_TBL_AR_SZ + 95 AHCI_PORT_PRIV_DMA_SZ = AHCI_CMD_SLOT_SZ + AHCI_CMD_TBL_AR_SZ +
95 AHCI_RX_FIS_SZ, 96 AHCI_RX_FIS_SZ,
97 AHCI_PORT_PRIV_FBS_DMA_SZ = AHCI_CMD_SLOT_SZ +
98 AHCI_CMD_TBL_AR_SZ +
99 (AHCI_RX_FIS_SZ * 16),
96 AHCI_IRQ_ON_SG = (1 << 31), 100 AHCI_IRQ_ON_SG = (1 << 31),
97 AHCI_CMD_ATAPI = (1 << 5), 101 AHCI_CMD_ATAPI = (1 << 5),
98 AHCI_CMD_WRITE = (1 << 6), 102 AHCI_CMD_WRITE = (1 << 6),
@@ -113,6 +117,7 @@ enum {
113 board_ahci_mcp65 = 6, 117 board_ahci_mcp65 = 6,
114 board_ahci_nopmp = 7, 118 board_ahci_nopmp = 7,
115 board_ahci_yesncq = 8, 119 board_ahci_yesncq = 8,
120 board_ahci_nosntf = 9,
116 121
117 /* global controller registers */ 122 /* global controller registers */
118 HOST_CAP = 0x00, /* host capabilities */ 123 HOST_CAP = 0x00, /* host capabilities */
@@ -169,6 +174,7 @@ enum {
169 PORT_SCR_ERR = 0x30, /* SATA phy register: SError */ 174 PORT_SCR_ERR = 0x30, /* SATA phy register: SError */
170 PORT_SCR_ACT = 0x34, /* SATA phy register: SActive */ 175 PORT_SCR_ACT = 0x34, /* SATA phy register: SActive */
171 PORT_SCR_NTF = 0x3c, /* SATA phy register: SNotification */ 176 PORT_SCR_NTF = 0x3c, /* SATA phy register: SNotification */
177 PORT_FBS = 0x40, /* FIS-based Switching */
172 178
173 /* PORT_IRQ_{STAT,MASK} bits */ 179 /* PORT_IRQ_{STAT,MASK} bits */
174 PORT_IRQ_COLD_PRES = (1 << 31), /* cold presence detect */ 180 PORT_IRQ_COLD_PRES = (1 << 31), /* cold presence detect */
@@ -207,6 +213,7 @@ enum {
207 PORT_CMD_ASP = (1 << 27), /* Aggressive Slumber/Partial */ 213 PORT_CMD_ASP = (1 << 27), /* Aggressive Slumber/Partial */
208 PORT_CMD_ALPE = (1 << 26), /* Aggressive Link PM enable */ 214 PORT_CMD_ALPE = (1 << 26), /* Aggressive Link PM enable */
209 PORT_CMD_ATAPI = (1 << 24), /* Device is ATAPI */ 215 PORT_CMD_ATAPI = (1 << 24), /* Device is ATAPI */
216 PORT_CMD_FBSCP = (1 << 22), /* FBS Capable Port */
210 PORT_CMD_PMP = (1 << 17), /* PMP attached */ 217 PORT_CMD_PMP = (1 << 17), /* PMP attached */
211 PORT_CMD_LIST_ON = (1 << 15), /* cmd list DMA engine running */ 218 PORT_CMD_LIST_ON = (1 << 15), /* cmd list DMA engine running */
212 PORT_CMD_FIS_ON = (1 << 14), /* FIS DMA engine running */ 219 PORT_CMD_FIS_ON = (1 << 14), /* FIS DMA engine running */
@@ -221,6 +228,14 @@ enum {
221 PORT_CMD_ICC_PARTIAL = (0x2 << 28), /* Put i/f in partial state */ 228 PORT_CMD_ICC_PARTIAL = (0x2 << 28), /* Put i/f in partial state */
222 PORT_CMD_ICC_SLUMBER = (0x6 << 28), /* Put i/f in slumber state */ 229 PORT_CMD_ICC_SLUMBER = (0x6 << 28), /* Put i/f in slumber state */
223 230
231 PORT_FBS_DWE_OFFSET = 16, /* FBS device with error offset */
232 PORT_FBS_ADO_OFFSET = 12, /* FBS active dev optimization offset */
233 PORT_FBS_DEV_OFFSET = 8, /* FBS device to issue offset */
234 PORT_FBS_DEV_MASK = (0xf << PORT_FBS_DEV_OFFSET), /* FBS.DEV */
235 PORT_FBS_SDE = (1 << 2), /* FBS single device error */
236 PORT_FBS_DEC = (1 << 1), /* FBS device error clear */
237 PORT_FBS_EN = (1 << 0), /* Enable FBS */
238
224 /* hpriv->flags bits */ 239 /* hpriv->flags bits */
225 AHCI_HFLAG_NO_NCQ = (1 << 0), 240 AHCI_HFLAG_NO_NCQ = (1 << 0),
226 AHCI_HFLAG_IGN_IRQ_IF_ERR = (1 << 1), /* ignore IRQ_IF_ERR */ 241 AHCI_HFLAG_IGN_IRQ_IF_ERR = (1 << 1), /* ignore IRQ_IF_ERR */
@@ -235,6 +250,7 @@ enum {
235 AHCI_HFLAG_NO_SUSPEND = (1 << 10), /* don't suspend */ 250 AHCI_HFLAG_NO_SUSPEND = (1 << 10), /* don't suspend */
236 AHCI_HFLAG_SRST_TOUT_IS_OFFLINE = (1 << 11), /* treat SRST timeout as 251 AHCI_HFLAG_SRST_TOUT_IS_OFFLINE = (1 << 11), /* treat SRST timeout as
237 link offline */ 252 link offline */
253 AHCI_HFLAG_NO_SNTF = (1 << 12), /* no sntf */
238 254
239 /* ap->flags bits */ 255 /* ap->flags bits */
240 256
@@ -302,6 +318,9 @@ struct ahci_port_priv {
302 unsigned int ncq_saw_dmas:1; 318 unsigned int ncq_saw_dmas:1;
303 unsigned int ncq_saw_sdb:1; 319 unsigned int ncq_saw_sdb:1;
304 u32 intr_mask; /* interrupts to enable */ 320 u32 intr_mask; /* interrupts to enable */
321 bool fbs_supported; /* set iff FBS is supported */
322 bool fbs_enabled; /* set iff FBS is enabled */
323 int fbs_last_dev; /* save FBS.DEV of last FIS */
305 /* enclosure management info per PM slot */ 324 /* enclosure management info per PM slot */
306 struct ahci_em_priv em_priv[EM_MAX_SLOTS]; 325 struct ahci_em_priv em_priv[EM_MAX_SLOTS];
307}; 326};
@@ -313,9 +332,12 @@ static unsigned int ahci_qc_issue(struct ata_queued_cmd *qc);
313static bool ahci_qc_fill_rtf(struct ata_queued_cmd *qc); 332static bool ahci_qc_fill_rtf(struct ata_queued_cmd *qc);
314static int ahci_port_start(struct ata_port *ap); 333static int ahci_port_start(struct ata_port *ap);
315static void ahci_port_stop(struct ata_port *ap); 334static void ahci_port_stop(struct ata_port *ap);
335static int ahci_pmp_qc_defer(struct ata_queued_cmd *qc);
316static void ahci_qc_prep(struct ata_queued_cmd *qc); 336static void ahci_qc_prep(struct ata_queued_cmd *qc);
317static void ahci_freeze(struct ata_port *ap); 337static void ahci_freeze(struct ata_port *ap);
318static void ahci_thaw(struct ata_port *ap); 338static void ahci_thaw(struct ata_port *ap);
339static void ahci_enable_fbs(struct ata_port *ap);
340static void ahci_disable_fbs(struct ata_port *ap);
319static void ahci_pmp_attach(struct ata_port *ap); 341static void ahci_pmp_attach(struct ata_port *ap);
320static void ahci_pmp_detach(struct ata_port *ap); 342static void ahci_pmp_detach(struct ata_port *ap);
321static int ahci_softreset(struct ata_link *link, unsigned int *class, 343static int ahci_softreset(struct ata_link *link, unsigned int *class,
@@ -354,10 +376,10 @@ static ssize_t ahci_show_host_version(struct device *dev,
354static ssize_t ahci_show_port_cmd(struct device *dev, 376static ssize_t ahci_show_port_cmd(struct device *dev,
355 struct device_attribute *attr, char *buf); 377 struct device_attribute *attr, char *buf);
356 378
357DEVICE_ATTR(ahci_host_caps, S_IRUGO, ahci_show_host_caps, NULL); 379static DEVICE_ATTR(ahci_host_caps, S_IRUGO, ahci_show_host_caps, NULL);
358DEVICE_ATTR(ahci_host_cap2, S_IRUGO, ahci_show_host_cap2, NULL); 380static DEVICE_ATTR(ahci_host_cap2, S_IRUGO, ahci_show_host_cap2, NULL);
359DEVICE_ATTR(ahci_host_version, S_IRUGO, ahci_show_host_version, NULL); 381static DEVICE_ATTR(ahci_host_version, S_IRUGO, ahci_show_host_version, NULL);
360DEVICE_ATTR(ahci_port_cmd, S_IRUGO, ahci_show_port_cmd, NULL); 382static DEVICE_ATTR(ahci_port_cmd, S_IRUGO, ahci_show_port_cmd, NULL);
361 383
362static struct device_attribute *ahci_shost_attrs[] = { 384static struct device_attribute *ahci_shost_attrs[] = {
363 &dev_attr_link_power_management_policy, 385 &dev_attr_link_power_management_policy,
@@ -388,7 +410,7 @@ static struct scsi_host_template ahci_sht = {
388static struct ata_port_operations ahci_ops = { 410static struct ata_port_operations ahci_ops = {
389 .inherits = &sata_pmp_port_ops, 411 .inherits = &sata_pmp_port_ops,
390 412
391 .qc_defer = sata_pmp_qc_defer_cmd_switch, 413 .qc_defer = ahci_pmp_qc_defer,
392 .qc_prep = ahci_qc_prep, 414 .qc_prep = ahci_qc_prep,
393 .qc_issue = ahci_qc_issue, 415 .qc_issue = ahci_qc_issue,
394 .qc_fill_rtf = ahci_qc_fill_rtf, 416 .qc_fill_rtf = ahci_qc_fill_rtf,
@@ -508,7 +530,7 @@ static const struct ata_port_info ahci_port_info[] = {
508 .udma_mask = ATA_UDMA6, 530 .udma_mask = ATA_UDMA6,
509 .port_ops = &ahci_ops, 531 .port_ops = &ahci_ops,
510 }, 532 },
511 /* board_ahci_yesncq */ 533 [board_ahci_yesncq] =
512 { 534 {
513 AHCI_HFLAGS (AHCI_HFLAG_YES_NCQ), 535 AHCI_HFLAGS (AHCI_HFLAG_YES_NCQ),
514 .flags = AHCI_FLAG_COMMON, 536 .flags = AHCI_FLAG_COMMON,
@@ -516,6 +538,14 @@ static const struct ata_port_info ahci_port_info[] = {
516 .udma_mask = ATA_UDMA6, 538 .udma_mask = ATA_UDMA6,
517 .port_ops = &ahci_ops, 539 .port_ops = &ahci_ops,
518 }, 540 },
541 [board_ahci_nosntf] =
542 {
543 AHCI_HFLAGS (AHCI_HFLAG_NO_SNTF),
544 .flags = AHCI_FLAG_COMMON,
545 .pio_mask = ATA_PIO4,
546 .udma_mask = ATA_UDMA6,
547 .port_ops = &ahci_ops,
548 },
519}; 549};
520 550
521static const struct pci_device_id ahci_pci_tbl[] = { 551static const struct pci_device_id ahci_pci_tbl[] = {
@@ -531,7 +561,7 @@ static const struct pci_device_id ahci_pci_tbl[] = {
531 { PCI_VDEVICE(INTEL, 0x2683), board_ahci }, /* ESB2 */ 561 { PCI_VDEVICE(INTEL, 0x2683), board_ahci }, /* ESB2 */
532 { PCI_VDEVICE(INTEL, 0x27c6), board_ahci }, /* ICH7-M DH */ 562 { PCI_VDEVICE(INTEL, 0x27c6), board_ahci }, /* ICH7-M DH */
533 { PCI_VDEVICE(INTEL, 0x2821), board_ahci }, /* ICH8 */ 563 { PCI_VDEVICE(INTEL, 0x2821), board_ahci }, /* ICH8 */
534 { PCI_VDEVICE(INTEL, 0x2822), board_ahci }, /* ICH8 */ 564 { PCI_VDEVICE(INTEL, 0x2822), board_ahci_nosntf }, /* ICH8 */
535 { PCI_VDEVICE(INTEL, 0x2824), board_ahci }, /* ICH8 */ 565 { PCI_VDEVICE(INTEL, 0x2824), board_ahci }, /* ICH8 */
536 { PCI_VDEVICE(INTEL, 0x2829), board_ahci }, /* ICH8M */ 566 { PCI_VDEVICE(INTEL, 0x2829), board_ahci }, /* ICH8M */
537 { PCI_VDEVICE(INTEL, 0x282a), board_ahci }, /* ICH8M */ 567 { PCI_VDEVICE(INTEL, 0x282a), board_ahci }, /* ICH8M */
@@ -560,6 +590,12 @@ static const struct pci_device_id ahci_pci_tbl[] = {
560 { PCI_VDEVICE(INTEL, 0x3b2b), board_ahci }, /* PCH RAID */ 590 { PCI_VDEVICE(INTEL, 0x3b2b), board_ahci }, /* PCH RAID */
561 { PCI_VDEVICE(INTEL, 0x3b2c), board_ahci }, /* PCH RAID */ 591 { PCI_VDEVICE(INTEL, 0x3b2c), board_ahci }, /* PCH RAID */
562 { PCI_VDEVICE(INTEL, 0x3b2f), board_ahci }, /* PCH AHCI */ 592 { PCI_VDEVICE(INTEL, 0x3b2f), board_ahci }, /* PCH AHCI */
593 { PCI_VDEVICE(INTEL, 0x1c02), board_ahci }, /* CPT AHCI */
594 { PCI_VDEVICE(INTEL, 0x1c03), board_ahci }, /* CPT AHCI */
595 { PCI_VDEVICE(INTEL, 0x1c04), board_ahci }, /* CPT RAID */
596 { PCI_VDEVICE(INTEL, 0x1c05), board_ahci }, /* CPT RAID */
597 { PCI_VDEVICE(INTEL, 0x1c06), board_ahci }, /* CPT RAID */
598 { PCI_VDEVICE(INTEL, 0x1c07), board_ahci }, /* CPT RAID */
563 599
564 /* JMicron 360/1/3/5/6, match class to avoid IDE function */ 600 /* JMicron 360/1/3/5/6, match class to avoid IDE function */
565 { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 601 { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
@@ -606,6 +642,21 @@ static const struct pci_device_id ahci_pci_tbl[] = {
606 { PCI_VDEVICE(NVIDIA, 0x055a), board_ahci_yesncq }, /* MCP67 */ 642 { PCI_VDEVICE(NVIDIA, 0x055a), board_ahci_yesncq }, /* MCP67 */
607 { PCI_VDEVICE(NVIDIA, 0x055b), board_ahci_yesncq }, /* MCP67 */ 643 { PCI_VDEVICE(NVIDIA, 0x055b), board_ahci_yesncq }, /* MCP67 */
608 { PCI_VDEVICE(NVIDIA, 0x0580), board_ahci_yesncq }, /* Linux ID */ 644 { PCI_VDEVICE(NVIDIA, 0x0580), board_ahci_yesncq }, /* Linux ID */
645 { PCI_VDEVICE(NVIDIA, 0x0581), board_ahci_yesncq }, /* Linux ID */
646 { PCI_VDEVICE(NVIDIA, 0x0582), board_ahci_yesncq }, /* Linux ID */
647 { PCI_VDEVICE(NVIDIA, 0x0583), board_ahci_yesncq }, /* Linux ID */
648 { PCI_VDEVICE(NVIDIA, 0x0584), board_ahci_yesncq }, /* Linux ID */
649 { PCI_VDEVICE(NVIDIA, 0x0585), board_ahci_yesncq }, /* Linux ID */
650 { PCI_VDEVICE(NVIDIA, 0x0586), board_ahci_yesncq }, /* Linux ID */
651 { PCI_VDEVICE(NVIDIA, 0x0587), board_ahci_yesncq }, /* Linux ID */
652 { PCI_VDEVICE(NVIDIA, 0x0588), board_ahci_yesncq }, /* Linux ID */
653 { PCI_VDEVICE(NVIDIA, 0x0589), board_ahci_yesncq }, /* Linux ID */
654 { PCI_VDEVICE(NVIDIA, 0x058a), board_ahci_yesncq }, /* Linux ID */
655 { PCI_VDEVICE(NVIDIA, 0x058b), board_ahci_yesncq }, /* Linux ID */
656 { PCI_VDEVICE(NVIDIA, 0x058c), board_ahci_yesncq }, /* Linux ID */
657 { PCI_VDEVICE(NVIDIA, 0x058d), board_ahci_yesncq }, /* Linux ID */
658 { PCI_VDEVICE(NVIDIA, 0x058e), board_ahci_yesncq }, /* Linux ID */
659 { PCI_VDEVICE(NVIDIA, 0x058f), board_ahci_yesncq }, /* Linux ID */
609 { PCI_VDEVICE(NVIDIA, 0x07f0), board_ahci_yesncq }, /* MCP73 */ 660 { PCI_VDEVICE(NVIDIA, 0x07f0), board_ahci_yesncq }, /* MCP73 */
610 { PCI_VDEVICE(NVIDIA, 0x07f1), board_ahci_yesncq }, /* MCP73 */ 661 { PCI_VDEVICE(NVIDIA, 0x07f1), board_ahci_yesncq }, /* MCP73 */
611 { PCI_VDEVICE(NVIDIA, 0x07f2), board_ahci_yesncq }, /* MCP73 */ 662 { PCI_VDEVICE(NVIDIA, 0x07f2), board_ahci_yesncq }, /* MCP73 */
@@ -849,6 +900,12 @@ static void ahci_save_initial_config(struct pci_dev *pdev,
849 cap &= ~HOST_CAP_PMP; 900 cap &= ~HOST_CAP_PMP;
850 } 901 }
851 902
903 if ((cap & HOST_CAP_SNTF) && (hpriv->flags & AHCI_HFLAG_NO_SNTF)) {
904 dev_printk(KERN_INFO, &pdev->dev,
905 "controller can't do SNTF, turning off CAP_SNTF\n");
906 cap &= ~HOST_CAP_SNTF;
907 }
908
852 if (pdev->vendor == PCI_VENDOR_ID_JMICRON && pdev->device == 0x2361 && 909 if (pdev->vendor == PCI_VENDOR_ID_JMICRON && pdev->device == 0x2361 &&
853 port_map != 1) { 910 port_map != 1) {
854 dev_printk(KERN_INFO, &pdev->dev, 911 dev_printk(KERN_INFO, &pdev->dev,
@@ -2029,6 +2086,17 @@ static unsigned int ahci_fill_sg(struct ata_queued_cmd *qc, void *cmd_tbl)
2029 return si; 2086 return si;
2030} 2087}
2031 2088
2089static int ahci_pmp_qc_defer(struct ata_queued_cmd *qc)
2090{
2091 struct ata_port *ap = qc->ap;
2092 struct ahci_port_priv *pp = ap->private_data;
2093
2094 if (!sata_pmp_attached(ap) || pp->fbs_enabled)
2095 return ata_std_qc_defer(qc);
2096 else
2097 return sata_pmp_qc_defer_cmd_switch(qc);
2098}
2099
2032static void ahci_qc_prep(struct ata_queued_cmd *qc) 2100static void ahci_qc_prep(struct ata_queued_cmd *qc)
2033{ 2101{
2034 struct ata_port *ap = qc->ap; 2102 struct ata_port *ap = qc->ap;
@@ -2067,6 +2135,31 @@ static void ahci_qc_prep(struct ata_queued_cmd *qc)
2067 ahci_fill_cmd_slot(pp, qc->tag, opts); 2135 ahci_fill_cmd_slot(pp, qc->tag, opts);
2068} 2136}
2069 2137
2138static void ahci_fbs_dec_intr(struct ata_port *ap)
2139{
2140 struct ahci_port_priv *pp = ap->private_data;
2141 void __iomem *port_mmio = ahci_port_base(ap);
2142 u32 fbs = readl(port_mmio + PORT_FBS);
2143 int retries = 3;
2144
2145 DPRINTK("ENTER\n");
2146 BUG_ON(!pp->fbs_enabled);
2147
2148 /* time to wait for DEC is not specified by AHCI spec,
2149 * add a retry loop for safety.
2150 */
2151 writel(fbs | PORT_FBS_DEC, port_mmio + PORT_FBS);
2152 fbs = readl(port_mmio + PORT_FBS);
2153 while ((fbs & PORT_FBS_DEC) && retries--) {
2154 udelay(1);
2155 fbs = readl(port_mmio + PORT_FBS);
2156 }
2157
2158 if (fbs & PORT_FBS_DEC)
2159 dev_printk(KERN_ERR, ap->host->dev,
2160 "failed to clear device error\n");
2161}
2162
2070static void ahci_error_intr(struct ata_port *ap, u32 irq_stat) 2163static void ahci_error_intr(struct ata_port *ap, u32 irq_stat)
2071{ 2164{
2072 struct ahci_host_priv *hpriv = ap->host->private_data; 2165 struct ahci_host_priv *hpriv = ap->host->private_data;
@@ -2075,12 +2168,26 @@ static void ahci_error_intr(struct ata_port *ap, u32 irq_stat)
2075 struct ata_link *link = NULL; 2168 struct ata_link *link = NULL;
2076 struct ata_queued_cmd *active_qc; 2169 struct ata_queued_cmd *active_qc;
2077 struct ata_eh_info *active_ehi; 2170 struct ata_eh_info *active_ehi;
2171 bool fbs_need_dec = false;
2078 u32 serror; 2172 u32 serror;
2079 2173
2080 /* determine active link */ 2174 /* determine active link with error */
2081 ata_for_each_link(link, ap, EDGE) 2175 if (pp->fbs_enabled) {
2082 if (ata_link_active(link)) 2176 void __iomem *port_mmio = ahci_port_base(ap);
2083 break; 2177 u32 fbs = readl(port_mmio + PORT_FBS);
2178 int pmp = fbs >> PORT_FBS_DWE_OFFSET;
2179
2180 if ((fbs & PORT_FBS_SDE) && (pmp < ap->nr_pmp_links) &&
2181 ata_link_online(&ap->pmp_link[pmp])) {
2182 link = &ap->pmp_link[pmp];
2183 fbs_need_dec = true;
2184 }
2185
2186 } else
2187 ata_for_each_link(link, ap, EDGE)
2188 if (ata_link_active(link))
2189 break;
2190
2084 if (!link) 2191 if (!link)
2085 link = &ap->link; 2192 link = &ap->link;
2086 2193
@@ -2137,8 +2244,13 @@ static void ahci_error_intr(struct ata_port *ap, u32 irq_stat)
2137 } 2244 }
2138 2245
2139 if (irq_stat & PORT_IRQ_IF_ERR) { 2246 if (irq_stat & PORT_IRQ_IF_ERR) {
2140 host_ehi->err_mask |= AC_ERR_ATA_BUS; 2247 if (fbs_need_dec)
2141 host_ehi->action |= ATA_EH_RESET; 2248 active_ehi->err_mask |= AC_ERR_DEV;
2249 else {
2250 host_ehi->err_mask |= AC_ERR_ATA_BUS;
2251 host_ehi->action |= ATA_EH_RESET;
2252 }
2253
2142 ata_ehi_push_desc(host_ehi, "interface fatal error"); 2254 ata_ehi_push_desc(host_ehi, "interface fatal error");
2143 } 2255 }
2144 2256
@@ -2153,7 +2265,10 @@ static void ahci_error_intr(struct ata_port *ap, u32 irq_stat)
2153 2265
2154 if (irq_stat & PORT_IRQ_FREEZE) 2266 if (irq_stat & PORT_IRQ_FREEZE)
2155 ata_port_freeze(ap); 2267 ata_port_freeze(ap);
2156 else 2268 else if (fbs_need_dec) {
2269 ata_link_abort(link);
2270 ahci_fbs_dec_intr(ap);
2271 } else
2157 ata_port_abort(ap); 2272 ata_port_abort(ap);
2158} 2273}
2159 2274
@@ -2164,7 +2279,7 @@ static void ahci_port_intr(struct ata_port *ap)
2164 struct ahci_port_priv *pp = ap->private_data; 2279 struct ahci_port_priv *pp = ap->private_data;
2165 struct ahci_host_priv *hpriv = ap->host->private_data; 2280 struct ahci_host_priv *hpriv = ap->host->private_data;
2166 int resetting = !!(ap->pflags & ATA_PFLAG_RESETTING); 2281 int resetting = !!(ap->pflags & ATA_PFLAG_RESETTING);
2167 u32 status, qc_active; 2282 u32 status, qc_active = 0;
2168 int rc; 2283 int rc;
2169 2284
2170 status = readl(port_mmio + PORT_IRQ_STAT); 2285 status = readl(port_mmio + PORT_IRQ_STAT);
@@ -2206,20 +2321,38 @@ static void ahci_port_intr(struct ata_port *ap)
2206 /* If the 'N' bit in word 0 of the FIS is set, 2321 /* If the 'N' bit in word 0 of the FIS is set,
2207 * we just received asynchronous notification. 2322 * we just received asynchronous notification.
2208 * Tell libata about it. 2323 * Tell libata about it.
2324 *
2325 * Lack of SNotification should not appear in
2326 * ahci 1.2, so the workaround is unnecessary
2327 * when FBS is enabled.
2209 */ 2328 */
2210 const __le32 *f = pp->rx_fis + RX_FIS_SDB; 2329 if (pp->fbs_enabled)
2211 u32 f0 = le32_to_cpu(f[0]); 2330 WARN_ON_ONCE(1);
2212 2331 else {
2213 if (f0 & (1 << 15)) 2332 const __le32 *f = pp->rx_fis + RX_FIS_SDB;
2214 sata_async_notification(ap); 2333 u32 f0 = le32_to_cpu(f[0]);
2334 if (f0 & (1 << 15))
2335 sata_async_notification(ap);
2336 }
2215 } 2337 }
2216 } 2338 }
2217 2339
2218 /* pp->active_link is valid iff any command is in flight */ 2340 /* pp->active_link is not reliable once FBS is enabled, both
2219 if (ap->qc_active && pp->active_link->sactive) 2341 * PORT_SCR_ACT and PORT_CMD_ISSUE should be checked because
2220 qc_active = readl(port_mmio + PORT_SCR_ACT); 2342 * NCQ and non-NCQ commands may be in flight at the same time.
2221 else 2343 */
2222 qc_active = readl(port_mmio + PORT_CMD_ISSUE); 2344 if (pp->fbs_enabled) {
2345 if (ap->qc_active) {
2346 qc_active = readl(port_mmio + PORT_SCR_ACT);
2347 qc_active |= readl(port_mmio + PORT_CMD_ISSUE);
2348 }
2349 } else {
2350 /* pp->active_link is valid iff any command is in flight */
2351 if (ap->qc_active && pp->active_link->sactive)
2352 qc_active = readl(port_mmio + PORT_SCR_ACT);
2353 else
2354 qc_active = readl(port_mmio + PORT_CMD_ISSUE);
2355 }
2223 2356
2224 rc = ata_qc_complete_multiple(ap, qc_active); 2357 rc = ata_qc_complete_multiple(ap, qc_active);
2225 2358
@@ -2305,6 +2438,15 @@ static unsigned int ahci_qc_issue(struct ata_queued_cmd *qc)
2305 2438
2306 if (qc->tf.protocol == ATA_PROT_NCQ) 2439 if (qc->tf.protocol == ATA_PROT_NCQ)
2307 writel(1 << qc->tag, port_mmio + PORT_SCR_ACT); 2440 writel(1 << qc->tag, port_mmio + PORT_SCR_ACT);
2441
2442 if (pp->fbs_enabled && pp->fbs_last_dev != qc->dev->link->pmp) {
2443 u32 fbs = readl(port_mmio + PORT_FBS);
2444 fbs &= ~(PORT_FBS_DEV_MASK | PORT_FBS_DEC);
2445 fbs |= qc->dev->link->pmp << PORT_FBS_DEV_OFFSET;
2446 writel(fbs, port_mmio + PORT_FBS);
2447 pp->fbs_last_dev = qc->dev->link->pmp;
2448 }
2449
2308 writel(1 << qc->tag, port_mmio + PORT_CMD_ISSUE); 2450 writel(1 << qc->tag, port_mmio + PORT_CMD_ISSUE);
2309 2451
2310 ahci_sw_activity(qc->dev->link); 2452 ahci_sw_activity(qc->dev->link);
@@ -2317,6 +2459,9 @@ static bool ahci_qc_fill_rtf(struct ata_queued_cmd *qc)
2317 struct ahci_port_priv *pp = qc->ap->private_data; 2459 struct ahci_port_priv *pp = qc->ap->private_data;
2318 u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG; 2460 u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG;
2319 2461
2462 if (pp->fbs_enabled)
2463 d2h_fis += qc->dev->link->pmp * AHCI_RX_FIS_SZ;
2464
2320 ata_tf_from_fis(d2h_fis, &qc->result_tf); 2465 ata_tf_from_fis(d2h_fis, &qc->result_tf);
2321 return true; 2466 return true;
2322} 2467}
@@ -2365,6 +2510,71 @@ static void ahci_post_internal_cmd(struct ata_queued_cmd *qc)
2365 ahci_kick_engine(ap); 2510 ahci_kick_engine(ap);
2366} 2511}
2367 2512
2513static void ahci_enable_fbs(struct ata_port *ap)
2514{
2515 struct ahci_port_priv *pp = ap->private_data;
2516 void __iomem *port_mmio = ahci_port_base(ap);
2517 u32 fbs;
2518 int rc;
2519
2520 if (!pp->fbs_supported)
2521 return;
2522
2523 fbs = readl(port_mmio + PORT_FBS);
2524 if (fbs & PORT_FBS_EN) {
2525 pp->fbs_enabled = true;
2526 pp->fbs_last_dev = -1; /* initialization */
2527 return;
2528 }
2529
2530 rc = ahci_stop_engine(ap);
2531 if (rc)
2532 return;
2533
2534 writel(fbs | PORT_FBS_EN, port_mmio + PORT_FBS);
2535 fbs = readl(port_mmio + PORT_FBS);
2536 if (fbs & PORT_FBS_EN) {
2537 dev_printk(KERN_INFO, ap->host->dev, "FBS is enabled.\n");
2538 pp->fbs_enabled = true;
2539 pp->fbs_last_dev = -1; /* initialization */
2540 } else
2541 dev_printk(KERN_ERR, ap->host->dev, "Failed to enable FBS\n");
2542
2543 ahci_start_engine(ap);
2544}
2545
2546static void ahci_disable_fbs(struct ata_port *ap)
2547{
2548 struct ahci_port_priv *pp = ap->private_data;
2549 void __iomem *port_mmio = ahci_port_base(ap);
2550 u32 fbs;
2551 int rc;
2552
2553 if (!pp->fbs_supported)
2554 return;
2555
2556 fbs = readl(port_mmio + PORT_FBS);
2557 if ((fbs & PORT_FBS_EN) == 0) {
2558 pp->fbs_enabled = false;
2559 return;
2560 }
2561
2562 rc = ahci_stop_engine(ap);
2563 if (rc)
2564 return;
2565
2566 writel(fbs & ~PORT_FBS_EN, port_mmio + PORT_FBS);
2567 fbs = readl(port_mmio + PORT_FBS);
2568 if (fbs & PORT_FBS_EN)
2569 dev_printk(KERN_ERR, ap->host->dev, "Failed to disable FBS\n");
2570 else {
2571 dev_printk(KERN_INFO, ap->host->dev, "FBS is disabled.\n");
2572 pp->fbs_enabled = false;
2573 }
2574
2575 ahci_start_engine(ap);
2576}
2577
2368static void ahci_pmp_attach(struct ata_port *ap) 2578static void ahci_pmp_attach(struct ata_port *ap)
2369{ 2579{
2370 void __iomem *port_mmio = ahci_port_base(ap); 2580 void __iomem *port_mmio = ahci_port_base(ap);
@@ -2375,6 +2585,8 @@ static void ahci_pmp_attach(struct ata_port *ap)
2375 cmd |= PORT_CMD_PMP; 2585 cmd |= PORT_CMD_PMP;
2376 writel(cmd, port_mmio + PORT_CMD); 2586 writel(cmd, port_mmio + PORT_CMD);
2377 2587
2588 ahci_enable_fbs(ap);
2589
2378 pp->intr_mask |= PORT_IRQ_BAD_PMP; 2590 pp->intr_mask |= PORT_IRQ_BAD_PMP;
2379 writel(pp->intr_mask, port_mmio + PORT_IRQ_MASK); 2591 writel(pp->intr_mask, port_mmio + PORT_IRQ_MASK);
2380} 2592}
@@ -2385,6 +2597,8 @@ static void ahci_pmp_detach(struct ata_port *ap)
2385 struct ahci_port_priv *pp = ap->private_data; 2597 struct ahci_port_priv *pp = ap->private_data;
2386 u32 cmd; 2598 u32 cmd;
2387 2599
2600 ahci_disable_fbs(ap);
2601
2388 cmd = readl(port_mmio + PORT_CMD); 2602 cmd = readl(port_mmio + PORT_CMD);
2389 cmd &= ~PORT_CMD_PMP; 2603 cmd &= ~PORT_CMD_PMP;
2390 writel(cmd, port_mmio + PORT_CMD); 2604 writel(cmd, port_mmio + PORT_CMD);
@@ -2476,20 +2690,40 @@ static int ahci_pci_device_resume(struct pci_dev *pdev)
2476 2690
2477static int ahci_port_start(struct ata_port *ap) 2691static int ahci_port_start(struct ata_port *ap)
2478{ 2692{
2693 struct ahci_host_priv *hpriv = ap->host->private_data;
2479 struct device *dev = ap->host->dev; 2694 struct device *dev = ap->host->dev;
2480 struct ahci_port_priv *pp; 2695 struct ahci_port_priv *pp;
2481 void *mem; 2696 void *mem;
2482 dma_addr_t mem_dma; 2697 dma_addr_t mem_dma;
2698 size_t dma_sz, rx_fis_sz;
2483 2699
2484 pp = devm_kzalloc(dev, sizeof(*pp), GFP_KERNEL); 2700 pp = devm_kzalloc(dev, sizeof(*pp), GFP_KERNEL);
2485 if (!pp) 2701 if (!pp)
2486 return -ENOMEM; 2702 return -ENOMEM;
2487 2703
2488 mem = dmam_alloc_coherent(dev, AHCI_PORT_PRIV_DMA_SZ, &mem_dma, 2704 /* check FBS capability */
2489 GFP_KERNEL); 2705 if ((hpriv->cap & HOST_CAP_FBS) && sata_pmp_supported(ap)) {
2706 void __iomem *port_mmio = ahci_port_base(ap);
2707 u32 cmd = readl(port_mmio + PORT_CMD);
2708 if (cmd & PORT_CMD_FBSCP)
2709 pp->fbs_supported = true;
2710 else
2711 dev_printk(KERN_WARNING, dev,
2712 "The port is not capable of FBS\n");
2713 }
2714
2715 if (pp->fbs_supported) {
2716 dma_sz = AHCI_PORT_PRIV_FBS_DMA_SZ;
2717 rx_fis_sz = AHCI_RX_FIS_SZ * 16;
2718 } else {
2719 dma_sz = AHCI_PORT_PRIV_DMA_SZ;
2720 rx_fis_sz = AHCI_RX_FIS_SZ;
2721 }
2722
2723 mem = dmam_alloc_coherent(dev, dma_sz, &mem_dma, GFP_KERNEL);
2490 if (!mem) 2724 if (!mem)
2491 return -ENOMEM; 2725 return -ENOMEM;
2492 memset(mem, 0, AHCI_PORT_PRIV_DMA_SZ); 2726 memset(mem, 0, dma_sz);
2493 2727
2494 /* 2728 /*
2495 * First item in chunk of DMA memory: 32-slot command table, 2729 * First item in chunk of DMA memory: 32-slot command table,
@@ -2507,8 +2741,8 @@ static int ahci_port_start(struct ata_port *ap)
2507 pp->rx_fis = mem; 2741 pp->rx_fis = mem;
2508 pp->rx_fis_dma = mem_dma; 2742 pp->rx_fis_dma = mem_dma;
2509 2743
2510 mem += AHCI_RX_FIS_SZ; 2744 mem += rx_fis_sz;
2511 mem_dma += AHCI_RX_FIS_SZ; 2745 mem_dma += rx_fis_sz;
2512 2746
2513 /* 2747 /*
2514 * Third item: data area for storing a single command 2748 * Third item: data area for storing a single command
@@ -2815,6 +3049,14 @@ static bool ahci_broken_suspend(struct pci_dev *pdev)
2815 * On HP dv[4-6] and HDX18 with earlier BIOSen, link 3049 * On HP dv[4-6] and HDX18 with earlier BIOSen, link
2816 * to the harddisk doesn't become online after 3050 * to the harddisk doesn't become online after
2817 * resuming from STR. Warn and fail suspend. 3051 * resuming from STR. Warn and fail suspend.
3052 *
3053 * http://bugzilla.kernel.org/show_bug.cgi?id=12276
3054 *
3055 * Use dates instead of versions to match as HP is
3056 * apparently recycling both product and version
3057 * strings.
3058 *
3059 * http://bugzilla.kernel.org/show_bug.cgi?id=15462
2818 */ 3060 */
2819 { 3061 {
2820 .ident = "dv4", 3062 .ident = "dv4",
@@ -2823,7 +3065,7 @@ static bool ahci_broken_suspend(struct pci_dev *pdev)
2823 DMI_MATCH(DMI_PRODUCT_NAME, 3065 DMI_MATCH(DMI_PRODUCT_NAME,
2824 "HP Pavilion dv4 Notebook PC"), 3066 "HP Pavilion dv4 Notebook PC"),
2825 }, 3067 },
2826 .driver_data = "F.30", /* cutoff BIOS version */ 3068 .driver_data = "20090105", /* F.30 */
2827 }, 3069 },
2828 { 3070 {
2829 .ident = "dv5", 3071 .ident = "dv5",
@@ -2832,7 +3074,7 @@ static bool ahci_broken_suspend(struct pci_dev *pdev)
2832 DMI_MATCH(DMI_PRODUCT_NAME, 3074 DMI_MATCH(DMI_PRODUCT_NAME,
2833 "HP Pavilion dv5 Notebook PC"), 3075 "HP Pavilion dv5 Notebook PC"),
2834 }, 3076 },
2835 .driver_data = "F.16", /* cutoff BIOS version */ 3077 .driver_data = "20090506", /* F.16 */
2836 }, 3078 },
2837 { 3079 {
2838 .ident = "dv6", 3080 .ident = "dv6",
@@ -2841,7 +3083,7 @@ static bool ahci_broken_suspend(struct pci_dev *pdev)
2841 DMI_MATCH(DMI_PRODUCT_NAME, 3083 DMI_MATCH(DMI_PRODUCT_NAME,
2842 "HP Pavilion dv6 Notebook PC"), 3084 "HP Pavilion dv6 Notebook PC"),
2843 }, 3085 },
2844 .driver_data = "F.21", /* cutoff BIOS version */ 3086 .driver_data = "20090423", /* F.21 */
2845 }, 3087 },
2846 { 3088 {
2847 .ident = "HDX18", 3089 .ident = "HDX18",
@@ -2850,19 +3092,38 @@ static bool ahci_broken_suspend(struct pci_dev *pdev)
2850 DMI_MATCH(DMI_PRODUCT_NAME, 3092 DMI_MATCH(DMI_PRODUCT_NAME,
2851 "HP HDX18 Notebook PC"), 3093 "HP HDX18 Notebook PC"),
2852 }, 3094 },
2853 .driver_data = "F.23", /* cutoff BIOS version */ 3095 .driver_data = "20090430", /* F.23 */
3096 },
3097 /*
3098 * Acer eMachines G725 has the same problem. BIOS
3099 * V1.03 is known to be broken. V3.04 is known to
3100 * work. Inbetween, there are V1.06, V2.06 and V3.03
3101 * that we don't have much idea about. For now,
3102 * blacklist anything older than V3.04.
3103 *
3104 * http://bugzilla.kernel.org/show_bug.cgi?id=15104
3105 */
3106 {
3107 .ident = "G725",
3108 .matches = {
3109 DMI_MATCH(DMI_SYS_VENDOR, "eMachines"),
3110 DMI_MATCH(DMI_PRODUCT_NAME, "eMachines G725"),
3111 },
3112 .driver_data = "20091216", /* V3.04 */
2854 }, 3113 },
2855 { } /* terminate list */ 3114 { } /* terminate list */
2856 }; 3115 };
2857 const struct dmi_system_id *dmi = dmi_first_match(sysids); 3116 const struct dmi_system_id *dmi = dmi_first_match(sysids);
2858 const char *ver; 3117 int year, month, date;
3118 char buf[9];
2859 3119
2860 if (!dmi || pdev->bus->number || pdev->devfn != PCI_DEVFN(0x1f, 2)) 3120 if (!dmi || pdev->bus->number || pdev->devfn != PCI_DEVFN(0x1f, 2))
2861 return false; 3121 return false;
2862 3122
2863 ver = dmi_get_system_info(DMI_BIOS_VERSION); 3123 dmi_get_date(DMI_BIOS_DATE, &year, &month, &date);
3124 snprintf(buf, sizeof(buf), "%04d%02d%02d", year, month, date);
2864 3125
2865 return !ver || strcmp(ver, dmi->driver_data) < 0; 3126 return strcmp(buf, dmi->driver_data) < 0;
2866} 3127}
2867 3128
2868static bool ahci_broken_online(struct pci_dev *pdev) 3129static bool ahci_broken_online(struct pci_dev *pdev)
@@ -2988,6 +3249,14 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
2988 if (pdev->vendor == PCI_VENDOR_ID_MARVELL && !marvell_enable) 3249 if (pdev->vendor == PCI_VENDOR_ID_MARVELL && !marvell_enable)
2989 return -ENODEV; 3250 return -ENODEV;
2990 3251
3252 /* Promise's PDC42819 is a SAS/SATA controller that has an AHCI mode.
3253 * At the moment, we can only use the AHCI mode. Let the users know
3254 * that for SAS drives they're out of luck.
3255 */
3256 if (pdev->vendor == PCI_VENDOR_ID_PROMISE)
3257 dev_printk(KERN_INFO, &pdev->dev, "PDC42819 "
3258 "can only drive SATA devices with this driver\n");
3259
2991 /* acquire resources */ 3260 /* acquire resources */
2992 rc = pcim_enable_device(pdev); 3261 rc = pcim_enable_device(pdev);
2993 if (rc) 3262 if (rc)
@@ -3043,8 +3312,16 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
3043 ahci_save_initial_config(pdev, hpriv); 3312 ahci_save_initial_config(pdev, hpriv);
3044 3313
3045 /* prepare host */ 3314 /* prepare host */
3046 if (hpriv->cap & HOST_CAP_NCQ) 3315 if (hpriv->cap & HOST_CAP_NCQ) {
3047 pi.flags |= ATA_FLAG_NCQ | ATA_FLAG_FPDMA_AA; 3316 pi.flags |= ATA_FLAG_NCQ;
3317 /* Auto-activate optimization is supposed to be supported on
3318 all AHCI controllers indicating NCQ support, but it seems
3319 to be broken at least on some NVIDIA MCP79 chipsets.
3320 Until we get info on which NVIDIA chipsets don't have this
3321 issue, if any, disable AA on all NVIDIA AHCIs. */
3322 if (pdev->vendor != PCI_VENDOR_ID_NVIDIA)
3323 pi.flags |= ATA_FLAG_FPDMA_AA;
3324 }
3048 3325
3049 if (hpriv->cap & HOST_CAP_PMP) 3326 if (hpriv->cap & HOST_CAP_PMP)
3050 pi.flags |= ATA_FLAG_PMP; 3327 pi.flags |= ATA_FLAG_PMP;
diff --git a/drivers/ata/ata_generic.c b/drivers/ata/ata_generic.c
index ecfd22b4f1ce..33fb614f9784 100644
--- a/drivers/ata/ata_generic.c
+++ b/drivers/ata/ata_generic.c
@@ -155,7 +155,7 @@ static int ata_generic_init_one(struct pci_dev *dev, const struct pci_device_id
155 return rc; 155 return rc;
156 pcim_pin_device(dev); 156 pcim_pin_device(dev);
157 } 157 }
158 return ata_pci_sff_init_one(dev, ppi, &generic_sht, NULL); 158 return ata_pci_sff_init_one(dev, ppi, &generic_sht, NULL, 0);
159} 159}
160 160
161static struct pci_device_id ata_generic[] = { 161static struct pci_device_id ata_generic[] = {
@@ -168,9 +168,12 @@ static struct pci_device_id ata_generic[] = {
168 { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C561), }, 168 { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C561), },
169 { PCI_DEVICE(PCI_VENDOR_ID_OPTI, PCI_DEVICE_ID_OPTI_82C558), }, 169 { PCI_DEVICE(PCI_VENDOR_ID_OPTI, PCI_DEVICE_ID_OPTI_82C558), },
170 { PCI_DEVICE(PCI_VENDOR_ID_CENATEK,PCI_DEVICE_ID_CENATEK_IDE), }, 170 { PCI_DEVICE(PCI_VENDOR_ID_CENATEK,PCI_DEVICE_ID_CENATEK_IDE), },
171 { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO), }, 171#if !defined(CONFIG_PATA_TOSHIBA) && !defined(CONFIG_PATA_TOSHIBA_MODULE)
172 { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_1), }, 172 { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_1), },
173 { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_2), }, 173 { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_2), },
174 { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_3), },
175 { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_5), },
176#endif
174 /* Must come last. If you add entries adjust this table appropriately */ 177 /* Must come last. If you add entries adjust this table appropriately */
175 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE << 8, 0xFFFFFF00UL, 1}, 178 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE << 8, 0xFFFFFF00UL, 1},
176 { 0, }, 179 { 0, },
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index 9ac4e378992e..83bc49fac9bb 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -90,6 +90,7 @@
90#include <linux/blkdev.h> 90#include <linux/blkdev.h>
91#include <linux/delay.h> 91#include <linux/delay.h>
92#include <linux/device.h> 92#include <linux/device.h>
93#include <linux/gfp.h>
93#include <scsi/scsi_host.h> 94#include <scsi/scsi_host.h>
94#include <linux/libata.h> 95#include <linux/libata.h>
95#include <linux/dmi.h> 96#include <linux/dmi.h>
@@ -173,6 +174,7 @@ static int piix_sidpr_scr_read(struct ata_link *link,
173 unsigned int reg, u32 *val); 174 unsigned int reg, u32 *val);
174static int piix_sidpr_scr_write(struct ata_link *link, 175static int piix_sidpr_scr_write(struct ata_link *link,
175 unsigned int reg, u32 val); 176 unsigned int reg, u32 val);
177static bool piix_irq_check(struct ata_port *ap);
176#ifdef CONFIG_PM 178#ifdef CONFIG_PM
177static int piix_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg); 179static int piix_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg);
178static int piix_pci_device_resume(struct pci_dev *pdev); 180static int piix_pci_device_resume(struct pci_dev *pdev);
@@ -291,6 +293,14 @@ static const struct pci_device_id piix_pci_tbl[] = {
291 { 0x8086, 0x3b2d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, 293 { 0x8086, 0x3b2d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
292 /* SATA Controller IDE (PCH) */ 294 /* SATA Controller IDE (PCH) */
293 { 0x8086, 0x3b2e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata }, 295 { 0x8086, 0x3b2e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
296 /* SATA Controller IDE (CPT) */
297 { 0x8086, 0x1c00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
298 /* SATA Controller IDE (CPT) */
299 { 0x8086, 0x1c01, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
300 /* SATA Controller IDE (CPT) */
301 { 0x8086, 0x1c08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
302 /* SATA Controller IDE (CPT) */
303 { 0x8086, 0x1c09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
294 { } /* terminate list */ 304 { } /* terminate list */
295}; 305};
296 306
@@ -309,8 +319,13 @@ static struct scsi_host_template piix_sht = {
309 ATA_BMDMA_SHT(DRV_NAME), 319 ATA_BMDMA_SHT(DRV_NAME),
310}; 320};
311 321
312static struct ata_port_operations piix_pata_ops = { 322static struct ata_port_operations piix_sata_ops = {
313 .inherits = &ata_bmdma32_port_ops, 323 .inherits = &ata_bmdma32_port_ops,
324 .sff_irq_check = piix_irq_check,
325};
326
327static struct ata_port_operations piix_pata_ops = {
328 .inherits = &piix_sata_ops,
314 .cable_detect = ata_cable_40wire, 329 .cable_detect = ata_cable_40wire,
315 .set_piomode = piix_set_piomode, 330 .set_piomode = piix_set_piomode,
316 .set_dmamode = piix_set_dmamode, 331 .set_dmamode = piix_set_dmamode,
@@ -328,10 +343,6 @@ static struct ata_port_operations ich_pata_ops = {
328 .set_dmamode = ich_set_dmamode, 343 .set_dmamode = ich_set_dmamode,
329}; 344};
330 345
331static struct ata_port_operations piix_sata_ops = {
332 .inherits = &ata_bmdma_port_ops,
333};
334
335static struct ata_port_operations piix_sidpr_sata_ops = { 346static struct ata_port_operations piix_sidpr_sata_ops = {
336 .inherits = &piix_sata_ops, 347 .inherits = &piix_sata_ops,
337 .hardreset = sata_std_hardreset, 348 .hardreset = sata_std_hardreset,
@@ -599,7 +610,7 @@ static const struct ich_laptop ich_laptop[] = {
599 { 0x27DF, 0x1028, 0x02b0 }, /* ICH7 on unknown Dell */ 610 { 0x27DF, 0x1028, 0x02b0 }, /* ICH7 on unknown Dell */
600 { 0x27DF, 0x1043, 0x1267 }, /* ICH7 on Asus W5F */ 611 { 0x27DF, 0x1043, 0x1267 }, /* ICH7 on Asus W5F */
601 { 0x27DF, 0x103C, 0x30A1 }, /* ICH7 on HP Compaq nc2400 */ 612 { 0x27DF, 0x103C, 0x30A1 }, /* ICH7 on HP Compaq nc2400 */
602 { 0x27DF, 0x103C, 0x361a }, /* ICH7 on unkown HP */ 613 { 0x27DF, 0x103C, 0x361a }, /* ICH7 on unknown HP */
603 { 0x27DF, 0x1071, 0xD221 }, /* ICH7 on Hercules EC-900 */ 614 { 0x27DF, 0x1071, 0xD221 }, /* ICH7 on Hercules EC-900 */
604 { 0x27DF, 0x152D, 0x0778 }, /* ICH7 on unknown Intel */ 615 { 0x27DF, 0x152D, 0x0778 }, /* ICH7 on unknown Intel */
605 { 0x24CA, 0x1025, 0x0061 }, /* ICH4 on ACER Aspire 2023WLMi */ 616 { 0x24CA, 0x1025, 0x0061 }, /* ICH4 on ACER Aspire 2023WLMi */
@@ -869,10 +880,10 @@ static void do_pata_set_dmamode(struct ata_port *ap, struct ata_device *adev, in
869 (timings[pio][1] << 8); 880 (timings[pio][1] << 8);
870 } 881 }
871 882
872 if (ap->udma_mask) { 883 if (ap->udma_mask)
873 udma_enable &= ~(1 << devid); 884 udma_enable &= ~(1 << devid);
874 pci_write_config_word(dev, master_port, master_data); 885
875 } 886 pci_write_config_word(dev, master_port, master_data);
876 } 887 }
877 /* Don't scribble on 0x48 if the controller does not support UDMA */ 888 /* Don't scribble on 0x48 if the controller does not support UDMA */
878 if (ap->udma_mask) 889 if (ap->udma_mask)
@@ -962,6 +973,14 @@ static int piix_sidpr_scr_write(struct ata_link *link,
962 return 0; 973 return 0;
963} 974}
964 975
976static bool piix_irq_check(struct ata_port *ap)
977{
978 if (unlikely(!ap->ioaddr.bmdma_addr))
979 return false;
980
981 return ap->ops->bmdma_status(ap) & ATA_DMA_INTR;
982}
983
965#ifdef CONFIG_PM 984#ifdef CONFIG_PM
966static int piix_broken_suspend(void) 985static int piix_broken_suspend(void)
967{ 986{
diff --git a/drivers/ata/libata-acpi.c b/drivers/ata/libata-acpi.c
index b0882cddfd4c..7b5eea7e01dc 100644
--- a/drivers/ata/libata-acpi.c
+++ b/drivers/ata/libata-acpi.c
@@ -15,6 +15,7 @@
15#include <linux/acpi.h> 15#include <linux/acpi.h>
16#include <linux/libata.h> 16#include <linux/libata.h>
17#include <linux/pci.h> 17#include <linux/pci.h>
18#include <linux/slab.h>
18#include <scsi/scsi_device.h> 19#include <scsi/scsi_device.h>
19#include "libata.h" 20#include "libata.h"
20 21
@@ -64,7 +65,7 @@ void ata_acpi_associate_sata_port(struct ata_port *ap)
64 WARN_ON(!(ap->flags & ATA_FLAG_ACPI_SATA)); 65 WARN_ON(!(ap->flags & ATA_FLAG_ACPI_SATA));
65 66
66 if (!sata_pmp_attached(ap)) { 67 if (!sata_pmp_attached(ap)) {
67 acpi_integer adr = SATA_ADR(ap->port_no, NO_PORT_MULT); 68 u64 adr = SATA_ADR(ap->port_no, NO_PORT_MULT);
68 69
69 ap->link.device->acpi_handle = 70 ap->link.device->acpi_handle =
70 acpi_get_child(ap->host->acpi_handle, adr); 71 acpi_get_child(ap->host->acpi_handle, adr);
@@ -74,7 +75,7 @@ void ata_acpi_associate_sata_port(struct ata_port *ap)
74 ap->link.device->acpi_handle = NULL; 75 ap->link.device->acpi_handle = NULL;
75 76
76 ata_for_each_link(link, ap, EDGE) { 77 ata_for_each_link(link, ap, EDGE) {
77 acpi_integer adr = SATA_ADR(ap->port_no, link->pmp); 78 u64 adr = SATA_ADR(ap->port_no, link->pmp);
78 79
79 link->device->acpi_handle = 80 link->device->acpi_handle =
80 acpi_get_child(ap->host->acpi_handle, adr); 81 acpi_get_child(ap->host->acpi_handle, adr);
@@ -807,12 +808,11 @@ static int ata_acpi_exec_tfs(struct ata_device *dev, int *nr_executed)
807 * EH context. 808 * EH context.
808 * 809 *
809 * RETURNS: 810 * RETURNS:
810 * 0 on success, -errno on failure. 811 * 0 on success, -ENOENT if _SDD doesn't exist, -errno on failure.
811 */ 812 */
812static int ata_acpi_push_id(struct ata_device *dev) 813static int ata_acpi_push_id(struct ata_device *dev)
813{ 814{
814 struct ata_port *ap = dev->link->ap; 815 struct ata_port *ap = dev->link->ap;
815 int err;
816 acpi_status status; 816 acpi_status status;
817 struct acpi_object_list input; 817 struct acpi_object_list input;
818 union acpi_object in_params[1]; 818 union acpi_object in_params[1];
@@ -835,12 +835,16 @@ static int ata_acpi_push_id(struct ata_device *dev)
835 status = acpi_evaluate_object(dev->acpi_handle, "_SDD", &input, NULL); 835 status = acpi_evaluate_object(dev->acpi_handle, "_SDD", &input, NULL);
836 swap_buf_le16(dev->id, ATA_ID_WORDS); 836 swap_buf_le16(dev->id, ATA_ID_WORDS);
837 837
838 err = ACPI_FAILURE(status) ? -EIO : 0; 838 if (status == AE_NOT_FOUND)
839 if (err < 0) 839 return -ENOENT;
840
841 if (ACPI_FAILURE(status)) {
840 ata_dev_printk(dev, KERN_WARNING, 842 ata_dev_printk(dev, KERN_WARNING,
841 "ACPI _SDD failed (AE 0x%x)\n", status); 843 "ACPI _SDD failed (AE 0x%x)\n", status);
844 return -EIO;
845 }
842 846
843 return err; 847 return 0;
844} 848}
845 849
846/** 850/**
@@ -971,7 +975,7 @@ int ata_acpi_on_devcfg(struct ata_device *dev)
971 /* do _SDD if SATA */ 975 /* do _SDD if SATA */
972 if (acpi_sata) { 976 if (acpi_sata) {
973 rc = ata_acpi_push_id(dev); 977 rc = ata_acpi_push_id(dev);
974 if (rc) 978 if (rc && rc != -ENOENT)
975 goto acpi_err; 979 goto acpi_err;
976 } 980 }
977 981
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index dc72690ed5db..49cffb6094a3 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -58,6 +58,7 @@
58#include <linux/io.h> 58#include <linux/io.h>
59#include <linux/async.h> 59#include <linux/async.h>
60#include <linux/log2.h> 60#include <linux/log2.h>
61#include <linux/slab.h>
61#include <scsi/scsi.h> 62#include <scsi/scsi.h>
62#include <scsi/scsi_cmnd.h> 63#include <scsi/scsi_cmnd.h>
63#include <scsi/scsi_host.h> 64#include <scsi/scsi_host.h>
@@ -1493,6 +1494,7 @@ static int ata_hpa_resize(struct ata_device *dev)
1493{ 1494{
1494 struct ata_eh_context *ehc = &dev->link->eh_context; 1495 struct ata_eh_context *ehc = &dev->link->eh_context;
1495 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO; 1496 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
1497 bool unlock_hpa = ata_ignore_hpa || dev->flags & ATA_DFLAG_UNLOCK_HPA;
1496 u64 sectors = ata_id_n_sectors(dev->id); 1498 u64 sectors = ata_id_n_sectors(dev->id);
1497 u64 native_sectors; 1499 u64 native_sectors;
1498 int rc; 1500 int rc;
@@ -1509,7 +1511,7 @@ static int ata_hpa_resize(struct ata_device *dev)
1509 /* If device aborted the command or HPA isn't going to 1511 /* If device aborted the command or HPA isn't going to
1510 * be unlocked, skip HPA resizing. 1512 * be unlocked, skip HPA resizing.
1511 */ 1513 */
1512 if (rc == -EACCES || !ata_ignore_hpa) { 1514 if (rc == -EACCES || !unlock_hpa) {
1513 ata_dev_printk(dev, KERN_WARNING, "HPA support seems " 1515 ata_dev_printk(dev, KERN_WARNING, "HPA support seems "
1514 "broken, skipping HPA handling\n"); 1516 "broken, skipping HPA handling\n");
1515 dev->horkage |= ATA_HORKAGE_BROKEN_HPA; 1517 dev->horkage |= ATA_HORKAGE_BROKEN_HPA;
@@ -1524,7 +1526,7 @@ static int ata_hpa_resize(struct ata_device *dev)
1524 dev->n_native_sectors = native_sectors; 1526 dev->n_native_sectors = native_sectors;
1525 1527
1526 /* nothing to do? */ 1528 /* nothing to do? */
1527 if (native_sectors <= sectors || !ata_ignore_hpa) { 1529 if (native_sectors <= sectors || !unlock_hpa) {
1528 if (!print_info || native_sectors == sectors) 1530 if (!print_info || native_sectors == sectors)
1529 return 0; 1531 return 0;
1530 1532
@@ -2232,7 +2234,7 @@ retry:
2232 * Some drives were very specific about that exact sequence. 2234 * Some drives were very specific about that exact sequence.
2233 * 2235 *
2234 * Note that ATA4 says lba is mandatory so the second check 2236 * Note that ATA4 says lba is mandatory so the second check
2235 * shoud never trigger. 2237 * should never trigger.
2236 */ 2238 */
2237 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) { 2239 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
2238 err_mask = ata_dev_init_params(dev, id[3], id[6]); 2240 err_mask = ata_dev_init_params(dev, id[3], id[6]);
@@ -3211,6 +3213,7 @@ const struct ata_timing *ata_timing_find_mode(u8 xfer_mode)
3211int ata_timing_compute(struct ata_device *adev, unsigned short speed, 3213int ata_timing_compute(struct ata_device *adev, unsigned short speed,
3212 struct ata_timing *t, int T, int UT) 3214 struct ata_timing *t, int T, int UT)
3213{ 3215{
3216 const u16 *id = adev->id;
3214 const struct ata_timing *s; 3217 const struct ata_timing *s;
3215 struct ata_timing p; 3218 struct ata_timing p;
3216 3219
@@ -3228,14 +3231,18 @@ int ata_timing_compute(struct ata_device *adev, unsigned short speed,
3228 * PIO/MW_DMA cycle timing. 3231 * PIO/MW_DMA cycle timing.
3229 */ 3232 */
3230 3233
3231 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */ 3234 if (id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
3232 memset(&p, 0, sizeof(p)); 3235 memset(&p, 0, sizeof(p));
3236
3233 if (speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) { 3237 if (speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
3234 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO]; 3238 if (speed <= XFER_PIO_2)
3235 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY]; 3239 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO];
3236 } else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) { 3240 else if ((speed <= XFER_PIO_4) ||
3237 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN]; 3241 (speed == XFER_PIO_5 && !ata_id_is_cfa(id)))
3238 } 3242 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO_IORDY];
3243 } else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2)
3244 p.cycle = id[ATA_ID_EIDE_DMA_MIN];
3245
3239 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B); 3246 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
3240 } 3247 }
3241 3248
@@ -3790,21 +3797,45 @@ int sata_link_debounce(struct ata_link *link, const unsigned long *params,
3790int sata_link_resume(struct ata_link *link, const unsigned long *params, 3797int sata_link_resume(struct ata_link *link, const unsigned long *params,
3791 unsigned long deadline) 3798 unsigned long deadline)
3792{ 3799{
3800 int tries = ATA_LINK_RESUME_TRIES;
3793 u32 scontrol, serror; 3801 u32 scontrol, serror;
3794 int rc; 3802 int rc;
3795 3803
3796 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol))) 3804 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
3797 return rc; 3805 return rc;
3798 3806
3799 scontrol = (scontrol & 0x0f0) | 0x300; 3807 /*
3808 * Writes to SControl sometimes get ignored under certain
3809 * controllers (ata_piix SIDPR). Make sure DET actually is
3810 * cleared.
3811 */
3812 do {
3813 scontrol = (scontrol & 0x0f0) | 0x300;
3814 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
3815 return rc;
3816 /*
3817 * Some PHYs react badly if SStatus is pounded
3818 * immediately after resuming. Delay 200ms before
3819 * debouncing.
3820 */
3821 msleep(200);
3800 3822
3801 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol))) 3823 /* is SControl restored correctly? */
3802 return rc; 3824 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
3825 return rc;
3826 } while ((scontrol & 0xf0f) != 0x300 && --tries);
3803 3827
3804 /* Some PHYs react badly if SStatus is pounded immediately 3828 if ((scontrol & 0xf0f) != 0x300) {
3805 * after resuming. Delay 200ms before debouncing. 3829 ata_link_printk(link, KERN_ERR,
3806 */ 3830 "failed to resume link (SControl %X)\n",
3807 msleep(200); 3831 scontrol);
3832 return 0;
3833 }
3834
3835 if (tries < ATA_LINK_RESUME_TRIES)
3836 ata_link_printk(link, KERN_WARNING,
3837 "link resume succeeded after %d retries\n",
3838 ATA_LINK_RESUME_TRIES - tries);
3808 3839
3809 if ((rc = sata_link_debounce(link, params, deadline))) 3840 if ((rc = sata_link_debounce(link, params, deadline)))
3810 return rc; 3841 return rc;
@@ -4156,36 +4187,51 @@ int ata_dev_revalidate(struct ata_device *dev, unsigned int new_class,
4156 goto fail; 4187 goto fail;
4157 4188
4158 /* verify n_sectors hasn't changed */ 4189 /* verify n_sectors hasn't changed */
4159 if (dev->class == ATA_DEV_ATA && n_sectors && 4190 if (dev->class != ATA_DEV_ATA || !n_sectors ||
4160 dev->n_sectors != n_sectors) { 4191 dev->n_sectors == n_sectors)
4161 ata_dev_printk(dev, KERN_WARNING, "n_sectors mismatch " 4192 return 0;
4162 "%llu != %llu\n", 4193
4163 (unsigned long long)n_sectors, 4194 /* n_sectors has changed */
4164 (unsigned long long)dev->n_sectors); 4195 ata_dev_printk(dev, KERN_WARNING, "n_sectors mismatch %llu != %llu\n",
4165 /* 4196 (unsigned long long)n_sectors,
4166 * Something could have caused HPA to be unlocked 4197 (unsigned long long)dev->n_sectors);
4167 * involuntarily. If n_native_sectors hasn't changed 4198
4168 * and the new size matches it, keep the device. 4199 /*
4169 */ 4200 * Something could have caused HPA to be unlocked
4170 if (dev->n_native_sectors == n_native_sectors && 4201 * involuntarily. If n_native_sectors hasn't changed and the
4171 dev->n_sectors > n_sectors && 4202 * new size matches it, keep the device.
4172 dev->n_sectors == n_native_sectors) { 4203 */
4173 ata_dev_printk(dev, KERN_WARNING, 4204 if (dev->n_native_sectors == n_native_sectors &&
4174 "new n_sectors matches native, probably " 4205 dev->n_sectors > n_sectors && dev->n_sectors == n_native_sectors) {
4175 "late HPA unlock, continuing\n"); 4206 ata_dev_printk(dev, KERN_WARNING,
4176 /* keep using the old n_sectors */ 4207 "new n_sectors matches native, probably "
4177 dev->n_sectors = n_sectors; 4208 "late HPA unlock, continuing\n");
4178 } else { 4209 /* keep using the old n_sectors */
4179 /* restore original n_[native]_sectors and fail */ 4210 dev->n_sectors = n_sectors;
4180 dev->n_native_sectors = n_native_sectors; 4211 return 0;
4181 dev->n_sectors = n_sectors;
4182 rc = -ENODEV;
4183 goto fail;
4184 }
4185 } 4212 }
4186 4213
4187 return 0; 4214 /*
4215 * Some BIOSes boot w/o HPA but resume w/ HPA locked. Try
4216 * unlocking HPA in those cases.
4217 *
4218 * https://bugzilla.kernel.org/show_bug.cgi?id=15396
4219 */
4220 if (dev->n_native_sectors == n_native_sectors &&
4221 dev->n_sectors < n_sectors && n_sectors == n_native_sectors &&
4222 !(dev->horkage & ATA_HORKAGE_BROKEN_HPA)) {
4223 ata_dev_printk(dev, KERN_WARNING,
4224 "old n_sectors matches native, probably "
4225 "late HPA lock, will try to unlock HPA\n");
4226 /* try unlocking HPA */
4227 dev->flags |= ATA_DFLAG_UNLOCK_HPA;
4228 rc = -EIO;
4229 } else
4230 rc = -ENODEV;
4188 4231
4232 /* restore original n_[native_]sectors and fail */
4233 dev->n_native_sectors = n_native_sectors;
4234 dev->n_sectors = n_sectors;
4189 fail: 4235 fail:
4190 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc); 4236 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
4191 return rc; 4237 return rc;
@@ -4324,6 +4370,9 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = {
4324 { "HTS541080G9SA00", "MB4OC60D", ATA_HORKAGE_NONCQ, }, 4370 { "HTS541080G9SA00", "MB4OC60D", ATA_HORKAGE_NONCQ, },
4325 { "HTS541010G9SA00", "MBZOC60D", ATA_HORKAGE_NONCQ, }, 4371 { "HTS541010G9SA00", "MBZOC60D", ATA_HORKAGE_NONCQ, },
4326 4372
4373 /* https://bugzilla.kernel.org/show_bug.cgi?id=15573 */
4374 { "C300-CTFDDAC128MAG", "0001", ATA_HORKAGE_NONCQ, },
4375
4327 /* devices which puke on READ_NATIVE_MAX */ 4376 /* devices which puke on READ_NATIVE_MAX */
4328 { "HDS724040KLSA80", "KFAOA20N", ATA_HORKAGE_BROKEN_HPA, }, 4377 { "HDS724040KLSA80", "KFAOA20N", ATA_HORKAGE_BROKEN_HPA, },
4329 { "WDC WD3200JD-00KLB0", "WD-WCAMR1130137", ATA_HORKAGE_BROKEN_HPA }, 4378 { "WDC WD3200JD-00KLB0", "WD-WCAMR1130137", ATA_HORKAGE_BROKEN_HPA },
@@ -6616,6 +6665,13 @@ static int __init ata_init(void)
6616{ 6665{
6617 ata_parse_force_param(); 6666 ata_parse_force_param();
6618 6667
6668 /*
6669 * FIXME: In UP case, there is only one workqueue thread and if you
6670 * have more than one PIO device, latency is bloody awful, with
6671 * occasional multi-second "hiccups" as one PIO device waits for
6672 * another. It's an ugly wart that users DO occasionally complain
6673 * about; luckily most users have at most one PIO polled device.
6674 */
6619 ata_wq = create_workqueue("ata"); 6675 ata_wq = create_workqueue("ata");
6620 if (!ata_wq) 6676 if (!ata_wq)
6621 goto free_force_tbl; 6677 goto free_force_tbl;
diff --git a/drivers/ata/libata-eh.c b/drivers/ata/libata-eh.c
index bba2ae5df1c2..228740f356c9 100644
--- a/drivers/ata/libata-eh.c
+++ b/drivers/ata/libata-eh.c
@@ -110,6 +110,13 @@ static const unsigned long ata_eh_identify_timeouts[] = {
110 ULONG_MAX, 110 ULONG_MAX,
111}; 111};
112 112
113static const unsigned long ata_eh_flush_timeouts[] = {
114 15000, /* be generous with flush */
115 15000, /* ditto */
116 30000, /* and even more generous */
117 ULONG_MAX,
118};
119
113static const unsigned long ata_eh_other_timeouts[] = { 120static const unsigned long ata_eh_other_timeouts[] = {
114 5000, /* same rationale as identify timeout */ 121 5000, /* same rationale as identify timeout */
115 10000, /* ditto */ 122 10000, /* ditto */
@@ -147,6 +154,8 @@ ata_eh_cmd_timeout_table[ATA_EH_CMD_TIMEOUT_TABLE_SIZE] = {
147 .timeouts = ata_eh_other_timeouts, }, 154 .timeouts = ata_eh_other_timeouts, },
148 { .commands = CMDS(ATA_CMD_INIT_DEV_PARAMS), 155 { .commands = CMDS(ATA_CMD_INIT_DEV_PARAMS),
149 .timeouts = ata_eh_other_timeouts, }, 156 .timeouts = ata_eh_other_timeouts, },
157 { .commands = CMDS(ATA_CMD_FLUSH, ATA_CMD_FLUSH_EXT),
158 .timeouts = ata_eh_flush_timeouts },
150}; 159};
151#undef CMDS 160#undef CMDS
152 161
@@ -870,6 +879,8 @@ static void ata_eh_set_pending(struct ata_port *ap, int fastdrain)
870void ata_qc_schedule_eh(struct ata_queued_cmd *qc) 879void ata_qc_schedule_eh(struct ata_queued_cmd *qc)
871{ 880{
872 struct ata_port *ap = qc->ap; 881 struct ata_port *ap = qc->ap;
882 struct request_queue *q = qc->scsicmd->device->request_queue;
883 unsigned long flags;
873 884
874 WARN_ON(!ap->ops->error_handler); 885 WARN_ON(!ap->ops->error_handler);
875 886
@@ -881,7 +892,9 @@ void ata_qc_schedule_eh(struct ata_queued_cmd *qc)
881 * Note that ATA_QCFLAG_FAILED is unconditionally set after 892 * Note that ATA_QCFLAG_FAILED is unconditionally set after
882 * this function completes. 893 * this function completes.
883 */ 894 */
895 spin_lock_irqsave(q->queue_lock, flags);
884 blk_abort_request(qc->scsicmd->request); 896 blk_abort_request(qc->scsicmd->request);
897 spin_unlock_irqrestore(q->queue_lock, flags);
885} 898}
886 899
887/** 900/**
@@ -1615,6 +1628,7 @@ void ata_eh_analyze_ncq_error(struct ata_link *link)
1615 } 1628 }
1616 1629
1617 /* okay, this error is ours */ 1630 /* okay, this error is ours */
1631 memset(&tf, 0, sizeof(tf));
1618 rc = ata_eh_read_log_10h(dev, &tag, &tf); 1632 rc = ata_eh_read_log_10h(dev, &tag, &tf);
1619 if (rc) { 1633 if (rc) {
1620 ata_link_printk(link, KERN_ERR, "failed to read log page 10h " 1634 ata_link_printk(link, KERN_ERR, "failed to read log page 10h "
@@ -2019,8 +2033,9 @@ static void ata_eh_link_autopsy(struct ata_link *link)
2019 qc->err_mask &= ~(AC_ERR_DEV | AC_ERR_OTHER); 2033 qc->err_mask &= ~(AC_ERR_DEV | AC_ERR_OTHER);
2020 2034
2021 /* determine whether the command is worth retrying */ 2035 /* determine whether the command is worth retrying */
2022 if (!(qc->err_mask & AC_ERR_INVALID) && 2036 if (qc->flags & ATA_QCFLAG_IO ||
2023 ((qc->flags & ATA_QCFLAG_IO) || qc->err_mask != AC_ERR_DEV)) 2037 (!(qc->err_mask & AC_ERR_INVALID) &&
2038 qc->err_mask != AC_ERR_DEV))
2024 qc->flags |= ATA_QCFLAG_RETRY; 2039 qc->flags |= ATA_QCFLAG_RETRY;
2025 2040
2026 /* accumulate error info */ 2041 /* accumulate error info */
@@ -3112,6 +3127,82 @@ static int atapi_eh_clear_ua(struct ata_device *dev)
3112 return 0; 3127 return 0;
3113} 3128}
3114 3129
3130/**
3131 * ata_eh_maybe_retry_flush - Retry FLUSH if necessary
3132 * @dev: ATA device which may need FLUSH retry
3133 *
3134 * If @dev failed FLUSH, it needs to be reported upper layer
3135 * immediately as it means that @dev failed to remap and already
3136 * lost at least a sector and further FLUSH retrials won't make
3137 * any difference to the lost sector. However, if FLUSH failed
3138 * for other reasons, for example transmission error, FLUSH needs
3139 * to be retried.
3140 *
3141 * This function determines whether FLUSH failure retry is
3142 * necessary and performs it if so.
3143 *
3144 * RETURNS:
3145 * 0 if EH can continue, -errno if EH needs to be repeated.
3146 */
3147static int ata_eh_maybe_retry_flush(struct ata_device *dev)
3148{
3149 struct ata_link *link = dev->link;
3150 struct ata_port *ap = link->ap;
3151 struct ata_queued_cmd *qc;
3152 struct ata_taskfile tf;
3153 unsigned int err_mask;
3154 int rc = 0;
3155
3156 /* did flush fail for this device? */
3157 if (!ata_tag_valid(link->active_tag))
3158 return 0;
3159
3160 qc = __ata_qc_from_tag(ap, link->active_tag);
3161 if (qc->dev != dev || (qc->tf.command != ATA_CMD_FLUSH_EXT &&
3162 qc->tf.command != ATA_CMD_FLUSH))
3163 return 0;
3164
3165 /* if the device failed it, it should be reported to upper layers */
3166 if (qc->err_mask & AC_ERR_DEV)
3167 return 0;
3168
3169 /* flush failed for some other reason, give it another shot */
3170 ata_tf_init(dev, &tf);
3171
3172 tf.command = qc->tf.command;
3173 tf.flags |= ATA_TFLAG_DEVICE;
3174 tf.protocol = ATA_PROT_NODATA;
3175
3176 ata_dev_printk(dev, KERN_WARNING, "retrying FLUSH 0x%x Emask 0x%x\n",
3177 tf.command, qc->err_mask);
3178
3179 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
3180 if (!err_mask) {
3181 /*
3182 * FLUSH is complete but there's no way to
3183 * successfully complete a failed command from EH.
3184 * Making sure retry is allowed at least once and
3185 * retrying it should do the trick - whatever was in
3186 * the cache is already on the platter and this won't
3187 * cause infinite loop.
3188 */
3189 qc->scsicmd->allowed = max(qc->scsicmd->allowed, 1);
3190 } else {
3191 ata_dev_printk(dev, KERN_WARNING, "FLUSH failed Emask 0x%x\n",
3192 err_mask);
3193 rc = -EIO;
3194
3195 /* if device failed it, report it to upper layers */
3196 if (err_mask & AC_ERR_DEV) {
3197 qc->err_mask |= AC_ERR_DEV;
3198 qc->result_tf = tf;
3199 if (!(ap->pflags & ATA_PFLAG_FROZEN))
3200 rc = 0;
3201 }
3202 }
3203 return rc;
3204}
3205
3115static int ata_link_nr_enabled(struct ata_link *link) 3206static int ata_link_nr_enabled(struct ata_link *link)
3116{ 3207{
3117 struct ata_device *dev; 3208 struct ata_device *dev;
@@ -3455,6 +3546,15 @@ int ata_eh_recover(struct ata_port *ap, ata_prereset_fn_t prereset,
3455 } 3546 }
3456 } 3547 }
3457 3548
3549 /* retry flush if necessary */
3550 ata_for_each_dev(dev, link, ALL) {
3551 if (dev->class != ATA_DEV_ATA)
3552 continue;
3553 rc = ata_eh_maybe_retry_flush(dev);
3554 if (rc)
3555 goto dev_fail;
3556 }
3557
3458 /* configure link power saving */ 3558 /* configure link power saving */
3459 if (ehc->i.action & ATA_EH_LPM) 3559 if (ehc->i.action & ATA_EH_LPM)
3460 ata_for_each_dev(dev, link, ALL) 3560 ata_for_each_dev(dev, link, ALL)
diff --git a/drivers/ata/libata-pmp.c b/drivers/ata/libata-pmp.c
index 51f0ffb78cbd..00305f41ed86 100644
--- a/drivers/ata/libata-pmp.c
+++ b/drivers/ata/libata-pmp.c
@@ -9,6 +9,7 @@
9 9
10#include <linux/kernel.h> 10#include <linux/kernel.h>
11#include <linux/libata.h> 11#include <linux/libata.h>
12#include <linux/slab.h>
12#include "libata.h" 13#include "libata.h"
13 14
14const struct ata_port_operations sata_pmp_port_ops = { 15const struct ata_port_operations sata_pmp_port_ops = {
diff --git a/drivers/ata/libata-scsi.c b/drivers/ata/libata-scsi.c
index b4ee28dec521..0088cdeb0b1e 100644
--- a/drivers/ata/libata-scsi.c
+++ b/drivers/ata/libata-scsi.c
@@ -33,6 +33,7 @@
33 * 33 *
34 */ 34 */
35 35
36#include <linux/slab.h>
36#include <linux/kernel.h> 37#include <linux/kernel.h>
37#include <linux/blkdev.h> 38#include <linux/blkdev.h>
38#include <linux/spinlock.h> 39#include <linux/spinlock.h>
@@ -47,6 +48,7 @@
47#include <linux/hdreg.h> 48#include <linux/hdreg.h>
48#include <linux/uaccess.h> 49#include <linux/uaccess.h>
49#include <linux/suspend.h> 50#include <linux/suspend.h>
51#include <asm/unaligned.h>
50 52
51#include "libata.h" 53#include "libata.h"
52 54
@@ -154,8 +156,7 @@ static ssize_t ata_scsi_lpm_put(struct device *dev,
154 */ 156 */
155 for (i = 1; i < ARRAY_SIZE(link_pm_policy); i++) { 157 for (i = 1; i < ARRAY_SIZE(link_pm_policy); i++) {
156 const int len = strlen(link_pm_policy[i].name); 158 const int len = strlen(link_pm_policy[i].name);
157 if (strncmp(link_pm_policy[i].name, buf, len) == 0 && 159 if (strncmp(link_pm_policy[i].name, buf, len) == 0) {
158 buf[len] == '\n') {
159 policy = link_pm_policy[i].value; 160 policy = link_pm_policy[i].value;
160 break; 161 break;
161 } 162 }
@@ -1097,7 +1098,7 @@ static int ata_scsi_dev_config(struct scsi_device *sdev,
1097 dev->flags |= ATA_DFLAG_NO_UNLOAD; 1098 dev->flags |= ATA_DFLAG_NO_UNLOAD;
1098 1099
1099 /* configure max sectors */ 1100 /* configure max sectors */
1100 blk_queue_max_sectors(sdev->request_queue, dev->max_sectors); 1101 blk_queue_max_hw_sectors(sdev->request_queue, dev->max_sectors);
1101 1102
1102 if (dev->class == ATA_DEV_ATAPI) { 1103 if (dev->class == ATA_DEV_ATAPI) {
1103 struct request_queue *q = sdev->request_queue; 1104 struct request_queue *q = sdev->request_queue;
@@ -1208,6 +1209,7 @@ void ata_scsi_slave_destroy(struct scsi_device *sdev)
1208 * ata_scsi_change_queue_depth - SCSI callback for queue depth config 1209 * ata_scsi_change_queue_depth - SCSI callback for queue depth config
1209 * @sdev: SCSI device to configure queue depth for 1210 * @sdev: SCSI device to configure queue depth for
1210 * @queue_depth: new queue depth 1211 * @queue_depth: new queue depth
1212 * @reason: calling context
1211 * 1213 *
1212 * This is libata standard hostt->change_queue_depth callback. 1214 * This is libata standard hostt->change_queue_depth callback.
1213 * SCSI will call into this callback when user tries to set queue 1215 * SCSI will call into this callback when user tries to set queue
@@ -1219,12 +1221,16 @@ void ata_scsi_slave_destroy(struct scsi_device *sdev)
1219 * RETURNS: 1221 * RETURNS:
1220 * Newly configured queue depth. 1222 * Newly configured queue depth.
1221 */ 1223 */
1222int ata_scsi_change_queue_depth(struct scsi_device *sdev, int queue_depth) 1224int ata_scsi_change_queue_depth(struct scsi_device *sdev, int queue_depth,
1225 int reason)
1223{ 1226{
1224 struct ata_port *ap = ata_shost_to_port(sdev->host); 1227 struct ata_port *ap = ata_shost_to_port(sdev->host);
1225 struct ata_device *dev; 1228 struct ata_device *dev;
1226 unsigned long flags; 1229 unsigned long flags;
1227 1230
1231 if (reason != SCSI_QDEPTH_DEFAULT)
1232 return -EOPNOTSUPP;
1233
1228 if (queue_depth < 1 || queue_depth == sdev->queue_depth) 1234 if (queue_depth < 1 || queue_depth == sdev->queue_depth)
1229 return sdev->queue_depth; 1235 return sdev->queue_depth;
1230 1236
@@ -1964,6 +1970,7 @@ static unsigned int ata_scsiop_inq_00(struct ata_scsi_args *args, u8 *rbuf)
1964 0x80, /* page 0x80, unit serial no page */ 1970 0x80, /* page 0x80, unit serial no page */
1965 0x83, /* page 0x83, device ident page */ 1971 0x83, /* page 0x83, device ident page */
1966 0x89, /* page 0x89, ata info page */ 1972 0x89, /* page 0x89, ata info page */
1973 0xb0, /* page 0xb0, block limits page */
1967 0xb1, /* page 0xb1, block device characteristics page */ 1974 0xb1, /* page 0xb1, block device characteristics page */
1968 }; 1975 };
1969 1976
@@ -2085,6 +2092,43 @@ static unsigned int ata_scsiop_inq_89(struct ata_scsi_args *args, u8 *rbuf)
2085 return 0; 2092 return 0;
2086} 2093}
2087 2094
2095static unsigned int ata_scsiop_inq_b0(struct ata_scsi_args *args, u8 *rbuf)
2096{
2097 u32 min_io_sectors;
2098
2099 rbuf[1] = 0xb0;
2100 rbuf[3] = 0x3c; /* required VPD size with unmap support */
2101
2102 /*
2103 * Optimal transfer length granularity.
2104 *
2105 * This is always one physical block, but for disks with a smaller
2106 * logical than physical sector size we need to figure out what the
2107 * latter is.
2108 */
2109 if (ata_id_has_large_logical_sectors(args->id))
2110 min_io_sectors = ata_id_logical_per_physical_sectors(args->id);
2111 else
2112 min_io_sectors = 1;
2113 put_unaligned_be16(min_io_sectors, &rbuf[6]);
2114
2115 /*
2116 * Optimal unmap granularity.
2117 *
2118 * The ATA spec doesn't even know about a granularity or alignment
2119 * for the TRIM command. We can leave away most of the unmap related
2120 * VPD page entries, but we have specifify a granularity to signal
2121 * that we support some form of unmap - in thise case via WRITE SAME
2122 * with the unmap bit set.
2123 */
2124 if (ata_id_has_trim(args->id)) {
2125 put_unaligned_be32(65535 * 512 / 8, &rbuf[20]);
2126 put_unaligned_be32(1, &rbuf[28]);
2127 }
2128
2129 return 0;
2130}
2131
2088static unsigned int ata_scsiop_inq_b1(struct ata_scsi_args *args, u8 *rbuf) 2132static unsigned int ata_scsiop_inq_b1(struct ata_scsi_args *args, u8 *rbuf)
2089{ 2133{
2090 int form_factor = ata_id_form_factor(args->id); 2134 int form_factor = ata_id_form_factor(args->id);
@@ -2374,6 +2418,13 @@ static unsigned int ata_scsiop_read_cap(struct ata_scsi_args *args, u8 *rbuf)
2374 rbuf[13] = log_per_phys; 2418 rbuf[13] = log_per_phys;
2375 rbuf[14] = (lowest_aligned >> 8) & 0x3f; 2419 rbuf[14] = (lowest_aligned >> 8) & 0x3f;
2376 rbuf[15] = lowest_aligned; 2420 rbuf[15] = lowest_aligned;
2421
2422 if (ata_id_has_trim(args->id)) {
2423 rbuf[14] |= 0x80; /* TPE */
2424
2425 if (ata_id_has_zero_after_trim(args->id))
2426 rbuf[14] |= 0x40; /* TPRZ */
2427 }
2377 } 2428 }
2378 2429
2379 return 0; 2430 return 0;
@@ -2825,7 +2876,7 @@ static unsigned int ata_scsi_pass_thru(struct ata_queued_cmd *qc)
2825 * write indication (used for PIO/DMA setup), result TF is 2876 * write indication (used for PIO/DMA setup), result TF is
2826 * copied back and we don't whine too much about its failure. 2877 * copied back and we don't whine too much about its failure.
2827 */ 2878 */
2828 tf->flags = ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; 2879 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2829 if (scmd->sc_data_direction == DMA_TO_DEVICE) 2880 if (scmd->sc_data_direction == DMA_TO_DEVICE)
2830 tf->flags |= ATA_TFLAG_WRITE; 2881 tf->flags |= ATA_TFLAG_WRITE;
2831 2882
@@ -2896,6 +2947,58 @@ static unsigned int ata_scsi_pass_thru(struct ata_queued_cmd *qc)
2896 return 1; 2947 return 1;
2897} 2948}
2898 2949
2950static unsigned int ata_scsi_write_same_xlat(struct ata_queued_cmd *qc)
2951{
2952 struct ata_taskfile *tf = &qc->tf;
2953 struct scsi_cmnd *scmd = qc->scsicmd;
2954 struct ata_device *dev = qc->dev;
2955 const u8 *cdb = scmd->cmnd;
2956 u64 block;
2957 u32 n_block;
2958 u32 size;
2959 void *buf;
2960
2961 /* we may not issue DMA commands if no DMA mode is set */
2962 if (unlikely(!dev->dma_mode))
2963 goto invalid_fld;
2964
2965 if (unlikely(scmd->cmd_len < 16))
2966 goto invalid_fld;
2967 scsi_16_lba_len(cdb, &block, &n_block);
2968
2969 /* for now we only support WRITE SAME with the unmap bit set */
2970 if (unlikely(!(cdb[1] & 0x8)))
2971 goto invalid_fld;
2972
2973 /*
2974 * WRITE SAME always has a sector sized buffer as payload, this
2975 * should never be a multiple entry S/G list.
2976 */
2977 if (!scsi_sg_count(scmd))
2978 goto invalid_fld;
2979
2980 buf = page_address(sg_page(scsi_sglist(scmd)));
2981 size = ata_set_lba_range_entries(buf, 512, block, n_block);
2982
2983 tf->protocol = ATA_PROT_DMA;
2984 tf->hob_feature = 0;
2985 tf->feature = ATA_DSM_TRIM;
2986 tf->hob_nsect = (size / 512) >> 8;
2987 tf->nsect = size / 512;
2988 tf->command = ATA_CMD_DSM;
2989 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE | ATA_TFLAG_LBA48 |
2990 ATA_TFLAG_WRITE;
2991
2992 ata_qc_set_pc_nbytes(qc);
2993
2994 return 0;
2995
2996 invalid_fld:
2997 ata_scsi_set_sense(scmd, ILLEGAL_REQUEST, 0x24, 0x00);
2998 /* "Invalid field in cdb" */
2999 return 1;
3000}
3001
2899/** 3002/**
2900 * ata_get_xlat_func - check if SCSI to ATA translation is possible 3003 * ata_get_xlat_func - check if SCSI to ATA translation is possible
2901 * @dev: ATA device 3004 * @dev: ATA device
@@ -2920,6 +3023,9 @@ static inline ata_xlat_func_t ata_get_xlat_func(struct ata_device *dev, u8 cmd)
2920 case WRITE_16: 3023 case WRITE_16:
2921 return ata_scsi_rw_xlat; 3024 return ata_scsi_rw_xlat;
2922 3025
3026 case WRITE_SAME_16:
3027 return ata_scsi_write_same_xlat;
3028
2923 case SYNCHRONIZE_CACHE: 3029 case SYNCHRONIZE_CACHE:
2924 if (ata_try_flush_cache(dev)) 3030 if (ata_try_flush_cache(dev))
2925 return ata_scsi_flush_xlat; 3031 return ata_scsi_flush_xlat;
@@ -3109,6 +3215,9 @@ void ata_scsi_simulate(struct ata_device *dev, struct scsi_cmnd *cmd,
3109 case 0x89: 3215 case 0x89:
3110 ata_scsi_rbuf_fill(&args, ata_scsiop_inq_89); 3216 ata_scsi_rbuf_fill(&args, ata_scsiop_inq_89);
3111 break; 3217 break;
3218 case 0xb0:
3219 ata_scsi_rbuf_fill(&args, ata_scsiop_inq_b0);
3220 break;
3112 case 0xb1: 3221 case 0xb1:
3113 ata_scsi_rbuf_fill(&args, ata_scsiop_inq_b1); 3222 ata_scsi_rbuf_fill(&args, ata_scsiop_inq_b1);
3114 break; 3223 break;
diff --git a/drivers/ata/libata-sff.c b/drivers/ata/libata-sff.c
index bbbb1fab1755..e3877b6843c9 100644
--- a/drivers/ata/libata-sff.c
+++ b/drivers/ata/libata-sff.c
@@ -33,6 +33,7 @@
33 */ 33 */
34 34
35#include <linux/kernel.h> 35#include <linux/kernel.h>
36#include <linux/gfp.h>
36#include <linux/pci.h> 37#include <linux/pci.h>
37#include <linux/libata.h> 38#include <linux/libata.h>
38#include <linux/highmem.h> 39#include <linux/highmem.h>
@@ -736,7 +737,7 @@ unsigned int ata_sff_data_xfer(struct ata_device *dev, unsigned char *buf,
736 737
737 /* 738 /*
738 * Use io*16_rep() accessors here as well to avoid pointlessly 739 * Use io*16_rep() accessors here as well to avoid pointlessly
739 * swapping bytes to and fro on the big endian machines... 740 * swapping bytes to and from on the big endian machines...
740 */ 741 */
741 if (rw == READ) { 742 if (rw == READ) {
742 ioread16_rep(data_addr, pad, 1); 743 ioread16_rep(data_addr, pad, 1);
@@ -776,7 +777,7 @@ unsigned int ata_sff_data_xfer32(struct ata_device *dev, unsigned char *buf,
776 void __iomem *data_addr = ap->ioaddr.data_addr; 777 void __iomem *data_addr = ap->ioaddr.data_addr;
777 unsigned int words = buflen >> 2; 778 unsigned int words = buflen >> 2;
778 int slop = buflen & 3; 779 int slop = buflen & 3;
779 780
780 if (!(ap->pflags & ATA_PFLAG_PIO32)) 781 if (!(ap->pflags & ATA_PFLAG_PIO32))
781 return ata_sff_data_xfer(dev, buf, buflen, rw); 782 return ata_sff_data_xfer(dev, buf, buflen, rw);
782 783
@@ -795,7 +796,7 @@ unsigned int ata_sff_data_xfer32(struct ata_device *dev, unsigned char *buf,
795 796
796 /* 797 /*
797 * Use io*_rep() accessors here as well to avoid pointlessly 798 * Use io*_rep() accessors here as well to avoid pointlessly
798 * swapping bytes to and fro on the big endian machines... 799 * swapping bytes to and from on the big endian machines...
799 */ 800 */
800 if (rw == READ) { 801 if (rw == READ) {
801 if (slop < 3) 802 if (slop < 3)
@@ -893,6 +894,9 @@ static void ata_pio_sector(struct ata_queued_cmd *qc)
893 do_write); 894 do_write);
894 } 895 }
895 896
897 if (!do_write)
898 flush_dcache_page(page);
899
896 qc->curbytes += qc->sect_size; 900 qc->curbytes += qc->sect_size;
897 qc->cursg_ofs += qc->sect_size; 901 qc->cursg_ofs += qc->sect_size;
898 902
@@ -1664,6 +1668,7 @@ unsigned int ata_sff_host_intr(struct ata_port *ap,
1664{ 1668{
1665 struct ata_eh_info *ehi = &ap->link.eh_info; 1669 struct ata_eh_info *ehi = &ap->link.eh_info;
1666 u8 status, host_stat = 0; 1670 u8 status, host_stat = 0;
1671 bool bmdma_stopped = false;
1667 1672
1668 VPRINTK("ata%u: protocol %d task_state %d\n", 1673 VPRINTK("ata%u: protocol %d task_state %d\n",
1669 ap->print_id, qc->tf.protocol, ap->hsm_task_state); 1674 ap->print_id, qc->tf.protocol, ap->hsm_task_state);
@@ -1696,6 +1701,7 @@ unsigned int ata_sff_host_intr(struct ata_port *ap,
1696 1701
1697 /* before we do anything else, clear DMA-Start bit */ 1702 /* before we do anything else, clear DMA-Start bit */
1698 ap->ops->bmdma_stop(qc); 1703 ap->ops->bmdma_stop(qc);
1704 bmdma_stopped = true;
1699 1705
1700 if (unlikely(host_stat & ATA_DMA_ERR)) { 1706 if (unlikely(host_stat & ATA_DMA_ERR)) {
1701 /* error when transfering data to/from memory */ 1707 /* error when transfering data to/from memory */
@@ -1713,8 +1719,14 @@ unsigned int ata_sff_host_intr(struct ata_port *ap,
1713 1719
1714 /* check main status, clearing INTRQ if needed */ 1720 /* check main status, clearing INTRQ if needed */
1715 status = ata_sff_irq_status(ap); 1721 status = ata_sff_irq_status(ap);
1716 if (status & ATA_BUSY) 1722 if (status & ATA_BUSY) {
1717 goto idle_irq; 1723 if (bmdma_stopped) {
1724 /* BMDMA engine is already stopped, we're screwed */
1725 qc->err_mask |= AC_ERR_HSM;
1726 ap->hsm_task_state = HSM_ST_ERR;
1727 } else
1728 goto idle_irq;
1729 }
1718 1730
1719 /* ack bmdma irq events */ 1731 /* ack bmdma irq events */
1720 ap->ops->sff_irq_clear(ap); 1732 ap->ops->sff_irq_clear(ap);
@@ -1759,25 +1771,68 @@ EXPORT_SYMBOL_GPL(ata_sff_host_intr);
1759irqreturn_t ata_sff_interrupt(int irq, void *dev_instance) 1771irqreturn_t ata_sff_interrupt(int irq, void *dev_instance)
1760{ 1772{
1761 struct ata_host *host = dev_instance; 1773 struct ata_host *host = dev_instance;
1774 bool retried = false;
1762 unsigned int i; 1775 unsigned int i;
1763 unsigned int handled = 0; 1776 unsigned int handled, idle, polling;
1764 unsigned long flags; 1777 unsigned long flags;
1765 1778
1766 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */ 1779 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
1767 spin_lock_irqsave(&host->lock, flags); 1780 spin_lock_irqsave(&host->lock, flags);
1768 1781
1782retry:
1783 handled = idle = polling = 0;
1769 for (i = 0; i < host->n_ports; i++) { 1784 for (i = 0; i < host->n_ports; i++) {
1770 struct ata_port *ap; 1785 struct ata_port *ap = host->ports[i];
1786 struct ata_queued_cmd *qc;
1771 1787
1772 ap = host->ports[i]; 1788 if (unlikely(ap->flags & ATA_FLAG_DISABLED))
1773 if (ap && 1789 continue;
1774 !(ap->flags & ATA_FLAG_DISABLED)) {
1775 struct ata_queued_cmd *qc;
1776 1790
1777 qc = ata_qc_from_tag(ap, ap->link.active_tag); 1791 qc = ata_qc_from_tag(ap, ap->link.active_tag);
1778 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) && 1792 if (qc) {
1779 (qc->flags & ATA_QCFLAG_ACTIVE)) 1793 if (!(qc->tf.flags & ATA_TFLAG_POLLING))
1780 handled |= ata_sff_host_intr(ap, qc); 1794 handled |= ata_sff_host_intr(ap, qc);
1795 else
1796 polling |= 1 << i;
1797 } else
1798 idle |= 1 << i;
1799 }
1800
1801 /*
1802 * If no port was expecting IRQ but the controller is actually
1803 * asserting IRQ line, nobody cared will ensue. Check IRQ
1804 * pending status if available and clear spurious IRQ.
1805 */
1806 if (!handled && !retried) {
1807 bool retry = false;
1808
1809 for (i = 0; i < host->n_ports; i++) {
1810 struct ata_port *ap = host->ports[i];
1811
1812 if (polling & (1 << i))
1813 continue;
1814
1815 if (!ap->ops->sff_irq_check ||
1816 !ap->ops->sff_irq_check(ap))
1817 continue;
1818
1819 if (idle & (1 << i)) {
1820 ap->ops->sff_check_status(ap);
1821 ap->ops->sff_irq_clear(ap);
1822 } else {
1823 /* clear INTRQ and check if BUSY cleared */
1824 if (!(ap->ops->sff_check_status(ap) & ATA_BUSY))
1825 retry |= true;
1826 /*
1827 * With command in flight, we can't do
1828 * sff_irq_clear() w/o racing with completion.
1829 */
1830 }
1831 }
1832
1833 if (retry) {
1834 retried = true;
1835 goto retry;
1781 } 1836 }
1782 } 1837 }
1783 1838
@@ -2258,7 +2313,7 @@ EXPORT_SYMBOL_GPL(ata_sff_postreset);
2258 * @qc: command 2313 * @qc: command
2259 * 2314 *
2260 * Drain the FIFO and device of any stuck data following a command 2315 * Drain the FIFO and device of any stuck data following a command
2261 * failing to complete. In some cases this is neccessary before a 2316 * failing to complete. In some cases this is necessary before a
2262 * reset will recover the device. 2317 * reset will recover the device.
2263 * 2318 *
2264 */ 2319 */
@@ -2275,7 +2330,7 @@ void ata_sff_drain_fifo(struct ata_queued_cmd *qc)
2275 ap = qc->ap; 2330 ap = qc->ap;
2276 /* Drain up to 64K of data before we give up this recovery method */ 2331 /* Drain up to 64K of data before we give up this recovery method */
2277 for (count = 0; (ap->ops->sff_check_status(ap) & ATA_DRQ) 2332 for (count = 0; (ap->ops->sff_check_status(ap) & ATA_DRQ)
2278 && count < 32768; count++) 2333 && count < 65536; count += 2)
2279 ioread16(ap->ioaddr.data_addr); 2334 ioread16(ap->ioaddr.data_addr);
2280 2335
2281 /* Can become DEBUG later */ 2336 /* Can become DEBUG later */
@@ -2384,7 +2439,7 @@ void ata_sff_post_internal_cmd(struct ata_queued_cmd *qc)
2384 ap->hsm_task_state = HSM_ST_IDLE; 2439 ap->hsm_task_state = HSM_ST_IDLE;
2385 2440
2386 if (ap->ioaddr.bmdma_addr) 2441 if (ap->ioaddr.bmdma_addr)
2387 ata_bmdma_stop(qc); 2442 ap->ops->bmdma_stop(qc);
2388 2443
2389 spin_unlock_irqrestore(ap->lock, flags); 2444 spin_unlock_irqrestore(ap->lock, flags);
2390} 2445}
@@ -3008,6 +3063,7 @@ EXPORT_SYMBOL_GPL(ata_pci_sff_activate_host);
3008 * @ppi: array of port_info, must be enough for two ports 3063 * @ppi: array of port_info, must be enough for two ports
3009 * @sht: scsi_host_template to use when registering the host 3064 * @sht: scsi_host_template to use when registering the host
3010 * @host_priv: host private_data 3065 * @host_priv: host private_data
3066 * @hflag: host flags
3011 * 3067 *
3012 * This is a helper function which can be called from a driver's 3068 * This is a helper function which can be called from a driver's
3013 * xxx_init_one() probe function if the hardware uses traditional 3069 * xxx_init_one() probe function if the hardware uses traditional
@@ -3028,8 +3084,8 @@ EXPORT_SYMBOL_GPL(ata_pci_sff_activate_host);
3028 * Zero on success, negative on errno-based value on error. 3084 * Zero on success, negative on errno-based value on error.
3029 */ 3085 */
3030int ata_pci_sff_init_one(struct pci_dev *pdev, 3086int ata_pci_sff_init_one(struct pci_dev *pdev,
3031 const struct ata_port_info * const *ppi, 3087 const struct ata_port_info * const *ppi,
3032 struct scsi_host_template *sht, void *host_priv) 3088 struct scsi_host_template *sht, void *host_priv, int hflag)
3033{ 3089{
3034 struct device *dev = &pdev->dev; 3090 struct device *dev = &pdev->dev;
3035 const struct ata_port_info *pi = NULL; 3091 const struct ata_port_info *pi = NULL;
@@ -3064,6 +3120,7 @@ int ata_pci_sff_init_one(struct pci_dev *pdev,
3064 if (rc) 3120 if (rc)
3065 goto out; 3121 goto out;
3066 host->private_data = host_priv; 3122 host->private_data = host_priv;
3123 host->flags |= hflag;
3067 3124
3068 pci_set_master(pdev); 3125 pci_set_master(pdev);
3069 rc = ata_pci_sff_activate_host(host, ata_sff_interrupt, sht); 3126 rc = ata_pci_sff_activate_host(host, ata_sff_interrupt, sht);
diff --git a/drivers/ata/pata_acpi.c b/drivers/ata/pata_acpi.c
index d8f35fe44421..1ea2be0f4b94 100644
--- a/drivers/ata/pata_acpi.c
+++ b/drivers/ata/pata_acpi.c
@@ -11,6 +11,7 @@
11#include <linux/blkdev.h> 11#include <linux/blkdev.h>
12#include <linux/delay.h> 12#include <linux/delay.h>
13#include <linux/device.h> 13#include <linux/device.h>
14#include <linux/gfp.h>
14#include <scsi/scsi_host.h> 15#include <scsi/scsi_host.h>
15#include <acpi/acpi_bus.h> 16#include <acpi/acpi_bus.h>
16 17
@@ -161,7 +162,7 @@ static void pacpi_set_dmamode(struct ata_port *ap, struct ata_device *adev)
161 * 162 *
162 * Called when the libata layer is about to issue a command. We wrap 163 * Called when the libata layer is about to issue a command. We wrap
163 * this interface so that we can load the correct ATA timings if 164 * this interface so that we can load the correct ATA timings if
164 * neccessary. 165 * necessary.
165 */ 166 */
166 167
167static unsigned int pacpi_qc_issue(struct ata_queued_cmd *qc) 168static unsigned int pacpi_qc_issue(struct ata_queued_cmd *qc)
@@ -259,7 +260,7 @@ static int pacpi_init_one (struct pci_dev *pdev, const struct pci_device_id *id)
259 return rc; 260 return rc;
260 pcim_pin_device(pdev); 261 pcim_pin_device(pdev);
261 } 262 }
262 return ata_pci_sff_init_one(pdev, ppi, &pacpi_sht, NULL); 263 return ata_pci_sff_init_one(pdev, ppi, &pacpi_sht, NULL, 0);
263} 264}
264 265
265static const struct pci_device_id pacpi_pci_tbl[] = { 266static const struct pci_device_id pacpi_pci_tbl[] = {
diff --git a/drivers/ata/pata_ali.c b/drivers/ata/pata_ali.c
index 1432dc9d0ab8..dc61b72f751c 100644
--- a/drivers/ata/pata_ali.c
+++ b/drivers/ata/pata_ali.c
@@ -159,8 +159,7 @@ static void ali_fifo_control(struct ata_port *ap, struct ata_device *adev, int o
159 * ali_program_modes - load mode registers 159 * ali_program_modes - load mode registers
160 * @ap: ALi channel to load 160 * @ap: ALi channel to load
161 * @adev: Device the timing is for 161 * @adev: Device the timing is for
162 * @cmd: Command timing 162 * @t: timing data
163 * @data: Data timing
164 * @ultra: UDMA timing or zero for off 163 * @ultra: UDMA timing or zero for off
165 * 164 *
166 * Loads the timing registers for cmd/data and disable UDMA if 165 * Loads the timing registers for cmd/data and disable UDMA if
@@ -202,8 +201,7 @@ static void ali_program_modes(struct ata_port *ap, struct ata_device *adev, stru
202 * @ap: ATA interface 201 * @ap: ATA interface
203 * @adev: ATA device 202 * @adev: ATA device
204 * 203 *
205 * Program the ALi registers for PIO mode. FIXME: add timings for 204 * Program the ALi registers for PIO mode.
206 * PIO5.
207 */ 205 */
208 206
209static void ali_set_piomode(struct ata_port *ap, struct ata_device *adev) 207static void ali_set_piomode(struct ata_port *ap, struct ata_device *adev)
@@ -237,7 +235,7 @@ static void ali_set_piomode(struct ata_port *ap, struct ata_device *adev)
237 * @ap: ATA interface 235 * @ap: ATA interface
238 * @adev: ATA device 236 * @adev: ATA device
239 * 237 *
240 * FIXME: MWDMA timings 238 * Program the ALi registers for DMA mode.
241 */ 239 */
242 240
243static void ali_set_dmamode(struct ata_port *ap, struct ata_device *adev) 241static void ali_set_dmamode(struct ata_port *ap, struct ata_device *adev)
@@ -453,7 +451,9 @@ static void ali_init_chipset(struct pci_dev *pdev)
453 /* Clear CD-ROM DMA write bit */ 451 /* Clear CD-ROM DMA write bit */
454 tmp &= 0x7F; 452 tmp &= 0x7F;
455 /* Cable and UDMA */ 453 /* Cable and UDMA */
456 pci_write_config_byte(pdev, 0x4B, tmp | 0x09); 454 if (pdev->revision >= 0xc2)
455 tmp |= 0x01;
456 pci_write_config_byte(pdev, 0x4B, tmp | 0x08);
457 /* 457 /*
458 * CD_ROM DMA on (0x53 bit 0). Enable this even if we want 458 * CD_ROM DMA on (0x53 bit 0). Enable this even if we want
459 * to use PIO. 0x53 bit 1 (rev 20 only) - enable FIFO control 459 * to use PIO. 0x53 bit 1 (rev 20 only) - enable FIFO control
@@ -583,7 +583,7 @@ static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
583 ppi[0] = &info_20_udma; 583 ppi[0] = &info_20_udma;
584 } 584 }
585 585
586 return ata_pci_sff_init_one(pdev, ppi, &ali_sht, NULL); 586 return ata_pci_sff_init_one(pdev, ppi, &ali_sht, NULL, 0);
587} 587}
588 588
589#ifdef CONFIG_PM 589#ifdef CONFIG_PM
diff --git a/drivers/ata/pata_amd.c b/drivers/ata/pata_amd.c
index 567f3f72774e..d95eca9c547e 100644
--- a/drivers/ata/pata_amd.c
+++ b/drivers/ata/pata_amd.c
@@ -574,7 +574,7 @@ static int amd_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
574 } 574 }
575 575
576 /* And fire it up */ 576 /* And fire it up */
577 return ata_pci_sff_init_one(pdev, ppi, &amd_sht, hpriv); 577 return ata_pci_sff_init_one(pdev, ppi, &amd_sht, hpriv, 0);
578} 578}
579 579
580#ifdef CONFIG_PM 580#ifdef CONFIG_PM
diff --git a/drivers/ata/pata_artop.c b/drivers/ata/pata_artop.c
index d332cfdb0f30..4d066d6c30fa 100644
--- a/drivers/ata/pata_artop.c
+++ b/drivers/ata/pata_artop.c
@@ -421,7 +421,7 @@ static int artop_init_one (struct pci_dev *pdev, const struct pci_device_id *id)
421 421
422 BUG_ON(ppi[0] == NULL); 422 BUG_ON(ppi[0] == NULL);
423 423
424 return ata_pci_sff_init_one(pdev, ppi, &artop_sht, NULL); 424 return ata_pci_sff_init_one(pdev, ppi, &artop_sht, NULL, 0);
425} 425}
426 426
427static const struct pci_device_id artop_pci_tbl[] = { 427static const struct pci_device_id artop_pci_tbl[] = {
diff --git a/drivers/ata/pata_at32.c b/drivers/ata/pata_at32.c
index 5c129f99a7e3..66ce6a526f27 100644
--- a/drivers/ata/pata_at32.c
+++ b/drivers/ata/pata_at32.c
@@ -18,6 +18,7 @@
18#include <linux/delay.h> 18#include <linux/delay.h>
19#include <linux/interrupt.h> 19#include <linux/interrupt.h>
20#include <linux/irq.h> 20#include <linux/irq.h>
21#include <linux/slab.h>
21#include <scsi/scsi_host.h> 22#include <scsi/scsi_host.h>
22#include <linux/ata.h> 23#include <linux/ata.h>
23#include <linux/libata.h> 24#include <linux/libata.h>
diff --git a/drivers/ata/pata_at91.c b/drivers/ata/pata_at91.c
index 41c94b1ae493..c6a946aa252c 100644
--- a/drivers/ata/pata_at91.c
+++ b/drivers/ata/pata_at91.c
@@ -19,6 +19,7 @@
19#include <linux/module.h> 19#include <linux/module.h>
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/blkdev.h> 21#include <linux/blkdev.h>
22#include <linux/gfp.h>
22#include <scsi/scsi_host.h> 23#include <scsi/scsi_host.h>
23#include <linux/ata.h> 24#include <linux/ata.h>
24#include <linux/clk.h> 25#include <linux/clk.h>
@@ -153,8 +154,8 @@ static void pata_at91_set_piomode(struct ata_port *ap, struct ata_device *adev)
153 /* Compute ATA timing and set it to SMC */ 154 /* Compute ATA timing and set it to SMC */
154 ret = ata_timing_compute(adev, adev->pio_mode, &timing, 1000, 0); 155 ret = ata_timing_compute(adev, adev->pio_mode, &timing, 1000, 0);
155 if (ret) { 156 if (ret) {
156 dev_warn(ap->dev, "Failed to compute ATA timing %d, \ 157 dev_warn(ap->dev, "Failed to compute ATA timing %d, "
157 set PIO_0 timing\n", ret); 158 "set PIO_0 timing\n", ret);
158 set_smc_timing(ap->dev, info, &initial_timing); 159 set_smc_timing(ap->dev, info, &initial_timing);
159 } else { 160 } else {
160 set_smc_timing(ap->dev, info, &timing); 161 set_smc_timing(ap->dev, info, &timing);
diff --git a/drivers/ata/pata_atiixp.c b/drivers/ata/pata_atiixp.c
index ae4454d4e955..cbaf2eddac6b 100644
--- a/drivers/ata/pata_atiixp.c
+++ b/drivers/ata/pata_atiixp.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * pata_atiixp.c - ATI PATA for new ATA layer 2 * pata_atiixp.c - ATI PATA for new ATA layer
3 * (C) 2005 Red Hat Inc 3 * (C) 2005 Red Hat Inc
4 * (C) 2009 Bartlomiej Zolnierkiewicz 4 * (C) 2009-2010 Bartlomiej Zolnierkiewicz
5 * 5 *
6 * Based on 6 * Based on
7 * 7 *
@@ -46,6 +46,8 @@ static int atiixp_cable_detect(struct ata_port *ap)
46 return ATA_CBL_PATA40; 46 return ATA_CBL_PATA40;
47} 47}
48 48
49static DEFINE_SPINLOCK(atiixp_lock);
50
49/** 51/**
50 * atiixp_set_pio_timing - set initial PIO mode data 52 * atiixp_set_pio_timing - set initial PIO mode data
51 * @ap: ATA interface 53 * @ap: ATA interface
@@ -88,7 +90,10 @@ static void atiixp_set_pio_timing(struct ata_port *ap, struct ata_device *adev,
88 90
89static void atiixp_set_piomode(struct ata_port *ap, struct ata_device *adev) 91static void atiixp_set_piomode(struct ata_port *ap, struct ata_device *adev)
90{ 92{
93 unsigned long flags;
94 spin_lock_irqsave(&atiixp_lock, flags);
91 atiixp_set_pio_timing(ap, adev, adev->pio_mode - XFER_PIO_0); 95 atiixp_set_pio_timing(ap, adev, adev->pio_mode - XFER_PIO_0);
96 spin_unlock_irqrestore(&atiixp_lock, flags);
92} 97}
93 98
94/** 99/**
@@ -108,6 +113,9 @@ static void atiixp_set_dmamode(struct ata_port *ap, struct ata_device *adev)
108 int dma = adev->dma_mode; 113 int dma = adev->dma_mode;
109 int dn = 2 * ap->port_no + adev->devno; 114 int dn = 2 * ap->port_no + adev->devno;
110 int wanted_pio; 115 int wanted_pio;
116 unsigned long flags;
117
118 spin_lock_irqsave(&atiixp_lock, flags);
111 119
112 if (adev->dma_mode >= XFER_UDMA_0) { 120 if (adev->dma_mode >= XFER_UDMA_0) {
113 u16 udma_mode_data; 121 u16 udma_mode_data;
@@ -145,6 +153,7 @@ static void atiixp_set_dmamode(struct ata_port *ap, struct ata_device *adev)
145 153
146 if (adev->pio_mode != wanted_pio) 154 if (adev->pio_mode != wanted_pio)
147 atiixp_set_pio_timing(ap, adev, wanted_pio); 155 atiixp_set_pio_timing(ap, adev, wanted_pio);
156 spin_unlock_irqrestore(&atiixp_lock, flags);
148} 157}
149 158
150/** 159/**
@@ -237,7 +246,8 @@ static int atiixp_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
237 if (!pci_test_config_bits(pdev, &atiixp_enable_bits[i])) 246 if (!pci_test_config_bits(pdev, &atiixp_enable_bits[i]))
238 ppi[i] = &ata_dummy_port_info; 247 ppi[i] = &ata_dummy_port_info;
239 248
240 return ata_pci_sff_init_one(pdev, ppi, &atiixp_sht, NULL); 249 return ata_pci_sff_init_one(pdev, ppi, &atiixp_sht, NULL,
250 ATA_HOST_PARALLEL_SCAN);
241} 251}
242 252
243static const struct pci_device_id atiixp[] = { 253static const struct pci_device_id atiixp[] = {
diff --git a/drivers/ata/pata_atp867x.c b/drivers/ata/pata_atp867x.c
index 6fe7ded40c6a..bb6e0746e07d 100644
--- a/drivers/ata/pata_atp867x.c
+++ b/drivers/ata/pata_atp867x.c
@@ -33,6 +33,7 @@
33#include <linux/blkdev.h> 33#include <linux/blkdev.h>
34#include <linux/delay.h> 34#include <linux/delay.h>
35#include <linux/device.h> 35#include <linux/device.h>
36#include <linux/gfp.h>
36#include <scsi/scsi_host.h> 37#include <scsi/scsi_host.h>
37#include <linux/libata.h> 38#include <linux/libata.h>
38 39
diff --git a/drivers/ata/pata_bf54x.c b/drivers/ata/pata_bf54x.c
index c4b47a3e5446..02c81f12c702 100644
--- a/drivers/ata/pata_bf54x.c
+++ b/drivers/ata/pata_bf54x.c
@@ -1557,6 +1557,25 @@ static unsigned short atapi_io_port[] = {
1557 P_ATAPI_DMARQ, 1557 P_ATAPI_DMARQ,
1558 P_ATAPI_INTRQ, 1558 P_ATAPI_INTRQ,
1559 P_ATAPI_IORDY, 1559 P_ATAPI_IORDY,
1560 P_ATAPI_D0A,
1561 P_ATAPI_D1A,
1562 P_ATAPI_D2A,
1563 P_ATAPI_D3A,
1564 P_ATAPI_D4A,
1565 P_ATAPI_D5A,
1566 P_ATAPI_D6A,
1567 P_ATAPI_D7A,
1568 P_ATAPI_D8A,
1569 P_ATAPI_D9A,
1570 P_ATAPI_D10A,
1571 P_ATAPI_D11A,
1572 P_ATAPI_D12A,
1573 P_ATAPI_D13A,
1574 P_ATAPI_D14A,
1575 P_ATAPI_D15A,
1576 P_ATAPI_A0A,
1577 P_ATAPI_A1A,
1578 P_ATAPI_A2A,
1560 0 1579 0
1561}; 1580};
1562 1581
diff --git a/drivers/ata/pata_cmd640.c b/drivers/ata/pata_cmd640.c
index 5acf9fa9b39f..45896b3c6538 100644
--- a/drivers/ata/pata_cmd640.c
+++ b/drivers/ata/pata_cmd640.c
@@ -18,6 +18,7 @@
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/blkdev.h> 19#include <linux/blkdev.h>
20#include <linux/delay.h> 20#include <linux/delay.h>
21#include <linux/gfp.h>
21#include <scsi/scsi_host.h> 22#include <scsi/scsi_host.h>
22#include <linux/libata.h> 23#include <linux/libata.h>
23 24
@@ -223,7 +224,7 @@ static int cmd640_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
223 224
224 cmd640_hardware_init(pdev); 225 cmd640_hardware_init(pdev);
225 226
226 return ata_pci_sff_init_one(pdev, ppi, &cmd640_sht, NULL); 227 return ata_pci_sff_init_one(pdev, ppi, &cmd640_sht, NULL, 0);
227} 228}
228 229
229#ifdef CONFIG_PM 230#ifdef CONFIG_PM
diff --git a/drivers/ata/pata_cmd64x.c b/drivers/ata/pata_cmd64x.c
index f98dffedf4bc..4c81a71b8877 100644
--- a/drivers/ata/pata_cmd64x.c
+++ b/drivers/ata/pata_cmd64x.c
@@ -2,6 +2,7 @@
2 * pata_cmd64x.c - CMD64x PATA for new ATA layer 2 * pata_cmd64x.c - CMD64x PATA for new ATA layer
3 * (C) 2005 Red Hat Inc 3 * (C) 2005 Red Hat Inc
4 * Alan Cox <alan@lxorguk.ukuu.org.uk> 4 * Alan Cox <alan@lxorguk.ukuu.org.uk>
5 * (C) 2009-2010 Bartlomiej Zolnierkiewicz
5 * 6 *
6 * Based upon 7 * Based upon
7 * linux/drivers/ide/pci/cmd64x.c Version 1.30 Sept 10, 2002 8 * linux/drivers/ide/pci/cmd64x.c Version 1.30 Sept 10, 2002
@@ -39,11 +40,7 @@
39 40
40enum { 41enum {
41 CFR = 0x50, 42 CFR = 0x50,
42 CFR_INTR_CH0 = 0x02, 43 CFR_INTR_CH0 = 0x04,
43 CNTRL = 0x51,
44 CNTRL_DIS_RA0 = 0x40,
45 CNTRL_DIS_RA1 = 0x80,
46 CNTRL_ENA_2ND = 0x08,
47 CMDTIM = 0x52, 44 CMDTIM = 0x52,
48 ARTTIM0 = 0x53, 45 ARTTIM0 = 0x53,
49 DRWTIM0 = 0x54, 46 DRWTIM0 = 0x54,
@@ -53,9 +50,6 @@ enum {
53 ARTTIM23_DIS_RA2 = 0x04, 50 ARTTIM23_DIS_RA2 = 0x04,
54 ARTTIM23_DIS_RA3 = 0x08, 51 ARTTIM23_DIS_RA3 = 0x08,
55 ARTTIM23_INTR_CH1 = 0x10, 52 ARTTIM23_INTR_CH1 = 0x10,
56 ARTTIM2 = 0x57,
57 ARTTIM3 = 0x57,
58 DRWTIM23 = 0x58,
59 DRWTIM2 = 0x58, 53 DRWTIM2 = 0x58,
60 BRST = 0x59, 54 BRST = 0x59,
61 DRWTIM3 = 0x5b, 55 DRWTIM3 = 0x5b,
@@ -63,14 +57,11 @@ enum {
63 MRDMODE = 0x71, 57 MRDMODE = 0x71,
64 MRDMODE_INTR_CH0 = 0x04, 58 MRDMODE_INTR_CH0 = 0x04,
65 MRDMODE_INTR_CH1 = 0x08, 59 MRDMODE_INTR_CH1 = 0x08,
66 MRDMODE_BLK_CH0 = 0x10,
67 MRDMODE_BLK_CH1 = 0x20,
68 BMIDESR0 = 0x72, 60 BMIDESR0 = 0x72,
69 UDIDETCR0 = 0x73, 61 UDIDETCR0 = 0x73,
70 DTPR0 = 0x74, 62 DTPR0 = 0x74,
71 BMIDECR1 = 0x78, 63 BMIDECR1 = 0x78,
72 BMIDECSR = 0x79, 64 BMIDECSR = 0x79,
73 BMIDESR1 = 0x7A,
74 UDIDETCR1 = 0x7B, 65 UDIDETCR1 = 0x7B,
75 DTPR1 = 0x7C 66 DTPR1 = 0x7C
76}; 67};
@@ -130,8 +121,14 @@ static void cmd64x_set_timing(struct ata_port *ap, struct ata_device *adev, u8 m
130 121
131 if (pair) { 122 if (pair) {
132 struct ata_timing tp; 123 struct ata_timing tp;
124
133 ata_timing_compute(pair, pair->pio_mode, &tp, T, 0); 125 ata_timing_compute(pair, pair->pio_mode, &tp, T, 0);
134 ata_timing_merge(&t, &tp, &t, ATA_TIMING_SETUP); 126 ata_timing_merge(&t, &tp, &t, ATA_TIMING_SETUP);
127 if (pair->dma_mode) {
128 ata_timing_compute(pair, pair->dma_mode,
129 &tp, T, 0);
130 ata_timing_merge(&tp, &t, &t, ATA_TIMING_SETUP);
131 }
135 } 132 }
136 } 133 }
137 134
@@ -147,7 +144,9 @@ static void cmd64x_set_timing(struct ata_port *ap, struct ata_device *adev, u8 m
147 /* Now convert the clocks into values we can actually stuff into 144 /* Now convert the clocks into values we can actually stuff into
148 the chip */ 145 the chip */
149 146
150 if (t.recover > 1) 147 if (t.recover == 16)
148 t.recover = 0;
149 else if (t.recover > 1)
151 t.recover--; 150 t.recover--;
152 else 151 else
153 t.recover = 15; 152 t.recover = 15;
@@ -219,7 +218,7 @@ static void cmd64x_set_dmamode(struct ata_port *ap, struct ata_device *adev)
219 regU |= udma_data[adev->dma_mode - XFER_UDMA_0] << shift; 218 regU |= udma_data[adev->dma_mode - XFER_UDMA_0] << shift;
220 /* Merge the control bits */ 219 /* Merge the control bits */
221 regU |= 1 << adev->devno; /* UDMA on */ 220 regU |= 1 << adev->devno; /* UDMA on */
222 if (adev->dma_mode > 2) /* 15nS timing */ 221 if (adev->dma_mode > XFER_UDMA_2) /* 15nS timing */
223 regU |= 4 << adev->devno; 222 regU |= 4 << adev->devno;
224 } else { 223 } else {
225 regU &= ~ (1 << adev->devno); /* UDMA off */ 224 regU &= ~ (1 << adev->devno); /* UDMA off */
@@ -245,7 +244,7 @@ static void cmd648_bmdma_stop(struct ata_queued_cmd *qc)
245 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 244 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
246 u8 dma_intr; 245 u8 dma_intr;
247 int dma_mask = ap->port_no ? ARTTIM23_INTR_CH1 : CFR_INTR_CH0; 246 int dma_mask = ap->port_no ? ARTTIM23_INTR_CH1 : CFR_INTR_CH0;
248 int dma_reg = ap->port_no ? ARTTIM2 : CFR; 247 int dma_reg = ap->port_no ? ARTTIM23 : CFR;
249 248
250 ata_bmdma_stop(qc); 249 ata_bmdma_stop(qc);
251 250
@@ -294,8 +293,6 @@ static struct ata_port_operations cmd648_port_ops = {
294 293
295static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id) 294static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
296{ 295{
297 u32 class_rev;
298
299 static const struct ata_port_info cmd_info[6] = { 296 static const struct ata_port_info cmd_info[6] = {
300 { /* CMD 643 - no UDMA */ 297 { /* CMD 643 - no UDMA */
301 .flags = ATA_FLAG_SLAVE_POSS, 298 .flags = ATA_FLAG_SLAVE_POSS,
@@ -345,18 +342,15 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
345 if (rc) 342 if (rc)
346 return rc; 343 return rc;
347 344
348 pci_read_config_dword(pdev, PCI_CLASS_REVISION, &class_rev);
349 class_rev &= 0xFF;
350
351 if (id->driver_data == 0) /* 643 */ 345 if (id->driver_data == 0) /* 643 */
352 ata_pci_bmdma_clear_simplex(pdev); 346 ata_pci_bmdma_clear_simplex(pdev);
353 347
354 if (pdev->device == PCI_DEVICE_ID_CMD_646) { 348 if (pdev->device == PCI_DEVICE_ID_CMD_646) {
355 /* Does UDMA work ? */ 349 /* Does UDMA work ? */
356 if (class_rev > 4) 350 if (pdev->revision > 4)
357 ppi[0] = &cmd_info[2]; 351 ppi[0] = &cmd_info[2];
358 /* Early rev with other problems ? */ 352 /* Early rev with other problems ? */
359 else if (class_rev == 1) 353 else if (pdev->revision == 1)
360 ppi[0] = &cmd_info[3]; 354 ppi[0] = &cmd_info[3];
361 } 355 }
362 356
@@ -373,7 +367,7 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
373 pci_write_config_byte(pdev, UDIDETCR0, 0xF0); 367 pci_write_config_byte(pdev, UDIDETCR0, 0xF0);
374#endif 368#endif
375 369
376 return ata_pci_sff_init_one(pdev, ppi, &cmd64x_sht, NULL); 370 return ata_pci_sff_init_one(pdev, ppi, &cmd64x_sht, NULL, 0);
377} 371}
378 372
379#ifdef CONFIG_PM 373#ifdef CONFIG_PM
diff --git a/drivers/ata/pata_cs5520.c b/drivers/ata/pata_cs5520.c
index 0df83cf74233..95ebdac517f2 100644
--- a/drivers/ata/pata_cs5520.c
+++ b/drivers/ata/pata_cs5520.c
@@ -90,48 +90,12 @@ static void cs5520_set_timings(struct ata_port *ap, struct ata_device *adev, int
90} 90}
91 91
92/** 92/**
93 * cs5520_enable_dma - turn on DMA bits
94 *
95 * Turn on the DMA bits for this disk. Needed because the BIOS probably
96 * has not done the work for us. Belongs in the core SATA code.
97 */
98
99static void cs5520_enable_dma(struct ata_port *ap, struct ata_device *adev)
100{
101 /* Set the DMA enable/disable flag */
102 u8 reg = ioread8(ap->ioaddr.bmdma_addr + 0x02);
103 reg |= 1<<(adev->devno + 5);
104 iowrite8(reg, ap->ioaddr.bmdma_addr + 0x02);
105}
106
107/**
108 * cs5520_set_dmamode - program DMA timings
109 * @ap: ATA port
110 * @adev: ATA device
111 *
112 * Program the DMA mode timings for the controller according to the pio
113 * clocking table. Note that this device sets the DMA timings to PIO
114 * mode values. This may seem bizarre but the 5520 architecture talks
115 * PIO mode to the disk and DMA mode to the controller so the underlying
116 * transfers are PIO timed.
117 */
118
119static void cs5520_set_dmamode(struct ata_port *ap, struct ata_device *adev)
120{
121 static const int dma_xlate[3] = { XFER_PIO_0, XFER_PIO_3, XFER_PIO_4 };
122 cs5520_set_timings(ap, adev, dma_xlate[adev->dma_mode]);
123 cs5520_enable_dma(ap, adev);
124}
125
126/**
127 * cs5520_set_piomode - program PIO timings 93 * cs5520_set_piomode - program PIO timings
128 * @ap: ATA port 94 * @ap: ATA port
129 * @adev: ATA device 95 * @adev: ATA device
130 * 96 *
131 * Program the PIO mode timings for the controller according to the pio 97 * Program the PIO mode timings for the controller according to the pio
132 * clocking table. We know pio_mode will equal dma_mode because of the 98 * clocking table.
133 * CS5520 architecture. At least once we turned DMA on and wrote a
134 * mode setter.
135 */ 99 */
136 100
137static void cs5520_set_piomode(struct ata_port *ap, struct ata_device *adev) 101static void cs5520_set_piomode(struct ata_port *ap, struct ata_device *adev)
@@ -149,7 +113,6 @@ static struct ata_port_operations cs5520_port_ops = {
149 .qc_prep = ata_sff_dumb_qc_prep, 113 .qc_prep = ata_sff_dumb_qc_prep,
150 .cable_detect = ata_cable_40wire, 114 .cable_detect = ata_cable_40wire,
151 .set_piomode = cs5520_set_piomode, 115 .set_piomode = cs5520_set_piomode,
152 .set_dmamode = cs5520_set_dmamode,
153}; 116};
154 117
155static int __devinit cs5520_init_one(struct pci_dev *pdev, const struct pci_device_id *id) 118static int __devinit cs5520_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
diff --git a/drivers/ata/pata_cs5530.c b/drivers/ata/pata_cs5530.c
index c974b05e4129..738ad2e14a97 100644
--- a/drivers/ata/pata_cs5530.c
+++ b/drivers/ata/pata_cs5530.c
@@ -324,7 +324,7 @@ static int cs5530_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
324 ppi[1] = &info_palmax_secondary; 324 ppi[1] = &info_palmax_secondary;
325 325
326 /* Now kick off ATA set up */ 326 /* Now kick off ATA set up */
327 return ata_pci_sff_init_one(pdev, ppi, &cs5530_sht, NULL); 327 return ata_pci_sff_init_one(pdev, ppi, &cs5530_sht, NULL, 0);
328} 328}
329 329
330#ifdef CONFIG_PM 330#ifdef CONFIG_PM
diff --git a/drivers/ata/pata_cs5535.c b/drivers/ata/pata_cs5535.c
index 403f56165cec..a02e6459fdcc 100644
--- a/drivers/ata/pata_cs5535.c
+++ b/drivers/ata/pata_cs5535.c
@@ -4,7 +4,7 @@
4 * Alan Cox <alan@lxorguk.ukuu.org.uk> 4 * Alan Cox <alan@lxorguk.ukuu.org.uk>
5 * 5 *
6 * based upon cs5535.c from AMD <Jens.Altmann@amd.com> as cleaned up and 6 * based upon cs5535.c from AMD <Jens.Altmann@amd.com> as cleaned up and
7 * made readable and Linux style by Wolfgang Zuleger <wolfgang.zuleger@gmx.de 7 * made readable and Linux style by Wolfgang Zuleger <wolfgang.zuleger@gmx.de>
8 * and Alexander Kiausch <alex.kiausch@t-online.de> 8 * and Alexander Kiausch <alex.kiausch@t-online.de>
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
@@ -100,7 +100,7 @@ static int cs5535_cable_detect(struct ata_port *ap)
100static void cs5535_set_piomode(struct ata_port *ap, struct ata_device *adev) 100static void cs5535_set_piomode(struct ata_port *ap, struct ata_device *adev)
101{ 101{
102 static const u16 pio_timings[5] = { 102 static const u16 pio_timings[5] = {
103 0xF7F4, 0x53F3, 0x13F1, 0x5131, 0x1131 103 0xF7F4, 0xF173, 0x8141, 0x5131, 0x1131
104 }; 104 };
105 static const u16 pio_cmd_timings[5] = { 105 static const u16 pio_cmd_timings[5] = {
106 0xF7F4, 0x53F3, 0x13F1, 0x5131, 0x1131 106 0xF7F4, 0x53F3, 0x13F1, 0x5131, 0x1131
@@ -198,7 +198,7 @@ static int cs5535_init_one(struct pci_dev *dev, const struct pci_device_id *id)
198 rdmsr(ATAC_CH0D1_PIO, timings, dummy); 198 rdmsr(ATAC_CH0D1_PIO, timings, dummy);
199 if (CS5535_BAD_PIO(timings)) 199 if (CS5535_BAD_PIO(timings))
200 wrmsr(ATAC_CH0D1_PIO, 0xF7F4F7F4UL, 0); 200 wrmsr(ATAC_CH0D1_PIO, 0xF7F4F7F4UL, 0);
201 return ata_pci_sff_init_one(dev, ppi, &cs5535_sht, NULL); 201 return ata_pci_sff_init_one(dev, ppi, &cs5535_sht, NULL, 0);
202} 202}
203 203
204static const struct pci_device_id cs5535[] = { 204static const struct pci_device_id cs5535[] = {
diff --git a/drivers/ata/pata_cs5536.c b/drivers/ata/pata_cs5536.c
index 6da4cb486c8d..914ae3506ff5 100644
--- a/drivers/ata/pata_cs5536.c
+++ b/drivers/ata/pata_cs5536.c
@@ -224,7 +224,7 @@ static struct scsi_host_template cs5536_sht = {
224}; 224};
225 225
226static struct ata_port_operations cs5536_port_ops = { 226static struct ata_port_operations cs5536_port_ops = {
227 .inherits = &ata_bmdma_port_ops, 227 .inherits = &ata_bmdma32_port_ops,
228 .cable_detect = cs5536_cable_detect, 228 .cable_detect = cs5536_cable_detect,
229 .set_piomode = cs5536_set_piomode, 229 .set_piomode = cs5536_set_piomode,
230 .set_dmamode = cs5536_set_dmamode, 230 .set_dmamode = cs5536_set_dmamode,
@@ -260,7 +260,7 @@ static int cs5536_init_one(struct pci_dev *dev, const struct pci_device_id *id)
260 return -ENODEV; 260 return -ENODEV;
261 } 261 }
262 262
263 return ata_pci_sff_init_one(dev, ppi, &cs5536_sht, NULL); 263 return ata_pci_sff_init_one(dev, ppi, &cs5536_sht, NULL, 0);
264} 264}
265 265
266static const struct pci_device_id cs5536[] = { 266static const struct pci_device_id cs5536[] = {
diff --git a/drivers/ata/pata_cypress.c b/drivers/ata/pata_cypress.c
index 8fb040bf7361..0fcc096b8dac 100644
--- a/drivers/ata/pata_cypress.c
+++ b/drivers/ata/pata_cypress.c
@@ -62,14 +62,16 @@ static void cy82c693_set_piomode(struct ata_port *ap, struct ata_device *adev)
62 return; 62 return;
63 } 63 }
64 64
65 time_16 = clamp_val(t.recover, 0, 15) | (clamp_val(t.active, 0, 15) << 4); 65 time_16 = clamp_val(t.recover - 1, 0, 15) |
66 time_8 = clamp_val(t.act8b, 0, 15) | (clamp_val(t.rec8b, 0, 15) << 4); 66 (clamp_val(t.active - 1, 0, 15) << 4);
67 time_8 = clamp_val(t.act8b - 1, 0, 15) |
68 (clamp_val(t.rec8b - 1, 0, 15) << 4);
67 69
68 if (adev->devno == 0) { 70 if (adev->devno == 0) {
69 pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr); 71 pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr);
70 72
71 addr &= ~0x0F; /* Mask bits */ 73 addr &= ~0x0F; /* Mask bits */
72 addr |= clamp_val(t.setup, 0, 15); 74 addr |= clamp_val(t.setup - 1, 0, 15);
73 75
74 pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr); 76 pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr);
75 pci_write_config_byte(pdev, CY82_IDE_MASTER_IOR, time_16); 77 pci_write_config_byte(pdev, CY82_IDE_MASTER_IOR, time_16);
@@ -79,7 +81,7 @@ static void cy82c693_set_piomode(struct ata_port *ap, struct ata_device *adev)
79 pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr); 81 pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr);
80 82
81 addr &= ~0xF0; /* Mask bits */ 83 addr &= ~0xF0; /* Mask bits */
82 addr |= (clamp_val(t.setup, 0, 15) << 4); 84 addr |= (clamp_val(t.setup - 1, 0, 15) << 4);
83 85
84 pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr); 86 pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr);
85 pci_write_config_byte(pdev, CY82_IDE_SLAVE_IOR, time_16); 87 pci_write_config_byte(pdev, CY82_IDE_SLAVE_IOR, time_16);
@@ -136,7 +138,7 @@ static int cy82c693_init_one(struct pci_dev *pdev, const struct pci_device_id *i
136 if (PCI_FUNC(pdev->devfn) != 1) 138 if (PCI_FUNC(pdev->devfn) != 1)
137 return -ENODEV; 139 return -ENODEV;
138 140
139 return ata_pci_sff_init_one(pdev, ppi, &cy82c693_sht, NULL); 141 return ata_pci_sff_init_one(pdev, ppi, &cy82c693_sht, NULL, 0);
140} 142}
141 143
142static const struct pci_device_id cy82c693[] = { 144static const struct pci_device_id cy82c693[] = {
diff --git a/drivers/ata/pata_efar.c b/drivers/ata/pata_efar.c
index 2a6412f5d117..3bac0e079691 100644
--- a/drivers/ata/pata_efar.c
+++ b/drivers/ata/pata_efar.c
@@ -2,6 +2,7 @@
2 * pata_efar.c - EFAR PIIX clone controller driver 2 * pata_efar.c - EFAR PIIX clone controller driver
3 * 3 *
4 * (C) 2005 Red Hat 4 * (C) 2005 Red Hat
5 * (C) 2009-2010 Bartlomiej Zolnierkiewicz
5 * 6 *
6 * Some parts based on ata_piix.c by Jeff Garzik and others. 7 * Some parts based on ata_piix.c by Jeff Garzik and others.
7 * 8 *
@@ -67,6 +68,8 @@ static int efar_cable_detect(struct ata_port *ap)
67 return ATA_CBL_PATA80; 68 return ATA_CBL_PATA80;
68} 69}
69 70
71static DEFINE_SPINLOCK(efar_lock);
72
70/** 73/**
71 * efar_set_piomode - Initialize host controller PATA PIO timings 74 * efar_set_piomode - Initialize host controller PATA PIO timings
72 * @ap: Port whose timings we are configuring 75 * @ap: Port whose timings we are configuring
@@ -83,7 +86,9 @@ static void efar_set_piomode (struct ata_port *ap, struct ata_device *adev)
83 unsigned int pio = adev->pio_mode - XFER_PIO_0; 86 unsigned int pio = adev->pio_mode - XFER_PIO_0;
84 struct pci_dev *dev = to_pci_dev(ap->host->dev); 87 struct pci_dev *dev = to_pci_dev(ap->host->dev);
85 unsigned int idetm_port= ap->port_no ? 0x42 : 0x40; 88 unsigned int idetm_port= ap->port_no ? 0x42 : 0x40;
89 unsigned long flags;
86 u16 idetm_data; 90 u16 idetm_data;
91 u8 udma_enable;
87 int control = 0; 92 int control = 0;
88 93
89 /* 94 /*
@@ -106,6 +111,8 @@ static void efar_set_piomode (struct ata_port *ap, struct ata_device *adev)
106 if (adev->class == ATA_DEV_ATA) 111 if (adev->class == ATA_DEV_ATA)
107 control |= 4; /* PPE */ 112 control |= 4; /* PPE */
108 113
114 spin_lock_irqsave(&efar_lock, flags);
115
109 pci_read_config_word(dev, idetm_port, &idetm_data); 116 pci_read_config_word(dev, idetm_port, &idetm_data);
110 117
111 /* Set PPE, IE, and TIME as appropriate */ 118 /* Set PPE, IE, and TIME as appropriate */
@@ -118,18 +125,23 @@ static void efar_set_piomode (struct ata_port *ap, struct ata_device *adev)
118 int shift = 4 * ap->port_no; 125 int shift = 4 * ap->port_no;
119 u8 slave_data; 126 u8 slave_data;
120 127
121 idetm_data &= 0xCC0F; 128 idetm_data &= 0xFF0F;
122 idetm_data |= (control << 4); 129 idetm_data |= (control << 4);
123 130
124 /* Slave timing in separate register */ 131 /* Slave timing in separate register */
125 pci_read_config_byte(dev, 0x44, &slave_data); 132 pci_read_config_byte(dev, 0x44, &slave_data);
126 slave_data &= 0x0F << shift; 133 slave_data &= ap->port_no ? 0x0F : 0xF0;
127 slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << shift; 134 slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << shift;
128 pci_write_config_byte(dev, 0x44, slave_data); 135 pci_write_config_byte(dev, 0x44, slave_data);
129 } 136 }
130 137
131 idetm_data |= 0x4000; /* Ensure SITRE is set */ 138 idetm_data |= 0x4000; /* Ensure SITRE is set */
132 pci_write_config_word(dev, idetm_port, idetm_data); 139 pci_write_config_word(dev, idetm_port, idetm_data);
140
141 pci_read_config_byte(dev, 0x48, &udma_enable);
142 udma_enable &= ~(1 << (2 * ap->port_no + adev->devno));
143 pci_write_config_byte(dev, 0x48, udma_enable);
144 spin_unlock_irqrestore(&efar_lock, flags);
133} 145}
134 146
135/** 147/**
@@ -150,6 +162,7 @@ static void efar_set_dmamode (struct ata_port *ap, struct ata_device *adev)
150 u16 master_data; 162 u16 master_data;
151 u8 speed = adev->dma_mode; 163 u8 speed = adev->dma_mode;
152 int devid = adev->devno + 2 * ap->port_no; 164 int devid = adev->devno + 2 * ap->port_no;
165 unsigned long flags;
153 u8 udma_enable; 166 u8 udma_enable;
154 167
155 static const /* ISP RTC */ 168 static const /* ISP RTC */
@@ -159,6 +172,8 @@ static void efar_set_dmamode (struct ata_port *ap, struct ata_device *adev)
159 { 2, 1 }, 172 { 2, 1 },
160 { 2, 3 }, }; 173 { 2, 3 }, };
161 174
175 spin_lock_irqsave(&efar_lock, flags);
176
162 pci_read_config_word(dev, master_port, &master_data); 177 pci_read_config_word(dev, master_port, &master_data);
163 pci_read_config_byte(dev, 0x48, &udma_enable); 178 pci_read_config_byte(dev, 0x48, &udma_enable);
164 179
@@ -200,7 +215,7 @@ static void efar_set_dmamode (struct ata_port *ap, struct ata_device *adev)
200 master_data &= 0xFF4F; /* Mask out IORDY|TIME1|DMAONLY */ 215 master_data &= 0xFF4F; /* Mask out IORDY|TIME1|DMAONLY */
201 master_data |= control << 4; 216 master_data |= control << 4;
202 pci_read_config_byte(dev, 0x44, &slave_data); 217 pci_read_config_byte(dev, 0x44, &slave_data);
203 slave_data &= (0x0F + 0xE1 * ap->port_no); 218 slave_data &= ap->port_no ? 0x0F : 0xF0;
204 /* Load the matching timing */ 219 /* Load the matching timing */
205 slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << (ap->port_no ? 4 : 0); 220 slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << (ap->port_no ? 4 : 0);
206 pci_write_config_byte(dev, 0x44, slave_data); 221 pci_write_config_byte(dev, 0x44, slave_data);
@@ -216,6 +231,7 @@ static void efar_set_dmamode (struct ata_port *ap, struct ata_device *adev)
216 pci_write_config_word(dev, master_port, master_data); 231 pci_write_config_word(dev, master_port, master_data);
217 } 232 }
218 pci_write_config_byte(dev, 0x48, udma_enable); 233 pci_write_config_byte(dev, 0x48, udma_enable);
234 spin_unlock_irqrestore(&efar_lock, flags);
219} 235}
220 236
221static struct scsi_host_template efar_sht = { 237static struct scsi_host_template efar_sht = {
@@ -251,17 +267,18 @@ static int efar_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
251 static const struct ata_port_info info = { 267 static const struct ata_port_info info = {
252 .flags = ATA_FLAG_SLAVE_POSS, 268 .flags = ATA_FLAG_SLAVE_POSS,
253 .pio_mask = ATA_PIO4, 269 .pio_mask = ATA_PIO4,
254 .mwdma_mask = ATA_MWDMA2, 270 .mwdma_mask = ATA_MWDMA12_ONLY,
255 .udma_mask = ATA_UDMA4, 271 .udma_mask = ATA_UDMA4,
256 .port_ops = &efar_ops, 272 .port_ops = &efar_ops,
257 }; 273 };
258 const struct ata_port_info *ppi[] = { &info, NULL }; 274 const struct ata_port_info *ppi[] = { &info, &info };
259 275
260 if (!printed_version++) 276 if (!printed_version++)
261 dev_printk(KERN_DEBUG, &pdev->dev, 277 dev_printk(KERN_DEBUG, &pdev->dev,
262 "version " DRV_VERSION "\n"); 278 "version " DRV_VERSION "\n");
263 279
264 return ata_pci_sff_init_one(pdev, ppi, &efar_sht, NULL); 280 return ata_pci_sff_init_one(pdev, ppi, &efar_sht, NULL,
281 ATA_HOST_PARALLEL_SCAN);
265} 282}
266 283
267static const struct pci_device_id efar_pci_tbl[] = { 284static const struct pci_device_id efar_pci_tbl[] = {
diff --git a/drivers/ata/pata_hpt366.c b/drivers/ata/pata_hpt366.c
index d7f2da127d13..af49bfb57247 100644
--- a/drivers/ata/pata_hpt366.c
+++ b/drivers/ata/pata_hpt366.c
@@ -11,9 +11,7 @@
11 * 11 *
12 * 12 *
13 * TODO 13 * TODO
14 * Maybe PLL mode 14 * Look into engine reset on timeout errors. Should not be required.
15 * Look into engine reset on timeout errors. Should not be
16 * required.
17 */ 15 */
18 16
19 17
@@ -27,7 +25,7 @@
27#include <linux/libata.h> 25#include <linux/libata.h>
28 26
29#define DRV_NAME "pata_hpt366" 27#define DRV_NAME "pata_hpt366"
30#define DRV_VERSION "0.6.2" 28#define DRV_VERSION "0.6.8"
31 29
32struct hpt_clock { 30struct hpt_clock {
33 u8 xfer_mode; 31 u8 xfer_mode;
@@ -36,24 +34,22 @@ struct hpt_clock {
36 34
37/* key for bus clock timings 35/* key for bus clock timings
38 * bit 36 * bit
39 * 0:3 data_high_time. inactive time of DIOW_/DIOR_ for PIO and MW 37 * 0:3 data_high_time. Inactive time of DIOW_/DIOR_ for PIO and MW DMA.
40 * DMA. cycles = value + 1 38 * cycles = value + 1
41 * 4:8 data_low_time. active time of DIOW_/DIOR_ for PIO and MW 39 * 4:7 data_low_time. Active time of DIOW_/DIOR_ for PIO and MW DMA.
42 * DMA. cycles = value + 1 40 * cycles = value + 1
43 * 9:12 cmd_high_time. inactive time of DIOW_/DIOR_ during task file 41 * 8:11 cmd_high_time. Inactive time of DIOW_/DIOR_ during task file
44 * register access. 42 * register access.
45 * 13:17 cmd_low_time. active time of DIOW_/DIOR_ during task file 43 * 12:15 cmd_low_time. Active time of DIOW_/DIOR_ during task file
46 * register access. 44 * register access.
47 * 18:21 udma_cycle_time. clock freq and clock cycles for UDMA xfer. 45 * 16:18 udma_cycle_time. Clock cycles for UDMA xfer?
48 * during task file register access. 46 * 19:21 pre_high_time. Time to initialize 1st cycle for PIO and MW DMA xfer.
49 * 22:24 pre_high_time. time to initialize 1st cycle for PIO and MW DMA 47 * 22:24 cmd_pre_high_time. Time to initialize 1st PIO cycle for task file
50 * xfer.
51 * 25:27 cmd_pre_high_time. time to initialize 1st PIO cycle for task
52 * register access. 48 * register access.
53 * 28 UDMA enable 49 * 28 UDMA enable.
54 * 29 DMA enable 50 * 29 DMA enable.
55 * 30 PIO_MST enable. if set, the chip is in bus master mode during 51 * 30 PIO_MST enable. If set, the chip is in bus master mode during
56 * PIO. 52 * PIO xfer.
57 * 31 FIFO enable. 53 * 31 FIFO enable.
58 */ 54 */
59 55
@@ -209,17 +205,8 @@ static void hpt366_set_mode(struct ata_port *ap, struct ata_device *adev,
209{ 205{
210 struct hpt_clock *clocks = ap->host->private_data; 206 struct hpt_clock *clocks = ap->host->private_data;
211 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 207 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
212 u32 addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); 208 u32 addr = 0x40 + 4 * adev->devno;
213 u32 addr2 = 0x51 + 4 * ap->port_no;
214 u32 mask, reg; 209 u32 mask, reg;
215 u8 fast;
216
217 /* Fast interrupt prediction disable, hold off interrupt disable */
218 pci_read_config_byte(pdev, addr2, &fast);
219 if (fast & 0x80) {
220 fast &= ~0x80;
221 pci_write_config_byte(pdev, addr2, fast);
222 }
223 210
224 /* determine timing mask and find matching clock entry */ 211 /* determine timing mask and find matching clock entry */
225 if (mode < XFER_MW_DMA_0) 212 if (mode < XFER_MW_DMA_0)
@@ -242,9 +229,9 @@ static void hpt366_set_mode(struct ata_port *ap, struct ata_device *adev,
242 * on-chip PIO FIFO/buffer (and PIO MST mode as well) to avoid 229 * on-chip PIO FIFO/buffer (and PIO MST mode as well) to avoid
243 * problems handling I/O errors later. 230 * problems handling I/O errors later.
244 */ 231 */
245 pci_read_config_dword(pdev, addr1, &reg); 232 pci_read_config_dword(pdev, addr, &reg);
246 reg = ((reg & ~mask) | (clocks->timing & mask)) & ~0xc0000000; 233 reg = ((reg & ~mask) | (clocks->timing & mask)) & ~0xc0000000;
247 pci_write_config_dword(pdev, addr1, reg); 234 pci_write_config_dword(pdev, addr, reg);
248} 235}
249 236
250/** 237/**
@@ -344,7 +331,6 @@ static int hpt36x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
344 const struct ata_port_info *ppi[] = { &info_hpt366, NULL }; 331 const struct ata_port_info *ppi[] = { &info_hpt366, NULL };
345 332
346 void *hpriv = NULL; 333 void *hpriv = NULL;
347 u32 class_rev;
348 u32 reg1; 334 u32 reg1;
349 int rc; 335 int rc;
350 336
@@ -352,13 +338,10 @@ static int hpt36x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
352 if (rc) 338 if (rc)
353 return rc; 339 return rc;
354 340
355 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
356 class_rev &= 0xFF;
357
358 /* May be a later chip in disguise. Check */ 341 /* May be a later chip in disguise. Check */
359 /* Newer chips are not in the HPT36x driver. Ignore them */ 342 /* Newer chips are not in the HPT36x driver. Ignore them */
360 if (class_rev > 2) 343 if (dev->revision > 2)
361 return -ENODEV; 344 return -ENODEV;
362 345
363 hpt36x_init_chipset(dev); 346 hpt36x_init_chipset(dev);
364 347
@@ -378,7 +361,7 @@ static int hpt36x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
378 break; 361 break;
379 } 362 }
380 /* Now kick off ATA set up */ 363 /* Now kick off ATA set up */
381 return ata_pci_sff_init_one(dev, ppi, &hpt36x_sht, hpriv); 364 return ata_pci_sff_init_one(dev, ppi, &hpt36x_sht, hpriv, 0);
382} 365}
383 366
384#ifdef CONFIG_PM 367#ifdef CONFIG_PM
diff --git a/drivers/ata/pata_hpt37x.c b/drivers/ata/pata_hpt37x.c
index d0a7df2e5ca7..8839307a64cf 100644
--- a/drivers/ata/pata_hpt37x.c
+++ b/drivers/ata/pata_hpt37x.c
@@ -24,7 +24,7 @@
24#include <linux/libata.h> 24#include <linux/libata.h>
25 25
26#define DRV_NAME "pata_hpt37x" 26#define DRV_NAME "pata_hpt37x"
27#define DRV_VERSION "0.6.12" 27#define DRV_VERSION "0.6.15"
28 28
29struct hpt_clock { 29struct hpt_clock {
30 u8 xfer_speed; 30 u8 xfer_speed;
@@ -39,25 +39,24 @@ struct hpt_chip {
39 39
40/* key for bus clock timings 40/* key for bus clock timings
41 * bit 41 * bit
42 * 0:3 data_high_time. inactive time of DIOW_/DIOR_ for PIO and MW 42 * 0:3 data_high_time. Inactive time of DIOW_/DIOR_ for PIO and MW DMA.
43 * DMA. cycles = value + 1 43 * cycles = value + 1
44 * 4:8 data_low_time. active time of DIOW_/DIOR_ for PIO and MW 44 * 4:8 data_low_time. Active time of DIOW_/DIOR_ for PIO and MW DMA.
45 * DMA. cycles = value + 1 45 * cycles = value + 1
46 * 9:12 cmd_high_time. inactive time of DIOW_/DIOR_ during task file 46 * 9:12 cmd_high_time. Inactive time of DIOW_/DIOR_ during task file
47 * register access. 47 * register access.
48 * 13:17 cmd_low_time. active time of DIOW_/DIOR_ during task file 48 * 13:17 cmd_low_time. Active time of DIOW_/DIOR_ during task file
49 * register access. 49 * register access.
50 * 18:21 udma_cycle_time. clock freq and clock cycles for UDMA xfer. 50 * 18:20 udma_cycle_time. Clock cycles for UDMA xfer.
51 * during task file register access. 51 * 21 CLK frequency for UDMA: 0=ATA clock, 1=dual ATA clock.
52 * 22:24 pre_high_time. time to initialize 1st cycle for PIO and MW DMA 52 * 22:24 pre_high_time. Time to initialize 1st cycle for PIO and MW DMA xfer.
53 * xfer. 53 * 25:27 cmd_pre_high_time. Time to initialize 1st PIO cycle for task file
54 * 25:27 cmd_pre_high_time. time to initialize 1st PIO cycle for task
55 * register access. 54 * register access.
56 * 28 UDMA enable 55 * 28 UDMA enable.
57 * 29 DMA enable 56 * 29 DMA enable.
58 * 30 PIO_MST enable. if set, the chip is in bus master mode during 57 * 30 PIO_MST enable. If set, the chip is in bus master mode during
59 * PIO. 58 * PIO xfer.
60 * 31 FIFO enable. 59 * 31 FIFO enable. Only for PIO.
61 */ 60 */
62 61
63static struct hpt_clock hpt37x_timings_33[] = { 62static struct hpt_clock hpt37x_timings_33[] = {
@@ -303,72 +302,79 @@ static unsigned long hpt370a_filter(struct ata_device *adev, unsigned long mask)
303} 302}
304 303
305/** 304/**
306 * hpt37x_pre_reset - reset the hpt37x bus 305 * hpt37x_cable_detect - Detect the cable type
307 * @link: ATA link to reset 306 * @ap: ATA port to detect on
308 * @deadline: deadline jiffies for the operation
309 * 307 *
310 * Perform the initial reset handling for the 370/372 and 374 func 0 308 * Return the cable type attached to this port
311 */ 309 */
312 310
313static int hpt37x_pre_reset(struct ata_link *link, unsigned long deadline) 311static int hpt37x_cable_detect(struct ata_port *ap)
314{ 312{
315 u8 scr2, ata66;
316 struct ata_port *ap = link->ap;
317 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 313 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
318 static const struct pci_bits hpt37x_enable_bits[] = { 314 u8 scr2, ata66;
319 { 0x50, 1, 0x04, 0x04 },
320 { 0x54, 1, 0x04, 0x04 }
321 };
322 if (!pci_test_config_bits(pdev, &hpt37x_enable_bits[ap->port_no]))
323 return -ENOENT;
324 315
325 pci_read_config_byte(pdev, 0x5B, &scr2); 316 pci_read_config_byte(pdev, 0x5B, &scr2);
326 pci_write_config_byte(pdev, 0x5B, scr2 & ~0x01); 317 pci_write_config_byte(pdev, 0x5B, scr2 & ~0x01);
318
319 udelay(10); /* debounce */
320
327 /* Cable register now active */ 321 /* Cable register now active */
328 pci_read_config_byte(pdev, 0x5A, &ata66); 322 pci_read_config_byte(pdev, 0x5A, &ata66);
329 /* Restore state */ 323 /* Restore state */
330 pci_write_config_byte(pdev, 0x5B, scr2); 324 pci_write_config_byte(pdev, 0x5B, scr2);
331 325
332 if (ata66 & (2 >> ap->port_no)) 326 if (ata66 & (2 >> ap->port_no))
333 ap->cbl = ATA_CBL_PATA40; 327 return ATA_CBL_PATA40;
334 else 328 else
335 ap->cbl = ATA_CBL_PATA80; 329 return ATA_CBL_PATA80;
336
337 /* Reset the state machine */
338 pci_write_config_byte(pdev, 0x50 + 4 * ap->port_no, 0x37);
339 udelay(100);
340
341 return ata_sff_prereset(link, deadline);
342} 330}
343 331
344static int hpt374_fn1_pre_reset(struct ata_link *link, unsigned long deadline) 332/**
333 * hpt374_fn1_cable_detect - Detect the cable type
334 * @ap: ATA port to detect on
335 *
336 * Return the cable type attached to this port
337 */
338
339static int hpt374_fn1_cable_detect(struct ata_port *ap)
345{ 340{
346 static const struct pci_bits hpt37x_enable_bits[] = {
347 { 0x50, 1, 0x04, 0x04 },
348 { 0x54, 1, 0x04, 0x04 }
349 };
350 u16 mcr3;
351 u8 ata66;
352 struct ata_port *ap = link->ap;
353 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 341 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
354 unsigned int mcrbase = 0x50 + 4 * ap->port_no; 342 unsigned int mcrbase = 0x50 + 4 * ap->port_no;
355 343 u16 mcr3;
356 if (!pci_test_config_bits(pdev, &hpt37x_enable_bits[ap->port_no])) 344 u8 ata66;
357 return -ENOENT;
358 345
359 /* Do the extra channel work */ 346 /* Do the extra channel work */
360 pci_read_config_word(pdev, mcrbase + 2, &mcr3); 347 pci_read_config_word(pdev, mcrbase + 2, &mcr3);
361 /* Set bit 15 of 0x52 to enable TCBLID as input 348 /* Set bit 15 of 0x52 to enable TCBLID as input */
362 */
363 pci_write_config_word(pdev, mcrbase + 2, mcr3 | 0x8000); 349 pci_write_config_word(pdev, mcrbase + 2, mcr3 | 0x8000);
364 pci_read_config_byte(pdev, 0x5A, &ata66); 350 pci_read_config_byte(pdev, 0x5A, &ata66);
365 /* Reset TCBLID/FCBLID to output */ 351 /* Reset TCBLID/FCBLID to output */
366 pci_write_config_word(pdev, mcrbase + 2, mcr3); 352 pci_write_config_word(pdev, mcrbase + 2, mcr3);
367 353
368 if (ata66 & (2 >> ap->port_no)) 354 if (ata66 & (2 >> ap->port_no))
369 ap->cbl = ATA_CBL_PATA40; 355 return ATA_CBL_PATA40;
370 else 356 else
371 ap->cbl = ATA_CBL_PATA80; 357 return ATA_CBL_PATA80;
358}
359
360/**
361 * hpt37x_pre_reset - reset the hpt37x bus
362 * @link: ATA link to reset
363 * @deadline: deadline jiffies for the operation
364 *
365 * Perform the initial reset handling for the HPT37x.
366 */
367
368static int hpt37x_pre_reset(struct ata_link *link, unsigned long deadline)
369{
370 struct ata_port *ap = link->ap;
371 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
372 static const struct pci_bits hpt37x_enable_bits[] = {
373 { 0x50, 1, 0x04, 0x04 },
374 { 0x54, 1, 0x04, 0x04 }
375 };
376 if (!pci_test_config_bits(pdev, &hpt37x_enable_bits[ap->port_no]))
377 return -ENOENT;
372 378
373 /* Reset the state machine */ 379 /* Reset the state machine */
374 pci_write_config_byte(pdev, 0x50 + 4 * ap->port_no, 0x37); 380 pci_write_config_byte(pdev, 0x50 + 4 * ap->port_no, 0x37);
@@ -377,20 +383,12 @@ static int hpt374_fn1_pre_reset(struct ata_link *link, unsigned long deadline)
377 return ata_sff_prereset(link, deadline); 383 return ata_sff_prereset(link, deadline);
378} 384}
379 385
380/** 386static void hpt370_set_mode(struct ata_port *ap, struct ata_device *adev,
381 * hpt370_set_piomode - PIO setup 387 u8 mode)
382 * @ap: ATA interface
383 * @adev: device on the interface
384 *
385 * Perform PIO mode setup.
386 */
387
388static void hpt370_set_piomode(struct ata_port *ap, struct ata_device *adev)
389{ 388{
390 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 389 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
391 u32 addr1, addr2; 390 u32 addr1, addr2;
392 u32 reg; 391 u32 reg, timing, mask;
393 u32 mode;
394 u8 fast; 392 u8 fast;
395 393
396 addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); 394 addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no);
@@ -402,12 +400,31 @@ static void hpt370_set_piomode(struct ata_port *ap, struct ata_device *adev)
402 fast |= 0x01; 400 fast |= 0x01;
403 pci_write_config_byte(pdev, addr2, fast); 401 pci_write_config_byte(pdev, addr2, fast);
404 402
403 /* Determine timing mask and find matching mode entry */
404 if (mode < XFER_MW_DMA_0)
405 mask = 0xcfc3ffff;
406 else if (mode < XFER_UDMA_0)
407 mask = 0x31c001ff;
408 else
409 mask = 0x303c0000;
410
411 timing = hpt37x_find_mode(ap, mode);
412
405 pci_read_config_dword(pdev, addr1, &reg); 413 pci_read_config_dword(pdev, addr1, &reg);
406 mode = hpt37x_find_mode(ap, adev->pio_mode); 414 reg = (reg & ~mask) | (timing & mask);
407 mode &= ~0x8000000; /* No FIFO in PIO */ 415 pci_write_config_dword(pdev, addr1, reg);
408 mode &= ~0x30070000; /* Leave config bits alone */ 416}
409 reg &= 0x30070000; /* Strip timing bits */ 417/**
410 pci_write_config_dword(pdev, addr1, reg | mode); 418 * hpt370_set_piomode - PIO setup
419 * @ap: ATA interface
420 * @adev: device on the interface
421 *
422 * Perform PIO mode setup.
423 */
424
425static void hpt370_set_piomode(struct ata_port *ap, struct ata_device *adev)
426{
427 hpt370_set_mode(ap, adev, adev->pio_mode);
411} 428}
412 429
413/** 430/**
@@ -415,33 +432,12 @@ static void hpt370_set_piomode(struct ata_port *ap, struct ata_device *adev)
415 * @ap: ATA interface 432 * @ap: ATA interface
416 * @adev: Device being configured 433 * @adev: Device being configured
417 * 434 *
418 * Set up the channel for MWDMA or UDMA modes. Much the same as with 435 * Set up the channel for MWDMA or UDMA modes.
419 * PIO, load the mode number and then set MWDMA or UDMA flag.
420 */ 436 */
421 437
422static void hpt370_set_dmamode(struct ata_port *ap, struct ata_device *adev) 438static void hpt370_set_dmamode(struct ata_port *ap, struct ata_device *adev)
423{ 439{
424 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 440 hpt370_set_mode(ap, adev, adev->dma_mode);
425 u32 addr1, addr2;
426 u32 reg;
427 u32 mode;
428 u8 fast;
429
430 addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no);
431 addr2 = 0x51 + 4 * ap->port_no;
432
433 /* Fast interrupt prediction disable, hold off interrupt disable */
434 pci_read_config_byte(pdev, addr2, &fast);
435 fast &= ~0x02;
436 fast |= 0x01;
437 pci_write_config_byte(pdev, addr2, fast);
438
439 pci_read_config_dword(pdev, addr1, &reg);
440 mode = hpt37x_find_mode(ap, adev->dma_mode);
441 mode |= 0x8000000; /* FIFO in MWDMA or UDMA */
442 mode &= ~0xC0000000; /* Leave config bits alone */
443 reg &= 0xC0000000; /* Strip timing bits */
444 pci_write_config_dword(pdev, addr1, reg | mode);
445} 441}
446 442
447/** 443/**
@@ -455,24 +451,25 @@ static void hpt370_bmdma_stop(struct ata_queued_cmd *qc)
455{ 451{
456 struct ata_port *ap = qc->ap; 452 struct ata_port *ap = qc->ap;
457 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 453 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
458 u8 dma_stat = ioread8(ap->ioaddr.bmdma_addr + 2);
459 u8 dma_cmd;
460 void __iomem *bmdma = ap->ioaddr.bmdma_addr; 454 void __iomem *bmdma = ap->ioaddr.bmdma_addr;
455 u8 dma_stat = ioread8(bmdma + ATA_DMA_STATUS);
456 u8 dma_cmd;
461 457
462 if (dma_stat & 0x01) { 458 if (dma_stat & ATA_DMA_ACTIVE) {
463 udelay(20); 459 udelay(20);
464 dma_stat = ioread8(bmdma + 2); 460 dma_stat = ioread8(bmdma + ATA_DMA_STATUS);
465 } 461 }
466 if (dma_stat & 0x01) { 462 if (dma_stat & ATA_DMA_ACTIVE) {
467 /* Clear the engine */ 463 /* Clear the engine */
468 pci_write_config_byte(pdev, 0x50 + 4 * ap->port_no, 0x37); 464 pci_write_config_byte(pdev, 0x50 + 4 * ap->port_no, 0x37);
469 udelay(10); 465 udelay(10);
470 /* Stop DMA */ 466 /* Stop DMA */
471 dma_cmd = ioread8(bmdma ); 467 dma_cmd = ioread8(bmdma + ATA_DMA_CMD);
472 iowrite8(dma_cmd & 0xFE, bmdma); 468 iowrite8(dma_cmd & ~ATA_DMA_START, bmdma + ATA_DMA_CMD);
473 /* Clear Error */ 469 /* Clear Error */
474 dma_stat = ioread8(bmdma + 2); 470 dma_stat = ioread8(bmdma + ATA_DMA_STATUS);
475 iowrite8(dma_stat | 0x06 , bmdma + 2); 471 iowrite8(dma_stat | ATA_DMA_INTR | ATA_DMA_ERR,
472 bmdma + ATA_DMA_STATUS);
476 /* Clear the engine */ 473 /* Clear the engine */
477 pci_write_config_byte(pdev, 0x50 + 4 * ap->port_no, 0x37); 474 pci_write_config_byte(pdev, 0x50 + 4 * ap->port_no, 0x37);
478 udelay(10); 475 udelay(10);
@@ -480,20 +477,12 @@ static void hpt370_bmdma_stop(struct ata_queued_cmd *qc)
480 ata_bmdma_stop(qc); 477 ata_bmdma_stop(qc);
481} 478}
482 479
483/** 480static void hpt372_set_mode(struct ata_port *ap, struct ata_device *adev,
484 * hpt372_set_piomode - PIO setup 481 u8 mode)
485 * @ap: ATA interface
486 * @adev: device on the interface
487 *
488 * Perform PIO mode setup.
489 */
490
491static void hpt372_set_piomode(struct ata_port *ap, struct ata_device *adev)
492{ 482{
493 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 483 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
494 u32 addr1, addr2; 484 u32 addr1, addr2;
495 u32 reg; 485 u32 reg, timing, mask;
496 u32 mode;
497 u8 fast; 486 u8 fast;
498 487
499 addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); 488 addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no);
@@ -504,14 +493,32 @@ static void hpt372_set_piomode(struct ata_port *ap, struct ata_device *adev)
504 fast &= ~0x07; 493 fast &= ~0x07;
505 pci_write_config_byte(pdev, addr2, fast); 494 pci_write_config_byte(pdev, addr2, fast);
506 495
496 /* Determine timing mask and find matching mode entry */
497 if (mode < XFER_MW_DMA_0)
498 mask = 0xcfc3ffff;
499 else if (mode < XFER_UDMA_0)
500 mask = 0x31c001ff;
501 else
502 mask = 0x303c0000;
503
504 timing = hpt37x_find_mode(ap, mode);
505
507 pci_read_config_dword(pdev, addr1, &reg); 506 pci_read_config_dword(pdev, addr1, &reg);
508 mode = hpt37x_find_mode(ap, adev->pio_mode); 507 reg = (reg & ~mask) | (timing & mask);
508 pci_write_config_dword(pdev, addr1, reg);
509}
509 510
510 printk("Find mode for %d reports %X\n", adev->pio_mode, mode); 511/**
511 mode &= ~0x80000000; /* No FIFO in PIO */ 512 * hpt372_set_piomode - PIO setup
512 mode &= ~0x30070000; /* Leave config bits alone */ 513 * @ap: ATA interface
513 reg &= 0x30070000; /* Strip timing bits */ 514 * @adev: device on the interface
514 pci_write_config_dword(pdev, addr1, reg | mode); 515 *
516 * Perform PIO mode setup.
517 */
518
519static void hpt372_set_piomode(struct ata_port *ap, struct ata_device *adev)
520{
521 hpt372_set_mode(ap, adev, adev->pio_mode);
515} 522}
516 523
517/** 524/**
@@ -519,33 +526,12 @@ static void hpt372_set_piomode(struct ata_port *ap, struct ata_device *adev)
519 * @ap: ATA interface 526 * @ap: ATA interface
520 * @adev: Device being configured 527 * @adev: Device being configured
521 * 528 *
522 * Set up the channel for MWDMA or UDMA modes. Much the same as with 529 * Set up the channel for MWDMA or UDMA modes.
523 * PIO, load the mode number and then set MWDMA or UDMA flag.
524 */ 530 */
525 531
526static void hpt372_set_dmamode(struct ata_port *ap, struct ata_device *adev) 532static void hpt372_set_dmamode(struct ata_port *ap, struct ata_device *adev)
527{ 533{
528 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 534 hpt372_set_mode(ap, adev, adev->dma_mode);
529 u32 addr1, addr2;
530 u32 reg;
531 u32 mode;
532 u8 fast;
533
534 addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no);
535 addr2 = 0x51 + 4 * ap->port_no;
536
537 /* Fast interrupt prediction disable, hold off interrupt disable */
538 pci_read_config_byte(pdev, addr2, &fast);
539 fast &= ~0x07;
540 pci_write_config_byte(pdev, addr2, fast);
541
542 pci_read_config_dword(pdev, addr1, &reg);
543 mode = hpt37x_find_mode(ap, adev->dma_mode);
544 printk("Find mode for DMA %d reports %X\n", adev->dma_mode, mode);
545 mode &= ~0xC0000000; /* Leave config bits alone */
546 mode |= 0x80000000; /* FIFO in MWDMA or UDMA */
547 reg &= 0xC0000000; /* Strip timing bits */
548 pci_write_config_dword(pdev, addr1, reg | mode);
549} 535}
550 536
551/** 537/**
@@ -584,6 +570,7 @@ static struct ata_port_operations hpt370_port_ops = {
584 .bmdma_stop = hpt370_bmdma_stop, 570 .bmdma_stop = hpt370_bmdma_stop,
585 571
586 .mode_filter = hpt370_filter, 572 .mode_filter = hpt370_filter,
573 .cable_detect = hpt37x_cable_detect,
587 .set_piomode = hpt370_set_piomode, 574 .set_piomode = hpt370_set_piomode,
588 .set_dmamode = hpt370_set_dmamode, 575 .set_dmamode = hpt370_set_dmamode,
589 .prereset = hpt37x_pre_reset, 576 .prereset = hpt37x_pre_reset,
@@ -608,6 +595,7 @@ static struct ata_port_operations hpt372_port_ops = {
608 595
609 .bmdma_stop = hpt37x_bmdma_stop, 596 .bmdma_stop = hpt37x_bmdma_stop,
610 597
598 .cable_detect = hpt37x_cable_detect,
611 .set_piomode = hpt372_set_piomode, 599 .set_piomode = hpt372_set_piomode,
612 .set_dmamode = hpt372_set_dmamode, 600 .set_dmamode = hpt372_set_dmamode,
613 .prereset = hpt37x_pre_reset, 601 .prereset = hpt37x_pre_reset,
@@ -620,7 +608,8 @@ static struct ata_port_operations hpt372_port_ops = {
620 608
621static struct ata_port_operations hpt374_fn1_port_ops = { 609static struct ata_port_operations hpt374_fn1_port_ops = {
622 .inherits = &hpt372_port_ops, 610 .inherits = &hpt372_port_ops,
623 .prereset = hpt374_fn1_pre_reset, 611 .cable_detect = hpt374_fn1_cable_detect,
612 .prereset = hpt37x_pre_reset,
624}; 613};
625 614
626/** 615/**
@@ -791,9 +780,8 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
791 static const int MHz[4] = { 33, 40, 50, 66 }; 780 static const int MHz[4] = { 33, 40, 50, 66 };
792 void *private_data = NULL; 781 void *private_data = NULL;
793 const struct ata_port_info *ppi[] = { NULL, NULL }; 782 const struct ata_port_info *ppi[] = { NULL, NULL };
794 783 u8 rev = dev->revision;
795 u8 irqmask; 784 u8 irqmask;
796 u32 class_rev;
797 u8 mcr1; 785 u8 mcr1;
798 u32 freq; 786 u32 freq;
799 int prefer_dpll = 1; 787 int prefer_dpll = 1;
@@ -808,19 +796,16 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
808 if (rc) 796 if (rc)
809 return rc; 797 return rc;
810 798
811 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
812 class_rev &= 0xFF;
813
814 if (dev->device == PCI_DEVICE_ID_TTI_HPT366) { 799 if (dev->device == PCI_DEVICE_ID_TTI_HPT366) {
815 /* May be a later chip in disguise. Check */ 800 /* May be a later chip in disguise. Check */
816 /* Older chips are in the HPT366 driver. Ignore them */ 801 /* Older chips are in the HPT366 driver. Ignore them */
817 if (class_rev < 3) 802 if (rev < 3)
818 return -ENODEV; 803 return -ENODEV;
819 /* N series chips have their own driver. Ignore */ 804 /* N series chips have their own driver. Ignore */
820 if (class_rev == 6) 805 if (rev == 6)
821 return -ENODEV; 806 return -ENODEV;
822 807
823 switch(class_rev) { 808 switch(rev) {
824 case 3: 809 case 3:
825 ppi[0] = &info_hpt370; 810 ppi[0] = &info_hpt370;
826 chip_table = &hpt370; 811 chip_table = &hpt370;
@@ -836,28 +821,29 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
836 chip_table = &hpt372; 821 chip_table = &hpt372;
837 break; 822 break;
838 default: 823 default:
839 printk(KERN_ERR "pata_hpt37x: Unknown HPT366 subtype please report (%d).\n", class_rev); 824 printk(KERN_ERR "pata_hpt37x: Unknown HPT366 "
825 "subtype, please report (%d).\n", rev);
840 return -ENODEV; 826 return -ENODEV;
841 } 827 }
842 } else { 828 } else {
843 switch(dev->device) { 829 switch(dev->device) {
844 case PCI_DEVICE_ID_TTI_HPT372: 830 case PCI_DEVICE_ID_TTI_HPT372:
845 /* 372N if rev >= 2*/ 831 /* 372N if rev >= 2*/
846 if (class_rev >= 2) 832 if (rev >= 2)
847 return -ENODEV; 833 return -ENODEV;
848 ppi[0] = &info_hpt372; 834 ppi[0] = &info_hpt372;
849 chip_table = &hpt372a; 835 chip_table = &hpt372a;
850 break; 836 break;
851 case PCI_DEVICE_ID_TTI_HPT302: 837 case PCI_DEVICE_ID_TTI_HPT302:
852 /* 302N if rev > 1 */ 838 /* 302N if rev > 1 */
853 if (class_rev > 1) 839 if (rev > 1)
854 return -ENODEV; 840 return -ENODEV;
855 ppi[0] = &info_hpt372; 841 ppi[0] = &info_hpt372;
856 /* Check this */ 842 /* Check this */
857 chip_table = &hpt302; 843 chip_table = &hpt302;
858 break; 844 break;
859 case PCI_DEVICE_ID_TTI_HPT371: 845 case PCI_DEVICE_ID_TTI_HPT371:
860 if (class_rev > 1) 846 if (rev > 1)
861 return -ENODEV; 847 return -ENODEV;
862 ppi[0] = &info_hpt372; 848 ppi[0] = &info_hpt372;
863 chip_table = &hpt371; 849 chip_table = &hpt371;
@@ -1001,7 +987,7 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
1001 } 987 }
1002 988
1003 /* Now kick off ATA set up */ 989 /* Now kick off ATA set up */
1004 return ata_pci_sff_init_one(dev, ppi, &hpt37x_sht, private_data); 990 return ata_pci_sff_init_one(dev, ppi, &hpt37x_sht, private_data, 0);
1005} 991}
1006 992
1007static const struct pci_device_id hpt37x[] = { 993static const struct pci_device_id hpt37x[] = {
diff --git a/drivers/ata/pata_hpt3x2n.c b/drivers/ata/pata_hpt3x2n.c
index 3d59fe0a408d..01457b266f3d 100644
--- a/drivers/ata/pata_hpt3x2n.c
+++ b/drivers/ata/pata_hpt3x2n.c
@@ -8,7 +8,7 @@
8 * Copyright (C) 1999-2003 Andre Hedrick <andre@linux-ide.org> 8 * Copyright (C) 1999-2003 Andre Hedrick <andre@linux-ide.org>
9 * Portions Copyright (C) 2001 Sun Microsystems, Inc. 9 * Portions Copyright (C) 2001 Sun Microsystems, Inc.
10 * Portions Copyright (C) 2003 Red Hat Inc 10 * Portions Copyright (C) 2003 Red Hat Inc
11 * Portions Copyright (C) 2005-2007 MontaVista Software, Inc. 11 * Portions Copyright (C) 2005-2009 MontaVista Software, Inc.
12 * 12 *
13 * 13 *
14 * TODO 14 * TODO
@@ -25,7 +25,7 @@
25#include <linux/libata.h> 25#include <linux/libata.h>
26 26
27#define DRV_NAME "pata_hpt3x2n" 27#define DRV_NAME "pata_hpt3x2n"
28#define DRV_VERSION "0.3.4" 28#define DRV_VERSION "0.3.10"
29 29
30enum { 30enum {
31 HPT_PCI_FAST = (1 << 31), 31 HPT_PCI_FAST = (1 << 31),
@@ -45,25 +45,24 @@ struct hpt_chip {
45 45
46/* key for bus clock timings 46/* key for bus clock timings
47 * bit 47 * bit
48 * 0:3 data_high_time. inactive time of DIOW_/DIOR_ for PIO and MW 48 * 0:3 data_high_time. Inactive time of DIOW_/DIOR_ for PIO and MW DMA.
49 * DMA. cycles = value + 1 49 * cycles = value + 1
50 * 4:8 data_low_time. active time of DIOW_/DIOR_ for PIO and MW 50 * 4:8 data_low_time. Active time of DIOW_/DIOR_ for PIO and MW DMA.
51 * DMA. cycles = value + 1 51 * cycles = value + 1
52 * 9:12 cmd_high_time. inactive time of DIOW_/DIOR_ during task file 52 * 9:12 cmd_high_time. Inactive time of DIOW_/DIOR_ during task file
53 * register access. 53 * register access.
54 * 13:17 cmd_low_time. active time of DIOW_/DIOR_ during task file 54 * 13:17 cmd_low_time. Active time of DIOW_/DIOR_ during task file
55 * register access. 55 * register access.
56 * 18:21 udma_cycle_time. clock freq and clock cycles for UDMA xfer. 56 * 18:20 udma_cycle_time. Clock cycles for UDMA xfer.
57 * during task file register access. 57 * 21 CLK frequency for UDMA: 0=ATA clock, 1=dual ATA clock.
58 * 22:24 pre_high_time. time to initialize 1st cycle for PIO and MW DMA 58 * 22:24 pre_high_time. Time to initialize 1st cycle for PIO and MW DMA xfer.
59 * xfer. 59 * 25:27 cmd_pre_high_time. Time to initialize 1st PIO cycle for task file
60 * 25:27 cmd_pre_high_time. time to initialize 1st PIO cycle for task
61 * register access. 60 * register access.
62 * 28 UDMA enable 61 * 28 UDMA enable.
63 * 29 DMA enable 62 * 29 DMA enable.
64 * 30 PIO_MST enable. if set, the chip is in bus master mode during 63 * 30 PIO_MST enable. If set, the chip is in bus master mode during
65 * PIO. 64 * PIO xfer.
66 * 31 FIFO enable. 65 * 31 FIFO enable. Only for PIO.
67 */ 66 */
68 67
69/* 66MHz DPLL clocks */ 68/* 66MHz DPLL clocks */
@@ -80,14 +79,13 @@ static struct hpt_clock hpt3x2n_clocks[] = {
80 79
81 { XFER_MW_DMA_2, 0x2c829c62 }, 80 { XFER_MW_DMA_2, 0x2c829c62 },
82 { XFER_MW_DMA_1, 0x2c829c66 }, 81 { XFER_MW_DMA_1, 0x2c829c66 },
83 { XFER_MW_DMA_0, 0x2c829d2c }, 82 { XFER_MW_DMA_0, 0x2c829d2e },
84 83
85 { XFER_PIO_4, 0x0c829c62 }, 84 { XFER_PIO_4, 0x0c829c62 },
86 { XFER_PIO_3, 0x0c829c84 }, 85 { XFER_PIO_3, 0x0c829c84 },
87 { XFER_PIO_2, 0x0c829ca6 }, 86 { XFER_PIO_2, 0x0c829ca6 },
88 { XFER_PIO_1, 0x0d029d26 }, 87 { XFER_PIO_1, 0x0d029d26 },
89 { XFER_PIO_0, 0x0d029d5e }, 88 { XFER_PIO_0, 0x0d029d5e },
90 { 0, 0x0d029d5e }
91}; 89};
92 90
93/** 91/**
@@ -128,12 +126,15 @@ static int hpt3x2n_cable_detect(struct ata_port *ap)
128 126
129 pci_read_config_byte(pdev, 0x5B, &scr2); 127 pci_read_config_byte(pdev, 0x5B, &scr2);
130 pci_write_config_byte(pdev, 0x5B, scr2 & ~0x01); 128 pci_write_config_byte(pdev, 0x5B, scr2 & ~0x01);
129
130 udelay(10); /* debounce */
131
131 /* Cable register now active */ 132 /* Cable register now active */
132 pci_read_config_byte(pdev, 0x5A, &ata66); 133 pci_read_config_byte(pdev, 0x5A, &ata66);
133 /* Restore state */ 134 /* Restore state */
134 pci_write_config_byte(pdev, 0x5B, scr2); 135 pci_write_config_byte(pdev, 0x5B, scr2);
135 136
136 if (ata66 & (1 << ap->port_no)) 137 if (ata66 & (2 >> ap->port_no))
137 return ATA_CBL_PATA40; 138 return ATA_CBL_PATA40;
138 else 139 else
139 return ATA_CBL_PATA80; 140 return ATA_CBL_PATA80;
@@ -159,20 +160,12 @@ static int hpt3x2n_pre_reset(struct ata_link *link, unsigned long deadline)
159 return ata_sff_prereset(link, deadline); 160 return ata_sff_prereset(link, deadline);
160} 161}
161 162
162/** 163static void hpt3x2n_set_mode(struct ata_port *ap, struct ata_device *adev,
163 * hpt3x2n_set_piomode - PIO setup 164 u8 mode)
164 * @ap: ATA interface
165 * @adev: device on the interface
166 *
167 * Perform PIO mode setup.
168 */
169
170static void hpt3x2n_set_piomode(struct ata_port *ap, struct ata_device *adev)
171{ 165{
172 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 166 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
173 u32 addr1, addr2; 167 u32 addr1, addr2;
174 u32 reg; 168 u32 reg, timing, mask;
175 u32 mode;
176 u8 fast; 169 u8 fast;
177 170
178 addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); 171 addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no);
@@ -183,12 +176,32 @@ static void hpt3x2n_set_piomode(struct ata_port *ap, struct ata_device *adev)
183 fast &= ~0x07; 176 fast &= ~0x07;
184 pci_write_config_byte(pdev, addr2, fast); 177 pci_write_config_byte(pdev, addr2, fast);
185 178
179 /* Determine timing mask and find matching mode entry */
180 if (mode < XFER_MW_DMA_0)
181 mask = 0xcfc3ffff;
182 else if (mode < XFER_UDMA_0)
183 mask = 0x31c001ff;
184 else
185 mask = 0x303c0000;
186
187 timing = hpt3x2n_find_mode(ap, mode);
188
186 pci_read_config_dword(pdev, addr1, &reg); 189 pci_read_config_dword(pdev, addr1, &reg);
187 mode = hpt3x2n_find_mode(ap, adev->pio_mode); 190 reg = (reg & ~mask) | (timing & mask);
188 mode &= ~0x8000000; /* No FIFO in PIO */ 191 pci_write_config_dword(pdev, addr1, reg);
189 mode &= ~0x30070000; /* Leave config bits alone */ 192}
190 reg &= 0x30070000; /* Strip timing bits */ 193
191 pci_write_config_dword(pdev, addr1, reg | mode); 194/**
195 * hpt3x2n_set_piomode - PIO setup
196 * @ap: ATA interface
197 * @adev: device on the interface
198 *
199 * Perform PIO mode setup.
200 */
201
202static void hpt3x2n_set_piomode(struct ata_port *ap, struct ata_device *adev)
203{
204 hpt3x2n_set_mode(ap, adev, adev->pio_mode);
192} 205}
193 206
194/** 207/**
@@ -196,32 +209,12 @@ static void hpt3x2n_set_piomode(struct ata_port *ap, struct ata_device *adev)
196 * @ap: ATA interface 209 * @ap: ATA interface
197 * @adev: Device being configured 210 * @adev: Device being configured
198 * 211 *
199 * Set up the channel for MWDMA or UDMA modes. Much the same as with 212 * Set up the channel for MWDMA or UDMA modes.
200 * PIO, load the mode number and then set MWDMA or UDMA flag.
201 */ 213 */
202 214
203static void hpt3x2n_set_dmamode(struct ata_port *ap, struct ata_device *adev) 215static void hpt3x2n_set_dmamode(struct ata_port *ap, struct ata_device *adev)
204{ 216{
205 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 217 hpt3x2n_set_mode(ap, adev, adev->dma_mode);
206 u32 addr1, addr2;
207 u32 reg;
208 u32 mode;
209 u8 fast;
210
211 addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no);
212 addr2 = 0x51 + 4 * ap->port_no;
213
214 /* Fast interrupt prediction disable, hold off interrupt disable */
215 pci_read_config_byte(pdev, addr2, &fast);
216 fast &= ~0x07;
217 pci_write_config_byte(pdev, addr2, fast);
218
219 pci_read_config_dword(pdev, addr1, &reg);
220 mode = hpt3x2n_find_mode(ap, adev->dma_mode);
221 mode |= 0x8000000; /* FIFO in MWDMA or UDMA */
222 mode &= ~0xC0000000; /* Leave config bits alone */
223 reg &= 0xC0000000; /* Strip timing bits */
224 pci_write_config_dword(pdev, addr1, reg | mode);
225} 218}
226 219
227/** 220/**
@@ -263,7 +256,7 @@ static void hpt3x2n_bmdma_stop(struct ata_queued_cmd *qc)
263 256
264static void hpt3x2n_set_clock(struct ata_port *ap, int source) 257static void hpt3x2n_set_clock(struct ata_port *ap, int source)
265{ 258{
266 void __iomem *bmdma = ap->ioaddr.bmdma_addr; 259 void __iomem *bmdma = ap->ioaddr.bmdma_addr - ap->port_no * 8;
267 260
268 /* Tristate the bus */ 261 /* Tristate the bus */
269 iowrite8(0x80, bmdma+0x73); 262 iowrite8(0x80, bmdma+0x73);
@@ -273,9 +266,9 @@ static void hpt3x2n_set_clock(struct ata_port *ap, int source)
273 iowrite8(source, bmdma+0x7B); 266 iowrite8(source, bmdma+0x7B);
274 iowrite8(0xC0, bmdma+0x79); 267 iowrite8(0xC0, bmdma+0x79);
275 268
276 /* Reset state machines */ 269 /* Reset state machines, avoid enabling the disabled channels */
277 iowrite8(0x37, bmdma+0x70); 270 iowrite8(ioread8(bmdma+0x70) | 0x32, bmdma+0x70);
278 iowrite8(0x37, bmdma+0x74); 271 iowrite8(ioread8(bmdma+0x74) | 0x32, bmdma+0x74);
279 272
280 /* Complete reset */ 273 /* Complete reset */
281 iowrite8(0x00, bmdma+0x79); 274 iowrite8(0x00, bmdma+0x79);
@@ -285,21 +278,10 @@ static void hpt3x2n_set_clock(struct ata_port *ap, int source)
285 iowrite8(0x00, bmdma+0x77); 278 iowrite8(0x00, bmdma+0x77);
286} 279}
287 280
288/* Check if our partner interface is busy */
289
290static int hpt3x2n_pair_idle(struct ata_port *ap)
291{
292 struct ata_host *host = ap->host;
293 struct ata_port *pair = host->ports[ap->port_no ^ 1];
294
295 if (pair->hsm_task_state == HSM_ST_IDLE)
296 return 1;
297 return 0;
298}
299
300static int hpt3x2n_use_dpll(struct ata_port *ap, int writing) 281static int hpt3x2n_use_dpll(struct ata_port *ap, int writing)
301{ 282{
302 long flags = (long)ap->host->private_data; 283 long flags = (long)ap->host->private_data;
284
303 /* See if we should use the DPLL */ 285 /* See if we should use the DPLL */
304 if (writing) 286 if (writing)
305 return USE_DPLL; /* Needed for write */ 287 return USE_DPLL; /* Needed for write */
@@ -308,20 +290,35 @@ static int hpt3x2n_use_dpll(struct ata_port *ap, int writing)
308 return 0; 290 return 0;
309} 291}
310 292
293static int hpt3x2n_qc_defer(struct ata_queued_cmd *qc)
294{
295 struct ata_port *ap = qc->ap;
296 struct ata_port *alt = ap->host->ports[ap->port_no ^ 1];
297 int rc, flags = (long)ap->host->private_data;
298 int dpll = hpt3x2n_use_dpll(ap, qc->tf.flags & ATA_TFLAG_WRITE);
299
300 /* First apply the usual rules */
301 rc = ata_std_qc_defer(qc);
302 if (rc != 0)
303 return rc;
304
305 if ((flags & USE_DPLL) != dpll && alt->qc_active)
306 return ATA_DEFER_PORT;
307 return 0;
308}
309
311static unsigned int hpt3x2n_qc_issue(struct ata_queued_cmd *qc) 310static unsigned int hpt3x2n_qc_issue(struct ata_queued_cmd *qc)
312{ 311{
313 struct ata_taskfile *tf = &qc->tf;
314 struct ata_port *ap = qc->ap; 312 struct ata_port *ap = qc->ap;
315 int flags = (long)ap->host->private_data; 313 int flags = (long)ap->host->private_data;
314 int dpll = hpt3x2n_use_dpll(ap, qc->tf.flags & ATA_TFLAG_WRITE);
316 315
317 if (hpt3x2n_pair_idle(ap)) { 316 if ((flags & USE_DPLL) != dpll) {
318 int dpll = hpt3x2n_use_dpll(ap, (tf->flags & ATA_TFLAG_WRITE)); 317 flags &= ~USE_DPLL;
319 if ((flags & USE_DPLL) != dpll) { 318 flags |= dpll;
320 if (dpll == 1) 319 ap->host->private_data = (void *)(long)flags;
321 hpt3x2n_set_clock(ap, 0x21); 320
322 else 321 hpt3x2n_set_clock(ap, dpll ? 0x21 : 0x23);
323 hpt3x2n_set_clock(ap, 0x23);
324 }
325 } 322 }
326 return ata_sff_qc_issue(qc); 323 return ata_sff_qc_issue(qc);
327} 324}
@@ -338,6 +335,8 @@ static struct ata_port_operations hpt3x2n_port_ops = {
338 .inherits = &ata_bmdma_port_ops, 335 .inherits = &ata_bmdma_port_ops,
339 336
340 .bmdma_stop = hpt3x2n_bmdma_stop, 337 .bmdma_stop = hpt3x2n_bmdma_stop,
338
339 .qc_defer = hpt3x2n_qc_defer,
341 .qc_issue = hpt3x2n_qc_issue, 340 .qc_issue = hpt3x2n_qc_issue,
342 341
343 .cable_detect = hpt3x2n_cable_detect, 342 .cable_detect = hpt3x2n_cable_detect,
@@ -447,41 +446,36 @@ static int hpt3x2n_init_one(struct pci_dev *dev, const struct pci_device_id *id)
447 .port_ops = &hpt3x2n_port_ops 446 .port_ops = &hpt3x2n_port_ops
448 }; 447 };
449 const struct ata_port_info *ppi[] = { &info, NULL }; 448 const struct ata_port_info *ppi[] = { &info, NULL };
450 449 u8 rev = dev->revision;
451 u8 irqmask; 450 u8 irqmask;
452 u32 class_rev;
453
454 unsigned int pci_mhz; 451 unsigned int pci_mhz;
455 unsigned int f_low, f_high; 452 unsigned int f_low, f_high;
456 int adjust; 453 int adjust;
457 unsigned long iobase = pci_resource_start(dev, 4); 454 unsigned long iobase = pci_resource_start(dev, 4);
458 void *hpriv = NULL; 455 void *hpriv = (void *)USE_DPLL;
459 int rc; 456 int rc;
460 457
461 rc = pcim_enable_device(dev); 458 rc = pcim_enable_device(dev);
462 if (rc) 459 if (rc)
463 return rc; 460 return rc;
464 461
465 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
466 class_rev &= 0xFF;
467
468 switch(dev->device) { 462 switch(dev->device) {
469 case PCI_DEVICE_ID_TTI_HPT366: 463 case PCI_DEVICE_ID_TTI_HPT366:
470 if (class_rev < 6) 464 if (rev < 6)
471 return -ENODEV; 465 return -ENODEV;
472 break; 466 break;
473 case PCI_DEVICE_ID_TTI_HPT371: 467 case PCI_DEVICE_ID_TTI_HPT371:
474 if (class_rev < 2) 468 if (rev < 2)
475 return -ENODEV; 469 return -ENODEV;
476 /* 371N if rev > 1 */ 470 /* 371N if rev > 1 */
477 break; 471 break;
478 case PCI_DEVICE_ID_TTI_HPT372: 472 case PCI_DEVICE_ID_TTI_HPT372:
479 /* 372N if rev >= 2*/ 473 /* 372N if rev >= 2*/
480 if (class_rev < 2) 474 if (rev < 2)
481 return -ENODEV; 475 return -ENODEV;
482 break; 476 break;
483 case PCI_DEVICE_ID_TTI_HPT302: 477 case PCI_DEVICE_ID_TTI_HPT302:
484 if (class_rev < 2) 478 if (rev < 2)
485 return -ENODEV; 479 return -ENODEV;
486 break; 480 break;
487 case PCI_DEVICE_ID_TTI_HPT372N: 481 case PCI_DEVICE_ID_TTI_HPT372N:
@@ -542,19 +536,19 @@ static int hpt3x2n_init_one(struct pci_dev *dev, const struct pci_device_id *id)
542 pci_mhz); 536 pci_mhz);
543 /* Set our private data up. We only need a few flags so we use 537 /* Set our private data up. We only need a few flags so we use
544 it directly */ 538 it directly */
545 if (pci_mhz > 60) { 539 if (pci_mhz > 60)
546 hpriv = (void *)PCI66; 540 hpriv = (void *)(PCI66 | USE_DPLL);
547 /* 541
548 * On HPT371N, if ATA clock is 66 MHz we must set bit 2 in 542 /*
549 * the MISC. register to stretch the UltraDMA Tss timing. 543 * On HPT371N, if ATA clock is 66 MHz we must set bit 2 in
550 * NOTE: This register is only writeable via I/O space. 544 * the MISC. register to stretch the UltraDMA Tss timing.
551 */ 545 * NOTE: This register is only writeable via I/O space.
552 if (dev->device == PCI_DEVICE_ID_TTI_HPT371) 546 */
553 outb(inb(iobase + 0x9c) | 0x04, iobase + 0x9c); 547 if (dev->device == PCI_DEVICE_ID_TTI_HPT371)
554 } 548 outb(inb(iobase + 0x9c) | 0x04, iobase + 0x9c);
555 549
556 /* Now kick off ATA set up */ 550 /* Now kick off ATA set up */
557 return ata_pci_sff_init_one(dev, ppi, &hpt3x2n_sht, hpriv); 551 return ata_pci_sff_init_one(dev, ppi, &hpt3x2n_sht, hpriv, 0);
558} 552}
559 553
560static const struct pci_device_id hpt3x2n[] = { 554static const struct pci_device_id hpt3x2n[] = {
diff --git a/drivers/ata/pata_hpt3x3.c b/drivers/ata/pata_hpt3x3.c
index 7e310253b36b..727a81ce4c9f 100644
--- a/drivers/ata/pata_hpt3x3.c
+++ b/drivers/ata/pata_hpt3x3.c
@@ -180,7 +180,7 @@ static void hpt3x3_init_chipset(struct pci_dev *dev)
180 * @id: Entry in match table 180 * @id: Entry in match table
181 * 181 *
182 * Perform basic initialisation. We set the device up so we access all 182 * Perform basic initialisation. We set the device up so we access all
183 * ports via BAR4. This is neccessary to work around errata. 183 * ports via BAR4. This is necessary to work around errata.
184 */ 184 */
185 185
186static int hpt3x3_init_one(struct pci_dev *pdev, const struct pci_device_id *id) 186static int hpt3x3_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
@@ -255,8 +255,17 @@ static int hpt3x3_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
255#ifdef CONFIG_PM 255#ifdef CONFIG_PM
256static int hpt3x3_reinit_one(struct pci_dev *dev) 256static int hpt3x3_reinit_one(struct pci_dev *dev)
257{ 257{
258 struct ata_host *host = dev_get_drvdata(&dev->dev);
259 int rc;
260
261 rc = ata_pci_device_do_resume(dev);
262 if (rc)
263 return rc;
264
258 hpt3x3_init_chipset(dev); 265 hpt3x3_init_chipset(dev);
259 return ata_pci_device_resume(dev); 266
267 ata_host_resume(host);
268 return 0;
260} 269}
261#endif 270#endif
262 271
diff --git a/drivers/ata/pata_icside.c b/drivers/ata/pata_icside.c
index b663b7ffae4b..fa812e206eeb 100644
--- a/drivers/ata/pata_icside.c
+++ b/drivers/ata/pata_icside.c
@@ -2,6 +2,7 @@
2#include <linux/module.h> 2#include <linux/module.h>
3#include <linux/init.h> 3#include <linux/init.h>
4#include <linux/blkdev.h> 4#include <linux/blkdev.h>
5#include <linux/gfp.h>
5#include <scsi/scsi_host.h> 6#include <scsi/scsi_host.h>
6#include <linux/ata.h> 7#include <linux/ata.h>
7#include <linux/libata.h> 8#include <linux/libata.h>
diff --git a/drivers/ata/pata_it8213.c b/drivers/ata/pata_it8213.c
index f156da8076f7..f971f0de88e6 100644
--- a/drivers/ata/pata_it8213.c
+++ b/drivers/ata/pata_it8213.c
@@ -22,7 +22,7 @@
22#define DRV_VERSION "0.0.3" 22#define DRV_VERSION "0.0.3"
23 23
24/** 24/**
25 * it8213_pre_reset - check for 40/80 pin 25 * it8213_pre_reset - probe begin
26 * @link: link 26 * @link: link
27 * @deadline: deadline jiffies for the operation 27 * @deadline: deadline jiffies for the operation
28 * 28 *
@@ -92,18 +92,17 @@ static void it8213_set_piomode (struct ata_port *ap, struct ata_device *adev)
92 { 2, 1 }, 92 { 2, 1 },
93 { 2, 3 }, }; 93 { 2, 3 }, };
94 94
95 if (pio > 2) 95 if (pio > 1)
96 control |= 1; /* TIME1 enable */ 96 control |= 1; /* TIME */
97 if (ata_pio_need_iordy(adev)) /* PIO 3/4 require IORDY */ 97 if (ata_pio_need_iordy(adev)) /* PIO 3/4 require IORDY */
98 control |= 2; /* IORDY enable */ 98 control |= 2; /* IE */
99 /* Bit 2 is set for ATAPI on the IT8213 - reverse of ICH/PIIX */ 99 /* Bit 2 is set for ATAPI on the IT8213 - reverse of ICH/PIIX */
100 if (adev->class != ATA_DEV_ATA) 100 if (adev->class != ATA_DEV_ATA)
101 control |= 4; 101 control |= 4; /* PPE */
102 102
103 pci_read_config_word(dev, idetm_port, &idetm_data); 103 pci_read_config_word(dev, idetm_port, &idetm_data);
104 104
105 /* Enable PPE, IE and TIME as appropriate */ 105 /* Set PPE, IE, and TIME as appropriate */
106
107 if (adev->devno == 0) { 106 if (adev->devno == 0) {
108 idetm_data &= 0xCCF0; 107 idetm_data &= 0xCCF0;
109 idetm_data |= control; 108 idetm_data |= control;
@@ -112,17 +111,17 @@ static void it8213_set_piomode (struct ata_port *ap, struct ata_device *adev)
112 } else { 111 } else {
113 u8 slave_data; 112 u8 slave_data;
114 113
115 idetm_data &= 0xCC0F; 114 idetm_data &= 0xFF0F;
116 idetm_data |= (control << 4); 115 idetm_data |= (control << 4);
117 116
118 /* Slave timing in separate register */ 117 /* Slave timing in separate register */
119 pci_read_config_byte(dev, 0x44, &slave_data); 118 pci_read_config_byte(dev, 0x44, &slave_data);
120 slave_data &= 0xF0; 119 slave_data &= 0xF0;
121 slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << 4; 120 slave_data |= (timings[pio][0] << 2) | timings[pio][1];
122 pci_write_config_byte(dev, 0x44, slave_data); 121 pci_write_config_byte(dev, 0x44, slave_data);
123 } 122 }
124 123
125 idetm_data |= 0x4000; /* Ensure SITRE is enabled */ 124 idetm_data |= 0x4000; /* Ensure SITRE is set */
126 pci_write_config_word(dev, idetm_port, idetm_data); 125 pci_write_config_word(dev, idetm_port, idetm_data);
127} 126}
128 127
@@ -173,10 +172,10 @@ static void it8213_set_dmamode (struct ata_port *ap, struct ata_device *adev)
173 172
174 udma_enable |= (1 << devid); 173 udma_enable |= (1 << devid);
175 174
176 /* Load the UDMA mode number */ 175 /* Load the UDMA cycle time */
177 pci_read_config_word(dev, 0x4A, &udma_timing); 176 pci_read_config_word(dev, 0x4A, &udma_timing);
178 udma_timing &= ~(3 << (4 * devid)); 177 udma_timing &= ~(3 << (4 * devid));
179 udma_timing |= (udma & 3) << (4 * devid); 178 udma_timing |= u_speed << (4 * devid);
180 pci_write_config_word(dev, 0x4A, udma_timing); 179 pci_write_config_word(dev, 0x4A, udma_timing);
181 180
182 /* Load the clock selection */ 181 /* Load the clock selection */
@@ -211,7 +210,7 @@ static void it8213_set_dmamode (struct ata_port *ap, struct ata_device *adev)
211 master_data &= 0xFF4F; /* Mask out IORDY|TIME1|DMAONLY */ 210 master_data &= 0xFF4F; /* Mask out IORDY|TIME1|DMAONLY */
212 master_data |= control << 4; 211 master_data |= control << 4;
213 pci_read_config_byte(dev, 0x44, &slave_data); 212 pci_read_config_byte(dev, 0x44, &slave_data);
214 slave_data &= (0x0F + 0xE1 * ap->port_no); 213 slave_data &= 0xF0;
215 /* Load the matching timing */ 214 /* Load the matching timing */
216 slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << (ap->port_no ? 4 : 0); 215 slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << (ap->port_no ? 4 : 0);
217 pci_write_config_byte(dev, 0x44, slave_data); 216 pci_write_config_byte(dev, 0x44, slave_data);
@@ -263,7 +262,7 @@ static int it8213_init_one (struct pci_dev *pdev, const struct pci_device_id *en
263 static const struct ata_port_info info = { 262 static const struct ata_port_info info = {
264 .flags = ATA_FLAG_SLAVE_POSS, 263 .flags = ATA_FLAG_SLAVE_POSS,
265 .pio_mask = ATA_PIO4, 264 .pio_mask = ATA_PIO4,
266 .mwdma_mask = ATA_MWDMA2, 265 .mwdma_mask = ATA_MWDMA12_ONLY,
267 .udma_mask = ATA_UDMA4, /* FIXME: want UDMA 100? */ 266 .udma_mask = ATA_UDMA4, /* FIXME: want UDMA 100? */
268 .port_ops = &it8213_ops, 267 .port_ops = &it8213_ops,
269 }; 268 };
@@ -274,7 +273,7 @@ static int it8213_init_one (struct pci_dev *pdev, const struct pci_device_id *en
274 dev_printk(KERN_DEBUG, &pdev->dev, 273 dev_printk(KERN_DEBUG, &pdev->dev,
275 "version " DRV_VERSION "\n"); 274 "version " DRV_VERSION "\n");
276 275
277 return ata_pci_sff_init_one(pdev, ppi, &it8213_sht, NULL); 276 return ata_pci_sff_init_one(pdev, ppi, &it8213_sht, NULL, 0);
278} 277}
279 278
280static const struct pci_device_id it8213_pci_tbl[] = { 279static const struct pci_device_id it8213_pci_tbl[] = {
diff --git a/drivers/ata/pata_it821x.c b/drivers/ata/pata_it821x.c
index 188bc2fcd22c..5cb286fd839e 100644
--- a/drivers/ata/pata_it821x.c
+++ b/drivers/ata/pata_it821x.c
@@ -75,6 +75,7 @@
75#include <linux/init.h> 75#include <linux/init.h>
76#include <linux/blkdev.h> 76#include <linux/blkdev.h>
77#include <linux/delay.h> 77#include <linux/delay.h>
78#include <linux/slab.h>
78#include <scsi/scsi_host.h> 79#include <scsi/scsi_host.h>
79#include <linux/libata.h> 80#include <linux/libata.h>
80 81
@@ -932,7 +933,7 @@ static int it821x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
932 else 933 else
933 ppi[0] = &info_smart; 934 ppi[0] = &info_smart;
934 } 935 }
935 return ata_pci_sff_init_one(pdev, ppi, &it821x_sht, NULL); 936 return ata_pci_sff_init_one(pdev, ppi, &it821x_sht, NULL, 0);
936} 937}
937 938
938#ifdef CONFIG_PM 939#ifdef CONFIG_PM
@@ -955,7 +956,7 @@ static int it821x_reinit_one(struct pci_dev *pdev)
955static const struct pci_device_id it821x[] = { 956static const struct pci_device_id it821x[] = {
956 { PCI_VDEVICE(ITE, PCI_DEVICE_ID_ITE_8211), }, 957 { PCI_VDEVICE(ITE, PCI_DEVICE_ID_ITE_8211), },
957 { PCI_VDEVICE(ITE, PCI_DEVICE_ID_ITE_8212), }, 958 { PCI_VDEVICE(ITE, PCI_DEVICE_ID_ITE_8212), },
958 { PCI_VDEVICE(RDC, 0x1010), }, 959 { PCI_VDEVICE(RDC, PCI_DEVICE_ID_RDC_D1010), },
959 960
960 { }, 961 { },
961}; 962};
diff --git a/drivers/ata/pata_jmicron.c b/drivers/ata/pata_jmicron.c
index 3a1474ac8838..565e01e6ac7c 100644
--- a/drivers/ata/pata_jmicron.c
+++ b/drivers/ata/pata_jmicron.c
@@ -144,7 +144,7 @@ static int jmicron_init_one (struct pci_dev *pdev, const struct pci_device_id *i
144 }; 144 };
145 const struct ata_port_info *ppi[] = { &info, NULL }; 145 const struct ata_port_info *ppi[] = { &info, NULL };
146 146
147 return ata_pci_sff_init_one(pdev, ppi, &jmicron_sht, NULL); 147 return ata_pci_sff_init_one(pdev, ppi, &jmicron_sht, NULL, 0);
148} 148}
149 149
150static const struct pci_device_id jmicron_pci_tbl[] = { 150static const struct pci_device_id jmicron_pci_tbl[] = {
diff --git a/drivers/ata/pata_legacy.c b/drivers/ata/pata_legacy.c
index 6932e56d179c..9df1ff7e1eaa 100644
--- a/drivers/ata/pata_legacy.c
+++ b/drivers/ata/pata_legacy.c
@@ -25,6 +25,13 @@
25 * http://www.ryston.cz/petr/vlb/pdc20230b.html 25 * http://www.ryston.cz/petr/vlb/pdc20230b.html
26 * http://www.ryston.cz/petr/vlb/pdc20230c.html 26 * http://www.ryston.cz/petr/vlb/pdc20230c.html
27 * http://www.ryston.cz/petr/vlb/pdc20630.html 27 * http://www.ryston.cz/petr/vlb/pdc20630.html
28 * QDI65x0:
29 * http://www.ryston.cz/petr/vlb/qd6500.html
30 * http://www.ryston.cz/petr/vlb/qd6580.html
31 *
32 * QDI65x0 probe code based on drivers/ide/legacy/qd65xx.c
33 * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
34 * Samuel Thibault <samuel.thibault@ens-lyon.org>
28 * 35 *
29 * Unsupported but docs exist: 36 * Unsupported but docs exist:
30 * Appian/Adaptec AIC25VL01/Cirrus Logic PD7220 37 * Appian/Adaptec AIC25VL01/Cirrus Logic PD7220
@@ -35,7 +42,7 @@
35 * the MPIIX where the tuning is PCI side but the IDE is "ISA side". 42 * the MPIIX where the tuning is PCI side but the IDE is "ISA side".
36 * 43 *
37 * Specific support is included for the ht6560a/ht6560b/opti82c611a/ 44 * Specific support is included for the ht6560a/ht6560b/opti82c611a/
38 * opti82c465mv/promise 20230c/20630/winbond83759A 45 * opti82c465mv/promise 20230c/20630/qdi65x0/winbond83759A
39 * 46 *
40 * Use the autospeed and pio_mask options with: 47 * Use the autospeed and pio_mask options with:
41 * Appian ADI/2 aka CLPD7220 or AIC25VL01. 48 * Appian ADI/2 aka CLPD7220 or AIC25VL01.
@@ -672,7 +679,7 @@ static void qdi6580dp_set_piomode(struct ata_port *ap, struct ata_device *adev)
672 outb(timing, ld_qdi->timing + 2 * ap->port_no); 679 outb(timing, ld_qdi->timing + 2 * ap->port_no);
673 /* Clear the FIFO */ 680 /* Clear the FIFO */
674 if (adev->class != ATA_DEV_ATA) 681 if (adev->class != ATA_DEV_ATA)
675 outb(0x5F, ld_qdi->timing + 3); 682 outb(0x5F, (ld_qdi->timing & 0xFFF0) + 3);
676} 683}
677 684
678/** 685/**
@@ -707,7 +714,7 @@ static void qdi6580_set_piomode(struct ata_port *ap, struct ata_device *adev)
707 outb(timing, ld_qdi->timing + 2 * adev->devno); 714 outb(timing, ld_qdi->timing + 2 * adev->devno);
708 /* Clear the FIFO */ 715 /* Clear the FIFO */
709 if (adev->class != ATA_DEV_ATA) 716 if (adev->class != ATA_DEV_ATA)
710 outb(0x5F, ld_qdi->timing + 3); 717 outb(0x5F, (ld_qdi->timing & 0xFFF0) + 3);
711} 718}
712 719
713/** 720/**
@@ -787,6 +794,7 @@ static struct ata_port_operations qdi6580_port_ops = {
787static struct ata_port_operations qdi6580dp_port_ops = { 794static struct ata_port_operations qdi6580dp_port_ops = {
788 .inherits = &legacy_base_port_ops, 795 .inherits = &legacy_base_port_ops,
789 .set_piomode = qdi6580dp_set_piomode, 796 .set_piomode = qdi6580dp_set_piomode,
797 .qc_issue = qdi_qc_issue,
790 .sff_data_xfer = vlb32_data_xfer, 798 .sff_data_xfer = vlb32_data_xfer,
791}; 799};
792 800
diff --git a/drivers/ata/pata_macio.c b/drivers/ata/pata_macio.c
new file mode 100644
index 000000000000..211b6438b3a0
--- /dev/null
+++ b/drivers/ata/pata_macio.c
@@ -0,0 +1,1428 @@
1/*
2 * Libata based driver for Apple "macio" family of PATA controllers
3 *
4 * Copyright 2008/2009 Benjamin Herrenschmidt, IBM Corp
5 * <benh@kernel.crashing.org>
6 *
7 * Some bits and pieces from drivers/ide/ppc/pmac.c
8 *
9 */
10
11#undef DEBUG
12#undef DEBUG_DMA
13
14#include <linux/kernel.h>
15#include <linux/module.h>
16#include <linux/init.h>
17#include <linux/blkdev.h>
18#include <linux/ata.h>
19#include <linux/libata.h>
20#include <linux/adb.h>
21#include <linux/pmu.h>
22#include <linux/scatterlist.h>
23#include <linux/of.h>
24#include <linux/gfp.h>
25
26#include <scsi/scsi.h>
27#include <scsi/scsi_host.h>
28#include <scsi/scsi_device.h>
29
30#include <asm/macio.h>
31#include <asm/io.h>
32#include <asm/dbdma.h>
33#include <asm/pci-bridge.h>
34#include <asm/machdep.h>
35#include <asm/pmac_feature.h>
36#include <asm/mediabay.h>
37
38#ifdef DEBUG_DMA
39#define dev_dbgdma(dev, format, arg...) \
40 dev_printk(KERN_DEBUG , dev , format , ## arg)
41#else
42#define dev_dbgdma(dev, format, arg...) \
43 ({ if (0) dev_printk(KERN_DEBUG, dev, format, ##arg); 0; })
44#endif
45
46#define DRV_NAME "pata_macio"
47#define DRV_VERSION "0.9"
48
49/* Models of macio ATA controller */
50enum {
51 controller_ohare, /* OHare based */
52 controller_heathrow, /* Heathrow/Paddington */
53 controller_kl_ata3, /* KeyLargo ATA-3 */
54 controller_kl_ata4, /* KeyLargo ATA-4 */
55 controller_un_ata6, /* UniNorth2 ATA-6 */
56 controller_k2_ata6, /* K2 ATA-6 */
57 controller_sh_ata6, /* Shasta ATA-6 */
58};
59
60static const char* macio_ata_names[] = {
61 "OHare ATA", /* OHare based */
62 "Heathrow ATA", /* Heathrow/Paddington */
63 "KeyLargo ATA-3", /* KeyLargo ATA-3 (MDMA only) */
64 "KeyLargo ATA-4", /* KeyLargo ATA-4 (UDMA/66) */
65 "UniNorth ATA-6", /* UniNorth2 ATA-6 (UDMA/100) */
66 "K2 ATA-6", /* K2 ATA-6 (UDMA/100) */
67 "Shasta ATA-6", /* Shasta ATA-6 (UDMA/133) */
68};
69
70/*
71 * Extra registers, both 32-bit little-endian
72 */
73#define IDE_TIMING_CONFIG 0x200
74#define IDE_INTERRUPT 0x300
75
76/* Kauai (U2) ATA has different register setup */
77#define IDE_KAUAI_PIO_CONFIG 0x200
78#define IDE_KAUAI_ULTRA_CONFIG 0x210
79#define IDE_KAUAI_POLL_CONFIG 0x220
80
81/*
82 * Timing configuration register definitions
83 */
84
85/* Number of IDE_SYSCLK_NS ticks, argument is in nanoseconds */
86#define SYSCLK_TICKS(t) (((t) + IDE_SYSCLK_NS - 1) / IDE_SYSCLK_NS)
87#define SYSCLK_TICKS_66(t) (((t) + IDE_SYSCLK_66_NS - 1) / IDE_SYSCLK_66_NS)
88#define IDE_SYSCLK_NS 30 /* 33Mhz cell */
89#define IDE_SYSCLK_66_NS 15 /* 66Mhz cell */
90
91/* 133Mhz cell, found in shasta.
92 * See comments about 100 Mhz Uninorth 2...
93 * Note that PIO_MASK and MDMA_MASK seem to overlap, that's just
94 * weird and I don't now why .. at this stage
95 */
96#define TR_133_PIOREG_PIO_MASK 0xff000fff
97#define TR_133_PIOREG_MDMA_MASK 0x00fff800
98#define TR_133_UDMAREG_UDMA_MASK 0x0003ffff
99#define TR_133_UDMAREG_UDMA_EN 0x00000001
100
101/* 100Mhz cell, found in Uninorth 2 and K2. It appears as a pci device
102 * (106b/0033) on uninorth or K2 internal PCI bus and it's clock is
103 * controlled like gem or fw. It appears to be an evolution of keylargo
104 * ATA4 with a timing register extended to 2x32bits registers (one
105 * for PIO & MWDMA and one for UDMA, and a similar DBDMA channel.
106 * It has it's own local feature control register as well.
107 *
108 * After scratching my mind over the timing values, at least for PIO
109 * and MDMA, I think I've figured the format of the timing register,
110 * though I use pre-calculated tables for UDMA as usual...
111 */
112#define TR_100_PIO_ADDRSETUP_MASK 0xff000000 /* Size of field unknown */
113#define TR_100_PIO_ADDRSETUP_SHIFT 24
114#define TR_100_MDMA_MASK 0x00fff000
115#define TR_100_MDMA_RECOVERY_MASK 0x00fc0000
116#define TR_100_MDMA_RECOVERY_SHIFT 18
117#define TR_100_MDMA_ACCESS_MASK 0x0003f000
118#define TR_100_MDMA_ACCESS_SHIFT 12
119#define TR_100_PIO_MASK 0xff000fff
120#define TR_100_PIO_RECOVERY_MASK 0x00000fc0
121#define TR_100_PIO_RECOVERY_SHIFT 6
122#define TR_100_PIO_ACCESS_MASK 0x0000003f
123#define TR_100_PIO_ACCESS_SHIFT 0
124
125#define TR_100_UDMAREG_UDMA_MASK 0x0000ffff
126#define TR_100_UDMAREG_UDMA_EN 0x00000001
127
128
129/* 66Mhz cell, found in KeyLargo. Can do ultra mode 0 to 2 on
130 * 40 connector cable and to 4 on 80 connector one.
131 * Clock unit is 15ns (66Mhz)
132 *
133 * 3 Values can be programmed:
134 * - Write data setup, which appears to match the cycle time. They
135 * also call it DIOW setup.
136 * - Ready to pause time (from spec)
137 * - Address setup. That one is weird. I don't see where exactly
138 * it fits in UDMA cycles, I got it's name from an obscure piece
139 * of commented out code in Darwin. They leave it to 0, we do as
140 * well, despite a comment that would lead to think it has a
141 * min value of 45ns.
142 * Apple also add 60ns to the write data setup (or cycle time ?) on
143 * reads.
144 */
145#define TR_66_UDMA_MASK 0xfff00000
146#define TR_66_UDMA_EN 0x00100000 /* Enable Ultra mode for DMA */
147#define TR_66_PIO_ADDRSETUP_MASK 0xe0000000 /* Address setup */
148#define TR_66_PIO_ADDRSETUP_SHIFT 29
149#define TR_66_UDMA_RDY2PAUS_MASK 0x1e000000 /* Ready 2 pause time */
150#define TR_66_UDMA_RDY2PAUS_SHIFT 25
151#define TR_66_UDMA_WRDATASETUP_MASK 0x01e00000 /* Write data setup time */
152#define TR_66_UDMA_WRDATASETUP_SHIFT 21
153#define TR_66_MDMA_MASK 0x000ffc00
154#define TR_66_MDMA_RECOVERY_MASK 0x000f8000
155#define TR_66_MDMA_RECOVERY_SHIFT 15
156#define TR_66_MDMA_ACCESS_MASK 0x00007c00
157#define TR_66_MDMA_ACCESS_SHIFT 10
158#define TR_66_PIO_MASK 0xe00003ff
159#define TR_66_PIO_RECOVERY_MASK 0x000003e0
160#define TR_66_PIO_RECOVERY_SHIFT 5
161#define TR_66_PIO_ACCESS_MASK 0x0000001f
162#define TR_66_PIO_ACCESS_SHIFT 0
163
164/* 33Mhz cell, found in OHare, Heathrow (& Paddington) and KeyLargo
165 * Can do pio & mdma modes, clock unit is 30ns (33Mhz)
166 *
167 * The access time and recovery time can be programmed. Some older
168 * Darwin code base limit OHare to 150ns cycle time. I decided to do
169 * the same here fore safety against broken old hardware ;)
170 * The HalfTick bit, when set, adds half a clock (15ns) to the access
171 * time and removes one from recovery. It's not supported on KeyLargo
172 * implementation afaik. The E bit appears to be set for PIO mode 0 and
173 * is used to reach long timings used in this mode.
174 */
175#define TR_33_MDMA_MASK 0x003ff800
176#define TR_33_MDMA_RECOVERY_MASK 0x001f0000
177#define TR_33_MDMA_RECOVERY_SHIFT 16
178#define TR_33_MDMA_ACCESS_MASK 0x0000f800
179#define TR_33_MDMA_ACCESS_SHIFT 11
180#define TR_33_MDMA_HALFTICK 0x00200000
181#define TR_33_PIO_MASK 0x000007ff
182#define TR_33_PIO_E 0x00000400
183#define TR_33_PIO_RECOVERY_MASK 0x000003e0
184#define TR_33_PIO_RECOVERY_SHIFT 5
185#define TR_33_PIO_ACCESS_MASK 0x0000001f
186#define TR_33_PIO_ACCESS_SHIFT 0
187
188/*
189 * Interrupt register definitions. Only present on newer cells
190 * (Keylargo and later afaik) so we don't use it.
191 */
192#define IDE_INTR_DMA 0x80000000
193#define IDE_INTR_DEVICE 0x40000000
194
195/*
196 * FCR Register on Kauai. Not sure what bit 0x4 is ...
197 */
198#define KAUAI_FCR_UATA_MAGIC 0x00000004
199#define KAUAI_FCR_UATA_RESET_N 0x00000002
200#define KAUAI_FCR_UATA_ENABLE 0x00000001
201
202
203/* Allow up to 256 DBDMA commands per xfer */
204#define MAX_DCMDS 256
205
206/* Don't let a DMA segment go all the way to 64K */
207#define MAX_DBDMA_SEG 0xff00
208
209
210/*
211 * Wait 1s for disk to answer on IDE bus after a hard reset
212 * of the device (via GPIO/FCR).
213 *
214 * Some devices seem to "pollute" the bus even after dropping
215 * the BSY bit (typically some combo drives slave on the UDMA
216 * bus) after a hard reset. Since we hard reset all drives on
217 * KeyLargo ATA66, we have to keep that delay around. I may end
218 * up not hard resetting anymore on these and keep the delay only
219 * for older interfaces instead (we have to reset when coming
220 * from MacOS...) --BenH.
221 */
222#define IDE_WAKEUP_DELAY_MS 1000
223
224struct pata_macio_timing;
225
226struct pata_macio_priv {
227 int kind;
228 int aapl_bus_id;
229 int mediabay : 1;
230 struct device_node *node;
231 struct macio_dev *mdev;
232 struct pci_dev *pdev;
233 struct device *dev;
234 int irq;
235 u32 treg[2][2];
236 void __iomem *tfregs;
237 void __iomem *kauai_fcr;
238 struct dbdma_cmd * dma_table_cpu;
239 dma_addr_t dma_table_dma;
240 struct ata_host *host;
241 const struct pata_macio_timing *timings;
242};
243
244/* Previous variants of this driver used to calculate timings
245 * for various variants of the chip and use tables for others.
246 *
247 * Not only was this confusing, but in addition, it isn't clear
248 * whether our calculation code was correct. It didn't entirely
249 * match the darwin code and whatever documentation I could find
250 * on these cells
251 *
252 * I decided to entirely rely on a table instead for this version
253 * of the driver. Also, because I don't really care about derated
254 * modes and really old HW other than making it work, I'm not going
255 * to calculate / snoop timing values for something else than the
256 * standard modes.
257 */
258struct pata_macio_timing {
259 int mode;
260 u32 reg1; /* Bits to set in first timing reg */
261 u32 reg2; /* Bits to set in second timing reg */
262};
263
264static const struct pata_macio_timing pata_macio_ohare_timings[] = {
265 { XFER_PIO_0, 0x00000526, 0, },
266 { XFER_PIO_1, 0x00000085, 0, },
267 { XFER_PIO_2, 0x00000025, 0, },
268 { XFER_PIO_3, 0x00000025, 0, },
269 { XFER_PIO_4, 0x00000025, 0, },
270 { XFER_MW_DMA_0, 0x00074000, 0, },
271 { XFER_MW_DMA_1, 0x00221000, 0, },
272 { XFER_MW_DMA_2, 0x00211000, 0, },
273 { -1, 0, 0 }
274};
275
276static const struct pata_macio_timing pata_macio_heathrow_timings[] = {
277 { XFER_PIO_0, 0x00000526, 0, },
278 { XFER_PIO_1, 0x00000085, 0, },
279 { XFER_PIO_2, 0x00000025, 0, },
280 { XFER_PIO_3, 0x00000025, 0, },
281 { XFER_PIO_4, 0x00000025, 0, },
282 { XFER_MW_DMA_0, 0x00074000, 0, },
283 { XFER_MW_DMA_1, 0x00221000, 0, },
284 { XFER_MW_DMA_2, 0x00211000, 0, },
285 { -1, 0, 0 }
286};
287
288static const struct pata_macio_timing pata_macio_kl33_timings[] = {
289 { XFER_PIO_0, 0x00000526, 0, },
290 { XFER_PIO_1, 0x00000085, 0, },
291 { XFER_PIO_2, 0x00000025, 0, },
292 { XFER_PIO_3, 0x00000025, 0, },
293 { XFER_PIO_4, 0x00000025, 0, },
294 { XFER_MW_DMA_0, 0x00084000, 0, },
295 { XFER_MW_DMA_1, 0x00021800, 0, },
296 { XFER_MW_DMA_2, 0x00011800, 0, },
297 { -1, 0, 0 }
298};
299
300static const struct pata_macio_timing pata_macio_kl66_timings[] = {
301 { XFER_PIO_0, 0x0000038c, 0, },
302 { XFER_PIO_1, 0x0000020a, 0, },
303 { XFER_PIO_2, 0x00000127, 0, },
304 { XFER_PIO_3, 0x000000c6, 0, },
305 { XFER_PIO_4, 0x00000065, 0, },
306 { XFER_MW_DMA_0, 0x00084000, 0, },
307 { XFER_MW_DMA_1, 0x00029800, 0, },
308 { XFER_MW_DMA_2, 0x00019400, 0, },
309 { XFER_UDMA_0, 0x19100000, 0, },
310 { XFER_UDMA_1, 0x14d00000, 0, },
311 { XFER_UDMA_2, 0x10900000, 0, },
312 { XFER_UDMA_3, 0x0c700000, 0, },
313 { XFER_UDMA_4, 0x0c500000, 0, },
314 { -1, 0, 0 }
315};
316
317static const struct pata_macio_timing pata_macio_kauai_timings[] = {
318 { XFER_PIO_0, 0x08000a92, 0, },
319 { XFER_PIO_1, 0x0800060f, 0, },
320 { XFER_PIO_2, 0x0800038b, 0, },
321 { XFER_PIO_3, 0x05000249, 0, },
322 { XFER_PIO_4, 0x04000148, 0, },
323 { XFER_MW_DMA_0, 0x00618000, 0, },
324 { XFER_MW_DMA_1, 0x00209000, 0, },
325 { XFER_MW_DMA_2, 0x00148000, 0, },
326 { XFER_UDMA_0, 0, 0x000070c1, },
327 { XFER_UDMA_1, 0, 0x00005d81, },
328 { XFER_UDMA_2, 0, 0x00004a61, },
329 { XFER_UDMA_3, 0, 0x00003a51, },
330 { XFER_UDMA_4, 0, 0x00002a31, },
331 { XFER_UDMA_5, 0, 0x00002921, },
332 { -1, 0, 0 }
333};
334
335static const struct pata_macio_timing pata_macio_shasta_timings[] = {
336 { XFER_PIO_0, 0x0a000c97, 0, },
337 { XFER_PIO_1, 0x07000712, 0, },
338 { XFER_PIO_2, 0x040003cd, 0, },
339 { XFER_PIO_3, 0x0500028b, 0, },
340 { XFER_PIO_4, 0x0400010a, 0, },
341 { XFER_MW_DMA_0, 0x00820800, 0, },
342 { XFER_MW_DMA_1, 0x0028b000, 0, },
343 { XFER_MW_DMA_2, 0x001ca000, 0, },
344 { XFER_UDMA_0, 0, 0x00035901, },
345 { XFER_UDMA_1, 0, 0x000348b1, },
346 { XFER_UDMA_2, 0, 0x00033881, },
347 { XFER_UDMA_3, 0, 0x00033861, },
348 { XFER_UDMA_4, 0, 0x00033841, },
349 { XFER_UDMA_5, 0, 0x00033031, },
350 { XFER_UDMA_6, 0, 0x00033021, },
351 { -1, 0, 0 }
352};
353
354static const struct pata_macio_timing *pata_macio_find_timing(
355 struct pata_macio_priv *priv,
356 int mode)
357{
358 int i;
359
360 for (i = 0; priv->timings[i].mode > 0; i++) {
361 if (priv->timings[i].mode == mode)
362 return &priv->timings[i];
363 }
364 return NULL;
365}
366
367
368static void pata_macio_apply_timings(struct ata_port *ap, unsigned int device)
369{
370 struct pata_macio_priv *priv = ap->private_data;
371 void __iomem *rbase = ap->ioaddr.cmd_addr;
372
373 if (priv->kind == controller_sh_ata6 ||
374 priv->kind == controller_un_ata6 ||
375 priv->kind == controller_k2_ata6) {
376 writel(priv->treg[device][0], rbase + IDE_KAUAI_PIO_CONFIG);
377 writel(priv->treg[device][1], rbase + IDE_KAUAI_ULTRA_CONFIG);
378 } else
379 writel(priv->treg[device][0], rbase + IDE_TIMING_CONFIG);
380}
381
382static void pata_macio_dev_select(struct ata_port *ap, unsigned int device)
383{
384 ata_sff_dev_select(ap, device);
385
386 /* Apply timings */
387 pata_macio_apply_timings(ap, device);
388}
389
390static void pata_macio_set_timings(struct ata_port *ap,
391 struct ata_device *adev)
392{
393 struct pata_macio_priv *priv = ap->private_data;
394 const struct pata_macio_timing *t;
395
396 dev_dbg(priv->dev, "Set timings: DEV=%d,PIO=0x%x (%s),DMA=0x%x (%s)\n",
397 adev->devno,
398 adev->pio_mode,
399 ata_mode_string(ata_xfer_mode2mask(adev->pio_mode)),
400 adev->dma_mode,
401 ata_mode_string(ata_xfer_mode2mask(adev->dma_mode)));
402
403 /* First clear timings */
404 priv->treg[adev->devno][0] = priv->treg[adev->devno][1] = 0;
405
406 /* Now get the PIO timings */
407 t = pata_macio_find_timing(priv, adev->pio_mode);
408 if (t == NULL) {
409 dev_warn(priv->dev, "Invalid PIO timing requested: 0x%x\n",
410 adev->pio_mode);
411 t = pata_macio_find_timing(priv, XFER_PIO_0);
412 }
413 BUG_ON(t == NULL);
414
415 /* PIO timings only ever use the first treg */
416 priv->treg[adev->devno][0] |= t->reg1;
417
418 /* Now get DMA timings */
419 t = pata_macio_find_timing(priv, adev->dma_mode);
420 if (t == NULL || (t->reg1 == 0 && t->reg2 == 0)) {
421 dev_dbg(priv->dev, "DMA timing not set yet, using MW_DMA_0\n");
422 t = pata_macio_find_timing(priv, XFER_MW_DMA_0);
423 }
424 BUG_ON(t == NULL);
425
426 /* DMA timings can use both tregs */
427 priv->treg[adev->devno][0] |= t->reg1;
428 priv->treg[adev->devno][1] |= t->reg2;
429
430 dev_dbg(priv->dev, " -> %08x %08x\n",
431 priv->treg[adev->devno][0],
432 priv->treg[adev->devno][1]);
433
434 /* Apply to hardware */
435 pata_macio_apply_timings(ap, adev->devno);
436}
437
438/*
439 * Blast some well known "safe" values to the timing registers at init or
440 * wakeup from sleep time, before we do real calculation
441 */
442static void pata_macio_default_timings(struct pata_macio_priv *priv)
443{
444 unsigned int value, value2 = 0;
445
446 switch(priv->kind) {
447 case controller_sh_ata6:
448 value = 0x0a820c97;
449 value2 = 0x00033031;
450 break;
451 case controller_un_ata6:
452 case controller_k2_ata6:
453 value = 0x08618a92;
454 value2 = 0x00002921;
455 break;
456 case controller_kl_ata4:
457 value = 0x0008438c;
458 break;
459 case controller_kl_ata3:
460 value = 0x00084526;
461 break;
462 case controller_heathrow:
463 case controller_ohare:
464 default:
465 value = 0x00074526;
466 break;
467 }
468 priv->treg[0][0] = priv->treg[1][0] = value;
469 priv->treg[0][1] = priv->treg[1][1] = value2;
470}
471
472static int pata_macio_cable_detect(struct ata_port *ap)
473{
474 struct pata_macio_priv *priv = ap->private_data;
475
476 /* Get cable type from device-tree */
477 if (priv->kind == controller_kl_ata4 ||
478 priv->kind == controller_un_ata6 ||
479 priv->kind == controller_k2_ata6 ||
480 priv->kind == controller_sh_ata6) {
481 const char* cable = of_get_property(priv->node, "cable-type",
482 NULL);
483 struct device_node *root = of_find_node_by_path("/");
484 const char *model = of_get_property(root, "model", NULL);
485
486 if (cable && !strncmp(cable, "80-", 3)) {
487 /* Some drives fail to detect 80c cable in PowerBook
488 * These machine use proprietary short IDE cable
489 * anyway
490 */
491 if (!strncmp(model, "PowerBook", 9))
492 return ATA_CBL_PATA40_SHORT;
493 else
494 return ATA_CBL_PATA80;
495 }
496 }
497
498 /* G5's seem to have incorrect cable type in device-tree.
499 * Let's assume they always have a 80 conductor cable, this seem to
500 * be always the case unless the user mucked around
501 */
502 if (of_device_is_compatible(priv->node, "K2-UATA") ||
503 of_device_is_compatible(priv->node, "shasta-ata"))
504 return ATA_CBL_PATA80;
505
506 /* Anything else is 40 connectors */
507 return ATA_CBL_PATA40;
508}
509
510static void pata_macio_qc_prep(struct ata_queued_cmd *qc)
511{
512 unsigned int write = (qc->tf.flags & ATA_TFLAG_WRITE);
513 struct ata_port *ap = qc->ap;
514 struct pata_macio_priv *priv = ap->private_data;
515 struct scatterlist *sg;
516 struct dbdma_cmd *table;
517 unsigned int si, pi;
518
519 dev_dbgdma(priv->dev, "%s: qc %p flags %lx, write %d dev %d\n",
520 __func__, qc, qc->flags, write, qc->dev->devno);
521
522 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
523 return;
524
525 table = (struct dbdma_cmd *) priv->dma_table_cpu;
526
527 pi = 0;
528 for_each_sg(qc->sg, sg, qc->n_elem, si) {
529 u32 addr, sg_len, len;
530
531 /* determine if physical DMA addr spans 64K boundary.
532 * Note h/w doesn't support 64-bit, so we unconditionally
533 * truncate dma_addr_t to u32.
534 */
535 addr = (u32) sg_dma_address(sg);
536 sg_len = sg_dma_len(sg);
537
538 while (sg_len) {
539 /* table overflow should never happen */
540 BUG_ON (pi++ >= MAX_DCMDS);
541
542 len = (sg_len < MAX_DBDMA_SEG) ? sg_len : MAX_DBDMA_SEG;
543 st_le16(&table->command, write ? OUTPUT_MORE: INPUT_MORE);
544 st_le16(&table->req_count, len);
545 st_le32(&table->phy_addr, addr);
546 table->cmd_dep = 0;
547 table->xfer_status = 0;
548 table->res_count = 0;
549 addr += len;
550 sg_len -= len;
551 ++table;
552 }
553 }
554
555 /* Should never happen according to Tejun */
556 BUG_ON(!pi);
557
558 /* Convert the last command to an input/output */
559 table--;
560 st_le16(&table->command, write ? OUTPUT_LAST: INPUT_LAST);
561 table++;
562
563 /* Add the stop command to the end of the list */
564 memset(table, 0, sizeof(struct dbdma_cmd));
565 st_le16(&table->command, DBDMA_STOP);
566
567 dev_dbgdma(priv->dev, "%s: %d DMA list entries\n", __func__, pi);
568}
569
570
571static void pata_macio_freeze(struct ata_port *ap)
572{
573 struct dbdma_regs __iomem *dma_regs = ap->ioaddr.bmdma_addr;
574
575 if (dma_regs) {
576 unsigned int timeout = 1000000;
577
578 /* Make sure DMA controller is stopped */
579 writel((RUN|PAUSE|FLUSH|WAKE|DEAD) << 16, &dma_regs->control);
580 while (--timeout && (readl(&dma_regs->status) & RUN))
581 udelay(1);
582 }
583
584 ata_sff_freeze(ap);
585}
586
587
588static void pata_macio_bmdma_setup(struct ata_queued_cmd *qc)
589{
590 struct ata_port *ap = qc->ap;
591 struct pata_macio_priv *priv = ap->private_data;
592 struct dbdma_regs __iomem *dma_regs = ap->ioaddr.bmdma_addr;
593 int dev = qc->dev->devno;
594
595 dev_dbgdma(priv->dev, "%s: qc %p\n", __func__, qc);
596
597 /* Make sure DMA commands updates are visible */
598 writel(priv->dma_table_dma, &dma_regs->cmdptr);
599
600 /* On KeyLargo 66Mhz cell, we need to add 60ns to wrDataSetup on
601 * UDMA reads
602 */
603 if (priv->kind == controller_kl_ata4 &&
604 (priv->treg[dev][0] & TR_66_UDMA_EN)) {
605 void __iomem *rbase = ap->ioaddr.cmd_addr;
606 u32 reg = priv->treg[dev][0];
607
608 if (!(qc->tf.flags & ATA_TFLAG_WRITE))
609 reg += 0x00800000;
610 writel(reg, rbase + IDE_TIMING_CONFIG);
611 }
612
613 /* issue r/w command */
614 ap->ops->sff_exec_command(ap, &qc->tf);
615}
616
617static void pata_macio_bmdma_start(struct ata_queued_cmd *qc)
618{
619 struct ata_port *ap = qc->ap;
620 struct pata_macio_priv *priv = ap->private_data;
621 struct dbdma_regs __iomem *dma_regs = ap->ioaddr.bmdma_addr;
622
623 dev_dbgdma(priv->dev, "%s: qc %p\n", __func__, qc);
624
625 writel((RUN << 16) | RUN, &dma_regs->control);
626 /* Make sure it gets to the controller right now */
627 (void)readl(&dma_regs->control);
628}
629
630static void pata_macio_bmdma_stop(struct ata_queued_cmd *qc)
631{
632 struct ata_port *ap = qc->ap;
633 struct pata_macio_priv *priv = ap->private_data;
634 struct dbdma_regs __iomem *dma_regs = ap->ioaddr.bmdma_addr;
635 unsigned int timeout = 1000000;
636
637 dev_dbgdma(priv->dev, "%s: qc %p\n", __func__, qc);
638
639 /* Stop the DMA engine and wait for it to full halt */
640 writel (((RUN|WAKE|DEAD) << 16), &dma_regs->control);
641 while (--timeout && (readl(&dma_regs->status) & RUN))
642 udelay(1);
643}
644
645static u8 pata_macio_bmdma_status(struct ata_port *ap)
646{
647 struct pata_macio_priv *priv = ap->private_data;
648 struct dbdma_regs __iomem *dma_regs = ap->ioaddr.bmdma_addr;
649 u32 dstat, rstat = ATA_DMA_INTR;
650 unsigned long timeout = 0;
651
652 dstat = readl(&dma_regs->status);
653
654 dev_dbgdma(priv->dev, "%s: dstat=%x\n", __func__, dstat);
655
656 /* We have two things to deal with here:
657 *
658 * - The dbdma won't stop if the command was started
659 * but completed with an error without transferring all
660 * datas. This happens when bad blocks are met during
661 * a multi-block transfer.
662 *
663 * - The dbdma fifo hasn't yet finished flushing to
664 * to system memory when the disk interrupt occurs.
665 *
666 */
667
668 /* First check for errors */
669 if ((dstat & (RUN|DEAD)) != RUN)
670 rstat |= ATA_DMA_ERR;
671
672 /* If ACTIVE is cleared, the STOP command has been hit and
673 * the transfer is complete. If not, we have to flush the
674 * channel.
675 */
676 if ((dstat & ACTIVE) == 0)
677 return rstat;
678
679 dev_dbgdma(priv->dev, "%s: DMA still active, flushing...\n", __func__);
680
681 /* If dbdma didn't execute the STOP command yet, the
682 * active bit is still set. We consider that we aren't
683 * sharing interrupts (which is hopefully the case with
684 * those controllers) and so we just try to flush the
685 * channel for pending data in the fifo
686 */
687 udelay(1);
688 writel((FLUSH << 16) | FLUSH, &dma_regs->control);
689 for (;;) {
690 udelay(1);
691 dstat = readl(&dma_regs->status);
692 if ((dstat & FLUSH) == 0)
693 break;
694 if (++timeout > 1000) {
695 dev_warn(priv->dev, "timeout flushing DMA\n");
696 rstat |= ATA_DMA_ERR;
697 break;
698 }
699 }
700 return rstat;
701}
702
703/* port_start is when we allocate the DMA command list */
704static int pata_macio_port_start(struct ata_port *ap)
705{
706 struct pata_macio_priv *priv = ap->private_data;
707
708 if (ap->ioaddr.bmdma_addr == NULL)
709 return 0;
710
711 /* Allocate space for the DBDMA commands.
712 *
713 * The +2 is +1 for the stop command and +1 to allow for
714 * aligning the start address to a multiple of 16 bytes.
715 */
716 priv->dma_table_cpu =
717 dmam_alloc_coherent(priv->dev,
718 (MAX_DCMDS + 2) * sizeof(struct dbdma_cmd),
719 &priv->dma_table_dma, GFP_KERNEL);
720 if (priv->dma_table_cpu == NULL) {
721 dev_err(priv->dev, "Unable to allocate DMA command list\n");
722 ap->ioaddr.bmdma_addr = NULL;
723 }
724 return 0;
725}
726
727static void pata_macio_irq_clear(struct ata_port *ap)
728{
729 struct pata_macio_priv *priv = ap->private_data;
730
731 /* Nothing to do here */
732
733 dev_dbgdma(priv->dev, "%s\n", __func__);
734}
735
736static void pata_macio_reset_hw(struct pata_macio_priv *priv, int resume)
737{
738 dev_dbg(priv->dev, "Enabling & resetting... \n");
739
740 if (priv->mediabay)
741 return;
742
743 if (priv->kind == controller_ohare && !resume) {
744 /* The code below is having trouble on some ohare machines
745 * (timing related ?). Until I can put my hand on one of these
746 * units, I keep the old way
747 */
748 ppc_md.feature_call(PMAC_FTR_IDE_ENABLE, priv->node, 0, 1);
749 } else {
750 int rc;
751
752 /* Reset and enable controller */
753 rc = ppc_md.feature_call(PMAC_FTR_IDE_RESET,
754 priv->node, priv->aapl_bus_id, 1);
755 ppc_md.feature_call(PMAC_FTR_IDE_ENABLE,
756 priv->node, priv->aapl_bus_id, 1);
757 msleep(10);
758 /* Only bother waiting if there's a reset control */
759 if (rc == 0) {
760 ppc_md.feature_call(PMAC_FTR_IDE_RESET,
761 priv->node, priv->aapl_bus_id, 0);
762 msleep(IDE_WAKEUP_DELAY_MS);
763 }
764 }
765
766 /* If resuming a PCI device, restore the config space here */
767 if (priv->pdev && resume) {
768 int rc;
769
770 pci_restore_state(priv->pdev);
771 rc = pcim_enable_device(priv->pdev);
772 if (rc)
773 dev_printk(KERN_ERR, &priv->pdev->dev,
774 "Failed to enable device after resume (%d)\n", rc);
775 else
776 pci_set_master(priv->pdev);
777 }
778
779 /* On Kauai, initialize the FCR. We don't perform a reset, doesn't really
780 * seem necessary and speeds up the boot process
781 */
782 if (priv->kauai_fcr)
783 writel(KAUAI_FCR_UATA_MAGIC |
784 KAUAI_FCR_UATA_RESET_N |
785 KAUAI_FCR_UATA_ENABLE, priv->kauai_fcr);
786}
787
788/* Hook the standard slave config to fixup some HW related alignment
789 * restrictions
790 */
791static int pata_macio_slave_config(struct scsi_device *sdev)
792{
793 struct ata_port *ap = ata_shost_to_port(sdev->host);
794 struct pata_macio_priv *priv = ap->private_data;
795 struct ata_device *dev;
796 u16 cmd;
797 int rc;
798
799 /* First call original */
800 rc = ata_scsi_slave_config(sdev);
801 if (rc)
802 return rc;
803
804 /* This is lifted from sata_nv */
805 dev = &ap->link.device[sdev->id];
806
807 /* OHare has issues with non cache aligned DMA on some chipsets */
808 if (priv->kind == controller_ohare) {
809 blk_queue_update_dma_alignment(sdev->request_queue, 31);
810 blk_queue_update_dma_pad(sdev->request_queue, 31);
811
812 /* Tell the world about it */
813 ata_dev_printk(dev, KERN_INFO, "OHare alignment limits applied\n");
814 return 0;
815 }
816
817 /* We only have issues with ATAPI */
818 if (dev->class != ATA_DEV_ATAPI)
819 return 0;
820
821 /* Shasta and K2 seem to have "issues" with reads ... */
822 if (priv->kind == controller_sh_ata6 || priv->kind == controller_k2_ata6) {
823 /* Allright these are bad, apply restrictions */
824 blk_queue_update_dma_alignment(sdev->request_queue, 15);
825 blk_queue_update_dma_pad(sdev->request_queue, 15);
826
827 /* We enable MWI and hack cache line size directly here, this
828 * is specific to this chipset and not normal values, we happen
829 * to somewhat know what we are doing here (which is basically
830 * to do the same Apple does and pray they did not get it wrong :-)
831 */
832 BUG_ON(!priv->pdev);
833 pci_write_config_byte(priv->pdev, PCI_CACHE_LINE_SIZE, 0x08);
834 pci_read_config_word(priv->pdev, PCI_COMMAND, &cmd);
835 pci_write_config_word(priv->pdev, PCI_COMMAND,
836 cmd | PCI_COMMAND_INVALIDATE);
837
838 /* Tell the world about it */
839 ata_dev_printk(dev, KERN_INFO,
840 "K2/Shasta alignment limits applied\n");
841 }
842
843 return 0;
844}
845
846#ifdef CONFIG_PM
847
848static int pata_macio_do_suspend(struct pata_macio_priv *priv, pm_message_t mesg)
849{
850 int rc;
851
852 /* First, core libata suspend to do most of the work */
853 rc = ata_host_suspend(priv->host, mesg);
854 if (rc)
855 return rc;
856
857 /* Restore to default timings */
858 pata_macio_default_timings(priv);
859
860 /* Mask interrupt. Not strictly necessary but old driver did
861 * it and I'd rather not change that here */
862 disable_irq(priv->irq);
863
864 /* The media bay will handle itself just fine */
865 if (priv->mediabay)
866 return 0;
867
868 /* Kauai has bus control FCRs directly here */
869 if (priv->kauai_fcr) {
870 u32 fcr = readl(priv->kauai_fcr);
871 fcr &= ~(KAUAI_FCR_UATA_RESET_N | KAUAI_FCR_UATA_ENABLE);
872 writel(fcr, priv->kauai_fcr);
873 }
874
875 /* For PCI, save state and disable DMA. No need to call
876 * pci_set_power_state(), the HW doesn't do D states that
877 * way, the platform code will take care of suspending the
878 * ASIC properly
879 */
880 if (priv->pdev) {
881 pci_save_state(priv->pdev);
882 pci_disable_device(priv->pdev);
883 }
884
885 /* Disable the bus on older machines and the cell on kauai */
886 ppc_md.feature_call(PMAC_FTR_IDE_ENABLE, priv->node,
887 priv->aapl_bus_id, 0);
888
889 return 0;
890}
891
892static int pata_macio_do_resume(struct pata_macio_priv *priv)
893{
894 /* Reset and re-enable the HW */
895 pata_macio_reset_hw(priv, 1);
896
897 /* Sanitize drive timings */
898 pata_macio_apply_timings(priv->host->ports[0], 0);
899
900 /* We want our IRQ back ! */
901 enable_irq(priv->irq);
902
903 /* Let the libata core take it from there */
904 ata_host_resume(priv->host);
905
906 return 0;
907}
908
909#endif /* CONFIG_PM */
910
911static struct scsi_host_template pata_macio_sht = {
912 ATA_BASE_SHT(DRV_NAME),
913 .sg_tablesize = MAX_DCMDS,
914 /* We may not need that strict one */
915 .dma_boundary = ATA_DMA_BOUNDARY,
916 .slave_configure = pata_macio_slave_config,
917};
918
919static struct ata_port_operations pata_macio_ops = {
920 .inherits = &ata_sff_port_ops,
921
922 .freeze = pata_macio_freeze,
923 .set_piomode = pata_macio_set_timings,
924 .set_dmamode = pata_macio_set_timings,
925 .cable_detect = pata_macio_cable_detect,
926 .sff_dev_select = pata_macio_dev_select,
927 .qc_prep = pata_macio_qc_prep,
928 .mode_filter = ata_bmdma_mode_filter,
929 .bmdma_setup = pata_macio_bmdma_setup,
930 .bmdma_start = pata_macio_bmdma_start,
931 .bmdma_stop = pata_macio_bmdma_stop,
932 .bmdma_status = pata_macio_bmdma_status,
933 .port_start = pata_macio_port_start,
934 .sff_irq_clear = pata_macio_irq_clear,
935};
936
937static void __devinit pata_macio_invariants(struct pata_macio_priv *priv)
938{
939 const int *bidp;
940
941 /* Identify the type of controller */
942 if (of_device_is_compatible(priv->node, "shasta-ata")) {
943 priv->kind = controller_sh_ata6;
944 priv->timings = pata_macio_shasta_timings;
945 } else if (of_device_is_compatible(priv->node, "kauai-ata")) {
946 priv->kind = controller_un_ata6;
947 priv->timings = pata_macio_kauai_timings;
948 } else if (of_device_is_compatible(priv->node, "K2-UATA")) {
949 priv->kind = controller_k2_ata6;
950 priv->timings = pata_macio_kauai_timings;
951 } else if (of_device_is_compatible(priv->node, "keylargo-ata")) {
952 if (strcmp(priv->node->name, "ata-4") == 0) {
953 priv->kind = controller_kl_ata4;
954 priv->timings = pata_macio_kl66_timings;
955 } else {
956 priv->kind = controller_kl_ata3;
957 priv->timings = pata_macio_kl33_timings;
958 }
959 } else if (of_device_is_compatible(priv->node, "heathrow-ata")) {
960 priv->kind = controller_heathrow;
961 priv->timings = pata_macio_heathrow_timings;
962 } else {
963 priv->kind = controller_ohare;
964 priv->timings = pata_macio_ohare_timings;
965 }
966
967 /* XXX FIXME --- setup priv->mediabay here */
968
969 /* Get Apple bus ID (for clock and ASIC control) */
970 bidp = of_get_property(priv->node, "AAPL,bus-id", NULL);
971 priv->aapl_bus_id = bidp ? *bidp : 0;
972
973 /* Fixup missing Apple bus ID in case of media-bay */
974 if (priv->mediabay && bidp == 0)
975 priv->aapl_bus_id = 1;
976}
977
978static void __devinit pata_macio_setup_ios(struct ata_ioports *ioaddr,
979 void __iomem * base,
980 void __iomem * dma)
981{
982 /* cmd_addr is the base of regs for that port */
983 ioaddr->cmd_addr = base;
984
985 /* taskfile registers */
986 ioaddr->data_addr = base + (ATA_REG_DATA << 4);
987 ioaddr->error_addr = base + (ATA_REG_ERR << 4);
988 ioaddr->feature_addr = base + (ATA_REG_FEATURE << 4);
989 ioaddr->nsect_addr = base + (ATA_REG_NSECT << 4);
990 ioaddr->lbal_addr = base + (ATA_REG_LBAL << 4);
991 ioaddr->lbam_addr = base + (ATA_REG_LBAM << 4);
992 ioaddr->lbah_addr = base + (ATA_REG_LBAH << 4);
993 ioaddr->device_addr = base + (ATA_REG_DEVICE << 4);
994 ioaddr->status_addr = base + (ATA_REG_STATUS << 4);
995 ioaddr->command_addr = base + (ATA_REG_CMD << 4);
996 ioaddr->altstatus_addr = base + 0x160;
997 ioaddr->ctl_addr = base + 0x160;
998 ioaddr->bmdma_addr = dma;
999}
1000
1001static void __devinit pmac_macio_calc_timing_masks(struct pata_macio_priv *priv,
1002 struct ata_port_info *pinfo)
1003{
1004 int i = 0;
1005
1006 pinfo->pio_mask = 0;
1007 pinfo->mwdma_mask = 0;
1008 pinfo->udma_mask = 0;
1009
1010 while (priv->timings[i].mode > 0) {
1011 unsigned int mask = 1U << (priv->timings[i].mode & 0x0f);
1012 switch(priv->timings[i].mode & 0xf0) {
1013 case 0x00: /* PIO */
1014 pinfo->pio_mask |= (mask >> 8);
1015 break;
1016 case 0x20: /* MWDMA */
1017 pinfo->mwdma_mask |= mask;
1018 break;
1019 case 0x40: /* UDMA */
1020 pinfo->udma_mask |= mask;
1021 break;
1022 }
1023 i++;
1024 }
1025 dev_dbg(priv->dev, "Supported masks: PIO=%lx, MWDMA=%lx, UDMA=%lx\n",
1026 pinfo->pio_mask, pinfo->mwdma_mask, pinfo->udma_mask);
1027}
1028
1029static int __devinit pata_macio_common_init(struct pata_macio_priv *priv,
1030 resource_size_t tfregs,
1031 resource_size_t dmaregs,
1032 resource_size_t fcregs,
1033 unsigned long irq)
1034{
1035 struct ata_port_info pinfo;
1036 const struct ata_port_info *ppi[] = { &pinfo, NULL };
1037 void __iomem *dma_regs = NULL;
1038
1039 /* Fill up privates with various invariants collected from the
1040 * device-tree
1041 */
1042 pata_macio_invariants(priv);
1043
1044 /* Make sure we have sane initial timings in the cache */
1045 pata_macio_default_timings(priv);
1046
1047 /* Not sure what the real max is but we know it's less than 64K, let's
1048 * use 64K minus 256
1049 */
1050 dma_set_max_seg_size(priv->dev, MAX_DBDMA_SEG);
1051
1052 /* Allocate libata host for 1 port */
1053 memset(&pinfo, 0, sizeof(struct ata_port_info));
1054 pmac_macio_calc_timing_masks(priv, &pinfo);
1055 pinfo.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_MMIO |
1056 ATA_FLAG_NO_LEGACY;
1057 pinfo.port_ops = &pata_macio_ops;
1058 pinfo.private_data = priv;
1059
1060 priv->host = ata_host_alloc_pinfo(priv->dev, ppi, 1);
1061 if (priv->host == NULL) {
1062 dev_err(priv->dev, "Failed to allocate ATA port structure\n");
1063 return -ENOMEM;
1064 }
1065
1066 /* Setup the private data in host too */
1067 priv->host->private_data = priv;
1068
1069 /* Map base registers */
1070 priv->tfregs = devm_ioremap(priv->dev, tfregs, 0x100);
1071 if (priv->tfregs == NULL) {
1072 dev_err(priv->dev, "Failed to map ATA ports\n");
1073 return -ENOMEM;
1074 }
1075 priv->host->iomap = &priv->tfregs;
1076
1077 /* Map DMA regs */
1078 if (dmaregs != 0) {
1079 dma_regs = devm_ioremap(priv->dev, dmaregs,
1080 sizeof(struct dbdma_regs));
1081 if (dma_regs == NULL)
1082 dev_warn(priv->dev, "Failed to map ATA DMA registers\n");
1083 }
1084
1085 /* If chip has local feature control, map those regs too */
1086 if (fcregs != 0) {
1087 priv->kauai_fcr = devm_ioremap(priv->dev, fcregs, 4);
1088 if (priv->kauai_fcr == NULL) {
1089 dev_err(priv->dev, "Failed to map ATA FCR register\n");
1090 return -ENOMEM;
1091 }
1092 }
1093
1094 /* Setup port data structure */
1095 pata_macio_setup_ios(&priv->host->ports[0]->ioaddr,
1096 priv->tfregs, dma_regs);
1097 priv->host->ports[0]->private_data = priv;
1098
1099 /* hard-reset the controller */
1100 pata_macio_reset_hw(priv, 0);
1101 pata_macio_apply_timings(priv->host->ports[0], 0);
1102
1103 /* Enable bus master if necessary */
1104 if (priv->pdev && dma_regs)
1105 pci_set_master(priv->pdev);
1106
1107 dev_info(priv->dev, "Activating pata-macio chipset %s, Apple bus ID %d\n",
1108 macio_ata_names[priv->kind], priv->aapl_bus_id);
1109
1110 /* Start it up */
1111 priv->irq = irq;
1112 return ata_host_activate(priv->host, irq, ata_sff_interrupt, 0,
1113 &pata_macio_sht);
1114}
1115
1116static int __devinit pata_macio_attach(struct macio_dev *mdev,
1117 const struct of_device_id *match)
1118{
1119 struct pata_macio_priv *priv;
1120 resource_size_t tfregs, dmaregs = 0;
1121 unsigned long irq;
1122 int rc;
1123
1124 /* Check for broken device-trees */
1125 if (macio_resource_count(mdev) == 0) {
1126 dev_err(&mdev->ofdev.dev,
1127 "No addresses for controller\n");
1128 return -ENXIO;
1129 }
1130
1131 /* Enable managed resources */
1132 macio_enable_devres(mdev);
1133
1134 /* Allocate and init private data structure */
1135 priv = devm_kzalloc(&mdev->ofdev.dev,
1136 sizeof(struct pata_macio_priv), GFP_KERNEL);
1137 if (priv == NULL) {
1138 dev_err(&mdev->ofdev.dev,
1139 "Failed to allocate private memory\n");
1140 return -ENOMEM;
1141 }
1142 priv->node = of_node_get(mdev->ofdev.node);
1143 priv->mdev = mdev;
1144 priv->dev = &mdev->ofdev.dev;
1145
1146 /* Request memory resource for taskfile registers */
1147 if (macio_request_resource(mdev, 0, "pata-macio")) {
1148 dev_err(&mdev->ofdev.dev,
1149 "Cannot obtain taskfile resource\n");
1150 return -EBUSY;
1151 }
1152 tfregs = macio_resource_start(mdev, 0);
1153
1154 /* Request resources for DMA registers if any */
1155 if (macio_resource_count(mdev) >= 2) {
1156 if (macio_request_resource(mdev, 1, "pata-macio-dma"))
1157 dev_err(&mdev->ofdev.dev,
1158 "Cannot obtain DMA resource\n");
1159 else
1160 dmaregs = macio_resource_start(mdev, 1);
1161 }
1162
1163 /*
1164 * Fixup missing IRQ for some old implementations with broken
1165 * device-trees.
1166 *
1167 * This is a bit bogus, it should be fixed in the device-tree itself,
1168 * via the existing macio fixups, based on the type of interrupt
1169 * controller in the machine. However, I have no test HW for this case,
1170 * and this trick works well enough on those old machines...
1171 */
1172 if (macio_irq_count(mdev) == 0) {
1173 dev_warn(&mdev->ofdev.dev,
1174 "No interrupts for controller, using 13\n");
1175 irq = irq_create_mapping(NULL, 13);
1176 } else
1177 irq = macio_irq(mdev, 0);
1178
1179 /* Prevvent media bay callbacks until fully registered */
1180 lock_media_bay(priv->mdev->media_bay);
1181
1182 /* Get register addresses and call common initialization */
1183 rc = pata_macio_common_init(priv,
1184 tfregs, /* Taskfile regs */
1185 dmaregs, /* DBDMA regs */
1186 0, /* Feature control */
1187 irq);
1188 unlock_media_bay(priv->mdev->media_bay);
1189
1190 return rc;
1191}
1192
1193static int __devexit pata_macio_detach(struct macio_dev *mdev)
1194{
1195 struct ata_host *host = macio_get_drvdata(mdev);
1196 struct pata_macio_priv *priv = host->private_data;
1197
1198 lock_media_bay(priv->mdev->media_bay);
1199
1200 /* Make sure the mediabay callback doesn't try to access
1201 * dead stuff
1202 */
1203 priv->host->private_data = NULL;
1204
1205 ata_host_detach(host);
1206
1207 unlock_media_bay(priv->mdev->media_bay);
1208
1209 return 0;
1210}
1211
1212#ifdef CONFIG_PM
1213
1214static int pata_macio_suspend(struct macio_dev *mdev, pm_message_t mesg)
1215{
1216 struct ata_host *host = macio_get_drvdata(mdev);
1217
1218 return pata_macio_do_suspend(host->private_data, mesg);
1219}
1220
1221static int pata_macio_resume(struct macio_dev *mdev)
1222{
1223 struct ata_host *host = macio_get_drvdata(mdev);
1224
1225 return pata_macio_do_resume(host->private_data);
1226}
1227
1228#endif /* CONFIG_PM */
1229
1230#ifdef CONFIG_PMAC_MEDIABAY
1231static void pata_macio_mb_event(struct macio_dev* mdev, int mb_state)
1232{
1233 struct ata_host *host = macio_get_drvdata(mdev);
1234 struct ata_port *ap;
1235 struct ata_eh_info *ehi;
1236 struct ata_device *dev;
1237 unsigned long flags;
1238
1239 if (!host || !host->private_data)
1240 return;
1241 ap = host->ports[0];
1242 spin_lock_irqsave(ap->lock, flags);
1243 ehi = &ap->link.eh_info;
1244 if (mb_state == MB_CD) {
1245 ata_ehi_push_desc(ehi, "mediabay plug");
1246 ata_ehi_hotplugged(ehi);
1247 ata_port_freeze(ap);
1248 } else {
1249 ata_ehi_push_desc(ehi, "mediabay unplug");
1250 ata_for_each_dev(dev, &ap->link, ALL)
1251 dev->flags |= ATA_DFLAG_DETACH;
1252 ata_port_abort(ap);
1253 }
1254 spin_unlock_irqrestore(ap->lock, flags);
1255
1256}
1257#endif /* CONFIG_PMAC_MEDIABAY */
1258
1259
1260static int __devinit pata_macio_pci_attach(struct pci_dev *pdev,
1261 const struct pci_device_id *id)
1262{
1263 struct pata_macio_priv *priv;
1264 struct device_node *np;
1265 resource_size_t rbase;
1266
1267 /* We cannot use a MacIO controller without its OF device node */
1268 np = pci_device_to_OF_node(pdev);
1269 if (np == NULL) {
1270 dev_err(&pdev->dev,
1271 "Cannot find OF device node for controller\n");
1272 return -ENODEV;
1273 }
1274
1275 /* Check that it can be enabled */
1276 if (pcim_enable_device(pdev)) {
1277 dev_err(&pdev->dev,
1278 "Cannot enable controller PCI device\n");
1279 return -ENXIO;
1280 }
1281
1282 /* Allocate and init private data structure */
1283 priv = devm_kzalloc(&pdev->dev,
1284 sizeof(struct pata_macio_priv), GFP_KERNEL);
1285 if (priv == NULL) {
1286 dev_err(&pdev->dev,
1287 "Failed to allocate private memory\n");
1288 return -ENOMEM;
1289 }
1290 priv->node = of_node_get(np);
1291 priv->pdev = pdev;
1292 priv->dev = &pdev->dev;
1293
1294 /* Get MMIO regions */
1295 if (pci_request_regions(pdev, "pata-macio")) {
1296 dev_err(&pdev->dev,
1297 "Cannot obtain PCI resources\n");
1298 return -EBUSY;
1299 }
1300
1301 /* Get register addresses and call common initialization */
1302 rbase = pci_resource_start(pdev, 0);
1303 if (pata_macio_common_init(priv,
1304 rbase + 0x2000, /* Taskfile regs */
1305 rbase + 0x1000, /* DBDMA regs */
1306 rbase, /* Feature control */
1307 pdev->irq))
1308 return -ENXIO;
1309
1310 return 0;
1311}
1312
1313static void __devexit pata_macio_pci_detach(struct pci_dev *pdev)
1314{
1315 struct ata_host *host = dev_get_drvdata(&pdev->dev);
1316
1317 ata_host_detach(host);
1318}
1319
1320#ifdef CONFIG_PM
1321
1322static int pata_macio_pci_suspend(struct pci_dev *pdev, pm_message_t mesg)
1323{
1324 struct ata_host *host = dev_get_drvdata(&pdev->dev);
1325
1326 return pata_macio_do_suspend(host->private_data, mesg);
1327}
1328
1329static int pata_macio_pci_resume(struct pci_dev *pdev)
1330{
1331 struct ata_host *host = dev_get_drvdata(&pdev->dev);
1332
1333 return pata_macio_do_resume(host->private_data);
1334}
1335
1336#endif /* CONFIG_PM */
1337
1338static struct of_device_id pata_macio_match[] =
1339{
1340 {
1341 .name = "IDE",
1342 },
1343 {
1344 .name = "ATA",
1345 },
1346 {
1347 .type = "ide",
1348 },
1349 {
1350 .type = "ata",
1351 },
1352 {},
1353};
1354
1355static struct macio_driver pata_macio_driver =
1356{
1357 .name = "pata-macio",
1358 .match_table = pata_macio_match,
1359 .probe = pata_macio_attach,
1360 .remove = pata_macio_detach,
1361#ifdef CONFIG_PM
1362 .suspend = pata_macio_suspend,
1363 .resume = pata_macio_resume,
1364#endif
1365#ifdef CONFIG_PMAC_MEDIABAY
1366 .mediabay_event = pata_macio_mb_event,
1367#endif
1368 .driver = {
1369 .owner = THIS_MODULE,
1370 },
1371};
1372
1373static const struct pci_device_id pata_macio_pci_match[] = {
1374 { PCI_VDEVICE(APPLE, PCI_DEVICE_ID_APPLE_UNI_N_ATA), 0 },
1375 { PCI_VDEVICE(APPLE, PCI_DEVICE_ID_APPLE_IPID_ATA100), 0 },
1376 { PCI_VDEVICE(APPLE, PCI_DEVICE_ID_APPLE_K2_ATA100), 0 },
1377 { PCI_VDEVICE(APPLE, PCI_DEVICE_ID_APPLE_SH_ATA), 0 },
1378 { PCI_VDEVICE(APPLE, PCI_DEVICE_ID_APPLE_IPID2_ATA), 0 },
1379 {},
1380};
1381
1382static struct pci_driver pata_macio_pci_driver = {
1383 .name = "pata-pci-macio",
1384 .id_table = pata_macio_pci_match,
1385 .probe = pata_macio_pci_attach,
1386 .remove = pata_macio_pci_detach,
1387#ifdef CONFIG_PM
1388 .suspend = pata_macio_pci_suspend,
1389 .resume = pata_macio_pci_resume,
1390#endif
1391 .driver = {
1392 .owner = THIS_MODULE,
1393 },
1394};
1395MODULE_DEVICE_TABLE(pci, pata_macio_pci_match);
1396
1397
1398static int __init pata_macio_init(void)
1399{
1400 int rc;
1401
1402 if (!machine_is(powermac))
1403 return -ENODEV;
1404
1405 rc = pci_register_driver(&pata_macio_pci_driver);
1406 if (rc)
1407 return rc;
1408 rc = macio_register_driver(&pata_macio_driver);
1409 if (rc) {
1410 pci_unregister_driver(&pata_macio_pci_driver);
1411 return rc;
1412 }
1413 return 0;
1414}
1415
1416static void __exit pata_macio_exit(void)
1417{
1418 macio_unregister_driver(&pata_macio_driver);
1419 pci_unregister_driver(&pata_macio_pci_driver);
1420}
1421
1422module_init(pata_macio_init);
1423module_exit(pata_macio_exit);
1424
1425MODULE_AUTHOR("Benjamin Herrenschmidt");
1426MODULE_DESCRIPTION("Apple MacIO PATA driver");
1427MODULE_LICENSE("GPL");
1428MODULE_VERSION(DRV_VERSION);
diff --git a/drivers/ata/pata_marvell.c b/drivers/ata/pata_marvell.c
index 2096fb737f82..e8ca02e5a71d 100644
--- a/drivers/ata/pata_marvell.c
+++ b/drivers/ata/pata_marvell.c
@@ -58,7 +58,7 @@ static int marvell_pata_active(struct pci_dev *pdev)
58} 58}
59 59
60/** 60/**
61 * marvell_pre_reset - check for 40/80 pin 61 * marvell_pre_reset - probe begin
62 * @link: link 62 * @link: link
63 * @deadline: deadline jiffies for the operation 63 * @deadline: deadline jiffies for the operation
64 * 64 *
@@ -147,13 +147,13 @@ static int marvell_init_one (struct pci_dev *pdev, const struct pci_device_id *i
147 if (pdev->device == 0x6101) 147 if (pdev->device == 0x6101)
148 ppi[1] = &ata_dummy_port_info; 148 ppi[1] = &ata_dummy_port_info;
149 149
150#if defined(CONFIG_AHCI) || defined(CONFIG_AHCI_MODULE) 150#if defined(CONFIG_SATA_AHCI) || defined(CONFIG_SATA_AHCI_MODULE)
151 if (!marvell_pata_active(pdev)) { 151 if (!marvell_pata_active(pdev)) {
152 printk(KERN_INFO DRV_NAME ": PATA port not active, deferring to AHCI driver.\n"); 152 printk(KERN_INFO DRV_NAME ": PATA port not active, deferring to AHCI driver.\n");
153 return -ENODEV; 153 return -ENODEV;
154 } 154 }
155#endif 155#endif
156 return ata_pci_sff_init_one(pdev, ppi, &marvell_sht, NULL); 156 return ata_pci_sff_init_one(pdev, ppi, &marvell_sht, NULL, 0);
157} 157}
158 158
159static const struct pci_device_id marvell_pci_tbl[] = { 159static const struct pci_device_id marvell_pci_tbl[] = {
diff --git a/drivers/ata/pata_mpc52xx.c b/drivers/ata/pata_mpc52xx.c
index 2bc2dbe30e8f..9f5b053611dd 100644
--- a/drivers/ata/pata_mpc52xx.c
+++ b/drivers/ata/pata_mpc52xx.c
@@ -16,7 +16,7 @@
16 16
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/module.h> 18#include <linux/module.h>
19#include <linux/slab.h> 19#include <linux/gfp.h>
20#include <linux/delay.h> 20#include <linux/delay.h>
21#include <linux/libata.h> 21#include <linux/libata.h>
22#include <linux/of_platform.h> 22#include <linux/of_platform.h>
diff --git a/drivers/ata/pata_netcell.c b/drivers/ata/pata_netcell.c
index f0d52f72f5bb..94f979a7f4f7 100644
--- a/drivers/ata/pata_netcell.c
+++ b/drivers/ata/pata_netcell.c
@@ -82,7 +82,7 @@ static int netcell_init_one (struct pci_dev *pdev, const struct pci_device_id *e
82 ata_pci_bmdma_clear_simplex(pdev); 82 ata_pci_bmdma_clear_simplex(pdev);
83 83
84 /* And let the library code do the work */ 84 /* And let the library code do the work */
85 return ata_pci_sff_init_one(pdev, port_info, &netcell_sht, NULL); 85 return ata_pci_sff_init_one(pdev, port_info, &netcell_sht, NULL, 0);
86} 86}
87 87
88static const struct pci_device_id netcell_pci_tbl[] = { 88static const struct pci_device_id netcell_pci_tbl[] = {
diff --git a/drivers/ata/pata_ns87410.c b/drivers/ata/pata_ns87410.c
index ca53fac06717..2110863bb3db 100644
--- a/drivers/ata/pata_ns87410.c
+++ b/drivers/ata/pata_ns87410.c
@@ -148,7 +148,7 @@ static int ns87410_init_one(struct pci_dev *dev, const struct pci_device_id *id)
148 .port_ops = &ns87410_port_ops 148 .port_ops = &ns87410_port_ops
149 }; 149 };
150 const struct ata_port_info *ppi[] = { &info, NULL }; 150 const struct ata_port_info *ppi[] = { &info, NULL };
151 return ata_pci_sff_init_one(dev, ppi, &ns87410_sht, NULL); 151 return ata_pci_sff_init_one(dev, ppi, &ns87410_sht, NULL, 0);
152} 152}
153 153
154static const struct pci_device_id ns87410[] = { 154static const struct pci_device_id ns87410[] = {
diff --git a/drivers/ata/pata_ns87415.c b/drivers/ata/pata_ns87415.c
index 773b1590b492..830431f036a1 100644
--- a/drivers/ata/pata_ns87415.c
+++ b/drivers/ata/pata_ns87415.c
@@ -325,6 +325,13 @@ static struct scsi_host_template ns87415_sht = {
325 ATA_BMDMA_SHT(DRV_NAME), 325 ATA_BMDMA_SHT(DRV_NAME),
326}; 326};
327 327
328static void ns87415_fixup(struct pci_dev *pdev)
329{
330 /* Select 512 byte sectors */
331 pci_write_config_byte(pdev, 0x55, 0xEE);
332 /* Select PIO0 8bit clocking */
333 pci_write_config_byte(pdev, 0x54, 0xB7);
334}
328 335
329/** 336/**
330 * ns87415_init_one - Register 87415 ATA PCI device with kernel services 337 * ns87415_init_one - Register 87415 ATA PCI device with kernel services
@@ -371,11 +378,9 @@ static int ns87415_init_one (struct pci_dev *pdev, const struct pci_device_id *e
371 if (rc) 378 if (rc)
372 return rc; 379 return rc;
373 380
374 /* Select 512 byte sectors */ 381 ns87415_fixup(pdev);
375 pci_write_config_byte(pdev, 0x55, 0xEE); 382
376 /* Select PIO0 8bit clocking */ 383 return ata_pci_sff_init_one(pdev, ppi, &ns87415_sht, NULL, 0);
377 pci_write_config_byte(pdev, 0x54, 0xB7);
378 return ata_pci_sff_init_one(pdev, ppi, &ns87415_sht, NULL);
379} 384}
380 385
381static const struct pci_device_id ns87415_pci_tbl[] = { 386static const struct pci_device_id ns87415_pci_tbl[] = {
@@ -384,6 +389,23 @@ static const struct pci_device_id ns87415_pci_tbl[] = {
384 { } /* terminate list */ 389 { } /* terminate list */
385}; 390};
386 391
392#ifdef CONFIG_PM
393static int ns87415_reinit_one(struct pci_dev *pdev)
394{
395 struct ata_host *host = dev_get_drvdata(&pdev->dev);
396 int rc;
397
398 rc = ata_pci_device_do_resume(pdev);
399 if (rc)
400 return rc;
401
402 ns87415_fixup(pdev);
403
404 ata_host_resume(host);
405 return 0;
406}
407#endif
408
387static struct pci_driver ns87415_pci_driver = { 409static struct pci_driver ns87415_pci_driver = {
388 .name = DRV_NAME, 410 .name = DRV_NAME,
389 .id_table = ns87415_pci_tbl, 411 .id_table = ns87415_pci_tbl,
@@ -391,7 +413,7 @@ static struct pci_driver ns87415_pci_driver = {
391 .remove = ata_pci_remove_one, 413 .remove = ata_pci_remove_one,
392#ifdef CONFIG_PM 414#ifdef CONFIG_PM
393 .suspend = ata_pci_device_suspend, 415 .suspend = ata_pci_device_suspend,
394 .resume = ata_pci_device_resume, 416 .resume = ns87415_reinit_one,
395#endif 417#endif
396}; 418};
397 419
diff --git a/drivers/ata/pata_octeon_cf.c b/drivers/ata/pata_octeon_cf.c
index d6f69561dc86..005a44483a7b 100644
--- a/drivers/ata/pata_octeon_cf.c
+++ b/drivers/ata/pata_octeon_cf.c
@@ -13,6 +13,7 @@
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/libata.h> 14#include <linux/libata.h>
15#include <linux/irq.h> 15#include <linux/irq.h>
16#include <linux/slab.h>
16#include <linux/platform_device.h> 17#include <linux/platform_device.h>
17#include <linux/workqueue.h> 18#include <linux/workqueue.h>
18#include <scsi/scsi_host.h> 19#include <scsi/scsi_host.h>
@@ -853,7 +854,7 @@ static int __devinit octeon_cf_probe(struct platform_device *pdev)
853 return -EINVAL; 854 return -EINVAL;
854 855
855 cs1 = devm_ioremap_nocache(&pdev->dev, res_cs1->start, 856 cs1 = devm_ioremap_nocache(&pdev->dev, res_cs1->start,
856 res_cs0->end - res_cs1->start + 1); 857 resource_size(res_cs1));
857 858
858 if (!cs1) 859 if (!cs1)
859 return -ENOMEM; 860 return -ENOMEM;
diff --git a/drivers/ata/pata_oldpiix.c b/drivers/ata/pata_oldpiix.c
index 84ac5033ac89..5f6aba7eb0dd 100644
--- a/drivers/ata/pata_oldpiix.c
+++ b/drivers/ata/pata_oldpiix.c
@@ -239,7 +239,7 @@ static int oldpiix_init_one (struct pci_dev *pdev, const struct pci_device_id *e
239 static const struct ata_port_info info = { 239 static const struct ata_port_info info = {
240 .flags = ATA_FLAG_SLAVE_POSS, 240 .flags = ATA_FLAG_SLAVE_POSS,
241 .pio_mask = ATA_PIO4, 241 .pio_mask = ATA_PIO4,
242 .mwdma_mask = ATA_MWDMA2, 242 .mwdma_mask = ATA_MWDMA12_ONLY,
243 .port_ops = &oldpiix_pata_ops, 243 .port_ops = &oldpiix_pata_ops,
244 }; 244 };
245 const struct ata_port_info *ppi[] = { &info, NULL }; 245 const struct ata_port_info *ppi[] = { &info, NULL };
@@ -248,7 +248,7 @@ static int oldpiix_init_one (struct pci_dev *pdev, const struct pci_device_id *e
248 dev_printk(KERN_DEBUG, &pdev->dev, 248 dev_printk(KERN_DEBUG, &pdev->dev,
249 "version " DRV_VERSION "\n"); 249 "version " DRV_VERSION "\n");
250 250
251 return ata_pci_sff_init_one(pdev, ppi, &oldpiix_sht, NULL); 251 return ata_pci_sff_init_one(pdev, ppi, &oldpiix_sht, NULL, 0);
252} 252}
253 253
254static const struct pci_device_id oldpiix_pci_tbl[] = { 254static const struct pci_device_id oldpiix_pci_tbl[] = {
diff --git a/drivers/ata/pata_opti.c b/drivers/ata/pata_opti.c
index 99eddda2d2e5..00c5a02a94fc 100644
--- a/drivers/ata/pata_opti.c
+++ b/drivers/ata/pata_opti.c
@@ -172,7 +172,7 @@ static int opti_init_one(struct pci_dev *dev, const struct pci_device_id *id)
172 if (!printed_version++) 172 if (!printed_version++)
173 dev_printk(KERN_DEBUG, &dev->dev, "version " DRV_VERSION "\n"); 173 dev_printk(KERN_DEBUG, &dev->dev, "version " DRV_VERSION "\n");
174 174
175 return ata_pci_sff_init_one(dev, ppi, &opti_sht, NULL); 175 return ata_pci_sff_init_one(dev, ppi, &opti_sht, NULL, 0);
176} 176}
177 177
178static const struct pci_device_id opti[] = { 178static const struct pci_device_id opti[] = {
diff --git a/drivers/ata/pata_optidma.c b/drivers/ata/pata_optidma.c
index 86885a445f97..76b7d12b1e8d 100644
--- a/drivers/ata/pata_optidma.c
+++ b/drivers/ata/pata_optidma.c
@@ -429,7 +429,7 @@ static int optidma_init_one(struct pci_dev *dev, const struct pci_device_id *id)
429 if (optiplus_with_udma(dev)) 429 if (optiplus_with_udma(dev))
430 ppi[0] = &info_82c700_udma; 430 ppi[0] = &info_82c700_udma;
431 431
432 return ata_pci_sff_init_one(dev, ppi, &optidma_sht, NULL); 432 return ata_pci_sff_init_one(dev, ppi, &optidma_sht, NULL, 0);
433} 433}
434 434
435static const struct pci_device_id optidma[] = { 435static const struct pci_device_id optidma[] = {
diff --git a/drivers/ata/pata_pcmcia.c b/drivers/ata/pata_pcmcia.c
index dc99e26f8e5b..d94b8f0bd743 100644
--- a/drivers/ata/pata_pcmcia.c
+++ b/drivers/ata/pata_pcmcia.c
@@ -29,6 +29,7 @@
29#include <linux/init.h> 29#include <linux/init.h>
30#include <linux/blkdev.h> 30#include <linux/blkdev.h>
31#include <linux/delay.h> 31#include <linux/delay.h>
32#include <linux/slab.h>
32#include <scsi/scsi_host.h> 33#include <scsi/scsi_host.h>
33#include <linux/ata.h> 34#include <linux/ata.h>
34#include <linux/libata.h> 35#include <linux/libata.h>
@@ -131,12 +132,12 @@ static unsigned int ata_data_xfer_8bit(struct ata_device *dev,
131 * @qc: command 132 * @qc: command
132 * 133 *
133 * Drain the FIFO and device of any stuck data following a command 134 * Drain the FIFO and device of any stuck data following a command
134 * failing to complete. In some cases this is neccessary before a 135 * failing to complete. In some cases this is necessary before a
135 * reset will recover the device. 136 * reset will recover the device.
136 * 137 *
137 */ 138 */
138 139
139void pcmcia_8bit_drain_fifo(struct ata_queued_cmd *qc) 140static void pcmcia_8bit_drain_fifo(struct ata_queued_cmd *qc)
140{ 141{
141 int count; 142 int count;
142 struct ata_port *ap; 143 struct ata_port *ap;
@@ -177,9 +178,6 @@ static struct ata_port_operations pcmcia_8bit_port_ops = {
177 .drain_fifo = pcmcia_8bit_drain_fifo, 178 .drain_fifo = pcmcia_8bit_drain_fifo,
178}; 179};
179 180
180#define CS_CHECK(fn, ret) \
181do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
182
183 181
184struct pcmcia_config_check { 182struct pcmcia_config_check {
185 unsigned long ctl_base; 183 unsigned long ctl_base;
@@ -252,7 +250,7 @@ static int pcmcia_init_one(struct pcmcia_device *pdev)
252 struct ata_port *ap; 250 struct ata_port *ap;
253 struct ata_pcmcia_info *info; 251 struct ata_pcmcia_info *info;
254 struct pcmcia_config_check *stk = NULL; 252 struct pcmcia_config_check *stk = NULL;
255 int last_ret = 0, last_fn = 0, is_kme = 0, ret = -ENOMEM, p; 253 int is_kme = 0, ret = -ENOMEM, p;
256 unsigned long io_base, ctl_base; 254 unsigned long io_base, ctl_base;
257 void __iomem *io_addr, *ctl_addr; 255 void __iomem *io_addr, *ctl_addr;
258 int n_ports = 1; 256 int n_ports = 1;
@@ -271,7 +269,6 @@ static int pcmcia_init_one(struct pcmcia_device *pdev)
271 pdev->io.Attributes2 = IO_DATA_PATH_WIDTH_8; 269 pdev->io.Attributes2 = IO_DATA_PATH_WIDTH_8;
272 pdev->io.IOAddrLines = 3; 270 pdev->io.IOAddrLines = 3;
273 pdev->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING; 271 pdev->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING;
274 pdev->irq.IRQInfo1 = IRQ_LEVEL_ID;
275 pdev->conf.Attributes = CONF_ENABLE_IRQ; 272 pdev->conf.Attributes = CONF_ENABLE_IRQ;
276 pdev->conf.IntType = INT_MEMORY_AND_IO; 273 pdev->conf.IntType = INT_MEMORY_AND_IO;
277 274
@@ -296,8 +293,13 @@ static int pcmcia_init_one(struct pcmcia_device *pdev)
296 } 293 }
297 io_base = pdev->io.BasePort1; 294 io_base = pdev->io.BasePort1;
298 ctl_base = stk->ctl_base; 295 ctl_base = stk->ctl_base;
299 CS_CHECK(RequestIRQ, pcmcia_request_irq(pdev, &pdev->irq)); 296 ret = pcmcia_request_irq(pdev, &pdev->irq);
300 CS_CHECK(RequestConfiguration, pcmcia_request_configuration(pdev, &pdev->conf)); 297 if (ret)
298 goto failed;
299
300 ret = pcmcia_request_configuration(pdev, &pdev->conf);
301 if (ret)
302 goto failed;
301 303
302 /* iomap */ 304 /* iomap */
303 ret = -ENOMEM; 305 ret = -ENOMEM;
@@ -351,8 +353,6 @@ static int pcmcia_init_one(struct pcmcia_device *pdev)
351 kfree(stk); 353 kfree(stk);
352 return 0; 354 return 0;
353 355
354cs_failed:
355 cs_error(pdev, last_fn, last_ret);
356failed: 356failed:
357 kfree(stk); 357 kfree(stk);
358 info->ndev = 0; 358 info->ndev = 0;
@@ -424,6 +424,8 @@ static struct pcmcia_device_id pcmcia_devices[] = {
424 PCMCIA_DEVICE_PROD_ID12("Hyperstone", "Model1", 0x3d5b9ef5, 0xca6ab420), 424 PCMCIA_DEVICE_PROD_ID12("Hyperstone", "Model1", 0x3d5b9ef5, 0xca6ab420),
425 PCMCIA_DEVICE_PROD_ID12("IBM", "microdrive", 0xb569a6e5, 0xa6d76178), 425 PCMCIA_DEVICE_PROD_ID12("IBM", "microdrive", 0xb569a6e5, 0xa6d76178),
426 PCMCIA_DEVICE_PROD_ID12("IBM", "IBM17JSSFP20", 0xb569a6e5, 0xf2508753), 426 PCMCIA_DEVICE_PROD_ID12("IBM", "IBM17JSSFP20", 0xb569a6e5, 0xf2508753),
427 PCMCIA_DEVICE_PROD_ID12("KINGSTON", "CF CARD 1GB", 0x2e6d1829, 0x55d5bffb),
428 PCMCIA_DEVICE_PROD_ID12("KINGSTON", "CF CARD 4GB", 0x2e6d1829, 0x531e7d10),
427 PCMCIA_DEVICE_PROD_ID12("KINGSTON", "CF8GB", 0x2e6d1829, 0xacbe682e), 429 PCMCIA_DEVICE_PROD_ID12("KINGSTON", "CF8GB", 0x2e6d1829, 0xacbe682e),
428 PCMCIA_DEVICE_PROD_ID12("IO DATA", "CBIDE2 ", 0x547e66dc, 0x8671043b), 430 PCMCIA_DEVICE_PROD_ID12("IO DATA", "CBIDE2 ", 0x547e66dc, 0x8671043b),
429 PCMCIA_DEVICE_PROD_ID12("IO DATA", "PCIDE", 0x547e66dc, 0x5c5ab149), 431 PCMCIA_DEVICE_PROD_ID12("IO DATA", "PCIDE", 0x547e66dc, 0x5c5ab149),
@@ -444,6 +446,8 @@ static struct pcmcia_device_id pcmcia_devices[] = {
444 PCMCIA_DEVICE_PROD_ID12("TRANSCEND", "TS1GCF80", 0x709b1bf1, 0x2a54d4b1), 446 PCMCIA_DEVICE_PROD_ID12("TRANSCEND", "TS1GCF80", 0x709b1bf1, 0x2a54d4b1),
445 PCMCIA_DEVICE_PROD_ID12("TRANSCEND", "TS2GCF120", 0x709b1bf1, 0x969aa4f2), 447 PCMCIA_DEVICE_PROD_ID12("TRANSCEND", "TS2GCF120", 0x709b1bf1, 0x969aa4f2),
446 PCMCIA_DEVICE_PROD_ID12("TRANSCEND", "TS4GCF120", 0x709b1bf1, 0xf54a91c8), 448 PCMCIA_DEVICE_PROD_ID12("TRANSCEND", "TS4GCF120", 0x709b1bf1, 0xf54a91c8),
449 PCMCIA_DEVICE_PROD_ID12("TRANSCEND", "TS4GCF133", 0x709b1bf1, 0x7558f133),
450 PCMCIA_DEVICE_PROD_ID12("TRANSCEND", "TS8GCF133", 0x709b1bf1, 0xb2f89b47),
447 PCMCIA_DEVICE_PROD_ID12("WIT", "IDE16", 0x244e5994, 0x3e232852), 451 PCMCIA_DEVICE_PROD_ID12("WIT", "IDE16", 0x244e5994, 0x3e232852),
448 PCMCIA_DEVICE_PROD_ID12("WEIDA", "TWTTI", 0xcc7cf69c, 0x212bb918), 452 PCMCIA_DEVICE_PROD_ID12("WEIDA", "TWTTI", 0xcc7cf69c, 0x212bb918),
449 PCMCIA_DEVICE_PROD_ID1("STI Flash", 0xe4a13209), 453 PCMCIA_DEVICE_PROD_ID1("STI Flash", 0xe4a13209),
diff --git a/drivers/ata/pata_pdc202xx_old.c b/drivers/ata/pata_pdc202xx_old.c
index 2f3c9bed63d9..9ac0897cf8b0 100644
--- a/drivers/ata/pata_pdc202xx_old.c
+++ b/drivers/ata/pata_pdc202xx_old.c
@@ -2,7 +2,7 @@
2 * pata_pdc202xx_old.c - Promise PDC202xx PATA for new ATA layer 2 * pata_pdc202xx_old.c - Promise PDC202xx PATA for new ATA layer
3 * (C) 2005 Red Hat Inc 3 * (C) 2005 Red Hat Inc
4 * Alan Cox <alan@lxorguk.ukuu.org.uk> 4 * Alan Cox <alan@lxorguk.ukuu.org.uk>
5 * (C) 2007,2009 Bartlomiej Zolnierkiewicz 5 * (C) 2007,2009,2010 Bartlomiej Zolnierkiewicz
6 * 6 *
7 * Based in part on linux/drivers/ide/pci/pdc202xx_old.c 7 * Based in part on linux/drivers/ide/pci/pdc202xx_old.c
8 * 8 *
@@ -35,6 +35,15 @@ static int pdc2026x_cable_detect(struct ata_port *ap)
35 return ATA_CBL_PATA80; 35 return ATA_CBL_PATA80;
36} 36}
37 37
38static void pdc202xx_exec_command(struct ata_port *ap,
39 const struct ata_taskfile *tf)
40{
41 DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command);
42
43 iowrite8(tf->command, ap->ioaddr.command_addr);
44 ndelay(400);
45}
46
38/** 47/**
39 * pdc202xx_configure_piomode - set chip PIO timing 48 * pdc202xx_configure_piomode - set chip PIO timing
40 * @ap: ATA interface 49 * @ap: ATA interface
@@ -271,6 +280,8 @@ static struct ata_port_operations pdc2024x_port_ops = {
271 .cable_detect = ata_cable_40wire, 280 .cable_detect = ata_cable_40wire,
272 .set_piomode = pdc202xx_set_piomode, 281 .set_piomode = pdc202xx_set_piomode,
273 .set_dmamode = pdc202xx_set_dmamode, 282 .set_dmamode = pdc202xx_set_dmamode,
283
284 .sff_exec_command = pdc202xx_exec_command,
274}; 285};
275 286
276static struct ata_port_operations pdc2026x_port_ops = { 287static struct ata_port_operations pdc2026x_port_ops = {
@@ -284,6 +295,8 @@ static struct ata_port_operations pdc2026x_port_ops = {
284 .dev_config = pdc2026x_dev_config, 295 .dev_config = pdc2026x_dev_config,
285 296
286 .port_start = pdc2026x_port_start, 297 .port_start = pdc2026x_port_start,
298
299 .sff_exec_command = pdc202xx_exec_command,
287}; 300};
288 301
289static int pdc202xx_init_one(struct pci_dev *dev, const struct pci_device_id *id) 302static int pdc202xx_init_one(struct pci_dev *dev, const struct pci_device_id *id)
@@ -324,7 +337,7 @@ static int pdc202xx_init_one(struct pci_dev *dev, const struct pci_device_id *id
324 return -ENODEV; 337 return -ENODEV;
325 } 338 }
326 } 339 }
327 return ata_pci_sff_init_one(dev, ppi, &pdc202xx_sht, NULL); 340 return ata_pci_sff_init_one(dev, ppi, &pdc202xx_sht, NULL, 0);
328} 341}
329 342
330static const struct pci_device_id pdc202xx[] = { 343static const struct pci_device_id pdc202xx[] = {
diff --git a/drivers/ata/pata_piccolo.c b/drivers/ata/pata_piccolo.c
new file mode 100644
index 000000000000..981615414849
--- /dev/null
+++ b/drivers/ata/pata_piccolo.c
@@ -0,0 +1,140 @@
1/*
2 * pata_piccolo.c - Toshiba Piccolo PATA/SATA controller driver.
3 *
4 * This is basically an update to ata_generic.c to add Toshiba Piccolo support
5 * then split out to keep ata_generic "clean".
6 *
7 * Copyright 2005 Red Hat Inc, all rights reserved.
8 *
9 * Elements from ide/pci/generic.c
10 * Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org>
11 * Portions (C) Copyright 2002 Red Hat Inc <alan@redhat.com>
12 *
13 * May be copied or modified under the terms of the GNU General Public License
14 *
15 * The timing data tables/programming info are courtesy of the NetBSD driver
16 */
17
18#include <linux/kernel.h>
19#include <linux/module.h>
20#include <linux/pci.h>
21#include <linux/init.h>
22#include <linux/blkdev.h>
23#include <linux/delay.h>
24#include <scsi/scsi_host.h>
25#include <linux/libata.h>
26
27#define DRV_NAME "pata_piccolo"
28#define DRV_VERSION "0.0.1"
29
30
31
32static void tosh_set_piomode(struct ata_port *ap, struct ata_device *adev)
33{
34 static const u16 pio[6] = { /* For reg 0x50 low word & E088 */
35 0x0566, 0x0433, 0x0311, 0x0201, 0x0200, 0x0100
36 };
37 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
38 u16 conf;
39 pci_read_config_word(pdev, 0x50, &conf);
40 conf &= 0xE088;
41 conf |= pio[adev->pio_mode - XFER_PIO_0];
42 pci_write_config_word(pdev, 0x50, conf);
43}
44
45static void tosh_set_dmamode(struct ata_port *ap, struct ata_device *adev)
46{
47 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
48 u32 conf;
49 pci_read_config_dword(pdev, 0x5C, &conf);
50 conf &= 0x78FFE088; /* Keep the other bits */
51 if (adev->dma_mode >= XFER_UDMA_0) {
52 int udma = adev->dma_mode - XFER_UDMA_0;
53 conf |= 0x80000000;
54 conf |= (udma + 2) << 28;
55 conf |= (2 - udma) * 0x111; /* spread into three nibbles */
56 } else {
57 static const u32 mwdma[4] = {
58 0x0655, 0x0200, 0x0200, 0x0100
59 };
60 conf |= mwdma[adev->dma_mode - XFER_MW_DMA_0];
61 }
62 pci_write_config_dword(pdev, 0x5C, conf);
63}
64
65
66static struct scsi_host_template tosh_sht = {
67 ATA_BMDMA_SHT(DRV_NAME),
68};
69
70static struct ata_port_operations tosh_port_ops = {
71 .inherits = &ata_bmdma_port_ops,
72 .cable_detect = ata_cable_unknown,
73 .set_piomode = tosh_set_piomode,
74 .set_dmamode = tosh_set_dmamode
75};
76
77/**
78 * ata_tosh_init - attach generic IDE
79 * @dev: PCI device found
80 * @id: match entry
81 *
82 * Called each time a matching IDE interface is found. We check if the
83 * interface is one we wish to claim and if so we perform any chip
84 * specific hacks then let the ATA layer do the heavy lifting.
85 */
86
87static int ata_tosh_init_one(struct pci_dev *dev, const struct pci_device_id *id)
88{
89 static const struct ata_port_info info = {
90 .flags = ATA_FLAG_SLAVE_POSS,
91 .pio_mask = ATA_PIO5,
92 .mwdma_mask = ATA_MWDMA2,
93 .udma_mask = ATA_UDMA2,
94 .port_ops = &tosh_port_ops
95 };
96 const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info };
97 /* Just one port for the moment */
98 return ata_pci_sff_init_one(dev, ppi, &tosh_sht, NULL, 0);
99}
100
101static struct pci_device_id ata_tosh[] = {
102 { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_1), },
103 { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_2), },
104 { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_3), },
105 { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_5), },
106 { 0, },
107};
108
109static struct pci_driver ata_tosh_pci_driver = {
110 .name = DRV_NAME,
111 .id_table = ata_tosh,
112 .probe = ata_tosh_init_one,
113 .remove = ata_pci_remove_one,
114#ifdef CONFIG_PM
115 .suspend = ata_pci_device_suspend,
116 .resume = ata_pci_device_resume,
117#endif
118};
119
120static int __init ata_tosh_init(void)
121{
122 return pci_register_driver(&ata_tosh_pci_driver);
123}
124
125
126static void __exit ata_tosh_exit(void)
127{
128 pci_unregister_driver(&ata_tosh_pci_driver);
129}
130
131
132MODULE_AUTHOR("Alan Cox");
133MODULE_DESCRIPTION("Low level driver for Toshiba Piccolo ATA");
134MODULE_LICENSE("GPL");
135MODULE_DEVICE_TABLE(pci, ata_tosh);
136MODULE_VERSION(DRV_VERSION);
137
138module_init(ata_tosh_init);
139module_exit(ata_tosh_exit);
140
diff --git a/drivers/ata/pata_radisys.c b/drivers/ata/pata_radisys.c
index 4401b332eaab..fc9602229acb 100644
--- a/drivers/ata/pata_radisys.c
+++ b/drivers/ata/pata_radisys.c
@@ -139,9 +139,9 @@ static void radisys_set_dmamode (struct ata_port *ap, struct ata_device *adev)
139 pci_read_config_byte(dev, 0x4A, &udma_mode); 139 pci_read_config_byte(dev, 0x4A, &udma_mode);
140 140
141 if (adev->xfer_mode == XFER_UDMA_2) 141 if (adev->xfer_mode == XFER_UDMA_2)
142 udma_mode &= ~ (1 << adev->devno); 142 udma_mode &= ~(2 << (adev->devno * 4));
143 else /* UDMA 4 */ 143 else /* UDMA 4 */
144 udma_mode |= (1 << adev->devno); 144 udma_mode |= (2 << (adev->devno * 4));
145 145
146 pci_write_config_byte(dev, 0x4A, udma_mode); 146 pci_write_config_byte(dev, 0x4A, udma_mode);
147 147
@@ -227,7 +227,7 @@ static int radisys_init_one (struct pci_dev *pdev, const struct pci_device_id *e
227 dev_printk(KERN_DEBUG, &pdev->dev, 227 dev_printk(KERN_DEBUG, &pdev->dev,
228 "version " DRV_VERSION "\n"); 228 "version " DRV_VERSION "\n");
229 229
230 return ata_pci_sff_init_one(pdev, ppi, &radisys_sht, NULL); 230 return ata_pci_sff_init_one(pdev, ppi, &radisys_sht, NULL, 0);
231} 231}
232 232
233static const struct pci_device_id radisys_pci_tbl[] = { 233static const struct pci_device_id radisys_pci_tbl[] = {
diff --git a/drivers/ata/pata_rb532_cf.c b/drivers/ata/pata_rb532_cf.c
index 45f1e10f917b..0ffd631000b7 100644
--- a/drivers/ata/pata_rb532_cf.c
+++ b/drivers/ata/pata_rb532_cf.c
@@ -19,6 +19,7 @@
19 * 19 *
20 */ 20 */
21 21
22#include <linux/gfp.h>
22#include <linux/kernel.h> 23#include <linux/kernel.h>
23#include <linux/module.h> 24#include <linux/module.h>
24#include <linux/platform_device.h> 25#include <linux/platform_device.h>
diff --git a/drivers/ata/pata_rdc.c b/drivers/ata/pata_rdc.c
index c843a1e07c4f..37092cfd7bc6 100644
--- a/drivers/ata/pata_rdc.c
+++ b/drivers/ata/pata_rdc.c
@@ -28,6 +28,7 @@
28#include <linux/blkdev.h> 28#include <linux/blkdev.h>
29#include <linux/delay.h> 29#include <linux/delay.h>
30#include <linux/device.h> 30#include <linux/device.h>
31#include <linux/gfp.h>
31#include <scsi/scsi_host.h> 32#include <scsi/scsi_host.h>
32#include <linux/libata.h> 33#include <linux/libata.h>
33#include <linux/dmi.h> 34#include <linux/dmi.h>
@@ -284,7 +285,7 @@ static struct ata_port_info rdc_port_info = {
284 285
285 .flags = ATA_FLAG_SLAVE_POSS, 286 .flags = ATA_FLAG_SLAVE_POSS,
286 .pio_mask = ATA_PIO4, 287 .pio_mask = ATA_PIO4,
287 .mwdma_mask = ATA_MWDMA2, 288 .mwdma_mask = ATA_MWDMA12_ONLY,
288 .udma_mask = ATA_UDMA5, 289 .udma_mask = ATA_UDMA5,
289 .port_ops = &rdc_pata_ops, 290 .port_ops = &rdc_pata_ops,
290}; 291};
diff --git a/drivers/ata/pata_rz1000.c b/drivers/ata/pata_rz1000.c
index a5e4dfe60b41..4a454a88aa9d 100644
--- a/drivers/ata/pata_rz1000.c
+++ b/drivers/ata/pata_rz1000.c
@@ -95,7 +95,7 @@ static int rz1000_init_one (struct pci_dev *pdev, const struct pci_device_id *en
95 printk_once(KERN_DEBUG DRV_NAME " version " DRV_VERSION "\n"); 95 printk_once(KERN_DEBUG DRV_NAME " version " DRV_VERSION "\n");
96 96
97 if (rz1000_fifo_disable(pdev) == 0) 97 if (rz1000_fifo_disable(pdev) == 0)
98 return ata_pci_sff_init_one(pdev, ppi, &rz1000_sht, NULL); 98 return ata_pci_sff_init_one(pdev, ppi, &rz1000_sht, NULL, 0);
99 99
100 printk(KERN_ERR DRV_NAME ": failed to disable read-ahead on chipset..\n"); 100 printk(KERN_ERR DRV_NAME ": failed to disable read-ahead on chipset..\n");
101 /* Not safe to use so skip */ 101 /* Not safe to use so skip */
@@ -105,11 +105,20 @@ static int rz1000_init_one (struct pci_dev *pdev, const struct pci_device_id *en
105#ifdef CONFIG_PM 105#ifdef CONFIG_PM
106static int rz1000_reinit_one(struct pci_dev *pdev) 106static int rz1000_reinit_one(struct pci_dev *pdev)
107{ 107{
108 struct ata_host *host = dev_get_drvdata(&pdev->dev);
109 int rc;
110
111 rc = ata_pci_device_do_resume(pdev);
112 if (rc)
113 return rc;
114
108 /* If this fails on resume (which is a "cant happen" case), we 115 /* If this fails on resume (which is a "cant happen" case), we
109 must stop as any progress risks data loss */ 116 must stop as any progress risks data loss */
110 if (rz1000_fifo_disable(pdev)) 117 if (rz1000_fifo_disable(pdev))
111 panic("rz1000 fifo"); 118 panic("rz1000 fifo");
112 return ata_pci_device_resume(pdev); 119
120 ata_host_resume(host);
121 return 0;
113} 122}
114#endif 123#endif
115 124
diff --git a/drivers/ata/pata_sc1200.c b/drivers/ata/pata_sc1200.c
index 3bbed8322ecf..dfecc6f964b0 100644
--- a/drivers/ata/pata_sc1200.c
+++ b/drivers/ata/pata_sc1200.c
@@ -237,7 +237,7 @@ static int sc1200_init_one(struct pci_dev *dev, const struct pci_device_id *id)
237 }; 237 };
238 const struct ata_port_info *ppi[] = { &info, NULL }; 238 const struct ata_port_info *ppi[] = { &info, NULL };
239 239
240 return ata_pci_sff_init_one(dev, ppi, &sc1200_sht, NULL); 240 return ata_pci_sff_init_one(dev, ppi, &sc1200_sht, NULL, 0);
241} 241}
242 242
243static const struct pci_device_id sc1200[] = { 243static const struct pci_device_id sc1200[] = {
diff --git a/drivers/ata/pata_serverworks.c b/drivers/ata/pata_serverworks.c
index beaed12d50e4..9524d54035f7 100644
--- a/drivers/ata/pata_serverworks.c
+++ b/drivers/ata/pata_serverworks.c
@@ -1,6 +1,7 @@
1/* 1/*
2 * pata_serverworks.c - Serverworks PATA for new ATA layer 2 * pata_serverworks.c - Serverworks PATA for new ATA layer
3 * (C) 2005 Red Hat Inc 3 * (C) 2005 Red Hat Inc
4 * (C) 2010 Bartlomiej Zolnierkiewicz
4 * 5 *
5 * based upon 6 * based upon
6 * 7 *
@@ -253,7 +254,7 @@ static void serverworks_set_piomode(struct ata_port *ap, struct ata_device *adev
253 if (serverworks_is_csb(pdev)) { 254 if (serverworks_is_csb(pdev)) {
254 pci_read_config_word(pdev, 0x4A, &csb5_pio); 255 pci_read_config_word(pdev, 0x4A, &csb5_pio);
255 csb5_pio &= ~(0x0F << devbits); 256 csb5_pio &= ~(0x0F << devbits);
256 pci_write_config_byte(pdev, 0x4A, csb5_pio | (pio << devbits)); 257 pci_write_config_word(pdev, 0x4A, csb5_pio | (pio << devbits));
257 } 258 }
258} 259}
259 260
@@ -327,7 +328,7 @@ static int serverworks_fixup_osb4(struct pci_dev *pdev)
327 pci_dev_put(isa_dev); 328 pci_dev_put(isa_dev);
328 return 0; 329 return 0;
329 } 330 }
330 printk(KERN_WARNING "ata_serverworks: Unable to find bridge.\n"); 331 printk(KERN_WARNING DRV_NAME ": Unable to find bridge.\n");
331 return -ENODEV; 332 return -ENODEV;
332} 333}
333 334
@@ -459,7 +460,7 @@ static int serverworks_init_one(struct pci_dev *pdev, const struct pci_device_id
459 if (pdev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE) 460 if (pdev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE)
460 ata_pci_bmdma_clear_simplex(pdev); 461 ata_pci_bmdma_clear_simplex(pdev);
461 462
462 return ata_pci_sff_init_one(pdev, ppi, &serverworks_sht, NULL); 463 return ata_pci_sff_init_one(pdev, ppi, &serverworks_sht, NULL, 0);
463} 464}
464 465
465#ifdef CONFIG_PM 466#ifdef CONFIG_PM
diff --git a/drivers/ata/pata_sil680.c b/drivers/ata/pata_sil680.c
index 4cb649d8d38c..c6c589c23ffc 100644
--- a/drivers/ata/pata_sil680.c
+++ b/drivers/ata/pata_sil680.c
@@ -212,13 +212,11 @@ static struct ata_port_operations sil680_port_ops = {
212 212
213static u8 sil680_init_chip(struct pci_dev *pdev, int *try_mmio) 213static u8 sil680_init_chip(struct pci_dev *pdev, int *try_mmio)
214{ 214{
215 u32 class_rev = 0;
216 u8 tmpbyte = 0; 215 u8 tmpbyte = 0;
217 216
218 pci_read_config_dword(pdev, PCI_CLASS_REVISION, &class_rev);
219 class_rev &= 0xff;
220 /* FIXME: double check */ 217 /* FIXME: double check */
221 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, (class_rev) ? 1 : 255); 218 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
219 pdev->revision ? 1 : 255);
222 220
223 pci_write_config_byte(pdev, 0x80, 0x00); 221 pci_write_config_byte(pdev, 0x80, 0x00);
224 pci_write_config_byte(pdev, 0x84, 0x00); 222 pci_write_config_byte(pdev, 0x84, 0x00);
@@ -358,7 +356,7 @@ static int __devinit sil680_init_one(struct pci_dev *pdev,
358 IRQF_SHARED, &sil680_sht); 356 IRQF_SHARED, &sil680_sht);
359 357
360use_ioports: 358use_ioports:
361 return ata_pci_sff_init_one(pdev, ppi, &sil680_sht, NULL); 359 return ata_pci_sff_init_one(pdev, ppi, &sil680_sht, NULL, 0);
362} 360}
363 361
364#ifdef CONFIG_PM 362#ifdef CONFIG_PM
diff --git a/drivers/ata/pata_sis.c b/drivers/ata/pata_sis.c
index 488e77bcd22b..b6708032f321 100644
--- a/drivers/ata/pata_sis.c
+++ b/drivers/ata/pata_sis.c
@@ -2,7 +2,7 @@
2 * pata_sis.c - SiS ATA driver 2 * pata_sis.c - SiS ATA driver
3 * 3 *
4 * (C) 2005 Red Hat 4 * (C) 2005 Red Hat
5 * (C) 2007 Bartlomiej Zolnierkiewicz 5 * (C) 2007,2009 Bartlomiej Zolnierkiewicz
6 * 6 *
7 * Based upon linux/drivers/ide/pci/sis5513.c 7 * Based upon linux/drivers/ide/pci/sis5513.c
8 * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org> 8 * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
@@ -826,9 +826,26 @@ static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
826 826
827 sis_fixup(pdev, chipset); 827 sis_fixup(pdev, chipset);
828 828
829 return ata_pci_sff_init_one(pdev, ppi, &sis_sht, chipset); 829 return ata_pci_sff_init_one(pdev, ppi, &sis_sht, chipset, 0);
830} 830}
831 831
832#ifdef CONFIG_PM
833static int sis_reinit_one(struct pci_dev *pdev)
834{
835 struct ata_host *host = dev_get_drvdata(&pdev->dev);
836 int rc;
837
838 rc = ata_pci_device_do_resume(pdev);
839 if (rc)
840 return rc;
841
842 sis_fixup(pdev, host->private_data);
843
844 ata_host_resume(host);
845 return 0;
846}
847#endif
848
832static const struct pci_device_id sis_pci_tbl[] = { 849static const struct pci_device_id sis_pci_tbl[] = {
833 { PCI_VDEVICE(SI, 0x5513), }, /* SiS 5513 */ 850 { PCI_VDEVICE(SI, 0x5513), }, /* SiS 5513 */
834 { PCI_VDEVICE(SI, 0x5518), }, /* SiS 5518 */ 851 { PCI_VDEVICE(SI, 0x5518), }, /* SiS 5518 */
@@ -844,7 +861,7 @@ static struct pci_driver sis_pci_driver = {
844 .remove = ata_pci_remove_one, 861 .remove = ata_pci_remove_one,
845#ifdef CONFIG_PM 862#ifdef CONFIG_PM
846 .suspend = ata_pci_device_suspend, 863 .suspend = ata_pci_device_suspend,
847 .resume = ata_pci_device_resume, 864 .resume = sis_reinit_one,
848#endif 865#endif
849}; 866};
850 867
diff --git a/drivers/ata/pata_sl82c105.c b/drivers/ata/pata_sl82c105.c
index 29f733c32066..733b042a7469 100644
--- a/drivers/ata/pata_sl82c105.c
+++ b/drivers/ata/pata_sl82c105.c
@@ -316,7 +316,7 @@ static int sl82c105_init_one(struct pci_dev *dev, const struct pci_device_id *id
316 val |= CTRL_P0EN | CTRL_P0F16 | CTRL_P1F16; 316 val |= CTRL_P0EN | CTRL_P0F16 | CTRL_P1F16;
317 pci_write_config_dword(dev, 0x40, val); 317 pci_write_config_dword(dev, 0x40, val);
318 318
319 return ata_pci_sff_init_one(dev, ppi, &sl82c105_sht, NULL); 319 return ata_pci_sff_init_one(dev, ppi, &sl82c105_sht, NULL, 0);
320} 320}
321 321
322static const struct pci_device_id sl82c105[] = { 322static const struct pci_device_id sl82c105[] = {
diff --git a/drivers/ata/pata_triflex.c b/drivers/ata/pata_triflex.c
index f1f13ff222fd..48f50600ed2a 100644
--- a/drivers/ata/pata_triflex.c
+++ b/drivers/ata/pata_triflex.c
@@ -201,7 +201,7 @@ static int triflex_init_one(struct pci_dev *dev, const struct pci_device_id *id)
201 if (!printed_version++) 201 if (!printed_version++)
202 dev_printk(KERN_DEBUG, &dev->dev, "version " DRV_VERSION "\n"); 202 dev_printk(KERN_DEBUG, &dev->dev, "version " DRV_VERSION "\n");
203 203
204 return ata_pci_sff_init_one(dev, ppi, &triflex_sht, NULL); 204 return ata_pci_sff_init_one(dev, ppi, &triflex_sht, NULL, 0);
205} 205}
206 206
207static const struct pci_device_id triflex[] = { 207static const struct pci_device_id triflex[] = {
diff --git a/drivers/ata/pata_via.c b/drivers/ata/pata_via.c
index 88984b803d6d..741e7cb69d8c 100644
--- a/drivers/ata/pata_via.c
+++ b/drivers/ata/pata_via.c
@@ -22,6 +22,7 @@
22 * VIA VT8233c - UDMA100 22 * VIA VT8233c - UDMA100
23 * VIA VT8235 - UDMA133 23 * VIA VT8235 - UDMA133
24 * VIA VT8237 - UDMA133 24 * VIA VT8237 - UDMA133
25 * VIA VT8237A - UDMA133
25 * VIA VT8237S - UDMA133 26 * VIA VT8237S - UDMA133
26 * VIA VT8251 - UDMA133 27 * VIA VT8251 - UDMA133
27 * 28 *
@@ -57,6 +58,7 @@
57#include <linux/init.h> 58#include <linux/init.h>
58#include <linux/blkdev.h> 59#include <linux/blkdev.h>
59#include <linux/delay.h> 60#include <linux/delay.h>
61#include <linux/gfp.h>
60#include <scsi/scsi_host.h> 62#include <scsi/scsi_host.h>
61#include <linux/libata.h> 63#include <linux/libata.h>
62#include <linux/dmi.h> 64#include <linux/dmi.h>
@@ -64,26 +66,15 @@
64#define DRV_NAME "pata_via" 66#define DRV_NAME "pata_via"
65#define DRV_VERSION "0.3.4" 67#define DRV_VERSION "0.3.4"
66 68
67/*
68 * The following comes directly from Vojtech Pavlik's ide/pci/via82cxxx
69 * driver.
70 */
71
72enum { 69enum {
73 VIA_UDMA = 0x007, 70 VIA_BAD_PREQ = 0x01, /* Crashes if PREQ# till DDACK# set */
74 VIA_UDMA_NONE = 0x000, 71 VIA_BAD_CLK66 = 0x02, /* 66 MHz clock doesn't work correctly */
75 VIA_UDMA_33 = 0x001, 72 VIA_SET_FIFO = 0x04, /* Needs to have FIFO split set */
76 VIA_UDMA_66 = 0x002, 73 VIA_NO_UNMASK = 0x08, /* Doesn't work with IRQ unmasking on */
77 VIA_UDMA_100 = 0x003, 74 VIA_BAD_ID = 0x10, /* Has wrong vendor ID (0x1107) */
78 VIA_UDMA_133 = 0x004, 75 VIA_BAD_AST = 0x20, /* Don't touch Address Setup Timing */
79 VIA_BAD_PREQ = 0x010, /* Crashes if PREQ# till DDACK# set */ 76 VIA_NO_ENABLES = 0x40, /* Has no enablebits */
80 VIA_BAD_CLK66 = 0x020, /* 66 MHz clock doesn't work correctly */ 77 VIA_SATA_PATA = 0x80, /* SATA/PATA combined configuration */
81 VIA_SET_FIFO = 0x040, /* Needs to have FIFO split set */
82 VIA_NO_UNMASK = 0x080, /* Doesn't work with IRQ unmasking on */
83 VIA_BAD_ID = 0x100, /* Has wrong vendor ID (0x1107) */
84 VIA_BAD_AST = 0x200, /* Don't touch Address Setup Timing */
85 VIA_NO_ENABLES = 0x400, /* Has no enablebits */
86 VIA_SATA_PATA = 0x800, /* SATA/PATA combined configuration */
87}; 78};
88 79
89enum { 80enum {
@@ -99,40 +90,37 @@ static const struct via_isa_bridge {
99 u16 id; 90 u16 id;
100 u8 rev_min; 91 u8 rev_min;
101 u8 rev_max; 92 u8 rev_max;
102 u16 flags; 93 u8 udma_mask;
94 u8 flags;
103} via_isa_bridges[] = { 95} via_isa_bridges[] = {
104 { "vx855", PCI_DEVICE_ID_VIA_VX855, 0x00, 0x2f, 96 { "vx855", PCI_DEVICE_ID_VIA_VX855, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
105 VIA_UDMA_133 | VIA_BAD_AST | VIA_SATA_PATA }, 97 { "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
106 { "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, VIA_UDMA_133 | 98 { "vt8261", PCI_DEVICE_ID_VIA_8261, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
107 VIA_BAD_AST | VIA_SATA_PATA }, 99 { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
108 { "vt8261", PCI_DEVICE_ID_VIA_8261, 0x00, 0x2f, 100 { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
109 VIA_UDMA_133 | VIA_BAD_AST }, 101 { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
110 { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 102 { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_NO_ENABLES },
111 { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 103 { "vt6415", PCI_DEVICE_ID_VIA_6415, 0x00, 0xff, ATA_UDMA6, VIA_BAD_AST | VIA_NO_ENABLES },
112 { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_SATA_PATA }, 104 { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
113 { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES }, 105 { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
114 { "vt6415", PCI_DEVICE_ID_VIA_6415, 0x00, 0xff, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES }, 106 { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
115 { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 107 { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
116 { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 108 { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, ATA_UDMA5, },
117 { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 109 { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, ATA_UDMA5, },
118 { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 110 { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, ATA_UDMA5, },
119 { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, VIA_UDMA_100 }, 111 { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, ATA_UDMA5, },
120 { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, VIA_UDMA_100 }, 112 { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, ATA_UDMA4, },
121 { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, VIA_UDMA_100 }, 113 { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
122 { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, VIA_UDMA_100 }, 114 { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, ATA_UDMA4, },
123 { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, VIA_UDMA_66 }, 115 { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
124 { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 }, 116 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, ATA_UDMA2, VIA_SET_FIFO },
125 { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, VIA_UDMA_66 }, 117 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, ATA_UDMA2, VIA_SET_FIFO | VIA_BAD_PREQ },
126 { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 }, 118 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, ATA_UDMA2, VIA_SET_FIFO },
127 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, VIA_UDMA_33 | VIA_SET_FIFO }, 119 { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, ATA_UDMA2, VIA_SET_FIFO },
128 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, VIA_UDMA_33 | VIA_SET_FIFO | VIA_BAD_PREQ }, 120 { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, 0x00, VIA_SET_FIFO },
129 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, VIA_UDMA_33 | VIA_SET_FIFO }, 121 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK },
130 { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, VIA_UDMA_33 | VIA_SET_FIFO }, 122 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
131 { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, VIA_UDMA_NONE | VIA_SET_FIFO }, 123 { "vtxxxx", PCI_DEVICE_ID_VIA_ANON, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
132 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK },
133 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
134 { "vtxxxx", PCI_DEVICE_ID_VIA_ANON, 0x00, 0x2f,
135 VIA_UDMA_133 | VIA_BAD_AST },
136 { NULL } 124 { NULL }
137}; 125};
138 126
@@ -191,10 +179,10 @@ static int via_cable_detect(struct ata_port *ap) {
191 return ATA_CBL_SATA; 179 return ATA_CBL_SATA;
192 180
193 /* Early chips are 40 wire */ 181 /* Early chips are 40 wire */
194 if ((config->flags & VIA_UDMA) < VIA_UDMA_66) 182 if (config->udma_mask < ATA_UDMA4)
195 return ATA_CBL_PATA40; 183 return ATA_CBL_PATA40;
196 /* UDMA 66 chips have only drive side logic */ 184 /* UDMA 66 chips have only drive side logic */
197 else if ((config->flags & VIA_UDMA) < VIA_UDMA_100) 185 else if (config->udma_mask < ATA_UDMA5)
198 return ATA_CBL_PATA_UNK; 186 return ATA_CBL_PATA_UNK;
199 /* UDMA 100 or later */ 187 /* UDMA 100 or later */
200 pci_read_config_dword(pdev, 0x50, &ata66); 188 pci_read_config_dword(pdev, 0x50, &ata66);
@@ -229,11 +217,10 @@ static int via_pre_reset(struct ata_link *link, unsigned long deadline)
229 217
230 218
231/** 219/**
232 * via_do_set_mode - set initial PIO mode data 220 * via_do_set_mode - set transfer mode data
233 * @ap: ATA interface 221 * @ap: ATA interface
234 * @adev: ATA device 222 * @adev: ATA device
235 * @mode: ATA mode being programmed 223 * @mode: ATA mode being programmed
236 * @tdiv: Clocks per PCI clock
237 * @set_ast: Set to program address setup 224 * @set_ast: Set to program address setup
238 * @udma_type: UDMA mode/format of registers 225 * @udma_type: UDMA mode/format of registers
239 * 226 *
@@ -244,17 +231,27 @@ static int via_pre_reset(struct ata_link *link, unsigned long deadline)
244 * on the two channels. 231 * on the two channels.
245 */ 232 */
246 233
247static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev, int mode, int tdiv, int set_ast, int udma_type) 234static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev,
235 int mode, int set_ast, int udma_type)
248{ 236{
249 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 237 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
250 struct ata_device *peer = ata_dev_pair(adev); 238 struct ata_device *peer = ata_dev_pair(adev);
251 struct ata_timing t, p; 239 struct ata_timing t, p;
252 static int via_clock = 33333; /* Bus clock in kHZ - ought to be tunable one day */ 240 static int via_clock = 33333; /* Bus clock in kHZ */
253 unsigned long T = 1000000000 / via_clock; 241 unsigned long T = 1000000000 / via_clock;
254 unsigned long UT = T/tdiv; 242 unsigned long UT = T;
255 int ut; 243 int ut;
256 int offset = 3 - (2*ap->port_no) - adev->devno; 244 int offset = 3 - (2*ap->port_no) - adev->devno;
257 245
246 switch (udma_type) {
247 case ATA_UDMA4:
248 UT = T / 2; break;
249 case ATA_UDMA5:
250 UT = T / 3; break;
251 case ATA_UDMA6:
252 UT = T / 4; break;
253 }
254
258 /* Calculate the timing values we require */ 255 /* Calculate the timing values we require */
259 ata_timing_compute(adev, mode, &t, T, UT); 256 ata_timing_compute(adev, mode, &t, T, UT);
260 257
@@ -273,7 +270,7 @@ static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev, int mo
273 270
274 pci_read_config_byte(pdev, 0x4C, &setup); 271 pci_read_config_byte(pdev, 0x4C, &setup);
275 setup &= ~(3 << shift); 272 setup &= ~(3 << shift);
276 setup |= clamp_val(t.setup, 1, 4) << shift; /* 1,4 or 1,4 - 1 FIXME */ 273 setup |= (clamp_val(t.setup, 1, 4) - 1) << shift;
277 pci_write_config_byte(pdev, 0x4C, setup); 274 pci_write_config_byte(pdev, 0x4C, setup);
278 } 275 }
279 276
@@ -284,33 +281,38 @@ static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev, int mo
284 ((clamp_val(t.active, 1, 16) - 1) << 4) | (clamp_val(t.recover, 1, 16) - 1)); 281 ((clamp_val(t.active, 1, 16) - 1) << 4) | (clamp_val(t.recover, 1, 16) - 1));
285 282
286 /* Load the UDMA bits according to type */ 283 /* Load the UDMA bits according to type */
287 switch(udma_type) { 284 switch (udma_type) {
288 default: 285 case ATA_UDMA2:
289 /* BUG() ? */ 286 default:
290 /* fall through */ 287 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 5) - 2)) : 0x03;
291 case 33: 288 break;
292 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 5) - 2)) : 0x03; 289 case ATA_UDMA4:
293 break; 290 ut = t.udma ? (0xe8 | (clamp_val(t.udma, 2, 9) - 2)) : 0x0f;
294 case 66: 291 break;
295 ut = t.udma ? (0xe8 | (clamp_val(t.udma, 2, 9) - 2)) : 0x0f; 292 case ATA_UDMA5:
296 break; 293 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
297 case 100: 294 break;
298 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07; 295 case ATA_UDMA6:
299 break; 296 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
300 case 133: 297 break;
301 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
302 break;
303 } 298 }
304 299
305 /* Set UDMA unless device is not UDMA capable */ 300 /* Set UDMA unless device is not UDMA capable */
306 if (udma_type && t.udma) { 301 if (udma_type) {
307 u8 cable80_status; 302 u8 udma_etc;
303
304 pci_read_config_byte(pdev, 0x50 + offset, &udma_etc);
308 305
309 /* Get 80-wire cable detection bit */ 306 /* clear transfer mode bit */
310 pci_read_config_byte(pdev, 0x50 + offset, &cable80_status); 307 udma_etc &= ~0x20;
311 cable80_status &= 0x10;
312 308
313 pci_write_config_byte(pdev, 0x50 + offset, ut | cable80_status); 309 if (t.udma) {
310 /* preserve 80-wire cable detection bit */
311 udma_etc &= 0x10;
312 udma_etc |= ut;
313 }
314
315 pci_write_config_byte(pdev, 0x50 + offset, udma_etc);
314 } 316 }
315} 317}
316 318
@@ -318,22 +320,42 @@ static void via_set_piomode(struct ata_port *ap, struct ata_device *adev)
318{ 320{
319 const struct via_isa_bridge *config = ap->host->private_data; 321 const struct via_isa_bridge *config = ap->host->private_data;
320 int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1; 322 int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
321 int mode = config->flags & VIA_UDMA;
322 static u8 tclock[5] = { 1, 1, 2, 3, 4 };
323 static u8 udma[5] = { 0, 33, 66, 100, 133 };
324 323
325 via_do_set_mode(ap, adev, adev->pio_mode, tclock[mode], set_ast, udma[mode]); 324 via_do_set_mode(ap, adev, adev->pio_mode, set_ast, config->udma_mask);
326} 325}
327 326
328static void via_set_dmamode(struct ata_port *ap, struct ata_device *adev) 327static void via_set_dmamode(struct ata_port *ap, struct ata_device *adev)
329{ 328{
330 const struct via_isa_bridge *config = ap->host->private_data; 329 const struct via_isa_bridge *config = ap->host->private_data;
331 int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1; 330 int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
332 int mode = config->flags & VIA_UDMA;
333 static u8 tclock[5] = { 1, 1, 2, 3, 4 };
334 static u8 udma[5] = { 0, 33, 66, 100, 133 };
335 331
336 via_do_set_mode(ap, adev, adev->dma_mode, tclock[mode], set_ast, udma[mode]); 332 via_do_set_mode(ap, adev, adev->dma_mode, set_ast, config->udma_mask);
333}
334
335/**
336 * via_mode_filter - filter buggy device/mode pairs
337 * @dev: ATA device
338 * @mask: Mode bitmask
339 *
340 * We need to apply some minimal filtering for old controllers and at least
341 * one breed of Transcend SSD. Return the updated mask.
342 */
343
344static unsigned long via_mode_filter(struct ata_device *dev, unsigned long mask)
345{
346 struct ata_host *host = dev->link->ap->host;
347 const struct via_isa_bridge *config = host->private_data;
348 unsigned char model_num[ATA_ID_PROD_LEN + 1];
349
350 if (config->id == PCI_DEVICE_ID_VIA_82C586_0) {
351 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num));
352 if (strcmp(model_num, "TS64GSSD25-M") == 0) {
353 ata_dev_printk(dev, KERN_WARNING,
354 "disabling UDMA mode due to reported lockups with this device.\n");
355 mask &= ~ ATA_MASK_UDMA;
356 }
357 }
358 return ata_bmdma_mode_filter(dev, mask);
337} 359}
338 360
339/** 361/**
@@ -427,6 +449,7 @@ static struct ata_port_operations via_port_ops = {
427 .prereset = via_pre_reset, 449 .prereset = via_pre_reset,
428 .sff_tf_load = via_tf_load, 450 .sff_tf_load = via_tf_load,
429 .port_start = via_port_start, 451 .port_start = via_port_start,
452 .mode_filter = via_mode_filter,
430}; 453};
431 454
432static struct ata_port_operations via_port_ops_noirq = { 455static struct ata_port_operations via_port_ops_noirq = {
@@ -526,7 +549,7 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
526 .port_ops = &via_port_ops 549 .port_ops = &via_port_ops
527 }; 550 };
528 const struct ata_port_info *ppi[] = { NULL, NULL }; 551 const struct ata_port_info *ppi[] = { NULL, NULL };
529 struct pci_dev *isa = NULL; 552 struct pci_dev *isa;
530 const struct via_isa_bridge *config; 553 const struct via_isa_bridge *config;
531 static int printed_version; 554 static int printed_version;
532 u8 enable; 555 u8 enable;
@@ -551,15 +574,17 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
551 if ((isa = pci_get_device(PCI_VENDOR_ID_VIA + 574 if ((isa = pci_get_device(PCI_VENDOR_ID_VIA +
552 !!(config->flags & VIA_BAD_ID), 575 !!(config->flags & VIA_BAD_ID),
553 config->id, NULL))) { 576 config->id, NULL))) {
577 u8 rev = isa->revision;
578 pci_dev_put(isa);
554 579
555 if (isa->revision >= config->rev_min && 580 if ((id->device == 0x0415 || id->device == 0x3164) &&
556 isa->revision <= config->rev_max) 581 (config->id != id->device))
582 continue;
583
584 if (rev >= config->rev_min && rev <= config->rev_max)
557 break; 585 break;
558 pci_dev_put(isa);
559 } 586 }
560 587
561 pci_dev_put(isa);
562
563 if (!(config->flags & VIA_NO_ENABLES)) { 588 if (!(config->flags & VIA_NO_ENABLES)) {
564 /* 0x40 low bits indicate enabled channels */ 589 /* 0x40 low bits indicate enabled channels */
565 pci_read_config_byte(pdev, 0x40 , &enable); 590 pci_read_config_byte(pdev, 0x40 , &enable);
@@ -572,33 +597,29 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
572 via_config_fifo(pdev, config->flags); 597 via_config_fifo(pdev, config->flags);
573 598
574 /* Clock set up */ 599 /* Clock set up */
575 switch(config->flags & VIA_UDMA) { 600 switch (config->udma_mask) {
576 case VIA_UDMA_NONE: 601 case 0x00:
577 if (config->flags & VIA_NO_UNMASK) 602 if (config->flags & VIA_NO_UNMASK)
578 ppi[0] = &via_mwdma_info_borked; 603 ppi[0] = &via_mwdma_info_borked;
579 else 604 else
580 ppi[0] = &via_mwdma_info; 605 ppi[0] = &via_mwdma_info;
581 break; 606 break;
582 case VIA_UDMA_33: 607 case ATA_UDMA2:
583 ppi[0] = &via_udma33_info; 608 ppi[0] = &via_udma33_info;
584 break; 609 break;
585 case VIA_UDMA_66: 610 case ATA_UDMA4:
586 ppi[0] = &via_udma66_info; 611 ppi[0] = &via_udma66_info;
587 /* The 66 MHz devices require we enable the clock */ 612 break;
588 pci_read_config_dword(pdev, 0x50, &timing); 613 case ATA_UDMA5:
589 timing |= 0x80008; 614 ppi[0] = &via_udma100_info;
590 pci_write_config_dword(pdev, 0x50, timing); 615 break;
591 break; 616 case ATA_UDMA6:
592 case VIA_UDMA_100: 617 ppi[0] = &via_udma133_info;
593 ppi[0] = &via_udma100_info; 618 break;
594 break; 619 default:
595 case VIA_UDMA_133: 620 WARN_ON(1);
596 ppi[0] = &via_udma133_info; 621 return -ENODEV;
597 break; 622 }
598 default:
599 WARN_ON(1);
600 return -ENODEV;
601 }
602 623
603 if (config->flags & VIA_BAD_CLK66) { 624 if (config->flags & VIA_BAD_CLK66) {
604 /* Disable the 66MHz clock on problem devices */ 625 /* Disable the 66MHz clock on problem devices */
@@ -608,7 +629,7 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
608 } 629 }
609 630
610 /* We have established the device type, now fire it up */ 631 /* We have established the device type, now fire it up */
611 return ata_pci_sff_init_one(pdev, ppi, &via_sht, (void *)config); 632 return ata_pci_sff_init_one(pdev, ppi, &via_sht, (void *)config, 0);
612} 633}
613 634
614#ifdef CONFIG_PM 635#ifdef CONFIG_PM
@@ -635,7 +656,7 @@ static int via_reinit_one(struct pci_dev *pdev)
635 656
636 via_config_fifo(pdev, config->flags); 657 via_config_fifo(pdev, config->flags);
637 658
638 if ((config->flags & VIA_UDMA) == VIA_UDMA_66) { 659 if (config->udma_mask == ATA_UDMA4) {
639 /* The 66 MHz devices require we enable the clock */ 660 /* The 66 MHz devices require we enable the clock */
640 pci_read_config_dword(pdev, 0x50, &timing); 661 pci_read_config_dword(pdev, 0x50, &timing);
641 timing |= 0x80008; 662 timing |= 0x80008;
@@ -661,6 +682,7 @@ static const struct pci_device_id via[] = {
661 { PCI_VDEVICE(VIA, 0x3164), }, 682 { PCI_VDEVICE(VIA, 0x3164), },
662 { PCI_VDEVICE(VIA, 0x5324), }, 683 { PCI_VDEVICE(VIA, 0x5324), },
663 { PCI_VDEVICE(VIA, 0xC409), VIA_IDFLAG_SINGLE }, 684 { PCI_VDEVICE(VIA, 0xC409), VIA_IDFLAG_SINGLE },
685 { PCI_VDEVICE(VIA, 0x9001), VIA_IDFLAG_SINGLE },
664 686
665 { }, 687 { },
666}; 688};
diff --git a/drivers/ata/pdc_adma.c b/drivers/ata/pdc_adma.c
index 6c65b0776a2c..5904cfdb8dbe 100644
--- a/drivers/ata/pdc_adma.c
+++ b/drivers/ata/pdc_adma.c
@@ -34,6 +34,7 @@
34 34
35#include <linux/kernel.h> 35#include <linux/kernel.h>
36#include <linux/module.h> 36#include <linux/module.h>
37#include <linux/gfp.h>
37#include <linux/pci.h> 38#include <linux/pci.h>
38#include <linux/init.h> 39#include <linux/init.h>
39#include <linux/blkdev.h> 40#include <linux/blkdev.h>
diff --git a/drivers/ata/sata_fsl.c b/drivers/ata/sata_fsl.c
index 172b57e6543f..a69192b38b43 100644
--- a/drivers/ata/sata_fsl.c
+++ b/drivers/ata/sata_fsl.c
@@ -18,6 +18,7 @@
18#include <linux/kernel.h> 18#include <linux/kernel.h>
19#include <linux/module.h> 19#include <linux/module.h>
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <linux/slab.h>
21 22
22#include <scsi/scsi_host.h> 23#include <scsi/scsi_host.h>
23#include <scsi/scsi_cmnd.h> 24#include <scsi/scsi_cmnd.h>
@@ -34,7 +35,7 @@ enum {
34 35
35 SATA_FSL_HOST_FLAGS = (ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | 36 SATA_FSL_HOST_FLAGS = (ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
36 ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA | 37 ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA |
37 ATA_FLAG_PMP | ATA_FLAG_NCQ), 38 ATA_FLAG_PMP | ATA_FLAG_NCQ | ATA_FLAG_AN),
38 39
39 SATA_FSL_MAX_CMDS = SATA_FSL_QUEUE_DEPTH, 40 SATA_FSL_MAX_CMDS = SATA_FSL_QUEUE_DEPTH,
40 SATA_FSL_CMD_HDR_SIZE = 16, /* 4 DWORDS */ 41 SATA_FSL_CMD_HDR_SIZE = 16, /* 4 DWORDS */
@@ -43,9 +44,9 @@ enum {
43 /* 44 /*
44 * SATA-FSL host controller supports a max. of (15+1) direct PRDEs, and 45 * SATA-FSL host controller supports a max. of (15+1) direct PRDEs, and
45 * chained indirect PRDEs upto a max count of 63. 46 * chained indirect PRDEs upto a max count of 63.
46 * We are allocating an array of 63 PRDEs contigiously, but PRDE#15 will 47 * We are allocating an array of 63 PRDEs contiguously, but PRDE#15 will
47 * be setup as an indirect descriptor, pointing to it's next 48 * be setup as an indirect descriptor, pointing to it's next
48 * (contigious) PRDE. Though chained indirect PRDE arrays are 49 * (contiguous) PRDE. Though chained indirect PRDE arrays are
49 * supported,it will be more efficient to use a direct PRDT and 50 * supported,it will be more efficient to use a direct PRDT and
50 * a single chain/link to indirect PRDE array/PRDT. 51 * a single chain/link to indirect PRDE array/PRDT.
51 */ 52 */
@@ -132,7 +133,7 @@ enum {
132 INT_ON_SINGL_DEVICE_ERR = (1 << 1), 133 INT_ON_SINGL_DEVICE_ERR = (1 << 1),
133 INT_ON_CMD_COMPLETE = 1, 134 INT_ON_CMD_COMPLETE = 1,
134 135
135 INT_ON_ERROR = INT_ON_FATAL_ERR | 136 INT_ON_ERROR = INT_ON_FATAL_ERR | INT_ON_SNOTIFY_UPDATE |
136 INT_ON_PHYRDY_CHG | INT_ON_SINGL_DEVICE_ERR, 137 INT_ON_PHYRDY_CHG | INT_ON_SINGL_DEVICE_ERR,
137 138
138 /* 139 /*
@@ -153,7 +154,7 @@ enum {
153 IE_ON_CMD_COMPLETE = 1, 154 IE_ON_CMD_COMPLETE = 1,
154 155
155 DEFAULT_PORT_IRQ_ENABLE_MASK = IE_ON_FATAL_ERR | IE_ON_PHYRDY_CHG | 156 DEFAULT_PORT_IRQ_ENABLE_MASK = IE_ON_FATAL_ERR | IE_ON_PHYRDY_CHG |
156 IE_ON_SIGNATURE_UPDATE | 157 IE_ON_SIGNATURE_UPDATE | IE_ON_SNOTIFY_UPDATE |
157 IE_ON_SINGL_DEVICE_ERR | IE_ON_CMD_COMPLETE, 158 IE_ON_SINGL_DEVICE_ERR | IE_ON_CMD_COMPLETE,
158 159
159 EXT_INDIRECT_SEG_PRD_FLAG = (1 << 31), 160 EXT_INDIRECT_SEG_PRD_FLAG = (1 << 31),
@@ -314,7 +315,7 @@ static unsigned int sata_fsl_fill_sg(struct ata_queued_cmd *qc, void *cmd_desc,
314 u32 ttl_dwords = 0; 315 u32 ttl_dwords = 0;
315 316
316 /* 317 /*
317 * NOTE : direct & indirect prdt's are contigiously allocated 318 * NOTE : direct & indirect prdt's are contiguously allocated
318 */ 319 */
319 struct prde *prd = (struct prde *)&((struct command_desc *) 320 struct prde *prd = (struct prde *)&((struct command_desc *)
320 cmd_desc)->prdt; 321 cmd_desc)->prdt;
@@ -992,9 +993,8 @@ static void sata_fsl_error_intr(struct ata_port *ap)
992 */ 993 */
993 994
994 sata_fsl_scr_read(&ap->link, SCR_ERROR, &SError); 995 sata_fsl_scr_read(&ap->link, SCR_ERROR, &SError);
995 if (unlikely(SError & 0xFFFF0000)) { 996 if (unlikely(SError & 0xFFFF0000))
996 sata_fsl_scr_write(&ap->link, SCR_ERROR, SError); 997 sata_fsl_scr_write(&ap->link, SCR_ERROR, SError);
997 }
998 998
999 DPRINTK("error_intr,hStat=0x%x,CE=0x%x,DE =0x%x,SErr=0x%x\n", 999 DPRINTK("error_intr,hStat=0x%x,CE=0x%x,DE =0x%x,SErr=0x%x\n",
1000 hstatus, cereg, ioread32(hcr_base + DE), SError); 1000 hstatus, cereg, ioread32(hcr_base + DE), SError);
@@ -1007,6 +1007,10 @@ static void sata_fsl_error_intr(struct ata_port *ap)
1007 freeze = 1; 1007 freeze = 1;
1008 } 1008 }
1009 1009
1010 /* Handle SDB FIS receive & notify update */
1011 if (hstatus & INT_ON_SNOTIFY_UPDATE)
1012 sata_async_notification(ap);
1013
1010 /* Handle PHYRDY change notification */ 1014 /* Handle PHYRDY change notification */
1011 if (hstatus & INT_ON_PHYRDY_CHG) { 1015 if (hstatus & INT_ON_PHYRDY_CHG) {
1012 DPRINTK("SATA FSL: PHYRDY change indication\n"); 1016 DPRINTK("SATA FSL: PHYRDY change indication\n");
@@ -1070,9 +1074,9 @@ static void sata_fsl_error_intr(struct ata_port *ap)
1070 } 1074 }
1071 1075
1072 /* record error info */ 1076 /* record error info */
1073 if (qc) { 1077 if (qc)
1074 qc->err_mask |= err_mask; 1078 qc->err_mask |= err_mask;
1075 } else 1079 else
1076 ehi->err_mask |= err_mask; 1080 ehi->err_mask |= err_mask;
1077 1081
1078 ehi->action |= action; 1082 ehi->action |= action;
@@ -1103,7 +1107,6 @@ static void sata_fsl_host_intr(struct ata_port *ap)
1103 if (unlikely(SError & 0xFFFF0000)) { 1107 if (unlikely(SError & 0xFFFF0000)) {
1104 DPRINTK("serror @host_intr : 0x%x\n", SError); 1108 DPRINTK("serror @host_intr : 0x%x\n", SError);
1105 sata_fsl_error_intr(ap); 1109 sata_fsl_error_intr(ap);
1106
1107 } 1110 }
1108 1111
1109 if (unlikely(hstatus & INT_ON_ERROR)) { 1112 if (unlikely(hstatus & INT_ON_ERROR)) {
diff --git a/drivers/ata/sata_inic162x.c b/drivers/ata/sata_inic162x.c
index 4406902b4293..27dc6c86a4cd 100644
--- a/drivers/ata/sata_inic162x.c
+++ b/drivers/ata/sata_inic162x.c
@@ -39,6 +39,7 @@
39 * happy to assist. 39 * happy to assist.
40 */ 40 */
41 41
42#include <linux/gfp.h>
42#include <linux/kernel.h> 43#include <linux/kernel.h>
43#include <linux/module.h> 44#include <linux/module.h>
44#include <linux/pci.h> 45#include <linux/pci.h>
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index 6f5093b7c8c5..71cc0d42f9e1 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -59,10 +59,12 @@
59#include <linux/dmapool.h> 59#include <linux/dmapool.h>
60#include <linux/dma-mapping.h> 60#include <linux/dma-mapping.h>
61#include <linux/device.h> 61#include <linux/device.h>
62#include <linux/clk.h>
62#include <linux/platform_device.h> 63#include <linux/platform_device.h>
63#include <linux/ata_platform.h> 64#include <linux/ata_platform.h>
64#include <linux/mbus.h> 65#include <linux/mbus.h>
65#include <linux/bitops.h> 66#include <linux/bitops.h>
67#include <linux/gfp.h>
66#include <scsi/scsi_host.h> 68#include <scsi/scsi_host.h>
67#include <scsi/scsi_cmnd.h> 69#include <scsi/scsi_cmnd.h>
68#include <scsi/scsi_device.h> 70#include <scsi/scsi_device.h>
@@ -538,6 +540,7 @@ struct mv_port_signal {
538 540
539struct mv_host_priv { 541struct mv_host_priv {
540 u32 hp_flags; 542 u32 hp_flags;
543 unsigned int board_idx;
541 u32 main_irq_mask; 544 u32 main_irq_mask;
542 struct mv_port_signal signal[8]; 545 struct mv_port_signal signal[8];
543 const struct mv_hw_ops *ops; 546 const struct mv_hw_ops *ops;
@@ -548,6 +551,10 @@ struct mv_host_priv {
548 u32 irq_cause_offset; 551 u32 irq_cause_offset;
549 u32 irq_mask_offset; 552 u32 irq_mask_offset;
550 u32 unmask_all_irqs; 553 u32 unmask_all_irqs;
554
555#if defined(CONFIG_HAVE_CLK)
556 struct clk *clk;
557#endif
551 /* 558 /*
552 * These consistent DMA memory pools give us guaranteed 559 * These consistent DMA memory pools give us guaranteed
553 * alignment for hardware-accessed data structures, 560 * alignment for hardware-accessed data structures,
@@ -2217,7 +2224,7 @@ static unsigned int mv_qc_issue_fis(struct ata_queued_cmd *qc)
2217 int err = 0; 2224 int err = 0;
2218 2225
2219 ata_tf_to_fis(&qc->tf, link->pmp, 1, (void *)fis); 2226 ata_tf_to_fis(&qc->tf, link->pmp, 1, (void *)fis);
2220 err = mv_send_fis(ap, fis, sizeof(fis) / sizeof(fis[0])); 2227 err = mv_send_fis(ap, fis, ARRAY_SIZE(fis));
2221 if (err) 2228 if (err)
2222 return err; 2229 return err;
2223 2230
@@ -2775,7 +2782,7 @@ static void mv_port_intr(struct ata_port *ap, u32 port_cause)
2775 struct mv_port_priv *pp; 2782 struct mv_port_priv *pp;
2776 int edma_was_enabled; 2783 int edma_was_enabled;
2777 2784
2778 if (!ap || (ap->flags & ATA_FLAG_DISABLED)) { 2785 if (ap->flags & ATA_FLAG_DISABLED) {
2779 mv_unexpected_intr(ap, 0); 2786 mv_unexpected_intr(ap, 0);
2780 return; 2787 return;
2781 } 2788 }
@@ -3393,7 +3400,7 @@ static void mv_soc_reset_hc_port(struct mv_host_priv *hpriv,
3393 ZERO(0x024); /* respq outp */ 3400 ZERO(0x024); /* respq outp */
3394 ZERO(0x020); /* respq inp */ 3401 ZERO(0x020); /* respq inp */
3395 ZERO(0x02c); /* test control */ 3402 ZERO(0x02c); /* test control */
3396 writel(0xbc, port_mmio + EDMA_IORDY_TMOUT); 3403 writel(0x800, port_mmio + EDMA_IORDY_TMOUT);
3397} 3404}
3398 3405
3399#undef ZERO 3406#undef ZERO
@@ -3854,7 +3861,6 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx)
3854/** 3861/**
3855 * mv_init_host - Perform some early initialization of the host. 3862 * mv_init_host - Perform some early initialization of the host.
3856 * @host: ATA host to initialize 3863 * @host: ATA host to initialize
3857 * @board_idx: controller index
3858 * 3864 *
3859 * If possible, do an early global reset of the host. Then do 3865 * If possible, do an early global reset of the host. Then do
3860 * our port init and clear/unmask all/relevant host interrupts. 3866 * our port init and clear/unmask all/relevant host interrupts.
@@ -3862,13 +3868,13 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx)
3862 * LOCKING: 3868 * LOCKING:
3863 * Inherited from caller. 3869 * Inherited from caller.
3864 */ 3870 */
3865static int mv_init_host(struct ata_host *host, unsigned int board_idx) 3871static int mv_init_host(struct ata_host *host)
3866{ 3872{
3867 int rc = 0, n_hc, port, hc; 3873 int rc = 0, n_hc, port, hc;
3868 struct mv_host_priv *hpriv = host->private_data; 3874 struct mv_host_priv *hpriv = host->private_data;
3869 void __iomem *mmio = hpriv->base; 3875 void __iomem *mmio = hpriv->base;
3870 3876
3871 rc = mv_chip_id(host, board_idx); 3877 rc = mv_chip_id(host, hpriv->board_idx);
3872 if (rc) 3878 if (rc)
3873 goto done; 3879 goto done;
3874 3880
@@ -3905,14 +3911,6 @@ static int mv_init_host(struct ata_host *host, unsigned int board_idx)
3905 void __iomem *port_mmio = mv_port_base(mmio, port); 3911 void __iomem *port_mmio = mv_port_base(mmio, port);
3906 3912
3907 mv_port_init(&ap->ioaddr, port_mmio); 3913 mv_port_init(&ap->ioaddr, port_mmio);
3908
3909#ifdef CONFIG_PCI
3910 if (!IS_SOC(hpriv)) {
3911 unsigned int offset = port_mmio - mmio;
3912 ata_port_pbar_desc(ap, MV_PRIMARY_BAR, -1, "mmio");
3913 ata_port_pbar_desc(ap, MV_PRIMARY_BAR, offset, "port");
3914 }
3915#endif
3916 } 3914 }
3917 3915
3918 for (hc = 0; hc < n_hc; hc++) { 3916 for (hc = 0; hc < n_hc; hc++) {
@@ -4035,12 +4033,21 @@ static int mv_platform_probe(struct platform_device *pdev)
4035 return -ENOMEM; 4033 return -ENOMEM;
4036 host->private_data = hpriv; 4034 host->private_data = hpriv;
4037 hpriv->n_ports = n_ports; 4035 hpriv->n_ports = n_ports;
4036 hpriv->board_idx = chip_soc;
4038 4037
4039 host->iomap = NULL; 4038 host->iomap = NULL;
4040 hpriv->base = devm_ioremap(&pdev->dev, res->start, 4039 hpriv->base = devm_ioremap(&pdev->dev, res->start,
4041 resource_size(res)); 4040 resource_size(res));
4042 hpriv->base -= SATAHC0_REG_BASE; 4041 hpriv->base -= SATAHC0_REG_BASE;
4043 4042
4043#if defined(CONFIG_HAVE_CLK)
4044 hpriv->clk = clk_get(&pdev->dev, NULL);
4045 if (IS_ERR(hpriv->clk))
4046 dev_notice(&pdev->dev, "cannot get clkdev\n");
4047 else
4048 clk_enable(hpriv->clk);
4049#endif
4050
4044 /* 4051 /*
4045 * (Re-)program MBUS remapping windows if we are asked to. 4052 * (Re-)program MBUS remapping windows if we are asked to.
4046 */ 4053 */
@@ -4049,12 +4056,12 @@ static int mv_platform_probe(struct platform_device *pdev)
4049 4056
4050 rc = mv_create_dma_pools(hpriv, &pdev->dev); 4057 rc = mv_create_dma_pools(hpriv, &pdev->dev);
4051 if (rc) 4058 if (rc)
4052 return rc; 4059 goto err;
4053 4060
4054 /* initialize adapter */ 4061 /* initialize adapter */
4055 rc = mv_init_host(host, chip_soc); 4062 rc = mv_init_host(host);
4056 if (rc) 4063 if (rc)
4057 return rc; 4064 goto err;
4058 4065
4059 dev_printk(KERN_INFO, &pdev->dev, 4066 dev_printk(KERN_INFO, &pdev->dev,
4060 "slots %u ports %d\n", (unsigned)MV_MAX_Q_DEPTH, 4067 "slots %u ports %d\n", (unsigned)MV_MAX_Q_DEPTH,
@@ -4062,6 +4069,15 @@ static int mv_platform_probe(struct platform_device *pdev)
4062 4069
4063 return ata_host_activate(host, platform_get_irq(pdev, 0), mv_interrupt, 4070 return ata_host_activate(host, platform_get_irq(pdev, 0), mv_interrupt,
4064 IRQF_SHARED, &mv6_sht); 4071 IRQF_SHARED, &mv6_sht);
4072err:
4073#if defined(CONFIG_HAVE_CLK)
4074 if (!IS_ERR(hpriv->clk)) {
4075 clk_disable(hpriv->clk);
4076 clk_put(hpriv->clk);
4077 }
4078#endif
4079
4080 return rc;
4065} 4081}
4066 4082
4067/* 4083/*
@@ -4076,14 +4092,66 @@ static int __devexit mv_platform_remove(struct platform_device *pdev)
4076{ 4092{
4077 struct device *dev = &pdev->dev; 4093 struct device *dev = &pdev->dev;
4078 struct ata_host *host = dev_get_drvdata(dev); 4094 struct ata_host *host = dev_get_drvdata(dev);
4079 4095#if defined(CONFIG_HAVE_CLK)
4096 struct mv_host_priv *hpriv = host->private_data;
4097#endif
4080 ata_host_detach(host); 4098 ata_host_detach(host);
4099
4100#if defined(CONFIG_HAVE_CLK)
4101 if (!IS_ERR(hpriv->clk)) {
4102 clk_disable(hpriv->clk);
4103 clk_put(hpriv->clk);
4104 }
4105#endif
4081 return 0; 4106 return 0;
4082} 4107}
4083 4108
4109#ifdef CONFIG_PM
4110static int mv_platform_suspend(struct platform_device *pdev, pm_message_t state)
4111{
4112 struct ata_host *host = dev_get_drvdata(&pdev->dev);
4113 if (host)
4114 return ata_host_suspend(host, state);
4115 else
4116 return 0;
4117}
4118
4119static int mv_platform_resume(struct platform_device *pdev)
4120{
4121 struct ata_host *host = dev_get_drvdata(&pdev->dev);
4122 int ret;
4123
4124 if (host) {
4125 struct mv_host_priv *hpriv = host->private_data;
4126 const struct mv_sata_platform_data *mv_platform_data = \
4127 pdev->dev.platform_data;
4128 /*
4129 * (Re-)program MBUS remapping windows if we are asked to.
4130 */
4131 if (mv_platform_data->dram != NULL)
4132 mv_conf_mbus_windows(hpriv, mv_platform_data->dram);
4133
4134 /* initialize adapter */
4135 ret = mv_init_host(host);
4136 if (ret) {
4137 printk(KERN_ERR DRV_NAME ": Error during HW init\n");
4138 return ret;
4139 }
4140 ata_host_resume(host);
4141 }
4142
4143 return 0;
4144}
4145#else
4146#define mv_platform_suspend NULL
4147#define mv_platform_resume NULL
4148#endif
4149
4084static struct platform_driver mv_platform_driver = { 4150static struct platform_driver mv_platform_driver = {
4085 .probe = mv_platform_probe, 4151 .probe = mv_platform_probe,
4086 .remove = __devexit_p(mv_platform_remove), 4152 .remove = __devexit_p(mv_platform_remove),
4153 .suspend = mv_platform_suspend,
4154 .resume = mv_platform_resume,
4087 .driver = { 4155 .driver = {
4088 .name = DRV_NAME, 4156 .name = DRV_NAME,
4089 .owner = THIS_MODULE, 4157 .owner = THIS_MODULE,
@@ -4094,6 +4162,9 @@ static struct platform_driver mv_platform_driver = {
4094#ifdef CONFIG_PCI 4162#ifdef CONFIG_PCI
4095static int mv_pci_init_one(struct pci_dev *pdev, 4163static int mv_pci_init_one(struct pci_dev *pdev,
4096 const struct pci_device_id *ent); 4164 const struct pci_device_id *ent);
4165#ifdef CONFIG_PM
4166static int mv_pci_device_resume(struct pci_dev *pdev);
4167#endif
4097 4168
4098 4169
4099static struct pci_driver mv_pci_driver = { 4170static struct pci_driver mv_pci_driver = {
@@ -4101,6 +4172,11 @@ static struct pci_driver mv_pci_driver = {
4101 .id_table = mv_pci_tbl, 4172 .id_table = mv_pci_tbl,
4102 .probe = mv_pci_init_one, 4173 .probe = mv_pci_init_one,
4103 .remove = ata_pci_remove_one, 4174 .remove = ata_pci_remove_one,
4175#ifdef CONFIG_PM
4176 .suspend = ata_pci_device_suspend,
4177 .resume = mv_pci_device_resume,
4178#endif
4179
4104}; 4180};
4105 4181
4106/* move to PCI layer or libata core? */ 4182/* move to PCI layer or libata core? */
@@ -4194,7 +4270,7 @@ static int mv_pci_init_one(struct pci_dev *pdev,
4194 const struct ata_port_info *ppi[] = { &mv_port_info[board_idx], NULL }; 4270 const struct ata_port_info *ppi[] = { &mv_port_info[board_idx], NULL };
4195 struct ata_host *host; 4271 struct ata_host *host;
4196 struct mv_host_priv *hpriv; 4272 struct mv_host_priv *hpriv;
4197 int n_ports, rc; 4273 int n_ports, port, rc;
4198 4274
4199 if (!printed_version++) 4275 if (!printed_version++)
4200 dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n"); 4276 dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n");
@@ -4208,6 +4284,7 @@ static int mv_pci_init_one(struct pci_dev *pdev,
4208 return -ENOMEM; 4284 return -ENOMEM;
4209 host->private_data = hpriv; 4285 host->private_data = hpriv;
4210 hpriv->n_ports = n_ports; 4286 hpriv->n_ports = n_ports;
4287 hpriv->board_idx = board_idx;
4211 4288
4212 /* acquire resources */ 4289 /* acquire resources */
4213 rc = pcim_enable_device(pdev); 4290 rc = pcim_enable_device(pdev);
@@ -4230,8 +4307,17 @@ static int mv_pci_init_one(struct pci_dev *pdev,
4230 if (rc) 4307 if (rc)
4231 return rc; 4308 return rc;
4232 4309
4310 for (port = 0; port < host->n_ports; port++) {
4311 struct ata_port *ap = host->ports[port];
4312 void __iomem *port_mmio = mv_port_base(hpriv->base, port);
4313 unsigned int offset = port_mmio - hpriv->base;
4314
4315 ata_port_pbar_desc(ap, MV_PRIMARY_BAR, -1, "mmio");
4316 ata_port_pbar_desc(ap, MV_PRIMARY_BAR, offset, "port");
4317 }
4318
4233 /* initialize adapter */ 4319 /* initialize adapter */
4234 rc = mv_init_host(host, board_idx); 4320 rc = mv_init_host(host);
4235 if (rc) 4321 if (rc)
4236 return rc; 4322 return rc;
4237 4323
@@ -4247,6 +4333,27 @@ static int mv_pci_init_one(struct pci_dev *pdev,
4247 return ata_host_activate(host, pdev->irq, mv_interrupt, IRQF_SHARED, 4333 return ata_host_activate(host, pdev->irq, mv_interrupt, IRQF_SHARED,
4248 IS_GEN_I(hpriv) ? &mv5_sht : &mv6_sht); 4334 IS_GEN_I(hpriv) ? &mv5_sht : &mv6_sht);
4249} 4335}
4336
4337#ifdef CONFIG_PM
4338static int mv_pci_device_resume(struct pci_dev *pdev)
4339{
4340 struct ata_host *host = dev_get_drvdata(&pdev->dev);
4341 int rc;
4342
4343 rc = ata_pci_device_do_resume(pdev);
4344 if (rc)
4345 return rc;
4346
4347 /* initialize adapter */
4348 rc = mv_init_host(host);
4349 if (rc)
4350 return rc;
4351
4352 ata_host_resume(host);
4353
4354 return 0;
4355}
4356#endif
4250#endif 4357#endif
4251 4358
4252static int mv_platform_probe(struct platform_device *pdev); 4359static int mv_platform_probe(struct platform_device *pdev);
diff --git a/drivers/ata/sata_nv.c b/drivers/ata/sata_nv.c
index 1eb4e020eb5c..2a98b09ab735 100644
--- a/drivers/ata/sata_nv.c
+++ b/drivers/ata/sata_nv.c
@@ -38,6 +38,7 @@
38 38
39#include <linux/kernel.h> 39#include <linux/kernel.h>
40#include <linux/module.h> 40#include <linux/module.h>
41#include <linux/gfp.h>
41#include <linux/pci.h> 42#include <linux/pci.h>
42#include <linux/init.h> 43#include <linux/init.h>
43#include <linux/blkdev.h> 44#include <linux/blkdev.h>
@@ -772,7 +773,7 @@ static int nv_adma_slave_config(struct scsi_device *sdev)
772 } 773 }
773 774
774 blk_queue_segment_boundary(sdev->request_queue, segment_boundary); 775 blk_queue_segment_boundary(sdev->request_queue, segment_boundary);
775 blk_queue_max_hw_segments(sdev->request_queue, sg_tablesize); 776 blk_queue_max_segments(sdev->request_queue, sg_tablesize);
776 ata_port_printk(ap, KERN_INFO, 777 ata_port_printk(ap, KERN_INFO,
777 "DMA mask 0x%llX, segment boundary 0x%lX, hw segs %hu\n", 778 "DMA mask 0x%llX, segment boundary 0x%lX, hw segs %hu\n",
778 (unsigned long long)*ap->host->dev->dma_mask, 779 (unsigned long long)*ap->host->dev->dma_mask,
@@ -1975,7 +1976,7 @@ static int nv_swncq_slave_config(struct scsi_device *sdev)
1975 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num)); 1976 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num));
1976 1977
1977 if (strncmp(model_num, "Maxtor", 6) == 0) { 1978 if (strncmp(model_num, "Maxtor", 6) == 0) {
1978 ata_scsi_change_queue_depth(sdev, 1); 1979 ata_scsi_change_queue_depth(sdev, 1, SCSI_QDEPTH_DEFAULT);
1979 ata_dev_printk(dev, KERN_NOTICE, 1980 ata_dev_printk(dev, KERN_NOTICE,
1980 "Disabling SWNCQ mode (depth %x)\n", sdev->queue_depth); 1981 "Disabling SWNCQ mode (depth %x)\n", sdev->queue_depth);
1981 } 1982 }
diff --git a/drivers/ata/sata_promise.c b/drivers/ata/sata_promise.c
index 07d8d00b4d34..5356ec00d2b4 100644
--- a/drivers/ata/sata_promise.c
+++ b/drivers/ata/sata_promise.c
@@ -33,6 +33,7 @@
33 33
34#include <linux/kernel.h> 34#include <linux/kernel.h>
35#include <linux/module.h> 35#include <linux/module.h>
36#include <linux/gfp.h>
36#include <linux/pci.h> 37#include <linux/pci.h>
37#include <linux/init.h> 38#include <linux/init.h>
38#include <linux/blkdev.h> 39#include <linux/blkdev.h>
@@ -862,7 +863,7 @@ static void pdc_error_intr(struct ata_port *ap, struct ata_queued_cmd *qc,
862 if (port_status & PDC_DRIVE_ERR) 863 if (port_status & PDC_DRIVE_ERR)
863 ac_err_mask |= AC_ERR_DEV; 864 ac_err_mask |= AC_ERR_DEV;
864 if (port_status & (PDC_OVERRUN_ERR | PDC_UNDERRUN_ERR)) 865 if (port_status & (PDC_OVERRUN_ERR | PDC_UNDERRUN_ERR))
865 ac_err_mask |= AC_ERR_HSM; 866 ac_err_mask |= AC_ERR_OTHER;
866 if (port_status & (PDC2_ATA_HBA_ERR | PDC2_ATA_DMA_CNT_ERR)) 867 if (port_status & (PDC2_ATA_HBA_ERR | PDC2_ATA_DMA_CNT_ERR))
867 ac_err_mask |= AC_ERR_ATA_BUS; 868 ac_err_mask |= AC_ERR_ATA_BUS;
868 if (port_status & (PDC_PH_ERR | PDC_SH_ERR | PDC_DH_ERR | PDC2_HTO_ERR 869 if (port_status & (PDC_PH_ERR | PDC_SH_ERR | PDC_DH_ERR | PDC2_HTO_ERR
diff --git a/drivers/ata/sata_qstor.c b/drivers/ata/sata_qstor.c
index 326c0cfc29b3..92ba45e6689b 100644
--- a/drivers/ata/sata_qstor.c
+++ b/drivers/ata/sata_qstor.c
@@ -29,6 +29,7 @@
29 29
30#include <linux/kernel.h> 30#include <linux/kernel.h>
31#include <linux/module.h> 31#include <linux/module.h>
32#include <linux/gfp.h>
32#include <linux/pci.h> 33#include <linux/pci.h>
33#include <linux/init.h> 34#include <linux/init.h>
34#include <linux/blkdev.h> 35#include <linux/blkdev.h>
diff --git a/drivers/ata/sata_sil24.c b/drivers/ata/sata_sil24.c
index e6946fc527d0..433b6b89c795 100644
--- a/drivers/ata/sata_sil24.c
+++ b/drivers/ata/sata_sil24.c
@@ -19,6 +19,7 @@
19 19
20#include <linux/kernel.h> 20#include <linux/kernel.h>
21#include <linux/module.h> 21#include <linux/module.h>
22#include <linux/gfp.h>
22#include <linux/pci.h> 23#include <linux/pci.h>
23#include <linux/blkdev.h> 24#include <linux/blkdev.h>
24#include <linux/delay.h> 25#include <linux/delay.h>
@@ -417,6 +418,10 @@ static struct ata_port_operations sil24_ops = {
417#endif 418#endif
418}; 419};
419 420
421static int sata_sil24_msi; /* Disable MSI */
422module_param_named(msi, sata_sil24_msi, bool, S_IRUGO);
423MODULE_PARM_DESC(msi, "Enable MSI (Default: false)");
424
420/* 425/*
421 * Use bits 30-31 of port_flags to encode available port numbers. 426 * Use bits 30-31 of port_flags to encode available port numbers.
422 * Current maxium is 4. 427 * Current maxium is 4.
@@ -1340,6 +1345,11 @@ static int sil24_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1340 1345
1341 sil24_init_controller(host); 1346 sil24_init_controller(host);
1342 1347
1348 if (sata_sil24_msi && !pci_enable_msi(pdev)) {
1349 dev_printk(KERN_INFO, &pdev->dev, "Using MSI\n");
1350 pci_intx(pdev, 0);
1351 }
1352
1343 pci_set_master(pdev); 1353 pci_set_master(pdev);
1344 return ata_host_activate(host, pdev->irq, sil24_interrupt, IRQF_SHARED, 1354 return ata_host_activate(host, pdev->irq, sil24_interrupt, IRQF_SHARED,
1345 &sil24_sht); 1355 &sil24_sht);
diff --git a/drivers/ata/sata_sx4.c b/drivers/ata/sata_sx4.c
index bbcf970068ad..232468f2ea90 100644
--- a/drivers/ata/sata_sx4.c
+++ b/drivers/ata/sata_sx4.c
@@ -81,6 +81,7 @@
81#include <linux/kernel.h> 81#include <linux/kernel.h>
82#include <linux/module.h> 82#include <linux/module.h>
83#include <linux/pci.h> 83#include <linux/pci.h>
84#include <linux/slab.h>
84#include <linux/init.h> 85#include <linux/init.h>
85#include <linux/blkdev.h> 86#include <linux/blkdev.h>
86#include <linux/delay.h> 87#include <linux/delay.h>
diff --git a/drivers/ata/sata_uli.c b/drivers/ata/sata_uli.c
index e5bff47e8aa1..011e098590d1 100644
--- a/drivers/ata/sata_uli.c
+++ b/drivers/ata/sata_uli.c
@@ -26,6 +26,7 @@
26 26
27#include <linux/kernel.h> 27#include <linux/kernel.h>
28#include <linux/module.h> 28#include <linux/module.h>
29#include <linux/gfp.h>
29#include <linux/pci.h> 30#include <linux/pci.h>
30#include <linux/init.h> 31#include <linux/init.h>
31#include <linux/blkdev.h> 32#include <linux/blkdev.h>
diff --git a/drivers/ata/sata_via.c b/drivers/ata/sata_via.c
index 02efd9a83d26..08f65492cc81 100644
--- a/drivers/ata/sata_via.c
+++ b/drivers/ata/sata_via.c
@@ -40,11 +40,13 @@
40#include <linux/blkdev.h> 40#include <linux/blkdev.h>
41#include <linux/delay.h> 41#include <linux/delay.h>
42#include <linux/device.h> 42#include <linux/device.h>
43#include <scsi/scsi.h>
44#include <scsi/scsi_cmnd.h>
43#include <scsi/scsi_host.h> 45#include <scsi/scsi_host.h>
44#include <linux/libata.h> 46#include <linux/libata.h>
45 47
46#define DRV_NAME "sata_via" 48#define DRV_NAME "sata_via"
47#define DRV_VERSION "2.4" 49#define DRV_VERSION "2.6"
48 50
49/* 51/*
50 * vt8251 is different from other sata controllers of VIA. It has two 52 * vt8251 is different from other sata controllers of VIA. It has two
@@ -80,6 +82,7 @@ static int vt8251_scr_write(struct ata_link *link, unsigned int scr, u32 val);
80static void svia_tf_load(struct ata_port *ap, const struct ata_taskfile *tf); 82static void svia_tf_load(struct ata_port *ap, const struct ata_taskfile *tf);
81static void svia_noop_freeze(struct ata_port *ap); 83static void svia_noop_freeze(struct ata_port *ap);
82static int vt6420_prereset(struct ata_link *link, unsigned long deadline); 84static int vt6420_prereset(struct ata_link *link, unsigned long deadline);
85static void vt6420_bmdma_start(struct ata_queued_cmd *qc);
83static int vt6421_pata_cable_detect(struct ata_port *ap); 86static int vt6421_pata_cable_detect(struct ata_port *ap);
84static void vt6421_set_pio_mode(struct ata_port *ap, struct ata_device *adev); 87static void vt6421_set_pio_mode(struct ata_port *ap, struct ata_device *adev);
85static void vt6421_set_dma_mode(struct ata_port *ap, struct ata_device *adev); 88static void vt6421_set_dma_mode(struct ata_port *ap, struct ata_device *adev);
@@ -121,6 +124,7 @@ static struct ata_port_operations vt6420_sata_ops = {
121 .inherits = &svia_base_ops, 124 .inherits = &svia_base_ops,
122 .freeze = svia_noop_freeze, 125 .freeze = svia_noop_freeze,
123 .prereset = vt6420_prereset, 126 .prereset = vt6420_prereset,
127 .bmdma_start = vt6420_bmdma_start,
124}; 128};
125 129
126static struct ata_port_operations vt6421_pata_ops = { 130static struct ata_port_operations vt6421_pata_ops = {
@@ -377,6 +381,17 @@ static int vt6420_prereset(struct ata_link *link, unsigned long deadline)
377 return 0; 381 return 0;
378} 382}
379 383
384static void vt6420_bmdma_start(struct ata_queued_cmd *qc)
385{
386 struct ata_port *ap = qc->ap;
387 if ((qc->tf.command == ATA_CMD_PACKET) &&
388 (qc->scsicmd->sc_data_direction == DMA_TO_DEVICE)) {
389 /* Prevents corruption on some ATAPI burners */
390 ata_sff_pause(ap);
391 }
392 ata_bmdma_start(qc);
393}
394
380static int vt6421_pata_cable_detect(struct ata_port *ap) 395static int vt6421_pata_cable_detect(struct ata_port *ap)
381{ 396{
382 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 397 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
@@ -392,14 +407,16 @@ static void vt6421_set_pio_mode(struct ata_port *ap, struct ata_device *adev)
392{ 407{
393 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 408 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
394 static const u8 pio_bits[] = { 0xA8, 0x65, 0x65, 0x31, 0x20 }; 409 static const u8 pio_bits[] = { 0xA8, 0x65, 0x65, 0x31, 0x20 };
395 pci_write_config_byte(pdev, PATA_PIO_TIMING, pio_bits[adev->pio_mode - XFER_PIO_0]); 410 pci_write_config_byte(pdev, PATA_PIO_TIMING - adev->devno,
411 pio_bits[adev->pio_mode - XFER_PIO_0]);
396} 412}
397 413
398static void vt6421_set_dma_mode(struct ata_port *ap, struct ata_device *adev) 414static void vt6421_set_dma_mode(struct ata_port *ap, struct ata_device *adev)
399{ 415{
400 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 416 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
401 static const u8 udma_bits[] = { 0xEE, 0xE8, 0xE6, 0xE4, 0xE2, 0xE1, 0xE0, 0xE0 }; 417 static const u8 udma_bits[] = { 0xEE, 0xE8, 0xE6, 0xE4, 0xE2, 0xE1, 0xE0, 0xE0 };
402 pci_write_config_byte(pdev, PATA_UDMA_TIMING, udma_bits[adev->dma_mode - XFER_UDMA_0]); 418 pci_write_config_byte(pdev, PATA_UDMA_TIMING - adev->devno,
419 udma_bits[adev->dma_mode - XFER_UDMA_0]);
403} 420}
404 421
405static const unsigned int svia_bar_sizes[] = { 422static const unsigned int svia_bar_sizes[] = {
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-14 21:22:21 -0400