6 files changed, 41 insertions, 186 deletions

diff --git a/arch/arm/mach-clps711x/include/mach/autcpu12.h b/arch/arm/mach-clps711x/include/mach/autcpu12.h
index 1588a365f610..0452f5f3f034 100644
--- a/arch/arm/mach-clps711x/include/mach/autcpu12.h
+++ b/arch/arm/mach-clps711x/include/mach/autcpu12.h
@@ -21,24 +21,15 @@
 #define __ASM_ARCH_AUTCPU12_H
 
 /*
- * The CS8900A ethernet chip has its I/O registers wired to chip select 2
- * (nCS2). This is the mapping for it.
- */
-#define AUTCPU12_PHYS_CS8900A           CS2_PHYS_BASE           /* physical */
-#define AUTCPU12_VIRT_CS8900A           (0xfe000000)            /* virtual */
-
-/*
  * The flash bank is wired to chip select 0
  */
 #define AUTCPU12_PHYS_FLASH             CS0_PHYS_BASE           /* physical */
 
 /* offset for device specific information structure */
 #define AUTCPU12_LCDINFO_OFFS           (0x00010000)    
-/*
-* Videomemory is the internal SRAM (CS 6)       
-*/
+
+/* Videomemory in the internal SRAM (CS 6) */
 #define AUTCPU12_PHYS_VIDEO             CS6_PHYS_BASE
-#define AUTCPU12_VIRT_VIDEO             (0xfd000000)
 
 /*
 * All special IO's are tied to CS1
@@ -49,8 +40,6 @@
 
 #define AUTCPU12_PHYS_CSAUX1            CS1_PHYS_BASE +0x04000000  /* physical */
 
-#define AUTCPU12_PHYS_SMC               CS1_PHYS_BASE +0x06000000  /* physical */
-
 #define AUTCPU12_PHYS_CAN               CS1_PHYS_BASE +0x08000000  /* physical */
 
 #define AUTCPU12_PHYS_TOUCH             CS1_PHYS_BASE +0x0A000000  /* physical */
@@ -59,14 +48,6 @@
 
 #define AUTCPU12_PHYS_LPT               CS1_PHYS_BASE +0x0E000000  /* physical */
 
-/* 
-* defines for smartmedia card access 
-*/
-#define AUTCPU12_SMC_RDY                (1<<2)
-#define AUTCPU12_SMC_ALE                (1<<3)
-#define AUTCPU12_SMC_CLE                (1<<4)
-#define AUTCPU12_SMC_PORT_OFFSET        PBDR
-#define AUTCPU12_SMC_SELECT_OFFSET      0x10
 /*
 * defines for lcd contrast 
 */
diff --git a/arch/arm/mach-clps711x/include/mach/clps711x.h b/arch/arm/mach-clps711x/include/mach/clps711x.h
index c82e21ca49c7..01d1b9559710 100644
--- a/arch/arm/mach-clps711x/include/mach/clps711x.h
+++ b/arch/arm/mach-clps711x/include/mach/clps711x.h
@@ -257,6 +257,9 @@
 #define MEMCFG_BUS_WIDTH_16     (0)
 #define MEMCFG_BUS_WIDTH_8      (3)
 
+#define MEMCFG_SQAEN            (1 << 6)
+#define MEMCFG_CLKENB           (1 << 7)
+
 #define MEMCFG_WAITSTATE_8_3    (0 << 2)
 #define MEMCFG_WAITSTATE_7_3    (1 << 2)
 #define MEMCFG_WAITSTATE_6_3    (2 << 2)
@@ -274,4 +277,28 @@
 #define MEMCFG_WAITSTATE_2_0    (14 << 2)
 #define MEMCFG_WAITSTATE_1_0    (15 << 2)
 
+/* INTSR1 Interrupts */
+#define IRQ_CSINT               (4)
+#define IRQ_EINT1               (5)
+#define IRQ_EINT2               (6)
+#define IRQ_EINT3               (7)
+#define IRQ_TC1OI               (8)
+#define IRQ_TC2OI               (9)
+#define IRQ_RTCMI               (10)
+#define IRQ_TINT                (11)
+#define IRQ_UTXINT1             (12)
+#define IRQ_URXINT1             (13)
+#define IRQ_UMSINT              (14)
+#define IRQ_SSEOTI              (15)
+
+/* INTSR2 Interrupts */
+#define IRQ_KBDINT              (16 + 0)
+#define IRQ_SS2RX               (16 + 1)
+#define IRQ_SS2TX               (16 + 2)
+#define IRQ_UTXINT2             (16 + 12)
+#define IRQ_URXINT2             (16 + 13)
+
+/* INTSR3 Interrupts */
+#define IRQ_DAIINT              (32 + 0)
+
 #endif /* __MACH_CLPS711X_H */
diff --git a/arch/arm/mach-clps711x/include/mach/entry-macro.S b/arch/arm/mach-clps711x/include/mach/entry-macro.S
deleted file mode 100644
index 56e5c2c23504..000000000000
--- a/arch/arm/mach-clps711x/include/mach/entry-macro.S
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * arch/arm/mach-clps711x/include/mach/entry-macro.S
- *
- * Low-level IRQ helper macros for CLPS711X-based platforms
- *
- * This file is licensed under  the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-#include <mach/hardware.h>
-
-                .macro  get_irqnr_preamble, base, tmp
-                .endm
-
-#if (INTSR2 - INTSR1) != (INTMR2 - INTMR1)
-#error INTSR stride != INTMR stride
-#endif
-
-                .macro  get_irqnr_and_base, irqnr, stat, base, mask
-                mov     \base, #CLPS711X_VIRT_BASE
-                ldr     \stat, [\base, #INTSR1]
-                ldr     \mask, [\base, #INTMR1]
-                mov     \irqnr, #4
-                mov     \mask, \mask, lsl #16
-                and     \stat, \stat, \mask, lsr #16
-                movs    \stat, \stat, lsr #4
-                bne     1001f
-
-                add     \base, \base, #INTSR2 - INTSR1
-                ldr     \stat, [\base, #INTSR1]
-                ldr     \mask, [\base, #INTMR1]
-                mov     \irqnr, #16
-                mov     \mask, \mask, lsl #16
-                and     \stat, \stat, \mask, lsr #16
-
-1001:           tst     \stat, #255
-                addeq   \irqnr, \irqnr, #8
-                moveq   \stat, \stat, lsr #8
-                tst     \stat, #15
-                addeq   \irqnr, \irqnr, #4
-                moveq   \stat, \stat, lsr #4
-                tst     \stat, #3
-                addeq   \irqnr, \irqnr, #2
-                moveq   \stat, \stat, lsr #2
-                tst     \stat, #1
-                addeq   \irqnr, \irqnr, #1
-                moveq   \stat, \stat, lsr #1
-                tst     \stat, #1                       @ bit 0 should be set
-                .endm
-
-
diff --git a/arch/arm/mach-clps711x/include/mach/hardware.h b/arch/arm/mach-clps711x/include/mach/hardware.h
index 8497775d6ee5..2f23dd5d73e4 100644
--- a/arch/arm/mach-clps711x/include/mach/hardware.h
+++ b/arch/arm/mach-clps711x/include/mach/hardware.h
@@ -24,7 +24,10 @@
 
 #include <mach/clps711x.h>
 
-#define CLPS711X_VIRT_BASE      IOMEM(0xff000000)
+#define IO_ADDRESS(x)           (0xdc000000 + (((x) & 0x03ffffff) | \
+                                (((x) >> 2) & 0x3c000000)))
+
+#define CLPS711X_VIRT_BASE      IOMEM(IO_ADDRESS(CLPS711X_PHYS_BASE))
 
 #ifndef __ASSEMBLY__
 #define clps_readb(off)         readb(CLPS711X_VIRT_BASE + (off))
@@ -61,67 +64,17 @@
 #define CS7_PHYS_BASE           (0x00000000)
 #endif
 
-#define SYSPLD_VIRT_BASE        0xfe000000
-#define SYSPLD_BASE             SYSPLD_VIRT_BASE
-
-#if defined (CONFIG_ARCH_CDB89712)
-
-#define ETHER_START      0x20000000
-#define ETHER_SIZE       0x1000
-#define ETHER_BASE       0xfe000000
-
-#endif
+#define CLPS711X_SRAM_BASE      CS6_PHYS_BASE
+#define CLPS711X_SRAM_SIZE      (48 * 1024)
 
+#define CLPS711X_SDRAM0_BASE    (0xc0000000)
+#define CLPS711X_SDRAM1_BASE    (0xd0000000)
 
 #if defined (CONFIG_ARCH_EDB7211)
 
-/*
- * The extra 8 lines of the keyboard matrix are wired to chip select 3 (nCS3) 
- * and repeat across it. This is the mapping for it.
- *
- * In jumpered boot mode, nCS3 is mapped to 0x4000000, not 0x3000000. This 
- * was cause for much consternation and headscratching. This should probably
- * be made a compile/run time kernel option.
- */
-#define EP7211_PHYS_EXTKBD              CS3_PHYS_BASE   /* physical */
-
-#define EP7211_VIRT_EXTKBD              (0xfd000000)    /* virtual */
-
-
-/*
- * The CS8900A ethernet chip has its I/O registers wired to chip select 2 
- * (nCS2). This is the mapping for it.
- *
- * In jumpered boot mode, nCS2 is mapped to 0x5000000, not 0x2000000. This 
- * was cause for much consternation and headscratching. This should probably
- * be made a compile/run time kernel option.
- */
-#define EP7211_PHYS_CS8900A             CS2_PHYS_BASE   /* physical */
-
-#define EP7211_VIRT_CS8900A             (0xfc000000)    /* virtual */
-
-
-/*
- * The two flash banks are wired to chip selects 0 and 1. This is the mapping
- * for them.
- *
- * nCS0 and nCS1 are at 0x70000000 and 0x60000000, respectively, when running
- * in jumpered boot mode.
- */
-#define EP7211_PHYS_FLASH1              CS0_PHYS_BASE   /* physical */
-#define EP7211_PHYS_FLASH2              CS1_PHYS_BASE   /* physical */
-
-#define EP7211_VIRT_FLASH1              (0xfa000000)    /* virtual */
-#define EP7211_VIRT_FLASH2              (0xfb000000)    /* virtual */
+/* The extra 8 lines of the keyboard matrix are wired to chip select 3 */
+#define EP7211_PHYS_EXTKBD      CS3_PHYS_BASE
 
 #endif /* CONFIG_ARCH_EDB7211 */
 
-/*
- * Relevant bits in port D, which controls power to the various parts of
- * the LCD on the EDB7211.
- */
-#define EDB_PD1_LCD_DC_DC_EN    (1<<1)
-#define EDB_PD2_LCDEN           (1<<2)
-#define EDB_PD3_LCDBL           (1<<3)
-
 #endif
diff --git a/arch/arm/mach-clps711x/include/mach/irqs.h b/arch/arm/mach-clps711x/include/mach/irqs.h
deleted file mode 100644
index 14d215f8ca81..000000000000
--- a/arch/arm/mach-clps711x/include/mach/irqs.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- *  arch/arm/mach-clps711x/include/mach/irqs.h
- *
- *  Copyright (C) 2000 Deep Blue Solutions Ltd.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-
-/*
- * Interrupts from INTSR1
- */
-#define IRQ_CSINT                       4
-#define IRQ_EINT1                       5
-#define IRQ_EINT2                       6
-#define IRQ_EINT3                       7
-#define IRQ_TC1OI                       8
-#define IRQ_TC2OI                       9
-#define IRQ_RTCMI                       10
-#define IRQ_TINT                        11
-#define IRQ_UTXINT1                     12
-#define IRQ_URXINT1                     13
-#define IRQ_UMSINT                      14
-#define IRQ_SSEOTI                      15
-
-#define INT1_IRQS                       (0x0000fff0)
-
-/*
- * Interrupts from INTSR2
- */
-#define IRQ_KBDINT                      (16+0)  /* bit 0 */
-#define IRQ_SS2RX                       (16+1)  /* bit 1 */
-#define IRQ_SS2TX                       (16+2)  /* bit 2 */
-#define IRQ_UTXINT2                     (16+12) /* bit 12 */
-#define IRQ_URXINT2                     (16+13) /* bit 13 */
-
-#define INT2_IRQS                       (0x30070000)
-
-#define NR_IRQS                         30
diff --git a/arch/arm/mach-clps711x/include/mach/syspld.h b/arch/arm/mach-clps711x/include/mach/syspld.h
index f7f4c1201898..9a433155bf58 100644
--- a/arch/arm/mach-clps711x/include/mach/syspld.h
+++ b/arch/arm/mach-clps711x/include/mach/syspld.h
@@ -23,14 +23,9 @@
 #define __ASM_ARCH_SYSPLD_H
 
 #define SYSPLD_PHYS_BASE        (0x10000000)
+#define SYSPLD_VIRT_BASE        IO_ADDRESS(SYSPLD_PHYS_BASE)
 
-#ifndef __ASSEMBLY__
-#include <asm/types.h>
-
-#define SYSPLD_REG(type,off)    (*(volatile type *)(SYSPLD_BASE + off))
-#else
-#define SYSPLD_REG(type,off)    (off)
-#endif
+#define SYSPLD_REG(type, off)   (*(volatile type *)(SYSPLD_VIRT_BASE + (off)))
 
 #define PLD_INT         SYSPLD_REG(u32, 0x000000)
 #define PLD_INT_PENIRQ          (1 << 5)