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Diffstat (limited to 'arch/arm/mach-clps711x/include/mach/clps711x.h')
-rw-r--r--arch/arm/mach-clps711x/include/mach/clps711x.h27
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm/mach-clps711x/include/mach/clps711x.h b/arch/arm/mach-clps711x/include/mach/clps711x.h
index c82e21ca49c7..01d1b9559710 100644
--- a/arch/arm/mach-clps711x/include/mach/clps711x.h
+++ b/arch/arm/mach-clps711x/include/mach/clps711x.h
@@ -257,6 +257,9 @@
257#define MEMCFG_BUS_WIDTH_16 (0) 257#define MEMCFG_BUS_WIDTH_16 (0)
258#define MEMCFG_BUS_WIDTH_8 (3) 258#define MEMCFG_BUS_WIDTH_8 (3)
259 259
260#define MEMCFG_SQAEN (1 << 6)
261#define MEMCFG_CLKENB (1 << 7)
262
260#define MEMCFG_WAITSTATE_8_3 (0 << 2) 263#define MEMCFG_WAITSTATE_8_3 (0 << 2)
261#define MEMCFG_WAITSTATE_7_3 (1 << 2) 264#define MEMCFG_WAITSTATE_7_3 (1 << 2)
262#define MEMCFG_WAITSTATE_6_3 (2 << 2) 265#define MEMCFG_WAITSTATE_6_3 (2 << 2)
@@ -274,4 +277,28 @@
274#define MEMCFG_WAITSTATE_2_0 (14 << 2) 277#define MEMCFG_WAITSTATE_2_0 (14 << 2)
275#define MEMCFG_WAITSTATE_1_0 (15 << 2) 278#define MEMCFG_WAITSTATE_1_0 (15 << 2)
276 279
280/* INTSR1 Interrupts */
281#define IRQ_CSINT (4)
282#define IRQ_EINT1 (5)
283#define IRQ_EINT2 (6)
284#define IRQ_EINT3 (7)
285#define IRQ_TC1OI (8)
286#define IRQ_TC2OI (9)
287#define IRQ_RTCMI (10)
288#define IRQ_TINT (11)
289#define IRQ_UTXINT1 (12)
290#define IRQ_URXINT1 (13)
291#define IRQ_UMSINT (14)
292#define IRQ_SSEOTI (15)
293
294/* INTSR2 Interrupts */
295#define IRQ_KBDINT (16 + 0)
296#define IRQ_SS2RX (16 + 1)
297#define IRQ_SS2TX (16 + 2)
298#define IRQ_UTXINT2 (16 + 12)
299#define IRQ_URXINT2 (16 + 13)
300
301/* INTSR3 Interrupts */
302#define IRQ_DAIINT (32 + 0)
303
277#endif /* __MACH_CLPS711X_H */ 304#endif /* __MACH_CLPS711X_H */