Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC specific changes from Arnd Bergmann:
 "These changes are all to SoC-specific code, a total of 33 branches on
  17 platforms were pulled into this.  Like last time, Renesas sh-mobile
  is now the platform with the most changes, followed by OMAP and
  EXYNOS.

  Two new platforms, TI Keystone and Rockchips RK3xxx are added in this
  branch, both containing almost no platform specific code at all, since
  they are using generic subsystem interfaces for clocks, pinctrl,
  interrupts etc.  The device drivers are getting merged through the
  respective subsystem maintainer trees.

  One more SoC (u300) is now multiplatform capable and several others
  (shmobile, exynos, msm, integrator, kirkwood, clps711x) are moving
  towards that goal with this series but need more work.

  Also noteworthy is the work on PCI here, which is traditionally part
  of the SoC specific code.  With the changes done by Thomas Petazzoni,
  we can now more easily have PCI host controller drivers as loadable
  modules and keep them separate from the platform code in
  drivers/pci/host.  This has already led to the discovery that three
  platforms (exynos, spear and imx) are actually using an identical PCIe
  host controller and will be able to share a driver once support for
  spear and imx is added."

* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (480 commits)
  ARM: integrator: let pciv3 use mem/premem from device tree
  ARM: integrator: set local side PCI addresses right
  ARM: dts: Add pcie controller node for exynos5440-ssdk5440
  ARM: dts: Add pcie controller node for Samsung EXYNOS5440 SoC
  ARM: EXYNOS: Enable PCIe support for Exynos5440
  pci: Add PCIe driver for Samsung Exynos
  ARM: OMAP5: voltagedomain data: remove temporary OMAP4 voltage data
  ARM: keystone: Move CPU bringup code to dedicated asm file
  ARM: multiplatform: always pick one CPU type
  ARM: imx: select syscon for IMX6SL
  ARM: keystone: select ARM_ERRATA_798181 only for SMP
  ARM: imx: Synertronixx scb9328 needs to select SOC_IMX1
  ARM: OMAP2+: AM43x: resolve SMP related build error
  dmaengine: edma: enable build for AM33XX
  ARM: edma: Add EDMA crossbar event mux support
  ARM: edma: Add DT and runtime PM support to the private EDMA API
  dmaengine: edma: Add TI EDMA device tree binding
  arm: add basic support for Rockchip RK3066a boards
  arm: add debug uarts for rockchip rk29xx and rk3xxx series
  arm: Add basic clocks for Rockchip rk3066a SoCs
  ...

12 files changed, 383 insertions, 50 deletions

diff --git a/include/linux/arm-cci.h b/include/linux/arm-cci.h
new file mode 100644
index 000000000000..79d6edf446d5
--- /dev/null
+++ b/include/linux/arm-cci.h
@@ -0,0 +1,61 @@
+/*
+ * CCI cache coherent interconnect support
+ *
+ * Copyright (C) 2013 ARM Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __LINUX_ARM_CCI_H
+#define __LINUX_ARM_CCI_H
+
+#include <linux/errno.h>
+#include <linux/types.h>
+
+struct device_node;
+
+#ifdef CONFIG_ARM_CCI
+extern bool cci_probed(void);
+extern int cci_ace_get_port(struct device_node *dn);
+extern int cci_disable_port_by_cpu(u64 mpidr);
+extern int __cci_control_port_by_device(struct device_node *dn, bool enable);
+extern int __cci_control_port_by_index(u32 port, bool enable);
+#else
+static inline bool cci_probed(void) { return false; }
+static inline int cci_ace_get_port(struct device_node *dn)
+{
+        return -ENODEV;
+}
+static inline int cci_disable_port_by_cpu(u64 mpidr) { return -ENODEV; }
+static inline int __cci_control_port_by_device(struct device_node *dn,
+                                               bool enable)
+{
+        return -ENODEV;
+}
+static inline int __cci_control_port_by_index(u32 port, bool enable)
+{
+        return -ENODEV;
+}
+#endif
+#define cci_disable_port_by_device(dev) \
+        __cci_control_port_by_device(dev, false)
+#define cci_enable_port_by_device(dev) \
+        __cci_control_port_by_device(dev, true)
+#define cci_disable_port_by_index(dev) \
+        __cci_control_port_by_index(dev, false)
+#define cci_enable_port_by_index(dev) \
+        __cci_control_port_by_index(dev, true)
+
+#endif
diff --git a/include/linux/clk/mvebu.h b/include/linux/clk/mvebu.h
deleted file mode 100644
index 8c4ae713b063..000000000000
--- a/include/linux/clk/mvebu.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-
-#ifndef __CLK_MVEBU_H_
-#define __CLK_MVEBU_H_
-
-void __init mvebu_clocks_init(void);
-
-#endif
diff --git a/include/linux/clk/zynq.h b/include/linux/clk/zynq.h
index 56be7cd9aa8b..e062d317ccce 100644
--- a/include/linux/clk/zynq.h
+++ b/include/linux/clk/zynq.h
@@ -1,4 +1,5 @@
 /*
+ * Copyright (C) 2013 Xilinx Inc.
  * Copyright (C) 2012 National Instruments
  *
  * This program is free software; you can redistribute it and/or modify
@@ -19,6 +20,11 @@
 #ifndef __LINUX_CLK_ZYNQ_H_
 #define __LINUX_CLK_ZYNQ_H_
 
-void __init xilinx_zynq_clocks_init(void __iomem *slcr);
+#include <linux/spinlock.h>
 
+void zynq_clock_init(void __iomem *slcr);
+
+struct clk *clk_register_zynq_pll(const char *name, const char *parent,
+                void __iomem *pll_ctrl, void __iomem *pll_status, u8 lock_index,
+                spinlock_t *lock);
 #endif
diff --git a/include/linux/dw_apb_timer.h b/include/linux/dw_apb_timer.h
index dd755ce2a5eb..07261d52a6df 100644
--- a/include/linux/dw_apb_timer.h
+++ b/include/linux/dw_apb_timer.h
@@ -53,5 +53,4 @@ void dw_apb_clocksource_start(struct dw_apb_clocksource *dw_cs);
 cycle_t dw_apb_clocksource_read(struct dw_apb_clocksource *dw_cs);
 void dw_apb_clocksource_unregister(struct dw_apb_clocksource *dw_cs);
 
-extern void dw_apb_timer_init(void);
 #endif /* __DW_APB_TIMER_H__ */
diff --git a/include/linux/mfd/davinci_voicecodec.h b/include/linux/mfd/davinci_voicecodec.h
index 0ab61320ffa8..7dd6524d2aac 100644
--- a/include/linux/mfd/davinci_voicecodec.h
+++ b/include/linux/mfd/davinci_voicecodec.h
@@ -26,8 +26,7 @@
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
 #include <linux/mfd/core.h>
-
-#include <mach/edma.h>
+#include <linux/platform_data/edma.h>
 
 /*
  * Register values.
diff --git a/include/linux/mfd/syscon/clps711x.h b/include/linux/mfd/syscon/clps711x.h
new file mode 100644
index 000000000000..26355abae515
--- /dev/null
+++ b/include/linux/mfd/syscon/clps711x.h
@@ -0,0 +1,94 @@
+/*
+ *  CLPS711X system register bits definitions
+ *
+ *  Copyright (C) 2013 Alexander Shiyan <shc_work@mail.ru>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef _LINUX_MFD_SYSCON_CLPS711X_H_
+#define _LINUX_MFD_SYSCON_CLPS711X_H_
+
+#define SYSCON_OFFSET           (0x00)
+#define SYSFLG_OFFSET           (0x40)
+
+#define SYSCON1_KBDSCAN(x)      ((x) & 15)
+#define SYSCON1_KBDSCAN_MASK    (15)
+#define SYSCON1_TC1M            (1 << 4)
+#define SYSCON1_TC1S            (1 << 5)
+#define SYSCON1_TC2M            (1 << 6)
+#define SYSCON1_TC2S            (1 << 7)
+#define SYSCON1_BZTOG           (1 << 9)
+#define SYSCON1_BZMOD           (1 << 10)
+#define SYSCON1_DBGEN           (1 << 11)
+#define SYSCON1_LCDEN           (1 << 12)
+#define SYSCON1_CDENTX          (1 << 13)
+#define SYSCON1_CDENRX          (1 << 14)
+#define SYSCON1_SIREN           (1 << 15)
+#define SYSCON1_ADCKSEL(x)      (((x) & 3) << 16)
+#define SYSCON1_ADCKSEL_MASK    (3 << 16)
+#define SYSCON1_EXCKEN          (1 << 18)
+#define SYSCON1_WAKEDIS         (1 << 19)
+#define SYSCON1_IRTXM           (1 << 20)
+
+#define SYSCON2_SERSEL          (1 << 0)
+#define SYSCON2_KBD6            (1 << 1)
+#define SYSCON2_DRAMZ           (1 << 2)
+#define SYSCON2_KBWEN           (1 << 3)
+#define SYSCON2_SS2TXEN         (1 << 4)
+#define SYSCON2_PCCARD1         (1 << 5)
+#define SYSCON2_PCCARD2         (1 << 6)
+#define SYSCON2_SS2RXEN         (1 << 7)
+#define SYSCON2_SS2MAEN         (1 << 9)
+#define SYSCON2_OSTB            (1 << 12)
+#define SYSCON2_CLKENSL         (1 << 13)
+#define SYSCON2_BUZFREQ         (1 << 14)
+
+#define SYSCON3_ADCCON          (1 << 0)
+#define SYSCON3_CLKCTL0         (1 << 1)
+#define SYSCON3_CLKCTL1         (1 << 2)
+#define SYSCON3_DAISEL          (1 << 3)
+#define SYSCON3_ADCCKNSEN       (1 << 4)
+#define SYSCON3_VERSN(x)        (((x) >> 5) & 7)
+#define SYSCON3_VERSN_MASK      (7 << 5)
+#define SYSCON3_FASTWAKE        (1 << 8)
+#define SYSCON3_DAIEN           (1 << 9)
+#define SYSCON3_128FS           SYSCON3_DAIEN
+#define SYSCON3_ENPD67          (1 << 10)
+
+#define SYSCON_UARTEN           (1 << 8)
+
+#define SYSFLG1_MCDR            (1 << 0)
+#define SYSFLG1_DCDET           (1 << 1)
+#define SYSFLG1_WUDR            (1 << 2)
+#define SYSFLG1_WUON            (1 << 3)
+#define SYSFLG1_CTS             (1 << 8)
+#define SYSFLG1_DSR             (1 << 9)
+#define SYSFLG1_DCD             (1 << 10)
+#define SYSFLG1_NBFLG           (1 << 12)
+#define SYSFLG1_RSTFLG          (1 << 13)
+#define SYSFLG1_PFFLG           (1 << 14)
+#define SYSFLG1_CLDFLG          (1 << 15)
+#define SYSFLG1_CRXFE           (1 << 24)
+#define SYSFLG1_CTXFF           (1 << 25)
+#define SYSFLG1_SSIBUSY         (1 << 26)
+#define SYSFLG1_ID              (1 << 29)
+#define SYSFLG1_VERID(x)        (((x) >> 30) & 3)
+#define SYSFLG1_VERID_MASK      (3 << 30)
+
+#define SYSFLG2_SSRXOF          (1 << 0)
+#define SYSFLG2_RESVAL          (1 << 1)
+#define SYSFLG2_RESFRM          (1 << 2)
+#define SYSFLG2_SS2RXFE         (1 << 3)
+#define SYSFLG2_SS2TXFF         (1 << 4)
+#define SYSFLG2_SS2TXUF         (1 << 5)
+#define SYSFLG2_CKMODE          (1 << 6)
+
+#define SYSFLG_UBUSY            (1 << 11)
+#define SYSFLG_URXFE            (1 << 22)
+#define SYSFLG_UTXFF            (1 << 23)
+
+#endif
diff --git a/include/linux/platform_data/edma.h b/include/linux/platform_data/edma.h
new file mode 100644
index 000000000000..57300fd7cc03
--- /dev/null
+++ b/include/linux/platform_data/edma.h
@@ -0,0 +1,183 @@
+/*
+ *  TI EDMA definitions
+ *
+ *  Copyright (C) 2006-2013 Texas Instruments.
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ */
+
+/*
+ * This EDMA3 programming framework exposes two basic kinds of resource:
+ *
+ *  Channel     Triggers transfers, usually from a hardware event but
+ *              also manually or by "chaining" from DMA completions.
+ *              Each channel is coupled to a Parameter RAM (PaRAM) slot.
+ *
+ *  Slot        Each PaRAM slot holds a DMA transfer descriptor (PaRAM
+ *              "set"), source and destination addresses, a link to a
+ *              next PaRAM slot (if any), options for the transfer, and
+ *              instructions for updating those addresses.  There are
+ *              more than twice as many slots as event channels.
+ *
+ * Each PaRAM set describes a sequence of transfers, either for one large
+ * buffer or for several discontiguous smaller buffers.  An EDMA transfer
+ * is driven only from a channel, which performs the transfers specified
+ * in its PaRAM slot until there are no more transfers.  When that last
+ * transfer completes, the "link" field may be used to reload the channel's
+ * PaRAM slot with a new transfer descriptor.
+ *
+ * The EDMA Channel Controller (CC) maps requests from channels into physical
+ * Transfer Controller (TC) requests when the channel triggers (by hardware
+ * or software events, or by chaining).  The two physical DMA channels provided
+ * by the TCs are thus shared by many logical channels.
+ *
+ * DaVinci hardware also has a "QDMA" mechanism which is not currently
+ * supported through this interface.  (DSP firmware uses it though.)
+ */
+
+#ifndef EDMA_H_
+#define EDMA_H_
+
+/* PaRAM slots are laid out like this */
+struct edmacc_param {
+        unsigned int opt;
+        unsigned int src;
+        unsigned int a_b_cnt;
+        unsigned int dst;
+        unsigned int src_dst_bidx;
+        unsigned int link_bcntrld;
+        unsigned int src_dst_cidx;
+        unsigned int ccnt;
+};
+
+/* fields in edmacc_param.opt */
+#define SAM             BIT(0)
+#define DAM             BIT(1)
+#define SYNCDIM         BIT(2)
+#define STATIC          BIT(3)
+#define EDMA_FWID       (0x07 << 8)
+#define TCCMODE         BIT(11)
+#define EDMA_TCC(t)     ((t) << 12)
+#define TCINTEN         BIT(20)
+#define ITCINTEN        BIT(21)
+#define TCCHEN          BIT(22)
+#define ITCCHEN         BIT(23)
+
+/*ch_status paramater of callback function possible values*/
+#define DMA_COMPLETE 1
+#define DMA_CC_ERROR 2
+#define DMA_TC1_ERROR 3
+#define DMA_TC2_ERROR 4
+
+enum address_mode {
+        INCR = 0,
+        FIFO = 1
+};
+
+enum fifo_width {
+        W8BIT = 0,
+        W16BIT = 1,
+        W32BIT = 2,
+        W64BIT = 3,
+        W128BIT = 4,
+        W256BIT = 5
+};
+
+enum dma_event_q {
+        EVENTQ_0 = 0,
+        EVENTQ_1 = 1,
+        EVENTQ_2 = 2,
+        EVENTQ_3 = 3,
+        EVENTQ_DEFAULT = -1
+};
+
+enum sync_dimension {
+        ASYNC = 0,
+        ABSYNC = 1
+};
+
+#define EDMA_CTLR_CHAN(ctlr, chan)      (((ctlr) << 16) | (chan))
+#define EDMA_CTLR(i)                    ((i) >> 16)
+#define EDMA_CHAN_SLOT(i)               ((i) & 0xffff)
+
+#define EDMA_CHANNEL_ANY                -1      /* for edma_alloc_channel() */
+#define EDMA_SLOT_ANY                   -1      /* for edma_alloc_slot() */
+#define EDMA_CONT_PARAMS_ANY             1001
+#define EDMA_CONT_PARAMS_FIXED_EXACT     1002
+#define EDMA_CONT_PARAMS_FIXED_NOT_EXACT 1003
+
+#define EDMA_MAX_CC               2
+
+/* alloc/free DMA channels and their dedicated parameter RAM slots */
+int edma_alloc_channel(int channel,
+        void (*callback)(unsigned channel, u16 ch_status, void *data),
+        void *data, enum dma_event_q);
+void edma_free_channel(unsigned channel);
+
+/* alloc/free parameter RAM slots */
+int edma_alloc_slot(unsigned ctlr, int slot);
+void edma_free_slot(unsigned slot);
+
+/* alloc/free a set of contiguous parameter RAM slots */
+int edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count);
+int edma_free_cont_slots(unsigned slot, int count);
+
+/* calls that operate on part of a parameter RAM slot */
+void edma_set_src(unsigned slot, dma_addr_t src_port,
+                                enum address_mode mode, enum fifo_width);
+void edma_set_dest(unsigned slot, dma_addr_t dest_port,
+                                 enum address_mode mode, enum fifo_width);
+void edma_get_position(unsigned slot, dma_addr_t *src, dma_addr_t *dst);
+void edma_set_src_index(unsigned slot, s16 src_bidx, s16 src_cidx);
+void edma_set_dest_index(unsigned slot, s16 dest_bidx, s16 dest_cidx);
+void edma_set_transfer_params(unsigned slot, u16 acnt, u16 bcnt, u16 ccnt,
+                u16 bcnt_rld, enum sync_dimension sync_mode);
+void edma_link(unsigned from, unsigned to);
+void edma_unlink(unsigned from);
+
+/* calls that operate on an entire parameter RAM slot */
+void edma_write_slot(unsigned slot, const struct edmacc_param *params);
+void edma_read_slot(unsigned slot, struct edmacc_param *params);
+
+/* channel control operations */
+int edma_start(unsigned channel);
+void edma_stop(unsigned channel);
+void edma_clean_channel(unsigned channel);
+void edma_clear_event(unsigned channel);
+void edma_pause(unsigned channel);
+void edma_resume(unsigned channel);
+
+struct edma_rsv_info {
+
+        const s16       (*rsv_chans)[2];
+        const s16       (*rsv_slots)[2];
+};
+
+/* platform_data for EDMA driver */
+struct edma_soc_info {
+
+        /* how many dma resources of each type */
+        unsigned        n_channel;
+        unsigned        n_region;
+        unsigned        n_slot;
+        unsigned        n_tc;
+        unsigned        n_cc;
+        /*
+         * Default queue is expected to be a low-priority queue.
+         * This way, long transfers on the default queue started
+         * by the codec engine will not cause audio defects.
+         */
+        enum dma_event_q        default_queue;
+
+        /* Resource reservation for other cores */
+        struct edma_rsv_info    *rsv;
+
+        s8      (*queue_tc_mapping)[2];
+        s8      (*queue_priority_mapping)[2];
+        const s16       (*xbar_chans)[2];
+};
+
+#endif
diff --git a/include/linux/platform_data/gpio-rcar.h b/include/linux/platform_data/gpio-rcar.h
index b253f77a7ddf..2d8d69432813 100644
--- a/include/linux/platform_data/gpio-rcar.h
+++ b/include/linux/platform_data/gpio-rcar.h
@@ -17,10 +17,13 @@
 #define __GPIO_RCAR_H__
 
 struct gpio_rcar_config {
-        unsigned int gpio_base;
+        int gpio_base;
         unsigned int irq_base;
         unsigned int number_of_pins;
         const char *pctl_name;
+        unsigned has_both_edge_trigger:1;
 };
 
+#define RCAR_GP_PIN(bank, pin)          (((bank) * 32) + (pin))
+
 #endif /* __GPIO_RCAR_H__ */
diff --git a/include/linux/platform_data/pinctrl-coh901.h b/include/linux/platform_data/pinctrl-coh901.h
deleted file mode 100644
index dfbc65d10484..000000000000
--- a/include/linux/platform_data/pinctrl-coh901.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * Copyright (C) 2007-2012 ST-Ericsson AB
- * License terms: GNU General Public License (GPL) version 2
- * GPIO block resgister definitions and inline macros for
- * U300 GPIO COH 901 335 or COH 901 571/3
- * Author: Linus Walleij <linus.walleij@stericsson.com>
- */
-
-#ifndef __MACH_U300_GPIO_U300_H
-#define __MACH_U300_GPIO_U300_H
-
-/**
- * struct u300_gpio_platform - U300 GPIO platform data
- * @ports: number of GPIO block ports
- * @gpio_base: first GPIO number for this block (use a free range)
- */
-struct u300_gpio_platform {
-        u8 ports;
-        int gpio_base;
-};
-
-#endif /* __MACH_U300_GPIO_U300_H */
diff --git a/include/linux/platform_data/spi-davinci.h b/include/linux/platform_data/spi-davinci.h
index 7af305b37868..8dc2fa47a2aa 100644
--- a/include/linux/platform_data/spi-davinci.h
+++ b/include/linux/platform_data/spi-davinci.h
@@ -19,7 +19,7 @@
 #ifndef __ARCH_ARM_DAVINCI_SPI_H
 #define __ARCH_ARM_DAVINCI_SPI_H
 
-#include <mach/edma.h>
+#include <linux/platform_data/edma.h>
 
 #define SPI_INTERN_CS   0xFF
 
diff --git a/include/linux/platform_data/usb-rcar-phy.h b/include/linux/platform_data/usb-rcar-phy.h
new file mode 100644
index 000000000000..8ec6964a32a5
--- /dev/null
+++ b/include/linux/platform_data/usb-rcar-phy.h
@@ -0,0 +1,28 @@
+/*
+ * Copyright (C) 2013 Renesas Solutions Corp.
+ * Copyright (C) 2013 Cogent Embedded, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __USB_RCAR_PHY_H
+#define __USB_RCAR_PHY_H
+
+#include <linux/types.h>
+
+struct rcar_phy_platform_data {
+        bool ferrite_bead:1;    /* (R8A7778 only)                       */
+
+        bool port1_func:1;      /* true: port 1 used by function, false: host */
+        unsigned penc1:1;       /* Output of the PENC1 pin in function mode */
+        struct {                /* Overcurrent pin control for ports 0..2 */
+                bool select_3_3v:1; /* true: USB_OVCn pin, false: OVCn pin */
+                                /* Set to false on port 1 in function mode */
+                bool active_high:1; /* true: active  high, false: active low */
+                                /* Set to true  on port 1 in function mode */
+        } ovc_pin[3];           /* (R8A7778 only has 2 ports)           */
+};
+
+#endif /* __USB_RCAR_PHY_H */
diff --git a/include/linux/usb/ehci_pdriver.h b/include/linux/usb/ehci_pdriver.h
index 99238b096f7e..7eb4dcd0d386 100644
--- a/include/linux/usb/ehci_pdriver.h
+++ b/include/linux/usb/ehci_pdriver.h
@@ -19,6 +19,9 @@
 #ifndef __USB_CORE_EHCI_PDRIVER_H
 #define __USB_CORE_EHCI_PDRIVER_H
 
+struct platform_device;
+struct usb_hcd;
+
 /**
  * struct usb_ehci_pdata - platform_data for generic ehci driver
  *
@@ -50,6 +53,7 @@ struct usb_ehci_pdata {
         /* Turn on only VBUS suspend power and hotplug detection,
          * turn off everything else */
         void (*power_suspend)(struct platform_device *pdev);
+        int (*pre_setup)(struct usb_hcd *hcd);
 };
 
 #endif /* __USB_CORE_EHCI_PDRIVER_H */