diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-07-02 16:43:38 -0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-07-02 16:43:38 -0400 |
| commit | 3883cbb6c1bda013a3ce2dbdab7dc97c52e4a232 (patch) | |
| tree | 5b69f83b049d24ac81123ac954ca8c9128e48443 /include/linux | |
| parent | d2033f2c1d1de2239ded15e478ddb4028f192a15 (diff) | |
| parent | 1eb92b24e243085d242cf5ffd64829bba70972e1 (diff) | |
Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC specific changes from Arnd Bergmann:
"These changes are all to SoC-specific code, a total of 33 branches on
17 platforms were pulled into this. Like last time, Renesas sh-mobile
is now the platform with the most changes, followed by OMAP and
EXYNOS.
Two new platforms, TI Keystone and Rockchips RK3xxx are added in this
branch, both containing almost no platform specific code at all, since
they are using generic subsystem interfaces for clocks, pinctrl,
interrupts etc. The device drivers are getting merged through the
respective subsystem maintainer trees.
One more SoC (u300) is now multiplatform capable and several others
(shmobile, exynos, msm, integrator, kirkwood, clps711x) are moving
towards that goal with this series but need more work.
Also noteworthy is the work on PCI here, which is traditionally part
of the SoC specific code. With the changes done by Thomas Petazzoni,
we can now more easily have PCI host controller drivers as loadable
modules and keep them separate from the platform code in
drivers/pci/host. This has already led to the discovery that three
platforms (exynos, spear and imx) are actually using an identical PCIe
host controller and will be able to share a driver once support for
spear and imx is added."
* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (480 commits)
ARM: integrator: let pciv3 use mem/premem from device tree
ARM: integrator: set local side PCI addresses right
ARM: dts: Add pcie controller node for exynos5440-ssdk5440
ARM: dts: Add pcie controller node for Samsung EXYNOS5440 SoC
ARM: EXYNOS: Enable PCIe support for Exynos5440
pci: Add PCIe driver for Samsung Exynos
ARM: OMAP5: voltagedomain data: remove temporary OMAP4 voltage data
ARM: keystone: Move CPU bringup code to dedicated asm file
ARM: multiplatform: always pick one CPU type
ARM: imx: select syscon for IMX6SL
ARM: keystone: select ARM_ERRATA_798181 only for SMP
ARM: imx: Synertronixx scb9328 needs to select SOC_IMX1
ARM: OMAP2+: AM43x: resolve SMP related build error
dmaengine: edma: enable build for AM33XX
ARM: edma: Add EDMA crossbar event mux support
ARM: edma: Add DT and runtime PM support to the private EDMA API
dmaengine: edma: Add TI EDMA device tree binding
arm: add basic support for Rockchip RK3066a boards
arm: add debug uarts for rockchip rk29xx and rk3xxx series
arm: Add basic clocks for Rockchip rk3066a SoCs
...
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/arm-cci.h | 61 | ||||
| -rw-r--r-- | include/linux/clk/mvebu.h | 22 | ||||
| -rw-r--r-- | include/linux/clk/zynq.h | 8 | ||||
| -rw-r--r-- | include/linux/dw_apb_timer.h | 1 | ||||
| -rw-r--r-- | include/linux/mfd/davinci_voicecodec.h | 3 | ||||
| -rw-r--r-- | include/linux/mfd/syscon/clps711x.h | 94 | ||||
| -rw-r--r-- | include/linux/platform_data/edma.h | 183 | ||||
| -rw-r--r-- | include/linux/platform_data/gpio-rcar.h | 5 | ||||
| -rw-r--r-- | include/linux/platform_data/pinctrl-coh901.h | 22 | ||||
| -rw-r--r-- | include/linux/platform_data/spi-davinci.h | 2 | ||||
| -rw-r--r-- | include/linux/platform_data/usb-rcar-phy.h | 28 | ||||
| -rw-r--r-- | include/linux/usb/ehci_pdriver.h | 4 |
12 files changed, 383 insertions, 50 deletions
diff --git a/include/linux/arm-cci.h b/include/linux/arm-cci.h new file mode 100644 index 000000000000..79d6edf446d5 --- /dev/null +++ b/include/linux/arm-cci.h | |||
| @@ -0,0 +1,61 @@ | |||
| 1 | /* | ||
| 2 | * CCI cache coherent interconnect support | ||
| 3 | * | ||
| 4 | * Copyright (C) 2013 ARM Ltd. | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License as published by | ||
| 8 | * the Free Software Foundation; either version 2 of the License, or | ||
| 9 | * (at your option) any later version. | ||
| 10 | * | ||
| 11 | * This program is distributed in the hope that it will be useful, | ||
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 14 | * GNU General Public License for more details. | ||
| 15 | * | ||
| 16 | * You should have received a copy of the GNU General Public License | ||
| 17 | * along with this program; if not, write to the Free Software | ||
| 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 19 | */ | ||
| 20 | |||
| 21 | #ifndef __LINUX_ARM_CCI_H | ||
| 22 | #define __LINUX_ARM_CCI_H | ||
| 23 | |||
| 24 | #include <linux/errno.h> | ||
| 25 | #include <linux/types.h> | ||
| 26 | |||
| 27 | struct device_node; | ||
| 28 | |||
| 29 | #ifdef CONFIG_ARM_CCI | ||
| 30 | extern bool cci_probed(void); | ||
| 31 | extern int cci_ace_get_port(struct device_node *dn); | ||
| 32 | extern int cci_disable_port_by_cpu(u64 mpidr); | ||
| 33 | extern int __cci_control_port_by_device(struct device_node *dn, bool enable); | ||
| 34 | extern int __cci_control_port_by_index(u32 port, bool enable); | ||
| 35 | #else | ||
| 36 | static inline bool cci_probed(void) { return false; } | ||
| 37 | static inline int cci_ace_get_port(struct device_node *dn) | ||
| 38 | { | ||
| 39 | return -ENODEV; | ||
| 40 | } | ||
| 41 | static inline int cci_disable_port_by_cpu(u64 mpidr) { return -ENODEV; } | ||
| 42 | static inline int __cci_control_port_by_device(struct device_node *dn, | ||
| 43 | bool enable) | ||
| 44 | { | ||
| 45 | return -ENODEV; | ||
| 46 | } | ||
| 47 | static inline int __cci_control_port_by_index(u32 port, bool enable) | ||
| 48 | { | ||
| 49 | return -ENODEV; | ||
| 50 | } | ||
| 51 | #endif | ||
| 52 | #define cci_disable_port_by_device(dev) \ | ||
| 53 | __cci_control_port_by_device(dev, false) | ||
| 54 | #define cci_enable_port_by_device(dev) \ | ||
| 55 | __cci_control_port_by_device(dev, true) | ||
| 56 | #define cci_disable_port_by_index(dev) \ | ||
| 57 | __cci_control_port_by_index(dev, false) | ||
| 58 | #define cci_enable_port_by_index(dev) \ | ||
| 59 | __cci_control_port_by_index(dev, true) | ||
| 60 | |||
| 61 | #endif | ||
diff --git a/include/linux/clk/mvebu.h b/include/linux/clk/mvebu.h deleted file mode 100644 index 8c4ae713b063..000000000000 --- a/include/linux/clk/mvebu.h +++ /dev/null | |||
| @@ -1,22 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * This program is free software; you can redistribute it and/or modify | ||
| 3 | * it under the terms of the GNU General Public License as published by | ||
| 4 | * the Free Software Foundation; either version 2 of the License, or | ||
| 5 | * (at your option) any later version. | ||
| 6 | * | ||
| 7 | * This program is distributed in the hope that it will be useful, | ||
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 10 | * GNU General Public License for more details. | ||
| 11 | * | ||
| 12 | * You should have received a copy of the GNU General Public License | ||
| 13 | * along with this program; if not, write to the Free Software | ||
| 14 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 15 | */ | ||
| 16 | |||
| 17 | #ifndef __CLK_MVEBU_H_ | ||
| 18 | #define __CLK_MVEBU_H_ | ||
| 19 | |||
| 20 | void __init mvebu_clocks_init(void); | ||
| 21 | |||
| 22 | #endif | ||
diff --git a/include/linux/clk/zynq.h b/include/linux/clk/zynq.h index 56be7cd9aa8b..e062d317ccce 100644 --- a/include/linux/clk/zynq.h +++ b/include/linux/clk/zynq.h | |||
| @@ -1,4 +1,5 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright (C) 2013 Xilinx Inc. | ||
| 2 | * Copyright (C) 2012 National Instruments | 3 | * Copyright (C) 2012 National Instruments |
| 3 | * | 4 | * |
| 4 | * This program is free software; you can redistribute it and/or modify | 5 | * This program is free software; you can redistribute it and/or modify |
| @@ -19,6 +20,11 @@ | |||
| 19 | #ifndef __LINUX_CLK_ZYNQ_H_ | 20 | #ifndef __LINUX_CLK_ZYNQ_H_ |
| 20 | #define __LINUX_CLK_ZYNQ_H_ | 21 | #define __LINUX_CLK_ZYNQ_H_ |
| 21 | 22 | ||
| 22 | void __init xilinx_zynq_clocks_init(void __iomem *slcr); | 23 | #include <linux/spinlock.h> |
| 23 | 24 | ||
| 25 | void zynq_clock_init(void __iomem *slcr); | ||
| 26 | |||
| 27 | struct clk *clk_register_zynq_pll(const char *name, const char *parent, | ||
| 28 | void __iomem *pll_ctrl, void __iomem *pll_status, u8 lock_index, | ||
| 29 | spinlock_t *lock); | ||
| 24 | #endif | 30 | #endif |
diff --git a/include/linux/dw_apb_timer.h b/include/linux/dw_apb_timer.h index dd755ce2a5eb..07261d52a6df 100644 --- a/include/linux/dw_apb_timer.h +++ b/include/linux/dw_apb_timer.h | |||
| @@ -53,5 +53,4 @@ void dw_apb_clocksource_start(struct dw_apb_clocksource *dw_cs); | |||
| 53 | cycle_t dw_apb_clocksource_read(struct dw_apb_clocksource *dw_cs); | 53 | cycle_t dw_apb_clocksource_read(struct dw_apb_clocksource *dw_cs); |
| 54 | void dw_apb_clocksource_unregister(struct dw_apb_clocksource *dw_cs); | 54 | void dw_apb_clocksource_unregister(struct dw_apb_clocksource *dw_cs); |
| 55 | 55 | ||
| 56 | extern void dw_apb_timer_init(void); | ||
| 57 | #endif /* __DW_APB_TIMER_H__ */ | 56 | #endif /* __DW_APB_TIMER_H__ */ |
diff --git a/include/linux/mfd/davinci_voicecodec.h b/include/linux/mfd/davinci_voicecodec.h index 0ab61320ffa8..7dd6524d2aac 100644 --- a/include/linux/mfd/davinci_voicecodec.h +++ b/include/linux/mfd/davinci_voicecodec.h | |||
| @@ -26,8 +26,7 @@ | |||
| 26 | #include <linux/kernel.h> | 26 | #include <linux/kernel.h> |
| 27 | #include <linux/platform_device.h> | 27 | #include <linux/platform_device.h> |
| 28 | #include <linux/mfd/core.h> | 28 | #include <linux/mfd/core.h> |
| 29 | 29 | #include <linux/platform_data/edma.h> | |
| 30 | #include <mach/edma.h> | ||
| 31 | 30 | ||
| 32 | /* | 31 | /* |
| 33 | * Register values. | 32 | * Register values. |
diff --git a/include/linux/mfd/syscon/clps711x.h b/include/linux/mfd/syscon/clps711x.h new file mode 100644 index 000000000000..26355abae515 --- /dev/null +++ b/include/linux/mfd/syscon/clps711x.h | |||
| @@ -0,0 +1,94 @@ | |||
| 1 | /* | ||
| 2 | * CLPS711X system register bits definitions | ||
| 3 | * | ||
| 4 | * Copyright (C) 2013 Alexander Shiyan <shc_work@mail.ru> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License as published by | ||
| 8 | * the Free Software Foundation; either version 2 of the License, or | ||
| 9 | * (at your option) any later version. | ||
| 10 | */ | ||
| 11 | |||
| 12 | #ifndef _LINUX_MFD_SYSCON_CLPS711X_H_ | ||
| 13 | #define _LINUX_MFD_SYSCON_CLPS711X_H_ | ||
| 14 | |||
| 15 | #define SYSCON_OFFSET (0x00) | ||
| 16 | #define SYSFLG_OFFSET (0x40) | ||
| 17 | |||
| 18 | #define SYSCON1_KBDSCAN(x) ((x) & 15) | ||
| 19 | #define SYSCON1_KBDSCAN_MASK (15) | ||
| 20 | #define SYSCON1_TC1M (1 << 4) | ||
| 21 | #define SYSCON1_TC1S (1 << 5) | ||
| 22 | #define SYSCON1_TC2M (1 << 6) | ||
| 23 | #define SYSCON1_TC2S (1 << 7) | ||
| 24 | #define SYSCON1_BZTOG (1 << 9) | ||
| 25 | #define SYSCON1_BZMOD (1 << 10) | ||
| 26 | #define SYSCON1_DBGEN (1 << 11) | ||
| 27 | #define SYSCON1_LCDEN (1 << 12) | ||
| 28 | #define SYSCON1_CDENTX (1 << 13) | ||
| 29 | #define SYSCON1_CDENRX (1 << 14) | ||
| 30 | |||
