Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC specific changes from Arnd Bergmann:
 "These changes are all to SoC-specific code, a total of 33 branches on
  17 platforms were pulled into this.  Like last time, Renesas sh-mobile
  is now the platform with the most changes, followed by OMAP and
  EXYNOS.

  Two new platforms, TI Keystone and Rockchips RK3xxx are added in this
  branch, both containing almost no platform specific code at all, since
  they are using generic subsystem interfaces for clocks, pinctrl,
  interrupts etc.  The device drivers are getting merged through the
  respective subsystem maintainer trees.

  One more SoC (u300) is now multiplatform capable and several others
  (shmobile, exynos, msm, integrator, kirkwood, clps711x) are moving
  towards that goal with this series but need more work.

  Also noteworthy is the work on PCI here, which is traditionally part
  of the SoC specific code.  With the changes done by Thomas Petazzoni,
  we can now more easily have PCI host controller drivers as loadable
  modules and keep them separate from the platform code in
  drivers/pci/host.  This has already led to the discovery that three
  platforms (exynos, spear and imx) are actually using an identical PCIe
  host controller and will be able to share a driver once support for
  spear and imx is added."

* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (480 commits)
  ARM: integrator: let pciv3 use mem/premem from device tree
  ARM: integrator: set local side PCI addresses right
  ARM: dts: Add pcie controller node for exynos5440-ssdk5440
  ARM: dts: Add pcie controller node for Samsung EXYNOS5440 SoC
  ARM: EXYNOS: Enable PCIe support for Exynos5440
  pci: Add PCIe driver for Samsung Exynos
  ARM: OMAP5: voltagedomain data: remove temporary OMAP4 voltage data
  ARM: keystone: Move CPU bringup code to dedicated asm file
  ARM: multiplatform: always pick one CPU type
  ARM: imx: select syscon for IMX6SL
  ARM: keystone: select ARM_ERRATA_798181 only for SMP
  ARM: imx: Synertronixx scb9328 needs to select SOC_IMX1
  ARM: OMAP2+: AM43x: resolve SMP related build error
  dmaengine: edma: enable build for AM33XX
  ARM: edma: Add EDMA crossbar event mux support
  ARM: edma: Add DT and runtime PM support to the private EDMA API
  dmaengine: edma: Add TI EDMA device tree binding
  arm: add basic support for Rockchip RK3066a boards
  arm: add debug uarts for rockchip rk29xx and rk3xxx series
  arm: Add basic clocks for Rockchip rk3066a SoCs
  ...

14 files changed, 694 insertions, 50 deletions

diff --git a/include/dt-bindings/clock/imx6sl-clock.h b/include/dt-bindings/clock/imx6sl-clock.h
new file mode 100644
index 000000000000..7fcdf90879f2
--- /dev/null
+++ b/include/dt-bindings/clock/imx6sl-clock.h
@@ -0,0 +1,148 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_IMX6SL_H
+#define __DT_BINDINGS_CLOCK_IMX6SL_H
+
+#define IMX6SL_CLK_DUMMY                0
+#define IMX6SL_CLK_CKIL                 1
+#define IMX6SL_CLK_OSC                  2
+#define IMX6SL_CLK_PLL1_SYS             3
+#define IMX6SL_CLK_PLL2_BUS             4
+#define IMX6SL_CLK_PLL3_USB_OTG         5
+#define IMX6SL_CLK_PLL4_AUDIO           6
+#define IMX6SL_CLK_PLL5_VIDEO           7
+#define IMX6SL_CLK_PLL6_ENET            8
+#define IMX6SL_CLK_PLL7_USB_HOST        9
+#define IMX6SL_CLK_USBPHY1              10
+#define IMX6SL_CLK_USBPHY2              11
+#define IMX6SL_CLK_USBPHY1_GATE         12
+#define IMX6SL_CLK_USBPHY2_GATE         13
+#define IMX6SL_CLK_PLL4_POST_DIV        14
+#define IMX6SL_CLK_PLL5_POST_DIV        15
+#define IMX6SL_CLK_PLL5_VIDEO_DIV       16
+#define IMX6SL_CLK_ENET_REF             17
+#define IMX6SL_CLK_PLL2_PFD0            18
+#define IMX6SL_CLK_PLL2_PFD1            19
+#define IMX6SL_CLK_PLL2_PFD2            20
+#define IMX6SL_CLK_PLL3_PFD0            21
+#define IMX6SL_CLK_PLL3_PFD1            22
+#define IMX6SL_CLK_PLL3_PFD2            23
+#define IMX6SL_CLK_PLL3_PFD3            24
+#define IMX6SL_CLK_PLL2_198M            25
+#define IMX6SL_CLK_PLL3_120M            26
+#define IMX6SL_CLK_PLL3_80M             27
+#define IMX6SL_CLK_PLL3_60M             28
+#define IMX6SL_CLK_STEP                 29
+#define IMX6SL_CLK_PLL1_SW              30
+#define IMX6SL_CLK_OCRAM_ALT_SEL        31
+#define IMX6SL_CLK_OCRAM_SEL            32
+#define IMX6SL_CLK_PRE_PERIPH2_SEL      33
+#define IMX6SL_CLK_PRE_PERIPH_SEL       34
+#define IMX6SL_CLK_PERIPH2_CLK2_SEL     35
+#define IMX6SL_CLK_PERIPH_CLK2_SEL      36
+#define IMX6SL_CLK_CSI_SEL              37
+#define IMX6SL_CLK_LCDIF_AXI_SEL        38
+#define IMX6SL_CLK_USDHC1_SEL           39
+#define IMX6SL_CLK_USDHC2_SEL           40
+#define IMX6SL_CLK_USDHC3_SEL           41
+#define IMX6SL_CLK_USDHC4_SEL           42
+#define IMX6SL_CLK_SSI1_SEL             43
+#define IMX6SL_CLK_SSI2_SEL             44
+#define IMX6SL_CLK_SSI3_SEL             45
+#define IMX6SL_CLK_PERCLK_SEL           46
+#define IMX6SL_CLK_PXP_AXI_SEL          47
+#define IMX6SL_CLK_EPDC_AXI_SEL         48
+#define IMX6SL_CLK_GPU2D_OVG_SEL        49
+#define IMX6SL_CLK_GPU2D_SEL            50
+#define IMX6SL_CLK_LCDIF_PIX_SEL        51
+#define IMX6SL_CLK_EPDC_PIX_SEL         52
+#define IMX6SL_CLK_SPDIF0_SEL           53
+#define IMX6SL_CLK_SPDIF1_SEL           54
+#define IMX6SL_CLK_EXTERN_AUDIO_SEL     55
+#define IMX6SL_CLK_ECSPI_SEL            56
+#define IMX6SL_CLK_UART_SEL             57
+#define IMX6SL_CLK_PERIPH               58
+#define IMX6SL_CLK_PERIPH2              59
+#define IMX6SL_CLK_OCRAM_PODF           60
+#define IMX6SL_CLK_PERIPH_CLK2_PODF     61
+#define IMX6SL_CLK_PERIPH2_CLK2_PODF    62
+#define IMX6SL_CLK_IPG                  63
+#define IMX6SL_CLK_CSI_PODF             64
+#define IMX6SL_CLK_LCDIF_AXI_PODF       65
+#define IMX6SL_CLK_USDHC1_PODF          66
+#define IMX6SL_CLK_USDHC2_PODF          67
+#define IMX6SL_CLK_USDHC3_PODF          68
+#define IMX6SL_CLK_USDHC4_PODF          69
+#define IMX6SL_CLK_SSI1_PRED            70
+#define IMX6SL_CLK_SSI1_PODF            71
+#define IMX6SL_CLK_SSI2_PRED            72
+#define IMX6SL_CLK_SSI2_PODF            73
+#define IMX6SL_CLK_SSI3_PRED            74
+#define IMX6SL_CLK_SSI3_PODF            75
+#define IMX6SL_CLK_PERCLK               76
+#define IMX6SL_CLK_PXP_AXI_PODF         77
+#define IMX6SL_CLK_EPDC_AXI_PODF        78
+#define IMX6SL_CLK_GPU2D_OVG_PODF       79
+#define IMX6SL_CLK_GPU2D_PODF           80
+#define IMX6SL_CLK_LCDIF_PIX_PRED       81
+#define IMX6SL_CLK_EPDC_PIX_PRED        82
+#define IMX6SL_CLK_LCDIF_PIX_PODF       83
+#define IMX6SL_CLK_EPDC_PIX_PODF        84
+#define IMX6SL_CLK_SPDIF0_PRED          85
+#define IMX6SL_CLK_SPDIF0_PODF          86
+#define IMX6SL_CLK_SPDIF1_PRED          87
+#define IMX6SL_CLK_SPDIF1_PODF          88
+#define IMX6SL_CLK_EXTERN_AUDIO_PRED    89
+#define IMX6SL_CLK_EXTERN_AUDIO_PODF    90
+#define IMX6SL_CLK_ECSPI_ROOT           91
+#define IMX6SL_CLK_UART_ROOT            92
+#define IMX6SL_CLK_AHB                  93
+#define IMX6SL_CLK_MMDC_ROOT            94
+#define IMX6SL_CLK_ARM                  95
+#define IMX6SL_CLK_ECSPI1               96
+#define IMX6SL_CLK_ECSPI2               97
+#define IMX6SL_CLK_ECSPI3               98
+#define IMX6SL_CLK_ECSPI4               99
+#define IMX6SL_CLK_EPIT1                100
+#define IMX6SL_CLK_EPIT2                101
+#define IMX6SL_CLK_EXTERN_AUDIO         102
+#define IMX6SL_CLK_GPT                  103
+#define IMX6SL_CLK_GPT_SERIAL           104
+#define IMX6SL_CLK_GPU2D_OVG            105
+#define IMX6SL_CLK_I2C1                 106
+#define IMX6SL_CLK_I2C2                 107
+#define IMX6SL_CLK_I2C3                 108
+#define IMX6SL_CLK_OCOTP                109
+#define IMX6SL_CLK_CSI                  110
+#define IMX6SL_CLK_PXP_AXI              111
+#define IMX6SL_CLK_EPDC_AXI             112
+#define IMX6SL_CLK_LCDIF_AXI            113
+#define IMX6SL_CLK_LCDIF_PIX            114
+#define IMX6SL_CLK_EPDC_PIX             115
+#define IMX6SL_CLK_OCRAM                116
+#define IMX6SL_CLK_PWM1                 117
+#define IMX6SL_CLK_PWM2                 118
+#define IMX6SL_CLK_PWM3                 119
+#define IMX6SL_CLK_PWM4                 120
+#define IMX6SL_CLK_SDMA                 121
+#define IMX6SL_CLK_SPDIF                122
+#define IMX6SL_CLK_SSI1                 123
+#define IMX6SL_CLK_SSI2                 124
+#define IMX6SL_CLK_SSI3                 125
+#define IMX6SL_CLK_UART                 126
+#define IMX6SL_CLK_UART_SERIAL          127
+#define IMX6SL_CLK_USBOH3               128
+#define IMX6SL_CLK_USDHC1               129
+#define IMX6SL_CLK_USDHC2               130
+#define IMX6SL_CLK_USDHC3               131
+#define IMX6SL_CLK_USDHC4               132
+#define IMX6SL_CLK_CLK_END              133
+
+#endif /* __DT_BINDINGS_CLOCK_IMX6SL_H */
diff --git a/include/dt-bindings/clock/vf610-clock.h b/include/dt-bindings/clock/vf610-clock.h
new file mode 100644
index 000000000000..15e997fa78f2
--- /dev/null
+++ b/include/dt-bindings/clock/vf610-clock.h
@@ -0,0 +1,163 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.