From 30e1e28598c2674c133148d8aec6d431d7acd314 Mon Sep 17 00:00:00 2001 From: Soren Brinkmann Date: Mon, 13 May 2013 10:46:38 -0700 Subject: arm: zynq: Migrate platform to clock controller Migrate the Zynq platform and its drivers to use the new clock controller driver. Signed-off-by: Soren Brinkmann Cc: John Stultz Cc: Thomas Gleixner Cc: Greg Kroah-Hartman Cc: Jiri Slaby Cc: linux-serial@vger.kernel.org Signed-off-by: Michal Simek Acked-by: Mike Turquette --- include/linux/clk/zynq.h | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'include/linux') diff --git a/include/linux/clk/zynq.h b/include/linux/clk/zynq.h index 56be7cd9aa8b..e062d317ccce 100644 --- a/include/linux/clk/zynq.h +++ b/include/linux/clk/zynq.h @@ -1,4 +1,5 @@ /* + * Copyright (C) 2013 Xilinx Inc. * Copyright (C) 2012 National Instruments * * This program is free software; you can redistribute it and/or modify @@ -19,6 +20,11 @@ #ifndef __LINUX_CLK_ZYNQ_H_ #define __LINUX_CLK_ZYNQ_H_ -void __init xilinx_zynq_clocks_init(void __iomem *slcr); +#include +void zynq_clock_init(void __iomem *slcr); + +struct clk *clk_register_zynq_pll(const char *name, const char *parent, + void __iomem *pll_ctrl, void __iomem *pll_status, u8 lock_index, + spinlock_t *lock); #endif -- cgit v1.2.2 From ea7e0bd7e78868bbe6df6834595ef96166dd296a Mon Sep 17 00:00:00 2001 From: Sebastian Hesselbarth Date: Tue, 28 May 2013 15:13:18 +0000 Subject: clk: mvebu: disintegrate obsolete file Switch from function-centric to soc-centric clock drivers now makes a bunch of files obsolete. This deletes all files and Kconfig options that are not required anymore. Signed-off-by: Sebastian Hesselbarth Acked-by: Mike Turquette Signed-off-by: Jason Cooper --- include/linux/clk/mvebu.h | 22 ---------------------- 1 file changed, 22 deletions(-) delete mode 100644 include/linux/clk/mvebu.h (limited to 'include/linux') diff --git a/include/linux/clk/mvebu.h b/include/linux/clk/mvebu.h deleted file mode 100644 index 8c4ae713b063..000000000000 --- a/include/linux/clk/mvebu.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __CLK_MVEBU_H_ -#define __CLK_MVEBU_H_ - -void __init mvebu_clocks_init(void); - -#endif -- cgit v1.2.2 From ed69bdd8fd9b2db68b915ce5f60fc51d4744a9b1 Mon Sep 17 00:00:00 2001 From: Lorenzo Pieralisi Date: Fri, 13 Jul 2012 15:55:52 +0100 Subject: drivers: bus: add ARM CCI support On ARM multi-cluster systems coherency between cores running on different clusters is managed by the cache-coherent interconnect (CCI). It allows broadcasting of TLB invalidates and memory barriers and it guarantees cache coherency at system level through snooping of slave interfaces connected to it. This patch enables the basic infrastructure required in Linux to handle and programme the CCI component. Non-local variables used by the CCI management functions called by power down function calls after disabling the cache must be flushed out to main memory in advance, otherwise incoherency of those values may occur if they are sitting in the cache of some other CPU when power down functions execute. Driver code ensures that relevant data structures are flushed from inner and outer caches after the driver probe is completed. CCI slave port resources are linked to set of CPUs through bus masters phandle properties that link the interface resources to masters node in the device tree. Documentation describing the CCI DT bindings is provided with the patch. Signed-off-by: Lorenzo Pieralisi Signed-off-by: Nicolas Pitre --- include/linux/arm-cci.h | 61 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 include/linux/arm-cci.h (limited to 'include/linux') diff --git a/include/linux/arm-cci.h b/include/linux/arm-cci.h new file mode 100644 index 000000000000..79d6edf446d5 --- /dev/null +++ b/include/linux/arm-cci.h @@ -0,0 +1,61 @@ +/* + * CCI cache coherent interconnect support + * + * Copyright (C) 2013 ARM Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef __LINUX_ARM_CCI_H +#define __LINUX_ARM_CCI_H + +#include +#include + +struct device_node; + +#ifdef CONFIG_ARM_CCI +extern bool cci_probed(void); +extern int cci_ace_get_port(struct device_node *dn); +extern int cci_disable_port_by_cpu(u64 mpidr); +extern int __cci_control_port_by_device(struct device_node *dn, bool enable); +extern int __cci_control_port_by_index(u32 port, bool enable); +#else +static inline bool cci_probed(void) { return false; } +static inline int cci_ace_get_port(struct device_node *dn) +{ + return -ENODEV; +} +static inline int cci_disable_port_by_cpu(u64 mpidr) { return -ENODEV; } +static inline int __cci_control_port_by_device(struct device_node *dn, + bool enable) +{ + return -ENODEV; +} +static inline int __cci_control_port_by_index(u32 port, bool enable) +{ + return -ENODEV; +} +#endif +#define cci_disable_port_by_device(dev) \ + __cci_control_port_by_device(dev, false) +#define cci_enable_port_by_device(dev) \ + __cci_control_port_by_device(dev, true) +#define cci_disable_port_by_index(dev) \ + __cci_control_port_by_index(dev, false) +#define cci_enable_port_by_index(dev) \ + __cci_control_port_by_index(dev, true) + +#endif -- cgit v1.2.2 From 36cb0066ffc55fd326c8a21ffe80aaa5bd16021b Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Fri, 10 May 2013 16:48:36 +0200 Subject: gpio-rcar: Make the platform data gpio_base field signed The gpio_base field is used to specify the desired GPIO base for the GPIO controller. The GPIO core can automatically allocate a GPIO number range when the base is set to -1. To make this possible, make the field signed. Signed-off-by: Laurent Pinchart Acked-by: Linus Walleij Signed-off-by: Simon Horman --- include/linux/platform_data/gpio-rcar.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/linux') diff --git a/include/linux/platform_data/gpio-rcar.h b/include/linux/platform_data/gpio-rcar.h index b253f77a7ddf..aba7079ccc95 100644 --- a/include/linux/platform_data/gpio-rcar.h +++ b/include/linux/platform_data/gpio-rcar.h @@ -17,7 +17,7 @@ #define __GPIO_RCAR_H__ struct gpio_rcar_config { - unsigned int gpio_base; + int gpio_base; unsigned int irq_base; unsigned int number_of_pins; const char *pctl_name; -- cgit v1.2.2 From 7e1092b5a264c484001b0cdd1f49bea7884e3366 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Fri, 24 May 2013 18:47:24 +0900 Subject: gpio-rcar: Add support for IRQ_TYPE_EDGE_BOTH As hardware support for this feature is not universal for all SoCs a flag, has_both_edge_trigger, has been added to the platform data of the driver to allow this feature to be enabled. The motivation for this is to allow use of the gpio-keys driver on the lager board which is based on the r8a7790 SoC. The V2 of this patch has been fully exercised using that driver on that board. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- include/linux/platform_data/gpio-rcar.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/linux') diff --git a/include/linux/platform_data/gpio-rcar.h b/include/linux/platform_data/gpio-rcar.h index aba7079ccc95..6c0027a3c370 100644 --- a/include/linux/platform_data/gpio-rcar.h +++ b/include/linux/platform_data/gpio-rcar.h @@ -21,6 +21,7 @@ struct gpio_rcar_config { unsigned int irq_base; unsigned int number_of_pins; const char *pctl_name; + unsigned has_both_edge_trigger:1; }; #endif /* __GPIO_RCAR_H__ */ -- cgit v1.2.2 From 11df28ab76cd9e98e3e0bbbff8648d0a02509507 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Mon, 8 Apr 2013 11:36:13 +0200 Subject: gpio-rcar: Add RCAR_GP_PIN macro Pins are numbered in the R-Car family documentation using a bank number and a pin number in the bank. As the Linux pin number space is linear, we need to flatten this by multiplying the bank number by 32 and adding the pin number. The resulting number bear no directly visible relationship to the documentation, making it error-prone. Add a RCAR_GP_PIN macro to convert from the documentation pin number space to the linear Linux space. Signed-off-by: Laurent Pinchart [horms+renesas@verge.net.au: non-trivial rebase on top of "sh-pfc: r8a7779: Don't group USB OVC and PENC pins"] Signed-off-by: Simon Horman --- include/linux/platform_data/gpio-rcar.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include/linux') diff --git a/include/linux/platform_data/gpio-rcar.h b/include/linux/platform_data/gpio-rcar.h index 6c0027a3c370..2d8d69432813 100644 --- a/include/linux/platform_data/gpio-rcar.h +++ b/include/linux/platform_data/gpio-rcar.h @@ -24,4 +24,6 @@ struct gpio_rcar_config { unsigned has_both_edge_trigger:1; }; +#define RCAR_GP_PIN(bank, pin) (((bank) * 32) + (pin)) + #endif /* __GPIO_RCAR_H__ */ -- cgit v1.2.2 From 743fcce0a89e04dc511b4ea40eba8e3f7cec92d4 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Sun, 2 Jun 2013 01:33:56 +0400 Subject: ehci-platform: add pre_setup() method to platform data Sometimes there is a need to initialize some non-standard registers mapped to the EHCI region before accessing the standard EHCI registers. Add pre_setup() method with 'struct usb_hcd *' parameter to be called just before ehci_setup() to the 'ehci-platform' driver's platform data for this purpose... While at it, add the missing incomplete declaration of 'struct platform_device' to ... The patch has been tested on the Marzen and BOCK-W boards. Suggested-by: Alan Stern Signed-off-by: Sergei Shtylyov Acked-by: Kuninori Morimoto Acked-by: Alan Stern Signed-off-by: Simon Horman --- include/linux/usb/ehci_pdriver.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include/linux') diff --git a/include/linux/usb/ehci_pdriver.h b/include/linux/usb/ehci_pdriver.h index 99238b096f7e..7eb4dcd0d386 100644 --- a/include/linux/usb/ehci_pdriver.h +++ b/include/linux/usb/ehci_pdriver.h @@ -19,6 +19,9 @@ #ifndef __USB_CORE_EHCI_PDRIVER_H #define __USB_CORE_EHCI_PDRIVER_H +struct platform_device; +struct usb_hcd; + /** * struct usb_ehci_pdata - platform_data for generic ehci driver * @@ -50,6 +53,7 @@ struct usb_ehci_pdata { /* Turn on only VBUS suspend power and hotplug detection, * turn off everything else */ void (*power_suspend)(struct platform_device *pdev); + int (*pre_setup)(struct usb_hcd *hcd); }; #endif /* __USB_CORE_EHCI_PDRIVER_H */ -- cgit v1.2.2 From 6a82e2a83e568dc121326b4bab24035ce7a2f50e Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Sun, 2 Jun 2013 01:52:28 +0400 Subject: phy-rcar-usb: add platform data Currently the driver hard-codes USBPCTRL0 register to 0. It is wrong since this register contains board-specific USB ports configuration and so its value should be somehow passed via the platform data. Add the global header file containing 'struct rcar_phy_platform_data' consisting of the various bit fields describing USB ports' pin configuration. Signed-off-by: Sergei Shtylyov Acked-by: Kuninori Morimoto Acked-by: Felipe Balbi Signed-off-by: Simon Horman --- include/linux/platform_data/usb-rcar-phy.h | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) create mode 100644 include/linux/platform_data/usb-rcar-phy.h (limited to 'include/linux') diff --git a/include/linux/platform_data/usb-rcar-phy.h b/include/linux/platform_data/usb-rcar-phy.h new file mode 100644 index 000000000000..c49f35ab14c7 --- /dev/null +++ b/include/linux/platform_data/usb-rcar-phy.h @@ -0,0 +1,26 @@ +/* + * Copyright (C) 2013 Renesas Solutions Corp. + * Copyright (C) 2013 Cogent Embedded, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __USB_RCAR_PHY_H +#define __USB_RCAR_PHY_H + +#include + +struct rcar_phy_platform_data { + bool port1_func:1; /* true: port 1 used by function, false: host */ + unsigned penc1:1; /* Output of the PENC1 pin in function mode */ + struct { /* Overcurrent pin control for ports 0..2 */ + bool select_3_3v:1; /* true: USB_OVCn pin, false: OVCn pin */ + /* Set to false on port 1 in function mode */ + bool active_high:1; /* true: active high, false: active low */ + /* Set to true on port 1 in function mode */ + } ovc_pin[3]; +}; + +#endif /* __USB_RCAR_PHY_H */ -- cgit v1.2.2 From 54407f190c8d542572a9547ba5460d811810b6e4 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Sun, 9 Jun 2013 00:34:36 +0400 Subject: phy-rcar-usb: add R8A7778 support The driver currently only supports R8A7779 SoC. Compared to it, R8A7778 USB-PHY has extra register range containing two high-speed signal quality characteristic control registers which should be set up during USB-PHY startup depending on whether a ferrite bead is in use or not. So, we now handle an optional second memory range in the driver's probe method, add the 'ferrite_bead' field to the driver's platform data, and add an extra (optional) step to the USB-PHY startup routine which sets up the extended registers. Also mark in the driver's Kconfig section that R8A7778 is now supported and generally clarify that section, uppercasing the word "phy" and also changing the module name that got lost in the big driver rename, while at it... The patch has been tested on the Marzen and BOCK-W boards. Signed-off-by: Sergei Shtylyov Acked-by: Felipe Balbi Signed-off-by: Simon Horman --- include/linux/platform_data/usb-rcar-phy.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'include/linux') diff --git a/include/linux/platform_data/usb-rcar-phy.h b/include/linux/platform_data/usb-rcar-phy.h index c49f35ab14c7..8ec6964a32a5 100644 --- a/include/linux/platform_data/usb-rcar-phy.h +++ b/include/linux/platform_data/usb-rcar-phy.h @@ -13,6 +13,8 @@ #include struct rcar_phy_platform_data { + bool ferrite_bead:1; /* (R8A7778 only) */ + bool port1_func:1; /* true: port 1 used by function, false: host */ unsigned penc1:1; /* Output of the PENC1 pin in function mode */ struct { /* Overcurrent pin control for ports 0..2 */ @@ -20,7 +22,7 @@ struct rcar_phy_platform_data { /* Set to false on port 1 in function mode */ bool active_high:1; /* true: active high, false: active low */ /* Set to true on port 1 in function mode */ - } ovc_pin[3]; + } ovc_pin[3]; /* (R8A7778 only has 2 ports) */ }; #endif /* __USB_RCAR_PHY_H */ -- cgit v1.2.2 From 6597619f9c85a0782d427d6723c96cf768e99086 Mon Sep 17 00:00:00 2001 From: Alexander Shiyan Date: Mon, 13 May 2013 21:07:36 +0400 Subject: ARM: clps711x: Add support for SYSCON driver This patch adds support for SYSCON driver for CLPS711X targets. At this time there are no users for this driver, but it is will be used as start point to use in CLPS711X drivers and remove dependencies. Signed-off-by: Alexander Shiyan Signed-off-by: Olof Johansson --- include/linux/mfd/syscon/clps711x.h | 94 +++++++++++++++++++++++++++++++++++++ 1 file changed, 94 insertions(+) create mode 100644 include/linux/mfd/syscon/clps711x.h (limited to 'include/linux') diff --git a/include/linux/mfd/syscon/clps711x.h b/include/linux/mfd/syscon/clps711x.h new file mode 100644 index 000000000000..26355abae515 --- /dev/null +++ b/include/linux/mfd/syscon/clps711x.h @@ -0,0 +1,94 @@ +/* + * CLPS711X system register bits definitions + * + * Copyright (C) 2013 Alexander Shiyan + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef _LINUX_MFD_SYSCON_CLPS711X_H_ +#define _LINUX_MFD_SYSCON_CLPS711X_H_ + +#define SYSCON_OFFSET (0x00) +#define SYSFLG_OFFSET (0x40) + +#define SYSCON1_KBDSCAN(x) ((x) & 15) +#define SYSCON1_KBDSCAN_MASK (15) +#define SYSCON1_TC1M (1 << 4) +#define SYSCON1_TC1S (1 << 5) +#define SYSCON1_TC2M (1 << 6) +#define SYSCON1_TC2S (1 << 7) +#define SYSCON1_BZTOG (1 << 9) +#define SYSCON1_BZMOD (1 << 10) +#define SYSCON1_DBGEN (1 << 11) +#define SYSCON1_LCDEN (1 << 12) +#define SYSCON1_CDENTX (1 << 13) +#define SYSCON1_CDENRX (1 << 14) +#define SYSCON1_SIREN (1 << 15) +#define SYSCON1_ADCKSEL(x) (((x) & 3) << 16) +#define SYSCON1_ADCKSEL_MASK (3 << 16) +#define SYSCON1_EXCKEN (1 << 18) +#define SYSCON1_WAKEDIS (1 << 19) +#define SYSCON1_IRTXM (1 << 20) + +#define SYSCON2_SERSEL (1 << 0) +#define SYSCON2_KBD6 (1 << 1) +#define SYSCON2_DRAMZ (1 << 2) +#define SYSCON2_KBWEN (1 << 3) +#define SYSCON2_SS2TXEN (1 << 4) +#define SYSCON2_PCCARD1 (1 << 5) +#define SYSCON2_PCCARD2 (1 << 6) +#define SYSCON2_SS2RXEN (1 << 7) +#define SYSCON2_SS2MAEN (1 << 9) +#define SYSCON2_OSTB (1 << 12) +#define SYSCON2_CLKENSL (1 << 13) +#define SYSCON2_BUZFREQ (1 << 14) + +#define SYSCON3_ADCCON (1 << 0) +#define SYSCON3_CLKCTL0 (1 << 1) +#define SYSCON3_CLKCTL1 (1 << 2) +#define SYSCON3_DAISEL (1 << 3) +#define SYSCON3_ADCCKNSEN (1 << 4) +#define SYSCON3_VERSN(x) (((x) >> 5) & 7) +#define SYSCON3_VERSN_MASK (7 << 5) +#define SYSCON3_FASTWAKE (1 << 8) +#define SYSCON3_DAIEN (1 << 9) +#define SYSCON3_128FS SYSCON3_DAIEN +#define SYSCON3_ENPD67 (1 << 10) + +#define SYSCON_UARTEN (1 << 8) + +#define SYSFLG1_MCDR (1 << 0) +#define SYSFLG1_DCDET (1 << 1) +#define SYSFLG1_WUDR (1 << 2) +#define SYSFLG1_WUON (1 << 3) +#define SYSFLG1_CTS (1 << 8) +#define SYSFLG1_DSR (1 << 9) +#define SYSFLG1_DCD (1 << 10) +#define SYSFLG1_NBFLG (1 << 12) +#define SYSFLG1_RSTFLG (1 << 13) +#define SYSFLG1_PFFLG (1 << 14) +#define SYSFLG1_CLDFLG (1 << 15) +#define SYSFLG1_CRXFE (1 << 24) +#define SYSFLG1_CTXFF (1 << 25) +#define SYSFLG1_SSIBUSY (1 << 26) +#define SYSFLG1_ID (1 << 29) +#define SYSFLG1_VERID(x) (((x) >> 30) & 3) +#define SYSFLG1_VERID_MASK (3 << 30) + +#define SYSFLG2_SSRXOF (1 << 0) +#define SYSFLG2_RESVAL (1 << 1) +#define SYSFLG2_RESFRM (1 << 2) +#define SYSFLG2_SS2RXFE (1 << 3) +#define SYSFLG2_SS2TXFF (1 << 4) +#define SYSFLG2_SS2TXUF (1 << 5) +#define SYSFLG2_CKMODE (1 << 6) + +#define SYSFLG_UBUSY (1 << 11) +#define SYSFLG_URXFE (1 << 22) +#define SYSFLG_UTXFF (1 << 23) + +#endif -- cgit v1.2.2 From 10021488997317d1121505a7ac659124c058efed Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Tue, 4 Jun 2013 11:38:42 +0200 Subject: clocksource: dw_apb_timer_of: use clocksource_of_init dw_apb_timer_init used to search the devicetree for matching timer devices, making calls to it from board files necessary. Change the dw_apb_timer_init to work with CLOCKSOURCE_OF_DECLARE. With this change the function gets called once for each timer node and tracks these number of calls to attach clockevent and clocksource devices to the nodes. Also remove the calls to dw_apb_timer_init from all previous users, as clocksource_of_init is the default for init_time now. Tested on the upcoming rk3066 code. Signed-off-by: Heiko Stuebner Acked-by: Rob Herring Acked-by: Arnd Bergmann Acked-by: Jamie Iles Acked-by: Dinh Nguyen --- include/linux/dw_apb_timer.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include/linux') diff --git a/include/linux/dw_apb_timer.h b/include/linux/dw_apb_timer.h index dd755ce2a5eb..07261d52a6df 100644 --- a/include/linux/dw_apb_timer.h +++ b/include/linux/dw_apb_timer.h @@ -53,5 +53,4 @@ void dw_apb_clocksource_start(struct dw_apb_clocksource *dw_cs); cycle_t dw_apb_clocksource_read(struct dw_apb_clocksource *dw_cs); void dw_apb_clocksource_unregister(struct dw_apb_clocksource *dw_cs); -extern void dw_apb_timer_init(void); #endif /* __DW_APB_TIMER_H__ */ -- cgit v1.2.2 From b263e9b88746c6902c36d35a2dd83c119f8510a2 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Thu, 23 May 2013 20:09:43 +0200 Subject: pinctrl: get rid of all platform data for coh901 This deletes the dependency on any platform data for the COH901 pin controller. There is only one user in the kernel, and if we at some point want to support more variants, they shall provide their variant info through the device tree. Signed-off-by: Linus Walleij --- include/linux/platform_data/pinctrl-coh901.h | 22 ---------------------- 1 file changed, 22 deletions(-) delete mode 100644 include/linux/platform_data/pinctrl-coh901.h (limited to 'include/linux') diff --git a/include/linux/platform_data/pinctrl-coh901.h b/include/linux/platform_data/pinctrl-coh901.h deleted file mode 100644 index dfbc65d10484..000000000000 --- a/include/linux/platform_data/pinctrl-coh901.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Copyright (C) 2007-2012 ST-Ericsson AB - * License terms: GNU General Public License (GPL) version 2 - * GPIO block resgister definitions and inline macros for - * U300 GPIO COH 901 335 or COH 901 571/3 - * Author: Linus Walleij - */ - -#ifndef __MACH_U300_GPIO_U300_H -#define __MACH_U300_GPIO_U300_H - -/** - * struct u300_gpio_platform - U300 GPIO platform data - * @ports: number of GPIO block ports - * @gpio_base: first GPIO number for this block (use a free range) - */ -struct u300_gpio_platform { - u8 ports; - int gpio_base; -}; - -#endif /* __MACH_U300_GPIO_U300_H */ -- cgit v1.2.2 From 3ad7a42d5a9c3736cd6d2c6f7e6038d0ca8b316c Mon Sep 17 00:00:00 2001 From: Matt Porter Date: Wed, 6 Mar 2013 11:15:31 -0500 Subject: ARM: davinci: move private EDMA API to arm/common Move mach-davinci/dma.c to common/edma.c so it can be used by OMAP (specifically AM33xx) as well. Signed-off-by: Matt Porter Acked-by: Chris Ball # davinci_mmc.c Acked-by: Mark Brown Acked-by: Olof Johansson [nsekhar@ti.com: dropped davinci sffsdr changes] Signed-off-by: Sekhar Nori --- include/linux/mfd/davinci_voicecodec.h | 3 +- include/linux/platform_data/edma.h | 182 ++++++++++++++++++++++++++++++ include/linux/platform_data/spi-davinci.h | 2 +- 3 files changed, 184 insertions(+), 3 deletions(-) create mode 100644 include/linux/platform_data/edma.h (limited to 'include/linux') diff --git a/include/linux/mfd/davinci_voicecodec.h b/include/linux/mfd/davinci_voicecodec.h index 0ab61320ffa8..7dd6524d2aac 100644 --- a/include/linux/mfd/davinci_voicecodec.h +++ b/include/linux/mfd/davinci_voicecodec.h @@ -26,8 +26,7 @@ #include #include #include - -#include +#include /* * Register values. diff --git a/include/linux/platform_data/edma.h b/include/linux/platform_data/edma.h new file mode 100644 index 000000000000..2344ea2675ad --- /dev/null +++ b/include/linux/platform_data/edma.h @@ -0,0 +1,182 @@ +/* + * TI EDMA definitions + * + * Copyright (C) 2006-2013 Texas Instruments. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +/* + * This EDMA3 programming framework exposes two basic kinds of resource: + * + * Channel Triggers transfers, usually from a hardware event but + * also manually or by "chaining" from DMA completions. + * Each channel is coupled to a Parameter RAM (PaRAM) slot. + * + * Slot Each PaRAM slot holds a DMA transfer descriptor (PaRAM + * "set"), source and destination addresses, a link to a + * next PaRAM slot (if any), options for the transfer, and + * instructions for updating those addresses. There are + * more than twice as many slots as event channels. + * + * Each PaRAM set describes a sequence of transfers, either for one large + * buffer or for several discontiguous smaller buffers. An EDMA transfer + * is driven only from a channel, which performs the transfers specified + * in its PaRAM slot until there are no more transfers. When that last + * transfer completes, the "link" field may be used to reload the channel's + * PaRAM slot with a new transfer descriptor. + * + * The EDMA Channel Controller (CC) maps requests from channels into physical + * Transfer Controller (TC) requests when the channel triggers (by hardware + * or software events, or by chaining). The two physical DMA channels provided + * by the TCs are thus shared by many logical channels. + * + * DaVinci hardware also has a "QDMA" mechanism which is not currently + * supported through this interface. (DSP firmware uses it though.) + */ + +#ifndef EDMA_H_ +#define EDMA_H_ + +/* PaRAM slots are laid out like this */ +struct edmacc_param { + unsigned int opt; + unsigned int src; + unsigned int a_b_cnt; + unsigned int dst; + unsigned int src_dst_bidx; + unsigned int link_bcntrld; + unsigned int src_dst_cidx; + unsigned int ccnt; +}; + +/* fields in edmacc_param.opt */ +#define SAM BIT(0) +#define DAM BIT(1) +#define SYNCDIM BIT(2) +#define STATIC BIT(3) +#define EDMA_FWID (0x07 << 8) +#define TCCMODE BIT(11) +#define EDMA_TCC(t) ((t) << 12) +#define TCINTEN BIT(20) +#define ITCINTEN BIT(21) +#define TCCHEN BIT(22) +#define ITCCHEN BIT(23) + +/*ch_status paramater of callback function possible values*/ +#define DMA_COMPLETE 1 +#define DMA_CC_ERROR 2 +#define DMA_TC1_ERROR 3 +#define DMA_TC2_ERROR 4 + +enum address_mode { + INCR = 0, + FIFO = 1 +}; + +enum fifo_width { + W8BIT = 0, + W16BIT = 1, + W32BIT = 2, + W64BIT = 3, + W128BIT = 4, + W256BIT = 5 +}; + +enum dma_event_q { + EVENTQ_0 = 0, + EVENTQ_1 = 1, + EVENTQ_2 = 2, + EVENTQ_3 = 3, + EVENTQ_DEFAULT = -1 +}; + +enum sync_dimension { + ASYNC = 0, + ABSYNC = 1 +}; + +#define EDMA_CTLR_CHAN(ctlr, chan) (((ctlr) << 16) | (chan)) +#define EDMA_CTLR(i) ((i) >> 16) +#define EDMA_CHAN_SLOT(i) ((i) & 0xffff) + +#define EDMA_CHANNEL_ANY -1 /* for edma_alloc_channel() */ +#define EDMA_SLOT_ANY -1 /* for edma_alloc_slot() */ +#define EDMA_CONT_PARAMS_ANY 1001 +#define EDMA_CONT_PARAMS_FIXED_EXACT 1002 +#define EDMA_CONT_PARAMS_FIXED_NOT_EXACT 1003 + +#define EDMA_MAX_CC 2 + +/* alloc/free DMA channels and their dedicated parameter RAM slots */ +int edma_alloc_channel(int channel, + void (*callback)(unsigned channel, u16 ch_status, void *data), + void *data, enum dma_event_q); +void edma_free_channel(unsigned channel); + +/* alloc/free parameter RAM slots */ +int edma_alloc_slot(unsigned ctlr, int slot); +void edma_free_slot(unsigned slot); + +/* alloc/free a set of contiguous parameter RAM slots */ +int edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count); +int edma_free_cont_slots(unsigned slot, int count); + +/* calls that operate on part of a parameter RAM slot */ +void edma_set_src(unsigned slot, dma_addr_t src_port, + enum address_mode mode, enum fifo_width); +void edma_set_dest(unsigned slot, dma_addr_t dest_port, + enum address_mode mode, enum fifo_width); +void edma_get_position(unsigned slot, dma_addr_t *src, dma_addr_t *dst); +void edma_set_src_index(unsigned slot, s16 src_bidx, s16 src_cidx); +void edma_set_dest_index(unsigned slot, s16 dest_bidx, s16 dest_cidx); +void edma_set_transfer_params(unsigned slot, u16 acnt, u16 bcnt, u16 ccnt, + u16 bcnt_rld, enum sync_dimension sync_mode); +void edma_link(unsigned from, unsigned to); +void edma_unlink(unsigned from); + +/* calls that operate on an entire parameter RAM slot */ +void edma_write_slot(unsigned slot, const struct edmacc_param *params); +void edma_read_slot(unsigned slot, struct edmacc_param *params); + +/* channel control operations */ +int edma_start(unsigned channel); +void edma_stop(unsigned channel); +void edma_clean_channel(unsigned channel); +void edma_clear_event(unsigned channel); +void edma_pause(unsigned channel); +void edma_resume(unsigned channel); + +struct edma_rsv_info { + + const s16 (*rsv_chans)[2]; + const s16 (*rsv_slots)[2]; +}; + +/* platform_data for EDMA driver */ +struct edma_soc_info { + + /* how many dma resources of each type */ + unsigned n_channel; + unsigned n_region; + unsigned n_slot; + unsigned n_tc; + unsigned n_cc; + /* + * Default queue is expected to be a low-priority queue. + * This way, long transfers on the default queue started + * by the codec engine will not cause audio defects. + */ + enum dma_event_q default_queue; + + /* Resource reservation for other cores */ + struct edma_rsv_info *rsv; + + const s8 (*queue_tc_mapping)[2]; + const s8 (*queue_priority_mapping)[2]; +}; + +#endif diff --git a/include/linux/platform_data/spi-davinci.h b/include/linux/platform_data/spi-davinci.h index 7af305b37868..8dc2fa47a2aa 100644 --- a/include/linux/platform_data/spi-davinci.h +++ b/include/linux/platform_data/spi-davinci.h @@ -19,7 +19,7 @@ #ifndef __ARCH_ARM_DAVINCI_SPI_H #define __ARCH_ARM_DAVINCI_SPI_H -#include +#include #define SPI_INTERN_CS 0xFF -- cgit v1.2.2 From 6cba4355066bda19f14d4da66b8abbca0ffdfd59 Mon Sep 17 00:00:00 2001 From: Matt Porter Date: Thu, 20 Jun 2013 16:06:38 -0500 Subject: ARM: edma: Add DT and runtime PM support to the private EDMA API Adds support for parsing the TI EDMA DT data into the required EDMA private API platform data. Enables runtime PM support to initialize the EDMA hwmod. Enables build on OMAP. Changes by Joel: * Setup default one-to-one mapping for queue_priority and queue_tc mapping as discussed in [1]. * Split out xbar stuff to separate patch. [1] * Dropped unused DT helper to convert to array * Fixed dangling pointer issue with Sekhar's changes [1] https://patchwork.kernel.org/patch/2226761/ Signed-off-by: Matt Porter [nsekhar@ti.com: fix checkpatch errors, build breakages. Introduce edma_setup_info_from_dt() as part of that effort] Signed-off-by: Joel A Fernandes Acked-by: Arnd Bergmann Signed-off-by: Sekhar Nori --- include/linux/platform_data/edma.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include/linux') diff --git a/include/linux/platform_data/edma.h b/include/linux/platform_data/edma.h index 2344ea2675ad..317f2beeaece 100644 --- a/include/linux/platform_data/edma.h +++ b/include/linux/platform_data/edma.h @@ -175,8 +175,8 @@ struct edma_soc_info { /* Resource reservation for other cores */ struct edma_rsv_info *rsv; - const s8 (*queue_tc_mapping)[2]; - const s8 (*queue_priority_mapping)[2]; + s8 (*queue_tc_mapping)[2]; + s8 (*queue_priority_mapping)[2]; }; #endif -- cgit v1.2.2 From 2646a0e52b65a5ea3d108794611f95df1a6cb409 Mon Sep 17 00:00:00 2001 From: Matt Porter Date: Thu, 20 Jun 2013 16:06:39 -0500 Subject: ARM: edma: Add EDMA crossbar event mux support EDMA supports a cross bar which provides ability to mux additional events into physical channels present in the channel controller. This is required when the number of events present in the system are more than number of available physical channels. Changes by Joel: * Split EDMA xbar support out of original EDMA DT parsing patch to keep it easier for review. * Rewrite shift and offset calculation. Suggested-by: Sekhar Nori Suggested by: Andy Shevchenko Signed-off-by: Joel A Fernandes Acked-by: Arnd Bergmann [nsekhar@ti.com: fix checkpatch errors and a minor coding improvement] Signed-off-by: Sekhar Nori --- include/linux/platform_data/edma.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/linux') diff --git a/include/linux/platform_data/edma.h b/include/linux/platform_data/edma.h index 317f2beeaece..57300fd7cc03 100644 --- a/include/linux/platform_data/edma.h +++ b/include/linux/platform_data/edma.h @@ -177,6 +177,7 @@ struct edma_soc_info { s8 (*queue_tc_mapping)[2]; s8 (*queue_priority_mapping)[2]; + const s16 (*xbar_chans)[2]; }; #endif -- cgit v1.2.2