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fixed the but that the pcie dbi reg can't be accessed
on the 2014.04 version.
Signed-off-by: Richard Zhu <r65037@freescale.com>
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Add dcic mux bit define in gpr head file for both imx6q and imx6sx.
Signed-off-by: Sandor Yu <R01008@freescale.com>
(cherry picked from commit 216ccc9b67f51935c08387cac31da35fb3fb4568)
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Add enet sleep mode support for imx6sx arm2 platforms.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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Add imx6sx vadc gpr register define.
Signed-off-by: Sandor Yu <R01008@freescale.com>
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This patch adds LDB mux ctrl bit definitions for imx6sx.
The bit DISP_MUX_LDB_MUX_CTRL is defined in the register IOMUXC_GPR5.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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This patch adds LVDS mux ctrl bit definitions for imx6dl.
The bits LVDS0/1_MUX_CTL are defined in the register IOMUXC_GPR3.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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- Init GPR1 register to select enet1 and enet2 refrence clock from
internal PLL.
- Add enet MAC address checking from fuse.
- Add some phy fixup, set RGMII IO voltage to 1.8V.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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PCIe requires additional bits be defined for GPR8 and GPR12.
Signed-off-by: Sean Cross <xobs@kosagi.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
(cherry picked from commit 8d6a35fb13406f87d926fffeee0d70360ce3077d)
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definitions of gpr"
switch to community upstreamed pcie driver.
Revert "ENGR00275213-2 ARM: imx6q: update the pcie bits definitions of gpr"
This reverts commit 0ddad708c7484a8b5d2016d31fda2bd8b9b8f275.
Signed-off-by: Richard Zhu <r65037@freescale.com>
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Add the pcie bits definitons of gpr12 and gpr8 registers.
Signed-off-by: Richard Zhu <r65037@freescale.com>
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Add imx6sl iomux-gpr register field define in "imx6q-iomuxc-gpr.h" header
file, which is not fully define all iomux-gpr registers and fields, only
add fec related macro define.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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Need to use IOMUXC_GPR1_GINT bit for cpuidle driver, so update this
bit's definitions.
Signed-off-by: Anson Huang <b20788@freescale.com>
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Replace the SATA_PHY_# by the more readable definitons.
tj: Being routed through libata branch to enable implementation of
ahci_imx.
Signed-off-by: Richard Zhu <r65037@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Include headfile for easy using.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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