diff options
| author | Fugang Duan <B38611@freescale.com> | 2014-02-14 23:43:26 -0500 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@freescale.com> | 2014-04-16 09:57:31 -0400 |
| commit | d9ccbb28d31b8214b0809ff6b6848311190c0a9f (patch) | |
| tree | 9291484a0de79fef7b58398845b2bd935a4db5f9 /include/linux/mfd/syscon | |
| parent | d41271fb6f186d6d727c0bf08832b6b8154fbdda (diff) | |
ENGR00299323-13 ARM:imx:imx6sx: add enet init for imx6sx platform
- Init GPR1 register to select enet1 and enet2 refrence clock from
internal PLL.
- Add enet MAC address checking from fuse.
- Add some phy fixup, set RGMII IO voltage to 1.8V.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Diffstat (limited to 'include/linux/mfd/syscon')
| -rw-r--r-- | include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h index dc5076ed55c7..bbbebdde44c4 100644 --- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h +++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | |||
| @@ -1,5 +1,5 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. | 2 | * Copyright (C) 2012-2014 Freescale Semiconductor, Inc. |
| 3 | * | 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify | 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 as | 5 | * it under the terms of the GNU General Public License version 2 as |
| @@ -378,4 +378,9 @@ | |||
| 378 | #define IMX6SL_GPR1_FEC_CLOCK_MUX1_SEL_MASK (0x3 << 17) | 378 | #define IMX6SL_GPR1_FEC_CLOCK_MUX1_SEL_MASK (0x3 << 17) |
| 379 | #define IMX6SL_GPR1_FEC_CLOCK_MUX2_SEL_MASK (0x1 << 14) | 379 | #define IMX6SL_GPR1_FEC_CLOCK_MUX2_SEL_MASK (0x1 << 14) |
| 380 | 380 | ||
| 381 | /* For imx6sx iomux gpr register field define */ | ||
| 382 | #define IMX6SX_GPR1_FEC_CLOCK_MUX_SEL_MASK (0x3 << 13) | ||
| 383 | #define IMX6SX_GPR1_FEC_CLOCK_PAD_DIR_MASK (0x3 << 17) | ||
| 384 | #define IMX6SX_GPR1_FEC_CLOCK_MUX_SEL_EXT (0x3 << 13) | ||
| 385 | |||
| 381 | #endif /* __LINUX_IMX6Q_IOMUXC_GPR_H */ | 386 | #endif /* __LINUX_IMX6Q_IOMUXC_GPR_H */ |
