ENGR00275213-2 ARM: imx6q: update the pcie bits definitions of gpr

Add the pcie bits definitons of gpr12 and gpr8 registers.

Signed-off-by: Richard Zhu <r65037@freescale.com>

1 files changed, 9 insertions, 0 deletions

diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
index 3363488d9b83..911a6b3c9beb 100644
--- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
+++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
@@ -243,6 +243,12 @@
 
 #define IMX6Q_GPR5_L2_CLK_STOP                  BIT(8)
 
+#define IMX6Q_GPR8_PCIE_TX_DEEM_GEN1_MASK       (0x3F << 0)
+#define IMX6Q_GPR8_PCIE_TX_DEEM_GEN2_3P5DB_MASK (0x3F << 6)
+#define IMX6Q_GPR8_PCIE_TX_DEEM_GEN2_6DB_MASK   (0x3F << 12)
+#define IMX6Q_GPR8_PCIE_TX_SWING_FULL_MASK      (0x7F << 18)
+#define IMX6Q_GPR8_PCIE_TX_SWING_LOW_MASK       (0x3F << 25)
+
 #define IMX6Q_GPR9_TZASC2_BYP                   BIT(1)
 #define IMX6Q_GPR9_TZASC1_BYP                   BIT(0)
 
@@ -276,6 +282,9 @@
 #define IMX6Q_GPR12_ARMP_ATB_CLK_EN             BIT(25)
 #define IMX6Q_GPR12_ARMP_APB_CLK_EN             BIT(24)
 #define IMX6Q_GPR12_PCIE_CTL_2                  BIT(10)
+#define IMX6Q_GPR12_PCIE_LOS_LEVEL_MASK         (0x1F << 4)
+#define IMX6Q_GPR12_PCIE_APP_LTSSM_EN           BIT(10)
+#define IMX6Q_GPR12_PCIE_DEV_TYPE_MASK          (0xF << 12)
 
 #define IMX6Q_GPR13_SDMA_STOP_REQ               BIT(30)
 #define IMX6Q_GPR13_CAN2_STOP_REQ               BIT(29)