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path: root/drivers/gpu/drm/radeon/si.c
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* drm/radeon: fix DAC interrupt handling on DCE5+Alex Deucher2014-02-13
| | | | | | | | | | | | commit e9a321c6b2ac954a7dbf235f419c255a424a1273 upstream. DCE5 and newer hardware only has 1 DAC. Use the correct offset. This may fix display problems on certain board configurations. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* drm/radeon: fixup bad vram size on SIAlex Deucher2013-12-20
| | | | | | | | | | | | | commit 0ca223b029a261e82fb2f50c52eb85d510f4260e upstream. Some boards seem to have garbage in the upper 16 bits of the vram size register. Check for this and clamp the size properly. Fixes boards reporting bogus amounts of vram. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* drm/radeon: update line buffer allocation for dce6Alex Deucher2013-10-01
| | | | | | | | | | | | | | | | | | | commit 290d24576ccf1aa0373d2185cedfe262d0d4952a upstream. We need to allocate line buffer to each display when setting up the watermarks. Failure to do so can lead to a blank screen. This fixes blank screen problems on dce6 asics. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=64850 Based on an initial fix from: Jay Cornwall <jay.cornwall@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* drm/radeon/si: Add support for CP DMA to CS checker for compute v2Tom Stellard2013-10-01
| | | | | | | | | | | | | | | | | | | | | | | | | | commit e5b9e7503eb1f4884efa3b321d3cc47806779202 upstream. Also add a new RADEON_INFO query to check that CP DMA packets are supported on the compute ring. CP DMA has been supported since the 3.8 kernel, but due to an oversight we forgot to teach the CS checker that the CP DMA packet was legal for the compute ring on Southern Islands GPUs. This patch fixes a bug where the radeon driver will incorrectly reject a legal CP DMA packet from user space. I would like to have the patch backported to stable so that we don't have to require Mesa users to use a bleeding edge kernel in order to take advantage of this feature which is already present in the stable kernels (3.8 and newer). v2: - Don't bump kms version, so this patch can be backported to stable kernels. Signed-off-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* drm/radeon: always program the MC on startupAlex Deucher2013-08-15
| | | | | | | | | | | | | | | | | commit 6fab3febf6d949b0a12b1e4e73db38e4a177a79e upstream. For r6xx+ asics. This mirrors the behavior of pre-r6xx asics. We need to program the MC even if something else in startup() fails. Failure to do so results in an unusable GPU. Based on a fix from: Mark Kettenis <kettenis@openbsd.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> [ rebased for 3.10 and dropped the drivers/gpu/drm/radeon/cik.c bit as it's 3.11 specific code / tmb ] Signed-off-by: Thomas Backlund <tmb@mageia.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* drm/radeon: fix halting UVDChristian König2013-08-15
| | | | | | | | | | | | | | | | | | commit 2858c00d2823c83acce2a1175dbabb2cebee8678 upstream. Removing the clock/power or resetting the VCPU can cause hangs if that happens in the middle of a register write. Stall the memory and register bus before putting the VCPU into reset. Keep it in reset when unloading the module or suspending. v2: rebased on 3.10-stable tree Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* radeon: Fix system hang issue when using KMS with older cardsAdis Hamzić2013-06-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current radeon driver initialization routines, when using KMS, are written so that the IRQ installation routine is called before initializing the WB buffer and the CP rings. With some ASICs, though, the IRQ routine tries to access the GFX_INDEX ring causing a call to RREG32 with the value of -1 in radeon_fence_read. This, in turn causes the system to completely hang with some cards, requiring a hard reset. A call stack that can cause such a hang looks like this (using rv515 ASIC for the example here): * rv515_init (rv515.c) * radeon_irq_kms_init (radeon_irq_kms.c) * drm_irq_install (drm_irq.c) * radeon_driver_irq_preinstall_kms (radeon_irq_kms.c) * rs600_irq_process (rs600.c) * radeon_fence_process - due to SW interrupt (radeon_fence.c) * radeon_fence_read (radeon_fence.c) * hang due to RREG32(-1) The patch moves the IRQ installation to the card startup routine, after the ring has been initialized, but before the IRQ has been set. This fixes the issue, but requires a check to see if the IRQ is already installed, as is the case in the system resume codepath. I have tested the patch on three machines using the rv515, the rv770 and the evergreen ASIC. They worked without issues. This seems to be a known issue and has been reported on several bug tracking sites by various distributions (see links below). Most of reports recommend booting the system with KMS disabled and then enabling KMS by reloading the radeon module. For some reason, this was indeed a usable workaround, however, UMS is now deprecated and disabled by default. Bug reports: https://bugzilla.redhat.com/show_bug.cgi?id=845745 https://bugs.launchpad.net/ubuntu/+source/linux/+bug/561789 https://bbs.archlinux.org/viewtopic.php?id=156964 Signed-off-by: Adis Hamzić <adis@hamzadis.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/radeon: fix typo in cu_per_sh on verdeAlex Deucher2013-05-29
| | | | | | | | | Should be 5 rather than 2. Noticed by sroland and glisse on IRC. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/radeon: add golden register settings for Hainan (v2)Alex Deucher2013-05-20
| | | | | | | v2: fix typo Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* drm/radeon: sun/hainan chips do not have UVD (v2)Alex Deucher2013-05-20
| | | | | | | | Skip UVD handling on them. v2: split has_uvd tracking into separate patch Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: fill in ucode loading support for HainanAlex Deucher2013-05-20
| | | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* drm/radeon: don't touch DCE or VGA regs on Hainan (v3)Alex Deucher2013-05-20
| | | | | | | | | | | | Hainan has no display hardware: - no DCE (crtc, uniphy, dac, etc.) - no VGA v2: fix bios fetch v3: fix interrupts Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* drm/radeon: fill in GPU init for Hainan (v2)Alex Deucher2013-05-20
| | | | | | v2: fix gb_addr_config value Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: Fix VRAM size calculation for VRAM >= 4GBNiels Ole Salscheider2013-05-20
| | | | | | | | Add ULL prefix to avoid overflow. Signed-off-by: Niels Ole Salscheider <niels_ole@salscheider-online.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/radeon: consolidate UVD clock programmingChristian König2013-05-02
| | | | | | | | Instead of duplicating the code over and over again, just use a single function to handle the clock calculations. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/si: add support for golden register initAlex Deucher2013-04-23
| | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: fix typo in si_select_se_sh()Alex Deucher2013-04-23
| | | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/radeon: put UVD PLLs in bypass modeChristian König2013-04-22
| | | | | | | | | Just power down the PLL when we get a VCLK or DCLK of zero. Enabling the bypass mode early should also allow us to switch UVD clocks on the fly. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: add si tile mode array query v3Jerome Glisse2013-04-11
| | | | | | | | | | | Allow userspace to query for the tile mode array so userspace can properly compute surface pitch and alignment requirement depending on tiling. v2: Make strict aliasing safer by casting to char when copying v3: merge fix from Christian Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: remove unused blit remnants from si.cAlex Deucher2013-04-09
| | | | | | | We use the DMA ring rather than the GFX ring for bo moves. This code was never used and commented out. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: add UVD tiling addr config v2Christian König2013-04-09
| | | | | | | | v2: set UVD tiling config for rv730 Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com>
* drm/radeon: add set_uvd_clocks callback for SIChristian König2013-04-09
| | | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: UVD bringup v8Christian König2013-04-09
| | | | | | | | | | | | | Just everything needed to decode videos using UVD. v6: just all the bugfixes and support for R7xx-SI merged in one patch v7: UVD_CGC_GATE is a write only register, lockup detection fix v8: split out VRAM fallback changes, remove support for RV770, add support for HEMLOCK, add buffer sizes checks Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dce6: add missing display reg for tiling setupAlex Deucher2013-04-09
| | | | | | | | | | | | A new tiling config register for the display blocks was added on DCE6. May fix: https://bugs.freedesktop.org/show_bug.cgi?id=62889 https://bugs.freedesktop.org/show_bug.cgi?id=57919 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/radeon: clean up vram/gtt location handlingAlex Deucher2013-04-09
| | | | | | | | | Add a per-asic MC (memory controller) mask which holds the mak address mask the asic is capable of. Use this when calculating the vram and gtt locations rather using asic specific functions or limiting everything to 32 bits. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: fix S/R on VM systems (cayman/TN/SI)Alex Deucher2013-03-15
| | | | | | | | | | | | | We weren't properly tearing down the VM sub-alloctor on suspend leading to bogus VM PTs on resume. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=60439 Reviewed-by: Christian König <christian.koenig@amd.com> Tested-by: Dmitry Cherkasov <Dmitrii.Cherkasov@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/radeon: skip MC reset as it's probably not hungAlex Deucher2013-03-07
| | | | | | | | | The MC is mostly likely busy (e.g., display requests), not hung so no need to reset it. Doing an MC reset is tricky and not particularly reliable. Fixes hangs in certain cases. Reported-by: Josh Boyer <jwboyer@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: switch get_gpu_clock() to a callback (v2)Alex Deucher2013-02-20
| | | | | | | | Cleans up the code for future asics v2: rebase, fix some missing radeon_asic updates Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: add a asic callback to get the xclkAlex Deucher2013-02-20
| | | | | | | | | This is required to get the reference clock used by the gfx engine for things like timestamps. Fixes support for GL extensions the use timestamps on certain boards. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: add ucode loading support for OlandAlex Deucher2013-02-01
| | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: fill in gpu init for OlandAlex Deucher2013-02-01
| | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: use IBs for VM page table updates v2Alex Deucher2013-02-01
| | | | | | | | | | | | For very large page table updates, we can exceed the size of the ring. To avoid this, use an IB to perform the page table update. v2(ck): cleanup the IB infrastructure and the use it instead of filling the struct ourself. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
* drm/radeon: use the reset mask to determine if rings are hungAlex Deucher2013-01-31
| | | | | | | fetch the reset mask and check if the relevant ring flags are set to determine whether the ring is hung or not. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: halt engines before disabling MC (si)Alex Deucher2013-01-31
| | | | | | It's better to halt the engines before we disable the MC. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: use status regs to determine what to reset (si)Alex Deucher2013-01-31
| | | | | | | When we attempt the reset the GPU, look at the status registers to determine what blocks need to be reset. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: rework GPU reset on cayman/TNAlex Deucher2013-01-31
| | | | | | | Update the code to better match the recommended programming sequence for soft reset. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: add a bios scratch asic hung helperAlex Deucher2013-01-31
| | | | | | | | Used by all asic families from r600+. Flag for the vbios and later instances of the driver that the GPU is hung. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: consolidate redundant macros and constantsIlija Hadzic2013-01-31
| | | | | | | | | | After refactoring the _cs logic, we ended up with many macros and constants that #define the same thing. Clean'em up. Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com> Reviewed-by: Marek Olšák <maraeo@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: clear reset flags if engines are idleAlex Deucher2013-01-15
| | | | | | | | | | | | | | | | Fixes a hard lock in the gpu reset code after the rework for DMA support (0ecebb9e0d14e9948e0b1529883a776758117d6f "drm/radeon: switch to a finer grained reset for evergreen") due to not bailing before the MC shutdown if the relevant engines are idle. Discussion: http://lists.freedesktop.org/archives/dri-devel/2013-January/032985.html Reported-by: Eldad Zack <eldad@fogrefinery.com> Tested-by: Eldad Zack <eldad@fogrefinery.com> Acked-by: Paul Menzel <paulepanter@users.sourceforge.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: switch to a finer grained reset for SI (v2)Alex Deucher2013-01-03
| | | | | | | | | | No change in functionality as we currently set all the reset flags. v2: fix typo Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: reset dma engine on gpu reset (v2)Jerome Glisse2013-01-03
| | | | | | | | | | This try to reset the dma engine when performing gpu reset. Hopefully bringing back the gpu dma engine in sane state. v2: agd5f: fix dma reset on cayman/TN, add support for SI Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: print dma status reg on lockup (v2)Jerome Glisse2013-01-03
| | | | | | | | | To help debug dma related lockup. v2: agd5f: update SI as well Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds2012-12-17
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull DRM updates from Dave Airlie: "This is the one and only next pull for 3.8, we had a regression we found last week, so I was waiting for that to resolve itself, and I ended up with some Intel fixes on top as well. Highlights: - new driver: nvidia tegra 20/30/hdmi support - radeon: add support for previously unused DMA engines, more HDMI regs, eviction speeds ups and fixes - i915: HSW support enable, agp removal on GEN6, seqno wrapping - exynos: IPP subsystem support (image post proc), HDMI - nouveau: display class reworking, nv20->40 z compression - ttm: start of locking fixes, rcu usage for lookups, - core: documentation updates, docbook integration, monotonic clock usage, move from connector to object properties" * 'drm-next' of git://people.freedesktop.org/~airlied/linux: (590 commits) drm/exynos: add gsc ipp driver drm/exynos: add rotator ipp driver drm/exynos: add fimc ipp driver drm/exynos: add iommu support for ipp drm/exynos: add ipp subsystem drm/exynos: support device tree for fimd radeon: fix regression with eviction since evict caching changes drm/radeon: add more pedantic checks in the CP DMA checker drm/radeon: bump version for CS ioctl support for async DMA drm/radeon: enable the async DMA rings in the CS ioctl drm/radeon: add VM CS parser support for async DMA on cayman/TN/SI drm/radeon/kms: add evergreen/cayman CS parser for async DMA (v2) drm/radeon/kms: add 6xx/7xx CS parser for async DMA (v2) drm/radeon: fix htile buffer size computation for command stream checker drm/radeon: fix fence locking in the pageflip callback drm/radeon: make indirect register access concurrency-safe drm/radeon: add W|RREG32_IDX for MM_INDEX|DATA based mmio accesss drm/exynos: support extended screen coordinate of fimd drm/exynos: fix x, y coordinates for right bottom pixel drm/exynos: fix fb offset calculation for plane ...
| * drm/radeon/si: add VM CS checker support for CP DMAAlex Deucher2012-12-12
| | | | | | | | | | | | Need to verify for copies involving registers. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: add dma engine support for vm pt updates on si (v2)Alex Deucher2012-12-10
| | | | | | | | | | | | | | | | | | Async DMA has a special packet for contiguous pt updates which saves overhead. v2: rebase Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon/kms: Add initial support for async DMA on SIAlex Deucher2012-12-10
| | | | | | | | | | | | | | Pretty much the same as cayman. Some changes to the copy packets. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: stop page faults from hanging the system (v2)Christian König2012-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | Redirect invalid memory accesses to the default page instead of locking up the memory controller. Also enable the invalid memory access interrupts and start spamming system log with it. v2 (agd5f): fix up against 2 level PT changes Signed-off-by: Christian König <deathsimple@vodafone.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* | Merge branch 'for-linus' of ↵Linus Torvalds2012-12-13
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial Pull trivial branch from Jiri Kosina: "Usual stuff -- comment/printk typo fixes, documentation updates, dead code elimination." * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (39 commits) HOWTO: fix double words typo x86 mtrr: fix comment typo in mtrr_bp_init propagate name change to comments in kernel source doc: Update the name of profiling based on sysfs treewide: Fix typos in various drivers treewide: Fix typos in various Kconfig wireless: mwifiex: Fix typo in wireless/mwifiex driver messages: i2o: Fix typo in messages/i2o scripts/kernel-doc: check that non-void fcts describe their return value Kernel-doc: Convention: Use a "Return" section to describe return values radeon: Fix typo and copy/paste error in comments doc: Remove unnecessary declarations from Documentation/accounting/getdelays.c various: Fix spelling of "asynchronous" in comments. Fix misspellings of "whether" in comments. eisa: Fix spelling of "asynchronous". various: Fix spelling of "registered" in comments. doc: fix quite a few typos within Documentation target: iscsi: fix comment typos in target/iscsi drivers treewide: fix typo of "suport" in various comments and Kconfig treewide: fix typo of "suppport" in various comments ...
| * Fix misspellings of "whether" in comments.Adam Buchbinder2012-11-19
| | | | | | | | | | | | | | | | "Whether" is misspelled in various comments across the tree; this fixes them. No code changes. Signed-off-by: Adam Buchbinder <adam.buchbinder@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
* | drm/radeon/si: add some missing regs to the VM reg checkerAlex Deucher2012-11-08
|/ | | | | | | | This register is needed for streamout to work properly. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
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