diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-12-13 15:00:02 -0500 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-12-13 15:00:02 -0500 |
commit | a2013a13e68354e0c8f3696b69701803e13fb737 (patch) | |
tree | a7e1da6bfad1aa2afd83f401874d606269ce90b4 /drivers/gpu/drm/radeon/si.c | |
parent | dadfab4873256d2145640c0ce468fcbfb48977fe (diff) | |
parent | 106f9d9337f65bd428c0c79f650e3489e458d771 (diff) |
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial
Pull trivial branch from Jiri Kosina:
"Usual stuff -- comment/printk typo fixes, documentation updates, dead
code elimination."
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (39 commits)
HOWTO: fix double words typo
x86 mtrr: fix comment typo in mtrr_bp_init
propagate name change to comments in kernel source
doc: Update the name of profiling based on sysfs
treewide: Fix typos in various drivers
treewide: Fix typos in various Kconfig
wireless: mwifiex: Fix typo in wireless/mwifiex driver
messages: i2o: Fix typo in messages/i2o
scripts/kernel-doc: check that non-void fcts describe their return value
Kernel-doc: Convention: Use a "Return" section to describe return values
radeon: Fix typo and copy/paste error in comments
doc: Remove unnecessary declarations from Documentation/accounting/getdelays.c
various: Fix spelling of "asynchronous" in comments.
Fix misspellings of "whether" in comments.
eisa: Fix spelling of "asynchronous".
various: Fix spelling of "registered" in comments.
doc: fix quite a few typos within Documentation
target: iscsi: fix comment typos in target/iscsi drivers
treewide: fix typo of "suport" in various comments and Kconfig
treewide: fix typo of "suppport" in various comments
...
Diffstat (limited to 'drivers/gpu/drm/radeon/si.c')
-rw-r--r-- | drivers/gpu/drm/radeon/si.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index 4422d630b33b..010156dd949f 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c | |||
@@ -2007,7 +2007,7 @@ static int si_cp_resume(struct radeon_device *rdev) | |||
2007 | ring->wptr = 0; | 2007 | ring->wptr = 0; |
2008 | WREG32(CP_RB0_WPTR, ring->wptr); | 2008 | WREG32(CP_RB0_WPTR, ring->wptr); |
2009 | 2009 | ||
2010 | /* set the wb address wether it's enabled or not */ | 2010 | /* set the wb address whether it's enabled or not */ |
2011 | WREG32(CP_RB0_RPTR_ADDR, (rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) & 0xFFFFFFFC); | 2011 | WREG32(CP_RB0_RPTR_ADDR, (rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) & 0xFFFFFFFC); |
2012 | WREG32(CP_RB0_RPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) & 0xFF); | 2012 | WREG32(CP_RB0_RPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) & 0xFF); |
2013 | 2013 | ||
@@ -2040,7 +2040,7 @@ static int si_cp_resume(struct radeon_device *rdev) | |||
2040 | ring->wptr = 0; | 2040 | ring->wptr = 0; |
2041 | WREG32(CP_RB1_WPTR, ring->wptr); | 2041 | WREG32(CP_RB1_WPTR, ring->wptr); |
2042 | 2042 | ||
2043 | /* set the wb address wether it's enabled or not */ | 2043 | /* set the wb address whether it's enabled or not */ |
2044 | WREG32(CP_RB1_RPTR_ADDR, (rdev->wb.gpu_addr + RADEON_WB_CP1_RPTR_OFFSET) & 0xFFFFFFFC); | 2044 | WREG32(CP_RB1_RPTR_ADDR, (rdev->wb.gpu_addr + RADEON_WB_CP1_RPTR_OFFSET) & 0xFFFFFFFC); |
2045 | WREG32(CP_RB1_RPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + RADEON_WB_CP1_RPTR_OFFSET) & 0xFF); | 2045 | WREG32(CP_RB1_RPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + RADEON_WB_CP1_RPTR_OFFSET) & 0xFF); |
2046 | 2046 | ||
@@ -2066,7 +2066,7 @@ static int si_cp_resume(struct radeon_device *rdev) | |||
2066 | ring->wptr = 0; | 2066 | ring->wptr = 0; |
2067 | WREG32(CP_RB2_WPTR, ring->wptr); | 2067 | WREG32(CP_RB2_WPTR, ring->wptr); |
2068 | 2068 | ||
2069 | /* set the wb address wether it's enabled or not */ | 2069 | /* set the wb address whether it's enabled or not */ |
2070 | WREG32(CP_RB2_RPTR_ADDR, (rdev->wb.gpu_addr + RADEON_WB_CP2_RPTR_OFFSET) & 0xFFFFFFFC); | 2070 | WREG32(CP_RB2_RPTR_ADDR, (rdev->wb.gpu_addr + RADEON_WB_CP2_RPTR_OFFSET) & 0xFFFFFFFC); |
2071 | WREG32(CP_RB2_RPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + RADEON_WB_CP2_RPTR_OFFSET) & 0xFF); | 2071 | WREG32(CP_RB2_RPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + RADEON_WB_CP2_RPTR_OFFSET) & 0xFF); |
2072 | 2072 | ||