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authorAlex Deucher <alexander.deucher@amd.com>2013-01-24 11:37:19 -0500
committerAlex Deucher <alexander.deucher@amd.com>2013-01-31 16:24:57 -0500
commit123bc1832c33218dfa677a88c2c54bc1a48a9e72 (patch)
tree5ad2423f6e4752d7db0120b8ecb4af6a83a00df2 /drivers/gpu/drm/radeon/si.c
parentf770d78ac159a96071e3c4e4ab97c262e79506d3 (diff)
drm/radeon: use the reset mask to determine if rings are hung
fetch the reset mask and check if the relevant ring flags are set to determine whether the ring is hung or not. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/si.c')
-rw-r--r--drivers/gpu/drm/radeon/si.c72
1 files changed, 52 insertions, 20 deletions
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index 89b564ec3d34..cd83bc5bd235 100644
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -2108,26 +2108,6 @@ static int si_cp_resume(struct radeon_device *rdev)
2108 return 0; 2108 return 0;
2109} 2109}
2110 2110
2111bool si_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring)
2112{
2113 u32 srbm_status;
2114 u32 grbm_status, grbm_status2;
2115 u32 grbm_status_se0, grbm_status_se1;
2116
2117 srbm_status = RREG32(SRBM_STATUS);
2118 grbm_status = RREG32(GRBM_STATUS);
2119 grbm_status2 = RREG32(GRBM_STATUS2);
2120 grbm_status_se0 = RREG32(GRBM_STATUS_SE0);
2121 grbm_status_se1 = RREG32(GRBM_STATUS_SE1);
2122 if (!(grbm_status & GUI_ACTIVE)) {
2123 radeon_ring_lockup_update(ring);
2124 return false;
2125 }
2126 /* force CP activities */
2127 radeon_ring_force_activity(rdev, ring);
2128 return radeon_ring_test_lockup(rdev, ring);
2129}
2130
2131static u32 si_gpu_check_soft_reset(struct radeon_device *rdev) 2111static u32 si_gpu_check_soft_reset(struct radeon_device *rdev)
2132{ 2112{
2133 u32 reset_mask = 0; 2113 u32 reset_mask = 0;
@@ -2347,6 +2327,58 @@ int si_asic_reset(struct radeon_device *rdev)
2347 return 0; 2327 return 0;
2348} 2328}
2349 2329
2330/**
2331 * si_gfx_is_lockup - Check if the GFX engine is locked up
2332 *
2333 * @rdev: radeon_device pointer
2334 * @ring: radeon_ring structure holding ring information
2335 *
2336 * Check if the GFX engine is locked up.
2337 * Returns true if the engine appears to be locked up, false if not.
2338 */
2339bool si_gfx_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring)
2340{
2341 u32 reset_mask = si_gpu_check_soft_reset(rdev);
2342
2343 if (!(reset_mask & (RADEON_RESET_GFX |
2344 RADEON_RESET_COMPUTE |
2345 RADEON_RESET_CP))) {
2346 radeon_ring_lockup_update(ring);
2347 return false;
2348 }
2349 /* force CP activities */
2350 radeon_ring_force_activity(rdev, ring);
2351 return radeon_ring_test_lockup(rdev, ring);
2352}
2353
2354/**
2355 * si_dma_is_lockup - Check if the DMA engine is locked up
2356 *
2357 * @rdev: radeon_device pointer
2358 * @ring: radeon_ring structure holding ring information
2359 *
2360 * Check if the async DMA engine is locked up.
2361 * Returns true if the engine appears to be locked up, false if not.
2362 */
2363bool si_dma_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring)
2364{
2365 u32 reset_mask = si_gpu_check_soft_reset(rdev);
2366 u32 mask;
2367
2368 if (ring->idx == R600_RING_TYPE_DMA_INDEX)
2369 mask = RADEON_RESET_DMA;
2370 else
2371 mask = RADEON_RESET_DMA1;
2372
2373 if (!(reset_mask & mask)) {
2374 radeon_ring_lockup_update(ring);
2375 return false;
2376 }
2377 /* force ring activities */
2378 radeon_ring_force_activity(rdev, ring);
2379 return radeon_ring_test_lockup(rdev, ring);
2380}
2381
2350/* MC */ 2382/* MC */
2351static void si_mc_program(struct radeon_device *rdev) 2383static void si_mc_program(struct radeon_device *rdev)
2352{ 2384{