| Commit message (Collapse) | Author | Age |
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into drm-next
This set of patches adjust the setup of the HDMI CTS/N values for audio
support to be compliant with the work-around given in the iMX6 errata
documentation as part of the preparation for integrating audio support
for this driver, and also update the HDMI phy configuration for Rockchip
devices to improve the HDMI eye pattern.
* 'drm-dwhdmi-devel' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
drm: rockchip/dw_hdmi-rockchip: improve for HDMI electrical test
drm: bridge/dw_hdmi: separate VLEVCTRL settting into platform driver
drm: bridge/dw_hdmi: fixed codec style
drm: bridge/dw_hdmi: adjust n/cts setting order
drm: bridge/dw_hdmi: protect n/cts setting with a mutex
drm: bridge/dw_hdmi: combine hdmi_set_clock_regenerator_n() and hdmi_regenerate_cts()
Conflicts:
drivers/gpu/drm/imx/dw_hdmi-imx.c
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Because of iMX6 & Rockchip have differnet mpll config parameter,
the VLEVCTRL parameter would be different. In this case we should
separate VLEVCTRL setting from the common dw_hdmi driver, config
this parameter in platform driver(dw_hdmi-imx and dw_hdmi-rockchip)
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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git://git.pengutronix.de/git/pza/linux into drm-next
imx-drm changes to use media bus formats and LDB drm_panel support
- Add media bus formats needed by imx-drm
- Switch to use media bus formats to describe the pixel format
on the internal parallel bus between display interface and
encoders
- Some preparations for TV Output via TVEv2 on i.MX5
- Add drm_panel support to the i.MX LVDS driver, allow to
determine the bus pixel format from the panel descriptor.
* tag 'imx-drm-next-2015-03-31' of git://git.pengutronix.de/git/pza/linux:
drm/imx: imx-ldb: allow to determine bus format from the connected panel
drm/imx: imx-ldb: reset display clock input when disabling LVDS
drm/imx: imx-ldb: add drm_panel support
drm/imx: consolidate bus format variable names
drm/imx: switch to use media bus formats
Add RGB666_1X24_CPADHI media bus format
Add YUV8_1X24 media bus format
Add BGR888_1X24 and GBR888_1X24 media bus formats
Add LVDS RGB media bus formats
Add RGB444_1X12 and RGB565_1X16 media bus formats
drm/imx: ipuv3-crtc: Allow to divide DI clock from TVEv2
drm/imx: Add support for interlaced scanout
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This patch makes the fsl,data-width and fsl,data-mapping device tree
properties optional if a panel is connected to the ldb output port
via the of_graph bindings. The data mapping is determined from the
display_info.bus_format field provided by the panel.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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The LDB driver changes the attached display interface's input clock mux
to the LDB_DI clock reference. Change it back again when disabling the
LVDS display. Changing back to the PLL5 for example allows to configure
the same DI for HDMI output later.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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This patch allows to optionally attach the lvds-channel to a panel
supported by a drm_panel driver using of-graph bindings, instead of
supplying the modes via display-timings in the device tree.
This depends on of_graph_get_port_by_id and uses the OF graph to
link the optional DRM panel to the LDB lvds-channel. The output
port number is 1 on devices without the 4-port input multiplexer
(i.MX5) and 4 on devices with the mux (i.MX6).
Before:
ldb {
...
lvds-channel@0 {
...
display-timings {
native-timing = <&timing1>;
timing1: etm0700g0dh6 {
hactive = <800>;
vactive = <480>;
clock-frequency = <33260000>;
hsync-len = <128>;
hback-porch = <88>;
hfront-porch = <40>;
vsync-len = <2>;
vback-porch = <33>;
vfront-porch = <10>;
hsync-active = <0>;
vsync-active = <0>;
...
};
};
...
};
};
After:
ldb {
...
lvds-channel@0 {
...
port@4 {
reg = <4>;
lvds_out: endpoint {
remote_endpoint = <&panel_in>;
};
};
};
};
panel {
compatible = "edt,etm0700g0dh6", "simple-panel";
...
port {
panel_in: endpoint {
remote-endpoint = <&lvds_out>;
};
};
};
[Fixed build error due to missing select on DRM_PANEL --rmk]
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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This patch consolidates the different interface_pix_fmt, pixel_fmt, pix_fmt,
and pixfmt variables to a common name "bus_format" wherever they describe the
pixel format on the bus between display controller and encoder hardware.
At the same time, it renames imx_drm_panel_format to imx_drm_set_bus_format.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Tested-by: Emil Renner Berthing <kernel@esmil.dk>
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imx-drm internally misused the V4L2_PIX_FMT constants, which are supposed to
describe the pixel format of frame buffers in memory, to describe the pixel
format on the bus between the display controller and the encoder hardware.
Now that MEDIA_BUS_FMT constants are available to drm drivers, use those
instead.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Tested-by: Emil Renner Berthing <kernel@esmil.dk>
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This patch allows the IPU to divide the 27 MHz input clock from
the TVE by two to obtain the 13.5 MHz pixel clock needed for
NTSC/PAL SD modes.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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This patch allows interlaced frame buffer scanout for interlaced output
via HDMI or TV-Encoder.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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Using the for_each_... macro should make the code bit shorter and
easier to read. This patch also properly decrements the endpoint node
reference count before returning out of the loop.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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for-next
Pull of-graph helpers from Philipp Zabel:
of: Add of-graph helpers to loop over endpoints and find ports by id
This series converts of_graph_get_next_endpoint to decrement the refcount of
the passed prev parameter. This allows to add a for_each_endpoint_of_node
helper macro to loop over all endpoints in a device tree node.
The of_graph_get_port_by_id function is added to retrieve a port by its known
port id (contained in the reg property) from the device tree.
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Decrementing the reference count of the previous endpoint node allows to
use the of_graph_get_next_endpoint function in a for_each_... style macro.
All current users of this function that pass a non-NULL prev parameter
(that is, soc_camera and imx-drm) are changed to not decrement the passed
prev argument's refcount themselves.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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Commit eb10d6355532 ("imx-drm: encoder prepare/mode_set must use adjusted mode")
broke the first LVDS modeset by using crtc->hwmode before crtc mode_set is
called. In fact, encoder prepare is not supposed to prepare the display clock
at all. Rather encoder mode_set should be used to set the DI clock rate, before
it is enabled by crtc commit.
Reported-by: Liu Ying <Ying.Liu@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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The loop iterating over curr_ctrl in dw_hdmi terminates on mpixelclock == ~0UL,
so there needs to be an end of list element here in case a mode with a pixel
clock larger than 216 MHz is set.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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This patch limits the pixel clock to 13.4 MHz - 266 MHz for i.MX6Q
and 13.5 MHz - 270 MHz for i.MX6DL, which is the range documented
in the HDMI Transmitter chapter of the respective reference manuals.
Without this patch, when connected to a monitor capable of 2160p60
modes, dw_hdmi will happily report this mode and the IPU code will
cause a division by zero in ipu_di_config_clock when trying to figure
out how to divide the 264 MHz HSP clock down to ~600 MHz.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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git://git.pengutronix.de/git/pza/linux into drm-next
imx-drm fixes for IPUv3 DC and i.MX5 IPUv3 IC and TVE
- Corrected handling of wait_for_completion_timeout return value
when disabling IPUv3 DC channels
- Fixed error return value propagation in TVE mode_set
- Fixed IPUv3 register offsets for IC module on i.MX51 and i.MX53
* tag 'imx-drm-fixes-2015-01-28' of git://git.pengutronix.de/git/pza/linux:
gpu: ipu-v3: Fix IC control register offset
drm: imx: imx-tve: Check and propagate the errors
gpu: ipu-v3: wait_for_completion_timeout does not return negative status
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In the case of errors we should propagate them.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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DRM_GEM_CMA_HELPER is depend on HAVE_DMA_ATTRS, or it will break the
building. The related error (with allmodconfig under xtensa):
CC [M] drivers/gpu/drm/drm_gem_cma_helper.o
drivers/gpu/drm/drm_gem_cma_helper.c: In function 'drm_gem_cma_create':
drivers/gpu/drm/drm_gem_cma_helper.c:110:19: error: implicit declaration of function 'dma_alloc_writecombine' [-Werror=implicit-function-declaration]
cma_obj->vaddr = dma_alloc_writecombine(drm->dev, size,
^
drivers/gpu/drm/drm_gem_cma_helper.c:110:17: warning: assignment makes pointer from integer without a cast [-Wint-conversion]
cma_obj->vaddr = dma_alloc_writecombine(drm->dev, size,
^
drivers/gpu/drm/drm_gem_cma_helper.c: In function 'drm_gem_cma_free_object':
drivers/gpu/drm/drm_gem_cma_helper.c:193:3: error: implicit declaration of function 'dma_free_writecombine' [-Werror=implicit-function-declaration]
dma_free_writecombine(gem_obj->dev->dev, cma_obj->base.size,
^
drivers/gpu/drm/drm_gem_cma_helper.c: In function 'drm_gem_cma_mmap_obj':
drivers/gpu/drm/drm_gem_cma_helper.c:330:8: error: implicit declaration of function 'dma_mmap_writecombine' [-Werror=implicit-function-declaration]
ret = dma_mmap_writecombine(cma_obj->base.dev->dev, vma,
^
Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
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We do not need to track the state of the IPU DI's clock flags by having
each display bridge calling back into imx-drm-core, and then back out
into ipuv3-crtc.c.
ipuv3-crtc can instead just scan the list of encoders to retrieve their
type, and build up a picture of which types of encoders are attached.
We can then use this information to configure the IPU DI clocking mode
without any uncertainty - if we have multiple bridges connected to the
same DI, if one of them requires a synchronous DI clock, that's what we
must use.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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This patch changes struct ipu_di_signal_cfg to use struct videomode
to define video timings and flags.
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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The encoder ->prepare() and ->mode_set() methods need to use the
hw adjusted mode, not the original mode.
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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Ask the IPU display interface, via ipu_di_adjust_videomode(), to
adjust a video mode to meet any DI restrictions. The function takes
a subsystem independent videomode, so the drm_display_mode must be
converted to videomode first, and then the adjusted mode converted
back to a drm_display_mode.
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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the original imx hdmi driver is under drm/imx/,
which depends on imx-drm, so move the imx hdmi
driver out to drm/bridge and rename it to dw_hdmi
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Tested-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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hdmi phy configuration is platform specific, which can be adjusted
according to the board to get the best SI
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Tested-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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