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-rw-r--r--arch/powerpc/boot/Makefile3
-rw-r--r--arch/powerpc/boot/dts/digsy_mtc.dts59
-rw-r--r--arch/powerpc/boot/dts/gef_ppc9a.dts33
-rw-r--r--arch/powerpc/boot/dts/gef_sbc310.dts33
-rw-r--r--arch/powerpc/boot/dts/gef_sbc610.dts33
-rw-r--r--arch/powerpc/boot/dts/hcu4.dts168
-rw-r--r--arch/powerpc/boot/dts/ksi8560.dts2
-rw-r--r--arch/powerpc/boot/dts/mgcoge.dts9
-rw-r--r--arch/powerpc/boot/dts/mpc5200b.dtsi2
-rw-r--r--arch/powerpc/boot/dts/mpc8349emitx.dts3
-rw-r--r--arch/powerpc/boot/dts/p1022ds.dts2
-rw-r--r--arch/powerpc/boot/dts/p2020ds.dts5
-rw-r--r--arch/powerpc/boot/dts/p2041rdb.dts (renamed from arch/powerpc/boot/dts/p2040rdb.dts)17
-rw-r--r--arch/powerpc/boot/dts/p2041si.dtsi (renamed from arch/powerpc/boot/dts/p2040si.dtsi)135
-rw-r--r--arch/powerpc/boot/dts/p3041ds.dts8
-rw-r--r--arch/powerpc/boot/dts/p3041si.dtsi71
-rw-r--r--arch/powerpc/boot/dts/p3060qds.dts238
-rw-r--r--arch/powerpc/boot/dts/p3060si.dtsi719
-rw-r--r--arch/powerpc/boot/dts/p4080ds.dts12
-rw-r--r--arch/powerpc/boot/dts/p4080si.dtsi114
-rw-r--r--arch/powerpc/boot/dts/p5020ds.dts8
-rw-r--r--arch/powerpc/boot/dts/p5020si.dtsi68
-rw-r--r--arch/powerpc/boot/dts/sbc8560.dts2
-rw-r--r--arch/powerpc/boot/dts/yosemite.dts36
24 files changed, 1527 insertions, 253 deletions
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index c26200b40a47..72ee8c1fba48 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -58,7 +58,7 @@ $(addprefix $(obj)/,$(zlib) cuboot-c2k.o gunzip_util.o main.o prpmc2800.o): \
58libfdt := fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c 58libfdt := fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c
59libfdtheader := fdt.h libfdt.h libfdt_internal.h 59libfdtheader := fdt.h libfdt.h libfdt_internal.h
60 60
61$(addprefix $(obj)/,$(libfdt) libfdt-wrapper.o simpleboot.o): \ 61$(addprefix $(obj)/,$(libfdt) libfdt-wrapper.o simpleboot.o epapr.o): \
62 $(addprefix $(obj)/,$(libfdtheader)) 62 $(addprefix $(obj)/,$(libfdtheader))
63 63
64src-wlib := string.S crt0.S crtsavres.S stdio.c main.c \ 64src-wlib := string.S crt0.S crtsavres.S stdio.c main.c \
@@ -171,6 +171,7 @@ quiet_cmd_wrap = WRAP $@
171 $(if $3, -s $3)$(if $4, -d $4)$(if $5, -i $5) vmlinux 171 $(if $3, -s $3)$(if $4, -d $4)$(if $5, -i $5) vmlinux
172 172
173image-$(CONFIG_PPC_PSERIES) += zImage.pseries 173image-$(CONFIG_PPC_PSERIES) += zImage.pseries
174image-$(CONFIG_PPC_POWERNV) += zImage.pseries
174image-$(CONFIG_PPC_MAPLE) += zImage.maple 175image-$(CONFIG_PPC_MAPLE) += zImage.maple
175image-$(CONFIG_PPC_IBM_CELL_BLADE) += zImage.pseries 176image-$(CONFIG_PPC_IBM_CELL_BLADE) += zImage.pseries
176image-$(CONFIG_PPC_PS3) += dtbImage.ps3 177image-$(CONFIG_PPC_PS3) += dtbImage.ps3
diff --git a/arch/powerpc/boot/dts/digsy_mtc.dts b/arch/powerpc/boot/dts/digsy_mtc.dts
index 27bd267d631c..a7511f2d844d 100644
--- a/arch/powerpc/boot/dts/digsy_mtc.dts
+++ b/arch/powerpc/boot/dts/digsy_mtc.dts
@@ -23,19 +23,26 @@
23 23
24 soc5200@f0000000 { 24 soc5200@f0000000 {
25 timer@600 { // General Purpose Timer 25 timer@600 { // General Purpose Timer
26 #gpio-cells = <2>;
26 fsl,has-wdt; 27 fsl,has-wdt;
28 gpio-controller;
27 }; 29 };
28 30
29 rtc@800 { 31 timer@610 {
30 status = "disabled"; 32 #gpio-cells = <2>;
33 gpio-controller;
31 }; 34 };
32 35
33 can@900 { 36 rtc@800 {
34 status = "disabled"; 37 status = "disabled";
35 }; 38 };
36 39
37 can@980 { 40 spi@f00 {
38 status = "disabled"; 41 msp430@0 {
42 compatible = "spidev";
43 spi-max-frequency = <32000>;
44 reg = <0>;
45 };
39 }; 46 };
40 47
41 psc@2000 { // PSC1 48 psc@2000 { // PSC1
@@ -73,11 +80,16 @@
73 }; 80 };
74 81
75 i2c@3d00 { 82 i2c@3d00 {
76 rtc@50 { 83 eeprom@50 {
77 compatible = "at,24c08"; 84 compatible = "at,24c08";
78 reg = <0x50>; 85 reg = <0x50>;
79 }; 86 };
80 87
88 rtc@56 {
89 compatible = "mc,rv3029c2";
90 reg = <0x56>;
91 };
92
81 rtc@68 { 93 rtc@68 {
82 compatible = "dallas,ds1339"; 94 compatible = "dallas,ds1339";
83 reg = <0x68>; 95 reg = <0x68>;
@@ -90,11 +102,22 @@
90 }; 102 };
91 103
92 pci@f0000d00 { 104 pci@f0000d00 {
93 status = "disabled"; 105 interrupt-map-mask = <0xf800 0 0 7>;
106 interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3
107 0xc000 0 0 2 &mpc5200_pic 0 0 3
108 0xc000 0 0 3 &mpc5200_pic 0 0 3
109 0xc000 0 0 4 &mpc5200_pic 0 0 3>;
110 clock-frequency = <0>; // From boot loader
111 interrupts = <2 8 0 2 9 0 2 10 0>;
112 bus-range = <0 0>;
113 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000
114 0x02000000 0 0x90000000 0x90000000 0 0x10000000
115 0x01000000 0 0x00000000 0xa0000000 0 0x01000000>;
94 }; 116 };
95 117
96 localbus { 118 localbus {
97 ranges = <0 0 0xff000000 0x1000000>; 119 ranges = <0 0 0xff000000 0x1000000
120 4 0 0x60000000 0x0001000>;
98 121
99 // 16-bit flash device at LocalPlus Bus CS0 122 // 16-bit flash device at LocalPlus Bus CS0
100 flash@0,0 { 123 flash@0,0 {
@@ -122,5 +145,25 @@
122 reg = <0x00f00000 0x100000>; 145 reg = <0x00f00000 0x100000>;
123 }; 146 };
124 }; 147 };
148
149 can@4,0 {
150 compatible = "nxp,sja1000";
151 reg = <4 0x000 0x80>;
152 nxp,external-clock-frequency = <24000000>;
153 interrupts = <1 2 3>; // Level-low
154 };
155
156 can@4,100 {
157 compatible = "nxp,sja1000";
158 reg = <4 0x100 0x80>;
159 nxp,external-clock-frequency = <24000000>;
160 interrupts = <1 2 3>; // Level-low
161 };
162
163 serial@4,200 {
164 compatible = "nxp,sc28l92";
165 reg = <4 0x200 0x10>;
166 interrupts = <1 3 3>;
167 };
125 }; 168 };
126}; 169};
diff --git a/arch/powerpc/boot/dts/gef_ppc9a.dts b/arch/powerpc/boot/dts/gef_ppc9a.dts
index 83f4b79dff85..2266bbb303d0 100644
--- a/arch/powerpc/boot/dts/gef_ppc9a.dts
+++ b/arch/powerpc/boot/dts/gef_ppc9a.dts
@@ -269,14 +269,16 @@
269 enet0: ethernet@24000 { 269 enet0: ethernet@24000 {
270 #address-cells = <1>; 270 #address-cells = <1>;
271 #size-cells = <1>; 271 #size-cells = <1>;
272 cell-index = <0>;
272 device_type = "network"; 273 device_type = "network";
273 model = "eTSEC"; 274 model = "TSEC";
274 compatible = "gianfar"; 275 compatible = "gianfar";
275 reg = <0x24000 0x1000>; 276 reg = <0x24000 0x1000>;
276 ranges = <0x0 0x24000 0x1000>; 277 ranges = <0x0 0x24000 0x1000>;
277 local-mac-address = [ 00 00 00 00 00 00 ]; 278 local-mac-address = [ 00 00 00 00 00 00 ];
278 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; 279 interrupts = <29 2 30 2 34 2>;
279 interrupt-parent = <&mpic>; 280 interrupt-parent = <&mpic>;
281 tbi-handle = <&tbi0>;
280 phy-handle = <&phy0>; 282 phy-handle = <&phy0>;
281 phy-connection-type = "gmii"; 283 phy-connection-type = "gmii";
282 284
@@ -290,25 +292,48 @@
290 interrupt-parent = <&gef_pic>; 292 interrupt-parent = <&gef_pic>;
291 interrupts = <0x9 0x4>; 293 interrupts = <0x9 0x4>;
292 reg = <1>; 294 reg = <1>;
295 device_type = "ethernet-phy";
293 }; 296 };
294 phy2: ethernet-phy@2 { 297 phy2: ethernet-phy@2 {
295 interrupt-parent = <&gef_pic>; 298 interrupt-parent = <&gef_pic>;
296 interrupts = <0x8 0x4>; 299 interrupts = <0x8 0x4>;
297 reg = <3>; 300 reg = <3>;
301 device_type = "ethernet-phy";
302 };
303 tbi0: tbi-phy@11 {
304 reg = <0x11>;
305 device_type = "tbi-phy";
298 }; 306 };
299 }; 307 };
300 }; 308 };
301 309
302 enet1: ethernet@26000 { 310 enet1: ethernet@26000 {
311 #address-cells = <1>;
312 #size-cells = <1>;
313 cell-index = <2>;
303 device_type = "network"; 314 device_type = "network";
304 model = "eTSEC"; 315 model = "TSEC";
305 compatible = "gianfar"; 316 compatible = "gianfar";
306 reg = <0x26000 0x1000>; 317 reg = <0x26000 0x1000>;
318 ranges = <0x0 0x26000 0x1000>;
307 local-mac-address = [ 00 00 00 00 00 00 ]; 319 local-mac-address = [ 00 00 00 00 00 00 ];
308 interrupts = <0x1f 0x2 0x20 0x2 0x21 0x2>; 320 interrupts = <31 2 32 2 33 2>;
309 interrupt-parent = <&mpic>; 321 interrupt-parent = <&mpic>;
322 tbi-handle = <&tbi2>;
310 phy-handle = <&phy2>; 323 phy-handle = <&phy2>;
311 phy-connection-type = "gmii"; 324 phy-connection-type = "gmii";
325
326 mdio@520 {
327 #address-cells = <1>;
328 #size-cells = <0>;
329 compatible = "fsl,gianfar-tbi";
330 reg = <0x520 0x20>;
331
332 tbi2: tbi-phy@11 {
333 reg = <0x11>;
334 device_type = "tbi-phy";
335 };
336 };
312 }; 337 };
313 338
314 serial0: serial@4500 { 339 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/gef_sbc310.dts b/arch/powerpc/boot/dts/gef_sbc310.dts
index fc3a331dd392..429e87d9acef 100644
--- a/arch/powerpc/boot/dts/gef_sbc310.dts
+++ b/arch/powerpc/boot/dts/gef_sbc310.dts
@@ -267,14 +267,16 @@
267 enet0: ethernet@24000 { 267 enet0: ethernet@24000 {
268 #address-cells = <1>; 268 #address-cells = <1>;
269 #size-cells = <1>; 269 #size-cells = <1>;
270 cell-index = <0>;
270 device_type = "network"; 271 device_type = "network";
271 model = "eTSEC"; 272 model = "TSEC";
272 compatible = "gianfar"; 273 compatible = "gianfar";
273 reg = <0x24000 0x1000>; 274 reg = <0x24000 0x1000>;
274 ranges = <0x0 0x24000 0x1000>; 275 ranges = <0x0 0x24000 0x1000>;
275 local-mac-address = [ 00 00 00 00 00 00 ]; 276 local-mac-address = [ 00 00 00 00 00 00 ];
276 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; 277 interrupts = <29 2 30 2 34 2>;
277 interrupt-parent = <&mpic>; 278 interrupt-parent = <&mpic>;
279 tbi-handle = <&tbi0>;
278 phy-handle = <&phy0>; 280 phy-handle = <&phy0>;
279 phy-connection-type = "gmii"; 281 phy-connection-type = "gmii";
280 282
@@ -288,25 +290,48 @@
288 interrupt-parent = <&gef_pic>; 290 interrupt-parent = <&gef_pic>;
289 interrupts = <0x9 0x4>; 291 interrupts = <0x9 0x4>;
290 reg = <1>; 292 reg = <1>;
293 device_type = "ethernet-phy";
291 }; 294 };
292 phy2: ethernet-phy@2 { 295 phy2: ethernet-phy@2 {
293 interrupt-parent = <&gef_pic>; 296 interrupt-parent = <&gef_pic>;
294 interrupts = <0x8 0x4>; 297 interrupts = <0x8 0x4>;
295 reg = <3>; 298 reg = <3>;
299 device_type = "ethernet-phy";
300 };
301 tbi0: tbi-phy@11 {
302 reg = <0x11>;
303 device_type = "tbi-phy";
296 }; 304 };
297 }; 305 };
298 }; 306 };
299 307
300 enet1: ethernet@26000 { 308 enet1: ethernet@26000 {
309 #address-cells = <1>;
310 #size-cells = <1>;
311 cell-index = <2>;
301 device_type = "network"; 312 device_type = "network";
302 model = "eTSEC"; 313 model = "TSEC";
303 compatible = "gianfar"; 314 compatible = "gianfar";
304 reg = <0x26000 0x1000>; 315 reg = <0x26000 0x1000>;
316 ranges = <0x0 0x26000 0x1000>;
305 local-mac-address = [ 00 00 00 00 00 00 ]; 317 local-mac-address = [ 00 00 00 00 00 00 ];
306 interrupts = <0x1f 0x2 0x20 0x2 0x21 0x2>; 318 interrupts = <31 2 32 2 33 2>;
307 interrupt-parent = <&mpic>; 319 interrupt-parent = <&mpic>;
320 tbi-handle = <&tbi2>;
308 phy-handle = <&phy2>; 321 phy-handle = <&phy2>;
309 phy-connection-type = "gmii"; 322 phy-connection-type = "gmii";
323
324 mdio@520 {
325 #address-cells = <1>;
326 #size-cells = <0>;
327 compatible = "fsl,gianfar-tbi";
328 reg = <0x520 0x20>;
329
330 tbi2: tbi-phy@11 {
331 reg = <0x11>;
332 device_type = "tbi-phy";
333 };
334 };
310 }; 335 };
311 336
312 serial0: serial@4500 { 337 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/gef_sbc610.dts b/arch/powerpc/boot/dts/gef_sbc610.dts
index c0671cc98125..d81201ac2cad 100644
--- a/arch/powerpc/boot/dts/gef_sbc610.dts
+++ b/arch/powerpc/boot/dts/gef_sbc610.dts
@@ -267,14 +267,16 @@
267 enet0: ethernet@24000 { 267 enet0: ethernet@24000 {
268 #address-cells = <1>; 268 #address-cells = <1>;
269 #size-cells = <1>; 269 #size-cells = <1>;
270 cell-index = <0>;
270 device_type = "network"; 271 device_type = "network";
271 model = "eTSEC"; 272 model = "TSEC";
272 compatible = "gianfar"; 273 compatible = "gianfar";
273 reg = <0x24000 0x1000>; 274 reg = <0x24000 0x1000>;
274 ranges = <0x0 0x24000 0x1000>; 275 ranges = <0x0 0x24000 0x1000>;
275 local-mac-address = [ 00 00 00 00 00 00 ]; 276 local-mac-address = [ 00 00 00 00 00 00 ];
276 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; 277 interrupts = <29 2 30 2 34 2>;
277 interrupt-parent = <&mpic>; 278 interrupt-parent = <&mpic>;
279 tbi-handle = <&tbi0>;
278 phy-handle = <&phy0>; 280 phy-handle = <&phy0>;
279 phy-connection-type = "gmii"; 281 phy-connection-type = "gmii";
280 282
@@ -288,25 +290,48 @@
288 interrupt-parent = <&gef_pic>; 290 interrupt-parent = <&gef_pic>;
289 interrupts = <0x9 0x4>; 291 interrupts = <0x9 0x4>;
290 reg = <1>; 292 reg = <1>;
293 device_type = "ethernet-phy";
291 }; 294 };
292 phy2: ethernet-phy@2 { 295 phy2: ethernet-phy@2 {
293 interrupt-parent = <&gef_pic>; 296 interrupt-parent = <&gef_pic>;
294 interrupts = <0x8 0x4>; 297 interrupts = <0x8 0x4>;
295 reg = <3>; 298 reg = <3>;
299 device_type = "ethernet-phy";
300 };
301 tbi0: tbi-phy@11 {
302 reg = <0x11>;
303 device_type = "tbi-phy";
296 }; 304 };
297 }; 305 };
298 }; 306 };
299 307
300 enet1: ethernet@26000 { 308 enet1: ethernet@26000 {
309 #address-cells = <1>;
310 #size-cells = <1>;
311 cell-index = <2>;
301 device_type = "network"; 312 device_type = "network";
302 model = "eTSEC"; 313 model = "TSEC";
303 compatible = "gianfar"; 314 compatible = "gianfar";
304 reg = <0x26000 0x1000>; 315 reg = <0x26000 0x1000>;
316 ranges = <0x0 0x26000 0x1000>;
305 local-mac-address = [ 00 00 00 00 00 00 ]; 317 local-mac-address = [ 00 00 00 00 00 00 ];
306 interrupts = <0x1f 0x2 0x20 0x2 0x21 0x2>; 318 interrupts = <31 2 32 2 33 2>;
307 interrupt-parent = <&mpic>; 319 interrupt-parent = <&mpic>;
320 tbi-handle = <&tbi2>;
308 phy-handle = <&phy2>; 321 phy-handle = <&phy2>;
309 phy-connection-type = "gmii"; 322 phy-connection-type = "gmii";
323
324 mdio@520 {
325 #address-cells = <1>;
326 #size-cells = <0>;
327 compatible = "fsl,gianfar-tbi";
328 reg = <0x520 0x20>;
329
330 tbi2: tbi-phy@11 {
331 reg = <0x11>;
332 device_type = "tbi-phy";
333 };
334 };
310 }; 335 };
311 336
312 serial0: serial@4500 { 337 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/hcu4.dts b/arch/powerpc/boot/dts/hcu4.dts
deleted file mode 100644
index 7988598da4c9..000000000000
--- a/arch/powerpc/boot/dts/hcu4.dts
+++ /dev/null
@@ -1,168 +0,0 @@
1/*
2* Device Tree Source for Netstal Maschinen HCU4
3* based on the IBM Walnut
4*
5* Copyright 2008
6* Niklaus Giger <niklaus.giger@member.fsf.org>
7*
8* Copyright 2007 IBM Corp.
9* Josh Boyer <jwboyer@linux.vnet.ibm.com>
10*
11* This file is licensed under the terms of the GNU General Public
12* License version 2. This program is licensed "as is" without
13* any warranty of any kind, whether express or implied.
14*/
15
16/dts-v1/;
17
18/ {
19 #address-cells = <0x1>;
20 #size-cells = <0x1>;
21 model = "netstal,hcu4";
22 compatible = "netstal,hcu4";
23 dcr-parent = <0x1>;
24
25 aliases {
26 ethernet0 = "/plb/opb/ethernet@ef600800";
27 serial0 = "/plb/opb/serial@ef600300";
28 };
29
30 cpus {
31 #address-cells = <0x1>;
32 #size-cells = <0x0>;
33
34 cpu@0 {
35 device_type = "cpu";
36 model = "PowerPC,405GPr";
37 reg = <0x0>;
38 clock-frequency = <0>; /* Filled in by U-Boot */
39 timebase-frequency = <0x0>; /* Filled in by U-Boot */
40 i-cache-line-size = <0x20>;
41 d-cache-line-size = <0x20>;
42 i-cache-size = <0x4000>;
43 d-cache-size = <0x4000>;
44 dcr-controller;
45 dcr-access-method = "native";
46 linux,phandle = <0x1>;
47 };
48 };
49
50 memory {
51 device_type = "memory";
52 reg = <0x0 0x0>; /* Filled in by U-Boot */
53 };
54
55 UIC0: interrupt-controller {
56 compatible = "ibm,uic";
57 interrupt-controller;
58 cell-index = <0x0>;
59 dcr-reg = <0xc0 0x9>;
60 #address-cells = <0x0>;
61 #size-cells = <0x0>;
62 #interrupt-cells = <0x2>;
63 linux,phandle = <0x2>;
64 };
65
66 plb {
67 compatible = "ibm,plb3";
68 #address-cells = <0x1>;
69 #size-cells = <0x1>;
70 ranges;
71 clock-frequency = <0x0>; /* Filled in by U-Boot */
72
73 SDRAM0: memory-controller {
74 compatible = "ibm,sdram-405gp";
75 dcr-reg = <0x10 0x2>;
76 };
77
78 MAL: mcmal {
79 compatible = "ibm,mcmal-405gp", "ibm,mcmal";
80 dcr-reg = <0x180 0x62>;
81 num-tx-chans = <0x1>;
82 num-rx-chans = <0x1>;
83 interrupt-parent = <0x2>;
84 interrupts = <0xb 0x4 0xc 0x4 0xa 0x4 0xd 0x4 0xe 0x4>;
85 linux,phandle = <0x3>;
86 };
87
88 POB0: opb {
89 compatible = "ibm,opb-405gp", "ibm,opb";
90 #address-cells = <0x1>;
91 #size-cells = <0x1>;
92 ranges = <0xef600000 0xef600000 0xa00000>;
93 dcr-reg = <0xa0 0x5>;
94 clock-frequency = <0x0>; /* Filled in by U-Boot */
95
96 UART0: serial@ef600300 {
97 device_type = "serial";
98 compatible = "ns16550";
99 reg = <0xef600300 0x8>;
100 virtual-reg = <0xef600300>;
101 clock-frequency = <0x0>;/* Filled in by U-Boot */
102 current-speed = <0>; /* Filled in by U-Boot */
103 interrupt-parent = <0x2>;
104 interrupts = <0x0 0x4>;
105 };
106
107 IIC: i2c@ef600500 {
108 compatible = "ibm,iic-405gp", "ibm,iic";
109 reg = <0xef600500 0x11>;
110 interrupt-parent = <0x2>;
111 interrupts = <0x2 0x4>;
112 };
113
114 GPIO: gpio@ef600700 {
115 compatible = "ibm,gpio-405gp";
116 reg = <0xef600700 0x20>;
117 };
118
119 EMAC: ethernet@ef600800 {
120 device_type = "network";
121 compatible = "ibm,emac-405gp", "ibm,emac";
122 interrupt-parent = <0x2>;
123 interrupts = <0xf 0x4 0x9 0x4>;
124 local-mac-address = [00 00 00 00 00 00];
125 reg = <0xef600800 0x70>;
126 mal-device = <0x3>;
127 mal-tx-channel = <0x0>;
128 mal-rx-channel = <0x0>;
129 cell-index = <0x0>;
130 max-frame-size = <0x5dc>;
131 rx-fifo-size = <0x1000>;
132 tx-fifo-size = <0x800>;
133 phy-mode = "rmii";
134 phy-map = <0x1>;
135 };
136 };
137
138 EBC0: ebc {
139 compatible = "ibm,ebc-405gp", "ibm,ebc";
140 dcr-reg = <0x12 0x2>;
141 #address-cells = <0x2>;
142 #size-cells = <0x1>;
143 clock-frequency = <0x0>; /* Filled in by U-Boot */
144
145 sram@0,0 {
146 reg = <0x0 0x0 0x80000>;
147 };
148
149 flash@0,80000 {
150 compatible = "jedec-flash";
151 bank-width = <0x1>;
152 reg = <0x0 0x80000 0x80000>;
153 #address-cells = <0x1>;
154 #size-cells = <0x1>;
155
156 partition@0 {
157 label = "OpenBIOS";
158 reg = <0x0 0x80000>;
159 read-only;
160 };
161 };
162 };
163 };
164
165 chosen {
166 linux,stdout-path = "/plb/opb/serial@ef600300";
167 };
168};
diff --git a/arch/powerpc/boot/dts/ksi8560.dts b/arch/powerpc/boot/dts/ksi8560.dts
index bdb7fc0fa332..296c572ea605 100644
--- a/arch/powerpc/boot/dts/ksi8560.dts
+++ b/arch/powerpc/boot/dts/ksi8560.dts
@@ -306,7 +306,7 @@
306 localbus@fdf05000 { 306 localbus@fdf05000 {
307 #address-cells = <2>; 307 #address-cells = <2>;
308 #size-cells = <1>; 308 #size-cells = <1>;
309 compatible = "fsl,mpc8560-localbus"; 309 compatible = "fsl,mpc8560-localbus", "simple-bus";
310 reg = <0xfdf05000 0x68>; 310 reg = <0xfdf05000 0x68>;
311 311
312 ranges = <0x0 0x0 0xe0000000 0x00800000 312 ranges = <0x0 0x0 0xe0000000 0x00800000
diff --git a/arch/powerpc/boot/dts/mgcoge.dts b/arch/powerpc/boot/dts/mgcoge.dts
index 1360d2f69024..ededaf5ac015 100644
--- a/arch/powerpc/boot/dts/mgcoge.dts
+++ b/arch/powerpc/boot/dts/mgcoge.dts
@@ -213,6 +213,15 @@
213 linux,network-index = <2>; 213 linux,network-index = <2>;
214 fsl,cpm-command = <0x16200300>; 214 fsl,cpm-command = <0x16200300>;
215 }; 215 };
216
217 usb@11b60 {
218 compatible = "fsl,mpc8272-cpm-usb";
219 mode = "peripheral";
220 reg = <0x11b60 0x40 0x8b00 0x100>;
221 interrupts = <11 8>;
222 interrupt-parent = <&PIC>;
223 usb-clock = <5>;
224 };
216 }; 225 };
217 226
218 cpm2_pio_c: gpio-controller@10d40 { 227 cpm2_pio_c: gpio-controller@10d40 {
diff --git a/arch/powerpc/boot/dts/mpc5200b.dtsi b/arch/powerpc/boot/dts/mpc5200b.dtsi
index bc27548e895d..7ab286ab5300 100644
--- a/arch/powerpc/boot/dts/mpc5200b.dtsi
+++ b/arch/powerpc/boot/dts/mpc5200b.dtsi
@@ -147,6 +147,8 @@
147 }; 147 };
148 148
149 spi@f00 { 149 spi@f00 {
150 #address-cells = <1>;
151 #size-cells = <0>;
150 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; 152 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
151 reg = <0xf00 0x20>; 153 reg = <0xf00 0x20>;
152 interrupts = <2 13 0 2 14 0>; 154 interrupts = <2 13 0 2 14 0>;
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts
index b53d1df11e2d..505dc842d808 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -390,7 +390,8 @@
390 #address-cells = <2>; 390 #address-cells = <2>;
391 #size-cells = <1>; 391 #size-cells = <1>;
392 compatible = "fsl,mpc8349e-localbus", 392 compatible = "fsl,mpc8349e-localbus",
393 "fsl,pq2pro-localbus"; 393 "fsl,pq2pro-localbus",
394 "simple-bus";
394 reg = <0xe0005000 0xd8>; 395 reg = <0xe0005000 0xd8>;
395 ranges = <0x0 0x0 0xfe000000 0x1000000 /* flash */ 396 ranges = <0x0 0x0 0xfe000000 0x1000000 /* flash */
396 0x1 0x0 0xf8000000 0x20000 /* VSC 7385 */ 397 0x1 0x0 0xf8000000 0x20000 /* VSC 7385 */
diff --git a/arch/powerpc/boot/dts/p1022ds.dts b/arch/powerpc/boot/dts/p1022ds.dts
index 1be9743ab5e0..b9b8719a6204 100644
--- a/arch/powerpc/boot/dts/p1022ds.dts
+++ b/arch/powerpc/boot/dts/p1022ds.dts
@@ -150,7 +150,7 @@
150 }; 150 };
151 151
152 board-control@3,0 { 152 board-control@3,0 {
153 compatible = "fsl,p1022ds-pixis"; 153 compatible = "fsl,p1022ds-fpga", "fsl,fpga-ngpixis";
154 reg = <3 0 0x30>; 154 reg = <3 0 0x30>;
155 interrupt-parent = <&mpic>; 155 interrupt-parent = <&mpic>;
156 /* 156 /*
diff --git a/arch/powerpc/boot/dts/p2020ds.dts b/arch/powerpc/boot/dts/p2020ds.dts
index dae403100f2f..66f03d6477b2 100644
--- a/arch/powerpc/boot/dts/p2020ds.dts
+++ b/arch/powerpc/boot/dts/p2020ds.dts
@@ -118,6 +118,11 @@
118 }; 118 };
119 }; 119 };
120 120
121 board-control@3,0 {
122 compatible = "fsl,p2020ds-fpga", "fsl,fpga-ngpixis";
123 reg = <0x3 0x0 0x30>;
124 };
125
121 nand@4,0 { 126 nand@4,0 {
122 compatible = "fsl,elbc-fcm-nand"; 127 compatible = "fsl,elbc-fcm-nand";
123 reg = <0x4 0x0 0x40000>; 128 reg = <0x4 0x0 0x40000>;
diff --git a/arch/powerpc/boot/dts/p2040rdb.dts b/arch/powerpc/boot/dts/p2041rdb.dts
index 7d84e391c632..79b6895027c0 100644
--- a/arch/powerpc/boot/dts/p2040rdb.dts
+++ b/arch/powerpc/boot/dts/p2041rdb.dts
@@ -1,5 +1,5 @@
1/* 1/*
2 * P2040RDB Device Tree Source 2 * P2041RDB Device Tree Source
3 * 3 *
4 * Copyright 2011 Freescale Semiconductor Inc. 4 * Copyright 2011 Freescale Semiconductor Inc.
5 * 5 *
@@ -32,11 +32,11 @@
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */ 33 */
34 34
35/include/ "p2040si.dtsi" 35/include/ "p2041si.dtsi"
36 36
37/ { 37/ {
38 model = "fsl,P2040RDB"; 38 model = "fsl,P2041RDB";
39 compatible = "fsl,P2040RDB"; 39 compatible = "fsl,P2041RDB";
40 #address-cells = <2>; 40 #address-cells = <2>;
41 #size-cells = <2>; 41 #size-cells = <2>;
42 interrupt-parent = <&mpic>; 42 interrupt-parent = <&mpic>;
@@ -45,6 +45,10 @@
45 device_type = "memory"; 45 device_type = "memory";
46 }; 46 };
47 47
48 dcsr: dcsr@f00000000 {
49 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
50 };
51
48 soc: soc@ffe000000 { 52 soc: soc@ffe000000 {
49 spi@110000 { 53 spi@110000 {
50 flash@0 { 54 flash@0 {
@@ -97,13 +101,8 @@
97 }; 101 };
98 }; 102 };
99 103
100 usb0: usb@210000 {
101 phy_type = "utmi";
102 };
103
104 usb1: usb@211000 { 104 usb1: usb@211000 {
105 dr_mode = "host"; 105 dr_mode = "host";
106 phy_type = "utmi";
107 }; 106 };
108 }; 107 };
109 108
diff --git a/arch/powerpc/boot/dts/p2040si.dtsi b/arch/powerpc/boot/dts/p2041si.dtsi
index 5fdbb24c0763..f7492edd0dfd 100644
--- a/arch/powerpc/boot/dts/p2040si.dtsi
+++ b/arch/powerpc/boot/dts/p2041si.dtsi
@@ -1,5 +1,5 @@
1/* 1/*
2 * P2040 Silicon Device Tree Source 2 * P2041 Silicon Device Tree Source
3 * 3 *
4 * Copyright 2011 Freescale Semiconductor Inc. 4 * Copyright 2011 Freescale Semiconductor Inc.
5 * 5 *
@@ -35,13 +35,14 @@
35/dts-v1/; 35/dts-v1/;
36 36
37/ { 37/ {
38 compatible = "fsl,P2040"; 38 compatible = "fsl,P2041";
39 #address-cells = <2>; 39 #address-cells = <2>;
40 #size-cells = <2>; 40 #size-cells = <2>;
41 interrupt-parent = <&mpic>; 41 interrupt-parent = <&mpic>;
42 42
43 aliases { 43 aliases {
44 ccsr = &soc; 44 ccsr = &soc;
45 dcsr = &dcsr;
45 46
46 serial0 = &serial0; 47 serial0 = &serial0;
47 serial1 = &serial1; 48 serial1 = &serial1;
@@ -109,6 +110,74 @@
109 }; 110 };
110 }; 111 };
111 112
113 dcsr: dcsr@f00000000 {
114 #address-cells = <1>;
115 #size-cells = <1>;
116 compatible = "fsl,dcsr", "simple-bus";
117
118 dcsr-epu@0 {
119 compatible = "fsl,dcsr-epu";
120 interrupts = <52 2 0 0
121 84 2 0 0
122 85 2 0 0>;
123 interrupt-parent = <&mpic>;
124 reg = <0x0 0x1000>;
125 };
126 dcsr-npc {
127 compatible = "fsl,dcsr-npc";
128 reg = <0x1000 0x1000 0x1000000 0x8000>;
129 };
130 dcsr-nxc@2000 {
131 compatible = "fsl,dcsr-nxc";
132 reg = <0x2000 0x1000>;
133 };
134 dcsr-corenet {
135 compatible = "fsl,dcsr-corenet";
136 reg = <0x8000 0x1000 0xB0000 0x1000>;
137 };
138 dcsr-dpaa@9000 {
139 compatible = "fsl,p2041-dcsr-dpaa", "fsl,dcsr-dpaa";
140 reg = <0x9000 0x1000>;
141 };
142 dcsr-ocn@11000 {
143 compatible = "fsl,p2041-dcsr-ocn", "fsl,dcsr-ocn";
144 reg = <0x11000 0x1000>;
145 };
146 dcsr-ddr@12000 {
147 compatible = "fsl,dcsr-ddr";
148 dev-handle = <&ddr>;
149 reg = <0x12000 0x1000>;
150 };
151 dcsr-nal@18000 {
152 compatible = "fsl,p2041-dcsr-nal", "fsl,dcsr-nal";
153 reg = <0x18000 0x1000>;
154 };
155 dcsr-rcpm@22000 {
156 compatible = "fsl,p2041-dcsr-rcpm", "fsl,dcsr-rcpm";
157 reg = <0x22000 0x1000>;
158 };
159 dcsr-cpu-sb-proxy@40000 {
160 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
161 cpu-handle = <&cpu0>;
162 reg = <0x40000 0x1000>;
163 };
164 dcsr-cpu-sb-proxy@41000 {
165 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
166 cpu-handle = <&cpu1>;
167 reg = <0x41000 0x1000>;
168 };
169 dcsr-cpu-sb-proxy@42000 {
170 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
171 cpu-handle = <&cpu2>;
172 reg = <0x42000 0x1000>;
173 };
174 dcsr-cpu-sb-proxy@43000 {
175 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
176 cpu-handle = <&cpu3>;
177 reg = <0x43000 0x1000>;
178 };
179 };
180
112 soc: soc@ffe000000 { 181 soc: soc@ffe000000 {
113 #address-cells = <1>; 182 #address-cells = <1>;
114 #size-cells = <1>; 183 #size-cells = <1>;
@@ -128,14 +197,14 @@
128 fsl,num-laws = <32>; 197 fsl,num-laws = <32>;
129 }; 198 };
130 199
131 memory-controller@8000 { 200 ddr: memory-controller@8000 {
132 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; 201 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
133 reg = <0x8000 0x1000>; 202 reg = <0x8000 0x1000>;
134 interrupts = <16 2 1 23>; 203 interrupts = <16 2 1 23>;
135 }; 204 };
136 205
137 cpc: l3-cache-controller@10000 { 206 cpc: l3-cache-controller@10000 {
138 compatible = "fsl,p2040-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache"; 207 compatible = "fsl,p2041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
139 reg = <0x10000 0x1000>; 208 reg = <0x10000 0x1000>;
140 interrupts = <16 2 1 27>; 209 interrupts = <16 2 1 27>;
141 }; 210 };
@@ -226,7 +295,7 @@
226 }; 295 };
227 296
228 clockgen: global-utilities@e1000 { 297 clockgen: global-utilities@e1000 {
229 compatible = "fsl,p2040-clockgen", "fsl,qoriq-clockgen-1.0"; 298 compatible = "fsl,p2041-clockgen", "fsl,qoriq-clockgen-1.0";
230 reg = <0xe1000 0x1000>; 299 reg = <0xe1000 0x1000>;
231 clock-frequency = <0>; 300 clock-frequency = <0>;
232 }; 301 };
@@ -238,45 +307,45 @@
238 }; 307 };
239 308
240 sfp: sfp@e8000 { 309 sfp: sfp@e8000 {
241 compatible = "fsl,p2040-sfp", "fsl,qoriq-sfp-1.0"; 310 compatible = "fsl,p2041-sfp", "fsl,qoriq-sfp-1.0";
242 reg = <0xe8000 0x1000>; 311 reg = <0xe8000 0x1000>;
243 }; 312 };
244 313
245 serdes: serdes@ea000 { 314 serdes: serdes@ea000 {
246 compatible = "fsl,p2040-serdes"; 315 compatible = "fsl,p2041-serdes";
247 reg = <0xea000 0x1000>; 316 reg = <0xea000 0x1000>;
248 }; 317 };
249 318
250 dma0: dma@100300 { 319 dma0: dma@100300 {
251 #address-cells = <1>; 320 #address-cells = <1>;
252 #size-cells = <1>; 321 #size-cells = <1>;
253 compatible = "fsl,p2040-dma", "fsl,eloplus-dma"; 322 compatible = "fsl,p2041-dma", "fsl,eloplus-dma";
254 reg = <0x100300 0x4>; 323 reg = <0x100300 0x4>;
255 ranges = <0x0 0x100100 0x200>; 324 ranges = <0x0 0x100100 0x200>;
256 cell-index = <0>; 325 cell-index = <0>;
257 dma-channel@0 { 326 dma-channel@0 {
258 compatible = "fsl,p2040-dma-channel", 327 compatible = "fsl,p2041-dma-channel",
259 "fsl,eloplus-dma-channel"; 328 "fsl,eloplus-dma-channel";
260 reg = <0x0 0x80>; 329 reg = <0x0 0x80>;
261 cell-index = <0>; 330 cell-index = <0>;
262 interrupts = <28 2 0 0>; 331 interrupts = <28 2 0 0>;
263 }; 332 };
264 dma-channel@80 { 333 dma-channel@80 {
265 compatible = "fsl,p2040-dma-channel", 334 compatible = "fsl,p2041-dma-channel",
266 "fsl,eloplus-dma-channel"; 335 "fsl,eloplus-dma-channel";
267 reg = <0x80 0x80>; 336 reg = <0x80 0x80>;
268 cell-index = <1>; 337 cell-index = <1>;
269 interrupts = <29 2 0 0>; 338 interrupts = <29 2 0 0>;
270 }; 339 };
271 dma-channel@100 { 340 dma-channel@100 {
272 compatible = "fsl,p2040-dma-channel", 341 compatible = "fsl,p2041-dma-channel",
273 "fsl,eloplus-dma-channel"; 342 "fsl,eloplus-dma-channel";
274 reg = <0x100 0x80>; 343 reg = <0x100 0x80>;
275 cell-index = <2>; 344 cell-index = <2>;
276 interrupts = <30 2 0 0>; 345 interrupts = <30 2 0 0>;
277 }; 346 };
278 dma-channel@180 { 347 dma-channel@180 {
279 compatible = "fsl,p2040-dma-channel", 348 compatible = "fsl,p2041-dma-channel",
280 "fsl,eloplus-dma-channel"; 349 "fsl,eloplus-dma-channel";
281 reg = <0x180 0x80>; 350 reg = <0x180 0x80>;
282 cell-index = <3>; 351 cell-index = <3>;
@@ -287,33 +356,33 @@
287 dma1: dma@101300 { 356 dma1: dma@101300 {
288 #address-cells = <1>; 357 #address-cells = <1>;
289 #size-cells = <1>; 358 #size-cells = <1>;
290 compatible = "fsl,p2040-dma", "fsl,eloplus-dma"; 359 compatible = "fsl,p2041-dma", "fsl,eloplus-dma";
291 reg = <0x101300 0x4>; 360 reg = <0x101300 0x4>;
292 ranges = <0x0 0x101100 0x200>; 361 ranges = <0x0 0x101100 0x200>;
293 cell-index = <1>; 362 cell-index = <1>;
294 dma-channel@0 { 363 dma-channel@0 {
295 compatible = "fsl,p2040-dma-channel", 364 compatible = "fsl,p2041-dma-channel",
296 "fsl,eloplus-dma-channel"; 365 "fsl,eloplus-dma-channel";
297 reg = <0x0 0x80>; 366 reg = <0x0 0x80>;
298 cell-index = <0>; 367 cell-index = <0>;
299 interrupts = <32 2 0 0>; 368 interrupts = <32 2 0 0>;
300 }; 369 };
301 dma-channel@80 { 370 dma-channel@80 {
302 compatible = "fsl,p2040-dma-channel", 371 compatible = "fsl,p2041-dma-channel",
303 "fsl,eloplus-dma-channel"; 372 "fsl,eloplus-dma-channel";
304 reg = <0x80 0x80>; 373 reg = <0x80 0x80>;
305 cell-index = <1>; 374 cell-index = <1>;
306 interrupts = <33 2 0 0>; 375 interrupts = <33 2 0 0>;
307 }; 376 };
308 dma-channel@100 { 377 dma-channel@100 {
309 compatible = "fsl,p2040-dma-channel", 378 compatible = "fsl,p2041-dma-channel",
310 "fsl,eloplus-dma-channel"; 379 "fsl,eloplus-dma-channel";
311 reg = <0x100 0x80>; 380 reg = <0x100 0x80>;
312 cell-index = <2>; 381 cell-index = <2>;
313 interrupts = <34 2 0 0>; 382 interrupts = <34 2 0 0>;
314 }; 383 };
315 dma-channel@180 { 384 dma-channel@180 {
316 compatible = "fsl,p2040-dma-channel", 385 compatible = "fsl,p2041-dma-channel",
317 "fsl,eloplus-dma-channel"; 386 "fsl,eloplus-dma-channel";
318 reg = <0x180 0x80>; 387 reg = <0x180 0x80>;
319 cell-index = <3>; 388 cell-index = <3>;
@@ -324,22 +393,20 @@
324 spi@110000 { 393 spi@110000 {
325 #address-cells = <1>; 394 #address-cells = <1>;
326 #size-cells = <0>; 395 #size-cells = <0>;
327 compatible = "fsl,p2040-espi", "fsl,mpc8536-espi"; 396 compatible = "fsl,p2041-espi", "fsl,mpc8536-espi";
328 reg = <0x110000 0x1000>; 397 reg = <0x110000 0x1000>;
329 interrupts = <53 0x2 0 0>; 398 interrupts = <53 0x2 0 0>;
330 fsl,espi-num-chipselects = <4>; 399 fsl,espi-num-chipselects = <4>;
331
332 }; 400 };
333 401
334 sdhc: sdhc@114000 { 402 sdhc: sdhc@114000 {
335 compatible = "fsl,p2040-esdhc", "fsl,esdhc"; 403 compatible = "fsl,p2041-esdhc", "fsl,esdhc";
336 reg = <0x114000 0x1000>; 404 reg = <0x114000 0x1000>;
337 interrupts = <48 2 0 0>; 405 interrupts = <48 2 0 0>;
338 sdhci,auto-cmd12; 406 sdhci,auto-cmd12;
339 clock-frequency = <0>; 407 clock-frequency = <0>;
340 }; 408 };
341 409
342
343 i2c@118000 { 410 i2c@118000 {
344 #address-cells = <1>; 411 #address-cells = <1>;
345 #size-cells = <0>; 412 #size-cells = <0>;
@@ -417,7 +484,7 @@
417 }; 484 };
418 485
419 gpio0: gpio@130000 { 486 gpio0: gpio@130000 {
420 compatible = "fsl,p2040-gpio", "fsl,qoriq-gpio"; 487 compatible = "fsl,p2041-gpio", "fsl,qoriq-gpio";
421 reg = <0x130000 0x1000>; 488 reg = <0x130000 0x1000>;
422 interrupts = <55 2 0 0>; 489 interrupts = <55 2 0 0>;
423 #gpio-cells = <2>; 490 #gpio-cells = <2>;
@@ -425,32 +492,34 @@
425 }; 492 };
426 493
427 usb0: usb@210000 { 494 usb0: usb@210000 {
428 compatible = "fsl,p2040-usb2-mph", 495 compatible = "fsl,p2041-usb2-mph",
429 "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; 496 "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
430 reg = <0x210000 0x1000>; 497 reg = <0x210000 0x1000>;
431 #address-cells = <1>; 498 #address-cells = <1>;
432 #size-cells = <0>; 499 #size-cells = <0>;
433 interrupts = <44 0x2 0 0>; 500 interrupts = <44 0x2 0 0>;
501 phy_type = "utmi";
434 port0; 502 port0;
435 }; 503 };
436 504
437 usb1: usb@211000 { 505 usb1: usb@211000 {
438 compatible = "fsl,p2040-usb2-dr", 506 compatible = "fsl,p2041-usb2-dr",
439 "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; 507 "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
440 reg = <0x211000 0x1000>; 508 reg = <0x211000 0x1000>;
441 #address-cells = <1>; 509 #address-cells = <1>;
442 #size-cells = <0>; 510 #size-cells = <0>;
443 interrupts = <45 0x2 0 0>; 511 interrupts = <45 0x2 0 0>;
512 phy_type = "utmi";
444 }; 513 };
445 514
446 sata@220000 { 515 sata@220000 {
447 compatible = "fsl,p2040-sata", "fsl,pq-sata-v2"; 516 compatible = "fsl,p2041-sata", "fsl,pq-sata-v2";
448 reg = <0x220000 0x1000>; 517 reg = <0x220000 0x1000>;
449 interrupts = <68 0x2 0 0>; 518 interrupts = <68 0x2 0 0>;
450 }; 519 };
451 520
452 sata@221000 { 521 sata@221000 {
453 compatible = "fsl,p2040-sata", "fsl,pq-sata-v2"; 522 compatible = "fsl,p2041-sata", "fsl,pq-sata-v2";
454 reg = <0x221000 0x1000>; 523 reg = <0x221000 0x1000>;
455 interrupts = <69 0x2 0 0>; 524 interrupts = <69 0x2 0 0>;
456 }; 525 };
@@ -534,19 +603,19 @@
534 }; 603 };
535 604
536 localbus@ffe124000 { 605 localbus@ffe124000 {
537 compatible = "fsl,p2040-elbc", "fsl,elbc", "simple-bus"; 606 compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus";
538 interrupts = <25 2 0 0>; 607 interrupts = <25 2 0 0>;
539 #address-cells = <2>; 608 #address-cells = <2>;
540 #size-cells = <1>; 609 #size-cells = <1>;
541 }; 610 };
542 611
543 pci0: pcie@ffe200000 { 612 pci0: pcie@ffe200000 {
544 compatible = "fsl,p2040-pcie", "fsl,qoriq-pcie-v2.2"; 613 compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
545 device_type = "pci"; 614 device_type = "pci";
546 #size-cells = <2>; 615 #size-cells = <2>;
547 #address-cells = <3>; 616 #address-cells = <3>;
548 bus-range = <0x0 0xff>; 617 bus-range = <0x0 0xff>;
549 clock-frequency = <0x1fca055>; 618 clock-frequency = <33333333>;
550 fsl,msi = <&msi0>; 619 fsl,msi = <&msi0>;
551 interrupts = <16 2 1 15>; 620 interrupts = <16 2 1 15>;
552 pcie@0 { 621 pcie@0 {
@@ -568,12 +637,12 @@
568 }; 637 };
569 638
570 pci1: pcie@ffe201000 { 639 pci1: pcie@ffe201000 {
571 compatible = "fsl,p2040-pcie", "fsl,qoriq-pcie-v2.2"; 640 compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
572 device_type = "pci"; 641 device_type = "pci";
573 #size-cells = <2>; 642 #size-cells = <2>;
574 #address-cells = <3>; 643 #address-cells = <3>;
575 bus-range = <0 0xff>; 644 bus-range = <0 0xff>;
576 clock-frequency = <0x1fca055>; 645 clock-frequency = <33333333>;
577 fsl,msi = <&msi1>; 646 fsl,msi = <&msi1>;
578 interrupts = <16 2 1 14>; 647 interrupts = <16 2 1 14>;
579 pcie@0 { 648 pcie@0 {
@@ -595,12 +664,12 @@
595 }; 664 };
596 665
597 pci2: pcie@ffe202000 { 666 pci2: pcie@ffe202000 {
598 compatible = "fsl,p2040-pcie", "fsl,qoriq-pcie-v2.2"; 667 compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
599 device_type = "pci"; 668 device_type = "pci";
600 #size-cells = <2>; 669 #size-cells = <2>;
601 #address-cells = <3>; 670 #address-cells = <3>;
602 bus-range = <0x0 0xff>; 671 bus-range = <0x0 0xff>;
603 clock-frequency = <0x1fca055>; 672 clock-frequency = <33333333>;
604 fsl,msi = <&msi2>; 673 fsl,msi = <&msi2>;
605 interrupts = <16 2 1 13>; 674 interrupts = <16 2 1 13>;
606 pcie@0 { 675 pcie@0 {
diff --git a/arch/powerpc/boot/dts/p3041ds.dts b/arch/powerpc/boot/dts/p3041ds.dts
index 69cae674f396..bbd113b49a8f 100644
--- a/arch/powerpc/boot/dts/p3041ds.dts
+++ b/arch/powerpc/boot/dts/p3041ds.dts
@@ -45,6 +45,10 @@
45 device_type = "memory"; 45 device_type = "memory";
46 }; 46 };
47 47
48 dcsr: dcsr@f00000000 {
49 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
50 };
51
48 soc: soc@ffe000000 { 52 soc: soc@ffe000000 {
49 spi@110000 { 53 spi@110000 {
50 flash@0 { 54 flash@0 {
@@ -147,8 +151,8 @@
147 }; 151 };
148 152
149 board-control@3,0 { 153 board-control@3,0 {
150 compatible = "fsl,p3041ds-pixis"; 154 compatible = "fsl,p3041ds-fpga", "fsl,fpga-ngpixis";
151 reg = <3 0 0x20>; 155 reg = <3 0 0x30>;
152 }; 156 };
153 }; 157 };
154 158
diff --git a/arch/powerpc/boot/dts/p3041si.dtsi b/arch/powerpc/boot/dts/p3041si.dtsi
index 8b695801f505..87130b732bc7 100644
--- a/arch/powerpc/boot/dts/p3041si.dtsi
+++ b/arch/powerpc/boot/dts/p3041si.dtsi
@@ -42,6 +42,7 @@
42 42
43 aliases { 43 aliases {
44 ccsr = &soc; 44 ccsr = &soc;
45 dcsr = &dcsr;
45 46
46 serial0 = &serial0; 47 serial0 = &serial0;
47 serial1 = &serial1; 48 serial1 = &serial1;
@@ -114,6 +115,74 @@
114 }; 115 };
115 }; 116 };
116 117
118 dcsr: dcsr@f00000000 {
119 #address-cells = <1>;
120 #size-cells = <1>;
121 compatible = "fsl,dcsr", "simple-bus";
122
123 dcsr-epu@0 {
124 compatible = "fsl,dcsr-epu";
125 interrupts = <52 2 0 0
126 84 2 0 0
127 85 2 0 0>;
128 interrupt-parent = <&mpic>;
129 reg = <0x0 0x1000>;
130 };
131 dcsr-npc {
132 compatible = "fsl,dcsr-npc";
133 reg = <0x1000 0x1000 0x1000000 0x8000>;
134 };
135 dcsr-nxc@2000 {
136 compatible = "fsl,dcsr-nxc";
137 reg = <0x2000 0x1000>;
138 };
139 dcsr-corenet {
140 compatible = "fsl,dcsr-corenet";
141 reg = <0x8000 0x1000 0xB0000 0x1000>;
142 };
143 dcsr-dpaa@9000 {
144 compatible = "fsl,p43041-dcsr-dpaa", "fsl,dcsr-dpaa";
145 reg = <0x9000 0x1000>;
146 };
147 dcsr-ocn@11000 {
148 compatible = "fsl,p43041-dcsr-ocn", "fsl,dcsr-ocn";
149 reg = <0x11000 0x1000>;
150 };
151 dcsr-ddr@12000 {
152 compatible = "fsl,dcsr-ddr";
153 dev-handle = <&ddr>;
154 reg = <0x12000 0x1000>;
155 };
156 dcsr-nal@18000 {
157 compatible = "fsl,p43041-dcsr-nal", "fsl,dcsr-nal";
158 reg = <0x18000 0x1000>;
159 };
160 dcsr-rcpm@22000 {
161 compatible = "fsl,p43041-dcsr-rcpm", "fsl,dcsr-rcpm";
162 reg = <0x22000 0x1000>;
163 };
164 dcsr-cpu-sb-proxy@40000 {
165 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
166 cpu-handle = <&cpu0>;
167 reg = <0x40000 0x1000>;
168 };
169 dcsr-cpu-sb-proxy@41000 {
170 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
171 cpu-handle = <&cpu1>;
172 reg = <0x41000 0x1000>;
173 };
174 dcsr-cpu-sb-proxy@42000 {
175 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
176 cpu-handle = <&cpu2>;
177 reg = <0x42000 0x1000>;
178 };
179 dcsr-cpu-sb-proxy@43000 {
180 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
181 cpu-handle = <&cpu3>;
182 reg = <0x43000 0x1000>;
183 };
184 };
185
117 soc: soc@ffe000000 { 186 soc: soc@ffe000000 {
118 #address-cells = <1>; 187 #address-cells = <1>;
119 #size-cells = <1>; 188 #size-cells = <1>;
@@ -133,7 +202,7 @@
133 fsl,num-laws = <32>; 202 fsl,num-laws = <32>;
134 }; 203 };
135 204
136 memory-controller@8000 { 205 ddr: memory-controller@8000 {
137 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; 206 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
138 reg = <0x8000 0x1000>; 207 reg = <0x8000 0x1000>;
139 interrupts = <16 2 1 23>; 208 interrupts = <16 2 1 23>;
diff --git a/arch/powerpc/boot/dts/p3060qds.dts b/arch/powerpc/boot/dts/p3060qds.dts
new file mode 100644
index 000000000000..08b9193213e7
--- /dev/null
+++ b/arch/powerpc/boot/dts/p3060qds.dts
@@ -0,0 +1,238 @@
1/*
2 * P3060QDS Device Tree Source
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "p3060si.dtsi"
36
37/ {
38 model = "fsl,P3060QDS";
39 compatible = "fsl,P3060QDS";
40 #address-cells = <2>;
41 #size-cells = <2>;
42 interrupt-parent = <&mpic>;
43
44 memory {
45 device_type = "memory";
46 };
47
48 dcsr: dcsr@f00000000 {
49 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
50 };
51
52 soc: soc@ffe000000 {
53 spi@110000 {
54 flash@0 {
55 #address-cells = <1>;
56 #size-cells = <1>;
57 compatible = "spansion,s25sl12801";
58 reg = <0>;
59 spi-max-frequency = <40000000>; /* input clock */
60 partition@u-boot {
61 label = "u-boot";
62 reg = <0x00000000 0x00100000>;
63 read-only;
64 };
65 partition@kernel {
66 label = "kernel";
67 reg = <0x00100000 0x00500000>;
68 read-only;
69 };
70 partition@dtb {
71 label = "dtb";
72 reg = <0x00600000 0x00100000>;
73 read-only;
74 };
75 partition@fs {
76 label = "file system";
77 reg = <0x00700000 0x00900000>;
78 };
79 };
80 flash@1 {
81 #address-cells = <1>;
82 #size-cells = <1>;
83 compatible = "spansion,en25q32b";
84 reg = <1>;
85 spi-max-frequency = <40000000>; /* input clock */
86 partition@spi1 {
87 label = "spi1";
88 reg = <0x00000000 0x00400000>;
89 };
90 };
91 flash@2 {
92 #address-cells = <1>;
93 #size-cells = <1>;
94 compatible = "atmel,at45db081d";
95 reg = <2>;
96 spi-max-frequency = <40000000>; /* input clock */
97 partition@spi1 {
98 label = "spi2";
99 reg = <0x00000000 0x00100000>;
100 };
101 };
102 flash@3 {
103 #address-cells = <1>;
104 #size-cells = <1>;
105 compatible = "spansion,sst25wf040";
106 reg = <3>;
107 spi-max-frequency = <40000000>; /* input clock */
108 partition@spi3 {
109 label = "spi3";
110 reg = <0x00000000 0x00080000>;
111 };
112 };
113 };
114
115 i2c@118000 {
116 eeprom@51 {
117 compatible = "at24,24c256";
118 reg = <0x51>;
119 };
120 eeprom@53 {
121 compatible = "at24,24c256";
122 reg = <0x53>;
123 };
124 rtc@68 {
125 compatible = "dallas,ds3232";
126 reg = <0x68>;
127 interrupts = <0x1 0x1 0 0>;
128 };
129 };
130
131 usb0: usb@210000 {
132 phy_type = "ulpi";
133 };
134
135 usb1: usb@211000 {
136 dr_mode = "host";
137 phy_type = "ulpi";
138 };
139 };
140
141 rapidio@ffe0c0000 {
142 reg = <0xf 0xfe0c0000 0 0x11000>;
143
144 port1 {
145 ranges = <0 0 0xc 0x20000000 0 0x10000000>;
146 };
147 port2 {
148 ranges = <0 0 0xc 0x30000000 0 0x10000000>;
149 };
150 };
151
152 localbus@ffe124000 {
153 reg = <0xf 0xfe124000 0 0x1000>;
154 ranges = <0 0 0xf 0xe8000000 0x08000000
155 2 0 0xf 0xffa00000 0x00040000
156 3 0 0xf 0xffdf0000 0x00008000>;
157
158 flash@0,0 {
159 compatible = "cfi-flash";
160 reg = <0 0 0x08000000>;
161 bank-width = <2>;
162 device-width = <2>;
163 };
164
165 nand@2,0 {
166 #address-cells = <1>;
167 #size-cells = <1>;
168 compatible = "fsl,elbc-fcm-nand";
169 reg = <0x2 0x0 0x40000>;
170
171 partition@0 {
172 label = "NAND U-Boot Image";
173 reg = <0x0 0x02000000>;
174 read-only;
175 };
176
177 partition@2000000 {
178 label = "NAND Root File System";
179 reg = <0x02000000 0x10000000>;
180 };
181
182 partition@12000000 {
183 label = "NAND Compressed RFS Image";
184 reg = <0x12000000 0x08000000>;
185 };
186
187 partition@1a000000 {
188 label = "NAND Linux Kernel Image";
189 reg = <0x1a000000 0x04000000>;
190 };
191
192 partition@1e000000 {
193 label = "NAND DTB Image";
194 reg = <0x1e000000 0x01000000>;
195 };
196
197 partition@1f000000 {
198 label = "NAND Writable User area";
199 reg = <0x1f000000 0x21000000>;
200 };
201 };
202
203 board-control@3,0 {
204 compatible = "fsl,p3060qds-fpga", "fsl,fpga-qixis";
205 reg = <3 0 0x100>;
206 };
207 };
208
209 pci0: pcie@ffe200000 {
210 reg = <0xf 0xfe200000 0 0x1000>;
211 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
212 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
213 pcie@0 {
214 ranges = <0x02000000 0 0xe0000000
215 0x02000000 0 0xe0000000
216 0 0x20000000
217
218 0x01000000 0 0x00000000
219 0x01000000 0 0x00000000
220 0 0x00010000>;
221 };
222 };
223
224 pci1: pcie@ffe201000 {
225 reg = <0xf 0xfe201000 0 0x1000>;
226 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
227 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
228 pcie@0 {
229 ranges = <0x02000000 0 0xe0000000
230 0x02000000 0 0xe0000000
231 0 0x20000000
232
233 0x01000000 0 0x00000000
234 0x01000000 0 0x00000000
235 0 0x00010000>;
236 };
237 };
238};
diff --git a/arch/powerpc/boot/dts/p3060si.dtsi b/arch/powerpc/boot/dts/p3060si.dtsi
new file mode 100644
index 000000000000..68947e157bbc
--- /dev/null
+++ b/arch/powerpc/boot/dts/p3060si.dtsi
@@ -0,0 +1,719 @@
1/*
2 * P3060 Silicon Device Tree Source
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36
37/ {
38 compatible = "fsl,P3060";
39 #address-cells = <2>;
40 #size-cells = <2>;
41 interrupt-parent = <&mpic>;
42
43 aliases {
44 ccsr = &soc;
45 dcsr = &dcsr;
46
47 serial0 = &serial0;
48 serial1 = &serial1;
49 serial2 = &serial2;
50 serial3 = &serial3;
51 pci0 = &pci0;
52 pci1 = &pci1;
53 usb0 = &usb0;
54 usb1 = &usb1;
55 dma0 = &dma0;
56 dma1 = &dma1;
57 msi0 = &msi0;
58 msi1 = &msi1;
59 msi2 = &msi2;
60
61 crypto = &crypto;
62 sec_jr0 = &sec_jr0;
63 sec_jr1 = &sec_jr1;
64 sec_jr2 = &sec_jr2;
65 sec_jr3 = &sec_jr3;
66 rtic_a = &rtic_a;
67 rtic_b = &rtic_b;
68 rtic_c = &rtic_c;
69 rtic_d = &rtic_d;
70 sec_mon = &sec_mon;
71 };
72
73 cpus {
74 #address-cells = <1>;
75 #size-cells = <0>;
76
77 cpu0: PowerPC,e500mc@0 {
78 device_type = "cpu";
79 reg = <0>;
80 next-level-cache = <&L2_0>;
81 L2_0: l2-cache {
82 next-level-cache = <&cpc>;
83 };
84 };
85 cpu1: PowerPC,e500mc@1 {
86 device_type = "cpu";
87 reg = <1>;
88 next-level-cache = <&L2_1>;
89 L2_1: l2-cache {
90 next-level-cache = <&cpc>;
91 };
92 };
93 cpu4: PowerPC,e500mc@4 {
94 device_type = "cpu";
95 reg = <4>;
96 next-level-cache = <&L2_4>;
97 L2_4: l2-cache {
98 next-level-cache = <&cpc>;
99 };
100 };
101 cpu5: PowerPC,e500mc@5 {
102 device_type = "cpu";
103 reg = <5>;
104 next-level-cache = <&L2_5>;
105 L2_5: l2-cache {
106 next-level-cache = <&cpc>;
107 };
108 };
109 cpu6: PowerPC,e500mc@6 {
110 device_type = "cpu";
111 reg = <6>;
112 next-level-cache = <&L2_6>;
113 L2_6: l2-cache {
114 next-level-cache = <&cpc>;
115 };
116 };
117 cpu7: PowerPC,e500mc@7 {
118 device_type = "cpu";
119 reg = <7>;
120 next-level-cache = <&L2_7>;
121 L2_7: l2-cache {
122 next-level-cache = <&cpc>;
123 };
124 };
125 };
126
127 dcsr: dcsr@f00000000 {
128 #address-cells = <1>;
129 #size-cells = <1>;
130 compatible = "fsl,dcsr", "simple-bus";
131
132 dcsr-epu@0 {
133 compatible = "fsl,dcsr-epu";
134 interrupts = <52 2 0 0
135 84 2 0 0
136 85 2 0 0>;
137 interrupt-parent = <&mpic>;
138 reg = <0x0 0x1000>;
139 };
140 dcsr-npc {
141 compatible = "fsl,dcsr-npc";
142 reg = <0x1000 0x1000 0x1000000 0x8000>;
143 };
144 dcsr-nxc@2000 {
145 compatible = "fsl,dcsr-nxc";
146 reg = <0x2000 0x1000>;
147 };
148 dcsr-corenet {
149 compatible = "fsl,dcsr-corenet";
150 reg = <0x8000 0x1000 0xB0000 0x1000>;
151 };
152 dcsr-dpaa@9000 {
153 compatible = "fsl,p3060-dcsr-dpaa", "fsl,dcsr-dpaa";
154 reg = <0x9000 0x1000>;
155 };
156 dcsr-ocn@11000 {
157 compatible = "fsl,p3060-dcsr-ocn", "fsl,dcsr-ocn";
158 reg = <0x11000 0x1000>;
159 };
160 dcsr-ddr@12000 {
161 compatible = "fsl,dcsr-ddr";
162 dev-handle = <&ddr>;
163 reg = <0x12000 0x1000>;
164 };
165 dcsr-nal@18000 {
166 compatible = "fsl,p3060-dcsr-nal", "fsl,dcsr-nal";
167 reg = <0x18000 0x1000>;
168 };
169 dcsr-rcpm@22000 {
170 compatible = "fsl,p3060-dcsr-rcpm", "fsl,dcsr-rcpm";
171 reg = <0x22000 0x1000>;
172 };
173 dcsr-cpu-sb-proxy@40000 {
174 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
175 cpu-handle = <&cpu0>;
176 reg = <0x40000 0x1000>;
177 };
178 dcsr-cpu-sb-proxy@41000 {
179 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
180 cpu-handle = <&cpu1>;
181 reg = <0x41000 0x1000>;
182 };
183 dcsr-cpu-sb-proxy@44000 {
184 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
185 cpu-handle = <&cpu4>;
186 reg = <0x44000 0x1000>;
187 };
188 dcsr-cpu-sb-proxy@45000 {
189 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
190 cpu-handle = <&cpu5>;
191 reg = <0x45000 0x1000>;
192 };
193 dcsr-cpu-sb-proxy@46000 {
194 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
195 cpu-handle = <&cpu6>;
196 reg = <0x46000 0x1000>;
197 };
198 dcsr-cpu-sb-proxy@47000 {
199 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
200 cpu-handle = <&cpu7>;
201 reg = <0x47000 0x1000>;
202 };
203 };
204
205 soc: soc@ffe000000 {
206 #address-cells = <1>;
207 #size-cells = <1>;
208 device_type = "soc";
209 compatible = "simple-bus";
210 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
211 reg = <0xf 0xfe000000 0 0x00001000>;
212
213 soc-sram-error {
214 compatible = "fsl,soc-sram-error";
215 interrupts = <16 2 1 29>;
216 };
217
218 corenet-law@0 {
219 compatible = "fsl,corenet-law";
220 reg = <0x0 0x1000>;
221 fsl,num-laws = <32>;
222 };
223
224 ddr: memory-controller@8000 {
225 compatible = "fsl,qoriq-memory-controller-v4.4", "fsl,qoriq-memory-controller";
226 reg = <0x8000 0x1000>;
227 interrupts = <16 2 1 23>;
228 };
229
230 cpc: l3-cache-controller@10000 {
231 compatible = "fsl,p3060-l3-cache-controller", "cache";
232 reg = <0x10000 0x1000
233 0x11000 0x1000>;
234 interrupts = <16 2 1 27>;
235 };
236
237 corenet-cf@18000 {
238 compatible = "fsl,corenet-cf";
239 reg = <0x18000 0x1000>;
240 interrupts = <16 2 1 31>;
241 fsl,ccf-num-csdids = <32>;
242 fsl,ccf-num-snoopids = <32>;
243 };
244
245 iommu@20000 {
246 compatible = "fsl,pamu-v1.0", "fsl,pamu";
247 reg = <0x20000 0x5000>;
248 interrupts = <
249 24 2 0 0
250 16 2 1 30>;
251 };
252
253 mpic: pic@40000 {
254 clock-frequency = <0>;
255 interrupt-controller;
256 #address-cells = <0>;
257 #interrupt-cells = <4>;
258 reg = <0x40000 0x40000>;
259 compatible = "fsl,mpic", "chrp,open-pic";
260 device_type = "open-pic";
261 };
262
263 msi0: msi@41600 {
264 compatible = "fsl,mpic-msi";
265 reg = <0x41600 0x200>;
266 msi-available-ranges = <0 0x100>;
267 interrupts = <
268 0xe0 0 0 0
269 0xe1 0 0 0
270 0xe2 0 0 0
271 0xe3 0 0 0
272 0xe4 0 0 0
273 0xe5 0 0 0
274 0xe6 0 0 0
275 0xe7 0 0 0>;
276 };
277
278 msi1: msi@41800 {
279 compatible = "fsl,mpic-msi";
280 reg = <0x41800 0x200>;
281 msi-available-ranges = <0 0x100>;
282 interrupts = <
283 0xe8 0 0 0
284 0xe9 0 0 0
285 0xea 0 0 0
286 0xeb 0 0 0
287 0xec 0 0 0
288 0xed 0 0 0
289 0xee 0 0 0
290 0xef 0 0 0>;
291 };
292
293 msi2: msi@41a00 {
294 compatible = "fsl,mpic-msi";
295 reg = <0x41a00 0x200>;
296 msi-available-ranges = <0 0x100>;
297 interrupts = <
298 0xf0 0 0 0
299 0xf1 0 0 0
300 0xf2 0 0 0
301 0xf3 0 0 0
302 0xf4 0 0 0
303 0xf5 0 0 0
304 0xf6 0 0 0
305 0xf7 0 0 0>;
306 };
307
308 rmu: rmu@d3000 {
309 #address-cells = <1>;
310 #size-cells = <1>;
311 compatible = "fsl,srio-rmu";
312 reg = <0xd3000 0x500>;
313 ranges = <0x0 0xd3000 0x500>;
314
315 message-unit@0 {
316 compatible = "fsl,srio-msg-unit";
317 reg = <0x0 0x100>;
318 interrupts = <
319 60 2 0 0 /* msg1_tx_irq */
320 61 2 0 0>;/* msg1_rx_irq */
321 };
322 message-unit@100 {
323 compatible = "fsl,srio-msg-unit";
324 reg = <0x100 0x100>;
325 interrupts = <
326 62 2 0 0 /* msg2_tx_irq */
327 63 2 0 0>;/* msg2_rx_irq */
328 };
329 doorbell-unit@400 {
330 compatible = "fsl,srio-dbell-unit";
331 reg = <0x400 0x80>;
332 interrupts = <
333 56 2 0 0 /* bell_outb_irq */
334 57 2 0 0>;/* bell_inb_irq */
335 };
336 port-write-unit@4e0 {
337 compatible = "fsl,srio-port-write-unit";
338 reg = <0x4e0 0x20>;
339 interrupts = <16 2 1 11>;
340 };
341 };
342
343 guts: global-utilities@e0000 {
344 compatible = "fsl,qoriq-device-config-1.0";
345 reg = <0xe0000 0xe00>;
346 fsl,has-rstcr;
347 #sleep-cells = <1>;
348 fsl,liodn-bits = <12>;
349 };
350
351 pins: global-utilities@e0e00 {
352 compatible = "fsl,qoriq-pin-control-1.0";
353 reg = <0xe0e00 0x200>;
354 #sleep-cells = <2>;
355 };
356
357 clockgen: global-utilities@e1000 {
358 compatible = "fsl,p3060-clockgen", "fsl,qoriq-clockgen-1.0";
359 reg = <0xe1000 0x1000>;
360 clock-frequency = <0>;
361 };
362
363 rcpm: global-utilities@e2000 {
364 compatible = "fsl,qoriq-rcpm-1.0";
365 reg = <0xe2000 0x1000>;
366 #sleep-cells = <1>;
367 };
368
369 sfp: sfp@e8000 {
370 compatible = "fsl,p3060-sfp", "fsl,qoriq-sfp-1.0";
371 reg = <0xe8000 0x1000>;
372 };
373
374 serdes: serdes@ea000 {
375 compatible = "fsl,p3060-serdes";
376 reg = <0xea000 0x1000>;
377 };
378
379 dma0: dma@100300 {
380 #address-cells = <1>;
381 #size-cells = <1>;
382 compatible = "fsl,p3060-dma", "fsl,eloplus-dma";
383 reg = <0x100300 0x4>;
384 ranges = <0x0 0x100100 0x200>;
385 cell-index = <0>;
386 dma-channel@0 {
387 compatible = "fsl,p3060-dma-channel",
388 "fsl,eloplus-dma-channel";
389 reg = <0x0 0x80>;
390 cell-index = <0>;
391 interrupts = <28 2 0 0>;
392 };
393 dma-channel@80 {
394 compatible = "fsl,p3060-dma-channel",
395 "fsl,eloplus-dma-channel";
396 reg = <0x80 0x80>;
397 cell-index = <1>;
398 interrupts = <29 2 0 0>;
399 };
400 dma-channel@100 {
401 compatible = "fsl,p3060-dma-channel",
402 "fsl,eloplus-dma-channel";
403 reg = <0x100 0x80>;
404 cell-index = <2>;
405 interrupts = <30 2 0 0>;
406 };
407 dma-channel@180 {
408 compatible = "fsl,p3060-dma-channel",
409 "fsl,eloplus-dma-channel";
410 reg = <0x180 0x80>;
411 cell-index = <3>;
412 interrupts = <31 2 0 0>;
413 };
414 };
415
416 dma1: dma@101300 {
417 #address-cells = <1>;
418 #size-cells = <1>;
419 compatible = "fsl,p3060-dma", "fsl,eloplus-dma";
420 reg = <0x101300 0x4>;
421 ranges = <0x0 0x101100 0x200>;
422 cell-index = <1>;
423 dma-channel@0 {
424 compatible = "fsl,p3060-dma-channel",
425 "fsl,eloplus-dma-channel";
426 reg = <0x0 0x80>;
427 cell-index = <0>;
428 interrupts = <32 2 0 0>;
429 };
430 dma-channel@80 {
431 compatible = "fsl,p3060-dma-channel",
432 "fsl,eloplus-dma-channel";
433 reg = <0x80 0x80>;
434 cell-index = <1>;
435 interrupts = <33 2 0 0>;
436 };
437 dma-channel@100 {
438 compatible = "fsl,p3060-dma-channel",
439 "fsl,eloplus-dma-channel";
440 reg = <0x100 0x80>;
441 cell-index = <2>;
442 interrupts = <34 2 0 0>;
443 };
444 dma-channel@180 {
445 compatible = "fsl,p3060-dma-channel",
446 "fsl,eloplus-dma-channel";
447 reg = <0x180 0x80>;
448 cell-index = <3>;
449 interrupts = <35 2 0 0>;
450 };
451 };
452
453 spi@110000 {
454 #address-cells = <1>;
455 #size-cells = <0>;
456 compatible = "fsl,p3060-espi", "fsl,mpc8536-espi";
457 reg = <0x110000 0x1000>;
458 interrupts = <53 0x2 0 0>;
459 fsl,espi-num-chipselects = <4>;
460 };
461
462 i2c@118000 {
463 #address-cells = <1>;
464 #size-cells = <0>;
465 cell-index = <0>;
466 compatible = "fsl-i2c";
467 reg = <0x118000 0x100>;
468 interrupts = <38 2 0 0>;
469 dfsrr;
470 };
471
472 i2c@118100 {
473 #address-cells = <1>;
474 #size-cells = <0>;
475 cell-index = <1>;
476 compatible = "fsl-i2c";
477 reg = <0x118100 0x100>;
478 interrupts = <38 2 0 0>;
479 dfsrr;
480 };
481
482 i2c@119000 {
483 #address-cells = <1>;
484 #size-cells = <0>;
485 cell-index = <2>;
486 compatible = "fsl-i2c";
487 reg = <0x119000 0x100>;
488 interrupts = <39 2 0 0>;
489 dfsrr;
490 };
491
492 i2c@119100 {
493 #address-cells = <1>;
494 #size-cells = <0>;
495 cell-index = <3>;
496 compatible = "fsl-i2c";
497 reg = <0x119100 0x100>;
498 interrupts = <39 2 0 0>;
499 dfsrr;
500 };
501
502 serial0: serial@11c500 {
503 cell-index = <0>;
504 device_type = "serial";
505 compatible = "ns16550";
506 reg = <0x11c500 0x100>;
507 clock-frequency = <0>;
508 interrupts = <36 2 0 0>;
509 };
510
511 serial1: serial@11c600 {
512 cell-index = <1>;
513 device_type = "serial";
514 compatible = "ns16550";
515 reg = <0x11c600 0x100>;
516 clock-frequency = <0>;
517 interrupts = <36 2 0 0>;
518 };
519
520 serial2: serial@11d500 {
521 cell-index = <2>;
522 device_type = "serial";
523 compatible = "ns16550";
524 reg = <0x11d500 0x100>;
525 clock-frequency = <0>;
526 interrupts = <37 2 0 0>;
527 };
528
529 serial3: serial@11d600 {
530 cell-index = <3>;
531 device_type = "serial";
532 compatible = "ns16550";
533 reg = <0x11d600 0x100>;
534 clock-frequency = <0>;
535 interrupts = <37 2 0 0>;
536 };
537
538 gpio0: gpio@130000 {
539 compatible = "fsl,p3060-gpio", "fsl,qoriq-gpio";
540 reg = <0x130000 0x1000>;
541 interrupts = <55 2 0 0>;
542 #gpio-cells = <2>;
543 gpio-controller;
544 };
545
546 usb0: usb@210000 {
547 compatible = "fsl,p3060-usb2-mph",
548 "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
549 reg = <0x210000 0x1000>;
550 #address-cells = <1>;
551 #size-cells = <0>;
552 interrupts = <44 0x2 0 0>;
553 };
554
555 usb1: usb@211000 {
556 compatible = "fsl,p3060-usb2-dr",
557 "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
558 reg = <0x211000 0x1000>;
559 #address-cells = <1>;
560 #size-cells = <0>;
561 interrupts = <45 0x2 0 0>;
562 };
563
564 crypto: crypto@300000 {
565 compatible = "fsl,sec-v4.1", "fsl,sec-v4.0";
566 #address-cells = <1>;
567 #size-cells = <1>;
568 reg = <0x300000 0x10000>;
569 ranges = <0 0x300000 0x10000>;
570 interrupt-parent = <&mpic>;
571 interrupts = <92 2 0 0>;
572
573 sec_jr0: jr@1000 {
574 compatible = "fsl,sec-v4.1-job-ring", "fsl,sec-v4.0-job-ring";
575 reg = <0x1000 0x1000>;
576 interrupt-parent = <&mpic>;
577 interrupts = <88 2 0 0>;
578 };
579
580 sec_jr1: jr@2000 {
581 compatible = "fsl,sec-v4.1-job-ring", "fsl,sec-v4.0-job-ring";
582 reg = <0x2000 0x1000>;
583 interrupt-parent = <&mpic>;
584 interrupts = <89 2 0 0>;
585 };
586
587 sec_jr2: jr@3000 {
588 compatible = "fsl,sec-v4.1-job-ring", "fsl,sec-v4.0-job-ring";
589 reg = <0x3000 0x1000>;
590 interrupt-parent = <&mpic>;
591 interrupts = <90 2 0 0>;
592 };
593
594 sec_jr3: jr@4000 {
595 compatible = "fsl,sec-v4.1-job-ring", "fsl,sec-v4.0-job-ring";
596 reg = <0x4000 0x1000>;
597 interrupt-parent = <&mpic>;
598 interrupts = <91 2 0 0>;
599 };
600
601 rtic@6000 {
602 compatible = "fsl,sec-v4.1-rtic", "fsl,sec-v4.0-rtic";
603 #address-cells = <1>;
604 #size-cells = <1>;
605 reg = <0x6000 0x100>;
606 ranges = <0x0 0x6100 0xe00>;
607
608 rtic_a: rtic-a@0 {
609 compatible = "fsl,sec-v4.1-rtic-memory", "fsl,sec-v4.0-rtic-memory";
610 reg = <0x00 0x20 0x100 0x80>;
611 };
612
613 rtic_b: rtic-b@20 {
614 compatible = "fsl,sec-v4.1-rtic-memory", "fsl,sec-v4.0-rtic-memory";
615 reg = <0x20 0x20 0x200 0x80>;
616 };
617
618 rtic_c: rtic-c@40 {
619 compatible = "fsl,sec-v4.1-rtic-memory", "fsl,sec-v4.0-rtic-memory";
620 reg = <0x40 0x20 0x300 0x80>;
621 };
622
623 rtic_d: rtic-d@60 {
624 compatible = "fsl,sec-v4.1-rtic-memory", "fsl,sec-v4.0-rtic-memory";
625 reg = <0x60 0x20 0x500 0x80>;
626 };
627 };
628 };
629
630 sec_mon: sec_mon@314000 {
631 compatible = "fsl,sec-v4.1-mon", "fsl,sec-v4.0-mon";
632 reg = <0x314000 0x1000>;
633 interrupt-parent = <&mpic>;
634 interrupts = <93 2 0 0>;
635 };
636 };
637
638 rapidio@ffe0c0000 {
639 compatible = "fsl,srio";
640 interrupts = <16 2 1 11>;
641 #address-cells = <2>;
642 #size-cells = <2>;
643 fsl,srio-rmu-handle = <&rmu>;
644 ranges;
645
646 port1 {
647 #address-cells = <2>;
648 #size-cells = <2>;
649 cell-index = <1>;
650 };
651
652 port2 {
653 #address-cells = <2>;
654 #size-cells = <2>;
655 cell-index = <2>;
656 };
657 };
658
659 localbus@ffe124000 {
660 compatible = "fsl,p3060-elbc", "fsl,elbc", "simple-bus";
661 interrupts = <25 2 0 0>;
662 #address-cells = <2>;
663 #size-cells = <1>;
664 };
665
666 pci0: pcie@ffe200000 {
667 compatible = "fsl,p3060-pcie", "fsl,qoriq-pcie-v2.2";
668 device_type = "pci";
669 #size-cells = <2>;
670 #address-cells = <3>;
671 bus-range = <0x0 0xff>;
672 clock-frequency = <33333333>;
673 fsl,msi = <&msi0>;
674 interrupts = <16 2 1 15>;
675 pcie@0 {
676 reg = <0 0 0 0 0>;
677 #interrupt-cells = <1>;
678 #size-cells = <2>;
679 #address-cells = <3>;
680 device_type = "pci";
681 interrupts = <16 2 1 15>;
682 interrupt-map-mask = <0xf800 0 0 7>;
683 interrupt-map = <
684 /* IDSEL 0x0 */
685 0000 0 0 1 &mpic 40 1 0 0
686 0000 0 0 2 &mpic 1 1 0 0
687 0000 0 0 3 &mpic 2 1 0 0
688 0000 0 0 4 &mpic 3 1 0 0
689 >;
690 };
691 };
692
693 pci1: pcie@ffe201000 {
694 compatible = "fsl,p3060-pcie", "fsl,qoriq-pcie-v2.2";
695 device_type = "pci";
696 #size-cells = <2>;
697 #address-cells = <3>;
698 bus-range = <0 0xff>;
699 clock-frequency = <33333333>;
700 fsl,msi = <&msi1>;
701 interrupts = <16 2 1 14>;
702 pcie@0 {
703 reg = <0 0 0 0 0>;
704 #interrupt-cells = <1>;
705 #size-cells = <2>;
706 #address-cells = <3>;
707 device_type = "pci";
708 interrupts = <16 2 1 14>;
709 interrupt-map-mask = <0xf800 0 0 7>;
710 interrupt-map = <
711 /* IDSEL 0x0 */
712 0000 0 0 1 &mpic 41 1 0 0
713 0000 0 0 2 &mpic 5 1 0 0
714 0000 0 0 3 &mpic 6 1 0 0
715 0000 0 0 4 &mpic 7 1 0 0
716 >;
717 };
718 };
719};
diff --git a/arch/powerpc/boot/dts/p4080ds.dts b/arch/powerpc/boot/dts/p4080ds.dts
index eb11098bb687..c7916dc28014 100644
--- a/arch/powerpc/boot/dts/p4080ds.dts
+++ b/arch/powerpc/boot/dts/p4080ds.dts
@@ -45,6 +45,10 @@
45 device_type = "memory"; 45 device_type = "memory";
46 }; 46 };
47 47
48 dcsr: dcsr@f00000000 {
49 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
50 };
51
48 soc: soc@ffe000000 { 52 soc: soc@ffe000000 {
49 spi@110000 { 53 spi@110000 {
50 flash@0 { 54 flash@0 {
@@ -108,7 +112,8 @@
108 112
109 localbus@ffe124000 { 113 localbus@ffe124000 {
110 reg = <0xf 0xfe124000 0 0x1000>; 114 reg = <0xf 0xfe124000 0 0x1000>;
111 ranges = <0 0 0xf 0xe8000000 0x08000000>; 115 ranges = <0 0 0xf 0xe8000000 0x08000000
116 3 0 0xf 0xffdf0000 0x00008000>;
112 117
113 flash@0,0 { 118 flash@0,0 {
114 compatible = "cfi-flash"; 119 compatible = "cfi-flash";
@@ -116,6 +121,11 @@
116 bank-width = <2>; 121 bank-width = <2>;
117 device-width = <2>; 122 device-width = <2>;
118 }; 123 };
124
125 board-control@3,0 {
126 compatible = "fsl,p4080ds-fpga", "fsl,fpga-ngpixis";
127 reg = <3 0 0x30>;
128 };
119 }; 129 };
120 130
121 pci0: pcie@ffe200000 { 131 pci0: pcie@ffe200000 {
diff --git a/arch/powerpc/boot/dts/p4080si.dtsi b/arch/powerpc/boot/dts/p4080si.dtsi
index b71051f506c1..f20c01ab2473 100644
--- a/arch/powerpc/boot/dts/p4080si.dtsi
+++ b/arch/powerpc/boot/dts/p4080si.dtsi
@@ -42,6 +42,7 @@
42 42
43 aliases { 43 aliases {
44 ccsr = &soc; 44 ccsr = &soc;
45 dcsr = &dcsr;
45 46
46 serial0 = &serial0; 47 serial0 = &serial0;
47 serial1 = &serial1; 48 serial1 = &serial1;
@@ -77,7 +78,7 @@
77 #address-cells = <1>; 78 #address-cells = <1>;
78 #size-cells = <0>; 79 #size-cells = <0>;
79 80
80 cpu0: PowerPC,4080@0 { 81 cpu0: PowerPC,e500mc@0 {
81 device_type = "cpu"; 82 device_type = "cpu";
82 reg = <0>; 83 reg = <0>;
83 next-level-cache = <&L2_0>; 84 next-level-cache = <&L2_0>;
@@ -85,7 +86,7 @@
85 next-level-cache = <&cpc>; 86 next-level-cache = <&cpc>;
86 }; 87 };
87 }; 88 };
88 cpu1: PowerPC,4080@1 { 89 cpu1: PowerPC,e500mc@1 {
89 device_type = "cpu"; 90 device_type = "cpu";
90 reg = <1>; 91 reg = <1>;
91 next-level-cache = <&L2_1>; 92 next-level-cache = <&L2_1>;
@@ -93,7 +94,7 @@
93 next-level-cache = <&cpc>; 94 next-level-cache = <&cpc>;
94 }; 95 };
95 }; 96 };
96 cpu2: PowerPC,4080@2 { 97 cpu2: PowerPC,e500mc@2 {
97 device_type = "cpu"; 98 device_type = "cpu";
98 reg = <2>; 99 reg = <2>;
99 next-level-cache = <&L2_2>; 100 next-level-cache = <&L2_2>;
@@ -101,7 +102,7 @@
101 next-level-cache = <&cpc>; 102 next-level-cache = <&cpc>;
102 }; 103 };
103 }; 104 };
104 cpu3: PowerPC,4080@3 { 105 cpu3: PowerPC,e500mc@3 {
105 device_type = "cpu"; 106 device_type = "cpu";
106 reg = <3>; 107 reg = <3>;
107 next-level-cache = <&L2_3>; 108 next-level-cache = <&L2_3>;
@@ -109,7 +110,7 @@
109 next-level-cache = <&cpc>; 110 next-level-cache = <&cpc>;
110 }; 111 };
111 }; 112 };
112 cpu4: PowerPC,4080@4 { 113 cpu4: PowerPC,e500mc@4 {
113 device_type = "cpu"; 114 device_type = "cpu";
114 reg = <4>; 115 reg = <4>;
115 next-level-cache = <&L2_4>; 116 next-level-cache = <&L2_4>;
@@ -117,7 +118,7 @@
117 next-level-cache = <&cpc>; 118 next-level-cache = <&cpc>;
118 }; 119 };
119 }; 120 };
120 cpu5: PowerPC,4080@5 { 121 cpu5: PowerPC,e500mc@5 {
121 device_type = "cpu"; 122 device_type = "cpu";
122 reg = <5>; 123 reg = <5>;
123 next-level-cache = <&L2_5>; 124 next-level-cache = <&L2_5>;
@@ -125,7 +126,7 @@
125 next-level-cache = <&cpc>; 126 next-level-cache = <&cpc>;
126 }; 127 };
127 }; 128 };
128 cpu6: PowerPC,4080@6 { 129 cpu6: PowerPC,e500mc@6 {
129 device_type = "cpu"; 130 device_type = "cpu";
130 reg = <6>; 131 reg = <6>;
131 next-level-cache = <&L2_6>; 132 next-level-cache = <&L2_6>;
@@ -133,7 +134,7 @@
133 next-level-cache = <&cpc>; 134 next-level-cache = <&cpc>;
134 }; 135 };
135 }; 136 };
136 cpu7: PowerPC,4080@7 { 137 cpu7: PowerPC,e500mc@7 {
137 device_type = "cpu"; 138 device_type = "cpu";
138 reg = <7>; 139 reg = <7>;
139 next-level-cache = <&L2_7>; 140 next-level-cache = <&L2_7>;
@@ -143,6 +144,99 @@
143 }; 144 };
144 }; 145 };
145 146
147 dcsr: dcsr@f00000000 {
148 #address-cells = <1>;
149 #size-cells = <1>;
150 compatible = "fsl,dcsr", "simple-bus";
151
152 dcsr-epu@0 {
153 compatible = "fsl,dcsr-epu";
154 interrupts = <52 2 0 0
155 84 2 0 0
156 85 2 0 0>;
157 interrupt-parent = <&mpic>;
158 reg = <0x0 0x1000>;
159 };
160 dcsr-npc {
161 compatible = "fsl,dcsr-npc";
162 reg = <0x1000 0x1000 0x1000000 0x8000>;
163 };
164 dcsr-nxc@2000 {
165 compatible = "fsl,dcsr-nxc";
166 reg = <0x2000 0x1000>;
167 };
168 dcsr-corenet {
169 compatible = "fsl,dcsr-corenet";
170 reg = <0x8000 0x1000 0xB0000 0x1000>;
171 };
172 dcsr-dpaa@9000 {
173 compatible = "fsl,p4080-dcsr-dpaa", "fsl,dcsr-dpaa";
174 reg = <0x9000 0x1000>;
175 };
176 dcsr-ocn@11000 {
177 compatible = "fsl,p4080-dcsr-ocn", "fsl,dcsr-ocn";
178 reg = <0x11000 0x1000>;
179 };
180 dcsr-ddr@12000 {
181 compatible = "fsl,dcsr-ddr";
182 dev-handle = <&ddr1>;
183 reg = <0x12000 0x1000>;
184 };
185 dcsr-ddr@13000 {
186 compatible = "fsl,dcsr-ddr";
187 dev-handle = <&ddr2>;
188 reg = <0x13000 0x1000>;
189 };
190 dcsr-nal@18000 {
191 compatible = "fsl,p4080-dcsr-nal", "fsl,dcsr-nal";
192 reg = <0x18000 0x1000>;
193 };
194 dcsr-rcpm@22000 {
195 compatible = "fsl,p4080-dcsr-rcpm", "fsl,dcsr-rcpm";
196 reg = <0x22000 0x1000>;
197 };
198 dcsr-cpu-sb-proxy@40000 {
199 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
200 cpu-handle = <&cpu0>;
201 reg = <0x40000 0x1000>;
202 };
203 dcsr-cpu-sb-proxy@41000 {
204 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
205 cpu-handle = <&cpu1>;
206 reg = <0x41000 0x1000>;
207 };
208 dcsr-cpu-sb-proxy@42000 {
209 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
210 cpu-handle = <&cpu2>;
211 reg = <0x42000 0x1000>;
212 };
213 dcsr-cpu-sb-proxy@43000 {
214 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
215 cpu-handle = <&cpu3>;
216 reg = <0x43000 0x1000>;
217 };
218 dcsr-cpu-sb-proxy@44000 {
219 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
220 cpu-handle = <&cpu4>;
221 reg = <0x44000 0x1000>;
222 };
223 dcsr-cpu-sb-proxy@45000 {
224 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
225 cpu-handle = <&cpu5>;
226 reg = <0x45000 0x1000>;
227 };
228 dcsr-cpu-sb-proxy@46000 {
229 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
230 cpu-handle = <&cpu6>;
231 reg = <0x46000 0x1000>;
232 };
233 dcsr-cpu-sb-proxy@47000 {
234 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
235 cpu-handle = <&cpu7>;
236 reg = <0x47000 0x1000>;
237 };
238 };
239
146 soc: soc@ffe000000 { 240 soc: soc@ffe000000 {
147 #address-cells = <1>; 241 #address-cells = <1>;
148 #size-cells = <1>; 242 #size-cells = <1>;
@@ -162,13 +256,13 @@
162 fsl,num-laws = <32>; 256 fsl,num-laws = <32>;
163 }; 257 };
164 258
165 memory-controller@8000 { 259 ddr1: memory-controller@8000 {
166 compatible = "fsl,qoriq-memory-controller-v4.4", "fsl,qoriq-memory-controller"; 260 compatible = "fsl,qoriq-memory-controller-v4.4", "fsl,qoriq-memory-controller";
167 reg = <0x8000 0x1000>; 261 reg = <0x8000 0x1000>;
168 interrupts = <16 2 1 23>; 262 interrupts = <16 2 1 23>;
169 }; 263 };
170 264
171 memory-controller@9000 { 265 ddr2: memory-controller@9000 {
172 compatible = "fsl,qoriq-memory-controller-v4.4","fsl,qoriq-memory-controller"; 266 compatible = "fsl,qoriq-memory-controller-v4.4","fsl,qoriq-memory-controller";
173 reg = <0x9000 0x1000>; 267 reg = <0x9000 0x1000>;
174 interrupts = <16 2 1 22>; 268 interrupts = <16 2 1 22>;
diff --git a/arch/powerpc/boot/dts/p5020ds.dts b/arch/powerpc/boot/dts/p5020ds.dts
index 8366e2fd2fba..e6d40999ccd7 100644
--- a/arch/powerpc/boot/dts/p5020ds.dts
+++ b/arch/powerpc/boot/dts/p5020ds.dts
@@ -45,6 +45,10 @@
45 device_type = "memory"; 45 device_type = "memory";
46 }; 46 };
47 47
48 dcsr: dcsr@f00000000 {
49 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
50 };
51
48 soc: soc@ffe000000 { 52 soc: soc@ffe000000 {
49 spi@110000 { 53 spi@110000 {
50 flash@0 { 54 flash@0 {
@@ -147,8 +151,8 @@
147 }; 151 };
148 152
149 board-control@3,0 { 153 board-control@3,0 {
150 compatible = "fsl,p5020ds-pixis"; 154 compatible = "fsl,p5020ds-fpga", "fsl,fpga-ngpixis";
151 reg = <3 0 0x20>; 155 reg = <3 0 0x30>;
152 }; 156 };
153 }; 157 };
154 158
diff --git a/arch/powerpc/boot/dts/p5020si.dtsi b/arch/powerpc/boot/dts/p5020si.dtsi
index 5e6048ec55bb..e7948ad71fa3 100644
--- a/arch/powerpc/boot/dts/p5020si.dtsi
+++ b/arch/powerpc/boot/dts/p5020si.dtsi
@@ -42,6 +42,7 @@
42 42
43 aliases { 43 aliases {
44 ccsr = &soc; 44 ccsr = &soc;
45 dcsr = &dcsr;
45 46
46 serial0 = &serial0; 47 serial0 = &serial0;
47 serial1 = &serial1; 48 serial1 = &serial1;
@@ -98,6 +99,69 @@
98 }; 99 };
99 }; 100 };
100 101
102 dcsr: dcsr@f00000000 {
103 #address-cells = <1>;
104 #size-cells = <1>;
105 compatible = "fsl,dcsr", "simple-bus";
106
107 dcsr-epu@0 {
108 compatible = "fsl,dcsr-epu";
109 interrupts = <52 2 0 0
110 84 2 0 0
111 85 2 0 0>;
112 interrupt-parent = <&mpic>;
113 reg = <0x0 0x1000>;
114 };
115 dcsr-npc {
116 compatible = "fsl,dcsr-npc";
117 reg = <0x1000 0x1000 0x1000000 0x8000>;
118 };
119 dcsr-nxc@2000 {
120 compatible = "fsl,dcsr-nxc";
121 reg = <0x2000 0x1000>;
122 };
123 dcsr-corenet {
124 compatible = "fsl,dcsr-corenet";
125 reg = <0x8000 0x1000 0xB0000 0x1000>;
126 };
127 dcsr-dpaa@9000 {
128 compatible = "fsl,p5020-dcsr-dpaa", "fsl,dcsr-dpaa";
129 reg = <0x9000 0x1000>;
130 };
131 dcsr-ocn@11000 {
132 compatible = "fsl,p5020-dcsr-ocn", "fsl,dcsr-ocn";
133 reg = <0x11000 0x1000>;
134 };
135 dcsr-ddr@12000 {
136 compatible = "fsl,dcsr-ddr";
137 dev-handle = <&ddr1>;
138 reg = <0x12000 0x1000>;
139 };
140 dcsr-ddr@13000 {
141 compatible = "fsl,dcsr-ddr";
142 dev-handle = <&ddr2>;
143 reg = <0x13000 0x1000>;
144 };
145 dcsr-nal@18000 {
146 compatible = "fsl,p5020-dcsr-nal", "fsl,dcsr-nal";
147 reg = <0x18000 0x1000>;
148 };
149 dcsr-rcpm@22000 {
150 compatible = "fsl,p5020-dcsr-rcpm", "fsl,dcsr-rcpm";
151 reg = <0x22000 0x1000>;
152 };
153 dcsr-cpu-sb-proxy@40000 {
154 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
155 cpu-handle = <&cpu0>;
156 reg = <0x40000 0x1000>;
157 };
158 dcsr-cpu-sb-proxy@41000 {
159 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
160 cpu-handle = <&cpu1>;
161 reg = <0x41000 0x1000>;
162 };
163 };
164
101 soc: soc@ffe000000 { 165 soc: soc@ffe000000 {
102 #address-cells = <1>; 166 #address-cells = <1>;
103 #size-cells = <1>; 167 #size-cells = <1>;
@@ -117,13 +181,13 @@
117 fsl,num-laws = <32>; 181 fsl,num-laws = <32>;
118 }; 182 };
119 183
120 memory-controller@8000 { 184 ddr1: memory-controller@8000 {
121 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; 185 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
122 reg = <0x8000 0x1000>; 186 reg = <0x8000 0x1000>;
123 interrupts = <16 2 1 23>; 187 interrupts = <16 2 1 23>;
124 }; 188 };
125 189
126 memory-controller@9000 { 190 ddr2: memory-controller@9000 {
127 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; 191 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
128 reg = <0x9000 0x1000>; 192 reg = <0x9000 0x1000>;
129 interrupts = <16 2 1 22>; 193 interrupts = <16 2 1 22>;
diff --git a/arch/powerpc/boot/dts/sbc8560.dts b/arch/powerpc/boot/dts/sbc8560.dts
index 9e13ed8a1193..72078eb15616 100644
--- a/arch/powerpc/boot/dts/sbc8560.dts
+++ b/arch/powerpc/boot/dts/sbc8560.dts
@@ -331,7 +331,7 @@
331 }; 331 };
332 332
333 localbus@ff705000 { 333 localbus@ff705000 {
334 compatible = "fsl,mpc8560-localbus"; 334 compatible = "fsl,mpc8560-localbus", "simple-bus";
335 #address-cells = <2>; 335 #address-cells = <2>;
336 #size-cells = <1>; 336 #size-cells = <1>;
337 reg = <0xff705000 0x100>; // BRx, ORx, etc. 337 reg = <0xff705000 0x100>; // BRx, ORx, etc.
diff --git a/arch/powerpc/boot/dts/yosemite.dts b/arch/powerpc/boot/dts/yosemite.dts
index 64923245f0e5..30bb4753577a 100644
--- a/arch/powerpc/boot/dts/yosemite.dts
+++ b/arch/powerpc/boot/dts/yosemite.dts
@@ -138,6 +138,42 @@
138 clock-frequency = <0>; /* Filled in by zImage */ 138 clock-frequency = <0>; /* Filled in by zImage */
139 interrupts = <0x5 0x1>; 139 interrupts = <0x5 0x1>;
140 interrupt-parent = <&UIC1>; 140 interrupt-parent = <&UIC1>;
141
142 nor_flash@0,0 {
143 compatible = "amd,s29gl256n", "cfi-flash";
144 bank-width = <2>;
145 reg = <0x00000000 0x00000000 0x04000000>;
146 #address-cells = <1>;
147 #size-cells = <1>;
148 partition@0 {
149 label = "kernel";
150 reg = <0x00000000 0x001e0000>;
151 };
152 partition@1e0000 {
153 label = "dtb";
154 reg = <0x001e0000 0x00020000>;
155 };
156 partition@200000 {
157 label = "ramdisk";
158 reg = <0x00200000 0x01400000>;
159 };
160 partition@1600000 {
161 label = "jffs2";
162 reg = <0x01600000 0x00400000>;
163 };
164 partition@1a00000 {
165 label = "user";
166 reg = <0x01a00000 0x02540000>;
167 };
168 partition@3f40000 {
169 label = "env";
170 reg = <0x03f40000 0x00040000>;
171 };
172 partition@3f80000 {
173 label = "u-boot";
174 reg = <0x03f80000 0x00080000>;
175 };
176 };
141 }; 177 };
142 178
143 UART0: serial@ef600300 { 179 UART0: serial@ef600300 {
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-10 02:37:25 -0500