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-rw-r--r--arch/parisc/include/asm/bitops.h4
-rw-r--r--arch/parisc/include/asm/cache.h2
-rw-r--r--arch/parisc/include/asm/cacheflush.h44
-rw-r--r--arch/parisc/include/asm/eisa_eeprom.h2
-rw-r--r--arch/parisc/include/asm/errno.h2
-rw-r--r--arch/parisc/include/asm/fcntl.h2
-rw-r--r--arch/parisc/include/asm/futex.h24
-rw-r--r--arch/parisc/include/asm/ioctls.h2
-rw-r--r--arch/parisc/include/asm/irq.h13
-rw-r--r--arch/parisc/include/asm/irqflags.h46
-rw-r--r--arch/parisc/include/asm/mman.h3
-rw-r--r--arch/parisc/include/asm/mmzone.h7
-rw-r--r--arch/parisc/include/asm/perf_event.h3
-rw-r--r--arch/parisc/include/asm/pgtable.h29
-rw-r--r--arch/parisc/include/asm/smp.h9
-rw-r--r--arch/parisc/include/asm/system.h19
-rw-r--r--arch/parisc/include/asm/types.h16
-rw-r--r--arch/parisc/include/asm/unistd.h12
18 files changed, 128 insertions, 111 deletions
diff --git a/arch/parisc/include/asm/bitops.h b/arch/parisc/include/asm/bitops.h
index 7a6ea10bd231..43c516fa17ff 100644
--- a/arch/parisc/include/asm/bitops.h
+++ b/arch/parisc/include/asm/bitops.h
@@ -222,7 +222,7 @@ static __inline__ int fls(int x)
222 222
223#ifdef __KERNEL__ 223#ifdef __KERNEL__
224 224
225#include <asm-generic/bitops/ext2-non-atomic.h> 225#include <asm-generic/bitops/le.h>
226 226
227/* '3' is bits per byte */ 227/* '3' is bits per byte */
228#define LE_BYTE_ADDR ((sizeof(unsigned long) - 1) << 3) 228#define LE_BYTE_ADDR ((sizeof(unsigned long) - 1) << 3)
@@ -234,6 +234,4 @@ static __inline__ int fls(int x)
234 234
235#endif /* __KERNEL__ */ 235#endif /* __KERNEL__ */
236 236
237#include <asm-generic/bitops/minix-le.h>
238
239#endif /* _PARISC_BITOPS_H */ 237#endif /* _PARISC_BITOPS_H */
diff --git a/arch/parisc/include/asm/cache.h b/arch/parisc/include/asm/cache.h
index 039880e7d2c9..47f11c707b65 100644
--- a/arch/parisc/include/asm/cache.h
+++ b/arch/parisc/include/asm/cache.h
@@ -24,8 +24,6 @@
24 24
25#ifndef __ASSEMBLY__ 25#ifndef __ASSEMBLY__
26 26
27#define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))
28
29#define SMP_CACHE_BYTES L1_CACHE_BYTES 27#define SMP_CACHE_BYTES L1_CACHE_BYTES
30 28
31#define ARCH_DMA_MINALIGN L1_CACHE_BYTES 29#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
diff --git a/arch/parisc/include/asm/cacheflush.h b/arch/parisc/include/asm/cacheflush.h
index dba11aedce1b..da601dd34c05 100644
--- a/arch/parisc/include/asm/cacheflush.h
+++ b/arch/parisc/include/asm/cacheflush.h
@@ -3,6 +3,7 @@
3 3
4#include <linux/mm.h> 4#include <linux/mm.h>
5#include <linux/uaccess.h> 5#include <linux/uaccess.h>
6#include <asm/tlbflush.h>
6 7
7/* The usual comment is "Caches aren't brain-dead on the <architecture>". 8/* The usual comment is "Caches aren't brain-dead on the <architecture>".
8 * Unfortunately, that doesn't apply to PA-RISC. */ 9 * Unfortunately, that doesn't apply to PA-RISC. */
@@ -26,8 +27,6 @@ void flush_user_dcache_range_asm(unsigned long, unsigned long);
26void flush_kernel_dcache_range_asm(unsigned long, unsigned long); 27void flush_kernel_dcache_range_asm(unsigned long, unsigned long);
27void flush_kernel_dcache_page_asm(void *); 28void flush_kernel_dcache_page_asm(void *);
28void flush_kernel_icache_page(void *); 29void flush_kernel_icache_page(void *);
29void flush_user_dcache_page(unsigned long);
30void flush_user_icache_page(unsigned long);
31void flush_user_dcache_range(unsigned long, unsigned long); 30void flush_user_dcache_range(unsigned long, unsigned long);
32void flush_user_icache_range(unsigned long, unsigned long); 31void flush_user_icache_range(unsigned long, unsigned long);
33 32
@@ -37,6 +36,13 @@ void flush_cache_all_local(void);
37void flush_cache_all(void); 36void flush_cache_all(void);
38void flush_cache_mm(struct mm_struct *mm); 37void flush_cache_mm(struct mm_struct *mm);
39 38
39#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE
40void flush_kernel_dcache_page_addr(void *addr);
41static inline void flush_kernel_dcache_page(struct page *page)
42{
43 flush_kernel_dcache_page_addr(page_address(page));
44}
45
40#define flush_kernel_dcache_range(start,size) \ 46#define flush_kernel_dcache_range(start,size) \
41 flush_kernel_dcache_range_asm((start), (start)+(size)); 47 flush_kernel_dcache_range_asm((start), (start)+(size));
42/* vmap range flushes and invalidates. Architecturally, we don't need 48/* vmap range flushes and invalidates. Architecturally, we don't need
@@ -50,6 +56,16 @@ static inline void flush_kernel_vmap_range(void *vaddr, int size)
50} 56}
51static inline void invalidate_kernel_vmap_range(void *vaddr, int size) 57static inline void invalidate_kernel_vmap_range(void *vaddr, int size)
52{ 58{
59 unsigned long start = (unsigned long)vaddr;
60 void *cursor = vaddr;
61
62 for ( ; cursor < vaddr + size; cursor += PAGE_SIZE) {
63 struct page *page = vmalloc_to_page(cursor);
64
65 if (test_and_clear_bit(PG_dcache_dirty, &page->flags))
66 flush_kernel_dcache_page(page);
67 }
68 flush_kernel_dcache_range_asm(start, start + size);
53} 69}
54 70
55#define flush_cache_vmap(start, end) flush_cache_all() 71#define flush_cache_vmap(start, end) flush_cache_all()
@@ -90,19 +106,17 @@ void flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned
90void flush_cache_range(struct vm_area_struct *vma, 106void flush_cache_range(struct vm_area_struct *vma,
91 unsigned long start, unsigned long end); 107 unsigned long start, unsigned long end);
92 108
109/* defined in pacache.S exported in cache.c used by flush_anon_page */
110void flush_dcache_page_asm(unsigned long phys_addr, unsigned long vaddr);
111
93#define ARCH_HAS_FLUSH_ANON_PAGE 112#define ARCH_HAS_FLUSH_ANON_PAGE
94static inline void 113static inline void
95flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr) 114flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr)
96{ 115{
97 if (PageAnon(page)) 116 if (PageAnon(page)) {
98 flush_user_dcache_page(vmaddr); 117 flush_tlb_page(vma, vmaddr);
99} 118 flush_dcache_page_asm(page_to_phys(page), vmaddr);
100 119 }
101#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE
102void flush_kernel_dcache_page_addr(void *addr);
103static inline void flush_kernel_dcache_page(struct page *page)
104{
105 flush_kernel_dcache_page_addr(page_address(page));
106} 120}
107 121
108#ifdef CONFIG_DEBUG_RODATA 122#ifdef CONFIG_DEBUG_RODATA
@@ -126,20 +140,20 @@ static inline void *kmap(struct page *page)
126 140
127#define kunmap(page) kunmap_parisc(page_address(page)) 141#define kunmap(page) kunmap_parisc(page_address(page))
128 142
129static inline void *kmap_atomic(struct page *page, enum km_type idx) 143static inline void *__kmap_atomic(struct page *page)
130{ 144{
131 pagefault_disable(); 145 pagefault_disable();
132 return page_address(page); 146 return page_address(page);
133} 147}
134 148
135static inline void kunmap_atomic_notypecheck(void *addr, enum km_type idx) 149static inline void __kunmap_atomic(void *addr)
136{ 150{
137 kunmap_parisc(addr); 151 kunmap_parisc(addr);
138 pagefault_enable(); 152 pagefault_enable();
139} 153}
140 154
141#define kmap_atomic_prot(page, idx, prot) kmap_atomic(page, idx) 155#define kmap_atomic_prot(page, prot) kmap_atomic(page)
142#define kmap_atomic_pfn(pfn, idx) kmap_atomic(pfn_to_page(pfn), (idx)) 156#define kmap_atomic_pfn(pfn) kmap_atomic(pfn_to_page(pfn))
143#define kmap_atomic_to_page(ptr) virt_to_page(ptr) 157#define kmap_atomic_to_page(ptr) virt_to_page(ptr)
144#endif 158#endif
145 159
diff --git a/arch/parisc/include/asm/eisa_eeprom.h b/arch/parisc/include/asm/eisa_eeprom.h
index 9c9da980402a..8ce8b85ca588 100644
--- a/arch/parisc/include/asm/eisa_eeprom.h
+++ b/arch/parisc/include/asm/eisa_eeprom.h
@@ -27,7 +27,7 @@ struct eeprom_header
27 u_int8_t ver_maj; 27 u_int8_t ver_maj;
28 u_int8_t ver_min; 28 u_int8_t ver_min;
29 u_int8_t num_slots; /* number of EISA slots in system */ 29 u_int8_t num_slots; /* number of EISA slots in system */
30 u_int16_t csum; /* checksum, I don't know how to calulate this */ 30 u_int16_t csum; /* checksum, I don't know how to calculate this */
31 u_int8_t pad[10]; 31 u_int8_t pad[10];
32} __attribute__ ((packed)); 32} __attribute__ ((packed));
33 33
diff --git a/arch/parisc/include/asm/errno.h b/arch/parisc/include/asm/errno.h
index 9992abdd782d..135ad6047e51 100644
--- a/arch/parisc/include/asm/errno.h
+++ b/arch/parisc/include/asm/errno.h
@@ -122,4 +122,6 @@
122 122
123#define ERFKILL 256 /* Operation not possible due to RF-kill */ 123#define ERFKILL 256 /* Operation not possible due to RF-kill */
124 124
125#define EHWPOISON 257 /* Memory page has hardware error */
126
125#endif 127#endif
diff --git a/arch/parisc/include/asm/fcntl.h b/arch/parisc/include/asm/fcntl.h
index f357fc693c89..0304b92ccfea 100644
--- a/arch/parisc/include/asm/fcntl.h
+++ b/arch/parisc/include/asm/fcntl.h
@@ -19,6 +19,8 @@
19#define O_NOFOLLOW 000000200 /* don't follow links */ 19#define O_NOFOLLOW 000000200 /* don't follow links */
20#define O_INVISIBLE 004000000 /* invisible I/O, for DMAPI/XDSM */ 20#define O_INVISIBLE 004000000 /* invisible I/O, for DMAPI/XDSM */
21 21
22#define O_PATH 020000000
23
22#define F_GETLK64 8 24#define F_GETLK64 8
23#define F_SETLK64 9 25#define F_SETLK64 9
24#define F_SETLKW64 10 26#define F_SETLKW64 10
diff --git a/arch/parisc/include/asm/futex.h b/arch/parisc/include/asm/futex.h
index 0c705c3a55ef..67a33cc27ef2 100644
--- a/arch/parisc/include/asm/futex.h
+++ b/arch/parisc/include/asm/futex.h
@@ -8,7 +8,7 @@
8#include <asm/errno.h> 8#include <asm/errno.h>
9 9
10static inline int 10static inline int
11futex_atomic_op_inuser (int encoded_op, int __user *uaddr) 11futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)
12{ 12{
13 int op = (encoded_op >> 28) & 7; 13 int op = (encoded_op >> 28) & 7;
14 int cmp = (encoded_op >> 24) & 15; 14 int cmp = (encoded_op >> 24) & 15;
@@ -18,7 +18,7 @@ futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
18 if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28)) 18 if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
19 oparg = 1 << oparg; 19 oparg = 1 << oparg;
20 20
21 if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int))) 21 if (! access_ok (VERIFY_WRITE, uaddr, sizeof(u32)))
22 return -EFAULT; 22 return -EFAULT;
23 23
24 pagefault_disable(); 24 pagefault_disable();
@@ -51,10 +51,10 @@ futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
51 51
52/* Non-atomic version */ 52/* Non-atomic version */
53static inline int 53static inline int
54futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval) 54futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
55 u32 oldval, u32 newval)
55{ 56{
56 int err = 0; 57 u32 val;
57 int uval;
58 58
59 /* futex.c wants to do a cmpxchg_inatomic on kernel NULL, which is 59 /* futex.c wants to do a cmpxchg_inatomic on kernel NULL, which is
60 * our gateway page, and causes no end of trouble... 60 * our gateway page, and causes no end of trouble...
@@ -62,15 +62,15 @@ futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
62 if (segment_eq(KERNEL_DS, get_fs()) && !uaddr) 62 if (segment_eq(KERNEL_DS, get_fs()) && !uaddr)
63 return -EFAULT; 63 return -EFAULT;
64 64
65 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int))) 65 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
66 return -EFAULT; 66 return -EFAULT;
67 67
68 err = get_user(uval, uaddr); 68 if (get_user(val, uaddr))
69 if (err) return -EFAULT; 69 return -EFAULT;
70 if (uval == oldval) 70 if (val == oldval && put_user(newval, uaddr))
71 err = put_user(newval, uaddr); 71 return -EFAULT;
72 if (err) return -EFAULT; 72 *uval = val;
73 return uval; 73 return 0;
74} 74}
75 75
76#endif /*__KERNEL__*/ 76#endif /*__KERNEL__*/
diff --git a/arch/parisc/include/asm/ioctls.h b/arch/parisc/include/asm/ioctls.h
index 4e0614456bea..054ec06f9e23 100644
--- a/arch/parisc/include/asm/ioctls.h
+++ b/arch/parisc/include/asm/ioctls.h
@@ -52,7 +52,9 @@
52#define TCSETSF2 _IOW('T',0x2D, struct termios2) 52#define TCSETSF2 _IOW('T',0x2D, struct termios2)
53#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */ 53#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
54#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */ 54#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
55#define TIOCGDEV _IOR('T',0x32, int) /* Get primary device node of /dev/console */
55#define TIOCSIG _IOW('T',0x36, int) /* Generate signal on Pty slave */ 56#define TIOCSIG _IOW('T',0x36, int) /* Generate signal on Pty slave */
57#define TIOCVHANGUP 0x5437
56 58
57#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */ 59#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */
58#define FIOCLEX 0x5451 60#define FIOCLEX 0x5451
diff --git a/arch/parisc/include/asm/irq.h b/arch/parisc/include/asm/irq.h
index dfa26b67f919..1073599a7be9 100644
--- a/arch/parisc/include/asm/irq.h
+++ b/arch/parisc/include/asm/irq.h
@@ -32,15 +32,10 @@ static __inline__ int irq_canonicalize(int irq)
32} 32}
33 33
34struct irq_chip; 34struct irq_chip;
35struct irq_data;
35 36
36/* 37void cpu_ack_irq(struct irq_data *d);
37 * Some useful "we don't have to do anything here" handlers. Should 38void cpu_eoi_irq(struct irq_data *d);
38 * probably be provided by the generic code.
39 */
40void no_ack_irq(unsigned int irq);
41void no_end_irq(unsigned int irq);
42void cpu_ack_irq(unsigned int irq);
43void cpu_end_irq(unsigned int irq);
44 39
45extern int txn_alloc_irq(unsigned int nbits); 40extern int txn_alloc_irq(unsigned int nbits);
46extern int txn_claim_irq(int); 41extern int txn_claim_irq(int);
@@ -49,7 +44,7 @@ extern unsigned long txn_alloc_addr(unsigned int);
49extern unsigned long txn_affinity_addr(unsigned int irq, int cpu); 44extern unsigned long txn_affinity_addr(unsigned int irq, int cpu);
50 45
51extern int cpu_claim_irq(unsigned int irq, struct irq_chip *, void *); 46extern int cpu_claim_irq(unsigned int irq, struct irq_chip *, void *);
52extern int cpu_check_affinity(unsigned int irq, const struct cpumask *dest); 47extern int cpu_check_affinity(struct irq_data *d, const struct cpumask *dest);
53 48
54/* soft power switch support (power.c) */ 49/* soft power switch support (power.c) */
55extern struct tasklet_struct power_tasklet; 50extern struct tasklet_struct power_tasklet;
diff --git a/arch/parisc/include/asm/irqflags.h b/arch/parisc/include/asm/irqflags.h
new file mode 100644
index 000000000000..34f9cb9b4754
--- /dev/null
+++ b/arch/parisc/include/asm/irqflags.h
@@ -0,0 +1,46 @@
1#ifndef __PARISC_IRQFLAGS_H
2#define __PARISC_IRQFLAGS_H
3
4#include <linux/types.h>
5#include <asm/psw.h>
6
7static inline unsigned long arch_local_save_flags(void)
8{
9 unsigned long flags;
10 asm volatile("ssm 0, %0" : "=r" (flags) : : "memory");
11 return flags;
12}
13
14static inline void arch_local_irq_disable(void)
15{
16 asm volatile("rsm %0,%%r0\n" : : "i" (PSW_I) : "memory");
17}
18
19static inline void arch_local_irq_enable(void)
20{
21 asm volatile("ssm %0,%%r0\n" : : "i" (PSW_I) : "memory");
22}
23
24static inline unsigned long arch_local_irq_save(void)
25{
26 unsigned long flags;
27 asm volatile("rsm %1,%0" : "=r" (flags) : "i" (PSW_I) : "memory");
28 return flags;
29}
30
31static inline void arch_local_irq_restore(unsigned long flags)
32{
33 asm volatile("mtsm %0" : : "r" (flags) : "memory");
34}
35
36static inline bool arch_irqs_disabled_flags(unsigned long flags)
37{
38 return (flags & PSW_I) == 0;
39}
40
41static inline bool arch_irqs_disabled(void)
42{
43 return arch_irqs_disabled_flags(arch_local_save_flags());
44}
45
46#endif /* __PARISC_IRQFLAGS_H */
diff --git a/arch/parisc/include/asm/mman.h b/arch/parisc/include/asm/mman.h
index 9749c8afe83a..f5b7bf5fba68 100644
--- a/arch/parisc/include/asm/mman.h
+++ b/arch/parisc/include/asm/mman.h
@@ -59,6 +59,9 @@
59#define MADV_MERGEABLE 65 /* KSM may merge identical pages */ 59#define MADV_MERGEABLE 65 /* KSM may merge identical pages */
60#define MADV_UNMERGEABLE 66 /* KSM may not merge identical pages */ 60#define MADV_UNMERGEABLE 66 /* KSM may not merge identical pages */
61 61
62#define MADV_HUGEPAGE 67 /* Worth backing with hugepages */
63#define MADV_NOHUGEPAGE 68 /* Not worth backing with hugepages */
64
62/* compatibility flags */ 65/* compatibility flags */
63#define MAP_FILE 0 66#define MAP_FILE 0
64#define MAP_VARIABLE 0 67#define MAP_VARIABLE 0
diff --git a/arch/parisc/include/asm/mmzone.h b/arch/parisc/include/asm/mmzone.h
index 9608d2cf214a..e67eb9c3d1bf 100644
--- a/arch/parisc/include/asm/mmzone.h
+++ b/arch/parisc/include/asm/mmzone.h
@@ -14,13 +14,6 @@ extern struct node_map_data node_data[];
14 14
15#define NODE_DATA(nid) (&node_data[nid].pg_data) 15#define NODE_DATA(nid) (&node_data[nid].pg_data)
16 16
17#define node_start_pfn(nid) (NODE_DATA(nid)->node_start_pfn)
18#define node_end_pfn(nid) \
19({ \
20 pg_data_t *__pgdat = NODE_DATA(nid); \
21 __pgdat->node_start_pfn + __pgdat->node_spanned_pages; \
22})
23
24/* We have these possible memory map layouts: 17/* We have these possible memory map layouts:
25 * Astro: 0-3.75, 67.75-68, 4-64 18 * Astro: 0-3.75, 67.75-68, 4-64
26 * zx1: 0-1, 257-260, 4-256 19 * zx1: 0-1, 257-260, 4-256
diff --git a/arch/parisc/include/asm/perf_event.h b/arch/parisc/include/asm/perf_event.h
index cc146427d8f9..1e0fd8ba6c03 100644
--- a/arch/parisc/include/asm/perf_event.h
+++ b/arch/parisc/include/asm/perf_event.h
@@ -1,7 +1,6 @@
1#ifndef __ASM_PARISC_PERF_EVENT_H 1#ifndef __ASM_PARISC_PERF_EVENT_H
2#define __ASM_PARISC_PERF_EVENT_H 2#define __ASM_PARISC_PERF_EVENT_H
3 3
4/* parisc only supports software events through this interface. */ 4/* Empty, just to avoid compiling error */
5static inline void set_perf_event_pending(void) { }
6 5
7#endif /* __ASM_PARISC_PERF_EVENT_H */ 6#endif /* __ASM_PARISC_PERF_EVENT_H */
diff --git a/arch/parisc/include/asm/pgtable.h b/arch/parisc/include/asm/pgtable.h
index 01c15035e783..22dadeb58695 100644
--- a/arch/parisc/include/asm/pgtable.h
+++ b/arch/parisc/include/asm/pgtable.h
@@ -10,11 +10,13 @@
10 * we simulate an x86-style page table for the linux mm code 10 * we simulate an x86-style page table for the linux mm code
11 */ 11 */
12 12
13#include <linux/mm.h> /* for vm_area_struct */
14#include <linux/bitops.h> 13#include <linux/bitops.h>
14#include <linux/spinlock.h>
15#include <asm/processor.h> 15#include <asm/processor.h>
16#include <asm/cache.h> 16#include <asm/cache.h>
17 17
18struct vm_area_struct;
19
18/* 20/*
19 * kern_addr_valid(ADDR) tests if ADDR is pointing to valid kernel 21 * kern_addr_valid(ADDR) tests if ADDR is pointing to valid kernel
20 * memory. For the return value to be meaningful, ADDR must be >= 22 * memory. For the return value to be meaningful, ADDR must be >=
@@ -136,8 +138,7 @@
136#define _PAGE_NO_CACHE_BIT 24 /* (0x080) Uncached Page (U bit) */ 138#define _PAGE_NO_CACHE_BIT 24 /* (0x080) Uncached Page (U bit) */
137#define _PAGE_ACCESSED_BIT 23 /* (0x100) Software: Page Accessed */ 139#define _PAGE_ACCESSED_BIT 23 /* (0x100) Software: Page Accessed */
138#define _PAGE_PRESENT_BIT 22 /* (0x200) Software: translation valid */ 140#define _PAGE_PRESENT_BIT 22 /* (0x200) Software: translation valid */
139#define _PAGE_FLUSH_BIT 21 /* (0x400) Software: translation valid */ 141/* bit 21 was formerly the FLUSH bit but is now unused */
140 /* for cache flushing only */
141#define _PAGE_USER_BIT 20 /* (0x800) Software: User accessible page */ 142#define _PAGE_USER_BIT 20 /* (0x800) Software: User accessible page */
142 143
143/* N.B. The bits are defined in terms of a 32 bit word above, so the */ 144/* N.B. The bits are defined in terms of a 32 bit word above, so the */
@@ -171,13 +172,15 @@
171#define _PAGE_NO_CACHE (1 << xlate_pabit(_PAGE_NO_CACHE_BIT)) 172#define _PAGE_NO_CACHE (1 << xlate_pabit(_PAGE_NO_CACHE_BIT))
172#define _PAGE_ACCESSED (1 << xlate_pabit(_PAGE_ACCESSED_BIT)) 173#define _PAGE_ACCESSED (1 << xlate_pabit(_PAGE_ACCESSED_BIT))
173#define _PAGE_PRESENT (1 << xlate_pabit(_PAGE_PRESENT_BIT)) 174#define _PAGE_PRESENT (1 << xlate_pabit(_PAGE_PRESENT_BIT))
174#define _PAGE_FLUSH (1 << xlate_pabit(_PAGE_FLUSH_BIT))
175#define _PAGE_USER (1 << xlate_pabit(_PAGE_USER_BIT)) 175#define _PAGE_USER (1 << xlate_pabit(_PAGE_USER_BIT))
176#define _PAGE_FILE (1 << xlate_pabit(_PAGE_FILE_BIT)) 176#define _PAGE_FILE (1 << xlate_pabit(_PAGE_FILE_BIT))
177 177
178#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_ACCESSED) 178#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_ACCESSED)
179#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY) 179#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
180#define _PAGE_KERNEL (_PAGE_PRESENT | _PAGE_EXEC | _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_ACCESSED) 180#define _PAGE_KERNEL_RO (_PAGE_PRESENT | _PAGE_READ | _PAGE_DIRTY | _PAGE_ACCESSED)
181#define _PAGE_KERNEL_EXEC (_PAGE_KERNEL_RO | _PAGE_EXEC)
182#define _PAGE_KERNEL_RWX (_PAGE_KERNEL_EXEC | _PAGE_WRITE)
183#define _PAGE_KERNEL (_PAGE_KERNEL_RO | _PAGE_WRITE)
181 184
182/* The pgd/pmd contains a ptr (in phys addr space); since all pgds/pmds 185/* The pgd/pmd contains a ptr (in phys addr space); since all pgds/pmds
183 * are page-aligned, we don't care about the PAGE_OFFSET bits, except 186 * are page-aligned, we don't care about the PAGE_OFFSET bits, except
@@ -208,10 +211,11 @@
208#define PAGE_COPY PAGE_EXECREAD 211#define PAGE_COPY PAGE_EXECREAD
209#define PAGE_RWX __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_WRITE | _PAGE_EXEC |_PAGE_ACCESSED) 212#define PAGE_RWX __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_WRITE | _PAGE_EXEC |_PAGE_ACCESSED)
210#define PAGE_KERNEL __pgprot(_PAGE_KERNEL) 213#define PAGE_KERNEL __pgprot(_PAGE_KERNEL)
211#define PAGE_KERNEL_RO __pgprot(_PAGE_KERNEL & ~_PAGE_WRITE) 214#define PAGE_KERNEL_EXEC __pgprot(_PAGE_KERNEL_EXEC)
215#define PAGE_KERNEL_RWX __pgprot(_PAGE_KERNEL_RWX)
216#define PAGE_KERNEL_RO __pgprot(_PAGE_KERNEL_RO)
212#define PAGE_KERNEL_UNC __pgprot(_PAGE_KERNEL | _PAGE_NO_CACHE) 217#define PAGE_KERNEL_UNC __pgprot(_PAGE_KERNEL | _PAGE_NO_CACHE)
213#define PAGE_GATEWAY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_GATEWAY| _PAGE_READ) 218#define PAGE_GATEWAY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_GATEWAY| _PAGE_READ)
214#define PAGE_FLUSH __pgprot(_PAGE_FLUSH)
215 219
216 220
217/* 221/*
@@ -259,7 +263,7 @@ extern unsigned long *empty_zero_page;
259 263
260#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) 264#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
261 265
262#define pte_none(x) ((pte_val(x) == 0) || (pte_val(x) & _PAGE_FLUSH)) 266#define pte_none(x) (pte_val(x) == 0)
263#define pte_present(x) (pte_val(x) & _PAGE_PRESENT) 267#define pte_present(x) (pte_val(x) & _PAGE_PRESENT)
264#define pte_clear(mm,addr,xp) do { pte_val(*(xp)) = 0; } while (0) 268#define pte_clear(mm,addr,xp) do { pte_val(*(xp)) = 0; } while (0)
265 269
@@ -397,9 +401,7 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
397#define pte_offset_kernel(pmd, address) \ 401#define pte_offset_kernel(pmd, address) \
398 ((pte_t *) pmd_page_vaddr(*(pmd)) + pte_index(address)) 402 ((pte_t *) pmd_page_vaddr(*(pmd)) + pte_index(address))
399#define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address) 403#define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
400#define pte_offset_map_nested(pmd, address) pte_offset_kernel(pmd, address)
401#define pte_unmap(pte) do { } while (0) 404#define pte_unmap(pte) do { } while (0)
402#define pte_unmap_nested(pte) do { } while (0)
403 405
404#define pte_unmap(pte) do { } while (0) 406#define pte_unmap(pte) do { } while (0)
405#define pte_unmap_nested(pte) do { } while (0) 407#define pte_unmap_nested(pte) do { } while (0)
@@ -444,13 +446,10 @@ struct mm_struct;
444static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 446static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
445{ 447{
446 pte_t old_pte; 448 pte_t old_pte;
447 pte_t pte;
448 449
449 spin_lock(&pa_dbit_lock); 450 spin_lock(&pa_dbit_lock);
450 pte = old_pte = *ptep; 451 old_pte = *ptep;
451 pte_val(pte) &= ~_PAGE_PRESENT; 452 pte_clear(mm,addr,ptep);
452 pte_val(pte) |= _PAGE_FLUSH;
453 set_pte_at(mm,addr,ptep,pte);
454 spin_unlock(&pa_dbit_lock); 453 spin_unlock(&pa_dbit_lock);
455 454
456 return old_pte; 455 return old_pte;
diff --git a/arch/parisc/include/asm/smp.h b/arch/parisc/include/asm/smp.h
index 2e73623feb6b..e8f8037d872b 100644
--- a/arch/parisc/include/asm/smp.h
+++ b/arch/parisc/include/asm/smp.h
@@ -33,15 +33,6 @@ extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
33 33
34#endif /* !ASSEMBLY */ 34#endif /* !ASSEMBLY */
35 35
36/*
37 * This magic constant controls our willingness to transfer
38 * a process across CPUs. Such a transfer incurs cache and tlb
39 * misses. The current value is inherited from i386. Still needs
40 * to be tuned for parisc.
41 */
42
43#define PROC_CHANGE_PENALTY 15 /* Schedule penalty */
44
45#define raw_smp_processor_id() (current_thread_info()->cpu) 36#define raw_smp_processor_id() (current_thread_info()->cpu)
46 37
47#else /* CONFIG_SMP */ 38#else /* CONFIG_SMP */
diff --git a/arch/parisc/include/asm/system.h b/arch/parisc/include/asm/system.h
index 2ab4af58ecb9..b19e63a8e848 100644
--- a/arch/parisc/include/asm/system.h
+++ b/arch/parisc/include/asm/system.h
@@ -1,7 +1,7 @@
1#ifndef __PARISC_SYSTEM_H 1#ifndef __PARISC_SYSTEM_H
2#define __PARISC_SYSTEM_H 2#define __PARISC_SYSTEM_H
3 3
4#include <asm/psw.h> 4#include <linux/irqflags.h>
5 5
6/* The program status word as bitfields. */ 6/* The program status word as bitfields. */
7struct pa_psw { 7struct pa_psw {
@@ -48,23 +48,6 @@ extern struct task_struct *_switch_to(struct task_struct *, struct task_struct *
48 (last) = _switch_to(prev, next); \ 48 (last) = _switch_to(prev, next); \
49} while(0) 49} while(0)
50 50
51/* interrupt control */
52#define local_save_flags(x) __asm__ __volatile__("ssm 0, %0" : "=r" (x) : : "memory")
53#define local_irq_disable() __asm__ __volatile__("rsm %0,%%r0\n" : : "i" (PSW_I) : "memory" )
54#define local_irq_enable() __asm__ __volatile__("ssm %0,%%r0\n" : : "i" (PSW_I) : "memory" )
55
56#define local_irq_save(x) \
57 __asm__ __volatile__("rsm %1,%0" : "=r" (x) :"i" (PSW_I) : "memory" )
58#define local_irq_restore(x) \
59 __asm__ __volatile__("mtsm %0" : : "r" (x) : "memory" )
60
61#define irqs_disabled() \
62({ \
63 unsigned long flags; \
64 local_save_flags(flags); \
65 (flags & PSW_I) == 0; \
66})
67
68#define mfctl(reg) ({ \ 51#define mfctl(reg) ({ \
69 unsigned long cr; \ 52 unsigned long cr; \
70 __asm__ __volatile__( \ 53 __asm__ __volatile__( \
diff --git a/arch/parisc/include/asm/types.h b/arch/parisc/include/asm/types.h
index 20135cc80039..80e415c9936d 100644
--- a/arch/parisc/include/asm/types.h
+++ b/arch/parisc/include/asm/types.h
@@ -9,20 +9,4 @@ typedef unsigned short umode_t;
9 9
10#endif /* __ASSEMBLY__ */ 10#endif /* __ASSEMBLY__ */
11 11
12/*
13 * These aren't exported outside the kernel to avoid name space clashes
14 */
15#ifdef __KERNEL__
16
17#ifndef __ASSEMBLY__
18
19/* Dma addresses are 32-bits wide. */
20
21typedef u32 dma_addr_t;
22typedef u64 dma64_addr_t;
23
24#endif /* __ASSEMBLY__ */
25
26#endif /* __KERNEL__ */
27
28#endif 12#endif
diff --git a/arch/parisc/include/asm/unistd.h b/arch/parisc/include/asm/unistd.h
index 1ce7d2851d90..3392de3e7be0 100644
--- a/arch/parisc/include/asm/unistd.h
+++ b/arch/parisc/include/asm/unistd.h
@@ -813,8 +813,16 @@
813#define __NR_perf_event_open (__NR_Linux + 318) 813#define __NR_perf_event_open (__NR_Linux + 318)
814#define __NR_recvmmsg (__NR_Linux + 319) 814#define __NR_recvmmsg (__NR_Linux + 319)
815#define __NR_accept4 (__NR_Linux + 320) 815#define __NR_accept4 (__NR_Linux + 320)
816 816#define __NR_prlimit64 (__NR_Linux + 321)
817#define __NR_Linux_syscalls (__NR_accept4 + 1) 817#define __NR_fanotify_init (__NR_Linux + 322)
818#define __NR_fanotify_mark (__NR_Linux + 323)
819#define __NR_clock_adjtime (__NR_Linux + 324)
820#define __NR_name_to_handle_at (__NR_Linux + 325)
821#define __NR_open_by_handle_at (__NR_Linux + 326)
822#define __NR_syncfs (__NR_Linux + 327)
823#define __NR_setns (__NR_Linux + 328)
824
825#define __NR_Linux_syscalls (__NR_setns + 1)
818 826
819 827
820#define __IGNORE_select /* newselect */ 828#define __IGNORE_select /* newselect */