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-rw-r--r--arch/parisc/Kconfig26
-rw-r--r--arch/parisc/configs/a500_defconfig2
-rw-r--r--arch/parisc/configs/c3000_defconfig2
-rw-r--r--arch/parisc/hpux/sys_hpux.c66
-rw-r--r--arch/parisc/include/asm/bitops.h4
-rw-r--r--arch/parisc/include/asm/cache.h2
-rw-r--r--arch/parisc/include/asm/cacheflush.h44
-rw-r--r--arch/parisc/include/asm/eisa_eeprom.h2
-rw-r--r--arch/parisc/include/asm/errno.h2
-rw-r--r--arch/parisc/include/asm/fcntl.h2
-rw-r--r--arch/parisc/include/asm/futex.h24
-rw-r--r--arch/parisc/include/asm/ioctls.h2
-rw-r--r--arch/parisc/include/asm/irq.h13
-rw-r--r--arch/parisc/include/asm/irqflags.h46
-rw-r--r--arch/parisc/include/asm/mman.h3
-rw-r--r--arch/parisc/include/asm/mmzone.h7
-rw-r--r--arch/parisc/include/asm/perf_event.h3
-rw-r--r--arch/parisc/include/asm/pgtable.h29
-rw-r--r--arch/parisc/include/asm/smp.h9
-rw-r--r--arch/parisc/include/asm/system.h19
-rw-r--r--arch/parisc/include/asm/types.h16
-rw-r--r--arch/parisc/include/asm/unistd.h12
-rw-r--r--arch/parisc/kernel/cache.c120
-rw-r--r--arch/parisc/kernel/entry.S230
-rw-r--r--arch/parisc/kernel/firmware.c13
-rw-r--r--arch/parisc/kernel/head.S7
-rw-r--r--arch/parisc/kernel/inventory.c2
-rw-r--r--arch/parisc/kernel/irq.c96
-rw-r--r--arch/parisc/kernel/module.c10
-rw-r--r--arch/parisc/kernel/pacache.S251
-rw-r--r--arch/parisc/kernel/pdc_cons.c141
-rw-r--r--arch/parisc/kernel/perf.c4
-rw-r--r--arch/parisc/kernel/ptrace.c13
-rw-r--r--arch/parisc/kernel/signal.c11
-rw-r--r--arch/parisc/kernel/smp.c5
-rw-r--r--arch/parisc/kernel/sys_parisc32.c9
-rw-r--r--arch/parisc/kernel/syscall.S2
-rw-r--r--arch/parisc/kernel/syscall_table.S10
-rw-r--r--arch/parisc/kernel/time.c7
-rw-r--r--arch/parisc/kernel/unaligned.c3
-rw-r--r--arch/parisc/kernel/unwind.c5
-rw-r--r--arch/parisc/kernel/vmlinux.lds.S6
-rw-r--r--arch/parisc/math-emu/Makefile2
-rw-r--r--arch/parisc/math-emu/dfadd.c2
-rw-r--r--arch/parisc/math-emu/dfsub.c2
-rw-r--r--arch/parisc/math-emu/fmpyfadd.c8
-rw-r--r--arch/parisc/math-emu/sfadd.c2
-rw-r--r--arch/parisc/math-emu/sfsub.c2
-rw-r--r--arch/parisc/mm/init.c270
49 files changed, 822 insertions, 746 deletions
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig
index 907417d187e1..65adc86a230e 100644
--- a/arch/parisc/Kconfig
+++ b/arch/parisc/Kconfig
@@ -1,10 +1,3 @@
1#
2# For a description of the syntax of this configuration file,
3# see Documentation/kbuild/kconfig-language.txt.
4#
5
6mainmenu "Linux/PA-RISC Kernel Configuration"
7
8config PARISC 1config PARISC
9 def_bool y 2 def_bool y
10 select HAVE_IDE 3 select HAVE_IDE
@@ -16,8 +9,13 @@ config PARISC
16 select RTC_DRV_GENERIC 9 select RTC_DRV_GENERIC
17 select INIT_ALL_POSSIBLE 10 select INIT_ALL_POSSIBLE
18 select BUG 11 select BUG
12 select HAVE_IRQ_WORK
19 select HAVE_PERF_EVENTS 13 select HAVE_PERF_EVENTS
20 select GENERIC_ATOMIC64 if !64BIT 14 select GENERIC_ATOMIC64 if !64BIT
15 select HAVE_GENERIC_HARDIRQS
16 select GENERIC_IRQ_PROBE
17 select IRQ_PER_CPU
18
21 help 19 help
22 The PA-RISC microprocessor is designed by Hewlett-Packard and used 20 The PA-RISC microprocessor is designed by Hewlett-Packard and used
23 in many of their workstations & servers (HP9000 700 and 800 series, 21 in many of their workstations & servers (HP9000 700 and 800 series,
@@ -49,10 +47,6 @@ config ARCH_HAS_ILOG2_U64
49 bool 47 bool
50 default n 48 default n
51 49
52config GENERIC_FIND_NEXT_BIT
53 bool
54 default y
55
56config GENERIC_BUG 50config GENERIC_BUG
57 bool 51 bool
58 default y 52 default y
@@ -71,19 +65,9 @@ config TIME_LOW_RES
71 depends on SMP 65 depends on SMP
72 default y 66 default y
73 67
74config GENERIC_HARDIRQS
75 def_bool y
76
77config GENERIC_IRQ_PROBE
78 def_bool y
79
80config HAVE_LATENCYTOP_SUPPORT 68config HAVE_LATENCYTOP_SUPPORT
81 def_bool y 69 def_bool y
82 70
83config IRQ_PER_CPU
84 bool
85 default y
86
87# unless you want to implement ACPI on PA-RISC ... ;-) 71# unless you want to implement ACPI on PA-RISC ... ;-)
88config PM 72config PM
89 bool 73 bool
diff --git a/arch/parisc/configs/a500_defconfig b/arch/parisc/configs/a500_defconfig
index f9305f30603a..b647b182dacc 100644
--- a/arch/parisc/configs/a500_defconfig
+++ b/arch/parisc/configs/a500_defconfig
@@ -8,7 +8,7 @@ CONFIG_LOG_BUF_SHIFT=16
8CONFIG_SYSFS_DEPRECATED_V2=y 8CONFIG_SYSFS_DEPRECATED_V2=y
9CONFIG_BLK_DEV_INITRD=y 9CONFIG_BLK_DEV_INITRD=y
10# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 10# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
11CONFIG_EMBEDDED=y 11CONFIG_EXPERT=y
12CONFIG_KALLSYMS_ALL=y 12CONFIG_KALLSYMS_ALL=y
13CONFIG_SLAB=y 13CONFIG_SLAB=y
14CONFIG_PROFILING=y 14CONFIG_PROFILING=y
diff --git a/arch/parisc/configs/c3000_defconfig b/arch/parisc/configs/c3000_defconfig
index 628d3e022535..311ca367b622 100644
--- a/arch/parisc/configs/c3000_defconfig
+++ b/arch/parisc/configs/c3000_defconfig
@@ -6,7 +6,7 @@ CONFIG_IKCONFIG_PROC=y
6CONFIG_LOG_BUF_SHIFT=16 6CONFIG_LOG_BUF_SHIFT=16
7CONFIG_SYSFS_DEPRECATED_V2=y 7CONFIG_SYSFS_DEPRECATED_V2=y
8# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 8# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
9CONFIG_EMBEDDED=y 9CONFIG_EXPERT=y
10CONFIG_KALLSYMS_ALL=y 10CONFIG_KALLSYMS_ALL=y
11CONFIG_SLAB=y 11CONFIG_SLAB=y
12CONFIG_PROFILING=y 12CONFIG_PROFILING=y
diff --git a/arch/parisc/hpux/sys_hpux.c b/arch/parisc/hpux/sys_hpux.c
index ba430a03bc7a..6ab9580b0b00 100644
--- a/arch/parisc/hpux/sys_hpux.c
+++ b/arch/parisc/hpux/sys_hpux.c
@@ -28,7 +28,6 @@
28#include <linux/namei.h> 28#include <linux/namei.h>
29#include <linux/sched.h> 29#include <linux/sched.h>
30#include <linux/slab.h> 30#include <linux/slab.h>
31#include <linux/smp_lock.h>
32#include <linux/syscalls.h> 31#include <linux/syscalls.h>
33#include <linux/utsname.h> 32#include <linux/utsname.h>
34#include <linux/vfs.h> 33#include <linux/vfs.h>
@@ -186,26 +185,21 @@ struct hpux_statfs {
186 int16_t f_pad; 185 int16_t f_pad;
187}; 186};
188 187
189static int do_statfs_hpux(struct path *path, struct hpux_statfs *buf) 188static int do_statfs_hpux(struct kstatfs *st, struct hpux_statfs __user *p)
190{ 189{
191 struct kstatfs st; 190 struct hpux_statfs buf;
192 int retval; 191 memset(&buf, 0, sizeof(buf));
193 192 buf.f_type = st->f_type;
194 retval = vfs_statfs(path, &st); 193 buf.f_bsize = st->f_bsize;
195 if (retval) 194 buf.f_blocks = st->f_blocks;
196 return retval; 195 buf.f_bfree = st->f_bfree;
197 196 buf.f_bavail = st->f_bavail;
198 memset(buf, 0, sizeof(*buf)); 197 buf.f_files = st->f_files;
199 buf->f_type = st.f_type; 198 buf.f_ffree = st->f_ffree;
200 buf->f_bsize = st.f_bsize; 199 buf.f_fsid[0] = st->f_fsid.val[0];
201 buf->f_blocks = st.f_blocks; 200 buf.f_fsid[1] = st->f_fsid.val[1];
202 buf->f_bfree = st.f_bfree; 201 if (copy_to_user(p, &buf, sizeof(buf)))
203 buf->f_bavail = st.f_bavail; 202 return -EFAULT;
204 buf->f_files = st.f_files;
205 buf->f_ffree = st.f_ffree;
206 buf->f_fsid[0] = st.f_fsid.val[0];
207 buf->f_fsid[1] = st.f_fsid.val[1];
208
209 return 0; 203 return 0;
210} 204}
211 205
@@ -213,35 +207,19 @@ static int do_statfs_hpux(struct path *path, struct hpux_statfs *buf)
213asmlinkage long hpux_statfs(const char __user *pathname, 207asmlinkage long hpux_statfs(const char __user *pathname,
214 struct hpux_statfs __user *buf) 208 struct hpux_statfs __user *buf)
215{ 209{
216 struct path path; 210 struct kstatfs st;
217 int error; 211 int error = user_statfs(pathname, &st);
218 212 if (!error)
219 error = user_path(pathname, &path); 213 error = do_statfs_hpux(&st, buf);
220 if (!error) {
221 struct hpux_statfs tmp;
222 error = do_statfs_hpux(&path, &tmp);
223 if (!error && copy_to_user(buf, &tmp, sizeof(tmp)))
224 error = -EFAULT;
225 path_put(&path);
226 }
227 return error; 214 return error;
228} 215}
229 216
230asmlinkage long hpux_fstatfs(unsigned int fd, struct hpux_statfs __user * buf) 217asmlinkage long hpux_fstatfs(unsigned int fd, struct hpux_statfs __user * buf)
231{ 218{
232 struct file *file; 219 struct kstatfs st;
233 struct hpux_statfs tmp; 220 int error = fd_statfs(fd, &st);
234 int error; 221 if (!error)
235 222 error = do_statfs_hpux(&st, buf);
236 error = -EBADF;
237 file = fget(fd);
238 if (!file)
239 goto out;
240 error = do_statfs_hpux(&file->f_path, &tmp);
241 if (!error && copy_to_user(buf, &tmp, sizeof(tmp)))
242 error = -EFAULT;
243 fput(file);
244 out:
245 return error; 223 return error;
246} 224}
247 225
diff --git a/arch/parisc/include/asm/bitops.h b/arch/parisc/include/asm/bitops.h
index 7a6ea10bd231..43c516fa17ff 100644
--- a/arch/parisc/include/asm/bitops.h
+++ b/arch/parisc/include/asm/bitops.h
@@ -222,7 +222,7 @@ static __inline__ int fls(int x)
222 222
223#ifdef __KERNEL__ 223#ifdef __KERNEL__
224 224
225#include <asm-generic/bitops/ext2-non-atomic.h> 225#include <asm-generic/bitops/le.h>
226 226
227/* '3' is bits per byte */ 227/* '3' is bits per byte */
228#define LE_BYTE_ADDR ((sizeof(unsigned long) - 1) << 3) 228#define LE_BYTE_ADDR ((sizeof(unsigned long) - 1) << 3)
@@ -234,6 +234,4 @@ static __inline__ int fls(int x)
234 234
235#endif /* __KERNEL__ */ 235#endif /* __KERNEL__ */
236 236
237#include <asm-generic/bitops/minix-le.h>
238
239#endif /* _PARISC_BITOPS_H */ 237#endif /* _PARISC_BITOPS_H */
diff --git a/arch/parisc/include/asm/cache.h b/arch/parisc/include/asm/cache.h
index 039880e7d2c9..47f11c707b65 100644
--- a/arch/parisc/include/asm/cache.h
+++ b/arch/parisc/include/asm/cache.h
@@ -24,8 +24,6 @@
24 24
25#ifndef __ASSEMBLY__ 25#ifndef __ASSEMBLY__
26 26
27#define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))
28
29#define SMP_CACHE_BYTES L1_CACHE_BYTES 27#define SMP_CACHE_BYTES L1_CACHE_BYTES
30 28
31#define ARCH_DMA_MINALIGN L1_CACHE_BYTES 29#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
diff --git a/arch/parisc/include/asm/cacheflush.h b/arch/parisc/include/asm/cacheflush.h
index dba11aedce1b..da601dd34c05 100644
--- a/arch/parisc/include/asm/cacheflush.h
+++ b/arch/parisc/include/asm/cacheflush.h
@@ -3,6 +3,7 @@
3 3
4#include <linux/mm.h> 4#include <linux/mm.h>
5#include <linux/uaccess.h> 5#include <linux/uaccess.h>
6#include <asm/tlbflush.h>
6 7
7/* The usual comment is "Caches aren't brain-dead on the <architecture>". 8/* The usual comment is "Caches aren't brain-dead on the <architecture>".
8 * Unfortunately, that doesn't apply to PA-RISC. */ 9 * Unfortunately, that doesn't apply to PA-RISC. */
@@ -26,8 +27,6 @@ void flush_user_dcache_range_asm(unsigned long, unsigned long);
26void flush_kernel_dcache_range_asm(unsigned long, unsigned long); 27void flush_kernel_dcache_range_asm(unsigned long, unsigned long);
27void flush_kernel_dcache_page_asm(void *); 28void flush_kernel_dcache_page_asm(void *);
28void flush_kernel_icache_page(void *); 29void flush_kernel_icache_page(void *);
29void flush_user_dcache_page(unsigned long);
30void flush_user_icache_page(unsigned long);
31void flush_user_dcache_range(unsigned long, unsigned long); 30void flush_user_dcache_range(unsigned long, unsigned long);
32void flush_user_icache_range(unsigned long, unsigned long); 31void flush_user_icache_range(unsigned long, unsigned long);
33 32
@@ -37,6 +36,13 @@ void flush_cache_all_local(void);
37void flush_cache_all(void); 36void flush_cache_all(void);
38void flush_cache_mm(struct mm_struct *mm); 37void flush_cache_mm(struct mm_struct *mm);
39 38
39#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE
40void flush_kernel_dcache_page_addr(void *addr);
41static inline void flush_kernel_dcache_page(struct page *page)
42{
43 flush_kernel_dcache_page_addr(page_address(page));
44}
45
40#define flush_kernel_dcache_range(start,size) \ 46#define flush_kernel_dcache_range(start,size) \
41 flush_kernel_dcache_range_asm((start), (start)+(size)); 47 flush_kernel_dcache_range_asm((start), (start)+(size));
42/* vmap range flushes and invalidates. Architecturally, we don't need 48/* vmap range flushes and invalidates. Architecturally, we don't need
@@ -50,6 +56,16 @@ static inline void flush_kernel_vmap_range(void *vaddr, int size)
50} 56}
51static inline void invalidate_kernel_vmap_range(void *vaddr, int size) 57static inline void invalidate_kernel_vmap_range(void *vaddr, int size)
52{ 58{
59 unsigned long start = (unsigned long)vaddr;
60 void *cursor = vaddr;
61
62 for ( ; cursor < vaddr + size; cursor += PAGE_SIZE) {
63 struct page *page = vmalloc_to_page(cursor);
64
65 if (test_and_clear_bit(PG_dcache_dirty, &page->flags))
66 flush_kernel_dcache_page(page);
67 }
68 flush_kernel_dcache_range_asm(start, start + size);
53} 69}
54 70
55#define flush_cache_vmap(start, end) flush_cache_all() 71#define flush_cache_vmap(start, end) flush_cache_all()
@@ -90,19 +106,17 @@ void flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned
90void flush_cache_range(struct vm_area_struct *vma, 106void flush_cache_range(struct vm_area_struct *vma,
91 unsigned long start, unsigned long end); 107 unsigned long start, unsigned long end);
92 108
109/* defined in pacache.S exported in cache.c used by flush_anon_page */
110void flush_dcache_page_asm(unsigned long phys_addr, unsigned long vaddr);
111
93#define ARCH_HAS_FLUSH_ANON_PAGE 112#define ARCH_HAS_FLUSH_ANON_PAGE
94static inline void 113static inline void
95flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr) 114flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr)
96{ 115{
97 if (PageAnon(page)) 116 if (PageAnon(page)) {
98 flush_user_dcache_page(vmaddr); 117 flush_tlb_page(vma, vmaddr);
99} 118 flush_dcache_page_asm(page_to_phys(page), vmaddr);
100 119 }
101#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE
102void flush_kernel_dcache_page_addr(void *addr);
103static inline void flush_kernel_dcache_page(struct page *page)
104{
105 flush_kernel_dcache_page_addr(page_address(page));
106} 120}
107 121
108#ifdef CONFIG_DEBUG_RODATA 122#ifdef CONFIG_DEBUG_RODATA
@@ -126,20 +140,20 @@ static inline void *kmap(struct page *page)
126 140
127#define kunmap(page) kunmap_parisc(page_address(page)) 141#define kunmap(page) kunmap_parisc(page_address(page))
128 142
129static inline void *kmap_atomic(struct page *page, enum km_type idx) 143static inline void *__kmap_atomic(struct page *page)
130{ 144{
131 pagefault_disable(); 145 pagefault_disable();
132 return page_address(page); 146 return page_address(page);
133} 147}
134 148
135static inline void kunmap_atomic_notypecheck(void *addr, enum km_type idx) 149static inline void __kunmap_atomic(void *addr)
136{ 150{
137 kunmap_parisc(addr); 151 kunmap_parisc(addr);
138 pagefault_enable(); 152 pagefault_enable();
139} 153}
140 154
141#define kmap_atomic_prot(page, idx, prot) kmap_atomic(page, idx) 155#define kmap_atomic_prot(page, prot) kmap_atomic(page)
142#define kmap_atomic_pfn(pfn, idx) kmap_atomic(pfn_to_page(pfn), (idx)) 156#define kmap_atomic_pfn(pfn) kmap_atomic(pfn_to_page(pfn))
143#define kmap_atomic_to_page(ptr) virt_to_page(ptr) 157#define kmap_atomic_to_page(ptr) virt_to_page(ptr)
144#endif 158#endif
145 159
diff --git a/arch/parisc/include/asm/eisa_eeprom.h b/arch/parisc/include/asm/eisa_eeprom.h
index 9c9da980402a..8ce8b85ca588 100644
--- a/arch/parisc/include/asm/eisa_eeprom.h
+++ b/arch/parisc/include/asm/eisa_eeprom.h
@@ -27,7 +27,7 @@ struct eeprom_header
27 u_int8_t ver_maj; 27 u_int8_t ver_maj;
28 u_int8_t ver_min; 28 u_int8_t ver_min;
29 u_int8_t num_slots; /* number of EISA slots in system */ 29 u_int8_t num_slots; /* number of EISA slots in system */
30 u_int16_t csum; /* checksum, I don't know how to calulate this */ 30 u_int16_t csum; /* checksum, I don't know how to calculate this */
31 u_int8_t pad[10]; 31 u_int8_t pad[10];
32} __attribute__ ((packed)); 32} __attribute__ ((packed));
33 33
diff --git a/arch/parisc/include/asm/errno.h b/arch/parisc/include/asm/errno.h
index 9992abdd782d..135ad6047e51 100644
--- a/arch/parisc/include/asm/errno.h
+++ b/arch/parisc/include/asm/errno.h
@@ -122,4 +122,6 @@
122 122
123#define ERFKILL 256 /* Operation not possible due to RF-kill */ 123#define ERFKILL 256 /* Operation not possible due to RF-kill */
124 124
125#define EHWPOISON 257 /* Memory page has hardware error */
126
125#endif 127#endif
diff --git a/arch/parisc/include/asm/fcntl.h b/arch/parisc/include/asm/fcntl.h
index f357fc693c89..0304b92ccfea 100644
--- a/arch/parisc/include/asm/fcntl.h
+++ b/arch/parisc/include/asm/fcntl.h
@@ -19,6 +19,8 @@
19#define O_NOFOLLOW 000000200 /* don't follow links */ 19#define O_NOFOLLOW 000000200 /* don't follow links */
20#define O_INVISIBLE 004000000 /* invisible I/O, for DMAPI/XDSM */ 20#define O_INVISIBLE 004000000 /* invisible I/O, for DMAPI/XDSM */
21 21
22#define O_PATH 020000000
23
22#define F_GETLK64 8 24#define F_GETLK64 8
23#define F_SETLK64 9 25#define F_SETLK64 9
24#define F_SETLKW64 10 26#define F_SETLKW64 10
diff --git a/arch/parisc/include/asm/futex.h b/arch/parisc/include/asm/futex.h
index 0c705c3a55ef..67a33cc27ef2 100644
--- a/arch/parisc/include/asm/futex.h
+++ b/arch/parisc/include/asm/futex.h
@@ -8,7 +8,7 @@
8#include <asm/errno.h> 8#include <asm/errno.h>
9 9
10static inline int 10static inline int
11futex_atomic_op_inuser (int encoded_op, int __user *uaddr) 11futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)
12{ 12{
13 int op = (encoded_op >> 28) & 7; 13 int op = (encoded_op >> 28) & 7;
14 int cmp = (encoded_op >> 24) & 15; 14 int cmp = (encoded_op >> 24) & 15;
@@ -18,7 +18,7 @@ futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
18 if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28)) 18 if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
19 oparg = 1 << oparg; 19 oparg = 1 << oparg;
20 20
21 if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int))) 21 if (! access_ok (VERIFY_WRITE, uaddr, sizeof(u32)))
22 return -EFAULT; 22 return -EFAULT;
23 23
24 pagefault_disable(); 24 pagefault_disable();
@@ -51,10 +51,10 @@ futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
51 51
52/* Non-atomic version */ 52/* Non-atomic version */
53static inline int 53static inline int
54futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval) 54futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
55 u32 oldval, u32 newval)
55{ 56{
56 int err = 0; 57 u32 val;
57 int uval;
58 58
59 /* futex.c wants to do a cmpxchg_inatomic on kernel NULL, which is 59 /* futex.c wants to do a cmpxchg_inatomic on kernel NULL, which is
60 * our gateway page, and causes no end of trouble... 60 * our gateway page, and causes no end of trouble...
@@ -62,15 +62,15 @@ futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
62 if (segment_eq(KERNEL_DS, get_fs()) && !uaddr) 62 if (segment_eq(KERNEL_DS, get_fs()) && !uaddr)
63 return -EFAULT; 63 return -EFAULT;
64 64
65 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int))) 65 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
66 return -EFAULT; 66 return -EFAULT;
67 67
68 err = get_user(uval, uaddr); 68 if (get_user(val, uaddr))
69 if (err) return -EFAULT; 69 return -EFAULT;
70 if (uval == oldval) 70 if (val == oldval && put_user(newval, uaddr))
71 err = put_user(newval, uaddr); 71 return -EFAULT;
72 if (err) return -EFAULT; 72 *uval = val;
73 return uval; 73 return 0;
74} 74}
75 75
76#endif /*__KERNEL__*/ 76#endif /*__KERNEL__*/
diff --git a/arch/parisc/include/asm/ioctls.h b/arch/parisc/include/asm/ioctls.h
index 4e0614456bea..054ec06f9e23 100644
--- a/arch/parisc/include/asm/ioctls.h
+++ b/arch/parisc/include/asm/ioctls.h
@@ -52,7 +52,9 @@
52#define TCSETSF2 _IOW('T',0x2D, struct termios2) 52#define TCSETSF2 _IOW('T',0x2D, struct termios2)
53#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */ 53#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
54#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */ 54#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
55#define TIOCGDEV _IOR('T',0x32, int) /* Get primary device node of /dev/console */
55#define TIOCSIG _IOW('T',0x36, int) /* Generate signal on Pty slave */ 56#define TIOCSIG _IOW('T',0x36, int) /* Generate signal on Pty slave */
57#define TIOCVHANGUP 0x5437
56 58
57#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */ 59#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */
58#define FIOCLEX 0x5451 60#define FIOCLEX 0x5451
diff --git a/arch/parisc/include/asm/irq.h b/arch/parisc/include/asm/irq.h
index dfa26b67f919..1073599a7be9 100644
--- a/arch/parisc/include/asm/irq.h
+++ b/arch/parisc/include/asm/irq.h
@@ -32,15 +32,10 @@ static __inline__ int irq_canonicalize(int irq)
32} 32}
33 33
34struct irq_chip; 34struct irq_chip;
35struct irq_data;
35 36
36/* 37void cpu_ack_irq(struct irq_data *d);
37 * Some useful "we don't have to do anything here" handlers. Should 38void cpu_eoi_irq(struct irq_data *d);
38 * probably be provided by the generic code.
39 */
40void no_ack_irq(unsigned int irq);
41void no_end_irq(unsigned int irq);
42void cpu_ack_irq(unsigned int irq);
43void cpu_end_irq(unsigned int irq);
44 39
45extern int txn_alloc_irq(unsigned int nbits); 40extern int txn_alloc_irq(unsigned int nbits);
46extern int txn_claim_irq(int); 41extern int txn_claim_irq(int);
@@ -49,7 +44,7 @@ extern unsigned long txn_alloc_addr(unsigned int);
49extern unsigned long txn_affinity_addr(unsigned int irq, int cpu); 44extern unsigned long txn_affinity_addr(unsigned int irq, int cpu);
50 45
51extern int cpu_claim_irq(unsigned int irq, struct irq_chip *, void *); 46extern int cpu_claim_irq(unsigned int irq, struct irq_chip *, void *);
52extern int cpu_check_affinity(unsigned int irq, const struct cpumask *dest); 47extern int cpu_check_affinity(struct irq_data *d, const struct cpumask *dest);
53 48
54/* soft power switch support (power.c) */ 49/* soft power switch support (power.c) */
55extern struct tasklet_struct power_tasklet; 50extern struct tasklet_struct power_tasklet;
diff --git a/arch/parisc/include/asm/irqflags.h b/arch/parisc/include/asm/irqflags.h
new file mode 100644
index 000000000000..34f9cb9b4754
--- /dev/null
+++ b/arch/parisc/include/asm/irqflags.h
@@ -0,0 +1,46 @@
1#ifndef __PARISC_IRQFLAGS_H
2#define __PARISC_IRQFLAGS_H
3
4#include <linux/types.h>
5#include <asm/psw.h>
6
7static inline unsigned long arch_local_save_flags(void)
8{
9 unsigned long flags;
10 asm volatile("ssm 0, %0" : "=r" (flags) : : "memory");
11 return flags;
12}
13
14static inline void arch_local_irq_disable(void)
15{
16 asm volatile("rsm %0,%%r0\n" : : "i" (PSW_I) : "memory");
17}
18
19static inline void arch_local_irq_enable(void)
20{
21 asm volatile("ssm %0,%%r0\n" : : "i" (PSW_I) : "memory");
22}
23
24static inline unsigned long arch_local_irq_save(void)
25{
26 unsigned long flags;
27 asm volatile("rsm %1,%0" : "=r" (flags) : "i" (PSW_I) : "memory");
28 return flags;
29}
30
31static inline void arch_local_irq_restore(unsigned long flags)
32{
33 asm volatile("mtsm %0" : : "r" (flags) : "memory");
34}
35
36static inline bool arch_irqs_disabled_flags(unsigned long flags)
37{
38 return (flags & PSW_I) == 0;
39}
40
41static inline bool arch_irqs_disabled(void)
42{
43 return arch_irqs_disabled_flags(arch_local_save_flags());
44}
45
46#endif /* __PARISC_IRQFLAGS_H */
diff --git a/arch/parisc/include/asm/mman.h b/arch/parisc/include/asm/mman.h
index 9749c8afe83a..f5b7bf5fba68 100644
--- a/arch/parisc/include/asm/mman.h
+++ b/arch/parisc/include/asm/mman.h
@@ -59,6 +59,9 @@
59#define MADV_MERGEABLE 65 /* KSM may merge identical pages */ 59#define MADV_MERGEABLE 65 /* KSM may merge identical pages */
60#define MADV_UNMERGEABLE 66 /* KSM may not merge identical pages */ 60#define MADV_UNMERGEABLE 66 /* KSM may not merge identical pages */
61 61
62#define MADV_HUGEPAGE 67 /* Worth backing with hugepages */
63#define MADV_NOHUGEPAGE 68 /* Not worth backing with hugepages */
64
62/* compatibility flags */ 65/* compatibility flags */
63#define MAP_FILE 0 66#define MAP_FILE 0
64#define MAP_VARIABLE 0 67#define MAP_VARIABLE 0
diff --git a/arch/parisc/include/asm/mmzone.h b/arch/parisc/include/asm/mmzone.h
index 9608d2cf214a..e67eb9c3d1bf 100644
--- a/arch/parisc/include/asm/mmzone.h
+++ b/arch/parisc/include/asm/mmzone.h
@@ -14,13 +14,6 @@ extern struct node_map_data node_data[];
14 14
15#define NODE_DATA(nid) (&node_data[nid].pg_data) 15#define NODE_DATA(nid) (&node_data[nid].pg_data)
16 16
17#define node_start_pfn(nid) (NODE_DATA(nid)->node_start_pfn)
18#define node_end_pfn(nid) \
19({ \
20 pg_data_t *__pgdat = NODE_DATA(nid); \
21 __pgdat->node_start_pfn + __pgdat->node_spanned_pages; \
22})
23
24/* We have these possible memory map layouts: 17/* We have these possible memory map layouts:
25 * Astro: 0-3.75, 67.75-68, 4-64 18 * Astro: 0-3.75, 67.75-68, 4-64
26 * zx1: 0-1, 257-260, 4-256 19 * zx1: 0-1, 257-260, 4-256
diff --git a/arch/parisc/include/asm/perf_event.h b/arch/parisc/include/asm/perf_event.h
index cc146427d8f9..1e0fd8ba6c03 100644
--- a/arch/parisc/include/asm/perf_event.h
+++ b/arch/parisc/include/asm/perf_event.h
@@ -1,7 +1,6 @@
1#ifndef __ASM_PARISC_PERF_EVENT_H 1#ifndef __ASM_PARISC_PERF_EVENT_H
2#define __ASM_PARISC_PERF_EVENT_H 2#define __ASM_PARISC_PERF_EVENT_H
3 3
4/* parisc only supports software events through this interface. */ 4/* Empty, just to avoid compiling error */
5static inline void set_perf_event_pending(void) { }
6 5
7#endif /* __ASM_PARISC_PERF_EVENT_H */ 6#endif /* __ASM_PARISC_PERF_EVENT_H */
diff --git a/arch/parisc/include/asm/pgtable.h b/arch/parisc/include/asm/pgtable.h
index 01c15035e783..22dadeb58695 100644
--- a/arch/parisc/include/asm/pgtable.h
+++ b/arch/parisc/include/asm/pgtable.h
@@ -10,11 +10,13 @@
10 * we simulate an x86-style page table for the linux mm code 10 * we simulate an x86-style page table for the linux mm code
11 */ 11 */
12 12
13#include <linux/mm.h> /* for vm_area_struct */
14#include <linux/bitops.h> 13#include <linux/bitops.h>
14#include <linux/spinlock.h>
15#include <asm/processor.h> 15#include <asm/processor.h>
16#include <asm/cache.h> 16#include <asm/cache.h>
17 17
18struct vm_area_struct;
19
18/* 20/*
19 * kern_addr_valid(ADDR) tests if ADDR is pointing to valid kernel 21 * kern_addr_valid(ADDR) tests if ADDR is pointing to valid kernel
20 * memory. For the return value to be meaningful, ADDR must be >= 22 * memory. For the return value to be meaningful, ADDR must be >=
@@ -136,8 +138,7 @@
136#define _PAGE_NO_CACHE_BIT 24 /* (0x080) Uncached Page (U bit) */ 138#define _PAGE_NO_CACHE_BIT 24 /* (0x080) Uncached Page (U bit) */
137#define _PAGE_ACCESSED_BIT 23 /* (0x100) Software: Page Accessed */ 139#define _PAGE_ACCESSED_BIT 23 /* (0x100) Software: Page Accessed */
138#define _PAGE_PRESENT_BIT 22 /* (0x200) Software: translation valid */ 140#define _PAGE_PRESENT_BIT 22 /* (0x200) Software: translation valid */
139#define _PAGE_FLUSH_BIT 21 /* (0x400) Software: translation valid */ 141/* bit 21 was formerly the FLUSH bit but is now unused */
140 /* for cache flushing only */
141#define _PAGE_USER_BIT 20 /* (0x800) Software: User accessible page */ 142#define _PAGE_USER_BIT 20 /* (0x800) Software: User accessible page */
142 143
143/* N.B. The bits are defined in terms of a 32 bit word above, so the */ 144/* N.B. The bits are defined in terms of a 32 bit word above, so the */
@@ -171,13 +172,15 @@
171#define _PAGE_NO_CACHE (1 << xlate_pabit(_PAGE_NO_CACHE_BIT)) 172#define _PAGE_NO_CACHE (1 << xlate_pabit(_PAGE_NO_CACHE_BIT))
172#define _PAGE_ACCESSED (1 << xlate_pabit(_PAGE_ACCESSED_BIT)) 173#define _PAGE_ACCESSED (1 << xlate_pabit(_PAGE_ACCESSED_BIT))
173#define _PAGE_PRESENT (1 << xlate_pabit(_PAGE_PRESENT_BIT)) 174#define _PAGE_PRESENT (1 << xlate_pabit(_PAGE_PRESENT_BIT))
174#define _PAGE_FLUSH (1 << xlate_pabit(_PAGE_FLUSH_BIT))
175#define _PAGE_USER (1 << xlate_pabit(_PAGE_USER_BIT)) 175#define _PAGE_USER (1 << xlate_pabit(_PAGE_USER_BIT))
176#define _PAGE_FILE (1 << xlate_pabit(_PAGE_FILE_BIT)) 176#define _PAGE_FILE (1 << xlate_pabit(_PAGE_FILE_BIT))
177 177
178#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_ACCESSED) 178#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_ACCESSED)
179#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY) 179#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
180#define _PAGE_KERNEL (_PAGE_PRESENT | _PAGE_EXEC | _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_ACCESSED) 180#define _PAGE_KERNEL_RO (_PAGE_PRESENT | _PAGE_READ | _PAGE_DIRTY | _PAGE_ACCESSED)
181#define _PAGE_KERNEL_EXEC (_PAGE_KERNEL_RO | _PAGE_EXEC)
182#define _PAGE_KERNEL_RWX (_PAGE_KERNEL_EXEC | _PAGE_WRITE)
183#define _PAGE_KERNEL (_PAGE_KERNEL_RO | _PAGE_WRITE)
181 184
182/* The pgd/pmd contains a ptr (in phys addr space); since all pgds/pmds 185/* The pgd/pmd contains a ptr (in phys addr space); since all pgds/pmds
183 * are page-aligned, we don't care about the PAGE_OFFSET bits, except 186 * are page-aligned, we don't care about the PAGE_OFFSET bits, except
@@ -208,10 +211,11 @@
208#define PAGE_COPY PAGE_EXECREAD 211#define PAGE_COPY PAGE_EXECREAD
209#define PAGE_RWX __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_WRITE | _PAGE_EXEC |_PAGE_ACCESSED) 212#define PAGE_RWX __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_WRITE | _PAGE_EXEC |_PAGE_ACCESSED)
210#define PAGE_KERNEL __pgprot(_PAGE_KERNEL) 213#define PAGE_KERNEL __pgprot(_PAGE_KERNEL)
211#define PAGE_KERNEL_RO __pgprot(_PAGE_KERNEL & ~_PAGE_WRITE) 214#define PAGE_KERNEL_EXEC __pgprot(_PAGE_KERNEL_EXEC)
215#define PAGE_KERNEL_RWX __pgprot(_PAGE_KERNEL_RWX)
216#define PAGE_KERNEL_RO __pgprot(_PAGE_KERNEL_RO)
212#define PAGE_KERNEL_UNC __pgprot(_PAGE_KERNEL | _PAGE_NO_CACHE) 217#define PAGE_KERNEL_UNC __pgprot(_PAGE_KERNEL | _PAGE_NO_CACHE)
213#define PAGE_GATEWAY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_GATEWAY| _PAGE_READ) 218#define PAGE_GATEWAY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_GATEWAY| _PAGE_READ)
214#define PAGE_FLUSH __pgprot(_PAGE_FLUSH)
215 219
216 220
217/* 221/*
@@ -259,7 +263,7 @@ extern unsigned long *empty_zero_page;
259 263
260#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) 264#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
261 265
262#define pte_none(x) ((pte_val(x) == 0) || (pte_val(x) & _PAGE_FLUSH)) 266#define pte_none(x) (pte_val(x) == 0)
263#define pte_present(x) (pte_val(x) & _PAGE_PRESENT) 267#define pte_present(x) (pte_val(x) & _PAGE_PRESENT)
264#define pte_clear(mm,addr,xp) do { pte_val(*(xp)) = 0; } while (0) 268#define pte_clear(mm,addr,xp) do { pte_val(*(xp)) = 0; } while (0)
265 269
@@ -397,9 +401,7 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
397#define pte_offset_kernel(pmd, address) \ 401#define pte_offset_kernel(pmd, address) \
398 ((pte_t *) pmd_page_vaddr(*(pmd)) + pte_index(address)) 402 ((pte_t *) pmd_page_vaddr(*(pmd)) + pte_index(address))
399#define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address) 403#define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
400#define pte_offset_map_nested(pmd, address) pte_offset_kernel(pmd, address)
401#define pte_unmap(pte) do { } while (0) 404#define pte_unmap(pte) do { } while (0)
402#define pte_unmap_nested(pte) do { } while (0)
403 405
404#define pte_unmap(pte) do { } while (0) 406#define pte_unmap(pte) do { } while (0)
405#define pte_unmap_nested(pte) do { } while (0) 407#define pte_unmap_nested(pte) do { } while (0)
@@ -444,13 +446,10 @@ struct mm_struct;
444static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 446static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
445{ 447{
446 pte_t old_pte; 448 pte_t old_pte;
447 pte_t pte;
448 449
449 spin_lock(&pa_dbit_lock); 450 spin_lock(&pa_dbit_lock);
450 pte = old_pte = *ptep; 451 old_pte = *ptep;
451 pte_val(pte) &= ~_PAGE_PRESENT; 452 pte_clear(mm,addr,ptep);
452 pte_val(pte) |= _PAGE_FLUSH;
453 set_pte_at(mm,addr,ptep,pte);
454 spin_unlock(&pa_dbit_lock); 453 spin_unlock(&pa_dbit_lock);
455 454
456 return old_pte; 455 return old_pte;
diff --git a/arch/parisc/include/asm/smp.h b/arch/parisc/include/asm/smp.h
index 2e73623feb6b..e8f8037d872b 100644
--- a/arch/parisc/include/asm/smp.h
+++ b/arch/parisc/include/asm/smp.h
@@ -33,15 +33,6 @@ extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
33 33
34#endif /* !ASSEMBLY */ 34#endif /* !ASSEMBLY */
35 35
36/*
37 * This magic constant controls our willingness to transfer
38 * a process across CPUs. Such a transfer incurs cache and tlb
39 * misses. The current value is inherited from i386. Still needs
40 * to be tuned for parisc.
41 */
42
43#define PROC_CHANGE_PENALTY 15 /* Schedule penalty */
44
45#define raw_smp_processor_id() (current_thread_info()->cpu) 36#define raw_smp_processor_id() (current_thread_info()->cpu)
46 37
47#else /* CONFIG_SMP */ 38#else /* CONFIG_SMP */
diff --git a/arch/parisc/include/asm/system.h b/arch/parisc/include/asm/system.h
index 2ab4af58ecb9..b19e63a8e848 100644
--- a/arch/parisc/include/asm/system.h
+++ b/arch/parisc/include/asm/system.h
@@ -1,7 +1,7 @@
1#ifndef __PARISC_SYSTEM_H 1#ifndef __PARISC_SYSTEM_H
2#define __PARISC_SYSTEM_H 2#define __PARISC_SYSTEM_H
3 3
4#include <asm/psw.h> 4#include <linux/irqflags.h>
5 5
6/* The program status word as bitfields. */ 6/* The program status word as bitfields. */
7struct pa_psw { 7struct pa_psw {
@@ -48,23 +48,6 @@ extern struct task_struct *_switch_to(struct task_struct *, struct task_struct *
48 (last) = _switch_to(prev, next); \ 48 (last) = _switch_to(prev, next); \
49} while(0) 49} while(0)
50 50
51/* interrupt control */
52#define local_save_flags(x) __asm__ __volatile__("ssm 0, %0" : "=r" (x) : : "memory")
53#define local_irq_disable() __asm__ __volatile__("rsm %0,%%r0\n" : : "i" (PSW_I) : "memory" )
54#define local_irq_enable() __asm__ __volatile__("ssm %0,%%r0\n" : : "i" (PSW_I) : "memory" )
55
56#define local_irq_save(x) \
57 __asm__ __volatile__("rsm %1,%0" : "=r" (x) :"i" (PSW_I) : "memory" )
58#define local_irq_restore(x) \
59 __asm__ __volatile__("mtsm %0" : : "r" (x) : "memory" )
60
61#define irqs_disabled() \
62({ \
63 unsigned long flags; \
64 local_save_flags(flags); \
65 (flags & PSW_I) == 0; \
66})
67
68#define mfctl(reg) ({ \ 51#define mfctl(reg) ({ \
69 unsigned long cr; \ 52 unsigned long cr; \
70 __asm__ __volatile__( \ 53 __asm__ __volatile__( \
diff --git a/arch/parisc/include/asm/types.h b/arch/parisc/include/asm/types.h
index 20135cc80039..80e415c9936d 100644
--- a/arch/parisc/include/asm/types.h
+++ b/arch/parisc/include/asm/types.h
@@ -9,20 +9,4 @@ typedef unsigned short umode_t;
9 9
10#endif /* __ASSEMBLY__ */ 10#endif /* __ASSEMBLY__ */
11 11
12/*
13 * These aren't exported outside the kernel to avoid name space clashes
14 */
15#ifdef __KERNEL__
16
17#ifndef __ASSEMBLY__
18
19/* Dma addresses are 32-bits wide. */
20
21typedef u32 dma_addr_t;
22typedef u64 dma64_addr_t;
23
24#endif /* __ASSEMBLY__ */
25
26#endif /* __KERNEL__ */
27
28#endif 12#endif
diff --git a/arch/parisc/include/asm/unistd.h b/arch/parisc/include/asm/unistd.h
index 1ce7d2851d90..3392de3e7be0 100644
--- a/arch/parisc/include/asm/unistd.h
+++ b/arch/parisc/include/asm/unistd.h
@@ -813,8 +813,16 @@
813#define __NR_perf_event_open (__NR_Linux + 318) 813#define __NR_perf_event_open (__NR_Linux + 318)
814#define __NR_recvmmsg (__NR_Linux + 319) 814#define __NR_recvmmsg (__NR_Linux + 319)
815#define __NR_accept4 (__NR_Linux + 320) 815#define __NR_accept4 (__NR_Linux + 320)
816 816#define __NR_prlimit64 (__NR_Linux + 321)
817#define __NR_Linux_syscalls (__NR_accept4 + 1) 817#define __NR_fanotify_init (__NR_Linux + 322)
818#define __NR_fanotify_mark (__NR_Linux + 323)
819#define __NR_clock_adjtime (__NR_Linux + 324)
820#define __NR_name_to_handle_at (__NR_Linux + 325)
821#define __NR_open_by_handle_at (__NR_Linux + 326)
822#define __NR_syncfs (__NR_Linux + 327)
823#define __NR_setns (__NR_Linux + 328)
824
825#define __NR_Linux_syscalls (__NR_setns + 1)
818 826
819 827
820#define __IGNORE_select /* newselect */ 828#define __IGNORE_select /* newselect */
diff --git a/arch/parisc/kernel/cache.c b/arch/parisc/kernel/cache.c
index d054f3da3ff5..83335f3da5fc 100644
--- a/arch/parisc/kernel/cache.c
+++ b/arch/parisc/kernel/cache.c
@@ -27,12 +27,17 @@
27#include <asm/pgalloc.h> 27#include <asm/pgalloc.h>
28#include <asm/processor.h> 28#include <asm/processor.h>
29#include <asm/sections.h> 29#include <asm/sections.h>
30#include <asm/shmparam.h>
30 31
31int split_tlb __read_mostly; 32int split_tlb __read_mostly;
32int dcache_stride __read_mostly; 33int dcache_stride __read_mostly;
33int icache_stride __read_mostly; 34int icache_stride __read_mostly;
34EXPORT_SYMBOL(dcache_stride); 35EXPORT_SYMBOL(dcache_stride);
35 36
37void flush_dcache_page_asm(unsigned long phys_addr, unsigned long vaddr);
38EXPORT_SYMBOL(flush_dcache_page_asm);
39void flush_icache_page_asm(unsigned long phys_addr, unsigned long vaddr);
40
36 41
37/* On some machines (e.g. ones with the Merced bus), there can be 42/* On some machines (e.g. ones with the Merced bus), there can be
38 * only a single PxTLB broadcast at a time; this must be guaranteed 43 * only a single PxTLB broadcast at a time; this must be guaranteed
@@ -259,81 +264,13 @@ void disable_sr_hashing(void)
259 panic("SpaceID hashing is still on!\n"); 264 panic("SpaceID hashing is still on!\n");
260} 265}
261 266
262/* Simple function to work out if we have an existing address translation
263 * for a user space vma. */
264static inline int translation_exists(struct vm_area_struct *vma,
265 unsigned long addr, unsigned long pfn)
266{
267 pgd_t *pgd = pgd_offset(vma->vm_mm, addr);
268 pmd_t *pmd;
269 pte_t pte;
270
271 if(pgd_none(*pgd))
272 return 0;
273
274 pmd = pmd_offset(pgd, addr);
275 if(pmd_none(*pmd) || pmd_bad(*pmd))
276 return 0;
277
278 /* We cannot take the pte lock here: flush_cache_page is usually
279 * called with pte lock already held. Whereas flush_dcache_page
280 * takes flush_dcache_mmap_lock, which is lower in the hierarchy:
281 * the vma itself is secure, but the pte might come or go racily.
282 */
283 pte = *pte_offset_map(pmd, addr);
284 /* But pte_unmap() does nothing on this architecture */
285
286 /* Filter out coincidental file entries and swap entries */
287 if (!(pte_val(pte) & (_PAGE_FLUSH|_PAGE_PRESENT)))
288 return 0;
289
290 return pte_pfn(pte) == pfn;
291}
292
293/* Private function to flush a page from the cache of a non-current
294 * process. cr25 contains the Page Directory of the current user
295 * process; we're going to hijack both it and the user space %sr3 to
296 * temporarily make the non-current process current. We have to do
297 * this because cache flushing may cause a non-access tlb miss which
298 * the handlers have to fill in from the pgd of the non-current
299 * process. */
300static inline void 267static inline void
301flush_user_cache_page_non_current(struct vm_area_struct *vma, 268__flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr,
302 unsigned long vmaddr) 269 unsigned long physaddr)
303{ 270{
304 /* save the current process space and pgd */ 271 flush_dcache_page_asm(physaddr, vmaddr);
305 unsigned long space = mfsp(3), pgd = mfctl(25); 272 if (vma->vm_flags & VM_EXEC)
306 273 flush_icache_page_asm(physaddr, vmaddr);
307 /* we don't mind taking interrupts since they may not
308 * do anything with user space, but we can't
309 * be preempted here */
310 preempt_disable();
311
312 /* make us current */
313 mtctl(__pa(vma->vm_mm->pgd), 25);
314 mtsp(vma->vm_mm->context, 3);
315
316 flush_user_dcache_page(vmaddr);
317 if(vma->vm_flags & VM_EXEC)
318 flush_user_icache_page(vmaddr);
319
320 /* put the old current process back */
321 mtsp(space, 3);
322 mtctl(pgd, 25);
323 preempt_enable();
324}
325
326
327static inline void
328__flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr)
329{
330 if (likely(vma->vm_mm->context == mfsp(3))) {
331 flush_user_dcache_page(vmaddr);
332 if (vma->vm_flags & VM_EXEC)
333 flush_user_icache_page(vmaddr);
334 } else {
335 flush_user_cache_page_non_current(vma, vmaddr);
336 }
337} 274}
338 275
339void flush_dcache_page(struct page *page) 276void flush_dcache_page(struct page *page)
@@ -342,10 +279,8 @@ void flush_dcache_page(struct page *page)
342 struct vm_area_struct *mpnt; 279 struct vm_area_struct *mpnt;
343 struct prio_tree_iter iter; 280 struct prio_tree_iter iter;
344 unsigned long offset; 281 unsigned long offset;
345 unsigned long addr; 282 unsigned long addr, old_addr = 0;
346 pgoff_t pgoff; 283 pgoff_t pgoff;
347 unsigned long pfn = page_to_pfn(page);
348
349 284
350 if (mapping && !mapping_mapped(mapping)) { 285 if (mapping && !mapping_mapped(mapping)) {
351 set_bit(PG_dcache_dirty, &page->flags); 286 set_bit(PG_dcache_dirty, &page->flags);
@@ -369,20 +304,21 @@ void flush_dcache_page(struct page *page)
369 offset = (pgoff - mpnt->vm_pgoff) << PAGE_SHIFT; 304 offset = (pgoff - mpnt->vm_pgoff) << PAGE_SHIFT;
370 addr = mpnt->vm_start + offset; 305 addr = mpnt->vm_start + offset;
371 306
372 /* Flush instructions produce non access tlb misses. 307 /* The TLB is the engine of coherence on parisc: The
373 * On PA, we nullify these instructions rather than 308 * CPU is entitled to speculate any page with a TLB
374 * taking a page fault if the pte doesn't exist. 309 * mapping, so here we kill the mapping then flush the
375 * This is just for speed. If the page translation 310 * page along a special flush only alias mapping.
376 * isn't there, there's no point exciting the 311 * This guarantees that the page is no-longer in the
377 * nadtlb handler into a nullification frenzy. 312 * cache for any process and nor may it be
378 * 313 * speculatively read in (until the user or kernel
379 * Make sure we really have this page: the private 314 * specifically accesses it, of course) */
380 * mappings may cover this area but have COW'd this 315
381 * particular page. 316 flush_tlb_page(mpnt, addr);
382 */ 317 if (old_addr == 0 || (old_addr & (SHMLBA - 1)) != (addr & (SHMLBA - 1))) {
383 if (translation_exists(mpnt, addr, pfn)) { 318 __flush_cache_page(mpnt, addr, page_to_phys(page));
384 __flush_cache_page(mpnt, addr); 319 if (old_addr)
385 break; 320 printk(KERN_ERR "INEQUIVALENT ALIASES 0x%lx and 0x%lx in file %s\n", old_addr, addr, mpnt->vm_file ? (char *)mpnt->vm_file->f_path.dentry->d_name.name : "(null)");
321 old_addr = addr;
386 } 322 }
387 } 323 }
388 flush_dcache_mmap_unlock(mapping); 324 flush_dcache_mmap_unlock(mapping);
@@ -573,7 +509,7 @@ flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long
573{ 509{
574 BUG_ON(!vma->vm_mm->context); 510 BUG_ON(!vma->vm_mm->context);
575 511
576 if (likely(translation_exists(vma, vmaddr, pfn))) 512 flush_tlb_page(vma, vmaddr);
577 __flush_cache_page(vma, vmaddr); 513 __flush_cache_page(vma, vmaddr, page_to_phys(pfn_to_page(pfn)));
578 514
579} 515}
diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S
index 6337adef30f6..6f0594439143 100644
--- a/arch/parisc/kernel/entry.S
+++ b/arch/parisc/kernel/entry.S
@@ -187,8 +187,8 @@
187 187
188 /* Register definitions for tlb miss handler macros */ 188 /* Register definitions for tlb miss handler macros */
189 189
190 va = r8 /* virtual address for which the trap occured */ 190 va = r8 /* virtual address for which the trap occurred */
191 spc = r24 /* space for which the trap occured */ 191 spc = r24 /* space for which the trap occurred */
192 192
193#ifndef CONFIG_64BIT 193#ifndef CONFIG_64BIT
194 194
@@ -225,22 +225,13 @@
225#ifndef CONFIG_64BIT 225#ifndef CONFIG_64BIT
226 /* 226 /*
227 * naitlb miss interruption handler (parisc 1.1 - 32 bit) 227 * naitlb miss interruption handler (parisc 1.1 - 32 bit)
228 *
229 * Note: naitlb misses will be treated
230 * as an ordinary itlb miss for now.
231 * However, note that naitlb misses
232 * have the faulting address in the
233 * IOR/ISR.
234 */ 228 */
235 229
236 .macro naitlb_11 code 230 .macro naitlb_11 code
237 231
238 mfctl %isr,spc 232 mfctl %isr,spc
239 b itlb_miss_11 233 b naitlb_miss_11
240 mfctl %ior,va 234 mfctl %ior,va
241 /* FIXME: If user causes a naitlb miss, the priv level may not be in
242 * lower bits of va, where the itlb miss handler is expecting them
243 */
244 235
245 .align 32 236 .align 32
246 .endm 237 .endm
@@ -248,26 +239,17 @@
248 239
249 /* 240 /*
250 * naitlb miss interruption handler (parisc 2.0) 241 * naitlb miss interruption handler (parisc 2.0)
251 *
252 * Note: naitlb misses will be treated
253 * as an ordinary itlb miss for now.
254 * However, note that naitlb misses
255 * have the faulting address in the
256 * IOR/ISR.
257 */ 242 */
258 243
259 .macro naitlb_20 code 244 .macro naitlb_20 code
260 245
261 mfctl %isr,spc 246 mfctl %isr,spc
262#ifdef CONFIG_64BIT 247#ifdef CONFIG_64BIT
263 b itlb_miss_20w 248 b naitlb_miss_20w
264#else 249#else
265 b itlb_miss_20 250 b naitlb_miss_20
266#endif 251#endif
267 mfctl %ior,va 252 mfctl %ior,va
268 /* FIXME: If user causes a naitlb miss, the priv level may not be in
269 * lower bits of va, where the itlb miss handler is expecting them
270 */
271 253
272 .align 32 254 .align 32
273 .endm 255 .endm
@@ -581,7 +563,24 @@
581 copy \va,\tmp1 563 copy \va,\tmp1
582 depi 0,31,23,\tmp1 564 depi 0,31,23,\tmp1
583 cmpb,COND(<>),n \tmp,\tmp1,\fault 565 cmpb,COND(<>),n \tmp,\tmp1,\fault
584 ldi (_PAGE_DIRTY|_PAGE_WRITE|_PAGE_READ),\prot 566 mfctl %cr19,\tmp /* iir */
567 /* get the opcode (first six bits) into \tmp */
568 extrw,u \tmp,5,6,\tmp
569 /*
570 * Only setting the T bit prevents data cache movein
571 * Setting access rights to zero prevents instruction cache movein
572 *
573 * Note subtlety here: _PAGE_GATEWAY, _PAGE_EXEC and _PAGE_WRITE go
574 * to type field and _PAGE_READ goes to top bit of PL1
575 */
576 ldi (_PAGE_REFTRAP|_PAGE_READ|_PAGE_WRITE),\prot
577 /*
578 * so if the opcode is one (i.e. this is a memory management
579 * instruction) nullify the next load so \prot is only T.
580 * Otherwise this is a normal data operation
581 */
582 cmpiclr,= 0x01,\tmp,%r0
583 ldi (_PAGE_DIRTY|_PAGE_READ|_PAGE_WRITE),\prot
585 depd,z \prot,8,7,\prot 584 depd,z \prot,8,7,\prot
586 /* 585 /*
587 * OK, it is in the temp alias region, check whether "from" or "to". 586 * OK, it is in the temp alias region, check whether "from" or "to".
@@ -631,11 +630,7 @@ ENTRY(fault_vector_20)
631 def 13 630 def 13
632 def 14 631 def 14
633 dtlb_20 15 632 dtlb_20 15
634#if 0
635 naitlb_20 16 633 naitlb_20 16
636#else
637 def 16
638#endif
639 nadtlb_20 17 634 nadtlb_20 17
640 def 18 635 def 18
641 def 19 636 def 19
@@ -678,11 +673,7 @@ ENTRY(fault_vector_11)
678 def 13 673 def 13
679 def 14 674 def 14
680 dtlb_11 15 675 dtlb_11 15
681#if 0
682 naitlb_11 16 676 naitlb_11 16
683#else
684 def 16
685#endif
686 nadtlb_11 17 677 nadtlb_11 17
687 def 18 678 def 18
688 def 19 679 def 19
@@ -701,6 +692,9 @@ ENTRY(fault_vector_11)
701END(fault_vector_11) 692END(fault_vector_11)
702 693
703#endif 694#endif
695 /* Fault vector is separately protected and *must* be on its own page */
696 .align PAGE_SIZE
697ENTRY(end_fault_vector)
704 698
705 .import handle_interruption,code 699 .import handle_interruption,code
706 .import do_cpu_irq_mask,code 700 .import do_cpu_irq_mask,code
@@ -891,7 +885,7 @@ ENTRY(syscall_exit_rfi)
891 * (we don't store them in the sigcontext), so set them 885 * (we don't store them in the sigcontext), so set them
892 * to "proper" values now (otherwise we'll wind up restoring 886 * to "proper" values now (otherwise we'll wind up restoring
893 * whatever was last stored in the task structure, which might 887 * whatever was last stored in the task structure, which might
894 * be inconsistent if an interrupt occured while on the gateway 888 * be inconsistent if an interrupt occurred while on the gateway
895 * page). Note that we may be "trashing" values the user put in 889 * page). Note that we may be "trashing" values the user put in
896 * them, but we don't support the user changing them. 890 * them, but we don't support the user changing them.
897 */ 891 */
@@ -1165,11 +1159,11 @@ ENDPROC(intr_save)
1165 */ 1159 */
1166 1160
1167 t0 = r1 /* temporary register 0 */ 1161 t0 = r1 /* temporary register 0 */
1168 va = r8 /* virtual address for which the trap occured */ 1162 va = r8 /* virtual address for which the trap occurred */
1169 t1 = r9 /* temporary register 1 */ 1163 t1 = r9 /* temporary register 1 */
1170 pte = r16 /* pte/phys page # */ 1164 pte = r16 /* pte/phys page # */
1171 prot = r17 /* prot bits */ 1165 prot = r17 /* prot bits */
1172 spc = r24 /* space for which the trap occured */ 1166 spc = r24 /* space for which the trap occurred */
1173 ptp = r25 /* page directory/page table pointer */ 1167 ptp = r25 /* page directory/page table pointer */
1174 1168
1175#ifdef CONFIG_64BIT 1169#ifdef CONFIG_64BIT
@@ -1203,7 +1197,7 @@ nadtlb_miss_20w:
1203 get_pgd spc,ptp 1197 get_pgd spc,ptp
1204 space_check spc,t0,nadtlb_fault 1198 space_check spc,t0,nadtlb_fault
1205 1199
1206 L3_ptep ptp,pte,t0,va,nadtlb_check_flush_20w 1200 L3_ptep ptp,pte,t0,va,nadtlb_check_alias_20w
1207 1201
1208 update_ptep ptp,pte,t0,t1 1202 update_ptep ptp,pte,t0,t1
1209 1203
@@ -1214,16 +1208,8 @@ nadtlb_miss_20w:
1214 rfir 1208 rfir
1215 nop 1209 nop
1216 1210
1217nadtlb_check_flush_20w: 1211nadtlb_check_alias_20w:
1218 bb,>=,n pte,_PAGE_FLUSH_BIT,nadtlb_emulate 1212 do_alias spc,t0,t1,va,pte,prot,nadtlb_emulate
1219
1220 /* Insert a "flush only" translation */
1221
1222 depdi,z 7,7,3,prot
1223 depdi 1,10,1,prot
1224
1225 /* Drop prot bits from pte and convert to page addr for idtlbt */
1226 convert_for_tlb_insert20 pte
1227 1213
1228 idtlbt pte,prot 1214 idtlbt pte,prot
1229 1215
@@ -1255,25 +1241,7 @@ dtlb_miss_11:
1255 nop 1241 nop
1256 1242
1257dtlb_check_alias_11: 1243dtlb_check_alias_11:
1258 1244 do_alias spc,t0,t1,va,pte,prot,dtlb_fault
1259 /* Check to see if fault is in the temporary alias region */
1260
1261 cmpib,<>,n 0,spc,dtlb_fault /* forward */
1262 ldil L%(TMPALIAS_MAP_START),t0
1263 copy va,t1
1264 depwi 0,31,23,t1
1265 cmpb,<>,n t0,t1,dtlb_fault /* forward */
1266 ldi (_PAGE_DIRTY|_PAGE_WRITE|_PAGE_READ),prot
1267 depw,z prot,8,7,prot
1268
1269 /*
1270 * OK, it is in the temp alias region, check whether "from" or "to".
1271 * Check "subtle" note in pacache.S re: r23/r26.
1272 */
1273
1274 extrw,u,= va,9,1,r0
1275 or,tr %r23,%r0,pte /* If "from" use "from" page */
1276 or %r26,%r0,pte /* else "to", use "to" page */
1277 1245
1278 idtlba pte,(va) 1246 idtlba pte,(va)
1279 idtlbp prot,(va) 1247 idtlbp prot,(va)
@@ -1286,7 +1254,7 @@ nadtlb_miss_11:
1286 1254
1287 space_check spc,t0,nadtlb_fault 1255 space_check spc,t0,nadtlb_fault
1288 1256
1289 L2_ptep ptp,pte,t0,va,nadtlb_check_flush_11 1257 L2_ptep ptp,pte,t0,va,nadtlb_check_alias_11
1290 1258
1291 update_ptep ptp,pte,t0,t1 1259 update_ptep ptp,pte,t0,t1
1292 1260
@@ -1304,26 +1272,11 @@ nadtlb_miss_11:
1304 rfir 1272 rfir
1305 nop 1273 nop
1306 1274
1307nadtlb_check_flush_11: 1275nadtlb_check_alias_11:
1308 bb,>=,n pte,_PAGE_FLUSH_BIT,nadtlb_emulate 1276 do_alias spc,t0,t1,va,pte,prot,nadtlb_emulate
1309
1310 /* Insert a "flush only" translation */
1311
1312 zdepi 7,7,3,prot
1313 depi 1,10,1,prot
1314 1277
1315 /* Get rid of prot bits and convert to page addr for idtlba */ 1278 idtlba pte,(va)
1316 1279 idtlbp prot,(va)
1317 depi 0,31,ASM_PFN_PTE_SHIFT,pte
1318 SHRREG pte,(ASM_PFN_PTE_SHIFT-(31-26)),pte
1319
1320 mfsp %sr1,t0 /* Save sr1 so we can use it in tlb inserts */
1321 mtsp spc,%sr1
1322
1323 idtlba pte,(%sr1,va)
1324 idtlbp prot,(%sr1,va)
1325
1326 mtsp t0, %sr1 /* Restore sr1 */
1327 1280
1328 rfir 1281 rfir
1329 nop 1282 nop
@@ -1359,7 +1312,7 @@ nadtlb_miss_20:
1359 1312
1360 space_check spc,t0,nadtlb_fault 1313 space_check spc,t0,nadtlb_fault
1361 1314
1362 L2_ptep ptp,pte,t0,va,nadtlb_check_flush_20 1315 L2_ptep ptp,pte,t0,va,nadtlb_check_alias_20
1363 1316
1364 update_ptep ptp,pte,t0,t1 1317 update_ptep ptp,pte,t0,t1
1365 1318
@@ -1372,21 +1325,14 @@ nadtlb_miss_20:
1372 rfir 1325 rfir
1373 nop 1326 nop
1374 1327
1375nadtlb_check_flush_20: 1328nadtlb_check_alias_20:
1376 bb,>=,n pte,_PAGE_FLUSH_BIT,nadtlb_emulate 1329 do_alias spc,t0,t1,va,pte,prot,nadtlb_emulate
1377
1378 /* Insert a "flush only" translation */
1379
1380 depdi,z 7,7,3,prot
1381 depdi 1,10,1,prot
1382
1383 /* Drop prot bits from pte and convert to page addr for idtlbt */
1384 convert_for_tlb_insert20 pte
1385 1330
1386 idtlbt pte,prot 1331 idtlbt pte,prot
1387 1332
1388 rfir 1333 rfir
1389 nop 1334 nop
1335
1390#endif 1336#endif
1391 1337
1392nadtlb_emulate: 1338nadtlb_emulate:
@@ -1484,6 +1430,36 @@ itlb_miss_20w:
1484 rfir 1430 rfir
1485 nop 1431 nop
1486 1432
1433naitlb_miss_20w:
1434
1435 /*
1436 * I miss is a little different, since we allow users to fault
1437 * on the gateway page which is in the kernel address space.
1438 */
1439
1440 space_adjust spc,va,t0
1441 get_pgd spc,ptp
1442 space_check spc,t0,naitlb_fault
1443
1444 L3_ptep ptp,pte,t0,va,naitlb_check_alias_20w
1445
1446 update_ptep ptp,pte,t0,t1
1447
1448 make_insert_tlb spc,pte,prot
1449
1450 iitlbt pte,prot
1451
1452 rfir
1453 nop
1454
1455naitlb_check_alias_20w:
1456 do_alias spc,t0,t1,va,pte,prot,naitlb_fault
1457
1458 iitlbt pte,prot
1459
1460 rfir
1461 nop
1462
1487#else 1463#else
1488 1464
1489itlb_miss_11: 1465itlb_miss_11:
@@ -1508,6 +1484,38 @@ itlb_miss_11:
1508 rfir 1484 rfir
1509 nop 1485 nop
1510 1486
1487naitlb_miss_11:
1488 get_pgd spc,ptp
1489
1490 space_check spc,t0,naitlb_fault
1491
1492 L2_ptep ptp,pte,t0,va,naitlb_check_alias_11
1493
1494 update_ptep ptp,pte,t0,t1
1495
1496 make_insert_tlb_11 spc,pte,prot
1497
1498 mfsp %sr1,t0 /* Save sr1 so we can use it in tlb inserts */
1499 mtsp spc,%sr1
1500
1501 iitlba pte,(%sr1,va)
1502 iitlbp prot,(%sr1,va)
1503
1504 mtsp t0, %sr1 /* Restore sr1 */
1505
1506 rfir
1507 nop
1508
1509naitlb_check_alias_11:
1510 do_alias spc,t0,t1,va,pte,prot,itlb_fault
1511
1512 iitlba pte,(%sr0, va)
1513 iitlbp prot,(%sr0, va)
1514
1515 rfir
1516 nop
1517
1518
1511itlb_miss_20: 1519itlb_miss_20:
1512 get_pgd spc,ptp 1520 get_pgd spc,ptp
1513 1521
@@ -1526,6 +1534,32 @@ itlb_miss_20:
1526 rfir 1534 rfir
1527 nop 1535 nop
1528 1536
1537naitlb_miss_20:
1538 get_pgd spc,ptp
1539
1540 space_check spc,t0,naitlb_fault
1541
1542 L2_ptep ptp,pte,t0,va,naitlb_check_alias_20
1543
1544 update_ptep ptp,pte,t0,t1
1545
1546 make_insert_tlb spc,pte,prot
1547
1548 f_extend pte,t0
1549
1550 iitlbt pte,prot
1551
1552 rfir
1553 nop
1554
1555naitlb_check_alias_20:
1556 do_alias spc,t0,t1,va,pte,prot,naitlb_fault
1557
1558 iitlbt pte,prot
1559
1560 rfir
1561 nop
1562
1529#endif 1563#endif
1530 1564
1531#ifdef CONFIG_64BIT 1565#ifdef CONFIG_64BIT
@@ -1662,6 +1696,10 @@ nadtlb_fault:
1662 b intr_save 1696 b intr_save
1663 ldi 17,%r8 1697 ldi 17,%r8
1664 1698
1699naitlb_fault:
1700 b intr_save
1701 ldi 16,%r8
1702
1665dtlb_fault: 1703dtlb_fault:
1666 b intr_save 1704 b intr_save
1667 ldi 15,%r8 1705 ldi 15,%r8
diff --git a/arch/parisc/kernel/firmware.c b/arch/parisc/kernel/firmware.c
index df971fa0c32f..4896ed090585 100644
--- a/arch/parisc/kernel/firmware.c
+++ b/arch/parisc/kernel/firmware.c
@@ -1126,15 +1126,13 @@ int pdc_iodc_print(const unsigned char *str, unsigned count)
1126 unsigned int i; 1126 unsigned int i;
1127 unsigned long flags; 1127 unsigned long flags;
1128 1128
1129 for (i = 0; i < count && i < 79;) { 1129 for (i = 0; i < count;) {
1130 switch(str[i]) { 1130 switch(str[i]) {
1131 case '\n': 1131 case '\n':
1132 iodc_dbuf[i+0] = '\r'; 1132 iodc_dbuf[i+0] = '\r';
1133 iodc_dbuf[i+1] = '\n'; 1133 iodc_dbuf[i+1] = '\n';
1134 i += 2; 1134 i += 2;
1135 goto print; 1135 goto print;
1136 case '\b': /* BS */
1137 i--; /* overwrite last */
1138 default: 1136 default:
1139 iodc_dbuf[i] = str[i]; 1137 iodc_dbuf[i] = str[i];
1140 i++; 1138 i++;
@@ -1142,15 +1140,6 @@ int pdc_iodc_print(const unsigned char *str, unsigned count)
1142 } 1140 }
1143 } 1141 }
1144 1142
1145 /* if we're at the end of line, and not already inserting a newline,
1146 * insert one anyway. iodc console doesn't claim to support >79 char
1147 * lines. don't account for this in the return value.
1148 */
1149 if (i == 79 && iodc_dbuf[i-1] != '\n') {
1150 iodc_dbuf[i+0] = '\r';
1151 iodc_dbuf[i+1] = '\n';
1152 }
1153
1154print: 1143print:
1155 spin_lock_irqsave(&pdc_lock, flags); 1144 spin_lock_irqsave(&pdc_lock, flags);
1156 real32_call(PAGE0->mem_cons.iodc_io, 1145 real32_call(PAGE0->mem_cons.iodc_io,
diff --git a/arch/parisc/kernel/head.S b/arch/parisc/kernel/head.S
index 4dbdf0ed6fa0..37aabd772fbb 100644
--- a/arch/parisc/kernel/head.S
+++ b/arch/parisc/kernel/head.S
@@ -106,8 +106,9 @@ $bss_loop:
106#endif 106#endif
107 107
108 108
109 /* Now initialize the PTEs themselves */ 109 /* Now initialize the PTEs themselves. We use RWX for
110 ldo 0+_PAGE_KERNEL(%r0),%r3 /* Hardwired 0 phys addr start */ 110 * everything ... it will get remapped correctly later */
111 ldo 0+_PAGE_KERNEL_RWX(%r0),%r3 /* Hardwired 0 phys addr start */
111 ldi (1<<(KERNEL_INITIAL_ORDER-PAGE_SHIFT)),%r11 /* PFN count */ 112 ldi (1<<(KERNEL_INITIAL_ORDER-PAGE_SHIFT)),%r11 /* PFN count */
112 load32 PA(pg0),%r1 113 load32 PA(pg0),%r1
113 114
@@ -131,7 +132,7 @@ $pgt_fill_loop:
131 ldo THREAD_SZ_ALGN(%r6),%sp 132 ldo THREAD_SZ_ALGN(%r6),%sp
132 133
133#ifdef CONFIG_SMP 134#ifdef CONFIG_SMP
134 /* Set the smp rendevous address into page zero. 135 /* Set the smp rendezvous address into page zero.
135 ** It would be safer to do this in init_smp_config() but 136 ** It would be safer to do this in init_smp_config() but
136 ** it's just way easier to deal with here because 137 ** it's just way easier to deal with here because
137 ** of 64-bit function ptrs and the address is local to this file. 138 ** of 64-bit function ptrs and the address is local to this file.
diff --git a/arch/parisc/kernel/inventory.c b/arch/parisc/kernel/inventory.c
index d228d8237879..08324aac3544 100644
--- a/arch/parisc/kernel/inventory.c
+++ b/arch/parisc/kernel/inventory.c
@@ -93,7 +93,7 @@ void __init setup_pdc(void)
93 case 0x6: /* 705, 710 */ 93 case 0x6: /* 705, 710 */
94 case 0x7: /* 715, 725 */ 94 case 0x7: /* 715, 725 */
95 case 0x8: /* 745, 747, 742 */ 95 case 0x8: /* 745, 747, 742 */
96 case 0xA: /* 712 and similiar */ 96 case 0xA: /* 712 and similar */
97 case 0xC: /* 715/64, at least */ 97 case 0xC: /* 715/64, at least */
98 98
99 pdc_type = PDC_TYPE_SNAKE; 99 pdc_type = PDC_TYPE_SNAKE;
diff --git a/arch/parisc/kernel/irq.c b/arch/parisc/kernel/irq.c
index efbcee5d2220..c0b1affc06a8 100644
--- a/arch/parisc/kernel/irq.c
+++ b/arch/parisc/kernel/irq.c
@@ -52,9 +52,9 @@ static volatile unsigned long cpu_eiem = 0;
52*/ 52*/
53static DEFINE_PER_CPU(unsigned long, local_ack_eiem) = ~0UL; 53static DEFINE_PER_CPU(unsigned long, local_ack_eiem) = ~0UL;
54 54
55static void cpu_disable_irq(unsigned int irq) 55static void cpu_mask_irq(struct irq_data *d)
56{ 56{
57 unsigned long eirr_bit = EIEM_MASK(irq); 57 unsigned long eirr_bit = EIEM_MASK(d->irq);
58 58
59 cpu_eiem &= ~eirr_bit; 59 cpu_eiem &= ~eirr_bit;
60 /* Do nothing on the other CPUs. If they get this interrupt, 60 /* Do nothing on the other CPUs. If they get this interrupt,
@@ -63,7 +63,7 @@ static void cpu_disable_irq(unsigned int irq)
63 * then gets disabled */ 63 * then gets disabled */
64} 64}
65 65
66static void cpu_enable_irq(unsigned int irq) 66static void __cpu_unmask_irq(unsigned int irq)
67{ 67{
68 unsigned long eirr_bit = EIEM_MASK(irq); 68 unsigned long eirr_bit = EIEM_MASK(irq);
69 69
@@ -75,18 +75,14 @@ static void cpu_enable_irq(unsigned int irq)
75 smp_send_all_nop(); 75 smp_send_all_nop();
76} 76}
77 77
78static unsigned int cpu_startup_irq(unsigned int irq) 78static void cpu_unmask_irq(struct irq_data *d)
79{ 79{
80 cpu_enable_irq(irq); 80 __cpu_unmask_irq(d->irq);
81 return 0;
82} 81}
83 82
84void no_ack_irq(unsigned int irq) { } 83void cpu_ack_irq(struct irq_data *d)
85void no_end_irq(unsigned int irq) { }
86
87void cpu_ack_irq(unsigned int irq)
88{ 84{
89 unsigned long mask = EIEM_MASK(irq); 85 unsigned long mask = EIEM_MASK(d->irq);
90 int cpu = smp_processor_id(); 86 int cpu = smp_processor_id();
91 87
92 /* Clear in EIEM so we can no longer process */ 88 /* Clear in EIEM so we can no longer process */
@@ -99,9 +95,9 @@ void cpu_ack_irq(unsigned int irq)
99 mtctl(mask, 23); 95 mtctl(mask, 23);
100} 96}
101 97
102void cpu_end_irq(unsigned int irq) 98void cpu_eoi_irq(struct irq_data *d)
103{ 99{
104 unsigned long mask = EIEM_MASK(irq); 100 unsigned long mask = EIEM_MASK(d->irq);
105 int cpu = smp_processor_id(); 101 int cpu = smp_processor_id();
106 102
107 /* set it in the eiems---it's no longer in process */ 103 /* set it in the eiems---it's no longer in process */
@@ -112,17 +108,13 @@ void cpu_end_irq(unsigned int irq)
112} 108}
113 109
114#ifdef CONFIG_SMP 110#ifdef CONFIG_SMP
115int cpu_check_affinity(unsigned int irq, const struct cpumask *dest) 111int cpu_check_affinity(struct irq_data *d, const struct cpumask *dest)
116{ 112{
117 int cpu_dest; 113 int cpu_dest;
118 114
119 /* timer and ipi have to always be received on all CPUs */ 115 /* timer and ipi have to always be received on all CPUs */
120 if (CHECK_IRQ_PER_CPU(irq)) { 116 if (irqd_is_per_cpu(d))
121 /* Bad linux design decision. The mask has already
122 * been set; we must reset it */
123 cpumask_setall(irq_desc[irq].affinity);
124 return -EINVAL; 117 return -EINVAL;
125 }
126 118
127 /* whatever mask they set, we just allow one CPU */ 119 /* whatever mask they set, we just allow one CPU */
128 cpu_dest = first_cpu(*dest); 120 cpu_dest = first_cpu(*dest);
@@ -130,35 +122,34 @@ int cpu_check_affinity(unsigned int irq, const struct cpumask *dest)
130 return cpu_dest; 122 return cpu_dest;
131} 123}
132 124
133static int cpu_set_affinity_irq(unsigned int irq, const struct cpumask *dest) 125static int cpu_set_affinity_irq(struct irq_data *d, const struct cpumask *dest,
126 bool force)
134{ 127{
135 int cpu_dest; 128 int cpu_dest;
136 129
137 cpu_dest = cpu_check_affinity(irq, dest); 130 cpu_dest = cpu_check_affinity(d, dest);
138 if (cpu_dest < 0) 131 if (cpu_dest < 0)
139 return -1; 132 return -1;
140 133
141 cpumask_copy(irq_desc[irq].affinity, dest); 134 cpumask_copy(d->affinity, dest);
142 135
143 return 0; 136 return 0;
144} 137}
145#endif 138#endif
146 139
147static struct irq_chip cpu_interrupt_type = { 140static struct irq_chip cpu_interrupt_type = {
148 .name = "CPU", 141 .name = "CPU",
149 .startup = cpu_startup_irq, 142 .irq_mask = cpu_mask_irq,
150 .shutdown = cpu_disable_irq, 143 .irq_unmask = cpu_unmask_irq,
151 .enable = cpu_enable_irq, 144 .irq_ack = cpu_ack_irq,
152 .disable = cpu_disable_irq, 145 .irq_eoi = cpu_eoi_irq,
153 .ack = cpu_ack_irq,
154 .end = cpu_end_irq,
155#ifdef CONFIG_SMP 146#ifdef CONFIG_SMP
156 .set_affinity = cpu_set_affinity_irq, 147 .irq_set_affinity = cpu_set_affinity_irq,
157#endif 148#endif
158 /* XXX: Needs to be written. We managed without it so far, but 149 /* XXX: Needs to be written. We managed without it so far, but
159 * we really ought to write it. 150 * we really ought to write it.
160 */ 151 */
161 .retrigger = NULL, 152 .irq_retrigger = NULL,
162}; 153};
163 154
164int show_interrupts(struct seq_file *p, void *v) 155int show_interrupts(struct seq_file *p, void *v)
@@ -178,10 +169,11 @@ int show_interrupts(struct seq_file *p, void *v)
178 } 169 }
179 170
180 if (i < NR_IRQS) { 171 if (i < NR_IRQS) {
172 struct irq_desc *desc = irq_to_desc(i);
181 struct irqaction *action; 173 struct irqaction *action;
182 174
183 raw_spin_lock_irqsave(&irq_desc[i].lock, flags); 175 raw_spin_lock_irqsave(&desc->lock, flags);
184 action = irq_desc[i].action; 176 action = desc->action;
185 if (!action) 177 if (!action)
186 goto skip; 178 goto skip;
187 seq_printf(p, "%3d: ", i); 179 seq_printf(p, "%3d: ", i);
@@ -192,7 +184,7 @@ int show_interrupts(struct seq_file *p, void *v)
192 seq_printf(p, "%10u ", kstat_irqs(i)); 184 seq_printf(p, "%10u ", kstat_irqs(i));
193#endif 185#endif
194 186
195 seq_printf(p, " %14s", irq_desc[i].chip->name); 187 seq_printf(p, " %14s", irq_desc_get_chip(desc)->name);
196#ifndef PARISC_IRQ_CR16_COUNTS 188#ifndef PARISC_IRQ_CR16_COUNTS
197 seq_printf(p, " %s", action->name); 189 seq_printf(p, " %s", action->name);
198 190
@@ -224,7 +216,7 @@ int show_interrupts(struct seq_file *p, void *v)
224 216
225 seq_putc(p, '\n'); 217 seq_putc(p, '\n');
226 skip: 218 skip:
227 raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags); 219 raw_spin_unlock_irqrestore(&desc->lock, flags);
228 } 220 }
229 221
230 return 0; 222 return 0;
@@ -242,15 +234,16 @@ int show_interrupts(struct seq_file *p, void *v)
242 234
243int cpu_claim_irq(unsigned int irq, struct irq_chip *type, void *data) 235int cpu_claim_irq(unsigned int irq, struct irq_chip *type, void *data)
244{ 236{
245 if (irq_desc[irq].action) 237 if (irq_has_action(irq))
246 return -EBUSY; 238 return -EBUSY;
247 if (irq_desc[irq].chip != &cpu_interrupt_type) 239 if (irq_get_chip(irq) != &cpu_interrupt_type)
248 return -EBUSY; 240 return -EBUSY;
249 241
242 /* for iosapic interrupts */
250 if (type) { 243 if (type) {
251 irq_desc[irq].chip = type; 244 irq_set_chip_and_handler(irq, type, handle_percpu_irq);
252 irq_desc[irq].chip_data = data; 245 irq_set_chip_data(irq, data);
253 cpu_interrupt_type.enable(irq); 246 __cpu_unmask_irq(irq);
254 } 247 }
255 return 0; 248 return 0;
256} 249}
@@ -299,7 +292,8 @@ int txn_alloc_irq(unsigned int bits_wide)
299unsigned long txn_affinity_addr(unsigned int irq, int cpu) 292unsigned long txn_affinity_addr(unsigned int irq, int cpu)
300{ 293{
301#ifdef CONFIG_SMP 294#ifdef CONFIG_SMP
302 cpumask_copy(irq_desc[irq].affinity, cpumask_of(cpu)); 295 struct irq_data *d = irq_get_irq_data(irq);
296 cpumask_copy(d->affinity, cpumask_of(cpu));
303#endif 297#endif
304 298
305 return per_cpu(cpu_data, cpu).txn_addr; 299 return per_cpu(cpu_data, cpu).txn_addr;
@@ -343,6 +337,7 @@ void do_cpu_irq_mask(struct pt_regs *regs)
343 unsigned long eirr_val; 337 unsigned long eirr_val;
344 int irq, cpu = smp_processor_id(); 338 int irq, cpu = smp_processor_id();
345#ifdef CONFIG_SMP 339#ifdef CONFIG_SMP
340 struct irq_desc *desc;
346 cpumask_t dest; 341 cpumask_t dest;
347#endif 342#endif
348 343
@@ -356,8 +351,9 @@ void do_cpu_irq_mask(struct pt_regs *regs)
356 irq = eirr_to_irq(eirr_val); 351 irq = eirr_to_irq(eirr_val);
357 352
358#ifdef CONFIG_SMP 353#ifdef CONFIG_SMP
359 cpumask_copy(&dest, irq_desc[irq].affinity); 354 desc = irq_to_desc(irq);
360 if (CHECK_IRQ_PER_CPU(irq_desc[irq].status) && 355 cpumask_copy(&dest, desc->irq_data.affinity);
356 if (irqd_is_per_cpu(&desc->irq_data) &&
361 !cpu_isset(smp_processor_id(), dest)) { 357 !cpu_isset(smp_processor_id(), dest)) {
362 int cpu = first_cpu(dest); 358 int cpu = first_cpu(dest);
363 359
@@ -368,7 +364,7 @@ void do_cpu_irq_mask(struct pt_regs *regs)
368 goto set_out; 364 goto set_out;
369 } 365 }
370#endif 366#endif
371 __do_IRQ(irq); 367 generic_handle_irq(irq);
372 368
373 out: 369 out:
374 irq_exit(); 370 irq_exit();
@@ -398,14 +394,15 @@ static void claim_cpu_irqs(void)
398{ 394{
399 int i; 395 int i;
400 for (i = CPU_IRQ_BASE; i <= CPU_IRQ_MAX; i++) { 396 for (i = CPU_IRQ_BASE; i <= CPU_IRQ_MAX; i++) {
401 irq_desc[i].chip = &cpu_interrupt_type; 397 irq_set_chip_and_handler(i, &cpu_interrupt_type,
398 handle_percpu_irq);
402 } 399 }
403 400
404 irq_desc[TIMER_IRQ].action = &timer_action; 401 irq_set_handler(TIMER_IRQ, handle_percpu_irq);
405 irq_desc[TIMER_IRQ].status = IRQ_PER_CPU; 402 setup_irq(TIMER_IRQ, &timer_action);
406#ifdef CONFIG_SMP 403#ifdef CONFIG_SMP
407 irq_desc[IPI_IRQ].action = &ipi_action; 404 irq_set_handler(IPI_IRQ, handle_percpu_irq);
408 irq_desc[IPI_IRQ].status = IRQ_PER_CPU; 405 setup_irq(IPI_IRQ, &ipi_action);
409#endif 406#endif
410} 407}
411 408
@@ -423,3 +420,4 @@ void __init init_IRQ(void)
423 set_eiem(cpu_eiem); /* EIEM : enable all external intr */ 420 set_eiem(cpu_eiem); /* EIEM : enable all external intr */
424 421
425} 422}
423
diff --git a/arch/parisc/kernel/module.c b/arch/parisc/kernel/module.c
index 6e81bb596e5b..cedbbb8b18d9 100644
--- a/arch/parisc/kernel/module.c
+++ b/arch/parisc/kernel/module.c
@@ -61,8 +61,10 @@
61#include <linux/string.h> 61#include <linux/string.h>
62#include <linux/kernel.h> 62#include <linux/kernel.h>
63#include <linux/bug.h> 63#include <linux/bug.h>
64#include <linux/mm.h>
64#include <linux/slab.h> 65#include <linux/slab.h>
65 66
67#include <asm/pgtable.h>
66#include <asm/unwind.h> 68#include <asm/unwind.h>
67 69
68#if 0 70#if 0
@@ -214,7 +216,13 @@ void *module_alloc(unsigned long size)
214{ 216{
215 if (size == 0) 217 if (size == 0)
216 return NULL; 218 return NULL;
217 return vmalloc(size); 219 /* using RWX means less protection for modules, but it's
220 * easier than trying to map the text, data, init_text and
221 * init_data correctly */
222 return __vmalloc_node_range(size, 1, VMALLOC_START, VMALLOC_END,
223 GFP_KERNEL | __GFP_HIGHMEM,
224 PAGE_KERNEL_RWX, -1,
225 __builtin_return_address(0));
218} 226}
219 227
220#ifndef CONFIG_64BIT 228#ifndef CONFIG_64BIT
diff --git a/arch/parisc/kernel/pacache.S b/arch/parisc/kernel/pacache.S
index 09b77b2553c6..93ff3d90edd1 100644
--- a/arch/parisc/kernel/pacache.S
+++ b/arch/parisc/kernel/pacache.S
@@ -608,93 +608,131 @@ ENTRY(__clear_user_page_asm)
608 .procend 608 .procend
609ENDPROC(__clear_user_page_asm) 609ENDPROC(__clear_user_page_asm)
610 610
611ENTRY(flush_kernel_dcache_page_asm) 611ENTRY(flush_dcache_page_asm)
612 .proc 612 .proc
613 .callinfo NO_CALLS 613 .callinfo NO_CALLS
614 .entry 614 .entry
615 615
616 ldil L%(TMPALIAS_MAP_START), %r28
617#ifdef CONFIG_64BIT
618#if (TMPALIAS_MAP_START >= 0x80000000)
619 depdi 0, 31,32, %r28 /* clear any sign extension */
620 /* FIXME: page size dependend */
621#endif
622 extrd,u %r26, 56,32, %r26 /* convert phys addr to tlb insert format */
623 depd %r25, 63,22, %r28 /* Form aliased virtual address 'to' */
624 depdi 0, 63,12, %r28 /* Clear any offset bits */
625#else
626 extrw,u %r26, 24,25, %r26 /* convert phys addr to tlb insert format */
627 depw %r25, 31,22, %r28 /* Form aliased virtual address 'to' */
628 depwi 0, 31,12, %r28 /* Clear any offset bits */
629#endif
630
631 /* Purge any old translation */
632
633 pdtlb 0(%r28)
634
616 ldil L%dcache_stride, %r1 635 ldil L%dcache_stride, %r1
617 ldw R%dcache_stride(%r1), %r23 636 ldw R%dcache_stride(%r1), %r1
618 637
619#ifdef CONFIG_64BIT 638#ifdef CONFIG_64BIT
620 depdi,z 1, 63-PAGE_SHIFT,1, %r25 639 depdi,z 1, 63-PAGE_SHIFT,1, %r25
621#else 640#else
622 depwi,z 1, 31-PAGE_SHIFT,1, %r25 641 depwi,z 1, 31-PAGE_SHIFT,1, %r25
623#endif 642#endif
624 add %r26, %r25, %r25 643 add %r28, %r25, %r25
625 sub %r25, %r23, %r25 644 sub %r25, %r1, %r25
626 645
627 646
6281: fdc,m %r23(%r26) 6471: fdc,m %r1(%r28)
629 fdc,m %r23(%r26) 648 fdc,m %r1(%r28)
630 fdc,m %r23(%r26) 649 fdc,m %r1(%r28)
631 fdc,m %r23(%r26) 650 fdc,m %r1(%r28)
632 fdc,m %r23(%r26) 651 fdc,m %r1(%r28)
633 fdc,m %r23(%r26) 652 fdc,m %r1(%r28)
634 fdc,m %r23(%r26) 653 fdc,m %r1(%r28)
635 fdc,m %r23(%r26) 654 fdc,m %r1(%r28)
636 fdc,m %r23(%r26) 655 fdc,m %r1(%r28)
637 fdc,m %r23(%r26) 656 fdc,m %r1(%r28)
638 fdc,m %r23(%r26) 657 fdc,m %r1(%r28)
639 fdc,m %r23(%r26) 658 fdc,m %r1(%r28)
640 fdc,m %r23(%r26) 659 fdc,m %r1(%r28)
641 fdc,m %r23(%r26) 660 fdc,m %r1(%r28)
642 fdc,m %r23(%r26) 661 fdc,m %r1(%r28)
643 cmpb,COND(<<) %r26, %r25,1b 662 cmpb,COND(<<) %r28, %r25,1b
644 fdc,m %r23(%r26) 663 fdc,m %r1(%r28)
645 664
646 sync 665 sync
647 bv %r0(%r2) 666 bv %r0(%r2)
648 nop 667 pdtlb (%r25)
649 .exit 668 .exit
650 669
651 .procend 670 .procend
652ENDPROC(flush_kernel_dcache_page_asm) 671ENDPROC(flush_dcache_page_asm)
653 672
654ENTRY(flush_user_dcache_page) 673ENTRY(flush_icache_page_asm)
655 .proc 674 .proc
656 .callinfo NO_CALLS 675 .callinfo NO_CALLS
657 .entry 676 .entry
658 677
659 ldil L%dcache_stride, %r1 678 ldil L%(TMPALIAS_MAP_START), %r28
660 ldw R%dcache_stride(%r1), %r23
661
662#ifdef CONFIG_64BIT 679#ifdef CONFIG_64BIT
663 depdi,z 1,63-PAGE_SHIFT,1, %r25 680#if (TMPALIAS_MAP_START >= 0x80000000)
681 depdi 0, 31,32, %r28 /* clear any sign extension */
682 /* FIXME: page size dependend */
683#endif
684 extrd,u %r26, 56,32, %r26 /* convert phys addr to tlb insert format */
685 depd %r25, 63,22, %r28 /* Form aliased virtual address 'to' */
686 depdi 0, 63,12, %r28 /* Clear any offset bits */
664#else 687#else
665 depwi,z 1,31-PAGE_SHIFT,1, %r25 688 extrw,u %r26, 24,25, %r26 /* convert phys addr to tlb insert format */
689 depw %r25, 31,22, %r28 /* Form aliased virtual address 'to' */
690 depwi 0, 31,12, %r28 /* Clear any offset bits */
666#endif 691#endif
667 add %r26, %r25, %r25
668 sub %r25, %r23, %r25
669 692
693 /* Purge any old translation */
670 694
6711: fdc,m %r23(%sr3, %r26) 695 pitlb (%sr0,%r28)
672 fdc,m %r23(%sr3, %r26) 696
673 fdc,m %r23(%sr3, %r26) 697 ldil L%icache_stride, %r1
674 fdc,m %r23(%sr3, %r26) 698 ldw R%icache_stride(%r1), %r1
675 fdc,m %r23(%sr3, %r26) 699
676 fdc,m %r23(%sr3, %r26) 700#ifdef CONFIG_64BIT
677 fdc,m %r23(%sr3, %r26) 701 depdi,z 1, 63-PAGE_SHIFT,1, %r25
678 fdc,m %r23(%sr3, %r26) 702#else
679 fdc,m %r23(%sr3, %r26) 703 depwi,z 1, 31-PAGE_SHIFT,1, %r25
680 fdc,m %r23(%sr3, %r26) 704#endif
681 fdc,m %r23(%sr3, %r26) 705 add %r28, %r25, %r25
682 fdc,m %r23(%sr3, %r26) 706 sub %r25, %r1, %r25
683 fdc,m %r23(%sr3, %r26) 707
684 fdc,m %r23(%sr3, %r26) 708
685 fdc,m %r23(%sr3, %r26) 7091: fic,m %r1(%r28)
686 cmpb,COND(<<) %r26, %r25,1b 710 fic,m %r1(%r28)
687 fdc,m %r23(%sr3, %r26) 711 fic,m %r1(%r28)
712 fic,m %r1(%r28)
713 fic,m %r1(%r28)
714 fic,m %r1(%r28)
715 fic,m %r1(%r28)
716 fic,m %r1(%r28)
717 fic,m %r1(%r28)
718 fic,m %r1(%r28)
719 fic,m %r1(%r28)
720 fic,m %r1(%r28)
721 fic,m %r1(%r28)
722 fic,m %r1(%r28)
723 fic,m %r1(%r28)
724 cmpb,COND(<<) %r28, %r25,1b
725 fic,m %r1(%r28)
688 726
689 sync 727 sync
690 bv %r0(%r2) 728 bv %r0(%r2)
691 nop 729 pitlb (%sr0,%r25)
692 .exit 730 .exit
693 731
694 .procend 732 .procend
695ENDPROC(flush_user_dcache_page) 733ENDPROC(flush_icache_page_asm)
696 734
697ENTRY(flush_user_icache_page) 735ENTRY(flush_kernel_dcache_page_asm)
698 .proc 736 .proc
699 .callinfo NO_CALLS 737 .callinfo NO_CALLS
700 .entry 738 .entry
@@ -711,23 +749,23 @@ ENTRY(flush_user_icache_page)
711 sub %r25, %r23, %r25 749 sub %r25, %r23, %r25
712 750
713 751
7141: fic,m %r23(%sr3, %r26) 7521: fdc,m %r23(%r26)
715 fic,m %r23(%sr3, %r26) 753 fdc,m %r23(%r26)
716 fic,m %r23(%sr3, %r26) 754 fdc,m %r23(%r26)
717 fic,m %r23(%sr3, %r26) 755 fdc,m %r23(%r26)
718 fic,m %r23(%sr3, %r26) 756 fdc,m %r23(%r26)
719 fic,m %r23(%sr3, %r26) 757 fdc,m %r23(%r26)
720 fic,m %r23(%sr3, %r26) 758 fdc,m %r23(%r26)
721 fic,m %r23(%sr3, %r26) 759 fdc,m %r23(%r26)
722 fic,m %r23(%sr3, %r26) 760 fdc,m %r23(%r26)
723 fic,m %r23(%sr3, %r26) 761 fdc,m %r23(%r26)
724 fic,m %r23(%sr3, %r26) 762 fdc,m %r23(%r26)
725 fic,m %r23(%sr3, %r26) 763 fdc,m %r23(%r26)
726 fic,m %r23(%sr3, %r26) 764 fdc,m %r23(%r26)
727 fic,m %r23(%sr3, %r26) 765 fdc,m %r23(%r26)
728 fic,m %r23(%sr3, %r26) 766 fdc,m %r23(%r26)
729 cmpb,COND(<<) %r26, %r25,1b 767 cmpb,COND(<<) %r26, %r25,1b
730 fic,m %r23(%sr3, %r26) 768 fdc,m %r23(%r26)
731 769
732 sync 770 sync
733 bv %r0(%r2) 771 bv %r0(%r2)
@@ -735,8 +773,7 @@ ENTRY(flush_user_icache_page)
735 .exit 773 .exit
736 774
737 .procend 775 .procend
738ENDPROC(flush_user_icache_page) 776ENDPROC(flush_kernel_dcache_page_asm)
739
740 777
741ENTRY(purge_kernel_dcache_page) 778ENTRY(purge_kernel_dcache_page)
742 .proc 779 .proc
@@ -780,73 +817,7 @@ ENTRY(purge_kernel_dcache_page)
780 .procend 817 .procend
781ENDPROC(purge_kernel_dcache_page) 818ENDPROC(purge_kernel_dcache_page)
782 819
783#if 0 820ENTRY(flush_user_dcache_range_asm)
784 /* Currently not used, but it still is a possible alternate
785 * solution.
786 */
787
788ENTRY(flush_alias_page)
789 .proc
790 .callinfo NO_CALLS
791 .entry
792
793 tophys_r1 %r26
794
795 ldil L%(TMPALIAS_MAP_START), %r28
796#ifdef CONFIG_64BIT
797 extrd,u %r26, 56,32, %r26 /* convert phys addr to tlb insert format */
798 depd %r25, 63,22, %r28 /* Form aliased virtual address 'to' */
799 depdi 0, 63,12, %r28 /* Clear any offset bits */
800#else
801 extrw,u %r26, 24,25, %r26 /* convert phys addr to tlb insert format */
802 depw %r25, 31,22, %r28 /* Form aliased virtual address 'to' */
803 depwi 0, 31,12, %r28 /* Clear any offset bits */
804#endif
805
806 /* Purge any old translation */
807
808 pdtlb 0(%r28)
809
810 ldil L%dcache_stride, %r1
811 ldw R%dcache_stride(%r1), %r23
812
813#ifdef CONFIG_64BIT
814 depdi,z 1, 63-PAGE_SHIFT,1, %r29
815#else
816 depwi,z 1, 31-PAGE_SHIFT,1, %r29
817#endif
818 add %r28, %r29, %r29
819 sub %r29, %r23, %r29
820
8211: fdc,m %r23(%r28)
822 fdc,m %r23(%r28)
823 fdc,m %r23(%r28)
824 fdc,m %r23(%r28)
825 fdc,m %r23(%r28)
826 fdc,m %r23(%r28)
827 fdc,m %r23(%r28)
828 fdc,m %r23(%r28)
829 fdc,m %r23(%r28)
830 fdc,m %r23(%r28)
831 fdc,m %r23(%r28)
832 fdc,m %r23(%r28)
833 fdc,m %r23(%r28)
834 fdc,m %r23(%r28)
835 fdc,m %r23(%r28)
836 cmpb,COND(<<) %r28, %r29, 1b
837 fdc,m %r23(%r28)
838
839 sync
840 bv %r0(%r2)
841 nop
842 .exit
843
844 .procend
845#endif
846
847 .export flush_user_dcache_range_asm
848
849flush_user_dcache_range_asm:
850 .proc 821 .proc
851 .callinfo NO_CALLS 822 .callinfo NO_CALLS
852 .entry 823 .entry
@@ -865,7 +836,7 @@ flush_user_dcache_range_asm:
865 .exit 836 .exit
866 837
867 .procend 838 .procend
868ENDPROC(flush_alias_page) 839ENDPROC(flush_user_dcache_range_asm)
869 840
870ENTRY(flush_kernel_dcache_range_asm) 841ENTRY(flush_kernel_dcache_range_asm)
871 .proc 842 .proc
diff --git a/arch/parisc/kernel/pdc_cons.c b/arch/parisc/kernel/pdc_cons.c
index 1ff366cb9685..fc770be465ff 100644
--- a/arch/parisc/kernel/pdc_cons.c
+++ b/arch/parisc/kernel/pdc_cons.c
@@ -12,6 +12,7 @@
12 * Copyright (C) 2001 Helge Deller <deller at parisc-linux.org> 12 * Copyright (C) 2001 Helge Deller <deller at parisc-linux.org>
13 * Copyright (C) 2001 Thomas Bogendoerfer <tsbogend at parisc-linux.org> 13 * Copyright (C) 2001 Thomas Bogendoerfer <tsbogend at parisc-linux.org>
14 * Copyright (C) 2002 Randolph Chung <tausq with parisc-linux.org> 14 * Copyright (C) 2002 Randolph Chung <tausq with parisc-linux.org>
15 * Copyright (C) 2010 Guy Martin <gmsoft at tuxicoman.be>
15 * 16 *
16 * 17 *
17 * This program is free software; you can redistribute it and/or modify 18 * This program is free software; you can redistribute it and/or modify
@@ -31,12 +32,11 @@
31 32
32/* 33/*
33 * The PDC console is a simple console, which can be used for debugging 34 * The PDC console is a simple console, which can be used for debugging
34 * boot related problems on HP PA-RISC machines. 35 * boot related problems on HP PA-RISC machines. It is also useful when no
36 * other console works.
35 * 37 *
36 * This code uses the ROM (=PDC) based functions to read and write characters 38 * This code uses the ROM (=PDC) based functions to read and write characters
37 * from and to PDC's boot path. 39 * from and to PDC's boot path.
38 * Since all character read from that path must be polled, this code never
39 * can or will be a fully functional linux console.
40 */ 40 */
41 41
42/* Define EARLY_BOOTUP_DEBUG to debug kernel related boot problems. 42/* Define EARLY_BOOTUP_DEBUG to debug kernel related boot problems.
@@ -53,6 +53,7 @@
53#include <asm/pdc.h> /* for iodc_call() proto and friends */ 53#include <asm/pdc.h> /* for iodc_call() proto and friends */
54 54
55static DEFINE_SPINLOCK(pdc_console_lock); 55static DEFINE_SPINLOCK(pdc_console_lock);
56static struct console pdc_cons;
56 57
57static void pdc_console_write(struct console *co, const char *s, unsigned count) 58static void pdc_console_write(struct console *co, const char *s, unsigned count)
58{ 59{
@@ -85,12 +86,138 @@ static int pdc_console_setup(struct console *co, char *options)
85 86
86#if defined(CONFIG_PDC_CONSOLE) 87#if defined(CONFIG_PDC_CONSOLE)
87#include <linux/vt_kern.h> 88#include <linux/vt_kern.h>
89#include <linux/tty_flip.h>
90
91#define PDC_CONS_POLL_DELAY (30 * HZ / 1000)
92
93static struct timer_list pdc_console_timer;
94
95static int pdc_console_tty_open(struct tty_struct *tty, struct file *filp)
96{
97
98 mod_timer(&pdc_console_timer, jiffies + PDC_CONS_POLL_DELAY);
99
100 return 0;
101}
102
103static void pdc_console_tty_close(struct tty_struct *tty, struct file *filp)
104{
105 if (!tty->count)
106 del_timer(&pdc_console_timer);
107}
108
109static int pdc_console_tty_write(struct tty_struct *tty, const unsigned char *buf, int count)
110{
111 pdc_console_write(NULL, buf, count);
112 return count;
113}
114
115static int pdc_console_tty_write_room(struct tty_struct *tty)
116{
117 return 32768; /* no limit, no buffer used */
118}
119
120static int pdc_console_tty_chars_in_buffer(struct tty_struct *tty)
121{
122 return 0; /* no buffer */
123}
124
125static struct tty_driver *pdc_console_tty_driver;
126
127static const struct tty_operations pdc_console_tty_ops = {
128 .open = pdc_console_tty_open,
129 .close = pdc_console_tty_close,
130 .write = pdc_console_tty_write,
131 .write_room = pdc_console_tty_write_room,
132 .chars_in_buffer = pdc_console_tty_chars_in_buffer,
133};
134
135static void pdc_console_poll(unsigned long unused)
136{
137
138 int data, count = 0;
139
140 struct tty_struct *tty = pdc_console_tty_driver->ttys[0];
141
142 if (!tty)
143 return;
144
145 while (1) {
146 data = pdc_console_poll_key(NULL);
147 if (data == -1)
148 break;
149 tty_insert_flip_char(tty, data & 0xFF, TTY_NORMAL);
150 count ++;
151 }
152
153 if (count)
154 tty_flip_buffer_push(tty);
155
156 if (tty->count && (pdc_cons.flags & CON_ENABLED))
157 mod_timer(&pdc_console_timer, jiffies + PDC_CONS_POLL_DELAY);
158}
159
160static int __init pdc_console_tty_driver_init(void)
161{
162
163 int err;
164 struct tty_driver *drv;
165
166 /* Check if the console driver is still registered.
167 * It is unregistered if the pdc console was not selected as the
168 * primary console. */
169
170 struct console *tmp;
171
172 console_lock();
173 for_each_console(tmp)
174 if (tmp == &pdc_cons)
175 break;
176 console_unlock();
177
178 if (!tmp) {
179 printk(KERN_INFO "PDC console driver not registered anymore, not creating %s\n", pdc_cons.name);
180 return -ENODEV;
181 }
182
183 printk(KERN_INFO "The PDC console driver is still registered, removing CON_BOOT flag\n");
184 pdc_cons.flags &= ~CON_BOOT;
185
186 drv = alloc_tty_driver(1);
187
188 if (!drv)
189 return -ENOMEM;
190
191 drv->driver_name = "pdc_cons";
192 drv->name = "ttyB";
193 drv->major = MUX_MAJOR;
194 drv->minor_start = 0;
195 drv->type = TTY_DRIVER_TYPE_SYSTEM;
196 drv->init_termios = tty_std_termios;
197 drv->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_RESET_TERMIOS;
198 tty_set_operations(drv, &pdc_console_tty_ops);
199
200 err = tty_register_driver(drv);
201 if (err) {
202 printk(KERN_ERR "Unable to register the PDC console TTY driver\n");
203 return err;
204 }
205
206 pdc_console_tty_driver = drv;
207
208 /* No need to initialize the pdc_console_timer if tty isn't allocated */
209 init_timer(&pdc_console_timer);
210 pdc_console_timer.function = pdc_console_poll;
211
212 return 0;
213}
214
215module_init(pdc_console_tty_driver_init);
88 216
89static struct tty_driver * pdc_console_device (struct console *c, int *index) 217static struct tty_driver * pdc_console_device (struct console *c, int *index)
90{ 218{
91 extern struct tty_driver console_driver; 219 *index = c->index;
92 *index = c->index ? c->index-1 : fg_console; 220 return pdc_console_tty_driver;
93 return &console_driver;
94} 221}
95#else 222#else
96#define pdc_console_device NULL 223#define pdc_console_device NULL
@@ -101,7 +228,7 @@ static struct console pdc_cons = {
101 .write = pdc_console_write, 228 .write = pdc_console_write,
102 .device = pdc_console_device, 229 .device = pdc_console_device,
103 .setup = pdc_console_setup, 230 .setup = pdc_console_setup,
104 .flags = CON_BOOT | CON_PRINTBUFFER | CON_ENABLED, 231 .flags = CON_BOOT | CON_PRINTBUFFER,
105 .index = -1, 232 .index = -1,
106}; 233};
107 234
diff --git a/arch/parisc/kernel/perf.c b/arch/parisc/kernel/perf.c
index f9f6783e4bdd..ba0c053e25ae 100644
--- a/arch/parisc/kernel/perf.c
+++ b/arch/parisc/kernel/perf.c
@@ -46,7 +46,6 @@
46#include <linux/init.h> 46#include <linux/init.h>
47#include <linux/proc_fs.h> 47#include <linux/proc_fs.h>
48#include <linux/miscdevice.h> 48#include <linux/miscdevice.h>
49#include <linux/smp_lock.h>
50#include <linux/spinlock.h> 49#include <linux/spinlock.h>
51 50
52#include <asm/uaccess.h> 51#include <asm/uaccess.h>
@@ -261,16 +260,13 @@ printk("Preparing to start counters\n");
261 */ 260 */
262static int perf_open(struct inode *inode, struct file *file) 261static int perf_open(struct inode *inode, struct file *file)
263{ 262{
264 lock_kernel();
265 spin_lock(&perf_lock); 263 spin_lock(&perf_lock);
266 if (perf_enabled) { 264 if (perf_enabled) {
267 spin_unlock(&perf_lock); 265 spin_unlock(&perf_lock);
268 unlock_kernel();
269 return -EBUSY; 266 return -EBUSY;
270 } 267 }
271 perf_enabled = 1; 268 perf_enabled = 1;
272 spin_unlock(&perf_lock); 269 spin_unlock(&perf_lock);
273 unlock_kernel();
274 270
275 return 0; 271 return 0;
276} 272}
diff --git a/arch/parisc/kernel/ptrace.c b/arch/parisc/kernel/ptrace.c
index c4f49e45129d..2905b1f52d30 100644
--- a/arch/parisc/kernel/ptrace.c
+++ b/arch/parisc/kernel/ptrace.c
@@ -110,7 +110,8 @@ void user_enable_block_step(struct task_struct *task)
110 pa_psw(task)->l = 0; 110 pa_psw(task)->l = 0;
111} 111}
112 112
113long arch_ptrace(struct task_struct *child, long request, long addr, long data) 113long arch_ptrace(struct task_struct *child, long request,
114 unsigned long addr, unsigned long data)
114{ 115{
115 unsigned long tmp; 116 unsigned long tmp;
116 long ret = -EIO; 117 long ret = -EIO;
@@ -120,11 +121,11 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
120 /* Read the word at location addr in the USER area. For ptraced 121 /* Read the word at location addr in the USER area. For ptraced
121 processes, the kernel saves all regs on a syscall. */ 122 processes, the kernel saves all regs on a syscall. */
122 case PTRACE_PEEKUSR: 123 case PTRACE_PEEKUSR:
123 if ((addr & (sizeof(long)-1)) || 124 if ((addr & (sizeof(unsigned long)-1)) ||
124 (unsigned long) addr >= sizeof(struct pt_regs)) 125 addr >= sizeof(struct pt_regs))
125 break; 126 break;
126 tmp = *(unsigned long *) ((char *) task_regs(child) + addr); 127 tmp = *(unsigned long *) ((char *) task_regs(child) + addr);
127 ret = put_user(tmp, (unsigned long *) data); 128 ret = put_user(tmp, (unsigned long __user *) data);
128 break; 129 break;
129 130
130 /* Write the word at location addr in the USER area. This will need 131 /* Write the word at location addr in the USER area. This will need
@@ -151,8 +152,8 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
151 break; 152 break;
152 } 153 }
153 154
154 if ((addr & (sizeof(long)-1)) || 155 if ((addr & (sizeof(unsigned long)-1)) ||
155 (unsigned long) addr >= sizeof(struct pt_regs)) 156 addr >= sizeof(struct pt_regs))
156 break; 157 break;
157 if ((addr >= PT_GR1 && addr <= PT_GR31) || 158 if ((addr >= PT_GR1 && addr <= PT_GR31) ||
158 addr == PT_IAOQ0 || addr == PT_IAOQ1 || 159 addr == PT_IAOQ0 || addr == PT_IAOQ1 ||
diff --git a/arch/parisc/kernel/signal.c b/arch/parisc/kernel/signal.c
index 35c827e94e31..12c1ed33dc18 100644
--- a/arch/parisc/kernel/signal.c
+++ b/arch/parisc/kernel/signal.c
@@ -98,7 +98,6 @@ void
98sys_rt_sigreturn(struct pt_regs *regs, int in_syscall) 98sys_rt_sigreturn(struct pt_regs *regs, int in_syscall)
99{ 99{
100 struct rt_sigframe __user *frame; 100 struct rt_sigframe __user *frame;
101 struct siginfo si;
102 sigset_t set; 101 sigset_t set;
103 unsigned long usp = (regs->gr[30] & ~(0x01UL)); 102 unsigned long usp = (regs->gr[30] & ~(0x01UL));
104 unsigned long sigframe_size = PARISC_RT_SIGFRAME_SIZE; 103 unsigned long sigframe_size = PARISC_RT_SIGFRAME_SIZE;
@@ -178,13 +177,7 @@ sys_rt_sigreturn(struct pt_regs *regs, int in_syscall)
178 177
179give_sigsegv: 178give_sigsegv:
180 DBG(1,"sys_rt_sigreturn: Sending SIGSEGV\n"); 179 DBG(1,"sys_rt_sigreturn: Sending SIGSEGV\n");
181 si.si_signo = SIGSEGV; 180 force_sig(SIGSEGV, current);
182 si.si_errno = 0;
183 si.si_code = SI_KERNEL;
184 si.si_pid = task_pid_vnr(current);
185 si.si_uid = current_uid();
186 si.si_addr = &frame->uc;
187 force_sig_info(SIGSEGV, &si, current);
188 return; 181 return;
189} 182}
190 183
@@ -298,7 +291,7 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
298 DBG(1,"setup_rt_frame: frame->uc = 0x%p\n", &frame->uc); 291 DBG(1,"setup_rt_frame: frame->uc = 0x%p\n", &frame->uc);
299 DBG(1,"setup_rt_frame: frame->uc.uc_mcontext = 0x%p\n", &frame->uc.uc_mcontext); 292 DBG(1,"setup_rt_frame: frame->uc.uc_mcontext = 0x%p\n", &frame->uc.uc_mcontext);
300 err |= setup_sigcontext(&frame->uc.uc_mcontext, regs, in_syscall); 293 err |= setup_sigcontext(&frame->uc.uc_mcontext, regs, in_syscall);
301 /* FIXME: Should probably be converted aswell for the compat case */ 294 /* FIXME: Should probably be converted as well for the compat case */
302 err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set)); 295 err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
303 } 296 }
304 297
diff --git a/arch/parisc/kernel/smp.c b/arch/parisc/kernel/smp.c
index 69d63d354ef0..828305f19cff 100644
--- a/arch/parisc/kernel/smp.c
+++ b/arch/parisc/kernel/smp.c
@@ -155,10 +155,7 @@ ipi_interrupt(int irq, void *dev_id)
155 155
156 case IPI_RESCHEDULE: 156 case IPI_RESCHEDULE:
157 smp_debug(100, KERN_DEBUG "CPU%d IPI_RESCHEDULE\n", this_cpu); 157 smp_debug(100, KERN_DEBUG "CPU%d IPI_RESCHEDULE\n", this_cpu);
158 /* 158 scheduler_ipi();
159 * Reschedule callback. Everything to be
160 * done is done by the interrupt return path.
161 */
162 break; 159 break;
163 160
164 case IPI_CALL_FUNC: 161 case IPI_CALL_FUNC:
diff --git a/arch/parisc/kernel/sys_parisc32.c b/arch/parisc/kernel/sys_parisc32.c
index 9779ece2b070..dc9a62462323 100644
--- a/arch/parisc/kernel/sys_parisc32.c
+++ b/arch/parisc/kernel/sys_parisc32.c
@@ -20,7 +20,6 @@
20#include <linux/times.h> 20#include <linux/times.h>
21#include <linux/time.h> 21#include <linux/time.h>
22#include <linux/smp.h> 22#include <linux/smp.h>
23#include <linux/smp_lock.h>
24#include <linux/sem.h> 23#include <linux/sem.h>
25#include <linux/msg.h> 24#include <linux/msg.h>
26#include <linux/shm.h> 25#include <linux/shm.h>
@@ -229,3 +228,11 @@ asmlinkage long compat_sys_fallocate(int fd, int mode, u32 offhi, u32 offlo,
229 return sys_fallocate(fd, mode, ((loff_t)offhi << 32) | offlo, 228 return sys_fallocate(fd, mode, ((loff_t)offhi << 32) | offlo,
230 ((loff_t)lenhi << 32) | lenlo); 229 ((loff_t)lenhi << 32) | lenlo);
231} 230}
231
232asmlinkage long compat_sys_fanotify_mark(int fan_fd, int flags, u32 mask_hi,
233 u32 mask_lo, int fd,
234 const char __user *pathname)
235{
236 return sys_fanotify_mark(fan_fd, flags, ((u64)mask_hi << 32) | mask_lo,
237 fd, pathname);
238}
diff --git a/arch/parisc/kernel/syscall.S b/arch/parisc/kernel/syscall.S
index 68e75ce838d6..82a52b2fb13f 100644
--- a/arch/parisc/kernel/syscall.S
+++ b/arch/parisc/kernel/syscall.S
@@ -605,7 +605,7 @@ cas_action:
605 copy %r0, %r21 605 copy %r0, %r21
606 606
6073: 6073:
608 /* Error occured on load or store */ 608 /* Error occurred on load or store */
609 /* Free lock */ 609 /* Free lock */
610 stw %r20, 0(%sr2,%r20) 610 stw %r20, 0(%sr2,%r20)
611#if ENABLE_LWS_DEBUG 611#if ENABLE_LWS_DEBUG
diff --git a/arch/parisc/kernel/syscall_table.S b/arch/parisc/kernel/syscall_table.S
index 3d52c978738f..34a4f5a2fffb 100644
--- a/arch/parisc/kernel/syscall_table.S
+++ b/arch/parisc/kernel/syscall_table.S
@@ -34,7 +34,7 @@
34/* Use ENTRY_SAME for 32-bit syscalls which are the same on wide and 34/* Use ENTRY_SAME for 32-bit syscalls which are the same on wide and
35 * narrow palinux. Use ENTRY_DIFF for those where a 32-bit specific 35 * narrow palinux. Use ENTRY_DIFF for those where a 32-bit specific
36 * implementation is required on wide palinux. Use ENTRY_COMP where 36 * implementation is required on wide palinux. Use ENTRY_COMP where
37 * the compatability layer has a useful 32-bit implementation. 37 * the compatibility layer has a useful 32-bit implementation.
38 */ 38 */
39#define ENTRY_SAME(_name_) .dword sys_##_name_ 39#define ENTRY_SAME(_name_) .dword sys_##_name_
40#define ENTRY_DIFF(_name_) .dword sys32_##_name_ 40#define ENTRY_DIFF(_name_) .dword sys32_##_name_
@@ -419,6 +419,14 @@
419 ENTRY_SAME(perf_event_open) 419 ENTRY_SAME(perf_event_open)
420 ENTRY_COMP(recvmmsg) 420 ENTRY_COMP(recvmmsg)
421 ENTRY_SAME(accept4) /* 320 */ 421 ENTRY_SAME(accept4) /* 320 */
422 ENTRY_SAME(prlimit64)
423 ENTRY_SAME(fanotify_init)
424 ENTRY_COMP(fanotify_mark)
425 ENTRY_COMP(clock_adjtime)
426 ENTRY_SAME(name_to_handle_at) /* 325 */
427 ENTRY_COMP(open_by_handle_at)
428 ENTRY_SAME(syncfs)
429 ENTRY_SAME(setns)
422 430
423 /* Nothing yet */ 431 /* Nothing yet */
424 432
diff --git a/arch/parisc/kernel/time.c b/arch/parisc/kernel/time.c
index 05511ccb61d2..45b7389d77aa 100644
--- a/arch/parisc/kernel/time.c
+++ b/arch/parisc/kernel/time.c
@@ -162,11 +162,8 @@ irqreturn_t __irq_entry timer_interrupt(int irq, void *dev_id)
162 update_process_times(user_mode(get_irq_regs())); 162 update_process_times(user_mode(get_irq_regs()));
163 } 163 }
164 164
165 if (cpu == 0) { 165 if (cpu == 0)
166 write_seqlock(&xtime_lock); 166 xtime_update(ticks_elapsed);
167 do_timer(ticks_elapsed);
168 write_sequnlock(&xtime_lock);
169 }
170 167
171 return IRQ_HANDLED; 168 return IRQ_HANDLED;
172} 169}
diff --git a/arch/parisc/kernel/unaligned.c b/arch/parisc/kernel/unaligned.c
index 92d977bb5ea8..234e3682cf09 100644
--- a/arch/parisc/kernel/unaligned.c
+++ b/arch/parisc/kernel/unaligned.c
@@ -619,15 +619,12 @@ void handle_unaligned(struct pt_regs *regs)
619 flop=1; 619 flop=1;
620 ret = emulate_std(regs, R2(regs->iir),1); 620 ret = emulate_std(regs, R2(regs->iir),1);
621 break; 621 break;
622
623#ifdef CONFIG_PA20
624 case OPCODE_LDD_L: 622 case OPCODE_LDD_L:
625 ret = emulate_ldd(regs, R2(regs->iir),0); 623 ret = emulate_ldd(regs, R2(regs->iir),0);
626 break; 624 break;
627 case OPCODE_STD_L: 625 case OPCODE_STD_L:
628 ret = emulate_std(regs, R2(regs->iir),0); 626 ret = emulate_std(regs, R2(regs->iir),0);
629 break; 627 break;
630#endif
631 } 628 }
632#endif 629#endif
633 switch (regs->iir & OPCODE3_MASK) 630 switch (regs->iir & OPCODE3_MASK)
diff --git a/arch/parisc/kernel/unwind.c b/arch/parisc/kernel/unwind.c
index d58eac1a8288..76ed62ed785b 100644
--- a/arch/parisc/kernel/unwind.c
+++ b/arch/parisc/kernel/unwind.c
@@ -80,8 +80,11 @@ find_unwind_entry(unsigned long addr)
80 if (addr >= table->start && 80 if (addr >= table->start &&
81 addr <= table->end) 81 addr <= table->end)
82 e = find_unwind_entry_in_table(table, addr); 82 e = find_unwind_entry_in_table(table, addr);
83 if (e) 83 if (e) {
84 /* Move-to-front to exploit common traces */
85 list_move(&table->list, &unwind_tables);
84 break; 86 break;
87 }
85 } 88 }
86 89
87 return e; 90 return e;
diff --git a/arch/parisc/kernel/vmlinux.lds.S b/arch/parisc/kernel/vmlinux.lds.S
index d64a6bbec2aa..fa6f2b8163e0 100644
--- a/arch/parisc/kernel/vmlinux.lds.S
+++ b/arch/parisc/kernel/vmlinux.lds.S
@@ -69,6 +69,9 @@ SECTIONS
69 /* End of text section */ 69 /* End of text section */
70 _etext = .; 70 _etext = .;
71 71
72 /* Start of data section */
73 _sdata = .;
74
72 RODATA 75 RODATA
73 76
74 /* writeable */ 77 /* writeable */
@@ -134,6 +137,7 @@ SECTIONS
134 . = ALIGN(16384); 137 . = ALIGN(16384);
135 __init_begin = .; 138 __init_begin = .;
136 INIT_TEXT_SECTION(16384) 139 INIT_TEXT_SECTION(16384)
140 . = ALIGN(PAGE_SIZE);
137 INIT_DATA_SECTION(16) 141 INIT_DATA_SECTION(16)
138 /* we have to discard exit text and such at runtime, not link time */ 142 /* we have to discard exit text and such at runtime, not link time */
139 .exit.text : 143 .exit.text :
@@ -145,7 +149,7 @@ SECTIONS
145 EXIT_DATA 149 EXIT_DATA
146 } 150 }
147 151
148 PERCPU(PAGE_SIZE) 152 PERCPU_SECTION(L1_CACHE_BYTES)
149 . = ALIGN(PAGE_SIZE); 153 . = ALIGN(PAGE_SIZE);
150 __init_end = .; 154 __init_end = .;
151 /* freed after init ends here */ 155 /* freed after init ends here */
diff --git a/arch/parisc/math-emu/Makefile b/arch/parisc/math-emu/Makefile
index 1f3f225897f5..0bd63b08a79a 100644
--- a/arch/parisc/math-emu/Makefile
+++ b/arch/parisc/math-emu/Makefile
@@ -3,7 +3,7 @@
3# 3#
4 4
5# See arch/parisc/math-emu/README 5# See arch/parisc/math-emu/README
6EXTRA_CFLAGS += -Wno-parentheses -Wno-implicit-function-declaration \ 6ccflags-y := -Wno-parentheses -Wno-implicit-function-declaration \
7 -Wno-uninitialized -Wno-strict-prototypes -Wno-return-type \ 7 -Wno-uninitialized -Wno-strict-prototypes -Wno-return-type \
8 -Wno-implicit-int 8 -Wno-implicit-int
9 9
diff --git a/arch/parisc/math-emu/dfadd.c b/arch/parisc/math-emu/dfadd.c
index e147d7d3b0f4..d37e2d2cb6fe 100644
--- a/arch/parisc/math-emu/dfadd.c
+++ b/arch/parisc/math-emu/dfadd.c
@@ -303,7 +303,7 @@ dbl_fadd(
303 if(Dbl_iszero_hidden(resultp1)) 303 if(Dbl_iszero_hidden(resultp1))
304 { 304 {
305 /* Handle normalization */ 305 /* Handle normalization */
306 /* A straight foward algorithm would now shift the result 306 /* A straight forward algorithm would now shift the result
307 * and extension left until the hidden bit becomes one. Not 307 * and extension left until the hidden bit becomes one. Not
308 * all of the extension bits need participate in the shift. 308 * all of the extension bits need participate in the shift.
309 * Only the two most significant bits (round and guard) are 309 * Only the two most significant bits (round and guard) are
diff --git a/arch/parisc/math-emu/dfsub.c b/arch/parisc/math-emu/dfsub.c
index 87ebc60d465b..2e8b5a79bff7 100644
--- a/arch/parisc/math-emu/dfsub.c
+++ b/arch/parisc/math-emu/dfsub.c
@@ -306,7 +306,7 @@ dbl_fsub(
306 if(Dbl_iszero_hidden(resultp1)) 306 if(Dbl_iszero_hidden(resultp1))
307 { 307 {
308 /* Handle normalization */ 308 /* Handle normalization */
309 /* A straight foward algorithm would now shift the result 309 /* A straight forward algorithm would now shift the result
310 * and extension left until the hidden bit becomes one. Not 310 * and extension left until the hidden bit becomes one. Not
311 * all of the extension bits need participate in the shift. 311 * all of the extension bits need participate in the shift.
312 * Only the two most significant bits (round and guard) are 312 * Only the two most significant bits (round and guard) are
diff --git a/arch/parisc/math-emu/fmpyfadd.c b/arch/parisc/math-emu/fmpyfadd.c
index 5dd7f93a89be..b067c45c872d 100644
--- a/arch/parisc/math-emu/fmpyfadd.c
+++ b/arch/parisc/math-emu/fmpyfadd.c
@@ -531,7 +531,7 @@ dbl_fmpyfadd(
531 sign_save = Dbl_signextendedsign(resultp1); 531 sign_save = Dbl_signextendedsign(resultp1);
532 if (Dbl_iszero_hidden(resultp1)) { 532 if (Dbl_iszero_hidden(resultp1)) {
533 /* Handle normalization */ 533 /* Handle normalization */
534 /* A straight foward algorithm would now shift the 534 /* A straightforward algorithm would now shift the
535 * result and extension left until the hidden bit 535 * result and extension left until the hidden bit
536 * becomes one. Not all of the extension bits need 536 * becomes one. Not all of the extension bits need
537 * participate in the shift. Only the two most 537 * participate in the shift. Only the two most
@@ -1191,7 +1191,7 @@ unsigned int *status;
1191 sign_save = Dbl_signextendedsign(resultp1); 1191 sign_save = Dbl_signextendedsign(resultp1);
1192 if (Dbl_iszero_hidden(resultp1)) { 1192 if (Dbl_iszero_hidden(resultp1)) {
1193 /* Handle normalization */ 1193 /* Handle normalization */
1194 /* A straight foward algorithm would now shift the 1194 /* A straightforward algorithm would now shift the
1195 * result and extension left until the hidden bit 1195 * result and extension left until the hidden bit
1196 * becomes one. Not all of the extension bits need 1196 * becomes one. Not all of the extension bits need
1197 * participate in the shift. Only the two most 1197 * participate in the shift. Only the two most
@@ -1841,7 +1841,7 @@ unsigned int *status;
1841 sign_save = Sgl_signextendedsign(resultp1); 1841 sign_save = Sgl_signextendedsign(resultp1);
1842 if (Sgl_iszero_hidden(resultp1)) { 1842 if (Sgl_iszero_hidden(resultp1)) {
1843 /* Handle normalization */ 1843 /* Handle normalization */
1844 /* A straight foward algorithm would now shift the 1844 /* A straightforward algorithm would now shift the
1845 * result and extension left until the hidden bit 1845 * result and extension left until the hidden bit
1846 * becomes one. Not all of the extension bits need 1846 * becomes one. Not all of the extension bits need
1847 * participate in the shift. Only the two most 1847 * participate in the shift. Only the two most
@@ -2483,7 +2483,7 @@ unsigned int *status;
2483 sign_save = Sgl_signextendedsign(resultp1); 2483 sign_save = Sgl_signextendedsign(resultp1);
2484 if (Sgl_iszero_hidden(resultp1)) { 2484 if (Sgl_iszero_hidden(resultp1)) {
2485 /* Handle normalization */ 2485 /* Handle normalization */
2486 /* A straight foward algorithm would now shift the 2486 /* A straightforward algorithm would now shift the
2487 * result and extension left until the hidden bit 2487 * result and extension left until the hidden bit
2488 * becomes one. Not all of the extension bits need 2488 * becomes one. Not all of the extension bits need
2489 * participate in the shift. Only the two most 2489 * participate in the shift. Only the two most
diff --git a/arch/parisc/math-emu/sfadd.c b/arch/parisc/math-emu/sfadd.c
index 008d721b5d22..f802cd6c7869 100644
--- a/arch/parisc/math-emu/sfadd.c
+++ b/arch/parisc/math-emu/sfadd.c
@@ -298,7 +298,7 @@ sgl_fadd(
298 if(Sgl_iszero_hidden(result)) 298 if(Sgl_iszero_hidden(result))
299 { 299 {
300 /* Handle normalization */ 300 /* Handle normalization */
301 /* A straight foward algorithm would now shift the result 301 /* A straightforward algorithm would now shift the result
302 * and extension left until the hidden bit becomes one. Not 302 * and extension left until the hidden bit becomes one. Not
303 * all of the extension bits need participate in the shift. 303 * all of the extension bits need participate in the shift.
304 * Only the two most significant bits (round and guard) are 304 * Only the two most significant bits (round and guard) are
diff --git a/arch/parisc/math-emu/sfsub.c b/arch/parisc/math-emu/sfsub.c
index 24eef61c8e3b..5f90d0f31a52 100644
--- a/arch/parisc/math-emu/sfsub.c
+++ b/arch/parisc/math-emu/sfsub.c
@@ -301,7 +301,7 @@ sgl_fsub(
301 if(Sgl_iszero_hidden(result)) 301 if(Sgl_iszero_hidden(result))
302 { 302 {
303 /* Handle normalization */ 303 /* Handle normalization */
304 /* A straight foward algorithm would now shift the result 304 /* A straightforward algorithm would now shift the result
305 * and extension left until the hidden bit becomes one. Not 305 * and extension left until the hidden bit becomes one. Not
306 * all of the extension bits need participate in the shift. 306 * all of the extension bits need participate in the shift.
307 * Only the two most significant bits (round and guard) are 307 * Only the two most significant bits (round and guard) are
diff --git a/arch/parisc/mm/init.c b/arch/parisc/mm/init.c
index f4f4d700833a..82f364e209fc 100644
--- a/arch/parisc/mm/init.c
+++ b/arch/parisc/mm/init.c
@@ -31,8 +31,6 @@
31#include <asm/mmzone.h> 31#include <asm/mmzone.h>
32#include <asm/sections.h> 32#include <asm/sections.h>
33 33
34DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
35
36extern int data_start; 34extern int data_start;
37 35
38#ifdef CONFIG_DISCONTIGMEM 36#ifdef CONFIG_DISCONTIGMEM
@@ -266,8 +264,10 @@ static void __init setup_bootmem(void)
266 } 264 }
267 memset(pfnnid_map, 0xff, sizeof(pfnnid_map)); 265 memset(pfnnid_map, 0xff, sizeof(pfnnid_map));
268 266
269 for (i = 0; i < npmem_ranges; i++) 267 for (i = 0; i < npmem_ranges; i++) {
268 node_set_state(i, N_NORMAL_MEMORY);
270 node_set_online(i); 269 node_set_online(i);
270 }
271#endif 271#endif
272 272
273 /* 273 /*
@@ -369,24 +369,158 @@ static void __init setup_bootmem(void)
369 request_resource(&sysram_resources[0], &pdcdata_resource); 369 request_resource(&sysram_resources[0], &pdcdata_resource);
370} 370}
371 371
372static void __init map_pages(unsigned long start_vaddr,
373 unsigned long start_paddr, unsigned long size,
374 pgprot_t pgprot, int force)
375{
376 pgd_t *pg_dir;
377 pmd_t *pmd;
378 pte_t *pg_table;
379 unsigned long end_paddr;
380 unsigned long start_pmd;
381 unsigned long start_pte;
382 unsigned long tmp1;
383 unsigned long tmp2;
384 unsigned long address;
385 unsigned long vaddr;
386 unsigned long ro_start;
387 unsigned long ro_end;
388 unsigned long fv_addr;
389 unsigned long gw_addr;
390 extern const unsigned long fault_vector_20;
391 extern void * const linux_gateway_page;
392
393 ro_start = __pa((unsigned long)_text);
394 ro_end = __pa((unsigned long)&data_start);
395 fv_addr = __pa((unsigned long)&fault_vector_20) & PAGE_MASK;
396 gw_addr = __pa((unsigned long)&linux_gateway_page) & PAGE_MASK;
397
398 end_paddr = start_paddr + size;
399
400 pg_dir = pgd_offset_k(start_vaddr);
401
402#if PTRS_PER_PMD == 1
403 start_pmd = 0;
404#else
405 start_pmd = ((start_vaddr >> PMD_SHIFT) & (PTRS_PER_PMD - 1));
406#endif
407 start_pte = ((start_vaddr >> PAGE_SHIFT) & (PTRS_PER_PTE - 1));
408
409 address = start_paddr;
410 vaddr = start_vaddr;
411 while (address < end_paddr) {
412#if PTRS_PER_PMD == 1
413 pmd = (pmd_t *)__pa(pg_dir);
414#else
415 pmd = (pmd_t *)pgd_address(*pg_dir);
416
417 /*
418 * pmd is physical at this point
419 */
420
421 if (!pmd) {
422 pmd = (pmd_t *) alloc_bootmem_low_pages_node(NODE_DATA(0), PAGE_SIZE << PMD_ORDER);
423 pmd = (pmd_t *) __pa(pmd);
424 }
425
426 pgd_populate(NULL, pg_dir, __va(pmd));
427#endif
428 pg_dir++;
429
430 /* now change pmd to kernel virtual addresses */
431
432 pmd = (pmd_t *)__va(pmd) + start_pmd;
433 for (tmp1 = start_pmd; tmp1 < PTRS_PER_PMD; tmp1++, pmd++) {
434
435 /*
436 * pg_table is physical at this point
437 */
438
439 pg_table = (pte_t *)pmd_address(*pmd);
440 if (!pg_table) {
441 pg_table = (pte_t *)
442 alloc_bootmem_low_pages_node(NODE_DATA(0), PAGE_SIZE);
443 pg_table = (pte_t *) __pa(pg_table);
444 }
445
446 pmd_populate_kernel(NULL, pmd, __va(pg_table));
447
448 /* now change pg_table to kernel virtual addresses */
449
450 pg_table = (pte_t *) __va(pg_table) + start_pte;
451 for (tmp2 = start_pte; tmp2 < PTRS_PER_PTE; tmp2++, pg_table++) {
452 pte_t pte;
453
454 /*
455 * Map the fault vector writable so we can
456 * write the HPMC checksum.
457 */
458 if (force)
459 pte = __mk_pte(address, pgprot);
460 else if (core_kernel_text(vaddr) &&
461 address != fv_addr)
462 pte = __mk_pte(address, PAGE_KERNEL_EXEC);
463 else
464#if defined(CONFIG_PARISC_PAGE_SIZE_4KB)
465 if (address >= ro_start && address < ro_end
466 && address != fv_addr
467 && address != gw_addr)
468 pte = __mk_pte(address, PAGE_KERNEL_RO);
469 else
470#endif
471 pte = __mk_pte(address, pgprot);
472
473 if (address >= end_paddr) {
474 if (force)
475 break;
476 else
477 pte_val(pte) = 0;
478 }
479
480 set_pte(pg_table, pte);
481
482 address += PAGE_SIZE;
483 vaddr += PAGE_SIZE;
484 }
485 start_pte = 0;
486
487 if (address >= end_paddr)
488 break;
489 }
490 start_pmd = 0;
491 }
492}
493
372void free_initmem(void) 494void free_initmem(void)
373{ 495{
374 unsigned long addr; 496 unsigned long addr;
375 unsigned long init_begin = (unsigned long)__init_begin; 497 unsigned long init_begin = (unsigned long)__init_begin;
376 unsigned long init_end = (unsigned long)__init_end; 498 unsigned long init_end = (unsigned long)__init_end;
377 499
378#ifdef CONFIG_DEBUG_KERNEL 500 /* The init text pages are marked R-X. We have to
501 * flush the icache and mark them RW-
502 *
503 * This is tricky, because map_pages is in the init section.
504 * Do a dummy remap of the data section first (the data
505 * section is already PAGE_KERNEL) to pull in the TLB entries
506 * for map_kernel */
507 map_pages(init_begin, __pa(init_begin), init_end - init_begin,
508 PAGE_KERNEL_RWX, 1);
509 /* now remap at PAGE_KERNEL since the TLB is pre-primed to execute
510 * map_pages */
511 map_pages(init_begin, __pa(init_begin), init_end - init_begin,
512 PAGE_KERNEL, 1);
513
514 /* force the kernel to see the new TLB entries */
515 __flush_tlb_range(0, init_begin, init_end);
379 /* Attempt to catch anyone trying to execute code here 516 /* Attempt to catch anyone trying to execute code here
380 * by filling the page with BRK insns. 517 * by filling the page with BRK insns.
381 */ 518 */
382 memset((void *)init_begin, 0x00, init_end - init_begin); 519 memset((void *)init_begin, 0x00, init_end - init_begin);
520 /* finally dump all the instructions which were cached, since the
521 * pages are no-longer executable */
383 flush_icache_range(init_begin, init_end); 522 flush_icache_range(init_begin, init_end);
384#endif
385 523
386 /* align __init_begin and __init_end to page size,
387 ignoring linker script where we might have tried to save RAM */
388 init_begin = PAGE_ALIGN(init_begin);
389 init_end = PAGE_ALIGN(init_end);
390 for (addr = init_begin; addr < init_end; addr += PAGE_SIZE) { 524 for (addr = init_begin; addr < init_end; addr += PAGE_SIZE) {
391 ClearPageReserved(virt_to_page(addr)); 525 ClearPageReserved(virt_to_page(addr));
392 init_page_count(virt_to_page(addr)); 526 init_page_count(virt_to_page(addr));
@@ -544,13 +678,13 @@ void __init mem_init(void)
544unsigned long *empty_zero_page __read_mostly; 678unsigned long *empty_zero_page __read_mostly;
545EXPORT_SYMBOL(empty_zero_page); 679EXPORT_SYMBOL(empty_zero_page);
546 680
547void show_mem(void) 681void show_mem(unsigned int filter)
548{ 682{
549 int i,free = 0,total = 0,reserved = 0; 683 int i,free = 0,total = 0,reserved = 0;
550 int shared = 0, cached = 0; 684 int shared = 0, cached = 0;
551 685
552 printk(KERN_INFO "Mem-info:\n"); 686 printk(KERN_INFO "Mem-info:\n");
553 show_free_areas(); 687 show_free_areas(filter);
554#ifndef CONFIG_DISCONTIGMEM 688#ifndef CONFIG_DISCONTIGMEM
555 i = max_mapnr; 689 i = max_mapnr;
556 while (i-- > 0) { 690 while (i-- > 0) {
@@ -616,114 +750,6 @@ void show_mem(void)
616#endif 750#endif
617} 751}
618 752
619
620static void __init map_pages(unsigned long start_vaddr, unsigned long start_paddr, unsigned long size, pgprot_t pgprot)
621{
622 pgd_t *pg_dir;
623 pmd_t *pmd;
624 pte_t *pg_table;
625 unsigned long end_paddr;
626 unsigned long start_pmd;
627 unsigned long start_pte;
628 unsigned long tmp1;
629 unsigned long tmp2;
630 unsigned long address;
631 unsigned long ro_start;
632 unsigned long ro_end;
633 unsigned long fv_addr;
634 unsigned long gw_addr;
635 extern const unsigned long fault_vector_20;
636 extern void * const linux_gateway_page;
637
638 ro_start = __pa((unsigned long)_text);
639 ro_end = __pa((unsigned long)&data_start);
640 fv_addr = __pa((unsigned long)&fault_vector_20) & PAGE_MASK;
641 gw_addr = __pa((unsigned long)&linux_gateway_page) & PAGE_MASK;
642
643 end_paddr = start_paddr + size;
644
645 pg_dir = pgd_offset_k(start_vaddr);
646
647#if PTRS_PER_PMD == 1
648 start_pmd = 0;
649#else
650 start_pmd = ((start_vaddr >> PMD_SHIFT) & (PTRS_PER_PMD - 1));
651#endif
652 start_pte = ((start_vaddr >> PAGE_SHIFT) & (PTRS_PER_PTE - 1));
653
654 address = start_paddr;
655 while (address < end_paddr) {
656#if PTRS_PER_PMD == 1
657 pmd = (pmd_t *)__pa(pg_dir);
658#else
659 pmd = (pmd_t *)pgd_address(*pg_dir);
660
661 /*
662 * pmd is physical at this point
663 */
664
665 if (!pmd) {
666 pmd = (pmd_t *) alloc_bootmem_low_pages_node(NODE_DATA(0),PAGE_SIZE << PMD_ORDER);
667 pmd = (pmd_t *) __pa(pmd);
668 }
669
670 pgd_populate(NULL, pg_dir, __va(pmd));
671#endif
672 pg_dir++;
673
674 /* now change pmd to kernel virtual addresses */
675
676 pmd = (pmd_t *)__va(pmd) + start_pmd;
677 for (tmp1 = start_pmd; tmp1 < PTRS_PER_PMD; tmp1++,pmd++) {
678
679 /*
680 * pg_table is physical at this point
681 */
682
683 pg_table = (pte_t *)pmd_address(*pmd);
684 if (!pg_table) {
685 pg_table = (pte_t *)
686 alloc_bootmem_low_pages_node(NODE_DATA(0),PAGE_SIZE);
687 pg_table = (pte_t *) __pa(pg_table);
688 }
689
690 pmd_populate_kernel(NULL, pmd, __va(pg_table));
691
692 /* now change pg_table to kernel virtual addresses */
693
694 pg_table = (pte_t *) __va(pg_table) + start_pte;
695 for (tmp2 = start_pte; tmp2 < PTRS_PER_PTE; tmp2++,pg_table++) {
696 pte_t pte;
697
698 /*
699 * Map the fault vector writable so we can
700 * write the HPMC checksum.
701 */
702#if defined(CONFIG_PARISC_PAGE_SIZE_4KB)
703 if (address >= ro_start && address < ro_end
704 && address != fv_addr
705 && address != gw_addr)
706 pte = __mk_pte(address, PAGE_KERNEL_RO);
707 else
708#endif
709 pte = __mk_pte(address, pgprot);
710
711 if (address >= end_paddr)
712 pte_val(pte) = 0;
713
714 set_pte(pg_table, pte);
715
716 address += PAGE_SIZE;
717 }
718 start_pte = 0;
719
720 if (address >= end_paddr)
721 break;
722 }
723 start_pmd = 0;
724 }
725}
726
727/* 753/*
728 * pagetable_init() sets up the page tables 754 * pagetable_init() sets up the page tables
729 * 755 *
@@ -748,14 +774,14 @@ static void __init pagetable_init(void)
748 size = pmem_ranges[range].pages << PAGE_SHIFT; 774 size = pmem_ranges[range].pages << PAGE_SHIFT;
749 775
750 map_pages((unsigned long)__va(start_paddr), start_paddr, 776 map_pages((unsigned long)__va(start_paddr), start_paddr,
751 size, PAGE_KERNEL); 777 size, PAGE_KERNEL, 0);
752 } 778 }
753 779
754#ifdef CONFIG_BLK_DEV_INITRD 780#ifdef CONFIG_BLK_DEV_INITRD
755 if (initrd_end && initrd_end > mem_limit) { 781 if (initrd_end && initrd_end > mem_limit) {
756 printk(KERN_INFO "initrd: mapping %08lx-%08lx\n", initrd_start, initrd_end); 782 printk(KERN_INFO "initrd: mapping %08lx-%08lx\n", initrd_start, initrd_end);
757 map_pages(initrd_start, __pa(initrd_start), 783 map_pages(initrd_start, __pa(initrd_start),
758 initrd_end - initrd_start, PAGE_KERNEL); 784 initrd_end - initrd_start, PAGE_KERNEL, 0);
759 } 785 }
760#endif 786#endif
761 787
@@ -780,7 +806,7 @@ static void __init gateway_init(void)
780 */ 806 */
781 807
782 map_pages(linux_gateway_page_addr, __pa(&linux_gateway_page), 808 map_pages(linux_gateway_page_addr, __pa(&linux_gateway_page),
783 PAGE_SIZE, PAGE_GATEWAY); 809 PAGE_SIZE, PAGE_GATEWAY, 1);
784} 810}
785 811
786#ifdef CONFIG_HPUX 812#ifdef CONFIG_HPUX