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-rw-r--r--arch/parisc/include/asm/pgtable.h29
1 files changed, 14 insertions, 15 deletions
diff --git a/arch/parisc/include/asm/pgtable.h b/arch/parisc/include/asm/pgtable.h
index 01c15035e783..22dadeb58695 100644
--- a/arch/parisc/include/asm/pgtable.h
+++ b/arch/parisc/include/asm/pgtable.h
@@ -10,11 +10,13 @@
10 * we simulate an x86-style page table for the linux mm code 10 * we simulate an x86-style page table for the linux mm code
11 */ 11 */
12 12
13#include <linux/mm.h> /* for vm_area_struct */
14#include <linux/bitops.h> 13#include <linux/bitops.h>
14#include <linux/spinlock.h>
15#include <asm/processor.h> 15#include <asm/processor.h>
16#include <asm/cache.h> 16#include <asm/cache.h>
17 17
18struct vm_area_struct;
19
18/* 20/*
19 * kern_addr_valid(ADDR) tests if ADDR is pointing to valid kernel 21 * kern_addr_valid(ADDR) tests if ADDR is pointing to valid kernel
20 * memory. For the return value to be meaningful, ADDR must be >= 22 * memory. For the return value to be meaningful, ADDR must be >=
@@ -136,8 +138,7 @@
136#define _PAGE_NO_CACHE_BIT 24 /* (0x080) Uncached Page (U bit) */ 138#define _PAGE_NO_CACHE_BIT 24 /* (0x080) Uncached Page (U bit) */
137#define _PAGE_ACCESSED_BIT 23 /* (0x100) Software: Page Accessed */ 139#define _PAGE_ACCESSED_BIT 23 /* (0x100) Software: Page Accessed */
138#define _PAGE_PRESENT_BIT 22 /* (0x200) Software: translation valid */ 140#define _PAGE_PRESENT_BIT 22 /* (0x200) Software: translation valid */
139#define _PAGE_FLUSH_BIT 21 /* (0x400) Software: translation valid */ 141/* bit 21 was formerly the FLUSH bit but is now unused */
140 /* for cache flushing only */
141#define _PAGE_USER_BIT 20 /* (0x800) Software: User accessible page */ 142#define _PAGE_USER_BIT 20 /* (0x800) Software: User accessible page */
142 143
143/* N.B. The bits are defined in terms of a 32 bit word above, so the */ 144/* N.B. The bits are defined in terms of a 32 bit word above, so the */
@@ -171,13 +172,15 @@
171#define _PAGE_NO_CACHE (1 << xlate_pabit(_PAGE_NO_CACHE_BIT)) 172#define _PAGE_NO_CACHE (1 << xlate_pabit(_PAGE_NO_CACHE_BIT))
172#define _PAGE_ACCESSED (1 << xlate_pabit(_PAGE_ACCESSED_BIT)) 173#define _PAGE_ACCESSED (1 << xlate_pabit(_PAGE_ACCESSED_BIT))
173#define _PAGE_PRESENT (1 << xlate_pabit(_PAGE_PRESENT_BIT)) 174#define _PAGE_PRESENT (1 << xlate_pabit(_PAGE_PRESENT_BIT))
174#define _PAGE_FLUSH (1 << xlate_pabit(_PAGE_FLUSH_BIT))
175#define _PAGE_USER (1 << xlate_pabit(_PAGE_USER_BIT)) 175#define _PAGE_USER (1 << xlate_pabit(_PAGE_USER_BIT))
176#define _PAGE_FILE (1 << xlate_pabit(_PAGE_FILE_BIT)) 176#define _PAGE_FILE (1 << xlate_pabit(_PAGE_FILE_BIT))
177 177
178#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_ACCESSED) 178#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_ACCESSED)
179#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY) 179#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
180#define _PAGE_KERNEL (_PAGE_PRESENT | _PAGE_EXEC | _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_ACCESSED) 180#define _PAGE_KERNEL_RO (_PAGE_PRESENT | _PAGE_READ | _PAGE_DIRTY | _PAGE_ACCESSED)
181#define _PAGE_KERNEL_EXEC (_PAGE_KERNEL_RO | _PAGE_EXEC)
182#define _PAGE_KERNEL_RWX (_PAGE_KERNEL_EXEC | _PAGE_WRITE)
183#define _PAGE_KERNEL (_PAGE_KERNEL_RO | _PAGE_WRITE)
181 184
182/* The pgd/pmd contains a ptr (in phys addr space); since all pgds/pmds 185/* The pgd/pmd contains a ptr (in phys addr space); since all pgds/pmds
183 * are page-aligned, we don't care about the PAGE_OFFSET bits, except 186 * are page-aligned, we don't care about the PAGE_OFFSET bits, except
@@ -208,10 +211,11 @@
208#define PAGE_COPY PAGE_EXECREAD 211#define PAGE_COPY PAGE_EXECREAD
209#define PAGE_RWX __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_WRITE | _PAGE_EXEC |_PAGE_ACCESSED) 212#define PAGE_RWX __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_WRITE | _PAGE_EXEC |_PAGE_ACCESSED)
210#define PAGE_KERNEL __pgprot(_PAGE_KERNEL) 213#define PAGE_KERNEL __pgprot(_PAGE_KERNEL)
211#define PAGE_KERNEL_RO __pgprot(_PAGE_KERNEL & ~_PAGE_WRITE) 214#define PAGE_KERNEL_EXEC __pgprot(_PAGE_KERNEL_EXEC)
215#define PAGE_KERNEL_RWX __pgprot(_PAGE_KERNEL_RWX)
216#define PAGE_KERNEL_RO __pgprot(_PAGE_KERNEL_RO)
212#define PAGE_KERNEL_UNC __pgprot(_PAGE_KERNEL | _PAGE_NO_CACHE) 217#define PAGE_KERNEL_UNC __pgprot(_PAGE_KERNEL | _PAGE_NO_CACHE)
213#define PAGE_GATEWAY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_GATEWAY| _PAGE_READ) 218#define PAGE_GATEWAY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_GATEWAY| _PAGE_READ)
214#define PAGE_FLUSH __pgprot(_PAGE_FLUSH)
215 219
216 220
217/* 221/*
@@ -259,7 +263,7 @@ extern unsigned long *empty_zero_page;
259 263
260#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) 264#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
261 265
262#define pte_none(x) ((pte_val(x) == 0) || (pte_val(x) & _PAGE_FLUSH)) 266#define pte_none(x) (pte_val(x) == 0)
263#define pte_present(x) (pte_val(x) & _PAGE_PRESENT) 267#define pte_present(x) (pte_val(x) & _PAGE_PRESENT)
264#define pte_clear(mm,addr,xp) do { pte_val(*(xp)) = 0; } while (0) 268#define pte_clear(mm,addr,xp) do { pte_val(*(xp)) = 0; } while (0)
265 269
@@ -397,9 +401,7 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
397#define pte_offset_kernel(pmd, address) \ 401#define pte_offset_kernel(pmd, address) \
398 ((pte_t *) pmd_page_vaddr(*(pmd)) + pte_index(address)) 402 ((pte_t *) pmd_page_vaddr(*(pmd)) + pte_index(address))
399#define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address) 403#define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
400#define pte_offset_map_nested(pmd, address) pte_offset_kernel(pmd, address)
401#define pte_unmap(pte) do { } while (0) 404#define pte_unmap(pte) do { } while (0)
402#define pte_unmap_nested(pte) do { } while (0)
403 405
404#define pte_unmap(pte) do { } while (0) 406#define pte_unmap(pte) do { } while (0)
405#define pte_unmap_nested(pte) do { } while (0) 407#define pte_unmap_nested(pte) do { } while (0)
@@ -444,13 +446,10 @@ struct mm_struct;
444static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 446static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
445{ 447{
446 pte_t old_pte; 448 pte_t old_pte;
447 pte_t pte;
448 449
449 spin_lock(&pa_dbit_lock); 450 spin_lock(&pa_dbit_lock);
450 pte = old_pte = *ptep; 451 old_pte = *ptep;
451 pte_val(pte) &= ~_PAGE_PRESENT; 452 pte_clear(mm,addr,ptep);
452 pte_val(pte) |= _PAGE_FLUSH;
453 set_pte_at(mm,addr,ptep,pte);
454 spin_unlock(&pa_dbit_lock); 453 spin_unlock(&pa_dbit_lock);
455 454
456 return old_pte; 455 return old_pte;