diff options
Diffstat (limited to 'arch/arm/mach-davinci/include/mach/asp.h')
-rw-r--r-- | arch/arm/mach-davinci/include/mach/asp.h | 56 |
1 files changed, 54 insertions, 2 deletions
diff --git a/arch/arm/mach-davinci/include/mach/asp.h b/arch/arm/mach-davinci/include/mach/asp.h index e0abc437d796..18e4ce34ece6 100644 --- a/arch/arm/mach-davinci/include/mach/asp.h +++ b/arch/arm/mach-davinci/include/mach/asp.h | |||
@@ -5,21 +5,73 @@ | |||
5 | #define __ASM_ARCH_DAVINCI_ASP_H | 5 | #define __ASM_ARCH_DAVINCI_ASP_H |
6 | 6 | ||
7 | #include <mach/irqs.h> | 7 | #include <mach/irqs.h> |
8 | #include <mach/edma.h> | ||
8 | 9 | ||
9 | /* Bases of register banks */ | 10 | /* Bases of dm644x and dm355 register banks */ |
10 | #define DAVINCI_ASP0_BASE 0x01E02000 | 11 | #define DAVINCI_ASP0_BASE 0x01E02000 |
11 | #define DAVINCI_ASP1_BASE 0x01E04000 | 12 | #define DAVINCI_ASP1_BASE 0x01E04000 |
12 | 13 | ||
13 | /* EDMA channels */ | 14 | /* Bases of dm646x register banks */ |
15 | #define DAVINCI_DM646X_MCASP0_REG_BASE 0x01D01000 | ||
16 | #define DAVINCI_DM646X_MCASP1_REG_BASE 0x01D01800 | ||
17 | |||
18 | /* Bases of da850/da830 McASP0 register banks */ | ||
19 | #define DAVINCI_DA8XX_MCASP0_REG_BASE 0x01D00000 | ||
20 | |||
21 | /* Bases of da830 McASP1 register banks */ | ||
22 | #define DAVINCI_DA830_MCASP1_REG_BASE 0x01D04000 | ||
23 | |||
24 | /* EDMA channels of dm644x and dm355 */ | ||
14 | #define DAVINCI_DMA_ASP0_TX 2 | 25 | #define DAVINCI_DMA_ASP0_TX 2 |
15 | #define DAVINCI_DMA_ASP0_RX 3 | 26 | #define DAVINCI_DMA_ASP0_RX 3 |
16 | #define DAVINCI_DMA_ASP1_TX 8 | 27 | #define DAVINCI_DMA_ASP1_TX 8 |
17 | #define DAVINCI_DMA_ASP1_RX 9 | 28 | #define DAVINCI_DMA_ASP1_RX 9 |
18 | 29 | ||
30 | /* EDMA channels of dm646x */ | ||
31 | #define DAVINCI_DM646X_DMA_MCASP0_AXEVT0 6 | ||
32 | #define DAVINCI_DM646X_DMA_MCASP0_AREVT0 9 | ||
33 | #define DAVINCI_DM646X_DMA_MCASP1_AXEVT1 12 | ||
34 | |||
35 | /* EDMA channels of da850/da830 McASP0 */ | ||
36 | #define DAVINCI_DA8XX_DMA_MCASP0_AREVT 0 | ||
37 | #define DAVINCI_DA8XX_DMA_MCASP0_AXEVT 1 | ||
38 | |||
39 | /* EDMA channels of da830 McASP1 */ | ||
40 | #define DAVINCI_DA830_DMA_MCASP1_AREVT 2 | ||
41 | #define DAVINCI_DA830_DMA_MCASP1_AXEVT 3 | ||
42 | |||
19 | /* Interrupts */ | 43 | /* Interrupts */ |
20 | #define DAVINCI_ASP0_RX_INT IRQ_MBRINT | 44 | #define DAVINCI_ASP0_RX_INT IRQ_MBRINT |
21 | #define DAVINCI_ASP0_TX_INT IRQ_MBXINT | 45 | #define DAVINCI_ASP0_TX_INT IRQ_MBXINT |
22 | #define DAVINCI_ASP1_RX_INT IRQ_MBRINT | 46 | #define DAVINCI_ASP1_RX_INT IRQ_MBRINT |
23 | #define DAVINCI_ASP1_TX_INT IRQ_MBXINT | 47 | #define DAVINCI_ASP1_TX_INT IRQ_MBXINT |
24 | 48 | ||
49 | struct snd_platform_data { | ||
50 | u32 tx_dma_offset; | ||
51 | u32 rx_dma_offset; | ||
52 | enum dma_event_q eventq_no; /* event queue number */ | ||
53 | unsigned int codec_fmt; | ||
54 | |||
55 | /* McASP specific fields */ | ||
56 | int tdm_slots; | ||
57 | u8 op_mode; | ||
58 | u8 num_serializer; | ||
59 | u8 *serial_dir; | ||
60 | u8 version; | ||
61 | u8 txnumevt; | ||
62 | u8 rxnumevt; | ||
63 | }; | ||
64 | |||
65 | enum { | ||
66 | MCASP_VERSION_1 = 0, /* DM646x */ | ||
67 | MCASP_VERSION_2, /* DA8xx/OMAPL1x */ | ||
68 | }; | ||
69 | |||
70 | #define INACTIVE_MODE 0 | ||
71 | #define TX_MODE 1 | ||
72 | #define RX_MODE 2 | ||
73 | |||
74 | #define DAVINCI_MCASP_IIS_MODE 0 | ||
75 | #define DAVINCI_MCASP_DIT_MODE 1 | ||
76 | |||
25 | #endif /* __ASM_ARCH_DAVINCI_ASP_H */ | 77 | #endif /* __ASM_ARCH_DAVINCI_ASP_H */ |