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-rw-r--r--Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt119
1 files changed, 94 insertions, 25 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
index 03dee50532f5..e97a27856b21 100644
--- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
@@ -8,13 +8,20 @@ on-chip controllers onto these pads.
8Required Properties: 8Required Properties:
9- compatible: should be one of the following. 9- compatible: should be one of the following.
10 - "samsung,pinctrl-exynos4210": for Exynos4210 compatible pin-controller. 10 - "samsung,pinctrl-exynos4210": for Exynos4210 compatible pin-controller.
11 - "samsung,pinctrl-exynos4x12": for Exynos4x12 compatible pin-controller.
11 - "samsung,pinctrl-exynos5250": for Exynos5250 compatible pin-controller. 12 - "samsung,pinctrl-exynos5250": for Exynos5250 compatible pin-controller.
12 13
13- reg: Base address of the pin controller hardware module and length of 14- reg: Base address of the pin controller hardware module and length of
14 the address space it occupies. 15 the address space it occupies.
15 16
16- interrupts: interrupt specifier for the controller. The format and value of 17- Pin banks as child nodes: Pin banks of the controller are represented by child
17 the interrupt specifier depends on the interrupt parent for the controller. 18 nodes of the controller node. Bank name is taken from name of the node. Each
19 bank node must contain following properties:
20
21 - gpio-controller: identifies the node as a gpio controller and pin bank.
22 - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO
23 binding is used, the amount of cells must be specified as 2. See generic
24 GPIO binding documentation for description of particular cells.
18 25
19- Pin mux/config groups as child nodes: The pin mux (selecting pin function 26- Pin mux/config groups as child nodes: The pin mux (selecting pin function
20 mode) and pin config (pull up/down, driver strength) settings are represented 27 mode) and pin config (pull up/down, driver strength) settings are represented
@@ -72,16 +79,24 @@ used as system wakeup events.
72A. External GPIO Interrupts: For supporting external gpio interrupts, the 79A. External GPIO Interrupts: For supporting external gpio interrupts, the
73 following properties should be specified in the pin-controller device node. 80 following properties should be specified in the pin-controller device node.
74 81
75- interrupt-controller: identifies the controller node as interrupt-parent. 82 - interrupt-parent: phandle of the interrupt parent to which the external
76- #interrupt-cells: the value of this property should be 2. 83 GPIO interrupts are forwarded to.
77 - First Cell: represents the external gpio interrupt number local to the 84 - interrupts: interrupt specifier for the controller. The format and value of
78 external gpio interrupt space of the controller. 85 the interrupt specifier depends on the interrupt parent for the controller.
79 - Second Cell: flags to identify the type of the interrupt 86
80 - 1 = rising edge triggered 87 In addition, following properties must be present in node of every bank
81 - 2 = falling edge triggered 88 of pins supporting GPIO interrupts:
82 - 3 = rising and falling edge triggered 89
83 - 4 = high level triggered 90 - interrupt-controller: identifies the controller node as interrupt-parent.
84 - 8 = low level triggered 91 - #interrupt-cells: the value of this property should be 2.
92 - First Cell: represents the external gpio interrupt number local to the
93 external gpio interrupt space of the controller.
94 - Second Cell: flags to identify the type of the interrupt
95 - 1 = rising edge triggered
96 - 2 = falling edge triggered
97 - 3 = rising and falling edge triggered
98 - 4 = high level triggered
99 - 8 = low level triggered
85 100
86B. External Wakeup Interrupts: For supporting external wakeup interrupts, a 101B. External Wakeup Interrupts: For supporting external wakeup interrupts, a
87 child node representing the external wakeup interrupt controller should be 102 child node representing the external wakeup interrupt controller should be
@@ -94,6 +109,11 @@ B. External Wakeup Interrupts: For supporting external wakeup interrupts, a
94 found on Samsung Exynos4210 SoC. 109 found on Samsung Exynos4210 SoC.
95 - interrupt-parent: phandle of the interrupt parent to which the external 110 - interrupt-parent: phandle of the interrupt parent to which the external
96 wakeup interrupts are forwarded to. 111 wakeup interrupts are forwarded to.
112 - interrupts: interrupt used by multiplexed wakeup interrupts.
113
114 In addition, following properties must be present in node of every bank
115 of pins supporting wake-up interrupts:
116
97 - interrupt-controller: identifies the node as interrupt-parent. 117 - interrupt-controller: identifies the node as interrupt-parent.
98 - #interrupt-cells: the value of this property should be 2 118 - #interrupt-cells: the value of this property should be 2
99 - First Cell: represents the external wakeup interrupt number local to 119 - First Cell: represents the external wakeup interrupt number local to
@@ -105,11 +125,63 @@ B. External Wakeup Interrupts: For supporting external wakeup interrupts, a
105 - 4 = high level triggered 125 - 4 = high level triggered
106 - 8 = low level triggered 126 - 8 = low level triggered
107 127
128 Node of every bank of pins supporting direct wake-up interrupts (without
129 multiplexing) must contain following properties:
130
131 - interrupt-parent: phandle of the interrupt parent to which the external
132 wakeup interrupts are forwarded to.
133 - interrupts: interrupts of the interrupt parent which are used for external
134 wakeup interrupts from pins of the bank, must contain interrupts for all
135 pins of the bank.
136
108Aliases: 137Aliases:
109 138
110All the pin controller nodes should be represented in the aliases node using 139All the pin controller nodes should be represented in the aliases node using
111the following format 'pinctrl{n}' where n is a unique number for the alias. 140the following format 'pinctrl{n}' where n is a unique number for the alias.
112 141
142Example: A pin-controller node with pin banks:
143
144 pinctrl_0: pinctrl@11400000 {
145 compatible = "samsung,pinctrl-exynos4210";
146 reg = <0x11400000 0x1000>;
147 interrupts = <0 47 0>;
148
149 /* ... */
150
151 /* Pin bank without external interrupts */
152 gpy0: gpy0 {
153 gpio-controller;
154 #gpio-cells = <2>;
155 };
156
157 /* ... */
158
159 /* Pin bank with external GPIO or muxed wake-up interrupts */
160 gpj0: gpj0 {
161 gpio-controller;
162 #gpio-cells = <2>;
163
164 interrupt-controller;
165 #interrupt-cells = <2>;
166 };
167
168 /* ... */
169
170 /* Pin bank with external direct wake-up interrupts */
171 gpx0: gpx0 {
172 gpio-controller;
173 #gpio-cells = <2>;
174
175 interrupt-controller;
176 interrupt-parent = <&gic>;
177 interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
178 <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>;
179 #interrupt-cells = <2>;
180 };
181
182 /* ... */
183 };
184
113Example 1: A pin-controller node with pin groups. 185Example 1: A pin-controller node with pin groups.
114 186
115 pinctrl_0: pinctrl@11400000 { 187 pinctrl_0: pinctrl@11400000 {
@@ -117,6 +189,8 @@ Example 1: A pin-controller node with pin groups.
117 reg = <0x11400000 0x1000>; 189 reg = <0x11400000 0x1000>;
118 interrupts = <0 47 0>; 190 interrupts = <0 47 0>;
119 191
192 /* ... */
193
120 uart0_data: uart0-data { 194 uart0_data: uart0-data {
121 samsung,pins = "gpa0-0", "gpa0-1"; 195 samsung,pins = "gpa0-0", "gpa0-1";
122 samsung,pin-function = <2>; 196 samsung,pin-function = <2>;
@@ -158,20 +232,14 @@ Example 2: A pin-controller node with external wakeup interrupt controller node.
158 pinctrl_1: pinctrl@11000000 { 232 pinctrl_1: pinctrl@11000000 {
159 compatible = "samsung,pinctrl-exynos4210"; 233 compatible = "samsung,pinctrl-exynos4210";
160 reg = <0x11000000 0x1000>; 234 reg = <0x11000000 0x1000>;
161 interrupts = <0 46 0>; 235 interrupts = <0 46 0>
162 interrupt-controller;
163 #interrupt-cells = <2>;
164 236
165 wakup_eint: wakeup-interrupt-controller { 237 /* ... */
238
239 wakeup-interrupt-controller {
166 compatible = "samsung,exynos4210-wakeup-eint"; 240 compatible = "samsung,exynos4210-wakeup-eint";
167 interrupt-parent = <&gic>; 241 interrupt-parent = <&gic>;
168 interrupt-controller; 242 interrupts = <0 32 0>;
169 #interrupt-cells = <2>;
170 interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
171 <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
172 <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
173 <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>,
174 <0 32 0>;
175 }; 243 };
176 }; 244 };
177 245
@@ -190,7 +258,8 @@ Example 4: Set up the default pin state for uart controller.
190 258
191 static int s3c24xx_serial_probe(struct platform_device *pdev) { 259 static int s3c24xx_serial_probe(struct platform_device *pdev) {
192 struct pinctrl *pinctrl; 260 struct pinctrl *pinctrl;
193 ... 261
194 ... 262 /* ... */
263
195 pinctrl = devm_pinctrl_get_select_default(&pdev->dev); 264 pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
196 } 265 }