Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next-2.6 into for-davem

113 files changed, 18287 insertions, 4874 deletions

diff --git a/drivers/bluetooth/ath3k.c b/drivers/bluetooth/ath3k.c
index 333c21289d97..5577ed656e2f 100644
--- a/drivers/bluetooth/ath3k.c
+++ b/drivers/bluetooth/ath3k.c
@@ -31,6 +31,30 @@
 
 #define VERSION "1.0"
 
+#define ATH3K_DNLOAD                            0x01
+#define ATH3K_GETSTATE                          0x05
+#define ATH3K_SET_NORMAL_MODE                   0x07
+#define ATH3K_GETVERSION                        0x09
+#define USB_REG_SWITCH_VID_PID                  0x0a
+
+#define ATH3K_MODE_MASK                         0x3F
+#define ATH3K_NORMAL_MODE                       0x0E
+
+#define ATH3K_PATCH_UPDATE                      0x80
+#define ATH3K_SYSCFG_UPDATE                     0x40
+
+#define ATH3K_XTAL_FREQ_26M                     0x00
+#define ATH3K_XTAL_FREQ_40M                     0x01
+#define ATH3K_XTAL_FREQ_19P2                    0x02
+#define ATH3K_NAME_LEN                          0xFF
+
+struct ath3k_version {
+        unsigned int    rom_version;
+        unsigned int    build_version;
+        unsigned int    ram_version;
+        unsigned char   ref_clock;
+        unsigned char   reserved[0x07];
+};
 
 static struct usb_device_id ath3k_table[] = {
         /* Atheros AR3011 */
@@ -41,13 +65,32 @@ static struct usb_device_id ath3k_table[] = {
 
         /* Atheros AR9285 Malbec with sflash firmware */
         { USB_DEVICE(0x03F0, 0x311D) },
+
+        /* Atheros AR3012 with sflash firmware*/
+        { USB_DEVICE(0x0CF3, 0x3004) },
+
+        /* Atheros AR5BBU12 with sflash firmware */
+        { USB_DEVICE(0x0489, 0xE02C) },
+
         { }     /* Terminating entry */
 };
 
 MODULE_DEVICE_TABLE(usb, ath3k_table);
 
+#define BTUSB_ATH3012           0x80
+/* This table is to load patch and sysconfig files
+ * for AR3012 */
+static struct usb_device_id ath3k_blist_tbl[] = {
+
+        /* Atheros AR3012 with sflash firmware*/
+        { USB_DEVICE(0x0cf3, 0x3004), .driver_info = BTUSB_ATH3012 },
+
+        { }     /* Terminating entry */
+};
+
 #define USB_REQ_DFU_DNLOAD      1
 #define BULK_SIZE               4096
+#define FW_HDR_SIZE             20
 
 static int ath3k_load_firmware(struct usb_device *udev,
                                 const struct firmware *firmware)
@@ -103,28 +146,265 @@ error:
         return err;
 }
 
+static int ath3k_get_state(struct usb_device *udev, unsigned char *state)
+{
+        int pipe = 0;
+
+        pipe = usb_rcvctrlpipe(udev, 0);
+        return usb_control_msg(udev, pipe, ATH3K_GETSTATE,
+                        USB_TYPE_VENDOR | USB_DIR_IN, 0, 0,
+                        state, 0x01, USB_CTRL_SET_TIMEOUT);
+}
+
+static int ath3k_get_version(struct usb_device *udev,
+                        struct ath3k_version *version)
+{
+        int pipe = 0;
+
+        pipe = usb_rcvctrlpipe(udev, 0);
+        return usb_control_msg(udev, pipe, ATH3K_GETVERSION,
+                        USB_TYPE_VENDOR | USB_DIR_IN, 0, 0, version,
+                        sizeof(struct ath3k_version),
+                        USB_CTRL_SET_TIMEOUT);
+}
+
+static int ath3k_load_fwfile(struct usb_device *udev,
+                const struct firmware *firmware)
+{
+        u8 *send_buf;
+        int err, pipe, len, size, count, sent = 0;
+        int ret;
+
+        count = firmware->size;
+
+        send_buf = kmalloc(BULK_SIZE, GFP_ATOMIC);
+        if (!send_buf) {
+                BT_ERR("Can't allocate memory chunk for firmware");
+                return -ENOMEM;
+        }
+
+        size = min_t(uint, count, FW_HDR_SIZE);
+        memcpy(send_buf, firmware->data, size);
+
+        pipe = usb_sndctrlpipe(udev, 0);
+        ret = usb_control_msg(udev, pipe, ATH3K_DNLOAD,
+                        USB_TYPE_VENDOR, 0, 0, send_buf,
+                        size, USB_CTRL_SET_TIMEOUT);
+        if (ret < 0) {
+                BT_ERR("Can't change to loading configuration err");
+                kfree(send_buf);
+                return ret;
+        }
+
+        sent += size;
+        count -= size;
+
+        while (count) {
+                size = min_t(uint, count, BULK_SIZE);
+                pipe = usb_sndbulkpipe(udev, 0x02);
+
+                memcpy(send_buf, firmware->data + sent, size);
+
+                err = usb_bulk_msg(udev, pipe, send_buf, size,
+                                        &len, 3000);
+                if (err || (len != size)) {
+                        BT_ERR("Error in firmware loading err = %d,"
+                                "len = %d, size = %d", err, len, size);
+                        kfree(send_buf);
+                        return err;
+                }
+                sent  += size;
+                count -= size;
+        }
+
+        kfree(send_buf);
+        return 0;
+}
+
+static int ath3k_switch_pid(struct usb_device *udev)
+{
+        int pipe = 0;
+
+        pipe = usb_sndctrlpipe(udev, 0);
+        return usb_control_msg(udev, pipe, USB_REG_SWITCH_VID_PID,
+                        USB_TYPE_VENDOR, 0, 0,
+                        NULL, 0, USB_CTRL_SET_TIMEOUT);
+}
+
+static int ath3k_set_normal_mode(struct usb_device *udev)
+{
+        unsigned char fw_state;
+        int pipe = 0, ret;
+
+        ret = ath3k_get_state(udev, &fw_state);
+        if (ret < 0) {
+                BT_ERR("Can't get state to change to normal mode err");
+                return ret;
+        }
+
+        if ((fw_state & ATH3K_MODE_MASK) == ATH3K_NORMAL_MODE) {
+                BT_DBG("firmware was already in normal mode");
+                return 0;
+        }
+
+        pipe = usb_sndctrlpipe(udev, 0);
+        return usb_control_msg(udev, pipe, ATH3K_SET_NORMAL_MODE,
+                        USB_TYPE_VENDOR, 0, 0,
+                        NULL, 0, USB_CTRL_SET_TIMEOUT);
+}
+
+static int ath3k_load_patch(struct usb_device *udev)
+{
+        unsigned char fw_state;
+        char filename[ATH3K_NAME_LEN] = {0};
+        const struct firmware *firmware;
+        struct ath3k_version fw_version, pt_version;
+        int ret;
+
+        ret = ath3k_get_state(udev, &fw_state);
+        if (ret < 0) {
+                BT_ERR("Can't get state to change to load ram patch err");
+                return ret;
+        }
+
+        if (fw_state & ATH3K_PATCH_UPDATE) {
+                BT_DBG("Patch was already downloaded");
+                return 0;
+        }
+
+        ret = ath3k_get_version(udev, &fw_version);
+        if (ret < 0) {
+                BT_ERR("Can't get version to change to load ram patch err");
+                return ret;
+        }
+
+        snprintf(filename, ATH3K_NAME_LEN, "ar3k/AthrBT_0x%08x.dfu",
+                fw_version.rom_version);
+
+        ret = request_firmware(&firmware, filename, &udev->dev);
+        if (ret < 0) {
+                BT_ERR("Patch file not found %s", filename);
+                return ret;
+        }
+
+        pt_version.rom_version = *(int *)(firmware->data + firmware->size - 8);
+        pt_version.build_version = *(int *)
+                (firmware->data + firmware->size - 4);
+
+        if ((pt_version.rom_version != fw_version.rom_version) ||
+                (pt_version.build_version <= fw_version.build_version)) {
+                BT_ERR("Patch file version did not match with firmware");
+                release_firmware(firmware);
+                return -EINVAL;
+        }
+
+        ret = ath3k_load_fwfile(udev, firmware);
+        release_firmware(firmware);
+
+        return ret;
+}
+
+static int ath3k_load_syscfg(struct usb_device *udev)
+{
+        unsigned char fw_state;
+        char filename[ATH3K_NAME_LEN] = {0};
+        const struct firmware *firmware;
+        struct ath3k_version fw_version;
+        int clk_value, ret;
+
+        ret = ath3k_get_state(udev, &fw_state);
+        if (ret < 0) {
+                BT_ERR("Can't get state to change to load configration err");
+                return -EBUSY;
+        }
+
+        ret = ath3k_get_version(udev, &fw_version);
+        if (ret < 0) {
+                BT_ERR("Can't get version to change to load ram patch err");
+                return ret;
+        }
+
+        switch (fw_version.ref_clock) {
+
+        case ATH3K_XTAL_FREQ_26M:
+                clk_value = 26;
+                break;
+        case ATH3K_XTAL_FREQ_40M:
+                clk_value = 40;
+                break;
+        case ATH3K_XTAL_FREQ_19P2:
+                clk_value = 19;
+                break;
+        default:
+                clk_value = 0;
+                break;
+        }
+
+        snprintf(filename, ATH3K_NAME_LEN, "ar3k/ramps_0x%08x_%d%s",
+                fw_version.rom_version, clk_value, ".dfu");
+
+        ret = request_firmware(&firmware, filename, &udev->dev);
+        if (ret < 0) {
+                BT_ERR("Configuration file not found %s", filename);
+                return ret;
+        }
+
+        ret = ath3k_load_fwfile(udev, firmware);
+        release_firmware(firmware);
+
+        return ret;
+}
+
 static int ath3k_probe(struct usb_interface *intf,
                         const struct usb_device_id *id)
 {
         const struct firmware *firmware;
         struct usb_device *udev = interface_to_usbdev(intf);
+        int ret;
 
         BT_DBG("intf %p id %p", intf, id);
 
         if (intf->cur_altsetting->desc.bInterfaceNumber != 0)
                 return -ENODEV;
 
-        if (request_firmware(&firmware, "ath3k-1.fw", &udev->dev) < 0) {
-                return -EIO;
+        /* match device ID in ath3k blacklist table */
+        if (!id->driver_info) {
+                const struct usb_device_id *match;
+                match = usb_match_id(intf, ath3k_blist_tbl);
+                if (match)
+                        id = match;
         }
 
-        if (ath3k_load_firmware(udev, firmware)) {
-                release_firmware(firmware);
+        /* load patch and sysconfig files for AR3012 */
+        if (id->driver_info & BTUSB_ATH3012) {
+                ret = ath3k_load_patch(udev);
+                if (ret < 0) {
+                        BT_ERR("Loading patch file failed");
+                        return ret;
+                }
+                ret = ath3k_load_syscfg(udev);
+                if (ret < 0) {
+                        BT_ERR("Loading sysconfig file failed");
+                        return ret;
+                }
+                ret = ath3k_set_normal_mode(udev);
+                if (ret < 0) {
+                        BT_ERR("Set normal mode failed");
+                        return ret;
+                }
+                ath3k_switch_pid(udev);
+                return 0;
+        }
+
+        if (request_firmware(&firmware, "ath3k-1.fw", &udev->dev) < 0) {
+                BT_ERR("Error loading firmware");
                 return -EIO;
         }
+
+        ret = ath3k_load_firmware(udev, firmware);
         release_firmware(firmware);
 
-        return 0;
+        return ret;
 }
 
 static void ath3k_disconnect(struct usb_interface *intf)
diff --git a/drivers/bluetooth/btusb.c b/drivers/bluetooth/btusb.c
index 4cefa91e6c34..411ae9c9b384 100644
--- a/drivers/bluetooth/btusb.c
+++ b/drivers/bluetooth/btusb.c
@@ -105,6 +105,12 @@ static struct usb_device_id blacklist_table[] = {
         /* Atheros AR9285 Malbec with sflash firmware */
         { USB_DEVICE(0x03f0, 0x311d), .driver_info = BTUSB_IGNORE },
 
+        /* Atheros 3012 with sflash firmware */
+        { USB_DEVICE(0x0cf3, 0x3004), .driver_info = BTUSB_IGNORE },
+
+        /* Atheros AR5BBU12 with sflash firmware */
+        { USB_DEVICE(0x0489, 0xe02c), .driver_info = BTUSB_IGNORE },
+
         /* Broadcom BCM2035 */
         { USB_DEVICE(0x0a5c, 0x2035), .driver_info = BTUSB_WRONG_SCO_MTU },
         { USB_DEVICE(0x0a5c, 0x200a), .driver_info = BTUSB_WRONG_SCO_MTU },
@@ -711,15 +717,11 @@ static int btusb_send_frame(struct sk_buff *skb)
                 pipe = usb_sndisocpipe(data->udev,
                                         data->isoc_tx_ep->bEndpointAddress);
 
-                urb->dev      = data->udev;
-                urb->pipe     = pipe;
-                urb->context  = skb;
-                urb->complete = btusb_isoc_tx_complete;
-                urb->interval = data->isoc_tx_ep->bInterval;
+                usb_fill_int_urb(urb, data->udev, pipe,
+                                skb->data, skb->len, btusb_isoc_tx_complete,
+                                skb, data->isoc_tx_ep->bInterval);
 
                 urb->transfer_flags  = URB_ISO_ASAP;
-                urb->transfer_buffer = skb->data;
-                urb->transfer_buffer_length = skb->len;
 
                 __fill_isoc_descriptor(urb, skb->len,
                                 le16_to_cpu(data->isoc_tx_ep->wMaxPacketSize));
@@ -829,7 +831,7 @@ static void btusb_work(struct work_struct *work)
 
         if (hdev->conn_hash.sco_num > 0) {
                 if (!test_bit(BTUSB_DID_ISO_RESUME, &data->flags)) {
-                        err = usb_autopm_get_interface(data->isoc);
+                        err = usb_autopm_get_interface(data->isoc ? data->isoc : data->intf);
                         if (err < 0) {
                                 clear_bit(BTUSB_ISOC_RUNNING, &data->flags);
                                 usb_kill_anchored_urbs(&data->isoc_anchor);
@@ -858,7 +860,7 @@ static void btusb_work(struct work_struct *work)
 
                 __set_isoc_interface(hdev, 0);
                 if (test_and_clear_bit(BTUSB_DID_ISO_RESUME, &data->flags))
-                        usb_autopm_put_interface(data->isoc);
+                        usb_autopm_put_interface(data->isoc ? data->isoc : data->intf);
         }
 }
 
diff --git a/drivers/bluetooth/hci_ldisc.c b/drivers/bluetooth/hci_ldisc.c
index 3c6cabcb7d84..48ad2a7ab080 100644
--- a/drivers/bluetooth/hci_ldisc.c
+++ b/drivers/bluetooth/hci_ldisc.c
@@ -398,6 +398,7 @@ static int hci_uart_register_dev(struct hci_uart *hu)
         hdev->flush = hci_uart_flush;
         hdev->send  = hci_uart_send_frame;
         hdev->destruct = hci_uart_destruct;
+        hdev->parent = hu->tty->dev;
 
         hdev->owner = THIS_MODULE;
 
diff --git a/drivers/net/wireless/ath/ar9170/Kconfig b/drivers/net/wireless/ath/ar9170/Kconfig
index d7a4799d20fb..7b9672b0d090 100644
--- a/drivers/net/wireless/ath/ar9170/Kconfig
+++ b/drivers/net/wireless/ath/ar9170/Kconfig
@@ -1,8 +1,10 @@
 config AR9170_USB
-        tristate "Atheros AR9170 802.11n USB support"
+        tristate "Atheros AR9170 802.11n USB support (OBSOLETE)"
         depends on USB && MAC80211
         select FW_LOADER
         help
+          This driver is going to get replaced by carl9170.
+
           This is a driver for the Atheros "otus" 802.11n USB devices.
 
           These devices require additional firmware (2 files).
diff --git a/drivers/net/wireless/ath/ath5k/ath5k.h b/drivers/net/wireless/ath/ath5k/ath5k.h
index e43175a89d67..70abb61e9eff 100644
--- a/drivers/net/wireless/ath/ath5k/ath5k.h
+++ b/drivers/net/wireless/ath/ath5k/ath5k.h
@@ -1158,6 +1158,26 @@ void ath5k_hw_deinit(struct ath5k_hw *ah);
 int ath5k_sysfs_register(struct ath5k_softc *sc);
 void ath5k_sysfs_unregister(struct ath5k_softc *sc);
 
+/* base.c */
+struct ath5k_buf;
+struct ath5k_txq;
+
+void set_beacon_filter(struct ieee80211_hw *hw, bool enable);
+bool ath_any_vif_assoc(struct ath5k_softc *sc);
+int ath5k_tx_queue(struct ieee80211_hw *hw, struct sk_buff *skb,
+                   struct ath5k_txq *txq);
+int ath5k_init_hw(struct ath5k_softc *sc);
+int ath5k_stop_hw(struct ath5k_softc *sc);
+void ath5k_mode_setup(struct ath5k_softc *sc, struct ieee80211_vif *vif);
+void ath5k_update_bssid_mask_and_opmode(struct ath5k_softc *sc,
+                                        struct ieee80211_vif *vif);
+int ath5k_chan_set(struct ath5k_softc *sc, struct ieee80211_channel *chan);
+void ath5k_beacon_update_timers(struct ath5k_softc *sc, u64 bc_tsf);
+int ath5k_beacon_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif);
+void ath5k_beacon_config(struct ath5k_softc *sc);
+void ath5k_txbuf_free_skb(struct ath5k_softc *sc, struct ath5k_buf *bf);
+void ath5k_rxbuf_free_skb(struct ath5k_softc *sc, struct ath5k_buf *bf);
+
 /*Chip id helper functions */
 const char *ath5k_chip_name(enum ath5k_srev_type type, u_int16_t val);
 int ath5k_hw_read_srev(struct ath5k_hw *ah);
diff --git a/drivers/net/wireless/ath/ath5k/attach.c b/drivers/net/wireless/ath/ath5k/attach.c
index c71fdbb4c439..bc8240560488 100644
--- a/drivers/net/wireless/ath/ath5k/attach.c
+++ b/drivers/net/wireless/ath/ath5k/attach.c
@@ -220,7 +220,8 @@ int ath5k_hw_init(struct ath5k_softc *sc)
                         ah->ah_radio = AR5K_RF5112;
                         ah->ah_single_chip = false;
                         ah->ah_radio_5ghz_revision = AR5K_SREV_RAD_5112B;
-                } else if (ah->ah_mac_version == (AR5K_SREV_AR2415 >> 4)) {
+                } else if (ah->ah_mac_version == (AR5K_SREV_AR2415 >> 4) ||
+                        ah->ah_mac_version == (AR5K_SREV_AR2315_R6 >> 4)) {
                         ah->ah_radio = AR5K_RF2316;
                         ah->ah_single_chip = true;
                         ah->ah_radio_5ghz_revision = AR5K_SREV_RAD_2316;
diff --git a/drivers/net/wireless/ath/ath5k/mac80211-ops.c b/drivers/net/wireless/ath/ath5k/mac80211-ops.c
index 36a51995a7bc..a60a726a140c 100644
--- a/drivers/net/wireless/ath/ath5k/mac80211-ops.c
+++ b/drivers/net/wireless/ath/ath5k/mac80211-ops.c
@@ -48,23 +48,6 @@
 
 extern int ath5k_modparam_nohwcrypt;
 
-/* functions used from base.c */
-void set_beacon_filter(struct ieee80211_hw *hw, bool enable);
-bool ath_any_vif_assoc(struct ath5k_softc *sc);
-int ath5k_tx_queue(struct ieee80211_hw *hw, struct sk_buff *skb,
-                   struct ath5k_txq *txq);
-int ath5k_init_hw(struct ath5k_softc *sc);
-int ath5k_stop_hw(struct ath5k_softc *sc);
-void ath5k_mode_setup(struct ath5k_softc *sc, struct ieee80211_vif *vif);
-void ath5k_update_bssid_mask_and_opmode(struct ath5k_softc *sc,
-                                        struct ieee80211_vif *vif);
-int ath5k_chan_set(struct ath5k_softc *sc, struct ieee80211_channel *chan);
-void ath5k_beacon_update_timers(struct ath5k_softc *sc, u64 bc_tsf);
-int ath5k_beacon_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif);
-void ath5k_beacon_config(struct ath5k_softc *sc);
-void ath5k_txbuf_free_skb(struct ath5k_softc *sc, struct ath5k_buf *bf);
-void ath5k_rxbuf_free_skb(struct ath5k_softc *sc, struct ath5k_buf *bf);
-
 /********************\
 * Mac80211 functions *
 \********************/
diff --git a/drivers/net/wireless/ath/ath5k/phy.c b/drivers/net/wireless/ath/ath5k/phy.c
index d673ab2f6cda..62ce2f4e8605 100644
--- a/drivers/net/wireless/ath/ath5k/phy.c
+++ b/drivers/net/wireless/ath/ath5k/phy.c
@@ -1281,6 +1281,7 @@ static int ath5k_hw_channel(struct ath5k_hw *ah,
         case AR5K_RF5111:
                 ret = ath5k_hw_rf5111_channel(ah, channel);
                 break;
+        case AR5K_RF2317:
         case AR5K_RF2425:
                 ret = ath5k_hw_rf2425_channel(ah, channel);
                 break;
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_hw.c b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
index 06fb2c850535..6fa3c24af2da 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
@@ -28,7 +28,67 @@
  */
 static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
 {
-        if (AR_SREV_9485(ah)) {
+        if (AR_SREV_9485_11(ah)) {
+                /* mac */
+                INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
+                INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
+                                ar9485_1_1_mac_core,
+                                ARRAY_SIZE(ar9485_1_1_mac_core), 2);
+                INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
+                                ar9485_1_1_mac_postamble,
+                                ARRAY_SIZE(ar9485_1_1_mac_postamble), 5);
+
+                /* bb */
+                INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], ar9485_1_1,
+                                ARRAY_SIZE(ar9485_1_1), 2);
+                INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
+                                ar9485_1_1_baseband_core,
+                                ARRAY_SIZE(ar9485_1_1_baseband_core), 2);
+                INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
+                                ar9485_1_1_baseband_postamble,
+                                ARRAY_SIZE(ar9485_1_1_baseband_postamble), 5);
+
+                /* radio */
+                INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
+                INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
+                                ar9485_1_1_radio_core,
+                                ARRAY_SIZE(ar9485_1_1_radio_core), 2);
+                INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
+                                ar9485_1_1_radio_postamble,
+                                ARRAY_SIZE(ar9485_1_1_radio_postamble), 2);
+
+                /* soc */
+                INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
+                                ar9485_1_1_soc_preamble,
+                                ARRAY_SIZE(ar9485_1_1_soc_preamble), 2);
+                INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
+                INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST], NULL, 0, 0);
+
+                /* rx/tx gain */
+                INIT_INI_ARRAY(&ah->iniModesRxGain,
+                                ar9485_common_rx_gain_1_1,
+                                ARRAY_SIZE(ar9485_common_rx_gain_1_1), 2);
+                INIT_INI_ARRAY(&ah->iniModesTxGain,
+                                ar9485_modes_lowest_ob_db_tx_gain_1_1,
+                                ARRAY_SIZE(ar9485_modes_lowest_ob_db_tx_gain_1_1),
+                                5);
+
+                /* Load PCIE SERDES settings from INI */
+
+                /* Awake Setting */
+
+                INIT_INI_ARRAY(&ah->iniPcieSerdes,
+                                ar9485_1_1_pcie_phy_pll_on_clkreq_disable_L1,
+                                ARRAY_SIZE(ar9485_1_1_pcie_phy_pll_on_clkreq_disable_L1),
+                                2);
+
+                /* Sleep Setting */
+
+                INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
+                                ar9485_1_1_pcie_phy_pll_on_clkreq_disable_L1,
+                                ARRAY_SIZE(ar9485_1_1_pcie_phy_pll_on_clkreq_disable_L1),
+                                2);
+        } else if (AR_SREV_9485(ah)) {
                 /* mac */
                 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
                 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
@@ -85,8 +145,8 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
                 /* Sleep Setting */
 
                 INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
-                                ar9485_1_0_pcie_phy_pll_on_clkreq_enable_L1,
-                                ARRAY_SIZE(ar9485_1_0_pcie_phy_pll_on_clkreq_enable_L1),
+                                ar9485_1_0_pcie_phy_pll_on_clkreq_disable_L1,
+                                ARRAY_SIZE(ar9485_1_0_pcie_phy_pll_on_clkreq_disable_L1),
                                 2);
         } else {
                 /* mac */
@@ -163,7 +223,12 @@ static void ar9003_tx_gain_table_apply(struct ath_hw *ah)
         switch (ar9003_hw_get_tx_gain_idx(ah)) {
         case 0:
         default:
-                if (AR_SREV_9485(ah))
+                if (AR_SREV_9485_11(ah))
+                        INIT_INI_ARRAY(&ah->iniModesTxGain,
+                                       ar9485_modes_lowest_ob_db_tx_gain_1_1,
+                                       ARRAY_SIZE(ar9485_modes_lowest_ob_db_tx_gain_1_1),
+                                       5);
+                else if (AR_SREV_9485(ah))
                         INIT_INI_ARRAY(&ah->iniModesTxGain,
                                        ar9485Modes_lowest_ob_db_tx_gain_1_0,
                                        ARRAY_SIZE(ar9485Modes_lowest_ob_db_tx_gain_1_0),
@@ -175,10 +240,15 @@ static void ar9003_tx_gain_table_apply(struct ath_hw *ah)
                                        5);
                 break;
         case 1:
-                if (AR_SREV_9485(ah))
+                if (AR_SREV_9485_11(ah))
+                        INIT_INI_ARRAY(&ah->iniModesTxGain,
+                                       ar9485Modes_high_ob_db_tx_gain_1_1,
+                                       ARRAY_SIZE(ar9485Modes_high_ob_db_tx_gain_1_1),
+                                       5);
+                else if (AR_SREV_9485(ah))
                         INIT_INI_ARRAY(&ah->iniModesTxGain,
                                        ar9485Modes_high_ob_db_tx_gain_1_0,
-                                       ARRAY_SIZE(ar9485Modes_lowest_ob_db_tx_gain_1_0),
+                                       ARRAY_SIZE(ar9485Modes_high_ob_db_tx_gain_1_0),
                                        5);
                 else
                         INIT_INI_ARRAY(&ah->iniModesTxGain,
@@ -187,10 +257,15 @@ static void ar9003_tx_gain_table_apply(struct ath_hw *ah)
                                        5);
                 break;
         case 2:
-                if (AR_SREV_9485(ah))
+                if (AR_SREV_9485_11(ah))
+                        INIT_INI_ARRAY(&ah->iniModesTxGain,
+                                       ar9485Modes_low_ob_db_tx_gain_1_1,
+                                       ARRAY_SIZE(ar9485Modes_low_ob_db_tx_gain_1_1),
+                                       5);
+                else if (AR_SREV_9485(ah))
                         INIT_INI_ARRAY(&ah->iniModesTxGain,
                                        ar9485Modes_low_ob_db_tx_gain_1_0,
-                                       ARRAY_SIZE(ar9485Modes_lowest_ob_db_tx_gain_1_0),
+                                       ARRAY_SIZE(ar9485Modes_low_ob_db_tx_gain_1_0),
                                        5);
                 else
                         INIT_INI_ARRAY(&ah->iniModesTxGain,
@@ -199,7 +274,12 @@ static void ar9003_tx_gain_table_apply(struct ath_hw *ah)
                                        5);
                 break;
         case 3:
-                if (AR_SREV_9485(ah))
+                if (AR_SREV_9485_11(ah))
+                        INIT_INI_ARRAY(&ah->iniModesTxGain,
+                                       ar9485Modes_high_power_tx_gain_1_1,
+                                       ARRAY_SIZE(ar9485Modes_high_power_tx_gain_1_1),
+                                       5);
+                else if (AR_SREV_9485(ah))
                         INIT_INI_ARRAY(&ah->iniModesTxGain,
                                        ar9485Modes_high_power_tx_gain_1_0,
                                        ARRAY_SIZE(ar9485Modes_high_power_tx_gain_1_0),
@@ -218,7 +298,12 @@ static void ar9003_rx_gain_table_apply(struct ath_hw *ah)
         switch (ar9003_hw_get_rx_gain_idx(ah)) {
         case 0:
         default:
-                if (AR_SREV_9485(ah))
+                if (AR_SREV_9485_11(ah))
+                        INIT_INI_ARRAY(&ah->iniModesRxGain,
+                                       ar9485_common_rx_gain_1_1,
+                                       ARRAY_SIZE(ar9485_common_rx_gain_1_1),
+                                       2);
+                else if (AR_SREV_9485(ah))
                         INIT_INI_ARRAY(&ah->iniModesRxGain,
                                        ar9485Common_rx_gain_1_0,
                                        ARRAY_SIZE(ar9485Common_rx_gain_1_0),
@@ -230,7 +315,12 @@ static void ar9003_rx_gain_table_apply(struct ath_hw *ah)
                                        2);
                 break;
         case 1:
-                if (AR_SREV_9485(ah))
+                if (AR_SREV_9485_11(ah))
+                        INIT_INI_ARRAY(&ah->iniModesRxGain,
+                                       ar9485Common_wo_xlna_rx_gain_1_1,
+                                       ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_1),
+                                       2);
+                else if (AR_SREV_9485(ah))
                         INIT_INI_ARRAY(&ah->iniModesRxGain,
                                        ar9485Common_wo_xlna_rx_gain_1_0,
                                        ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_0),
diff --git a/drivers/net/wireless/ath/ath9k/ar9485_initvals.h b/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
index 70de3d89a7b5..eac4d8526fc1 100644
--- a/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
+++ b/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
@@ -940,4 +940,1145 @@ static const u32 ar9485_1_0_mac_core[][2] = {
         {0x000083cc, 0x00000200},
         {0x000083d0, 0x000301ff},
 };
+
+static const u32 ar9485_1_1_mac_core[][2] = {
+        /*  Addr       allmodes */
+        {0x00000008, 0x00000000},
+        {0x00000030, 0x00020085},
+        {0x00000034, 0x00000005},
+        {0x00000040, 0x00000000},
+        {0x00000044, 0x00000000},
+        {0x00000048, 0x00000008},
+        {0x0000004c, 0x00000010},
+        {0x00000050, 0x00000000},
+        {0x00001040, 0x002ffc0f},
+        {0x00001044, 0x002ffc0f},
+        {0x00001048, 0x002ffc0f},
+        {0x0000104c, 0x002ffc0f},
+        {0x00001050, 0x002ffc0f},
+        {0x00001054, 0x002ffc0f},
+        {0x00001058, 0x002ffc0f},
+        {0x0000105c, 0x002ffc0f},
+        {0x00001060, 0x002ffc0f},
+        {0x00001064, 0x002ffc0f},
+        {0x000010f0, 0x00000100},
+        {0x00001270, 0x00000000},
+        {0x000012b0, 0x00000000},
+        {0x000012f0, 0x00000000},
+        {0x0000143c, 0x00000000},
+        {0x0000147c, 0x00000000},
+        {0x00008000, 0x00000000},
+        {0x00008004, 0x00000000},
+        {0x00008008, 0x00000000},
+        {0x0000800c, 0x00000000},
+        {0x00008018, 0x00000000},
+        {0x00008020, 0x00000000},
+        {0x00008038, 0x00000000},
+        {0x0000803c, 0x00000000},
+        {0x00008040, 0x00000000},
+        {0x00008044, 0x00000000},
+        {0x00008048, 0x00000000},
+        {0x0000804c, 0xffffffff},
+        {0x00008054, 0x00000000},
+        {0x00008058, 0x00000000},
+        {0x0000805c, 0x000fc78f},
+        {0x00008060, 0x0000000f},
+        {0x00008064, 0x00000000},
+        {0x00008070, 0x00000310},
+        {0x00008074, 0x00000020},
+        {0x00008078, 0x00000000},
+        {0x0000809c, 0x0000000f},
+        {0x000080a0, 0x00000000},
+        {0x000080a4, 0x02ff0000},
+        {0x000080a8, 0x0e070605},
+        {0x000080ac, 0x0000000d},
+        {0x000080b0, 0x00000000},
+        {0x000080b4, 0x00000000},
+        {0x000080b8, 0x00000000},
+        {0x000080bc, 0x00000000},
+        {0x000080c0, 0x2a800000},
+        {0x000080c4, 0x06900168},
+        {0x000080c8, 0x13881c22},
+        {0x000080cc, 0x01f40000},
+        {0x000080d0, 0x00252500},
+        {0x000080d4, 0x00a00000},
+        {0x000080d8, 0x00400000},
+        {0x000080dc, 0x00000000},
+        {0x000080e0, 0xffffffff},
+        {0x000080e4, 0x0000ffff},
+        {0x000080e8, 0x3f3f3f3f},
+        {0x000080ec, 0x00000000},
+        {0x000080f0, 0x00000000},
+        {0x000080f4, 0x00000000},
+        {0x000080fc, 0x00020000},
+        {0x00008100, 0x00000000},
+        {0x00008108, 0x00000052},
+        {0x0000810c, 0x00000000},
+        {0x00008110, 0x00000000},
+        {0x00008114, 0x000007ff},
+        {0x00008118, 0x000000aa},
+        {0x0000811c, 0x00003210},
+        {0x00008124, 0x00000000},
+        {0x00008128, 0x00000000},
+        {0x0000812c, 0x00000000},
+        {0x00008130, 0x00000000},
+        {0x00008134, 0x00000000},
+        {0x00008138, 0x00000000},
+        {0x0000813c, 0x0000ffff},
+        {0x00008144, 0xffffffff},
+        {0x00008168, 0x00000000},
+        {0x0000816c, 0x00000000},
+        {0x00008170, 0x18486200},
+        {0x00008174, 0x33332210},
+        {0x00008178, 0x00000000},
+        {0x0000817c, 0x00020000},
+        {0x000081c0, 0x00000000},
+        {0x000081c4, 0x33332210},
+        {0x000081d4, 0x00000000},
+        {0x000081ec, 0x00000000},
+        {0x000081f0, 0x00000000},
+        {0x000081f4, 0x00000000},
+        {0x000081f8, 0x00000000},
+        {0x000081fc, 0x00000000},
+        {0x00008240, 0x00100000},
+        {0x00008244, 0x0010f400},
+        {0x00008248, 0x00000800},
+        {0x0000824c, 0x0001e800},
+        {0x00008250, 0x00000000},
+        {0x00008254, 0x00000000},
+        {0x00008258, 0x00000000},
+        {0x0000825c, 0x40000000},
+        {0x00008260, 0x00080922},
+        {0x00008264, 0x9ca00010},
+        {0x00008268, 0xffffffff},
+        {0x0000826c, 0x0000ffff},
+        {0x00008270, 0x00000000},
+        {0x00008274, 0x40000000},
+        {0x00008278, 0x003e4180},
+        {0x0000827c, 0x00000004},
+        {0x00008284, 0x0000002c},
+        {0x00008288, 0x0000002c},
+        {0x0000828c, 0x000000ff},
+        {0x00008294, 0x00000000},
+        {0x00008298, 0x00000000},
+        {0x0000829c, 0x00000000},
+        {0x00008300, 0x00000140},
+        {0x00008314, 0x00000000},
+        {0x0000831c, 0x0000010d},
+        {0x00008328, 0x00000000},
+        {0x0000832c, 0x00000007},
+        {0x00008330, 0x00000302},
+        {0x00008334, 0x00000700},
+        {0x00008338, 0x00ff0000},
+        {0x0000833c, 0x02400000},
+        {0x00008340, 0x000107ff},
+        {0x00008344, 0xa248105b},
+        {0x00008348, 0x008f0000},
+        {0x0000835c, 0x00000000},
+        {0x00008360, 0xffffffff},
+        {0x00008364, 0xffffffff},
+        {0x00008368, 0x00000000},
+        {0x00008370, 0x00000000},
+        {0x00008374, 0x000000ff},
+        {0x00008378, 0x00000000},
+        {0x0000837c, 0x00000000},
+        {0x00008380, 0xffffffff},
+        {0x00008384, 0xffffffff},
+        {0x00008390, 0xffffffff},
+        {0x00008394, 0xffffffff},
+        {0x00008398, 0x00000000},
+        {0x0000839c, 0x00000000},
+        {0x000083a0, 0x00000000},
+        {0x000083a4, 0x0000fa14},
+        {0x000083a8, 0x000f0c00},
+        {0x000083ac, 0x33332210},
+        {0x000083b0, 0x33332210},
+        {0x000083b4, 0x33332210},
+        {0x000083b8, 0x33332210},
+        {0x000083bc, 0x00000000},
+        {0x000083c0, 0x00000000},
+        {0x000083c4, 0x00000000},
+        {0x000083c8, 0x00000000},
+        {0x000083cc, 0x00000200},
+        {0x000083d0, 0x000301ff},
+};
+
+static const u32 ar9485_1_1_baseband_core[][2] = {
+        /* Addr       allmodes */
+        {0x00009800, 0xafe68e30},
+        {0x00009804, 0xfd14e000},
+        {0x00009808, 0x9c0a8f6b},
+        {0x0000980c, 0x04800000},
+        {0x00009814, 0x9280c00a},
+        {0x00009818, 0x00000000},
+        {0x0000981c, 0x00020028},
+        {0x00009834, 0x5f3ca3de},
+        {0x00009838, 0x0108ecff},
+        {0x0000983c, 0x14750600},
+        {0x00009880, 0x201fff00},
+        {0x00009884, 0x00001042},
+        {0x000098a4, 0x00200400},
+        {0x000098b0, 0x52440bbe},
+        {0x000098d0, 0x004b6a8e},
+        {0x000098d4, 0x00000820},
+        {0x000098dc, 0x00000000},
+        {0x000098f0, 0x00000000},
+        {0x000098f4, 0x00000000},
+        {0x00009c04, 0x00000000},
+        {0x00009c08, 0x03200000},
+        {0x00009c0c, 0x00000000},
+        {0x00009c10, 0x00000000},
+        {0x00009c14, 0x00046384},
+        {0x00009c18, 0x05b6b440},
+        {0x00009c1c, 0x00b6b440},
+        {0x00009d00, 0xc080a333},
+        {0x00009d04, 0x40206c10},
+        {0x00009d08, 0x009c4060},
+        {0x00009d0c, 0x1883800a},
+        {0x00009d10, 0x01834061},
+        {0x00009d14, 0x00c00400},
+        {0x00009d18, 0x00000000},
+        {0x00009d1c, 0x00000000},
+        {0x00009e08, 0x0038233c},
+        {0x00009e24, 0x9927b515},
+        {0x00009e28, 0x12ef0200},
+        {0x00009e30, 0x06336f77},
+        {0x00009e34, 0x6af6532f},
+        {0x00009e38, 0x0cc80c00},
+        {0x00009e40, 0x0d261820},
+        {0x00009e4c, 0x00001004},
+        {0x00009e50, 0x00ff03f1},
+        {0x00009fc0, 0x80be4788},
+        {0x00009fc4, 0x0001efb5},
+        {0x00009fcc, 0x40000014},
+        {0x0000a20c, 0x00000000},
+        {0x0000a210, 0x00000000},
+        {0x0000a220, 0x00000000},
+        {0x0000a224, 0x00000000},
+        {0x0000a228, 0x10002310},
+        {0x0000a23c, 0x00000000},
+        {0x0000a244, 0x0c000000},
+        {0x0000a2a0, 0x00000001},
+        {0x0000a2c0, 0x00000001},
+        {0x0000a2c8, 0x00000000},
+        {0x0000a2cc, 0x18c43433},
+        {0x0000a2d4, 0x00000000},
+        {0x0000a2dc, 0x00000000},
+        {0x0000a2e0, 0x00000000},
+        {0x0000a2e4, 0x00000000},
+        {0x0000a2e8, 0x00000000},
+        {0x0000a2ec, 0x00000000},
+        {0x0000a2f0, 0x00000000},
+        {0x0000a2f4, 0x00000000},
+        {0x0000a2f8, 0x00000000},
+        {0x0000a344, 0x00000000},
+        {0x0000a34c, 0x00000000},
+        {0x0000a350, 0x0000a000},
+        {0x0000a364, 0x00000000},
+        {0x0000a370, 0x00000000},
+        {0x0000a390, 0x00000001},
+        {0x0000a394, 0x00000444},
+        {0x0000a398, 0x001f0e0f},
+        {0x0000a39c, 0x0075393f},
+        {0x0000a3a0, 0xb79f6427},
+        {0x0000a3a4, 0x000000ff},
+        {0x0000a3a8, 0x3b3b3b3b},
+        {0x0000a3ac, 0x2f2f2f2f},
+        {0x0000a3c0, 0x20202020},
+        {0x0000a3c4, 0x22222220},
+        {0x0000a3c8, 0x20200020},
+        {0x0000a3cc, 0x20202020},
+        {0x0000a3d0, 0x20202020},
+        {0x0000a3d4, 0x20202020},
+        {0x0000a3d8, 0x20202020},
+        {0x0000a3dc, 0x20202020},
+        {0x0000a3e0, 0x20202020},
+        {0x0000a3e4, 0x20202020},
+        {0x0000a3e8, 0x20202020},
+        {0x0000a3ec, 0x20202020},
+        {0x0000a3f0, 0x00000000},
+        {0x0000a3f4, 0x00000006},
+        {0x0000a3f8, 0x0cdbd380},
+        {0x0000a3fc, 0x000f0f01},
+        {0x0000a400, 0x8fa91f01},
+        {0x0000a404, 0x00000000},
+        {0x0000a408, 0x0e79e5c6},
+        {0x0000a40c, 0x00820820},
+        {0x0000a414, 0x1ce739cf},
+        {0x0000a418, 0x2d0019ce},
+        {0x0000a41c, 0x1ce739ce},
+        {0x0000a420, 0x000001ce},
+        {0x0000a424, 0x1ce739ce},
+        {0x0000a428, 0x000001ce},
+        {0x0000a42c, 0x1ce739ce},
+        {0x0000a430, 0x1ce739ce},
+        {0x0000a434, 0x00000000},
+        {0x0000a438, 0x00001801},
+        {0x0000a43c, 0x00000000},
+        {0x0000a440, 0x00000000},
+        {0x0000a444, 0x00000000},
+        {0x0000a448, 0x04000000},
+        {0x0000a44c, 0x00000001},
+        {0x0000a450, 0x00010000},
+        {0x0000a5c4, 0xbfad9d74},
+        {0x0000a5c8, 0x0048060a},
+        {0x0000a5cc, 0x00000637},
+        {0x0000a760, 0x03020100},
+        {0x0000a764, 0x09080504},
+        {0x0000a768, 0x0d0c0b0a},
+        {0x0000a76c, 0x13121110},
+        {0x0000a770, 0x31301514},
+        {0x0000a774, 0x35343332},
+        {0x0000a778, 0x00000036},
+        {0x0000a780, 0x00000838},
+        {0x0000a7c0, 0x00000000},
+        {0x0000a7c4, 0xfffffffc},
+        {0x0000a7c8, 0x00000000},
+        {0x0000a7cc, 0x00000000},
+        {0x0000a7d0, 0x00000000},
+        {0x0000a7d4, 0x00000004},
+        {0x0000a7dc, 0x00000000},
+};
+
+static const u32 ar9485Common_1_1[][2] = {
+        /*  Addr      allmodes */
+        {0x00007010, 0x00000022},
+        {0x00007020, 0x00000000},
+        {0x00007034, 0x00000002},
+        {0x00007038, 0x000004c2},
+};
+
+static const u32 ar9485_1_1_baseband_postamble[][5] = {
+        /* Addr       5G_HT20        5G_HT40       2G_HT40       2G_HT20 */
+        {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8005, 0xd00a8005},
+        {0x00009820, 0x206a002e, 0x206a002e, 0x206a002e, 0x206a002e},
+        {0x00009824, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0},
+        {0x00009828, 0x06903081, 0x06903081, 0x06903881, 0x06903881},
+        {0x0000982c, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4},
+        {0x00009830, 0x0000059c, 0x0000059c, 0x0000059c, 0x0000059c},
+        {0x00009c00, 0x00000044, 0x00000044, 0x00000044, 0x00000044},
+        {0x00009e00, 0x0372161e, 0x0372161e, 0x037216a0, 0x037216a0},
+        {0x00009e04, 0x00182020, 0x00182020, 0x00182020, 0x00182020},
+        {0x00009e0c, 0x6c4000e2, 0x6d4000e2, 0x6d4000e2, 0x6c4000e2},
+        {0x00009e10, 0x7ec88d2e, 0x7ec88d2e, 0x7ec80d2e, 0x7ec80d2e},
+        {0x00009e14, 0x31395d5e, 0x3139605e, 0x3139605e, 0x31395d5e},
+        {0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c},
+        {0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce},
+        {0x00009e2c, 0x0000001c, 0x0000001c, 0x00000021, 0x00000021},
+        {0x00009e3c, 0xcf946220, 0xcf946220, 0xcf946222, 0xcf946222},
+        {0x00009e44, 0x02321e27, 0x02321e27, 0x02282324, 0x02282324},
+        {0x00009e48, 0x5030201a, 0x5030201a, 0x50302010, 0x50302010},
+        {0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000},
+        {0x0000a204, 0x01303fc0, 0x01303fc4, 0x01303fc4, 0x01303fc0},
+        {0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004},
+        {0x0000a230, 0x0000400a, 0x00004014, 0x00004016, 0x0000400b},
+        {0x0000a234, 0x10000fff, 0x10000fff, 0x10000fff, 0x10000fff},
+        {0x0000a238, 0xffb81018, 0xffb81018, 0xffb81018, 0xffb81018},
+        {0x0000a250, 0x00000000, 0x00000000, 0x00000210, 0x00000108},
+        {0x0000a254, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898},
+        {0x0000a258, 0x02020002, 0x02020002, 0x02020002, 0x02020002},
+        {0x0000a25c, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e},
+        {0x0000a260, 0x3a021501, 0x3a021501, 0x3a021501, 0x3a021501},
+        {0x0000a264, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
+        {0x0000a280, 0x00000007, 0x00000007, 0x0000000b, 0x0000000b},
+        {0x0000a284, 0x00000000, 0x00000000, 0x000002a0, 0x000002a0},
+        {0x0000a288, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000a28c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18},
+        {0x0000a2d0, 0x00071981, 0x00071981, 0x00071982, 0x00071982},
+        {0x0000a2d8, 0xf999a83a, 0xf999a83a, 0xf999a83a, 0xf999a83a},
+        {0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000be04, 0x00802020, 0x00802020, 0x00802020, 0x00802020},
+        {0x0000be18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+};
+
+static const u32 ar9485Modes_high_ob_db_tx_gain_1_1[][5] = {
+        /* Addr        5G_HT20       5G_HT40       2G_HT40       2G_HT20 */
+        {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
+        {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
+        {0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000a500, 0x00022200, 0x00022200, 0x00000000, 0x00000000},
+        {0x0000a504, 0x05062002, 0x05062002, 0x04000002, 0x04000002},
+        {0x0000a508, 0x0c002e00, 0x0c002e00, 0x08000004, 0x08000004},
+        {0x0000a50c, 0x11062202, 0x11062202, 0x0d000200, 0x0d000200},
+        {0x0000a510, 0x17022e00, 0x17022e00, 0x11000202, 0x11000202},
+        {0x0000a514, 0x1d000ec2, 0x1d000ec2, 0x15000400, 0x15000400},
+        {0x0000a518, 0x25020ec0, 0x25020ec0, 0x19000402, 0x19000402},
+        {0x0000a51c, 0x2b020ec3, 0x2b020ec3, 0x1d000404, 0x1d000404},
+        {0x0000a520, 0x2f001f04, 0x2f001f04, 0x21000603, 0x21000603},
+        {0x0000a524, 0x35001fc4, 0x35001fc4, 0x25000605, 0x25000605},
+        {0x0000a528, 0x3c022f04, 0x3c022f04, 0x2a000a03, 0x2a000a03},
+        {0x0000a52c, 0x41023e85, 0x41023e85, 0x2c000a04, 0x2c000a04},
+        {0x0000a530, 0x48023ec6, 0x48023ec6, 0x34000e20, 0x34000e20},
+        {0x0000a534, 0x4d023f01, 0x4d023f01, 0x35000e21, 0x35000e21},
+        {0x0000a538, 0x53023f4b, 0x53023f4b, 0x43000e62, 0x43000e62},
+        {0x0000a53c, 0x5a027f09, 0x5a027f09, 0x45000e63, 0x45000e63},
+        {0x0000a540, 0x5f027fc9, 0x5f027fc9, 0x49000e65, 0x49000e65},
+        {0x0000a544, 0x6502feca, 0x6502feca, 0x4b000e66, 0x4b000e66},
+        {0x0000a548, 0x6b02ff4a, 0x6b02ff4a, 0x4d001645, 0x4d001645},
+        {0x0000a54c, 0x7203feca, 0x7203feca, 0x51001865, 0x51001865},
+        {0x0000a550, 0x7703ff0b, 0x7703ff0b, 0x55001a86, 0x55001a86},
+        {0x0000a554, 0x7d06ffcb, 0x7d06ffcb, 0x57001ce9, 0x57001ce9},
+        {0x0000a558, 0x8407ff0b, 0x8407ff0b, 0x5a001eeb, 0x5a001eeb},
+        {0x0000a55c, 0x8907ffcb, 0x8907ffcb, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a560, 0x900fff0b, 0x900fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a564, 0x960fffcb, 0x960fffcb, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000b500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b504, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b508, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b50c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b510, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b514, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b518, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b51c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b520, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b524, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b528, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b52c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b530, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b534, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b538, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b53c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b540, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b544, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b548, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b54c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b550, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b554, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b558, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b55c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b560, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b564, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b568, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b56c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b570, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b574, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b578, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b57c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x00016044, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db},
+        {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
+};
+
+static const u32 ar9485_modes_lowest_ob_db_tx_gain_1_1[][5] = {
+        /* Addr        5G_HT20       5G_HT40       2G_HT40       2G_HT20  */
+        {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
+        {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
+        {0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000a500, 0x00022200, 0x00022200, 0x00000000, 0x00000000},
+        {0x0000a504, 0x05062002, 0x05062002, 0x04000002, 0x04000002},
+        {0x0000a508, 0x0c002e00, 0x0c002e00, 0x08000004, 0x08000004},
+        {0x0000a50c, 0x11062202, 0x11062202, 0x0d000200, 0x0d000200},
+        {0x0000a510, 0x17022e00, 0x17022e00, 0x11000202, 0x11000202},
+        {0x0000a514, 0x1d000ec2, 0x1d000ec2, 0x15000400, 0x15000400},
+        {0x0000a518, 0x25020ec0, 0x25020ec0, 0x19000402, 0x19000402},
+        {0x0000a51c, 0x2b020ec3, 0x2b020ec3, 0x1d000404, 0x1d000404},
+        {0x0000a520, 0x2f001f04, 0x2f001f04, 0x21000603, 0x21000603},
+        {0x0000a524, 0x35001fc4, 0x35001fc4, 0x25000605, 0x25000605},
+        {0x0000a528, 0x3c022f04, 0x3c022f04, 0x2a000a03, 0x2a000a03},
+        {0x0000a52c, 0x41023e85, 0x41023e85, 0x2c000a04, 0x2c000a04},
+        {0x0000a530, 0x48023ec6, 0x48023ec6, 0x34000e20, 0x34000e20},
+        {0x0000a534, 0x4d023f01, 0x4d023f01, 0x35000e21, 0x35000e21},
+        {0x0000a538, 0x53023f4b, 0x53023f4b, 0x43000e62, 0x43000e62},
+        {0x0000a53c, 0x5a027f09, 0x5a027f09, 0x45000e63, 0x45000e63},
+        {0x0000a540, 0x5f027fc9, 0x5f027fc9, 0x49000e65, 0x49000e65},
+        {0x0000a544, 0x6502feca, 0x6502feca, 0x4b000e66, 0x4b000e66},
+        {0x0000a548, 0x6b02ff4a, 0x6b02ff4a, 0x4d001645, 0x4d001645},
+        {0x0000a54c, 0x7203feca, 0x7203feca, 0x51001865, 0x51001865},
+        {0x0000a550, 0x7703ff0b, 0x7703ff0b, 0x55001a86, 0x55001a86},
+        {0x0000a554, 0x7d06ffcb, 0x7d06ffcb, 0x57001ce9, 0x57001ce9},
+        {0x0000a558, 0x8407ff0b, 0x8407ff0b, 0x5a001eeb, 0x5a001eeb},
+        {0x0000a55c, 0x8907ffcb, 0x8907ffcb, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a560, 0x900fff0b, 0x900fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a564, 0x960fffcb, 0x960fffcb, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000b500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b504, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b508, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b50c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b510, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b514, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b518, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b51c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b520, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b524, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b528, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b52c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b530, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b534, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b538, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b53c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b540, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b544, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b548, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b54c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b550, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b554, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b558, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b55c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b560, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b564, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b568, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b56c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b570, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b574, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b578, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b57c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x00016044, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db},
+        {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
+};
+
+static const u32 ar9485_1_1_radio_postamble[][2] = {
+        /* Addr        allmodes */
+        {0x0001609c, 0x0b283f31},
+        {0x000160ac, 0x24611800},
+        {0x000160b0, 0x03284f3e},
+        {0x0001610c, 0x00170000},
+        {0x00016140, 0x10804008},
+};
+
+static const u32 ar9485_1_1_mac_postamble[][5] = {
+        /* Addr        5G_HT20       5G_HT40       2G_HT40       2G_HT20 */
+        {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
+        {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
+        {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
+        {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
+        {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b},
+        {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
+        {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
+        {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
+};
+
+static const u32 ar9485_1_1_radio_core[][2] = {
+        /* Addr        allmodes */
+        {0x00016000, 0x36db6db6},
+        {0x00016004, 0x6db6db40},
+        {0x00016008, 0x73800000},
+        {0x0001600c, 0x00000000},
+        {0x00016040, 0x7f80fff8},
+        {0x0001604c, 0x000f0278},
+        {0x00016050, 0x4db6db8c},
+        {0x00016054, 0x6db60000},
+        {0x00016080, 0x00080000},
+        {0x00016084, 0x0e48048c},
+        {0x00016088, 0x14214514},
+        {0x0001608c, 0x119f081e},
+        {0x00016090, 0x24926490},
+        {0x00016098, 0xd28b3330},
+        {0x000160a0, 0xc2108ffe},
+        {0x000160a4, 0x812fc370},
+        {0x000160a8, 0x423c8000},
+        {0x000160b4, 0x92480040},
+        {0x000160c0, 0x006db6db},
+        {0x000160c4, 0x0186db60},
+        {0x000160c8, 0x6db6db6c},
+        {0x000160cc, 0x6de6fbe0},
+        {0x000160d0, 0xf7dfcf3c},
+        {0x00016100, 0x04cb0001},
+        {0x00016104, 0xfff80015},
+        {0x00016108, 0x00080010},
+        {0x00016144, 0x01884080},
+        {0x00016148, 0x00008040},
+        {0x00016240, 0x08400000},
+        {0x00016244, 0x1bf90f00},
+        {0x00016248, 0x00000000},
+        {0x0001624c, 0x00000000},
+        {0x00016280, 0x01000015},
+        {0x00016284, 0x00d30000},
+        {0x00016288, 0x00318000},
+        {0x0001628c, 0x50000000},
+        {0x00016290, 0x4b96210f},
+        {0x00016380, 0x00000000},
+        {0x00016384, 0x00000000},
+        {0x00016388, 0x00800700},
+        {0x0001638c, 0x00800700},
+        {0x00016390, 0x00800700},
+        {0x00016394, 0x00000000},
+        {0x00016398, 0x00000000},
+        {0x0001639c, 0x00000000},
+        {0x000163a0, 0x00000001},
+        {0x000163a4, 0x00000001},
+        {0x000163a8, 0x00000000},
+        {0x000163ac, 0x00000000},
+        {0x000163b0, 0x00000000},
+        {0x000163b4, 0x00000000},
+        {0x000163b8, 0x00000000},
+        {0x000163bc, 0x00000000},
+        {0x000163c0, 0x000000a0},
+        {0x000163c4, 0x000c0000},
+        {0x000163c8, 0x14021402},
+        {0x000163cc, 0x00001402},
+        {0x000163d0, 0x00000000},
+        {0x000163d4, 0x00000000},
+        {0x00016c40, 0x13188278},
+        {0x00016c44, 0x12000000},
+};
+
+static const u32 ar9485_1_1_pcie_phy_pll_on_clkreq_enable_L1[][2] = {
+        /* Addr        allmodes */
+        {0x00018c00, 0x10052e5e},
+        {0x00018c04, 0x000801d8},
+        {0x00018c08, 0x0000080c},
+};
+
+static const u32 ar9485Modes_high_power_tx_gain_1_1[][5] = {
+        /* Addr        5G_HT20       5G_HT40       2G_HT40       2G_HT20 */
+        {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
+        {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
+        {0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000a500, 0x00022200, 0x00022200, 0x00000000, 0x00000000},
+        {0x0000a504, 0x05062002, 0x05062002, 0x04000002, 0x04000002},
+        {0x0000a508, 0x0c002e00, 0x0c002e00, 0x08000004, 0x08000004},
+        {0x0000a50c, 0x11062202, 0x11062202, 0x0d000200, 0x0d000200},
+        {0x0000a510, 0x17022e00, 0x17022e00, 0x11000202, 0x11000202},
+        {0x0000a514, 0x1d000ec2, 0x1d000ec2, 0x15000400, 0x15000400},
+        {0x0000a518, 0x25020ec0, 0x25020ec0, 0x19000402, 0x19000402},
+        {0x0000a51c, 0x2b020ec3, 0x2b020ec3, 0x1d000404, 0x1d000404},
+        {0x0000a520, 0x2f001f04, 0x2f001f04, 0x21000603, 0x21000603},
+        {0x0000a524, 0x35001fc4, 0x35001fc4, 0x25000605, 0x25000605},
+        {0x0000a528, 0x3c022f04, 0x3c022f04, 0x2a000a03, 0x2a000a03},
+        {0x0000a52c, 0x41023e85, 0x41023e85, 0x2c000a04, 0x2c000a04},
+        {0x0000a530, 0x48023ec6, 0x48023ec6, 0x34000e20, 0x34000e20},
+        {0x0000a534, 0x4d023f01, 0x4d023f01, 0x35000e21, 0x35000e21},
+        {0x0000a538, 0x53023f4b, 0x53023f4b, 0x43000e62, 0x43000e62},
+        {0x0000a53c, 0x5a027f09, 0x5a027f09, 0x45000e63, 0x45000e63},
+        {0x0000a540, 0x5f027fc9, 0x5f027fc9, 0x49000e65, 0x49000e65},
+        {0x0000a544, 0x6502feca, 0x6502feca, 0x4b000e66, 0x4b000e66},
+        {0x0000a548, 0x6b02ff4a, 0x6b02ff4a, 0x4d001645, 0x4d001645},
+        {0x0000a54c, 0x7203feca, 0x7203feca, 0x51001865, 0x51001865},
+        {0x0000a550, 0x7703ff0b, 0x7703ff0b, 0x55001a86, 0x55001a86},
+        {0x0000a554, 0x7d06ffcb, 0x7d06ffcb, 0x57001ce9, 0x57001ce9},
+        {0x0000a558, 0x8407ff0b, 0x8407ff0b, 0x5a001eeb, 0x5a001eeb},
+        {0x0000a55c, 0x8907ffcb, 0x8907ffcb, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a560, 0x900fff0b, 0x900fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a564, 0x960fffcb, 0x960fffcb, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000b500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b504, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b508, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b50c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b510, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b514, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b518, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b51c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b520, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b524, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b528, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b52c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b530, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b534, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b538, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b53c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b540, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b544, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b548, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b54c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b550, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b554, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b558, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b55c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b560, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b564, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b568, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b56c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b570, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b574, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b578, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b57c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x00016044, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db},
+        {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
+};
+
+static const u32 ar9485_1_1[][2] = {
+        /* Addr        allmodes */
+        {0x0000a580, 0x00000000},
+        {0x0000a584, 0x00000000},
+        {0x0000a588, 0x00000000},
+        {0x0000a58c, 0x00000000},
+        {0x0000a590, 0x00000000},
+        {0x0000a594, 0x00000000},
+        {0x0000a598, 0x00000000},
+        {0x0000a59c, 0x00000000},
+        {0x0000a5a0, 0x00000000},
+        {0x0000a5a4, 0x00000000},
+        {0x0000a5a8, 0x00000000},
+        {0x0000a5ac, 0x00000000},
+        {0x0000a5b0, 0x00000000},
+        {0x0000a5b4, 0x00000000},
+        {0x0000a5b8, 0x00000000},
+        {0x0000a5bc, 0x00000000},
+};
+
+static const u32 ar9485_modes_green_ob_db_tx_gain_1_1[][5] = {
+        /* Addr        5G_HT20       5G_HT40       2G_HT40       2G_HT20 */
+        {0x000098bc, 0x00000003, 0x00000003, 0x00000003, 0x00000003},
+        {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
+        {0x0000a458, 0x80000000, 0x80000000, 0x80000000, 0x80000000},
+        {0x0000a500, 0x00022200, 0x00022200, 0x00000006, 0x00000006},
+        {0x0000a504, 0x05062002, 0x05062002, 0x03000201, 0x03000201},
+        {0x0000a508, 0x0c002e00, 0x0c002e00, 0x06000203, 0x06000203},
+        {0x0000a50c, 0x11062202, 0x11062202, 0x0a000401, 0x0a000401},
+        {0x0000a510, 0x17022e00, 0x17022e00, 0x0e000403, 0x0e000403},
+        {0x0000a514, 0x1d000ec2, 0x1d000ec2, 0x12000405, 0x12000405},
+        {0x0000a518, 0x25020ec0, 0x25020ec0, 0x15000604, 0x15000604},
+        {0x0000a51c, 0x2b020ec3, 0x2b020ec3, 0x18000605, 0x18000605},
+        {0x0000a520, 0x2f001f04, 0x2f001f04, 0x1c000a04, 0x1c000a04},
+        {0x0000a524, 0x35001fc4, 0x35001fc4, 0x21000a06, 0x21000a06},
+        {0x0000a528, 0x3c022f04, 0x3c022f04, 0x29000a24, 0x29000a24},
+        {0x0000a52c, 0x41023e85, 0x41023e85, 0x2f000e21, 0x2f000e21},
+        {0x0000a530, 0x48023ec6, 0x48023ec6, 0x31000e20, 0x31000e20},
+        {0x0000a534, 0x4d023f01, 0x4d023f01, 0x33000e20, 0x33000e20},
+        {0x0000a538, 0x53023f4b, 0x53023f4b, 0x43000e62, 0x43000e62},
+        {0x0000a53c, 0x5a027f09, 0x5a027f09, 0x45000e63, 0x45000e63},
+        {0x0000a540, 0x5f027fc9, 0x5f027fc9, 0x49000e65, 0x49000e65},
+        {0x0000a544, 0x6502feca, 0x6502feca, 0x4b000e66, 0x4b000e66},
+        {0x0000a548, 0x6b02ff4a, 0x6b02ff4a, 0x4d001645, 0x4d001645},
+        {0x0000a54c, 0x7203feca, 0x7203feca, 0x51001865, 0x51001865},
+        {0x0000a550, 0x7703ff0b, 0x7703ff0b, 0x55001a86, 0x55001a86},
+        {0x0000a554, 0x7d06ffcb, 0x7d06ffcb, 0x57001ce9, 0x57001ce9},
+        {0x0000a558, 0x8407ff0b, 0x8407ff0b, 0x5a001eeb, 0x5a001eeb},
+        {0x0000a55c, 0x8907ffcb, 0x8907ffcb, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a560, 0x900fff0b, 0x900fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a564, 0x960fffcb, 0x960fffcb, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000b500, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+        {0x0000b504, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+        {0x0000b508, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+        {0x0000b50c, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+        {0x0000b510, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+        {0x0000b514, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+        {0x0000b518, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+        {0x0000b51c, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+        {0x0000b520, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+        {0x0000b524, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+        {0x0000b528, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+        {0x0000b52c, 0x0000002a, 0x0000002a, 0x0000002a, 0x0000002a},
+        {0x0000b530, 0x0000003a, 0x0000003a, 0x0000003a, 0x0000003a},
+        {0x0000b534, 0x0000004a, 0x0000004a, 0x0000004a, 0x0000004a},
+        {0x0000b538, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b53c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b540, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b544, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b548, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b54c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b550, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b554, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b558, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b55c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b560, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b564, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b568, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b56c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b570, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b574, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b578, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b57c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x00016044, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db},
+        {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
+};
+
+static const u32 ar9485_1_1_pcie_phy_clkreq_disable_L1[][2] = {
+        /* Addr        allmodes */
+        {0x00018c00, 0x10013e5e},
+        {0x00018c04, 0x000801d8},
+        {0x00018c08, 0x0000080c},
+};
+
+static const u32 ar9485_1_1_soc_preamble[][2] = {
+        /* Addr        allmodes */
+        {0x00004014, 0xba280400},
+        {0x000040a4, 0x00a0c9c9},
+        {0x00007010, 0x00000022},
+        {0x00007020, 0x00000000},
+        {0x00007034, 0x00000002},
+        {0x00007038, 0x000004c2},
+        {0x00007048, 0x00000002},
+};
+
+static const u32 ar9485_1_1_baseband_core_txfir_coeff_japan_2484[][2] = {
+        /* Addr        allmodes */
+        {0x0000a398, 0x00000000},
+        {0x0000a39c, 0x6f7f0301},
+        {0x0000a3a0, 0xca9228ee},
+};
+
+static const u32 ar9485Modes_low_ob_db_tx_gain_1_1[][5] = {
+        /* Addr        5G_HT20       5G_HT40       2G_HT40       2G_HT20  */
+        {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
+        {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
+        {0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000a500, 0x00022200, 0x00022200, 0x00000000, 0x00000000},
+        {0x0000a504, 0x05062002, 0x05062002, 0x04000002, 0x04000002},
+        {0x0000a508, 0x0c002e00, 0x0c002e00, 0x08000004, 0x08000004},
+        {0x0000a50c, 0x11062202, 0x11062202, 0x0d000200, 0x0d000200},
+        {0x0000a510, 0x17022e00, 0x17022e00, 0x11000202, 0x11000202},
+        {0x0000a514, 0x1d000ec2, 0x1d000ec2, 0x15000400, 0x15000400},
+        {0x0000a518, 0x25020ec0, 0x25020ec0, 0x19000402, 0x19000402},
+        {0x0000a51c, 0x2b020ec3, 0x2b020ec3, 0x1d000404, 0x1d000404},
+        {0x0000a520, 0x2f001f04, 0x2f001f04, 0x21000603, 0x21000603},
+        {0x0000a524, 0x35001fc4, 0x35001fc4, 0x25000605, 0x25000605},
+        {0x0000a528, 0x3c022f04, 0x3c022f04, 0x2a000a03, 0x2a000a03},
+        {0x0000a52c, 0x41023e85, 0x41023e85, 0x2c000a04, 0x2c000a04},
+        {0x0000a530, 0x48023ec6, 0x48023ec6, 0x34000e20, 0x34000e20},
+        {0x0000a534, 0x4d023f01, 0x4d023f01, 0x35000e21, 0x35000e21},
+        {0x0000a538, 0x53023f4b, 0x53023f4b, 0x43000e62, 0x43000e62},
+        {0x0000a53c, 0x5a027f09, 0x5a027f09, 0x45000e63, 0x45000e63},
+        {0x0000a540, 0x5f027fc9, 0x5f027fc9, 0x49000e65, 0x49000e65},
+        {0x0000a544, 0x6502feca, 0x6502feca, 0x4b000e66, 0x4b000e66},
+        {0x0000a548, 0x6b02ff4a, 0x6b02ff4a, 0x4d001645, 0x4d001645},
+        {0x0000a54c, 0x7203feca, 0x7203feca, 0x51001865, 0x51001865},
+        {0x0000a550, 0x7703ff0b, 0x7703ff0b, 0x55001a86, 0x55001a86},
+        {0x0000a554, 0x7d06ffcb, 0x7d06ffcb, 0x57001ce9, 0x57001ce9},
+        {0x0000a558, 0x8407ff0b, 0x8407ff0b, 0x5a001eeb, 0x5a001eeb},
+        {0x0000a55c, 0x8907ffcb, 0x8907ffcb, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a560, 0x900fff0b, 0x900fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a564, 0x960fffcb, 0x960fffcb, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000b500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b504, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b508, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b50c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b510, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b514, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b518, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b51c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b520, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b524, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b528, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b52c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b530, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b534, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b538, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b53c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b540, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b544, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b548, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b54c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b550, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b554, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b558, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b55c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b560, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b564, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b568, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b56c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b570, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b574, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b578, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000b57c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x00016044, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db},
+        {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
+};
+
+static const u32 ar9485_fast_clock_1_1_baseband_postamble[][3] = {
+        /* Addr        5G_HT2        5G_HT40  */
+        {0x00009e00, 0x03721821, 0x03721821},
+        {0x0000a230, 0x0000400b, 0x00004016},
+        {0x0000a254, 0x00000898, 0x00001130},
+};
+
+static const u32 ar9485_1_1_pcie_phy_pll_on_clkreq_disable_L1[][2] = {
+        /* Addr        allmodes  */
+        {0x00018c00, 0x10012e5e},
+        {0x00018c04, 0x000801d8},
+        {0x00018c08, 0x0000080c},
+};
+
+static const u32 ar9485_common_rx_gain_1_1[][2] = {
+        /* Addr        allmodes */
+        {0x0000a000, 0x00010000},
+        {0x0000a004, 0x00030002},
+        {0x0000a008, 0x00050004},
+        {0x0000a00c, 0x00810080},
+        {0x0000a010, 0x01800082},
+        {0x0000a014, 0x01820181},
+        {0x0000a018, 0x01840183},
+        {0x0000a01c, 0x01880185},
+        {0x0000a020, 0x018a0189},
+        {0x0000a024, 0x02850284},
+        {0x0000a028, 0x02890288},
+        {0x0000a02c, 0x03850384},
+        {0x0000a030, 0x03890388},
+        {0x0000a034, 0x038b038a},
+        {0x0000a038, 0x038d038c},
+        {0x0000a03c, 0x03910390},
+        {0x0000a040, 0x03930392},
+        {0x0000a044, 0x03950394},
+        {0x0000a048, 0x00000396},
+        {0x0000a04c, 0x00000000},
+        {0x0000a050, 0x00000000},
+        {0x0000a054, 0x00000000},
+        {0x0000a058, 0x00000000},
+        {0x0000a05c, 0x00000000},
+        {0x0000a060, 0x00000000},
+        {0x0000a064, 0x00000000},
+        {0x0000a068, 0x00000000},
+        {0x0000a06c, 0x00000000},
+        {0x0000a070, 0x00000000},
+        {0x0000a074, 0x00000000},
+        {0x0000a078, 0x00000000},
+        {0x0000a07c, 0x00000000},
+        {0x0000a080, 0x28282828},
+        {0x0000a084, 0x28282828},
+        {0x0000a088, 0x28282828},
+        {0x0000a08c, 0x28282828},
+        {0x0000a090, 0x28282828},
+        {0x0000a094, 0x21212128},
+        {0x0000a098, 0x171c1c1c},
+        {0x0000a09c, 0x02020212},
+        {0x0000a0a0, 0x00000202},
+        {0x0000a0a4, 0x00000000},
+        {0x0000a0a8, 0x00000000},
+        {0x0000a0ac, 0x00000000},
+        {0x0000a0b0, 0x00000000},
+        {0x0000a0b4, 0x00000000},
+        {0x0000a0b8, 0x00000000},
+        {0x0000a0bc, 0x00000000},
+        {0x0000a0c0, 0x001f0000},
+        {0x0000a0c4, 0x111f1100},
+        {0x0000a0c8, 0x111d111e},
+        {0x0000a0cc, 0x111b111c},
+        {0x0000a0d0, 0x22032204},
+        {0x0000a0d4, 0x22012202},
+        {0x0000a0d8, 0x221f2200},
+        {0x0000a0dc, 0x221d221e},
+        {0x0000a0e0, 0x33013302},
+        {0x0000a0e4, 0x331f3300},
+        {0x0000a0e8, 0x4402331e},
+        {0x0000a0ec, 0x44004401},
+        {0x0000a0f0, 0x441e441f},
+        {0x0000a0f4, 0x55015502},
+        {0x0000a0f8, 0x551f5500},
+        {0x0000a0fc, 0x6602551e},
+        {0x0000a100, 0x66006601},
+        {0x0000a104, 0x661e661f},
+        {0x0000a108, 0x7703661d},
+        {0x0000a10c, 0x77017702},
+        {0x0000a110, 0x00007700},
+        {0x0000a114, 0x00000000},
+        {0x0000a118, 0x00000000},
+        {0x0000a11c, 0x00000000},
+        {0x0000a120, 0x00000000},
+        {0x0000a124, 0x00000000},
+        {0x0000a128, 0x00000000},
+        {0x0000a12c, 0x00000000},
+        {0x0000a130, 0x00000000},
+        {0x0000a134, 0x00000000},
+        {0x0000a138, 0x00000000},
+        {0x0000a13c, 0x00000000},
+        {0x0000a140, 0x001f0000},
+        {0x0000a144, 0x111f1100},
+        {0x0000a148, 0x111d111e},
+        {0x0000a14c, 0x111b111c},
+        {0x0000a150, 0x22032204},
+        {0x0000a154, 0x22012202},
+        {0x0000a158, 0x221f2200},
+        {0x0000a15c, 0x221d221e},
+        {0x0000a160, 0x33013302},
+        {0x0000a164, 0x331f3300},
+        {0x0000a168, 0x4402331e},
+        {0x0000a16c, 0x44004401},
+        {0x0000a170, 0x441e441f},
+        {0x0000a174, 0x55015502},
+        {0x0000a178, 0x551f5500},
+        {0x0000a17c, 0x6602551e},
+        {0x0000a180, 0x66006601},
+        {0x0000a184, 0x661e661f},
+        {0x0000a188, 0x7703661d},
+        {0x0000a18c, 0x77017702},
+        {0x0000a190, 0x00007700},
+        {0x0000a194, 0x00000000},
+        {0x0000a198, 0x00000000},
+        {0x0000a19c, 0x00000000},
+        {0x0000a1a0, 0x00000000},
+        {0x0000a1a4, 0x00000000},
+        {0x0000a1a8, 0x00000000},
+        {0x0000a1ac, 0x00000000},
+        {0x0000a1b0, 0x00000000},
+        {0x0000a1b4, 0x00000000},
+        {0x0000a1b8, 0x00000000},
+        {0x0000a1bc, 0x00000000},
+        {0x0000a1c0, 0x00000000},
+        {0x0000a1c4, 0x00000000},
+        {0x0000a1c8, 0x00000000},
+        {0x0000a1cc, 0x00000000},
+        {0x0000a1d0, 0x00000000},
+        {0x0000a1d4, 0x00000000},
+        {0x0000a1d8, 0x00000000},
+        {0x0000a1dc, 0x00000000},
+        {0x0000a1e0, 0x00000000},
+        {0x0000a1e4, 0x00000000},
+        {0x0000a1e8, 0x00000000},
+        {0x0000a1ec, 0x00000000},
+        {0x0000a1f0, 0x00000396},
+        {0x0000a1f4, 0x00000396},
+        {0x0000a1f8, 0x00000396},
+        {0x0000a1fc, 0x00000296},
+};
+
+static const u32 ar9485_1_1_pcie_phy_clkreq_enable_L1[][2] = {
+        /* Addr        allmodes */
+        {0x00018c00, 0x10053e5e},
+        {0x00018c04, 0x000801d8},
+        {0x00018c08, 0x0000080c},
+};
+
+static const u32 ar9485Common_wo_xlna_rx_gain_1_1[][2] = {
+        /* Addr        allmodes */
+        {0x0000a000, 0x00060005},
+        {0x0000a004, 0x00810080},
+        {0x0000a008, 0x00830082},
+        {0x0000a00c, 0x00850084},
+        {0x0000a010, 0x01820181},
+        {0x0000a014, 0x01840183},
+        {0x0000a018, 0x01880185},
+        {0x0000a01c, 0x018a0189},
+        {0x0000a020, 0x02850284},
+        {0x0000a024, 0x02890288},
+        {0x0000a028, 0x028b028a},
+        {0x0000a02c, 0x03850384},
+        {0x0000a030, 0x03890388},
+        {0x0000a034, 0x038b038a},
+        {0x0000a038, 0x038d038c},
+        {0x0000a03c, 0x03910390},
+        {0x0000a040, 0x03930392},
+        {0x0000a044, 0x03950394},
+        {0x0000a048, 0x00000396},
+        {0x0000a04c, 0x00000000},
+        {0x0000a050, 0x00000000},
+        {0x0000a054, 0x00000000},
+        {0x0000a058, 0x00000000},
+        {0x0000a05c, 0x00000000},
+        {0x0000a060, 0x00000000},
+        {0x0000a064, 0x00000000},
+        {0x0000a068, 0x00000000},
+        {0x0000a06c, 0x00000000},
+        {0x0000a070, 0x00000000},
+        {0x0000a074, 0x00000000},
+        {0x0000a078, 0x00000000},
+        {0x0000a07c, 0x00000000},
+        {0x0000a080, 0x28282828},
+        {0x0000a084, 0x28282828},
+        {0x0000a088, 0x28282828},
+        {0x0000a08c, 0x28282828},
+        {0x0000a090, 0x28282828},
+        {0x0000a094, 0x24242428},
+        {0x0000a098, 0x171e1e1e},
+        {0x0000a09c, 0x02020b0b},
+        {0x0000a0a0, 0x02020202},
+        {0x0000a0a4, 0x00000000},
+        {0x0000a0a8, 0x00000000},
+        {0x0000a0ac, 0x00000000},
+        {0x0000a0b0, 0x00000000},
+        {0x0000a0b4, 0x00000000},
+        {0x0000a0b8, 0x00000000},
+        {0x0000a0bc, 0x00000000},
+        {0x0000a0c0, 0x22072208},
+        {0x0000a0c4, 0x22052206},
+        {0x0000a0c8, 0x22032204},
+        {0x0000a0cc, 0x22012202},
+        {0x0000a0d0, 0x221f2200},
+        {0x0000a0d4, 0x221d221e},
+        {0x0000a0d8, 0x33023303},
+        {0x0000a0dc, 0x33003301},
+        {0x0000a0e0, 0x331e331f},
+        {0x0000a0e4, 0x4402331d},
+        {0x0000a0e8, 0x44004401},
+        {0x0000a0ec, 0x441e441f},
+        {0x0000a0f0, 0x55025503},
+        {0x0000a0f4, 0x55005501},
+        {0x0000a0f8, 0x551e551f},
+        {0x0000a0fc, 0x6602551d},
+        {0x0000a100, 0x66006601},
+        {0x0000a104, 0x661e661f},
+        {0x0000a108, 0x7703661d},
+        {0x0000a10c, 0x77017702},
+        {0x0000a110, 0x00007700},
+        {0x0000a114, 0x00000000},
+        {0x0000a118, 0x00000000},
+        {0x0000a11c, 0x00000000},
+        {0x0000a120, 0x00000000},
+        {0x0000a124, 0x00000000},
+        {0x0000a128, 0x00000000},
+        {0x0000a12c, 0x00000000},
+        {0x0000a130, 0x00000000},
+        {0x0000a134, 0x00000000},
+        {0x0000a138, 0x00000000},
+        {0x0000a13c, 0x00000000},
+        {0x0000a140, 0x001f0000},
+        {0x0000a144, 0x111f1100},
+        {0x0000a148, 0x111d111e},
+        {0x0000a14c, 0x111b111c},
+        {0x0000a150, 0x22032204},
+        {0x0000a154, 0x22012202},
+        {0x0000a158, 0x221f2200},
+        {0x0000a15c, 0x221d221e},
+        {0x0000a160, 0x33013302},
+        {0x0000a164, 0x331f3300},
+        {0x0000a168, 0x4402331e},
+        {0x0000a16c, 0x44004401},
+        {0x0000a170, 0x441e441f},
+        {0x0000a174, 0x55015502},
+        {0x0000a178, 0x551f5500},
+        {0x0000a17c, 0x6602551e},
+        {0x0000a180, 0x66006601},
+        {0x0000a184, 0x661e661f},
+        {0x0000a188, 0x7703661d},
+        {0x0000a18c, 0x77017702},
+        {0x0000a190, 0x00007700},
+        {0x0000a194, 0x00000000},
+        {0x0000a198, 0x00000000},
+        {0x0000a19c, 0x00000000},
+        {0x0000a1a0, 0x00000000},
+        {0x0000a1a4, 0x00000000},
+        {0x0000a1a8, 0x00000000},
+        {0x0000a1ac, 0x00000000},
+        {0x0000a1b0, 0x00000000},
+        {0x0000a1b4, 0x00000000},
+        {0x0000a1b8, 0x00000000},
+        {0x0000a1bc, 0x00000000},
+        {0x0000a1c0, 0x00000000},
+        {0x0000a1c4, 0x00000000},
+        {0x0000a1c8, 0x00000000},
+        {0x0000a1cc, 0x00000000},
+        {0x0000a1d0, 0x00000000},
+        {0x0000a1d4, 0x00000000},
+        {0x0000a1d8, 0x00000000},
+        {0x0000a1dc, 0x00000000},
+        {0x0000a1e0, 0x00000000},
+        {0x0000a1e4, 0x00000000},
+        {0x0000a1e8, 0x00000000},
+        {0x0000a1ec, 0x00000000},
+        {0x0000a1f0, 0x00000396},
+        {0x0000a1f4, 0x00000396},
+        {0x0000a1f8, 0x00000396},
+        {0x0000a1fc, 0x00000296},
+};
+
 #endif
diff --git a/drivers/net/wireless/ath/ath9k/ath9k.h b/drivers/net/wireless/ath/ath9k/ath9k.h
index 9272278aff5e..f9f0389b92ab 100644
--- a/drivers/net/wireless/ath/ath9k/ath9k.h
+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
@@ -21,7 +21,6 @@
 #include <linux/device.h>
 #include <linux/leds.h>
 #include <linux/completion.h>
-#include <linux/pm_qos_params.h>
 
 #include "debug.h"
 #include "common.h"
@@ -57,8 +56,6 @@ struct ath_node;
 
 #define A_MAX(a, b) ((a) > (b) ? (a) : (b))
 
-#define ATH9K_PM_QOS_DEFAULT_VALUE      55
-
 #define TSF_TO_TU(_h,_l) \
         ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
 
@@ -192,6 +189,7 @@ struct ath_txq {
         u32 axq_ampdu_depth;
         bool stopped;
         bool axq_tx_inprogress;
+        bool txq_flush_inprogress;
         struct list_head axq_acq;
         struct list_head txq_fifo[ATH_TXFIFO_DEPTH];
         struct list_head txq_fifo_pending;
@@ -349,6 +347,7 @@ void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid
 
 struct ath_vif {
         int av_bslot;
+        bool is_bslot_active;
         __le64 tsf_adjust; /* TSF adjustment for staggered beacons */
         enum nl80211_iftype av_opmode;
         struct ath_buf *av_bcbuf;
@@ -371,7 +370,7 @@ struct ath_vif {
 #define IEEE80211_MS_TO_TU(x)           (((x) * 1000) / 1024)
 
 struct ath_beacon_config {
-        u16 beacon_interval;
+        int beacon_interval;
         u16 listen_interval;
         u16 dtim_period;
         u16 bmiss_timeout;
@@ -403,6 +402,7 @@ void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif);
 int ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_vif *vif);
 void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp);
 int ath_beaconq_config(struct ath_softc *sc);
+void ath9k_set_beaconing_status(struct ath_softc *sc, bool status);
 
 /*******/
 /* ANI */
@@ -633,8 +633,6 @@ struct ath_softc {
         struct ath9k_hw_cal_data caldata;
         int last_rssi;
 
-        int beacon_interval;
-
 #ifdef CONFIG_ATH9K_DEBUGFS
         struct ath9k_debug debug;
         spinlock_t nodes_lock;
@@ -649,8 +647,6 @@ struct ath_softc {
         struct ath_descdma txsdma;
 
         struct ath_ant_comb ant_comb;
-
-        struct pm_qos_request_list pm_qos_req;
 };
 
 void ath9k_tasklet(unsigned long data);
@@ -665,7 +661,6 @@ static inline void ath_read_cachesize(struct ath_common *common, int *csz)
 extern struct ieee80211_ops ath9k_ops;
 extern int ath9k_modparam_nohwcrypt;
 extern int led_blink;
-extern int ath9k_pm_qos_value;
 extern bool is_ath9k_unloaded;
 
 irqreturn_t ath_isr(int irq, void *dev);
diff --git a/drivers/net/wireless/ath/ath9k/beacon.c b/drivers/net/wireless/ath/ath9k/beacon.c
index fcb36abfc309..a4bdfdb043ef 100644
--- a/drivers/net/wireless/ath/ath9k/beacon.c
+++ b/drivers/net/wireless/ath/ath9k/beacon.c
@@ -143,7 +143,7 @@ static struct ath_buf *ath_beacon_generate(struct ieee80211_hw *hw,
         avp = (void *)vif->drv_priv;
         cabq = sc->beacon.cabq;
 
-        if (avp->av_bcbuf == NULL)
+        if ((avp->av_bcbuf == NULL) || !avp->is_bslot_active)
                 return NULL;
 
         /* Release the old beacon first */
@@ -226,6 +226,7 @@ int ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_vif *vif)
         struct ath_vif *avp;
         struct ath_buf *bf;
         struct sk_buff *skb;
+        struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
         __le64 tstamp;
 
         avp = (void *)vif->drv_priv;
@@ -248,6 +249,7 @@ int ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_vif *vif)
                         for (slot = 0; slot < ATH_BCBUF; slot++)
                                 if (sc->beacon.bslot[slot] == NULL) {
                                         avp->av_bslot = slot;
+                                        avp->is_bslot_active = false;
 
                                         /* NB: keep looking for a double slot */
                                         if (slot == 0 || !sc->beacon.bslot[slot-1])
@@ -282,7 +284,7 @@ int ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_vif *vif)
                 u64 tsfadjust;
                 int intval;
 
-                intval = sc->beacon_interval ? : ATH_DEFAULT_BINTVAL;
+                intval = cur_conf->beacon_interval ? : ATH_DEFAULT_BINTVAL;
 
                 /*
                  * Calculate the TSF offset for this beacon slot, i.e., the
@@ -314,6 +316,7 @@ int ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_vif *vif)
                 ath_err(common, "dma_mapping_error on beacon alloc\n");
                 return -ENOMEM;
         }
+        avp->is_bslot_active = true;
 
         return 0;
 }
@@ -346,6 +349,7 @@ void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp)
 void ath_beacon_tasklet(unsigned long data)
 {
         struct ath_softc *sc = (struct ath_softc *)data;
+        struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
         struct ath_hw *ah = sc->sc_ah;
         struct ath_common *common = ath9k_hw_common(ah);
         struct ath_buf *bf = NULL;
@@ -393,7 +397,7 @@ void ath_beacon_tasklet(unsigned long data)
          * on the tsf to safeguard against missing an swba.
          */
 
-        intval = sc->beacon_interval ? : ATH_DEFAULT_BINTVAL;
+        intval = cur_conf->beacon_interval ? : ATH_DEFAULT_BINTVAL;
 
         tsf = ath9k_hw_gettsf64(ah);
         tsftu = TSF_TO_TU(tsf>>32, tsf);
@@ -747,3 +751,36 @@ void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif)
 
         sc->sc_flags |= SC_OP_BEACONS;
 }
+
+void ath9k_set_beaconing_status(struct ath_softc *sc, bool status)
+{
+        struct ath_hw *ah = sc->sc_ah;
+        struct ath_vif *avp;
+        int slot;
+        bool found = false;
+
+        ath9k_ps_wakeup(sc);
+        if (status) {
+                for (slot = 0; slot < ATH_BCBUF; slot++) {
+                        if (sc->beacon.bslot[slot]) {
+                                avp = (void *)sc->beacon.bslot[slot]->drv_priv;
+                                if (avp->is_bslot_active) {
+                                        found = true;
+                                        break;
+                                }
+                        }
+                }
+                if (found) {
+                        /* Re-enable beaconing */
+                        ah->imask |= ATH9K_INT_SWBA;
+                        ath9k_hw_set_interrupts(ah, ah->imask);
+                }
+        } else {
+                /* Disable SWBA interrupt */
+                ah->imask &= ~ATH9K_INT_SWBA;
+                ath9k_hw_set_interrupts(ah, ah->imask);
+                tasklet_kill(&sc->bcon_tasklet);
+                ath9k_hw_stoptxdma(ah, sc->beacon.beaconq);
+        }
+        ath9k_ps_restore(sc);
+}
diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_main.c b/drivers/net/wireless/ath/ath9k/htc_drv_main.c
index 953036a4ed53..50fde0e10595 100644
--- a/drivers/net/wireless/ath/ath9k/htc_drv_main.c
+++ b/drivers/net/wireless/ath/ath9k/htc_drv_main.c
@@ -169,7 +169,7 @@ static int ath9k_htc_set_channel(struct ath9k_htc_priv *priv,
         struct ieee80211_conf *conf = &common->hw->conf;
         bool fastcc;
         struct ieee80211_channel *channel = hw->conf.channel;
-        struct ath9k_hw_cal_data *caldata;
+        struct ath9k_hw_cal_data *caldata = NULL;
         enum htc_phymode mode;
         __be16 htc_mode;
         u8 cmd_rsp;
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index f9cf81551817..9a3438174f86 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -1100,7 +1100,6 @@ static bool ath9k_hw_set_reset_power_on(struct ath_hw *ah)
                 REG_WRITE(ah, AR_RC, AR_RC_AHB);
 
         REG_WRITE(ah, AR_RTC_RESET, 0);
-        udelay(2);
 
         REGWRITE_BUFFER_FLUSH(ah);
 
diff --git a/drivers/net/wireless/ath/ath9k/init.c b/drivers/net/wireless/ath/ath9k/init.c
index e5c1eead98a2..f66c882a39e2 100644
--- a/drivers/net/wireless/ath/ath9k/init.c
+++ b/drivers/net/wireless/ath/ath9k/init.c
@@ -41,10 +41,6 @@ static int ath9k_btcoex_enable;
 module_param_named(btcoex_enable, ath9k_btcoex_enable, int, 0444);
 MODULE_PARM_DESC(btcoex_enable, "Enable wifi-BT coexistence");
 
-int ath9k_pm_qos_value = ATH9K_PM_QOS_DEFAULT_VALUE;
-module_param_named(pmqos, ath9k_pm_qos_value, int, S_IRUSR | S_IRGRP | S_IROTH);
-MODULE_PARM_DESC(pmqos, "User specified PM-QOS value");
-
 bool is_ath9k_unloaded;
 /* We use the hw_value as an index into our private channel structure */
 
@@ -760,9 +756,6 @@ int ath9k_init_device(u16 devid, struct ath_softc *sc, u16 subsysid,
         ath_init_leds(sc);
         ath_start_rfkill_poll(sc);
 
-        pm_qos_add_request(&sc->pm_qos_req, PM_QOS_CPU_DMA_LATENCY,
-                           PM_QOS_DEFAULT_VALUE);
-
         return 0;
 
 error_world:
@@ -819,7 +812,6 @@ void ath9k_deinit_device(struct ath_softc *sc)
         ath9k_ps_restore(sc);
 
         ieee80211_unregister_hw(hw);
-        pm_qos_remove_request(&sc->pm_qos_req);
         ath_rx_cleanup(sc);
         ath_tx_cleanup(sc);
         ath9k_deinit_softc(sc);
diff --git a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c
index 4ed43b2b8df6..a71550049d84 100644
--- a/drivers/net/wireless/ath/ath9k/main.c
+++ b/drivers/net/wireless/ath/ath9k/main.c
@@ -15,6 +15,7 @@
  */
 
 #include <linux/nl80211.h>
+#include <linux/delay.h>
 #include "ath9k.h"
 #include "btcoex.h"
 
@@ -53,6 +54,21 @@ static u8 parse_mpdudensity(u8 mpdudensity)
         }
 }
 
+static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
+{
+        bool pending = false;
+
+        spin_lock_bh(&txq->axq_lock);
+
+        if (txq->axq_depth || !list_empty(&txq->axq_acq))
+                pending = true;
+        else if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
+                pending = !list_empty(&txq->txq_fifo_pending);
+
+        spin_unlock_bh(&txq->axq_lock);
+        return pending;
+}
+
 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
 {
         unsigned long flags;
@@ -1117,12 +1133,6 @@ static int ath9k_start(struct ieee80211_hw *hw)
                         ath9k_btcoex_timer_resume(sc);
         }
 
-        /* User has the option to provide pm-qos value as a module
-         * parameter rather than using the default value of
-         * 'ATH9K_PM_QOS_DEFAULT_VALUE'.
-         */
-        pm_qos_update_request(&sc->pm_qos_req, ath9k_pm_qos_value);
-
         if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
                 common->bus_ops->extn_synch_en(common);
 
@@ -1267,8 +1277,6 @@ static void ath9k_stop(struct ieee80211_hw *hw)
 
         sc->sc_flags |= SC_OP_INVALID;
 
-        pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE);
-
         mutex_unlock(&sc->mutex);
 
         ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
@@ -1291,24 +1299,10 @@ static void ath9k_reclaim_beacon(struct ath_softc *sc,
 {
         struct ath_vif *avp = (void *)vif->drv_priv;
 
-        /* Disable SWBA interrupt */
-        sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
-        ath9k_ps_wakeup(sc);
-        ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
-        ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
-        tasklet_kill(&sc->bcon_tasklet);
-        ath9k_ps_restore(sc);
-
+        ath9k_set_beaconing_status(sc, false);
         ath_beacon_return(sc, avp);
+        ath9k_set_beaconing_status(sc, true);
         sc->sc_flags &= ~SC_OP_BEACONS;
-
-        if (sc->nbcnvifs > 0) {
-                /* Re-enable beaconing */
-                sc->sc_ah->imask |= ATH9K_INT_SWBA;
-                ath9k_ps_wakeup(sc);
-                ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
-                ath9k_ps_restore(sc);
-        }
 }
 
 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
@@ -1436,16 +1430,17 @@ static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
 
         if (ath9k_uses_beacons(vif->type)) {
                 int error;
-                ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
                 /* This may fail because upper levels do not have beacons
                  * properly configured yet.  That's OK, we assume it
                  * will be properly configured and then we will be notified
                  * in the info_changed method and set up beacons properly
                  * there.
                  */
+                ath9k_set_beaconing_status(sc, false);
                 error = ath_beacon_alloc(sc, vif);
                 if (!error)
                         ath_beacon_config(sc, vif);
+                ath9k_set_beaconing_status(sc, true);
         }
 }
 
@@ -1676,8 +1671,9 @@ static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
                 else
                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
 
-                ath_dbg(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
-                        curchan->center_freq);
+                ath_dbg(common, ATH_DBG_CONFIG,
+                        "Set channel: %d MHz type: %d\n",
+                        curchan->center_freq, conf->channel_type);
 
                 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
                                           curchan, conf->channel_type);
@@ -1723,6 +1719,8 @@ static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
         }
 
         if (changed & IEEE80211_CONF_CHANGE_POWER) {
+                ath_dbg(common, ATH_DBG_CONFIG,
+                        "Set power: %d\n", conf->power_level);
                 sc->config.txpowlimit = 2 * conf->power_level;
                 ath9k_ps_wakeup(sc);
                 ath9k_cmn_update_txpow(ah, sc->curtxpow,
@@ -1886,6 +1884,7 @@ static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
                                    u32 changed)
 {
         struct ath_softc *sc = hw->priv;
+        struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
         struct ath_hw *ah = sc->sc_ah;
         struct ath_common *common = ath9k_hw_common(ah);
         struct ath_vif *avp = (void *)vif->drv_priv;
@@ -1914,10 +1913,11 @@ static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
         /* Enable transmission of beacons (AP, IBSS, MESH) */
         if ((changed & BSS_CHANGED_BEACON) ||
             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
-                ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
+                ath9k_set_beaconing_status(sc, false);
                 error = ath_beacon_alloc(sc, vif);
                 if (!error)
                         ath_beacon_config(sc, vif);
+                ath9k_set_beaconing_status(sc, true);
         }
 
         if (changed & BSS_CHANGED_ERP_SLOT) {
@@ -1940,21 +1940,26 @@ static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
         }
 
         /* Disable transmission of beacons */
-        if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
-                ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
+        if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
+            !bss_conf->enable_beacon) {
+                ath9k_set_beaconing_status(sc, false);
+                avp->is_bslot_active = false;
+                ath9k_set_beaconing_status(sc, true);
+        }
 
         if (changed & BSS_CHANGED_BEACON_INT) {
-                sc->beacon_interval = bss_conf->beacon_int;
+                cur_conf->beacon_interval = bss_conf->beacon_int;
                 /*
                  * In case of AP mode, the HW TSF has to be reset
                  * when the beacon interval changes.
                  */
                 if (vif->type == NL80211_IFTYPE_AP) {
                         sc->sc_flags |= SC_OP_TSF_RESET;
-                        ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
+                        ath9k_set_beaconing_status(sc, false);
                         error = ath_beacon_alloc(sc, vif);
                         if (!error)
                                 ath_beacon_config(sc, vif);
+                        ath9k_set_beaconing_status(sc, true);
                 } else {
                         ath_beacon_config(sc, vif);
                 }
@@ -2122,6 +2127,60 @@ static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
         mutex_unlock(&sc->mutex);
 }
 
+static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
+{
+#define ATH_FLUSH_TIMEOUT       60 /* ms */
+        struct ath_softc *sc = hw->priv;
+        struct ath_txq *txq;
+        struct ath_hw *ah = sc->sc_ah;
+        struct ath_common *common = ath9k_hw_common(ah);
+        int i, j, npend = 0;
+
+        mutex_lock(&sc->mutex);
+
+        cancel_delayed_work_sync(&sc->tx_complete_work);
+
+        for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
+                if (!ATH_TXQ_SETUP(sc, i))
+                        continue;
+                txq = &sc->tx.txq[i];
+
+                if (!drop) {
+                        for (j = 0; j < ATH_FLUSH_TIMEOUT; j++) {
+                                if (!ath9k_has_pending_frames(sc, txq))
+                                        break;
+                                usleep_range(1000, 2000);
+                        }
+                }
+
+                if (drop || ath9k_has_pending_frames(sc, txq)) {
+                        ath_dbg(common, ATH_DBG_QUEUE, "Drop frames from hw queue:%d\n",
+                                txq->axq_qnum);
+                        spin_lock_bh(&txq->axq_lock);
+                        txq->txq_flush_inprogress = true;
+                        spin_unlock_bh(&txq->axq_lock);
+
+                        ath9k_ps_wakeup(sc);
+                        ath9k_hw_stoptxdma(ah, txq->axq_qnum);
+                        npend = ath9k_hw_numtxpending(ah, txq->axq_qnum);
+                        ath9k_ps_restore(sc);
+                        if (npend)
+                                break;
+
+                        ath_draintxq(sc, txq, false);
+                        txq->txq_flush_inprogress = false;
+                }
+        }
+
+        if (npend) {
+                ath_reset(sc, false);
+                txq->txq_flush_inprogress = false;
+        }
+
+        ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
+        mutex_unlock(&sc->mutex);
+}
+
 struct ieee80211_ops ath9k_ops = {
         .tx                 = ath9k_tx,
         .start              = ath9k_start,
@@ -2143,4 +2202,5 @@ struct ieee80211_ops ath9k_ops = {
         .get_survey         = ath9k_get_survey,
         .rfkill_poll        = ath9k_rfkill_poll_state,
         .set_coverage_class = ath9k_set_coverage_class,
+        .flush              = ath9k_flush,
 };
diff --git a/drivers/net/wireless/ath/ath9k/reg.h b/drivers/net/wireless/ath/ath9k/reg.h
index b262e98709de..64b226a78b2e 100644
--- a/drivers/net/wireless/ath/ath9k/reg.h
+++ b/drivers/net/wireless/ath/ath9k/reg.h
@@ -789,6 +789,7 @@
 #define AR_SREV_REVISION_9300_20        2 /* 2.0 and 2.1 */
 #define AR_SREV_VERSION_9485            0x240
 #define AR_SREV_REVISION_9485_10        0
+#define AR_SREV_REVISION_9485_11        1
 
 #define AR_SREV_5416(_ah) \
         (((_ah)->hw_version.macVersion == AR_SREV_VERSION_5416_PCI) || \
@@ -866,6 +867,9 @@
 #define AR_SREV_9485_10(_ah) \
         (AR_SREV_9485(_ah) && \
          ((_ah)->hw_version.macRev == AR_SREV_REVISION_9485_10))
+#define AR_SREV_9485_11(_ah) \
+        (AR_SREV_9485(_ah) && \
+         ((_ah)->hw_version.macRev == AR_SREV_REVISION_9485_11))
 
 #define AR_SREV_9285E_20(_ah) \
     (AR_SREV_9285_12_OR_LATER(_ah) && \
diff --git a/drivers/net/wireless/ath/ath9k/xmit.c b/drivers/net/wireless/ath/ath9k/xmit.c
index 9f4e755d27ce..e16136d61799 100644
--- a/drivers/net/wireless/ath/ath9k/xmit.c
+++ b/drivers/net/wireless/ath/ath9k/xmit.c
@@ -1055,6 +1055,7 @@ int ath_txq_update(struct ath_softc *sc, int qnum,
 int ath_cabq_update(struct ath_softc *sc)
 {
         struct ath9k_tx_queue_info qi;
+        struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
         int qnum = sc->beacon.cabq->axq_qnum;
 
         ath9k_hw_get_txq_props(sc->sc_ah, qnum, &qi);
@@ -1066,7 +1067,7 @@ int ath_cabq_update(struct ath_softc *sc)
         else if (sc->config.cabqReadytime > ATH9K_READY_TIME_HI_BOUND)
                 sc->config.cabqReadytime = ATH9K_READY_TIME_HI_BOUND;
 
-        qi.tqi_readyTime = (sc->beacon_interval *
+        qi.tqi_readyTime = (cur_conf->beacon_interval *
                             sc->config.cabqReadytime) / 100;
         ath_txq_update(sc, qnum, &qi);
 
@@ -2013,7 +2014,8 @@ static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
                 spin_lock_bh(&txq->axq_lock);
                 if (list_empty(&txq->axq_q)) {
                         txq->axq_link = NULL;
-                        if (sc->sc_flags & SC_OP_TXAGGR)
+                        if (sc->sc_flags & SC_OP_TXAGGR &&
+                            !txq->txq_flush_inprogress)
                                 ath_txq_schedule(sc, txq);
                         spin_unlock_bh(&txq->axq_lock);
                         break;
@@ -2070,6 +2072,7 @@ static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
 
                 if (bf_is_ampdu_not_probing(bf))
                         txq->axq_ampdu_depth--;
+
                 spin_unlock_bh(&txq->axq_lock);
 
                 if (bf_held)
@@ -2093,7 +2096,7 @@ static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
 
                 spin_lock_bh(&txq->axq_lock);
 
-                if (sc->sc_flags & SC_OP_TXAGGR)
+                if (sc->sc_flags & SC_OP_TXAGGR && !txq->txq_flush_inprogress)
                         ath_txq_schedule(sc, txq);
                 spin_unlock_bh(&txq->axq_lock);
         }
@@ -2264,15 +2267,18 @@ void ath_tx_edma_tasklet(struct ath_softc *sc)
 
                 spin_lock_bh(&txq->axq_lock);
 
-                if (!list_empty(&txq->txq_fifo_pending)) {
-                        INIT_LIST_HEAD(&bf_head);
-                        bf = list_first_entry(&txq->txq_fifo_pending,
-                                struct ath_buf, list);
-                        list_cut_position(&bf_head, &txq->txq_fifo_pending,
-                                &bf->bf_lastbf->list);
-                        ath_tx_txqaddbuf(sc, txq, &bf_head);
-                } else if (sc->sc_flags & SC_OP_TXAGGR)
-                        ath_txq_schedule(sc, txq);
+                if (!txq->txq_flush_inprogress) {
+                        if (!list_empty(&txq->txq_fifo_pending)) {
+                                INIT_LIST_HEAD(&bf_head);
+                                bf = list_first_entry(&txq->txq_fifo_pending,
+                                                      struct ath_buf, list);
+                                list_cut_position(&bf_head,
+                                                  &txq->txq_fifo_pending,
+                                                  &bf->bf_lastbf->list);
+                                ath_tx_txqaddbuf(sc, txq, &bf_head);
+                        } else if (sc->sc_flags & SC_OP_TXAGGR)
+                                ath_txq_schedule(sc, txq);
+                }
                 spin_unlock_bh(&txq->axq_lock);
         }
 }
diff --git a/drivers/net/wireless/iwlwifi/iwl-2000.c b/drivers/net/wireless/iwlwifi/iwl-2000.c
index 3c5dd36ff417..30483e27ce5c 100644
--- a/drivers/net/wireless/iwlwifi/iwl-2000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-2000.c
@@ -265,7 +265,8 @@ static struct iwl_lib_ops iwl2000_lib = {
         .txq_free_tfd = iwl_hw_txq_free_tfd,
         .txq_init = iwl_hw_tx_queue_init,
         .rx_handler_setup = iwlagn_rx_handler_setup,
-        .setup_deferred_work = iwlagn_setup_deferred_work,
+        .setup_deferred_work = iwlagn_bt_setup_deferred_work,
+        .cancel_deferred_work = iwlagn_bt_cancel_deferred_work,
         .is_valid_rtc_data_addr = iwlagn_hw_valid_rtc_data_addr,
         .load_ucode = iwlagn_load_ucode,
         .dump_nic_event_log = iwl_dump_nic_event_log,
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-lib.c b/drivers/net/wireless/iwlwifi/iwl-agn-lib.c
index 3aa486437509..325ff5c89ee8 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-lib.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-lib.c
@@ -1832,7 +1832,7 @@ void iwlagn_send_advance_bt_config(struct iwl_priv *priv)
          * IBSS mode (no proper uCode support for coex then).
          */
         if (!bt_coex_active || priv->iw_mode == NL80211_IFTYPE_ADHOC) {
-                bt_cmd.flags = 0;
+                bt_cmd.flags = IWLAGN_BT_FLAG_COEX_MODE_DISABLED;
         } else {
                 bt_cmd.flags = IWLAGN_BT_FLAG_COEX_MODE_3W <<
                                         IWLAGN_BT_FLAG_COEX_MODE_SHIFT;
@@ -1869,6 +1869,11 @@ static void iwlagn_bt_traffic_change_work(struct work_struct *work)
         struct iwl_rxon_context *ctx;
         int smps_request = -1;
 
+        if (priv->bt_enable_flag == IWLAGN_BT_FLAG_COEX_MODE_DISABLED) {
+                /* bt coex disabled */
+                return;
+        }
+
         /*
          * Note: bt_traffic_load can be overridden by scan complete and
          * coex profile notifications. Ignore that since only bad consequence
@@ -2022,6 +2027,11 @@ void iwlagn_bt_coex_profile_notif(struct iwl_priv *priv,
         struct iwl_bt_coex_profile_notif *coex = &pkt->u.bt_coex_profile_notif;
         struct iwl_bt_uart_msg *uart_msg = &coex->last_bt_uart_msg;
 
+        if (priv->bt_enable_flag == IWLAGN_BT_FLAG_COEX_MODE_DISABLED) {
+                /* bt coex disabled */
+                return;
+        }
+
         IWL_DEBUG_NOTIF(priv, "BT Coex notification:\n");
         IWL_DEBUG_NOTIF(priv, "    status: %d\n", coex->bt_status);
         IWL_DEBUG_NOTIF(priv, "    traffic load: %d\n", coex->bt_traffic_load);
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.c b/drivers/net/wireless/iwlwifi/iwl-agn.c
index 8ee810f5fc06..abd0461bd307 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn.c
@@ -1413,34 +1413,42 @@ static void iwl_irq_tasklet(struct iwl_priv *priv)
 /**
  * iwl_good_ack_health - checks for ACK count ratios, BA timeout retries.
  *
- * When the ACK count ratio is 0 and aggregated BA timeout retries exceeding
+ * When the ACK count ratio is low and aggregated BA timeout retries exceeding
  * the BA_TIMEOUT_MAX, reload firmware and bring system back to normal
  * operation state.
  */
-bool iwl_good_ack_health(struct iwl_priv *priv,
-                                struct iwl_rx_packet *pkt)
+bool iwl_good_ack_health(struct iwl_priv *priv, struct iwl_rx_packet *pkt)
 {
-        bool rc = true;
-        int actual_ack_cnt_delta, expected_ack_cnt_delta;
-        int ba_timeout_delta;
-
-        actual_ack_cnt_delta =
-                le32_to_cpu(pkt->u.stats.tx.actual_ack_cnt) -
-                le32_to_cpu(priv->_agn.statistics.tx.actual_ack_cnt);
-        expected_ack_cnt_delta =
-                le32_to_cpu(pkt->u.stats.tx.expected_ack_cnt) -
-                le32_to_cpu(priv->_agn.statistics.tx.expected_ack_cnt);
-        ba_timeout_delta =
-                le32_to_cpu(pkt->u.stats.tx.agg.ba_timeout) -
-                le32_to_cpu(priv->_agn.statistics.tx.agg.ba_timeout);
-        if ((priv->_agn.agg_tids_count > 0) &&
-            (expected_ack_cnt_delta > 0) &&
-            (((actual_ack_cnt_delta * 100) / expected_ack_cnt_delta)
-                < ACK_CNT_RATIO) &&
-            (ba_timeout_delta > BA_TIMEOUT_CNT)) {
-                IWL_DEBUG_RADIO(priv, "actual_ack_cnt delta = %d,"
-                                " expected_ack_cnt = %d\n",
-                                actual_ack_cnt_delta, expected_ack_cnt_delta);
+        int actual_delta, expected_delta, ba_timeout_delta;
+        struct statistics_tx *cur, *old;
+
+        if (priv->_agn.agg_tids_count)
+                return true;
+
+        if (iwl_bt_statistics(priv)) {
+                cur = &pkt->u.stats_bt.tx;
+                old = &priv->_agn.statistics_bt.tx;
+        } else {
+                cur = &pkt->u.stats.tx;
+                old = &priv->_agn.statistics.tx;
+        }
+
+        actual_delta = le32_to_cpu(cur->actual_ack_cnt) -
+                       le32_to_cpu(old->actual_ack_cnt);
+        expected_delta = le32_to_cpu(cur->expected_ack_cnt) -
+                         le32_to_cpu(old->expected_ack_cnt);
+
+        /* Values should not be negative, but we do not trust the firmware */
+        if (actual_delta <= 0 || expected_delta <= 0)
+                return true;
+
+        ba_timeout_delta = le32_to_cpu(cur->agg.ba_timeout) -
+                           le32_to_cpu(old->agg.ba_timeout);
+
+        if ((actual_delta * 100 / expected_delta) < ACK_CNT_RATIO &&
+            ba_timeout_delta > BA_TIMEOUT_CNT) {
+                IWL_DEBUG_RADIO(priv, "deltas: actual %d expected %d ba_timeout %d\n",
+                                actual_delta, expected_delta, ba_timeout_delta);
 
 #ifdef CONFIG_IWLWIFI_DEBUGFS
                 /*
@@ -1448,20 +1456,18 @@ bool iwl_good_ack_health(struct iwl_priv *priv,
                  * statistics aren't available. If DEBUGFS is set but
                  * DEBUG is not, these will just compile out.
                  */
-                IWL_DEBUG_RADIO(priv, "rx_detected_cnt delta = %d\n",
+                IWL_DEBUG_RADIO(priv, "rx_detected_cnt delta %d\n",
                                 priv->_agn.delta_statistics.tx.rx_detected_cnt);
                 IWL_DEBUG_RADIO(priv,
-                                "ack_or_ba_timeout_collision delta = %d\n",
-                                priv->_agn.delta_statistics.tx.
-                                ack_or_ba_timeout_collision);
+                                "ack_or_ba_timeout_collision delta %d\n",
+                                priv->_agn.delta_statistics.tx.ack_or_ba_timeout_collision);
 #endif
-                IWL_DEBUG_RADIO(priv, "agg ba_timeout delta = %d\n",
-                                ba_timeout_delta);
-                if (!actual_ack_cnt_delta &&
-                    (ba_timeout_delta >= BA_TIMEOUT_MAX))
-                        rc = false;
+
+                if (ba_timeout_delta >= BA_TIMEOUT_MAX)
+                        return false;
         }
-        return rc;
+
+        return true;
 }
 
 
diff --git a/drivers/net/wireless/iwlwifi/iwl-rx.c b/drivers/net/wireless/iwlwifi/iwl-rx.c
index 87a6fd84d4d2..bc89393fb696 100644
--- a/drivers/net/wireless/iwlwifi/iwl-rx.c
+++ b/drivers/net/wireless/iwlwifi/iwl-rx.c
@@ -234,33 +234,20 @@ EXPORT_SYMBOL(iwl_rx_spectrum_measure_notif);
 void iwl_recover_from_statistics(struct iwl_priv *priv,
                                 struct iwl_rx_packet *pkt)
 {
-        if (test_bit(STATUS_EXIT_PENDING, &priv->status))
+        if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
+            !iwl_is_any_associated(priv))
                 return;
-        if (iwl_is_any_associated(priv)) {
-                if (priv->cfg->ops->lib->check_ack_health) {
-                        if (!priv->cfg->ops->lib->check_ack_health(
-                            priv, pkt)) {
-                                /*
-                                 * low ack count detected
-                                 * restart Firmware
-                                 */
-                                IWL_ERR(priv, "low ack count detected, "
-                                        "restart firmware\n");
-                                if (!iwl_force_reset(priv, IWL_FW_RESET, false))
-                                        return;
-                        }
-                }
-                if (priv->cfg->ops->lib->check_plcp_health) {
-                        if (!priv->cfg->ops->lib->check_plcp_health(
-                            priv, pkt)) {
-                                /*
-                                 * high plcp error detected
-                                 * reset Radio
-                                 */
-                                iwl_force_reset(priv, IWL_RF_RESET, false);
-                        }
-                }
+
+        if (priv->cfg->ops->lib->check_ack_health &&
+            !priv->cfg->ops->lib->check_ack_health(priv, pkt)) {
+                IWL_ERR(priv, "low ack count detected, restart firmware\n");
+                if (!iwl_force_reset(priv, IWL_FW_RESET, false))
+                        return;
         }
+
+        if (priv->cfg->ops->lib->check_plcp_health &&
+            !priv->cfg->ops->lib->check_plcp_health(priv, pkt))
+                iwl_force_reset(priv, IWL_RF_RESET, false);
 }
 EXPORT_SYMBOL(iwl_recover_from_statistics);
 
diff --git a/drivers/net/wireless/p54/eeprom.c b/drivers/net/wireless/p54/eeprom.c
index 35b09aa0529b..f54e15fcd623 100644
--- a/drivers/net/wireless/p54/eeprom.c
+++ b/drivers/net/wireless/p54/eeprom.c
@@ -55,6 +55,17 @@ static struct ieee80211_rate p54_arates[] = {
         { .bitrate = 540, .hw_value = 11, },
 };
 
+static struct p54_rssi_db_entry p54_rssi_default = {
+        /*
+         * The defaults are taken from usb-logs of the
+         * vendor driver. So, they should be safe to
+         * use in case we can't get a match from the
+         * rssi <-> dBm conversion database.
+         */
+        .mul = 130,
+        .add = -398,
+};
+
 #define CHAN_HAS_CAL            BIT(0)
 #define CHAN_HAS_LIMIT          BIT(1)
 #define CHAN_HAS_CURVE          BIT(2)
@@ -87,13 +98,27 @@ static int p54_get_band_from_freq(u16 freq)
         return -1;
 }
 
+static int same_band(u16 freq, u16 freq2)
+{
+        return p54_get_band_from_freq(freq) == p54_get_band_from_freq(freq2);
+}
+
 static int p54_compare_channels(const void *_a,
                                 const void *_b)
 {
         const struct p54_channel_entry *a = _a;
         const struct p54_channel_entry *b = _b;
 
-        return a->index - b->index;
+        return a->freq - b->freq;
+}
+
+static int p54_compare_rssichan(const void *_a,
+                                const void *_b)
+{
+        const struct p54_rssi_db_entry *a = _a;
+        const struct p54_rssi_db_entry *b = _b;
+
+        return a->freq - b->freq;
 }
 
 static int p54_fill_band_bitrates(struct ieee80211_hw *dev,
@@ -145,25 +170,26 @@ static int p54_generate_band(struct ieee80211_hw *dev,
 
         for (i = 0, j = 0; (j < list->band_channel_num[band]) &&
                            (i < list->entries); i++) {
+                struct p54_channel_entry *chan = &list->channels[i];
 
-                if (list->channels[i].band != band)
+                if (chan->band != band)
                         continue;
 
-                if (list->channels[i].data != CHAN_HAS_ALL) {
-                        wiphy_err(dev->wiphy,
-                                  "%s%s%s is/are missing for channel:%d [%d MHz].\n",
-                                  (list->channels[i].data & CHAN_HAS_CAL ? "" :
+                if (chan->data != CHAN_HAS_ALL) {
+                        wiphy_err(dev->wiphy, "%s%s%s is/are missing for "
+                                  "channel:%d [%d MHz].\n",
+                                  (chan->data & CHAN_HAS_CAL ? "" :
                                    " [iqauto calibration data]"),
-                                  (list->channels[i].data & CHAN_HAS_LIMIT ? "" :
+                                  (chan->data & CHAN_HAS_LIMIT ? "" :
                                    " [output power limits]"),
-                                  (list->channels[i].data & CHAN_HAS_CURVE ? "" :
+                                  (chan->data & CHAN_HAS_CURVE ? "" :
                                    " [curve data]"),
-                                  list->channels[i].index, list->channels[i].freq);
+                                  chan->index, chan->freq);
                         continue;
                 }
 
-                tmp->channels[j].band = list->channels[i].band;
-                tmp->channels[j].center_freq = list->channels[i].freq;
+                tmp->channels[j].band = chan->band;
+                tmp->channels[j].center_freq = chan->freq;
                 j++;
         }
 
@@ -291,7 +317,7 @@ static int p54_generate_channel_lists(struct ieee80211_hw *dev)
                 }
         }
 
-        /* sort the list by the channel index */
+        /* sort the channel list by frequency */
         sort(list->channels, list->entries, sizeof(struct p54_channel_entry),
              p54_compare_channels, NULL);
 
@@ -410,33 +436,118 @@ static int p54_convert_rev1(struct ieee80211_hw *dev,
 static const char *p54_rf_chips[] = { "INVALID-0", "Duette3", "Duette2",
         "Frisbee", "Xbow", "Longbow", "INVALID-6", "INVALID-7" };
 
-static void p54_parse_rssical(struct ieee80211_hw *dev, void *data, int len,
-                             u16 type)
+static int p54_parse_rssical(struct ieee80211_hw *dev,
+                             u8 *data, int len, u16 type)
 {
         struct p54_common *priv = dev->priv;
-        int offset = (type == PDR_RSSI_LINEAR_APPROXIMATION_EXTENDED) ? 2 : 0;
-        int entry_size = sizeof(struct pda_rssi_cal_entry) + offset;
-        int num_entries = (type == PDR_RSSI_LINEAR_APPROXIMATION) ? 1 : 2;
-        int i;
+        struct p54_rssi_db_entry *entry;
+        size_t db_len, entries;
+        int offset = 0, i;
+
+        if (type != PDR_RSSI_LINEAR_APPROXIMATION_EXTENDED) {
+                entries = (type == PDR_RSSI_LINEAR_APPROXIMATION) ? 1 : 2;
+                if (len != sizeof(struct pda_rssi_cal_entry) * entries) {
+                        wiphy_err(dev->wiphy, "rssical size mismatch.\n");
+                        goto err_data;
+                }
+        } else {
+                /*
+                 * Some devices (Dell 1450 USB, Xbow 5GHz card, etc...)
+                 * have an empty two byte header.
+                 */
+                if (*((__le16 *)&data[offset]) == cpu_to_le16(0))
+                        offset += 2;
 
-        if (len != (entry_size * num_entries)) {
-                wiphy_err(dev->wiphy,
-                          "unknown rssi calibration data packing type:(%x) len:%d.\n",
-                          type, len);
+                entries = (len - offset) /
+                        sizeof(struct pda_rssi_cal_ext_entry);
 
-                print_hex_dump_bytes("rssical:", DUMP_PREFIX_NONE,
-                                     data, len);
+                if ((len - offset) % sizeof(struct pda_rssi_cal_ext_entry) ||
+                    entries <= 0) {
+                        wiphy_err(dev->wiphy, "invalid rssi database.\n");
+                        goto err_data;
+                }
+        }
 
-                wiphy_err(dev->wiphy, "please report this issue.\n");
-                return;
+        db_len = sizeof(*entry) * entries;
+        priv->rssi_db = kzalloc(db_len + sizeof(*priv->rssi_db), GFP_KERNEL);
+        if (!priv->rssi_db)
+                return -ENOMEM;
+
+        priv->rssi_db->offset = 0;
+        priv->rssi_db->entries = entries;
+        priv->rssi_db->entry_size = sizeof(*entry);
+        priv->rssi_db->len = db_len;
+
+        entry = (void *)((unsigned long)priv->rssi_db->data + priv->rssi_db->offset);
+        if (type == PDR_RSSI_LINEAR_APPROXIMATION_EXTENDED) {
+                struct pda_rssi_cal_ext_entry *cal = (void *) &data[offset];
+
+                for (i = 0; i < entries; i++) {
+                        entry[i].freq = le16_to_cpu(cal[i].freq);
+                        entry[i].mul = (s16) le16_to_cpu(cal[i].mul);
+                        entry[i].add = (s16) le16_to_cpu(cal[i].add);
+                }
+        } else {
+                struct pda_rssi_cal_entry *cal = (void *) &data[offset];
+
+                for (i = 0; i < entries; i++) {
+                        u16 freq;
+                        switch (i) {
+                        case IEEE80211_BAND_2GHZ:
+                                freq = 2437;
+                                break;
+                        case IEEE80211_BAND_5GHZ:
+                                freq = 5240;
+                                break;
+                        }
+
+                        entry[i].freq = freq;
+                        entry[i].mul = (s16) le16_to_cpu(cal[i].mul);
+                        entry[i].add = (s16) le16_to_cpu(cal[i].add);
+                }
         }
 
-        for (i = 0; i < num_entries; i++) {
-                struct pda_rssi_cal_entry *cal = data +
-                                                 (offset + i * entry_size);
-                priv->rssical_db[i].mul = (s16) le16_to_cpu(cal->mul);
-                priv->rssical_db[i].add = (s16) le16_to_cpu(cal->add);
+        /* sort the list by channel frequency */
+        sort(entry, entries, sizeof(*entry), p54_compare_rssichan, NULL);
+        return 0;
+
+err_data:
+        wiphy_err(dev->wiphy,
+                  "rssi calibration data packing type:(%x) len:%d.\n",
+                  type, len);
+
+        print_hex_dump_bytes("rssical:", DUMP_PREFIX_NONE, data, len);
+
+        wiphy_err(dev->wiphy, "please report this issue.\n");
+        return -EINVAL;
+}
+
+struct p54_rssi_db_entry *p54_rssi_find(struct p54_common *priv, const u16 freq)
+{
+        struct p54_rssi_db_entry *entry = (void *)(priv->rssi_db->data +
+                                                   priv->rssi_db->offset);
+        int i, found = -1;
+
+        for (i = 0; i < priv->rssi_db->entries; i++) {
+                if (!same_band(freq, entry[i].freq))
+                        continue;
+
+                if (found == -1) {
+                        found = i;
+                        continue;
+                }
+
+                /* nearest match */
+                if (abs(freq - entry[i].freq) <
+                    abs(freq - entry[found].freq)) {
+                        found = i;
+                        continue;
+                } else {
+                        break;
+                }
         }
+
+        return found < 0 ? &p54_rssi_default : &entry[found];
 }
 
 static void p54_parse_default_country(struct ieee80211_hw *dev,
@@ -627,21 +738,30 @@ int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len)
                 case PDR_RSSI_LINEAR_APPROXIMATION:
                 case PDR_RSSI_LINEAR_APPROXIMATION_DUAL_BAND:
                 case PDR_RSSI_LINEAR_APPROXIMATION_EXTENDED:
-                        p54_parse_rssical(dev, entry->data, data_len,
-                                          le16_to_cpu(entry->code));
+                        err = p54_parse_rssical(dev, entry->data, data_len,
+                                                le16_to_cpu(entry->code));
+                        if (err)
+                                goto err;
                         break;
-                case PDR_RSSI_LINEAR_APPROXIMATION_CUSTOM: {
-                        __le16 *src = (void *) entry->data;
-                        s16 *dst = (void *) &priv->rssical_db;
+                case PDR_RSSI_LINEAR_APPROXIMATION_CUSTOMV2: {
+                        struct pda_custom_wrapper *pda = (void *) entry->data;
+                        __le16 *src;
+                        u16 *dst;
                         int i;
 
-                        if (data_len != sizeof(priv->rssical_db)) {
-                                err = -EINVAL;
-                                goto err;
-                        }
-                        for (i = 0; i < sizeof(priv->rssical_db) /
-                                        sizeof(*src); i++)
+                        if (priv->rssi_db || data_len < sizeof(*pda))
+                                break;
+
+                        priv->rssi_db = p54_convert_db(pda, data_len);
+                        if (!priv->rssi_db)
+                                break;
+
+                        src = (void *) priv->rssi_db->data;
+                        dst = (void *) priv->rssi_db->data;
+
+                        for (i = 0; i < priv->rssi_db->entries; i++)
                                 *(dst++) = (s16) le16_to_cpu(*(src++));
+
                         }
                         break;
                 case PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS_CUSTOM: {
@@ -717,6 +837,8 @@ good_eeprom:
                 SET_IEEE80211_PERM_ADDR(dev, perm_addr);
         }
 
+        priv->cur_rssi = &p54_rssi_default;
+
         wiphy_info(dev->wiphy, "hwaddr %pM, MAC:isl38%02x RF:%s\n",
                    dev->wiphy->perm_addr, priv->version,
                    p54_rf_chips[priv->rxhw]);
@@ -727,9 +849,11 @@ err:
         kfree(priv->iq_autocal);
         kfree(priv->output_limit);
         kfree(priv->curve_data);
+        kfree(priv->rssi_db);
         priv->iq_autocal = NULL;
         priv->output_limit = NULL;
         priv->curve_data = NULL;
+        priv->rssi_db = NULL;
 
         wiphy_err(dev->wiphy, "eeprom parse failed!\n");
         return err;
diff --git a/drivers/net/wireless/p54/eeprom.h b/drivers/net/wireless/p54/eeprom.h
index 9051aef11249..afde72b84606 100644
--- a/drivers/net/wireless/p54/eeprom.h
+++ b/drivers/net/wireless/p54/eeprom.h
@@ -81,6 +81,12 @@ struct pda_pa_curve_data {
         u8 data[0];
 } __packed;
 
+struct pda_rssi_cal_ext_entry {
+        __le16 freq;
+        __le16 mul;
+        __le16 add;
+} __packed;
+
 struct pda_rssi_cal_entry {
         __le16 mul;
         __le16 add;
@@ -179,6 +185,7 @@ struct pda_custom_wrapper {
 
 /* used by our modificated eeprom image */
 #define PDR_RSSI_LINEAR_APPROXIMATION_CUSTOM            0xDEAD
+#define PDR_RSSI_LINEAR_APPROXIMATION_CUSTOMV2          0xCAFF
 #define PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS_CUSTOM     0xBEEF
 #define PDR_PRISM_PA_CAL_CURVE_DATA_CUSTOM              0xB05D
 
diff --git a/drivers/net/wireless/p54/fwio.c b/drivers/net/wireless/p54/fwio.c
index 92b9b1f05fd5..0d3d108f6fe2 100644
--- a/drivers/net/wireless/p54/fwio.c
+++ b/drivers/net/wireless/p54/fwio.c
@@ -397,9 +397,9 @@ int p54_scan(struct p54_common *priv, u16 mode, u16 dwell)
         union p54_scan_body_union *body;
         struct p54_scan_tail_rate *rate;
         struct pda_rssi_cal_entry *rssi;
+        struct p54_rssi_db_entry *rssi_data;
         unsigned int i;
         void *entry;
-        int band = priv->hw->conf.channel->band;
         __le16 freq = cpu_to_le16(priv->hw->conf.channel->center_freq);
 
         skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*head) +
@@ -503,13 +503,14 @@ int p54_scan(struct p54_common *priv, u16 mode, u16 dwell)
         }
 
         rssi = (struct pda_rssi_cal_entry *) skb_put(skb, sizeof(*rssi));
-        rssi->mul = cpu_to_le16(priv->rssical_db[band].mul);
-        rssi->add = cpu_to_le16(priv->rssical_db[band].add);
+        rssi_data = p54_rssi_find(priv, le16_to_cpu(freq));
+        rssi->mul = cpu_to_le16(rssi_data->mul);
+        rssi->add = cpu_to_le16(rssi_data->add);
         if (priv->rxhw == PDR_SYNTH_FRONTEND_LONGBOW) {
                 /* Longbow frontend needs ever more */
                 rssi = (void *) skb_put(skb, sizeof(*rssi));
-                rssi->mul = cpu_to_le16(priv->rssical_db[band].longbow_unkn);
-                rssi->add = cpu_to_le16(priv->rssical_db[band].longbow_unk2);
+                rssi->mul = cpu_to_le16(rssi_data->longbow_unkn);
+                rssi->add = cpu_to_le16(rssi_data->longbow_unk2);
         }
 
         if (priv->fw_var >= 0x509) {
@@ -523,6 +524,7 @@ int p54_scan(struct p54_common *priv, u16 mode, u16 dwell)
         hdr->len = cpu_to_le16(skb->len - sizeof(*hdr));
 
         p54_tx(priv, skb);
+        priv->cur_rssi = rssi_data;
         return 0;
 
 err:
diff --git a/drivers/net/wireless/p54/lmac.h b/drivers/net/wireless/p54/lmac.h
index 04b63ec80fa4..5ca117e6f95b 100644
--- a/drivers/net/wireless/p54/lmac.h
+++ b/drivers/net/wireless/p54/lmac.h
@@ -551,6 +551,7 @@ int p54_upload_key(struct p54_common *priv, u8 algo, int slot,
 /* eeprom */
 int p54_download_eeprom(struct p54_common *priv, void *buf,
                         u16 offset, u16 len);
+struct p54_rssi_db_entry *p54_rssi_find(struct p54_common *p, const u16 freq);
 
 /* utility */
 u8 *p54_find_ie(struct sk_buff *skb, u8 ie);
diff --git a/drivers/net/wireless/p54/main.c b/drivers/net/wireless/p54/main.c
index 622d27b6d8f2..e14a05bbc485 100644
--- a/drivers/net/wireless/p54/main.c
+++ b/drivers/net/wireless/p54/main.c
@@ -524,6 +524,48 @@ static int p54_get_survey(struct ieee80211_hw *dev, int idx,
         return 0;
 }
 
+static unsigned int p54_flush_count(struct p54_common *priv)
+{
+        unsigned int total = 0, i;
+
+        BUILD_BUG_ON(P54_QUEUE_NUM > ARRAY_SIZE(priv->tx_stats));
+
+        /*
+         * Because the firmware has the sole control over any frames
+         * in the P54_QUEUE_BEACON or P54_QUEUE_SCAN queues, they
+         * don't really count as pending or active.
+         */
+        for (i = P54_QUEUE_MGMT; i < P54_QUEUE_NUM; i++)
+                total += priv->tx_stats[i].len;
+        return total;
+}
+
+static void p54_flush(struct ieee80211_hw *dev, bool drop)
+{
+        struct p54_common *priv = dev->priv;
+        unsigned int total, i;
+
+        /*
+         * Currently, it wouldn't really matter if we wait for one second
+         * or 15 minutes. But once someone gets around and completes the
+         * TODOs [ancel stuck frames / reset device] in p54_work, it will
+         * suddenly make sense to wait that long.
+         */
+        i = P54_STATISTICS_UPDATE * 2 / 20;
+
+        /*
+         * In this case no locking is required because as we speak the
+         * queues have already been stopped and no new frames can sneak
+         * up from behind.
+         */
+        while ((total = p54_flush_count(priv) && i--)) {
+                /* waste time */
+                msleep(20);
+        }
+
+        WARN(total, "tx flush timeout, unresponsive firmware");
+}
+
 static const struct ieee80211_ops p54_ops = {
         .tx                     = p54_tx_80211,
         .start                  = p54_start,
@@ -536,6 +578,7 @@ static const struct ieee80211_ops p54_ops = {
         .sta_remove             = p54_sta_add_remove,
         .set_key                = p54_set_key,
         .config                 = p54_config,
+        .flush                  = p54_flush,
         .bss_info_changed       = p54_bss_info_changed,
         .configure_filter       = p54_configure_filter,
         .conf_tx                = p54_conf_tx,
@@ -611,7 +654,7 @@ EXPORT_SYMBOL_GPL(p54_init_common);
 
 int p54_register_common(struct ieee80211_hw *dev, struct device *pdev)
 {
-        struct p54_common *priv = dev->priv;
+        struct p54_common __maybe_unused *priv = dev->priv;
         int err;
 
         err = ieee80211_register_hw(dev);
@@ -642,10 +685,12 @@ void p54_free_common(struct ieee80211_hw *dev)
         kfree(priv->iq_autocal);
         kfree(priv->output_limit);
         kfree(priv->curve_data);
+        kfree(priv->rssi_db);
         kfree(priv->used_rxkeys);
         priv->iq_autocal = NULL;
         priv->output_limit = NULL;
         priv->curve_data = NULL;
+        priv->rssi_db = NULL;
         priv->used_rxkeys = NULL;
         ieee80211_free_hw(dev);
 }
diff --git a/drivers/net/wireless/p54/p54.h b/drivers/net/wireless/p54/p54.h
index 43a3b2ead81a..f951c8f31863 100644
--- a/drivers/net/wireless/p54/p54.h
+++ b/drivers/net/wireless/p54/p54.h
@@ -116,7 +116,8 @@ struct p54_edcf_queue_param {
         __le16 txop;
 } __packed;
 
-struct p54_rssi_linear_approximation {
+struct p54_rssi_db_entry {
+        u16 freq;
         s16 mul;
         s16 add;
         s16 longbow_unkn;
@@ -197,13 +198,14 @@ struct p54_common {
         u8 rx_diversity_mask;
         u8 tx_diversity_mask;
         unsigned int output_power;
+        struct p54_rssi_db_entry *cur_rssi;
         int noise;
         /* calibration, output power limit and rssi<->dBm conversation data */
         struct pda_iq_autocal_entry *iq_autocal;
         unsigned int iq_autocal_len;
         struct p54_cal_database *curve_data;
         struct p54_cal_database *output_limit;
-        struct p54_rssi_linear_approximation rssical_db[IEEE80211_NUM_BANDS];
+        struct p54_cal_database *rssi_db;
         struct ieee80211_supported_band *band_table[IEEE80211_NUM_BANDS];
 
         /* BBP/MAC state */
diff --git a/drivers/net/wireless/p54/p54spi_eeprom.h b/drivers/net/wireless/p54/p54spi_eeprom.h
index d592cbd34d78..0b7bfb0adcf2 100644
--- a/drivers/net/wireless/p54/p54spi_eeprom.h
+++ b/drivers/net/wireless/p54/p54spi_eeprom.h
@@ -65,9 +65,10 @@ static unsigned char p54spi_eeprom[] = {
 0x03, 0x00, 0x00, 0x11,         /* PDR_ANTENNA_GAIN */
         0x08, 0x08, 0x08, 0x08,
 
-0x09, 0x00, 0xad, 0xde,         /* PDR_RSSI_LINEAR_APPROXIMATION_CUSTOM */
-        0x0a, 0x01, 0x72, 0xfe, 0x1a, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x0a, 0x00, 0xff, 0xca,         /* PDR_RSSI_LINEAR_APPROXIMATION_CUSTOMV2 */
+        0x01, 0x00, 0x0a, 0x00,
+        0x00, 0x00, 0x0a, 0x00,
+                0x85, 0x09, 0x0a, 0x01, 0x72, 0xfe, 0x1a, 0x00, 0x00, 0x00,
 
 /* struct pda_custom_wrapper */
 0x10, 0x06, 0x5d, 0xb0,         /* PDR_PRISM_PA_CAL_CURVE_DATA_CUSTOM */
@@ -671,7 +672,7 @@ static unsigned char p54spi_eeprom[] = {
         0xa8, 0x09, 0x25, 0x00, 0xf5, 0xff, 0xf9, 0xff, 0x00, 0x01,
 
 0x02, 0x00, 0x00, 0x00,         /* PDR_END */
-        0x67, 0x99,
+        0xb6, 0x04,
 };
 
 #endif /* P54SPI_EEPROM_H */
diff --git a/drivers/net/wireless/p54/txrx.c b/drivers/net/wireless/p54/txrx.c
index f618b9623e5a..917d5d948e3c 100644
--- a/drivers/net/wireless/p54/txrx.c
+++ b/drivers/net/wireless/p54/txrx.c
@@ -273,11 +273,9 @@ void p54_tx(struct p54_common *priv, struct sk_buff *skb)
 
 static int p54_rssi_to_dbm(struct p54_common *priv, int rssi)
 {
-        int band = priv->hw->conf.channel->band;
-
         if (priv->rxhw != 5) {
-                return ((rssi * priv->rssical_db[band].mul) / 64 +
-                         priv->rssical_db[band].add) / 4;
+                return ((rssi * priv->cur_rssi->mul) / 64 +
+                         priv->cur_rssi->add) / 4;
         } else {
                 /*
                  * TODO: find the correct formula
diff --git a/drivers/net/wireless/rt2x00/Kconfig b/drivers/net/wireless/rt2x00/Kconfig
index 6f383cd684b0..f630552427b7 100644
--- a/drivers/net/wireless/rt2x00/Kconfig
+++ b/drivers/net/wireless/rt2x00/Kconfig
@@ -97,6 +97,18 @@ config RT2800PCI_RT35XX
           Support for these devices is non-functional at the moment and is
           intended for testers and developers.
 
+config RT2800PCI_RT53XX
+       bool "rt2800-pci - Include support for rt53xx devices (EXPERIMENTAL)"
+       depends on EXPERIMENTAL
+       default n
+       ---help---
+         This adds support for rt53xx wireless chipset family to the
+         rt2800pci driver.
+         Supported chips: RT5390
+
+         Support for these devices is non-functional at the moment and is
+         intended for testers and developers.
+
 endif
 
 config RT2500USB
diff --git a/drivers/net/wireless/rt2x00/rt2800.h b/drivers/net/wireless/rt2x00/rt2800.h
index ec8159ce0ee8..6f4a2432c021 100644
--- a/drivers/net/wireless/rt2x00/rt2800.h
+++ b/drivers/net/wireless/rt2x00/rt2800.h
@@ -51,6 +51,7 @@
  * RF3320 2.4G 1T1R(RT3350/RT3370/RT3390)
  * RF3322 2.4G 2T2R(RT3352/RT3371/RT3372/RT3391/RT3392)
  * RF3853 2.4G/5G 3T3R(RT3883/RT3563/RT3573/RT3593/RT3662)
+ * RF5390 2.4G 1T1R
  */
 #define RF2820                          0x0001
 #define RF2850                          0x0002
@@ -65,6 +66,7 @@
 #define RF3320                          0x000b
 #define RF3322                          0x000c
 #define RF3853                          0x000d
+#define RF5390                         0x5390
 
 /*
  * Chipset revisions.
@@ -77,6 +79,7 @@
 #define REV_RT3071E                     0x0211
 #define REV_RT3090E                     0x0211
 #define REV_RT3390E                     0x0211
+#define REV_RT5390F                    0x0502
 
 /*
  * Signal information.
@@ -121,6 +124,13 @@
 #define E2PROM_CSR_RELOAD               FIELD32(0x00000080)
 
 /*
+ * AUX_CTRL: Aux/PCI-E related configuration
+ */
+#define AUX_CTRL               0x10c
+#define AUX_CTRL_WAKE_PCIE_EN          FIELD32(0x00000002)
+#define AUX_CTRL_FORCE_PCIE_CLK        FIELD32(0x00000400)
+
+/*
  * OPT_14: Unknown register used by rt3xxx devices.
  */
 #define OPT_14_CSR                      0x0114
@@ -270,6 +280,7 @@
 
 /*
  * GPIO_CTRL_CFG:
+ * GPIOD: GPIO direction, 0: Output, 1: Input
  */
 #define GPIO_CTRL_CFG                   0x0228
 #define GPIO_CTRL_CFG_BIT0              FIELD32(0x00000001)
@@ -280,7 +291,14 @@
 #define GPIO_CTRL_CFG_BIT5              FIELD32(0x00000020)
 #define GPIO_CTRL_CFG_BIT6              FIELD32(0x00000040)
 #define GPIO_CTRL_CFG_BIT7              FIELD32(0x00000080)
-#define GPIO_CTRL_CFG_BIT8              FIELD32(0x00000100)
+#define GPIO_CTRL_CFG_GPIOD_BIT0        FIELD32(0x00000100)
+#define GPIO_CTRL_CFG_GPIOD_BIT1        FIELD32(0x00000200)
+#define GPIO_CTRL_CFG_GPIOD_BIT2        FIELD32(0x00000400)
+#define GPIO_CTRL_CFG_GPIOD_BIT3        FIELD32(0x00000800)
+#define GPIO_CTRL_CFG_GPIOD_BIT4        FIELD32(0x00001000)
+#define GPIO_CTRL_CFG_GPIOD_BIT5        FIELD32(0x00002000)
+#define GPIO_CTRL_CFG_GPIOD_BIT6        FIELD32(0x00004000)
+#define GPIO_CTRL_CFG_GPIOD_BIT7        FIELD32(0x00008000)
 
 /*
  * MCU_CMD_CFG
@@ -446,7 +464,7 @@
  */
 #define RF_CSR_CFG                      0x0500
 #define RF_CSR_CFG_DATA                 FIELD32(0x000000ff)
-#define RF_CSR_CFG_REGNUM               FIELD32(0x00001f00)
+#define RF_CSR_CFG_REGNUM              FIELD32(0x00003f00)
 #define RF_CSR_CFG_WRITE                FIELD32(0x00010000)
 #define RF_CSR_CFG_BUSY                 FIELD32(0x00020000)
 
@@ -1136,8 +1154,8 @@
  * PROTECT_RATE: Protection control frame rate for CCK TX(RTS/CTS/CFEnd)
  * PROTECT_CTRL: Protection control frame type for CCK TX
  *               0:none, 1:RTS/CTS, 2:CTS-to-self
- * PROTECT_NAV: TXOP protection type for CCK TX
- *              0:none, 1:ShortNAVprotect, 2:LongNAVProtect
+ * PROTECT_NAV_SHORT: TXOP protection type for CCK TX with short NAV
+ * PROTECT_NAV_LONG: TXOP protection type for CCK TX with long NAV
  * TX_OP_ALLOW_CCK: CCK TXOP allowance, 0:disallow
  * TX_OP_ALLOW_OFDM: CCK TXOP allowance, 0:disallow
  * TX_OP_ALLOW_MM20: CCK TXOP allowance, 0:disallow
@@ -1149,7 +1167,8 @@
 #define CCK_PROT_CFG                    0x1364
 #define CCK_PROT_CFG_PROTECT_RATE       FIELD32(0x0000ffff)
 #define CCK_PROT_CFG_PROTECT_CTRL       FIELD32(0x00030000)
-#define CCK_PROT_CFG_PROTECT_NAV        FIELD32(0x000c0000)
+#define CCK_PROT_CFG_PROTECT_NAV_SHORT  FIELD32(0x00040000)
+#define CCK_PROT_CFG_PROTECT_NAV_LONG   FIELD32(0x00080000)
 #define CCK_PROT_CFG_TX_OP_ALLOW_CCK    FIELD32(0x00100000)
 #define CCK_PROT_CFG_TX_OP_ALLOW_OFDM   FIELD32(0x00200000)
 #define CCK_PROT_CFG_TX_OP_ALLOW_MM20   FIELD32(0x00400000)
@@ -1164,7 +1183,8 @@
 #define OFDM_PROT_CFG                   0x1368
 #define OFDM_PROT_CFG_PROTECT_RATE      FIELD32(0x0000ffff)
 #define OFDM_PROT_CFG_PROTECT_CTRL      FIELD32(0x00030000)
-#define OFDM_PROT_CFG_PROTECT_NAV       FIELD32(0x000c0000)
+#define OFDM_PROT_CFG_PROTECT_NAV_SHORT FIELD32(0x00040000)
+#define OFDM_PROT_CFG_PROTECT_NAV_LONG  FIELD32(0x00080000)
 #define OFDM_PROT_CFG_TX_OP_ALLOW_CCK   FIELD32(0x00100000)
 #define OFDM_PROT_CFG_TX_OP_ALLOW_OFDM  FIELD32(0x00200000)
 #define OFDM_PROT_CFG_TX_OP_ALLOW_MM20  FIELD32(0x00400000)
@@ -1179,7 +1199,8 @@
 #define MM20_PROT_CFG                   0x136c
 #define MM20_PROT_CFG_PROTECT_RATE      FIELD32(0x0000ffff)
 #define MM20_PROT_CFG_PROTECT_CTRL      FIELD32(0x00030000)
-#define MM20_PROT_CFG_PROTECT_NAV       FIELD32(0x000c0000)
+#define MM20_PROT_CFG_PROTECT_NAV_SHORT FIELD32(0x00040000)
+#define MM20_PROT_CFG_PROTECT_NAV_LONG  FIELD32(0x00080000)
 #define MM20_PROT_CFG_TX_OP_ALLOW_CCK   FIELD32(0x00100000)
 #define MM20_PROT_CFG_TX_OP_ALLOW_OFDM  FIELD32(0x00200000)
 #define MM20_PROT_CFG_TX_OP_ALLOW_MM20  FIELD32(0x00400000)
@@ -1194,7 +1215,8 @@
 #define MM40_PROT_CFG                   0x1370
 #define MM40_PROT_CFG_PROTECT_RATE      FIELD32(0x0000ffff)
 #define MM40_PROT_CFG_PROTECT_CTRL      FIELD32(0x00030000)
-#define MM40_PROT_CFG_PROTECT_NAV       FIELD32(0x000c0000)
+#define MM40_PROT_CFG_PROTECT_NAV_SHORT FIELD32(0x00040000)
+#define MM40_PROT_CFG_PROTECT_NAV_LONG  FIELD32(0x00080000)
 #define MM40_PROT_CFG_TX_OP_ALLOW_CCK   FIELD32(0x00100000)
 #define MM40_PROT_CFG_TX_OP_ALLOW_OFDM  FIELD32(0x00200000)
 #define MM40_PROT_CFG_TX_OP_ALLOW_MM20  FIELD32(0x00400000)
@@ -1209,7 +1231,8 @@
 #define GF20_PROT_CFG                   0x1374
 #define GF20_PROT_CFG_PROTECT_RATE      FIELD32(0x0000ffff)
 #define GF20_PROT_CFG_PROTECT_CTRL      FIELD32(0x00030000)
-#define GF20_PROT_CFG_PROTECT_NAV       FIELD32(0x000c0000)
+#define GF20_PROT_CFG_PROTECT_NAV_SHORT FIELD32(0x00040000)
+#define GF20_PROT_CFG_PROTECT_NAV_LONG  FIELD32(0x00080000)
 #define GF20_PROT_CFG_TX_OP_ALLOW_CCK   FIELD32(0x00100000)
 #define GF20_PROT_CFG_TX_OP_ALLOW_OFDM  FIELD32(0x00200000)
 #define GF20_PROT_CFG_TX_OP_ALLOW_MM20  FIELD32(0x00400000)
@@ -1224,7 +1247,8 @@
 #define GF40_PROT_CFG                   0x1378
 #define GF40_PROT_CFG_PROTECT_RATE      FIELD32(0x0000ffff)
 #define GF40_PROT_CFG_PROTECT_CTRL      FIELD32(0x00030000)
-#define GF40_PROT_CFG_PROTECT_NAV       FIELD32(0x000c0000)
+#define GF40_PROT_CFG_PROTECT_NAV_SHORT FIELD32(0x00040000)
+#define GF40_PROT_CFG_PROTECT_NAV_LONG  FIELD32(0x00080000)
 #define GF40_PROT_CFG_TX_OP_ALLOW_CCK   FIELD32(0x00100000)
 #define GF40_PROT_CFG_TX_OP_ALLOW_OFDM  FIELD32(0x00200000)
 #define GF40_PROT_CFG_TX_OP_ALLOW_MM20  FIELD32(0x00400000)
@@ -1701,11 +1725,14 @@ struct mac_iveiv_entry {
  */
 
 /*
- * BBP 1: TX Antenna & Power
- * POWER: 0 - normal, 1 - drop tx power by 6dBm, 2 - drop tx power by 12dBm,
- *      3 - increase tx power by 6dBm
+ * BBP 1: TX Antenna & Power Control
+ * POWER_CTRL:
+ * 0 - normal,
+ * 1 - drop tx power by 6dBm,
+ * 2 - drop tx power by 12dBm,
+ * 3 - increase tx power by 6dBm
  */
-#define BBP1_TX_POWER                   FIELD8(0x07)
+#define BBP1_TX_POWER_CTRL              FIELD8(0x07)
 #define BBP1_TX_ANTENNA                 FIELD8(0x18)
 
 /*
@@ -1719,6 +1746,13 @@ struct mac_iveiv_entry {
  */
 #define BBP4_TX_BF                      FIELD8(0x01)
 #define BBP4_BANDWIDTH                  FIELD8(0x18)
+#define BBP4_MAC_IF_CTRL               FIELD8(0x40)
+
+/*
+ * BBP 109
+ */
+#define BBP109_TX0_POWER       FIELD8(0x0f)
+#define BBP109_TX1_POWER       FIELD8(0xf0)
 
 /*
  * BBP 138: Unknown
@@ -1729,6 +1763,11 @@ struct mac_iveiv_entry {
 #define BBP138_TX_DAC2                  FIELD8(0x40)
 
 /*
+ * BBP 152: Rx Ant
+ */
+#define BBP152_RX_DEFAULT_ANT  FIELD8(0x80)
+
+/*
  * RFCSR registers
  * The wordsize of the RFCSR is 8 bits.
  */
@@ -1737,12 +1776,18 @@ struct mac_iveiv_entry {
  * RFCSR 1:
  */
 #define RFCSR1_RF_BLOCK_EN              FIELD8(0x01)
+#define RFCSR1_PLL_PD                  FIELD8(0x02)
 #define RFCSR1_RX0_PD                   FIELD8(0x04)
 #define RFCSR1_TX0_PD                   FIELD8(0x08)
 #define RFCSR1_RX1_PD                   FIELD8(0x10)
 #define RFCSR1_TX1_PD                   FIELD8(0x20)
 
 /*
+ * RFCSR 2:
+ */
+#define RFCSR2_RESCAL_EN               FIELD8(0x80)
+
+/*
  * RFCSR 6:
  */
 #define RFCSR6_R1                       FIELD8(0x03)
@@ -1754,6 +1799,11 @@ struct mac_iveiv_entry {
 #define RFCSR7_RF_TUNING                FIELD8(0x01)
 
 /*
+ * RFCSR 11:
+ */
+#define RFCSR11_R                      FIELD8(0x03)
+
+/*
  * RFCSR 12:
  */
 #define RFCSR12_TX_POWER                FIELD8(0x1f)
@@ -1774,6 +1824,7 @@ struct mac_iveiv_entry {
 #define RFCSR17_TXMIXER_GAIN            FIELD8(0x07)
 #define RFCSR17_TX_LO1_EN               FIELD8(0x08)
 #define RFCSR17_R                       FIELD8(0x20)
+#define RFCSR17_CODE                   FIELD8(0x7f)
 
 /*
  * RFCSR 20:
@@ -1806,6 +1857,9 @@ struct mac_iveiv_entry {
 /*
  * RFCSR 30:
  */
+#define RFCSR30_TX_H20M                FIELD8(0x02)
+#define RFCSR30_RX_H20M                FIELD8(0x04)
+#define RFCSR30_RX_VCM         FIELD8(0x18)
 #define RFCSR30_RF_CALIBRATION          FIELD8(0x80)
 
 /*
@@ -1815,6 +1869,21 @@ struct mac_iveiv_entry {
 #define RFCSR31_RX_H20M                 FIELD8(0x20)
 
 /*
+ * RFCSR 38:
+ */
+#define RFCSR38_RX_LO1_EN      FIELD8(0x20)
+
+/*
+ * RFCSR 39:
+ */
+#define RFCSR39_RX_LO2_EN      FIELD8(0x80)
+
+/*
+ * RFCSR 49:
+ */
+#define RFCSR49_TX                     FIELD8(0x3f)
+
+/*
  * RF registers
  */
 
@@ -1847,6 +1916,11 @@ struct mac_iveiv_entry {
  */
 
 /*
+ * Chip ID
+ */
+#define EEPROM_CHIP_ID         0x0000
+
+/*
  * EEPROM Version
  */
 #define EEPROM_VERSION                  0x0001
@@ -1999,23 +2073,26 @@ struct mac_iveiv_entry {
 #define EEPROM_RSSI_A2_LNA_A2           FIELD16(0xff00)
 
 /*
- * EEPROM Maximum TX power values
+ * EEPROM EIRP Maximum TX power values(unit: dbm)
  */
-#define EEPROM_MAX_TX_POWER             0x0027
-#define EEPROM_MAX_TX_POWER_24GHZ       FIELD16(0x00ff)
-#define EEPROM_MAX_TX_POWER_5GHZ        FIELD16(0xff00)
+#define EEPROM_EIRP_MAX_TX_POWER        0x0027
+#define EEPROM_EIRP_MAX_TX_POWER_2GHZ   FIELD16(0x00ff)
+#define EEPROM_EIRP_MAX_TX_POWER_5GHZ   FIELD16(0xff00)
 
 /*
  * EEPROM TXpower delta: 20MHZ AND 40 MHZ use different power.
  * This is delta in 40MHZ.
- * VALUE: Tx Power dalta value (MAX=4)
+ * VALUE: Tx Power dalta value, MAX=4(unit: dbm)
  * TYPE: 1: Plus the delta value, 0: minus the delta value
- * TXPOWER: Enable:
+ * ENABLE: enable tx power compensation for 40BW
  */
 #define EEPROM_TXPOWER_DELTA            0x0028
-#define EEPROM_TXPOWER_DELTA_VALUE      FIELD16(0x003f)
-#define EEPROM_TXPOWER_DELTA_TYPE       FIELD16(0x0040)
-#define EEPROM_TXPOWER_DELTA_TXPOWER    FIELD16(0x0080)
+#define EEPROM_TXPOWER_DELTA_VALUE_2G   FIELD16(0x003f)
+#define EEPROM_TXPOWER_DELTA_TYPE_2G    FIELD16(0x0040)
+#define EEPROM_TXPOWER_DELTA_ENABLE_2G  FIELD16(0x0080)
+#define EEPROM_TXPOWER_DELTA_VALUE_5G   FIELD16(0x3f00)
+#define EEPROM_TXPOWER_DELTA_TYPE_5G    FIELD16(0x4000)
+#define EEPROM_TXPOWER_DELTA_ENABLE_5G  FIELD16(0x8000)
 
 /*
  * EEPROM TXPOWER 802.11BG
@@ -2068,6 +2145,7 @@ struct mac_iveiv_entry {
 #define MCU_LED_LED_POLARITY            0x54
 #define MCU_RADAR                       0x60
 #define MCU_BOOT_SIGNAL                 0x72
+#define MCU_ANT_SELECT                  0X73
 #define MCU_BBP_SIGNAL                  0x80
 #define MCU_POWER_SAVE                  0x83
 
@@ -2212,4 +2290,9 @@ struct mac_iveiv_entry {
 #define TXPOWER_A_TO_DEV(__txpower) \
         clamp_t(char, __txpower, MIN_A_TXPOWER, MAX_A_TXPOWER)
 
+/*
+ *  Board's maximun TX power limitation
+ */
+#define EIRP_MAX_TX_POWER_LIMIT 0x50
+
 #endif /* RT2800_H */
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
index c9bf074342ba..3da78bf0ca26 100644
--- a/drivers/net/wireless/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/rt2x00/rt2800lib.c
@@ -400,8 +400,15 @@ int rt2800_load_firmware(struct rt2x00_dev *rt2x00dev,
         if (rt2800_wait_csr_ready(rt2x00dev))
                 return -EBUSY;
 
-        if (rt2x00_is_pci(rt2x00dev))
+       if (rt2x00_is_pci(rt2x00dev)) {
+               if (rt2x00_rt(rt2x00dev, RT5390)) {
+                       rt2800_register_read(rt2x00dev, AUX_CTRL, &reg);
+                       rt2x00_set_field32(&reg, AUX_CTRL_FORCE_PCIE_CLK, 1);
+                       rt2x00_set_field32(&reg, AUX_CTRL_WAKE_PCIE_EN, 1);
+                       rt2800_register_write(rt2x00dev, AUX_CTRL, reg);
+               }
                 rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000002);
+       }
 
         /*
          * Disable DMA, will be reenabled later when enabling
@@ -773,13 +780,14 @@ void rt2800_write_beacon(struct queue_entry *entry, struct txentry_desc *txdesc)
         struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
         unsigned int beacon_base;
         unsigned int padding_len;
-        u32 reg;
+        u32 orig_reg, reg;
 
         /*
          * Disable beaconing while we are reloading the beacon data,
          * otherwise we might be sending out invalid data.
          */
         rt2800_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
+        orig_reg = reg;
         rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 0);
         rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
 
@@ -810,7 +818,14 @@ void rt2800_write_beacon(struct queue_entry *entry, struct txentry_desc *txdesc)
          * Write entire beacon with TXWI and padding to register.
          */
         padding_len = roundup(entry->skb->len, 4) - entry->skb->len;
-        skb_pad(entry->skb, padding_len);
+        if (padding_len && skb_pad(entry->skb, padding_len)) {
+                ERROR(rt2x00dev, "Failure padding beacon, aborting\n");
+                /* skb freed by skb_pad() on failure */
+                entry->skb = NULL;
+                rt2800_register_write(rt2x00dev, BCN_TIME_CFG, orig_reg);
+                return;
+        }
+
         beacon_base = HW_BEACON_OFFSET(entry->entry_idx);
         rt2800_register_multiwrite(rt2x00dev, beacon_base, entry->skb->data,
                                    entry->skb->len + padding_len);
@@ -1368,10 +1383,32 @@ void rt2800_config_erp(struct rt2x00_dev *rt2x00dev, struct rt2x00lib_erp *erp,
 }
 EXPORT_SYMBOL_GPL(rt2800_config_erp);
 
+static void rt2800_set_ant_diversity(struct rt2x00_dev *rt2x00dev,
+                                     enum antenna ant)
+{
+        u32 reg;
+        u8 eesk_pin = (ant == ANTENNA_A) ? 1 : 0;
+        u8 gpio_bit3 = (ant == ANTENNA_A) ? 0 : 1;
+
+        if (rt2x00_is_pci(rt2x00dev)) {
+                rt2800_register_read(rt2x00dev, E2PROM_CSR, &reg);
+                rt2x00_set_field32(&reg, E2PROM_CSR_DATA_CLOCK, eesk_pin);
+                rt2800_register_write(rt2x00dev, E2PROM_CSR, reg);
+        } else if (rt2x00_is_usb(rt2x00dev))
+                rt2800_mcu_request(rt2x00dev, MCU_ANT_SELECT, 0xff,
+                                   eesk_pin, 0);
+
+        rt2800_register_read(rt2x00dev, GPIO_CTRL_CFG, &reg);
+        rt2x00_set_field32(&reg, GPIO_CTRL_CFG_GPIOD_BIT3, 0);
+        rt2x00_set_field32(&reg, GPIO_CTRL_CFG_BIT3, gpio_bit3);
+        rt2800_register_write(rt2x00dev, GPIO_CTRL_CFG, reg);
+}
+
 void rt2800_config_ant(struct rt2x00_dev *rt2x00dev, struct antenna_setup *ant)
 {
         u8 r1;
         u8 r3;
+        u16 eeprom;
 
         rt2800_bbp_read(rt2x00dev, 1, &r1);
         rt2800_bbp_read(rt2x00dev, 3, &r3);
@@ -1379,7 +1416,7 @@ void rt2800_config_ant(struct rt2x00_dev *rt2x00dev, struct antenna_setup *ant)
         /*
          * Configure the TX antenna.
          */
-        switch ((int)ant->tx) {
+        switch (ant->tx_chain_num) {
         case 1:
                 rt2x00_set_field8(&r1, BBP1_TX_ANTENNA, 0);
                 break;
@@ -1394,8 +1431,18 @@ void rt2800_config_ant(struct rt2x00_dev *rt2x00dev, struct antenna_setup *ant)
         /*
          * Configure the RX antenna.
          */
-        switch ((int)ant->rx) {
+        switch (ant->rx_chain_num) {
         case 1:
+                if (rt2x00_rt(rt2x00dev, RT3070) ||
+                    rt2x00_rt(rt2x00dev, RT3090) ||
+                    rt2x00_rt(rt2x00dev, RT3390)) {
+                        rt2x00_eeprom_read(rt2x00dev,
+                                           EEPROM_NIC_CONF1, &eeprom);
+                        if (rt2x00_get_field16(eeprom,
+                                                EEPROM_NIC_CONF1_ANT_DIVERSITY))
+                                rt2800_set_ant_diversity(rt2x00dev,
+                                                rt2x00dev->default_ant.rx);
+                }
                 rt2x00_set_field8(&r3, BBP3_RX_ANTENNA, 0);
                 break;
         case 2:
@@ -1441,13 +1488,13 @@ static void rt2800_config_channel_rf2xxx(struct rt2x00_dev *rt2x00dev,
 {
         rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
 
-        if (rt2x00dev->default_ant.tx == 1)
+        if (rt2x00dev->default_ant.tx_chain_num == 1)
                 rt2x00_set_field32(&rf->rf2, RF2_ANTENNA_TX1, 1);
 
-        if (rt2x00dev->default_ant.rx == 1) {
+        if (rt2x00dev->default_ant.rx_chain_num == 1) {
                 rt2x00_set_field32(&rf->rf2, RF2_ANTENNA_RX1, 1);
                 rt2x00_set_field32(&rf->rf2, RF2_ANTENNA_RX2, 1);
-        } else if (rt2x00dev->default_ant.rx == 2)
+        } else if (rt2x00dev->default_ant.rx_chain_num == 2)
                 rt2x00_set_field32(&rf->rf2, RF2_ANTENNA_RX2, 1);
 
         if (rf->channel > 14) {
@@ -1533,6 +1580,99 @@ static void rt2800_config_channel_rf3xxx(struct rt2x00_dev *rt2x00dev,
         rt2800_rfcsr_write(rt2x00dev, 7, rfcsr);
 }
 
+
+#define RT5390_POWER_BOUND     0x27
+#define RT5390_FREQ_OFFSET_BOUND       0x5f
+
+static void rt2800_config_channel_rf53xx(struct rt2x00_dev *rt2x00dev,
+                                        struct ieee80211_conf *conf,
+                                        struct rf_channel *rf,
+                                        struct channel_info *info)
+{
+       u8 rfcsr;
+       u16 eeprom;
+
+       rt2800_rfcsr_write(rt2x00dev, 8, rf->rf1);
+       rt2800_rfcsr_write(rt2x00dev, 9, rf->rf3);
+       rt2800_rfcsr_read(rt2x00dev, 11, &rfcsr);
+       rt2x00_set_field8(&rfcsr, RFCSR11_R, rf->rf2);
+       rt2800_rfcsr_write(rt2x00dev, 11, rfcsr);
+
+       rt2800_rfcsr_read(rt2x00dev, 49, &rfcsr);
+       if (info->default_power1 > RT5390_POWER_BOUND)
+               rt2x00_set_field8(&rfcsr, RFCSR49_TX, RT5390_POWER_BOUND);
+       else
+               rt2x00_set_field8(&rfcsr, RFCSR49_TX, info->default_power1);
+       rt2800_rfcsr_write(rt2x00dev, 49, rfcsr);
+
+       rt2800_rfcsr_read(rt2x00dev, 1, &rfcsr);
+       rt2x00_set_field8(&rfcsr, RFCSR1_RF_BLOCK_EN, 1);
+       rt2x00_set_field8(&rfcsr, RFCSR1_PLL_PD, 1);
+       rt2x00_set_field8(&rfcsr, RFCSR1_RX0_PD, 1);
+       rt2x00_set_field8(&rfcsr, RFCSR1_TX0_PD, 1);
+       rt2800_rfcsr_write(rt2x00dev, 1, rfcsr);
+
+       rt2800_rfcsr_read(rt2x00dev, 17, &rfcsr);
+       if (rt2x00dev->freq_offset > RT5390_FREQ_OFFSET_BOUND)
+               rt2x00_set_field8(&rfcsr, RFCSR17_CODE, RT5390_FREQ_OFFSET_BOUND);
+       else
+               rt2x00_set_field8(&rfcsr, RFCSR17_CODE, rt2x00dev->freq_offset);
+       rt2800_rfcsr_write(rt2x00dev, 17, rfcsr);
+
+       rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1, &eeprom);
+       if (rf->channel <= 14) {
+               int idx = rf->channel-1;
+
+               if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF1_BT_COEXIST)) {
+                       if (rt2x00_rt_rev_gte(rt2x00dev, RT5390, REV_RT5390F)) {
+                               /* r55/r59 value array of channel 1~14 */
+                               static const char r55_bt_rev[] = {0x83, 0x83,
+                                       0x83, 0x73, 0x73, 0x63, 0x53, 0x53,
+                                       0x53, 0x43, 0x43, 0x43, 0x43, 0x43};
+                               static const char r59_bt_rev[] = {0x0e, 0x0e,
+                                       0x0e, 0x0e, 0x0e, 0x0b, 0x0a, 0x09,
+                                       0x07, 0x07, 0x07, 0x07, 0x07, 0x07};
+
+                               rt2800_rfcsr_write(rt2x00dev, 55, r55_bt_rev[idx]);
+                               rt2800_rfcsr_write(rt2x00dev, 59, r59_bt_rev[idx]);
+                       } else {
+                               static const char r59_bt[] = {0x8b, 0x8b, 0x8b,
+                                       0x8b, 0x8b, 0x8b, 0x8b, 0x8a, 0x89,
+                                       0x88, 0x88, 0x86, 0x85, 0x84};
+
+                               rt2800_rfcsr_write(rt2x00dev, 59, r59_bt[idx]);
+                       }
+               } else {
+                       if (rt2x00_rt_rev_gte(rt2x00dev, RT5390, REV_RT5390F)) {
+                               static const char r55_nonbt_rev[] = {0x23, 0x23,
+                                       0x23, 0x23, 0x13, 0x13, 0x03, 0x03,
+                                       0x03, 0x03, 0x03, 0x03, 0x03, 0x03};
+                               static const char r59_nonbt_rev[] = {0x07, 0x07,
+                                       0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
+                                       0x07, 0x07, 0x06, 0x05, 0x04, 0x04};
+
+                               rt2800_rfcsr_write(rt2x00dev, 55, r55_nonbt_rev[idx]);
+                               rt2800_rfcsr_write(rt2x00dev, 59, r59_nonbt_rev[idx]);
+                       } else if (rt2x00_rt(rt2x00dev, RT5390)) {
+                               static const char r59_non_bt[] = {0x8f, 0x8f,
+                                       0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x8d,
+                                       0x8a, 0x88, 0x88, 0x87, 0x87, 0x86};
+
+                               rt2800_rfcsr_write(rt2x00dev, 59, r59_non_bt[idx]);
+                       }
+               }
+       }
+
+       rt2800_rfcsr_read(rt2x00dev, 30, &rfcsr);
+       rt2x00_set_field8(&rfcsr, RFCSR30_TX_H20M, 0);
+       rt2x00_set_field8(&rfcsr, RFCSR30_RX_H20M, 0);
+       rt2800_rfcsr_write(rt2x00dev, 30, rfcsr);
+
+       rt2800_rfcsr_read(rt2x00dev, 3, &rfcsr);
+       rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 1);
+       rt2800_rfcsr_write(rt2x00dev, 3, rfcsr);
+}
+
 static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev,
                                   struct ieee80211_conf *conf,
                                   struct rf_channel *rf,
@@ -1557,6 +1697,8 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev,
             rt2x00_rf(rt2x00dev, RF3052) ||
             rt2x00_rf(rt2x00dev, RF3320))
                 rt2800_config_channel_rf3xxx(rt2x00dev, conf, rf, info);
+       else if (rt2x00_rf(rt2x00dev, RF5390))
+               rt2800_config_channel_rf53xx(rt2x00dev, conf, rf, info);
         else
                 rt2800_config_channel_rf2xxx(rt2x00dev, conf, rf, info);
 
@@ -1569,12 +1711,14 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev,
         rt2800_bbp_write(rt2x00dev, 86, 0);
 
         if (rf->channel <= 14) {
-                if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags)) {
-                        rt2800_bbp_write(rt2x00dev, 82, 0x62);
-                        rt2800_bbp_write(rt2x00dev, 75, 0x46);
-                } else {
-                        rt2800_bbp_write(rt2x00dev, 82, 0x84);
-                        rt2800_bbp_write(rt2x00dev, 75, 0x50);
+               if (!rt2x00_rt(rt2x00dev, RT5390)) {
+                       if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags)) {
+                               rt2800_bbp_write(rt2x00dev, 82, 0x62);
+                               rt2800_bbp_write(rt2x00dev, 75, 0x46);
+                       } else {
+                               rt2800_bbp_write(rt2x00dev, 82, 0x84);
+                               rt2800_bbp_write(rt2x00dev, 75, 0x50);
+                       }
                 }
         } else {
                 rt2800_bbp_write(rt2x00dev, 82, 0xf2);
@@ -1594,13 +1738,13 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev,
         tx_pin = 0;
 
         /* Turn on unused PA or LNA when not using 1T or 1R */
-        if (rt2x00dev->default_ant.tx != 1) {
+        if (rt2x00dev->default_ant.tx_chain_num == 2) {
                 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_A1_EN, 1);
                 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G1_EN, 1);
         }
 
         /* Turn on unused PA or LNA when not using 1T or 1R */
-        if (rt2x00dev->default_ant.rx != 1) {
+        if (rt2x00dev->default_ant.rx_chain_num == 2) {
                 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_A1_EN, 1);
                 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_G1_EN, 1);
         }
@@ -1644,30 +1788,116 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev,
         rt2800_register_read(rt2x00dev, CH_BUSY_STA_SEC, &reg);
 }
 
+static int rt2800_get_txpower_bw_comp(struct rt2x00_dev *rt2x00dev,
+                                      enum ieee80211_band band)
+{
+        u16 eeprom;
+        u8 comp_en;
+        u8 comp_type;
+        int comp_value;
+
+        rt2x00_eeprom_read(rt2x00dev, EEPROM_TXPOWER_DELTA, &eeprom);
+
+        if (eeprom == 0xffff)
+                return 0;
+
+        if (band == IEEE80211_BAND_2GHZ) {
+                comp_en = rt2x00_get_field16(eeprom,
+                                 EEPROM_TXPOWER_DELTA_ENABLE_2G);
+                if (comp_en) {
+                        comp_type = rt2x00_get_field16(eeprom,
+                                           EEPROM_TXPOWER_DELTA_TYPE_2G);
+                        comp_value = rt2x00_get_field16(eeprom,
+                                            EEPROM_TXPOWER_DELTA_VALUE_2G);
+                        if (!comp_type)
+                                comp_value = -comp_value;
+                }
+        } else {
+                comp_en = rt2x00_get_field16(eeprom,
+                                 EEPROM_TXPOWER_DELTA_ENABLE_5G);
+                if (comp_en) {
+                        comp_type = rt2x00_get_field16(eeprom,
+                                           EEPROM_TXPOWER_DELTA_TYPE_5G);
+                        comp_value = rt2x00_get_field16(eeprom,
+                                            EEPROM_TXPOWER_DELTA_VALUE_5G);
+                        if (!comp_type)
+                                comp_value = -comp_value;
+                }
+        }
+
+        return comp_value;
+}
+
+static u8 rt2800_compesate_txpower(struct rt2x00_dev *rt2x00dev,
+                                     int is_rate_b,
+                                     enum ieee80211_band band,
+                                     int power_level,
+                                     u8 txpower)
+{
+        u32 reg;
+        u16 eeprom;
+        u8 criterion;
+        u8 eirp_txpower;
+        u8 eirp_txpower_criterion;
+        u8 reg_limit;
+        int bw_comp = 0;
+
+        if (!((band == IEEE80211_BAND_5GHZ) && is_rate_b))
+                return txpower;
+
+        if (test_bit(CONFIG_CHANNEL_HT40, &rt2x00dev->flags))
+                bw_comp = rt2800_get_txpower_bw_comp(rt2x00dev, band);
+
+        if (test_bit(CONFIG_SUPPORT_POWER_LIMIT, &rt2x00dev->flags)) {
+                /*
+                 * Check if eirp txpower exceed txpower_limit.
+                 * We use OFDM 6M as criterion and its eirp txpower
+                 * is stored at EEPROM_EIRP_MAX_TX_POWER.
+                 * .11b data rate need add additional 4dbm
+                 * when calculating eirp txpower.
+                 */
+                rt2800_register_read(rt2x00dev, TX_PWR_CFG_0, &reg);
+                criterion = rt2x00_get_field32(reg, TX_PWR_CFG_0_6MBS);
+
+                rt2x00_eeprom_read(rt2x00dev,
+                                   EEPROM_EIRP_MAX_TX_POWER, &eeprom);
+
+                if (band == IEEE80211_BAND_2GHZ)
+                        eirp_txpower_criterion = rt2x00_get_field16(eeprom,
+                                                 EEPROM_EIRP_MAX_TX_POWER_2GHZ);
+                else
+                        eirp_txpower_criterion = rt2x00_get_field16(eeprom,
+                                                 EEPROM_EIRP_MAX_TX_POWER_5GHZ);
+
+                eirp_txpower = eirp_txpower_criterion + (txpower - criterion) +
+                                       (is_rate_b ? 4 : 0) + bw_comp;
+
+                reg_limit = (eirp_txpower > power_level) ?
+                                        (eirp_txpower - power_level) : 0;
+        } else
+                reg_limit = 0;
+
+        return txpower + bw_comp - reg_limit;
+}
+
 static void rt2800_config_txpower(struct rt2x00_dev *rt2x00dev,
-                                  const int max_txpower)
+                                  struct ieee80211_conf *conf)
 {
         u8 txpower;
-        u8 max_value = (u8)max_txpower;
         u16 eeprom;
-        int i;
+        int i, is_rate_b;
         u32 reg;
         u8 r1;
         u32 offset;
+        enum ieee80211_band band = conf->channel->band;
+        int power_level = conf->power_level;
 
         /*
-         * set to normal tx power mode: +/- 0dBm
+         * set to normal bbp tx power control mode: +/- 0dBm
          */
         rt2800_bbp_read(rt2x00dev, 1, &r1);
-        rt2x00_set_field8(&r1, BBP1_TX_POWER, 0);
+        rt2x00_set_field8(&r1, BBP1_TX_POWER_CTRL, 0);
         rt2800_bbp_write(rt2x00dev, 1, r1);
-
-        /*
-         * The eeprom contains the tx power values for each rate. These
-         * values map to 100% tx power. Each 16bit word contains four tx
-         * power values and the order is the same as used in the TX_PWR_CFG
-         * registers.
-         */
         offset = TX_PWR_CFG_0;
 
         for (i = 0; i < EEPROM_TXPOWER_BYRATE_SIZE; i += 2) {
@@ -1681,73 +1911,99 @@ static void rt2800_config_txpower(struct rt2x00_dev *rt2x00dev,
                 rt2x00_eeprom_read(rt2x00dev, EEPROM_TXPOWER_BYRATE + i,
                                    &eeprom);
 
-                /* TX_PWR_CFG_0: 1MBS, TX_PWR_CFG_1: 24MBS,
+                is_rate_b = i ? 0 : 1;
+                /*
+                 * TX_PWR_CFG_0: 1MBS, TX_PWR_CFG_1: 24MBS,
                  * TX_PWR_CFG_2: MCS4, TX_PWR_CFG_3: MCS12,
-                 * TX_PWR_CFG_4: unknown */
+                 * TX_PWR_CFG_4: unknown
+                 */
                 txpower = rt2x00_get_field16(eeprom,
                                              EEPROM_TXPOWER_BYRATE_RATE0);
-                rt2x00_set_field32(&reg, TX_PWR_CFG_RATE0,
-                                   min(txpower, max_value));
+                txpower = rt2800_compesate_txpower(rt2x00dev, is_rate_b, band,
+                                             power_level, txpower);
+                rt2x00_set_field32(&reg, TX_PWR_CFG_RATE0, txpower);
 
-                /* TX_PWR_CFG_0: 2MBS, TX_PWR_CFG_1: 36MBS,
+                /*
+                 * TX_PWR_CFG_0: 2MBS, TX_PWR_CFG_1: 36MBS,
                  * TX_PWR_CFG_2: MCS5, TX_PWR_CFG_3: MCS13,
-                 * TX_PWR_CFG_4: unknown */
+                 * TX_PWR_CFG_4: unknown
+                 */
                 txpower = rt2x00_get_field16(eeprom,
                                              EEPROM_TXPOWER_BYRATE_RATE1);
-                rt2x00_set_field32(&reg, TX_PWR_CFG_RATE1,
-                                   min(txpower, max_value));
+                txpower = rt2800_compesate_txpower(rt2x00dev, is_rate_b, band,
+                                             power_level, txpower);
+                rt2x00_set_field32(&reg, TX_PWR_CFG_RATE1, txpower);
 
-                /* TX_PWR_CFG_0: 55MBS, TX_PWR_CFG_1: 48MBS,
+                /*
+                 * TX_PWR_CFG_0: 5.5MBS, TX_PWR_CFG_1: 48MBS,
                  * TX_PWR_CFG_2: MCS6,  TX_PWR_CFG_3: MCS14,
-                 * TX_PWR_CFG_4: unknown */
+                 * TX_PWR_CFG_4: unknown
+                 */
                 txpower = rt2x00_get_field16(eeprom,
                                              EEPROM_TXPOWER_BYRATE_RATE2);
-                rt2x00_set_field32(&reg, TX_PWR_CFG_RATE2,
-                                   min(txpower, max_value));
+                txpower = rt2800_compesate_txpower(rt2x00dev, is_rate_b, band,
+                                             power_level, txpower);
+                rt2x00_set_field32(&reg, TX_PWR_CFG_RATE2, txpower);
 
-                /* TX_PWR_CFG_0: 11MBS, TX_PWR_CFG_1: 54MBS,
+                /*
+                 * TX_PWR_CFG_0: 11MBS, TX_PWR_CFG_1: 54MBS,
                  * TX_PWR_CFG_2: MCS7,  TX_PWR_CFG_3: MCS15,
-                 * TX_PWR_CFG_4: unknown */
+                 * TX_PWR_CFG_4: unknown
+                 */
                 txpower = rt2x00_get_field16(eeprom,
                                              EEPROM_TXPOWER_BYRATE_RATE3);
-                rt2x00_set_field32(&reg, TX_PWR_CFG_RATE3,
-                                   min(txpower, max_value));
+                txpower = rt2800_compesate_txpower(rt2x00dev, is_rate_b, band,
+                                             power_level, txpower);
+                rt2x00_set_field32(&reg, TX_PWR_CFG_RATE3, txpower);
 
                 /* read the next four txpower values */
                 rt2x00_eeprom_read(rt2x00dev, EEPROM_TXPOWER_BYRATE + i + 1,
                                    &eeprom);
 
-                /* TX_PWR_CFG_0: 6MBS, TX_PWR_CFG_1: MCS0,
+                is_rate_b = 0;
+                /*
+                 * TX_PWR_CFG_0: 6MBS, TX_PWR_CFG_1: MCS0,
                  * TX_PWR_CFG_2: MCS8, TX_PWR_CFG_3: unknown,
-                 * TX_PWR_CFG_4: unknown */
+                 * TX_PWR_CFG_4: unknown
+                 */
                 txpower = rt2x00_get_field16(eeprom,
                                              EEPROM_TXPOWER_BYRATE_RATE0);
-                rt2x00_set_field32(&reg, TX_PWR_CFG_RATE4,
-                                   min(txpower, max_value));
+                txpower = rt2800_compesate_txpower(rt2x00dev, is_rate_b, band,
+                                             power_level, txpower);
+                rt2x00_set_field32(&reg, TX_PWR_CFG_RATE4, txpower);
 
-                /* TX_PWR_CFG_0: 9MBS, TX_PWR_CFG_1: MCS1,
+                /*
+                 * TX_PWR_CFG_0: 9MBS, TX_PWR_CFG_1: MCS1,
                  * TX_PWR_CFG_2: MCS9, TX_PWR_CFG_3: unknown,
-                 * TX_PWR_CFG_4: unknown */
+                 * TX_PWR_CFG_4: unknown
+                 */
                 txpower = rt2x00_get_field16(eeprom,
                                              EEPROM_TXPOWER_BYRATE_RATE1);
-                rt2x00_set_field32(&reg, TX_PWR_CFG_RATE5,
-                                   min(txpower, max_value));
+                txpower = rt2800_compesate_txpower(rt2x00dev, is_rate_b, band,
+                                             power_level, txpower);
+                rt2x00_set_field32(&reg, TX_PWR_CFG_RATE5, txpower);
 
-                /* TX_PWR_CFG_0: 12MBS, TX_PWR_CFG_1: MCS2,
+                /*
+                 * TX_PWR_CFG_0: 12MBS, TX_PWR_CFG_1: MCS2,
                  * TX_PWR_CFG_2: MCS10, TX_PWR_CFG_3: unknown,
-                 * TX_PWR_CFG_4: unknown */
+                 * TX_PWR_CFG_4: unknown
+                 */
                 txpower = rt2x00_get_field16(eeprom,
                                              EEPROM_TXPOWER_BYRATE_RATE2);
-                rt2x00_set_field32(&reg, TX_PWR_CFG_RATE6,
-                                   min(txpower, max_value));
+                txpower = rt2800_compesate_txpower(rt2x00dev, is_rate_b, band,
+                                             power_level, txpower);
+                rt2x00_set_field32(&reg, TX_PWR_CFG_RATE6, txpower);
 
-                /* TX_PWR_CFG_0: 18MBS, TX_PWR_CFG_1: MCS3,
+                /*
+                 * TX_PWR_CFG_0: 18MBS, TX_PWR_CFG_1: MCS3,
                  * TX_PWR_CFG_2: MCS11, TX_PWR_CFG_3: unknown,
-                 * TX_PWR_CFG_4: unknown */
+                 * TX_PWR_CFG_4: unknown
+                 */
                 txpower = rt2x00_get_field16(eeprom,
                                              EEPROM_TXPOWER_BYRATE_RATE3);
-                rt2x00_set_field32(&reg, TX_PWR_CFG_RATE7,
-                                   min(txpower, max_value));
+                txpower = rt2800_compesate_txpower(rt2x00dev, is_rate_b, band,
+                                             power_level, txpower);
+                rt2x00_set_field32(&reg, TX_PWR_CFG_RATE7, txpower);
 
                 rt2800_register_write(rt2x00dev, offset, reg);
 
@@ -1806,11 +2062,13 @@ void rt2800_config(struct rt2x00_dev *rt2x00dev,
         /* Always recalculate LNA gain before changing configuration */
         rt2800_config_lna_gain(rt2x00dev, libconf);
 
-        if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
+        if (flags & IEEE80211_CONF_CHANGE_CHANNEL) {
                 rt2800_config_channel(rt2x00dev, libconf->conf,
                                       &libconf->rf, &libconf->channel);
+                rt2800_config_txpower(rt2x00dev, libconf->conf);
+        }
         if (flags & IEEE80211_CONF_CHANGE_POWER)
-                rt2800_config_txpower(rt2x00dev, libconf->conf->power_level);
+                rt2800_config_txpower(rt2x00dev, libconf->conf);
         if (flags & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
                 rt2800_config_retry_limit(rt2x00dev, libconf);
         if (flags & IEEE80211_CONF_CHANGE_PS)
@@ -1839,7 +2097,8 @@ static u8 rt2800_get_default_vgc(struct rt2x00_dev *rt2x00dev)
                 if (rt2x00_rt(rt2x00dev, RT3070) ||
                     rt2x00_rt(rt2x00dev, RT3071) ||
                     rt2x00_rt(rt2x00dev, RT3090) ||
-                    rt2x00_rt(rt2x00dev, RT3390))
+                   rt2x00_rt(rt2x00dev, RT3390) ||
+                   rt2x00_rt(rt2x00dev, RT5390))
                         return 0x1c + (2 * rt2x00dev->lna_gain);
                 else
                         return 0x2e + rt2x00dev->lna_gain;
@@ -1971,6 +2230,10 @@ static int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
                 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);
                 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000);
                 rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x0000001f);
+       } else if (rt2x00_rt(rt2x00dev, RT5390)) {
+               rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404);
+               rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
+               rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
         } else {
                 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000000);
                 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
@@ -2039,7 +2302,7 @@ static int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
         rt2800_register_read(rt2x00dev, CCK_PROT_CFG, &reg);
         rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_RATE, 3);
         rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_CTRL, 0);
-        rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_NAV, 1);
+        rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_NAV_SHORT, 1);
         rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_CCK, 1);
         rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
         rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_MM20, 1);
@@ -2052,7 +2315,7 @@ static int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
         rt2800_register_read(rt2x00dev, OFDM_PROT_CFG, &reg);
         rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_RATE, 3);
         rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_CTRL, 0);
-        rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_NAV, 1);
+        rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_NAV_SHORT, 1);
         rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_CCK, 1);
         rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
         rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_MM20, 1);
@@ -2065,7 +2328,7 @@ static int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
         rt2800_register_read(rt2x00dev, MM20_PROT_CFG, &reg);
         rt2x00_set_field32(&reg, MM20_PROT_CFG_PROTECT_RATE, 0x4004);
         rt2x00_set_field32(&reg, MM20_PROT_CFG_PROTECT_CTRL, 0);
-        rt2x00_set_field32(&reg, MM20_PROT_CFG_PROTECT_NAV, 1);
+        rt2x00_set_field32(&reg, MM20_PROT_CFG_PROTECT_NAV_SHORT, 1);
         rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_CCK, 1);
         rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
         rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_MM20, 1);
@@ -2078,7 +2341,7 @@ static int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
         rt2800_register_read(rt2x00dev, MM40_PROT_CFG, &reg);
         rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_RATE, 0x4084);
         rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_CTRL, 0);
-        rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_NAV, 1);
+        rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_NAV_SHORT, 1);
         rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_CCK, 1);
         rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
         rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_MM20, 1);
@@ -2091,7 +2354,7 @@ static int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
         rt2800_register_read(rt2x00dev, GF20_PROT_CFG, &reg);
         rt2x00_set_field32(&reg, GF20_PROT_CFG_PROTECT_RATE, 0x4004);
         rt2x00_set_field32(&reg, GF20_PROT_CFG_PROTECT_CTRL, 0);
-        rt2x00_set_field32(&reg, GF20_PROT_CFG_PROTECT_NAV, 1);
+        rt2x00_set_field32(&reg, GF20_PROT_CFG_PROTECT_NAV_SHORT, 1);
         rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_CCK, 1);
         rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
         rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_MM20, 1);
@@ -2104,7 +2367,7 @@ static int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
         rt2800_register_read(rt2x00dev, GF40_PROT_CFG, &reg);
         rt2x00_set_field32(&reg, GF40_PROT_CFG_PROTECT_RATE, 0x4084);
         rt2x00_set_field32(&reg, GF40_PROT_CFG_PROTECT_CTRL, 0);
-        rt2x00_set_field32(&reg, GF40_PROT_CFG_PROTECT_NAV, 1);
+        rt2x00_set_field32(&reg, GF40_PROT_CFG_PROTECT_NAV_SHORT, 1);
         rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_CCK, 1);
         rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
         rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_MM20, 1);
@@ -2346,15 +2609,31 @@ static int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
                      rt2800_wait_bbp_ready(rt2x00dev)))
                 return -EACCES;
 
-        if (rt2800_is_305x_soc(rt2x00dev))
+       if (rt2x00_rt(rt2x00dev, RT5390)) {
+               rt2800_bbp_read(rt2x00dev, 4, &value);
+               rt2x00_set_field8(&value, BBP4_MAC_IF_CTRL, 1);
+               rt2800_bbp_write(rt2x00dev, 4, value);
+       }
+
+       if (rt2800_is_305x_soc(rt2x00dev) ||
+           rt2x00_rt(rt2x00dev, RT5390))
                 rt2800_bbp_write(rt2x00dev, 31, 0x08);
 
         rt2800_bbp_write(rt2x00dev, 65, 0x2c);
         rt2800_bbp_write(rt2x00dev, 66, 0x38);
 
+       if (rt2x00_rt(rt2x00dev, RT5390))
+               rt2800_bbp_write(rt2x00dev, 68, 0x0b);
+
         if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860C)) {
                 rt2800_bbp_write(rt2x00dev, 69, 0x16);
                 rt2800_bbp_write(rt2x00dev, 73, 0x12);
+       } else if (rt2x00_rt(rt2x00dev, RT5390)) {
+               rt2800_bbp_write(rt2x00dev, 69, 0x12);
+               rt2800_bbp_write(rt2x00dev, 73, 0x13);
+               rt2800_bbp_write(rt2x00dev, 75, 0x46);
+               rt2800_bbp_write(rt2x00dev, 76, 0x28);
+               rt2800_bbp_write(rt2x00dev, 77, 0x59);
         } else {
                 rt2800_bbp_write(rt2x00dev, 69, 0x12);
                 rt2800_bbp_write(rt2x00dev, 73, 0x10);
@@ -2365,7 +2644,8 @@ static int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
         if (rt2x00_rt(rt2x00dev, RT3070) ||
             rt2x00_rt(rt2x00dev, RT3071) ||
             rt2x00_rt(rt2x00dev, RT3090) ||
-            rt2x00_rt(rt2x00dev, RT3390)) {
+           rt2x00_rt(rt2x00dev, RT3390) ||
+           rt2x00_rt(rt2x00dev, RT5390)) {
                 rt2800_bbp_write(rt2x00dev, 79, 0x13);
                 rt2800_bbp_write(rt2x00dev, 80, 0x05);
                 rt2800_bbp_write(rt2x00dev, 81, 0x33);
@@ -2377,35 +2657,62 @@ static int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
         }
 
         rt2800_bbp_write(rt2x00dev, 82, 0x62);
-        rt2800_bbp_write(rt2x00dev, 83, 0x6a);
+       if (rt2x00_rt(rt2x00dev, RT5390))
+               rt2800_bbp_write(rt2x00dev, 83, 0x7a);
+       else
+               rt2800_bbp_write(rt2x00dev, 83, 0x6a);
 
         if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860D))
                 rt2800_bbp_write(rt2x00dev, 84, 0x19);
+       else if (rt2x00_rt(rt2x00dev, RT5390))
+               rt2800_bbp_write(rt2x00dev, 84, 0x9a);
         else
                 rt2800_bbp_write(rt2x00dev, 84, 0x99);
 
-        rt2800_bbp_write(rt2x00dev, 86, 0x00);
+       if (rt2x00_rt(rt2x00dev, RT5390))
+               rt2800_bbp_write(rt2x00dev, 86, 0x38);
+       else
+               rt2800_bbp_write(rt2x00dev, 86, 0x00);
+
         rt2800_bbp_write(rt2x00dev, 91, 0x04);
-        rt2800_bbp_write(rt2x00dev, 92, 0x00);
+
+       if (rt2x00_rt(rt2x00dev, RT5390))
+               rt2800_bbp_write(rt2x00dev, 92, 0x02);
+       else
+               rt2800_bbp_write(rt2x00dev, 92, 0x00);
 
         if (rt2x00_rt_rev_gte(rt2x00dev, RT3070, REV_RT3070F) ||
             rt2x00_rt_rev_gte(rt2x00dev, RT3071, REV_RT3071E) ||
             rt2x00_rt_rev_gte(rt2x00dev, RT3090, REV_RT3090E) ||
             rt2x00_rt_rev_gte(rt2x00dev, RT3390, REV_RT3390E) ||
+           rt2x00_rt(rt2x00dev, RT5390) ||
             rt2800_is_305x_soc(rt2x00dev))
                 rt2800_bbp_write(rt2x00dev, 103, 0xc0);
         else
                 rt2800_bbp_write(rt2x00dev, 103, 0x00);
 
+       if (rt2x00_rt(rt2x00dev, RT5390))
+               rt2800_bbp_write(rt2x00dev, 104, 0x92);
+
         if (rt2800_is_305x_soc(rt2x00dev))
                 rt2800_bbp_write(rt2x00dev, 105, 0x01);
+       else if (rt2x00_rt(rt2x00dev, RT5390))
+               rt2800_bbp_write(rt2x00dev, 105, 0x3c);
         else
                 rt2800_bbp_write(rt2x00dev, 105, 0x05);
-        rt2800_bbp_write(rt2x00dev, 106, 0x35);
+
+       if (rt2x00_rt(rt2x00dev, RT5390))
+               rt2800_bbp_write(rt2x00dev, 106, 0x03);
+       else
+               rt2800_bbp_write(rt2x00dev, 106, 0x35);
+
+       if (rt2x00_rt(rt2x00dev, RT5390))
+               rt2800_bbp_write(rt2x00dev, 128, 0x12);
 
         if (rt2x00_rt(rt2x00dev, RT3071) ||
             rt2x00_rt(rt2x00dev, RT3090) ||
-            rt2x00_rt(rt2x00dev, RT3390)) {
+           rt2x00_rt(rt2x00dev, RT3390) ||
+           rt2x00_rt(rt2x00dev, RT5390)) {
                 rt2800_bbp_read(rt2x00dev, 138, &value);
 
                 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF0, &eeprom);
@@ -2417,6 +2724,41 @@ static int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
                 rt2800_bbp_write(rt2x00dev, 138, value);
         }
 
+       if (rt2x00_rt(rt2x00dev, RT5390)) {
+               int ant, div_mode;
+
+               rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1, &eeprom);
+               div_mode = rt2x00_get_field16(eeprom, EEPROM_NIC_CONF1_ANT_DIVERSITY);
+               ant = (div_mode == 3) ? 1 : 0;
+
+               /* check if this is a Bluetooth combo card */
+               rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1, &eeprom);
+               if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF1_BT_COEXIST)) {
+                       u32 reg;
+
+                       rt2800_register_read(rt2x00dev, GPIO_CTRL_CFG, &reg);
+                       rt2x00_set_field32(&reg, GPIO_CTRL_CFG_GPIOD_BIT3, 0);
+                       rt2x00_set_field32(&reg, GPIO_CTRL_CFG_GPIOD_BIT6, 0);
+                       rt2x00_set_field32(&reg, GPIO_CTRL_CFG_BIT3, 0);
+                       rt2x00_set_field32(&reg, GPIO_CTRL_CFG_BIT6, 0);
+                       if (ant == 0)
+                               rt2x00_set_field32(&reg, GPIO_CTRL_CFG_BIT3, 1);
+                       else if (ant == 1)
+                               rt2x00_set_field32(&reg, GPIO_CTRL_CFG_BIT6, 1);
+                       rt2800_register_write(rt2x00dev, GPIO_CTRL_CFG, reg);
+               }
+
+               rt2800_bbp_read(rt2x00dev, 152, &value);
+               if (ant == 0)
+                       rt2x00_set_field8(&value, BBP152_RX_DEFAULT_ANT, 1);
+               else
+                       rt2x00_set_field8(&value, BBP152_RX_DEFAULT_ANT, 0);
+               rt2800_bbp_write(rt2x00dev, 152, value);
+
+               /* Init frequency calibration */
+               rt2800_bbp_write(rt2x00dev, 142, 1);
+               rt2800_bbp_write(rt2x00dev, 143, 57);
+       }
 
         for (i = 0; i < EEPROM_BBP_SIZE; i++) {
                 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
@@ -2506,18 +2848,28 @@ static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
             !rt2x00_rt(rt2x00dev, RT3071) &&
             !rt2x00_rt(rt2x00dev, RT3090) &&
             !rt2x00_rt(rt2x00dev, RT3390) &&
+           !rt2x00_rt(rt2x00dev, RT5390) &&
             !rt2800_is_305x_soc(rt2x00dev))
                 return 0;
 
         /*
          * Init RF calibration.
          */
-        rt2800_rfcsr_read(rt2x00dev, 30, &rfcsr);
-        rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 1);
-        rt2800_rfcsr_write(rt2x00dev, 30, rfcsr);
-        msleep(1);
-        rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 0);
-        rt2800_rfcsr_write(rt2x00dev, 30, rfcsr);
+       if (rt2x00_rt(rt2x00dev, RT5390)) {
+               rt2800_rfcsr_read(rt2x00dev, 2, &rfcsr);
+               rt2x00_set_field8(&rfcsr, RFCSR2_RESCAL_EN, 1);
+               rt2800_rfcsr_write(rt2x00dev, 2, rfcsr);
+               msleep(1);
+               rt2x00_set_field8(&rfcsr, RFCSR2_RESCAL_EN, 0);
+               rt2800_rfcsr_write(rt2x00dev, 2, rfcsr);
+       } else {
+               rt2800_rfcsr_read(rt2x00dev, 30, &rfcsr);
+               rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 1);
+               rt2800_rfcsr_write(rt2x00dev, 30, rfcsr);
+               msleep(1);
+               rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 0);
+               rt2800_rfcsr_write(rt2x00dev, 30, rfcsr);
+       }
 
         if (rt2x00_rt(rt2x00dev, RT3070) ||
             rt2x00_rt(rt2x00dev, RT3071) ||
@@ -2608,6 +2960,87 @@ static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
                 rt2800_rfcsr_write(rt2x00dev, 30, 0x00);
                 rt2800_rfcsr_write(rt2x00dev, 31, 0x00);
                 return 0;
+       } else if (rt2x00_rt(rt2x00dev, RT5390)) {
+               rt2800_rfcsr_write(rt2x00dev, 1, 0x0f);
+               rt2800_rfcsr_write(rt2x00dev, 2, 0x80);
+               rt2800_rfcsr_write(rt2x00dev, 3, 0x88);
+               rt2800_rfcsr_write(rt2x00dev, 5, 0x10);
+               if (rt2x00_rt_rev_gte(rt2x00dev, RT5390, REV_RT5390F))
+                       rt2800_rfcsr_write(rt2x00dev, 6, 0xe0);
+               else
+                       rt2800_rfcsr_write(rt2x00dev, 6, 0xa0);
+               rt2800_rfcsr_write(rt2x00dev, 7, 0x00);
+               rt2800_rfcsr_write(rt2x00dev, 10, 0x53);
+               rt2800_rfcsr_write(rt2x00dev, 11, 0x4a);
+               rt2800_rfcsr_write(rt2x00dev, 12, 0xc6);
+               rt2800_rfcsr_write(rt2x00dev, 13, 0x9f);
+               rt2800_rfcsr_write(rt2x00dev, 14, 0x00);
+               rt2800_rfcsr_write(rt2x00dev, 15, 0x00);
+               rt2800_rfcsr_write(rt2x00dev, 16, 0x00);
+               rt2800_rfcsr_write(rt2x00dev, 18, 0x03);
+               rt2800_rfcsr_write(rt2x00dev, 19, 0x00);
+
+               rt2800_rfcsr_write(rt2x00dev, 20, 0x00);
+               rt2800_rfcsr_write(rt2x00dev, 21, 0x00);
+               rt2800_rfcsr_write(rt2x00dev, 22, 0x20);
+               rt2800_rfcsr_write(rt2x00dev, 23, 0x00);
+               rt2800_rfcsr_write(rt2x00dev, 24, 0x00);
+               if (rt2x00_rt_rev_gte(rt2x00dev, RT5390, REV_RT5390F))
+                       rt2800_rfcsr_write(rt2x00dev, 25, 0x80);
+               else
+                       rt2800_rfcsr_write(rt2x00dev, 25, 0xc0);
+               rt2800_rfcsr_write(rt2x00dev, 26, 0x00);
+               rt2800_rfcsr_write(rt2x00dev, 27, 0x09);
+               rt2800_rfcsr_write(rt2x00dev, 28, 0x00);
+               rt2800_rfcsr_write(rt2x00dev, 29, 0x10);
+
+               rt2800_rfcsr_write(rt2x00dev, 30, 0x00);
+               rt2800_rfcsr_write(rt2x00dev, 31, 0x80);
+               rt2800_rfcsr_write(rt2x00dev, 32, 0x80);
+               rt2800_rfcsr_write(rt2x00dev, 33, 0x00);
+               rt2800_rfcsr_write(rt2x00dev, 34, 0x07);
+               rt2800_rfcsr_write(rt2x00dev, 35, 0x12);
+               rt2800_rfcsr_write(rt2x00dev, 36, 0x00);
+               rt2800_rfcsr_write(rt2x00dev, 37, 0x08);
+               rt2800_rfcsr_write(rt2x00dev, 38, 0x85);
+               rt2800_rfcsr_write(rt2x00dev, 39, 0x1b);
+
+               if (rt2x00_rt_rev_gte(rt2x00dev, RT5390, REV_RT5390F))
+                       rt2800_rfcsr_write(rt2x00dev, 40, 0x0b);
+               else
+                       rt2800_rfcsr_write(rt2x00dev, 40, 0x4b);
+               rt2800_rfcsr_write(rt2x00dev, 41, 0xbb);
+               rt2800_rfcsr_write(rt2x00dev, 42, 0xd2);
+               rt2800_rfcsr_write(rt2x00dev, 43, 0x9a);
+               rt2800_rfcsr_write(rt2x00dev, 44, 0x0e);
+               rt2800_rfcsr_write(rt2x00dev, 45, 0xa2);
+               if (rt2x00_rt_rev_gte(rt2x00dev, RT5390, REV_RT5390F))
+                       rt2800_rfcsr_write(rt2x00dev, 46, 0x73);
+               else
+                       rt2800_rfcsr_write(rt2x00dev, 46, 0x7b);
+               rt2800_rfcsr_write(rt2x00dev, 47, 0x00);
+               rt2800_rfcsr_write(rt2x00dev, 48, 0x10);
+               rt2800_rfcsr_write(rt2x00dev, 49, 0x94);
+
+               rt2800_rfcsr_write(rt2x00dev, 52, 0x38);
+               if (rt2x00_rt_rev_gte(rt2x00dev, RT5390, REV_RT5390F))
+                       rt2800_rfcsr_write(rt2x00dev, 53, 0x00);
+               else
+                       rt2800_rfcsr_write(rt2x00dev, 53, 0x84);
+               rt2800_rfcsr_write(rt2x00dev, 54, 0x78);
+               rt2800_rfcsr_write(rt2x00dev, 55, 0x44);
+               rt2800_rfcsr_write(rt2x00dev, 56, 0x22);
+               rt2800_rfcsr_write(rt2x00dev, 57, 0x80);
+               rt2800_rfcsr_write(rt2x00dev, 58, 0x7f);
+               rt2800_rfcsr_write(rt2x00dev, 59, 0x63);
+
+               rt2800_rfcsr_write(rt2x00dev, 60, 0x45);
+               if (rt2x00_rt_rev_gte(rt2x00dev, RT5390, REV_RT5390F))
+                       rt2800_rfcsr_write(rt2x00dev, 61, 0xd1);
+               else
+                       rt2800_rfcsr_write(rt2x00dev, 61, 0xdd);
+               rt2800_rfcsr_write(rt2x00dev, 62, 0x00);
+               rt2800_rfcsr_write(rt2x00dev, 63, 0x00);
         }
 
         if (rt2x00_rt_rev_lt(rt2x00dev, RT3070, REV_RT3070F)) {
@@ -2661,21 +3094,23 @@ static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
                         rt2800_init_rx_filter(rt2x00dev, true, 0x27, 0x15);
         }
 
-        /*
-         * Set back to initial state
-         */
-        rt2800_bbp_write(rt2x00dev, 24, 0);
+       if (!rt2x00_rt(rt2x00dev, RT5390)) {
+               /*
+                * Set back to initial state
+                */
+               rt2800_bbp_write(rt2x00dev, 24, 0);
 
-        rt2800_rfcsr_read(rt2x00dev, 22, &rfcsr);
-        rt2x00_set_field8(&rfcsr, RFCSR22_BASEBAND_LOOPBACK, 0);
-        rt2800_rfcsr_write(rt2x00dev, 22, rfcsr);
+               rt2800_rfcsr_read(rt2x00dev, 22, &rfcsr);
+               rt2x00_set_field8(&rfcsr, RFCSR22_BASEBAND_LOOPBACK, 0);
+               rt2800_rfcsr_write(rt2x00dev, 22, rfcsr);
 
-        /*
-         * set BBP back to BW20
-         */
-        rt2800_bbp_read(rt2x00dev, 4, &bbp);
-        rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 0);
-        rt2800_bbp_write(rt2x00dev, 4, bbp);
+               /*
+                * Set BBP back to BW20
+                */
+               rt2800_bbp_read(rt2x00dev, 4, &bbp);
+               rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 0);
+               rt2800_bbp_write(rt2x00dev, 4, bbp);
+       }
 
         if (rt2x00_rt_rev_lt(rt2x00dev, RT3070, REV_RT3070F) ||
             rt2x00_rt_rev_lt(rt2x00dev, RT3071, REV_RT3071E) ||
@@ -2687,21 +3122,23 @@ static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
         rt2x00_set_field32(&reg, OPT_14_CSR_BIT0, 1);
         rt2800_register_write(rt2x00dev, OPT_14_CSR, reg);
 
-        rt2800_rfcsr_read(rt2x00dev, 17, &rfcsr);
-        rt2x00_set_field8(&rfcsr, RFCSR17_TX_LO1_EN, 0);
-        if (rt2x00_rt(rt2x00dev, RT3070) ||
-            rt2x00_rt_rev_lt(rt2x00dev, RT3071, REV_RT3071E) ||
-            rt2x00_rt_rev_lt(rt2x00dev, RT3090, REV_RT3090E) ||
-            rt2x00_rt_rev_lt(rt2x00dev, RT3390, REV_RT3390E)) {
-                if (!test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags))
-                        rt2x00_set_field8(&rfcsr, RFCSR17_R, 1);
-        }
-        rt2x00_eeprom_read(rt2x00dev, EEPROM_TXMIXER_GAIN_BG, &eeprom);
-        if (rt2x00_get_field16(eeprom, EEPROM_TXMIXER_GAIN_BG_VAL) >= 1)
-                rt2x00_set_field8(&rfcsr, RFCSR17_TXMIXER_GAIN,
-                                  rt2x00_get_field16(eeprom,
-                                                   EEPROM_TXMIXER_GAIN_BG_VAL));
-        rt2800_rfcsr_write(rt2x00dev, 17, rfcsr);
+       if (!rt2x00_rt(rt2x00dev, RT5390)) {
+               rt2800_rfcsr_read(rt2x00dev, 17, &rfcsr);
+               rt2x00_set_field8(&rfcsr, RFCSR17_TX_LO1_EN, 0);
+               if (rt2x00_rt(rt2x00dev, RT3070) ||
+                   rt2x00_rt_rev_lt(rt2x00dev, RT3071, REV_RT3071E) ||
+                   rt2x00_rt_rev_lt(rt2x00dev, RT3090, REV_RT3090E) ||
+                   rt2x00_rt_rev_lt(rt2x00dev, RT3390, REV_RT3390E)) {
+                       if (!test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags))
+                               rt2x00_set_field8(&rfcsr, RFCSR17_R, 1);
+               }
+               rt2x00_eeprom_read(rt2x00dev, EEPROM_TXMIXER_GAIN_BG, &eeprom);
+               if (rt2x00_get_field16(eeprom, EEPROM_TXMIXER_GAIN_BG_VAL) >= 1)
+                       rt2x00_set_field8(&rfcsr, RFCSR17_TXMIXER_GAIN,
+                                       rt2x00_get_field16(eeprom,
+                                               EEPROM_TXMIXER_GAIN_BG_VAL));
+               rt2800_rfcsr_write(rt2x00dev, 17, rfcsr);
+       }
 
         if (rt2x00_rt(rt2x00dev, RT3090)) {
                 rt2800_bbp_read(rt2x00dev, 138, &bbp);
@@ -2752,6 +3189,20 @@ static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
                 rt2800_rfcsr_write(rt2x00dev, 27, rfcsr);
         }
 
+       if (rt2x00_rt(rt2x00dev, RT5390)) {
+               rt2800_rfcsr_read(rt2x00dev, 38, &rfcsr);
+               rt2x00_set_field8(&rfcsr, RFCSR38_RX_LO1_EN, 0);
+               rt2800_rfcsr_write(rt2x00dev, 38, rfcsr);
+
+               rt2800_rfcsr_read(rt2x00dev, 39, &rfcsr);
+               rt2x00_set_field8(&rfcsr, RFCSR39_RX_LO2_EN, 0);
+               rt2800_rfcsr_write(rt2x00dev, 39, rfcsr);
+
+               rt2800_rfcsr_read(rt2x00dev, 30, &rfcsr);
+               rt2x00_set_field8(&rfcsr, RFCSR30_RX_VCM, 2);
+               rt2800_rfcsr_write(rt2x00dev, 30, rfcsr);
+       }
+
         return 0;
 }
 
@@ -3000,13 +3451,6 @@ int rt2800_validate_eeprom(struct rt2x00_dev *rt2x00dev)
                                    default_lna_gain);
         rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_A2, word);
 
-        rt2x00_eeprom_read(rt2x00dev, EEPROM_MAX_TX_POWER, &word);
-        if (rt2x00_get_field16(word, EEPROM_MAX_TX_POWER_24GHZ) == 0xff)
-                rt2x00_set_field16(&word, EEPROM_MAX_TX_POWER_24GHZ, MAX_G_TXPOWER);
-        if (rt2x00_get_field16(word, EEPROM_MAX_TX_POWER_5GHZ) == 0xff)
-                rt2x00_set_field16(&word, EEPROM_MAX_TX_POWER_5GHZ, MAX_A_TXPOWER);
-        rt2x00_eeprom_write(rt2x00dev, EEPROM_MAX_TX_POWER, word);
-
         return 0;
 }
 EXPORT_SYMBOL_GPL(rt2800_validate_eeprom);
@@ -3023,10 +3467,15 @@ int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev)
         rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF0, &eeprom);
 
         /*
-         * Identify RF chipset.
+        * Identify RF chipset by EEPROM value
+        * RT28xx/RT30xx: defined in "EEPROM_NIC_CONF0_RF_TYPE" field
+        * RT53xx: defined in "EEPROM_CHIP_ID" field
          */
-        value = rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_RF_TYPE);
         rt2800_register_read(rt2x00dev, MAC_CSR0, &reg);
+       if (rt2x00_get_field32(reg, MAC_CSR0_CHIPSET) == RT5390)
+               rt2x00_eeprom_read(rt2x00dev, EEPROM_CHIP_ID, &value);
+       else
+               value = rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_RF_TYPE);
 
         rt2x00_set_chip(rt2x00dev, rt2x00_get_field32(reg, MAC_CSR0_CHIPSET),
                         value, rt2x00_get_field32(reg, MAC_CSR0_REVISION));
@@ -3038,7 +3487,8 @@ int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev)
             !rt2x00_rt(rt2x00dev, RT3071) &&
             !rt2x00_rt(rt2x00dev, RT3090) &&
             !rt2x00_rt(rt2x00dev, RT3390) &&
-            !rt2x00_rt(rt2x00dev, RT3572)) {
+           !rt2x00_rt(rt2x00dev, RT3572) &&
+           !rt2x00_rt(rt2x00dev, RT5390)) {
                 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
                 return -ENODEV;
         }
@@ -3052,7 +3502,8 @@ int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev)
             !rt2x00_rf(rt2x00dev, RF3021) &&
             !rt2x00_rf(rt2x00dev, RF3022) &&
             !rt2x00_rf(rt2x00dev, RF3052) &&
-            !rt2x00_rf(rt2x00dev, RF3320)) {
+           !rt2x00_rf(rt2x00dev, RF3320) &&
+           !rt2x00_rf(rt2x00dev, RF5390)) {
                 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
                 return -ENODEV;
         }
@@ -3060,11 +3511,35 @@ int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev)
         /*
          * Identify default antenna configuration.
          */
-        rt2x00dev->default_ant.tx =
+        rt2x00dev->default_ant.tx_chain_num =
             rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_TXPATH);
-        rt2x00dev->default_ant.rx =
+        rt2x00dev->default_ant.rx_chain_num =
             rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_RXPATH);
 
+        rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1, &eeprom);
+
+        if (rt2x00_rt(rt2x00dev, RT3070) ||
+            rt2x00_rt(rt2x00dev, RT3090) ||
+            rt2x00_rt(rt2x00dev, RT3390)) {
+                value = rt2x00_get_field16(eeprom,
+                                EEPROM_NIC_CONF1_ANT_DIVERSITY);
+                switch (value) {
+                case 0:
+                case 1:
+                case 2:
+                        rt2x00dev->default_ant.tx = ANTENNA_A;
+                        rt2x00dev->default_ant.rx = ANTENNA_A;
+                        break;
+                case 3:
+                        rt2x00dev->default_ant.tx = ANTENNA_A;
+                        rt2x00dev->default_ant.rx = ANTENNA_B;
+                        break;
+                }
+        } else {
+                rt2x00dev->default_ant.tx = ANTENNA_A;
+                rt2x00dev->default_ant.rx = ANTENNA_A;
+        }
+
         /*
          * Read frequency offset and RF programming sequence.
          */
@@ -3098,6 +3573,15 @@ int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev)
         rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &rt2x00dev->led_mcu_reg);
 #endif /* CONFIG_RT2X00_LIB_LEDS */
 
+        /*
+         * Check if support EIRP tx power limit feature.
+         */
+        rt2x00_eeprom_read(rt2x00dev, EEPROM_EIRP_MAX_TX_POWER, &eeprom);
+
+        if (rt2x00_get_field16(eeprom, EEPROM_EIRP_MAX_TX_POWER_2GHZ) <
+                                        EIRP_MAX_TX_POWER_LIMIT)
+                __set_bit(CONFIG_SUPPORT_POWER_LIMIT, &rt2x00dev->flags);
+
         return 0;
 }
 EXPORT_SYMBOL_GPL(rt2800_init_eeprom);
@@ -3250,7 +3734,6 @@ int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
         char *default_power1;
         char *default_power2;
         unsigned int i;
-        unsigned short max_power;
         u16 eeprom;
 
         /*
@@ -3317,7 +3800,8 @@ int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
                    rt2x00_rf(rt2x00dev, RF2020) ||
                    rt2x00_rf(rt2x00dev, RF3021) ||
                    rt2x00_rf(rt2x00dev, RF3022) ||
-                   rt2x00_rf(rt2x00dev, RF3320)) {
+                  rt2x00_rf(rt2x00dev, RF3320) ||
+                  rt2x00_rf(rt2x00dev, RF5390)) {
                 spec->num_channels = 14;
                 spec->channels = rf_vals_3x;
         } else if (rt2x00_rf(rt2x00dev, RF3052)) {
@@ -3375,26 +3859,21 @@ int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
 
         spec->channels_info = info;
 
-        rt2x00_eeprom_read(rt2x00dev, EEPROM_MAX_TX_POWER, &eeprom);
-        max_power = rt2x00_get_field16(eeprom, EEPROM_MAX_TX_POWER_24GHZ);
         default_power1 = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_BG1);
         default_power2 = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_BG2);
 
         for (i = 0; i < 14; i++) {
-                info[i].max_power = max_power;
-                info[i].default_power1 = TXPOWER_G_FROM_DEV(default_power1[i]);
-                info[i].default_power2 = TXPOWER_G_FROM_DEV(default_power2[i]);
+                info[i].default_power1 = default_power1[i];
+                info[i].default_power2 = default_power2[i];
         }
 
         if (spec->num_channels > 14) {
-                max_power = rt2x00_get_field16(eeprom, EEPROM_MAX_TX_POWER_5GHZ);
                 default_power1 = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_A1);
                 default_power2 = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_A2);
 
                 for (i = 14; i < spec->num_channels; i++) {
-                        info[i].max_power = max_power;
-                        info[i].default_power1 = TXPOWER_A_FROM_DEV(default_power1[i]);
-                        info[i].default_power2 = TXPOWER_A_FROM_DEV(default_power2[i]);
+                        info[i].default_power1 = default_power1[i];
+                        info[i].default_power2 = default_power2[i];
                 }
         }
 
diff --git a/drivers/net/wireless/rt2x00/rt2800pci.c b/drivers/net/wireless/rt2x00/rt2800pci.c
index 8f4dfc3d8023..38605e9fe427 100644
--- a/drivers/net/wireless/rt2x00/rt2800pci.c
+++ b/drivers/net/wireless/rt2x00/rt2800pci.c
@@ -493,6 +493,13 @@ static int rt2800pci_init_registers(struct rt2x00_dev *rt2x00dev)
         rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000e1f);
         rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000e00);
 
+       if (rt2x00_rt(rt2x00dev, RT5390)) {
+               rt2800_register_read(rt2x00dev, AUX_CTRL, &reg);
+               rt2x00_set_field32(&reg, AUX_CTRL_FORCE_PCIE_CLK, 1);
+               rt2x00_set_field32(&reg, AUX_CTRL_WAKE_PCIE_EN, 1);
+               rt2800_register_write(rt2x00dev, AUX_CTRL, reg);
+       }
+
         rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000003);
 
         rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
@@ -1119,12 +1126,17 @@ static DEFINE_PCI_DEVICE_TABLE(rt2800pci_device_table) = {
         { PCI_DEVICE(0x1814, 0x3390), PCI_DEVICE_DATA(&rt2800pci_ops) },
 #endif
 #ifdef CONFIG_RT2800PCI_RT35XX
+        { PCI_DEVICE(0x1432, 0x7711), PCI_DEVICE_DATA(&rt2800pci_ops) },
+        { PCI_DEVICE(0x1432, 0x7722), PCI_DEVICE_DATA(&rt2800pci_ops) },
         { PCI_DEVICE(0x1814, 0x3060), PCI_DEVICE_DATA(&rt2800pci_ops) },
         { PCI_DEVICE(0x1814, 0x3062), PCI_DEVICE_DATA(&rt2800pci_ops) },
         { PCI_DEVICE(0x1814, 0x3562), PCI_DEVICE_DATA(&rt2800pci_ops) },
         { PCI_DEVICE(0x1814, 0x3592), PCI_DEVICE_DATA(&rt2800pci_ops) },
         { PCI_DEVICE(0x1814, 0x3593), PCI_DEVICE_DATA(&rt2800pci_ops) },
 #endif
+#ifdef CONFIG_RT2800PCI_RT53XX
+       { PCI_DEVICE(0x1814, 0x5390), PCI_DEVICE_DATA(&rt2800pci_ops) },
+#endif
         { 0, }
 };
 #endif /* CONFIG_PCI */
diff --git a/drivers/net/wireless/rt2x00/rt2x00.h b/drivers/net/wireless/rt2x00/rt2x00.h
index 39bc2faf1793..1df432c1f2c7 100644
--- a/drivers/net/wireless/rt2x00/rt2x00.h
+++ b/drivers/net/wireless/rt2x00/rt2x00.h
@@ -189,6 +189,7 @@ struct rt2x00_chip {
 #define RT3572          0x3572
 #define RT3593          0x3593  /* PCIe */
 #define RT3883          0x3883  /* WSOC */
+#define RT5390         0x5390  /* 2.4GHz */
 
         u16 rf;
         u16 rev;
@@ -225,6 +226,8 @@ struct channel_info {
 struct antenna_setup {
         enum antenna rx;
         enum antenna tx;
+        u8 rx_chain_num;
+        u8 tx_chain_num;
 };
 
 /*
@@ -665,6 +668,7 @@ enum rt2x00_flags {
          */
         CONFIG_SUPPORT_HW_BUTTON,
         CONFIG_SUPPORT_HW_CRYPTO,
+        CONFIG_SUPPORT_POWER_LIMIT,
         DRIVER_SUPPORT_CONTROL_FILTERS,
         DRIVER_SUPPORT_CONTROL_FILTER_PSPOLL,
         DRIVER_SUPPORT_PRE_TBTT_INTERRUPT,
diff --git a/drivers/net/wireless/rt2x00/rt2x00ht.c b/drivers/net/wireless/rt2x00/rt2x00ht.c
index b7ad46ecaa1d..03d9579da681 100644
--- a/drivers/net/wireless/rt2x00/rt2x00ht.c
+++ b/drivers/net/wireless/rt2x00/rt2x00ht.c
@@ -69,7 +69,6 @@ void rt2x00ht_create_tx_descriptor(struct queue_entry *entry,
                         txdesc->mcs |= 0x08;
         }
 
-
         /*
          * This frame is eligible for an AMPDU, however, don't aggregate
          * frames that are intended to probe a specific tx rate.
diff --git a/drivers/net/wireless/rt2x00/rt2x00mac.c b/drivers/net/wireless/rt2x00/rt2x00mac.c
index 6a66021d8f65..1b3edef9e3d2 100644
--- a/drivers/net/wireless/rt2x00/rt2x00mac.c
+++ b/drivers/net/wireless/rt2x00/rt2x00mac.c
@@ -139,9 +139,9 @@ int rt2x00mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
          * either RTS or CTS-to-self frame and handles everything
          * inside the hardware.
          */
-        if ((tx_info->control.rates[0].flags & (IEEE80211_TX_RC_USE_RTS_CTS |
-                                                IEEE80211_TX_RC_USE_CTS_PROTECT)) &&
-            !rt2x00dev->ops->hw->set_rts_threshold) {
+        if (!rt2x00dev->ops->hw->set_rts_threshold &&
+            (tx_info->control.rates[0].flags & (IEEE80211_TX_RC_USE_RTS_CTS |
+                                                IEEE80211_TX_RC_USE_CTS_PROTECT))) {
                 if (rt2x00queue_available(queue) <= 1)
                         goto exit_fail;
 
diff --git a/drivers/net/wireless/rt2x00/rt2x00queue.c b/drivers/net/wireless/rt2x00/rt2x00queue.c
index fa17c83b9685..bf9bba356280 100644
--- a/drivers/net/wireless/rt2x00/rt2x00queue.c
+++ b/drivers/net/wireless/rt2x00/rt2x00queue.c
@@ -365,13 +365,10 @@ static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
 
         /*
          * Beacons and probe responses require the tsf timestamp
-         * to be inserted into the frame, except for a frame that has been injected
-         * through a monitor interface. This latter is needed for testing a
-         * monitor interface.
+         * to be inserted into the frame.
          */
-        if ((ieee80211_is_beacon(hdr->frame_control) ||
-            ieee80211_is_probe_resp(hdr->frame_control)) &&
-            (!(tx_info->flags & IEEE80211_TX_CTL_INJECTED)))
+        if (ieee80211_is_beacon(hdr->frame_control) ||
+            ieee80211_is_probe_resp(hdr->frame_control))
                 __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
 
         /*
diff --git a/drivers/net/wireless/rt2x00/rt61pci.c b/drivers/net/wireless/rt2x00/rt61pci.c
index dd2164d4d57b..927a4a3e0eeb 100644
--- a/drivers/net/wireless/rt2x00/rt61pci.c
+++ b/drivers/net/wireless/rt2x00/rt61pci.c
@@ -1978,13 +1978,14 @@ static void rt61pci_write_beacon(struct queue_entry *entry,
         struct queue_entry_priv_pci *entry_priv = entry->priv_data;
         unsigned int beacon_base;
         unsigned int padding_len;
-        u32 reg;
+        u32 orig_reg, reg;
 
         /*
          * Disable beaconing while we are reloading the beacon data,
          * otherwise we might be sending out invalid data.
          */
         rt2x00pci_register_read(rt2x00dev, TXRX_CSR9, &reg);
+        orig_reg = reg;
         rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 0);
         rt2x00pci_register_write(rt2x00dev, TXRX_CSR9, reg);
 
@@ -2002,7 +2003,14 @@ static void rt61pci_write_beacon(struct queue_entry *entry,
          * Write entire beacon with descriptor and padding to register.
          */
         padding_len = roundup(entry->skb->len, 4) - entry->skb->len;
-        skb_pad(entry->skb, padding_len);
+        if (padding_len && skb_pad(entry->skb, padding_len)) {
+                ERROR(rt2x00dev, "Failure padding beacon, aborting\n");
+                /* skb freed by skb_pad() on failure */
+                entry->skb = NULL;
+                rt2x00pci_register_write(rt2x00dev, TXRX_CSR9, orig_reg);
+                return;
+        }
+
         beacon_base = HW_BEACON_OFFSET(entry->entry_idx);
         rt2x00pci_register_multiwrite(rt2x00dev, beacon_base,
                                       entry_priv->desc, TXINFO_SIZE);
diff --git a/drivers/net/wireless/rt2x00/rt73usb.c b/drivers/net/wireless/rt2x00/rt73usb.c
index 5ff72deea8d4..6e9981a1dd7f 100644
--- a/drivers/net/wireless/rt2x00/rt73usb.c
+++ b/drivers/net/wireless/rt2x00/rt73usb.c
@@ -1533,13 +1533,14 @@ static void rt73usb_write_beacon(struct queue_entry *entry,
         struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
         unsigned int beacon_base;
         unsigned int padding_len;
-        u32 reg;
+        u32 orig_reg, reg;
 
         /*
          * Disable beaconing while we are reloading the beacon data,
          * otherwise we might be sending out invalid data.
          */
         rt2x00usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
+        orig_reg = reg;
         rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 0);
         rt2x00usb_register_write(rt2x00dev, TXRX_CSR9, reg);
 
@@ -1563,7 +1564,14 @@ static void rt73usb_write_beacon(struct queue_entry *entry,
          * Write entire beacon with descriptor and padding to register.
          */
         padding_len = roundup(entry->skb->len, 4) - entry->skb->len;
-        skb_pad(entry->skb, padding_len);
+        if (padding_len && skb_pad(entry->skb, padding_len)) {
+                ERROR(rt2x00dev, "Failure padding beacon, aborting\n");
+                /* skb freed by skb_pad() on failure */
+                entry->skb = NULL;
+                rt2x00usb_register_write(rt2x00dev, TXRX_CSR9, orig_reg);
+                return;
+        }
+
         beacon_base = HW_BEACON_OFFSET(entry->entry_idx);
         rt2x00usb_register_multiwrite(rt2x00dev, beacon_base, entry->skb->data,
                                       entry->skb->len + padding_len);
diff --git a/drivers/net/wireless/rtlwifi/Kconfig b/drivers/net/wireless/rtlwifi/Kconfig
index 7f6573f7f470..86f8d4d64037 100644
--- a/drivers/net/wireless/rtlwifi/Kconfig
+++ b/drivers/net/wireless/rtlwifi/Kconfig
@@ -1,6 +1,6 @@
 config RTL8192CE
-        tristate "Realtek RTL8192CE/RTL8188SE Wireless Network Adapter"
-        depends on MAC80211 && EXPERIMENTAL
+        tristate "Realtek RTL8192CE/RTL8188CE Wireless Network Adapter"
+        depends on MAC80211 && PCI && EXPERIMENTAL
         select FW_LOADER
         select RTLWIFI
         ---help---
@@ -9,7 +9,18 @@ config RTL8192CE
 
         If you choose to build it as a module, it will be called rtl8192ce
 
+config RTL8192CU
+        tristate "Realtek RTL8192CU/RTL8188CU USB Wireless Network Adapter"
+        depends on MAC80211 && USB && EXPERIMENTAL
+        select FW_LOADER
+        select RTLWIFI
+        ---help---
+        This is the driver for Realtek RTL8192CU/RTL8188CU 802.11n USB
+        wireless network adapters.
+
+        If you choose to build it as a module, it will be called rtl8192cu
+
 config RTLWIFI
         tristate
-        depends on RTL8192CE
+        depends on RTL8192CE || RTL8192CU
         default m
diff --git a/drivers/net/wireless/rtlwifi/Makefile b/drivers/net/wireless/rtlwifi/Makefile
index 2a7a4384f8ee..c3e83a1da33b 100644
--- a/drivers/net/wireless/rtlwifi/Makefile
+++ b/drivers/net/wireless/rtlwifi/Makefile
@@ -8,6 +8,10 @@ rtlwifi-objs	:=		\
                 pci.o           \
                 ps.o            \
                 rc.o            \
-                regd.o
+                regd.o          \
+                usb.o
 
 obj-$(CONFIG_RTL8192CE)         += rtl8192ce/
+obj-$(CONFIG_RTL8192CU)         += rtl8192cu/
+
+ccflags-y += -D__CHECK_ENDIAN__
diff --git a/drivers/net/wireless/rtlwifi/base.c b/drivers/net/wireless/rtlwifi/base.c
index cf0b73e51fc2..3f40dc2b129c 100644
--- a/drivers/net/wireless/rtlwifi/base.c
+++ b/drivers/net/wireless/rtlwifi/base.c
@@ -144,7 +144,7 @@ static void _rtl_init_hw_ht_capab(struct ieee80211_hw *hw,
                 ht_cap->mcs.rx_mask[1] = 0xFF;
                 ht_cap->mcs.rx_mask[4] = 0x01;
 
-                ht_cap->mcs.rx_highest = MAX_BIT_RATE_40MHZ_MCS15;
+                ht_cap->mcs.rx_highest = cpu_to_le16(MAX_BIT_RATE_40MHZ_MCS15);
         } else if (get_rf_type(rtlphy) == RF_1T1R) {
 
                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, ("1T1R\n"));
@@ -153,7 +153,7 @@ static void _rtl_init_hw_ht_capab(struct ieee80211_hw *hw,
                 ht_cap->mcs.rx_mask[1] = 0x00;
                 ht_cap->mcs.rx_mask[4] = 0x01;
 
-                ht_cap->mcs.rx_highest = MAX_BIT_RATE_40MHZ_MCS7;
+                ht_cap->mcs.rx_highest = cpu_to_le16(MAX_BIT_RATE_40MHZ_MCS7);
         }
 }
 
@@ -399,21 +399,21 @@ static void _rtl_query_protection_mode(struct ieee80211_hw *hw,
         u8 rate_flag = info->control.rates[0].flags;
 
         /* Common Settings */
-        tcb_desc->b_rts_stbc = false;
-        tcb_desc->b_cts_enable = false;
+        tcb_desc->rts_stbc = false;
+        tcb_desc->cts_enable = false;
         tcb_desc->rts_sc = 0;
-        tcb_desc->b_rts_bw = false;
-        tcb_desc->b_rts_use_shortpreamble = false;
-        tcb_desc->b_rts_use_shortgi = false;
+        tcb_desc->rts_bw = false;
+        tcb_desc->rts_use_shortpreamble = false;
+        tcb_desc->rts_use_shortgi = false;
 
         if (rate_flag & IEEE80211_TX_RC_USE_CTS_PROTECT) {
                 /* Use CTS-to-SELF in protection mode. */
-                tcb_desc->b_rts_enable = true;
-                tcb_desc->b_cts_enable = true;
+                tcb_desc->rts_enable = true;
+                tcb_desc->cts_enable = true;
                 tcb_desc->rts_rate = rtlpriv->cfg->maps[RTL_RC_OFDM_RATE24M];
         } else if (rate_flag & IEEE80211_TX_RC_USE_RTS_CTS) {
                 /* Use RTS-CTS in protection mode. */
-                tcb_desc->b_rts_enable = true;
+                tcb_desc->rts_enable = true;
                 tcb_desc->rts_rate = rtlpriv->cfg->maps[RTL_RC_OFDM_RATE24M];
         }
 
@@ -429,7 +429,7 @@ static void _rtl_txrate_selectmode(struct ieee80211_hw *hw,
                 if (mac->opmode == NL80211_IFTYPE_STATION)
                         tcb_desc->ratr_index = 0;
                 else if (mac->opmode == NL80211_IFTYPE_ADHOC) {
-                        if (tcb_desc->b_multicast || tcb_desc->b_broadcast) {
+                        if (tcb_desc->multicast || tcb_desc->broadcast) {
                                 tcb_desc->hw_rate =
                                     rtlpriv->cfg->maps[RTL_RC_CCK_RATE2M];
                                 tcb_desc->use_driver_rate = 1;
@@ -439,7 +439,7 @@ static void _rtl_txrate_selectmode(struct ieee80211_hw *hw,
                 }
         }
 
-        if (rtlpriv->dm.b_useramask) {
+        if (rtlpriv->dm.useramask) {
                 /* TODO we will differentiate adhoc and station futrue  */
                 tcb_desc->mac_id = 0;
 
@@ -461,19 +461,19 @@ static void _rtl_query_bandwidth_mode(struct ieee80211_hw *hw,
         struct rtl_priv *rtlpriv = rtl_priv(hw);
         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 
-        tcb_desc->b_packet_bw = false;
+        tcb_desc->packet_bw = false;
 
         if (!mac->bw_40 || !mac->ht_enable)
                 return;
 
-        if (tcb_desc->b_multicast || tcb_desc->b_broadcast)
+        if (tcb_desc->multicast || tcb_desc->broadcast)
                 return;
 
         /*use legency rate, shall use 20MHz */
         if (tcb_desc->hw_rate <= rtlpriv->cfg->maps[RTL_RC_OFDM_RATE54M])
                 return;
 
-        tcb_desc->b_packet_bw = true;
+        tcb_desc->packet_bw = true;
 }
 
 static u8 _rtl_get_highest_n_rate(struct ieee80211_hw *hw)
@@ -498,7 +498,7 @@ void rtl_get_tcb_desc(struct ieee80211_hw *hw,
         struct rtl_mac *rtlmac = rtl_mac(rtl_priv(hw));
         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
         struct ieee80211_rate *txrate;
-        u16 fc = le16_to_cpu(hdr->frame_control);
+        __le16 fc = hdr->frame_control;
 
         memset(tcb_desc, 0, sizeof(struct rtl_tcb_desc));
 
@@ -545,9 +545,9 @@ void rtl_get_tcb_desc(struct ieee80211_hw *hw,
                 }
 
                 if (is_multicast_ether_addr(ieee80211_get_DA(hdr)))
-                        tcb_desc->b_multicast = 1;
+                        tcb_desc->multicast = 1;
                 else if (is_broadcast_ether_addr(ieee80211_get_DA(hdr)))
-                        tcb_desc->b_broadcast = 1;
+                        tcb_desc->broadcast = 1;
 
                 _rtl_txrate_selectmode(hw, tcb_desc);
                 _rtl_query_bandwidth_mode(hw, tcb_desc);
@@ -570,7 +570,7 @@ bool rtl_tx_mgmt_proc(struct ieee80211_hw *hw, struct sk_buff *skb)
         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
         struct rtl_priv *rtlpriv = rtl_priv(hw);
         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
-        u16 fc = le16_to_cpu(hdr->frame_control);
+        __le16 fc = hdr->frame_control;
 
         if (ieee80211_is_auth(fc)) {
                 RT_TRACE(rtlpriv, COMP_SEND, DBG_DMESG, ("MAC80211_LINKING\n"));
@@ -587,7 +587,7 @@ bool rtl_action_proc(struct ieee80211_hw *hw, struct sk_buff *skb, u8 is_tx)
         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
         struct rtl_priv *rtlpriv = rtl_priv(hw);
-        u16 fc = le16_to_cpu(hdr->frame_control);
+        __le16 fc = hdr->frame_control;
         u8 *act = (u8 *) (((u8 *) skb->data + MAC80211_3ADDR_LEN));
         u8 category;
 
@@ -632,7 +632,7 @@ u8 rtl_is_special_data(struct ieee80211_hw *hw, struct sk_buff *skb, u8 is_tx)
         struct rtl_priv *rtlpriv = rtl_priv(hw);
         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
-        u16 fc = le16_to_cpu(hdr->frame_control);
+        __le16 fc = hdr->frame_control;
         u16 ether_type;
         u8 mac_hdr_len = ieee80211_get_hdrlen_from_skb(skb);
         const struct iphdr *ip;
@@ -646,7 +646,6 @@ u8 rtl_is_special_data(struct ieee80211_hw *hw, struct sk_buff *skb, u8 is_tx)
         ip = (struct iphdr *)((u8 *) skb->data + mac_hdr_len +
                               SNAP_SIZE + PROTOC_TYPE_SIZE);
         ether_type = *(u16 *) ((u8 *) skb->data + mac_hdr_len + SNAP_SIZE);
-        ether_type = ntohs(ether_type);
 
         if (ETH_P_IP == ether_type) {
                 if (IPPROTO_UDP == ip->protocol) {
@@ -690,7 +689,8 @@ u8 rtl_is_special_data(struct ieee80211_hw *hw, struct sk_buff *skb, u8 is_tx)
                 }
 
                 return true;
-        } else if (0x86DD == ether_type) {
+        } else if (ETH_P_IPV6 == ether_type) {
+                /* IPv6 */
                 return true;
         }
 
@@ -777,10 +777,10 @@ void rtl_watchdog_wq_callback(void *data)
         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 
-        bool b_busytraffic = false;
-        bool b_higher_busytraffic = false;
-        bool b_higher_busyrxtraffic = false;
-        bool b_higher_busytxtraffic = false;
+        bool busytraffic = false;
+        bool higher_busytraffic = false;
+        bool higher_busyrxtraffic = false;
+        bool higher_busytxtraffic = false;
 
         u8 idx = 0;
         u32 rx_cnt_inp4eriod = 0;
@@ -788,7 +788,7 @@ void rtl_watchdog_wq_callback(void *data)
         u32 aver_rx_cnt_inperiod = 0;
         u32 aver_tx_cnt_inperiod = 0;
 
-        bool benter_ps = false;
+        bool enter_ps = false;
 
         if (is_hal_stop(rtlhal))
                 return;
@@ -832,29 +832,29 @@ void rtl_watchdog_wq_callback(void *data)
 
                 /* (2) check traffic busy */
                 if (aver_rx_cnt_inperiod > 100 || aver_tx_cnt_inperiod > 100)
-                        b_busytraffic = true;
+                        busytraffic = true;
 
                 /* Higher Tx/Rx data. */
                 if (aver_rx_cnt_inperiod > 4000 ||
                     aver_tx_cnt_inperiod > 4000) {
-                        b_higher_busytraffic = true;
+                        higher_busytraffic = true;
 
                         /* Extremely high Rx data. */
                         if (aver_rx_cnt_inperiod > 5000)
-                                b_higher_busyrxtraffic = true;
+                                higher_busyrxtraffic = true;
                         else
-                                b_higher_busytxtraffic = false;
+                                higher_busytxtraffic = false;
                 }
 
                 if (((rtlpriv->link_info.num_rx_inperiod +
                       rtlpriv->link_info.num_tx_inperiod) > 8) ||
                     (rtlpriv->link_info.num_rx_inperiod > 2))
-                        benter_ps = false;
+                        enter_ps = false;
                 else
-                        benter_ps = true;
+                        enter_ps = true;
 
                 /* LeisurePS only work in infra mode. */
-                if (benter_ps)
+                if (enter_ps)
                         rtl_lps_enter(hw);
                 else
                         rtl_lps_leave(hw);
@@ -863,9 +863,9 @@ void rtl_watchdog_wq_callback(void *data)
         rtlpriv->link_info.num_rx_inperiod = 0;
         rtlpriv->link_info.num_tx_inperiod = 0;
 
-        rtlpriv->link_info.b_busytraffic = b_busytraffic;
-        rtlpriv->link_info.b_higher_busytraffic = b_higher_busytraffic;
-        rtlpriv->link_info.b_higher_busyrxtraffic = b_higher_busyrxtraffic;
+        rtlpriv->link_info.busytraffic = busytraffic;
+        rtlpriv->link_info.higher_busytraffic = higher_busytraffic;
+        rtlpriv->link_info.higher_busyrxtraffic = higher_busyrxtraffic;
 
 }
 
diff --git a/drivers/net/wireless/rtlwifi/base.h b/drivers/net/wireless/rtlwifi/base.h
index 3de5a14745f1..043045342bc7 100644
--- a/drivers/net/wireless/rtlwifi/base.h
+++ b/drivers/net/wireless/rtlwifi/base.h
@@ -30,6 +30,7 @@
 #define __RTL_BASE_H__
 
 #define RTL_DUMMY_OFFSET        0
+#define RTL_RX_DESC_SIZE        24
 #define RTL_DUMMY_UNIT          8
 #define RTL_TX_DUMMY_SIZE       (RTL_DUMMY_OFFSET * RTL_DUMMY_UNIT)
 #define RTL_TX_DESC_SIZE        32
@@ -52,46 +53,22 @@
 #define FRAME_OFFSET_SEQUENCE           22
 #define FRAME_OFFSET_ADDRESS4           24
 
-#define SET_80211_HDR_FRAME_CONTROL(_hdr, _val)         \
-        WRITEEF2BYTE(_hdr, _val)
-#define SET_80211_HDR_TYPE_AND_SUBTYPE(_hdr, _val)      \
-        WRITEEF1BYTE(_hdr, _val)
-#define SET_80211_HDR_PWR_MGNT(_hdr, _val)              \
-        SET_BITS_TO_LE_2BYTE(_hdr, 12, 1, _val)
-#define SET_80211_HDR_TO_DS(_hdr, _val)                 \
-        SET_BITS_TO_LE_2BYTE(_hdr, 8, 1, _val)
 
 #define SET_80211_PS_POLL_AID(_hdr, _val)               \
-        WRITEEF2BYTE(((u8 *)(_hdr)) + 2, _val)
+        (*(u16 *)((u8 *)(_hdr) + 2) = le16_to_cpu(_val))
 #define SET_80211_PS_POLL_BSSID(_hdr, _val)             \
-        CP_MACADDR(((u8 *)(_hdr)) + 4, (u8 *)(_val))
+        memcpy(((u8 *)(_hdr)) + 4, (u8 *)(_val), ETH_ALEN)
 #define SET_80211_PS_POLL_TA(_hdr, _val)                \
-        CP_MACADDR(((u8 *)(_hdr)) + 10, (u8 *)(_val))
+        memcpy(((u8 *)(_hdr)) + 10, (u8 *)(_val), ETH_ALEN)
 
 #define SET_80211_HDR_DURATION(_hdr, _val)      \
-        WRITEEF2BYTE((u8 *)(_hdr)+FRAME_OFFSET_DURATION, _val)
+        (*(u16 *)((u8 *)(_hdr) + FRAME_OFFSET_DURATION) = le16_to_cpu(_val))
 #define SET_80211_HDR_ADDRESS1(_hdr, _val)      \
-        CP_MACADDR((u8 *)(_hdr)+FRAME_OFFSET_ADDRESS1, (u8*)(_val))
+        memcpy((u8 *)(_hdr)+FRAME_OFFSET_ADDRESS1, (u8*)(_val), ETH_ALEN)
 #define SET_80211_HDR_ADDRESS2(_hdr, _val)      \
-        CP_MACADDR((u8 *)(_hdr) + FRAME_OFFSET_ADDRESS2, (u8 *)(_val))
+        memcpy((u8 *)(_hdr) + FRAME_OFFSET_ADDRESS2, (u8 *)(_val), ETH_ALEN)
 #define SET_80211_HDR_ADDRESS3(_hdr, _val)      \
-        CP_MACADDR((u8 *)(_hdr)+FRAME_OFFSET_ADDRESS3, (u8 *)(_val))
-#define SET_80211_HDR_FRAGMENT_SEQUENCE(_hdr, _val)  \
-        WRITEEF2BYTE((u8 *)(_hdr)+FRAME_OFFSET_SEQUENCE, _val)
-
-#define SET_BEACON_PROBE_RSP_TIME_STAMP_LOW(__phdr, __val)      \
-        WRITEEF4BYTE(((u8 *)(__phdr)) + 24, __val)
-#define SET_BEACON_PROBE_RSP_TIME_STAMP_HIGH(__phdr, __val) \
-        WRITEEF4BYTE(((u8 *)(__phdr)) + 28, __val)
-#define SET_BEACON_PROBE_RSP_BEACON_INTERVAL(__phdr, __val) \
-        WRITEEF2BYTE(((u8 *)(__phdr)) + 32, __val)
-#define GET_BEACON_PROBE_RSP_CAPABILITY_INFO(__phdr)    \
-        READEF2BYTE(((u8 *)(__phdr)) + 34)
-#define SET_BEACON_PROBE_RSP_CAPABILITY_INFO(__phdr, __val) \
-        WRITEEF2BYTE(((u8 *)(__phdr)) + 34, __val)
-#define MASK_BEACON_PROBE_RSP_CAPABILITY_INFO(__phdr, __val) \
-        SET_BEACON_PROBE_RSP_CAPABILITY_INFO(__phdr, \
-        (GET_BEACON_PROBE_RSP_CAPABILITY_INFO(__phdr) & (~(__val))))
+        memcpy((u8 *)(_hdr)+FRAME_OFFSET_ADDRESS3, (u8 *)(_val), ETH_ALEN)
 
 int rtl_init_core(struct ieee80211_hw *hw);
 void rtl_deinit_core(struct ieee80211_hw *hw);
diff --git a/drivers/net/wireless/rtlwifi/core.c b/drivers/net/wireless/rtlwifi/core.c
index 25d2d667ffba..b0996bf8a214 100644
--- a/drivers/net/wireless/rtlwifi/core.c
+++ b/drivers/net/wireless/rtlwifi/core.c
@@ -434,9 +434,9 @@ static int rtl_op_conf_tx(struct ieee80211_hw *hw, u16 queue,
 
         aci = _rtl_get_hal_qnum(queue);
         mac->ac[aci].aifs = param->aifs;
-        mac->ac[aci].cw_min = param->cw_min;
-        mac->ac[aci].cw_max = param->cw_max;
-        mac->ac[aci].tx_op = param->txop;
+        mac->ac[aci].cw_min = cpu_to_le16(param->cw_min);
+        mac->ac[aci].cw_max = cpu_to_le16(param->cw_max);
+        mac->ac[aci].tx_op = cpu_to_le16(param->txop);
         memcpy(&mac->edca_param[aci], param, sizeof(*param));
         rtlpriv->cfg->ops->set_qos(hw, aci);
         return 0;
@@ -666,7 +666,7 @@ static void rtl_op_bss_info_changed(struct ieee80211_hw *hw,
                         rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_BASIC_RATE,
                                         (u8 *) (&basic_rates));
 
-                        if (rtlpriv->dm.b_useramask)
+                        if (rtlpriv->dm.useramask)
                                 rtlpriv->cfg->ops->update_rate_mask(hw, 0);
                         else
                                 rtlpriv->cfg->ops->update_rate_table(hw);
@@ -681,7 +681,7 @@ static void rtl_op_bss_info_changed(struct ieee80211_hw *hw,
          */
         if (changed & BSS_CHANGED_ASSOC) {
                 if (bss_conf->assoc) {
-                        if (ppsc->b_fwctrl_lps) {
+                        if (ppsc->fwctrl_lps) {
                                 u8 mstatus = RT_MEDIA_CONNECT;
                                 rtlpriv->cfg->ops->set_hw_reg(hw,
                                                       HW_VAR_H2C_FW_JOINBSSRPT,
@@ -689,7 +689,7 @@ static void rtl_op_bss_info_changed(struct ieee80211_hw *hw,
                                 ppsc->report_linked = true;
                         }
                 } else {
-                        if (ppsc->b_fwctrl_lps) {
+                        if (ppsc->fwctrl_lps) {
                                 u8 mstatus = RT_MEDIA_DISCONNECT;
                                 rtlpriv->cfg->ops->set_hw_reg(hw,
                                                       HW_VAR_H2C_FW_JOINBSSRPT,
@@ -818,7 +818,7 @@ static void rtl_op_sw_scan_complete(struct ieee80211_hw *hw)
                 /* fix fwlps issue */
                 rtlpriv->cfg->ops->set_network_type(hw, mac->opmode);
 
-                if (rtlpriv->dm.b_useramask)
+                if (rtlpriv->dm.useramask)
                         rtlpriv->cfg->ops->update_rate_mask(hw, 0);
                 else
                         rtlpriv->cfg->ops->update_rate_table(hw);
diff --git a/drivers/net/wireless/rtlwifi/debug.h b/drivers/net/wireless/rtlwifi/debug.h
index 08bdec2ceda4..e4aa8687408c 100644
--- a/drivers/net/wireless/rtlwifi/debug.h
+++ b/drivers/net/wireless/rtlwifi/debug.h
@@ -105,6 +105,7 @@
 #define COMP_MAC80211           BIT(26)
 #define COMP_REGD                       BIT(27)
 #define COMP_CHAN                       BIT(28)
+#define COMP_USB                        BIT(29)
 
 /*--------------------------------------------------------------
                 Define the rt_print components
diff --git a/drivers/net/wireless/rtlwifi/pci.c b/drivers/net/wireless/rtlwifi/pci.c
index 1758d4463247..1f18bf7df741 100644
--- a/drivers/net/wireless/rtlwifi/pci.c
+++ b/drivers/net/wireless/rtlwifi/pci.c
@@ -50,7 +50,7 @@ static void _rtl_pci_update_default_setting(struct ieee80211_hw *hw)
         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 
         ppsc->reg_rfps_level = 0;
-        ppsc->b_support_aspm = 0;
+        ppsc->support_aspm = 0;
 
         /*Update PCI ASPM setting */
         ppsc->const_amdpci_aspm = rtlpci->const_amdpci_aspm;
@@ -115,29 +115,29 @@ static void _rtl_pci_update_default_setting(struct ieee80211_hw *hw)
         switch (rtlpci->const_support_pciaspm) {
         case 0:{
                         /*Not support ASPM. */
-                        bool b_support_aspm = false;
-                        ppsc->b_support_aspm = b_support_aspm;
+                        bool support_aspm = false;
+                        ppsc->support_aspm = support_aspm;
                         break;
                 }
         case 1:{
                         /*Support ASPM. */
-                        bool b_support_aspm = true;
-                        bool b_support_backdoor = true;
-                        ppsc->b_support_aspm = b_support_aspm;
+                        bool support_aspm = true;
+                        bool support_backdoor = true;
+                        ppsc->support_aspm = support_aspm;
 
                         /*if(priv->oem_id == RT_CID_TOSHIBA &&
                            !priv->ndis_adapter.amd_l1_patch)
-                           b_support_backdoor = false; */
+                           support_backdoor = false; */
 
-                        ppsc->b_support_backdoor = b_support_backdoor;
+                        ppsc->support_backdoor = support_backdoor;
 
                         break;
                 }
         case 2:
                 /*ASPM value set by chipset. */
                 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL) {
-                        bool b_support_aspm = true;
-                        ppsc->b_support_aspm = b_support_aspm;
+                        bool support_aspm = true;
+                        ppsc->support_aspm = support_aspm;
                 }
                 break;
         default:
@@ -476,9 +476,9 @@ static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio)
 
                 skb = __skb_dequeue(&ring->queue);
                 pci_unmap_single(rtlpci->pdev,
-                                 le32_to_cpu(rtlpriv->cfg->ops->
+                                 rtlpriv->cfg->ops->
                                              get_desc((u8 *) entry, true,
-                                                      HW_DESC_TXBUFF_ADDR)),
+                                                      HW_DESC_TXBUFF_ADDR),
                                  skb->len, PCI_DMA_TODEVICE);
 
                 RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_TRACE,
@@ -557,7 +557,7 @@ static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
                         return;
                 } else {
                         struct ieee80211_hdr *hdr;
-                        u16 fc;
+                        __le16 fc;
                         struct sk_buff *new_skb = NULL;
 
                         rtlpriv->cfg->ops->query_rx_desc(hw, &stats,
@@ -583,9 +583,9 @@ static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
                          */
 
                         hdr = (struct ieee80211_hdr *)(skb->data);
-                        fc = le16_to_cpu(hdr->frame_control);
+                        fc = hdr->frame_control;
 
-                        if (!stats.b_crc) {
+                        if (!stats.crc) {
                                 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status,
                                        sizeof(rx_status));
 
@@ -666,7 +666,7 @@ static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
 
                 }
 done:
-                bufferaddress = cpu_to_le32(*((dma_addr_t *) skb->cb));
+                bufferaddress = (u32)(*((dma_addr_t *) skb->cb));
                 tmp_one = 1;
                 rtlpriv->cfg->ops->set_desc((u8 *) pdesc, false,
                                             HW_DESC_RXBUFF_ADDR,
@@ -690,75 +690,6 @@ done:
 
 }
 
-void _rtl_pci_tx_interrupt(struct ieee80211_hw *hw)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
-        int prio;
-
-        for (prio = 0; prio < RTL_PCI_MAX_TX_QUEUE_COUNT; prio++) {
-                struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
-
-                while (skb_queue_len(&ring->queue)) {
-                        struct rtl_tx_desc *entry = &ring->desc[ring->idx];
-                        struct sk_buff *skb;
-                        struct ieee80211_tx_info *info;
-                        u8 own;
-
-                        /*
-                         *beacon packet will only use the first
-                         *descriptor defautly, and the own may not
-                         *be cleared by the hardware, and
-                         *beacon will free in prepare beacon
-                         */
-                        if (prio == BEACON_QUEUE || prio == TXCMD_QUEUE ||
-                            prio == HCCA_QUEUE)
-                                break;
-
-                        own = (u8)rtlpriv->cfg->ops->get_desc((u8 *)entry,
-                                                               true,
-                                                               HW_DESC_OWN);
-
-                        if (own)
-                                break;
-
-                        skb = __skb_dequeue(&ring->queue);
-                        pci_unmap_single(rtlpci->pdev,
-                                         le32_to_cpu(rtlpriv->cfg->ops->
-                                                     get_desc((u8 *) entry,
-                                                     true,
-                                                     HW_DESC_TXBUFF_ADDR)),
-                                         skb->len, PCI_DMA_TODEVICE);
-
-                        ring->idx = (ring->idx + 1) % ring->entries;
-
-                        info = IEEE80211_SKB_CB(skb);
-                        ieee80211_tx_info_clear_status(info);
-
-                        info->flags |= IEEE80211_TX_STAT_ACK;
-                        /*info->status.rates[0].count = 1; */
-
-                        ieee80211_tx_status_irqsafe(hw, skb);
-
-                        if ((ring->entries - skb_queue_len(&ring->queue))
-                            == 2 && prio != BEACON_QUEUE) {
-                                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
-                                         ("more desc left, wake "
-                                          "skb_queue@%d,ring->idx = %d,"
-                                          "skb_queue_len = 0x%d\n",
-                                          prio, ring->idx,
-                                          skb_queue_len(&ring->queue)));
-
-                                ieee80211_wake_queue(hw,
-                                                     skb_get_queue_mapping
-                                                     (skb));
-                        }
-
-                        skb = NULL;
-                }
-        }
-}
-
 static irqreturn_t _rtl_pci_interrupt(int irq, void *dev_id)
 {
         struct ieee80211_hw *hw = dev_id;
@@ -959,17 +890,17 @@ static void _rtl_pci_init_struct(struct ieee80211_hw *hw,
         rtlhal->hw = hw;
         rtlpci->pdev = pdev;
 
-        ppsc->b_inactiveps = false;
-        ppsc->b_leisure_ps = true;
-        ppsc->b_fwctrl_lps = true;
-        ppsc->b_reg_fwctrl_lps = 3;
+        ppsc->inactiveps = false;
+        ppsc->leisure_ps = true;
+        ppsc->fwctrl_lps = true;
+        ppsc->reg_fwctrl_lps = 3;
         ppsc->reg_max_lps_awakeintvl = 5;
 
-        if (ppsc->b_reg_fwctrl_lps == 1)
+        if (ppsc->reg_fwctrl_lps == 1)
                 ppsc->fwctrl_psmode = FW_PS_MIN_MODE;
-        else if (ppsc->b_reg_fwctrl_lps == 2)
+        else if (ppsc->reg_fwctrl_lps == 2)
                 ppsc->fwctrl_psmode = FW_PS_MAX_MODE;
-        else if (ppsc->b_reg_fwctrl_lps == 3)
+        else if (ppsc->reg_fwctrl_lps == 3)
                 ppsc->fwctrl_psmode = FW_PS_DTIM_MODE;
 
         /*Tx/Rx related var */
@@ -1024,9 +955,8 @@ static int _rtl_pci_init_tx_ring(struct ieee80211_hw *hw,
                  ("queue:%d, ring_addr:%p\n", prio, ring));
 
         for (i = 0; i < entries; i++) {
-                nextdescaddress = cpu_to_le32((u32) dma +
-                                              ((i + 1) % entries) *
-                                              sizeof(*ring));
+                nextdescaddress = (u32) dma + ((i + 1) % entries) *
+                                              sizeof(*ring);
 
                 rtlpriv->cfg->ops->set_desc((u8 *)&(ring[i]),
                                             true, HW_DESC_TX_NEXTDESC_ADDR,
@@ -1090,7 +1020,7 @@ static int _rtl_pci_init_rx_ring(struct ieee80211_hw *hw)
                                            rtlpci->rxbuffersize,
                                            PCI_DMA_FROMDEVICE);
 
-                        bufferaddress = cpu_to_le32(*((dma_addr_t *)skb->cb));
+                        bufferaddress = (u32)(*((dma_addr_t *)skb->cb));
                         rtlpriv->cfg->ops->set_desc((u8 *)entry, false,
                                                     HW_DESC_RXBUFF_ADDR,
                                                     (u8 *)&bufferaddress);
@@ -1121,9 +1051,9 @@ static void _rtl_pci_free_tx_ring(struct ieee80211_hw *hw,
                 struct sk_buff *skb = __skb_dequeue(&ring->queue);
 
                 pci_unmap_single(rtlpci->pdev,
-                                 le32_to_cpu(rtlpriv->cfg->
+                                 rtlpriv->cfg->
                                              ops->get_desc((u8 *) entry, true,
-                                                   HW_DESC_TXBUFF_ADDR)),
+                                                   HW_DESC_TXBUFF_ADDR),
                                  skb->len, PCI_DMA_TODEVICE);
                 kfree_skb(skb);
                 ring->idx = (ring->idx + 1) % ring->entries;
@@ -1255,11 +1185,11 @@ int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw)
                                     __skb_dequeue(&ring->queue);
 
                                 pci_unmap_single(rtlpci->pdev,
-                                                 le32_to_cpu(rtlpriv->cfg->ops->
+                                                 rtlpriv->cfg->ops->
                                                          get_desc((u8 *)
                                                          entry,
                                                          true,
-                                                         HW_DESC_TXBUFF_ADDR)),
+                                                         HW_DESC_TXBUFF_ADDR),
                                                  skb->len, PCI_DMA_TODEVICE);
                                 kfree_skb(skb);
                                 ring->idx = (ring->idx + 1) % ring->entries;
@@ -1273,7 +1203,7 @@ int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw)
         return 0;
 }
 
-unsigned int _rtl_mac_to_hwqueue(u16 fc,
+static unsigned int _rtl_mac_to_hwqueue(__le16 fc,
                 unsigned int mac80211_queue_index)
 {
         unsigned int hw_queue_index;
@@ -1312,7 +1242,7 @@ out:
         return hw_queue_index;
 }
 
-int rtl_pci_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
+static int rtl_pci_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
 {
         struct rtl_priv *rtlpriv = rtl_priv(hw);
         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
@@ -1323,7 +1253,7 @@ int rtl_pci_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
         unsigned int queue_index, hw_queue;
         unsigned long flags;
         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
-        u16 fc = le16_to_cpu(hdr->frame_control);
+        __le16 fc = hdr->frame_control;
         u8 *pda_addr = hdr->addr1;
         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
         /*ssn */
@@ -1429,7 +1359,7 @@ int rtl_pci_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
         return 0;
 }
 
-void rtl_pci_deinit(struct ieee80211_hw *hw)
+static void rtl_pci_deinit(struct ieee80211_hw *hw)
 {
         struct rtl_priv *rtlpriv = rtl_priv(hw);
         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
@@ -1444,7 +1374,7 @@ void rtl_pci_deinit(struct ieee80211_hw *hw)
 
 }
 
-int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev)
+static int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev)
 {
         struct rtl_priv *rtlpriv = rtl_priv(hw);
         int err;
@@ -1461,7 +1391,7 @@ int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev)
         return 1;
 }
 
-int rtl_pci_start(struct ieee80211_hw *hw)
+static int rtl_pci_start(struct ieee80211_hw *hw)
 {
         struct rtl_priv *rtlpriv = rtl_priv(hw);
         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
@@ -1496,7 +1426,7 @@ int rtl_pci_start(struct ieee80211_hw *hw)
         return 0;
 }
 
-void rtl_pci_stop(struct ieee80211_hw *hw)
+static void rtl_pci_stop(struct ieee80211_hw *hw)
 {
         struct rtl_priv *rtlpriv = rtl_priv(hw);
         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
@@ -1838,7 +1768,7 @@ fail3:
         ieee80211_free_hw(hw);
 
         if (rtlpriv->io.pci_mem_start != 0)
-                pci_iounmap(pdev, (void *)rtlpriv->io.pci_mem_start);
+                pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
 
 fail2:
         pci_release_regions(pdev);
@@ -1888,7 +1818,7 @@ void rtl_pci_disconnect(struct pci_dev *pdev)
         }
 
         if (rtlpriv->io.pci_mem_start != 0) {
-                pci_iounmap(pdev, (void *)rtlpriv->io.pci_mem_start);
+                pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
                 pci_release_regions(pdev);
         }
 
diff --git a/drivers/net/wireless/rtlwifi/pci.h b/drivers/net/wireless/rtlwifi/pci.h
index d36a66939958..0caa81429726 100644
--- a/drivers/net/wireless/rtlwifi/pci.h
+++ b/drivers/net/wireless/rtlwifi/pci.h
@@ -244,34 +244,34 @@ int rtl_pci_resume(struct pci_dev *pdev);
 
 static inline u8 pci_read8_sync(struct rtl_priv *rtlpriv, u32 addr)
 {
-        return 0xff & readb((u8 *) rtlpriv->io.pci_mem_start + addr);
+        return readb((u8 __iomem *) rtlpriv->io.pci_mem_start + addr);
 }
 
 static inline u16 pci_read16_sync(struct rtl_priv *rtlpriv, u32 addr)
 {
-        return readw((u8 *) rtlpriv->io.pci_mem_start + addr);
+        return readw((u8 __iomem *) rtlpriv->io.pci_mem_start + addr);
 }
 
 static inline u32 pci_read32_sync(struct rtl_priv *rtlpriv, u32 addr)
 {
-        return readl((u8 *) rtlpriv->io.pci_mem_start + addr);
+        return readl((u8 __iomem *) rtlpriv->io.pci_mem_start + addr);
 }
 
 static inline void pci_write8_async(struct rtl_priv *rtlpriv, u32 addr, u8 val)
 {
-        writeb(val, (u8 *) rtlpriv->io.pci_mem_start + addr);
+        writeb(val, (u8 __iomem *) rtlpriv->io.pci_mem_start + addr);
 }
 
 static inline void pci_write16_async(struct rtl_priv *rtlpriv,
                                      u32 addr, u16 val)
 {
-        writew(val, (u8 *) rtlpriv->io.pci_mem_start + addr);
+        writew(val, (u8 __iomem *) rtlpriv->io.pci_mem_start + addr);
 }
 
 static inline void pci_write32_async(struct rtl_priv *rtlpriv,
                                      u32 addr, u32 val)
 {
-        writel(val, (u8 *) rtlpriv->io.pci_mem_start + addr);
+        writel(val, (u8 __iomem *) rtlpriv->io.pci_mem_start + addr);
 }
 
 static inline void rtl_pci_raw_write_port_ulong(u32 port, u32 val)
diff --git a/drivers/net/wireless/rtlwifi/ps.c b/drivers/net/wireless/rtlwifi/ps.c
index d2326c13449e..6b7e217b6b89 100644
--- a/drivers/net/wireless/rtlwifi/ps.c
+++ b/drivers/net/wireless/rtlwifi/ps.c
@@ -86,7 +86,7 @@ bool rtl_ps_set_rf_state(struct ieee80211_hw *hw,
         struct rtl_priv *rtlpriv = rtl_priv(hw);
         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
         enum rf_pwrstate rtstate;
-        bool b_actionallowed = false;
+        bool actionallowed = false;
         u16 rfwait_cnt = 0;
         unsigned long flag;
 
@@ -139,13 +139,13 @@ no_protect:
                 ppsc->rfoff_reason &= (~changesource);
 
                 if ((changesource == RF_CHANGE_BY_HW) &&
-                    (ppsc->b_hwradiooff == true)) {
-                        ppsc->b_hwradiooff = false;
+                    (ppsc->hwradiooff == true)) {
+                        ppsc->hwradiooff = false;
                 }
 
                 if (!ppsc->rfoff_reason) {
                         ppsc->rfoff_reason = 0;
-                        b_actionallowed = true;
+                        actionallowed = true;
                 }
 
                 break;
@@ -153,17 +153,17 @@ no_protect:
         case ERFOFF:
 
                 if ((changesource == RF_CHANGE_BY_HW)
-                    && (ppsc->b_hwradiooff == false)) {
-                        ppsc->b_hwradiooff = true;
+                    && (ppsc->hwradiooff == false)) {
+                        ppsc->hwradiooff = true;
                 }
 
                 ppsc->rfoff_reason |= changesource;
-                b_actionallowed = true;
+                actionallowed = true;
                 break;
 
         case ERFSLEEP:
                 ppsc->rfoff_reason |= changesource;
-                b_actionallowed = true;
+                actionallowed = true;
                 break;
 
         default:
@@ -172,7 +172,7 @@ no_protect:
                 break;
         }
 
-        if (b_actionallowed)
+        if (actionallowed)
                 rtlpriv->cfg->ops->set_rf_power_state(hw, state_toset);
 
         if (!protect_or_not) {
@@ -181,7 +181,7 @@ no_protect:
                 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag);
         }
 
-        return b_actionallowed;
+        return actionallowed;
 }
 EXPORT_SYMBOL(rtl_ps_set_rf_state);
 
@@ -191,7 +191,7 @@ static void _rtl_ps_inactive_ps(struct ieee80211_hw *hw)
         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 
-        ppsc->b_swrf_processing = true;
+        ppsc->swrf_processing = true;
 
         if (ppsc->inactive_pwrstate == ERFON && rtlhal->interface == INTF_PCI) {
                 if ((ppsc->reg_rfps_level & RT_RF_OFF_LEVL_ASPM) &&
@@ -213,7 +213,7 @@ static void _rtl_ps_inactive_ps(struct ieee80211_hw *hw)
                 }
         }
 
-        ppsc->b_swrf_processing = false;
+        ppsc->swrf_processing = false;
 }
 
 void rtl_ips_nic_off_wq_callback(void *data)
@@ -239,13 +239,13 @@ void rtl_ips_nic_off_wq_callback(void *data)
         if (rtlpriv->sec.being_setkey)
                 return;
 
-        if (ppsc->b_inactiveps) {
+        if (ppsc->inactiveps) {
                 rtstate = ppsc->rfpwr_state;
 
                 /*
                  *Do not enter IPS in the following conditions:
                  *(1) RF is already OFF or Sleep
-                 *(2) b_swrf_processing (indicates the IPS is still under going)
+                 *(2) swrf_processing (indicates the IPS is still under going)
                  *(3) Connectted (only disconnected can trigger IPS)
                  *(4) IBSS (send Beacon)
                  *(5) AP mode (send Beacon)
@@ -253,14 +253,14 @@ void rtl_ips_nic_off_wq_callback(void *data)
                  */
 
                 if (rtstate == ERFON &&
-                    !ppsc->b_swrf_processing &&
+                    !ppsc->swrf_processing &&
                     (mac->link_state == MAC80211_NOLINK) &&
                     !mac->act_scanning) {
                         RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
                                  ("IPSEnter(): Turn off RF.\n"));
 
                         ppsc->inactive_pwrstate = ERFOFF;
-                        ppsc->b_in_powersavemode = true;
+                        ppsc->in_powersavemode = true;
 
                         /*rtl_pci_reset_trx_ring(hw); */
                         _rtl_ps_inactive_ps(hw);
@@ -290,15 +290,15 @@ void rtl_ips_nic_on(struct ieee80211_hw *hw)
 
         spin_lock_irqsave(&rtlpriv->locks.ips_lock, flags);
 
-        if (ppsc->b_inactiveps) {
+        if (ppsc->inactiveps) {
                 rtstate = ppsc->rfpwr_state;
 
                 if (rtstate != ERFON &&
-                    !ppsc->b_swrf_processing &&
+                    !ppsc->swrf_processing &&
                     ppsc->rfoff_reason <= RF_CHANGE_BY_IPS) {
 
                         ppsc->inactive_pwrstate = ERFON;
-                        ppsc->b_in_powersavemode = false;
+                        ppsc->in_powersavemode = false;
 
                         _rtl_ps_inactive_ps(hw);
                 }
@@ -370,9 +370,9 @@ static void rtl_lps_set_psmode(struct ieee80211_hw *hw, u8 rt_psmode)
          *   mode and set RPWM to turn RF on.
          */
 
-        if ((ppsc->b_fwctrl_lps) && (ppsc->b_leisure_ps) &&
+        if ((ppsc->fwctrl_lps) && (ppsc->leisure_ps) &&
              ppsc->report_linked) {
-                bool b_fw_current_inps;
+                bool fw_current_inps;
                 if (ppsc->dot11_psmode == EACTIVE) {
                         RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
                                  ("FW LPS leave ps_mode:%x\n",
@@ -385,11 +385,11 @@ static void rtl_lps_set_psmode(struct ieee80211_hw *hw, u8 rt_psmode)
                         rtlpriv->cfg->ops->set_hw_reg(hw,
                                         HW_VAR_H2C_FW_PWRMODE,
                                         (u8 *) (&fw_pwrmode));
-                        b_fw_current_inps = false;
+                        fw_current_inps = false;
 
                         rtlpriv->cfg->ops->set_hw_reg(hw,
                                         HW_VAR_FW_PSMODE_STATUS,
-                                        (u8 *) (&b_fw_current_inps));
+                                        (u8 *) (&fw_current_inps));
 
                 } else {
                         if (rtl_get_fwlps_doze(hw)) {
@@ -398,10 +398,10 @@ static void rtl_lps_set_psmode(struct ieee80211_hw *hw, u8 rt_psmode)
                                                  ppsc->fwctrl_psmode));
 
                                 rpwm_val = 0x02;        /* RF off */
-                                b_fw_current_inps = true;
+                                fw_current_inps = true;
                                 rtlpriv->cfg->ops->set_hw_reg(hw,
                                                 HW_VAR_FW_PSMODE_STATUS,
-                                                (u8 *) (&b_fw_current_inps));
+                                                (u8 *) (&fw_current_inps));
                                 rtlpriv->cfg->ops->set_hw_reg(hw,
                                                 HW_VAR_H2C_FW_PWRMODE,
                                                 (u8 *) (&ppsc->fwctrl_psmode));
@@ -425,13 +425,13 @@ void rtl_lps_enter(struct ieee80211_hw *hw)
         struct rtl_priv *rtlpriv = rtl_priv(hw);
         unsigned long flag;
 
-        if (!(ppsc->b_fwctrl_lps && ppsc->b_leisure_ps))
+        if (!(ppsc->fwctrl_lps && ppsc->leisure_ps))
                 return;
 
         if (rtlpriv->sec.being_setkey)
                 return;
 
-        if (rtlpriv->link_info.b_busytraffic)
+        if (rtlpriv->link_info.busytraffic)
                 return;
 
         /*sleep after linked 10s, to let DHCP and 4-way handshake ok enough!! */
@@ -446,7 +446,7 @@ void rtl_lps_enter(struct ieee80211_hw *hw)
 
         spin_lock_irqsave(&rtlpriv->locks.lps_lock, flag);
 
-        if (ppsc->b_leisure_ps) {
+        if (ppsc->leisure_ps) {
                 /* Idle for a while if we connect to AP a while ago. */
                 if (mac->cnt_after_linked >= 2) {
                         if (ppsc->dot11_psmode == EACTIVE) {
@@ -470,7 +470,7 @@ void rtl_lps_leave(struct ieee80211_hw *hw)
 
         spin_lock_irqsave(&rtlpriv->locks.lps_lock, flag);
 
-        if (ppsc->b_fwctrl_lps && ppsc->b_leisure_ps) {
+        if (ppsc->fwctrl_lps && ppsc->leisure_ps) {
                 if (ppsc->dot11_psmode != EACTIVE) {
 
                         /*FIX ME */
diff --git a/drivers/net/wireless/rtlwifi/rtl8192c/dm_common.c b/drivers/net/wireless/rtlwifi/rtl8192c/dm_common.c
new file mode 100644
index 000000000000..b4f1e4e6b733
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192c/dm_common.c
@@ -0,0 +1,1388 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+struct dig_t dm_digtable;
+static struct ps_t dm_pstable;
+
+static const u32 ofdmswing_table[OFDM_TABLE_SIZE] = {
+        0x7f8001fe,
+        0x788001e2,
+        0x71c001c7,
+        0x6b8001ae,
+        0x65400195,
+        0x5fc0017f,
+        0x5a400169,
+        0x55400155,
+        0x50800142,
+        0x4c000130,
+        0x47c0011f,
+        0x43c0010f,
+        0x40000100,
+        0x3c8000f2,
+        0x390000e4,
+        0x35c000d7,
+        0x32c000cb,
+        0x300000c0,
+        0x2d4000b5,
+        0x2ac000ab,
+        0x288000a2,
+        0x26000098,
+        0x24000090,
+        0x22000088,
+        0x20000080,
+        0x1e400079,
+        0x1c800072,
+        0x1b00006c,
+        0x19800066,
+        0x18000060,
+        0x16c0005b,
+        0x15800056,
+        0x14400051,
+        0x1300004c,
+        0x12000048,
+        0x11000044,
+        0x10000040,
+};
+
+static const u8 cckswing_table_ch1ch13[CCK_TABLE_SIZE][8] = {
+        {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04},
+        {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04},
+        {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},
+        {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03},
+        {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},
+        {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03},
+        {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},
+        {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03},
+        {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},
+        {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02},
+        {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},
+        {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02},
+        {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},
+        {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02},
+        {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},
+        {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02},
+        {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},
+        {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02},
+        {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},
+        {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
+        {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
+        {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01},
+        {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01},
+        {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01},
+        {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01},
+        {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01},
+        {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01},
+        {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01},
+        {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01},
+        {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01},
+        {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01},
+        {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01},
+        {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}
+};
+
+static const u8 cckswing_table_ch14[CCK_TABLE_SIZE][8] = {
+        {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00},
+        {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00},
+        {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},
+        {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00},
+        {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},
+        {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00},
+        {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},
+        {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00},
+        {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},
+        {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00},
+        {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},
+        {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00},
+        {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},
+        {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00},
+        {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},
+        {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00},
+        {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},
+        {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00},
+        {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},
+        {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
+        {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
+        {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00},
+        {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00},
+        {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},
+        {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},
+        {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00},
+        {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},
+        {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},
+        {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},
+        {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},
+        {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},
+        {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},
+        {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}
+};
+
+static void rtl92c_dm_diginit(struct ieee80211_hw *hw)
+{
+        dm_digtable.dig_enable_flag = true;
+        dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
+        dm_digtable.cur_igvalue = 0x20;
+        dm_digtable.pre_igvalue = 0x0;
+        dm_digtable.cursta_connectctate = DIG_STA_DISCONNECT;
+        dm_digtable.presta_connectstate = DIG_STA_DISCONNECT;
+        dm_digtable.curmultista_connectstate = DIG_MULTISTA_DISCONNECT;
+        dm_digtable.rssi_lowthresh = DM_DIG_THRESH_LOW;
+        dm_digtable.rssi_highthresh = DM_DIG_THRESH_HIGH;
+        dm_digtable.fa_lowthresh = DM_FALSEALARM_THRESH_LOW;
+        dm_digtable.fa_highthresh = DM_FALSEALARM_THRESH_HIGH;
+        dm_digtable.rx_gain_range_max = DM_DIG_MAX;
+        dm_digtable.rx_gain_range_min = DM_DIG_MIN;
+        dm_digtable.backoff_val = DM_DIG_BACKOFF_DEFAULT;
+        dm_digtable.backoff_val_range_max = DM_DIG_BACKOFF_MAX;
+        dm_digtable.backoff_val_range_min = DM_DIG_BACKOFF_MIN;
+        dm_digtable.pre_cck_pd_state = CCK_PD_STAGE_MAX;
+        dm_digtable.cur_cck_pd_state = CCK_PD_STAGE_MAX;
+}
+
+static u8 rtl92c_dm_initial_gain_min_pwdb(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        long rssi_val_min = 0;
+
+        if ((dm_digtable.curmultista_connectstate == DIG_MULTISTA_CONNECT) &&
+            (dm_digtable.cursta_connectctate == DIG_STA_CONNECT)) {
+                if (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb != 0)
+                        rssi_val_min =
+                            (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb >
+                             rtlpriv->dm.undecorated_smoothed_pwdb) ?
+                            rtlpriv->dm.undecorated_smoothed_pwdb :
+                            rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
+                else
+                        rssi_val_min = rtlpriv->dm.undecorated_smoothed_pwdb;
+        } else if (dm_digtable.cursta_connectctate == DIG_STA_CONNECT ||
+                   dm_digtable.cursta_connectctate == DIG_STA_BEFORE_CONNECT) {
+                rssi_val_min = rtlpriv->dm.undecorated_smoothed_pwdb;
+        } else if (dm_digtable.curmultista_connectstate ==
+                   DIG_MULTISTA_CONNECT) {
+                rssi_val_min = rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
+        }
+
+        return (u8) rssi_val_min;
+}
+
+static void rtl92c_dm_false_alarm_counter_statistics(struct ieee80211_hw *hw)
+{
+        u32 ret_value;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt);
+
+        ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER1, MASKDWORD);
+        falsealm_cnt->cnt_parity_fail = ((ret_value & 0xffff0000) >> 16);
+
+        ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER2, MASKDWORD);
+        falsealm_cnt->cnt_rate_illegal = (ret_value & 0xffff);
+        falsealm_cnt->cnt_crc8_fail = ((ret_value & 0xffff0000) >> 16);
+
+        ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER3, MASKDWORD);
+        falsealm_cnt->cnt_mcs_fail = (ret_value & 0xffff);
+        falsealm_cnt->cnt_ofdm_fail = falsealm_cnt->cnt_parity_fail +
+            falsealm_cnt->cnt_rate_illegal +
+            falsealm_cnt->cnt_crc8_fail + falsealm_cnt->cnt_mcs_fail;
+
+        rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, BIT(14), 1);
+        ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERLOWER, MASKBYTE0);
+        falsealm_cnt->cnt_cck_fail = ret_value;
+
+        ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERUPPER, MASKBYTE3);
+        falsealm_cnt->cnt_cck_fail += (ret_value & 0xff) << 8;
+        falsealm_cnt->cnt_all = (falsealm_cnt->cnt_parity_fail +
+                                 falsealm_cnt->cnt_rate_illegal +
+                                 falsealm_cnt->cnt_crc8_fail +
+                                 falsealm_cnt->cnt_mcs_fail +
+                                 falsealm_cnt->cnt_cck_fail);
+
+        rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 1);
+        rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 0);
+        rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 0);
+        rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 2);
+
+        RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
+                 ("cnt_parity_fail = %d, cnt_rate_illegal = %d, "
+                  "cnt_crc8_fail = %d, cnt_mcs_fail = %d\n",
+                  falsealm_cnt->cnt_parity_fail,
+                  falsealm_cnt->cnt_rate_illegal,
+                  falsealm_cnt->cnt_crc8_fail, falsealm_cnt->cnt_mcs_fail));
+
+        RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
+                 ("cnt_ofdm_fail = %x, cnt_cck_fail = %x, cnt_all = %x\n",
+                  falsealm_cnt->cnt_ofdm_fail,
+                  falsealm_cnt->cnt_cck_fail, falsealm_cnt->cnt_all));
+}
+
+static void rtl92c_dm_ctrl_initgain_by_fa(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u8 value_igi = dm_digtable.cur_igvalue;
+
+        if (rtlpriv->falsealm_cnt.cnt_all < DM_DIG_FA_TH0)
+                value_igi--;
+        else if (rtlpriv->falsealm_cnt.cnt_all < DM_DIG_FA_TH1)
+                value_igi += 0;
+        else if (rtlpriv->falsealm_cnt.cnt_all < DM_DIG_FA_TH2)
+                value_igi++;
+        else if (rtlpriv->falsealm_cnt.cnt_all >= DM_DIG_FA_TH2)
+                value_igi += 2;
+        if (value_igi > DM_DIG_FA_UPPER)
+                value_igi = DM_DIG_FA_UPPER;
+        else if (value_igi < DM_DIG_FA_LOWER)
+                value_igi = DM_DIG_FA_LOWER;
+        if (rtlpriv->falsealm_cnt.cnt_all > 10000)
+                value_igi = 0x32;
+
+        dm_digtable.cur_igvalue = value_igi;
+        rtl92c_dm_write_dig(hw);
+}
+
+static void rtl92c_dm_ctrl_initgain_by_rssi(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        if (rtlpriv->falsealm_cnt.cnt_all > dm_digtable.fa_highthresh) {
+                if ((dm_digtable.backoff_val - 2) <
+                    dm_digtable.backoff_val_range_min)
+                        dm_digtable.backoff_val =
+                            dm_digtable.backoff_val_range_min;
+                else
+                        dm_digtable.backoff_val -= 2;
+        } else if (rtlpriv->falsealm_cnt.cnt_all < dm_digtable.fa_lowthresh) {
+                if ((dm_digtable.backoff_val + 2) >
+                    dm_digtable.backoff_val_range_max)
+                        dm_digtable.backoff_val =
+                            dm_digtable.backoff_val_range_max;
+                else
+                        dm_digtable.backoff_val += 2;
+        }
+
+        if ((dm_digtable.rssi_val_min + 10 - dm_digtable.backoff_val) >
+            dm_digtable.rx_gain_range_max)
+                dm_digtable.cur_igvalue = dm_digtable.rx_gain_range_max;
+        else if ((dm_digtable.rssi_val_min + 10 -
+                  dm_digtable.backoff_val) < dm_digtable.rx_gain_range_min)
+                dm_digtable.cur_igvalue = dm_digtable.rx_gain_range_min;
+        else
+                dm_digtable.cur_igvalue = dm_digtable.rssi_val_min + 10 -
+                    dm_digtable.backoff_val;
+
+        RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
+                 ("rssi_val_min = %x backoff_val %x\n",
+                  dm_digtable.rssi_val_min, dm_digtable.backoff_val));
+
+        rtl92c_dm_write_dig(hw);
+}
+
+static void rtl92c_dm_initial_gain_multi_sta(struct ieee80211_hw *hw)
+{
+        static u8 binitialized; /* initialized to false */
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        long rssi_strength = rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
+        bool multi_sta = false;
+
+        if (mac->opmode == NL80211_IFTYPE_ADHOC)
+                multi_sta = true;
+
+        if ((multi_sta == false) || (dm_digtable.cursta_connectctate !=
+                                     DIG_STA_DISCONNECT)) {
+                binitialized = false;
+                dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
+                return;
+        } else if (binitialized == false) {
+                binitialized = true;
+                dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_0;
+                dm_digtable.cur_igvalue = 0x20;
+                rtl92c_dm_write_dig(hw);
+        }
+
+        if (dm_digtable.curmultista_connectstate == DIG_MULTISTA_CONNECT) {
+                if ((rssi_strength < dm_digtable.rssi_lowthresh) &&
+                    (dm_digtable.dig_ext_port_stage != DIG_EXT_PORT_STAGE_1)) {
+
+                        if (dm_digtable.dig_ext_port_stage ==
+                            DIG_EXT_PORT_STAGE_2) {
+                                dm_digtable.cur_igvalue = 0x20;
+                                rtl92c_dm_write_dig(hw);
+                        }
+
+                        dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_1;
+                } else if (rssi_strength > dm_digtable.rssi_highthresh) {
+                        dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_2;
+                        rtl92c_dm_ctrl_initgain_by_fa(hw);
+                }
+        } else if (dm_digtable.dig_ext_port_stage != DIG_EXT_PORT_STAGE_0) {
+                dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_0;
+                dm_digtable.cur_igvalue = 0x20;
+                rtl92c_dm_write_dig(hw);
+        }
+
+        RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
+                 ("curmultista_connectstate = "
+                  "%x dig_ext_port_stage %x\n",
+                  dm_digtable.curmultista_connectstate,
+                  dm_digtable.dig_ext_port_stage));
+}
+
+static void rtl92c_dm_initial_gain_sta(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
+                 ("presta_connectstate = %x,"
+                  " cursta_connectctate = %x\n",
+                  dm_digtable.presta_connectstate,
+                  dm_digtable.cursta_connectctate));
+
+        if (dm_digtable.presta_connectstate == dm_digtable.cursta_connectctate
+            || dm_digtable.cursta_connectctate == DIG_STA_BEFORE_CONNECT
+            || dm_digtable.cursta_connectctate == DIG_STA_CONNECT) {
+
+                if (dm_digtable.cursta_connectctate != DIG_STA_DISCONNECT) {
+                        dm_digtable.rssi_val_min =
+                            rtl92c_dm_initial_gain_min_pwdb(hw);
+                        rtl92c_dm_ctrl_initgain_by_rssi(hw);
+                }
+        } else {
+                dm_digtable.rssi_val_min = 0;
+                dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
+                dm_digtable.backoff_val = DM_DIG_BACKOFF_DEFAULT;
+                dm_digtable.cur_igvalue = 0x20;
+                dm_digtable.pre_igvalue = 0;
+                rtl92c_dm_write_dig(hw);
+        }
+}
+
+static void rtl92c_dm_cck_packet_detection_thresh(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+
+        if (dm_digtable.cursta_connectctate == DIG_STA_CONNECT) {
+                dm_digtable.rssi_val_min = rtl92c_dm_initial_gain_min_pwdb(hw);
+
+                if (dm_digtable.pre_cck_pd_state == CCK_PD_STAGE_LowRssi) {
+                        if (dm_digtable.rssi_val_min <= 25)
+                                dm_digtable.cur_cck_pd_state =
+                                    CCK_PD_STAGE_LowRssi;
+                        else
+                                dm_digtable.cur_cck_pd_state =
+                                    CCK_PD_STAGE_HighRssi;
+                } else {
+                        if (dm_digtable.rssi_val_min <= 20)
+                                dm_digtable.cur_cck_pd_state =
+                                    CCK_PD_STAGE_LowRssi;
+                        else
+                                dm_digtable.cur_cck_pd_state =
+                                    CCK_PD_STAGE_HighRssi;
+                }
+        } else {
+                dm_digtable.cur_cck_pd_state = CCK_PD_STAGE_MAX;
+        }
+
+        if (dm_digtable.pre_cck_pd_state != dm_digtable.cur_cck_pd_state) {
+                if (dm_digtable.cur_cck_pd_state == CCK_PD_STAGE_LowRssi) {
+                        if (rtlpriv->falsealm_cnt.cnt_cck_fail > 800)
+                                dm_digtable.cur_cck_fa_state =
+                                    CCK_FA_STAGE_High;
+                        else
+                                dm_digtable.cur_cck_fa_state = CCK_FA_STAGE_Low;
+
+                        if (dm_digtable.pre_cck_fa_state !=
+                            dm_digtable.cur_cck_fa_state) {
+                                if (dm_digtable.cur_cck_fa_state ==
+                                    CCK_FA_STAGE_Low)
+                                        rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2,
+                                                      0x83);
+                                else
+                                        rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2,
+                                                      0xcd);
+
+                                dm_digtable.pre_cck_fa_state =
+                                    dm_digtable.cur_cck_fa_state;
+                        }
+
+                        rtl_set_bbreg(hw, RCCK0_SYSTEM, MASKBYTE1, 0x40);
+
+                        if (IS_92C_SERIAL(rtlhal->version))
+                                rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT,
+                                              MASKBYTE2, 0xd7);
+                } else {
+                        rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2, 0xcd);
+                        rtl_set_bbreg(hw, RCCK0_SYSTEM, MASKBYTE1, 0x47);
+
+                        if (IS_92C_SERIAL(rtlhal->version))
+                                rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT,
+                                              MASKBYTE2, 0xd3);
+                }
+                dm_digtable.pre_cck_pd_state = dm_digtable.cur_cck_pd_state;
+        }
+
+        RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
+                 ("CCKPDStage=%x\n", dm_digtable.cur_cck_pd_state));
+
+        RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
+                 ("is92C=%x\n", IS_92C_SERIAL(rtlhal->version)));
+}
+
+static void rtl92c_dm_ctrl_initgain_by_twoport(struct ieee80211_hw *hw)
+{
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+
+        if (mac->act_scanning == true)
+                return;
+
+        if ((mac->link_state > MAC80211_NOLINK) &&
+            (mac->link_state < MAC80211_LINKED))
+                dm_digtable.cursta_connectctate = DIG_STA_BEFORE_CONNECT;
+        else if (mac->link_state >= MAC80211_LINKED)
+                dm_digtable.cursta_connectctate = DIG_STA_CONNECT;
+        else
+                dm_digtable.cursta_connectctate = DIG_STA_DISCONNECT;
+
+        rtl92c_dm_initial_gain_sta(hw);
+        rtl92c_dm_initial_gain_multi_sta(hw);
+        rtl92c_dm_cck_packet_detection_thresh(hw);
+
+        dm_digtable.presta_connectstate = dm_digtable.cursta_connectctate;
+
+}
+
+static void rtl92c_dm_dig(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        if (rtlpriv->dm.dm_initialgain_enable == false)
+                return;
+        if (dm_digtable.dig_enable_flag == false)
+                return;
+
+        rtl92c_dm_ctrl_initgain_by_twoport(hw);
+
+}
+
+static void rtl92c_dm_init_dynamic_txpower(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        rtlpriv->dm.dynamic_txpower_enable = false;
+
+        rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
+        rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
+}
+
+void rtl92c_dm_write_dig(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
+                 ("cur_igvalue = 0x%x, "
+                  "pre_igvalue = 0x%x, backoff_val = %d\n",
+                  dm_digtable.cur_igvalue, dm_digtable.pre_igvalue,
+                  dm_digtable.backoff_val));
+
+        if (dm_digtable.pre_igvalue != dm_digtable.cur_igvalue) {
+                rtl_set_bbreg(hw, ROFDM0_XAAGCCORE1, 0x7f,
+                              dm_digtable.cur_igvalue);
+                rtl_set_bbreg(hw, ROFDM0_XBAGCCORE1, 0x7f,
+                              dm_digtable.cur_igvalue);
+
+                dm_digtable.pre_igvalue = dm_digtable.cur_igvalue;
+        }
+}
+
+static void rtl92c_dm_pwdb_monitor(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        long tmpentry_max_pwdb = 0, tmpentry_min_pwdb = 0xff;
+
+        u8 h2c_parameter[3] = { 0 };
+
+        return;
+
+        if (tmpentry_max_pwdb != 0) {
+                rtlpriv->dm.entry_max_undecoratedsmoothed_pwdb =
+                    tmpentry_max_pwdb;
+        } else {
+                rtlpriv->dm.entry_max_undecoratedsmoothed_pwdb = 0;
+        }
+
+        if (tmpentry_min_pwdb != 0xff) {
+                rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb =
+                    tmpentry_min_pwdb;
+        } else {
+                rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb = 0;
+        }
+
+        h2c_parameter[2] = (u8) (rtlpriv->dm.undecorated_smoothed_pwdb & 0xFF);
+        h2c_parameter[0] = 0;
+
+        rtl92c_fill_h2c_cmd(hw, H2C_RSSI_REPORT, 3, h2c_parameter);
+}
+
+void rtl92c_dm_init_edca_turbo(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        rtlpriv->dm.current_turbo_edca = false;
+        rtlpriv->dm.is_any_nonbepkts = false;
+        rtlpriv->dm.is_cur_rdlstate = false;
+}
+
+static void rtl92c_dm_check_edca_turbo(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        static u64 last_txok_cnt;
+        static u64 last_rxok_cnt;
+        u64 cur_txok_cnt;
+        u64 cur_rxok_cnt;
+        u32 edca_be_ul = 0x5ea42b;
+        u32 edca_be_dl = 0x5ea42b;
+
+        if (mac->opmode == NL80211_IFTYPE_ADHOC)
+                goto dm_checkedcaturbo_exit;
+
+        if (mac->link_state != MAC80211_LINKED) {
+                rtlpriv->dm.current_turbo_edca = false;
+                return;
+        }
+
+        if (!mac->ht_enable) {  /*FIX MERGE */
+                if (!(edca_be_ul & 0xffff0000))
+                        edca_be_ul |= 0x005e0000;
+
+                if (!(edca_be_dl & 0xffff0000))
+                        edca_be_dl |= 0x005e0000;
+        }
+
+        if ((!rtlpriv->dm.is_any_nonbepkts) &&
+            (!rtlpriv->dm.disable_framebursting)) {
+                cur_txok_cnt = rtlpriv->stats.txbytesunicast - last_txok_cnt;
+                cur_rxok_cnt = rtlpriv->stats.rxbytesunicast - last_rxok_cnt;
+                if (cur_rxok_cnt > 4 * cur_txok_cnt) {
+                        if (!rtlpriv->dm.is_cur_rdlstate ||
+                            !rtlpriv->dm.current_turbo_edca) {
+                                rtl_write_dword(rtlpriv,
+                                                REG_EDCA_BE_PARAM,
+                                                edca_be_dl);
+                                rtlpriv->dm.is_cur_rdlstate = true;
+                        }
+                } else {
+                        if (rtlpriv->dm.is_cur_rdlstate ||
+                            !rtlpriv->dm.current_turbo_edca) {
+                                rtl_write_dword(rtlpriv,
+                                                REG_EDCA_BE_PARAM,
+                                                edca_be_ul);
+                                rtlpriv->dm.is_cur_rdlstate = false;
+                        }
+                }
+                rtlpriv->dm.current_turbo_edca = true;
+        } else {
+                if (rtlpriv->dm.current_turbo_edca) {
+                        u8 tmp = AC0_BE;
+                        rtlpriv->cfg->ops->set_hw_reg(hw,
+                                                      HW_VAR_AC_PARAM,
+                                                      (u8 *) (&tmp));
+                        rtlpriv->dm.current_turbo_edca = false;
+                }
+        }
+
+dm_checkedcaturbo_exit:
+        rtlpriv->dm.is_any_nonbepkts = false;
+        last_txok_cnt = rtlpriv->stats.txbytesunicast;
+        last_rxok_cnt = rtlpriv->stats.rxbytesunicast;
+}
+
+static void rtl92c_dm_txpower_tracking_callback_thermalmeter(struct ieee80211_hw
+                                                             *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        u8 thermalvalue, delta, delta_lck, delta_iqk;
+        long ele_a, ele_d, temp_cck, val_x, value32;
+        long val_y, ele_c;
+        u8 ofdm_index[2], cck_index, ofdm_index_old[2], cck_index_old;
+        int i;
+        bool is2t = IS_92C_SERIAL(rtlhal->version);
+        u8 txpwr_level[2] = {0, 0};
+        u8 ofdm_min_index = 6, rf;
+
+        rtlpriv->dm.txpower_trackingInit = true;
+        RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
+                 ("rtl92c_dm_txpower_tracking_callback_thermalmeter\n"));
+
+        thermalvalue = (u8) rtl_get_rfreg(hw, RF90_PATH_A, RF_T_METER, 0x1f);
+
+        RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
+                 ("Readback Thermal Meter = 0x%x pre thermal meter 0x%x "
+                  "eeprom_thermalmeter 0x%x\n",
+                  thermalvalue, rtlpriv->dm.thermalvalue,
+                  rtlefuse->eeprom_thermalmeter));
+
+        rtl92c_phy_ap_calibrate(hw, (thermalvalue -
+                                     rtlefuse->eeprom_thermalmeter));
+        if (is2t)
+                rf = 2;
+        else
+                rf = 1;
+
+        if (thermalvalue) {
+                ele_d = rtl_get_bbreg(hw, ROFDM0_XATXIQIMBALANCE,
+                                      MASKDWORD) & MASKOFDM_D;
+
+                for (i = 0; i < OFDM_TABLE_LENGTH; i++) {
+                        if (ele_d == (ofdmswing_table[i] & MASKOFDM_D)) {
+                                ofdm_index_old[0] = (u8) i;
+
+                                RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
+                                        ("Initial pathA ele_d reg0x%x = 0x%lx, "
+                                         "ofdm_index=0x%x\n",
+                                         ROFDM0_XATXIQIMBALANCE,
+                                         ele_d, ofdm_index_old[0]));
+                                break;
+                        }
+                }
+
+                if (is2t) {
+                        ele_d = rtl_get_bbreg(hw, ROFDM0_XBTXIQIMBALANCE,
+                                              MASKDWORD) & MASKOFDM_D;
+
+                        for (i = 0; i < OFDM_TABLE_LENGTH; i++) {
+                                if (ele_d == (ofdmswing_table[i] &
+                                    MASKOFDM_D)) {
+                                        ofdm_index_old[1] = (u8) i;
+
+                                        RT_TRACE(rtlpriv, COMP_POWER_TRACKING,
+                                           DBG_LOUD,
+                                           ("Initial pathB ele_d reg0x%x = "
+                                           "0x%lx, ofdm_index=0x%x\n",
+                                           ROFDM0_XBTXIQIMBALANCE, ele_d,
+                                           ofdm_index_old[1]));
+                                        break;
+                                }
+                        }
+                }
+
+                temp_cck =
+                    rtl_get_bbreg(hw, RCCK0_TXFILTER2, MASKDWORD) & MASKCCK;
+
+                for (i = 0; i < CCK_TABLE_LENGTH; i++) {
+                        if (rtlpriv->dm.cck_inch14) {
+                                if (memcmp((void *)&temp_cck,
+                                           (void *)&cckswing_table_ch14[i][2],
+                                           4) == 0) {
+                                        cck_index_old = (u8) i;
+
+                                        RT_TRACE(rtlpriv, COMP_POWER_TRACKING,
+                                                 DBG_LOUD,
+                                                 ("Initial reg0x%x = 0x%lx, "
+                                                  "cck_index=0x%x, ch 14 %d\n",
+                                                  RCCK0_TXFILTER2, temp_cck,
+                                                  cck_index_old,
+                                                  rtlpriv->dm.cck_inch14));
+                                        break;
+                                }
+                        } else {
+                                if (memcmp((void *)&temp_cck,
+                                           (void *)
+                                           &cckswing_table_ch1ch13[i][2],
+                                           4) == 0) {
+                                        cck_index_old = (u8) i;
+
+                                        RT_TRACE(rtlpriv, COMP_POWER_TRACKING,
+                                                 DBG_LOUD,
+                                                 ("Initial reg0x%x = 0x%lx, "
+                                                  "cck_index=0x%x, ch14 %d\n",
+                                                  RCCK0_TXFILTER2, temp_cck,
+                                                  cck_index_old,
+                                                  rtlpriv->dm.cck_inch14));
+                                        break;
+                                }
+                        }
+                }
+
+                if (!rtlpriv->dm.thermalvalue) {
+                        rtlpriv->dm.thermalvalue =
+                            rtlefuse->eeprom_thermalmeter;
+                        rtlpriv->dm.thermalvalue_lck = thermalvalue;
+                        rtlpriv->dm.thermalvalue_iqk = thermalvalue;
+                        for (i = 0; i < rf; i++)
+                                rtlpriv->dm.ofdm_index[i] = ofdm_index_old[i];
+                        rtlpriv->dm.cck_index = cck_index_old;
+                }
+
+                delta = (thermalvalue > rtlpriv->dm.thermalvalue) ?
+                    (thermalvalue - rtlpriv->dm.thermalvalue) :
+                    (rtlpriv->dm.thermalvalue - thermalvalue);
+
+                delta_lck = (thermalvalue > rtlpriv->dm.thermalvalue_lck) ?
+                    (thermalvalue - rtlpriv->dm.thermalvalue_lck) :
+                    (rtlpriv->dm.thermalvalue_lck - thermalvalue);
+
+                delta_iqk = (thermalvalue > rtlpriv->dm.thermalvalue_iqk) ?
+                    (thermalvalue - rtlpriv->dm.thermalvalue_iqk) :
+                    (rtlpriv->dm.thermalvalue_iqk - thermalvalue);
+
+                RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
+                        ("Readback Thermal Meter = 0x%x pre thermal meter 0x%x "
+                         "eeprom_thermalmeter 0x%x delta 0x%x "
+                         "delta_lck 0x%x delta_iqk 0x%x\n",
+                         thermalvalue, rtlpriv->dm.thermalvalue,
+                         rtlefuse->eeprom_thermalmeter, delta, delta_lck,
+                         delta_iqk));
+
+                if (delta_lck > 1) {
+                        rtlpriv->dm.thermalvalue_lck = thermalvalue;
+                        rtl92c_phy_lc_calibrate(hw);
+                }
+
+                if (delta > 0 && rtlpriv->dm.txpower_track_control) {
+                        if (thermalvalue > rtlpriv->dm.thermalvalue) {
+                                for (i = 0; i < rf; i++)
+                                        rtlpriv->dm.ofdm_index[i] -= delta;
+                                rtlpriv->dm.cck_index -= delta;
+                        } else {
+                                for (i = 0; i < rf; i++)
+                                        rtlpriv->dm.ofdm_index[i] += delta;
+                                rtlpriv->dm.cck_index += delta;
+                        }
+
+                        if (is2t) {
+                                RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
+                                         ("temp OFDM_A_index=0x%x, "
+                                          "OFDM_B_index=0x%x,"
+                                          "cck_index=0x%x\n",
+                                          rtlpriv->dm.ofdm_index[0],
+                                          rtlpriv->dm.ofdm_index[1],
+                                          rtlpriv->dm.cck_index));
+                        } else {
+                                RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
+                                         ("temp OFDM_A_index=0x%x,"
+                                          "cck_index=0x%x\n",
+                                          rtlpriv->dm.ofdm_index[0],
+                                          rtlpriv->dm.cck_index));
+                        }
+
+                        if (thermalvalue > rtlefuse->eeprom_thermalmeter) {
+                                for (i = 0; i < rf; i++)
+                                        ofdm_index[i] =
+                                            rtlpriv->dm.ofdm_index[i]
+                                            + 1;
+                                cck_index = rtlpriv->dm.cck_index + 1;
+                        } else {
+                                for (i = 0; i < rf; i++)
+                                        ofdm_index[i] =
+                                            rtlpriv->dm.ofdm_index[i];
+                                cck_index = rtlpriv->dm.cck_index;
+                        }
+
+                        for (i = 0; i < rf; i++) {
+                                if (txpwr_level[i] >= 0 &&
+                                    txpwr_level[i] <= 26) {
+                                        if (thermalvalue >
+                                            rtlefuse->eeprom_thermalmeter) {
+                                                if (delta < 5)
+                                                        ofdm_index[i] -= 1;
+
+                                                else
+                                                        ofdm_index[i] -= 2;
+                                        } else if (delta > 5 && thermalvalue <
+                                                   rtlefuse->
+                                                   eeprom_thermalmeter) {
+                                                ofdm_index[i] += 1;
+                                        }
+                                } else if (txpwr_level[i] >= 27 &&
+                                           txpwr_level[i] <= 32
+                                           && thermalvalue >
+                                           rtlefuse->eeprom_thermalmeter) {
+                                        if (delta < 5)
+                                                ofdm_index[i] -= 1;
+
+                                        else
+                                                ofdm_index[i] -= 2;
+                                } else if (txpwr_level[i] >= 32 &&
+                                           txpwr_level[i] <= 38 &&
+                                           thermalvalue >
+                                           rtlefuse->eeprom_thermalmeter
+                                           && delta > 5) {
+                                        ofdm_index[i] -= 1;
+                                }
+                        }
+
+                        if (txpwr_level[i] >= 0 && txpwr_level[i] <= 26) {
+                                if (thermalvalue >
+                                    rtlefuse->eeprom_thermalmeter) {
+                                        if (delta < 5)
+                                                cck_index -= 1;
+
+                                        else
+                                                cck_index -= 2;
+                                } else if (delta > 5 && thermalvalue <
+                                           rtlefuse->eeprom_thermalmeter) {
+                                        cck_index += 1;
+                                }
+                        } else if (txpwr_level[i] >= 27 &&
+                                   txpwr_level[i] <= 32 &&
+                                   thermalvalue >
+                                   rtlefuse->eeprom_thermalmeter) {
+                                if (delta < 5)
+                                        cck_index -= 1;
+
+                                else
+                                        cck_index -= 2;
+                        } else if (txpwr_level[i] >= 32 &&
+                                   txpwr_level[i] <= 38 &&
+                                   thermalvalue > rtlefuse->eeprom_thermalmeter
+                                   && delta > 5) {
+                                cck_index -= 1;
+                        }
+
+                        for (i = 0; i < rf; i++) {
+                                if (ofdm_index[i] > OFDM_TABLE_SIZE - 1)
+                                        ofdm_index[i] = OFDM_TABLE_SIZE - 1;
+
+                                else if (ofdm_index[i] < ofdm_min_index)
+                                        ofdm_index[i] = ofdm_min_index;
+                        }
+
+                        if (cck_index > CCK_TABLE_SIZE - 1)
+                                cck_index = CCK_TABLE_SIZE - 1;
+                        else if (cck_index < 0)
+                                cck_index = 0;
+
+                        if (is2t) {
+                                RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
+                                         ("new OFDM_A_index=0x%x, "
+                                          "OFDM_B_index=0x%x,"
+                                          "cck_index=0x%x\n",
+                                          ofdm_index[0], ofdm_index[1],
+                                          cck_index));
+                        } else {
+                                RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
+                                         ("new OFDM_A_index=0x%x,"
+                                          "cck_index=0x%x\n",
+                                          ofdm_index[0], cck_index));
+                        }
+                }
+
+                if (rtlpriv->dm.txpower_track_control && delta != 0) {
+                        ele_d =
+                            (ofdmswing_table[ofdm_index[0]] & 0xFFC00000) >> 22;
+                        val_x = rtlphy->reg_e94;
+                        val_y = rtlphy->reg_e9c;
+
+                        if (val_x != 0) {
+                                if ((val_x & 0x00000200) != 0)
+                                        val_x = val_x | 0xFFFFFC00;
+                                ele_a = ((val_x * ele_d) >> 8) & 0x000003FF;
+
+                                if ((val_y & 0x00000200) != 0)
+                                        val_y = val_y | 0xFFFFFC00;
+                                ele_c = ((val_y * ele_d) >> 8) & 0x000003FF;
+
+                                value32 = (ele_d << 22) |
+                                    ((ele_c & 0x3F) << 16) | ele_a;
+
+                                rtl_set_bbreg(hw, ROFDM0_XATXIQIMBALANCE,
+                                              MASKDWORD, value32);
+
+                                value32 = (ele_c & 0x000003C0) >> 6;
+                                rtl_set_bbreg(hw, ROFDM0_XCTXAFE, MASKH4BITS,
+                                              value32);
+
+                                value32 = ((val_x * ele_d) >> 7) & 0x01;
+                                rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
+                                              BIT(31), value32);
+
+                                value32 = ((val_y * ele_d) >> 7) & 0x01;
+                                rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
+                                              BIT(29), value32);
+                        } else {
+                                rtl_set_bbreg(hw, ROFDM0_XATXIQIMBALANCE,
+                                              MASKDWORD,
+                                              ofdmswing_table[ofdm_index[0]]);
+
+                                rtl_set_bbreg(hw, ROFDM0_XCTXAFE, MASKH4BITS,
+                                              0x00);
+                                rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
+                                              BIT(31) | BIT(29), 0x00);
+                        }
+
+                        if (!rtlpriv->dm.cck_inch14) {
+                                rtl_write_byte(rtlpriv, 0xa22,
+                                               cckswing_table_ch1ch13[cck_index]
+                                               [0]);
+                                rtl_write_byte(rtlpriv, 0xa23,
+                                               cckswing_table_ch1ch13[cck_index]
+                                               [1]);
+                                rtl_write_byte(rtlpriv, 0xa24,
+                                               cckswing_table_ch1ch13[cck_index]
+                                               [2]);
+                                rtl_write_byte(rtlpriv, 0xa25,
+                                               cckswing_table_ch1ch13[cck_index]
+                                               [3]);
+                                rtl_write_byte(rtlpriv, 0xa26,
+                                               cckswing_table_ch1ch13[cck_index]
+                                               [4]);
+                                rtl_write_byte(rtlpriv, 0xa27,
+                                               cckswing_table_ch1ch13[cck_index]
+                                               [5]);
+                                rtl_write_byte(rtlpriv, 0xa28,
+                                               cckswing_table_ch1ch13[cck_index]
+                                               [6]);
+                                rtl_write_byte(rtlpriv, 0xa29,
+                                               cckswing_table_ch1ch13[cck_index]
+                                               [7]);
+                        } else {
+                                rtl_write_byte(rtlpriv, 0xa22,
+                                               cckswing_table_ch14[cck_index]
+                                               [0]);
+                                rtl_write_byte(rtlpriv, 0xa23,
+                                               cckswing_table_ch14[cck_index]
+                                               [1]);
+                                rtl_write_byte(rtlpriv, 0xa24,
+                                               cckswing_table_ch14[cck_index]
+                                               [2]);
+                                rtl_write_byte(rtlpriv, 0xa25,
+                                               cckswing_table_ch14[cck_index]
+                                               [3]);
+                                rtl_write_byte(rtlpriv, 0xa26,
+                                               cckswing_table_ch14[cck_index]
+                                               [4]);
+                                rtl_write_byte(rtlpriv, 0xa27,
+                                               cckswing_table_ch14[cck_index]
+                                               [5]);
+                                rtl_write_byte(rtlpriv, 0xa28,
+                                               cckswing_table_ch14[cck_index]
+                                               [6]);
+                                rtl_write_byte(rtlpriv, 0xa29,
+                                               cckswing_table_ch14[cck_index]
+                                               [7]);
+                        }
+
+                        if (is2t) {
+                                ele_d = (ofdmswing_table[ofdm_index[1]] &
+                                         0xFFC00000) >> 22;
+
+                                val_x = rtlphy->reg_eb4;
+                                val_y = rtlphy->reg_ebc;
+
+                                if (val_x != 0) {
+                                        if ((val_x & 0x00000200) != 0)
+                                                val_x = val_x | 0xFFFFFC00;
+                                        ele_a = ((val_x * ele_d) >> 8) &
+                                            0x000003FF;
+
+                                        if ((val_y & 0x00000200) != 0)
+                                                val_y = val_y | 0xFFFFFC00;
+                                        ele_c = ((val_y * ele_d) >> 8) &
+                                            0x00003FF;
+
+                                        value32 = (ele_d << 22) |
+                                            ((ele_c & 0x3F) << 16) | ele_a;
+                                        rtl_set_bbreg(hw,
+                                                      ROFDM0_XBTXIQIMBALANCE,
+                                                      MASKDWORD, value32);
+
+                                        value32 = (ele_c & 0x000003C0) >> 6;
+                                        rtl_set_bbreg(hw, ROFDM0_XDTXAFE,
+                                                      MASKH4BITS, value32);
+
+                                        value32 = ((val_x * ele_d) >> 7) & 0x01;
+                                        rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
+                                                      BIT(27), value32);
+
+                                        value32 = ((val_y * ele_d) >> 7) & 0x01;
+                                        rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
+                                                      BIT(25), value32);
+                                } else {
+                                        rtl_set_bbreg(hw,
+                                                      ROFDM0_XBTXIQIMBALANCE,
+                                                      MASKDWORD,
+                                                      ofdmswing_table[ofdm_index
+                                                                      [1]]);
+                                        rtl_set_bbreg(hw, ROFDM0_XDTXAFE,
+                                                      MASKH4BITS, 0x00);
+                                        rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
+                                                      BIT(27) | BIT(25), 0x00);
+                                }
+
+                        }
+                }
+
+                if (delta_iqk > 3) {
+                        rtlpriv->dm.thermalvalue_iqk = thermalvalue;
+                        rtl92c_phy_iq_calibrate(hw, false);
+                }
+
+                if (rtlpriv->dm.txpower_track_control)
+                        rtlpriv->dm.thermalvalue = thermalvalue;
+        }
+
+        RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, ("<===\n"));
+
+}
+
+static void rtl92c_dm_initialize_txpower_tracking_thermalmeter(
+                                                struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        rtlpriv->dm.txpower_tracking = true;
+        rtlpriv->dm.txpower_trackingInit = false;
+
+        RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
+                 ("pMgntInfo->txpower_tracking = %d\n",
+                  rtlpriv->dm.txpower_tracking));
+}
+
+static void rtl92c_dm_initialize_txpower_tracking(struct ieee80211_hw *hw)
+{
+        rtl92c_dm_initialize_txpower_tracking_thermalmeter(hw);
+}
+
+static void rtl92c_dm_txpower_tracking_directcall(struct ieee80211_hw *hw)
+{
+        rtl92c_dm_txpower_tracking_callback_thermalmeter(hw);
+}
+
+static void rtl92c_dm_check_txpower_tracking_thermal_meter(
+                                                struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        static u8 tm_trigger;
+
+        if (!rtlpriv->dm.txpower_tracking)
+                return;
+
+        if (!tm_trigger) {
+                rtl_set_rfreg(hw, RF90_PATH_A, RF_T_METER, RFREG_OFFSET_MASK,
+                              0x60);
+                RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
+                         ("Trigger 92S Thermal Meter!!\n"));
+                tm_trigger = 1;
+                return;
+        } else {
+                RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
+                         ("Schedule TxPowerTracking direct call!!\n"));
+                rtl92c_dm_txpower_tracking_directcall(hw);
+                tm_trigger = 0;
+        }
+}
+
+void rtl92c_dm_check_txpower_tracking(struct ieee80211_hw *hw)
+{
+        rtl92c_dm_check_txpower_tracking_thermal_meter(hw);
+}
+
+void rtl92c_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rate_adaptive *p_ra = &(rtlpriv->ra);
+
+        p_ra->ratr_state = DM_RATR_STA_INIT;
+        p_ra->pre_ratr_state = DM_RATR_STA_INIT;
+
+        if (rtlpriv->dm.dm_type == DM_TYPE_BYDRIVER)
+                rtlpriv->dm.useramask = true;
+        else
+                rtlpriv->dm.useramask = false;
+
+}
+
+static void rtl92c_dm_refresh_rate_adaptive_mask(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        struct rate_adaptive *p_ra = &(rtlpriv->ra);
+        u32 low_rssithresh_for_ra, high_rssithresh_for_ra;
+
+        if (is_hal_stop(rtlhal)) {
+                RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
+                         ("<---- driver is going to unload\n"));
+                return;
+        }
+
+        if (!rtlpriv->dm.useramask) {
+                RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
+                        ("<---- driver does not control rate adaptive mask\n"));
+                return;
+        }
+
+        if (mac->link_state == MAC80211_LINKED) {
+
+                switch (p_ra->pre_ratr_state) {
+                case DM_RATR_STA_HIGH:
+                        high_rssithresh_for_ra = 50;
+                        low_rssithresh_for_ra = 20;
+                        break;
+                case DM_RATR_STA_MIDDLE:
+                        high_rssithresh_for_ra = 55;
+                        low_rssithresh_for_ra = 20;
+                        break;
+                case DM_RATR_STA_LOW:
+                        high_rssithresh_for_ra = 50;
+                        low_rssithresh_for_ra = 25;
+                        break;
+                default:
+                        high_rssithresh_for_ra = 50;
+                        low_rssithresh_for_ra = 20;
+                        break;
+                }
+
+                if (rtlpriv->dm.undecorated_smoothed_pwdb >
+                    (long)high_rssithresh_for_ra)
+                        p_ra->ratr_state = DM_RATR_STA_HIGH;
+                else if (rtlpriv->dm.undecorated_smoothed_pwdb >
+                         (long)low_rssithresh_for_ra)
+                        p_ra->ratr_state = DM_RATR_STA_MIDDLE;
+                else
+                        p_ra->ratr_state = DM_RATR_STA_LOW;
+
+                if (p_ra->pre_ratr_state != p_ra->ratr_state) {
+                        RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
+                                 ("RSSI = %ld\n",
+                                  rtlpriv->dm.undecorated_smoothed_pwdb));
+                        RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
+                                 ("RSSI_LEVEL = %d\n", p_ra->ratr_state));
+                        RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
+                                 ("PreState = %d, CurState = %d\n",
+                                  p_ra->pre_ratr_state, p_ra->ratr_state));
+
+                        rtlpriv->cfg->ops->update_rate_mask(hw,
+                                        p_ra->ratr_state);
+
+                        p_ra->pre_ratr_state = p_ra->ratr_state;
+                }
+        }
+}
+
+static void rtl92c_dm_init_dynamic_bb_powersaving(struct ieee80211_hw *hw)
+{
+        dm_pstable.pre_ccastate = CCA_MAX;
+        dm_pstable.cur_ccasate = CCA_MAX;
+        dm_pstable.pre_rfstate = RF_MAX;
+        dm_pstable.cur_rfstate = RF_MAX;
+        dm_pstable.rssi_val_min = 0;
+}
+
+static void rtl92c_dm_1r_cca(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+
+        if (dm_pstable.rssi_val_min != 0) {
+                if (dm_pstable.pre_ccastate == CCA_2R) {
+                        if (dm_pstable.rssi_val_min >= 35)
+                                dm_pstable.cur_ccasate = CCA_1R;
+                        else
+                                dm_pstable.cur_ccasate = CCA_2R;
+                } else {
+                        if (dm_pstable.rssi_val_min <= 30)
+                                dm_pstable.cur_ccasate = CCA_2R;
+                        else
+                                dm_pstable.cur_ccasate = CCA_1R;
+                }
+        } else {
+                dm_pstable.cur_ccasate = CCA_MAX;
+        }
+
+        if (dm_pstable.pre_ccastate != dm_pstable.cur_ccasate) {
+                if (dm_pstable.cur_ccasate == CCA_1R) {
+                        if (get_rf_type(rtlphy) == RF_2T2R) {
+                                rtl_set_bbreg(hw, ROFDM0_TRXPATHENABLE,
+                                              MASKBYTE0, 0x13);
+                                rtl_set_bbreg(hw, 0xe70, MASKBYTE3, 0x20);
+                        } else {
+                                rtl_set_bbreg(hw, ROFDM0_TRXPATHENABLE,
+                                              MASKBYTE0, 0x23);
+                                rtl_set_bbreg(hw, 0xe70, 0x7fc00000, 0x10c);
+                        }
+                } else {
+                        rtl_set_bbreg(hw, ROFDM0_TRXPATHENABLE, MASKBYTE0,
+                                      0x33);
+                        rtl_set_bbreg(hw, 0xe70, MASKBYTE3, 0x63);
+                }
+                dm_pstable.pre_ccastate = dm_pstable.cur_ccasate;
+        }
+
+        RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD, ("CCAStage = %s\n",
+                                               (dm_pstable.cur_ccasate ==
+                                                0) ? "1RCCA" : "2RCCA"));
+}
+
+void rtl92c_dm_rf_saving(struct ieee80211_hw *hw, u8 bforce_in_normal)
+{
+        static u8 initialize;
+        static u32 reg_874, reg_c70, reg_85c, reg_a74;
+
+        if (initialize == 0) {
+                reg_874 = (rtl_get_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,
+                                         MASKDWORD) & 0x1CC000) >> 14;
+
+                reg_c70 = (rtl_get_bbreg(hw, ROFDM0_AGCPARAMETER1,
+                                         MASKDWORD) & BIT(3)) >> 3;
+
+                reg_85c = (rtl_get_bbreg(hw, RFPGA0_XCD_SWITCHCONTROL,
+                                         MASKDWORD) & 0xFF000000) >> 24;
+
+                reg_a74 = (rtl_get_bbreg(hw, 0xa74, MASKDWORD) & 0xF000) >> 12;
+
+                initialize = 1;
+        }
+
+        if (!bforce_in_normal) {
+                if (dm_pstable.rssi_val_min != 0) {
+                        if (dm_pstable.pre_rfstate == RF_NORMAL) {
+                                if (dm_pstable.rssi_val_min >= 30)
+                                        dm_pstable.cur_rfstate = RF_SAVE;
+                                else
+                                        dm_pstable.cur_rfstate = RF_NORMAL;
+                        } else {
+                                if (dm_pstable.rssi_val_min <= 25)
+                                        dm_pstable.cur_rfstate = RF_NORMAL;
+                                else
+                                        dm_pstable.cur_rfstate = RF_SAVE;
+                        }
+                } else {
+                        dm_pstable.cur_rfstate = RF_MAX;
+                }
+        } else {
+                dm_pstable.cur_rfstate = RF_NORMAL;
+        }
+
+        if (dm_pstable.pre_rfstate != dm_pstable.cur_rfstate) {
+                if (dm_pstable.cur_rfstate == RF_SAVE) {
+                        rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,
+                                      0x1C0000, 0x2);
+                        rtl_set_bbreg(hw, ROFDM0_AGCPARAMETER1, BIT(3), 0);
+                        rtl_set_bbreg(hw, RFPGA0_XCD_SWITCHCONTROL,
+                                      0xFF000000, 0x63);
+                        rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,
+                                      0xC000, 0x2);
+                        rtl_set_bbreg(hw, 0xa74, 0xF000, 0x3);
+                        rtl_set_bbreg(hw, 0x818, BIT(28), 0x0);
+                        rtl_set_bbreg(hw, 0x818, BIT(28), 0x1);
+                } else {
+                        rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,
+                                      0x1CC000, reg_874);
+                        rtl_set_bbreg(hw, ROFDM0_AGCPARAMETER1, BIT(3),
+                                      reg_c70);
+                        rtl_set_bbreg(hw, RFPGA0_XCD_SWITCHCONTROL, 0xFF000000,
+                                      reg_85c);
+                        rtl_set_bbreg(hw, 0xa74, 0xF000, reg_a74);
+                        rtl_set_bbreg(hw, 0x818, BIT(28), 0x0);
+                }
+
+                dm_pstable.pre_rfstate = dm_pstable.cur_rfstate;
+        }
+}
+
+static void rtl92c_dm_dynamic_bb_powersaving(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+
+        if (((mac->link_state == MAC80211_NOLINK)) &&
+            (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb == 0)) {
+                dm_pstable.rssi_val_min = 0;
+                RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD,
+                         ("Not connected to any\n"));
+        }
+
+        if (mac->link_state == MAC80211_LINKED) {
+                if (mac->opmode == NL80211_IFTYPE_ADHOC) {
+                        dm_pstable.rssi_val_min =
+                            rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
+                        RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD,
+                                 ("AP Client PWDB = 0x%lx\n",
+                                  dm_pstable.rssi_val_min));
+                } else {
+                        dm_pstable.rssi_val_min =
+                            rtlpriv->dm.undecorated_smoothed_pwdb;
+                        RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD,
+                                 ("STA Default Port PWDB = 0x%lx\n",
+                                  dm_pstable.rssi_val_min));
+                }
+        } else {
+                dm_pstable.rssi_val_min =
+                    rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
+
+                RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD,
+                         ("AP Ext Port PWDB = 0x%lx\n",
+                          dm_pstable.rssi_val_min));
+        }
+
+        if (IS_92C_SERIAL(rtlhal->version))
+                rtl92c_dm_1r_cca(hw);
+}
+
+void rtl92c_dm_init(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        rtlpriv->dm.dm_type = DM_TYPE_BYDRIVER;
+        rtl92c_dm_diginit(hw);
+        rtl92c_dm_init_dynamic_txpower(hw);
+        rtl92c_dm_init_edca_turbo(hw);
+        rtl92c_dm_init_rate_adaptive_mask(hw);
+        rtl92c_dm_initialize_txpower_tracking(hw);
+        rtl92c_dm_init_dynamic_bb_powersaving(hw);
+}
+
+void rtl92c_dm_watchdog(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+        bool fw_current_inpsmode = false;
+        bool fw_ps_awake = true;
+
+        rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_FW_PSMODE_STATUS,
+                                      (u8 *) (&fw_current_inpsmode));
+        rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_FWLPS_RF_ON,
+                                      (u8 *) (&fw_ps_awake));
+
+        if ((ppsc->rfpwr_state == ERFON) && ((!fw_current_inpsmode) &&
+                                             fw_ps_awake)
+            && (!ppsc->rfchange_inprogress)) {
+                rtl92c_dm_pwdb_monitor(hw);
+                rtl92c_dm_dig(hw);
+                rtl92c_dm_false_alarm_counter_statistics(hw);
+                rtl92c_dm_dynamic_bb_powersaving(hw);
+                rtl92c_dm_dynamic_txpower(hw);
+                rtl92c_dm_check_txpower_tracking(hw);
+                rtl92c_dm_refresh_rate_adaptive_mask(hw);
+                rtl92c_dm_check_edca_turbo(hw);
+        }
+}
diff --git a/drivers/net/wireless/rtlwifi/rtl8192c/phy_common.c b/drivers/net/wireless/rtlwifi/rtl8192c/phy_common.c
new file mode 100644
index 000000000000..3728abc4df59
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192c/phy_common.c
@@ -0,0 +1,2049 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+/* Define macro to shorten lines */
+#define MCS_TXPWR       mcs_txpwrlevel_origoffset
+
+static u32 _rtl92c_phy_fw_rf_serial_read(struct ieee80211_hw *hw,
+                                         enum radio_path rfpath, u32 offset);
+static void _rtl92c_phy_fw_rf_serial_write(struct ieee80211_hw *hw,
+                                           enum radio_path rfpath, u32 offset,
+                                           u32 data);
+static u32 _rtl92c_phy_rf_serial_read(struct ieee80211_hw *hw,
+                                      enum radio_path rfpath, u32 offset);
+static void _rtl92c_phy_rf_serial_write(struct ieee80211_hw *hw,
+                                        enum radio_path rfpath, u32 offset,
+                                        u32 data);
+static u32 _rtl92c_phy_calculate_bit_shift(u32 bitmask);
+static bool _rtl92c_phy_bb8192c_config_parafile(struct ieee80211_hw *hw);
+static bool _rtl92c_phy_config_mac_with_headerfile(struct ieee80211_hw *hw);
+static bool _rtl92c_phy_config_bb_with_headerfile(struct ieee80211_hw *hw,
+                                                  u8 configtype);
+static bool _rtl92c_phy_config_bb_with_pgheaderfile(struct ieee80211_hw *hw,
+                                                    u8 configtype);
+static void _rtl92c_phy_init_bb_rf_register_definition(struct ieee80211_hw *hw);
+static bool _rtl92c_phy_set_sw_chnl_cmdarray(struct swchnlcmd *cmdtable,
+                                             u32 cmdtableidx, u32 cmdtablesz,
+                                             enum swchnlcmd_id cmdid, u32 para1,
+                                             u32 para2, u32 msdelay);
+static bool _rtl92c_phy_sw_chnl_step_by_step(struct ieee80211_hw *hw,
+                                             u8 channel, u8 *stage, u8 *step,
+                                             u32 *delay);
+static u8 _rtl92c_phy_dbm_to_txpwr_Idx(struct ieee80211_hw *hw,
+                                       enum wireless_mode wirelessmode,
+                                       long power_indbm);
+static bool _rtl92c_phy_config_rf_external_pa(struct ieee80211_hw *hw,
+                                              enum radio_path rfpath);
+static long _rtl92c_phy_txpwr_idx_to_dbm(struct ieee80211_hw *hw,
+                                         enum wireless_mode wirelessmode,
+                                         u8 txpwridx);
+static void _rtl92c_phy_lc_calibrate(struct ieee80211_hw *hw, bool is2t);
+
+u32 rtl92c_phy_query_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u32 returnvalue, originalvalue, bitshift;
+
+        RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, ("regaddr(%#x), "
+                                               "bitmask(%#x)\n", regaddr,
+                                               bitmask));
+        originalvalue = rtl_read_dword(rtlpriv, regaddr);
+        bitshift = _rtl92c_phy_calculate_bit_shift(bitmask);
+        returnvalue = (originalvalue & bitmask) >> bitshift;
+
+        RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, ("BBR MASK=0x%x "
+                                               "Addr[0x%x]=0x%x\n", bitmask,
+                                               regaddr, originalvalue));
+
+        return returnvalue;
+
+}
+
+void rtl92c_phy_set_bb_reg(struct ieee80211_hw *hw,
+                           u32 regaddr, u32 bitmask, u32 data)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u32 originalvalue, bitshift;
+
+        RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, ("regaddr(%#x), bitmask(%#x),"
+                                               " data(%#x)\n", regaddr, bitmask,
+                                               data));
+
+        if (bitmask != MASKDWORD) {
+                originalvalue = rtl_read_dword(rtlpriv, regaddr);
+                bitshift = _rtl92c_phy_calculate_bit_shift(bitmask);
+                data = ((originalvalue & (~bitmask)) | (data << bitshift));
+        }
+
+        rtl_write_dword(rtlpriv, regaddr, data);
+
+        RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, ("regaddr(%#x), bitmask(%#x),"
+                                               " data(%#x)\n", regaddr, bitmask,
+                                               data));
+
+}
+
+static u32 _rtl92c_phy_fw_rf_serial_read(struct ieee80211_hw *hw,
+                                         enum radio_path rfpath, u32 offset)
+{
+        RT_ASSERT(false, ("deprecated!\n"));
+        return 0;
+}
+
+static void _rtl92c_phy_fw_rf_serial_write(struct ieee80211_hw *hw,
+                                           enum radio_path rfpath, u32 offset,
+                                           u32 data)
+{
+        RT_ASSERT(false, ("deprecated!\n"));
+}
+
+static u32 _rtl92c_phy_rf_serial_read(struct ieee80211_hw *hw,
+                                      enum radio_path rfpath, u32 offset)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath];
+        u32 newoffset;
+        u32 tmplong, tmplong2;
+        u8 rfpi_enable = 0;
+        u32 retvalue;
+
+        offset &= 0x3f;
+        newoffset = offset;
+        if (RT_CANNOT_IO(hw)) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, ("return all one\n"));
+                return 0xFFFFFFFF;
+        }
+        tmplong = rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, MASKDWORD);
+        if (rfpath == RF90_PATH_A)
+                tmplong2 = tmplong;
+        else
+                tmplong2 = rtl_get_bbreg(hw, pphyreg->rfhssi_para2, MASKDWORD);
+        tmplong2 = (tmplong2 & (~BLSSIREADADDRESS)) |
+            (newoffset << 23) | BLSSIREADEDGE;
+        rtl_set_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, MASKDWORD,
+                      tmplong & (~BLSSIREADEDGE));
+        mdelay(1);
+        rtl_set_bbreg(hw, pphyreg->rfhssi_para2, MASKDWORD, tmplong2);
+        mdelay(1);
+        rtl_set_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, MASKDWORD,
+                      tmplong | BLSSIREADEDGE);
+        mdelay(1);
+        if (rfpath == RF90_PATH_A)
+                rfpi_enable = (u8) rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER1,
+                                                 BIT(8));
+        else if (rfpath == RF90_PATH_B)
+                rfpi_enable = (u8) rtl_get_bbreg(hw, RFPGA0_XB_HSSIPARAMETER1,
+                                                 BIT(8));
+        if (rfpi_enable)
+                retvalue = rtl_get_bbreg(hw, pphyreg->rflssi_readbackpi,
+                                         BLSSIREADBACKDATA);
+        else
+                retvalue = rtl_get_bbreg(hw, pphyreg->rflssi_readback,
+                                         BLSSIREADBACKDATA);
+        RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, ("RFR-%d Addr[0x%x]=0x%x\n",
+                                               rfpath, pphyreg->rflssi_readback,
+                                               retvalue));
+        return retvalue;
+}
+
+static void _rtl92c_phy_rf_serial_write(struct ieee80211_hw *hw,
+                                        enum radio_path rfpath, u32 offset,
+                                        u32 data)
+{
+        u32 data_and_addr;
+        u32 newoffset;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath];
+
+        if (RT_CANNOT_IO(hw)) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, ("stop\n"));
+                return;
+        }
+        offset &= 0x3f;
+        newoffset = offset;
+        data_and_addr = ((newoffset << 20) | (data & 0x000fffff)) & 0x0fffffff;
+        rtl_set_bbreg(hw, pphyreg->rf3wire_offset, MASKDWORD, data_and_addr);
+        RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, ("RFW-%d Addr[0x%x]=0x%x\n",
+                                               rfpath, pphyreg->rf3wire_offset,
+                                               data_and_addr));
+}
+
+static u32 _rtl92c_phy_calculate_bit_shift(u32 bitmask)
+{
+        u32 i;
+
+        for (i = 0; i <= 31; i++) {
+                if (((bitmask >> i) & 0x1) == 1)
+                        break;
+        }
+        return i;
+}
+
+static void _rtl92c_phy_bb_config_1t(struct ieee80211_hw *hw)
+{
+        rtl_set_bbreg(hw, RFPGA0_TXINFO, 0x3, 0x2);
+        rtl_set_bbreg(hw, RFPGA1_TXINFO, 0x300033, 0x200022);
+        rtl_set_bbreg(hw, RCCK0_AFESETTING, MASKBYTE3, 0x45);
+        rtl_set_bbreg(hw, ROFDM0_TRXPATHENABLE, MASKBYTE0, 0x23);
+        rtl_set_bbreg(hw, ROFDM0_AGCPARAMETER1, 0x30, 0x1);
+        rtl_set_bbreg(hw, 0xe74, 0x0c000000, 0x2);
+        rtl_set_bbreg(hw, 0xe78, 0x0c000000, 0x2);
+        rtl_set_bbreg(hw, 0xe7c, 0x0c000000, 0x2);
+        rtl_set_bbreg(hw, 0xe80, 0x0c000000, 0x2);
+        rtl_set_bbreg(hw, 0xe88, 0x0c000000, 0x2);
+}
+bool rtl92c_phy_rf_config(struct ieee80211_hw *hw)
+{
+        return rtl92c_phy_rf6052_config(hw);
+}
+
+static bool _rtl92c_phy_bb8192c_config_parafile(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        bool rtstatus;
+
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, ("==>\n"));
+        rtstatus = _rtl92c_phy_config_bb_with_headerfile(hw,
+                                                 BASEBAND_CONFIG_PHY_REG);
+        if (rtstatus != true) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, ("Write BB Reg Fail!!"));
+                return false;
+        }
+        if (rtlphy->rf_type == RF_1T2R) {
+                _rtl92c_phy_bb_config_1t(hw);
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, ("Config to 1T!!\n"));
+        }
+        if (rtlefuse->autoload_failflag == false) {
+                rtlphy->pwrgroup_cnt = 0;
+                rtstatus = _rtl92c_phy_config_bb_with_pgheaderfile(hw,
+                                                   BASEBAND_CONFIG_PHY_REG);
+        }
+        if (rtstatus != true) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, ("BB_PG Reg Fail!!"));
+                return false;
+        }
+        rtstatus = _rtl92c_phy_config_bb_with_headerfile(hw,
+                                                 BASEBAND_CONFIG_AGC_TAB);
+        if (rtstatus != true) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, ("AGC Table Fail\n"));
+                return false;
+        }
+        rtlphy->cck_high_power = (bool) (rtl_get_bbreg(hw,
+                                                RFPGA0_XA_HSSIPARAMETER2,
+                                                0x200));
+        return true;
+}
+
+
+void rtl92c_phy_config_bb_external_pa(struct ieee80211_hw *hw)
+{
+}
+
+static void _rtl92c_store_pwrIndex_diffrate_offset(struct ieee80211_hw *hw,
+                                                   u32 regaddr, u32 bitmask,
+                                                   u32 data)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+
+        if (regaddr == RTXAGC_A_RATE18_06) {
+                rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][0] = data;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("MCSTxPowerLevelOriginalOffset[%d][0] = 0x%x\n",
+                          rtlphy->pwrgroup_cnt,
+                          rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][0]));
+        }
+        if (regaddr == RTXAGC_A_RATE54_24) {
+                rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][1] = data;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("MCSTxPowerLevelOriginalOffset[%d][1] = 0x%x\n",
+                          rtlphy->pwrgroup_cnt,
+                          rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][1]));
+        }
+        if (regaddr == RTXAGC_A_CCK1_MCS32) {
+                rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][6] = data;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("MCSTxPowerLevelOriginalOffset[%d][6] = 0x%x\n",
+                          rtlphy->pwrgroup_cnt,
+                          rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][6]));
+        }
+        if (regaddr == RTXAGC_B_CCK11_A_CCK2_11 && bitmask == 0xffffff00) {
+                rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][7] = data;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("MCSTxPowerLevelOriginalOffset[%d][7] = 0x%x\n",
+                          rtlphy->pwrgroup_cnt,
+                          rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][7]));
+        }
+        if (regaddr == RTXAGC_A_MCS03_MCS00) {
+                rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][2] = data;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("MCSTxPowerLevelOriginalOffset[%d][2] = 0x%x\n",
+                          rtlphy->pwrgroup_cnt,
+                          rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][2]));
+        }
+        if (regaddr == RTXAGC_A_MCS07_MCS04) {
+                rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][3] = data;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("MCSTxPowerLevelOriginalOffset[%d][3] = 0x%x\n",
+                          rtlphy->pwrgroup_cnt,
+                          rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][3]));
+        }
+        if (regaddr == RTXAGC_A_MCS11_MCS08) {
+                rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][4] = data;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("MCSTxPowerLevelOriginalOffset[%d][4] = 0x%x\n",
+                          rtlphy->pwrgroup_cnt,
+                          rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][4]));
+        }
+        if (regaddr == RTXAGC_A_MCS15_MCS12) {
+                rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][5] = data;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("MCSTxPowerLevelOriginalOffset[%d][5] = 0x%x\n",
+                          rtlphy->pwrgroup_cnt,
+                          rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][5]));
+        }
+        if (regaddr == RTXAGC_B_RATE18_06) {
+                rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][8] = data;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("MCSTxPowerLevelOriginalOffset[%d][8] = 0x%x\n",
+                          rtlphy->pwrgroup_cnt,
+                          rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][8]));
+        }
+        if (regaddr == RTXAGC_B_RATE54_24) {
+                rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][9] = data;
+
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("MCSTxPowerLevelOriginalOffset[%d][9] = 0x%x\n",
+                          rtlphy->pwrgroup_cnt,
+                          rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][9]));
+        }
+
+        if (regaddr == RTXAGC_B_CCK1_55_MCS32) {
+                rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][14] = data;
+
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("MCSTxPowerLevelOriginalOffset[%d][14] = 0x%x\n",
+                          rtlphy->pwrgroup_cnt,
+                          rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][14]));
+        }
+
+        if (regaddr == RTXAGC_B_CCK11_A_CCK2_11 && bitmask == 0x000000ff) {
+                rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][15] = data;
+
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("MCSTxPowerLevelOriginalOffset[%d][15] = 0x%x\n",
+                          rtlphy->pwrgroup_cnt,
+                          rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][15]));
+        }
+
+        if (regaddr == RTXAGC_B_MCS03_MCS00) {
+                rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][10] = data;
+
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("MCSTxPowerLevelOriginalOffset[%d][10] = 0x%x\n",
+                          rtlphy->pwrgroup_cnt,
+                          rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][10]));
+        }
+
+        if (regaddr == RTXAGC_B_MCS07_MCS04) {
+                rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][11] = data;
+
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("MCSTxPowerLevelOriginalOffset[%d][11] = 0x%x\n",
+                          rtlphy->pwrgroup_cnt,
+                          rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][11]));
+        }
+
+        if (regaddr == RTXAGC_B_MCS11_MCS08) {
+                rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][12] = data;
+
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("MCSTxPowerLevelOriginalOffset[%d][12] = 0x%x\n",
+                          rtlphy->pwrgroup_cnt,
+                          rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][12]));
+        }
+
+        if (regaddr == RTXAGC_B_MCS15_MCS12) {
+                rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][13] = data;
+
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("MCSTxPowerLevelOriginalOffset[%d][13] = 0x%x\n",
+                          rtlphy->pwrgroup_cnt,
+                          rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][13]));
+
+                rtlphy->pwrgroup_cnt++;
+        }
+}
+
+static bool _rtl92c_phy_config_rf_external_pa(struct ieee80211_hw *hw,
+                                              enum radio_path rfpath)
+{
+        return true;
+}
+
+void rtl92c_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+
+        rtlphy->default_initialgain[0] =
+            (u8) rtl_get_bbreg(hw, ROFDM0_XAAGCCORE1, MASKBYTE0);
+        rtlphy->default_initialgain[1] =
+            (u8) rtl_get_bbreg(hw, ROFDM0_XBAGCCORE1, MASKBYTE0);
+        rtlphy->default_initialgain[2] =
+            (u8) rtl_get_bbreg(hw, ROFDM0_XCAGCCORE1, MASKBYTE0);
+        rtlphy->default_initialgain[3] =
+            (u8) rtl_get_bbreg(hw, ROFDM0_XDAGCCORE1, MASKBYTE0);
+
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                 ("Default initial gain (c50=0x%x, "
+                  "c58=0x%x, c60=0x%x, c68=0x%x\n",
+                  rtlphy->default_initialgain[0],
+                  rtlphy->default_initialgain[1],
+                  rtlphy->default_initialgain[2],
+                  rtlphy->default_initialgain[3]));
+
+        rtlphy->framesync = (u8) rtl_get_bbreg(hw,
+                                               ROFDM0_RXDETECTOR3, MASKBYTE0);
+        rtlphy->framesync_c34 = rtl_get_bbreg(hw,
+                                              ROFDM0_RXDETECTOR2, MASKDWORD);
+
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                 ("Default framesync (0x%x) = 0x%x\n",
+                  ROFDM0_RXDETECTOR3, rtlphy->framesync));
+}
+
+static void _rtl92c_phy_init_bb_rf_register_definition(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+
+        rtlphy->phyreg_def[RF90_PATH_A].rfintfs = RFPGA0_XAB_RFINTERFACESW;
+        rtlphy->phyreg_def[RF90_PATH_B].rfintfs = RFPGA0_XAB_RFINTERFACESW;
+        rtlphy->phyreg_def[RF90_PATH_C].rfintfs = RFPGA0_XCD_RFINTERFACESW;
+        rtlphy->phyreg_def[RF90_PATH_D].rfintfs = RFPGA0_XCD_RFINTERFACESW;
+
+        rtlphy->phyreg_def[RF90_PATH_A].rfintfi = RFPGA0_XAB_RFINTERFACERB;
+        rtlphy->phyreg_def[RF90_PATH_B].rfintfi = RFPGA0_XAB_RFINTERFACERB;
+        rtlphy->phyreg_def[RF90_PATH_C].rfintfi = RFPGA0_XCD_RFINTERFACERB;
+        rtlphy->phyreg_def[RF90_PATH_D].rfintfi = RFPGA0_XCD_RFINTERFACERB;
+
+        rtlphy->phyreg_def[RF90_PATH_A].rfintfo = RFPGA0_XA_RFINTERFACEOE;
+        rtlphy->phyreg_def[RF90_PATH_B].rfintfo = RFPGA0_XB_RFINTERFACEOE;
+
+        rtlphy->phyreg_def[RF90_PATH_A].rfintfe = RFPGA0_XA_RFINTERFACEOE;
+        rtlphy->phyreg_def[RF90_PATH_B].rfintfe = RFPGA0_XB_RFINTERFACEOE;
+
+        rtlphy->phyreg_def[RF90_PATH_A].rf3wire_offset =
+            RFPGA0_XA_LSSIPARAMETER;
+        rtlphy->phyreg_def[RF90_PATH_B].rf3wire_offset =
+            RFPGA0_XB_LSSIPARAMETER;
+
+        rtlphy->phyreg_def[RF90_PATH_A].rflssi_select = rFPGA0_XAB_RFPARAMETER;
+        rtlphy->phyreg_def[RF90_PATH_B].rflssi_select = rFPGA0_XAB_RFPARAMETER;
+        rtlphy->phyreg_def[RF90_PATH_C].rflssi_select = rFPGA0_XCD_RFPARAMETER;
+        rtlphy->phyreg_def[RF90_PATH_D].rflssi_select = rFPGA0_XCD_RFPARAMETER;
+
+        rtlphy->phyreg_def[RF90_PATH_A].rftxgain_stage = RFPGA0_TXGAINSTAGE;
+        rtlphy->phyreg_def[RF90_PATH_B].rftxgain_stage = RFPGA0_TXGAINSTAGE;
+        rtlphy->phyreg_def[RF90_PATH_C].rftxgain_stage = RFPGA0_TXGAINSTAGE;
+        rtlphy->phyreg_def[RF90_PATH_D].rftxgain_stage = RFPGA0_TXGAINSTAGE;
+
+        rtlphy->phyreg_def[RF90_PATH_A].rfhssi_para1 = RFPGA0_XA_HSSIPARAMETER1;
+        rtlphy->phyreg_def[RF90_PATH_B].rfhssi_para1 = RFPGA0_XB_HSSIPARAMETER1;
+
+        rtlphy->phyreg_def[RF90_PATH_A].rfhssi_para2 = RFPGA0_XA_HSSIPARAMETER2;
+        rtlphy->phyreg_def[RF90_PATH_B].rfhssi_para2 = RFPGA0_XB_HSSIPARAMETER2;
+
+        rtlphy->phyreg_def[RF90_PATH_A].rfswitch_control =
+            RFPGA0_XAB_SWITCHCONTROL;
+        rtlphy->phyreg_def[RF90_PATH_B].rfswitch_control =
+            RFPGA0_XAB_SWITCHCONTROL;
+        rtlphy->phyreg_def[RF90_PATH_C].rfswitch_control =
+            RFPGA0_XCD_SWITCHCONTROL;
+        rtlphy->phyreg_def[RF90_PATH_D].rfswitch_control =
+            RFPGA0_XCD_SWITCHCONTROL;
+
+        rtlphy->phyreg_def[RF90_PATH_A].rfagc_control1 = ROFDM0_XAAGCCORE1;
+        rtlphy->phyreg_def[RF90_PATH_B].rfagc_control1 = ROFDM0_XBAGCCORE1;
+        rtlphy->phyreg_def[RF90_PATH_C].rfagc_control1 = ROFDM0_XCAGCCORE1;
+        rtlphy->phyreg_def[RF90_PATH_D].rfagc_control1 = ROFDM0_XDAGCCORE1;
+
+        rtlphy->phyreg_def[RF90_PATH_A].rfagc_control2 = ROFDM0_XAAGCCORE2;
+        rtlphy->phyreg_def[RF90_PATH_B].rfagc_control2 = ROFDM0_XBAGCCORE2;
+        rtlphy->phyreg_def[RF90_PATH_C].rfagc_control2 = ROFDM0_XCAGCCORE2;
+        rtlphy->phyreg_def[RF90_PATH_D].rfagc_control2 = ROFDM0_XDAGCCORE2;
+
+        rtlphy->phyreg_def[RF90_PATH_A].rfrxiq_imbalance =
+            ROFDM0_XARXIQIMBALANCE;
+        rtlphy->phyreg_def[RF90_PATH_B].rfrxiq_imbalance =
+            ROFDM0_XBRXIQIMBALANCE;
+        rtlphy->phyreg_def[RF90_PATH_C].rfrxiq_imbalance =
+            ROFDM0_XCRXIQIMBANLANCE;
+        rtlphy->phyreg_def[RF90_PATH_D].rfrxiq_imbalance =
+            ROFDM0_XDRXIQIMBALANCE;
+
+        rtlphy->phyreg_def[RF90_PATH_A].rfrx_afe = ROFDM0_XARXAFE;
+        rtlphy->phyreg_def[RF90_PATH_B].rfrx_afe = ROFDM0_XBRXAFE;
+        rtlphy->phyreg_def[RF90_PATH_C].rfrx_afe = ROFDM0_XCRXAFE;
+        rtlphy->phyreg_def[RF90_PATH_D].rfrx_afe = ROFDM0_XDRXAFE;
+
+        rtlphy->phyreg_def[RF90_PATH_A].rftxiq_imbalance =
+            ROFDM0_XATXIQIMBALANCE;
+        rtlphy->phyreg_def[RF90_PATH_B].rftxiq_imbalance =
+            ROFDM0_XBTXIQIMBALANCE;
+        rtlphy->phyreg_def[RF90_PATH_C].rftxiq_imbalance =
+            ROFDM0_XCTXIQIMBALANCE;
+        rtlphy->phyreg_def[RF90_PATH_D].rftxiq_imbalance =
+            ROFDM0_XDTXIQIMBALANCE;
+
+        rtlphy->phyreg_def[RF90_PATH_A].rftx_afe = ROFDM0_XATXAFE;
+        rtlphy->phyreg_def[RF90_PATH_B].rftx_afe = ROFDM0_XBTXAFE;
+        rtlphy->phyreg_def[RF90_PATH_C].rftx_afe = ROFDM0_XCTXAFE;
+        rtlphy->phyreg_def[RF90_PATH_D].rftx_afe = ROFDM0_XDTXAFE;
+
+        rtlphy->phyreg_def[RF90_PATH_A].rflssi_readback =
+            RFPGA0_XA_LSSIREADBACK;
+        rtlphy->phyreg_def[RF90_PATH_B].rflssi_readback =
+            RFPGA0_XB_LSSIREADBACK;
+        rtlphy->phyreg_def[RF90_PATH_C].rflssi_readback =
+            RFPGA0_XC_LSSIREADBACK;
+        rtlphy->phyreg_def[RF90_PATH_D].rflssi_readback =
+            RFPGA0_XD_LSSIREADBACK;
+
+        rtlphy->phyreg_def[RF90_PATH_A].rflssi_readbackpi =
+            TRANSCEIVEA_HSPI_READBACK;
+        rtlphy->phyreg_def[RF90_PATH_B].rflssi_readbackpi =
+            TRANSCEIVEB_HSPI_READBACK;
+
+}
+
+void rtl92c_phy_get_txpower_level(struct ieee80211_hw *hw, long *powerlevel)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        u8 txpwr_level;
+        long txpwr_dbm;
+
+        txpwr_level = rtlphy->cur_cck_txpwridx;
+        txpwr_dbm = _rtl92c_phy_txpwr_idx_to_dbm(hw,
+                                                 WIRELESS_MODE_B, txpwr_level);
+        txpwr_level = rtlphy->cur_ofdm24g_txpwridx +
+            rtlefuse->legacy_ht_txpowerdiff;
+        if (_rtl92c_phy_txpwr_idx_to_dbm(hw,
+                                         WIRELESS_MODE_G,
+                                         txpwr_level) > txpwr_dbm)
+                txpwr_dbm =
+                    _rtl92c_phy_txpwr_idx_to_dbm(hw, WIRELESS_MODE_G,
+                                                 txpwr_level);
+        txpwr_level = rtlphy->cur_ofdm24g_txpwridx;
+        if (_rtl92c_phy_txpwr_idx_to_dbm(hw,
+                                         WIRELESS_MODE_N_24G,
+                                         txpwr_level) > txpwr_dbm)
+                txpwr_dbm =
+                    _rtl92c_phy_txpwr_idx_to_dbm(hw, WIRELESS_MODE_N_24G,
+                                                 txpwr_level);
+        *powerlevel = txpwr_dbm;
+}
+
+static void _rtl92c_get_txpower_index(struct ieee80211_hw *hw, u8 channel,
+                                      u8 *cckpowerlevel, u8 *ofdmpowerlevel)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        u8 index = (channel - 1);
+
+        cckpowerlevel[RF90_PATH_A] =
+            rtlefuse->txpwrlevel_cck[RF90_PATH_A][index];
+        cckpowerlevel[RF90_PATH_B] =
+            rtlefuse->txpwrlevel_cck[RF90_PATH_B][index];
+        if (get_rf_type(rtlphy) == RF_1T2R || get_rf_type(rtlphy) == RF_1T1R) {
+                ofdmpowerlevel[RF90_PATH_A] =
+                    rtlefuse->txpwrlevel_ht40_1s[RF90_PATH_A][index];
+                ofdmpowerlevel[RF90_PATH_B] =
+                    rtlefuse->txpwrlevel_ht40_1s[RF90_PATH_B][index];
+        } else if (get_rf_type(rtlphy) == RF_2T2R) {
+                ofdmpowerlevel[RF90_PATH_A] =
+                    rtlefuse->txpwrlevel_ht40_2s[RF90_PATH_A][index];
+                ofdmpowerlevel[RF90_PATH_B] =
+                    rtlefuse->txpwrlevel_ht40_2s[RF90_PATH_B][index];
+        }
+}
+
+static void _rtl92c_ccxpower_index_check(struct ieee80211_hw *hw,
+                                         u8 channel, u8 *cckpowerlevel,
+                                         u8 *ofdmpowerlevel)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+
+        rtlphy->cur_cck_txpwridx = cckpowerlevel[0];
+        rtlphy->cur_ofdm24g_txpwridx = ofdmpowerlevel[0];
+}
+
+void rtl92c_phy_set_txpower_level(struct ieee80211_hw *hw, u8 channel)
+{
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        u8 cckpowerlevel[2], ofdmpowerlevel[2];
+
+        if (rtlefuse->txpwr_fromeprom == false)
+                return;
+        _rtl92c_get_txpower_index(hw, channel,
+                                  &cckpowerlevel[0], &ofdmpowerlevel[0]);
+        _rtl92c_ccxpower_index_check(hw,
+                                     channel, &cckpowerlevel[0],
+                                     &ofdmpowerlevel[0]);
+        rtl92c_phy_rf6052_set_cck_txpower(hw, &cckpowerlevel[0]);
+        rtl92c_phy_rf6052_set_ofdm_txpower(hw, &ofdmpowerlevel[0], channel);
+}
+
+bool rtl92c_phy_update_txpower_dbm(struct ieee80211_hw *hw, long power_indbm)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        u8 idx;
+        u8 rf_path;
+
+        u8 ccktxpwridx = _rtl92c_phy_dbm_to_txpwr_Idx(hw,
+                                                      WIRELESS_MODE_B,
+                                                      power_indbm);
+        u8 ofdmtxpwridx = _rtl92c_phy_dbm_to_txpwr_Idx(hw,
+                                                       WIRELESS_MODE_N_24G,
+                                                       power_indbm);
+        if (ofdmtxpwridx - rtlefuse->legacy_ht_txpowerdiff > 0)
+                ofdmtxpwridx -= rtlefuse->legacy_ht_txpowerdiff;
+        else
+                ofdmtxpwridx = 0;
+        RT_TRACE(rtlpriv, COMP_TXAGC, DBG_TRACE,
+                 ("%lx dBm, ccktxpwridx = %d, ofdmtxpwridx = %d\n",
+                  power_indbm, ccktxpwridx, ofdmtxpwridx));
+        for (idx = 0; idx < 14; idx++) {
+                for (rf_path = 0; rf_path < 2; rf_path++) {
+                        rtlefuse->txpwrlevel_cck[rf_path][idx] = ccktxpwridx;
+                        rtlefuse->txpwrlevel_ht40_1s[rf_path][idx] =
+                            ofdmtxpwridx;
+                        rtlefuse->txpwrlevel_ht40_2s[rf_path][idx] =
+                            ofdmtxpwridx;
+                }
+        }
+        rtl92c_phy_set_txpower_level(hw, rtlphy->current_channel);
+        return true;
+}
+
+void rtl92c_phy_set_beacon_hw_reg(struct ieee80211_hw *hw, u16 beaconinterval)
+{
+}
+
+static u8 _rtl92c_phy_dbm_to_txpwr_Idx(struct ieee80211_hw *hw,
+                                       enum wireless_mode wirelessmode,
+                                       long power_indbm)
+{
+        u8 txpwridx;
+        long offset;
+
+        switch (wirelessmode) {
+        case WIRELESS_MODE_B:
+                offset = -7;
+                break;
+        case WIRELESS_MODE_G:
+        case WIRELESS_MODE_N_24G:
+                offset = -8;
+                break;
+        default:
+                offset = -8;
+                break;
+        }
+
+        if ((power_indbm - offset) > 0)
+                txpwridx = (u8) ((power_indbm - offset) * 2);
+        else
+                txpwridx = 0;
+
+        if (txpwridx > MAX_TXPWR_IDX_NMODE_92S)
+                txpwridx = MAX_TXPWR_IDX_NMODE_92S;
+
+        return txpwridx;
+}
+
+static long _rtl92c_phy_txpwr_idx_to_dbm(struct ieee80211_hw *hw,
+                                         enum wireless_mode wirelessmode,
+                                         u8 txpwridx)
+{
+        long offset;
+        long pwrout_dbm;
+
+        switch (wirelessmode) {
+        case WIRELESS_MODE_B:
+                offset = -7;
+                break;
+        case WIRELESS_MODE_G:
+        case WIRELESS_MODE_N_24G:
+                offset = -8;
+                break;
+        default:
+                offset = -8;
+                break;
+        }
+        pwrout_dbm = txpwridx / 2 + offset;
+        return pwrout_dbm;
+}
+
+void rtl92c_phy_scan_operation_backup(struct ieee80211_hw *hw, u8 operation)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        enum io_type iotype;
+
+        if (!is_hal_stop(rtlhal)) {
+                switch (operation) {
+                case SCAN_OPT_BACKUP:
+                        iotype = IO_CMD_PAUSE_DM_BY_SCAN;
+                        rtlpriv->cfg->ops->set_hw_reg(hw,
+                                                      HW_VAR_IO_CMD,
+                                                      (u8 *)&iotype);
+
+                        break;
+                case SCAN_OPT_RESTORE:
+                        iotype = IO_CMD_RESUME_DM_BY_SCAN;
+                        rtlpriv->cfg->ops->set_hw_reg(hw,
+                                                      HW_VAR_IO_CMD,
+                                                      (u8 *)&iotype);
+                        break;
+                default:
+                        RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                                 ("Unknown Scan Backup operation.\n"));
+                        break;
+                }
+        }
+}
+
+void rtl92c_phy_set_bw_mode(struct ieee80211_hw *hw,
+                            enum nl80211_channel_type ch_type)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        u8 tmp_bw = rtlphy->current_chan_bw;
+
+        if (rtlphy->set_bwmode_inprogress)
+                return;
+        rtlphy->set_bwmode_inprogress = true;
+        if ((!is_hal_stop(rtlhal)) && !(RT_CANNOT_IO(hw)))
+                rtl92c_phy_set_bw_mode_callback(hw);
+        else {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
+                         ("FALSE driver sleep or unload\n"));
+                rtlphy->set_bwmode_inprogress = false;
+                rtlphy->current_chan_bw = tmp_bw;
+        }
+}
+
+void rtl92c_phy_sw_chnl_callback(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        u32 delay;
+
+        RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE,
+                 ("switch to channel%d\n", rtlphy->current_channel));
+        if (is_hal_stop(rtlhal))
+                return;
+        do {
+                if (!rtlphy->sw_chnl_inprogress)
+                        break;
+                if (!_rtl92c_phy_sw_chnl_step_by_step
+                    (hw, rtlphy->current_channel, &rtlphy->sw_chnl_stage,
+                     &rtlphy->sw_chnl_step, &delay)) {
+                        if (delay > 0)
+                                mdelay(delay);
+                        else
+                                continue;
+                } else
+                        rtlphy->sw_chnl_inprogress = false;
+                break;
+        } while (true);
+        RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE, ("<==\n"));
+}
+
+u8 rtl92c_phy_sw_chnl(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+
+        if (rtlphy->sw_chnl_inprogress)
+                return 0;
+        if (rtlphy->set_bwmode_inprogress)
+                return 0;
+        RT_ASSERT((rtlphy->current_channel <= 14),
+                  ("WIRELESS_MODE_G but channel>14"));
+        rtlphy->sw_chnl_inprogress = true;
+        rtlphy->sw_chnl_stage = 0;
+        rtlphy->sw_chnl_step = 0;
+        if (!(is_hal_stop(rtlhal)) && !(RT_CANNOT_IO(hw))) {
+                rtl92c_phy_sw_chnl_callback(hw);
+                RT_TRACE(rtlpriv, COMP_CHAN, DBG_LOUD,
+                         ("sw_chnl_inprogress false schdule workitem\n"));
+                rtlphy->sw_chnl_inprogress = false;
+        } else {
+                RT_TRACE(rtlpriv, COMP_CHAN, DBG_LOUD,
+                         ("sw_chnl_inprogress false driver sleep or"
+                          " unload\n"));
+                rtlphy->sw_chnl_inprogress = false;
+        }
+        return 1;
+}
+
+static bool _rtl92c_phy_sw_chnl_step_by_step(struct ieee80211_hw *hw,
+                                             u8 channel, u8 *stage, u8 *step,
+                                             u32 *delay)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct swchnlcmd precommoncmd[MAX_PRECMD_CNT];
+        u32 precommoncmdcnt;
+        struct swchnlcmd postcommoncmd[MAX_POSTCMD_CNT];
+        u32 postcommoncmdcnt;
+        struct swchnlcmd rfdependcmd[MAX_RFDEPENDCMD_CNT];
+        u32 rfdependcmdcnt;
+        struct swchnlcmd *currentcmd = NULL;
+        u8 rfpath;
+        u8 num_total_rfpath = rtlphy->num_total_rfpath;
+
+        precommoncmdcnt = 0;
+        _rtl92c_phy_set_sw_chnl_cmdarray(precommoncmd, precommoncmdcnt++,
+                                         MAX_PRECMD_CNT,
+                                         CMDID_SET_TXPOWEROWER_LEVEL, 0, 0, 0);
+        _rtl92c_phy_set_sw_chnl_cmdarray(precommoncmd, precommoncmdcnt++,
+                                         MAX_PRECMD_CNT, CMDID_END, 0, 0, 0);
+
+        postcommoncmdcnt = 0;
+
+        _rtl92c_phy_set_sw_chnl_cmdarray(postcommoncmd, postcommoncmdcnt++,
+                                         MAX_POSTCMD_CNT, CMDID_END, 0, 0, 0);
+
+        rfdependcmdcnt = 0;
+
+        RT_ASSERT((channel >= 1 && channel <= 14),
+                  ("illegal channel for Zebra: %d\n", channel));
+
+        _rtl92c_phy_set_sw_chnl_cmdarray(rfdependcmd, rfdependcmdcnt++,
+                                         MAX_RFDEPENDCMD_CNT, CMDID_RF_WRITEREG,
+                                         RF_CHNLBW, channel, 10);
+
+        _rtl92c_phy_set_sw_chnl_cmdarray(rfdependcmd, rfdependcmdcnt++,
+                                         MAX_RFDEPENDCMD_CNT, CMDID_END, 0, 0,
+                                         0);
+
+        do {
+                switch (*stage) {
+                case 0:
+                        currentcmd = &precommoncmd[*step];
+                        break;
+                case 1:
+                        currentcmd = &rfdependcmd[*step];
+                        break;
+                case 2:
+                        currentcmd = &postcommoncmd[*step];
+                        break;
+                }
+
+                if (currentcmd->cmdid == CMDID_END) {
+                        if ((*stage) == 2) {
+                                return true;
+                        } else {
+                                (*stage)++;
+                                (*step) = 0;
+                                continue;
+                        }
+                }
+
+                switch (currentcmd->cmdid) {
+                case CMDID_SET_TXPOWEROWER_LEVEL:
+                        rtl92c_phy_set_txpower_level(hw, channel);
+                        break;
+                case CMDID_WRITEPORT_ULONG:
+                        rtl_write_dword(rtlpriv, currentcmd->para1,
+                                        currentcmd->para2);
+                        break;
+                case CMDID_WRITEPORT_USHORT:
+                        rtl_write_word(rtlpriv, currentcmd->para1,
+                                       (u16) currentcmd->para2);
+                        break;
+                case CMDID_WRITEPORT_UCHAR:
+                        rtl_write_byte(rtlpriv, currentcmd->para1,
+                                       (u8) currentcmd->para2);
+                        break;
+                case CMDID_RF_WRITEREG:
+                        for (rfpath = 0; rfpath < num_total_rfpath; rfpath++) {
+                                rtlphy->rfreg_chnlval[rfpath] =
+                                    ((rtlphy->rfreg_chnlval[rfpath] &
+                                      0xfffffc00) | currentcmd->para2);
+
+                                rtl_set_rfreg(hw, (enum radio_path)rfpath,
+                                              currentcmd->para1,
+                                              RFREG_OFFSET_MASK,
+                                              rtlphy->rfreg_chnlval[rfpath]);
+                        }
+                        break;
+                default:
+                        RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                                 ("switch case not process\n"));
+                        break;
+                }
+
+                break;
+        } while (true);
+
+        (*delay) = currentcmd->msdelay;
+        (*step)++;
+        return false;
+}
+
+static bool _rtl92c_phy_set_sw_chnl_cmdarray(struct swchnlcmd *cmdtable,
+                                             u32 cmdtableidx, u32 cmdtablesz,
+                                             enum swchnlcmd_id cmdid,
+                                             u32 para1, u32 para2, u32 msdelay)
+{
+        struct swchnlcmd *pcmd;
+
+        if (cmdtable == NULL) {
+                RT_ASSERT(false, ("cmdtable cannot be NULL.\n"));
+                return false;
+        }
+
+        if (cmdtableidx >= cmdtablesz)
+                return false;
+
+        pcmd = cmdtable + cmdtableidx;
+        pcmd->cmdid = cmdid;
+        pcmd->para1 = para1;
+        pcmd->para2 = para2;
+        pcmd->msdelay = msdelay;
+        return true;
+}
+
+bool rtl8192_phy_check_is_legal_rfpath(struct ieee80211_hw *hw, u32 rfpath)
+{
+        return true;
+}
+
+static u8 _rtl92c_phy_path_a_iqk(struct ieee80211_hw *hw, bool config_pathb)
+{
+        u32 reg_eac, reg_e94, reg_e9c, reg_ea4;
+        u8 result = 0x00;
+
+        rtl_set_bbreg(hw, 0xe30, MASKDWORD, 0x10008c1f);
+        rtl_set_bbreg(hw, 0xe34, MASKDWORD, 0x10008c1f);
+        rtl_set_bbreg(hw, 0xe38, MASKDWORD, 0x82140102);
+        rtl_set_bbreg(hw, 0xe3c, MASKDWORD,
+                      config_pathb ? 0x28160202 : 0x28160502);
+
+        if (config_pathb) {
+                rtl_set_bbreg(hw, 0xe50, MASKDWORD, 0x10008c22);
+                rtl_set_bbreg(hw, 0xe54, MASKDWORD, 0x10008c22);
+                rtl_set_bbreg(hw, 0xe58, MASKDWORD, 0x82140102);
+                rtl_set_bbreg(hw, 0xe5c, MASKDWORD, 0x28160202);
+        }
+
+        rtl_set_bbreg(hw, 0xe4c, MASKDWORD, 0x001028d1);
+        rtl_set_bbreg(hw, 0xe48, MASKDWORD, 0xf9000000);
+        rtl_set_bbreg(hw, 0xe48, MASKDWORD, 0xf8000000);
+
+        mdelay(IQK_DELAY_TIME);
+
+        reg_eac = rtl_get_bbreg(hw, 0xeac, MASKDWORD);
+        reg_e94 = rtl_get_bbreg(hw, 0xe94, MASKDWORD);
+        reg_e9c = rtl_get_bbreg(hw, 0xe9c, MASKDWORD);
+        reg_ea4 = rtl_get_bbreg(hw, 0xea4, MASKDWORD);
+
+        if (!(reg_eac & BIT(28)) &&
+            (((reg_e94 & 0x03FF0000) >> 16) != 0x142) &&
+            (((reg_e9c & 0x03FF0000) >> 16) != 0x42))
+                result |= 0x01;
+        else
+                return result;
+
+        if (!(reg_eac & BIT(27)) &&
+            (((reg_ea4 & 0x03FF0000) >> 16) != 0x132) &&
+            (((reg_eac & 0x03FF0000) >> 16) != 0x36))
+                result |= 0x02;
+        return result;
+}
+
+static u8 _rtl92c_phy_path_b_iqk(struct ieee80211_hw *hw)
+{
+        u32 reg_eac, reg_eb4, reg_ebc, reg_ec4, reg_ecc;
+        u8 result = 0x00;
+
+        rtl_set_bbreg(hw, 0xe60, MASKDWORD, 0x00000002);
+        rtl_set_bbreg(hw, 0xe60, MASKDWORD, 0x00000000);
+        mdelay(IQK_DELAY_TIME);
+        reg_eac = rtl_get_bbreg(hw, 0xeac, MASKDWORD);
+        reg_eb4 = rtl_get_bbreg(hw, 0xeb4, MASKDWORD);
+        reg_ebc = rtl_get_bbreg(hw, 0xebc, MASKDWORD);
+        reg_ec4 = rtl_get_bbreg(hw, 0xec4, MASKDWORD);
+        reg_ecc = rtl_get_bbreg(hw, 0xecc, MASKDWORD);
+        if (!(reg_eac & BIT(31)) &&
+            (((reg_eb4 & 0x03FF0000) >> 16) != 0x142) &&
+            (((reg_ebc & 0x03FF0000) >> 16) != 0x42))
+                result |= 0x01;
+        else
+                return result;
+
+        if (!(reg_eac & BIT(30)) &&
+            (((reg_ec4 & 0x03FF0000) >> 16) != 0x132) &&
+            (((reg_ecc & 0x03FF0000) >> 16) != 0x36))
+                result |= 0x02;
+        return result;
+}
+
+static void _rtl92c_phy_path_a_fill_iqk_matrix(struct ieee80211_hw *hw,
+                                               bool iqk_ok, long result[][8],
+                                               u8 final_candidate, bool btxonly)
+{
+        u32 oldval_0, x, tx0_a, reg;
+        long y, tx0_c;
+
+        if (final_candidate == 0xFF)
+                return;
+        else if (iqk_ok) {
+                oldval_0 = (rtl_get_bbreg(hw, ROFDM0_XATXIQIMBALANCE,
+                                          MASKDWORD) >> 22) & 0x3FF;
+                x = result[final_candidate][0];
+                if ((x & 0x00000200) != 0)
+                        x = x | 0xFFFFFC00;
+                tx0_a = (x * oldval_0) >> 8;
+                rtl_set_bbreg(hw, ROFDM0_XATXIQIMBALANCE, 0x3FF, tx0_a);
+                rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, BIT(31),
+                              ((x * oldval_0 >> 7) & 0x1));
+                y = result[final_candidate][1];
+                if ((y & 0x00000200) != 0)
+                        y = y | 0xFFFFFC00;
+                tx0_c = (y * oldval_0) >> 8;
+                rtl_set_bbreg(hw, ROFDM0_XCTXAFE, 0xF0000000,
+                              ((tx0_c & 0x3C0) >> 6));
+                rtl_set_bbreg(hw, ROFDM0_XATXIQIMBALANCE, 0x003F0000,
+                              (tx0_c & 0x3F));
+                rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, BIT(29),
+                              ((y * oldval_0 >> 7) & 0x1));
+                if (btxonly)
+                        return;
+                reg = result[final_candidate][2];
+                rtl_set_bbreg(hw, ROFDM0_XARXIQIMBALANCE, 0x3FF, reg);
+                reg = result[final_candidate][3] & 0x3F;
+                rtl_set_bbreg(hw, ROFDM0_XARXIQIMBALANCE, 0xFC00, reg);
+                reg = (result[final_candidate][3] >> 6) & 0xF;
+                rtl_set_bbreg(hw, 0xca0, 0xF0000000, reg);
+        }
+}
+
+static void _rtl92c_phy_path_b_fill_iqk_matrix(struct ieee80211_hw *hw,
+                                               bool iqk_ok, long result[][8],
+                                               u8 final_candidate, bool btxonly)
+{
+        u32 oldval_1, x, tx1_a, reg;
+        long y, tx1_c;
+
+        if (final_candidate == 0xFF)
+                return;
+        else if (iqk_ok) {
+                oldval_1 = (rtl_get_bbreg(hw, ROFDM0_XBTXIQIMBALANCE,
+                                          MASKDWORD) >> 22) & 0x3FF;
+                x = result[final_candidate][4];
+                if ((x & 0x00000200) != 0)
+                        x = x | 0xFFFFFC00;
+                tx1_a = (x * oldval_1) >> 8;
+                rtl_set_bbreg(hw, ROFDM0_XBTXIQIMBALANCE, 0x3FF, tx1_a);
+                rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, BIT(27),
+                              ((x * oldval_1 >> 7) & 0x1));
+                y = result[final_candidate][5];
+                if ((y & 0x00000200) != 0)
+                        y = y | 0xFFFFFC00;
+                tx1_c = (y * oldval_1) >> 8;
+                rtl_set_bbreg(hw, ROFDM0_XDTXAFE, 0xF0000000,
+                              ((tx1_c & 0x3C0) >> 6));
+                rtl_set_bbreg(hw, ROFDM0_XBTXIQIMBALANCE, 0x003F0000,
+                              (tx1_c & 0x3F));
+                rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, BIT(25),
+                              ((y * oldval_1 >> 7) & 0x1));
+                if (btxonly)
+                        return;
+                reg = result[final_candidate][6];
+                rtl_set_bbreg(hw, ROFDM0_XBRXIQIMBALANCE, 0x3FF, reg);
+                reg = result[final_candidate][7] & 0x3F;
+                rtl_set_bbreg(hw, ROFDM0_XBRXIQIMBALANCE, 0xFC00, reg);
+                reg = (result[final_candidate][7] >> 6) & 0xF;
+                rtl_set_bbreg(hw, ROFDM0_AGCRSSITABLE, 0x0000F000, reg);
+        }
+}
+
+static void _rtl92c_phy_save_adda_registers(struct ieee80211_hw *hw,
+                                            u32 *addareg, u32 *addabackup,
+                                            u32 registernum)
+{
+        u32 i;
+
+        for (i = 0; i < registernum; i++)
+                addabackup[i] = rtl_get_bbreg(hw, addareg[i], MASKDWORD);
+}
+
+static void _rtl92c_phy_save_mac_registers(struct ieee80211_hw *hw,
+                                           u32 *macreg, u32 *macbackup)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u32 i;
+
+        for (i = 0; i < (IQK_MAC_REG_NUM - 1); i++)
+                macbackup[i] = rtl_read_byte(rtlpriv, macreg[i]);
+        macbackup[i] = rtl_read_dword(rtlpriv, macreg[i]);
+}
+
+static void _rtl92c_phy_reload_adda_registers(struct ieee80211_hw *hw,
+                                              u32 *addareg, u32 *addabackup,
+                                              u32 regiesternum)
+{
+        u32 i;
+
+        for (i = 0; i < regiesternum; i++)
+                rtl_set_bbreg(hw, addareg[i], MASKDWORD, addabackup[i]);
+}
+
+static void _rtl92c_phy_reload_mac_registers(struct ieee80211_hw *hw,
+                                             u32 *macreg, u32 *macbackup)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u32 i;
+
+        for (i = 0; i < (IQK_MAC_REG_NUM - 1); i++)
+                rtl_write_byte(rtlpriv, macreg[i], (u8) macbackup[i]);
+        rtl_write_dword(rtlpriv, macreg[i], macbackup[i]);
+}
+
+static void _rtl92c_phy_path_adda_on(struct ieee80211_hw *hw,
+                                     u32 *addareg, bool is_patha_on, bool is2t)
+{
+        u32 pathOn;
+        u32 i;
+
+        pathOn = is_patha_on ? 0x04db25a4 : 0x0b1b25a4;
+        if (false == is2t) {
+                pathOn = 0x0bdb25a0;
+                rtl_set_bbreg(hw, addareg[0], MASKDWORD, 0x0b1b25a0);
+        } else {
+                rtl_set_bbreg(hw, addareg[0], MASKDWORD, pathOn);
+        }
+
+        for (i = 1; i < IQK_ADDA_REG_NUM; i++)
+                rtl_set_bbreg(hw, addareg[i], MASKDWORD, pathOn);
+}
+
+static void _rtl92c_phy_mac_setting_calibration(struct ieee80211_hw *hw,
+                                                u32 *macreg, u32 *macbackup)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u32 i;
+
+        rtl_write_byte(rtlpriv, macreg[0], 0x3F);
+
+        for (i = 1; i < (IQK_MAC_REG_NUM - 1); i++)
+                rtl_write_byte(rtlpriv, macreg[i],
+                               (u8) (macbackup[i] & (~BIT(3))));
+        rtl_write_byte(rtlpriv, macreg[i], (u8) (macbackup[i] & (~BIT(5))));
+}
+
+static void _rtl92c_phy_path_a_standby(struct ieee80211_hw *hw)
+{
+        rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x0);
+        rtl_set_bbreg(hw, 0x840, MASKDWORD, 0x00010000);
+        rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x80800000);
+}
+
+static void _rtl92c_phy_pi_mode_switch(struct ieee80211_hw *hw, bool pi_mode)
+{
+        u32 mode;
+
+        mode = pi_mode ? 0x01000100 : 0x01000000;
+        rtl_set_bbreg(hw, 0x820, MASKDWORD, mode);
+        rtl_set_bbreg(hw, 0x828, MASKDWORD, mode);
+}
+
+static bool _rtl92c_phy_simularity_compare(struct ieee80211_hw *hw,
+                                           long result[][8], u8 c1, u8 c2)
+{
+        u32 i, j, diff, simularity_bitmap, bound;
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+
+        u8 final_candidate[2] = { 0xFF, 0xFF };
+        bool bresult = true, is2t = IS_92C_SERIAL(rtlhal->version);
+
+        if (is2t)
+                bound = 8;
+        else
+                bound = 4;
+
+        simularity_bitmap = 0;
+
+        for (i = 0; i < bound; i++) {
+                diff = (result[c1][i] > result[c2][i]) ?
+                    (result[c1][i] - result[c2][i]) :
+                    (result[c2][i] - result[c1][i]);
+
+                if (diff > MAX_TOLERANCE) {
+                        if ((i == 2 || i == 6) && !simularity_bitmap) {
+                                if (result[c1][i] + result[c1][i + 1] == 0)
+                                        final_candidate[(i / 4)] = c2;
+                                else if (result[c2][i] + result[c2][i + 1] == 0)
+                                        final_candidate[(i / 4)] = c1;
+                                else
+                                        simularity_bitmap = simularity_bitmap |
+                                            (1 << i);
+                        } else
+                                simularity_bitmap =
+                                    simularity_bitmap | (1 << i);
+                }
+        }
+
+        if (simularity_bitmap == 0) {
+                for (i = 0; i < (bound / 4); i++) {
+                        if (final_candidate[i] != 0xFF) {
+                                for (j = i * 4; j < (i + 1) * 4 - 2; j++)
+                                        result[3][j] =
+                                            result[final_candidate[i]][j];
+                                bresult = false;
+                        }
+                }
+                return bresult;
+        } else if (!(simularity_bitmap & 0x0F)) {
+                for (i = 0; i < 4; i++)
+                        result[3][i] = result[c1][i];
+                return false;
+        } else if (!(simularity_bitmap & 0xF0) && is2t) {
+                for (i = 4; i < 8; i++)
+                        result[3][i] = result[c1][i];
+                return false;
+        } else {
+                return false;
+        }
+
+}
+
+static void _rtl92c_phy_iq_calibrate(struct ieee80211_hw *hw,
+                                     long result[][8], u8 t, bool is2t)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        u32 i;
+        u8 patha_ok, pathb_ok;
+        u32 adda_reg[IQK_ADDA_REG_NUM] = {
+                0x85c, 0xe6c, 0xe70, 0xe74,
+                0xe78, 0xe7c, 0xe80, 0xe84,
+                0xe88, 0xe8c, 0xed0, 0xed4,
+                0xed8, 0xedc, 0xee0, 0xeec
+        };
+
+        u32 iqk_mac_reg[IQK_MAC_REG_NUM] = {
+                0x522, 0x550, 0x551, 0x040
+        };
+
+        const u32 retrycount = 2;
+
+        u32 bbvalue;
+
+        if (t == 0) {
+                bbvalue = rtl_get_bbreg(hw, 0x800, MASKDWORD);
+
+                _rtl92c_phy_save_adda_registers(hw, adda_reg,
+                                                rtlphy->adda_backup, 16);
+                _rtl92c_phy_save_mac_registers(hw, iqk_mac_reg,
+                                               rtlphy->iqk_mac_backup);
+        }
+        _rtl92c_phy_path_adda_on(hw, adda_reg, true, is2t);
+        if (t == 0) {
+                rtlphy->rfpi_enable = (u8) rtl_get_bbreg(hw,
+                                                   RFPGA0_XA_HSSIPARAMETER1,
+                                                   BIT(8));
+        }
+        if (!rtlphy->rfpi_enable)
+                _rtl92c_phy_pi_mode_switch(hw, true);
+        if (t == 0) {
+                rtlphy->reg_c04 = rtl_get_bbreg(hw, 0xc04, MASKDWORD);
+                rtlphy->reg_c08 = rtl_get_bbreg(hw, 0xc08, MASKDWORD);
+                rtlphy->reg_874 = rtl_get_bbreg(hw, 0x874, MASKDWORD);
+        }
+        rtl_set_bbreg(hw, 0xc04, MASKDWORD, 0x03a05600);
+        rtl_set_bbreg(hw, 0xc08, MASKDWORD, 0x000800e4);
+        rtl_set_bbreg(hw, 0x874, MASKDWORD, 0x22204000);
+        if (is2t) {
+                rtl_set_bbreg(hw, 0x840, MASKDWORD, 0x00010000);
+                rtl_set_bbreg(hw, 0x844, MASKDWORD, 0x00010000);
+        }
+        _rtl92c_phy_mac_setting_calibration(hw, iqk_mac_reg,
+                                            rtlphy->iqk_mac_backup);
+        rtl_set_bbreg(hw, 0xb68, MASKDWORD, 0x00080000);
+        if (is2t)
+                rtl_set_bbreg(hw, 0xb6c, MASKDWORD, 0x00080000);
+        rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x80800000);
+        rtl_set_bbreg(hw, 0xe40, MASKDWORD, 0x01007c00);
+        rtl_set_bbreg(hw, 0xe44, MASKDWORD, 0x01004800);
+        for (i = 0; i < retrycount; i++) {
+                patha_ok = _rtl92c_phy_path_a_iqk(hw, is2t);
+                if (patha_ok == 0x03) {
+                        result[t][0] = (rtl_get_bbreg(hw, 0xe94, MASKDWORD) &
+                                        0x3FF0000) >> 16;
+                        result[t][1] = (rtl_get_bbreg(hw, 0xe9c, MASKDWORD) &
+                                        0x3FF0000) >> 16;
+                        result[t][2] = (rtl_get_bbreg(hw, 0xea4, MASKDWORD) &
+                                        0x3FF0000) >> 16;
+                        result[t][3] = (rtl_get_bbreg(hw, 0xeac, MASKDWORD) &
+                                        0x3FF0000) >> 16;
+                        break;
+                } else if (i == (retrycount - 1) && patha_ok == 0x01)
+                        result[t][0] = (rtl_get_bbreg(hw, 0xe94,
+                                                      MASKDWORD) & 0x3FF0000) >>
+                                                      16;
+                result[t][1] =
+                    (rtl_get_bbreg(hw, 0xe9c, MASKDWORD) & 0x3FF0000) >> 16;
+
+        }
+
+        if (is2t) {
+                _rtl92c_phy_path_a_standby(hw);
+                _rtl92c_phy_path_adda_on(hw, adda_reg, false, is2t);
+                for (i = 0; i < retrycount; i++) {
+                        pathb_ok = _rtl92c_phy_path_b_iqk(hw);
+                        if (pathb_ok == 0x03) {
+                                result[t][4] = (rtl_get_bbreg(hw,
+                                                      0xeb4,
+                                                      MASKDWORD) &
+                                                0x3FF0000) >> 16;
+                                result[t][5] =
+                                    (rtl_get_bbreg(hw, 0xebc, MASKDWORD) &
+                                     0x3FF0000) >> 16;
+                                result[t][6] =
+                                    (rtl_get_bbreg(hw, 0xec4, MASKDWORD) &
+                                     0x3FF0000) >> 16;
+                                result[t][7] =
+                                    (rtl_get_bbreg(hw, 0xecc, MASKDWORD) &
+                                     0x3FF0000) >> 16;
+                                break;
+                        } else if (i == (retrycount - 1) && pathb_ok == 0x01) {
+                                result[t][4] = (rtl_get_bbreg(hw,
+                                                      0xeb4,
+                                                      MASKDWORD) &
+                                                0x3FF0000) >> 16;
+                        }
+                        result[t][5] = (rtl_get_bbreg(hw, 0xebc, MASKDWORD) &
+                                        0x3FF0000) >> 16;
+                }
+        }
+        rtl_set_bbreg(hw, 0xc04, MASKDWORD, rtlphy->reg_c04);
+        rtl_set_bbreg(hw, 0x874, MASKDWORD, rtlphy->reg_874);
+        rtl_set_bbreg(hw, 0xc08, MASKDWORD, rtlphy->reg_c08);
+        rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0);
+        rtl_set_bbreg(hw, 0x840, MASKDWORD, 0x00032ed3);
+        if (is2t)
+                rtl_set_bbreg(hw, 0x844, MASKDWORD, 0x00032ed3);
+        if (t != 0) {
+                if (!rtlphy->rfpi_enable)
+                        _rtl92c_phy_pi_mode_switch(hw, false);
+                _rtl92c_phy_reload_adda_registers(hw, adda_reg,
+                                                  rtlphy->adda_backup, 16);
+                _rtl92c_phy_reload_mac_registers(hw, iqk_mac_reg,
+                                                 rtlphy->iqk_mac_backup);
+        }
+}
+
+static void _rtl92c_phy_ap_calibrate(struct ieee80211_hw *hw,
+                                     char delta, bool is2t)
+{
+        /* This routine is deliberately dummied out for later fixes */
+#if 0
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+
+        u32 reg_d[PATH_NUM];
+        u32 tmpreg, index, offset, path, i, pathbound = PATH_NUM, apkbound;
+
+        u32 bb_backup[APK_BB_REG_NUM];
+        u32 bb_reg[APK_BB_REG_NUM] = {
+                0x904, 0xc04, 0x800, 0xc08, 0x874
+        };
+        u32 bb_ap_mode[APK_BB_REG_NUM] = {
+                0x00000020, 0x00a05430, 0x02040000,
+                0x000800e4, 0x00204000
+        };
+        u32 bb_normal_ap_mode[APK_BB_REG_NUM] = {
+                0x00000020, 0x00a05430, 0x02040000,
+                0x000800e4, 0x22204000
+        };
+
+        u32 afe_backup[APK_AFE_REG_NUM];
+        u32 afe_reg[APK_AFE_REG_NUM] = {
+                0x85c, 0xe6c, 0xe70, 0xe74, 0xe78,
+                0xe7c, 0xe80, 0xe84, 0xe88, 0xe8c,
+                0xed0, 0xed4, 0xed8, 0xedc, 0xee0,
+                0xeec
+        };
+
+        u32 mac_backup[IQK_MAC_REG_NUM];
+        u32 mac_reg[IQK_MAC_REG_NUM] = {
+                0x522, 0x550, 0x551, 0x040
+        };
+
+        u32 apk_rf_init_value[PATH_NUM][APK_BB_REG_NUM] = {
+                {0x0852c, 0x1852c, 0x5852c, 0x1852c, 0x5852c},
+                {0x2852e, 0x0852e, 0x3852e, 0x0852e, 0x0852e}
+        };
+
+        u32 apk_normal_rf_init_value[PATH_NUM][APK_BB_REG_NUM] = {
+                {0x0852c, 0x0a52c, 0x3a52c, 0x5a52c, 0x5a52c},
+                {0x0852c, 0x0a52c, 0x5a52c, 0x5a52c, 0x5a52c}
+        };
+
+        u32 apk_rf_value_0[PATH_NUM][APK_BB_REG_NUM] = {
+                {0x52019, 0x52014, 0x52013, 0x5200f, 0x5208d},
+                {0x5201a, 0x52019, 0x52016, 0x52033, 0x52050}
+        };
+
+        u32 apk_normal_rf_value_0[PATH_NUM][APK_BB_REG_NUM] = {
+                {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a},
+                {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a}
+        };
+
+        u32 afe_on_off[PATH_NUM] = {
+                0x04db25a4, 0x0b1b25a4
+        };
+
+        u32 apk_offset[PATH_NUM] = { 0xb68, 0xb6c };
+
+        u32 apk_normal_offset[PATH_NUM] = { 0xb28, 0xb98 };
+
+        u32 apk_value[PATH_NUM] = { 0x92fc0000, 0x12fc0000 };
+
+        u32 apk_normal_value[PATH_NUM] = { 0x92680000, 0x12680000 };
+
+        const char apk_delta_mapping[APK_BB_REG_NUM][13] = {
+                {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6},
+                {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6},
+                {-6, -4, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6},
+                {-1, -1, -1, -1, -1, -1, 0, 1, 2, 3, 4, 5, 6},
+                {-11, -9, -7, -5, -3, -1, 0, 0, 0, 0, 0, 0, 0}
+        };
+
+        const u32 apk_normal_setting_value_1[13] = {
+                0x01017018, 0xf7ed8f84, 0x1b1a1816, 0x2522201e, 0x322e2b28,
+                0x433f3a36, 0x5b544e49, 0x7b726a62, 0xa69a8f84, 0xdfcfc0b3,
+                0x12680000, 0x00880000, 0x00880000
+        };
+
+        const u32 apk_normal_setting_value_2[16] = {
+                0x01c7021d, 0x01670183, 0x01000123, 0x00bf00e2, 0x008d00a3,
+                0x0068007b, 0x004d0059, 0x003a0042, 0x002b0031, 0x001f0025,
+                0x0017001b, 0x00110014, 0x000c000f, 0x0009000b, 0x00070008,
+                0x00050006
+        };
+
+        const u32 apk_result[PATH_NUM][APK_BB_REG_NUM];
+
+        long bb_offset, delta_v, delta_offset;
+
+        if (!is2t)
+                pathbound = 1;
+
+        for (index = 0; index < PATH_NUM; index++) {
+                apk_offset[index] = apk_normal_offset[index];
+                apk_value[index] = apk_normal_value[index];
+                afe_on_off[index] = 0x6fdb25a4;
+        }
+
+        for (index = 0; index < APK_BB_REG_NUM; index++) {
+                for (path = 0; path < pathbound; path++) {
+                        apk_rf_init_value[path][index] =
+                            apk_normal_rf_init_value[path][index];
+                        apk_rf_value_0[path][index] =
+                            apk_normal_rf_value_0[path][index];
+                }
+                bb_ap_mode[index] = bb_normal_ap_mode[index];
+
+                apkbound = 6;
+        }
+
+        for (index = 0; index < APK_BB_REG_NUM; index++) {
+                if (index == 0)
+                        continue;
+                bb_backup[index] = rtl_get_bbreg(hw, bb_reg[index], MASKDWORD);
+        }
+
+        _rtl92c_phy_save_mac_registers(hw, mac_reg, mac_backup);
+
+        _rtl92c_phy_save_adda_registers(hw, afe_reg, afe_backup, 16);
+
+        for (path = 0; path < pathbound; path++) {
+                if (path == RF90_PATH_A) {
+                        offset = 0xb00;
+                        for (index = 0; index < 11; index++) {
+                                rtl_set_bbreg(hw, offset, MASKDWORD,
+                                              apk_normal_setting_value_1
+                                              [index]);
+
+                                offset += 0x04;
+                        }
+
+                        rtl_set_bbreg(hw, 0xb98, MASKDWORD, 0x12680000);
+
+                        offset = 0xb68;
+                        for (; index < 13; index++) {
+                                rtl_set_bbreg(hw, offset, MASKDWORD,
+                                              apk_normal_setting_value_1
+                                              [index]);
+
+                                offset += 0x04;
+                        }
+
+                        rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x40000000);
+
+                        offset = 0xb00;
+                        for (index = 0; index < 16; index++) {
+                                rtl_set_bbreg(hw, offset, MASKDWORD,
+                                              apk_normal_setting_value_2
+                                              [index]);
+
+                                offset += 0x04;
+                        }
+                        rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x00000000);
+                } else if (path == RF90_PATH_B) {
+                        offset = 0xb70;
+                        for (index = 0; index < 10; index++) {
+                                rtl_set_bbreg(hw, offset, MASKDWORD,
+                                              apk_normal_setting_value_1
+                                              [index]);
+
+                                offset += 0x04;
+                        }
+                        rtl_set_bbreg(hw, 0xb28, MASKDWORD, 0x12680000);
+                        rtl_set_bbreg(hw, 0xb98, MASKDWORD, 0x12680000);
+
+                        offset = 0xb68;
+                        index = 11;
+                        for (; index < 13; index++) {
+                                rtl_set_bbreg(hw, offset, MASKDWORD,
+                                              apk_normal_setting_value_1
+                                              [index]);
+
+                                offset += 0x04;
+                        }
+
+                        rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x40000000);
+
+                        offset = 0xb60;
+                        for (index = 0; index < 16; index++) {
+                                rtl_set_bbreg(hw, offset, MASKDWORD,
+                                              apk_normal_setting_value_2
+                                              [index]);
+
+                                offset += 0x04;
+                        }
+                        rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x00000000);
+                }
+
+                reg_d[path] = rtl_get_rfreg(hw, (enum radio_path)path,
+                                            0xd, MASKDWORD);
+
+                for (index = 0; index < APK_AFE_REG_NUM; index++)
+                        rtl_set_bbreg(hw, afe_reg[index], MASKDWORD,
+                                      afe_on_off[path]);
+
+                if (path == RF90_PATH_A) {
+                        for (index = 0; index < APK_BB_REG_NUM; index++) {
+                                if (index == 0)
+                                        continue;
+                                rtl_set_bbreg(hw, bb_reg[index], MASKDWORD,
+                                              bb_ap_mode[index]);
+                        }
+                }
+
+                _rtl92c_phy_mac_setting_calibration(hw, mac_reg, mac_backup);
+
+                if (path == 0) {
+                        rtl_set_rfreg(hw, RF90_PATH_B, 0x0, MASKDWORD, 0x10000);
+                } else {
+                        rtl_set_rfreg(hw, RF90_PATH_A, 0x00, MASKDWORD,
+                                      0x10000);
+                        rtl_set_rfreg(hw, RF90_PATH_A, 0x10, MASKDWORD,
+                                      0x1000f);
+                        rtl_set_rfreg(hw, RF90_PATH_A, 0x11, MASKDWORD,
+                                      0x20103);
+                }
+
+                delta_offset = ((delta + 14) / 2);
+                if (delta_offset < 0)
+                        delta_offset = 0;
+                else if (delta_offset > 12)
+                        delta_offset = 12;
+
+                for (index = 0; index < APK_BB_REG_NUM; index++) {
+                        if (index != 1)
+                                continue;
+
+                        tmpreg = apk_rf_init_value[path][index];
+
+                        if (!rtlefuse->apk_thermalmeterignore) {
+                                bb_offset = (tmpreg & 0xF0000) >> 16;
+
+                                if (!(tmpreg & BIT(15)))
+                                        bb_offset = -bb_offset;
+
+                                delta_v =
+                                    apk_delta_mapping[index][delta_offset];
+
+                                bb_offset += delta_v;
+
+                                if (bb_offset < 0) {
+                                        tmpreg = tmpreg & (~BIT(15));
+                                        bb_offset = -bb_offset;
+                                } else {
+                                        tmpreg = tmpreg | BIT(15);
+                                }
+
+                                tmpreg =
+                                    (tmpreg & 0xFFF0FFFF) | (bb_offset << 16);
+                        }
+
+                        rtl_set_rfreg(hw, (enum radio_path)path, 0xc,
+                                      MASKDWORD, 0x8992e);
+                        rtl_set_rfreg(hw, (enum radio_path)path, 0x0,
+                                      MASKDWORD, apk_rf_value_0[path][index]);
+                        rtl_set_rfreg(hw, (enum radio_path)path, 0xd,
+                                      MASKDWORD, tmpreg);
+
+                        i = 0;
+                        do {
+                                rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x80000000);
+                                rtl_set_bbreg(hw, apk_offset[path],
+                                              MASKDWORD, apk_value[0]);
+                                RTPRINT(rtlpriv, FINIT, INIT_IQK,
+                                        ("PHY_APCalibrate() offset 0x%x "
+                                         "value 0x%x\n",
+                                         apk_offset[path],
+                                         rtl_get_bbreg(hw, apk_offset[path],
+                                                       MASKDWORD)));
+
+                                mdelay(3);
+
+                                rtl_set_bbreg(hw, apk_offset[path],
+                                              MASKDWORD, apk_value[1]);
+                                RTPRINT(rtlpriv, FINIT, INIT_IQK,
+                                        ("PHY_APCalibrate() offset 0x%x "
+                                         "value 0x%x\n",
+                                         apk_offset[path],
+                                         rtl_get_bbreg(hw, apk_offset[path],
+                                                       MASKDWORD)));
+
+                                mdelay(20);
+
+                                rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x00000000);
+
+                                if (path == RF90_PATH_A)
+                                        tmpreg = rtl_get_bbreg(hw, 0xbd8,
+                                                               0x03E00000);
+                                else
+                                        tmpreg = rtl_get_bbreg(hw, 0xbd8,
+                                                               0xF8000000);
+
+                                RTPRINT(rtlpriv, FINIT, INIT_IQK,
+                                        ("PHY_APCalibrate() offset "
+                                         "0xbd8[25:21] %x\n", tmpreg));
+
+                                i++;
+
+                        } while (tmpreg > apkbound && i < 4);
+
+                        apk_result[path][index] = tmpreg;
+                }
+        }
+
+        _rtl92c_phy_reload_mac_registers(hw, mac_reg, mac_backup);
+
+        for (index = 0; index < APK_BB_REG_NUM; index++) {
+                if (index == 0)
+                        continue;
+                rtl_set_bbreg(hw, bb_reg[index], MASKDWORD, bb_backup[index]);
+        }
+
+        _rtl92c_phy_reload_adda_registers(hw, afe_reg, afe_backup, 16);
+
+        for (path = 0; path < pathbound; path++) {
+                rtl_set_rfreg(hw, (enum radio_path)path, 0xd,
+                              MASKDWORD, reg_d[path]);
+
+                if (path == RF90_PATH_B) {
+                        rtl_set_rfreg(hw, RF90_PATH_A, 0x10, MASKDWORD,
+                                      0x1000f);
+                        rtl_set_rfreg(hw, RF90_PATH_A, 0x11, MASKDWORD,
+                                      0x20101);
+                }
+
+                if (apk_result[path][1] > 6)
+                        apk_result[path][1] = 6;
+        }
+
+        for (path = 0; path < pathbound; path++) {
+                rtl_set_rfreg(hw, (enum radio_path)path, 0x3, MASKDWORD,
+                              ((apk_result[path][1] << 15) |
+                               (apk_result[path][1] << 10) |
+                               (apk_result[path][1] << 5) |
+                               apk_result[path][1]));
+
+                if (path == RF90_PATH_A)
+                        rtl_set_rfreg(hw, (enum radio_path)path, 0x4, MASKDWORD,
+                                      ((apk_result[path][1] << 15) |
+                                       (apk_result[path][1] << 10) |
+                                       (0x00 << 5) | 0x05));
+                else
+                        rtl_set_rfreg(hw, (enum radio_path)path, 0x4, MASKDWORD,
+                                      ((apk_result[path][1] << 15) |
+                                       (apk_result[path][1] << 10) |
+                                       (0x02 << 5) | 0x05));
+
+                rtl_set_rfreg(hw, (enum radio_path)path, 0xe, MASKDWORD,
+                              ((0x08 << 15) | (0x08 << 10) | (0x08 << 5) |
+                               0x08));
+
+        }
+
+        rtlphy->apk_done = true;
+#endif
+}
+
+static void _rtl92c_phy_set_rfpath_switch(struct ieee80211_hw *hw,
+                                          bool bmain, bool is2t)
+{
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+
+        if (is_hal_stop(rtlhal)) {
+                rtl_set_bbreg(hw, REG_LEDCFG0, BIT(23), 0x01);
+                rtl_set_bbreg(hw, rFPGA0_XAB_RFPARAMETER, BIT(13), 0x01);
+        }
+        if (is2t) {
+                if (bmain)
+                        rtl_set_bbreg(hw, RFPGA0_XB_RFINTERFACEOE,
+                                      BIT(5) | BIT(6), 0x1);
+                else
+                        rtl_set_bbreg(hw, RFPGA0_XB_RFINTERFACEOE,
+                                      BIT(5) | BIT(6), 0x2);
+        } else {
+                if (bmain)
+                        rtl_set_bbreg(hw, RFPGA0_XA_RFINTERFACEOE, 0x300, 0x2);
+                else
+                        rtl_set_bbreg(hw, RFPGA0_XA_RFINTERFACEOE, 0x300, 0x1);
+
+        }
+}
+
+#undef IQK_ADDA_REG_NUM
+#undef IQK_DELAY_TIME
+
+void rtl92c_phy_iq_calibrate(struct ieee80211_hw *hw, bool recovery)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+
+        long result[4][8];
+        u8 i, final_candidate;
+        bool patha_ok, pathb_ok;
+        long reg_e94, reg_e9c, reg_ea4, reg_eac, reg_eb4, reg_ebc, reg_ec4,
+            reg_ecc, reg_tmp = 0;
+        bool is12simular, is13simular, is23simular;
+        bool start_conttx = false, singletone = false;
+        u32 iqk_bb_reg[10] = {
+                ROFDM0_XARXIQIMBALANCE,
+                ROFDM0_XBRXIQIMBALANCE,
+                ROFDM0_ECCATHRESHOLD,
+                ROFDM0_AGCRSSITABLE,
+                ROFDM0_XATXIQIMBALANCE,
+                ROFDM0_XBTXIQIMBALANCE,
+                ROFDM0_XCTXIQIMBALANCE,
+                ROFDM0_XCTXAFE,
+                ROFDM0_XDTXAFE,
+                ROFDM0_RXIQEXTANTA
+        };
+
+        if (recovery) {
+                _rtl92c_phy_reload_adda_registers(hw,
+                                                  iqk_bb_reg,
+                                                  rtlphy->iqk_bb_backup, 10);
+                return;
+        }
+        if (start_conttx || singletone)
+                return;
+        for (i = 0; i < 8; i++) {
+                result[0][i] = 0;
+                result[1][i] = 0;
+                result[2][i] = 0;
+                result[3][i] = 0;
+        }
+        final_candidate = 0xff;
+        patha_ok = false;
+        pathb_ok = false;
+        is12simular = false;
+        is23simular = false;
+        is13simular = false;
+        for (i = 0; i < 3; i++) {
+                if (IS_92C_SERIAL(rtlhal->version))
+                        _rtl92c_phy_iq_calibrate(hw, result, i, true);
+                else
+                        _rtl92c_phy_iq_calibrate(hw, result, i, false);
+                if (i == 1) {
+                        is12simular = _rtl92c_phy_simularity_compare(hw,
+                                                                     result, 0,
+                                                                     1);
+                        if (is12simular) {
+                                final_candidate = 0;
+                                break;
+                        }
+                }
+                if (i == 2) {
+                        is13simular = _rtl92c_phy_simularity_compare(hw,
+                                                                     result, 0,
+                                                                     2);
+                        if (is13simular) {
+                                final_candidate = 0;
+                                break;
+                        }
+                        is23simular = _rtl92c_phy_simularity_compare(hw,
+                                                                     result, 1,
+                                                                     2);
+                        if (is23simular)
+                                final_candidate = 1;
+                        else {
+                                for (i = 0; i < 8; i++)
+                                        reg_tmp += result[3][i];
+
+                                if (reg_tmp != 0)
+                                        final_candidate = 3;
+                                else
+                                        final_candidate = 0xFF;
+                        }
+                }
+        }
+        for (i = 0; i < 4; i++) {
+                reg_e94 = result[i][0];
+                reg_e9c = result[i][1];
+                reg_ea4 = result[i][2];
+                reg_eac = result[i][3];
+                reg_eb4 = result[i][4];
+                reg_ebc = result[i][5];
+                reg_ec4 = result[i][6];
+                reg_ecc = result[i][7];
+        }
+        if (final_candidate != 0xff) {
+                rtlphy->reg_e94 = reg_e94 = result[final_candidate][0];
+                rtlphy->reg_e9c = reg_e9c = result[final_candidate][1];
+                reg_ea4 = result[final_candidate][2];
+                reg_eac = result[final_candidate][3];
+                rtlphy->reg_eb4 = reg_eb4 = result[final_candidate][4];
+                rtlphy->reg_ebc = reg_ebc = result[final_candidate][5];
+                reg_ec4 = result[final_candidate][6];
+                reg_ecc = result[final_candidate][7];
+                patha_ok = pathb_ok = true;
+        } else {
+                rtlphy->reg_e94 = rtlphy->reg_eb4 = 0x100;
+                rtlphy->reg_e9c = rtlphy->reg_ebc = 0x0;
+        }
+        if (reg_e94 != 0) /*&&(reg_ea4 != 0) */
+                _rtl92c_phy_path_a_fill_iqk_matrix(hw, patha_ok, result,
+                                                   final_candidate,
+                                                   (reg_ea4 == 0));
+        if (IS_92C_SERIAL(rtlhal->version)) {
+                if (reg_eb4 != 0) /*&&(reg_ec4 != 0) */
+                        _rtl92c_phy_path_b_fill_iqk_matrix(hw, pathb_ok,
+                                                           result,
+                                                           final_candidate,
+                                                           (reg_ec4 == 0));
+        }
+        _rtl92c_phy_save_adda_registers(hw, iqk_bb_reg,
+                                        rtlphy->iqk_bb_backup, 10);
+}
+
+void rtl92c_phy_lc_calibrate(struct ieee80211_hw *hw)
+{
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        bool start_conttx = false, singletone = false;
+
+        if (start_conttx || singletone)
+                return;
+        if (IS_92C_SERIAL(rtlhal->version))
+                _rtl92c_phy_lc_calibrate(hw, true);
+        else
+                _rtl92c_phy_lc_calibrate(hw, false);
+}
+
+void rtl92c_phy_ap_calibrate(struct ieee80211_hw *hw, char delta)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+
+        if (rtlphy->apk_done)
+                return;
+        if (IS_92C_SERIAL(rtlhal->version))
+                _rtl92c_phy_ap_calibrate(hw, delta, true);
+        else
+                _rtl92c_phy_ap_calibrate(hw, delta, false);
+}
+
+void rtl92c_phy_set_rfpath_switch(struct ieee80211_hw *hw, bool bmain)
+{
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+
+        if (IS_92C_SERIAL(rtlhal->version))
+                _rtl92c_phy_set_rfpath_switch(hw, bmain, true);
+        else
+                _rtl92c_phy_set_rfpath_switch(hw, bmain, false);
+}
+
+bool rtl92c_phy_set_io_cmd(struct ieee80211_hw *hw, enum io_type iotype)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        bool postprocessing = false;
+
+        RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,
+                 ("-->IO Cmd(%#x), set_io_inprogress(%d)\n",
+                  iotype, rtlphy->set_io_inprogress));
+        do {
+                switch (iotype) {
+                case IO_CMD_RESUME_DM_BY_SCAN:
+                        RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,
+                                 ("[IO CMD] Resume DM after scan.\n"));
+                        postprocessing = true;
+                        break;
+                case IO_CMD_PAUSE_DM_BY_SCAN:
+                        RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,
+                                 ("[IO CMD] Pause DM before scan.\n"));
+                        postprocessing = true;
+                        break;
+                default:
+                        RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                                 ("switch case not process\n"));
+                        break;
+                }
+        } while (false);
+        if (postprocessing && !rtlphy->set_io_inprogress) {
+                rtlphy->set_io_inprogress = true;
+                rtlphy->current_io_type = iotype;
+        } else {
+                return false;
+        }
+        rtl92c_phy_set_io(hw);
+        RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE, ("<--IO Type(%#x)\n", iotype));
+        return true;
+}
+
+void rtl92c_phy_set_io(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+
+        RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,
+                 ("--->Cmd(%#x), set_io_inprogress(%d)\n",
+                  rtlphy->current_io_type, rtlphy->set_io_inprogress));
+        switch (rtlphy->current_io_type) {
+        case IO_CMD_RESUME_DM_BY_SCAN:
+                dm_digtable.cur_igvalue = rtlphy->initgain_backup.xaagccore1;
+                rtl92c_dm_write_dig(hw);
+                rtl92c_phy_set_txpower_level(hw, rtlphy->current_channel);
+                break;
+        case IO_CMD_PAUSE_DM_BY_SCAN:
+                rtlphy->initgain_backup.xaagccore1 = dm_digtable.cur_igvalue;
+                dm_digtable.cur_igvalue = 0x17;
+                rtl92c_dm_write_dig(hw);
+                break;
+        default:
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("switch case not process\n"));
+                break;
+        }
+        rtlphy->set_io_inprogress = false;
+        RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,
+                 ("<---(%#x)\n", rtlphy->current_io_type));
+}
+
+void rtl92ce_phy_set_rf_on(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        rtl_write_byte(rtlpriv, REG_SPS0_CTRL, 0x2b);
+        rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE3);
+        rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x00);
+        rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE2);
+        rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE3);
+        rtl_write_byte(rtlpriv, REG_TXPAUSE, 0x00);
+}
+
+static void _rtl92ce_phy_set_rf_sleep(struct ieee80211_hw *hw)
+{
+        u32 u4b_tmp;
+        u8 delay = 5;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF);
+        rtl_set_rfreg(hw, RF90_PATH_A, 0x00, RFREG_OFFSET_MASK, 0x00);
+        rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x40);
+        u4b_tmp = rtl_get_rfreg(hw, RF90_PATH_A, 0, RFREG_OFFSET_MASK);
+        while (u4b_tmp != 0 && delay > 0) {
+                rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x0);
+                rtl_set_rfreg(hw, RF90_PATH_A, 0x00, RFREG_OFFSET_MASK, 0x00);
+                rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x40);
+                u4b_tmp = rtl_get_rfreg(hw, RF90_PATH_A, 0, RFREG_OFFSET_MASK);
+                delay--;
+        }
+        if (delay == 0) {
+                rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x00);
+                rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE2);
+                rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE3);
+                rtl_write_byte(rtlpriv, REG_TXPAUSE, 0x00);
+                RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
+                         ("Switch RF timeout !!!.\n"));
+                return;
+        }
+        rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE2);
+        rtl_write_byte(rtlpriv, REG_SPS0_CTRL, 0x22);
+}
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/Makefile b/drivers/net/wireless/rtlwifi/rtl8192ce/Makefile
index 0f0be7c763b8..5c5fdde637cb 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192ce/Makefile
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/Makefile
@@ -10,3 +10,5 @@ rtl8192ce-objs :=		\
                 trx.o
 
 obj-$(CONFIG_RTL8192CE) += rtl8192ce.o
+
+ccflags-y += -D__CHECK_ENDIAN__
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/def.h b/drivers/net/wireless/rtlwifi/rtl8192ce/def.h
index 83cd64895292..2f577c8828fc 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192ce/def.h
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/def.h
@@ -121,11 +121,37 @@
 #define CHIP_92C                        0x01
 #define CHIP_88C                        0x00
 
+/* Add vendor information into chip version definition.
+ * Add UMC B-Cut and RTL8723 chip info definition.
+ *
+ * BIT 7        Reserved
+ * BIT 6        UMC BCut
+ * BIT 5        Manufacturer(TSMC/UMC)
+ * BIT 4        TEST/NORMAL
+ * BIT 3        8723 Version
+ * BIT 2        8723?
+ * BIT 1        1T2R?
+ * BIT 0        88C/92C
+*/
+
 enum version_8192c {
         VERSION_A_CHIP_92C = 0x01,
         VERSION_A_CHIP_88C = 0x00,
         VERSION_B_CHIP_92C = 0x11,
         VERSION_B_CHIP_88C = 0x10,
+        VERSION_TEST_CHIP_88C = 0x00,
+        VERSION_TEST_CHIP_92C = 0x01,
+        VERSION_NORMAL_TSMC_CHIP_88C = 0x10,
+        VERSION_NORMAL_TSMC_CHIP_92C = 0x11,
+        VERSION_NORMAL_TSMC_CHIP_92C_1T2R = 0x13,
+        VERSION_NORMAL_UMC_CHIP_88C_A_CUT = 0x30,
+        VERSION_NORMAL_UMC_CHIP_92C_A_CUT = 0x31,
+        VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT = 0x33,
+        VERSION_NORMA_UMC_CHIP_8723_1T1R_A_CUT = 0x34,
+        VERSION_NORMA_UMC_CHIP_8723_1T1R_B_CUT = 0x3c,
+        VERSION_NORMAL_UMC_CHIP_88C_B_CUT = 0x70,
+        VERSION_NORMAL_UMC_CHIP_92C_B_CUT = 0x71,
+        VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT = 0x73,
         VERSION_UNKNOWN = 0x88,
 };
 
@@ -254,4 +280,122 @@ struct h2c_cmd_8192c {
         u8 *p_cmdbuffer;
 };
 
+static inline u8 _rtl92c_get_chnl_group(u8 chnl)
+{
+        u8 group = 0;
+
+        if (chnl < 3)
+                group = 0;
+        else if (chnl < 9)
+                group = 1;
+        else
+                group = 2;
+
+        return group;
+}
+
+/* NOTE: reference to rtl8192c_rates struct */
+static inline int _rtl92c_rate_mapping(struct ieee80211_hw *hw, bool isHT,
+                                       u8 desc_rate, bool first_ampdu)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        int rate_idx = 0;
+
+        if (first_ampdu) {
+                if (false == isHT) {
+                        switch (desc_rate) {
+                        case DESC92C_RATE1M:
+                                rate_idx = 0;
+                                break;
+                        case DESC92C_RATE2M:
+                                rate_idx = 1;
+                                break;
+                        case DESC92C_RATE5_5M:
+                                rate_idx = 2;
+                                break;
+                        case DESC92C_RATE11M:
+                                rate_idx = 3;
+                                break;
+                        case DESC92C_RATE6M:
+                                rate_idx = 4;
+                                break;
+                        case DESC92C_RATE9M:
+                                rate_idx = 5;
+                                break;
+                        case DESC92C_RATE12M:
+                                rate_idx = 6;
+                                break;
+                        case DESC92C_RATE18M:
+                                rate_idx = 7;
+                                break;
+                        case DESC92C_RATE24M:
+                                rate_idx = 8;
+                                break;
+                        case DESC92C_RATE36M:
+                                rate_idx = 9;
+                                break;
+                        case DESC92C_RATE48M:
+                                rate_idx = 10;
+                                break;
+                        case DESC92C_RATE54M:
+                                rate_idx = 11;
+                                break;
+                        default:
+                                RT_TRACE(rtlpriv, COMP_ERR, DBG_DMESG,
+                                         ("Rate %d is not support, set to "
+                                        "1M rate.\n", desc_rate));
+                                rate_idx = 0;
+                                break;
+                        }
+                } else {
+                        rate_idx = 11;
+                }
+                return rate_idx;
+        }
+        switch (desc_rate) {
+        case DESC92C_RATE1M:
+                rate_idx = 0;
+                break;
+        case DESC92C_RATE2M:
+                rate_idx = 1;
+                break;
+        case DESC92C_RATE5_5M:
+                rate_idx = 2;
+                break;
+        case DESC92C_RATE11M:
+                rate_idx = 3;
+                break;
+        case DESC92C_RATE6M:
+                rate_idx = 4;
+                break;
+        case DESC92C_RATE9M:
+                rate_idx = 5;
+                break;
+        case DESC92C_RATE12M:
+                rate_idx = 6;
+                break;
+        case DESC92C_RATE18M:
+                rate_idx = 7;
+                break;
+        case DESC92C_RATE24M:
+                rate_idx = 8;
+                break;
+        case DESC92C_RATE36M:
+                rate_idx = 9;
+                break;
+        case DESC92C_RATE48M:
+                rate_idx = 10;
+                break;
+        case DESC92C_RATE54M:
+                rate_idx = 11;
+                break;
+        /* TODO: How to mapping MCS rate? */
+        /*  NOTE: referenc to __ieee80211_rx */
+        default:
+                rate_idx = 11;
+                break;
+        }
+        return rate_idx;
+}
+
 #endif
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/dm.c b/drivers/net/wireless/rtlwifi/rtl8192ce/dm.c
index 62e7c64e087b..888df5e2d2fc 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192ce/dm.c
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/dm.c
@@ -35,485 +35,16 @@
 #include "dm.h"
 #include "fw.h"
 
-struct dig_t dm_digtable;
-static struct ps_t dm_pstable;
+#include "../rtl8192c/dm_common.c"
 
-static const u32 ofdmswing_table[OFDM_TABLE_SIZE] = {
-        0x7f8001fe,
-        0x788001e2,
-        0x71c001c7,
-        0x6b8001ae,
-        0x65400195,
-        0x5fc0017f,
-        0x5a400169,
-        0x55400155,
-        0x50800142,
-        0x4c000130,
-        0x47c0011f,
-        0x43c0010f,
-        0x40000100,
-        0x3c8000f2,
-        0x390000e4,
-        0x35c000d7,
-        0x32c000cb,
-        0x300000c0,
-        0x2d4000b5,
-        0x2ac000ab,
-        0x288000a2,
-        0x26000098,
-        0x24000090,
-        0x22000088,
-        0x20000080,
-        0x1e400079,
-        0x1c800072,
-        0x1b00006c,
-        0x19800066,
-        0x18000060,
-        0x16c0005b,
-        0x15800056,
-        0x14400051,
-        0x1300004c,
-        0x12000048,
-        0x11000044,
-        0x10000040,
-};
-
-static const u8 cckswing_table_ch1ch13[CCK_TABLE_SIZE][8] = {
-        {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04},
-        {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04},
-        {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},
-        {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03},
-        {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},
-        {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03},
-        {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},
-        {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03},
-        {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},
-        {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02},
-        {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},
-        {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02},
-        {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},
-        {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02},
-        {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},
-        {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02},
-        {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},
-        {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02},
-        {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},
-        {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
-        {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
-        {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01},
-        {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01},
-        {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01},
-        {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01},
-        {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01},
-        {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01},
-        {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01},
-        {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01},
-        {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01},
-        {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01},
-        {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01},
-        {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}
-};
-
-static const u8 cckswing_table_ch14[CCK_TABLE_SIZE][8] = {
-        {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00},
-        {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00},
-        {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},
-        {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00},
-        {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},
-        {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00},
-        {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},
-        {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00},
-        {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},
-        {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00},
-        {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},
-        {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00},
-        {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},
-        {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00},
-        {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},
-        {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00},
-        {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},
-        {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00},
-        {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},
-        {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
-        {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
-        {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00},
-        {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00},
-        {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},
-        {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},
-        {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00},
-        {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},
-        {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},
-        {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},
-        {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},
-        {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},
-        {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},
-        {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}
-};
-
-static void rtl92c_dm_diginit(struct ieee80211_hw *hw)
-{
-        dm_digtable.dig_enable_flag = true;
-        dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
-        dm_digtable.cur_igvalue = 0x20;
-        dm_digtable.pre_igvalue = 0x0;
-        dm_digtable.cursta_connectctate = DIG_STA_DISCONNECT;
-        dm_digtable.presta_connectstate = DIG_STA_DISCONNECT;
-        dm_digtable.curmultista_connectstate = DIG_MULTISTA_DISCONNECT;
-        dm_digtable.rssi_lowthresh = DM_DIG_THRESH_LOW;
-        dm_digtable.rssi_highthresh = DM_DIG_THRESH_HIGH;
-        dm_digtable.fa_lowthresh = DM_FALSEALARM_THRESH_LOW;
-        dm_digtable.fa_highthresh = DM_FALSEALARM_THRESH_HIGH;
-        dm_digtable.rx_gain_range_max = DM_DIG_MAX;
-        dm_digtable.rx_gain_range_min = DM_DIG_MIN;
-        dm_digtable.backoff_val = DM_DIG_BACKOFF_DEFAULT;
-        dm_digtable.backoff_val_range_max = DM_DIG_BACKOFF_MAX;
-        dm_digtable.backoff_val_range_min = DM_DIG_BACKOFF_MIN;
-        dm_digtable.pre_cck_pd_state = CCK_PD_STAGE_MAX;
-        dm_digtable.cur_cck_pd_state = CCK_PD_STAGE_MAX;
-}
-
-static u8 rtl92c_dm_initial_gain_min_pwdb(struct ieee80211_hw *hw)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        long rssi_val_min = 0;
-
-        if ((dm_digtable.curmultista_connectstate == DIG_MULTISTA_CONNECT) &&
-            (dm_digtable.cursta_connectctate == DIG_STA_CONNECT)) {
-                if (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb != 0)
-                        rssi_val_min =
-                            (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb >
-                             rtlpriv->dm.undecorated_smoothed_pwdb) ?
-                            rtlpriv->dm.undecorated_smoothed_pwdb :
-                            rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
-                else
-                        rssi_val_min = rtlpriv->dm.undecorated_smoothed_pwdb;
-        } else if (dm_digtable.cursta_connectctate == DIG_STA_CONNECT ||
-                   dm_digtable.cursta_connectctate == DIG_STA_BEFORE_CONNECT) {
-                rssi_val_min = rtlpriv->dm.undecorated_smoothed_pwdb;
-        } else if (dm_digtable.curmultista_connectstate ==
-                   DIG_MULTISTA_CONNECT) {
-                rssi_val_min = rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
-        }
-
-        return (u8) rssi_val_min;
-}
-
-static void rtl92c_dm_false_alarm_counter_statistics(struct ieee80211_hw *hw)
-{
-        u32 ret_value;
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt);
-
-        ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER1, MASKDWORD);
-        falsealm_cnt->cnt_parity_fail = ((ret_value & 0xffff0000) >> 16);
-
-        ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER2, MASKDWORD);
-        falsealm_cnt->cnt_rate_illegal = (ret_value & 0xffff);
-        falsealm_cnt->cnt_crc8_fail = ((ret_value & 0xffff0000) >> 16);
-
-        ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER3, MASKDWORD);
-        falsealm_cnt->cnt_mcs_fail = (ret_value & 0xffff);
-        falsealm_cnt->cnt_ofdm_fail = falsealm_cnt->cnt_parity_fail +
-            falsealm_cnt->cnt_rate_illegal +
-            falsealm_cnt->cnt_crc8_fail + falsealm_cnt->cnt_mcs_fail;
-
-        rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, BIT(14), 1);
-        ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERLOWER, MASKBYTE0);
-        falsealm_cnt->cnt_cck_fail = ret_value;
-
-        ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERUPPER, MASKBYTE3);
-        falsealm_cnt->cnt_cck_fail += (ret_value & 0xff) << 8;
-        falsealm_cnt->cnt_all = (falsealm_cnt->cnt_parity_fail +
-                                 falsealm_cnt->cnt_rate_illegal +
-                                 falsealm_cnt->cnt_crc8_fail +
-                                 falsealm_cnt->cnt_mcs_fail +
-                                 falsealm_cnt->cnt_cck_fail);
-
-        rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 1);
-        rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 0);
-        rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 0);
-        rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 2);
-
-        RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
-                 ("cnt_parity_fail = %d, cnt_rate_illegal = %d, "
-                  "cnt_crc8_fail = %d, cnt_mcs_fail = %d\n",
-                  falsealm_cnt->cnt_parity_fail,
-                  falsealm_cnt->cnt_rate_illegal,
-                  falsealm_cnt->cnt_crc8_fail, falsealm_cnt->cnt_mcs_fail));
-
-        RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
-                 ("cnt_ofdm_fail = %x, cnt_cck_fail = %x, cnt_all = %x\n",
-                  falsealm_cnt->cnt_ofdm_fail,
-                  falsealm_cnt->cnt_cck_fail, falsealm_cnt->cnt_all));
-}
-
-static void rtl92c_dm_ctrl_initgain_by_fa(struct ieee80211_hw *hw)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        u8 value_igi = dm_digtable.cur_igvalue;
-
-        if (rtlpriv->falsealm_cnt.cnt_all < DM_DIG_FA_TH0)
-                value_igi--;
-        else if (rtlpriv->falsealm_cnt.cnt_all < DM_DIG_FA_TH1)
-                value_igi += 0;
-        else if (rtlpriv->falsealm_cnt.cnt_all < DM_DIG_FA_TH2)
-                value_igi++;
-        else if (rtlpriv->falsealm_cnt.cnt_all >= DM_DIG_FA_TH2)
-                value_igi += 2;
-        if (value_igi > DM_DIG_FA_UPPER)
-                value_igi = DM_DIG_FA_UPPER;
-        else if (value_igi < DM_DIG_FA_LOWER)
-                value_igi = DM_DIG_FA_LOWER;
-        if (rtlpriv->falsealm_cnt.cnt_all > 10000)
-                value_igi = 0x32;
-
-        dm_digtable.cur_igvalue = value_igi;
-        rtl92c_dm_write_dig(hw);
-}
-
-static void rtl92c_dm_ctrl_initgain_by_rssi(struct ieee80211_hw *hw)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-
-        if (rtlpriv->falsealm_cnt.cnt_all > dm_digtable.fa_highthresh) {
-                if ((dm_digtable.backoff_val - 2) <
-                    dm_digtable.backoff_val_range_min)
-                        dm_digtable.backoff_val =
-                            dm_digtable.backoff_val_range_min;
-                else
-                        dm_digtable.backoff_val -= 2;
-        } else if (rtlpriv->falsealm_cnt.cnt_all < dm_digtable.fa_lowthresh) {
-                if ((dm_digtable.backoff_val + 2) >
-                    dm_digtable.backoff_val_range_max)
-                        dm_digtable.backoff_val =
-                            dm_digtable.backoff_val_range_max;
-                else
-                        dm_digtable.backoff_val += 2;
-        }
-
-        if ((dm_digtable.rssi_val_min + 10 - dm_digtable.backoff_val) >
-            dm_digtable.rx_gain_range_max)
-                dm_digtable.cur_igvalue = dm_digtable.rx_gain_range_max;
-        else if ((dm_digtable.rssi_val_min + 10 -
-                  dm_digtable.backoff_val) < dm_digtable.rx_gain_range_min)
-                dm_digtable.cur_igvalue = dm_digtable.rx_gain_range_min;
-        else
-                dm_digtable.cur_igvalue = dm_digtable.rssi_val_min + 10 -
-                    dm_digtable.backoff_val;
-
-        RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
-                 ("rssi_val_min = %x backoff_val %x\n",
-                  dm_digtable.rssi_val_min, dm_digtable.backoff_val));
-
-        rtl92c_dm_write_dig(hw);
-}
-
-static void rtl92c_dm_initial_gain_multi_sta(struct ieee80211_hw *hw)
-{
-        static u8 binitialized; /* initialized to false */
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
-        long rssi_strength = rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
-        bool b_multi_sta = false;
-
-        if (mac->opmode == NL80211_IFTYPE_ADHOC)
-                b_multi_sta = true;
-
-        if ((b_multi_sta == false) || (dm_digtable.cursta_connectctate !=
-                                       DIG_STA_DISCONNECT)) {
-                binitialized = false;
-                dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
-                return;
-        } else if (binitialized == false) {
-                binitialized = true;
-                dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_0;
-                dm_digtable.cur_igvalue = 0x20;
-                rtl92c_dm_write_dig(hw);
-        }
-
-        if (dm_digtable.curmultista_connectstate == DIG_MULTISTA_CONNECT) {
-                if ((rssi_strength < dm_digtable.rssi_lowthresh) &&
-                    (dm_digtable.dig_ext_port_stage != DIG_EXT_PORT_STAGE_1)) {
-
-                        if (dm_digtable.dig_ext_port_stage ==
-                            DIG_EXT_PORT_STAGE_2) {
-                                dm_digtable.cur_igvalue = 0x20;
-                                rtl92c_dm_write_dig(hw);
-                        }
-
-                        dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_1;
-                } else if (rssi_strength > dm_digtable.rssi_highthresh) {
-                        dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_2;
-                        rtl92c_dm_ctrl_initgain_by_fa(hw);
-                }
-        } else if (dm_digtable.dig_ext_port_stage != DIG_EXT_PORT_STAGE_0) {
-                dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_0;
-                dm_digtable.cur_igvalue = 0x20;
-                rtl92c_dm_write_dig(hw);
-        }
-
-        RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
-                 ("curmultista_connectstate = "
-                  "%x dig_ext_port_stage %x\n",
-                  dm_digtable.curmultista_connectstate,
-                  dm_digtable.dig_ext_port_stage));
-}
-
-static void rtl92c_dm_initial_gain_sta(struct ieee80211_hw *hw)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-
-        RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
-                 ("presta_connectstate = %x,"
-                  " cursta_connectctate = %x\n",
-                  dm_digtable.presta_connectstate,
-                  dm_digtable.cursta_connectctate));
-
-        if (dm_digtable.presta_connectstate == dm_digtable.cursta_connectctate
-            || dm_digtable.cursta_connectctate == DIG_STA_BEFORE_CONNECT
-            || dm_digtable.cursta_connectctate == DIG_STA_CONNECT) {
-
-                if (dm_digtable.cursta_connectctate != DIG_STA_DISCONNECT) {
-                        dm_digtable.rssi_val_min =
-                            rtl92c_dm_initial_gain_min_pwdb(hw);
-                        rtl92c_dm_ctrl_initgain_by_rssi(hw);
-                }
-        } else {
-                dm_digtable.rssi_val_min = 0;
-                dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
-                dm_digtable.backoff_val = DM_DIG_BACKOFF_DEFAULT;
-                dm_digtable.cur_igvalue = 0x20;
-                dm_digtable.pre_igvalue = 0;
-                rtl92c_dm_write_dig(hw);
-        }
-}
-
-static void rtl92c_dm_cck_packet_detection_thresh(struct ieee80211_hw *hw)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
-
-        if (dm_digtable.cursta_connectctate == DIG_STA_CONNECT) {
-                dm_digtable.rssi_val_min = rtl92c_dm_initial_gain_min_pwdb(hw);
-
-                if (dm_digtable.pre_cck_pd_state == CCK_PD_STAGE_LowRssi) {
-                        if (dm_digtable.rssi_val_min <= 25)
-                                dm_digtable.cur_cck_pd_state =
-                                    CCK_PD_STAGE_LowRssi;
-                        else
-                                dm_digtable.cur_cck_pd_state =
-                                    CCK_PD_STAGE_HighRssi;
-                } else {
-                        if (dm_digtable.rssi_val_min <= 20)
-                                dm_digtable.cur_cck_pd_state =
-                                    CCK_PD_STAGE_LowRssi;
-                        else
-                                dm_digtable.cur_cck_pd_state =
-                                    CCK_PD_STAGE_HighRssi;
-                }
-        } else {
-                dm_digtable.cur_cck_pd_state = CCK_PD_STAGE_MAX;
-        }
-
-        if (dm_digtable.pre_cck_pd_state != dm_digtable.cur_cck_pd_state) {
-                if (dm_digtable.cur_cck_pd_state == CCK_PD_STAGE_LowRssi) {
-                        if (rtlpriv->falsealm_cnt.cnt_cck_fail > 800)
-                                dm_digtable.cur_cck_fa_state =
-                                    CCK_FA_STAGE_High;
-                        else
-                                dm_digtable.cur_cck_fa_state = CCK_FA_STAGE_Low;
-
-                        if (dm_digtable.pre_cck_fa_state !=
-                            dm_digtable.cur_cck_fa_state) {
-                                if (dm_digtable.cur_cck_fa_state ==
-                                    CCK_FA_STAGE_Low)
-                                        rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2,
-                                                      0x83);
-                                else
-                                        rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2,
-                                                      0xcd);
-
-                                dm_digtable.pre_cck_fa_state =
-                                    dm_digtable.cur_cck_fa_state;
-                        }
-
-                        rtl_set_bbreg(hw, RCCK0_SYSTEM, MASKBYTE1, 0x40);
-
-                        if (IS_92C_SERIAL(rtlhal->version))
-                                rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT,
-                                              MASKBYTE2, 0xd7);
-                } else {
-                        rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2, 0xcd);
-                        rtl_set_bbreg(hw, RCCK0_SYSTEM, MASKBYTE1, 0x47);
-
-                        if (IS_92C_SERIAL(rtlhal->version))
-                                rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT,
-                                              MASKBYTE2, 0xd3);
-                }
-                dm_digtable.pre_cck_pd_state = dm_digtable.cur_cck_pd_state;
-        }
-
-        RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
-                 ("CCKPDStage=%x\n", dm_digtable.cur_cck_pd_state));
-
-        RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
-                 ("is92C=%x\n", IS_92C_SERIAL(rtlhal->version)));
-}
-
-static void rtl92c_dm_ctrl_initgain_by_twoport(struct ieee80211_hw *hw)
-{
-        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
-
-        if (mac->act_scanning == true)
-                return;
-
-        if ((mac->link_state > MAC80211_NOLINK) &&
-            (mac->link_state < MAC80211_LINKED))
-                dm_digtable.cursta_connectctate = DIG_STA_BEFORE_CONNECT;
-        else if (mac->link_state >= MAC80211_LINKED)
-                dm_digtable.cursta_connectctate = DIG_STA_CONNECT;
-        else
-                dm_digtable.cursta_connectctate = DIG_STA_DISCONNECT;
-
-        rtl92c_dm_initial_gain_sta(hw);
-        rtl92c_dm_initial_gain_multi_sta(hw);
-        rtl92c_dm_cck_packet_detection_thresh(hw);
-
-        dm_digtable.presta_connectstate = dm_digtable.cursta_connectctate;
-
-}
-
-static void rtl92c_dm_dig(struct ieee80211_hw *hw)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-
-        if (rtlpriv->dm.b_dm_initialgain_enable == false)
-                return;
-        if (dm_digtable.dig_enable_flag == false)
-                return;
-
-        rtl92c_dm_ctrl_initgain_by_twoport(hw);
-
-}
-
-static void rtl92c_dm_init_dynamic_txpower(struct ieee80211_hw *hw)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-
-        rtlpriv->dm.bdynamic_txpower_enable = false;
-
-        rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
-        rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
-}
-
-static void rtl92c_dm_dynamic_txpower(struct ieee80211_hw *hw)
+void rtl92c_dm_dynamic_txpower(struct ieee80211_hw *hw)
 {
         struct rtl_priv *rtlpriv = rtl_priv(hw);
         struct rtl_phy *rtlphy = &(rtlpriv->phy);
         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
         long undecorated_smoothed_pwdb;
 
-        if (!rtlpriv->dm.bdynamic_txpower_enable)
+        if (!rtlpriv->dm.dynamic_txpower_enable)
                 return;
 
         if (rtlpriv->dm.dm_flag & HAL_DM_HIPWR_DISABLE) {
@@ -584,890 +115,4 @@ static void rtl92c_dm_dynamic_txpower(struct ieee80211_hw *hw)
         rtlpriv->dm.last_dtp_lvl = rtlpriv->dm.dynamic_txhighpower_lvl;
 }
 
-void rtl92c_dm_write_dig(struct ieee80211_hw *hw)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-
-        RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
-                 ("cur_igvalue = 0x%x, "
-                  "pre_igvalue = 0x%x, backoff_val = %d\n",
-                  dm_digtable.cur_igvalue, dm_digtable.pre_igvalue,
-                  dm_digtable.backoff_val));
-
-        if (dm_digtable.pre_igvalue != dm_digtable.cur_igvalue) {
-                rtl_set_bbreg(hw, ROFDM0_XAAGCCORE1, 0x7f,
-                              dm_digtable.cur_igvalue);
-                rtl_set_bbreg(hw, ROFDM0_XBAGCCORE1, 0x7f,
-                              dm_digtable.cur_igvalue);
-
-                dm_digtable.pre_igvalue = dm_digtable.cur_igvalue;
-        }
-}
-
-static void rtl92c_dm_pwdb_monitor(struct ieee80211_hw *hw)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        long tmpentry_max_pwdb = 0, tmpentry_min_pwdb = 0xff;
-
-        u8 h2c_parameter[3] = { 0 };
-
-        return;
-
-        if (tmpentry_max_pwdb != 0) {
-                rtlpriv->dm.entry_max_undecoratedsmoothed_pwdb =
-                    tmpentry_max_pwdb;
-        } else {
-                rtlpriv->dm.entry_max_undecoratedsmoothed_pwdb = 0;
-        }
-
-        if (tmpentry_min_pwdb != 0xff) {
-                rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb =
-                    tmpentry_min_pwdb;
-        } else {
-                rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb = 0;
-        }
-
-        h2c_parameter[2] = (u8) (rtlpriv->dm.undecorated_smoothed_pwdb & 0xFF);
-        h2c_parameter[0] = 0;
-
-        rtl92c_fill_h2c_cmd(hw, H2C_RSSI_REPORT, 3, h2c_parameter);
-}
-
-void rtl92c_dm_init_edca_turbo(struct ieee80211_hw *hw)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        rtlpriv->dm.bcurrent_turbo_edca = false;
-        rtlpriv->dm.bis_any_nonbepkts = false;
-        rtlpriv->dm.bis_cur_rdlstate = false;
-}
-
-static void rtl92c_dm_check_edca_turbo(struct ieee80211_hw *hw)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
-        static u64 last_txok_cnt;
-        static u64 last_rxok_cnt;
-        u64 cur_txok_cnt;
-        u64 cur_rxok_cnt;
-        u32 edca_be_ul = 0x5ea42b;
-        u32 edca_be_dl = 0x5ea42b;
-
-        if (mac->opmode == NL80211_IFTYPE_ADHOC)
-                goto dm_checkedcaturbo_exit;
-
-        if (mac->link_state != MAC80211_LINKED) {
-                rtlpriv->dm.bcurrent_turbo_edca = false;
-                return;
-        }
-
-        if (!mac->ht_enable) {  /*FIX MERGE */
-                if (!(edca_be_ul & 0xffff0000))
-                        edca_be_ul |= 0x005e0000;
-
-                if (!(edca_be_dl & 0xffff0000))
-                        edca_be_dl |= 0x005e0000;
-        }
-
-        if ((!rtlpriv->dm.bis_any_nonbepkts) &&
-            (!rtlpriv->dm.b_disable_framebursting)) {
-                cur_txok_cnt = rtlpriv->stats.txbytesunicast - last_txok_cnt;
-                cur_rxok_cnt = rtlpriv->stats.rxbytesunicast - last_rxok_cnt;
-                if (cur_rxok_cnt > 4 * cur_txok_cnt) {
-                        if (!rtlpriv->dm.bis_cur_rdlstate ||
-                            !rtlpriv->dm.bcurrent_turbo_edca) {
-                                rtl_write_dword(rtlpriv,
-                                                REG_EDCA_BE_PARAM,
-                                                edca_be_dl);
-                                rtlpriv->dm.bis_cur_rdlstate = true;
-                        }
-                } else {
-                        if (rtlpriv->dm.bis_cur_rdlstate ||
-                            !rtlpriv->dm.bcurrent_turbo_edca) {
-                                rtl_write_dword(rtlpriv,
-                                                REG_EDCA_BE_PARAM,
-                                                edca_be_ul);
-                                rtlpriv->dm.bis_cur_rdlstate = false;
-                        }
-                }
-                rtlpriv->dm.bcurrent_turbo_edca = true;
-        } else {
-                if (rtlpriv->dm.bcurrent_turbo_edca) {
-                        u8 tmp = AC0_BE;
-                        rtlpriv->cfg->ops->set_hw_reg(hw,
-                                                      HW_VAR_AC_PARAM,
-                                                      (u8 *) (&tmp));
-                        rtlpriv->dm.bcurrent_turbo_edca = false;
-                }
-        }
-
-dm_checkedcaturbo_exit:
-        rtlpriv->dm.bis_any_nonbepkts = false;
-        last_txok_cnt = rtlpriv->stats.txbytesunicast;
-        last_rxok_cnt = rtlpriv->stats.rxbytesunicast;
-}
-
-static void rtl92c_dm_txpower_tracking_callback_thermalmeter(struct ieee80211_hw
-                                                             *hw)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
-        struct rtl_phy *rtlphy = &(rtlpriv->phy);
-        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
-        u8 thermalvalue, delta, delta_lck, delta_iqk;
-        long ele_a, ele_d, temp_cck, val_x, value32;
-        long val_y, ele_c;
-        u8 ofdm_index[2], cck_index, ofdm_index_old[2], cck_index_old;
-        int i;
-        bool is2t = IS_92C_SERIAL(rtlhal->version);
-        u8 txpwr_level[2] = {0, 0};
-        u8 ofdm_min_index = 6, rf;
-
-        rtlpriv->dm.btxpower_trackingInit = true;
-        RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
-                 ("rtl92c_dm_txpower_tracking_callback_thermalmeter\n"));
-
-        thermalvalue = (u8) rtl_get_rfreg(hw, RF90_PATH_A, RF_T_METER, 0x1f);
-
-        RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
-                 ("Readback Thermal Meter = 0x%x pre thermal meter 0x%x "
-                  "eeprom_thermalmeter 0x%x\n",
-                  thermalvalue, rtlpriv->dm.thermalvalue,
-                  rtlefuse->eeprom_thermalmeter));
-
-        rtl92c_phy_ap_calibrate(hw, (thermalvalue -
-                                     rtlefuse->eeprom_thermalmeter));
-        if (is2t)
-                rf = 2;
-        else
-                rf = 1;
-
-        if (thermalvalue) {
-                ele_d = rtl_get_bbreg(hw, ROFDM0_XATXIQIMBALANCE,
-                                      MASKDWORD) & MASKOFDM_D;
-
-                for (i = 0; i < OFDM_TABLE_LENGTH; i++) {
-                        if (ele_d == (ofdmswing_table[i] & MASKOFDM_D)) {
-                                ofdm_index_old[0] = (u8) i;
-
-                                RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
-                                        ("Initial pathA ele_d reg0x%x = 0x%lx, "
-                                         "ofdm_index=0x%x\n",
-                                         ROFDM0_XATXIQIMBALANCE,
-                                         ele_d, ofdm_index_old[0]));
-                                break;
-                        }
-                }
-
-                if (is2t) {
-                        ele_d = rtl_get_bbreg(hw, ROFDM0_XBTXIQIMBALANCE,
-                                              MASKDWORD) & MASKOFDM_D;
-
-                        for (i = 0; i < OFDM_TABLE_LENGTH; i++) {
-                                if (ele_d == (ofdmswing_table[i] & MASKOFDM_D)) {
-                                        ofdm_index_old[1] = (u8) i;
-
-                                        RT_TRACE(rtlpriv, COMP_POWER_TRACKING,
-                                           DBG_LOUD,
-                                           ("Initial pathB ele_d reg0x%x = "
-                                           "0x%lx, ofdm_index=0x%x\n",
-                                           ROFDM0_XBTXIQIMBALANCE, ele_d,
-                                           ofdm_index_old[1]));
-                                        break;
-                                }
-                        }
-                }
-
-                temp_cck =
-                    rtl_get_bbreg(hw, RCCK0_TXFILTER2, MASKDWORD) & MASKCCK;
-
-                for (i = 0; i < CCK_TABLE_LENGTH; i++) {
-                        if (rtlpriv->dm.b_cck_inch14) {
-                                if (memcmp((void *)&temp_cck,
-                                           (void *)&cckswing_table_ch14[i][2],
-                                           4) == 0) {
-                                        cck_index_old = (u8) i;
-
-                                        RT_TRACE(rtlpriv, COMP_POWER_TRACKING,
-                                                 DBG_LOUD,
-                                                 ("Initial reg0x%x = 0x%lx, "
-                                                  "cck_index=0x%x, ch 14 %d\n",
-                                                  RCCK0_TXFILTER2, temp_cck,
-                                                  cck_index_old,
-                                                  rtlpriv->dm.b_cck_inch14));
-                                        break;
-                                }
-                        } else {
-                                if (memcmp((void *)&temp_cck,
-                                           (void *)
-                                           &cckswing_table_ch1ch13[i][2],
-                                           4) == 0) {
-                                        cck_index_old = (u8) i;
 
-                                        RT_TRACE(rtlpriv, COMP_POWER_TRACKING,
-                                                 DBG_LOUD,
-                                                 ("Initial reg0x%x = 0x%lx, "
-                                                  "cck_index=0x%x, ch14 %d\n",
-                                                  RCCK0_TXFILTER2, temp_cck,
-                                                  cck_index_old,
-                                                  rtlpriv->dm.b_cck_inch14));
-                                        break;
-                                }
-                        }
-                }
-
-                if (!rtlpriv->dm.thermalvalue) {
-                        rtlpriv->dm.thermalvalue =
-                            rtlefuse->eeprom_thermalmeter;
-                        rtlpriv->dm.thermalvalue_lck = thermalvalue;
-                        rtlpriv->dm.thermalvalue_iqk = thermalvalue;
-                        for (i = 0; i < rf; i++)
-                                rtlpriv->dm.ofdm_index[i] = ofdm_index_old[i];
-                        rtlpriv->dm.cck_index = cck_index_old;
-                }
-
-                delta = (thermalvalue > rtlpriv->dm.thermalvalue) ?
-                    (thermalvalue - rtlpriv->dm.thermalvalue) :
-                    (rtlpriv->dm.thermalvalue - thermalvalue);
-
-                delta_lck = (thermalvalue > rtlpriv->dm.thermalvalue_lck) ?
-                    (thermalvalue - rtlpriv->dm.thermalvalue_lck) :
-                    (rtlpriv->dm.thermalvalue_lck - thermalvalue);
-
-                delta_iqk = (thermalvalue > rtlpriv->dm.thermalvalue_iqk) ?
-                    (thermalvalue - rtlpriv->dm.thermalvalue_iqk) :
-                    (rtlpriv->dm.thermalvalue_iqk - thermalvalue);
-
-                RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
-                        ("Readback Thermal Meter = 0x%x pre thermal meter 0x%x "
-                         "eeprom_thermalmeter 0x%x delta 0x%x "
-                         "delta_lck 0x%x delta_iqk 0x%x\n",
-                         thermalvalue, rtlpriv->dm.thermalvalue,
-                         rtlefuse->eeprom_thermalmeter, delta, delta_lck,
-                         delta_iqk));
-
-                if (delta_lck > 1) {
-                        rtlpriv->dm.thermalvalue_lck = thermalvalue;
-                        rtl92c_phy_lc_calibrate(hw);
-                }
-
-                if (delta > 0 && rtlpriv->dm.txpower_track_control) {
-                        if (thermalvalue > rtlpriv->dm.thermalvalue) {
-                                for (i = 0; i < rf; i++)
-                                        rtlpriv->dm.ofdm_index[i] -= delta;
-                                rtlpriv->dm.cck_index -= delta;
-                        } else {
-                                for (i = 0; i < rf; i++)
-                                        rtlpriv->dm.ofdm_index[i] += delta;
-                                rtlpriv->dm.cck_index += delta;
-                        }
-
-                        if (is2t) {
-                                RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
-                                         ("temp OFDM_A_index=0x%x, "
-                                          "OFDM_B_index=0x%x,"
-                                          "cck_index=0x%x\n",
-                                          rtlpriv->dm.ofdm_index[0],
-                                          rtlpriv->dm.ofdm_index[1],
-                                          rtlpriv->dm.cck_index));
-                        } else {
-                                RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
-                                         ("temp OFDM_A_index=0x%x,"
-                                          "cck_index=0x%x\n",
-                                          rtlpriv->dm.ofdm_index[0],
-                                          rtlpriv->dm.cck_index));
-                        }
-
-                        if (thermalvalue > rtlefuse->eeprom_thermalmeter) {
-                                for (i = 0; i < rf; i++)
-                                        ofdm_index[i] =
-                                            rtlpriv->dm.ofdm_index[i]
-                                            + 1;
-                                cck_index = rtlpriv->dm.cck_index + 1;
-                        } else {
-                                for (i = 0; i < rf; i++)
-                                        ofdm_index[i] =
-                                            rtlpriv->dm.ofdm_index[i];
-                                cck_index = rtlpriv->dm.cck_index;
-                        }
-
-                        for (i = 0; i < rf; i++) {
-                                if (txpwr_level[i] >= 0 &&
-                                    txpwr_level[i] <= 26) {
-                                        if (thermalvalue >
-                                            rtlefuse->eeprom_thermalmeter) {
-                                                if (delta < 5)
-                                                        ofdm_index[i] -= 1;
-
-                                                else
-                                                        ofdm_index[i] -= 2;
-                                        } else if (delta > 5 && thermalvalue <
-                                                   rtlefuse->
-                                                   eeprom_thermalmeter) {
-                                                ofdm_index[i] += 1;
-                                        }
-                                } else if (txpwr_level[i] >= 27 &&
-                                           txpwr_level[i] <= 32
-                                           && thermalvalue >
-                                           rtlefuse->eeprom_thermalmeter) {
-                                        if (delta < 5)
-                                                ofdm_index[i] -= 1;
-
-                                        else
-                                                ofdm_index[i] -= 2;
-                                } else if (txpwr_level[i] >= 32 &&
-                                           txpwr_level[i] <= 38 &&
-                                           thermalvalue >
-                                           rtlefuse->eeprom_thermalmeter
-                                           && delta > 5) {
-                                        ofdm_index[i] -= 1;
-                                }
-                        }
-
-                        if (txpwr_level[i] >= 0 && txpwr_level[i] <= 26) {
-                                if (thermalvalue >
-                                    rtlefuse->eeprom_thermalmeter) {
-                                        if (delta < 5)
-                                                cck_index -= 1;
-
-                                        else
-                                                cck_index -= 2;
-                                } else if (delta > 5 && thermalvalue <
-                                           rtlefuse->eeprom_thermalmeter) {
-                                        cck_index += 1;
-                                }
-                        } else if (txpwr_level[i] >= 27 &&
-                                   txpwr_level[i] <= 32 &&
-                                   thermalvalue >
-                                   rtlefuse->eeprom_thermalmeter) {
-                                if (delta < 5)
-                                        cck_index -= 1;
-
-                                else
-                                        cck_index -= 2;
-                        } else if (txpwr_level[i] >= 32 &&
-                                   txpwr_level[i] <= 38 &&
-                                   thermalvalue > rtlefuse->eeprom_thermalmeter
-                                   && delta > 5) {
-                                cck_index -= 1;
-                        }
-
-                        for (i = 0; i < rf; i++) {
-                                if (ofdm_index[i] > OFDM_TABLE_SIZE - 1)
-                                        ofdm_index[i] = OFDM_TABLE_SIZE - 1;
-
-                                else if (ofdm_index[i] < ofdm_min_index)
-                                        ofdm_index[i] = ofdm_min_index;
-                        }
-
-                        if (cck_index > CCK_TABLE_SIZE - 1)
-                                cck_index = CCK_TABLE_SIZE - 1;
-                        else if (cck_index < 0)
-                                cck_index = 0;
-
-                        if (is2t) {
-                                RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
-                                         ("new OFDM_A_index=0x%x, "
-                                          "OFDM_B_index=0x%x,"
-                                          "cck_index=0x%x\n",
-                                          ofdm_index[0], ofdm_index[1],
-                                          cck_index));
-                        } else {
-                                RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
-                                         ("new OFDM_A_index=0x%x,"
-                                          "cck_index=0x%x\n",
-                                          ofdm_index[0], cck_index));
-                        }
-                }
-
-                if (rtlpriv->dm.txpower_track_control && delta != 0) {
-                        ele_d =
-                            (ofdmswing_table[ofdm_index[0]] & 0xFFC00000) >> 22;
-                        val_x = rtlphy->reg_e94;
-                        val_y = rtlphy->reg_e9c;
-
-                        if (val_x != 0) {
-                                if ((val_x & 0x00000200) != 0)
-                                        val_x = val_x | 0xFFFFFC00;
-                                ele_a = ((val_x * ele_d) >> 8) & 0x000003FF;
-
-                                if ((val_y & 0x00000200) != 0)
-                                        val_y = val_y | 0xFFFFFC00;
-                                ele_c = ((val_y * ele_d) >> 8) & 0x000003FF;
-
-                                value32 = (ele_d << 22) |
-                                    ((ele_c & 0x3F) << 16) | ele_a;
-
-                                rtl_set_bbreg(hw, ROFDM0_XATXIQIMBALANCE,
-                                              MASKDWORD, value32);
-
-                                value32 = (ele_c & 0x000003C0) >> 6;
-                                rtl_set_bbreg(hw, ROFDM0_XCTXAFE, MASKH4BITS,
-                                              value32);
-
-                                value32 = ((val_x * ele_d) >> 7) & 0x01;
-                                rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
-                                              BIT(31), value32);
-
-                                value32 = ((val_y * ele_d) >> 7) & 0x01;
-                                rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
-                                              BIT(29), value32);
-                        } else {
-                                rtl_set_bbreg(hw, ROFDM0_XATXIQIMBALANCE,
-                                              MASKDWORD,
-                                              ofdmswing_table[ofdm_index[0]]);
-
-                                rtl_set_bbreg(hw, ROFDM0_XCTXAFE, MASKH4BITS,
-                                              0x00);
-                                rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
-                                              BIT(31) | BIT(29), 0x00);
-                        }
-
-                        if (!rtlpriv->dm.b_cck_inch14) {
-                                rtl_write_byte(rtlpriv, 0xa22,
-                                               cckswing_table_ch1ch13[cck_index]
-                                               [0]);
-                                rtl_write_byte(rtlpriv, 0xa23,
-                                               cckswing_table_ch1ch13[cck_index]
-                                               [1]);
-                                rtl_write_byte(rtlpriv, 0xa24,
-                                               cckswing_table_ch1ch13[cck_index]
-                                               [2]);
-                                rtl_write_byte(rtlpriv, 0xa25,
-                                               cckswing_table_ch1ch13[cck_index]
-                                               [3]);
-                                rtl_write_byte(rtlpriv, 0xa26,
-                                               cckswing_table_ch1ch13[cck_index]
-                                               [4]);
-                                rtl_write_byte(rtlpriv, 0xa27,
-                                               cckswing_table_ch1ch13[cck_index]
-                                               [5]);
-                                rtl_write_byte(rtlpriv, 0xa28,
-                                               cckswing_table_ch1ch13[cck_index]
-                                               [6]);
-                                rtl_write_byte(rtlpriv, 0xa29,
-                                               cckswing_table_ch1ch13[cck_index]
-                                               [7]);
-                        } else {
-                                rtl_write_byte(rtlpriv, 0xa22,
-                                               cckswing_table_ch14[cck_index]
-                                               [0]);
-                                rtl_write_byte(rtlpriv, 0xa23,
-                                               cckswing_table_ch14[cck_index]
-                                               [1]);
-                                rtl_write_byte(rtlpriv, 0xa24,
-                                               cckswing_table_ch14[cck_index]
-                                               [2]);
-                                rtl_write_byte(rtlpriv, 0xa25,
-                                               cckswing_table_ch14[cck_index]
-                                               [3]);
-                                rtl_write_byte(rtlpriv, 0xa26,
-                                               cckswing_table_ch14[cck_index]
-                                               [4]);
-                                rtl_write_byte(rtlpriv, 0xa27,
-                                               cckswing_table_ch14[cck_index]
-                                               [5]);
-                                rtl_write_byte(rtlpriv, 0xa28,
-                                               cckswing_table_ch14[cck_index]
-                                               [6]);
-                                rtl_write_byte(rtlpriv, 0xa29,
-                                               cckswing_table_ch14[cck_index]
-                                               [7]);
-                        }
-
-                        if (is2t) {
-                                ele_d = (ofdmswing_table[ofdm_index[1]] &
-                                         0xFFC00000) >> 22;
-
-                                val_x = rtlphy->reg_eb4;
-                                val_y = rtlphy->reg_ebc;
-
-                                if (val_x != 0) {
-                                        if ((val_x & 0x00000200) != 0)
-                                                val_x = val_x | 0xFFFFFC00;
-                                        ele_a = ((val_x * ele_d) >> 8) &
-                                            0x000003FF;
-
-                                        if ((val_y & 0x00000200) != 0)
-                                                val_y = val_y | 0xFFFFFC00;
-                                        ele_c = ((val_y * ele_d) >> 8) &
-                                            0x00003FF;
-
-                                        value32 = (ele_d << 22) |
-                                            ((ele_c & 0x3F) << 16) | ele_a;
-                                        rtl_set_bbreg(hw,
-                                                      ROFDM0_XBTXIQIMBALANCE,
-                                                      MASKDWORD, value32);
-
-                                        value32 = (ele_c & 0x000003C0) >> 6;
-                                        rtl_set_bbreg(hw, ROFDM0_XDTXAFE,
-                                                      MASKH4BITS, value32);
-
-                                        value32 = ((val_x * ele_d) >> 7) & 0x01;
-                                        rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
-                                                      BIT(27), value32);
-
-                                        value32 = ((val_y * ele_d) >> 7) & 0x01;
-                                        rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
-                                                      BIT(25), value32);
-                                } else {
-                                        rtl_set_bbreg(hw,
-                                                      ROFDM0_XBTXIQIMBALANCE,
-                                                      MASKDWORD,
-                                                      ofdmswing_table[ofdm_index
-                                                                      [1]]);
-                                        rtl_set_bbreg(hw, ROFDM0_XDTXAFE,
-                                                      MASKH4BITS, 0x00);
-                                        rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
-                                                      BIT(27) | BIT(25), 0x00);
-                                }
-
-                        }
-                }
-
-                if (delta_iqk > 3) {
-                        rtlpriv->dm.thermalvalue_iqk = thermalvalue;
-                        rtl92c_phy_iq_calibrate(hw, false);
-                }
-
-                if (rtlpriv->dm.txpower_track_control)
-                        rtlpriv->dm.thermalvalue = thermalvalue;
-        }
-
-        RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, ("<===\n"));
-
-}
-
-static void rtl92c_dm_initialize_txpower_tracking_thermalmeter(
-                                                struct ieee80211_hw *hw)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-
-        rtlpriv->dm.btxpower_tracking = true;
-        rtlpriv->dm.btxpower_trackingInit = false;
-
-        RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
-                 ("pMgntInfo->btxpower_tracking = %d\n",
-                  rtlpriv->dm.btxpower_tracking));
-}
-
-static void rtl92c_dm_initialize_txpower_tracking(struct ieee80211_hw *hw)
-{
-        rtl92c_dm_initialize_txpower_tracking_thermalmeter(hw);
-}
-
-static void rtl92c_dm_txpower_tracking_directcall(struct ieee80211_hw *hw)
-{
-        rtl92c_dm_txpower_tracking_callback_thermalmeter(hw);
-}
-
-static void rtl92c_dm_check_txpower_tracking_thermal_meter(
-                                                struct ieee80211_hw *hw)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        static u8 tm_trigger;
-
-        if (!rtlpriv->dm.btxpower_tracking)
-                return;
-
-        if (!tm_trigger) {
-                rtl_set_rfreg(hw, RF90_PATH_A, RF_T_METER, RFREG_OFFSET_MASK,
-                              0x60);
-                RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
-                         ("Trigger 92S Thermal Meter!!\n"));
-                tm_trigger = 1;
-                return;
-        } else {
-                RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
-                         ("Schedule TxPowerTracking direct call!!\n"));
-                rtl92c_dm_txpower_tracking_directcall(hw);
-                tm_trigger = 0;
-        }
-}
-
-void rtl92c_dm_check_txpower_tracking(struct ieee80211_hw *hw)
-{
-        rtl92c_dm_check_txpower_tracking_thermal_meter(hw);
-}
-
-void rtl92c_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        struct rate_adaptive *p_ra = &(rtlpriv->ra);
-
-        p_ra->ratr_state = DM_RATR_STA_INIT;
-        p_ra->pre_ratr_state = DM_RATR_STA_INIT;
-
-        if (rtlpriv->dm.dm_type == DM_TYPE_BYDRIVER)
-                rtlpriv->dm.b_useramask = true;
-        else
-                rtlpriv->dm.b_useramask = false;
-
-}
-
-static void rtl92c_dm_refresh_rate_adaptive_mask(struct ieee80211_hw *hw)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
-        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
-        struct rate_adaptive *p_ra = &(rtlpriv->ra);
-        u32 low_rssithresh_for_ra, high_rssithresh_for_ra;
-
-        if (is_hal_stop(rtlhal)) {
-                RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
-                         ("<---- driver is going to unload\n"));
-                return;
-        }
-
-        if (!rtlpriv->dm.b_useramask) {
-                RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
-                        ("<---- driver does not control rate adaptive mask\n"));
-                return;
-        }
-
-        if (mac->link_state == MAC80211_LINKED) {
-
-                switch (p_ra->pre_ratr_state) {
-                case DM_RATR_STA_HIGH:
-                        high_rssithresh_for_ra = 50;
-                        low_rssithresh_for_ra = 20;
-                        break;
-                case DM_RATR_STA_MIDDLE:
-                        high_rssithresh_for_ra = 55;
-                        low_rssithresh_for_ra = 20;
-                        break;
-                case DM_RATR_STA_LOW:
-                        high_rssithresh_for_ra = 50;
-                        low_rssithresh_for_ra = 25;
-                        break;
-                default:
-                        high_rssithresh_for_ra = 50;
-                        low_rssithresh_for_ra = 20;
-                        break;
-                }
-
-                if (rtlpriv->dm.undecorated_smoothed_pwdb >
-                    (long)high_rssithresh_for_ra)
-                        p_ra->ratr_state = DM_RATR_STA_HIGH;
-                else if (rtlpriv->dm.undecorated_smoothed_pwdb >
-                         (long)low_rssithresh_for_ra)
-                        p_ra->ratr_state = DM_RATR_STA_MIDDLE;
-                else
-                        p_ra->ratr_state = DM_RATR_STA_LOW;
-
-                if (p_ra->pre_ratr_state != p_ra->ratr_state) {
-                        RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
-                                 ("RSSI = %ld\n",
-                                  rtlpriv->dm.undecorated_smoothed_pwdb));
-                        RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
-                                 ("RSSI_LEVEL = %d\n", p_ra->ratr_state));
-                        RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
-                                 ("PreState = %d, CurState = %d\n",
-                                  p_ra->pre_ratr_state, p_ra->ratr_state));
-
-                        rtlpriv->cfg->ops->update_rate_mask(hw,
-                                        p_ra->ratr_state);
-
-                        p_ra->pre_ratr_state = p_ra->ratr_state;
-                }
-        }
-}
-
-static void rtl92c_dm_init_dynamic_bb_powersaving(struct ieee80211_hw *hw)
-{
-        dm_pstable.pre_ccastate = CCA_MAX;
-        dm_pstable.cur_ccasate = CCA_MAX;
-        dm_pstable.pre_rfstate = RF_MAX;
-        dm_pstable.cur_rfstate = RF_MAX;
-        dm_pstable.rssi_val_min = 0;
-}
-
-static void rtl92c_dm_1r_cca(struct ieee80211_hw *hw)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        struct rtl_phy *rtlphy = &(rtlpriv->phy);
-
-        if (dm_pstable.rssi_val_min != 0) {
-                if (dm_pstable.pre_ccastate == CCA_2R) {
-                        if (dm_pstable.rssi_val_min >= 35)
-                                dm_pstable.cur_ccasate = CCA_1R;
-                        else
-                                dm_pstable.cur_ccasate = CCA_2R;
-                } else {
-                        if (dm_pstable.rssi_val_min <= 30)
-                                dm_pstable.cur_ccasate = CCA_2R;
-                        else
-                                dm_pstable.cur_ccasate = CCA_1R;
-                }
-        } else {
-                dm_pstable.cur_ccasate = CCA_MAX;
-        }
-
-        if (dm_pstable.pre_ccastate != dm_pstable.cur_ccasate) {
-                if (dm_pstable.cur_ccasate == CCA_1R) {
-                        if (get_rf_type(rtlphy) == RF_2T2R) {
-                                rtl_set_bbreg(hw, ROFDM0_TRXPATHENABLE,
-                                              MASKBYTE0, 0x13);
-                                rtl_set_bbreg(hw, 0xe70, MASKBYTE3, 0x20);
-                        } else {
-                                rtl_set_bbreg(hw, ROFDM0_TRXPATHENABLE,
-                                              MASKBYTE0, 0x23);
-                                rtl_set_bbreg(hw, 0xe70, 0x7fc00000, 0x10c);
-                        }
-                } else {
-                        rtl_set_bbreg(hw, ROFDM0_TRXPATHENABLE, MASKBYTE0,
-                                      0x33);
-                        rtl_set_bbreg(hw, 0xe70, MASKBYTE3, 0x63);
-                }
-                dm_pstable.pre_ccastate = dm_pstable.cur_ccasate;
-        }
-
-        RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD, ("CCAStage = %s\n",
-                                               (dm_pstable.cur_ccasate ==
-                                                0) ? "1RCCA" : "2RCCA"));
-}
-
-void rtl92c_dm_rf_saving(struct ieee80211_hw *hw, u8 bforce_in_normal)
-{
-        static u8 initialize;
-        static u32 reg_874, reg_c70, reg_85c, reg_a74;
-
-        if (initialize == 0) {
-                reg_874 = (rtl_get_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,
-                                         MASKDWORD) & 0x1CC000) >> 14;
-
-                reg_c70 = (rtl_get_bbreg(hw, ROFDM0_AGCPARAMETER1,
-                                         MASKDWORD) & BIT(3)) >> 3;
-
-                reg_85c = (rtl_get_bbreg(hw, RFPGA0_XCD_SWITCHCONTROL,
-                                         MASKDWORD) & 0xFF000000) >> 24;
-
-                reg_a74 = (rtl_get_bbreg(hw, 0xa74, MASKDWORD) & 0xF000) >> 12;
-
-                initialize = 1;
-        }
-
-        if (!bforce_in_normal) {
-                if (dm_pstable.rssi_val_min != 0) {
-                        if (dm_pstable.pre_rfstate == RF_NORMAL) {
-                                if (dm_pstable.rssi_val_min >= 30)
-                                        dm_pstable.cur_rfstate = RF_SAVE;
-                                else
-                                        dm_pstable.cur_rfstate = RF_NORMAL;
-                        } else {
-                                if (dm_pstable.rssi_val_min <= 25)
-                                        dm_pstable.cur_rfstate = RF_NORMAL;
-                                else
-                                        dm_pstable.cur_rfstate = RF_SAVE;
-                        }
-                } else {
-                        dm_pstable.cur_rfstate = RF_MAX;
-                }
-        } else {
-                dm_pstable.cur_rfstate = RF_NORMAL;
-        }
-
-        if (dm_pstable.pre_rfstate != dm_pstable.cur_rfstate) {
-                if (dm_pstable.cur_rfstate == RF_SAVE) {
-                        rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,
-                                      0x1C0000, 0x2);
-                        rtl_set_bbreg(hw, ROFDM0_AGCPARAMETER1, BIT(3), 0);
-                        rtl_set_bbreg(hw, RFPGA0_XCD_SWITCHCONTROL,
-                                      0xFF000000, 0x63);
-                        rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,
-                                      0xC000, 0x2);
-                        rtl_set_bbreg(hw, 0xa74, 0xF000, 0x3);
-                        rtl_set_bbreg(hw, 0x818, BIT(28), 0x0);
-                        rtl_set_bbreg(hw, 0x818, BIT(28), 0x1);
-                } else {
-                        rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,
-                                      0x1CC000, reg_874);
-                        rtl_set_bbreg(hw, ROFDM0_AGCPARAMETER1, BIT(3),
-                                      reg_c70);
-                        rtl_set_bbreg(hw, RFPGA0_XCD_SWITCHCONTROL, 0xFF000000,
-                                      reg_85c);
-                        rtl_set_bbreg(hw, 0xa74, 0xF000, reg_a74);
-                        rtl_set_bbreg(hw, 0x818, BIT(28), 0x0);
-                }
-
-                dm_pstable.pre_rfstate = dm_pstable.cur_rfstate;
-        }
-}
-
-static void rtl92c_dm_dynamic_bb_powersaving(struct ieee80211_hw *hw)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
-        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
-
-        if (((mac->link_state == MAC80211_NOLINK)) &&
-            (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb == 0)) {
-                dm_pstable.rssi_val_min = 0;
-                RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD,
-                         ("Not connected to any\n"));
-        }
-
-        if (mac->link_state == MAC80211_LINKED) {
-                if (mac->opmode == NL80211_IFTYPE_ADHOC) {
-                        dm_pstable.rssi_val_min =
-                            rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
-                        RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD,
-                                 ("AP Client PWDB = 0x%lx\n",
-                                  dm_pstable.rssi_val_min));
-                } else {
-                        dm_pstable.rssi_val_min =
-                            rtlpriv->dm.undecorated_smoothed_pwdb;
-                        RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD,
-                                 ("STA Default Port PWDB = 0x%lx\n",
-                                  dm_pstable.rssi_val_min));
-                }
-        } else {
-                dm_pstable.rssi_val_min =
-                    rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
-
-                RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD,
-                         ("AP Ext Port PWDB = 0x%lx\n",
-                          dm_pstable.rssi_val_min));
-        }
-
-        if (IS_92C_SERIAL(rtlhal->version))
-                rtl92c_dm_1r_cca(hw);
-}
-
-void rtl92c_dm_init(struct ieee80211_hw *hw)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-
-        rtlpriv->dm.dm_type = DM_TYPE_BYDRIVER;
-        rtl92c_dm_diginit(hw);
-        rtl92c_dm_init_dynamic_txpower(hw);
-        rtl92c_dm_init_edca_turbo(hw);
-        rtl92c_dm_init_rate_adaptive_mask(hw);
-        rtl92c_dm_initialize_txpower_tracking(hw);
-        rtl92c_dm_init_dynamic_bb_powersaving(hw);
-}
-
-void rtl92c_dm_watchdog(struct ieee80211_hw *hw)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
-        bool b_fw_current_inpsmode = false;
-        bool b_fw_ps_awake = true;
-
-        rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_FW_PSMODE_STATUS,
-                                      (u8 *) (&b_fw_current_inpsmode));
-        rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_FWLPS_RF_ON,
-                                      (u8 *) (&b_fw_ps_awake));
-
-        if ((ppsc->rfpwr_state == ERFON) && ((!b_fw_current_inpsmode) &&
-                                             b_fw_ps_awake)
-            && (!ppsc->rfchange_inprogress)) {
-                rtl92c_dm_pwdb_monitor(hw);
-                rtl92c_dm_dig(hw);
-                rtl92c_dm_false_alarm_counter_statistics(hw);
-                rtl92c_dm_dynamic_bb_powersaving(hw);
-                rtl92c_dm_dynamic_txpower(hw);
-                rtl92c_dm_check_txpower_tracking(hw);
-                rtl92c_dm_refresh_rate_adaptive_mask(hw);
-                rtl92c_dm_check_edca_turbo(hw);
-        }
-}
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/dm.h b/drivers/net/wireless/rtlwifi/rtl8192ce/dm.h
index 463439e4074c..5911d52a24ac 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192ce/dm.h
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/dm.h
@@ -192,5 +192,6 @@ void rtl92c_dm_init_edca_turbo(struct ieee80211_hw *hw);
 void rtl92c_dm_check_txpower_tracking(struct ieee80211_hw *hw);
 void rtl92c_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw);
 void rtl92c_dm_rf_saving(struct ieee80211_hw *hw, u8 bforce_in_normal);
+void rtl92c_dm_dynamic_txpower(struct ieee80211_hw *hw);
 
 #endif
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/fw.c b/drivers/net/wireless/rtlwifi/rtl8192ce/fw.c
index 11dd22b987e7..11c8bdb4af59 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192ce/fw.c
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/fw.c
@@ -133,17 +133,15 @@ static void _rtl92c_write_fw(struct ieee80211_hw *hw,
 {
         struct rtl_priv *rtlpriv = rtl_priv(hw);
         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
-        bool is_version_b;
         u8 *bufferPtr = (u8 *) buffer;
 
         RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE, ("FW size is %d bytes,\n", size));
 
-        is_version_b = IS_CHIP_VER_B(version);
-        if (is_version_b) {
+        if (IS_CHIP_VER_B(version)) {
                 u32 pageNums, remainSize;
                 u32 page, offset;
 
-                if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192CE)
+                if (IS_HARDWARE_TYPE_8192CE(rtlhal))
                         _rtl92c_fill_dummy(bufferPtr, &size);
 
                 pageNums = size / FW_8192C_PAGE_SIZE;
@@ -231,14 +229,14 @@ int rtl92c_download_fw(struct ieee80211_hw *hw)
         u32 fwsize;
         int err;
         enum version_8192c version = rtlhal->version;
+        const struct firmware *firmware;
 
-        const struct firmware *firmware = NULL;
-
+        printk(KERN_INFO "rtl8192cu: Loading firmware file %s\n",
+               rtlpriv->cfg->fw_name);
         err = request_firmware(&firmware, rtlpriv->cfg->fw_name,
                                rtlpriv->io.dev);
         if (err) {
-                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
-                         ("Failed to request firmware!\n"));
+                printk(KERN_ERR "rtl8192cu: Firmware loading failed\n");
                 return 1;
         }
 
@@ -318,12 +316,12 @@ static void _rtl92c_fill_h2c_command(struct ieee80211_hw *hw,
 
         while (true) {
                 spin_lock_irqsave(&rtlpriv->locks.h2c_lock, flag);
-                if (rtlhal->b_h2c_setinprogress) {
+                if (rtlhal->h2c_setinprogress) {
                         RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
                                  ("H2C set in progress! Wait to set.."
                                   "element_id(%d).\n", element_id));
 
-                        while (rtlhal->b_h2c_setinprogress) {
+                        while (rtlhal->h2c_setinprogress) {
                                 spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock,
                                                        flag);
                                 h2c_waitcounter++;
@@ -339,7 +337,7 @@ static void _rtl92c_fill_h2c_command(struct ieee80211_hw *hw,
                         }
                         spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
                 } else {
-                        rtlhal->b_h2c_setinprogress = true;
+                        rtlhal->h2c_setinprogress = true;
                         spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
                         break;
                 }
@@ -495,7 +493,7 @@ static void _rtl92c_fill_h2c_command(struct ieee80211_hw *hw,
         }
 
         spin_lock_irqsave(&rtlpriv->locks.h2c_lock, flag);
-        rtlhal->b_h2c_setinprogress = false;
+        rtlhal->h2c_setinprogress = false;
         spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
 
         RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, ("go out\n"));
@@ -507,7 +505,7 @@ void rtl92c_fill_h2c_cmd(struct ieee80211_hw *hw,
         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
         u32 tmp_cmdbuf[2];
 
-        if (rtlhal->bfw_ready == false) {
+        if (rtlhal->fw_ready == false) {
                 RT_ASSERT(false, ("return H2C cmd because of Fw "
                                   "download fail!!!\n"));
                 return;
@@ -560,39 +558,6 @@ void rtl92c_set_fw_pwrmode_cmd(struct ieee80211_hw *hw, u8 mode)
 
 }
 
-static bool _rtl92c_cmd_send_packet(struct ieee80211_hw *hw,
-                                    struct sk_buff *skb)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
-        struct rtl8192_tx_ring *ring;
-        struct rtl_tx_desc *pdesc;
-        u8 own;
-        unsigned long flags;
-        struct sk_buff *pskb = NULL;
-
-        ring = &rtlpci->tx_ring[BEACON_QUEUE];
-
-        pskb = __skb_dequeue(&ring->queue);
-        if (pskb)
-                kfree_skb(pskb);
-
-        spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
-
-        pdesc = &ring->desc[0];
-        own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) pdesc, true, HW_DESC_OWN);
-
-        rtlpriv->cfg->ops->fill_tx_cmddesc(hw, (u8 *) pdesc, 1, 1, skb);
-
-        __skb_queue_tail(&ring->queue, skb);
-
-        spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
-
-        rtlpriv->cfg->ops->tx_polling(hw, BEACON_QUEUE);
-
-        return true;
-}
-
 #define BEACON_PG               0 /*->1*/
 #define PSPOLL_PG               2
 #define NULL_PG                 3
@@ -776,7 +741,7 @@ void rtl92c_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool b_dl_finished)
         memcpy((u8 *) skb_put(skb, totalpacketlen),
                &reserved_page_packet, totalpacketlen);
 
-        rtstatus = _rtl92c_cmd_send_packet(hw, skb);
+        rtstatus = rtlpriv->cfg->ops->cmd_send_packet(hw, skb);
 
         if (rtstatus)
                 b_dlok = true;
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/hw.c b/drivers/net/wireless/rtlwifi/rtl8192ce/hw.c
index 1c41a0c93506..0b910921e606 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192ce/hw.c
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/hw.c
@@ -124,7 +124,7 @@ void rtl92ce_get_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
                         break;
                 }
         case HW_VAR_FW_PSMODE_STATUS:
-                *((bool *) (val)) = ppsc->b_fw_current_inpsmode;
+                *((bool *) (val)) = ppsc->fw_current_inpsmode;
                 break;
         case HW_VAR_CORRECT_TSF:{
                 u64 tsf;
@@ -173,15 +173,15 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
                         break;
                 }
         case HW_VAR_BASIC_RATE:{
-                        u16 b_rate_cfg = ((u16 *) val)[0];
+                        u16 rate_cfg = ((u16 *) val)[0];
                         u8 rate_index = 0;
-                        b_rate_cfg = b_rate_cfg & 0x15f;
-                        b_rate_cfg |= 0x01;
-                        rtl_write_byte(rtlpriv, REG_RRSR, b_rate_cfg & 0xff);
+                        rate_cfg &= 0x15f;
+                        rate_cfg |= 0x01;
+                        rtl_write_byte(rtlpriv, REG_RRSR, rate_cfg & 0xff);
                         rtl_write_byte(rtlpriv, REG_RRSR + 1,
-                                       (b_rate_cfg >> 8)&0xff);
-                        while (b_rate_cfg > 0x1) {
-                                b_rate_cfg = (b_rate_cfg >> 1);
+                                       (rate_cfg >> 8)&0xff);
+                        while (rate_cfg > 0x1) {
+                                rate_cfg = (rate_cfg >> 1);
                                 rate_index++;
                         }
                         rtl_write_byte(rtlpriv, REG_INIRTS_RATE_SEL,
@@ -318,15 +318,17 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
                 }
         case HW_VAR_AC_PARAM:{
                         u8 e_aci = *((u8 *) val);
-                        u32 u4b_ac_param = 0;
+                        u32 u4b_ac_param;
+                        u16 cw_min = le16_to_cpu(mac->ac[e_aci].cw_min);
+                        u16 cw_max = le16_to_cpu(mac->ac[e_aci].cw_max);
+                        u16 tx_op = le16_to_cpu(mac->ac[e_aci].tx_op);
 
-                        u4b_ac_param |= (u32) mac->ac[e_aci].aifs;
-                        u4b_ac_param |= ((u32) mac->ac[e_aci].cw_min
+                        u4b_ac_param = (u32) mac->ac[e_aci].aifs;
+                        u4b_ac_param |= ((u32)cw_min
                                          & 0xF) << AC_PARAM_ECW_MIN_OFFSET;
-                        u4b_ac_param |= ((u32) mac->ac[e_aci].cw_max &
+                        u4b_ac_param |= ((u32)cw_max &
                                          0xF) << AC_PARAM_ECW_MAX_OFFSET;
-                        u4b_ac_param |= (u32) mac->ac[e_aci].tx_op
-                            << AC_PARAM_TXOP_LIMIT_OFFSET;
+                        u4b_ac_param |= (u32)tx_op << AC_PARAM_TXOP_OFFSET;
 
                         RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
                                  ("queue:%x, ac_param:%x\n", e_aci,
@@ -469,12 +471,12 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
                         break;
                 }
         case HW_VAR_FW_PSMODE_STATUS:
-                ppsc->b_fw_current_inpsmode = *((bool *) val);
+                ppsc->fw_current_inpsmode = *((bool *) val);
                 break;
         case HW_VAR_H2C_FW_JOINBSSRPT:{
                         u8 mstatus = (*(u8 *) val);
                         u8 tmp_regcr, tmp_reg422;
-                        bool b_recover = false;
+                        bool recover = false;
 
                         if (mstatus == RT_MEDIA_CONNECT) {
                                 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AID,
@@ -491,7 +493,7 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
                                     rtl_read_byte(rtlpriv,
                                                   REG_FWHW_TXQ_CTRL + 2);
                                 if (tmp_reg422 & BIT(6))
-                                        b_recover = true;
+                                        recover = true;
                                 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2,
                                                tmp_reg422 & (~BIT(6)));
 
@@ -500,7 +502,7 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
                                 _rtl92ce_set_bcn_ctrl_reg(hw, BIT(3), 0);
                                 _rtl92ce_set_bcn_ctrl_reg(hw, 0, BIT(4));
 
-                                if (b_recover) {
+                                if (recover) {
                                         rtl_write_byte(rtlpriv,
                                                        REG_FWHW_TXQ_CTRL + 2,
                                                        tmp_reg422);
@@ -868,7 +870,7 @@ static void _rtl92ce_enable_aspm_back_door(struct ieee80211_hw *hw)
         rtl_write_word(rtlpriv, 0x350, 0x870c);
         rtl_write_byte(rtlpriv, 0x352, 0x1);
 
-        if (ppsc->b_support_backdoor)
+        if (ppsc->support_backdoor)
                 rtl_write_byte(rtlpriv, 0x349, 0x1b);
         else
                 rtl_write_byte(rtlpriv, 0x349, 0x03);
@@ -940,10 +942,10 @@ int rtl92ce_hw_init(struct ieee80211_hw *hw)
                          ("Failed to download FW. Init HW "
                           "without FW now..\n"));
                 err = 1;
-                rtlhal->bfw_ready = false;
+                rtlhal->fw_ready = false;
                 return err;
         } else {
-                rtlhal->bfw_ready = true;
+                rtlhal->fw_ready = true;
         }
 
         rtlhal->last_hmeboxnum = 0;
@@ -1170,21 +1172,20 @@ void rtl92ce_set_qos(struct ieee80211_hw *hw, int aci)
 {
         struct rtl_priv *rtlpriv = rtl_priv(hw);
         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
-
         u32 u4b_ac_param;
+        u16 cw_min = le16_to_cpu(mac->ac[aci].cw_min);
+        u16 cw_max = le16_to_cpu(mac->ac[aci].cw_max);
+        u16 tx_op = le16_to_cpu(mac->ac[aci].tx_op);
 
         rtl92c_dm_init_edca_turbo(hw);
-
         u4b_ac_param = (u32) mac->ac[aci].aifs;
-        u4b_ac_param |=
-            ((u32) mac->ac[aci].cw_min & 0xF) << AC_PARAM_ECW_MIN_OFFSET;
-        u4b_ac_param |=
-            ((u32) mac->ac[aci].cw_max & 0xF) << AC_PARAM_ECW_MAX_OFFSET;
-        u4b_ac_param |= (u32) mac->ac[aci].tx_op << AC_PARAM_TXOP_LIMIT_OFFSET;
+        u4b_ac_param |= (u32) ((cw_min & 0xF) << AC_PARAM_ECW_MIN_OFFSET);
+        u4b_ac_param |= (u32) ((cw_max & 0xF) << AC_PARAM_ECW_MAX_OFFSET);
+        u4b_ac_param |= (u32) (tx_op << AC_PARAM_TXOP_OFFSET);
         RT_TRACE(rtlpriv, COMP_QOS, DBG_DMESG,
                  ("queue:%x, ac_param:%x aifs:%x cwmin:%x cwmax:%x txop:%x\n",
-                  aci, u4b_ac_param, mac->ac[aci].aifs, mac->ac[aci].cw_min,
-                  mac->ac[aci].cw_max, mac->ac[aci].tx_op));
+                  aci, u4b_ac_param, mac->ac[aci].aifs, cw_min,
+                  cw_max, tx_op));
         switch (aci) {
         case AC1_BK:
                 rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, u4b_ac_param);
@@ -1237,7 +1238,7 @@ static void _rtl92ce_poweroff_adapter(struct ieee80211_hw *hw)
         rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x40);
         rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE2);
         rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE0);
-        if ((rtl_read_byte(rtlpriv, REG_MCUFWDL) & BIT(7)) && rtlhal->bfw_ready)
+        if ((rtl_read_byte(rtlpriv, REG_MCUFWDL) & BIT(7)) && rtlhal->fw_ready)
                 rtl92c_firmware_selfreset(hw);
         rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1, 0x51);
         rtl_write_byte(rtlpriv, REG_MCUFWDL, 0x00);
@@ -1335,19 +1336,6 @@ void rtl92ce_update_interrupt_mask(struct ieee80211_hw *hw,
         rtl92ce_enable_interrupt(hw);
 }
 
-static u8 _rtl92c_get_chnl_group(u8 chnl)
-{
-        u8 group;
-
-        if (chnl < 3)
-                group = 0;
-        else if (chnl < 9)
-                group = 1;
-        else
-                group = 2;
-        return group;
-}
-
 static void _rtl92ce_read_txpower_info_from_hwpg(struct ieee80211_hw *hw,
                                                  bool autoload_fail,
                                                  u8 *hwinfo)
@@ -1568,7 +1556,7 @@ static void _rtl92ce_read_txpower_info_from_hwpg(struct ieee80211_hw *hw,
         rtlefuse->eeprom_thermalmeter = (tempval & 0x1f);
 
         if (rtlefuse->eeprom_thermalmeter == 0x1f || autoload_fail)
-                rtlefuse->b_apk_thermalmeterignore = true;
+                rtlefuse->apk_thermalmeterignore = true;
 
         rtlefuse->thermalmeter[0] = rtlefuse->eeprom_thermalmeter;
         RTPRINT(rtlpriv, FINIT, INIT_TxPower,
@@ -1625,7 +1613,7 @@ static void _rtl92ce_read_adapter_info(struct ieee80211_hw *hw)
 
         rtlefuse->eeprom_channelplan = *(u8 *)&hwinfo[EEPROM_CHANNELPLAN];
         rtlefuse->eeprom_version = *(u16 *)&hwinfo[EEPROM_VERSION];
-        rtlefuse->b_txpwr_fromeprom = true;
+        rtlefuse->txpwr_fromeprom = true;
         rtlefuse->eeprom_oemid = *(u8 *)&hwinfo[EEPROM_CUSTOMER_ID];
 
         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
@@ -1668,7 +1656,7 @@ static void _rtl92ce_hal_customized_behavior(struct ieee80211_hw *hw)
 
         switch (rtlhal->oem_id) {
         case RT_CID_819x_HP:
-                pcipriv->ledctl.bled_opendrain = true;
+                pcipriv->ledctl.led_opendrain = true;
                 break;
         case RT_CID_819x_Lenovo:
         case RT_CID_DEFAULT:
@@ -1693,10 +1681,10 @@ void rtl92ce_read_eeprom_info(struct ieee80211_hw *hw)
 
         rtlhal->version = _rtl92ce_read_chip_version(hw);
         if (get_rf_type(rtlphy) == RF_1T1R)
-                rtlpriv->dm.brfpath_rxenable[0] = true;
+                rtlpriv->dm.rfpath_rxenable[0] = true;
         else
-                rtlpriv->dm.brfpath_rxenable[0] =
-                    rtlpriv->dm.brfpath_rxenable[1] = true;
+                rtlpriv->dm.rfpath_rxenable[0] =
+                    rtlpriv->dm.rfpath_rxenable[1] = true;
         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, ("VersionID = 0x%4x\n",
                                                 rtlhal->version));
         tmp_u1b = rtl_read_byte(rtlpriv, REG_9346CR);
@@ -1725,18 +1713,18 @@ void rtl92ce_update_hal_rate_table(struct ieee80211_hw *hw)
         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 
         u32 ratr_value = (u32) mac->basic_rates;
-        u8 *p_mcsrate = mac->mcs;
+        u8 *mcsrate = mac->mcs;
         u8 ratr_index = 0;
-        u8 b_nmode = mac->ht_enable;
+        u8 nmode = mac->ht_enable;
         u8 mimo_ps = 1;
         u16 shortgi_rate;
         u32 tmp_ratr_value;
-        u8 b_curtxbw_40mhz = mac->bw_40;
-        u8 b_curshortgi_40mhz = mac->sgi_40;
-        u8 b_curshortgi_20mhz = mac->sgi_20;
+        u8 curtxbw_40mhz = mac->bw_40;
+        u8 curshortgi_40mhz = mac->sgi_40;
+        u8 curshortgi_20mhz = mac->sgi_20;
         enum wireless_mode wirelessmode = mac->mode;
 
-        ratr_value |= EF2BYTE((*(u16 *) (p_mcsrate))) << 12;
+        ratr_value |= ((*(u16 *) (mcsrate))) << 12;
 
         switch (wirelessmode) {
         case WIRELESS_MODE_B:
@@ -1750,7 +1738,7 @@ void rtl92ce_update_hal_rate_table(struct ieee80211_hw *hw)
                 break;
         case WIRELESS_MODE_N_24G:
         case WIRELESS_MODE_N_5G:
-                b_nmode = 1;
+                nmode = 1;
                 if (mimo_ps == 0) {
                         ratr_value &= 0x0007F005;
                 } else {
@@ -1776,9 +1764,8 @@ void rtl92ce_update_hal_rate_table(struct ieee80211_hw *hw)
 
         ratr_value &= 0x0FFFFFFF;
 
-        if (b_nmode && ((b_curtxbw_40mhz &&
-                         b_curshortgi_40mhz) || (!b_curtxbw_40mhz &&
-                                                 b_curshortgi_20mhz))) {
+        if (nmode && ((curtxbw_40mhz && curshortgi_40mhz) || (!curtxbw_40mhz &&
+                       curshortgi_20mhz))) {
 
                 ratr_value |= 0x10000000;
                 tmp_ratr_value = (ratr_value >> 12);
@@ -1806,11 +1793,11 @@ void rtl92ce_update_hal_rate_mask(struct ieee80211_hw *hw, u8 rssi_level)
         u32 ratr_bitmap = (u32) mac->basic_rates;
         u8 *p_mcsrate = mac->mcs;
         u8 ratr_index;
-        u8 b_curtxbw_40mhz = mac->bw_40;
-        u8 b_curshortgi_40mhz = mac->sgi_40;
-        u8 b_curshortgi_20mhz = mac->sgi_20;
+        u8 curtxbw_40mhz = mac->bw_40;
+        u8 curshortgi_40mhz = mac->sgi_40;
+        u8 curshortgi_20mhz = mac->sgi_20;
         enum wireless_mode wirelessmode = mac->mode;
-        bool b_shortgi = false;
+        bool shortgi = false;
         u8 rate_mask[5];
         u8 macid = 0;
         u8 mimops = 1;
@@ -1852,7 +1839,7 @@ void rtl92ce_update_hal_rate_mask(struct ieee80211_hw *hw, u8 rssi_level)
                 } else {
                         if (rtlphy->rf_type == RF_1T2R ||
                             rtlphy->rf_type == RF_1T1R) {
-                                if (b_curtxbw_40mhz) {
+                                if (curtxbw_40mhz) {
                                         if (rssi_level == 1)
                                                 ratr_bitmap &= 0x000f0000;
                                         else if (rssi_level == 2)
@@ -1868,7 +1855,7 @@ void rtl92ce_update_hal_rate_mask(struct ieee80211_hw *hw, u8 rssi_level)
                                                 ratr_bitmap &= 0x000ff005;
                                 }
                         } else {
-                                if (b_curtxbw_40mhz) {
+                                if (curtxbw_40mhz) {
                                         if (rssi_level == 1)
                                                 ratr_bitmap &= 0x0f0f0000;
                                         else if (rssi_level == 2)
@@ -1886,13 +1873,13 @@ void rtl92ce_update_hal_rate_mask(struct ieee80211_hw *hw, u8 rssi_level)
                         }
                 }
 
-                if ((b_curtxbw_40mhz && b_curshortgi_40mhz) ||
-                    (!b_curtxbw_40mhz && b_curshortgi_20mhz)) {
+                if ((curtxbw_40mhz && curshortgi_40mhz) ||
+                    (!curtxbw_40mhz && curshortgi_20mhz)) {
 
                         if (macid == 0)
-                                b_shortgi = true;
+                                shortgi = true;
                         else if (macid == 1)
-                                b_shortgi = false;
+                                shortgi = false;
                 }
                 break;
         default:
@@ -1906,9 +1893,9 @@ void rtl92ce_update_hal_rate_mask(struct ieee80211_hw *hw, u8 rssi_level)
         }
         RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG,
                  ("ratr_bitmap :%x\n", ratr_bitmap));
-        *(u32 *)&rate_mask = EF4BYTE((ratr_bitmap & 0x0fffffff) |
-                                       (ratr_index << 28));
-        rate_mask[4] = macid | (b_shortgi ? 0x20 : 0x00) | 0x80;
+        *(u32 *)&rate_mask = (ratr_bitmap & 0x0fffffff) |
+                                       (ratr_index << 28);
+        rate_mask[4] = macid | (shortgi ? 0x20 : 0x00) | 0x80;
         RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, ("Rate_index:%x, "
                                                  "ratr_val:%x, %x:%x:%x:%x:%x\n",
                                                  ratr_index, ratr_bitmap,
@@ -1940,13 +1927,13 @@ bool rtl92ce_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 * valid)
         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
         enum rf_pwrstate e_rfpowerstate_toset, cur_rfstate;
         u8 u1tmp;
-        bool b_actuallyset = false;
+        bool actuallyset = false;
         unsigned long flag;
 
         if ((rtlpci->up_first_time == 1) || (rtlpci->being_init_adapter))
                 return false;
 
-        if (ppsc->b_swrf_processing)
+        if (ppsc->swrf_processing)
                 return false;
 
         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag);
@@ -1972,24 +1959,24 @@ bool rtl92ce_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 * valid)
         u1tmp = rtl_read_byte(rtlpriv, REG_GPIO_IO_SEL);
         e_rfpowerstate_toset = (u1tmp & BIT(3)) ? ERFON : ERFOFF;
 
-        if ((ppsc->b_hwradiooff == true) && (e_rfpowerstate_toset == ERFON)) {
+        if ((ppsc->hwradiooff == true) && (e_rfpowerstate_toset == ERFON)) {
                 RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
                          ("GPIOChangeRF  - HW Radio ON, RF ON\n"));
 
                 e_rfpowerstate_toset = ERFON;
-                ppsc->b_hwradiooff = false;
-                b_actuallyset = true;
-        } else if ((ppsc->b_hwradiooff == false)
+                ppsc->hwradiooff = false;
+                actuallyset = true;
+        } else if ((ppsc->hwradiooff == false)
                    && (e_rfpowerstate_toset == ERFOFF)) {
                 RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
                          ("GPIOChangeRF  - HW Radio OFF, RF OFF\n"));
 
                 e_rfpowerstate_toset = ERFOFF;
-                ppsc->b_hwradiooff = true;
-                b_actuallyset = true;
+                ppsc->hwradiooff = true;
+                actuallyset = true;
         }
 
-        if (b_actuallyset) {
+        if (actuallyset) {
                 if (e_rfpowerstate_toset == ERFON) {
                         if ((ppsc->reg_rfps_level & RT_RF_OFF_LEVL_ASPM) &&
                             RT_IN_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_ASPM)) {
@@ -2028,7 +2015,7 @@ bool rtl92ce_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 * valid)
         }
 
         *valid = 1;
-        return !ppsc->b_hwradiooff;
+        return !ppsc->hwradiooff;
 
 }
 
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/led.c b/drivers/net/wireless/rtlwifi/rtl8192ce/led.c
index 78a0569208ea..7b1da8d7508f 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192ce/led.c
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/led.c
@@ -57,7 +57,7 @@ void rtl92ce_sw_led_on(struct ieee80211_hw *hw, struct rtl_led *pled)
                          ("switch case not process\n"));
                 break;
         }
-        pled->b_ledon = true;
+        pled->ledon = true;
 }
 
 void rtl92ce_sw_led_off(struct ieee80211_hw *hw, struct rtl_led *pled)
@@ -76,7 +76,7 @@ void rtl92ce_sw_led_off(struct ieee80211_hw *hw, struct rtl_led *pled)
                 break;
         case LED_PIN_LED0:
                 ledcfg &= 0xf0;
-                if (pcipriv->ledctl.bled_opendrain == true)
+                if (pcipriv->ledctl.led_opendrain == true)
                         rtl_write_byte(rtlpriv, REG_LEDCFG2,
                                        (ledcfg | BIT(1) | BIT(5) | BIT(6)));
                 else
@@ -92,7 +92,7 @@ void rtl92ce_sw_led_off(struct ieee80211_hw *hw, struct rtl_led *pled)
                          ("switch case not process\n"));
                 break;
         }
-        pled->b_ledon = false;
+        pled->ledon = false;
 }
 
 void rtl92ce_init_sw_leds(struct ieee80211_hw *hw)
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/phy.c b/drivers/net/wireless/rtlwifi/rtl8192ce/phy.c
index 45044117139a..191106033b3c 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192ce/phy.c
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/phy.c
@@ -37,82 +37,7 @@
 #include "dm.h"
 #include "table.h"
 
-static u32 _rtl92c_phy_fw_rf_serial_read(struct ieee80211_hw *hw,
-                                         enum radio_path rfpath, u32 offset);
-static void _rtl92c_phy_fw_rf_serial_write(struct ieee80211_hw *hw,
-                                           enum radio_path rfpath, u32 offset,
-                                           u32 data);
-static u32 _rtl92c_phy_rf_serial_read(struct ieee80211_hw *hw,
-                                      enum radio_path rfpath, u32 offset);
-static void _rtl92c_phy_rf_serial_write(struct ieee80211_hw *hw,
-                                        enum radio_path rfpath, u32 offset,
-                                        u32 data);
-static u32 _rtl92c_phy_calculate_bit_shift(u32 bitmask);
-static bool _rtl92c_phy_bb8192c_config_parafile(struct ieee80211_hw *hw);
-static bool _rtl92c_phy_config_mac_with_headerfile(struct ieee80211_hw *hw);
-static bool _rtl92c_phy_config_bb_with_headerfile(struct ieee80211_hw *hw,
-                                                  u8 configtype);
-static bool _rtl92c_phy_config_bb_with_pgheaderfile(struct ieee80211_hw *hw,
-                                                    u8 configtype);
-static void _rtl92c_phy_init_bb_rf_register_definition(struct ieee80211_hw *hw);
-static bool _rtl92c_phy_set_sw_chnl_cmdarray(struct swchnlcmd *cmdtable,
-                                             u32 cmdtableidx, u32 cmdtablesz,
-                                             enum swchnlcmd_id cmdid, u32 para1,
-                                             u32 para2, u32 msdelay);
-static bool _rtl92c_phy_sw_chnl_step_by_step(struct ieee80211_hw *hw,
-                                             u8 channel, u8 *stage, u8 *step,
-                                             u32 *delay);
-static u8 _rtl92c_phy_dbm_to_txpwr_Idx(struct ieee80211_hw *hw,
-                                       enum wireless_mode wirelessmode,
-                                       long power_indbm);
-static bool _rtl92c_phy_config_rf_external_pa(struct ieee80211_hw *hw,
-                                              enum radio_path rfpath);
-static long _rtl92c_phy_txpwr_idx_to_dbm(struct ieee80211_hw *hw,
-                                         enum wireless_mode wirelessmode,
-                                         u8 txpwridx);
-u32 rtl92c_phy_query_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        u32 returnvalue, originalvalue, bitshift;
-
-        RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, ("regaddr(%#x), "
-                                               "bitmask(%#x)\n", regaddr,
-                                               bitmask));
-        originalvalue = rtl_read_dword(rtlpriv, regaddr);
-        bitshift = _rtl92c_phy_calculate_bit_shift(bitmask);
-        returnvalue = (originalvalue & bitmask) >> bitshift;
-
-        RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, ("BBR MASK=0x%x "
-                                               "Addr[0x%x]=0x%x\n", bitmask,
-                                               regaddr, originalvalue));
-
-        return returnvalue;
-
-}
-
-void rtl92c_phy_set_bb_reg(struct ieee80211_hw *hw,
-                           u32 regaddr, u32 bitmask, u32 data)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        u32 originalvalue, bitshift;
-
-        RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, ("regaddr(%#x), bitmask(%#x),"
-                                               " data(%#x)\n", regaddr, bitmask,
-                                               data));
-
-        if (bitmask != MASKDWORD) {
-                originalvalue = rtl_read_dword(rtlpriv, regaddr);
-                bitshift = _rtl92c_phy_calculate_bit_shift(bitmask);
-                data = ((originalvalue & (~bitmask)) | (data << bitshift));
-        }
-
-        rtl_write_dword(rtlpriv, regaddr, data);
-
-        RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, ("regaddr(%#x), bitmask(%#x),"
-                                               " data(%#x)\n", regaddr, bitmask,
-                                               data));
-
-}
+#include "../rtl8192c/phy_common.c"
 
 u32 rtl92c_phy_query_rf_reg(struct ieee80211_hw *hw,
                             enum radio_path rfpath, u32 regaddr, u32 bitmask)
@@ -197,118 +122,6 @@ void rtl92c_phy_set_rf_reg(struct ieee80211_hw *hw,
                                                bitmask, data, rfpath));
 }
 
-static u32 _rtl92c_phy_fw_rf_serial_read(struct ieee80211_hw *hw,
-                                         enum radio_path rfpath, u32 offset)
-{
-        RT_ASSERT(false, ("deprecated!\n"));
-        return 0;
-}
-
-static void _rtl92c_phy_fw_rf_serial_write(struct ieee80211_hw *hw,
-                                           enum radio_path rfpath, u32 offset,
-                                           u32 data)
-{
-        RT_ASSERT(false, ("deprecated!\n"));
-}
-
-static u32 _rtl92c_phy_rf_serial_read(struct ieee80211_hw *hw,
-                                      enum radio_path rfpath, u32 offset)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        struct rtl_phy *rtlphy = &(rtlpriv->phy);
-        struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath];
-        u32 newoffset;
-        u32 tmplong, tmplong2;
-        u8 rfpi_enable = 0;
-        u32 retvalue;
-
-        offset &= 0x3f;
-        newoffset = offset;
-        if (RT_CANNOT_IO(hw)) {
-                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, ("return all one\n"));
-                return 0xFFFFFFFF;
-        }
-        tmplong = rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, MASKDWORD);
-        if (rfpath == RF90_PATH_A)
-                tmplong2 = tmplong;
-        else
-                tmplong2 = rtl_get_bbreg(hw, pphyreg->rfhssi_para2, MASKDWORD);
-        tmplong2 = (tmplong2 & (~BLSSIREADADDRESS)) |
-            (newoffset << 23) | BLSSIREADEDGE;
-        rtl_set_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, MASKDWORD,
-                      tmplong & (~BLSSIREADEDGE));
-        mdelay(1);
-        rtl_set_bbreg(hw, pphyreg->rfhssi_para2, MASKDWORD, tmplong2);
-        mdelay(1);
-        rtl_set_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, MASKDWORD,
-                      tmplong | BLSSIREADEDGE);
-        mdelay(1);
-        if (rfpath == RF90_PATH_A)
-                rfpi_enable = (u8) rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER1,
-                                                 BIT(8));
-        else if (rfpath == RF90_PATH_B)
-                rfpi_enable = (u8) rtl_get_bbreg(hw, RFPGA0_XB_HSSIPARAMETER1,
-                                                 BIT(8));
-        if (rfpi_enable)
-                retvalue = rtl_get_bbreg(hw, pphyreg->rflssi_readbackpi,
-                                         BLSSIREADBACKDATA);
-        else
-                retvalue = rtl_get_bbreg(hw, pphyreg->rflssi_readback,
-                                         BLSSIREADBACKDATA);
-        RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, ("RFR-%d Addr[0x%x]=0x%x\n",
-                                               rfpath, pphyreg->rflssi_readback,
-                                               retvalue));
-        return retvalue;
-}
-
-static void _rtl92c_phy_rf_serial_write(struct ieee80211_hw *hw,
-                                        enum radio_path rfpath, u32 offset,
-                                        u32 data)
-{
-        u32 data_and_addr;
-        u32 newoffset;
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        struct rtl_phy *rtlphy = &(rtlpriv->phy);
-        struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath];
-
-        if (RT_CANNOT_IO(hw)) {
-                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, ("stop\n"));
-                return;
-        }
-        offset &= 0x3f;
-        newoffset = offset;
-        data_and_addr = ((newoffset << 20) | (data & 0x000fffff)) & 0x0fffffff;
-        rtl_set_bbreg(hw, pphyreg->rf3wire_offset, MASKDWORD, data_and_addr);
-        RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, ("RFW-%d Addr[0x%x]=0x%x\n",
-                                               rfpath, pphyreg->rf3wire_offset,
-                                               data_and_addr));
-}
-
-static u32 _rtl92c_phy_calculate_bit_shift(u32 bitmask)
-{
-        u32 i;
-
-        for (i = 0; i <= 31; i++) {
-                if (((bitmask >> i) & 0x1) == 1)
-                        break;
-        }
-        return i;
-}
-
-static void _rtl92c_phy_bb_config_1t(struct ieee80211_hw *hw)
-{
-        rtl_set_bbreg(hw, RFPGA0_TXINFO, 0x3, 0x2);
-        rtl_set_bbreg(hw, RFPGA1_TXINFO, 0x300033, 0x200022);
-        rtl_set_bbreg(hw, RCCK0_AFESETTING, MASKBYTE3, 0x45);
-        rtl_set_bbreg(hw, ROFDM0_TRXPATHENABLE, MASKBYTE0, 0x23);
-        rtl_set_bbreg(hw, ROFDM0_AGCPARAMETER1, 0x30, 0x1);
-        rtl_set_bbreg(hw, 0xe74, 0x0c000000, 0x2);
-        rtl_set_bbreg(hw, 0xe78, 0x0c000000, 0x2);
-        rtl_set_bbreg(hw, 0xe7c, 0x0c000000, 0x2);
-        rtl_set_bbreg(hw, 0xe80, 0x0c000000, 0x2);
-        rtl_set_bbreg(hw, 0xe88, 0x0c000000, 0x2);
-}
-
 bool rtl92c_phy_mac_config(struct ieee80211_hw *hw)
 {
         struct rtl_priv *rtlpriv = rtl_priv(hw);
@@ -327,7 +140,7 @@ bool rtl92c_phy_bb_config(struct ieee80211_hw *hw)
         struct rtl_priv *rtlpriv = rtl_priv(hw);
         u16 regval;
         u32 regvaldw;
-        u8 b_reg_hwparafile = 1;
+        u8 reg_hwparafile = 1;
 
         _rtl92c_phy_init_bb_rf_register_definition(hw);
         regval = rtl_read_word(rtlpriv, REG_SYS_FUNC_EN);
@@ -342,55 +155,11 @@ bool rtl92c_phy_bb_config(struct ieee80211_hw *hw)
         rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL + 1, 0x80);
         regvaldw = rtl_read_dword(rtlpriv, REG_LEDCFG0);
         rtl_write_dword(rtlpriv, REG_LEDCFG0, regvaldw | BIT(23));
-        if (b_reg_hwparafile == 1)
+        if (reg_hwparafile == 1)
                 rtstatus = _rtl92c_phy_bb8192c_config_parafile(hw);
         return rtstatus;
 }
 
-bool rtl92c_phy_rf_config(struct ieee80211_hw *hw)
-{
-        return rtl92c_phy_rf6052_config(hw);
-}
-
-static bool _rtl92c_phy_bb8192c_config_parafile(struct ieee80211_hw *hw)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        struct rtl_phy *rtlphy = &(rtlpriv->phy);
-        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
-        bool rtstatus;
-
-        RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, ("==>\n"));
-        rtstatus = _rtl92c_phy_config_bb_with_headerfile(hw,
-                                                 BASEBAND_CONFIG_PHY_REG);
-        if (rtstatus != true) {
-                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, ("Write BB Reg Fail!!"));
-                return false;
-        }
-        if (rtlphy->rf_type == RF_1T2R) {
-                _rtl92c_phy_bb_config_1t(hw);
-                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, ("Config to 1T!!\n"));
-        }
-        if (rtlefuse->autoload_failflag == false) {
-                rtlphy->pwrgroup_cnt = 0;
-                rtstatus = _rtl92c_phy_config_bb_with_pgheaderfile(hw,
-                                                   BASEBAND_CONFIG_PHY_REG);
-        }
-        if (rtstatus != true) {
-                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, ("BB_PG Reg Fail!!"));
-                return false;
-        }
-        rtstatus = _rtl92c_phy_config_bb_with_headerfile(hw,
-                                                 BASEBAND_CONFIG_AGC_TAB);
-        if (rtstatus != true) {
-                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, ("AGC Table Fail\n"));
-                return false;
-        }
-        rtlphy->bcck_high_power = (bool) (rtl_get_bbreg(hw,
-                                                RFPGA0_XA_HSSIPARAMETER2,
-                                                0x200));
-        return true;
-}
-
 static bool _rtl92c_phy_config_mac_with_headerfile(struct ieee80211_hw *hw)
 {
         struct rtl_priv *rtlpriv = rtl_priv(hw);
@@ -408,10 +177,6 @@ static bool _rtl92c_phy_config_mac_with_headerfile(struct ieee80211_hw *hw)
         return true;
 }
 
-void rtl92c_phy_config_bb_external_pa(struct ieee80211_hw *hw)
-{
-}
-
 static bool _rtl92c_phy_config_bb_with_headerfile(struct ieee80211_hw *hw,
                                                   u8 configtype)
 {
@@ -472,174 +237,6 @@ static bool _rtl92c_phy_config_bb_with_headerfile(struct ieee80211_hw *hw,
         return true;
 }
 
-static void _rtl92c_store_pwrIndex_diffrate_offset(struct ieee80211_hw *hw,
-                                                   u32 regaddr, u32 bitmask,
-                                                   u32 data)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        struct rtl_phy *rtlphy = &(rtlpriv->phy);
-
-        if (regaddr == RTXAGC_A_RATE18_06) {
-                rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][0] =
-                    data;
-                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
-                         ("MCSTxPowerLevelOriginalOffset[%d][0] = 0x%x\n",
-                          rtlphy->pwrgroup_cnt,
-                          rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
-                                                            pwrgroup_cnt][0]));
-        }
-        if (regaddr == RTXAGC_A_RATE54_24) {
-                rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][1] =
-                    data;
-                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
-                         ("MCSTxPowerLevelOriginalOffset[%d][1] = 0x%x\n",
-                          rtlphy->pwrgroup_cnt,
-                          rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
-                                                            pwrgroup_cnt][1]));
-        }
-        if (regaddr == RTXAGC_A_CCK1_MCS32) {
-                rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][6] =
-                    data;
-                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
-                         ("MCSTxPowerLevelOriginalOffset[%d][6] = 0x%x\n",
-                          rtlphy->pwrgroup_cnt,
-                          rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
-                                                            pwrgroup_cnt][6]));
-        }
-        if (regaddr == RTXAGC_B_CCK11_A_CCK2_11 && bitmask == 0xffffff00) {
-                rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][7] =
-                    data;
-                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
-                         ("MCSTxPowerLevelOriginalOffset[%d][7] = 0x%x\n",
-                          rtlphy->pwrgroup_cnt,
-                          rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
-                                                            pwrgroup_cnt][7]));
-        }
-        if (regaddr == RTXAGC_A_MCS03_MCS00) {
-                rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][2] =
-                    data;
-                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
-                         ("MCSTxPowerLevelOriginalOffset[%d][2] = 0x%x\n",
-                          rtlphy->pwrgroup_cnt,
-                          rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
-                                                            pwrgroup_cnt][2]));
-        }
-        if (regaddr == RTXAGC_A_MCS07_MCS04) {
-                rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][3] =
-                    data;
-                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
-                         ("MCSTxPowerLevelOriginalOffset[%d][3] = 0x%x\n",
-                          rtlphy->pwrgroup_cnt,
-                          rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
-                                                            pwrgroup_cnt][3]));
-        }
-        if (regaddr == RTXAGC_A_MCS11_MCS08) {
-                rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][4] =
-                    data;
-                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
-                         ("MCSTxPowerLevelOriginalOffset[%d][4] = 0x%x\n",
-                          rtlphy->pwrgroup_cnt,
-                          rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
-                                                            pwrgroup_cnt][4]));
-        }
-        if (regaddr == RTXAGC_A_MCS15_MCS12) {
-                rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][5] =
-                    data;
-                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
-                         ("MCSTxPowerLevelOriginalOffset[%d][5] = 0x%x\n",
-                          rtlphy->pwrgroup_cnt,
-                          rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
-                                                            pwrgroup_cnt][5]));
-        }
-        if (regaddr == RTXAGC_B_RATE18_06) {
-                rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][8] =
-                    data;
-                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
-                         ("MCSTxPowerLevelOriginalOffset[%d][8] = 0x%x\n",
-                          rtlphy->pwrgroup_cnt,
-                          rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
-                                                            pwrgroup_cnt][8]));
-        }
-        if (regaddr == RTXAGC_B_RATE54_24) {
-                rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][9] =
-                    data;
-
-                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
-                         ("MCSTxPowerLevelOriginalOffset[%d][9] = 0x%x\n",
-                          rtlphy->pwrgroup_cnt,
-                          rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
-                                                            pwrgroup_cnt][9]));
-        }
-
-        if (regaddr == RTXAGC_B_CCK1_55_MCS32) {
-                rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][14] =
-                    data;
-
-                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
-                         ("MCSTxPowerLevelOriginalOffset[%d][14] = 0x%x\n",
-                          rtlphy->pwrgroup_cnt,
-                          rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
-                                                            pwrgroup_cnt][14]));
-        }
-
-        if (regaddr == RTXAGC_B_CCK11_A_CCK2_11 && bitmask == 0x000000ff) {
-                rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][15] =
-                    data;
-
-                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
-                         ("MCSTxPowerLevelOriginalOffset[%d][15] = 0x%x\n",
-                          rtlphy->pwrgroup_cnt,
-                          rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
-                                                            pwrgroup_cnt][15]));
-        }
-
-        if (regaddr == RTXAGC_B_MCS03_MCS00) {
-                rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][10] =
-                    data;
-
-                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
-                         ("MCSTxPowerLevelOriginalOffset[%d][10] = 0x%x\n",
-                          rtlphy->pwrgroup_cnt,
-                          rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
-                                                            pwrgroup_cnt][10]));
-        }
-
-        if (regaddr == RTXAGC_B_MCS07_MCS04) {
-                rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][11] =
-                    data;
-
-                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
-                         ("MCSTxPowerLevelOriginalOffset[%d][11] = 0x%x\n",
-                          rtlphy->pwrgroup_cnt,
-                          rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
-                                                            pwrgroup_cnt][11]));
-        }
-
-        if (regaddr == RTXAGC_B_MCS11_MCS08) {
-                rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][12] =
-                    data;
-
-                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
-                         ("MCSTxPowerLevelOriginalOffset[%d][12] = 0x%x\n",
-                          rtlphy->pwrgroup_cnt,
-                          rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
-                                                            pwrgroup_cnt][12]));
-        }
-
-        if (regaddr == RTXAGC_B_MCS15_MCS12) {
-                rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][13] =
-                    data;
-
-                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
-                         ("MCSTxPowerLevelOriginalOffset[%d][13] = 0x%x\n",
-                          rtlphy->pwrgroup_cnt,
-                          rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
-                                                            pwrgroup_cnt][13]));
-
-                rtlphy->pwrgroup_cnt++;
-        }
-}
-
 static bool _rtl92c_phy_config_bb_with_pgheaderfile(struct ieee80211_hw *hw,
                                                     u8 configtype)
 {
@@ -679,12 +276,6 @@ static bool _rtl92c_phy_config_bb_with_pgheaderfile(struct ieee80211_hw *hw,
         return true;
 }
 
-static bool _rtl92c_phy_config_rf_external_pa(struct ieee80211_hw *hw,
-                                              enum radio_path rfpath)
-{
-        return true;
-}
-
 bool rtl92c_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,
                                           enum radio_path rfpath)
 {
@@ -776,345 +367,6 @@ bool rtl92c_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,
         return true;
 }
 
-void rtl92c_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        struct rtl_phy *rtlphy = &(rtlpriv->phy);
-
-        rtlphy->default_initialgain[0] =
-            (u8) rtl_get_bbreg(hw, ROFDM0_XAAGCCORE1, MASKBYTE0);
-        rtlphy->default_initialgain[1] =
-            (u8) rtl_get_bbreg(hw, ROFDM0_XBAGCCORE1, MASKBYTE0);
-        rtlphy->default_initialgain[2] =
-            (u8) rtl_get_bbreg(hw, ROFDM0_XCAGCCORE1, MASKBYTE0);
-        rtlphy->default_initialgain[3] =
-            (u8) rtl_get_bbreg(hw, ROFDM0_XDAGCCORE1, MASKBYTE0);
-
-        RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
-                 ("Default initial gain (c50=0x%x, "
-                  "c58=0x%x, c60=0x%x, c68=0x%x\n",
-                  rtlphy->default_initialgain[0],
-                  rtlphy->default_initialgain[1],
-                  rtlphy->default_initialgain[2],
-                  rtlphy->default_initialgain[3]));
-
-        rtlphy->framesync = (u8) rtl_get_bbreg(hw,
-                                               ROFDM0_RXDETECTOR3, MASKBYTE0);
-        rtlphy->framesync_c34 = rtl_get_bbreg(hw,
-                                              ROFDM0_RXDETECTOR2, MASKDWORD);
-
-        RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
-                 ("Default framesync (0x%x) = 0x%x\n",
-                  ROFDM0_RXDETECTOR3, rtlphy->framesync));
-}
-
-static void _rtl92c_phy_init_bb_rf_register_definition(struct ieee80211_hw *hw)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        struct rtl_phy *rtlphy = &(rtlpriv->phy);
-
-        rtlphy->phyreg_def[RF90_PATH_A].rfintfs = RFPGA0_XAB_RFINTERFACESW;
-        rtlphy->phyreg_def[RF90_PATH_B].rfintfs = RFPGA0_XAB_RFINTERFACESW;
-        rtlphy->phyreg_def[RF90_PATH_C].rfintfs = RFPGA0_XCD_RFINTERFACESW;
-        rtlphy->phyreg_def[RF90_PATH_D].rfintfs = RFPGA0_XCD_RFINTERFACESW;
-
-        rtlphy->phyreg_def[RF90_PATH_A].rfintfi = RFPGA0_XAB_RFINTERFACERB;
-        rtlphy->phyreg_def[RF90_PATH_B].rfintfi = RFPGA0_XAB_RFINTERFACERB;
-        rtlphy->phyreg_def[RF90_PATH_C].rfintfi = RFPGA0_XCD_RFINTERFACERB;
-        rtlphy->phyreg_def[RF90_PATH_D].rfintfi = RFPGA0_XCD_RFINTERFACERB;
-
-        rtlphy->phyreg_def[RF90_PATH_A].rfintfo = RFPGA0_XA_RFINTERFACEOE;
-        rtlphy->phyreg_def[RF90_PATH_B].rfintfo = RFPGA0_XB_RFINTERFACEOE;
-
-        rtlphy->phyreg_def[RF90_PATH_A].rfintfe = RFPGA0_XA_RFINTERFACEOE;
-        rtlphy->phyreg_def[RF90_PATH_B].rfintfe = RFPGA0_XB_RFINTERFACEOE;
-
-        rtlphy->phyreg_def[RF90_PATH_A].rf3wire_offset =
-            RFPGA0_XA_LSSIPARAMETER;
-        rtlphy->phyreg_def[RF90_PATH_B].rf3wire_offset =
-            RFPGA0_XB_LSSIPARAMETER;
-
-        rtlphy->phyreg_def[RF90_PATH_A].rflssi_select = rFPGA0_XAB_RFPARAMETER;
-        rtlphy->phyreg_def[RF90_PATH_B].rflssi_select = rFPGA0_XAB_RFPARAMETER;
-        rtlphy->phyreg_def[RF90_PATH_C].rflssi_select = rFPGA0_XCD_RFPARAMETER;
-        rtlphy->phyreg_def[RF90_PATH_D].rflssi_select = rFPGA0_XCD_RFPARAMETER;
-
-        rtlphy->phyreg_def[RF90_PATH_A].rftxgain_stage = RFPGA0_TXGAINSTAGE;
-        rtlphy->phyreg_def[RF90_PATH_B].rftxgain_stage = RFPGA0_TXGAINSTAGE;
-        rtlphy->phyreg_def[RF90_PATH_C].rftxgain_stage = RFPGA0_TXGAINSTAGE;
-        rtlphy->phyreg_def[RF90_PATH_D].rftxgain_stage = RFPGA0_TXGAINSTAGE;
-
-        rtlphy->phyreg_def[RF90_PATH_A].rfhssi_para1 = RFPGA0_XA_HSSIPARAMETER1;
-        rtlphy->phyreg_def[RF90_PATH_B].rfhssi_para1 = RFPGA0_XB_HSSIPARAMETER1;
-
-        rtlphy->phyreg_def[RF90_PATH_A].rfhssi_para2 = RFPGA0_XA_HSSIPARAMETER2;
-        rtlphy->phyreg_def[RF90_PATH_B].rfhssi_para2 = RFPGA0_XB_HSSIPARAMETER2;
-
-        rtlphy->phyreg_def[RF90_PATH_A].rfswitch_control =
-            RFPGA0_XAB_SWITCHCONTROL;
-        rtlphy->phyreg_def[RF90_PATH_B].rfswitch_control =
-            RFPGA0_XAB_SWITCHCONTROL;
-        rtlphy->phyreg_def[RF90_PATH_C].rfswitch_control =
-            RFPGA0_XCD_SWITCHCONTROL;
-        rtlphy->phyreg_def[RF90_PATH_D].rfswitch_control =
-            RFPGA0_XCD_SWITCHCONTROL;
-
-        rtlphy->phyreg_def[RF90_PATH_A].rfagc_control1 = ROFDM0_XAAGCCORE1;
-        rtlphy->phyreg_def[RF90_PATH_B].rfagc_control1 = ROFDM0_XBAGCCORE1;
-        rtlphy->phyreg_def[RF90_PATH_C].rfagc_control1 = ROFDM0_XCAGCCORE1;
-        rtlphy->phyreg_def[RF90_PATH_D].rfagc_control1 = ROFDM0_XDAGCCORE1;
-
-        rtlphy->phyreg_def[RF90_PATH_A].rfagc_control2 = ROFDM0_XAAGCCORE2;
-        rtlphy->phyreg_def[RF90_PATH_B].rfagc_control2 = ROFDM0_XBAGCCORE2;
-        rtlphy->phyreg_def[RF90_PATH_C].rfagc_control2 = ROFDM0_XCAGCCORE2;
-        rtlphy->phyreg_def[RF90_PATH_D].rfagc_control2 = ROFDM0_XDAGCCORE2;
-
-        rtlphy->phyreg_def[RF90_PATH_A].rfrxiq_imbalance =
-            ROFDM0_XARXIQIMBALANCE;
-        rtlphy->phyreg_def[RF90_PATH_B].rfrxiq_imbalance =
-            ROFDM0_XBRXIQIMBALANCE;
-        rtlphy->phyreg_def[RF90_PATH_C].rfrxiq_imbalance =
-            ROFDM0_XCRXIQIMBANLANCE;
-        rtlphy->phyreg_def[RF90_PATH_D].rfrxiq_imbalance =
-            ROFDM0_XDRXIQIMBALANCE;
-
-        rtlphy->phyreg_def[RF90_PATH_A].rfrx_afe = ROFDM0_XARXAFE;
-        rtlphy->phyreg_def[RF90_PATH_B].rfrx_afe = ROFDM0_XBRXAFE;
-        rtlphy->phyreg_def[RF90_PATH_C].rfrx_afe = ROFDM0_XCRXAFE;
-        rtlphy->phyreg_def[RF90_PATH_D].rfrx_afe = ROFDM0_XDRXAFE;
-
-        rtlphy->phyreg_def[RF90_PATH_A].rftxiq_imbalance =
-            ROFDM0_XATXIQIMBALANCE;
-        rtlphy->phyreg_def[RF90_PATH_B].rftxiq_imbalance =
-            ROFDM0_XBTXIQIMBALANCE;
-        rtlphy->phyreg_def[RF90_PATH_C].rftxiq_imbalance =
-            ROFDM0_XCTXIQIMBALANCE;
-        rtlphy->phyreg_def[RF90_PATH_D].rftxiq_imbalance =
-            ROFDM0_XDTXIQIMBALANCE;
-
-        rtlphy->phyreg_def[RF90_PATH_A].rftx_afe = ROFDM0_XATXAFE;
-        rtlphy->phyreg_def[RF90_PATH_B].rftx_afe = ROFDM0_XBTXAFE;
-        rtlphy->phyreg_def[RF90_PATH_C].rftx_afe = ROFDM0_XCTXAFE;
-        rtlphy->phyreg_def[RF90_PATH_D].rftx_afe = ROFDM0_XDTXAFE;
-
-        rtlphy->phyreg_def[RF90_PATH_A].rflssi_readback =
-            RFPGA0_XA_LSSIREADBACK;
-        rtlphy->phyreg_def[RF90_PATH_B].rflssi_readback =
-            RFPGA0_XB_LSSIREADBACK;
-        rtlphy->phyreg_def[RF90_PATH_C].rflssi_readback =
-            RFPGA0_XC_LSSIREADBACK;
-        rtlphy->phyreg_def[RF90_PATH_D].rflssi_readback =
-            RFPGA0_XD_LSSIREADBACK;
-
-        rtlphy->phyreg_def[RF90_PATH_A].rflssi_readbackpi =
-            TRANSCEIVEA_HSPI_READBACK;
-        rtlphy->phyreg_def[RF90_PATH_B].rflssi_readbackpi =
-            TRANSCEIVEB_HSPI_READBACK;
-
-}
-
-void rtl92c_phy_get_txpower_level(struct ieee80211_hw *hw, long *powerlevel)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        struct rtl_phy *rtlphy = &(rtlpriv->phy);
-        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
-        u8 txpwr_level;
-        long txpwr_dbm;
-
-        txpwr_level = rtlphy->cur_cck_txpwridx;
-        txpwr_dbm = _rtl92c_phy_txpwr_idx_to_dbm(hw,
-                                                 WIRELESS_MODE_B, txpwr_level);
-        txpwr_level = rtlphy->cur_ofdm24g_txpwridx +
-            rtlefuse->legacy_ht_txpowerdiff;
-        if (_rtl92c_phy_txpwr_idx_to_dbm(hw,
-                                         WIRELESS_MODE_G,
-                                         txpwr_level) > txpwr_dbm)
-                txpwr_dbm =
-                    _rtl92c_phy_txpwr_idx_to_dbm(hw, WIRELESS_MODE_G,
-                                                 txpwr_level);
-        txpwr_level = rtlphy->cur_ofdm24g_txpwridx;
-        if (_rtl92c_phy_txpwr_idx_to_dbm(hw,
-                                         WIRELESS_MODE_N_24G,
-                                         txpwr_level) > txpwr_dbm)
-                txpwr_dbm =
-                    _rtl92c_phy_txpwr_idx_to_dbm(hw, WIRELESS_MODE_N_24G,
-                                                 txpwr_level);
-        *powerlevel = txpwr_dbm;
-}
-
-static void _rtl92c_get_txpower_index(struct ieee80211_hw *hw, u8 channel,
-                                      u8 *cckpowerlevel, u8 *ofdmpowerlevel)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        struct rtl_phy *rtlphy = &(rtlpriv->phy);
-        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
-        u8 index = (channel - 1);
-
-        cckpowerlevel[RF90_PATH_A] =
-            rtlefuse->txpwrlevel_cck[RF90_PATH_A][index];
-        cckpowerlevel[RF90_PATH_B] =
-            rtlefuse->txpwrlevel_cck[RF90_PATH_B][index];
-        if (get_rf_type(rtlphy) == RF_1T2R || get_rf_type(rtlphy) == RF_1T1R) {
-                ofdmpowerlevel[RF90_PATH_A] =
-                    rtlefuse->txpwrlevel_ht40_1s[RF90_PATH_A][index];
-                ofdmpowerlevel[RF90_PATH_B] =
-                    rtlefuse->txpwrlevel_ht40_1s[RF90_PATH_B][index];
-        } else if (get_rf_type(rtlphy) == RF_2T2R) {
-                ofdmpowerlevel[RF90_PATH_A] =
-                    rtlefuse->txpwrlevel_ht40_2s[RF90_PATH_A][index];
-                ofdmpowerlevel[RF90_PATH_B] =
-                    rtlefuse->txpwrlevel_ht40_2s[RF90_PATH_B][index];
-        }
-}
-
-static void _rtl92c_ccxpower_index_check(struct ieee80211_hw *hw,
-                                         u8 channel, u8 *cckpowerlevel,
-                                         u8 *ofdmpowerlevel)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        struct rtl_phy *rtlphy = &(rtlpriv->phy);
-
-        rtlphy->cur_cck_txpwridx = cckpowerlevel[0];
-        rtlphy->cur_ofdm24g_txpwridx = ofdmpowerlevel[0];
-}
-
-void rtl92c_phy_set_txpower_level(struct ieee80211_hw *hw, u8 channel)
-{
-        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
-        u8 cckpowerlevel[2], ofdmpowerlevel[2];
-
-        if (rtlefuse->b_txpwr_fromeprom == false)
-                return;
-        _rtl92c_get_txpower_index(hw, channel,
-                                  &cckpowerlevel[0], &ofdmpowerlevel[0]);
-        _rtl92c_ccxpower_index_check(hw,
-                                     channel, &cckpowerlevel[0],
-                                     &ofdmpowerlevel[0]);
-        rtl92c_phy_rf6052_set_cck_txpower(hw, &cckpowerlevel[0]);
-        rtl92c_phy_rf6052_set_ofdm_txpower(hw, &ofdmpowerlevel[0], channel);
-}
-
-bool rtl92c_phy_update_txpower_dbm(struct ieee80211_hw *hw, long power_indbm)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        struct rtl_phy *rtlphy = &(rtlpriv->phy);
-        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
-        u8 idx;
-        u8 rf_path;
-
-        u8 ccktxpwridx = _rtl92c_phy_dbm_to_txpwr_Idx(hw,
-                                                      WIRELESS_MODE_B,
-                                                      power_indbm);
-        u8 ofdmtxpwridx = _rtl92c_phy_dbm_to_txpwr_Idx(hw,
-                                                       WIRELESS_MODE_N_24G,
-                                                       power_indbm);
-        if (ofdmtxpwridx - rtlefuse->legacy_ht_txpowerdiff > 0)
-                ofdmtxpwridx -= rtlefuse->legacy_ht_txpowerdiff;
-        else
-                ofdmtxpwridx = 0;
-        RT_TRACE(rtlpriv, COMP_TXAGC, DBG_TRACE,
-                 ("%lx dBm, ccktxpwridx = %d, ofdmtxpwridx = %d\n",
-                  power_indbm, ccktxpwridx, ofdmtxpwridx));
-        for (idx = 0; idx < 14; idx++) {
-                for (rf_path = 0; rf_path < 2; rf_path++) {
-                        rtlefuse->txpwrlevel_cck[rf_path][idx] = ccktxpwridx;
-                        rtlefuse->txpwrlevel_ht40_1s[rf_path][idx] =
-                            ofdmtxpwridx;
-                        rtlefuse->txpwrlevel_ht40_2s[rf_path][idx] =
-                            ofdmtxpwridx;
-                }
-        }
-        rtl92c_phy_set_txpower_level(hw, rtlphy->current_channel);
-        return true;
-}
-
-void rtl92c_phy_set_beacon_hw_reg(struct ieee80211_hw *hw, u16 beaconinterval)
-{
-}
-
-static u8 _rtl92c_phy_dbm_to_txpwr_Idx(struct ieee80211_hw *hw,
-                                       enum wireless_mode wirelessmode,
-                                       long power_indbm)
-{
-        u8 txpwridx;
-        long offset;
-
-        switch (wirelessmode) {
-        case WIRELESS_MODE_B:
-                offset = -7;
-                break;
-        case WIRELESS_MODE_G:
-        case WIRELESS_MODE_N_24G:
-                offset = -8;
-                break;
-        default:
-                offset = -8;
-                break;
-        }
-
-        if ((power_indbm - offset) > 0)
-                txpwridx = (u8) ((power_indbm - offset) * 2);
-        else
-                txpwridx = 0;
-
-        if (txpwridx > MAX_TXPWR_IDX_NMODE_92S)
-                txpwridx = MAX_TXPWR_IDX_NMODE_92S;
-
-        return txpwridx;
-}
-
-static long _rtl92c_phy_txpwr_idx_to_dbm(struct ieee80211_hw *hw,
-                                         enum wireless_mode wirelessmode,
-                                         u8 txpwridx)
-{
-        long offset;
-        long pwrout_dbm;
-
-        switch (wirelessmode) {
-        case WIRELESS_MODE_B:
-                offset = -7;
-                break;
-        case WIRELESS_MODE_G:
-        case WIRELESS_MODE_N_24G:
-                offset = -8;
-                break;
-        default:
-                offset = -8;
-                break;
-        }
-        pwrout_dbm = txpwridx / 2 + offset;
-        return pwrout_dbm;
-}
-
-void rtl92c_phy_scan_operation_backup(struct ieee80211_hw *hw, u8 operation)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
-        enum io_type iotype;
-
-        if (!is_hal_stop(rtlhal)) {
-                switch (operation) {
-                case SCAN_OPT_BACKUP:
-                        iotype = IO_CMD_PAUSE_DM_BY_SCAN;
-                        rtlpriv->cfg->ops->set_hw_reg(hw,
-                                                      HW_VAR_IO_CMD,
-                                                      (u8 *)&iotype);
-
-                        break;
-                case SCAN_OPT_RESTORE:
-                        iotype = IO_CMD_RESUME_DM_BY_SCAN;
-                        rtlpriv->cfg->ops->set_hw_reg(hw,
-                                                      HW_VAR_IO_CMD,
-                                                      (u8 *)&iotype);
-                        break;
-                default:
-                        RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
-                                 ("Unknown Scan Backup operation.\n"));
-                        break;
-                }
-        }
-}
-
 void rtl92c_phy_set_bw_mode_callback(struct ieee80211_hw *hw)
 {
         struct rtl_priv *rtlpriv = rtl_priv(hw);
@@ -1183,644 +435,6 @@ void rtl92c_phy_set_bw_mode_callback(struct ieee80211_hw *hw)
         RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE, ("<==\n"));
 }
 
-void rtl92c_phy_set_bw_mode(struct ieee80211_hw *hw,
-                            enum nl80211_channel_type ch_type)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        struct rtl_phy *rtlphy = &(rtlpriv->phy);
-        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
-        u8 tmp_bw = rtlphy->current_chan_bw;
-
-        if (rtlphy->set_bwmode_inprogress)
-                return;
-        rtlphy->set_bwmode_inprogress = true;
-        if ((!is_hal_stop(rtlhal)) && !(RT_CANNOT_IO(hw)))
-                rtl92c_phy_set_bw_mode_callback(hw);
-        else {
-                RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
-                         ("FALSE driver sleep or unload\n"));
-                rtlphy->set_bwmode_inprogress = false;
-                rtlphy->current_chan_bw = tmp_bw;
-        }
-}
-
-void rtl92c_phy_sw_chnl_callback(struct ieee80211_hw *hw)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
-        struct rtl_phy *rtlphy = &(rtlpriv->phy);
-        u32 delay;
-
-        RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE,
-                 ("switch to channel%d\n", rtlphy->current_channel));
-        if (is_hal_stop(rtlhal))
-                return;
-        do {
-                if (!rtlphy->sw_chnl_inprogress)
-                        break;
-                if (!_rtl92c_phy_sw_chnl_step_by_step
-                    (hw, rtlphy->current_channel, &rtlphy->sw_chnl_stage,
-                     &rtlphy->sw_chnl_step, &delay)) {
-                        if (delay > 0)
-                                mdelay(delay);
-                        else
-                                continue;
-                } else
-                        rtlphy->sw_chnl_inprogress = false;
-                break;
-        } while (true);
-        RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE, ("<==\n"));
-}
-
-u8 rtl92c_phy_sw_chnl(struct ieee80211_hw *hw)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        struct rtl_phy *rtlphy = &(rtlpriv->phy);
-        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
-
-        if (rtlphy->sw_chnl_inprogress)
-                return 0;
-        if (rtlphy->set_bwmode_inprogress)
-                return 0;
-        RT_ASSERT((rtlphy->current_channel <= 14),
-                  ("WIRELESS_MODE_G but channel>14"));
-        rtlphy->sw_chnl_inprogress = true;
-        rtlphy->sw_chnl_stage = 0;
-        rtlphy->sw_chnl_step = 0;
-        if (!(is_hal_stop(rtlhal)) && !(RT_CANNOT_IO(hw))) {
-                rtl92c_phy_sw_chnl_callback(hw);
-                RT_TRACE(rtlpriv, COMP_CHAN, DBG_LOUD,
-                         ("sw_chnl_inprogress false schdule workitem\n"));
-                rtlphy->sw_chnl_inprogress = false;
-        } else {
-                RT_TRACE(rtlpriv, COMP_CHAN, DBG_LOUD,
-                         ("sw_chnl_inprogress false driver sleep or"
-                          " unload\n"));
-                rtlphy->sw_chnl_inprogress = false;
-        }
-        return 1;
-}
-
-static bool _rtl92c_phy_sw_chnl_step_by_step(struct ieee80211_hw *hw,
-                                             u8 channel, u8 *stage, u8 *step,
-                                             u32 *delay)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        struct rtl_phy *rtlphy = &(rtlpriv->phy);
-        struct swchnlcmd precommoncmd[MAX_PRECMD_CNT];
-        u32 precommoncmdcnt;
-        struct swchnlcmd postcommoncmd[MAX_POSTCMD_CNT];
-        u32 postcommoncmdcnt;
-        struct swchnlcmd rfdependcmd[MAX_RFDEPENDCMD_CNT];
-        u32 rfdependcmdcnt;
-        struct swchnlcmd *currentcmd = NULL;
-        u8 rfpath;
-        u8 num_total_rfpath = rtlphy->num_total_rfpath;
-
-        precommoncmdcnt = 0;
-        _rtl92c_phy_set_sw_chnl_cmdarray(precommoncmd, precommoncmdcnt++,
-                                         MAX_PRECMD_CNT,
-                                         CMDID_SET_TXPOWEROWER_LEVEL, 0, 0, 0);
-        _rtl92c_phy_set_sw_chnl_cmdarray(precommoncmd, precommoncmdcnt++,
-                                         MAX_PRECMD_CNT, CMDID_END, 0, 0, 0);
-
-        postcommoncmdcnt = 0;
-
-        _rtl92c_phy_set_sw_chnl_cmdarray(postcommoncmd, postcommoncmdcnt++,
-                                         MAX_POSTCMD_CNT, CMDID_END, 0, 0, 0);
-
-        rfdependcmdcnt = 0;
-
-        RT_ASSERT((channel >= 1 && channel <= 14),
-                  ("illegal channel for Zebra: %d\n", channel));
-
-        _rtl92c_phy_set_sw_chnl_cmdarray(rfdependcmd, rfdependcmdcnt++,
-                                         MAX_RFDEPENDCMD_CNT, CMDID_RF_WRITEREG,
-                                         RF_CHNLBW, channel, 10);
-
-        _rtl92c_phy_set_sw_chnl_cmdarray(rfdependcmd, rfdependcmdcnt++,
-                                         MAX_RFDEPENDCMD_CNT, CMDID_END, 0, 0,
-                                         0);
-
-        do {
-                switch (*stage) {
-                case 0:
-                        currentcmd = &precommoncmd[*step];
-                        break;
-                case 1:
-                        currentcmd = &rfdependcmd[*step];
-                        break;
-                case 2:
-                        currentcmd = &postcommoncmd[*step];
-                        break;
-                }
-
-                if (currentcmd->cmdid == CMDID_END) {
-                        if ((*stage) == 2) {
-                                return true;
-                        } else {
-                                (*stage)++;
-                                (*step) = 0;
-                                continue;
-                        }
-                }
-
-                switch (currentcmd->cmdid) {
-                case CMDID_SET_TXPOWEROWER_LEVEL:
-                        rtl92c_phy_set_txpower_level(hw, channel);
-                        break;
-                case CMDID_WRITEPORT_ULONG:
-                        rtl_write_dword(rtlpriv, currentcmd->para1,
-                                        currentcmd->para2);
-                        break;
-                case CMDID_WRITEPORT_USHORT:
-                        rtl_write_word(rtlpriv, currentcmd->para1,
-                                       (u16) currentcmd->para2);
-                        break;
-                case CMDID_WRITEPORT_UCHAR:
-                        rtl_write_byte(rtlpriv, currentcmd->para1,
-                                       (u8) currentcmd->para2);
-                        break;
-                case CMDID_RF_WRITEREG:
-                        for (rfpath = 0; rfpath < num_total_rfpath; rfpath++) {
-                                rtlphy->rfreg_chnlval[rfpath] =
-                                    ((rtlphy->rfreg_chnlval[rfpath] &
-                                      0xfffffc00) | currentcmd->para2);
-
-                                rtl_set_rfreg(hw, (enum radio_path)rfpath,
-                                              currentcmd->para1,
-                                              RFREG_OFFSET_MASK,
-                                              rtlphy->rfreg_chnlval[rfpath]);
-                        }
-                        break;
-                default:
-                        RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
-                                 ("switch case not process\n"));
-                        break;
-                }
-
-                break;
-        } while (true);
-
-        (*delay) = currentcmd->msdelay;
-        (*step)++;
-        return false;
-}
-
-static bool _rtl92c_phy_set_sw_chnl_cmdarray(struct swchnlcmd *cmdtable,
-                                             u32 cmdtableidx, u32 cmdtablesz,
-                                             enum swchnlcmd_id cmdid,
-                                             u32 para1, u32 para2, u32 msdelay)
-{
-        struct swchnlcmd *pcmd;
-
-        if (cmdtable == NULL) {
-                RT_ASSERT(false, ("cmdtable cannot be NULL.\n"));
-                return false;
-        }
-
-        if (cmdtableidx >= cmdtablesz)
-                return false;
-
-        pcmd = cmdtable + cmdtableidx;
-        pcmd->cmdid = cmdid;
-        pcmd->para1 = para1;
-        pcmd->para2 = para2;
-        pcmd->msdelay = msdelay;
-        return true;
-}
-
-bool rtl8192_phy_check_is_legal_rfpath(struct ieee80211_hw *hw, u32 rfpath)
-{
-        return true;
-}
-
-static u8 _rtl92c_phy_path_a_iqk(struct ieee80211_hw *hw, bool config_pathb)
-{
-        u32 reg_eac, reg_e94, reg_e9c, reg_ea4;
-        u8 result = 0x00;
-
-        rtl_set_bbreg(hw, 0xe30, MASKDWORD, 0x10008c1f);
-        rtl_set_bbreg(hw, 0xe34, MASKDWORD, 0x10008c1f);
-        rtl_set_bbreg(hw, 0xe38, MASKDWORD, 0x82140102);
-        rtl_set_bbreg(hw, 0xe3c, MASKDWORD,
-                      config_pathb ? 0x28160202 : 0x28160502);
-
-        if (config_pathb) {
-                rtl_set_bbreg(hw, 0xe50, MASKDWORD, 0x10008c22);
-                rtl_set_bbreg(hw, 0xe54, MASKDWORD, 0x10008c22);
-                rtl_set_bbreg(hw, 0xe58, MASKDWORD, 0x82140102);
-                rtl_set_bbreg(hw, 0xe5c, MASKDWORD, 0x28160202);
-        }
-
-        rtl_set_bbreg(hw, 0xe4c, MASKDWORD, 0x001028d1);
-        rtl_set_bbreg(hw, 0xe48, MASKDWORD, 0xf9000000);
-        rtl_set_bbreg(hw, 0xe48, MASKDWORD, 0xf8000000);
-
-        mdelay(IQK_DELAY_TIME);
-
-        reg_eac = rtl_get_bbreg(hw, 0xeac, MASKDWORD);
-        reg_e94 = rtl_get_bbreg(hw, 0xe94, MASKDWORD);
-        reg_e9c = rtl_get_bbreg(hw, 0xe9c, MASKDWORD);
-        reg_ea4 = rtl_get_bbreg(hw, 0xea4, MASKDWORD);
-
-        if (!(reg_eac & BIT(28)) &&
-            (((reg_e94 & 0x03FF0000) >> 16) != 0x142) &&
-            (((reg_e9c & 0x03FF0000) >> 16) != 0x42))
-                result |= 0x01;
-        else
-                return result;
-
-        if (!(reg_eac & BIT(27)) &&
-            (((reg_ea4 & 0x03FF0000) >> 16) != 0x132) &&
-            (((reg_eac & 0x03FF0000) >> 16) != 0x36))
-                result |= 0x02;
-        return result;
-}
-
-static u8 _rtl92c_phy_path_b_iqk(struct ieee80211_hw *hw)
-{
-        u32 reg_eac, reg_eb4, reg_ebc, reg_ec4, reg_ecc;
-        u8 result = 0x00;
-
-        rtl_set_bbreg(hw, 0xe60, MASKDWORD, 0x00000002);
-        rtl_set_bbreg(hw, 0xe60, MASKDWORD, 0x00000000);
-        mdelay(IQK_DELAY_TIME);
-        reg_eac = rtl_get_bbreg(hw, 0xeac, MASKDWORD);
-        reg_eb4 = rtl_get_bbreg(hw, 0xeb4, MASKDWORD);
-        reg_ebc = rtl_get_bbreg(hw, 0xebc, MASKDWORD);
-        reg_ec4 = rtl_get_bbreg(hw, 0xec4, MASKDWORD);
-        reg_ecc = rtl_get_bbreg(hw, 0xecc, MASKDWORD);
-        if (!(reg_eac & BIT(31)) &&
-            (((reg_eb4 & 0x03FF0000) >> 16) != 0x142) &&
-            (((reg_ebc & 0x03FF0000) >> 16) != 0x42))
-                result |= 0x01;
-        else
-                return result;
-
-        if (!(reg_eac & BIT(30)) &&
-            (((reg_ec4 & 0x03FF0000) >> 16) != 0x132) &&
-            (((reg_ecc & 0x03FF0000) >> 16) != 0x36))
-                result |= 0x02;
-        return result;
-}
-
-static void _rtl92c_phy_path_a_fill_iqk_matrix(struct ieee80211_hw *hw,
-                                               bool b_iqk_ok, long result[][8],
-                                               u8 final_candidate, bool btxonly)
-{
-        u32 oldval_0, x, tx0_a, reg;
-        long y, tx0_c;
-
-        if (final_candidate == 0xFF)
-                return;
-        else if (b_iqk_ok) {
-                oldval_0 = (rtl_get_bbreg(hw, ROFDM0_XATXIQIMBALANCE,
-                                          MASKDWORD) >> 22) & 0x3FF;
-                x = result[final_candidate][0];
-                if ((x & 0x00000200) != 0)
-                        x = x | 0xFFFFFC00;
-                tx0_a = (x * oldval_0) >> 8;
-                rtl_set_bbreg(hw, ROFDM0_XATXIQIMBALANCE, 0x3FF, tx0_a);
-                rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, BIT(31),
-                              ((x * oldval_0 >> 7) & 0x1));
-                y = result[final_candidate][1];
-                if ((y & 0x00000200) != 0)
-                        y = y | 0xFFFFFC00;
-                tx0_c = (y * oldval_0) >> 8;
-                rtl_set_bbreg(hw, ROFDM0_XCTXAFE, 0xF0000000,
-                              ((tx0_c & 0x3C0) >> 6));
-                rtl_set_bbreg(hw, ROFDM0_XATXIQIMBALANCE, 0x003F0000,
-                              (tx0_c & 0x3F));
-                rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, BIT(29),
-                              ((y * oldval_0 >> 7) & 0x1));
-                if (btxonly)
-                        return;
-                reg = result[final_candidate][2];
-                rtl_set_bbreg(hw, ROFDM0_XARXIQIMBALANCE, 0x3FF, reg);
-                reg = result[final_candidate][3] & 0x3F;
-                rtl_set_bbreg(hw, ROFDM0_XARXIQIMBALANCE, 0xFC00, reg);
-                reg = (result[final_candidate][3] >> 6) & 0xF;
-                rtl_set_bbreg(hw, 0xca0, 0xF0000000, reg);
-        }
-}
-
-static void _rtl92c_phy_path_b_fill_iqk_matrix(struct ieee80211_hw *hw,
-                                               bool b_iqk_ok, long result[][8],
-                                               u8 final_candidate, bool btxonly)
-{
-        u32 oldval_1, x, tx1_a, reg;
-        long y, tx1_c;
-
-        if (final_candidate == 0xFF)
-                return;
-        else if (b_iqk_ok) {
-                oldval_1 = (rtl_get_bbreg(hw, ROFDM0_XBTXIQIMBALANCE,
-                                          MASKDWORD) >> 22) & 0x3FF;
-                x = result[final_candidate][4];
-                if ((x & 0x00000200) != 0)
-                        x = x | 0xFFFFFC00;
-                tx1_a = (x * oldval_1) >> 8;
-                rtl_set_bbreg(hw, ROFDM0_XBTXIQIMBALANCE, 0x3FF, tx1_a);
-                rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, BIT(27),
-                              ((x * oldval_1 >> 7) & 0x1));
-                y = result[final_candidate][5];
-                if ((y & 0x00000200) != 0)
-                        y = y | 0xFFFFFC00;
-                tx1_c = (y * oldval_1) >> 8;
-                rtl_set_bbreg(hw, ROFDM0_XDTXAFE, 0xF0000000,
-                              ((tx1_c & 0x3C0) >> 6));
-                rtl_set_bbreg(hw, ROFDM0_XBTXIQIMBALANCE, 0x003F0000,
-                              (tx1_c & 0x3F));
-                rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, BIT(25),
-                              ((y * oldval_1 >> 7) & 0x1));
-                if (btxonly)
-                        return;
-                reg = result[final_candidate][6];
-                rtl_set_bbreg(hw, ROFDM0_XBRXIQIMBALANCE, 0x3FF, reg);
-                reg = result[final_candidate][7] & 0x3F;
-                rtl_set_bbreg(hw, ROFDM0_XBRXIQIMBALANCE, 0xFC00, reg);
-                reg = (result[final_candidate][7] >> 6) & 0xF;
-                rtl_set_bbreg(hw, ROFDM0_AGCRSSITABLE, 0x0000F000, reg);
-        }
-}
-
-static void _rtl92c_phy_save_adda_registers(struct ieee80211_hw *hw,
-                                            u32 *addareg, u32 *addabackup,
-                                            u32 registernum)
-{
-        u32 i;
-
-        for (i = 0; i < registernum; i++)
-                addabackup[i] = rtl_get_bbreg(hw, addareg[i], MASKDWORD);
-}
-
-static void _rtl92c_phy_save_mac_registers(struct ieee80211_hw *hw,
-                                           u32 *macreg, u32 *macbackup)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        u32 i;
-
-        for (i = 0; i < (IQK_MAC_REG_NUM - 1); i++)
-                macbackup[i] = rtl_read_byte(rtlpriv, macreg[i]);
-        macbackup[i] = rtl_read_dword(rtlpriv, macreg[i]);
-}
-
-static void _rtl92c_phy_reload_adda_registers(struct ieee80211_hw *hw,
-                                              u32 *addareg, u32 *addabackup,
-                                              u32 regiesternum)
-{
-        u32 i;
-
-        for (i = 0; i < regiesternum; i++)
-                rtl_set_bbreg(hw, addareg[i], MASKDWORD, addabackup[i]);
-}
-
-static void _rtl92c_phy_reload_mac_registers(struct ieee80211_hw *hw,
-                                             u32 *macreg, u32 *macbackup)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        u32 i;
-
-        for (i = 0; i < (IQK_MAC_REG_NUM - 1); i++)
-                rtl_write_byte(rtlpriv, macreg[i], (u8) macbackup[i]);
-        rtl_write_dword(rtlpriv, macreg[i], macbackup[i]);
-}
-
-static void _rtl92c_phy_path_adda_on(struct ieee80211_hw *hw,
-                                     u32 *addareg, bool is_patha_on, bool is2t)
-{
-        u32 pathOn;
-        u32 i;
-
-        pathOn = is_patha_on ? 0x04db25a4 : 0x0b1b25a4;
-        if (false == is2t) {
-                pathOn = 0x0bdb25a0;
-                rtl_set_bbreg(hw, addareg[0], MASKDWORD, 0x0b1b25a0);
-        } else {
-                rtl_set_bbreg(hw, addareg[0], MASKDWORD, pathOn);
-        }
-
-        for (i = 1; i < IQK_ADDA_REG_NUM; i++)
-                rtl_set_bbreg(hw, addareg[i], MASKDWORD, pathOn);
-}
-
-static void _rtl92c_phy_mac_setting_calibration(struct ieee80211_hw *hw,
-                                                u32 *macreg, u32 *macbackup)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        u32 i;
-
-        rtl_write_byte(rtlpriv, macreg[0], 0x3F);
-
-        for (i = 1; i < (IQK_MAC_REG_NUM - 1); i++)
-                rtl_write_byte(rtlpriv, macreg[i],
-                               (u8) (macbackup[i] & (~BIT(3))));
-        rtl_write_byte(rtlpriv, macreg[i], (u8) (macbackup[i] & (~BIT(5))));
-}
-
-static void _rtl92c_phy_path_a_standby(struct ieee80211_hw *hw)
-{
-        rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x0);
-        rtl_set_bbreg(hw, 0x840, MASKDWORD, 0x00010000);
-        rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x80800000);
-}
-
-static void _rtl92c_phy_pi_mode_switch(struct ieee80211_hw *hw, bool pi_mode)
-{
-        u32 mode;
-
-        mode = pi_mode ? 0x01000100 : 0x01000000;
-        rtl_set_bbreg(hw, 0x820, MASKDWORD, mode);
-        rtl_set_bbreg(hw, 0x828, MASKDWORD, mode);
-}
-
-static bool _rtl92c_phy_simularity_compare(struct ieee80211_hw *hw,
-                                           long result[][8], u8 c1, u8 c2)
-{
-        u32 i, j, diff, simularity_bitmap, bound;
-        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
-
-        u8 final_candidate[2] = { 0xFF, 0xFF };
-        bool bresult = true, is2t = IS_92C_SERIAL(rtlhal->version);
-
-        if (is2t)
-                bound = 8;
-        else
-                bound = 4;
-
-        simularity_bitmap = 0;
-
-        for (i = 0; i < bound; i++) {
-                diff = (result[c1][i] > result[c2][i]) ?
-                    (result[c1][i] - result[c2][i]) :
-                    (result[c2][i] - result[c1][i]);
-
-                if (diff > MAX_TOLERANCE) {
-                        if ((i == 2 || i == 6) && !simularity_bitmap) {
-                                if (result[c1][i] + result[c1][i + 1] == 0)
-                                        final_candidate[(i / 4)] = c2;
-                                else if (result[c2][i] + result[c2][i + 1] == 0)
-                                        final_candidate[(i / 4)] = c1;
-                                else
-                                        simularity_bitmap = simularity_bitmap |
-                                            (1 << i);
-                        } else
-                                simularity_bitmap =
-                                    simularity_bitmap | (1 << i);
-                }
-        }
-
-        if (simularity_bitmap == 0) {
-                for (i = 0; i < (bound / 4); i++) {
-                        if (final_candidate[i] != 0xFF) {
-                                for (j = i * 4; j < (i + 1) * 4 - 2; j++)
-                                        result[3][j] =
-                                            result[final_candidate[i]][j];
-                                bresult = false;
-                        }
-                }
-                return bresult;
-        } else if (!(simularity_bitmap & 0x0F)) {
-                for (i = 0; i < 4; i++)
-                        result[3][i] = result[c1][i];
-                return false;
-        } else if (!(simularity_bitmap & 0xF0) && is2t) {
-                for (i = 4; i < 8; i++)
-                        result[3][i] = result[c1][i];
-                return false;
-        } else {
-                return false;
-        }
-
-}
-
-static void _rtl92c_phy_iq_calibrate(struct ieee80211_hw *hw,
-                                     long result[][8], u8 t, bool is2t)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        struct rtl_phy *rtlphy = &(rtlpriv->phy);
-        u32 i;
-        u8 patha_ok, pathb_ok;
-        u32 adda_reg[IQK_ADDA_REG_NUM] = {
-                0x85c, 0xe6c, 0xe70, 0xe74,
-                0xe78, 0xe7c, 0xe80, 0xe84,
-                0xe88, 0xe8c, 0xed0, 0xed4,
-                0xed8, 0xedc, 0xee0, 0xeec
-        };
-
-        u32 iqk_mac_reg[IQK_MAC_REG_NUM] = {
-                0x522, 0x550, 0x551, 0x040
-        };
-
-        const u32 retrycount = 2;
-
-        u32 bbvalue;
-
-        if (t == 0) {
-                bbvalue = rtl_get_bbreg(hw, 0x800, MASKDWORD);
-
-                _rtl92c_phy_save_adda_registers(hw, adda_reg,
-                                                rtlphy->adda_backup, 16);
-                _rtl92c_phy_save_mac_registers(hw, iqk_mac_reg,
-                                               rtlphy->iqk_mac_backup);
-        }
-        _rtl92c_phy_path_adda_on(hw, adda_reg, true, is2t);
-        if (t == 0) {
-                rtlphy->b_rfpi_enable = (u8) rtl_get_bbreg(hw,
-                                                   RFPGA0_XA_HSSIPARAMETER1,
-                                                   BIT(8));
-        }
-        if (!rtlphy->b_rfpi_enable)
-                _rtl92c_phy_pi_mode_switch(hw, true);
-        if (t == 0) {
-                rtlphy->reg_c04 = rtl_get_bbreg(hw, 0xc04, MASKDWORD);
-                rtlphy->reg_c08 = rtl_get_bbreg(hw, 0xc08, MASKDWORD);
-                rtlphy->reg_874 = rtl_get_bbreg(hw, 0x874, MASKDWORD);
-        }
-        rtl_set_bbreg(hw, 0xc04, MASKDWORD, 0x03a05600);
-        rtl_set_bbreg(hw, 0xc08, MASKDWORD, 0x000800e4);
-        rtl_set_bbreg(hw, 0x874, MASKDWORD, 0x22204000);
-        if (is2t) {
-                rtl_set_bbreg(hw, 0x840, MASKDWORD, 0x00010000);
-                rtl_set_bbreg(hw, 0x844, MASKDWORD, 0x00010000);
-        }
-        _rtl92c_phy_mac_setting_calibration(hw, iqk_mac_reg,
-                                            rtlphy->iqk_mac_backup);
-        rtl_set_bbreg(hw, 0xb68, MASKDWORD, 0x00080000);
-        if (is2t)
-                rtl_set_bbreg(hw, 0xb6c, MASKDWORD, 0x00080000);
-        rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x80800000);
-        rtl_set_bbreg(hw, 0xe40, MASKDWORD, 0x01007c00);
-        rtl_set_bbreg(hw, 0xe44, MASKDWORD, 0x01004800);
-        for (i = 0; i < retrycount; i++) {
-                patha_ok = _rtl92c_phy_path_a_iqk(hw, is2t);
-                if (patha_ok == 0x03) {
-                        result[t][0] = (rtl_get_bbreg(hw, 0xe94, MASKDWORD) &
-                                        0x3FF0000) >> 16;
-                        result[t][1] = (rtl_get_bbreg(hw, 0xe9c, MASKDWORD) &
-                                        0x3FF0000) >> 16;
-                        result[t][2] = (rtl_get_bbreg(hw, 0xea4, MASKDWORD) &
-                                        0x3FF0000) >> 16;
-                        result[t][3] = (rtl_get_bbreg(hw, 0xeac, MASKDWORD) &
-                                        0x3FF0000) >> 16;
-                        break;
-                } else if (i == (retrycount - 1) && patha_ok == 0x01)
-                        result[t][0] = (rtl_get_bbreg(hw, 0xe94,
-                                                      MASKDWORD) & 0x3FF0000) >>
-                                                      16;
-                result[t][1] =
-                    (rtl_get_bbreg(hw, 0xe9c, MASKDWORD) & 0x3FF0000) >> 16;
-
-        }
-
-        if (is2t) {
-                _rtl92c_phy_path_a_standby(hw);
-                _rtl92c_phy_path_adda_on(hw, adda_reg, false, is2t);
-                for (i = 0; i < retrycount; i++) {
-                        pathb_ok = _rtl92c_phy_path_b_iqk(hw);
-                        if (pathb_ok == 0x03) {
-                                result[t][4] = (rtl_get_bbreg(hw,
-                                                      0xeb4,
-                                                      MASKDWORD) &
-                                                0x3FF0000) >> 16;
-                                result[t][5] =
-                                    (rtl_get_bbreg(hw, 0xebc, MASKDWORD) &
-                                     0x3FF0000) >> 16;
-                                result[t][6] =
-                                    (rtl_get_bbreg(hw, 0xec4, MASKDWORD) &
-                                     0x3FF0000) >> 16;
-                                result[t][7] =
-                                    (rtl_get_bbreg(hw, 0xecc, MASKDWORD) &
-                                     0x3FF0000) >> 16;
-                                break;
-                        } else if (i == (retrycount - 1) && pathb_ok == 0x01) {
-                                result[t][4] = (rtl_get_bbreg(hw,
-                                                      0xeb4,
-                                                      MASKDWORD) &
-                                                0x3FF0000) >> 16;
-                        }
-                        result[t][5] = (rtl_get_bbreg(hw, 0xebc, MASKDWORD) &
-                                        0x3FF0000) >> 16;
-                }
-        }
-        rtl_set_bbreg(hw, 0xc04, MASKDWORD, rtlphy->reg_c04);
-        rtl_set_bbreg(hw, 0x874, MASKDWORD, rtlphy->reg_874);
-        rtl_set_bbreg(hw, 0xc08, MASKDWORD, rtlphy->reg_c08);
-        rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0);
-        rtl_set_bbreg(hw, 0x840, MASKDWORD, 0x00032ed3);
-        if (is2t)
-                rtl_set_bbreg(hw, 0x844, MASKDWORD, 0x00032ed3);
-        if (t != 0) {
-                if (!rtlphy->b_rfpi_enable)
-                        _rtl92c_phy_pi_mode_switch(hw, false);
-                _rtl92c_phy_reload_adda_registers(hw, adda_reg,
-                                                  rtlphy->adda_backup, 16);
-                _rtl92c_phy_reload_mac_registers(hw, iqk_mac_reg,
-                                                 rtlphy->iqk_mac_backup);
-        }
-}
-
 static void _rtl92c_phy_lc_calibrate(struct ieee80211_hw *hw, bool is2t)
 {
         u8 tmpreg;
@@ -1866,666 +480,6 @@ static void _rtl92c_phy_lc_calibrate(struct ieee80211_hw *hw, bool is2t)
         }
 }
 
-static void _rtl92c_phy_ap_calibrate(struct ieee80211_hw *hw,
-                                     char delta, bool is2t)
-{
-        /* This routine is deliberately dummied out for later fixes */
-#if 0
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        struct rtl_phy *rtlphy = &(rtlpriv->phy);
-        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
-
-        u32 reg_d[PATH_NUM];
-        u32 tmpreg, index, offset, path, i, pathbound = PATH_NUM, apkbound;
-
-        u32 bb_backup[APK_BB_REG_NUM];
-        u32 bb_reg[APK_BB_REG_NUM] = {
-                0x904, 0xc04, 0x800, 0xc08, 0x874
-        };
-        u32 bb_ap_mode[APK_BB_REG_NUM] = {
-                0x00000020, 0x00a05430, 0x02040000,
-                0x000800e4, 0x00204000
-        };
-        u32 bb_normal_ap_mode[APK_BB_REG_NUM] = {
-                0x00000020, 0x00a05430, 0x02040000,
-                0x000800e4, 0x22204000
-        };
-
-        u32 afe_backup[APK_AFE_REG_NUM];
-        u32 afe_reg[APK_AFE_REG_NUM] = {
-                0x85c, 0xe6c, 0xe70, 0xe74, 0xe78,
-                0xe7c, 0xe80, 0xe84, 0xe88, 0xe8c,
-                0xed0, 0xed4, 0xed8, 0xedc, 0xee0,
-                0xeec
-        };
-
-        u32 mac_backup[IQK_MAC_REG_NUM];
-        u32 mac_reg[IQK_MAC_REG_NUM] = {
-                0x522, 0x550, 0x551, 0x040
-        };
-
-        u32 apk_rf_init_value[PATH_NUM][APK_BB_REG_NUM] = {
-                {0x0852c, 0x1852c, 0x5852c, 0x1852c, 0x5852c},
-                {0x2852e, 0x0852e, 0x3852e, 0x0852e, 0x0852e}
-        };
-
-        u32 apk_normal_rf_init_value[PATH_NUM][APK_BB_REG_NUM] = {
-                {0x0852c, 0x0a52c, 0x3a52c, 0x5a52c, 0x5a52c},
-                {0x0852c, 0x0a52c, 0x5a52c, 0x5a52c, 0x5a52c}
-        };
-
-        u32 apk_rf_value_0[PATH_NUM][APK_BB_REG_NUM] = {
-                {0x52019, 0x52014, 0x52013, 0x5200f, 0x5208d},
-                {0x5201a, 0x52019, 0x52016, 0x52033, 0x52050}
-        };
-
-        u32 apk_normal_rf_value_0[PATH_NUM][APK_BB_REG_NUM] = {
-                {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a},
-                {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a}
-        };
-
-        u32 afe_on_off[PATH_NUM] = {
-                0x04db25a4, 0x0b1b25a4
-        };
-
-        u32 apk_offset[PATH_NUM] = { 0xb68, 0xb6c };
-
-        u32 apk_normal_offset[PATH_NUM] = { 0xb28, 0xb98 };
-
-        u32 apk_value[PATH_NUM] = { 0x92fc0000, 0x12fc0000 };
-
-        u32 apk_normal_value[PATH_NUM] = { 0x92680000, 0x12680000 };
-
-        const char apk_delta_mapping[APK_BB_REG_NUM][13] = {
-                {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6},
-                {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6},
-                {-6, -4, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6},
-                {-1, -1, -1, -1, -1, -1, 0, 1, 2, 3, 4, 5, 6},
-                {-11, -9, -7, -5, -3, -1, 0, 0, 0, 0, 0, 0, 0}
-        };
-
-        const u32 apk_normal_setting_value_1[13] = {
-                0x01017018, 0xf7ed8f84, 0x1b1a1816, 0x2522201e, 0x322e2b28,
-                0x433f3a36, 0x5b544e49, 0x7b726a62, 0xa69a8f84, 0xdfcfc0b3,
-                0x12680000, 0x00880000, 0x00880000
-        };
-
-        const u32 apk_normal_setting_value_2[16] = {
-                0x01c7021d, 0x01670183, 0x01000123, 0x00bf00e2, 0x008d00a3,
-                0x0068007b, 0x004d0059, 0x003a0042, 0x002b0031, 0x001f0025,
-                0x0017001b, 0x00110014, 0x000c000f, 0x0009000b, 0x00070008,
-                0x00050006
-        };
-
-        const u32 apk_result[PATH_NUM][APK_BB_REG_NUM];
-
-        long bb_offset, delta_v, delta_offset;
-
-        if (!is2t)
-                pathbound = 1;
-
-        for (index = 0; index < PATH_NUM; index++) {
-                apk_offset[index] = apk_normal_offset[index];
-                apk_value[index] = apk_normal_value[index];
-                afe_on_off[index] = 0x6fdb25a4;
-        }
-
-        for (index = 0; index < APK_BB_REG_NUM; index++) {
-                for (path = 0; path < pathbound; path++) {
-                        apk_rf_init_value[path][index] =
-                            apk_normal_rf_init_value[path][index];
-                        apk_rf_value_0[path][index] =
-                            apk_normal_rf_value_0[path][index];
-                }
-                bb_ap_mode[index] = bb_normal_ap_mode[index];
-
-                apkbound = 6;
-        }
-
-        for (index = 0; index < APK_BB_REG_NUM; index++) {
-                if (index == 0)
-                        continue;
-                bb_backup[index] = rtl_get_bbreg(hw, bb_reg[index], MASKDWORD);
-        }
-
-        _rtl92c_phy_save_mac_registers(hw, mac_reg, mac_backup);
-
-        _rtl92c_phy_save_adda_registers(hw, afe_reg, afe_backup, 16);
-
-        for (path = 0; path < pathbound; path++) {
-                if (path == RF90_PATH_A) {
-                        offset = 0xb00;
-                        for (index = 0; index < 11; index++) {
-                                rtl_set_bbreg(hw, offset, MASKDWORD,
-                                              apk_normal_setting_value_1
-                                              [index]);
-
-                                offset += 0x04;
-                        }
-
-                        rtl_set_bbreg(hw, 0xb98, MASKDWORD, 0x12680000);
-
-                        offset = 0xb68;
-                        for (; index < 13; index++) {
-                                rtl_set_bbreg(hw, offset, MASKDWORD,
-                                              apk_normal_setting_value_1
-                                              [index]);
-
-                                offset += 0x04;
-                        }
-
-                        rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x40000000);
-
-                        offset = 0xb00;
-                        for (index = 0; index < 16; index++) {
-                                rtl_set_bbreg(hw, offset, MASKDWORD,
-                                              apk_normal_setting_value_2
-                                              [index]);
-
-                                offset += 0x04;
-                        }
-                        rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x00000000);
-                } else if (path == RF90_PATH_B) {
-                        offset = 0xb70;
-                        for (index = 0; index < 10; index++) {
-                                rtl_set_bbreg(hw, offset, MASKDWORD,
-                                              apk_normal_setting_value_1
-                                              [index]);
-
-                                offset += 0x04;
-                        }
-                        rtl_set_bbreg(hw, 0xb28, MASKDWORD, 0x12680000);
-                        rtl_set_bbreg(hw, 0xb98, MASKDWORD, 0x12680000);
-
-                        offset = 0xb68;
-                        index = 11;
-                        for (; index < 13; index++) {
-                                rtl_set_bbreg(hw, offset, MASKDWORD,
-                                              apk_normal_setting_value_1
-                                              [index]);
-
-                                offset += 0x04;
-                        }
-
-                        rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x40000000);
-
-                        offset = 0xb60;
-                        for (index = 0; index < 16; index++) {
-                                rtl_set_bbreg(hw, offset, MASKDWORD,
-                                              apk_normal_setting_value_2
-                                              [index]);
-
-                                offset += 0x04;
-                        }
-                        rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x00000000);
-                }
-
-                reg_d[path] = rtl_get_rfreg(hw, (enum radio_path)path,
-                                            0xd, MASKDWORD);
-
-                for (index = 0; index < APK_AFE_REG_NUM; index++)
-                        rtl_set_bbreg(hw, afe_reg[index], MASKDWORD,
-                                      afe_on_off[path]);
-
-                if (path == RF90_PATH_A) {
-                        for (index = 0; index < APK_BB_REG_NUM; index++) {
-                                if (index == 0)
-                                        continue;
-                                rtl_set_bbreg(hw, bb_reg[index], MASKDWORD,
-                                              bb_ap_mode[index]);
-                        }
-                }
-
-                _rtl92c_phy_mac_setting_calibration(hw, mac_reg, mac_backup);
-
-                if (path == 0) {
-                        rtl_set_rfreg(hw, RF90_PATH_B, 0x0, MASKDWORD, 0x10000);
-                } else {
-                        rtl_set_rfreg(hw, RF90_PATH_A, 0x00, MASKDWORD,
-                                      0x10000);
-                        rtl_set_rfreg(hw, RF90_PATH_A, 0x10, MASKDWORD,
-                                      0x1000f);
-                        rtl_set_rfreg(hw, RF90_PATH_A, 0x11, MASKDWORD,
-                                      0x20103);
-                }
-
-                delta_offset = ((delta + 14) / 2);
-                if (delta_offset < 0)
-                        delta_offset = 0;
-                else if (delta_offset > 12)
-                        delta_offset = 12;
-
-                for (index = 0; index < APK_BB_REG_NUM; index++) {
-                        if (index != 1)
-                                continue;
-
-                        tmpreg = apk_rf_init_value[path][index];
-
-                        if (!rtlefuse->b_apk_thermalmeterignore) {
-                                bb_offset = (tmpreg & 0xF0000) >> 16;
-
-                                if (!(tmpreg & BIT(15)))
-                                        bb_offset = -bb_offset;
-
-                                delta_v =
-                                    apk_delta_mapping[index][delta_offset];
-
-                                bb_offset += delta_v;
-
-                                if (bb_offset < 0) {
-                                        tmpreg = tmpreg & (~BIT(15));
-                                        bb_offset = -bb_offset;
-                                } else {
-                                        tmpreg = tmpreg | BIT(15);
-                                }
-
-                                tmpreg =
-                                    (tmpreg & 0xFFF0FFFF) | (bb_offset << 16);
-                        }
-
-                        rtl_set_rfreg(hw, (enum radio_path)path, 0xc,
-                                      MASKDWORD, 0x8992e);
-                        rtl_set_rfreg(hw, (enum radio_path)path, 0x0,
-                                      MASKDWORD, apk_rf_value_0[path][index]);
-                        rtl_set_rfreg(hw, (enum radio_path)path, 0xd,
-                                      MASKDWORD, tmpreg);
-
-                        i = 0;
-                        do {
-                                rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x80000000);
-                                rtl_set_bbreg(hw, apk_offset[path],
-                                              MASKDWORD, apk_value[0]);
-                                RTPRINT(rtlpriv, FINIT, INIT_IQK,
-                                        ("PHY_APCalibrate() offset 0x%x "
-                                         "value 0x%x\n",
-                                         apk_offset[path],
-                                         rtl_get_bbreg(hw, apk_offset[path],
-                                                       MASKDWORD)));
-
-                                mdelay(3);
-
-                                rtl_set_bbreg(hw, apk_offset[path],
-                                              MASKDWORD, apk_value[1]);
-                                RTPRINT(rtlpriv, FINIT, INIT_IQK,
-                                        ("PHY_APCalibrate() offset 0x%x "
-                                         "value 0x%x\n",
-                                         apk_offset[path],
-                                         rtl_get_bbreg(hw, apk_offset[path],
-                                                       MASKDWORD)));
-
-                                mdelay(20);
-
-                                rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x00000000);
-
-                                if (path == RF90_PATH_A)
-                                        tmpreg = rtl_get_bbreg(hw, 0xbd8,
-                                                               0x03E00000);
-                                else
-                                        tmpreg = rtl_get_bbreg(hw, 0xbd8,
-                                                               0xF8000000);
-
-                                RTPRINT(rtlpriv, FINIT, INIT_IQK,
-                                        ("PHY_APCalibrate() offset "
-                                         "0xbd8[25:21] %x\n", tmpreg));
-
-                                i++;
-
-                        } while (tmpreg > apkbound && i < 4);
-
-                        apk_result[path][index] = tmpreg;
-                }
-        }
-
-        _rtl92c_phy_reload_mac_registers(hw, mac_reg, mac_backup);
-
-        for (index = 0; index < APK_BB_REG_NUM; index++) {
-                if (index == 0)
-                        continue;
-                rtl_set_bbreg(hw, bb_reg[index], MASKDWORD, bb_backup[index]);
-        }
-
-        _rtl92c_phy_reload_adda_registers(hw, afe_reg, afe_backup, 16);
-
-        for (path = 0; path < pathbound; path++) {
-                rtl_set_rfreg(hw, (enum radio_path)path, 0xd,
-                              MASKDWORD, reg_d[path]);
-
-                if (path == RF90_PATH_B) {
-                        rtl_set_rfreg(hw, RF90_PATH_A, 0x10, MASKDWORD,
-                                      0x1000f);
-                        rtl_set_rfreg(hw, RF90_PATH_A, 0x11, MASKDWORD,
-                                      0x20101);
-                }
-
-                if (apk_result[path][1] > 6)
-                        apk_result[path][1] = 6;
-        }
-
-        for (path = 0; path < pathbound; path++) {
-                rtl_set_rfreg(hw, (enum radio_path)path, 0x3, MASKDWORD,
-                              ((apk_result[path][1] << 15) |
-                               (apk_result[path][1] << 10) |
-                               (apk_result[path][1] << 5) |
-                               apk_result[path][1]));
-
-                if (path == RF90_PATH_A)
-                        rtl_set_rfreg(hw, (enum radio_path)path, 0x4, MASKDWORD,
-                                      ((apk_result[path][1] << 15) |
-                                       (apk_result[path][1] << 10) |
-                                       (0x00 << 5) | 0x05));
-                else
-                        rtl_set_rfreg(hw, (enum radio_path)path, 0x4, MASKDWORD,
-                                      ((apk_result[path][1] << 15) |
-                                       (apk_result[path][1] << 10) |
-                                       (0x02 << 5) | 0x05));
-
-                rtl_set_rfreg(hw, (enum radio_path)path, 0xe, MASKDWORD,
-                              ((0x08 << 15) | (0x08 << 10) | (0x08 << 5) |
-                               0x08));
-
-        }
-
-        rtlphy->b_apk_done = true;
-#endif
-}
-
-static void _rtl92c_phy_set_rfpath_switch(struct ieee80211_hw *hw,
-                                          bool bmain, bool is2t)
-{
-        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
-
-        if (is_hal_stop(rtlhal)) {
-                rtl_set_bbreg(hw, REG_LEDCFG0, BIT(23), 0x01);
-                rtl_set_bbreg(hw, rFPGA0_XAB_RFPARAMETER, BIT(13), 0x01);
-        }
-        if (is2t) {
-                if (bmain)
-                        rtl_set_bbreg(hw, RFPGA0_XB_RFINTERFACEOE,
-                                      BIT(5) | BIT(6), 0x1);
-                else
-                        rtl_set_bbreg(hw, RFPGA0_XB_RFINTERFACEOE,
-                                      BIT(5) | BIT(6), 0x2);
-        } else {
-                if (bmain)
-                        rtl_set_bbreg(hw, RFPGA0_XA_RFINTERFACEOE, 0x300, 0x2);
-                else
-                        rtl_set_bbreg(hw, RFPGA0_XA_RFINTERFACEOE, 0x300, 0x1);
-
-        }
-}
-
-#undef IQK_ADDA_REG_NUM
-#undef IQK_DELAY_TIME
-
-void rtl92c_phy_iq_calibrate(struct ieee80211_hw *hw, bool b_recovery)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        struct rtl_phy *rtlphy = &(rtlpriv->phy);
-        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
-
-        long result[4][8];
-        u8 i, final_candidate;
-        bool b_patha_ok, b_pathb_ok;
-        long reg_e94, reg_e9c, reg_ea4, reg_eac, reg_eb4, reg_ebc, reg_ec4,
-            reg_ecc, reg_tmp = 0;
-        bool is12simular, is13simular, is23simular;
-        bool b_start_conttx = false, b_singletone = false;
-        u32 iqk_bb_reg[10] = {
-                ROFDM0_XARXIQIMBALANCE,
-                ROFDM0_XBRXIQIMBALANCE,
-                ROFDM0_ECCATHRESHOLD,
-                ROFDM0_AGCRSSITABLE,
-                ROFDM0_XATXIQIMBALANCE,
-                ROFDM0_XBTXIQIMBALANCE,
-                ROFDM0_XCTXIQIMBALANCE,
-                ROFDM0_XCTXAFE,
-                ROFDM0_XDTXAFE,
-                ROFDM0_RXIQEXTANTA
-        };
-
-        if (b_recovery) {
-                _rtl92c_phy_reload_adda_registers(hw,
-                                                  iqk_bb_reg,
-                                                  rtlphy->iqk_bb_backup, 10);
-                return;
-        }
-        if (b_start_conttx || b_singletone)
-                return;
-        for (i = 0; i < 8; i++) {
-                result[0][i] = 0;
-                result[1][i] = 0;
-                result[2][i] = 0;
-                result[3][i] = 0;
-        }
-        final_candidate = 0xff;
-        b_patha_ok = false;
-        b_pathb_ok = false;
-        is12simular = false;
-        is23simular = false;
-        is13simular = false;
-        for (i = 0; i < 3; i++) {
-                if (IS_92C_SERIAL(rtlhal->version))
-                        _rtl92c_phy_iq_calibrate(hw, result, i, true);
-                else
-                        _rtl92c_phy_iq_calibrate(hw, result, i, false);
-                if (i == 1) {
-                        is12simular = _rtl92c_phy_simularity_compare(hw,
-                                                                     result, 0,
-                                                                     1);
-                        if (is12simular) {
-                                final_candidate = 0;
-                                break;
-                        }
-                }
-                if (i == 2) {
-                        is13simular = _rtl92c_phy_simularity_compare(hw,
-                                                                     result, 0,
-                                                                     2);
-                        if (is13simular) {
-                                final_candidate = 0;
-                                break;
-                        }
-                        is23simular = _rtl92c_phy_simularity_compare(hw,
-                                                                     result, 1,
-                                                                     2);
-                        if (is23simular)
-                                final_candidate = 1;
-                        else {
-                                for (i = 0; i < 8; i++)
-                                        reg_tmp += result[3][i];
-
-                                if (reg_tmp != 0)
-                                        final_candidate = 3;
-                                else
-                                        final_candidate = 0xFF;
-                        }
-                }
-        }
-        for (i = 0; i < 4; i++) {
-                reg_e94 = result[i][0];
-                reg_e9c = result[i][1];
-                reg_ea4 = result[i][2];
-                reg_eac = result[i][3];
-                reg_eb4 = result[i][4];
-                reg_ebc = result[i][5];
-                reg_ec4 = result[i][6];
-                reg_ecc = result[i][7];
-        }
-        if (final_candidate != 0xff) {
-                rtlphy->reg_e94 = reg_e94 = result[final_candidate][0];
-                rtlphy->reg_e9c = reg_e9c = result[final_candidate][1];
-                reg_ea4 = result[final_candidate][2];
-                reg_eac = result[final_candidate][3];
-                rtlphy->reg_eb4 = reg_eb4 = result[final_candidate][4];
-                rtlphy->reg_ebc = reg_ebc = result[final_candidate][5];
-                reg_ec4 = result[final_candidate][6];
-                reg_ecc = result[final_candidate][7];
-                b_patha_ok = b_pathb_ok = true;
-        } else {
-                rtlphy->reg_e94 = rtlphy->reg_eb4 = 0x100;
-                rtlphy->reg_e9c = rtlphy->reg_ebc = 0x0;
-        }
-        if (reg_e94 != 0) /*&&(reg_ea4 != 0) */
-                _rtl92c_phy_path_a_fill_iqk_matrix(hw, b_patha_ok, result,
-                                                   final_candidate,
-                                                   (reg_ea4 == 0));
-        if (IS_92C_SERIAL(rtlhal->version)) {
-                if (reg_eb4 != 0) /*&&(reg_ec4 != 0) */
-                        _rtl92c_phy_path_b_fill_iqk_matrix(hw, b_pathb_ok,
-                                                           result,
-                                                           final_candidate,
-                                                           (reg_ec4 == 0));
-        }
-        _rtl92c_phy_save_adda_registers(hw, iqk_bb_reg,
-                                        rtlphy->iqk_bb_backup, 10);
-}
-
-void rtl92c_phy_lc_calibrate(struct ieee80211_hw *hw)
-{
-        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
-        bool b_start_conttx = false, b_singletone = false;
-
-        if (b_start_conttx || b_singletone)
-                return;
-        if (IS_92C_SERIAL(rtlhal->version))
-                _rtl92c_phy_lc_calibrate(hw, true);
-        else
-                _rtl92c_phy_lc_calibrate(hw, false);
-}
-
-void rtl92c_phy_ap_calibrate(struct ieee80211_hw *hw, char delta)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        struct rtl_phy *rtlphy = &(rtlpriv->phy);
-        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
-
-        if (rtlphy->b_apk_done)
-                return;
-        if (IS_92C_SERIAL(rtlhal->version))
-                _rtl92c_phy_ap_calibrate(hw, delta, true);
-        else
-                _rtl92c_phy_ap_calibrate(hw, delta, false);
-}
-
-void rtl92c_phy_set_rfpath_switch(struct ieee80211_hw *hw, bool bmain)
-{
-        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
-
-        if (IS_92C_SERIAL(rtlhal->version))
-                _rtl92c_phy_set_rfpath_switch(hw, bmain, true);
-        else
-                _rtl92c_phy_set_rfpath_switch(hw, bmain, false);
-}
-
-bool rtl92c_phy_set_io_cmd(struct ieee80211_hw *hw, enum io_type iotype)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        struct rtl_phy *rtlphy = &(rtlpriv->phy);
-        bool b_postprocessing = false;
-
-        RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,
-                 ("-->IO Cmd(%#x), set_io_inprogress(%d)\n",
-                  iotype, rtlphy->set_io_inprogress));
-        do {
-                switch (iotype) {
-                case IO_CMD_RESUME_DM_BY_SCAN:
-                        RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,
-                                 ("[IO CMD] Resume DM after scan.\n"));
-                        b_postprocessing = true;
-                        break;
-                case IO_CMD_PAUSE_DM_BY_SCAN:
-                        RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,
-                                 ("[IO CMD] Pause DM before scan.\n"));
-                        b_postprocessing = true;
-                        break;
-                default:
-                        RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
-                                 ("switch case not process\n"));
-                        break;
-                }
-        } while (false);
-        if (b_postprocessing && !rtlphy->set_io_inprogress) {
-                rtlphy->set_io_inprogress = true;
-                rtlphy->current_io_type = iotype;
-        } else {
-                return false;
-        }
-        rtl92c_phy_set_io(hw);
-        RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE, ("<--IO Type(%#x)\n", iotype));
-        return true;
-}
-
-void rtl92c_phy_set_io(struct ieee80211_hw *hw)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-        struct rtl_phy *rtlphy = &(rtlpriv->phy);
-
-        RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,
-                 ("--->Cmd(%#x), set_io_inprogress(%d)\n",
-                  rtlphy->current_io_type, rtlphy->set_io_inprogress));
-        switch (rtlphy->current_io_type) {
-        case IO_CMD_RESUME_DM_BY_SCAN:
-                dm_digtable.cur_igvalue = rtlphy->initgain_backup.xaagccore1;
-                rtl92c_dm_write_dig(hw);
-                rtl92c_phy_set_txpower_level(hw, rtlphy->current_channel);
-                break;
-        case IO_CMD_PAUSE_DM_BY_SCAN:
-                rtlphy->initgain_backup.xaagccore1 = dm_digtable.cur_igvalue;
-                dm_digtable.cur_igvalue = 0x17;
-                rtl92c_dm_write_dig(hw);
-                break;
-        default:
-                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
-                         ("switch case not process\n"));
-                break;
-        }
-        rtlphy->set_io_inprogress = false;
-        RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,
-                 ("<---(%#x)\n", rtlphy->current_io_type));
-}
-
-void rtl92ce_phy_set_rf_on(struct ieee80211_hw *hw)
-{
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-
-        rtl_write_byte(rtlpriv, REG_SPS0_CTRL, 0x2b);
-        rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE3);
-        rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x00);
-        rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE2);
-        rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE3);
-        rtl_write_byte(rtlpriv, REG_TXPAUSE, 0x00);
-}
-
-static void _rtl92ce_phy_set_rf_sleep(struct ieee80211_hw *hw)
-{
-        u32 u4b_tmp;
-        u8 delay = 5;
-        struct rtl_priv *rtlpriv = rtl_priv(hw);
-
-        rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF);
-        rtl_set_rfreg(hw, RF90_PATH_A, 0x00, RFREG_OFFSET_MASK, 0x00);
-        rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x40);
-        u4b_tmp = rtl_get_rfreg(hw, RF90_PATH_A, 0, RFREG_OFFSET_MASK);
-        while (u4b_tmp != 0 && delay > 0) {
-                rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x0);
-                rtl_set_rfreg(hw, RF90_PATH_A, 0x00, RFREG_OFFSET_MASK, 0x00);
-                rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x40);
-                u4b_tmp = rtl_get_rfreg(hw, RF90_PATH_A, 0, RFREG_OFFSET_MASK);
-                delay--;
-        }
-        if (delay == 0) {
-                rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x00);
-                rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE2);
-                rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE3);
-                rtl_write_byte(rtlpriv, REG_TXPAUSE, 0x00);
-                RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
-                         ("Switch RF timeout !!!.\n"));
-                return;
-        }
-        rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE2);
-        rtl_write_byte(rtlpriv, REG_SPS0_CTRL, 0x22);
-}
-
 static bool _rtl92ce_phy_set_rf_power_state(struct ieee80211_hw *hw,
                                             enum rf_pwrstate rfpwr_state)
 {
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/phy.h b/drivers/net/wireless/rtlwifi/rtl8192ce/phy.h
index ca4daee6e9a8..3fc60e434cef 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192ce/phy.h
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/phy.h
@@ -57,8 +57,6 @@
 #define IQK_MAC_REG_NUM                 4
 
 #define RF90_PATH_MAX                   2
-#define CHANNEL_MAX_NUMBER              14
-#define CHANNEL_GROUP_MAX               3
 
 #define CT_OFFSET_MAC_ADDR              0X16
 
@@ -78,9 +76,7 @@
 #define CT_OFFSET_CUSTOMER_ID           0x7F
 
 #define RTL92C_MAX_PATH_NUM             2
-#define CHANNEL_MAX_NUMBER              14
-#define CHANNEL_GROUP_MAX               3
-
+#define LLT_LAST_ENTRY_OF_TX_PKT_BUFFER 255
 enum swchnlcmd_id {
         CMDID_END,
         CMDID_SET_TXPOWEROWER_LEVEL,
@@ -233,5 +229,6 @@ void rtl92c_phy_config_bb_external_pa(struct ieee80211_hw *hw);
 void rtl92ce_phy_set_rf_on(struct ieee80211_hw *hw);
 bool rtl92c_phy_set_io_cmd(struct ieee80211_hw *hw, enum io_type iotype);
 void rtl92c_phy_set_io(struct ieee80211_hw *hw);
+void rtl92c_bb_block_on(struct ieee80211_hw *hw);
 
 #endif
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/reg.h b/drivers/net/wireless/rtlwifi/rtl8192ce/reg.h
index 875d51465225..b0868a613841 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192ce/reg.h
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/reg.h
@@ -63,7 +63,15 @@
 #define REG_LEDCFG3                             0x004F
 #define REG_FSIMR                               0x0050
 #define REG_FSISR                               0x0054
-
+#define REG_HSIMR                               0x0058
+#define REG_HSISR                               0x005c
+
+/* RTL8723 WIFI/BT/GPS Multi-Function GPIO Pin Control. */
+#define REG_GPIO_PIN_CTRL_2                     0x0060
+/* RTL8723 WIFI/BT/GPS Multi-Function GPIO Select. */
+#define REG_GPIO_IO_SEL_2                       0x0062
+/* RTL8723 WIFI/BT/GPS Multi-Function control source. */
+#define REG_MULTI_FUNC_CTRL                     0x0068
 #define REG_MCUFWDL                             0x0080
 
 #define REG_HMEBOX_EXT_0                        0x0088
@@ -79,6 +87,7 @@
 #define REG_PCIE_MIO_INTD                       0x00E8
 #define REG_HPON_FSM                            0x00EC
 #define REG_SYS_CFG                             0x00F0
+#define REG_GPIO_OUTSTS                         0x00F4  /* For RTL8723 only.*/
 
 #define REG_CR                                  0x0100
 #define REG_PBP                                 0x0104
@@ -209,6 +218,8 @@
 #define REG_RDG_PIFS                            0x0513
 #define REG_SIFS_CTX                            0x0514
 #define REG_SIFS_TRX                            0x0516
+#define REG_SIFS_CCK                            0x0514
+#define REG_SIFS_OFDM                           0x0516
 #define REG_AGGR_BREAK_TIME                     0x051A
 #define REG_SLOT                                0x051B
 #define REG_TX_PTCL_CTRL                        0x0520
@@ -261,6 +272,10 @@
 #define REG_MAC_SPEC_SIFS                       0x063A
 #define REG_RESP_SIFS_CCK                       0x063C
 #define REG_RESP_SIFS_OFDM                      0x063E
+/* [15:8]SIFS_R2T_OFDM, [7:0]SIFS_R2T_CCK */
+#define REG_R2T_SIFS                            0x063C
+/* [15:8]SIFS_T2T_OFDM, [7:0]SIFS_T2T_CCK */
+#define REG_T2T_SIFS                            0x063E
 #define REG_ACKTO                               0x0640
 #define REG_CTS2TO                              0x0641
 #define REG_EIFS                                0x0642
@@ -641,9 +656,10 @@
 #define STOPBE                                  BIT(1)
 #define STOPBK                                  BIT(0)
 
-#define RCR_APPFCS                              BIT(31)
+#define RCR_APP_FCS                             BIT(31)
 #define RCR_APP_MIC                             BIT(30)
 #define RCR_APP_ICV                             BIT(29)
+#define RCR_APP_PHYSTS                          BIT(28)
 #define RCR_APP_PHYST_RXFF                      BIT(28)
 #define RCR_APP_BA_SSN                          BIT(27)
 #define RCR_ENMBID                              BIT(24)
@@ -759,6 +775,7 @@
 
 #define BOOT_FROM_EEPROM                        BIT(4)
 #define EEPROM_EN                               BIT(5)
+#define EEPROMSEL                               BOOT_FROM_EEPROM
 
 #define AFE_BGEN                                BIT(0)
 #define AFE_MBEN                                BIT(1)
@@ -876,6 +893,8 @@
 #define BD_MAC2                                 BIT(9)
 #define BD_MAC1                                 BIT(10)
 #define IC_MACPHY_MODE                          BIT(11)
+#define BT_FUNC                                 BIT(16)
+#define VENDOR_ID                               BIT(19)
 #define PAD_HWPD_IDN                            BIT(22)
 #define TRP_VAUX_EN                             BIT(23)
 #define TRP_BT_EN                               BIT(24)
@@ -883,6 +902,28 @@
 #define BD_HCI_SEL                              BIT(26)
 #define TYPE_ID                                 BIT(27)
 
+/* REG_GPIO_OUTSTS (For RTL8723 only) */
+#define EFS_HCI_SEL                             (BIT(0)|BIT(1))
+#define PAD_HCI_SEL                             (BIT(2)|BIT(3))
+#define HCI_SEL                                 (BIT(4)|BIT(5))
+#define PKG_SEL_HCI                             BIT(6)
+#define FEN_GPS                                 BIT(7)
+#define FEN_BT                                  BIT(8)
+#define FEN_WL                                  BIT(9)
+#define FEN_PCI                                 BIT(10)
+#define FEN_USB                                 BIT(11)
+#define BTRF_HWPDN_N                            BIT(12)
+#define WLRF_HWPDN_N                            BIT(13)
+#define PDN_BT_N                                BIT(14)
+#define PDN_GPS_N                               BIT(15)
+#define BT_CTL_HWPDN                            BIT(16)
+#define GPS_CTL_HWPDN                           BIT(17)
+#define PPHY_SUSB                               BIT(20)
+#define UPHY_SUSB                               BIT(21)
+#define PCI_SUSEN                               BIT(22)
+#define USB_SUSEN                               BIT(23)
+#define RF_RL_ID                        (BIT(31) | BIT(30) | BIT(29) | BIT(28))
+
 #define CHIP_VER_RTL_MASK                       0xF000
 #define CHIP_VER_RTL_SHIFT                      12
 
@@ -1035,7 +1076,7 @@
 #define _RARF_RC7(x)                            (((x) & 0x1F) << 16)
 #define _RARF_RC8(x)                            (((x) & 0x1F) << 24)
 
-#define AC_PARAM_TXOP_LIMIT_OFFSET              16
+#define AC_PARAM_TXOP_OFFSET                    16
 #define AC_PARAM_ECW_MAX_OFFSET                 12
 #define AC_PARAM_ECW_MIN_OFFSET                 8
 #define AC_PARAM_AIFS_OFFSET                    0
@@ -1184,6 +1225,30 @@
 
 #define HAL_8192C_HW_GPIO_WPS_BIT               BIT(2)
 
+/* REG_MULTI_FUNC_CTRL(For RTL8723 Only) */
+/* Enable GPIO[9] as WiFi HW PDn source */
+#define WL_HWPDN_EN                             BIT(0)
+/* WiFi HW PDn polarity control */
+#define WL_HWPDN_SL                             BIT(1)
+/* WiFi function enable */
+#define WL_FUNC_EN                              BIT(2)
+/* Enable GPIO[9] as WiFi RF HW PDn source */
+#define WL_HWROF_EN                             BIT(3)
+/* Enable GPIO[11] as BT HW PDn source */
+#define BT_HWPDN_EN                             BIT(16)
+/* BT HW PDn polarity control */
+#define BT_HWPDN_SL                             BIT(17)
+/* BT function enable */
+#define BT_FUNC_EN                              BIT(18)
+/* Enable GPIO[11] as BT/GPS RF HW PDn source */
+#define BT_HWROF_EN                             BIT(19)
+/* Enable GPIO[10] as GPS HW PDn source */
+#define GPS_HWPDN_EN                            BIT(20)
+/* GPS HW PDn polarity control */
+#define GPS_HWPDN_SL                            BIT(21)
+/* GPS function enable */
+#define GPS_FUNC_EN                             BIT(22)
+
 #define RPMAC_RESET                             0x100
 #define RPMAC_TXSTART                           0x104
 #define RPMAC_TXLEGACYSIG                       0x108
@@ -1496,7 +1561,7 @@
 #define BTXHTSTBC                               0x30
 #define BTXHTADVANCECODING                      0x40
 #define BTXHTSHORTGI                            0x80
-#define BTXHTNUMBERHT_LT        F               0x300
+#define BTXHTNUMBERHT_LTF                       0x300
 #define BTXHTCRC8                               0x3fc00
 #define BCOUNTERRESET                           0x10000
 #define BNUMOFOFDMTX                            0xffff
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/sw.c b/drivers/net/wireless/rtlwifi/rtl8192ce/sw.c
index b366e8862929..b4df0b332832 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192ce/sw.c
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/sw.c
@@ -46,13 +46,13 @@ int rtl92c_init_sw_vars(struct ieee80211_hw *hw)
         struct rtl_priv *rtlpriv = rtl_priv(hw);
         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 
-        rtlpriv->dm.b_dm_initialgain_enable = 1;
+        rtlpriv->dm.dm_initialgain_enable = 1;
         rtlpriv->dm.dm_flag = 0;
-        rtlpriv->dm.b_disable_framebursting = 0;;
+        rtlpriv->dm.disable_framebursting = 0;
         rtlpriv->dm.thermalvalue = 0;
         rtlpci->transmit_config = CFENDFORM | BIT(12) | BIT(13);
 
-        rtlpci->receive_config = (RCR_APPFCS |
+        rtlpci->receive_config = (RCR_APP_FCS |
                                   RCR_AMF |
                                   RCR_ADF |
                                   RCR_APP_MIC |
@@ -135,6 +135,7 @@ static struct rtl_hal_ops rtl8192ce_hal_ops = {
         .set_bbreg = rtl92c_phy_set_bb_reg,
         .get_rfreg = rtl92c_phy_query_rf_reg,
         .set_rfreg = rtl92c_phy_set_rf_reg,
+        .cmd_send_packet = _rtl92c_cmd_send_packet,
 };
 
 static struct rtl_mod_params rtl92ce_mod_params = {
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/sw.h b/drivers/net/wireless/rtlwifi/rtl8192ce/sw.h
index de1198c38d4e..0568d6dc83d7 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192ce/sw.h
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/sw.h
@@ -33,5 +33,7 @@
 int rtl92c_init_sw_vars(struct ieee80211_hw *hw);
 void rtl92c_deinit_sw_vars(struct ieee80211_hw *hw);
 void rtl92c_init_var_map(struct ieee80211_hw *hw);
+bool _rtl92c_cmd_send_packet(struct ieee80211_hw *hw,
+                             struct sk_buff *skb);
 
 #endif
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/trx.c b/drivers/net/wireless/rtlwifi/rtl8192ce/trx.c
index bf5852f2d634..01b95427fee0 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192ce/trx.c
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/trx.c
@@ -36,7 +36,7 @@
 #include "trx.h"
 #include "led.h"
 
-static enum rtl_desc_qsel _rtl92ce_map_hwqueue_to_fwqueue(u16 fc,
+static enum rtl_desc_qsel _rtl92ce_map_hwqueue_to_fwqueue(__le16 fc,
                                                           unsigned int
                                                           skb_queue)
 {
@@ -245,9 +245,9 @@ static void _rtl92ce_query_rxphystatus(struct ieee80211_hw *hw,
                                        struct rtl_stats *pstats,
                                        struct rx_desc_92c *pdesc,
                                        struct rx_fwinfo_92c *p_drvinfo,
-                                       bool bpacket_match_bssid,
-                                       bool bpacket_toself,
-                                       bool b_packet_beacon)
+                                       bool packet_match_bssid,
+                                       bool packet_toself,
+                                       bool packet_beacon)
 {
         struct rtl_priv *rtlpriv = rtl_priv(hw);
         struct phy_sts_cck_8192s_t *cck_buf;
@@ -258,11 +258,11 @@ static void _rtl92ce_query_rxphystatus(struct ieee80211_hw *hw,
         bool is_cck_rate;
 
         is_cck_rate = RX_HAL_IS_CCK_RATE(pdesc);
-        pstats->b_packet_matchbssid = bpacket_match_bssid;
-        pstats->b_packet_toself = bpacket_toself;
-        pstats->b_is_cck = is_cck_rate;
-        pstats->b_packet_beacon = b_packet_beacon;
-        pstats->b_is_cck = is_cck_rate;
+        pstats->packet_matchbssid = packet_match_bssid;
+        pstats->packet_toself = packet_toself;
+        pstats->is_cck = is_cck_rate;
+        pstats->packet_beacon = packet_beacon;
+        pstats->is_cck = is_cck_rate;
         pstats->rx_mimo_signalquality[0] = -1;
         pstats->rx_mimo_signalquality[1] = -1;
 
@@ -315,7 +315,7 @@ static void _rtl92ce_query_rxphystatus(struct ieee80211_hw *hw,
                 pstats->rx_pwdb_all = pwdb_all;
                 pstats->recvsignalpower = rx_pwr_all;
 
-                if (bpacket_match_bssid) {
+                if (packet_match_bssid) {
                         u8 sq;
                         if (pstats->rx_pwdb_all > 40)
                                 sq = 100;
@@ -334,10 +334,10 @@ static void _rtl92ce_query_rxphystatus(struct ieee80211_hw *hw,
                         pstats->rx_mimo_signalquality[1] = -1;
                 }
         } else {
-                rtlpriv->dm.brfpath_rxenable[0] =
-                    rtlpriv->dm.brfpath_rxenable[1] = true;
+                rtlpriv->dm.rfpath_rxenable[0] =
+                    rtlpriv->dm.rfpath_rxenable[1] = true;
                 for (i = RF90_PATH_A; i < RF90_PATH_MAX; i++) {
-                        if (rtlpriv->dm.brfpath_rxenable[i])
+                        if (rtlpriv->dm.rfpath_rxenable[i])
                                 rf_rx_num++;
 
                         rx_pwr[i] =
@@ -347,7 +347,7 @@ static void _rtl92ce_query_rxphystatus(struct ieee80211_hw *hw,
                         rtlpriv->stats.rx_snr_db[i] =
                             (long)(p_drvinfo->rxsnr[i] / 2);
 
-                        if (bpacket_match_bssid)
+                        if (packet_match_bssid)
                                 pstats->rx_mimo_signalstrength[i] = (u8) rssi;
                 }
 
@@ -366,7 +366,7 @@ static void _rtl92ce_query_rxphystatus(struct ieee80211_hw *hw,
                 for (i = 0; i < max_spatial_stream; i++) {
                         evm = _rtl92c_evm_db_to_percentage(p_drvinfo->rxevm[i]);
 
-                        if (bpacket_match_bssid) {
+                        if (packet_match_bssid) {
                                 if (i == 0)
                                         pstats->signalquality =
                                             (u8) (evm & 0xff);
@@ -393,7 +393,7 @@ static void _rtl92ce_process_ui_rssi(struct ieee80211_hw *hw,
         u8 rfpath;
         u32 last_rssi, tmpval;
 
-        if (pstats->b_packet_toself || pstats->b_packet_beacon) {
+        if (pstats->packet_toself || pstats->packet_beacon) {
                 rtlpriv->stats.rssi_calculate_cnt++;
 
                 if (rtlpriv->stats.ui_rssi.total_num++ >=
@@ -421,7 +421,7 @@ static void _rtl92ce_process_ui_rssi(struct ieee80211_hw *hw,
                 pstats->rssi = rtlpriv->stats.signal_strength;
         }
 
-        if (!pstats->b_is_cck && pstats->b_packet_toself) {
+        if (!pstats->is_cck && pstats->packet_toself) {
                 for (rfpath = RF90_PATH_A; rfpath < rtlphy->num_total_rfpath;
                      rfpath++) {
 
@@ -493,7 +493,7 @@ static void _rtl92ce_process_pwdb(struct ieee80211_hw *hw,
                     rtlpriv->dm.undecorated_smoothed_pwdb;
         }
 
-        if (pstats->b_packet_toself || pstats->b_packet_beacon) {
+        if (pstats->packet_toself || pstats->packet_beacon) {
                 if (undecorated_smoothed_pwdb < 0)
                         undecorated_smoothed_pwdb = pstats->rx_pwdb_all;
 
@@ -525,7 +525,7 @@ static void _rtl92ce_process_ui_link_quality(struct ieee80211_hw *hw,
         u32 last_evm, n_spatialstream, tmpval;
 
         if (pstats->signalquality != 0) {
-                if (pstats->b_packet_toself || pstats->b_packet_beacon) {
+                if (pstats->packet_toself || pstats->packet_beacon) {
 
                         if (rtlpriv->stats.ui_link_quality.total_num++ >=
                             PHY_LINKQUALITY_SLID_WIN_MAX) {
@@ -595,8 +595,8 @@ static void _rtl92ce_process_phyinfo(struct ieee80211_hw *hw,
                                      struct rtl_stats *pcurrent_stats)
 {
 
-        if (!pcurrent_stats->b_packet_matchbssid &&
-            !pcurrent_stats->b_packet_beacon)
+        if (!pcurrent_stats->packet_matchbssid &&
+            !pcurrent_stats->packet_beacon)
                 return;
 
         _rtl92ce_process_ui_rssi(hw, pcurrent_stats);
@@ -617,34 +617,36 @@ static void _rtl92ce_translate_rx_signal_stuff(struct ieee80211_hw *hw,
         u8 *tmp_buf;
         u8 *praddr;
         u8 *psaddr;
-        u16 fc, type;
-        bool b_packet_matchbssid, b_packet_toself, b_packet_beacon;
+        __le16 fc;
+        u16 type, c_fc;
+        bool packet_matchbssid, packet_toself, packet_beacon;
 
         tmp_buf = skb->data + pstats->rx_drvinfo_size + pstats->rx_bufshift;
 
         hdr = (struct ieee80211_hdr *)tmp_buf;
-        fc = le16_to_cpu(hdr->frame_control);
+        fc = hdr->frame_control;
+        c_fc = le16_to_cpu(fc);
         type = WLAN_FC_GET_TYPE(fc);
         praddr = hdr->addr1;
         psaddr = hdr->addr2;
 
-        b_packet_matchbssid =
+        packet_matchbssid =
             ((IEEE80211_FTYPE_CTL != type) &&
              (!compare_ether_addr(mac->bssid,
-                                  (fc & IEEE80211_FCTL_TODS) ?
-                                  hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS) ?
+                                  (c_fc & IEEE80211_FCTL_TODS) ?
+                                  hdr->addr1 : (c_fc & IEEE80211_FCTL_FROMDS) ?
                                   hdr->addr2 : hdr->addr3)) &&
-             (!pstats->b_hwerror) && (!pstats->b_crc) && (!pstats->b_icv));
+             (!pstats->hwerror) && (!pstats->crc) && (!pstats->icv));
 
-        b_packet_toself = b_packet_matchbssid &&
+        packet_toself = packet_matchbssid &&
             (!compare_ether_addr(praddr, rtlefuse->dev_addr));
 
         if (ieee80211_is_beacon(fc))
-                b_packet_beacon = true;
+                packet_beacon = true;
 
         _rtl92ce_query_rxphystatus(hw, pstats, pdesc, p_drvinfo,
-                                   b_packet_matchbssid, b_packet_toself,
-                                   b_packet_beacon);
+                                   packet_matchbssid, packet_toself,
+                                   packet_beacon);
 
         _rtl92ce_process_phyinfo(hw, tmp_buf, pstats);
 }
@@ -662,14 +664,14 @@ bool rtl92ce_rx_query_desc(struct ieee80211_hw *hw,
         stats->rx_drvinfo_size = (u8) GET_RX_DESC_DRV_INFO_SIZE(pdesc) *
             RX_DRV_INFO_SIZE_UNIT;
         stats->rx_bufshift = (u8) (GET_RX_DESC_SHIFT(pdesc) & 0x03);
-        stats->b_icv = (u16) GET_RX_DESC_ICV(pdesc);
-        stats->b_crc = (u16) GET_RX_DESC_CRC32(pdesc);
-        stats->b_hwerror = (stats->b_crc | stats->b_icv);
+        stats->icv = (u16) GET_RX_DESC_ICV(pdesc);
+        stats->crc = (u16) GET_RX_DESC_CRC32(pdesc);
+        stats->hwerror = (stats->crc | stats->icv);
         stats->decrypted = !GET_RX_DESC_SWDEC(pdesc);
         stats->rate = (u8) GET_RX_DESC_RXMCS(pdesc);
-        stats->b_shortpreamble = (u16) GET_RX_DESC_SPLCP(pdesc);
-        stats->b_isampdu = (bool) (GET_RX_DESC_PAGGR(pdesc) == 1);
-        stats->b_isampdu = (bool) ((GET_RX_DESC_PAGGR(pdesc) == 1)
+        stats->shortpreamble = (u16) GET_RX_DESC_SPLCP(pdesc);
+        stats->isampdu = (bool) (GET_RX_DESC_PAGGR(pdesc) == 1);
+        stats->isampdu = (bool) ((GET_RX_DESC_PAGGR(pdesc) == 1)
                                    && (GET_RX_DESC_FAGGR(pdesc) == 1));
         stats->timestamp_low = GET_RX_DESC_TSFL(pdesc);
         stats->rx_is40Mhzpacket = (bool) GET_RX_DESC_BW(pdesc);
@@ -727,27 +729,24 @@ void rtl92ce_tx_fill_desc(struct ieee80211_hw *hw,
         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
-        bool b_defaultadapter = true;
-
+        bool defaultadapter = true;
         struct ieee80211_sta *sta = ieee80211_find_sta(mac->vif, mac->bssid);
-
         u8 *pdesc = (u8 *) pdesc_tx;
         struct rtl_tcb_desc tcb_desc;
         u8 *qc = ieee80211_get_qos_ctl(hdr);
         u8 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
         u16 seq_number;
-        u16 fc = le16_to_cpu(hdr->frame_control);
+        __le16 fc = hdr->frame_control;
         u8 rate_flag = info->control.rates[0].flags;
 
         enum rtl_desc_qsel fw_qsel =
-            _rtl92ce_map_hwqueue_to_fwqueue(le16_to_cpu(hdr->frame_control),
-                                            queue_index);
+            _rtl92ce_map_hwqueue_to_fwqueue(fc, queue_index);
 
-        bool b_firstseg = ((hdr->seq_ctrl &
-                            cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);
+        bool firstseg = ((hdr->seq_ctrl &
+                          cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);
 
-        bool b_lastseg = ((hdr->frame_control &
-                           cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0);
+        bool lastseg = ((hdr->frame_control &
+                         cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0);
 
         dma_addr_t mapping = pci_map_single(rtlpci->pdev,
                                             skb->data, skb->len,
@@ -759,7 +758,7 @@ void rtl92ce_tx_fill_desc(struct ieee80211_hw *hw,
 
         CLEAR_PCI_TX_DESC_CONTENT(pdesc, sizeof(struct tx_desc_92c));
 
-        if (b_firstseg) {
+        if (firstseg) {
                 SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
 
                 SET_TX_DESC_TX_RATE(pdesc, tcb_desc.hw_rate);
@@ -774,25 +773,25 @@ void rtl92ce_tx_fill_desc(struct ieee80211_hw *hw,
                 }
                 SET_TX_DESC_SEQ(pdesc, seq_number);
 
-                SET_TX_DESC_RTS_ENABLE(pdesc, ((tcb_desc.b_rts_enable &&
+                SET_TX_DESC_RTS_ENABLE(pdesc, ((tcb_desc.rts_enable &&
                                                 !tcb_desc.
-                                                b_cts_enable) ? 1 : 0));
+                                                cts_enable) ? 1 : 0));
                 SET_TX_DESC_HW_RTS_ENABLE(pdesc,
-                                          ((tcb_desc.b_rts_enable
-                                            || tcb_desc.b_cts_enable) ? 1 : 0));
-                SET_TX_DESC_CTS2SELF(pdesc, ((tcb_desc.b_cts_enable) ? 1 : 0));
-                SET_TX_DESC_RTS_STBC(pdesc, ((tcb_desc.b_rts_stbc) ? 1 : 0));
+                                          ((tcb_desc.rts_enable
+                                            || tcb_desc.cts_enable) ? 1 : 0));
+                SET_TX_DESC_CTS2SELF(pdesc, ((tcb_desc.cts_enable) ? 1 : 0));
+                SET_TX_DESC_RTS_STBC(pdesc, ((tcb_desc.rts_stbc) ? 1 : 0));
 
                 SET_TX_DESC_RTS_RATE(pdesc, tcb_desc.rts_rate);
                 SET_TX_DESC_RTS_BW(pdesc, 0);
                 SET_TX_DESC_RTS_SC(pdesc, tcb_desc.rts_sc);
                 SET_TX_DESC_RTS_SHORT(pdesc,
                                       ((tcb_desc.rts_rate <= DESC92C_RATE54M) ?
-                                      (tcb_desc.b_rts_use_shortpreamble ? 1 : 0)
-                                      : (tcb_desc.b_rts_use_shortgi ? 1 : 0)));
+                                      (tcb_desc.rts_use_shortpreamble ? 1 : 0)
+                                      : (tcb_desc.rts_use_shortgi ? 1 : 0)));
 
                 if (mac->bw_40) {
-                        if (tcb_desc.b_packet_bw) {
+                        if (tcb_desc.packet_bw) {
                                 SET_TX_DESC_DATA_BW(pdesc, 1);
                                 SET_TX_DESC_TX_SUB_CARRIER(pdesc, 3);
                         } else {
@@ -854,14 +853,14 @@ void rtl92ce_tx_fill_desc(struct ieee80211_hw *hw,
                 }
         }
 
-        SET_TX_DESC_FIRST_SEG(pdesc, (b_firstseg ? 1 : 0));
-        SET_TX_DESC_LAST_SEG(pdesc, (b_lastseg ? 1 : 0));
+        SET_TX_DESC_FIRST_SEG(pdesc, (firstseg ? 1 : 0));
+        SET_TX_DESC_LAST_SEG(pdesc, (lastseg ? 1 : 0));
 
         SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16) skb->len);
 
         SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, cpu_to_le32(mapping));
 
-        if (rtlpriv->dm.b_useramask) {
+        if (rtlpriv->dm.useramask) {
                 SET_TX_DESC_RATE_ID(pdesc, tcb_desc.ratr_index);
                 SET_TX_DESC_MACID(pdesc, tcb_desc.mac_id);
         } else {
@@ -869,16 +868,16 @@ void rtl92ce_tx_fill_desc(struct ieee80211_hw *hw,
                 SET_TX_DESC_MACID(pdesc, tcb_desc.ratr_index);
         }
 
-        if ((!ieee80211_is_data_qos(fc)) && ppsc->b_leisure_ps &&
-            ppsc->b_fwctrl_lps) {
+        if ((!ieee80211_is_data_qos(fc)) && ppsc->leisure_ps &&
+            ppsc->fwctrl_lps) {
                 SET_TX_DESC_HWSEQ_EN(pdesc, 1);
                 SET_TX_DESC_PKT_ID(pdesc, 8);
 
-                if (!b_defaultadapter)
+                if (!defaultadapter)
                         SET_TX_DESC_QOS(pdesc, 1);
         }
 
-        SET_TX_DESC_MORE_FRAG(pdesc, (b_lastseg ? 0 : 1));
+        SET_TX_DESC_MORE_FRAG(pdesc, (lastseg ? 0 : 1));
 
         if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) ||
             is_broadcast_ether_addr(ieee80211_get_DA(hdr))) {
@@ -889,8 +888,8 @@ void rtl92ce_tx_fill_desc(struct ieee80211_hw *hw,
 }
 
 void rtl92ce_tx_fill_cmddesc(struct ieee80211_hw *hw,
-                             u8 *pdesc, bool b_firstseg,
-                             bool b_lastseg, struct sk_buff *skb)
+                             u8 *pdesc, bool firstseg,
+                             bool lastseg, struct sk_buff *skb)
 {
         struct rtl_priv *rtlpriv = rtl_priv(hw);
         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
@@ -901,11 +900,11 @@ void rtl92ce_tx_fill_cmddesc(struct ieee80211_hw *hw,
                                             PCI_DMA_TODEVICE);
 
         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
-        u16 fc = le16_to_cpu(hdr->frame_control);
+        __le16 fc = hdr->frame_control;
 
         CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_DESC_SIZE);
 
-        if (b_firstseg)
+        if (firstseg)
                 SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
 
         SET_TX_DESC_TX_RATE(pdesc, DESC92C_RATE1M);
@@ -1029,3 +1028,36 @@ void rtl92ce_tx_polling(struct ieee80211_hw *hw, unsigned int hw_queue)
                                BIT(0) << (hw_queue));
         }
 }
+
+bool _rtl92c_cmd_send_packet(struct ieee80211_hw *hw,
+                             struct sk_buff *skb)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+        struct rtl8192_tx_ring *ring;
+        struct rtl_tx_desc *pdesc;
+        u8 own;
+        unsigned long flags;
+        struct sk_buff *pskb = NULL;
+
+        ring = &rtlpci->tx_ring[BEACON_QUEUE];
+
+        spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
+
+        pskb = __skb_dequeue(&ring->queue);
+        if (pskb)
+                kfree_skb(pskb);
+
+        pdesc = &ring->desc[0];
+        own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) pdesc, true, HW_DESC_OWN);
+
+        rtlpriv->cfg->ops->fill_tx_cmddesc(hw, (u8 *) pdesc, 1, 1, skb);
+
+        __skb_queue_tail(&ring->queue, skb);
+
+        spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
+
+        rtlpriv->cfg->ops->tx_polling(hw, BEACON_QUEUE);
+
+        return true;
+}
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/trx.h b/drivers/net/wireless/rtlwifi/rtl8192ce/trx.h
index 53d0e0a5af5c..803adcc80c96 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192ce/trx.h
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/trx.h
@@ -40,470 +40,494 @@
 #define USB_HWDESC_HEADER_LEN                   32
 #define CRCLENGTH                               4
 
+/* Define a macro that takes a le32 word, converts it to host ordering,
+ * right shifts by a specified count, creates a mask of the specified
+ * bit count, and extracts that number of bits.
+ */
+
+#define SHIFT_AND_MASK_LE(__pdesc, __shift, __mask)             \
+        ((le32_to_cpu(*(((__le32 *)(__pdesc)))) >> (__shift)) & \
+        BIT_LEN_MASK_32(__mask))
+
+/* Define a macro that clears a bit field in an le32 word and
+ * sets the specified value into that bit field. The resulting
+ * value remains in le32 ordering; however, it is properly converted
+ * to host ordering for the clear and set operations before conversion
+ * back to le32.
+ */
+
+#define SET_BITS_OFFSET_LE(__pdesc, __shift, __len, __val)      \
+        (*(__le32 *)(__pdesc) =                                 \
+        (cpu_to_le32((le32_to_cpu(*((__le32 *)(__pdesc))) &     \
+        (~(BIT_OFFSET_LEN_MASK_32((__shift), __len)))) |                \
+        (((u32)(__val) & BIT_LEN_MASK_32(__len)) << (__shift)))));
+
+/* macros to read/write various fields in RX or TX descriptors */
+
 #define SET_TX_DESC_PKT_SIZE(__pdesc, __val)            \
-        SET_BITS_TO_LE_4BYTE(__pdesc, 0, 16, __val)
+        SET_BITS_OFFSET_LE(__pdesc, 0, 16, __val)
 #define SET_TX_DESC_OFFSET(__pdesc, __val)              \
-        SET_BITS_TO_LE_4BYTE(__pdesc, 16, 8, __val)
+        SET_BITS_OFFSET_LE(__pdesc, 16, 8, __val)
 #define SET_TX_DESC_BMC(__pdesc, __val)                 \
-        SET_BITS_TO_LE_4BYTE(__pdesc, 24, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc, 24, 1, __val)
 #define SET_TX_DESC_HTC(__pdesc, __val)                 \
-        SET_BITS_TO_LE_4BYTE(__pdesc, 25, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc, 25, 1, __val)
 #define SET_TX_DESC_LAST_SEG(__pdesc, __val)            \
-        SET_BITS_TO_LE_4BYTE(__pdesc, 26, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc, 26, 1, __val)
 #define SET_TX_DESC_FIRST_SEG(__pdesc, __val)           \
-        SET_BITS_TO_LE_4BYTE(__pdesc, 27, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc, 27, 1, __val)
 #define SET_TX_DESC_LINIP(__pdesc, __val)               \
-        SET_BITS_TO_LE_4BYTE(__pdesc, 28, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc, 28, 1, __val)
 #define SET_TX_DESC_NO_ACM(__pdesc, __val)              \
-        SET_BITS_TO_LE_4BYTE(__pdesc, 29, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc, 29, 1, __val)
 #define SET_TX_DESC_GF(__pdesc, __val)                  \
-        SET_BITS_TO_LE_4BYTE(__pdesc, 30, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc, 30, 1, __val)
 #define SET_TX_DESC_OWN(__pdesc, __val)                 \
-        SET_BITS_TO_LE_4BYTE(__pdesc, 31, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc, 31, 1, __val)
 
 #define GET_TX_DESC_PKT_SIZE(__pdesc)                   \
-        LE_BITS_TO_4BYTE(__pdesc, 0, 16)
+        SHIFT_AND_MASK_LE(__pdesc, 0, 16)
 #define GET_TX_DESC_OFFSET(__pdesc)                     \
-        LE_BITS_TO_4BYTE(__pdesc, 16, 8)
+        SHIFT_AND_MASK_LE(__pdesc, 16, 8)
 #define GET_TX_DESC_BMC(__pdesc)                        \
-        LE_BITS_TO_4BYTE(__pdesc, 24, 1)
+        SHIFT_AND_MASK_LE(__pdesc, 24, 1)
 #define GET_TX_DESC_HTC(__pdesc)                        \
-        LE_BITS_TO_4BYTE(__pdesc, 25, 1)
+        SHIFT_AND_MASK_LE(__pdesc, 25, 1)
 #define GET_TX_DESC_LAST_SEG(__pdesc)                   \
-        LE_BITS_TO_4BYTE(__pdesc, 26, 1)
+        SHIFT_AND_MASK_LE(__pdesc, 26, 1)
 #define GET_TX_DESC_FIRST_SEG(__pdesc)                  \
-        LE_BITS_TO_4BYTE(__pdesc, 27, 1)
+        SHIFT_AND_MASK_LE(__pdesc, 27, 1)
 #define GET_TX_DESC_LINIP(__pdesc)                      \
-        LE_BITS_TO_4BYTE(__pdesc, 28, 1)
+        SHIFT_AND_MASK_LE(__pdesc, 28, 1)
 #define GET_TX_DESC_NO_ACM(__pdesc)                     \
-        LE_BITS_TO_4BYTE(__pdesc, 29, 1)
+        SHIFT_AND_MASK_LE(__pdesc, 29, 1)
 #define GET_TX_DESC_GF(__pdesc)                         \
-        LE_BITS_TO_4BYTE(__pdesc, 30, 1)
+        SHIFT_AND_MASK_LE(__pdesc, 30, 1)
 #define GET_TX_DESC_OWN(__pdesc)                        \
-        LE_BITS_TO_4BYTE(__pdesc, 31, 1)
+        SHIFT_AND_MASK_LE(__pdesc, 31, 1)
 
 #define SET_TX_DESC_MACID(__pdesc, __val)               \
-        SET_BITS_TO_LE_4BYTE(__pdesc+4, 0, 5, __val)
+        SET_BITS_OFFSET_LE(__pdesc+4, 0, 5, __val)
 #define SET_TX_DESC_AGG_BREAK(__pdesc, __val)           \
-        SET_BITS_TO_LE_4BYTE(__pdesc+4, 5, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc+4, 5, 1, __val)
 #define SET_TX_DESC_BK(__pdesc, __val)                  \
-        SET_BITS_TO_LE_4BYTE(__pdesc+4, 6, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc+4, 6, 1, __val)
 #define SET_TX_DESC_RDG_ENABLE(__pdesc, __val)          \
-        SET_BITS_TO_LE_4BYTE(__pdesc+4, 7, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc+4, 7, 1, __val)
 #define SET_TX_DESC_QUEUE_SEL(__pdesc, __val)           \
-        SET_BITS_TO_LE_4BYTE(__pdesc+4, 8, 5, __val)
+        SET_BITS_OFFSET_LE(__pdesc+4, 8, 5, __val)
 #define SET_TX_DESC_RDG_NAV_EXT(__pdesc, __val) \
-        SET_BITS_TO_LE_4BYTE(__pdesc+4, 13, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc+4, 13, 1, __val)
 #define SET_TX_DESC_LSIG_TXOP_EN(__pdesc, __val)        \
-        SET_BITS_TO_LE_4BYTE(__pdesc+4, 14, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc+4, 14, 1, __val)
 #define SET_TX_DESC_PIFS(__pdesc, __val)                \
-        SET_BITS_TO_LE_4BYTE(__pdesc+4, 15, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc+4, 15, 1, __val)
 #define SET_TX_DESC_RATE_ID(__pdesc, __val)             \
-        SET_BITS_TO_LE_4BYTE(__pdesc+4, 16, 4, __val)
+        SET_BITS_OFFSET_LE(__pdesc+4, 16, 4, __val)
 #define SET_TX_DESC_NAV_USE_HDR(__pdesc, __val) \
-        SET_BITS_TO_LE_4BYTE(__pdesc+4, 20, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc+4, 20, 1, __val)
 #define SET_TX_DESC_EN_DESC_ID(__pdesc, __val)          \
-        SET_BITS_TO_LE_4BYTE(__pdesc+4, 21, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc+4, 21, 1, __val)
 #define SET_TX_DESC_SEC_TYPE(__pdesc, __val)            \
-        SET_BITS_TO_LE_4BYTE(__pdesc+4, 22, 2, __val)
+        SET_BITS_OFFSET_LE(__pdesc+4, 22, 2, __val)
 #define SET_TX_DESC_PKT_OFFSET(__pdesc, __val)          \
-        SET_BITS_TO_LE_4BYTE(__pdesc+4, 24, 8, __val)
+        SET_BITS_OFFSET_LE(__pdesc+4, 24, 8, __val)
 
 #define GET_TX_DESC_MACID(__pdesc)                      \
-        LE_BITS_TO_4BYTE(__pdesc+4, 0, 5)
+        SHIFT_AND_MASK_LE(__pdesc+4, 0, 5)
 #define GET_TX_DESC_AGG_ENABLE(__pdesc)                 \
-        LE_BITS_TO_4BYTE(__pdesc+4, 5, 1)
+        SHIFT_AND_MASK_LE(__pdesc+4, 5, 1)
 #define GET_TX_DESC_AGG_BREAK(__pdesc)                  \
-        LE_BITS_TO_4BYTE(__pdesc+4, 6, 1)
+        SHIFT_AND_MASK_LE(__pdesc+4, 6, 1)
 #define GET_TX_DESC_RDG_ENABLE(__pdesc)                 \
-        LE_BITS_TO_4BYTE(__pdesc+4, 7, 1)
+        SHIFT_AND_MASK_LE(__pdesc+4, 7, 1)
 #define GET_TX_DESC_QUEUE_SEL(__pdesc)                  \
-        LE_BITS_TO_4BYTE(__pdesc+4, 8, 5)
+        SHIFT_AND_MASK_LE(__pdesc+4, 8, 5)
 #define GET_TX_DESC_RDG_NAV_EXT(__pdesc)                \
-        LE_BITS_TO_4BYTE(__pdesc+4, 13, 1)
+        SHIFT_AND_MASK_LE(__pdesc+4, 13, 1)
 #define GET_TX_DESC_LSIG_TXOP_EN(__pdesc)               \
-        LE_BITS_TO_4BYTE(__pdesc+4, 14, 1)
+        SHIFT_AND_MASK_LE(__pdesc+4, 14, 1)
 #define GET_TX_DESC_PIFS(__pdesc)                       \
-        LE_BITS_TO_4BYTE(__pdesc+4, 15, 1)
+        SHIFT_AND_MASK_LE(__pdesc+4, 15, 1)
 #define GET_TX_DESC_RATE_ID(__pdesc)                    \
-        LE_BITS_TO_4BYTE(__pdesc+4, 16, 4)
+        SHIFT_AND_MASK_LE(__pdesc+4, 16, 4)
 #define GET_TX_DESC_NAV_USE_HDR(__pdesc)                \
-        LE_BITS_TO_4BYTE(__pdesc+4, 20, 1)
+        SHIFT_AND_MASK_LE(__pdesc+4, 20, 1)
 #define GET_TX_DESC_EN_DESC_ID(__pdesc)                 \
-        LE_BITS_TO_4BYTE(__pdesc+4, 21, 1)
+        SHIFT_AND_MASK_LE(__pdesc+4, 21, 1)
 #define GET_TX_DESC_SEC_TYPE(__pdesc)                   \
-        LE_BITS_TO_4BYTE(__pdesc+4, 22, 2)
+        SHIFT_AND_MASK_LE(__pdesc+4, 22, 2)
 #define GET_TX_DESC_PKT_OFFSET(__pdesc)                 \
-        LE_BITS_TO_4BYTE(__pdesc+4, 24, 8)
+        SHIFT_AND_MASK_LE(__pdesc+4, 24, 8)
 
 #define SET_TX_DESC_RTS_RC(__pdesc, __val)              \
-        SET_BITS_TO_LE_4BYTE(__pdesc+8, 0, 6, __val)
+        SET_BITS_OFFSET_LE(__pdesc+8, 0, 6, __val)
 #define SET_TX_DESC_DATA_RC(__pdesc, __val)             \
-        SET_BITS_TO_LE_4BYTE(__pdesc+8, 6, 6, __val)
+        SET_BITS_OFFSET_LE(__pdesc+8, 6, 6, __val)
 #define SET_TX_DESC_BAR_RTY_TH(__pdesc, __val)          \
-        SET_BITS_TO_LE_4BYTE(__pdesc+8, 14, 2, __val)
+        SET_BITS_OFFSET_LE(__pdesc+8, 14, 2, __val)
 #define SET_TX_DESC_MORE_FRAG(__pdesc, __val)           \
-        SET_BITS_TO_LE_4BYTE(__pdesc+8, 17, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc+8, 17, 1, __val)
 #define SET_TX_DESC_RAW(__pdesc, __val)                 \
-        SET_BITS_TO_LE_4BYTE(__pdesc+8, 18, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc+8, 18, 1, __val)
 #define SET_TX_DESC_CCX(__pdesc, __val)                 \
-        SET_BITS_TO_LE_4BYTE(__pdesc+8, 19, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc+8, 19, 1, __val)
 #define SET_TX_DESC_AMPDU_DENSITY(__pdesc, __val)       \
-        SET_BITS_TO_LE_4BYTE(__pdesc+8, 20, 3, __val)
+        SET_BITS_OFFSET_LE(__pdesc+8, 20, 3, __val)
 #define SET_TX_DESC_ANTSEL_A(__pdesc, __val)            \
-        SET_BITS_TO_LE_4BYTE(__pdesc+8, 24, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc+8, 24, 1, __val)
 #define SET_TX_DESC_ANTSEL_B(__pdesc, __val)            \
-        SET_BITS_TO_LE_4BYTE(__pdesc+8, 25, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc+8, 25, 1, __val)
 #define SET_TX_DESC_TX_ANT_CCK(__pdesc, __val)          \
-        SET_BITS_TO_LE_4BYTE(__pdesc+8, 26, 2, __val)
+        SET_BITS_OFFSET_LE(__pdesc+8, 26, 2, __val)
 #define SET_TX_DESC_TX_ANTL(__pdesc, __val)             \
-        SET_BITS_TO_LE_4BYTE(__pdesc+8, 28, 2, __val)
+        SET_BITS_OFFSET_LE(__pdesc+8, 28, 2, __val)
 #define SET_TX_DESC_TX_ANT_HT(__pdesc, __val)           \
-        SET_BITS_TO_LE_4BYTE(__pdesc+8, 30, 2, __val)
+        SET_BITS_OFFSET_LE(__pdesc+8, 30, 2, __val)
 
 #define GET_TX_DESC_RTS_RC(__pdesc)                     \
-        LE_BITS_TO_4BYTE(__pdesc+8, 0, 6)
+        SHIFT_AND_MASK_LE(__pdesc+8, 0, 6)
 #define GET_TX_DESC_DATA_RC(__pdesc)                    \
-        LE_BITS_TO_4BYTE(__pdesc+8, 6, 6)
+        SHIFT_AND_MASK_LE(__pdesc+8, 6, 6)
 #define GET_TX_DESC_BAR_RTY_TH(__pdesc)                 \
-        LE_BITS_TO_4BYTE(__pdesc+8, 14, 2)
+        SHIFT_AND_MASK_LE(__pdesc+8, 14, 2)
 #define GET_TX_DESC_MORE_FRAG(__pdesc)                  \
-        LE_BITS_TO_4BYTE(__pdesc+8, 17, 1)
+        SHIFT_AND_MASK_LE(__pdesc+8, 17, 1)
 #define GET_TX_DESC_RAW(__pdesc)                        \
-        LE_BITS_TO_4BYTE(__pdesc+8, 18, 1)
+        SHIFT_AND_MASK_LE(__pdesc+8, 18, 1)
 #define GET_TX_DESC_CCX(__pdesc)                        \
-        LE_BITS_TO_4BYTE(__pdesc+8, 19, 1)
+        SHIFT_AND_MASK_LE(__pdesc+8, 19, 1)
 #define GET_TX_DESC_AMPDU_DENSITY(__pdesc)              \
-        LE_BITS_TO_4BYTE(__pdesc+8, 20, 3)
+        SHIFT_AND_MASK_LE(__pdesc+8, 20, 3)
 #define GET_TX_DESC_ANTSEL_A(__pdesc)                   \
-        LE_BITS_TO_4BYTE(__pdesc+8, 24, 1)
+        SHIFT_AND_MASK_LE(__pdesc+8, 24, 1)
 #define GET_TX_DESC_ANTSEL_B(__pdesc)                   \
-        LE_BITS_TO_4BYTE(__pdesc+8, 25, 1)
+        SHIFT_AND_MASK_LE(__pdesc+8, 25, 1)
 #define GET_TX_DESC_TX_ANT_CCK(__pdesc)                 \
-        LE_BITS_TO_4BYTE(__pdesc+8, 26, 2)
+        SHIFT_AND_MASK_LE(__pdesc+8, 26, 2)
 #define GET_TX_DESC_TX_ANTL(__pdesc)                    \
-        LE_BITS_TO_4BYTE(__pdesc+8, 28, 2)
+        SHIFT_AND_MASK_LE(__pdesc+8, 28, 2)
 #define GET_TX_DESC_TX_ANT_HT(__pdesc)                  \
-        LE_BITS_TO_4BYTE(__pdesc+8, 30, 2)
+        SHIFT_AND_MASK_LE(__pdesc+8, 30, 2)
 
 #define SET_TX_DESC_NEXT_HEAP_PAGE(__pdesc, __val)      \
-        SET_BITS_TO_LE_4BYTE(__pdesc+12, 0, 8, __val)
+        SET_BITS_OFFSET_LE(__pdesc+12, 0, 8, __val)
 #define SET_TX_DESC_TAIL_PAGE(__pdesc, __val)           \
-        SET_BITS_TO_LE_4BYTE(__pdesc+12, 8, 8, __val)
+        SET_BITS_OFFSET_LE(__pdesc+12, 8, 8, __val)
 #define SET_TX_DESC_SEQ(__pdesc, __val)                 \
-        SET_BITS_TO_LE_4BYTE(__pdesc+12, 16, 12, __val)
+        SET_BITS_OFFSET_LE(__pdesc+12, 16, 12, __val)
 #define SET_TX_DESC_PKT_ID(__pdesc, __val)              \
-        SET_BITS_TO_LE_4BYTE(__pdesc+12, 28, 4, __val)
+        SET_BITS_OFFSET_LE(__pdesc+12, 28, 4, __val)
 
 #define GET_TX_DESC_NEXT_HEAP_PAGE(__pdesc)             \
-        LE_BITS_TO_4BYTE(__pdesc+12, 0, 8)
+        SHIFT_AND_MASK_LE(__pdesc+12, 0, 8)
 #define GET_TX_DESC_TAIL_PAGE(__pdesc)                  \
-        LE_BITS_TO_4BYTE(__pdesc+12, 8, 8)
+        SHIFT_AND_MASK_LE(__pdesc+12, 8, 8)
 #define GET_TX_DESC_SEQ(__pdesc)                        \
-        LE_BITS_TO_4BYTE(__pdesc+12, 16, 12)
+        SHIFT_AND_MASK_LE(__pdesc+12, 16, 12)
 #define GET_TX_DESC_PKT_ID(__pdesc)                     \
-        LE_BITS_TO_4BYTE(__pdesc+12, 28, 4)
+        SHIFT_AND_MASK_LE(__pdesc+12, 28, 4)
 
 #define SET_TX_DESC_RTS_RATE(__pdesc, __val)            \
-        SET_BITS_TO_LE_4BYTE(__pdesc+16, 0, 5, __val)
+        SET_BITS_OFFSET_LE(__pdesc+16, 0, 5, __val)
 #define SET_TX_DESC_AP_DCFE(__pdesc, __val)             \
-        SET_BITS_TO_LE_4BYTE(__pdesc+16, 5, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc+16, 5, 1, __val)
 #define SET_TX_DESC_QOS(__pdesc, __val)                 \
-        SET_BITS_TO_LE_4BYTE(__pdesc+16, 6, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc+16, 6, 1, __val)
 #define SET_TX_DESC_HWSEQ_EN(__pdesc, __val)            \
-        SET_BITS_TO_LE_4BYTE(__pdesc+16, 7, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc+16, 7, 1, __val)
 #define SET_TX_DESC_USE_RATE(__pdesc, __val)            \
-        SET_BITS_TO_LE_4BYTE(__pdesc+16, 8, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc+16, 8, 1, __val)
 #define SET_TX_DESC_DISABLE_RTS_FB(__pdesc, __val)      \
-        SET_BITS_TO_LE_4BYTE(__pdesc+16, 9, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc+16, 9, 1, __val)
 #define SET_TX_DESC_DISABLE_FB(__pdesc, __val)          \
-        SET_BITS_TO_LE_4BYTE(__pdesc+16, 10, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc+16, 10, 1, __val)
 #define SET_TX_DESC_CTS2SELF(__pdesc, __val)            \
-        SET_BITS_TO_LE_4BYTE(__pdesc+16, 11, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc+16, 11, 1, __val)
 #define SET_TX_DESC_RTS_ENABLE(__pdesc, __val)          \
-        SET_BITS_TO_LE_4BYTE(__pdesc+16, 12, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc+16, 12, 1, __val)
 #define SET_TX_DESC_HW_RTS_ENABLE(__pdesc, __val)       \
-        SET_BITS_TO_LE_4BYTE(__pdesc+16, 13, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc+16, 13, 1, __val)
 #define SET_TX_DESC_PORT_ID(__pdesc, __val)             \
-        SET_BITS_TO_LE_4BYTE(__pdesc+16, 14, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc+16, 14, 1, __val)
 #define SET_TX_DESC_WAIT_DCTS(__pdesc, __val)           \
-        SET_BITS_TO_LE_4BYTE(__pdesc+16, 18, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc+16, 18, 1, __val)
 #define SET_TX_DESC_CTS2AP_EN(__pdesc, __val)           \
-        SET_BITS_TO_LE_4BYTE(__pdesc+16, 19, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc+16, 19, 1, __val)
 #define SET_TX_DESC_TX_SUB_CARRIER(__pdesc, __val)      \
-        SET_BITS_TO_LE_4BYTE(__pdesc+16, 20, 2, __val)
+        SET_BITS_OFFSET_LE(__pdesc+16, 20, 2, __val)
 #define SET_TX_DESC_TX_STBC(__pdesc, __val)             \
-        SET_BITS_TO_LE_4BYTE(__pdesc+16, 22, 2, __val)
+        SET_BITS_OFFSET_LE(__pdesc+16, 22, 2, __val)
 #define SET_TX_DESC_DATA_SHORT(__pdesc, __val)          \
-        SET_BITS_TO_LE_4BYTE(__pdesc+16, 24, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc+16, 24, 1, __val)
 #define SET_TX_DESC_DATA_BW(__pdesc, __val)             \
-        SET_BITS_TO_LE_4BYTE(__pdesc+16, 25, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc+16, 25, 1, __val)
 #define SET_TX_DESC_RTS_SHORT(__pdesc, __val)           \
-        SET_BITS_TO_LE_4BYTE(__pdesc+16, 26, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc+16, 26, 1, __val)
 #define SET_TX_DESC_RTS_BW(__pdesc, __val)              \
-        SET_BITS_TO_LE_4BYTE(__pdesc+16, 27, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc+16, 27, 1, __val)
 #define SET_TX_DESC_RTS_SC(__pdesc, __val)              \
-        SET_BITS_TO_LE_4BYTE(__pdesc+16, 28, 2, __val)
+        SET_BITS_OFFSET_LE(__pdesc+16, 28, 2, __val)
 #define SET_TX_DESC_RTS_STBC(__pdesc, __val)            \
-        SET_BITS_TO_LE_4BYTE(__pdesc+16, 30, 2, __val)
+        SET_BITS_OFFSET_LE(__pdesc+16, 30, 2, __val)
 
 #define GET_TX_DESC_RTS_RATE(__pdesc)                   \
-        LE_BITS_TO_4BYTE(__pdesc+16, 0, 5)
+        SHIFT_AND_MASK_LE(__pdesc+16, 0, 5)
 #define GET_TX_DESC_AP_DCFE(__pdesc)                    \
-        LE_BITS_TO_4BYTE(__pdesc+16, 5, 1)
+        SHIFT_AND_MASK_LE(__pdesc+16, 5, 1)
 #define GET_TX_DESC_QOS(__pdesc)                        \
-        LE_BITS_TO_4BYTE(__pdesc+16, 6, 1)
+        SHIFT_AND_MASK_LE(__pdesc+16, 6, 1)
 #define GET_TX_DESC_HWSEQ_EN(__pdesc)                   \
-        LE_BITS_TO_4BYTE(__pdesc+16, 7, 1)
+        SHIFT_AND_MASK_LE(__pdesc+16, 7, 1)
 #define GET_TX_DESC_USE_RATE(__pdesc)                   \
-        LE_BITS_TO_4BYTE(__pdesc+16, 8, 1)
+        SHIFT_AND_MASK_LE(__pdesc+16, 8, 1)
 #define GET_TX_DESC_DISABLE_RTS_FB(__pdesc)             \
-        LE_BITS_TO_4BYTE(__pdesc+16, 9, 1)
+        SHIFT_AND_MASK_LE(__pdesc+16, 9, 1)
 #define GET_TX_DESC_DISABLE_FB(__pdesc)                 \
-        LE_BITS_TO_4BYTE(__pdesc+16, 10, 1)
+        SHIFT_AND_MASK_LE(__pdesc+16, 10, 1)
 #define GET_TX_DESC_CTS2SELF(__pdesc)                   \
-        LE_BITS_TO_4BYTE(__pdesc+16, 11, 1)
+        SHIFT_AND_MASK_LE(__pdesc+16, 11, 1)
 #define GET_TX_DESC_RTS_ENABLE(__pdesc)                 \
-        LE_BITS_TO_4BYTE(__pdesc+16, 12, 1)
+        SHIFT_AND_MASK_LE(__pdesc+16, 12, 1)
 #define GET_TX_DESC_HW_RTS_ENABLE(__pdesc)              \
-        LE_BITS_TO_4BYTE(__pdesc+16, 13, 1)
+        SHIFT_AND_MASK_LE(__pdesc+16, 13, 1)
 #define GET_TX_DESC_PORT_ID(__pdesc)                    \
-        LE_BITS_TO_4BYTE(__pdesc+16, 14, 1)
+        SHIFT_AND_MASK_LE(__pdesc+16, 14, 1)
 #define GET_TX_DESC_WAIT_DCTS(__pdesc)                  \
-        LE_BITS_TO_4BYTE(__pdesc+16, 18, 1)
+        SHIFT_AND_MASK_LE(__pdesc+16, 18, 1)
 #define GET_TX_DESC_CTS2AP_EN(__pdesc)                  \
-        LE_BITS_TO_4BYTE(__pdesc+16, 19, 1)
+        SHIFT_AND_MASK_LE(__pdesc+16, 19, 1)
 #define GET_TX_DESC_TX_SUB_CARRIER(__pdesc)             \
-        LE_BITS_TO_4BYTE(__pdesc+16, 20, 2)
+        SHIFT_AND_MASK_LE(__pdesc+16, 20, 2)
 #define GET_TX_DESC_TX_STBC(__pdesc)                    \
-        LE_BITS_TO_4BYTE(__pdesc+16, 22, 2)
+        SHIFT_AND_MASK_LE(__pdesc+16, 22, 2)
 #define GET_TX_DESC_DATA_SHORT(__pdesc)                 \
-        LE_BITS_TO_4BYTE(__pdesc+16, 24, 1)
+        SHIFT_AND_MASK_LE(__pdesc+16, 24, 1)
 #define GET_TX_DESC_DATA_BW(__pdesc)                    \
-        LE_BITS_TO_4BYTE(__pdesc+16, 25, 1)
+        SHIFT_AND_MASK_LE(__pdesc+16, 25, 1)
 #define GET_TX_DESC_RTS_SHORT(__pdesc)                  \
-        LE_BITS_TO_4BYTE(__pdesc+16, 26, 1)
+        SHIFT_AND_MASK_LE(__pdesc+16, 26, 1)
 #define GET_TX_DESC_RTS_BW(__pdesc)                     \
-        LE_BITS_TO_4BYTE(__pdesc+16, 27, 1)
+        SHIFT_AND_MASK_LE(__pdesc+16, 27, 1)
 #define GET_TX_DESC_RTS_SC(__pdesc)                     \
-        LE_BITS_TO_4BYTE(__pdesc+16, 28, 2)
+        SHIFT_AND_MASK_LE(__pdesc+16, 28, 2)
 #define GET_TX_DESC_RTS_STBC(__pdesc)                   \
-        LE_BITS_TO_4BYTE(__pdesc+16, 30, 2)
+        SHIFT_AND_MASK_LE(__pdesc+16, 30, 2)
 
 #define SET_TX_DESC_TX_RATE(__pdesc, __val)             \
-        SET_BITS_TO_LE_4BYTE(__pdesc+20, 0, 6, __val)
+        SET_BITS_OFFSET_LE(__pdesc+20, 0, 6, __val)
 #define SET_TX_DESC_DATA_SHORTGI(__pdesc, __val)        \
-        SET_BITS_TO_LE_4BYTE(__pdesc+20, 6, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc+20, 6, 1, __val)
 #define SET_TX_DESC_CCX_TAG(__pdesc, __val)             \
-        SET_BITS_TO_LE_4BYTE(__pdesc+20, 7, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc+20, 7, 1, __val)
 #define SET_TX_DESC_DATA_RATE_FB_LIMIT(__pdesc, __val)  \
-        SET_BITS_TO_LE_4BYTE(__pdesc+20, 8, 5, __val)
+        SET_BITS_OFFSET_LE(__pdesc+20, 8, 5, __val)
 #define SET_TX_DESC_RTS_RATE_FB_LIMIT(__pdesc, __val)   \
-        SET_BITS_TO_LE_4BYTE(__pdesc+20, 13, 4, __val)
+        SET_BITS_OFFSET_LE(__pdesc+20, 13, 4, __val)
 #define SET_TX_DESC_RETRY_LIMIT_ENABLE(__pdesc, __val)  \
-        SET_BITS_TO_LE_4BYTE(__pdesc+20, 17, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc+20, 17, 1, __val)
 #define SET_TX_DESC_DATA_RETRY_LIMIT(__pdesc, __val)    \
-        SET_BITS_TO_LE_4BYTE(__pdesc+20, 18, 6, __val)
+        SET_BITS_OFFSET_LE(__pdesc+20, 18, 6, __val)
 #define SET_TX_DESC_USB_TXAGG_NUM(__pdesc, __val)       \
-        SET_BITS_TO_LE_4BYTE(__pdesc+20, 24, 8, __val)
+        SET_BITS_OFFSET_LE(__pdesc+20, 24, 8, __val)
 
 #define GET_TX_DESC_TX_RATE(__pdesc)                    \
-        LE_BITS_TO_4BYTE(__pdesc+20, 0, 6)
+        SHIFT_AND_MASK_LE(__pdesc+20, 0, 6)
 #define GET_TX_DESC_DATA_SHORTGI(__pdesc)               \
-        LE_BITS_TO_4BYTE(__pdesc+20, 6, 1)
+        SHIFT_AND_MASK_LE(__pdesc+20, 6, 1)
 #define GET_TX_DESC_CCX_TAG(__pdesc)                    \
-        LE_BITS_TO_4BYTE(__pdesc+20, 7, 1)
+        SHIFT_AND_MASK_LE(__pdesc+20, 7, 1)
 #define GET_TX_DESC_DATA_RATE_FB_LIMIT(__pdesc)         \
-        LE_BITS_TO_4BYTE(__pdesc+20, 8, 5)
+        SHIFT_AND_MASK_LE(__pdesc+20, 8, 5)
 #define GET_TX_DESC_RTS_RATE_FB_LIMIT(__pdesc)          \
-        LE_BITS_TO_4BYTE(__pdesc+20, 13, 4)
+        SHIFT_AND_MASK_LE(__pdesc+20, 13, 4)
 #define GET_TX_DESC_RETRY_LIMIT_ENABLE(__pdesc)         \
-        LE_BITS_TO_4BYTE(__pdesc+20, 17, 1)
+        SHIFT_AND_MASK_LE(__pdesc+20, 17, 1)
 #define GET_TX_DESC_DATA_RETRY_LIMIT(__pdesc)           \
-        LE_BITS_TO_4BYTE(__pdesc+20, 18, 6)
+        SHIFT_AND_MASK_LE(__pdesc+20, 18, 6)
 #define GET_TX_DESC_USB_TXAGG_NUM(__pdesc)              \
-        LE_BITS_TO_4BYTE(__pdesc+20, 24, 8)
+        SHIFT_AND_MASK_LE(__pdesc+20, 24, 8)
 
 #define SET_TX_DESC_TXAGC_A(__pdesc, __val)             \
-        SET_BITS_TO_LE_4BYTE(__pdesc+24, 0, 5, __val)
+        SET_BITS_OFFSET_LE(__pdesc+24, 0, 5, __val)
 #define SET_TX_DESC_TXAGC_B(__pdesc, __val)             \
-        SET_BITS_TO_LE_4BYTE(__pdesc+24, 5, 5, __val)
+        SET_BITS_OFFSET_LE(__pdesc+24, 5, 5, __val)
 #define SET_TX_DESC_USE_MAX_LEN(__pdesc, __val)         \
-        SET_BITS_TO_LE_4BYTE(__pdesc+24, 10, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc+24, 10, 1, __val)
 #define SET_TX_DESC_MAX_AGG_NUM(__pdesc, __val)         \
-        SET_BITS_TO_LE_4BYTE(__pdesc+24, 11, 5, __val)
+        SET_BITS_OFFSET_LE(__pdesc+24, 11, 5, __val)
 #define SET_TX_DESC_MCSG1_MAX_LEN(__pdesc, __val)       \
-        SET_BITS_TO_LE_4BYTE(__pdesc+24, 16, 4, __val)
+        SET_BITS_OFFSET_LE(__pdesc+24, 16, 4, __val)
 #define SET_TX_DESC_MCSG2_MAX_LEN(__pdesc, __val)       \
-        SET_BITS_TO_LE_4BYTE(__pdesc+24, 20, 4, __val)
+        SET_BITS_OFFSET_LE(__pdesc+24, 20, 4, __val)
 #define SET_TX_DESC_MCSG3_MAX_LEN(__pdesc, __val)       \
-        SET_BITS_TO_LE_4BYTE(__pdesc+24, 24, 4, __val)
+        SET_BITS_OFFSET_LE(__pdesc+24, 24, 4, __val)
 #define SET_TX_DESC_MCS7_SGI_MAX_LEN(__pdesc, __val)    \
-        SET_BITS_TO_LE_4BYTE(__pdesc+24, 28, 4, __val)
+        SET_BITS_OFFSET_LE(__pdesc+24, 28, 4, __val)
 
 #define GET_TX_DESC_TXAGC_A(__pdesc)                    \
-        LE_BITS_TO_4BYTE(__pdesc+24, 0, 5)
+        SHIFT_AND_MASK_LE(__pdesc+24, 0, 5)
 #define GET_TX_DESC_TXAGC_B(__pdesc)                    \
-        LE_BITS_TO_4BYTE(__pdesc+24, 5, 5)
+        SHIFT_AND_MASK_LE(__pdesc+24, 5, 5)
 #define GET_TX_DESC_USE_MAX_LEN(__pdesc)                \
-        LE_BITS_TO_4BYTE(__pdesc+24, 10, 1)
+        SHIFT_AND_MASK_LE(__pdesc+24, 10, 1)
 #define GET_TX_DESC_MAX_AGG_NUM(__pdesc)                \
-        LE_BITS_TO_4BYTE(__pdesc+24, 11, 5)
+        SHIFT_AND_MASK_LE(__pdesc+24, 11, 5)
 #define GET_TX_DESC_MCSG1_MAX_LEN(__pdesc)              \
-        LE_BITS_TO_4BYTE(__pdesc+24, 16, 4)
+        SHIFT_AND_MASK_LE(__pdesc+24, 16, 4)
 #define GET_TX_DESC_MCSG2_MAX_LEN(__pdesc)              \
-        LE_BITS_TO_4BYTE(__pdesc+24, 20, 4)
+        SHIFT_AND_MASK_LE(__pdesc+24, 20, 4)
 #define GET_TX_DESC_MCSG3_MAX_LEN(__pdesc)              \
-        LE_BITS_TO_4BYTE(__pdesc+24, 24, 4)
+        SHIFT_AND_MASK_LE(__pdesc+24, 24, 4)
 #define GET_TX_DESC_MCS7_SGI_MAX_LEN(__pdesc)           \
-        LE_BITS_TO_4BYTE(__pdesc+24, 28, 4)
+        SHIFT_AND_MASK_LE(__pdesc+24, 28, 4)
 
 #define SET_TX_DESC_TX_BUFFER_SIZE(__pdesc, __val)      \
-        SET_BITS_TO_LE_4BYTE(__pdesc+28, 0, 16, __val)
+        SET_BITS_OFFSET_LE(__pdesc+28, 0, 16, __val)
 #define SET_TX_DESC_MCSG4_MAX_LEN(__pdesc, __val)       \
-        SET_BITS_TO_LE_4BYTE(__pdesc+28, 16, 4, __val)
+        SET_BITS_OFFSET_LE(__pdesc+28, 16, 4, __val)
 #define SET_TX_DESC_MCSG5_MAX_LEN(__pdesc, __val)       \
-        SET_BITS_TO_LE_4BYTE(__pdesc+28, 20, 4, __val)
+        SET_BITS_OFFSET_LE(__pdesc+28, 20, 4, __val)
 #define SET_TX_DESC_MCSG6_MAX_LEN(__pdesc, __val)       \
-        SET_BITS_TO_LE_4BYTE(__pdesc+28, 24, 4, __val)
+        SET_BITS_OFFSET_LE(__pdesc+28, 24, 4, __val)
 #define SET_TX_DESC_MCS15_SGI_MAX_LEN(__pdesc, __val)   \
-        SET_BITS_TO_LE_4BYTE(__pdesc+28, 28, 4, __val)
+        SET_BITS_OFFSET_LE(__pdesc+28, 28, 4, __val)
 
 #define GET_TX_DESC_TX_BUFFER_SIZE(__pdesc)             \
-        LE_BITS_TO_4BYTE(__pdesc+28, 0, 16)
+        SHIFT_AND_MASK_LE(__pdesc+28, 0, 16)
 #define GET_TX_DESC_MCSG4_MAX_LEN(__pdesc)              \
-        LE_BITS_TO_4BYTE(__pdesc+28, 16, 4)
+        SHIFT_AND_MASK_LE(__pdesc+28, 16, 4)
 #define GET_TX_DESC_MCSG5_MAX_LEN(__pdesc)              \
-        LE_BITS_TO_4BYTE(__pdesc+28, 20, 4)
+        SHIFT_AND_MASK_LE(__pdesc+28, 20, 4)
 #define GET_TX_DESC_MCSG6_MAX_LEN(__pdesc)              \
-        LE_BITS_TO_4BYTE(__pdesc+28, 24, 4)
+        SHIFT_AND_MASK_LE(__pdesc+28, 24, 4)
 #define GET_TX_DESC_MCS15_SGI_MAX_LEN(__pdesc)          \
-        LE_BITS_TO_4BYTE(__pdesc+28, 28, 4)
+        SHIFT_AND_MASK_LE(__pdesc+28, 28, 4)
 
 #define SET_TX_DESC_TX_BUFFER_ADDRESS(__pdesc, __val)   \
-        SET_BITS_TO_LE_4BYTE(__pdesc+32, 0, 32, __val)
+        SET_BITS_OFFSET_LE(__pdesc+32, 0, 32, __val)
 #define SET_TX_DESC_TX_BUFFER_ADDRESS64(__pdesc, __val) \
-        SET_BITS_TO_LE_4BYTE(__pdesc+36, 0, 32, __val)
+        SET_BITS_OFFSET_LE(__pdesc+36, 0, 32, __val)
 
 #define GET_TX_DESC_TX_BUFFER_ADDRESS(__pdesc)          \
-        LE_BITS_TO_4BYTE(__pdesc+32, 0, 32)
+        SHIFT_AND_MASK_LE(__pdesc+32, 0, 32)
 #define GET_TX_DESC_TX_BUFFER_ADDRESS64(__pdesc)        \
-        LE_BITS_TO_4BYTE(__pdesc+36, 0, 32)
+        SHIFT_AND_MASK_LE(__pdesc+36, 0, 32)
 
 #define SET_TX_DESC_NEXT_DESC_ADDRESS(__pdesc, __val)   \
-        SET_BITS_TO_LE_4BYTE(__pdesc+40, 0, 32, __val)
+        SET_BITS_OFFSET_LE(__pdesc+40, 0, 32, __val)
 #define SET_TX_DESC_NEXT_DESC_ADDRESS64(__pdesc, __val) \
-        SET_BITS_TO_LE_4BYTE(__pdesc+44, 0, 32, __val)
+        SET_BITS_OFFSET_LE(__pdesc+44, 0, 32, __val)
 
 #define GET_TX_DESC_NEXT_DESC_ADDRESS(__pdesc)          \
-        LE_BITS_TO_4BYTE(__pdesc+40, 0, 32)
+        SHIFT_AND_MASK_LE(__pdesc+40, 0, 32)
 #define GET_TX_DESC_NEXT_DESC_ADDRESS64(__pdesc)        \
-        LE_BITS_TO_4BYTE(__pdesc+44, 0, 32)
+        SHIFT_AND_MASK_LE(__pdesc+44, 0, 32)
 
 #define GET_RX_DESC_PKT_LEN(__pdesc)                    \
-        LE_BITS_TO_4BYTE(__pdesc, 0, 14)
+        SHIFT_AND_MASK_LE(__pdesc, 0, 14)
 #define GET_RX_DESC_CRC32(__pdesc)                      \
-        LE_BITS_TO_4BYTE(__pdesc, 14, 1)
+        SHIFT_AND_MASK_LE(__pdesc, 14, 1)
 #define GET_RX_DESC_ICV(__pdesc)                        \
-        LE_BITS_TO_4BYTE(__pdesc, 15, 1)
+        SHIFT_AND_MASK_LE(__pdesc, 15, 1)
 #define GET_RX_DESC_DRV_INFO_SIZE(__pdesc)              \
-        LE_BITS_TO_4BYTE(__pdesc, 16, 4)
+        SHIFT_AND_MASK_LE(__pdesc, 16, 4)
 #define GET_RX_DESC_SECURITY(__pdesc)                   \
-        LE_BITS_TO_4BYTE(__pdesc, 20, 3)
+        SHIFT_AND_MASK_LE(__pdesc, 20, 3)
 #define GET_RX_DESC_QOS(__pdesc)                        \
-        LE_BITS_TO_4BYTE(__pdesc, 23, 1)
+        SHIFT_AND_MASK_LE(__pdesc, 23, 1)
 #define GET_RX_DESC_SHIFT(__pdesc)                      \
-        LE_BITS_TO_4BYTE(__pdesc, 24, 2)
+        SHIFT_AND_MASK_LE(__pdesc, 24, 2)
 #define GET_RX_DESC_PHYST(__pdesc)                      \
-        LE_BITS_TO_4BYTE(__pdesc, 26, 1)
+        SHIFT_AND_MASK_LE(__pdesc, 26, 1)
 #define GET_RX_DESC_SWDEC(__pdesc)                      \
-        LE_BITS_TO_4BYTE(__pdesc, 27, 1)
+        SHIFT_AND_MASK_LE(__pdesc, 27, 1)
 #define GET_RX_DESC_LS(__pdesc)                         \
-        LE_BITS_TO_4BYTE(__pdesc, 28, 1)
+        SHIFT_AND_MASK_LE(__pdesc, 28, 1)
 #define GET_RX_DESC_FS(__pdesc)                         \
-        LE_BITS_TO_4BYTE(__pdesc, 29, 1)
+        SHIFT_AND_MASK_LE(__pdesc, 29, 1)
 #define GET_RX_DESC_EOR(__pdesc)                        \
-        LE_BITS_TO_4BYTE(__pdesc, 30, 1)
+        SHIFT_AND_MASK_LE(__pdesc, 30, 1)
 #define GET_RX_DESC_OWN(__pdesc)                        \
-        LE_BITS_TO_4BYTE(__pdesc, 31, 1)
+        SHIFT_AND_MASK_LE(__pdesc, 31, 1)
 
 #define SET_RX_DESC_PKT_LEN(__pdesc, __val)             \
-        SET_BITS_TO_LE_4BYTE(__pdesc, 0, 14, __val)
+        SET_BITS_OFFSET_LE(__pdesc, 0, 14, __val)
 #define SET_RX_DESC_EOR(__pdesc, __val)                 \
-        SET_BITS_TO_LE_4BYTE(__pdesc, 30, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc, 30, 1, __val)
 #define SET_RX_DESC_OWN(__pdesc, __val)                 \
-        SET_BITS_TO_LE_4BYTE(__pdesc, 31, 1, __val)
+        SET_BITS_OFFSET_LE(__pdesc, 31, 1, __val)
 
 #define GET_RX_DESC_MACID(__pdesc)                      \
-        LE_BITS_TO_4BYTE(__pdesc+4, 0, 5)
+        SHIFT_AND_MASK_LE(__pdesc+4, 0, 5)
 #define GET_RX_DESC_TID(__pdesc)                        \
-        LE_BITS_TO_4BYTE(__pdesc+4, 5, 4)
+        SHIFT_AND_MASK_LE(__pdesc+4, 5, 4)
 #define GET_RX_DESC_HWRSVD(__pdesc)                     \
-        LE_BITS_TO_4BYTE(__pdesc+4, 9, 5)
+        SHIFT_AND_MASK_LE(__pdesc+4, 9, 5)
 #define GET_RX_DESC_PAGGR(__pdesc)                      \
-        LE_BITS_TO_4BYTE(__pdesc+4, 14, 1)
+        SHIFT_AND_MASK_LE(__pdesc+4, 14, 1)
 #define GET_RX_DESC_FAGGR(__pdesc)                      \
-        LE_BITS_TO_4BYTE(__pdesc+4, 15, 1)
+        SHIFT_AND_MASK_LE(__pdesc+4, 15, 1)
 #define GET_RX_DESC_A1_FIT(__pdesc)                     \
-        LE_BITS_TO_4BYTE(__pdesc+4, 16, 4)
+        SHIFT_AND_MASK_LE(__pdesc+4, 16, 4)
 #define GET_RX_DESC_A2_FIT(__pdesc)                     \
-        LE_BITS_TO_4BYTE(__pdesc+4, 20, 4)
+        SHIFT_AND_MASK_LE(__pdesc+4, 20, 4)
 #define GET_RX_DESC_PAM(__pdesc)                        \
-        LE_BITS_TO_4BYTE(__pdesc+4, 24, 1)
+        SHIFT_AND_MASK_LE(__pdesc+4, 24, 1)
 #define GET_RX_DESC_PWR(__pdesc)                        \
-        LE_BITS_TO_4BYTE(__pdesc+4, 25, 1)
+        SHIFT_AND_MASK_LE(__pdesc+4, 25, 1)
 #define GET_RX_DESC_MD(__pdesc)                         \
-        LE_BITS_TO_4BYTE(__pdesc+4, 26, 1)
+        SHIFT_AND_MASK_LE(__pdesc+4, 26, 1)
 #define GET_RX_DESC_MF(__pdesc)                         \
-        LE_BITS_TO_4BYTE(__pdesc+4, 27, 1)
+        SHIFT_AND_MASK_LE(__pdesc+4, 27, 1)
 #define GET_RX_DESC_TYPE(__pdesc)                       \
-        LE_BITS_TO_4BYTE(__pdesc+4, 28, 2)
+        SHIFT_AND_MASK_LE(__pdesc+4, 28, 2)
 #define GET_RX_DESC_MC(__pdesc)                         \
-        LE_BITS_TO_4BYTE(__pdesc+4, 30, 1)
+        SHIFT_AND_MASK_LE(__pdesc+4, 30, 1)
 #define GET_RX_DESC_BC(__pdesc)                         \
-        LE_BITS_TO_4BYTE(__pdesc+4, 31, 1)
+        SHIFT_AND_MASK_LE(__pdesc+4, 31, 1)
 #define GET_RX_DESC_SEQ(__pdesc)                        \
-        LE_BITS_TO_4BYTE(__pdesc+8, 0, 12)
+        SHIFT_AND_MASK_LE(__pdesc+8, 0, 12)
 #define GET_RX_DESC_FRAG(__pdesc)                       \
-        LE_BITS_TO_4BYTE(__pdesc+8, 12, 4)
+        SHIFT_AND_MASK_LE(__pdesc+8, 12, 4)
 #define GET_RX_DESC_NEXT_PKT_LEN(__pdesc)               \
-        LE_BITS_TO_4BYTE(__pdesc+8, 16, 14)
+        SHIFT_AND_MASK_LE(__pdesc+8, 16, 14)
 #define GET_RX_DESC_NEXT_IND(__pdesc)                   \
-        LE_BITS_TO_4BYTE(__pdesc+8, 30, 1)
+        SHIFT_AND_MASK_LE(__pdesc+8, 30, 1)
 #define GET_RX_DESC_RSVD(__pdesc)                       \
-        LE_BITS_TO_4BYTE(__pdesc+8, 31, 1)
+        SHIFT_AND_MASK_LE(__pdesc+8, 31, 1)
 
 #define GET_RX_DESC_RXMCS(__pdesc)                      \
-        LE_BITS_TO_4BYTE(__pdesc+12, 0, 6)
+        SHIFT_AND_MASK_LE(__pdesc+12, 0, 6)
 #define GET_RX_DESC_RXHT(__pdesc)                       \
-        LE_BITS_TO_4BYTE(__pdesc+12, 6, 1)
+        SHIFT_AND_MASK_LE(__pdesc+12, 6, 1)
 #define GET_RX_DESC_SPLCP(__pdesc)                      \
-        LE_BITS_TO_4BYTE(__pdesc+12, 8, 1)
+        SHIFT_AND_MASK_LE(__pdesc+12, 8, 1)
 #define GET_RX_DESC_BW(__pdesc)                         \
-        LE_BITS_TO_4BYTE(__pdesc+12, 9, 1)
+        SHIFT_AND_MASK_LE(__pdesc+12, 9, 1)
 #define GET_RX_DESC_HTC(__pdesc)                        \
-        LE_BITS_TO_4BYTE(__pdesc+12, 10, 1)
+        SHIFT_AND_MASK_LE(__pdesc+12, 10, 1)
 #define GET_RX_DESC_HWPC_ERR(__pdesc)                   \
-        LE_BITS_TO_4BYTE(__pdesc+12, 14, 1)
+        SHIFT_AND_MASK_LE(__pdesc+12, 14, 1)
 #define GET_RX_DESC_HWPC_IND(__pdesc)                   \
-        LE_BITS_TO_4BYTE(__pdesc+12, 15, 1)
+        SHIFT_AND_MASK_LE(__pdesc+12, 15, 1)
 #define GET_RX_DESC_IV0(__pdesc)                        \
-        LE_BITS_TO_4BYTE(__pdesc+12, 16, 16)
+        SHIFT_AND_MASK_LE(__pdesc+12, 16, 16)
 
 #define GET_RX_DESC_IV1(__pdesc)                        \
-        LE_BITS_TO_4BYTE(__pdesc+16, 0, 32)
+        SHIFT_AND_MASK_LE(__pdesc+16, 0, 32)
 #define GET_RX_DESC_TSFL(__pdesc)                       \
-        LE_BITS_TO_4BYTE(__pdesc+20, 0, 32)
+        SHIFT_AND_MASK_LE(__pdesc+20, 0, 32)
 
 #define GET_RX_DESC_BUFF_ADDR(__pdesc)                  \
-        LE_BITS_TO_4BYTE(__pdesc+24, 0, 32)
+        SHIFT_AND_MASK_LE(__pdesc+24, 0, 32)
 #define GET_RX_DESC_BUFF_ADDR64(__pdesc)                \
-        LE_BITS_TO_4BYTE(__pdesc+28, 0, 32)
+        SHIFT_AND_MASK_LE(__pdesc+28, 0, 32)
 
 #define SET_RX_DESC_BUFF_ADDR(__pdesc, __val)           \
-        SET_BITS_TO_LE_4BYTE(__pdesc+24, 0, 32, __val)
+        SET_BITS_OFFSET_LE(__pdesc+24, 0, 32, __val)
 #define SET_RX_DESC_BUFF_ADDR64(__pdesc, __val)         \
-        SET_BITS_TO_LE_4BYTE(__pdesc+28, 0, 32, __val)
+        SET_BITS_OFFSET_LE(__pdesc+28, 0, 32, __val)
 
 #define CLEAR_PCI_TX_DESC_CONTENT(__pdesc, _size)       \
 do {                                                    \
@@ -711,4 +735,6 @@ void rtl92ce_tx_polling(struct ieee80211_hw *hw, unsigned int hw_queue);
 void rtl92ce_tx_fill_cmddesc(struct ieee80211_hw *hw, u8 *pdesc,
                              bool b_firstseg, bool b_lastseg,
                              struct sk_buff *skb);
+bool _rtl92c_cmd_send_packet(struct ieee80211_hw *hw, struct sk_buff *skb);
+
 #endif
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/Makefile b/drivers/net/wireless/rtlwifi/rtl8192cu/Makefile
new file mode 100644
index 000000000000..91c65122ca80
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192cu/Makefile
@@ -0,0 +1,15 @@
+rtl8192cu-objs :=               \
+                dm.o            \
+                fw.o            \
+                hw.o            \
+                led.o           \
+                mac.o           \
+                phy.o           \
+                rf.o            \
+                sw.o            \
+                table.o         \
+                trx.o
+
+obj-$(CONFIG_RTL8192CU) += rtl8192cu.o
+
+ccflags-y += -D__CHECK_ENDIAN__
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/def.h b/drivers/net/wireless/rtlwifi/rtl8192cu/def.h
new file mode 100644
index 000000000000..c54940ea72fe
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192cu/def.h
@@ -0,0 +1,62 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#include "../rtl8192ce/def.h"
+
+/*-------------------------------------------------------------------------
+ *      Chip specific
+ *-------------------------------------------------------------------------*/
+#define CHIP_8723                       BIT(2) /* RTL8723 With BT feature */
+#define CHIP_8723_DRV_REV               BIT(3) /* RTL8723 Driver Revised */
+#define NORMAL_CHIP                     BIT(4)
+#define CHIP_VENDOR_UMC                 BIT(5)
+#define CHIP_VENDOR_UMC_B_CUT           BIT(6)
+
+#define IS_NORMAL_CHIP(version)         \
+        (((version) & NORMAL_CHIP) ? true : false)
+
+#define IS_8723_SERIES(version)         \
+        (((version) & CHIP_8723) ? true : false)
+
+#define IS_92C_1T2R(version)            \
+        (((version) & CHIP_92C) && ((version) & CHIP_92C_1T2R))
+
+#define IS_VENDOR_UMC(version)          \
+        (((version) & CHIP_VENDOR_UMC) ? true : false)
+
+#define IS_VENDOR_UMC_A_CUT(version)    \
+        (((version) & CHIP_VENDOR_UMC) ? (((version) & (BIT(6) | BIT(7))) ? \
+        false : true) : false)
+
+#define IS_VENDOR_8723_A_CUT(version)   \
+        (((version) & CHIP_VENDOR_UMC) ? (((version) & (BIT(6))) ? \
+        false : true) : false)
+
+#define CHIP_BONDING_92C_1T2R   0x1
+#define CHIP_BONDING_IDENTIFIER(_value) (((_value) >> 22) & 0x3)
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/dm.c b/drivers/net/wireless/rtlwifi/rtl8192cu/dm.c
new file mode 100644
index 000000000000..a4649a2f7e6f
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192cu/dm.c
@@ -0,0 +1,116 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#include "../wifi.h"
+#include "../base.h"
+#include "reg.h"
+#include "def.h"
+#include "phy.h"
+#include "dm.h"
+#include "fw.h"
+
+#include "../rtl8192c/dm_common.c"
+
+void rtl92c_dm_dynamic_txpower(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        long undecorated_smoothed_pwdb;
+
+        if (!rtlpriv->dm.dynamic_txpower_enable)
+                return;
+
+        if (rtlpriv->dm.dm_flag & HAL_DM_HIPWR_DISABLE) {
+                rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
+                return;
+        }
+
+        if ((mac->link_state < MAC80211_LINKED) &&
+            (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb == 0)) {
+                RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
+                         ("Not connected to any\n"));
+
+                rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
+
+                rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
+                return;
+        }
+
+        if (mac->link_state >= MAC80211_LINKED) {
+                if (mac->opmode == NL80211_IFTYPE_ADHOC) {
+                        undecorated_smoothed_pwdb =
+                            rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
+                        RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
+                                 ("AP Client PWDB = 0x%lx\n",
+                                  undecorated_smoothed_pwdb));
+                } else {
+                        undecorated_smoothed_pwdb =
+                            rtlpriv->dm.undecorated_smoothed_pwdb;
+                        RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
+                                 ("STA Default Port PWDB = 0x%lx\n",
+                                  undecorated_smoothed_pwdb));
+                }
+        } else {
+                undecorated_smoothed_pwdb =
+                    rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
+
+                RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
+                         ("AP Ext Port PWDB = 0x%lx\n",
+                          undecorated_smoothed_pwdb));
+        }
+
+        if (undecorated_smoothed_pwdb >= TX_POWER_NEAR_FIELD_THRESH_LVL2) {
+                rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_LEVEL1;
+                RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
+                         ("TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x0)\n"));
+        } else if ((undecorated_smoothed_pwdb <
+                    (TX_POWER_NEAR_FIELD_THRESH_LVL2 - 3)) &&
+                   (undecorated_smoothed_pwdb >=
+                    TX_POWER_NEAR_FIELD_THRESH_LVL1)) {
+
+                rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_LEVEL1;
+                RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
+                         ("TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x10)\n"));
+        } else if (undecorated_smoothed_pwdb <
+                   (TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) {
+                rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
+                RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
+                         ("TXHIGHPWRLEVEL_NORMAL\n"));
+        }
+
+        if ((rtlpriv->dm.dynamic_txhighpower_lvl != rtlpriv->dm.last_dtp_lvl)) {
+                RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
+                         ("PHY_SetTxPowerLevel8192S() Channel = %d\n",
+                          rtlphy->current_channel));
+                rtl92c_phy_set_txpower_level(hw, rtlphy->current_channel);
+        }
+
+        rtlpriv->dm.last_dtp_lvl = rtlpriv->dm.dynamic_txhighpower_lvl;
+}
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/dm.h b/drivers/net/wireless/rtlwifi/rtl8192cu/dm.h
new file mode 100644
index 000000000000..5e7fbfc2851b
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192cu/dm.h
@@ -0,0 +1,32 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#include "../rtl8192ce/dm.h"
+
+void rtl92c_dm_dynamic_txpower(struct ieee80211_hw *hw);
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/fw.c b/drivers/net/wireless/rtlwifi/rtl8192cu/fw.c
new file mode 100644
index 000000000000..8e350eea3422
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192cu/fw.c
@@ -0,0 +1,30 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#include "../rtl8192ce/fw.c"
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/fw.h b/drivers/net/wireless/rtlwifi/rtl8192cu/fw.h
new file mode 100644
index 000000000000..a3bbac811d08
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192cu/fw.h
@@ -0,0 +1,30 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#include "../rtl8192ce/fw.h"
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/hw.c b/drivers/net/wireless/rtlwifi/rtl8192cu/hw.c
new file mode 100644
index 000000000000..df8fe3b51c9b
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192cu/hw.c
@@ -0,0 +1,2505 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#include "../wifi.h"
+#include "../efuse.h"
+#include "../base.h"
+#include "../cam.h"
+#include "../ps.h"
+#include "../usb.h"
+#include "reg.h"
+#include "def.h"
+#include "phy.h"
+#include "mac.h"
+#include "dm.h"
+#include "fw.h"
+#include "hw.h"
+#include "trx.h"
+#include "led.h"
+#include "table.h"
+
+static void _rtl92cu_phy_param_tab_init(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtlpriv);
+
+        rtlphy->hwparam_tables[MAC_REG].length = RTL8192CUMAC_2T_ARRAYLENGTH;
+        rtlphy->hwparam_tables[MAC_REG].pdata = RTL8192CUMAC_2T_ARRAY;
+        if (IS_HIGHT_PA(rtlefuse->board_type)) {
+                rtlphy->hwparam_tables[PHY_REG_PG].length =
+                        RTL8192CUPHY_REG_Array_PG_HPLength;
+                rtlphy->hwparam_tables[PHY_REG_PG].pdata =
+                        RTL8192CUPHY_REG_Array_PG_HP;
+        } else {
+                rtlphy->hwparam_tables[PHY_REG_PG].length =
+                        RTL8192CUPHY_REG_ARRAY_PGLENGTH;
+                rtlphy->hwparam_tables[PHY_REG_PG].pdata =
+                        RTL8192CUPHY_REG_ARRAY_PG;
+        }
+        /* 2T */
+        rtlphy->hwparam_tables[PHY_REG_2T].length =
+                        RTL8192CUPHY_REG_2TARRAY_LENGTH;
+        rtlphy->hwparam_tables[PHY_REG_2T].pdata =
+                        RTL8192CUPHY_REG_2TARRAY;
+        rtlphy->hwparam_tables[RADIOA_2T].length =
+                        RTL8192CURADIOA_2TARRAYLENGTH;
+        rtlphy->hwparam_tables[RADIOA_2T].pdata =
+                        RTL8192CURADIOA_2TARRAY;
+        rtlphy->hwparam_tables[RADIOB_2T].length =
+                        RTL8192CURADIOB_2TARRAYLENGTH;
+        rtlphy->hwparam_tables[RADIOB_2T].pdata =
+                        RTL8192CU_RADIOB_2TARRAY;
+        rtlphy->hwparam_tables[AGCTAB_2T].length =
+                        RTL8192CUAGCTAB_2TARRAYLENGTH;
+        rtlphy->hwparam_tables[AGCTAB_2T].pdata =
+                        RTL8192CUAGCTAB_2TARRAY;
+        /* 1T */
+        if (IS_HIGHT_PA(rtlefuse->board_type)) {
+                rtlphy->hwparam_tables[PHY_REG_1T].length =
+                        RTL8192CUPHY_REG_1T_HPArrayLength;
+                rtlphy->hwparam_tables[PHY_REG_1T].pdata =
+                        RTL8192CUPHY_REG_1T_HPArray;
+                rtlphy->hwparam_tables[RADIOA_1T].length =
+                        RTL8192CURadioA_1T_HPArrayLength;
+                rtlphy->hwparam_tables[RADIOA_1T].pdata =
+                        RTL8192CURadioA_1T_HPArray;
+                rtlphy->hwparam_tables[RADIOB_1T].length =
+                        RTL8192CURADIOB_1TARRAYLENGTH;
+                rtlphy->hwparam_tables[RADIOB_1T].pdata =
+                        RTL8192CU_RADIOB_1TARRAY;
+                rtlphy->hwparam_tables[AGCTAB_1T].length =
+                        RTL8192CUAGCTAB_1T_HPArrayLength;
+                rtlphy->hwparam_tables[AGCTAB_1T].pdata =
+                        Rtl8192CUAGCTAB_1T_HPArray;
+        } else {
+                rtlphy->hwparam_tables[PHY_REG_1T].length =
+                         RTL8192CUPHY_REG_1TARRAY_LENGTH;
+                rtlphy->hwparam_tables[PHY_REG_1T].pdata =
+                        RTL8192CUPHY_REG_1TARRAY;
+                rtlphy->hwparam_tables[RADIOA_1T].length =
+                        RTL8192CURADIOA_1TARRAYLENGTH;
+                rtlphy->hwparam_tables[RADIOA_1T].pdata =
+                        RTL8192CU_RADIOA_1TARRAY;
+                rtlphy->hwparam_tables[RADIOB_1T].length =
+                        RTL8192CURADIOB_1TARRAYLENGTH;
+                rtlphy->hwparam_tables[RADIOB_1T].pdata =
+                        RTL8192CU_RADIOB_1TARRAY;
+                rtlphy->hwparam_tables[AGCTAB_1T].length =
+                        RTL8192CUAGCTAB_1TARRAYLENGTH;
+                rtlphy->hwparam_tables[AGCTAB_1T].pdata =
+                        RTL8192CUAGCTAB_1TARRAY;
+        }
+}
+
+static void _rtl92cu_read_txpower_info_from_hwpg(struct ieee80211_hw *hw,
+                                                 bool autoload_fail,
+                                                 u8 *hwinfo)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        u8 rf_path, index, tempval;
+        u16 i;
+
+        for (rf_path = 0; rf_path < 2; rf_path++) {
+                for (i = 0; i < 3; i++) {
+                        if (!autoload_fail) {
+                                rtlefuse->
+                                    eeprom_chnlarea_txpwr_cck[rf_path][i] =
+                                    hwinfo[EEPROM_TXPOWERCCK + rf_path * 3 + i];
+                                rtlefuse->
+                                    eeprom_chnlarea_txpwr_ht40_1s[rf_path][i] =
+                                    hwinfo[EEPROM_TXPOWERHT40_1S + rf_path * 3 +
+                                           i];
+                        } else {
+                                rtlefuse->
+                                    eeprom_chnlarea_txpwr_cck[rf_path][i] =
+                                    EEPROM_DEFAULT_TXPOWERLEVEL;
+                                rtlefuse->
+                                    eeprom_chnlarea_txpwr_ht40_1s[rf_path][i] =
+                                    EEPROM_DEFAULT_TXPOWERLEVEL;
+                        }
+                }
+        }
+        for (i = 0; i < 3; i++) {
+                if (!autoload_fail)
+                        tempval = hwinfo[EEPROM_TXPOWERHT40_2SDIFF + i];
+                else
+                        tempval = EEPROM_DEFAULT_HT40_2SDIFF;
+                rtlefuse->eeprom_chnlarea_txpwr_ht40_2sdiif[RF90_PATH_A][i] =
+                    (tempval & 0xf);
+                rtlefuse->eeprom_chnlarea_txpwr_ht40_2sdiif[RF90_PATH_B][i] =
+                    ((tempval & 0xf0) >> 4);
+        }
+        for (rf_path = 0; rf_path < 2; rf_path++)
+                for (i = 0; i < 3; i++)
+                        RTPRINT(rtlpriv, FINIT, INIT_EEPROM,
+                                ("RF(%d) EEPROM CCK Area(%d) = 0x%x\n", rf_path,
+                                 i, rtlefuse->
+                                 eeprom_chnlarea_txpwr_cck[rf_path][i]));
+        for (rf_path = 0; rf_path < 2; rf_path++)
+                for (i = 0; i < 3; i++)
+                        RTPRINT(rtlpriv, FINIT, INIT_EEPROM,
+                                ("RF(%d) EEPROM HT40 1S Area(%d) = 0x%x\n",
+                                 rf_path, i,
+                                 rtlefuse->
+                                 eeprom_chnlarea_txpwr_ht40_1s[rf_path][i]));
+        for (rf_path = 0; rf_path < 2; rf_path++)
+                for (i = 0; i < 3; i++)
+                        RTPRINT(rtlpriv, FINIT, INIT_EEPROM,
+                                ("RF(%d) EEPROM HT40 2S Diff Area(%d) = 0x%x\n",
+                                 rf_path, i,
+                                 rtlefuse->
+                                 eeprom_chnlarea_txpwr_ht40_2sdiif[rf_path]
+                                 [i]));
+        for (rf_path = 0; rf_path < 2; rf_path++) {
+                for (i = 0; i < 14; i++) {
+                        index = _rtl92c_get_chnl_group((u8) i);
+                        rtlefuse->txpwrlevel_cck[rf_path][i] =
+                            rtlefuse->eeprom_chnlarea_txpwr_cck[rf_path][index];
+                        rtlefuse->txpwrlevel_ht40_1s[rf_path][i] =
+                            rtlefuse->
+                            eeprom_chnlarea_txpwr_ht40_1s[rf_path][index];
+                        if ((rtlefuse->
+                             eeprom_chnlarea_txpwr_ht40_1s[rf_path][index] -
+                             rtlefuse->
+                             eeprom_chnlarea_txpwr_ht40_2sdiif[rf_path][index])
+                            > 0) {
+                                rtlefuse->txpwrlevel_ht40_2s[rf_path][i] =
+                                    rtlefuse->
+                                    eeprom_chnlarea_txpwr_ht40_1s[rf_path]
+                                    [index] - rtlefuse->
+                                    eeprom_chnlarea_txpwr_ht40_2sdiif[rf_path]
+                                    [index];
+                        } else {
+                                rtlefuse->txpwrlevel_ht40_2s[rf_path][i] = 0;
+                        }
+                }
+                for (i = 0; i < 14; i++) {
+                        RTPRINT(rtlpriv, FINIT, INIT_TxPower,
+                                ("RF(%d)-Ch(%d) [CCK / HT40_1S / HT40_2S] = "
+                                 "[0x%x / 0x%x / 0x%x]\n", rf_path, i,
+                                 rtlefuse->txpwrlevel_cck[rf_path][i],
+                                 rtlefuse->txpwrlevel_ht40_1s[rf_path][i],
+                                 rtlefuse->txpwrlevel_ht40_2s[rf_path][i]));
+                }
+        }
+        for (i = 0; i < 3; i++) {
+                if (!autoload_fail) {
+                        rtlefuse->eeprom_pwrlimit_ht40[i] =
+                            hwinfo[EEPROM_TXPWR_GROUP + i];
+                        rtlefuse->eeprom_pwrlimit_ht20[i] =
+                            hwinfo[EEPROM_TXPWR_GROUP + 3 + i];
+                } else {
+                        rtlefuse->eeprom_pwrlimit_ht40[i] = 0;
+                        rtlefuse->eeprom_pwrlimit_ht20[i] = 0;
+                }
+        }
+        for (rf_path = 0; rf_path < 2; rf_path++) {
+                for (i = 0; i < 14; i++) {
+                        index = _rtl92c_get_chnl_group((u8) i);
+                        if (rf_path == RF90_PATH_A) {
+                                rtlefuse->pwrgroup_ht20[rf_path][i] =
+                                    (rtlefuse->eeprom_pwrlimit_ht20[index]
+                                     & 0xf);
+                                rtlefuse->pwrgroup_ht40[rf_path][i] =
+                                    (rtlefuse->eeprom_pwrlimit_ht40[index]
+                                     & 0xf);
+                        } else if (rf_path == RF90_PATH_B) {
+                                rtlefuse->pwrgroup_ht20[rf_path][i] =
+                                    ((rtlefuse->eeprom_pwrlimit_ht20[index]
+                                      & 0xf0) >> 4);
+                                rtlefuse->pwrgroup_ht40[rf_path][i] =
+                                    ((rtlefuse->eeprom_pwrlimit_ht40[index]
+                                      & 0xf0) >> 4);
+                        }
+                        RTPRINT(rtlpriv, FINIT, INIT_TxPower,
+                                ("RF-%d pwrgroup_ht20[%d] = 0x%x\n",
+                                 rf_path, i,
+                                 rtlefuse->pwrgroup_ht20[rf_path][i]));
+                        RTPRINT(rtlpriv, FINIT, INIT_TxPower,
+                                ("RF-%d pwrgroup_ht40[%d] = 0x%x\n",
+                                 rf_path, i,
+                                 rtlefuse->pwrgroup_ht40[rf_path][i]));
+                }
+        }
+        for (i = 0; i < 14; i++) {
+                index = _rtl92c_get_chnl_group((u8) i);
+                if (!autoload_fail)
+                        tempval = hwinfo[EEPROM_TXPOWERHT20DIFF + index];
+                else
+                        tempval = EEPROM_DEFAULT_HT20_DIFF;
+                rtlefuse->txpwr_ht20diff[RF90_PATH_A][i] = (tempval & 0xF);
+                rtlefuse->txpwr_ht20diff[RF90_PATH_B][i] =
+                    ((tempval >> 4) & 0xF);
+                if (rtlefuse->txpwr_ht20diff[RF90_PATH_A][i] & BIT(3))
+                        rtlefuse->txpwr_ht20diff[RF90_PATH_A][i] |= 0xF0;
+                if (rtlefuse->txpwr_ht20diff[RF90_PATH_B][i] & BIT(3))
+                        rtlefuse->txpwr_ht20diff[RF90_PATH_B][i] |= 0xF0;
+                index = _rtl92c_get_chnl_group((u8) i);
+                if (!autoload_fail)
+                        tempval = hwinfo[EEPROM_TXPOWER_OFDMDIFF + index];
+                else
+                        tempval = EEPROM_DEFAULT_LEGACYHTTXPOWERDIFF;
+                rtlefuse->txpwr_legacyhtdiff[RF90_PATH_A][i] = (tempval & 0xF);
+                rtlefuse->txpwr_legacyhtdiff[RF90_PATH_B][i] =
+                    ((tempval >> 4) & 0xF);
+        }
+        rtlefuse->legacy_ht_txpowerdiff =
+            rtlefuse->txpwr_legacyhtdiff[RF90_PATH_A][7];
+        for (i = 0; i < 14; i++)
+                RTPRINT(rtlpriv, FINIT, INIT_TxPower,
+                        ("RF-A Ht20 to HT40 Diff[%d] = 0x%x\n", i,
+                         rtlefuse->txpwr_ht20diff[RF90_PATH_A][i]));
+        for (i = 0; i < 14; i++)
+                RTPRINT(rtlpriv, FINIT, INIT_TxPower,
+                        ("RF-A Legacy to Ht40 Diff[%d] = 0x%x\n", i,
+                         rtlefuse->txpwr_legacyhtdiff[RF90_PATH_A][i]));
+        for (i = 0; i < 14; i++)
+                RTPRINT(rtlpriv, FINIT, INIT_TxPower,
+                        ("RF-B Ht20 to HT40 Diff[%d] = 0x%x\n", i,
+                         rtlefuse->txpwr_ht20diff[RF90_PATH_B][i]));
+        for (i = 0; i < 14; i++)
+                RTPRINT(rtlpriv, FINIT, INIT_TxPower,
+                        ("RF-B Legacy to HT40 Diff[%d] = 0x%x\n", i,
+                         rtlefuse->txpwr_legacyhtdiff[RF90_PATH_B][i]));
+        if (!autoload_fail)
+                rtlefuse->eeprom_regulatory = (hwinfo[RF_OPTION1] & 0x7);
+        else
+                rtlefuse->eeprom_regulatory = 0;
+        RTPRINT(rtlpriv, FINIT, INIT_TxPower,
+                ("eeprom_regulatory = 0x%x\n", rtlefuse->eeprom_regulatory));
+        if (!autoload_fail) {
+                rtlefuse->eeprom_tssi[RF90_PATH_A] = hwinfo[EEPROM_TSSI_A];
+                rtlefuse->eeprom_tssi[RF90_PATH_B] = hwinfo[EEPROM_TSSI_B];
+        } else {
+                rtlefuse->eeprom_tssi[RF90_PATH_A] = EEPROM_DEFAULT_TSSI;
+                rtlefuse->eeprom_tssi[RF90_PATH_B] = EEPROM_DEFAULT_TSSI;
+        }
+        RTPRINT(rtlpriv, FINIT, INIT_TxPower,
+                ("TSSI_A = 0x%x, TSSI_B = 0x%x\n",
+                 rtlefuse->eeprom_tssi[RF90_PATH_A],
+                 rtlefuse->eeprom_tssi[RF90_PATH_B]));
+        if (!autoload_fail)
+                tempval = hwinfo[EEPROM_THERMAL_METER];
+        else
+                tempval = EEPROM_DEFAULT_THERMALMETER;
+        rtlefuse->eeprom_thermalmeter = (tempval & 0x1f);
+        if (rtlefuse->eeprom_thermalmeter < 0x06 ||
+            rtlefuse->eeprom_thermalmeter > 0x1c)
+                rtlefuse->eeprom_thermalmeter = 0x12;
+        if (rtlefuse->eeprom_thermalmeter == 0x1f || autoload_fail)
+                rtlefuse->apk_thermalmeterignore = true;
+        rtlefuse->thermalmeter[0] = rtlefuse->eeprom_thermalmeter;
+        RTPRINT(rtlpriv, FINIT, INIT_TxPower,
+                ("thermalmeter = 0x%x\n", rtlefuse->eeprom_thermalmeter));
+}
+
+static void _rtl92cu_read_board_type(struct ieee80211_hw *hw, u8 *contents)
+{
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        u8 boardType;
+
+        if (IS_NORMAL_CHIP(rtlhal->version)) {
+                boardType = ((contents[EEPROM_RF_OPT1]) &
+                            BOARD_TYPE_NORMAL_MASK) >> 5; /*bit[7:5]*/
+        } else {
+                boardType = contents[EEPROM_RF_OPT4];
+                boardType &= BOARD_TYPE_TEST_MASK;
+        }
+        rtlefuse->board_type = boardType;
+        if (IS_HIGHT_PA(rtlefuse->board_type))
+                rtlefuse->external_pa = 1;
+        printk(KERN_INFO "rtl8192cu: Board Type %x\n", rtlefuse->board_type);
+
+#ifdef CONFIG_ANTENNA_DIVERSITY
+        /* Antenna Diversity setting. */
+        if (registry_par->antdiv_cfg == 2) /* 2: From Efuse */
+                rtl_efuse->antenna_cfg = (contents[EEPROM_RF_OPT1]&0x18)>>3;
+        else
+                rtl_efuse->antenna_cfg = registry_par->antdiv_cfg; /* 0:OFF, */
+
+        printk(KERN_INFO "rtl8192cu: Antenna Config %x\n",
+               rtl_efuse->antenna_cfg);
+#endif
+}
+
+#ifdef CONFIG_BT_COEXIST
+static void _update_bt_param(_adapter *padapter)
+{
+        struct btcoexist_priv    *pbtpriv = &(padapter->halpriv.bt_coexist);
+        struct registry_priv    *registry_par = &padapter->registrypriv;
+        if (2 != registry_par->bt_iso) {
+                /* 0:Low, 1:High, 2:From Efuse */
+                pbtpriv->BT_Ant_isolation = registry_par->bt_iso;
+        }
+        if (registry_par->bt_sco == 1) {
+                /* 0:Idle, 1:None-SCO, 2:SCO, 3:From Counter, 4.Busy,
+                 * 5.OtherBusy */
+                pbtpriv->BT_Service = BT_OtherAction;
+        } else if (registry_par->bt_sco == 2) {
+                pbtpriv->BT_Service = BT_SCO;
+        } else if (registry_par->bt_sco == 4) {
+                pbtpriv->BT_Service = BT_Busy;
+        } else if (registry_par->bt_sco == 5) {
+                pbtpriv->BT_Service = BT_OtherBusy;
+        } else {
+                pbtpriv->BT_Service = BT_Idle;
+        }
+        pbtpriv->BT_Ampdu = registry_par->bt_ampdu;
+        pbtpriv->bCOBT = _TRUE;
+        pbtpriv->BtEdcaUL = 0;
+        pbtpriv->BtEdcaDL = 0;
+        pbtpriv->BtRssiState = 0xff;
+        pbtpriv->bInitSet = _FALSE;
+        pbtpriv->bBTBusyTraffic = _FALSE;
+        pbtpriv->bBTTrafficModeSet = _FALSE;
+        pbtpriv->bBTNonTrafficModeSet = _FALSE;
+        pbtpriv->CurrentState = 0;
+        pbtpriv->PreviousState = 0;
+        printk(KERN_INFO "rtl8192cu: BT Coexistance = %s\n",
+               (pbtpriv->BT_Coexist == _TRUE) ? "enable" : "disable");
+        if (pbtpriv->BT_Coexist) {
+                if (pbtpriv->BT_Ant_Num == Ant_x2)
+                        printk(KERN_INFO "rtl8192cu: BlueTooth BT_"
+                               "Ant_Num = Antx2\n");
+                else if (pbtpriv->BT_Ant_Num == Ant_x1)
+                        printk(KERN_INFO "rtl8192cu: BlueTooth BT_"
+                               "Ant_Num = Antx1\n");
+                switch (pbtpriv->BT_CoexistType) {
+                case BT_2Wire:
+                        printk(KERN_INFO "rtl8192cu: BlueTooth BT_"
+                               "CoexistType = BT_2Wire\n");
+                        break;
+                case BT_ISSC_3Wire:
+                        printk(KERN_INFO "rtl8192cu: BlueTooth BT_"
+                               "CoexistType = BT_ISSC_3Wire\n");
+                        break;
+                case BT_Accel:
+                        printk(KERN_INFO "rtl8192cu: BlueTooth BT_"
+                               "CoexistType = BT_Accel\n");
+                        break;
+                case BT_CSR_BC4:
+                        printk(KERN_INFO "rtl8192cu: BlueTooth BT_"
+                               "CoexistType = BT_CSR_BC4\n");
+                        break;
+                case BT_CSR_BC8:
+                        printk(KERN_INFO "rtl8192cu: BlueTooth BT_"
+                               "CoexistType = BT_CSR_BC8\n");
+                        break;
+                case BT_RTL8756:
+                        printk(KERN_INFO "rtl8192cu: BlueTooth BT_"
+                               "CoexistType = BT_RTL8756\n");
+                        break;
+                default:
+                        printk(KERN_INFO "rtl8192cu: BlueTooth BT_"
+                               "CoexistType = Unknown\n");
+                        break;
+                }
+                printk(KERN_INFO "rtl8192cu: BlueTooth BT_Ant_isolation = %d\n",
+                       pbtpriv->BT_Ant_isolation);
+                switch (pbtpriv->BT_Service) {
+                case BT_OtherAction:
+                        printk(KERN_INFO "rtl8192cu: BlueTooth BT_Service = "
+                               "BT_OtherAction\n");
+                        break;
+                case BT_SCO:
+                        printk(KERN_INFO "rtl8192cu: BlueTooth BT_Service = "
+                               "BT_SCO\n");
+                        break;
+                case BT_Busy:
+                        printk(KERN_INFO "rtl8192cu: BlueTooth BT_Service = "
+                               "BT_Busy\n");
+                        break;
+                case BT_OtherBusy:
+                        printk(KERN_INFO "rtl8192cu: BlueTooth BT_Service = "
+                               "BT_OtherBusy\n");
+                        break;
+                default:
+                        printk(KERN_INFO "rtl8192cu: BlueTooth BT_Service = "
+                               "BT_Idle\n");
+                        break;
+                }
+                printk(KERN_INFO "rtl8192cu: BT_RadioSharedType = 0x%x\n",
+                       pbtpriv->BT_RadioSharedType);
+        }
+}
+
+#define GET_BT_COEXIST(priv) (&priv->bt_coexist)
+
+static void _rtl92cu_read_bluetooth_coexistInfo(struct ieee80211_hw *hw,
+                                                u8 *contents,
+                                                bool bautoloadfailed);
+{
+        HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(Adapter);
+        bool isNormal = IS_NORMAL_CHIP(pHalData->VersionID);
+        struct btcoexist_priv    *pbtpriv = &pHalData->bt_coexist;
+        u8      rf_opt4;
+
+        _rtw_memset(pbtpriv, 0, sizeof(struct btcoexist_priv));
+        if (AutoloadFail) {
+                pbtpriv->BT_Coexist = _FALSE;
+                pbtpriv->BT_CoexistType = BT_2Wire;
+                pbtpriv->BT_Ant_Num = Ant_x2;
+                pbtpriv->BT_Ant_isolation = 0;
+                pbtpriv->BT_RadioSharedType = BT_Radio_Shared;
+                return;
+        }
+        if (isNormal) {
+                if (pHalData->BoardType == BOARD_USB_COMBO)
+                        pbtpriv->BT_Coexist = _TRUE;
+                else
+                        pbtpriv->BT_Coexist = ((PROMContent[EEPROM_RF_OPT3] &
+                                              0x20) >> 5); /* bit[5] */
+                rf_opt4 = PROMContent[EEPROM_RF_OPT4];
+                pbtpriv->BT_CoexistType = ((rf_opt4&0xe)>>1); /* bit [3:1] */
+                pbtpriv->BT_Ant_Num = (rf_opt4&0x1); /* bit [0] */
+                pbtpriv->BT_Ant_isolation = ((rf_opt4&0x10)>>4); /* bit [4] */
+                pbtpriv->BT_RadioSharedType = ((rf_opt4&0x20)>>5); /* bit [5] */
+        } else {
+                pbtpriv->BT_Coexist = (PROMContent[EEPROM_RF_OPT4] >> 4) ?
+                                       _TRUE : _FALSE;
+        }
+        _update_bt_param(Adapter);
+}
+#endif
+
+static void _rtl92cu_read_adapter_info(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        u16 i, usvalue;
+        u8 hwinfo[HWSET_MAX_SIZE] = {0};
+        u16 eeprom_id;
+
+        if (rtlefuse->epromtype == EEPROM_BOOT_EFUSE) {
+                rtl_efuse_shadow_map_update(hw);
+                memcpy((void *)hwinfo,
+                       (void *)&rtlefuse->efuse_map[EFUSE_INIT_MAP][0],
+                       HWSET_MAX_SIZE);
+        } else if (rtlefuse->epromtype == EEPROM_93C46) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("RTL819X Not boot from eeprom, check it !!"));
+        }
+        RT_PRINT_DATA(rtlpriv, COMP_INIT, DBG_LOUD, ("MAP\n"),
+                      hwinfo, HWSET_MAX_SIZE);
+        eeprom_id = *((u16 *)&hwinfo[0]);
+        if (eeprom_id != RTL8190_EEPROM_ID) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("EEPROM ID(%#x) is invalid!!\n", eeprom_id));
+                rtlefuse->autoload_failflag = true;
+        } else {
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, ("Autoload OK\n"));
+                rtlefuse->autoload_failflag = false;
+        }
+        if (rtlefuse->autoload_failflag == true)
+                return;
+        for (i = 0; i < 6; i += 2) {
+                usvalue = *(u16 *)&hwinfo[EEPROM_MAC_ADDR + i];
+                *((u16 *) (&rtlefuse->dev_addr[i])) = usvalue;
+        }
+        printk(KERN_INFO "rtl8192cu: MAC address: %pM\n", rtlefuse->dev_addr);
+        _rtl92cu_read_txpower_info_from_hwpg(hw,
+                                           rtlefuse->autoload_failflag, hwinfo);
+        rtlefuse->eeprom_vid = *(u16 *)&hwinfo[EEPROM_VID];
+        rtlefuse->eeprom_did = *(u16 *)&hwinfo[EEPROM_DID];
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
+                 (" VID = 0x%02x PID = 0x%02x\n",
+                 rtlefuse->eeprom_vid, rtlefuse->eeprom_did));
+        rtlefuse->eeprom_channelplan = *(u8 *)&hwinfo[EEPROM_CHANNELPLAN];
+        rtlefuse->eeprom_version = *(u16 *)&hwinfo[EEPROM_VERSION];
+        rtlefuse->txpwr_fromeprom = true;
+        rtlefuse->eeprom_oemid = *(u8 *)&hwinfo[EEPROM_CUSTOMER_ID];
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
+                 ("EEPROM Customer ID: 0x%2x\n", rtlefuse->eeprom_oemid));
+        if (rtlhal->oem_id == RT_CID_DEFAULT) {
+                switch (rtlefuse->eeprom_oemid) {
+                case EEPROM_CID_DEFAULT:
+                        if (rtlefuse->eeprom_did == 0x8176) {
+                                if ((rtlefuse->eeprom_svid == 0x103C &&
+                                     rtlefuse->eeprom_smid == 0x1629))
+                                        rtlhal->oem_id = RT_CID_819x_HP;
+                                else
+                                        rtlhal->oem_id = RT_CID_DEFAULT;
+                        } else {
+                                rtlhal->oem_id = RT_CID_DEFAULT;
+                        }
+                        break;
+                case EEPROM_CID_TOSHIBA:
+                        rtlhal->oem_id = RT_CID_TOSHIBA;
+                        break;
+                case EEPROM_CID_QMI:
+                        rtlhal->oem_id = RT_CID_819x_QMI;
+                        break;
+                case EEPROM_CID_WHQL:
+                default:
+                        rtlhal->oem_id = RT_CID_DEFAULT;
+                        break;
+                }
+        }
+        _rtl92cu_read_board_type(hw, hwinfo);
+#ifdef CONFIG_BT_COEXIST
+        _rtl92cu_read_bluetooth_coexistInfo(hw, hwinfo,
+                                            rtlefuse->autoload_failflag);
+#endif
+}
+
+static void _rtl92cu_hal_customized_behavior(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_usb_priv *usb_priv = rtl_usbpriv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+
+        switch (rtlhal->oem_id) {
+        case RT_CID_819x_HP:
+                usb_priv->ledctl.led_opendrain = true;
+                break;
+        case RT_CID_819x_Lenovo:
+        case RT_CID_DEFAULT:
+        case RT_CID_TOSHIBA:
+        case RT_CID_CCX:
+        case RT_CID_819x_Acer:
+        case RT_CID_WHQL:
+        default:
+                break;
+        }
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
+                 ("RT Customized ID: 0x%02X\n", rtlhal->oem_id));
+}
+
+void rtl92cu_read_eeprom_info(struct ieee80211_hw *hw)
+{
+
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        u8 tmp_u1b;
+
+        if (!IS_NORMAL_CHIP(rtlhal->version))
+                return;
+        tmp_u1b = rtl_read_byte(rtlpriv, REG_9346CR);
+        rtlefuse->epromtype = (tmp_u1b & EEPROMSEL) ?
+                               EEPROM_93C46 : EEPROM_BOOT_EFUSE;
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, ("Boot from %s\n",
+                 (tmp_u1b & EEPROMSEL) ? "EERROM" : "EFUSE"));
+        rtlefuse->autoload_failflag = (tmp_u1b & EEPROM_EN) ? false : true;
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, ("Autoload %s\n",
+                 (tmp_u1b & EEPROM_EN) ? "OK!!" : "ERR!!"));
+        _rtl92cu_read_adapter_info(hw);
+        _rtl92cu_hal_customized_behavior(hw);
+        return;
+}
+
+static int _rtl92cu_init_power_on(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        int             status = 0;
+        u16             value16;
+        u8              value8;
+        /*  polling autoload done. */
+        u32     pollingCount = 0;
+
+        do {
+                if (rtl_read_byte(rtlpriv, REG_APS_FSMCO) & PFM_ALDN) {
+                        RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
+                                 ("Autoload Done!\n"));
+                        break;
+                }
+                if (pollingCount++ > 100) {
+                        RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG,
+                                 ("Failed to polling REG_APS_FSMCO[PFM_ALDN]"
+                                 " done!\n"));
+                        return -ENODEV;
+                }
+        } while (true);
+        /* 0. RSV_CTRL 0x1C[7:0] = 0 unlock ISO/CLK/Power control register */
+        rtl_write_byte(rtlpriv, REG_RSV_CTRL, 0x0);
+        /* Power on when re-enter from IPS/Radio off/card disable */
+        /* enable SPS into PWM mode */
+        rtl_write_byte(rtlpriv, REG_SPS0_CTRL, 0x2b);
+        udelay(100);
+        value8 = rtl_read_byte(rtlpriv, REG_LDOV12D_CTRL);
+        if (0 == (value8 & LDV12_EN)) {
+                value8 |= LDV12_EN;
+                rtl_write_byte(rtlpriv, REG_LDOV12D_CTRL, value8);
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
+                         (" power-on :REG_LDOV12D_CTRL Reg0x21:0x%02x.\n",
+                         value8));
+                udelay(100);
+                value8 = rtl_read_byte(rtlpriv, REG_SYS_ISO_CTRL);
+                value8 &= ~ISO_MD2PP;
+                rtl_write_byte(rtlpriv, REG_SYS_ISO_CTRL, value8);
+        }
+        /*  auto enable WLAN */
+        pollingCount = 0;
+        value16 = rtl_read_word(rtlpriv, REG_APS_FSMCO);
+        value16 |= APFM_ONMAC;
+        rtl_write_word(rtlpriv, REG_APS_FSMCO, value16);
+        do {
+                if (!(rtl_read_word(rtlpriv, REG_APS_FSMCO) & APFM_ONMAC)) {
+                        printk(KERN_INFO "rtl8192cu: MAC auto ON okay!\n");
+                        break;
+                }
+                if (pollingCount++ > 100) {
+                        RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG,
+                                 ("Failed to polling REG_APS_FSMCO[APFM_ONMAC]"
+                                 " done!\n"));
+                        return -ENODEV;
+                }
+        } while (true);
+        /* Enable Radio ,GPIO ,and LED function */
+        rtl_write_word(rtlpriv, REG_APS_FSMCO, 0x0812);
+        /* release RF digital isolation */
+        value16 = rtl_read_word(rtlpriv, REG_SYS_ISO_CTRL);
+        value16 &= ~ISO_DIOR;
+        rtl_write_word(rtlpriv, REG_SYS_ISO_CTRL, value16);
+        /* Reconsider when to do this operation after asking HWSD. */
+        pollingCount = 0;
+        rtl_write_byte(rtlpriv, REG_APSD_CTRL, (rtl_read_byte(rtlpriv,
+                                                REG_APSD_CTRL) & ~BIT(6)));
+        do {
+                pollingCount++;
+        } while ((pollingCount < 200) &&
+                 (rtl_read_byte(rtlpriv, REG_APSD_CTRL) & BIT(7)));
+        /* Enable MAC DMA/WMAC/SCHEDULE/SEC block */
+        value16 = rtl_read_word(rtlpriv,  REG_CR);
+        value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN |
+                    PROTOCOL_EN | SCHEDULE_EN | MACTXEN | MACRXEN | ENSEC);
+        rtl_write_word(rtlpriv, REG_CR, value16);
+        return status;
+}
+
+static void _rtl92cu_init_queue_reserved_page(struct ieee80211_hw *hw,
+                                              bool wmm_enable,
+                                              u8 out_ep_num,
+                                              u8 queue_sel)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        bool isChipN = IS_NORMAL_CHIP(rtlhal->version);
+        u32 outEPNum = (u32)out_ep_num;
+        u32 numHQ = 0;
+        u32 numLQ = 0;
+        u32 numNQ = 0;
+        u32 numPubQ;
+        u32 value32;
+        u8 value8;
+        u32 txQPageNum, txQPageUnit, txQRemainPage;
+
+        if (!wmm_enable) {
+                numPubQ = (isChipN) ? CHIP_B_PAGE_NUM_PUBQ :
+                          CHIP_A_PAGE_NUM_PUBQ;
+                txQPageNum = TX_TOTAL_PAGE_NUMBER - numPubQ;
+
+                txQPageUnit = txQPageNum/outEPNum;
+                txQRemainPage = txQPageNum % outEPNum;
+                if (queue_sel & TX_SELE_HQ)
+                        numHQ = txQPageUnit;
+                if (queue_sel & TX_SELE_LQ)
+                        numLQ = txQPageUnit;
+                /* HIGH priority queue always present in the configuration of
+                 * 2 out-ep. Remainder pages have assigned to High queue */
+                if ((outEPNum > 1) && (txQRemainPage))
+                        numHQ += txQRemainPage;
+                /* NOTE: This step done before writting REG_RQPN. */
+                if (isChipN) {
+                        if (queue_sel & TX_SELE_NQ)
+                                numNQ = txQPageUnit;
+                        value8 = (u8)_NPQ(numNQ);
+                        rtl_write_byte(rtlpriv,  REG_RQPN_NPQ, value8);
+                }
+        } else {
+                /* for WMM ,number of out-ep must more than or equal to 2! */
+                numPubQ = isChipN ? WMM_CHIP_B_PAGE_NUM_PUBQ :
+                          WMM_CHIP_A_PAGE_NUM_PUBQ;
+                if (queue_sel & TX_SELE_HQ) {
+                        numHQ = isChipN ? WMM_CHIP_B_PAGE_NUM_HPQ :
+                                WMM_CHIP_A_PAGE_NUM_HPQ;
+                }
+                if (queue_sel & TX_SELE_LQ) {
+                        numLQ = isChipN ? WMM_CHIP_B_PAGE_NUM_LPQ :
+                                WMM_CHIP_A_PAGE_NUM_LPQ;
+                }
+                /* NOTE: This step done before writting REG_RQPN. */
+                if (isChipN) {
+                        if (queue_sel & TX_SELE_NQ)
+                                numNQ = WMM_CHIP_B_PAGE_NUM_NPQ;
+                        value8 = (u8)_NPQ(numNQ);
+                        rtl_write_byte(rtlpriv, REG_RQPN_NPQ, value8);
+                }
+        }
+        /* TX DMA */
+        value32 = _HPQ(numHQ) | _LPQ(numLQ) | _PUBQ(numPubQ) | LD_RQPN;
+        rtl_write_dword(rtlpriv, REG_RQPN, value32);
+}
+
+static void _rtl92c_init_trx_buffer(struct ieee80211_hw *hw, bool wmm_enable)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        u8      txpktbuf_bndy;
+        u8      value8;
+
+        if (!wmm_enable)
+                txpktbuf_bndy = TX_PAGE_BOUNDARY;
+        else /* for WMM */
+                txpktbuf_bndy = (IS_NORMAL_CHIP(rtlhal->version))
+                                                ? WMM_CHIP_B_TX_PAGE_BOUNDARY
+                                                : WMM_CHIP_A_TX_PAGE_BOUNDARY;
+        rtl_write_byte(rtlpriv, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy);
+        rtl_write_byte(rtlpriv, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy);
+        rtl_write_byte(rtlpriv, REG_TXPKTBUF_WMAC_LBK_BF_HD, txpktbuf_bndy);
+        rtl_write_byte(rtlpriv, REG_TRXFF_BNDY, txpktbuf_bndy);
+        rtl_write_byte(rtlpriv, REG_TDECTRL+1, txpktbuf_bndy);
+        rtl_write_word(rtlpriv,  (REG_TRXFF_BNDY + 2), 0x27FF);
+        value8 = _PSRX(RX_PAGE_SIZE_REG_VALUE) | _PSTX(PBP_128);
+        rtl_write_byte(rtlpriv, REG_PBP, value8);
+}
+
+static void _rtl92c_init_chipN_reg_priority(struct ieee80211_hw *hw, u16 beQ,
+                                            u16 bkQ, u16 viQ, u16 voQ,
+                                            u16 mgtQ, u16 hiQ)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u16 value16 = (rtl_read_word(rtlpriv, REG_TRXDMA_CTRL) & 0x7);
+
+        value16 |= _TXDMA_BEQ_MAP(beQ) | _TXDMA_BKQ_MAP(bkQ) |
+                   _TXDMA_VIQ_MAP(viQ) | _TXDMA_VOQ_MAP(voQ) |
+                   _TXDMA_MGQ_MAP(mgtQ) | _TXDMA_HIQ_MAP(hiQ);
+        rtl_write_word(rtlpriv,  REG_TRXDMA_CTRL, value16);
+}
+
+static void _rtl92cu_init_chipN_one_out_ep_priority(struct ieee80211_hw *hw,
+                                                    bool wmm_enable,
+                                                    u8 queue_sel)
+{
+        u16 uninitialized_var(value);
+
+        switch (queue_sel) {
+        case TX_SELE_HQ:
+                value = QUEUE_HIGH;
+                break;
+        case TX_SELE_LQ:
+                value = QUEUE_LOW;
+                break;
+        case TX_SELE_NQ:
+                value = QUEUE_NORMAL;
+                break;
+        default:
+                WARN_ON(1); /* Shall not reach here! */
+                break;
+        }
+        _rtl92c_init_chipN_reg_priority(hw, value, value, value, value,
+                                        value, value);
+        printk(KERN_INFO "rtl8192cu: Tx queue select: 0x%02x\n", queue_sel);
+}
+
+static void _rtl92cu_init_chipN_two_out_ep_priority(struct ieee80211_hw *hw,
+                                                                bool wmm_enable,
+                                                                u8 queue_sel)
+{
+        u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ;
+        u16 uninitialized_var(valueHi);
+        u16 uninitialized_var(valueLow);
+
+        switch (queue_sel) {
+        case (TX_SELE_HQ | TX_SELE_LQ):
+                valueHi = QUEUE_HIGH;
+                valueLow = QUEUE_LOW;
+                break;
+        case (TX_SELE_NQ | TX_SELE_LQ):
+                valueHi = QUEUE_NORMAL;
+                valueLow = QUEUE_LOW;
+                break;
+        case (TX_SELE_HQ | TX_SELE_NQ):
+                valueHi = QUEUE_HIGH;
+                valueLow = QUEUE_NORMAL;
+                break;
+        default:
+                WARN_ON(1);
+                break;
+        }
+        if (!wmm_enable) {
+                beQ = valueLow;
+                bkQ = valueLow;
+                viQ = valueHi;
+                voQ = valueHi;
+                mgtQ = valueHi;
+                hiQ = valueHi;
+        } else {/* for WMM ,CONFIG_OUT_EP_WIFI_MODE */
+                beQ = valueHi;
+                bkQ = valueLow;
+                viQ = valueLow;
+                voQ = valueHi;
+                mgtQ = valueHi;
+                hiQ = valueHi;
+        }
+        _rtl92c_init_chipN_reg_priority(hw, beQ, bkQ, viQ, voQ, mgtQ, hiQ);
+        printk(KERN_INFO "rtl8192cu: Tx queue select: 0x%02x\n", queue_sel);
+}
+
+static void _rtl92cu_init_chipN_three_out_ep_priority(struct ieee80211_hw *hw,
+                                                      bool wmm_enable,
+                                                      u8 queue_sel)
+{
+        u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        if (!wmm_enable) { /* typical setting */
+                beQ     = QUEUE_LOW;
+                bkQ     = QUEUE_LOW;
+                viQ     = QUEUE_NORMAL;
+                voQ     = QUEUE_HIGH;
+                mgtQ    = QUEUE_HIGH;
+                hiQ     = QUEUE_HIGH;
+        } else { /* for WMM */
+                beQ     = QUEUE_LOW;
+                bkQ     = QUEUE_NORMAL;
+                viQ     = QUEUE_NORMAL;
+                voQ     = QUEUE_HIGH;
+                mgtQ    = QUEUE_HIGH;
+                hiQ     = QUEUE_HIGH;
+        }
+        _rtl92c_init_chipN_reg_priority(hw, beQ, bkQ, viQ, voQ, mgtQ, hiQ);
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG,
+                 ("Tx queue select :0x%02x..\n", queue_sel));
+}
+
+static void _rtl92cu_init_chipN_queue_priority(struct ieee80211_hw *hw,
+                                               bool wmm_enable,
+                                               u8 out_ep_num,
+                                               u8 queue_sel)
+{
+        switch (out_ep_num) {
+        case 1:
+                _rtl92cu_init_chipN_one_out_ep_priority(hw, wmm_enable,
+                                                        queue_sel);
+                break;
+        case 2:
+                _rtl92cu_init_chipN_two_out_ep_priority(hw, wmm_enable,
+                                                        queue_sel);
+                break;
+        case 3:
+                _rtl92cu_init_chipN_three_out_ep_priority(hw, wmm_enable,
+                                                          queue_sel);
+                break;
+        default:
+                WARN_ON(1); /* Shall not reach here! */
+                break;
+        }
+}
+
+static void _rtl92cu_init_chipT_queue_priority(struct ieee80211_hw *hw,
+                                               bool wmm_enable,
+                                               u8 out_ep_num,
+                                               u8 queue_sel)
+{
+        u8      hq_sele;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        switch (out_ep_num) {
+        case 2: /* (TX_SELE_HQ|TX_SELE_LQ) */
+                if (!wmm_enable) /* typical setting */
+                        hq_sele =  HQSEL_VOQ | HQSEL_VIQ | HQSEL_MGTQ |
+                                   HQSEL_HIQ;
+                else    /* for WMM */
+                        hq_sele = HQSEL_VOQ | HQSEL_BEQ | HQSEL_MGTQ |
+                                  HQSEL_HIQ;
+                break;
+        case 1:
+                if (TX_SELE_LQ == queue_sel) {
+                        /* map all endpoint to Low queue */
+                        hq_sele = 0;
+                } else if (TX_SELE_HQ == queue_sel) {
+                        /* map all endpoint to High queue */
+                        hq_sele =  HQSEL_VOQ | HQSEL_VIQ | HQSEL_BEQ |
+                                   HQSEL_BKQ | HQSEL_MGTQ | HQSEL_HIQ;
+                }
+                break;
+        default:
+                WARN_ON(1); /* Shall not reach here! */
+                break;
+        }
+        rtl_write_byte(rtlpriv, (REG_TRXDMA_CTRL+1), hq_sele);
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG,
+                 ("Tx queue select :0x%02x..\n", hq_sele));
+}
+
+static void _rtl92cu_init_queue_priority(struct ieee80211_hw *hw,
+                                                bool wmm_enable,
+                                                u8 out_ep_num,
+                                                u8 queue_sel)
+{
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        if (IS_NORMAL_CHIP(rtlhal->version))
+                _rtl92cu_init_chipN_queue_priority(hw, wmm_enable, out_ep_num,
+                                                   queue_sel);
+        else
+                _rtl92cu_init_chipT_queue_priority(hw, wmm_enable, out_ep_num,
+                                                   queue_sel);
+}
+
+static void _rtl92cu_init_usb_aggregation(struct ieee80211_hw *hw)
+{
+}
+
+static void _rtl92cu_init_wmac_setting(struct ieee80211_hw *hw)
+{
+        u16                     value16;
+
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+
+        mac->rx_conf = (RCR_APM | RCR_AM | RCR_ADF | RCR_AB | RCR_APP_FCS |
+                      RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL |
+                      RCR_APP_MIC | RCR_APP_PHYSTS | RCR_ACRC32);
+        rtl_write_dword(rtlpriv, REG_RCR, mac->rx_conf);
+        /* Accept all multicast address */
+        rtl_write_dword(rtlpriv,  REG_MAR, 0xFFFFFFFF);
+        rtl_write_dword(rtlpriv,  REG_MAR + 4, 0xFFFFFFFF);
+        /* Accept all management frames */
+        value16 = 0xFFFF;
+        rtl92c_set_mgt_filter(hw, value16);
+        /* Reject all control frame - default value is 0 */
+        rtl92c_set_ctrl_filter(hw, 0x0);
+        /* Accept all data frames */
+        value16 = 0xFFFF;
+        rtl92c_set_data_filter(hw, value16);
+}
+
+static int _rtl92cu_init_mac(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        struct rtl_usb_priv *usb_priv = rtl_usbpriv(hw);
+        struct rtl_usb *rtlusb = rtl_usbdev(usb_priv);
+        int err = 0;
+        u32     boundary = 0;
+        u8 wmm_enable = false; /* TODO */
+        u8 out_ep_nums = rtlusb->out_ep_nums;
+        u8 queue_sel = rtlusb->out_queue_sel;
+        err = _rtl92cu_init_power_on(hw);
+
+        if (err) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                        ("Failed to init power on!\n"));
+                return err;
+        }
+        if (!wmm_enable) {
+                boundary = TX_PAGE_BOUNDARY;
+        } else { /* for WMM */
+                boundary = (IS_NORMAL_CHIP(rtlhal->version))
+                                        ? WMM_CHIP_B_TX_PAGE_BOUNDARY
+                                        : WMM_CHIP_A_TX_PAGE_BOUNDARY;
+        }
+        if (false == rtl92c_init_llt_table(hw, boundary)) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                        ("Failed to init LLT Table!\n"));
+                return -EINVAL;
+        }
+        _rtl92cu_init_queue_reserved_page(hw, wmm_enable, out_ep_nums,
+                                          queue_sel);
+        _rtl92c_init_trx_buffer(hw, wmm_enable);
+        _rtl92cu_init_queue_priority(hw, wmm_enable, out_ep_nums,
+                                     queue_sel);
+        /* Get Rx PHY status in order to report RSSI and others. */
+        rtl92c_init_driver_info_size(hw, RTL92C_DRIVER_INFO_SIZE);
+        rtl92c_init_interrupt(hw);
+        rtl92c_init_network_type(hw);
+        _rtl92cu_init_wmac_setting(hw);
+        rtl92c_init_adaptive_ctrl(hw);
+        rtl92c_init_edca(hw);
+        rtl92c_init_rate_fallback(hw);
+        rtl92c_init_retry_function(hw);
+        _rtl92cu_init_usb_aggregation(hw);
+        rtlpriv->cfg->ops->set_bw_mode(hw, NL80211_CHAN_HT20);
+        rtl92c_set_min_space(hw, IS_92C_SERIAL(rtlhal->version));
+        rtl92c_init_beacon_parameters(hw, rtlhal->version);
+        rtl92c_init_ampdu_aggregation(hw);
+        rtl92c_init_beacon_max_error(hw, true);
+        return err;
+}
+
+void rtl92cu_enable_hw_security_config(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u8 sec_reg_value = 0x0;
+        struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
+
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
+                 ("PairwiseEncAlgorithm = %d GroupEncAlgorithm = %d\n",
+                  rtlpriv->sec.pairwise_enc_algorithm,
+                  rtlpriv->sec.group_enc_algorithm));
+        if (rtlpriv->cfg->mod_params->sw_crypto || rtlpriv->sec.use_sw_sec) {
+                RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
+                         ("not open sw encryption\n"));
+                return;
+        }
+        sec_reg_value = SCR_TxEncEnable | SCR_RxDecEnable;
+        if (rtlpriv->sec.use_defaultkey) {
+                sec_reg_value |= SCR_TxUseDK;
+                sec_reg_value |= SCR_RxUseDK;
+        }
+        if (IS_NORMAL_CHIP(rtlhal->version))
+                sec_reg_value |= (SCR_RXBCUSEDK | SCR_TXBCUSEDK);
+        rtl_write_byte(rtlpriv, REG_CR + 1, 0x02);
+        RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
+                 ("The SECR-value %x\n", sec_reg_value));
+        rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_WPA_CONFIG, &sec_reg_value);
+}
+
+static void _rtl92cu_hw_configure(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw));
+
+        /* To Fix MAC loopback mode fail. */
+        rtl_write_byte(rtlpriv, REG_LDOHCI12_CTRL, 0x0f);
+        rtl_write_byte(rtlpriv, 0x15, 0xe9);
+        /* HW SEQ CTRL */
+        /* set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM. */
+        rtl_write_byte(rtlpriv, REG_HWSEQ_CTRL, 0xFF);
+        /* fixed USB interface interference issue */
+        rtl_write_byte(rtlpriv, 0xfe40, 0xe0);
+        rtl_write_byte(rtlpriv, 0xfe41, 0x8d);
+        rtl_write_byte(rtlpriv, 0xfe42, 0x80);
+        rtlusb->reg_bcn_ctrl_val = 0x18;
+        rtl_write_byte(rtlpriv, REG_BCN_CTRL, (u8)rtlusb->reg_bcn_ctrl_val);
+}
+
+static void _InitPABias(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        u8 pa_setting;
+
+        /* FIXED PA current issue */
+        pa_setting = efuse_read_1byte(hw, 0x1FA);
+        if (!(pa_setting & BIT(0))) {
+                rtl_set_rfreg(hw, RF90_PATH_A, 0x15, 0x0FFFFF, 0x0F406);
+                rtl_set_rfreg(hw, RF90_PATH_A, 0x15, 0x0FFFFF, 0x4F406);
+                rtl_set_rfreg(hw, RF90_PATH_A, 0x15, 0x0FFFFF, 0x8F406);
+                rtl_set_rfreg(hw, RF90_PATH_A, 0x15, 0x0FFFFF, 0xCF406);
+        }
+        if (!(pa_setting & BIT(1)) && IS_NORMAL_CHIP(rtlhal->version) &&
+            IS_92C_SERIAL(rtlhal->version)) {
+                rtl_set_rfreg(hw, RF90_PATH_B, 0x15, 0x0FFFFF, 0x0F406);
+                rtl_set_rfreg(hw, RF90_PATH_B, 0x15, 0x0FFFFF, 0x4F406);
+                rtl_set_rfreg(hw, RF90_PATH_B, 0x15, 0x0FFFFF, 0x8F406);
+                rtl_set_rfreg(hw, RF90_PATH_B, 0x15, 0x0FFFFF, 0xCF406);
+        }
+        if (!(pa_setting & BIT(4))) {
+                pa_setting = rtl_read_byte(rtlpriv, 0x16);
+                pa_setting &= 0x0F;
+                rtl_write_byte(rtlpriv, 0x16, pa_setting | 0x90);
+        }
+}
+
+static void _InitAntenna_Selection(struct ieee80211_hw *hw)
+{
+#ifdef CONFIG_ANTENNA_DIVERSITY
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+
+        if (pHalData->AntDivCfg == 0)
+                return;
+
+        if (rtlphy->rf_type == RF_1T1R) {
+                rtl_write_dword(rtlpriv, REG_LEDCFG0,
+                                rtl_read_dword(rtlpriv,
+                                REG_LEDCFG0)|BIT(23));
+                rtl_set_bbreg(hw, rFPGA0_XAB_RFPARAMETER, BIT(13), 0x01);
+                if (rtl_get_bbreg(hw, RFPGA0_XA_RFINTERFACEOE, 0x300) ==
+                    Antenna_A)
+                        pHalData->CurAntenna = Antenna_A;
+                else
+                        pHalData->CurAntenna = Antenna_B;
+        }
+#endif
+}
+
+static void _dump_registers(struct ieee80211_hw *hw)
+{
+}
+
+static void _update_mac_setting(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+
+        mac->rx_conf = rtl_read_dword(rtlpriv, REG_RCR);
+        mac->rx_mgt_filter = rtl_read_word(rtlpriv, REG_RXFLTMAP0);
+        mac->rx_ctrl_filter = rtl_read_word(rtlpriv, REG_RXFLTMAP1);
+        mac->rx_data_filter = rtl_read_word(rtlpriv, REG_RXFLTMAP2);
+}
+
+int rtl92cu_hw_init(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+        int err = 0;
+        static bool iqk_initialized;
+
+        rtlhal->hw_type = HARDWARE_TYPE_RTL8192CU;
+        err = _rtl92cu_init_mac(hw);
+        if (err) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, ("init mac failed!\n"));
+                return err;
+        }
+        err = rtl92c_download_fw(hw);
+        if (err) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
+                         ("Failed to download FW. Init HW without FW now..\n"));
+                err = 1;
+                rtlhal->fw_ready = false;
+                return err;
+        } else {
+                rtlhal->fw_ready = true;
+        }
+        rtlhal->last_hmeboxnum = 0; /* h2c */
+        _rtl92cu_phy_param_tab_init(hw);
+        rtl92c_phy_mac_config(hw);
+        rtl92c_phy_bb_config(hw);
+        rtlphy->rf_mode = RF_OP_BY_SW_3WIRE;
+        rtl92c_phy_rf_config(hw);
+        if (IS_VENDOR_UMC_A_CUT(rtlhal->version) &&
+            !IS_92C_SERIAL(rtlhal->version)) {
+                rtl_set_rfreg(hw, RF90_PATH_A, RF_RX_G1, MASKDWORD, 0x30255);
+                rtl_set_rfreg(hw, RF90_PATH_A, RF_RX_G2, MASKDWORD, 0x50a00);
+        }
+        rtlphy->rfreg_chnlval[0] = rtl_get_rfreg(hw, (enum radio_path)0,
+                                                 RF_CHNLBW, RFREG_OFFSET_MASK);
+        rtlphy->rfreg_chnlval[1] = rtl_get_rfreg(hw, (enum radio_path)1,
+                                                 RF_CHNLBW, RFREG_OFFSET_MASK);
+        rtl92c_bb_block_on(hw);
+        rtl_cam_reset_all_entry(hw);
+        rtl92cu_enable_hw_security_config(hw);
+        ppsc->rfpwr_state = ERFON;
+        rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_ETHER_ADDR, mac->mac_addr);
+        if (ppsc->rfpwr_state == ERFON) {
+                rtl92c_phy_set_rfpath_switch(hw, 1);
+                if (iqk_initialized) {
+                        rtl92c_phy_iq_calibrate(hw, false);
+                } else {
+                        rtl92c_phy_iq_calibrate(hw, false);
+                        iqk_initialized = true;
+                }
+                rtl92c_dm_check_txpower_tracking(hw);
+                rtl92c_phy_lc_calibrate(hw);
+        }
+        _rtl92cu_hw_configure(hw);
+        _InitPABias(hw);
+        _InitAntenna_Selection(hw);
+        _update_mac_setting(hw);
+        rtl92c_dm_init(hw);
+        _dump_registers(hw);
+        return err;
+}
+
+static void _DisableRFAFEAndResetBB(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+/**************************************
+a.      TXPAUSE 0x522[7:0] = 0xFF       Pause MAC TX queue
+b.      RF path 0 offset 0x00 = 0x00    disable RF
+c.      APSD_CTRL 0x600[7:0] = 0x40
+d.      SYS_FUNC_EN 0x02[7:0] = 0x16    reset BB state machine
+e.      SYS_FUNC_EN 0x02[7:0] = 0x14    reset BB state machine
+***************************************/
+        u8 eRFPath = 0, value8 = 0;
+        rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF);
+        rtl_set_rfreg(hw, (enum radio_path)eRFPath, 0x0, MASKBYTE0, 0x0);
+
+        value8 |= APSDOFF;
+        rtl_write_byte(rtlpriv, REG_APSD_CTRL, value8); /*0x40*/
+        value8 = 0;
+        value8 |= (FEN_USBD | FEN_USBA | FEN_BB_GLB_RSTn);
+        rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, value8);/*0x16*/
+        value8 &= (~FEN_BB_GLB_RSTn);
+        rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, value8); /*0x14*/
+}
+
+static void  _ResetDigitalProcedure1(struct ieee80211_hw *hw, bool bWithoutHWSM)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+
+        if (rtlhal->fw_version <=  0x20) {
+                /*****************************
+                f. MCUFWDL 0x80[7:0]=0          reset MCU ready status
+                g. SYS_FUNC_EN 0x02[10]= 0      reset MCU reg, (8051 reset)
+                h. SYS_FUNC_EN 0x02[15-12]= 5   reset MAC reg, DCORE
+                i. SYS_FUNC_EN 0x02[10]= 1      enable MCU reg, (8051 enable)
+                ******************************/
+                u16 valu16 = 0;
+
+                rtl_write_byte(rtlpriv, REG_MCUFWDL, 0);
+                valu16 = rtl_read_word(rtlpriv, REG_SYS_FUNC_EN);
+                rtl_write_word(rtlpriv, REG_SYS_FUNC_EN, (valu16 &
+                               (~FEN_CPUEN))); /* reset MCU ,8051 */
+                valu16 = rtl_read_word(rtlpriv, REG_SYS_FUNC_EN)&0x0FFF;
+                rtl_write_word(rtlpriv, REG_SYS_FUNC_EN, (valu16 |
+                              (FEN_HWPDN|FEN_ELDR))); /* reset MAC */
+                valu16 = rtl_read_word(rtlpriv, REG_SYS_FUNC_EN);
+                rtl_write_word(rtlpriv, REG_SYS_FUNC_EN, (valu16 |
+                               FEN_CPUEN)); /* enable MCU ,8051 */
+        } else {
+                u8 retry_cnts = 0;
+
+                /* IF fw in RAM code, do reset */
+                if (rtl_read_byte(rtlpriv, REG_MCUFWDL) & BIT(1)) {
+                        /* reset MCU ready status */
+                        rtl_write_byte(rtlpriv, REG_MCUFWDL, 0);
+                        if (rtlhal->fw_ready) {
+                                /* 8051 reset by self */
+                                rtl_write_byte(rtlpriv, REG_HMETFR+3, 0x20);
+                                while ((retry_cnts++ < 100) &&
+                                       (FEN_CPUEN & rtl_read_word(rtlpriv,
+                                       REG_SYS_FUNC_EN))) {
+                                        udelay(50);
+                                }
+                                if (retry_cnts >= 100) {
+                                        RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                                                ("#####=> 8051 reset failed!.."
+                                                ".......................\n"););
+                                        /* if 8051 reset fail, reset MAC. */
+                                        rtl_write_byte(rtlpriv,
+                                                       REG_SYS_FUNC_EN + 1,
+                                                       0x50);
+                                        udelay(100);
+                                }
+                        }
+                }
+                /* Reset MAC and Enable 8051 */
+                rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1, 0x54);
+                rtl_write_byte(rtlpriv, REG_MCUFWDL, 0);
+        }
+        if (bWithoutHWSM) {
+                /*****************************
+                  Without HW auto state machine
+                g.SYS_CLKR 0x08[15:0] = 0x30A3          disable MAC clock
+                h.AFE_PLL_CTRL 0x28[7:0] = 0x80         disable AFE PLL
+                i.AFE_XTAL_CTRL 0x24[15:0] = 0x880F     gated AFE DIG_CLOCK
+                j.SYS_ISu_CTRL 0x00[7:0] = 0xF9         isolated digital to PON
+                ******************************/
+                rtl_write_word(rtlpriv, REG_SYS_CLKR, 0x70A3);
+                rtl_write_byte(rtlpriv, REG_AFE_PLL_CTRL, 0x80);
+                rtl_write_word(rtlpriv, REG_AFE_XTAL_CTRL, 0x880F);
+                rtl_write_byte(rtlpriv, REG_SYS_ISO_CTRL, 0xF9);
+        }
+}
+
+static void _ResetDigitalProcedure2(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+/*****************************
+k. SYS_FUNC_EN 0x03[7:0] = 0x44         disable ELDR runction
+l. SYS_CLKR 0x08[15:0] = 0x3083         disable ELDR clock
+m. SYS_ISO_CTRL 0x01[7:0] = 0x83        isolated ELDR to PON
+******************************/
+        rtl_write_word(rtlpriv, REG_SYS_CLKR, 0x70A3);
+        rtl_write_byte(rtlpriv, REG_SYS_ISO_CTRL+1, 0x82);
+}
+
+static void _DisableGPIO(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+/***************************************
+j. GPIO_PIN_CTRL 0x44[31:0]=0x000
+k. Value = GPIO_PIN_CTRL[7:0]
+l.  GPIO_PIN_CTRL 0x44[31:0] = 0x00FF0000 | (value <<8); write ext PIN level
+m. GPIO_MUXCFG 0x42 [15:0] = 0x0780
+n. LEDCFG 0x4C[15:0] = 0x8080
+***************************************/
+        u8      value8;
+        u16     value16;
+        u32     value32;
+
+        /* 1. Disable GPIO[7:0] */
+        rtl_write_word(rtlpriv, REG_GPIO_PIN_CTRL+2, 0x0000);
+        value32 = rtl_read_dword(rtlpriv, REG_GPIO_PIN_CTRL) & 0xFFFF00FF;
+        value8 = (u8) (value32&0x000000FF);
+        value32 |= ((value8<<8) | 0x00FF0000);
+        rtl_write_dword(rtlpriv, REG_GPIO_PIN_CTRL, value32);
+        /* 2. Disable GPIO[10:8] */
+        rtl_write_byte(rtlpriv, REG_GPIO_MUXCFG+3, 0x00);
+        value16 = rtl_read_word(rtlpriv, REG_GPIO_MUXCFG+2) & 0xFF0F;
+        value8 = (u8) (value16&0x000F);
+        value16 |= ((value8<<4) | 0x0780);
+        rtl_write_word(rtlpriv, REG_GPIO_PIN_CTRL+2, value16);
+        /* 3. Disable LED0 & 1 */
+        rtl_write_word(rtlpriv, REG_LEDCFG0, 0x8080);
+}
+
+static void _DisableAnalog(struct ieee80211_hw *hw, bool bWithoutHWSM)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u16 value16 = 0;
+        u8 value8 = 0;
+
+        if (bWithoutHWSM) {
+                /*****************************
+                n. LDOA15_CTRL 0x20[7:0] = 0x04  disable A15 power
+                o. LDOV12D_CTRL 0x21[7:0] = 0x54 disable digital core power
+                r. When driver call disable, the ASIC will turn off remaining
+                   clock automatically
+                ******************************/
+                rtl_write_byte(rtlpriv, REG_LDOA15_CTRL, 0x04);
+                value8 = rtl_read_byte(rtlpriv, REG_LDOV12D_CTRL);
+                value8 &= (~LDV12_EN);
+                rtl_write_byte(rtlpriv, REG_LDOV12D_CTRL, value8);
+        }
+
+/*****************************
+h. SPS0_CTRL 0x11[7:0] = 0x23           enter PFM mode
+i. APS_FSMCO 0x04[15:0] = 0x4802        set USB suspend
+******************************/
+        rtl_write_byte(rtlpriv, REG_SPS0_CTRL, 0x23);
+        value16 |= (APDM_HOST | AFSM_HSUS | PFM_ALDN);
+        rtl_write_word(rtlpriv, REG_APS_FSMCO, (u16)value16);
+        rtl_write_byte(rtlpriv, REG_RSV_CTRL, 0x0E);
+}
+
+static void _CardDisableHWSM(struct ieee80211_hw *hw)
+{
+        /* ==== RF Off Sequence ==== */
+        _DisableRFAFEAndResetBB(hw);
+        /* ==== Reset digital sequence   ====== */
+        _ResetDigitalProcedure1(hw, false);
+        /*  ==== Pull GPIO PIN to balance level and LED control ====== */
+        _DisableGPIO(hw);
+        /* ==== Disable analog sequence === */
+        _DisableAnalog(hw, false);
+}
+
+static void _CardDisableWithoutHWSM(struct ieee80211_hw *hw)
+{
+        /*==== RF Off Sequence ==== */
+        _DisableRFAFEAndResetBB(hw);
+        /*  ==== Reset digital sequence   ====== */
+        _ResetDigitalProcedure1(hw, true);
+        /*  ==== Pull GPIO PIN to balance level and LED control ====== */
+        _DisableGPIO(hw);
+        /*  ==== Reset digital sequence   ====== */
+        _ResetDigitalProcedure2(hw);
+        /*  ==== Disable analog sequence === */
+        _DisableAnalog(hw, true);
+}
+
+static void _rtl92cu_set_bcn_ctrl_reg(struct ieee80211_hw *hw,
+                                      u8 set_bits, u8 clear_bits)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw));
+
+        rtlusb->reg_bcn_ctrl_val |= set_bits;
+        rtlusb->reg_bcn_ctrl_val &= ~clear_bits;
+        rtl_write_byte(rtlpriv, REG_BCN_CTRL, (u8) rtlusb->reg_bcn_ctrl_val);
+}
+
+static void _rtl92cu_stop_tx_beacon(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
+        u8 tmp1byte = 0;
+        if (IS_NORMAL_CHIP(rtlhal->version)) {
+                tmp1byte = rtl_read_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2);
+                rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2,
+                               tmp1byte & (~BIT(6)));
+                rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0x64);
+                tmp1byte = rtl_read_byte(rtlpriv, REG_TBTT_PROHIBIT + 2);
+                tmp1byte &= ~(BIT(0));
+                rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 2, tmp1byte);
+        } else {
+                rtl_write_byte(rtlpriv, REG_TXPAUSE,
+                               rtl_read_byte(rtlpriv, REG_TXPAUSE) | BIT(6));
+        }
+}
+
+static void _rtl92cu_resume_tx_beacon(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
+        u8 tmp1byte = 0;
+
+        if (IS_NORMAL_CHIP(rtlhal->version)) {
+                tmp1byte = rtl_read_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2);
+                rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2,
+                               tmp1byte | BIT(6));
+                rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0xff);
+                tmp1byte = rtl_read_byte(rtlpriv, REG_TBTT_PROHIBIT + 2);
+                tmp1byte |= BIT(0);
+                rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 2, tmp1byte);
+        } else {
+                rtl_write_byte(rtlpriv, REG_TXPAUSE,
+                               rtl_read_byte(rtlpriv, REG_TXPAUSE) & (~BIT(6)));
+        }
+}
+
+static void _rtl92cu_enable_bcn_sub_func(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
+
+        if (IS_NORMAL_CHIP(rtlhal->version))
+                _rtl92cu_set_bcn_ctrl_reg(hw, 0, BIT(1));
+        else
+                _rtl92cu_set_bcn_ctrl_reg(hw, 0, BIT(4));
+}
+
+static void _rtl92cu_disable_bcn_sub_func(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
+
+        if (IS_NORMAL_CHIP(rtlhal->version))
+                _rtl92cu_set_bcn_ctrl_reg(hw, BIT(1), 0);
+        else
+                _rtl92cu_set_bcn_ctrl_reg(hw, BIT(4), 0);
+}
+
+static int _rtl92cu_set_media_status(struct ieee80211_hw *hw,
+                                     enum nl80211_iftype type)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u8 bt_msr = rtl_read_byte(rtlpriv, MSR);
+        enum led_ctl_mode ledaction = LED_CTL_NO_LINK;
+
+        bt_msr &= 0xfc;
+        rtl_write_byte(rtlpriv, REG_BCN_MAX_ERR, 0xFF);
+        if (type == NL80211_IFTYPE_UNSPECIFIED || type ==
+            NL80211_IFTYPE_STATION) {
+                _rtl92cu_stop_tx_beacon(hw);
+                _rtl92cu_enable_bcn_sub_func(hw);
+        } else if (type == NL80211_IFTYPE_ADHOC || type == NL80211_IFTYPE_AP) {
+                _rtl92cu_resume_tx_beacon(hw);
+                _rtl92cu_disable_bcn_sub_func(hw);
+        } else {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, ("Set HW_VAR_MEDIA_"
+                         "STATUS:No such media status(%x).\n", type));
+        }
+        switch (type) {
+        case NL80211_IFTYPE_UNSPECIFIED:
+                bt_msr |= MSR_NOLINK;
+                ledaction = LED_CTL_LINK;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("Set Network type to NO LINK!\n"));
+                break;
+        case NL80211_IFTYPE_ADHOC:
+                bt_msr |= MSR_ADHOC;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("Set Network type to Ad Hoc!\n"));
+                break;
+        case NL80211_IFTYPE_STATION:
+                bt_msr |= MSR_INFRA;
+                ledaction = LED_CTL_LINK;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("Set Network type to STA!\n"));
+                break;
+        case NL80211_IFTYPE_AP:
+                bt_msr |= MSR_AP;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("Set Network type to AP!\n"));
+                break;
+        default:
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("Network type %d not support!\n", type));
+                goto error_out;
+        }
+        rtl_write_byte(rtlpriv, (MSR), bt_msr);
+        rtlpriv->cfg->ops->led_control(hw, ledaction);
+        if ((bt_msr & 0xfc) == MSR_AP)
+                rtl_write_byte(rtlpriv, REG_BCNTCFG + 1, 0x00);
+        else
+                rtl_write_byte(rtlpriv, REG_BCNTCFG + 1, 0x66);
+        return 0;
+error_out:
+        return 1;
+}
+
+void rtl92cu_card_disable(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+        struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw));
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        enum nl80211_iftype opmode;
+
+        mac->link_state = MAC80211_NOLINK;
+        opmode = NL80211_IFTYPE_UNSPECIFIED;
+        _rtl92cu_set_media_status(hw, opmode);
+        rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF);
+        RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
+        if (rtlusb->disableHWSM)
+                _CardDisableHWSM(hw);
+        else
+                _CardDisableWithoutHWSM(hw);
+}
+
+void rtl92cu_set_check_bssid(struct ieee80211_hw *hw, bool check_bssid)
+{
+        /* dummy routine needed for callback from rtl_op_configure_filter() */
+}
+
+/*========================================================================== */
+
+static void _rtl92cu_set_check_bssid(struct ieee80211_hw *hw,
+                              enum nl80211_iftype type)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u32 reg_rcr = rtl_read_dword(rtlpriv, REG_RCR);
+        struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        u8 filterout_non_associated_bssid = false;
+
+        switch (type) {
+        case NL80211_IFTYPE_ADHOC:
+        case NL80211_IFTYPE_STATION:
+                filterout_non_associated_bssid = true;
+                break;
+        case NL80211_IFTYPE_UNSPECIFIED:
+        case NL80211_IFTYPE_AP:
+        default:
+                break;
+        }
+        if (filterout_non_associated_bssid == true) {
+                if (IS_NORMAL_CHIP(rtlhal->version)) {
+                        switch (rtlphy->current_io_type) {
+                        case IO_CMD_RESUME_DM_BY_SCAN:
+                                reg_rcr |= (RCR_CBSSID_DATA | RCR_CBSSID_BCN);
+                                rtlpriv->cfg->ops->set_hw_reg(hw,
+                                                 HW_VAR_RCR, (u8 *)(&reg_rcr));
+                                /* enable update TSF */
+                                _rtl92cu_set_bcn_ctrl_reg(hw, 0, BIT(4));
+                                break;
+                        case IO_CMD_PAUSE_DM_BY_SCAN:
+                                reg_rcr &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);
+                                rtlpriv->cfg->ops->set_hw_reg(hw,
+                                                 HW_VAR_RCR, (u8 *)(&reg_rcr));
+                                /* disable update TSF */
+                                _rtl92cu_set_bcn_ctrl_reg(hw, BIT(4), 0);
+                                break;
+                        }
+                } else {
+                        reg_rcr |= (RCR_CBSSID);
+                        rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR,
+                                                      (u8 *)(&reg_rcr));
+                        _rtl92cu_set_bcn_ctrl_reg(hw, 0, (BIT(4)|BIT(5)));
+                }
+        } else if (filterout_non_associated_bssid == false) {
+                if (IS_NORMAL_CHIP(rtlhal->version)) {
+                        reg_rcr &= (~(RCR_CBSSID_DATA | RCR_CBSSID_BCN));
+                        rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR,
+                                                      (u8 *)(&reg_rcr));
+                        _rtl92cu_set_bcn_ctrl_reg(hw, BIT(4), 0);
+                } else {
+                        reg_rcr &= (~RCR_CBSSID);
+                        rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR,
+                                                      (u8 *)(&reg_rcr));
+                        _rtl92cu_set_bcn_ctrl_reg(hw, (BIT(4)|BIT(5)), 0);
+                }
+        }
+}
+
+int rtl92cu_set_network_type(struct ieee80211_hw *hw, enum nl80211_iftype type)
+{
+        if (_rtl92cu_set_media_status(hw, type))
+                return -EOPNOTSUPP;
+        _rtl92cu_set_check_bssid(hw, type);
+        return 0;
+}
+
+static void _InitBeaconParameters(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
+
+        rtl_write_word(rtlpriv, REG_BCN_CTRL, 0x1010);
+
+        /* TODO: Remove these magic number */
+        rtl_write_word(rtlpriv, REG_TBTT_PROHIBIT, 0x6404);
+        rtl_write_byte(rtlpriv, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);
+        rtl_write_byte(rtlpriv, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME);
+        /* Change beacon AIFS to the largest number
+         * beacause test chip does not contension before sending beacon. */
+        if (IS_NORMAL_CHIP(rtlhal->version))
+                rtl_write_word(rtlpriv, REG_BCNTCFG, 0x660F);
+        else
+                rtl_write_word(rtlpriv, REG_BCNTCFG, 0x66FF);
+}
+
+static void _beacon_function_enable(struct ieee80211_hw *hw, bool Enable,
+                                    bool Linked)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        _rtl92cu_set_bcn_ctrl_reg(hw, (BIT(4) | BIT(3) | BIT(1)), 0x00);
+        rtl_write_byte(rtlpriv, REG_RD_CTRL+1, 0x6F);
+}
+
+void rtl92cu_set_beacon_related_registers(struct ieee80211_hw *hw)
+{
+
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        u16 bcn_interval, atim_window;
+        u32 value32;
+
+        bcn_interval = mac->beacon_interval;
+        atim_window = 2;        /*FIX MERGE */
+        rtl_write_word(rtlpriv, REG_ATIMWND, atim_window);
+        rtl_write_word(rtlpriv, REG_BCN_INTERVAL, bcn_interval);
+        _InitBeaconParameters(hw);
+        rtl_write_byte(rtlpriv, REG_SLOT, 0x09);
+        /*
+         * Force beacon frame transmission even after receiving beacon frame
+         * from other ad hoc STA
+         *
+         *
+         * Reset TSF Timer to zero, added by Roger. 2008.06.24
+         */
+        value32 = rtl_read_dword(rtlpriv, REG_TCR);
+        value32 &= ~TSFRST;
+        rtl_write_dword(rtlpriv, REG_TCR, value32);
+        value32 |= TSFRST;
+        rtl_write_dword(rtlpriv, REG_TCR, value32);
+        RT_TRACE(rtlpriv, COMP_INIT|COMP_BEACON, DBG_LOUD,
+                 ("SetBeaconRelatedRegisters8192CUsb(): Set TCR(%x)\n",
+                 value32));
+        /* TODO: Modify later (Find the right parameters)
+         * NOTE: Fix test chip's bug (about contention windows's randomness) */
+        if ((mac->opmode == NL80211_IFTYPE_ADHOC) ||
+            (mac->opmode == NL80211_IFTYPE_AP)) {
+                rtl_write_byte(rtlpriv, REG_RXTSF_OFFSET_CCK, 0x50);
+                rtl_write_byte(rtlpriv, REG_RXTSF_OFFSET_OFDM, 0x50);
+        }
+        _beacon_function_enable(hw, true, true);
+}
+
+void rtl92cu_set_beacon_interval(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        u16 bcn_interval = mac->beacon_interval;
+
+        RT_TRACE(rtlpriv, COMP_BEACON, DBG_DMESG,
+                 ("beacon_interval:%d\n", bcn_interval));
+        rtl_write_word(rtlpriv, REG_BCN_INTERVAL, bcn_interval);
+}
+
+void rtl92cu_update_interrupt_mask(struct ieee80211_hw *hw,
+                                   u32 add_msr, u32 rm_msr)
+{
+}
+
+void rtl92cu_get_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+
+        switch (variable) {
+        case HW_VAR_RCR:
+                *((u32 *)(val)) = mac->rx_conf;
+                break;
+        case HW_VAR_RF_STATE:
+                *((enum rf_pwrstate *)(val)) = ppsc->rfpwr_state;
+                break;
+        case HW_VAR_FWLPS_RF_ON:{
+                        enum rf_pwrstate rfState;
+                        u32 val_rcr;
+
+                        rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_RF_STATE,
+                                                      (u8 *)(&rfState));
+                        if (rfState == ERFOFF) {
+                                *((bool *) (val)) = true;
+                        } else {
+                                val_rcr = rtl_read_dword(rtlpriv, REG_RCR);
+                                val_rcr &= 0x00070000;
+                                if (val_rcr)
+                                        *((bool *) (val)) = false;
+                                else
+                                        *((bool *) (val)) = true;
+                        }
+                        break;
+                }
+        case HW_VAR_FW_PSMODE_STATUS:
+                *((bool *) (val)) = ppsc->fw_current_inpsmode;
+                break;
+        case HW_VAR_CORRECT_TSF:{
+                        u64 tsf;
+                        u32 *ptsf_low = (u32 *)&tsf;
+                        u32 *ptsf_high = ((u32 *)&tsf) + 1;
+
+                        *ptsf_high = rtl_read_dword(rtlpriv, (REG_TSFTR + 4));
+                        *ptsf_low = rtl_read_dword(rtlpriv, REG_TSFTR);
+                        *((u64 *)(val)) = tsf;
+                        break;
+                }
+        case HW_VAR_MGT_FILTER:
+                *((u16 *) (val)) = rtl_read_word(rtlpriv, REG_RXFLTMAP0);
+                break;
+        case HW_VAR_CTRL_FILTER:
+                *((u16 *) (val)) = rtl_read_word(rtlpriv, REG_RXFLTMAP1);
+                break;
+        case HW_VAR_DATA_FILTER:
+                *((u16 *) (val)) = rtl_read_word(rtlpriv, REG_RXFLTMAP2);
+                break;
+        default:
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("switch case not process\n"));
+                break;
+        }
+}
+
+void rtl92cu_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+        struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw));
+        enum wireless_mode wirelessmode = mac->mode;
+        u8 idx = 0;
+
+        switch (variable) {
+        case HW_VAR_ETHER_ADDR:{
+                        for (idx = 0; idx < ETH_ALEN; idx++) {
+                                rtl_write_byte(rtlpriv, (REG_MACID + idx),
+                                               val[idx]);
+                        }
+                        break;
+                }
+        case HW_VAR_BASIC_RATE:{
+                        u16 rate_cfg = ((u16 *) val)[0];
+                        u8 rate_index = 0;
+
+                        rate_cfg &= 0x15f;
+                        /* TODO */
+                        /* if (mac->current_network.vender == HT_IOT_PEER_CISCO
+                         *     && ((rate_cfg & 0x150) == 0)) {
+                         *        rate_cfg |= 0x010;
+                         * } */
+                        rate_cfg |= 0x01;
+                        rtl_write_byte(rtlpriv, REG_RRSR, rate_cfg & 0xff);
+                        rtl_write_byte(rtlpriv, REG_RRSR + 1,
+                                       (rate_cfg >> 8) & 0xff);
+                        while (rate_cfg > 0x1) {
+                                rate_cfg >>= 1;
+                                rate_index++;
+                        }
+                        rtl_write_byte(rtlpriv, REG_INIRTS_RATE_SEL,
+                                       rate_index);
+                        break;
+                }
+        case HW_VAR_BSSID:{
+                        for (idx = 0; idx < ETH_ALEN; idx++) {
+                                rtl_write_byte(rtlpriv, (REG_BSSID + idx),
+                                               val[idx]);
+                        }
+                        break;
+                }
+        case HW_VAR_SIFS:{
+                        rtl_write_byte(rtlpriv, REG_SIFS_CCK + 1, val[0]);
+                        rtl_write_byte(rtlpriv, REG_SIFS_OFDM + 1, val[1]);
+                        rtl_write_byte(rtlpriv, REG_SPEC_SIFS + 1, val[0]);
+                        rtl_write_byte(rtlpriv, REG_MAC_SPEC_SIFS + 1, val[0]);
+                        rtl_write_byte(rtlpriv, REG_R2T_SIFS+1, val[0]);
+                        rtl_write_byte(rtlpriv, REG_T2T_SIFS+1, val[0]);
+                        RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
+                                 ("HW_VAR_SIFS\n"));
+                        break;
+                }
+        case HW_VAR_SLOT_TIME:{
+                        u8 e_aci;
+                        u8 QOS_MODE = 1;
+
+                        rtl_write_byte(rtlpriv, REG_SLOT, val[0]);
+                        RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
+                                 ("HW_VAR_SLOT_TIME %x\n", val[0]));
+                        if (QOS_MODE) {
+                                for (e_aci = 0; e_aci < AC_MAX; e_aci++)
+                                        rtlpriv->cfg->ops->set_hw_reg(hw,
+                                                                HW_VAR_AC_PARAM,
+                                                                (u8 *)(&e_aci));
+                        } else {
+                                u8 sifstime = 0;
+                                u8      u1bAIFS;
+
+                                if (IS_WIRELESS_MODE_A(wirelessmode) ||
+                                    IS_WIRELESS_MODE_N_24G(wirelessmode) ||
+                                    IS_WIRELESS_MODE_N_5G(wirelessmode))
+                                        sifstime = 16;
+                                else
+                                        sifstime = 10;
+                                u1bAIFS = sifstime + (2 *  val[0]);
+                                rtl_write_byte(rtlpriv, REG_EDCA_VO_PARAM,
+                                               u1bAIFS);
+                                rtl_write_byte(rtlpriv, REG_EDCA_VI_PARAM,
+                                               u1bAIFS);
+                                rtl_write_byte(rtlpriv, REG_EDCA_BE_PARAM,
+                                               u1bAIFS);
+                                rtl_write_byte(rtlpriv, REG_EDCA_BK_PARAM,
+                                               u1bAIFS);
+                        }
+                        break;
+                }
+        case HW_VAR_ACK_PREAMBLE:{
+                        u8 reg_tmp;
+                        u8 short_preamble = (bool) (*(u8 *) val);
+                        reg_tmp = 0;
+                        if (short_preamble)
+                                reg_tmp |= 0x80;
+                        rtl_write_byte(rtlpriv, REG_RRSR + 2, reg_tmp);
+                        break;
+                }
+        case HW_VAR_AMPDU_MIN_SPACE:{
+                        u8 min_spacing_to_set;
+                        u8 sec_min_space;
+
+                        min_spacing_to_set = *((u8 *) val);
+                        if (min_spacing_to_set <= 7) {
+                                switch (rtlpriv->sec.pairwise_enc_algorithm) {
+                                case NO_ENCRYPTION:
+                                case AESCCMP_ENCRYPTION:
+                                        sec_min_space = 0;
+                                        break;
+                                case WEP40_ENCRYPTION:
+                                case WEP104_ENCRYPTION:
+                                case TKIP_ENCRYPTION:
+                                        sec_min_space = 6;
+                                        break;
+                                default:
+                                        sec_min_space = 7;
+                                        break;
+                                }
+                                if (min_spacing_to_set < sec_min_space)
+                                        min_spacing_to_set = sec_min_space;
+                                mac->min_space_cfg = ((mac->min_space_cfg &
+                                                     0xf8) |
+                                                     min_spacing_to_set);
+                                *val = min_spacing_to_set;
+                                RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
+                                        ("Set HW_VAR_AMPDU_MIN_SPACE: %#x\n",
+                                        mac->min_space_cfg));
+                                rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE,
+                                               mac->min_space_cfg);
+                        }
+                        break;
+                }
+        case HW_VAR_SHORTGI_DENSITY:{
+                        u8 density_to_set;
+
+                        density_to_set = *((u8 *) val);
+                        density_to_set &= 0x1f;
+                        mac->min_space_cfg &= 0x07;
+                        mac->min_space_cfg |= (density_to_set << 3);
+                        RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
+                                 ("Set HW_VAR_SHORTGI_DENSITY: %#x\n",
+                                  mac->min_space_cfg));
+                        rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE,
+                                       mac->min_space_cfg);
+                        break;
+                }
+        case HW_VAR_AMPDU_FACTOR:{
+                        u8 regtoset_normal[4] = {0x41, 0xa8, 0x72, 0xb9};
+                        u8 factor_toset;
+                        u8 *p_regtoset = NULL;
+                        u8 index = 0;
+
+                        p_regtoset = regtoset_normal;
+                        factor_toset = *((u8 *) val);
+                        if (factor_toset <= 3) {
+                                factor_toset = (1 << (factor_toset + 2));
+                                if (factor_toset > 0xf)
+                                        factor_toset = 0xf;
+                                for (index = 0; index < 4; index++) {
+                                        if ((p_regtoset[index] & 0xf0) >
+                                            (factor_toset << 4))
+                                                p_regtoset[index] =
+                                                     (p_regtoset[index] & 0x0f)
+                                                     | (factor_toset << 4);
+                                        if ((p_regtoset[index] & 0x0f) >
+                                             factor_toset)
+                                                p_regtoset[index] =
+                                                     (p_regtoset[index] & 0xf0)
+                                                     | (factor_toset);
+                                        rtl_write_byte(rtlpriv,
+                                                       (REG_AGGLEN_LMT + index),
+                                                       p_regtoset[index]);
+                                }
+                                RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
+                                         ("Set HW_VAR_AMPDU_FACTOR: %#x\n",
+                                          factor_toset));
+                        }
+                        break;
+                }
+        case HW_VAR_AC_PARAM:{
+                        u8 e_aci = *((u8 *) val);
+                        u32 u4b_ac_param;
+                        u16 cw_min = le16_to_cpu(mac->ac[e_aci].cw_min);
+                        u16 cw_max = le16_to_cpu(mac->ac[e_aci].cw_max);
+                        u16 tx_op = le16_to_cpu(mac->ac[e_aci].tx_op);
+
+                        u4b_ac_param = (u32) mac->ac[e_aci].aifs;
+                        u4b_ac_param |= (u32) ((cw_min & 0xF) <<
+                                         AC_PARAM_ECW_MIN_OFFSET);
+                        u4b_ac_param |= (u32) ((cw_max & 0xF) <<
+                                         AC_PARAM_ECW_MAX_OFFSET);
+                        u4b_ac_param |= (u32) tx_op << AC_PARAM_TXOP_OFFSET;
+                        RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
+                                 ("queue:%x, ac_param:%x\n", e_aci,
+                                  u4b_ac_param));
+                        switch (e_aci) {
+                        case AC1_BK:
+                                rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM,
+                                                u4b_ac_param);
+                                break;
+                        case AC0_BE:
+                                rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM,
+                                                u4b_ac_param);
+                                break;
+                        case AC2_VI:
+                                rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM,
+                                                u4b_ac_param);
+                                break;
+                        case AC3_VO:
+                                rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM,
+                                                u4b_ac_param);
+                                break;
+                        default:
+                                RT_ASSERT(false, ("SetHwReg8185(): invalid"
+                                          " aci: %d !\n", e_aci));
+                                break;
+                        }
+                        if (rtlusb->acm_method != eAcmWay2_SW)
+                                rtlpriv->cfg->ops->set_hw_reg(hw,
+                                         HW_VAR_ACM_CTRL, (u8 *)(&e_aci));
+                        break;
+                }
+        case HW_VAR_ACM_CTRL:{
+                        u8 e_aci = *((u8 *) val);
+                        union aci_aifsn *p_aci_aifsn = (union aci_aifsn *)
+                                                        (&(mac->ac[0].aifs));
+                        u8 acm = p_aci_aifsn->f.acm;
+                        u8 acm_ctrl = rtl_read_byte(rtlpriv, REG_ACMHWCTRL);
+
+                        acm_ctrl =
+                            acm_ctrl | ((rtlusb->acm_method == 2) ? 0x0 : 0x1);
+                        if (acm) {
+                                switch (e_aci) {
+                                case AC0_BE:
+                                        acm_ctrl |= AcmHw_BeqEn;
+                                        break;
+                                case AC2_VI:
+                                        acm_ctrl |= AcmHw_ViqEn;
+                                        break;
+                                case AC3_VO:
+                                        acm_ctrl |= AcmHw_VoqEn;
+                                        break;
+                                default:
+                                        RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
+                                                 ("HW_VAR_ACM_CTRL acm set "
+                                                  "failed: eACI is %d\n", acm));
+                                        break;
+                                }
+                        } else {
+                                switch (e_aci) {
+                                case AC0_BE:
+                                        acm_ctrl &= (~AcmHw_BeqEn);
+                                        break;
+                                case AC2_VI:
+                                        acm_ctrl &= (~AcmHw_ViqEn);
+                                        break;
+                                case AC3_VO:
+                                        acm_ctrl &= (~AcmHw_BeqEn);
+                                        break;
+                                default:
+                                        RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                                                 ("switch case not process\n"));
+                                        break;
+                                }
+                        }
+                        RT_TRACE(rtlpriv, COMP_QOS, DBG_TRACE,
+                                 ("SetHwReg8190pci(): [HW_VAR_ACM_CTRL] "
+                                  "Write 0x%X\n", acm_ctrl));
+                        rtl_write_byte(rtlpriv, REG_ACMHWCTRL, acm_ctrl);
+                        break;
+                }
+        case HW_VAR_RCR:{
+                        rtl_write_dword(rtlpriv, REG_RCR, ((u32 *) (val))[0]);
+                        mac->rx_conf = ((u32 *) (val))[0];
+                        RT_TRACE(rtlpriv, COMP_RECV, DBG_DMESG,
+                                 ("### Set RCR(0x%08x) ###\n", mac->rx_conf));
+                        break;
+                }
+        case HW_VAR_RETRY_LIMIT:{
+                        u8 retry_limit = ((u8 *) (val))[0];
+
+                        rtl_write_word(rtlpriv, REG_RL,
+                                       retry_limit << RETRY_LIMIT_SHORT_SHIFT |
+                                       retry_limit << RETRY_LIMIT_LONG_SHIFT);
+                        RT_TRACE(rtlpriv, COMP_MLME, DBG_DMESG, ("Set HW_VAR_R"
+                                 "ETRY_LIMIT(0x%08x)\n", retry_limit));
+                        break;
+                }
+        case HW_VAR_DUAL_TSF_RST:
+                rtl_write_byte(rtlpriv, REG_DUAL_TSF_RST, (BIT(0) | BIT(1)));
+                break;
+        case HW_VAR_EFUSE_BYTES:
+                rtlefuse->efuse_usedbytes = *((u16 *) val);
+                break;
+        case HW_VAR_EFUSE_USAGE:
+                rtlefuse->efuse_usedpercentage = *((u8 *) val);
+                break;
+        case HW_VAR_IO_CMD:
+                rtl92c_phy_set_io_cmd(hw, (*(enum io_type *)val));
+                break;
+        case HW_VAR_WPA_CONFIG:
+                rtl_write_byte(rtlpriv, REG_SECCFG, *((u8 *) val));
+                break;
+        case HW_VAR_SET_RPWM:{
+                        u8 rpwm_val = rtl_read_byte(rtlpriv, REG_USB_HRPWM);
+
+                        if (rpwm_val & BIT(7))
+                                rtl_write_byte(rtlpriv, REG_USB_HRPWM,
+                                               (*(u8 *)val));
+                        else
+                                rtl_write_byte(rtlpriv, REG_USB_HRPWM,
+                                               ((*(u8 *)val) | BIT(7)));
+                        break;
+                }
+        case HW_VAR_H2C_FW_PWRMODE:{
+                        u8 psmode = (*(u8 *) val);
+
+                        if ((psmode != FW_PS_ACTIVE_MODE) &&
+                           (!IS_92C_SERIAL(rtlhal->version)))
+                                rtl92c_dm_rf_saving(hw, true);
+                        rtl92c_set_fw_pwrmode_cmd(hw, (*(u8 *) val));
+                        break;
+                }
+        case HW_VAR_FW_PSMODE_STATUS:
+                ppsc->fw_current_inpsmode = *((bool *) val);
+                break;
+        case HW_VAR_H2C_FW_JOINBSSRPT:{
+                        u8 mstatus = (*(u8 *) val);
+                        u8 tmp_reg422;
+                        bool recover = false;
+
+                        if (mstatus == RT_MEDIA_CONNECT) {
+                                rtlpriv->cfg->ops->set_hw_reg(hw,
+                                                         HW_VAR_AID, NULL);
+                                rtl_write_byte(rtlpriv, REG_CR + 1, 0x03);
+                                _rtl92cu_set_bcn_ctrl_reg(hw, 0, BIT(3));
+                                _rtl92cu_set_bcn_ctrl_reg(hw, BIT(4), 0);
+                                tmp_reg422 = rtl_read_byte(rtlpriv,
+                                                        REG_FWHW_TXQ_CTRL + 2);
+                                if (tmp_reg422 & BIT(6))
+                                        recover = true;
+                                rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2,
+                                               tmp_reg422 & (~BIT(6)));
+                                rtl92c_set_fw_rsvdpagepkt(hw, 0);
+                                _rtl92cu_set_bcn_ctrl_reg(hw, BIT(3), 0);
+                                _rtl92cu_set_bcn_ctrl_reg(hw, 0, BIT(4));
+                                if (recover)
+                                        rtl_write_byte(rtlpriv,
+                                                 REG_FWHW_TXQ_CTRL + 2,
+                                                tmp_reg422 | BIT(6));
+                                rtl_write_byte(rtlpriv, REG_CR + 1, 0x02);
+                        }
+                        rtl92c_set_fw_joinbss_report_cmd(hw, (*(u8 *) val));
+                        break;
+                }
+        case HW_VAR_AID:{
+                        u16 u2btmp;
+
+                        u2btmp = rtl_read_word(rtlpriv, REG_BCN_PSR_RPT);
+                        u2btmp &= 0xC000;
+                        rtl_write_word(rtlpriv, REG_BCN_PSR_RPT,
+                                       (u2btmp | mac->assoc_id));
+                        break;
+                }
+        case HW_VAR_CORRECT_TSF:{
+                        u8 btype_ibss = ((u8 *) (val))[0];
+
+                        if (btype_ibss == true)
+                                _rtl92cu_stop_tx_beacon(hw);
+                        _rtl92cu_set_bcn_ctrl_reg(hw, 0, BIT(3));
+                        rtl_write_dword(rtlpriv, REG_TSFTR, (u32)(mac->tsf &
+                                        0xffffffff));
+                        rtl_write_dword(rtlpriv, REG_TSFTR + 4,
+                                        (u32)((mac->tsf >> 32) & 0xffffffff));
+                        _rtl92cu_set_bcn_ctrl_reg(hw, BIT(3), 0);
+                        if (btype_ibss == true)
+                                _rtl92cu_resume_tx_beacon(hw);
+                        break;
+                }
+        case HW_VAR_MGT_FILTER:
+                rtl_write_word(rtlpriv, REG_RXFLTMAP0, *(u16 *)val);
+                break;
+        case HW_VAR_CTRL_FILTER:
+                rtl_write_word(rtlpriv, REG_RXFLTMAP1, *(u16 *)val);
+                break;
+        case HW_VAR_DATA_FILTER:
+                rtl_write_word(rtlpriv, REG_RXFLTMAP2, *(u16 *)val);
+                break;
+        default:
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, ("switch case "
+                                                        "not process\n"));
+                break;
+        }
+}
+
+void rtl92cu_update_hal_rate_table(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        u32 ratr_value = (u32) mac->basic_rates;
+        u8 *mcsrate = mac->mcs;
+        u8 ratr_index = 0;
+        u8 nmode = mac->ht_enable;
+        u8 mimo_ps = 1;
+        u16 shortgi_rate = 0;
+        u32 tmp_ratr_value = 0;
+        u8 curtxbw_40mhz = mac->bw_40;
+        u8 curshortgi_40mhz = mac->sgi_40;
+        u8 curshortgi_20mhz = mac->sgi_20;
+        enum wireless_mode wirelessmode = mac->mode;
+
+        ratr_value |= ((*(u16 *) (mcsrate))) << 12;
+        switch (wirelessmode) {
+        case WIRELESS_MODE_B:
+                if (ratr_value & 0x0000000c)
+                        ratr_value &= 0x0000000d;
+                else
+                        ratr_value &= 0x0000000f;
+                break;
+        case WIRELESS_MODE_G:
+                ratr_value &= 0x00000FF5;
+                break;
+        case WIRELESS_MODE_N_24G:
+        case WIRELESS_MODE_N_5G:
+                nmode = 1;
+                if (mimo_ps == 0) {
+                        ratr_value &= 0x0007F005;
+                } else {
+                        u32 ratr_mask;
+
+                        if (get_rf_type(rtlphy) == RF_1T2R ||
+                            get_rf_type(rtlphy) == RF_1T1R)
+                                ratr_mask = 0x000ff005;
+                        else
+                                ratr_mask = 0x0f0ff005;
+                        if (curtxbw_40mhz)
+                                ratr_mask |= 0x00000010;
+                        ratr_value &= ratr_mask;
+                }
+                break;
+        default:
+                if (rtlphy->rf_type == RF_1T2R)
+                        ratr_value &= 0x000ff0ff;
+                else
+                        ratr_value &= 0x0f0ff0ff;
+                break;
+        }
+        ratr_value &= 0x0FFFFFFF;
+        if (nmode && ((curtxbw_40mhz && curshortgi_40mhz) ||
+            (!curtxbw_40mhz && curshortgi_20mhz))) {
+                ratr_value |= 0x10000000;
+                tmp_ratr_value = (ratr_value >> 12);
+                for (shortgi_rate = 15; shortgi_rate > 0; shortgi_rate--) {
+                        if ((1 << shortgi_rate) & tmp_ratr_value)
+                                break;
+                }
+                shortgi_rate = (shortgi_rate << 12) | (shortgi_rate << 8) |
+                               (shortgi_rate << 4) | (shortgi_rate);
+        }
+        rtl_write_dword(rtlpriv, REG_ARFR0 + ratr_index * 4, ratr_value);
+        RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, ("%x\n", rtl_read_dword(rtlpriv,
+                 REG_ARFR0)));
+}
+
+void rtl92cu_update_hal_rate_mask(struct ieee80211_hw *hw, u8 rssi_level)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        u32 ratr_bitmap = (u32) mac->basic_rates;
+        u8 *p_mcsrate = mac->mcs;
+        u8 ratr_index = 0;
+        u8 curtxbw_40mhz = mac->bw_40;
+        u8 curshortgi_40mhz = mac->sgi_40;
+        u8 curshortgi_20mhz = mac->sgi_20;
+        enum wireless_mode wirelessmode = mac->mode;
+        bool shortgi = false;
+        u8 rate_mask[5];
+        u8 macid = 0;
+        u8 mimops = 1;
+
+        ratr_bitmap |= (p_mcsrate[1] << 20) | (p_mcsrate[0] << 12);
+        switch (wirelessmode) {
+        case WIRELESS_MODE_B:
+                ratr_index = RATR_INX_WIRELESS_B;
+                if (ratr_bitmap & 0x0000000c)
+                        ratr_bitmap &= 0x0000000d;
+                else
+                        ratr_bitmap &= 0x0000000f;
+                break;
+        case WIRELESS_MODE_G:
+                ratr_index = RATR_INX_WIRELESS_GB;
+                if (rssi_level == 1)
+                        ratr_bitmap &= 0x00000f00;
+                else if (rssi_level == 2)
+                        ratr_bitmap &= 0x00000ff0;
+                else
+                        ratr_bitmap &= 0x00000ff5;
+                break;
+        case WIRELESS_MODE_A:
+                ratr_index = RATR_INX_WIRELESS_A;
+                ratr_bitmap &= 0x00000ff0;
+                break;
+        case WIRELESS_MODE_N_24G:
+        case WIRELESS_MODE_N_5G:
+                ratr_index = RATR_INX_WIRELESS_NGB;
+                if (mimops == 0) {
+                        if (rssi_level == 1)
+                                ratr_bitmap &= 0x00070000;
+                        else if (rssi_level == 2)
+                                ratr_bitmap &= 0x0007f000;
+                        else
+                                ratr_bitmap &= 0x0007f005;
+                } else {
+                        if (rtlphy->rf_type == RF_1T2R ||
+                            rtlphy->rf_type == RF_1T1R) {
+                                if (curtxbw_40mhz) {
+                                        if (rssi_level == 1)
+                                                ratr_bitmap &= 0x000f0000;
+                                        else if (rssi_level == 2)
+                                                ratr_bitmap &= 0x000ff000;
+                                        else
+                                                ratr_bitmap &= 0x000ff015;
+                                } else {
+                                        if (rssi_level == 1)
+                                                ratr_bitmap &= 0x000f0000;
+                                        else if (rssi_level == 2)
+                                                ratr_bitmap &= 0x000ff000;
+                                        else
+                                                ratr_bitmap &= 0x000ff005;
+                                }
+                        } else {
+                                if (curtxbw_40mhz) {
+                                        if (rssi_level == 1)
+                                                ratr_bitmap &= 0x0f0f0000;
+                                        else if (rssi_level == 2)
+                                                ratr_bitmap &= 0x0f0ff000;
+                                        else
+                                                ratr_bitmap &= 0x0f0ff015;
+                                } else {
+                                        if (rssi_level == 1)
+                                                ratr_bitmap &= 0x0f0f0000;
+                                        else if (rssi_level == 2)
+                                                ratr_bitmap &= 0x0f0ff000;
+                                        else
+                                                ratr_bitmap &= 0x0f0ff005;
+                                }
+                        }
+                }
+                if ((curtxbw_40mhz && curshortgi_40mhz) ||
+                    (!curtxbw_40mhz && curshortgi_20mhz)) {
+                        if (macid == 0)
+                                shortgi = true;
+                        else if (macid == 1)
+                                shortgi = false;
+                }
+                break;
+        default:
+                ratr_index = RATR_INX_WIRELESS_NGB;
+                if (rtlphy->rf_type == RF_1T2R)
+                        ratr_bitmap &= 0x000ff0ff;
+                else
+                        ratr_bitmap &= 0x0f0ff0ff;
+                break;
+        }
+        RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, ("ratr_bitmap :%x\n",
+                 ratr_bitmap));
+        *(u32 *)&rate_mask = ((ratr_bitmap & 0x0fffffff) |
+                                      ratr_index << 28);
+        rate_mask[4] = macid | (shortgi ? 0x20 : 0x00) | 0x80;
+        RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, ("Rate_index:%x, "
+                                                "ratr_val:%x, %x:%x:%x:%x:%x\n",
+                                                ratr_index, ratr_bitmap,
+                                                rate_mask[0], rate_mask[1],
+                                                rate_mask[2], rate_mask[3],
+                                                rate_mask[4]));
+        rtl92c_fill_h2c_cmd(hw, H2C_RA_MASK, 5, rate_mask);
+}
+
+void rtl92cu_update_channel_access_setting(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        u16 sifs_timer;
+
+        rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SLOT_TIME,
+                                      (u8 *)&mac->slot_time);
+        if (!mac->ht_enable)
+                sifs_timer = 0x0a0a;
+        else
+                sifs_timer = 0x0e0e;
+        rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SIFS, (u8 *)&sifs_timer);
+}
+
+bool rtl92cu_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 * valid)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        enum rf_pwrstate e_rfpowerstate_toset, cur_rfstate;
+        u8 u1tmp = 0;
+        bool actuallyset = false;
+        unsigned long flag = 0;
+        /* to do - usb autosuspend */
+        u8 usb_autosuspend = 0;
+
+        if (ppsc->swrf_processing)
+                return false;
+        spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag);
+        if (ppsc->rfchange_inprogress) {
+                spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag);
+                return false;
+        } else {
+                ppsc->rfchange_inprogress = true;
+                spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag);
+        }
+        cur_rfstate = ppsc->rfpwr_state;
+        if (usb_autosuspend) {
+                /* to do................... */
+        } else {
+                if (ppsc->pwrdown_mode) {
+                        u1tmp = rtl_read_byte(rtlpriv, REG_HSISR);
+                        e_rfpowerstate_toset = (u1tmp & BIT(7)) ?
+                                               ERFOFF : ERFON;
+                        RT_TRACE(rtlpriv, COMP_POWER, DBG_DMESG,
+                                 ("pwrdown, 0x5c(BIT7)=%02x\n", u1tmp));
+                } else {
+                        rtl_write_byte(rtlpriv, REG_MAC_PINMUX_CFG,
+                                       rtl_read_byte(rtlpriv,
+                                       REG_MAC_PINMUX_CFG) & ~(BIT(3)));
+                        u1tmp = rtl_read_byte(rtlpriv, REG_GPIO_IO_SEL);
+                        e_rfpowerstate_toset  = (u1tmp & BIT(3)) ?
+                                                 ERFON : ERFOFF;
+                        RT_TRACE(rtlpriv, COMP_POWER, DBG_DMESG,
+                                ("GPIO_IN=%02x\n", u1tmp));
+                }
+                RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, ("N-SS RF =%x\n",
+                         e_rfpowerstate_toset));
+        }
+        if ((ppsc->hwradiooff) && (e_rfpowerstate_toset == ERFON)) {
+                RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, ("GPIOChangeRF  - HW "
+                         "Radio ON, RF ON\n"));
+                ppsc->hwradiooff = false;
+                actuallyset = true;
+        } else if ((!ppsc->hwradiooff) && (e_rfpowerstate_toset  ==
+                    ERFOFF)) {
+                RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, ("GPIOChangeRF  - HW"
+                         " Radio OFF\n"));
+                ppsc->hwradiooff = true;
+                actuallyset = true;
+        } else {
+                RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD ,
+                         ("pHalData->bHwRadioOff and eRfPowerStateToSet do not"
+                         " match: pHalData->bHwRadioOff %x, eRfPowerStateToSet "
+                         "%x\n", ppsc->hwradiooff, e_rfpowerstate_toset));
+        }
+        if (actuallyset) {
+                ppsc->hwradiooff = 1;
+                if (e_rfpowerstate_toset == ERFON) {
+                        if ((ppsc->reg_rfps_level  & RT_RF_OFF_LEVL_ASPM) &&
+                             RT_IN_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_ASPM))
+                                RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_ASPM);
+                        else if ((ppsc->reg_rfps_level  & RT_RF_OFF_LEVL_PCI_D3)
+                                 && RT_IN_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_PCI_D3))
+                                RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_PCI_D3);
+                }
+                spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag);
+                ppsc->rfchange_inprogress = false;
+                spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag);
+                /* For power down module, we need to enable register block
+                 * contrl reg at 0x1c. Then enable power down control bit
+                 * of register 0x04 BIT4 and BIT15 as 1.
+                 */
+                if (ppsc->pwrdown_mode && e_rfpowerstate_toset == ERFOFF) {
+                        /* Enable register area 0x0-0xc. */
+                        rtl_write_byte(rtlpriv, REG_RSV_CTRL, 0x0);
+                        if (IS_HARDWARE_TYPE_8723U(rtlhal)) {
+                                /*
+                                 * We should configure HW PDn source for WiFi
+                                 * ONLY, and then our HW will be set in
+                                 * power-down mode if PDn source from all
+                                 * functions are configured.
+                                 */
+                                u1tmp = rtl_read_byte(rtlpriv,
+                                                      REG_MULTI_FUNC_CTRL);
+                                rtl_write_byte(rtlpriv, REG_MULTI_FUNC_CTRL,
+                                               (u1tmp|WL_HWPDN_EN));
+                        } else {
+                                rtl_write_word(rtlpriv, REG_APS_FSMCO, 0x8812);
+                        }
+                }
+                if (e_rfpowerstate_toset == ERFOFF) {
+                        if (ppsc->reg_rfps_level  & RT_RF_OFF_LEVL_ASPM)
+                                RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_ASPM);
+                        else if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_PCI_D3)
+                                RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_PCI_D3);
+                }
+        } else if (e_rfpowerstate_toset == ERFOFF || cur_rfstate == ERFOFF) {
+                /* Enter D3 or ASPM after GPIO had been done. */
+                if (ppsc->reg_rfps_level  & RT_RF_OFF_LEVL_ASPM)
+                        RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_ASPM);
+                else if (ppsc->reg_rfps_level  & RT_RF_OFF_LEVL_PCI_D3)
+                        RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_PCI_D3);
+                spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag);
+                ppsc->rfchange_inprogress = false;
+                spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag);
+        } else {
+                spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag);
+                ppsc->rfchange_inprogress = false;
+                spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag);
+        }
+        *valid = 1;
+        return !ppsc->hwradiooff;
+}
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/hw.h b/drivers/net/wireless/rtlwifi/rtl8192cu/hw.h
new file mode 100644
index 000000000000..3c0ea5ea6db5
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192cu/hw.h
@@ -0,0 +1,107 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#ifndef __RTL92CU_HW_H__
+#define __RTL92CU_HW_H__
+
+#define LLT_POLLING_LLT_THRESHOLD               20
+#define LLT_POLLING_READY_TIMEOUT_COUNT         100
+#define LLT_LAST_ENTRY_OF_TX_PKT_BUFFER         255
+
+#define RX_PAGE_SIZE_REG_VALUE                  PBP_128
+/* Note: We will divide number of page equally for each queue
+ * other than public queue! */
+#define TX_TOTAL_PAGE_NUMBER                    0xF8
+#define TX_PAGE_BOUNDARY                        (TX_TOTAL_PAGE_NUMBER + 1)
+
+
+#define CHIP_B_PAGE_NUM_PUBQ                    0xE7
+
+/* For Test Chip Setting
+ * (HPQ + LPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER */
+#define CHIP_A_PAGE_NUM_PUBQ                    0x7E
+
+
+/* For Chip A Setting */
+#define WMM_CHIP_A_TX_TOTAL_PAGE_NUMBER         0xF5
+#define WMM_CHIP_A_TX_PAGE_BOUNDARY             \
+        (WMM_CHIP_A_TX_TOTAL_PAGE_NUMBER + 1) /* F6 */
+
+#define WMM_CHIP_A_PAGE_NUM_PUBQ                0xA3
+#define WMM_CHIP_A_PAGE_NUM_HPQ                 0x29
+#define WMM_CHIP_A_PAGE_NUM_LPQ                 0x29
+
+
+
+/* Note: For Chip B Setting ,modify later */
+#define WMM_CHIP_B_TX_TOTAL_PAGE_NUMBER         0xF5
+#define WMM_CHIP_B_TX_PAGE_BOUNDARY             \
+        (WMM_CHIP_B_TX_TOTAL_PAGE_NUMBER + 1) /* F6 */
+
+#define WMM_CHIP_B_PAGE_NUM_PUBQ                0xB0
+#define WMM_CHIP_B_PAGE_NUM_HPQ                 0x29
+#define WMM_CHIP_B_PAGE_NUM_LPQ                 0x1C
+#define WMM_CHIP_B_PAGE_NUM_NPQ                 0x1C
+
+#define BOARD_TYPE_NORMAL_MASK                  0xE0
+#define BOARD_TYPE_TEST_MASK                    0x0F
+
+/* should be renamed and moved to another file */
+enum _BOARD_TYPE_8192CUSB {
+        BOARD_USB_DONGLE                = 0,    /* USB dongle */
+        BOARD_USB_High_PA               = 1,    /* USB dongle - high power PA */
+        BOARD_MINICARD                  = 2,    /* Minicard */
+        BOARD_USB_SOLO                  = 3,    /* USB solo-Slim module */
+        BOARD_USB_COMBO                 = 4,    /* USB Combo-Slim module */
+};
+
+#define IS_HIGHT_PA(boardtype)          \
+        ((boardtype == BOARD_USB_High_PA) ? true : false)
+
+#define RTL92C_DRIVER_INFO_SIZE                         4
+void rtl92cu_read_eeprom_info(struct ieee80211_hw *hw);
+void rtl92cu_enable_hw_security_config(struct ieee80211_hw *hw);
+int rtl92cu_hw_init(struct ieee80211_hw *hw);
+void rtl92cu_card_disable(struct ieee80211_hw *hw);
+int rtl92cu_set_network_type(struct ieee80211_hw *hw, enum nl80211_iftype type);
+void rtl92cu_set_beacon_related_registers(struct ieee80211_hw *hw);
+void rtl92cu_set_beacon_interval(struct ieee80211_hw *hw);
+void rtl92cu_update_interrupt_mask(struct ieee80211_hw *hw,
+                                   u32 add_msr, u32 rm_msr);
+void rtl92cu_get_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val);
+void rtl92cu_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val);
+void rtl92cu_update_hal_rate_table(struct ieee80211_hw *hw);
+void rtl92cu_update_hal_rate_mask(struct ieee80211_hw *hw, u8 rssi_level);
+
+void rtl92cu_update_channel_access_setting(struct ieee80211_hw *hw);
+bool rtl92cu_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 * valid);
+void rtl92cu_set_check_bssid(struct ieee80211_hw *hw, bool check_bssid);
+u8 _rtl92c_get_chnl_group(u8 chnl);
+
+#endif
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/led.c b/drivers/net/wireless/rtlwifi/rtl8192cu/led.c
new file mode 100644
index 000000000000..332c74348a69
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192cu/led.c
@@ -0,0 +1,142 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ *****************************************************************************/
+
+#include "../wifi.h"
+#include "../usb.h"
+#include "reg.h"
+#include "led.h"
+
+static void _rtl92cu_init_led(struct ieee80211_hw *hw,
+                              struct rtl_led *pled, enum rtl_led_pin ledpin)
+{
+        pled->hw = hw;
+        pled->ledpin = ledpin;
+        pled->ledon = false;
+}
+
+static void _rtl92cu_deInit_led(struct rtl_led *pled)
+{
+}
+
+void rtl92cu_sw_led_on(struct ieee80211_hw *hw, struct rtl_led *pled)
+{
+        u8 ledcfg;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        RT_TRACE(rtlpriv, COMP_LED, DBG_LOUD,
+                 ("LedAddr:%X ledpin=%d\n", REG_LEDCFG2, pled->ledpin));
+        ledcfg = rtl_read_byte(rtlpriv, REG_LEDCFG2);
+        switch (pled->ledpin) {
+        case LED_PIN_GPIO0:
+                break;
+        case LED_PIN_LED0:
+                rtl_write_byte(rtlpriv,
+                               REG_LEDCFG2, (ledcfg & 0xf0) | BIT(5) | BIT(6));
+                break;
+        case LED_PIN_LED1:
+                rtl_write_byte(rtlpriv, REG_LEDCFG2, (ledcfg & 0x0f) | BIT(5));
+                break;
+        default:
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("switch case not process\n"));
+                break;
+        }
+        pled->ledon = true;
+}
+
+void rtl92cu_sw_led_off(struct ieee80211_hw *hw, struct rtl_led *pled)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_usb_priv *usbpriv = rtl_usbpriv(hw);
+        u8 ledcfg;
+
+        RT_TRACE(rtlpriv, COMP_LED, DBG_LOUD,
+                 ("LedAddr:%X ledpin=%d\n", REG_LEDCFG2, pled->ledpin));
+        ledcfg = rtl_read_byte(rtlpriv, REG_LEDCFG2);
+        switch (pled->ledpin) {
+        case LED_PIN_GPIO0:
+                break;
+        case LED_PIN_LED0:
+                ledcfg &= 0xf0;
+                if (usbpriv->ledctl.led_opendrain == true)
+                        rtl_write_byte(rtlpriv, REG_LEDCFG2,
+                                       (ledcfg | BIT(1) | BIT(5) | BIT(6)));
+                else
+                        rtl_write_byte(rtlpriv, REG_LEDCFG2,
+                                       (ledcfg | BIT(3) | BIT(5) | BIT(6)));
+                break;
+        case LED_PIN_LED1:
+                ledcfg &= 0x0f;
+                rtl_write_byte(rtlpriv, REG_LEDCFG2, (ledcfg | BIT(3)));
+                break;
+        default:
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("switch case not process\n"));
+                break;
+        }
+        pled->ledon = false;
+}
+
+void rtl92cu_init_sw_leds(struct ieee80211_hw *hw)
+{
+        struct rtl_usb_priv *usbpriv = rtl_usbpriv(hw);
+        _rtl92cu_init_led(hw, &(usbpriv->ledctl.sw_led0), LED_PIN_LED0);
+        _rtl92cu_init_led(hw, &(usbpriv->ledctl.sw_led1), LED_PIN_LED1);
+}
+
+void rtl92cu_deinit_sw_leds(struct ieee80211_hw *hw)
+{
+        struct rtl_usb_priv *usbpriv = rtl_usbpriv(hw);
+        _rtl92cu_deInit_led(&(usbpriv->ledctl.sw_led0));
+        _rtl92cu_deInit_led(&(usbpriv->ledctl.sw_led1));
+}
+
+static void _rtl92cu_sw_led_control(struct ieee80211_hw *hw,
+                                    enum led_ctl_mode ledaction)
+{
+}
+
+void rtl92cu_led_control(struct ieee80211_hw *hw,
+                        enum led_ctl_mode ledaction)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+
+        if ((ppsc->rfoff_reason > RF_CHANGE_BY_PS) &&
+            (ledaction == LED_CTL_TX ||
+             ledaction == LED_CTL_RX ||
+             ledaction == LED_CTL_SITE_SURVEY ||
+             ledaction == LED_CTL_LINK ||
+             ledaction == LED_CTL_NO_LINK ||
+             ledaction == LED_CTL_START_TO_LINK ||
+             ledaction == LED_CTL_POWER_ON)) {
+                return;
+        }
+        RT_TRACE(rtlpriv, COMP_LED, DBG_LOUD, ("ledaction %d,\n",
+                                ledaction));
+        _rtl92cu_sw_led_control(hw, ledaction);
+}
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/led.h b/drivers/net/wireless/rtlwifi/rtl8192cu/led.h
new file mode 100644
index 000000000000..decaee4d1eb1
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192cu/led.h
@@ -0,0 +1,37 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ *****************************************************************************/
+
+#ifndef __RTL92CU_LED_H__
+#define __RTL92CU_LED_H__
+
+void rtl92cu_init_sw_leds(struct ieee80211_hw *hw);
+void rtl92cu_deinit_sw_leds(struct ieee80211_hw *hw);
+void rtl92cu_sw_led_on(struct ieee80211_hw *hw, struct rtl_led *pled);
+void rtl92cu_sw_led_off(struct ieee80211_hw *hw, struct rtl_led *pled);
+void rtl92cu_led_control(struct ieee80211_hw *hw, enum led_ctl_mode ledaction);
+
+#endif
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/mac.c b/drivers/net/wireless/rtlwifi/rtl8192cu/mac.c
new file mode 100644
index 000000000000..f8514cba17b6
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192cu/mac.c
@@ -0,0 +1,1144 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+****************************************************************************/
+#include <linux/module.h>
+
+#include "../wifi.h"
+#include "../pci.h"
+#include "../usb.h"
+#include "../ps.h"
+#include "../cam.h"
+#include "reg.h"
+#include "def.h"
+#include "phy.h"
+#include "rf.h"
+#include "dm.h"
+#include "mac.h"
+#include "trx.h"
+
+/* macro to shorten lines */
+
+#define LINK_Q  ui_link_quality
+#define RX_EVM  rx_evm_percentage
+#define RX_SIGQ rx_mimo_signalquality
+
+
+void rtl92c_read_chip_version(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
+        enum version_8192c chip_version = VERSION_UNKNOWN;
+        u32 value32;
+
+        value32 = rtl_read_dword(rtlpriv, REG_SYS_CFG);
+        if (value32 & TRP_VAUX_EN) {
+                chip_version = (value32 & TYPE_ID) ? VERSION_TEST_CHIP_92C :
+                               VERSION_TEST_CHIP_88C;
+        } else {
+                /* Normal mass production chip. */
+                chip_version = NORMAL_CHIP;
+                chip_version |= ((value32 & TYPE_ID) ? CHIP_92C : 0);
+                chip_version |= ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : 0);
+                /* RTL8723 with BT function. */
+                chip_version |= ((value32 & BT_FUNC) ? CHIP_8723 : 0);
+                if (IS_VENDOR_UMC(chip_version))
+                        chip_version |= ((value32 & CHIP_VER_RTL_MASK) ?
+                                         CHIP_VENDOR_UMC_B_CUT : 0);
+                if (IS_92C_SERIAL(chip_version)) {
+                        value32 = rtl_read_dword(rtlpriv, REG_HPON_FSM);
+                        chip_version |= ((CHIP_BONDING_IDENTIFIER(value32) ==
+                                 CHIP_BONDING_92C_1T2R) ? CHIP_92C_1T2R : 0);
+                } else if (IS_8723_SERIES(chip_version)) {
+                        value32 = rtl_read_dword(rtlpriv, REG_GPIO_OUTSTS);
+                        chip_version |= ((value32 & RF_RL_ID) ?
+                                          CHIP_8723_DRV_REV : 0);
+                }
+        }
+        rtlhal->version  = (enum version_8192c)chip_version;
+        switch (rtlhal->version) {
+        case VERSION_NORMAL_TSMC_CHIP_92C_1T2R:
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                 ("Chip Version ID: VERSION_B_CHIP_92C.\n"));
+                break;
+        case VERSION_NORMAL_TSMC_CHIP_92C:
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                        ("Chip Version ID: VERSION_NORMAL_TSMC_CHIP_92C.\n"));
+                break;
+        case VERSION_NORMAL_TSMC_CHIP_88C:
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                        ("Chip Version ID: VERSION_NORMAL_TSMC_CHIP_88C.\n"));
+                break;
+        case VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT:
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                        ("Chip Version ID: VERSION_NORMAL_UMC_CHIP_i"
+                        "92C_1T2R_A_CUT.\n"));
+                break;
+        case VERSION_NORMAL_UMC_CHIP_92C_A_CUT:
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                        ("Chip Version ID: VERSION_NORMAL_UMC_CHIP_"
+                        "92C_A_CUT.\n"));
+                break;
+        case VERSION_NORMAL_UMC_CHIP_88C_A_CUT:
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                        ("Chip Version ID: VERSION_NORMAL_UMC_CHIP"
+                        "_88C_A_CUT.\n"));
+                break;
+        case VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT:
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                        ("Chip Version ID: VERSION_NORMAL_UMC_CHIP"
+                        "_92C_1T2R_B_CUT.\n"));
+                break;
+        case VERSION_NORMAL_UMC_CHIP_92C_B_CUT:
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                        ("Chip Version ID: VERSION_NORMAL_UMC_CHIP"
+                        "_92C_B_CUT.\n"));
+                break;
+        case VERSION_NORMAL_UMC_CHIP_88C_B_CUT:
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                        ("Chip Version ID: VERSION_NORMAL_UMC_CHIP"
+                        "_88C_B_CUT.\n"));
+                break;
+        case VERSION_NORMA_UMC_CHIP_8723_1T1R_A_CUT:
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                        ("Chip Version ID: VERSION_NORMA_UMC_CHIP"
+                        "_8723_1T1R_A_CUT.\n"));
+                break;
+        case VERSION_NORMA_UMC_CHIP_8723_1T1R_B_CUT:
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                        ("Chip Version ID: VERSION_NORMA_UMC_CHIP"
+                        "_8723_1T1R_B_CUT.\n"));
+                break;
+        case VERSION_TEST_CHIP_92C:
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                        ("Chip Version ID: VERSION_TEST_CHIP_92C.\n"));
+                break;
+        case VERSION_TEST_CHIP_88C:
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                        ("Chip Version ID: VERSION_TEST_CHIP_88C.\n"));
+                break;
+        default:
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                        ("Chip Version ID: ???????????????.\n"));
+                break;
+        }
+        if (IS_92C_SERIAL(rtlhal->version))
+                rtlphy->rf_type =
+                         (IS_92C_1T2R(rtlhal->version)) ? RF_1T2R : RF_2T2R;
+        else
+                rtlphy->rf_type = RF_1T1R;
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
+                 ("Chip RF Type: %s\n", (rtlphy->rf_type == RF_2T2R) ?
+                  "RF_2T2R" : "RF_1T1R"));
+        if (get_rf_type(rtlphy) == RF_1T1R)
+                rtlpriv->dm.rfpath_rxenable[0] = true;
+        else
+                rtlpriv->dm.rfpath_rxenable[0] =
+                    rtlpriv->dm.rfpath_rxenable[1] = true;
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, ("VersionID = 0x%4x\n",
+                                                rtlhal->version));
+}
+
+/**
+ * writeLLT - LLT table write access
+ * @io: io callback
+ * @address: LLT logical address.
+ * @data: LLT data content
+ *
+ * Realtek hardware access function.
+ *
+ */
+bool rtl92c_llt_write(struct ieee80211_hw *hw, u32 address, u32 data)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        bool status = true;
+        long count = 0;
+        u32 value = _LLT_INIT_ADDR(address) |
+            _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS);
+
+        rtl_write_dword(rtlpriv, REG_LLT_INIT, value);
+        do {
+                value = rtl_read_dword(rtlpriv, REG_LLT_INIT);
+                if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value))
+                        break;
+                if (count > POLLING_LLT_THRESHOLD) {
+                        RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                                 ("Failed to polling write LLT done at"
+                                 " address %d! _LLT_OP_VALUE(%x)\n",
+                                 address, _LLT_OP_VALUE(value)));
+                        status = false;
+                        break;
+                }
+        } while (++count);
+        return status;
+}
+/**
+ * rtl92c_init_LLT_table - Init LLT table
+ * @io: io callback
+ * @boundary:
+ *
+ * Realtek hardware access function.
+ *
+ */
+bool rtl92c_init_llt_table(struct ieee80211_hw *hw, u32 boundary)
+{
+        bool rst = true;
+        u32     i;
+
+        for (i = 0; i < (boundary - 1); i++) {
+                rst = rtl92c_llt_write(hw, i , i + 1);
+                if (true != rst) {
+                        printk(KERN_ERR "===> %s #1 fail\n", __func__);
+                        return rst;
+                }
+        }
+        /* end of list */
+        rst = rtl92c_llt_write(hw, (boundary - 1), 0xFF);
+        if (true != rst) {
+                printk(KERN_ERR "===> %s #2 fail\n", __func__);
+                return rst;
+        }
+        /* Make the other pages as ring buffer
+         * This ring buffer is used as beacon buffer if we config this MAC
+         *  as two MAC transfer.
+         * Otherwise used as local loopback buffer.
+         */
+        for (i = boundary; i < LLT_LAST_ENTRY_OF_TX_PKT_BUFFER; i++) {
+                rst = rtl92c_llt_write(hw, i, (i + 1));
+                if (true != rst) {
+                        printk(KERN_ERR "===> %s #3 fail\n", __func__);
+                        return rst;
+                }
+        }
+        /* Let last entry point to the start entry of ring buffer */
+        rst = rtl92c_llt_write(hw, LLT_LAST_ENTRY_OF_TX_PKT_BUFFER, boundary);
+        if (true != rst) {
+                printk(KERN_ERR "===> %s #4 fail\n", __func__);
+                return rst;
+        }
+        return rst;
+}
+void rtl92c_set_key(struct ieee80211_hw *hw, u32 key_index,
+                     u8 *p_macaddr, bool is_group, u8 enc_algo,
+                     bool is_wepkey, bool clear_all)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        u8 *macaddr = p_macaddr;
+        u32 entry_id = 0;
+        bool is_pairwise = false;
+        static u8 cam_const_addr[4][6] = {
+                {0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+                {0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
+                {0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
+                {0x00, 0x00, 0x00, 0x00, 0x00, 0x03}
+        };
+        static u8 cam_const_broad[] = {
+                0xff, 0xff, 0xff, 0xff, 0xff, 0xff
+        };
+
+        if (clear_all) {
+                u8 idx = 0;
+                u8 cam_offset = 0;
+                u8 clear_number = 5;
+
+                RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, ("clear_all\n"));
+                for (idx = 0; idx < clear_number; idx++) {
+                        rtl_cam_mark_invalid(hw, cam_offset + idx);
+                        rtl_cam_empty_entry(hw, cam_offset + idx);
+                        if (idx < 5) {
+                                memset(rtlpriv->sec.key_buf[idx], 0,
+                                       MAX_KEY_LEN);
+                                rtlpriv->sec.key_len[idx] = 0;
+                        }
+                }
+        } else {
+                switch (enc_algo) {
+                case WEP40_ENCRYPTION:
+                        enc_algo = CAM_WEP40;
+                        break;
+                case WEP104_ENCRYPTION:
+                        enc_algo = CAM_WEP104;
+                        break;
+                case TKIP_ENCRYPTION:
+                        enc_algo = CAM_TKIP;
+                        break;
+                case AESCCMP_ENCRYPTION:
+                        enc_algo = CAM_AES;
+                        break;
+                default:
+                        RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                                ("iillegal switch case\n"));
+                        enc_algo = CAM_TKIP;
+                        break;
+                }
+                if (is_wepkey || rtlpriv->sec.use_defaultkey) {
+                        macaddr = cam_const_addr[key_index];
+                        entry_id = key_index;
+                } else {
+                        if (is_group) {
+                                macaddr = cam_const_broad;
+                                entry_id = key_index;
+                        } else {
+                                key_index = PAIRWISE_KEYIDX;
+                                entry_id = CAM_PAIRWISE_KEY_POSITION;
+                                is_pairwise = true;
+                        }
+                }
+                if (rtlpriv->sec.key_len[key_index] == 0) {
+                        RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
+                                 ("delete one entry\n"));
+                        rtl_cam_delete_one_entry(hw, p_macaddr, entry_id);
+                } else {
+                        RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
+                                 ("The insert KEY length is %d\n",
+                                  rtlpriv->sec.key_len[PAIRWISE_KEYIDX]));
+                        RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
+                                 ("The insert KEY  is %x %x\n",
+                                  rtlpriv->sec.key_buf[0][0],
+                                  rtlpriv->sec.key_buf[0][1]));
+                        RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
+                                 ("add one entry\n"));
+                        if (is_pairwise) {
+                                RT_PRINT_DATA(rtlpriv, COMP_SEC, DBG_LOUD,
+                                              "Pairwiase Key content :",
+                                              rtlpriv->sec.pairwise_key,
+                                              rtlpriv->sec.
+                                              key_len[PAIRWISE_KEYIDX]);
+                                RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
+                                         ("set Pairwiase key\n"));
+
+                                rtl_cam_add_one_entry(hw, macaddr, key_index,
+                                                entry_id, enc_algo,
+                                                CAM_CONFIG_NO_USEDK,
+                                                rtlpriv->sec.
+                                                key_buf[key_index]);
+                        } else {
+                                RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
+                                         ("set group key\n"));
+                                if (mac->opmode == NL80211_IFTYPE_ADHOC) {
+                                        rtl_cam_add_one_entry(hw,
+                                                rtlefuse->dev_addr,
+                                                PAIRWISE_KEYIDX,
+                                                CAM_PAIRWISE_KEY_POSITION,
+                                                enc_algo,
+                                                CAM_CONFIG_NO_USEDK,
+                                                rtlpriv->sec.key_buf
+                                                [entry_id]);
+                                }
+                                rtl_cam_add_one_entry(hw, macaddr, key_index,
+                                                entry_id, enc_algo,
+                                                CAM_CONFIG_NO_USEDK,
+                                                rtlpriv->sec.key_buf[entry_id]);
+                        }
+                }
+        }
+}
+
+u32 rtl92c_get_txdma_status(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        return rtl_read_dword(rtlpriv, REG_TXDMA_STATUS);
+}
+
+void rtl92c_enable_interrupt(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+        struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw));
+
+        if (IS_HARDWARE_TYPE_8192CE(rtlhal)) {
+                rtl_write_dword(rtlpriv, REG_HIMR, rtlpci->irq_mask[0] &
+                                0xFFFFFFFF);
+                rtl_write_dword(rtlpriv, REG_HIMRE, rtlpci->irq_mask[1] &
+                                0xFFFFFFFF);
+                rtlpci->irq_enabled = true;
+        } else {
+                rtl_write_dword(rtlpriv, REG_HIMR, rtlusb->irq_mask[0] &
+                                0xFFFFFFFF);
+                rtl_write_dword(rtlpriv, REG_HIMRE, rtlusb->irq_mask[1] &
+                                0xFFFFFFFF);
+                rtlusb->irq_enabled = true;
+        }
+}
+
+void rtl92c_init_interrupt(struct ieee80211_hw *hw)
+{
+         rtl92c_enable_interrupt(hw);
+}
+
+void rtl92c_disable_interrupt(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
+        struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw));
+
+        rtl_write_dword(rtlpriv, REG_HIMR, IMR8190_DISABLED);
+        rtl_write_dword(rtlpriv, REG_HIMRE, IMR8190_DISABLED);
+        if (IS_HARDWARE_TYPE_8192CE(rtlhal))
+                rtlpci->irq_enabled = false;
+        else if (IS_HARDWARE_TYPE_8192CU(rtlhal))
+                rtlusb->irq_enabled = false;
+}
+
+void rtl92c_set_qos(struct ieee80211_hw *hw, int aci)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        u32 u4b_ac_param;
+
+        rtl92c_dm_init_edca_turbo(hw);
+        u4b_ac_param = (u32) mac->ac[aci].aifs;
+        u4b_ac_param |=
+            ((u32) le16_to_cpu(mac->ac[aci].cw_min) & 0xF) <<
+            AC_PARAM_ECW_MIN_OFFSET;
+        u4b_ac_param |=
+            ((u32) le16_to_cpu(mac->ac[aci].cw_max) & 0xF) <<
+            AC_PARAM_ECW_MAX_OFFSET;
+        u4b_ac_param |= (u32) le16_to_cpu(mac->ac[aci].tx_op) <<
+                         AC_PARAM_TXOP_OFFSET;
+        RT_TRACE(rtlpriv, COMP_QOS, DBG_LOUD,
+                 ("queue:%x, ac_param:%x\n", aci, u4b_ac_param));
+        switch (aci) {
+        case AC1_BK:
+                rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, u4b_ac_param);
+                break;
+        case AC0_BE:
+                rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM, u4b_ac_param);
+                break;
+        case AC2_VI:
+                rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM, u4b_ac_param);
+                break;
+        case AC3_VO:
+                rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, u4b_ac_param);
+                break;
+        default:
+                RT_ASSERT(false, ("invalid aci: %d !\n", aci));
+                break;
+        }
+}
+
+/*-------------------------------------------------------------------------
+ * HW MAC Address
+ *-------------------------------------------------------------------------*/
+void rtl92c_set_mac_addr(struct ieee80211_hw *hw, const u8 *addr)
+{
+        u32 i;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        for (i = 0 ; i < ETH_ALEN ; i++)
+                rtl_write_byte(rtlpriv, (REG_MACID + i), *(addr+i));
+
+        RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG, ("MAC Address: %02X-%02X-%02X-"
+                "%02X-%02X-%02X\n",
+                rtl_read_byte(rtlpriv, REG_MACID),
+                rtl_read_byte(rtlpriv, REG_MACID+1),
+                rtl_read_byte(rtlpriv, REG_MACID+2),
+                rtl_read_byte(rtlpriv, REG_MACID+3),
+                rtl_read_byte(rtlpriv, REG_MACID+4),
+                rtl_read_byte(rtlpriv, REG_MACID+5)));
+}
+
+void rtl92c_init_driver_info_size(struct ieee80211_hw *hw, u8 size)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        rtl_write_byte(rtlpriv, REG_RX_DRVINFO_SZ, size);
+}
+
+int rtl92c_set_network_type(struct ieee80211_hw *hw, enum nl80211_iftype type)
+{
+        u8 value;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        switch (type) {
+        case NL80211_IFTYPE_UNSPECIFIED:
+                value = NT_NO_LINK;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
+                        ("Set Network type to NO LINK!\n"));
+                break;
+        case NL80211_IFTYPE_ADHOC:
+                value = NT_LINK_AD_HOC;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
+                        ("Set Network type to Ad Hoc!\n"));
+                break;
+        case NL80211_IFTYPE_STATION:
+                value = NT_LINK_AP;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
+                        ("Set Network type to STA!\n"));
+                break;
+        case NL80211_IFTYPE_AP:
+                value = NT_AS_AP;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
+                        ("Set Network type to AP!\n"));
+                break;
+        default:
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
+                        ("Network type %d not support!\n", type));
+                return -EOPNOTSUPP;
+        }
+        rtl_write_byte(rtlpriv, (REG_CR + 2), value);
+        return 0;
+}
+
+void rtl92c_init_network_type(struct ieee80211_hw *hw)
+{
+        rtl92c_set_network_type(hw, NL80211_IFTYPE_UNSPECIFIED);
+}
+
+void rtl92c_init_adaptive_ctrl(struct ieee80211_hw *hw)
+{
+        u16     value16;
+        u32     value32;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        /* Response Rate Set */
+        value32 = rtl_read_dword(rtlpriv, REG_RRSR);
+        value32 &= ~RATE_BITMAP_ALL;
+        value32 |= RATE_RRSR_CCK_ONLY_1M;
+        rtl_write_dword(rtlpriv, REG_RRSR, value32);
+        /* SIFS (used in NAV) */
+        value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10);
+        rtl_write_word(rtlpriv,  REG_SPEC_SIFS, value16);
+        /* Retry Limit */
+        value16 = _LRL(0x30) | _SRL(0x30);
+        rtl_write_dword(rtlpriv,  REG_RL, value16);
+}
+
+void rtl92c_init_rate_fallback(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        /* Set Data Auto Rate Fallback Retry Count register. */
+        rtl_write_dword(rtlpriv,  REG_DARFRC, 0x00000000);
+        rtl_write_dword(rtlpriv,  REG_DARFRC+4, 0x10080404);
+        rtl_write_dword(rtlpriv,  REG_RARFRC, 0x04030201);
+        rtl_write_dword(rtlpriv,  REG_RARFRC+4, 0x08070605);
+}
+
+static void rtl92c_set_cck_sifs(struct ieee80211_hw *hw, u8 trx_sifs,
+                                u8 ctx_sifs)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        rtl_write_byte(rtlpriv, REG_SIFS_CCK, trx_sifs);
+        rtl_write_byte(rtlpriv, (REG_SIFS_CCK + 1), ctx_sifs);
+}
+
+static void rtl92c_set_ofdm_sifs(struct ieee80211_hw *hw, u8 trx_sifs,
+                                 u8 ctx_sifs)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        rtl_write_byte(rtlpriv, REG_SIFS_OFDM, trx_sifs);
+        rtl_write_byte(rtlpriv, (REG_SIFS_OFDM + 1), ctx_sifs);
+}
+
+void rtl92c_init_edca_param(struct ieee80211_hw *hw,
+                            u16 queue, u16 txop, u8 cw_min, u8 cw_max, u8 aifs)
+{
+        /* sequence: VO, VI, BE, BK ==> the same as 92C hardware design.
+         * referenc : enum nl80211_txq_q or ieee80211_set_wmm_default function.
+         */
+        u32 value;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        value = (u32)aifs;
+        value |= ((u32)cw_min & 0xF) << 8;
+        value |= ((u32)cw_max & 0xF) << 12;
+        value |= (u32)txop << 16;
+        /* 92C hardware register sequence is the same as queue number. */
+        rtl_write_dword(rtlpriv, (REG_EDCA_VO_PARAM + (queue * 4)), value);
+}
+
+void rtl92c_init_edca(struct ieee80211_hw *hw)
+{
+        u16 value16;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        /* disable EDCCA count down, to reduce collison and retry */
+        value16 = rtl_read_word(rtlpriv, REG_RD_CTRL);
+        value16 |= DIS_EDCA_CNT_DWN;
+        rtl_write_word(rtlpriv, REG_RD_CTRL, value16);
+        /* Update SIFS timing.  ??????????
+         * pHalData->SifsTime = 0x0e0e0a0a; */
+        rtl92c_set_cck_sifs(hw, 0xa, 0xa);
+        rtl92c_set_ofdm_sifs(hw, 0xe, 0xe);
+        /* Set CCK/OFDM SIFS to be 10us. */
+        rtl_write_word(rtlpriv, REG_SIFS_CCK, 0x0a0a);
+        rtl_write_word(rtlpriv, REG_SIFS_OFDM, 0x1010);
+        rtl_write_word(rtlpriv, REG_PROT_MODE_CTRL, 0x0204);
+        rtl_write_dword(rtlpriv, REG_BAR_MODE_CTRL, 0x014004);
+        /* TXOP */
+        rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM, 0x005EA42B);
+        rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, 0x0000A44F);
+        rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM, 0x005EA324);
+        rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, 0x002FA226);
+        /* PIFS */
+        rtl_write_byte(rtlpriv, REG_PIFS, 0x1C);
+        /* AGGR BREAK TIME Register */
+        rtl_write_byte(rtlpriv, REG_AGGR_BREAK_TIME, 0x16);
+        rtl_write_word(rtlpriv, REG_NAV_PROT_LEN, 0x0040);
+        rtl_write_byte(rtlpriv, REG_BCNDMATIM, 0x02);
+        rtl_write_byte(rtlpriv, REG_ATIMWND, 0x02);
+}
+
+void rtl92c_init_ampdu_aggregation(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        rtl_write_dword(rtlpriv, REG_AGGLEN_LMT, 0x99997631);
+        rtl_write_byte(rtlpriv, REG_AGGR_BREAK_TIME, 0x16);
+        /* init AMPDU aggregation number, tuning for Tx's TP, */
+        rtl_write_word(rtlpriv, 0x4CA, 0x0708);
+}
+
+void rtl92c_init_beacon_max_error(struct ieee80211_hw *hw, bool infra_mode)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        rtl_write_byte(rtlpriv, REG_BCN_MAX_ERR, 0xFF);
+}
+
+void rtl92c_init_rdg_setting(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        rtl_write_byte(rtlpriv, REG_RD_CTRL, 0xFF);
+        rtl_write_word(rtlpriv, REG_RD_NAV_NXT, 0x200);
+        rtl_write_byte(rtlpriv, REG_RD_RESP_PKT_TH, 0x05);
+}
+
+void rtl92c_init_retry_function(struct ieee80211_hw *hw)
+{
+        u8      value8;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        value8 = rtl_read_byte(rtlpriv, REG_FWHW_TXQ_CTRL);
+        value8 |= EN_AMPDU_RTY_NEW;
+        rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL, value8);
+        /* Set ACK timeout */
+        rtl_write_byte(rtlpriv, REG_ACKTO, 0x40);
+}
+
+void rtl92c_init_beacon_parameters(struct ieee80211_hw *hw,
+                                   enum version_8192c version)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
+
+        rtl_write_word(rtlpriv, REG_TBTT_PROHIBIT, 0x6404);/* ms */
+        rtl_write_byte(rtlpriv, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);/*ms*/
+        rtl_write_byte(rtlpriv, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME);
+        if (IS_NORMAL_CHIP(rtlhal->version))
+                rtl_write_word(rtlpriv, REG_BCNTCFG, 0x660F);
+        else
+                rtl_write_word(rtlpriv, REG_BCNTCFG, 0x66FF);
+}
+
+void rtl92c_disable_fast_edca(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        rtl_write_word(rtlpriv, REG_FAST_EDCA_CTRL, 0);
+}
+
+void rtl92c_set_min_space(struct ieee80211_hw *hw, bool is2T)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u8 value = is2T ? MAX_MSS_DENSITY_2T : MAX_MSS_DENSITY_1T;
+
+        rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, value);
+}
+
+u16 rtl92c_get_mgt_filter(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        return rtl_read_word(rtlpriv, REG_RXFLTMAP0);
+}
+
+void rtl92c_set_mgt_filter(struct ieee80211_hw *hw, u16 filter)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        rtl_write_word(rtlpriv, REG_RXFLTMAP0, filter);
+}
+
+u16 rtl92c_get_ctrl_filter(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        return rtl_read_word(rtlpriv, REG_RXFLTMAP1);
+}
+
+void rtl92c_set_ctrl_filter(struct ieee80211_hw *hw, u16 filter)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        rtl_write_word(rtlpriv, REG_RXFLTMAP1, filter);
+}
+
+u16 rtl92c_get_data_filter(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        return rtl_read_word(rtlpriv,  REG_RXFLTMAP2);
+}
+
+void rtl92c_set_data_filter(struct ieee80211_hw *hw, u16 filter)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        rtl_write_word(rtlpriv, REG_RXFLTMAP2, filter);
+}
+/*==============================================================*/
+
+static u8 _rtl92c_query_rxpwrpercentage(char antpower)
+{
+        if ((antpower <= -100) || (antpower >= 20))
+                return 0;
+        else if (antpower >= 0)
+                return 100;
+        else
+                return 100 + antpower;
+}
+
+static u8 _rtl92c_evm_db_to_percentage(char value)
+{
+        char ret_val;
+
+        ret_val = value;
+        if (ret_val >= 0)
+                ret_val = 0;
+        if (ret_val <= -33)
+                ret_val = -33;
+        ret_val = 0 - ret_val;
+        ret_val *= 3;
+        if (ret_val == 99)
+                ret_val = 100;
+        return ret_val;
+}
+
+static long _rtl92c_translate_todbm(struct ieee80211_hw *hw,
+                                     u8 signal_strength_index)
+{
+        long signal_power;
+
+        signal_power = (long)((signal_strength_index + 1) >> 1);
+        signal_power -= 95;
+        return signal_power;
+}
+
+static long _rtl92c_signal_scale_mapping(struct ieee80211_hw *hw,
+                long currsig)
+{
+        long retsig;
+
+        if (currsig >= 61 && currsig <= 100)
+                retsig = 90 + ((currsig - 60) / 4);
+        else if (currsig >= 41 && currsig <= 60)
+                retsig = 78 + ((currsig - 40) / 2);
+        else if (currsig >= 31 && currsig <= 40)
+                retsig = 66 + (currsig - 30);
+        else if (currsig >= 21 && currsig <= 30)
+                retsig = 54 + (currsig - 20);
+        else if (currsig >= 5 && currsig <= 20)
+                retsig = 42 + (((currsig - 5) * 2) / 3);
+        else if (currsig == 4)
+                retsig = 36;
+        else if (currsig == 3)
+                retsig = 27;
+        else if (currsig == 2)
+                retsig = 18;
+        else if (currsig == 1)
+                retsig = 9;
+        else
+                retsig = currsig;
+        return retsig;
+}
+
+static void _rtl92c_query_rxphystatus(struct ieee80211_hw *hw,
+                                      struct rtl_stats *pstats,
+                                      struct rx_desc_92c *pdesc,
+                                      struct rx_fwinfo_92c *p_drvinfo,
+                                      bool packet_match_bssid,
+                                      bool packet_toself,
+                                      bool packet_beacon)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct phy_sts_cck_8192s_t *cck_buf;
+        s8 rx_pwr_all = 0, rx_pwr[4];
+        u8 rf_rx_num = 0, evm, pwdb_all;
+        u8 i, max_spatial_stream;
+        u32 rssi, total_rssi = 0;
+        bool in_powersavemode = false;
+        bool is_cck_rate;
+
+        is_cck_rate = RX_HAL_IS_CCK_RATE(pdesc);
+        pstats->packet_matchbssid = packet_match_bssid;
+        pstats->packet_toself = packet_toself;
+        pstats->is_cck = is_cck_rate;
+        pstats->packet_beacon = packet_beacon;
+        pstats->is_cck = is_cck_rate;
+        pstats->RX_SIGQ[0] = -1;
+        pstats->RX_SIGQ[1] = -1;
+        if (is_cck_rate) {
+                u8 report, cck_highpwr;
+                cck_buf = (struct phy_sts_cck_8192s_t *)p_drvinfo;
+                if (!in_powersavemode)
+                        cck_highpwr = rtlphy->cck_high_power;
+                else
+                        cck_highpwr = false;
+                if (!cck_highpwr) {
+                        u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
+                        report = cck_buf->cck_agc_rpt & 0xc0;
+                        report = report >> 6;
+                        switch (report) {
+                        case 0x3:
+                                rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);
+                                break;
+                        case 0x2:
+                                rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);
+                                break;
+                        case 0x1:
+                                rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);
+                                break;
+                        case 0x0:
+                                rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);
+                                break;
+                        }
+                } else {
+                        u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
+                        report = p_drvinfo->cfosho[0] & 0x60;
+                        report = report >> 5;
+                        switch (report) {
+                        case 0x3:
+                                rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f) << 1);
+                                break;
+                        case 0x2:
+                                rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f) << 1);
+                                break;
+                        case 0x1:
+                                rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f) << 1);
+                                break;
+                        case 0x0:
+                                rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f) << 1);
+                                break;
+                        }
+                }
+                pwdb_all = _rtl92c_query_rxpwrpercentage(rx_pwr_all);
+                pstats->rx_pwdb_all = pwdb_all;
+                pstats->recvsignalpower = rx_pwr_all;
+                if (packet_match_bssid) {
+                        u8 sq;
+                        if (pstats->rx_pwdb_all > 40)
+                                sq = 100;
+                        else {
+                                sq = cck_buf->sq_rpt;
+                                if (sq > 64)
+                                        sq = 0;
+                                else if (sq < 20)
+                                        sq = 100;
+                                else
+                                        sq = ((64 - sq) * 100) / 44;
+                        }
+                        pstats->signalquality = sq;
+                        pstats->RX_SIGQ[0] = sq;
+                        pstats->RX_SIGQ[1] = -1;
+                }
+        } else {
+                rtlpriv->dm.rfpath_rxenable[0] =
+                    rtlpriv->dm.rfpath_rxenable[1] = true;
+                for (i = RF90_PATH_A; i < RF90_PATH_MAX; i++) {
+                        if (rtlpriv->dm.rfpath_rxenable[i])
+                                rf_rx_num++;
+                        rx_pwr[i] =
+                            ((p_drvinfo->gain_trsw[i] & 0x3f) * 2) - 110;
+                        rssi = _rtl92c_query_rxpwrpercentage(rx_pwr[i]);
+                        total_rssi += rssi;
+                        rtlpriv->stats.rx_snr_db[i] =
+                            (long)(p_drvinfo->rxsnr[i] / 2);
+
+                        if (packet_match_bssid)
+                                pstats->rx_mimo_signalstrength[i] = (u8) rssi;
+                }
+                rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
+                pwdb_all = _rtl92c_query_rxpwrpercentage(rx_pwr_all);
+                pstats->rx_pwdb_all = pwdb_all;
+                pstats->rxpower = rx_pwr_all;
+                pstats->recvsignalpower = rx_pwr_all;
+                if (GET_RX_DESC_RX_MCS(pdesc) &&
+                    GET_RX_DESC_RX_MCS(pdesc) >= DESC92C_RATEMCS8 &&
+                    GET_RX_DESC_RX_MCS(pdesc) <= DESC92C_RATEMCS15)
+                        max_spatial_stream = 2;
+                else
+                        max_spatial_stream = 1;
+                for (i = 0; i < max_spatial_stream; i++) {
+                        evm = _rtl92c_evm_db_to_percentage(p_drvinfo->rxevm[i]);
+                        if (packet_match_bssid) {
+                                if (i == 0)
+                                        pstats->signalquality =
+                                            (u8) (evm & 0xff);
+                                pstats->RX_SIGQ[i] =
+                                    (u8) (evm & 0xff);
+                        }
+                }
+        }
+        if (is_cck_rate)
+                pstats->signalstrength =
+                    (u8) (_rtl92c_signal_scale_mapping(hw, pwdb_all));
+        else if (rf_rx_num != 0)
+                pstats->signalstrength =
+                    (u8) (_rtl92c_signal_scale_mapping
+                          (hw, total_rssi /= rf_rx_num));
+}
+
+static void _rtl92c_process_ui_rssi(struct ieee80211_hw *hw,
+                struct rtl_stats *pstats)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        u8 rfpath;
+        u32 last_rssi, tmpval;
+
+        if (pstats->packet_toself || pstats->packet_beacon) {
+                rtlpriv->stats.rssi_calculate_cnt++;
+                if (rtlpriv->stats.ui_rssi.total_num++ >=
+                    PHY_RSSI_SLID_WIN_MAX) {
+                        rtlpriv->stats.ui_rssi.total_num =
+                            PHY_RSSI_SLID_WIN_MAX;
+                        last_rssi =
+                            rtlpriv->stats.ui_rssi.elements[rtlpriv->
+                                                           stats.ui_rssi.index];
+                        rtlpriv->stats.ui_rssi.total_val -= last_rssi;
+                }
+                rtlpriv->stats.ui_rssi.total_val += pstats->signalstrength;
+                rtlpriv->stats.ui_rssi.elements[rtlpriv->stats.ui_rssi.
+                                        index++] = pstats->signalstrength;
+                if (rtlpriv->stats.ui_rssi.index >= PHY_RSSI_SLID_WIN_MAX)
+                        rtlpriv->stats.ui_rssi.index = 0;
+                tmpval = rtlpriv->stats.ui_rssi.total_val /
+                    rtlpriv->stats.ui_rssi.total_num;
+                rtlpriv->stats.signal_strength =
+                    _rtl92c_translate_todbm(hw, (u8) tmpval);
+                pstats->rssi = rtlpriv->stats.signal_strength;
+        }
+        if (!pstats->is_cck && pstats->packet_toself) {
+                for (rfpath = RF90_PATH_A; rfpath < rtlphy->num_total_rfpath;
+                     rfpath++) {
+                        if (!rtl8192_phy_check_is_legal_rfpath(hw, rfpath))
+                                continue;
+                        if (rtlpriv->stats.rx_rssi_percentage[rfpath] == 0) {
+                                rtlpriv->stats.rx_rssi_percentage[rfpath] =
+                                    pstats->rx_mimo_signalstrength[rfpath];
+                        }
+                        if (pstats->rx_mimo_signalstrength[rfpath] >
+                            rtlpriv->stats.rx_rssi_percentage[rfpath]) {
+                                rtlpriv->stats.rx_rssi_percentage[rfpath] =
+                                    ((rtlpriv->stats.
+                                      rx_rssi_percentage[rfpath] *
+                                      (RX_SMOOTH_FACTOR - 1)) +
+                                     (pstats->rx_mimo_signalstrength[rfpath])) /
+                                    (RX_SMOOTH_FACTOR);
+
+                                rtlpriv->stats.rx_rssi_percentage[rfpath] =
+                                    rtlpriv->stats.rx_rssi_percentage[rfpath] +
+                                    1;
+                        } else {
+                                rtlpriv->stats.rx_rssi_percentage[rfpath] =
+                                    ((rtlpriv->stats.
+                                      rx_rssi_percentage[rfpath] *
+                                      (RX_SMOOTH_FACTOR - 1)) +
+                                     (pstats->rx_mimo_signalstrength[rfpath])) /
+                                    (RX_SMOOTH_FACTOR);
+                        }
+                }
+        }
+}
+
+static void _rtl92c_update_rxsignalstatistics(struct ieee80211_hw *hw,
+                                               struct rtl_stats *pstats)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        int weighting = 0;
+
+        if (rtlpriv->stats.recv_signal_power == 0)
+                rtlpriv->stats.recv_signal_power = pstats->recvsignalpower;
+        if (pstats->recvsignalpower > rtlpriv->stats.recv_signal_power)
+                weighting = 5;
+        else if (pstats->recvsignalpower < rtlpriv->stats.recv_signal_power)
+                weighting = (-5);
+        rtlpriv->stats.recv_signal_power =
+            (rtlpriv->stats.recv_signal_power * 5 +
+             pstats->recvsignalpower + weighting) / 6;
+}
+
+static void _rtl92c_process_pwdb(struct ieee80211_hw *hw,
+                struct rtl_stats *pstats)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        long undecorated_smoothed_pwdb = 0;
+
+        if (mac->opmode == NL80211_IFTYPE_ADHOC) {
+                return;
+        } else {
+                undecorated_smoothed_pwdb =
+                    rtlpriv->dm.undecorated_smoothed_pwdb;
+        }
+        if (pstats->packet_toself || pstats->packet_beacon) {
+                if (undecorated_smoothed_pwdb < 0)
+                        undecorated_smoothed_pwdb = pstats->rx_pwdb_all;
+                if (pstats->rx_pwdb_all > (u32) undecorated_smoothed_pwdb) {
+                        undecorated_smoothed_pwdb =
+                            (((undecorated_smoothed_pwdb) *
+                              (RX_SMOOTH_FACTOR - 1)) +
+                             (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR);
+                        undecorated_smoothed_pwdb = undecorated_smoothed_pwdb
+                            + 1;
+                } else {
+                        undecorated_smoothed_pwdb =
+                            (((undecorated_smoothed_pwdb) *
+                              (RX_SMOOTH_FACTOR - 1)) +
+                             (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR);
+                }
+                rtlpriv->dm.undecorated_smoothed_pwdb =
+                    undecorated_smoothed_pwdb;
+                _rtl92c_update_rxsignalstatistics(hw, pstats);
+        }
+}
+
+static void _rtl92c_process_LINK_Q(struct ieee80211_hw *hw,
+                                             struct rtl_stats *pstats)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u32 last_evm = 0, n_stream, tmpval;
+
+        if (pstats->signalquality != 0) {
+                if (pstats->packet_toself || pstats->packet_beacon) {
+                        if (rtlpriv->stats.LINK_Q.total_num++ >=
+                            PHY_LINKQUALITY_SLID_WIN_MAX) {
+                                rtlpriv->stats.LINK_Q.total_num =
+                                    PHY_LINKQUALITY_SLID_WIN_MAX;
+                                last_evm =
+                                    rtlpriv->stats.LINK_Q.elements
+                                    [rtlpriv->stats.LINK_Q.index];
+                                rtlpriv->stats.LINK_Q.total_val -=
+                                    last_evm;
+                        }
+                        rtlpriv->stats.LINK_Q.total_val +=
+                            pstats->signalquality;
+                        rtlpriv->stats.LINK_Q.elements
+                           [rtlpriv->stats.LINK_Q.index++] =
+                            pstats->signalquality;
+                        if (rtlpriv->stats.LINK_Q.index >=
+                            PHY_LINKQUALITY_SLID_WIN_MAX)
+                                rtlpriv->stats.LINK_Q.index = 0;
+                        tmpval = rtlpriv->stats.LINK_Q.total_val /
+                            rtlpriv->stats.LINK_Q.total_num;
+                        rtlpriv->stats.signal_quality = tmpval;
+                        rtlpriv->stats.last_sigstrength_inpercent = tmpval;
+                        for (n_stream = 0; n_stream < 2;
+                             n_stream++) {
+                                if (pstats->RX_SIGQ[n_stream] != -1) {
+                                        if (!rtlpriv->stats.RX_EVM[n_stream]) {
+                                                rtlpriv->stats.RX_EVM[n_stream]
+                                                 = pstats->RX_SIGQ[n_stream];
+                                        }
+                                        rtlpriv->stats.RX_EVM[n_stream] =
+                                            ((rtlpriv->stats.RX_EVM
+                                            [n_stream] *
+                                            (RX_SMOOTH_FACTOR - 1)) +
+                                            (pstats->RX_SIGQ
+                                            [n_stream] * 1)) /
+                                            (RX_SMOOTH_FACTOR);
+                                }
+                        }
+                }
+        } else {
+                ;
+        }
+}
+
+static void _rtl92c_process_phyinfo(struct ieee80211_hw *hw,
+                                     u8 *buffer,
+                                     struct rtl_stats *pcurrent_stats)
+{
+        if (!pcurrent_stats->packet_matchbssid &&
+            !pcurrent_stats->packet_beacon)
+                return;
+        _rtl92c_process_ui_rssi(hw, pcurrent_stats);
+        _rtl92c_process_pwdb(hw, pcurrent_stats);
+        _rtl92c_process_LINK_Q(hw, pcurrent_stats);
+}
+
+void rtl92c_translate_rx_signal_stuff(struct ieee80211_hw *hw,
+                                               struct sk_buff *skb,
+                                               struct rtl_stats *pstats,
+                                               struct rx_desc_92c *pdesc,
+                                               struct rx_fwinfo_92c *p_drvinfo)
+{
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        struct ieee80211_hdr *hdr;
+        u8 *tmp_buf;
+        u8 *praddr;
+        u8 *psaddr;
+        __le16 fc;
+        u16 type, cpu_fc;
+        bool packet_matchbssid, packet_toself, packet_beacon;
+
+        tmp_buf = skb->data + pstats->rx_drvinfo_size + pstats->rx_bufshift;
+        hdr = (struct ieee80211_hdr *)tmp_buf;
+        fc = hdr->frame_control;
+        cpu_fc = le16_to_cpu(fc);
+        type = WLAN_FC_GET_TYPE(fc);
+        praddr = hdr->addr1;
+        psaddr = hdr->addr2;
+        packet_matchbssid =
+            ((IEEE80211_FTYPE_CTL != type) &&
+             (!compare_ether_addr(mac->bssid,
+                          (cpu_fc & IEEE80211_FCTL_TODS) ?
+                          hdr->addr1 : (cpu_fc & IEEE80211_FCTL_FROMDS) ?
+                          hdr->addr2 : hdr->addr3)) &&
+             (!pstats->hwerror) && (!pstats->crc) && (!pstats->icv));
+
+        packet_toself = packet_matchbssid &&
+            (!compare_ether_addr(praddr, rtlefuse->dev_addr));
+        if (ieee80211_is_beacon(fc))
+                packet_beacon = true;
+        _rtl92c_query_rxphystatus(hw, pstats, pdesc, p_drvinfo,
+                                   packet_matchbssid, packet_toself,
+                                   packet_beacon);
+        _rtl92c_process_phyinfo(hw, tmp_buf, pstats);
+}
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/mac.h b/drivers/net/wireless/rtlwifi/rtl8192cu/mac.h
new file mode 100644
index 000000000000..298fdb724aa5
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192cu/mac.h
@@ -0,0 +1,180 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#ifndef __RTL92C_MAC_H__
+#define __RTL92C_MAC_H__
+
+#define LLT_LAST_ENTRY_OF_TX_PKT_BUFFER         255
+#define DRIVER_EARLY_INT_TIME                                   0x05
+#define BCN_DMA_ATIME_INT_TIME                          0x02
+
+void rtl92c_read_chip_version(struct ieee80211_hw *hw);
+bool rtl92c_llt_write(struct ieee80211_hw *hw, u32 address, u32 data);
+bool rtl92c_init_llt_table(struct ieee80211_hw *hw, u32 boundary);
+void rtl92c_set_key(struct ieee80211_hw *hw, u32 key_index,
+                     u8 *p_macaddr, bool is_group, u8 enc_algo,
+                     bool is_wepkey, bool clear_all);
+void rtl92c_enable_interrupt(struct ieee80211_hw *hw);
+void rtl92c_disable_interrupt(struct ieee80211_hw *hw);
+void rtl92c_set_qos(struct ieee80211_hw *hw, int aci);
+
+
+/*---------------------------------------------------------------
+ *      Hardware init functions
+ *---------------------------------------------------------------*/
+void rtl92c_set_mac_addr(struct ieee80211_hw *hw, const u8 *addr);
+void rtl92c_init_interrupt(struct ieee80211_hw *hw);
+void rtl92c_init_driver_info_size(struct ieee80211_hw *hw, u8 size);
+
+int rtl92c_set_network_type(struct ieee80211_hw *hw, enum nl80211_iftype type);
+void rtl92c_init_network_type(struct ieee80211_hw *hw);
+void rtl92c_init_adaptive_ctrl(struct ieee80211_hw *hw);
+void rtl92c_init_rate_fallback(struct ieee80211_hw *hw);
+
+void rtl92c_init_edca_param(struct ieee80211_hw *hw,
+                                                        u16 queue,
+                                                        u16 txop,
+                                                        u8 ecwmax,
+                                                        u8 ecwmin,
+                                                        u8 aifs);
+
+void rtl92c_init_edca(struct ieee80211_hw *hw);
+void rtl92c_init_ampdu_aggregation(struct ieee80211_hw *hw);
+void rtl92c_init_beacon_max_error(struct ieee80211_hw *hw, bool infra_mode);
+void rtl92c_init_rdg_setting(struct ieee80211_hw *hw);
+void rtl92c_init_retry_function(struct ieee80211_hw *hw);
+
+void rtl92c_init_beacon_parameters(struct ieee80211_hw *hw,
+                                   enum version_8192c version);
+
+void rtl92c_disable_fast_edca(struct ieee80211_hw *hw);
+void rtl92c_set_min_space(struct ieee80211_hw *hw, bool is2T);
+
+/* For filter */
+u16 rtl92c_get_mgt_filter(struct ieee80211_hw *hw);
+void rtl92c_set_mgt_filter(struct ieee80211_hw *hw, u16 filter);
+u16 rtl92c_get_ctrl_filter(struct ieee80211_hw *hw);
+void rtl92c_set_ctrl_filter(struct ieee80211_hw *hw, u16 filter);
+u16 rtl92c_get_data_filter(struct ieee80211_hw *hw);
+void rtl92c_set_data_filter(struct ieee80211_hw *hw, u16 filter);
+
+
+u32 rtl92c_get_txdma_status(struct ieee80211_hw *hw);
+
+#define RX_HAL_IS_CCK_RATE(_pdesc)\
+        (GET_RX_DESC_RX_MCS(_pdesc) == DESC92C_RATE1M ||\
+         GET_RX_DESC_RX_MCS(_pdesc) == DESC92C_RATE2M ||\
+         GET_RX_DESC_RX_MCS(_pdesc) == DESC92C_RATE5_5M ||\
+         GET_RX_DESC_RX_MCS(_pdesc) == DESC92C_RATE11M)
+
+struct rx_fwinfo_92c {
+        u8 gain_trsw[4];
+        u8 pwdb_all;
+        u8 cfosho[4];
+        u8 cfotail[4];
+        char rxevm[2];
+        char rxsnr[4];
+        u8 pdsnr[2];
+        u8 csi_current[2];
+        u8 csi_target[2];
+        u8 sigevm;
+        u8 max_ex_pwr;
+        u8 ex_intf_flag:1;
+        u8 sgi_en:1;
+        u8 rxsc:2;
+        u8 reserve:4;
+} __packed;
+
+struct rx_desc_92c {
+        u32 length:14;
+        u32 crc32:1;
+        u32 icverror:1;
+        u32 drv_infosize:4;
+        u32 security:3;
+        u32 qos:1;
+        u32 shift:2;
+        u32 phystatus:1;
+        u32 swdec:1;
+        u32 lastseg:1;
+        u32 firstseg:1;
+        u32 eor:1;
+        u32 own:1;
+        u32 macid:5;    /* word 1 */
+        u32 tid:4;
+        u32 hwrsvd:5;
+        u32 paggr:1;
+        u32 faggr:1;
+        u32 a1_fit:4;
+        u32 a2_fit:4;
+        u32 pam:1;
+        u32 pwr:1;
+        u32 moredata:1;
+        u32 morefrag:1;
+        u32 type:2;
+        u32 mc:1;
+        u32 bc:1;
+        u32 seq:12;     /* word 2 */
+        u32 frag:4;
+        u32 nextpktlen:14;
+        u32 nextind:1;
+        u32 rsvd:1;
+        u32 rxmcs:6;    /* word 3 */
+        u32 rxht:1;
+        u32 amsdu:1;
+        u32 splcp:1;
+        u32 bandwidth:1;
+        u32 htc:1;
+        u32 tcpchk_rpt:1;
+        u32 ipcchk_rpt:1;
+        u32 tcpchk_valid:1;
+        u32 hwpcerr:1;
+        u32 hwpcind:1;
+        u32 iv0:16;
+        u32 iv1;        /* word 4 */
+        u32 tsfl;       /* word 5 */
+        u32 bufferaddress;      /* word 6 */
+        u32 bufferaddress64;    /* word 7 */
+} __packed;
+
+enum rtl_desc_qsel rtl92c_map_hwqueue_to_fwqueue(u16 fc,
+                                                          unsigned int
+                                                          skb_queue);
+void rtl92c_translate_rx_signal_stuff(struct ieee80211_hw *hw,
+                                      struct sk_buff *skb,
+                                      struct rtl_stats *pstats,
+                                      struct rx_desc_92c *pdesc,
+                                      struct rx_fwinfo_92c *p_drvinfo);
+
+/*---------------------------------------------------------------
+ *      Card disable functions
+ *---------------------------------------------------------------*/
+
+
+
+#endif
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/phy.c b/drivers/net/wireless/rtlwifi/rtl8192cu/phy.c
new file mode 100644
index 000000000000..dc65ef2bbeac
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192cu/phy.c
@@ -0,0 +1,611 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#include "../wifi.h"
+#include "../pci.h"
+#include "../ps.h"
+#include "reg.h"
+#include "def.h"
+#include "phy.h"
+#include "rf.h"
+#include "dm.h"
+#include "table.h"
+
+#include "../rtl8192c/phy_common.c"
+
+u32 rtl92c_phy_query_rf_reg(struct ieee80211_hw *hw,
+                            enum radio_path rfpath, u32 regaddr, u32 bitmask)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u32 original_value, readback_value, bitshift;
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+
+        RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, ("regaddr(%#x), "
+                                               "rfpath(%#x), bitmask(%#x)\n",
+                                               regaddr, rfpath, bitmask));
+        if (rtlphy->rf_mode != RF_OP_BY_FW) {
+                original_value = _rtl92c_phy_rf_serial_read(hw,
+                                                            rfpath, regaddr);
+        } else {
+                original_value = _rtl92c_phy_fw_rf_serial_read(hw,
+                                                               rfpath, regaddr);
+        }
+        bitshift = _rtl92c_phy_calculate_bit_shift(bitmask);
+        readback_value = (original_value & bitmask) >> bitshift;
+        RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
+                 ("regaddr(%#x), rfpath(%#x), "
+                  "bitmask(%#x), original_value(%#x)\n",
+                  regaddr, rfpath, bitmask, original_value));
+        return readback_value;
+}
+
+void rtl92c_phy_set_rf_reg(struct ieee80211_hw *hw,
+                           enum radio_path rfpath,
+                           u32 regaddr, u32 bitmask, u32 data)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        u32 original_value, bitshift;
+
+        RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
+                 ("regaddr(%#x), bitmask(%#x), data(%#x), rfpath(%#x)\n",
+                  regaddr, bitmask, data, rfpath));
+        if (rtlphy->rf_mode != RF_OP_BY_FW) {
+                if (bitmask != RFREG_OFFSET_MASK) {
+                        original_value = _rtl92c_phy_rf_serial_read(hw,
+                                                                    rfpath,
+                                                                    regaddr);
+                        bitshift = _rtl92c_phy_calculate_bit_shift(bitmask);
+                        data =
+                            ((original_value & (~bitmask)) |
+                             (data << bitshift));
+                }
+                _rtl92c_phy_rf_serial_write(hw, rfpath, regaddr, data);
+        } else {
+                if (bitmask != RFREG_OFFSET_MASK) {
+                        original_value = _rtl92c_phy_fw_rf_serial_read(hw,
+                                                                       rfpath,
+                                                                       regaddr);
+                        bitshift = _rtl92c_phy_calculate_bit_shift(bitmask);
+                        data =
+                            ((original_value & (~bitmask)) |
+                             (data << bitshift));
+                }
+                _rtl92c_phy_fw_rf_serial_write(hw, rfpath, regaddr, data);
+        }
+        RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, ("regaddr(%#x), "
+                                               "bitmask(%#x), data(%#x), rfpath(%#x)\n",
+                                               regaddr, bitmask, data, rfpath));
+}
+
+bool rtl92c_phy_mac_config(struct ieee80211_hw *hw)
+{
+        bool rtstatus;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        bool is92c = IS_92C_SERIAL(rtlhal->version);
+
+        rtstatus = _rtl92c_phy_config_mac_with_headerfile(hw);
+        if (is92c && IS_HARDWARE_TYPE_8192CE(rtlhal))
+                rtl_write_byte(rtlpriv, 0x14, 0x71);
+        return rtstatus;
+}
+
+bool rtl92c_phy_bb_config(struct ieee80211_hw *hw)
+{
+        bool rtstatus = true;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        u16 regval;
+        u8 b_reg_hwparafile = 1;
+
+        _rtl92c_phy_init_bb_rf_register_definition(hw);
+        regval = rtl_read_word(rtlpriv, REG_SYS_FUNC_EN);
+        rtl_write_word(rtlpriv, REG_SYS_FUNC_EN, regval | BIT(13) |
+                       BIT(0) | BIT(1));
+        rtl_write_byte(rtlpriv, REG_AFE_PLL_CTRL, 0x83);
+        rtl_write_byte(rtlpriv, REG_AFE_PLL_CTRL + 1, 0xdb);
+        rtl_write_byte(rtlpriv, REG_RF_CTRL, RF_EN | RF_RSTB | RF_SDMRSTB);
+        if (IS_HARDWARE_TYPE_8192CE(rtlhal)) {
+                rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, FEN_PPLL | FEN_PCIEA |
+                               FEN_DIO_PCIE |   FEN_BB_GLB_RSTn | FEN_BBRSTB);
+        } else if (IS_HARDWARE_TYPE_8192CU(rtlhal)) {
+                rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, FEN_USBA | FEN_USBD |
+                               FEN_BB_GLB_RSTn | FEN_BBRSTB);
+                rtl_write_byte(rtlpriv, REG_LDOHCI12_CTRL, 0x0f);
+        }
+        rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL + 1, 0x80);
+        if (b_reg_hwparafile == 1)
+                rtstatus = _rtl92c_phy_bb8192c_config_parafile(hw);
+        return rtstatus;
+}
+
+static bool _rtl92c_phy_config_mac_with_headerfile(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        u32 i;
+        u32 arraylength;
+        u32 *ptrarray;
+
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, ("Read Rtl819XMACPHY_Array\n"));
+        arraylength =  rtlphy->hwparam_tables[MAC_REG].length ;
+        ptrarray = rtlphy->hwparam_tables[MAC_REG].pdata;
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                 ("Img:RTL8192CEMAC_2T_ARRAY\n"));
+        for (i = 0; i < arraylength; i = i + 2)
+                rtl_write_byte(rtlpriv, ptrarray[i], (u8) ptrarray[i + 1]);
+        return true;
+}
+
+static bool _rtl92c_phy_config_bb_with_headerfile(struct ieee80211_hw *hw,
+                                                  u8 configtype)
+{
+        int i;
+        u32 *phy_regarray_table;
+        u32 *agctab_array_table;
+        u16 phy_reg_arraylen, agctab_arraylen;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+
+        if (IS_92C_SERIAL(rtlhal->version)) {
+                agctab_arraylen = rtlphy->hwparam_tables[AGCTAB_2T].length;
+                agctab_array_table =  rtlphy->hwparam_tables[AGCTAB_2T].pdata;
+                phy_reg_arraylen = rtlphy->hwparam_tables[PHY_REG_2T].length;
+                phy_regarray_table = rtlphy->hwparam_tables[PHY_REG_2T].pdata;
+        } else {
+                agctab_arraylen = rtlphy->hwparam_tables[AGCTAB_1T].length;
+                agctab_array_table =  rtlphy->hwparam_tables[AGCTAB_1T].pdata;
+                phy_reg_arraylen = rtlphy->hwparam_tables[PHY_REG_1T].length;
+                phy_regarray_table = rtlphy->hwparam_tables[PHY_REG_1T].pdata;
+        }
+        if (configtype == BASEBAND_CONFIG_PHY_REG) {
+                for (i = 0; i < phy_reg_arraylen; i = i + 2) {
+                        if (phy_regarray_table[i] == 0xfe)
+                                mdelay(50);
+                        else if (phy_regarray_table[i] == 0xfd)
+                                mdelay(5);
+                        else if (phy_regarray_table[i] == 0xfc)
+                                mdelay(1);
+                        else if (phy_regarray_table[i] == 0xfb)
+                                udelay(50);
+                        else if (phy_regarray_table[i] == 0xfa)
+                                udelay(5);
+                        else if (phy_regarray_table[i] == 0xf9)
+                                udelay(1);
+                        rtl_set_bbreg(hw, phy_regarray_table[i], MASKDWORD,
+                                      phy_regarray_table[i + 1]);
+                        udelay(1);
+                        RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                                 ("The phy_regarray_table[0] is %x"
+                                  " Rtl819XPHY_REGArray[1] is %x\n",
+                                  phy_regarray_table[i],
+                                  phy_regarray_table[i + 1]));
+                }
+                rtl92c_phy_config_bb_external_pa(hw);
+        } else if (configtype == BASEBAND_CONFIG_AGC_TAB) {
+                for (i = 0; i < agctab_arraylen; i = i + 2) {
+                        rtl_set_bbreg(hw, agctab_array_table[i], MASKDWORD,
+                                      agctab_array_table[i + 1]);
+                        udelay(1);
+                        RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                                 ("The agctab_array_table[0] is "
+                                  "%x Rtl819XPHY_REGArray[1] is %x\n",
+                                  agctab_array_table[i],
+                                  agctab_array_table[i + 1]));
+                }
+        }
+        return true;
+}
+
+static bool _rtl92c_phy_config_bb_with_pgheaderfile(struct ieee80211_hw *hw,
+                                                    u8 configtype)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        int i;
+        u32 *phy_regarray_table_pg;
+        u16 phy_regarray_pg_len;
+
+        rtlphy->pwrgroup_cnt = 0;
+        phy_regarray_pg_len = rtlphy->hwparam_tables[PHY_REG_PG].length;
+        phy_regarray_table_pg = rtlphy->hwparam_tables[PHY_REG_PG].pdata;
+        if (configtype == BASEBAND_CONFIG_PHY_REG) {
+                for (i = 0; i < phy_regarray_pg_len; i = i + 3) {
+                        if (phy_regarray_table_pg[i] == 0xfe)
+                                mdelay(50);
+                        else if (phy_regarray_table_pg[i] == 0xfd)
+                                mdelay(5);
+                        else if (phy_regarray_table_pg[i] == 0xfc)
+                                mdelay(1);
+                        else if (phy_regarray_table_pg[i] == 0xfb)
+                                udelay(50);
+                        else if (phy_regarray_table_pg[i] == 0xfa)
+                                udelay(5);
+                        else if (phy_regarray_table_pg[i] == 0xf9)
+                                udelay(1);
+                        _rtl92c_store_pwrIndex_diffrate_offset(hw,
+                                                  phy_regarray_table_pg[i],
+                                                  phy_regarray_table_pg[i + 1],
+                                                  phy_regarray_table_pg[i + 2]);
+                }
+        } else {
+                RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
+                         ("configtype != BaseBand_Config_PHY_REG\n"));
+        }
+        return true;
+}
+
+bool rtl92c_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,
+                                          enum radio_path rfpath)
+{
+        int i;
+        u32 *radioa_array_table;
+        u32 *radiob_array_table;
+        u16 radioa_arraylen, radiob_arraylen;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+
+        if (IS_92C_SERIAL(rtlhal->version)) {
+                radioa_arraylen = rtlphy->hwparam_tables[RADIOA_2T].length;
+                radioa_array_table = rtlphy->hwparam_tables[RADIOA_2T].pdata;
+                radiob_arraylen = rtlphy->hwparam_tables[RADIOB_2T].length;
+                radiob_array_table = rtlphy->hwparam_tables[RADIOB_2T].pdata;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("Radio_A:RTL8192CERADIOA_2TARRAY\n"));
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("Radio_B:RTL8192CE_RADIOB_2TARRAY\n"));
+        } else {
+                radioa_arraylen = rtlphy->hwparam_tables[RADIOA_1T].length;
+                radioa_array_table = rtlphy->hwparam_tables[RADIOA_1T].pdata;
+                radiob_arraylen = rtlphy->hwparam_tables[RADIOB_1T].length;
+                radiob_array_table = rtlphy->hwparam_tables[RADIOB_1T].pdata;
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("Radio_A:RTL8192CE_RADIOA_1TARRAY\n"));
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                         ("Radio_B:RTL8192CE_RADIOB_1TARRAY\n"));
+        }
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, ("Radio No %x\n", rfpath));
+        switch (rfpath) {
+        case RF90_PATH_A:
+                for (i = 0; i < radioa_arraylen; i = i + 2) {
+                        if (radioa_array_table[i] == 0xfe)
+                                mdelay(50);
+                        else if (radioa_array_table[i] == 0xfd)
+                                mdelay(5);
+                        else if (radioa_array_table[i] == 0xfc)
+                                mdelay(1);
+                        else if (radioa_array_table[i] == 0xfb)
+                                udelay(50);
+                        else if (radioa_array_table[i] == 0xfa)
+                                udelay(5);
+                        else if (radioa_array_table[i] == 0xf9)
+                                udelay(1);
+                        else {
+                                rtl_set_rfreg(hw, rfpath, radioa_array_table[i],
+                                              RFREG_OFFSET_MASK,
+                                              radioa_array_table[i + 1]);
+                                udelay(1);
+                        }
+                }
+                _rtl92c_phy_config_rf_external_pa(hw, rfpath);
+                break;
+        case RF90_PATH_B:
+                for (i = 0; i < radiob_arraylen; i = i + 2) {
+                        if (radiob_array_table[i] == 0xfe) {
+                                mdelay(50);
+                        } else if (radiob_array_table[i] == 0xfd)
+                                mdelay(5);
+                        else if (radiob_array_table[i] == 0xfc)
+                                mdelay(1);
+                        else if (radiob_array_table[i] == 0xfb)
+                                udelay(50);
+                        else if (radiob_array_table[i] == 0xfa)
+                                udelay(5);
+                        else if (radiob_array_table[i] == 0xf9)
+                                udelay(1);
+                        else {
+                                rtl_set_rfreg(hw, rfpath, radiob_array_table[i],
+                                              RFREG_OFFSET_MASK,
+                                              radiob_array_table[i + 1]);
+                                udelay(1);
+                        }
+                }
+                break;
+        case RF90_PATH_C:
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("switch case not process\n"));
+                break;
+        case RF90_PATH_D:
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("switch case not process\n"));
+                break;
+        }
+        return true;
+}
+
+void rtl92c_phy_set_bw_mode_callback(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        u8 reg_bw_opmode;
+        u8 reg_prsr_rsc;
+
+        RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE,
+                 ("Switch to %s bandwidth\n",
+                  rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20 ?
+                  "20MHz" : "40MHz"))
+        if (is_hal_stop(rtlhal)) {
+                rtlphy->set_bwmode_inprogress = false;
+                return;
+        }
+        reg_bw_opmode = rtl_read_byte(rtlpriv, REG_BWOPMODE);
+        reg_prsr_rsc = rtl_read_byte(rtlpriv, REG_RRSR + 2);
+        switch (rtlphy->current_chan_bw) {
+        case HT_CHANNEL_WIDTH_20:
+                reg_bw_opmode |= BW_OPMODE_20MHZ;
+                rtl_write_byte(rtlpriv, REG_BWOPMODE, reg_bw_opmode);
+                break;
+        case HT_CHANNEL_WIDTH_20_40:
+                reg_bw_opmode &= ~BW_OPMODE_20MHZ;
+                rtl_write_byte(rtlpriv, REG_BWOPMODE, reg_bw_opmode);
+                reg_prsr_rsc =
+                    (reg_prsr_rsc & 0x90) | (mac->cur_40_prime_sc << 5);
+                rtl_write_byte(rtlpriv, REG_RRSR + 2, reg_prsr_rsc);
+                break;
+        default:
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("unknown bandwidth: %#X\n", rtlphy->current_chan_bw));
+                break;
+        }
+        switch (rtlphy->current_chan_bw) {
+        case HT_CHANNEL_WIDTH_20:
+                rtl_set_bbreg(hw, RFPGA0_RFMOD, BRFMOD, 0x0);
+                rtl_set_bbreg(hw, RFPGA1_RFMOD, BRFMOD, 0x0);
+                rtl_set_bbreg(hw, RFPGA0_ANALOGPARAMETER2, BIT(10), 1);
+                break;
+        case HT_CHANNEL_WIDTH_20_40:
+                rtl_set_bbreg(hw, RFPGA0_RFMOD, BRFMOD, 0x1);
+                rtl_set_bbreg(hw, RFPGA1_RFMOD, BRFMOD, 0x1);
+                rtl_set_bbreg(hw, RCCK0_SYSTEM, BCCK_SIDEBAND,
+                              (mac->cur_40_prime_sc >> 1));
+                rtl_set_bbreg(hw, ROFDM1_LSTF, 0xC00, mac->cur_40_prime_sc);
+                rtl_set_bbreg(hw, RFPGA0_ANALOGPARAMETER2, BIT(10), 0);
+                rtl_set_bbreg(hw, 0x818, (BIT(26) | BIT(27)),
+                              (mac->cur_40_prime_sc ==
+                               HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1);
+                break;
+        default:
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("unknown bandwidth: %#X\n", rtlphy->current_chan_bw));
+                break;
+        }
+        rtl92c_phy_rf6052_set_bandwidth(hw, rtlphy->current_chan_bw);
+        rtlphy->set_bwmode_inprogress = false;
+        RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE, ("<==\n"));
+}
+
+void rtl92c_bb_block_on(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        mutex_lock(&rtlpriv->io.bb_mutex);
+        rtl_set_bbreg(hw, RFPGA0_RFMOD, BCCKEN, 0x1);
+        rtl_set_bbreg(hw, RFPGA0_RFMOD, BOFDMEN, 0x1);
+        mutex_unlock(&rtlpriv->io.bb_mutex);
+}
+
+static void _rtl92c_phy_lc_calibrate(struct ieee80211_hw *hw, bool is2t)
+{
+        u8 tmpreg;
+        u32 rf_a_mode = 0, rf_b_mode = 0, lc_cal;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        tmpreg = rtl_read_byte(rtlpriv, 0xd03);
+
+        if ((tmpreg & 0x70) != 0)
+                rtl_write_byte(rtlpriv, 0xd03, tmpreg & 0x8F);
+        else
+                rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF);
+
+        if ((tmpreg & 0x70) != 0) {
+                rf_a_mode = rtl_get_rfreg(hw, RF90_PATH_A, 0x00, MASK12BITS);
+                if (is2t)
+                        rf_b_mode = rtl_get_rfreg(hw, RF90_PATH_B, 0x00,
+                                                  MASK12BITS);
+                rtl_set_rfreg(hw, RF90_PATH_A, 0x00, MASK12BITS,
+                              (rf_a_mode & 0x8FFFF) | 0x10000);
+                if (is2t)
+                        rtl_set_rfreg(hw, RF90_PATH_B, 0x00, MASK12BITS,
+                                      (rf_b_mode & 0x8FFFF) | 0x10000);
+        }
+        lc_cal = rtl_get_rfreg(hw, RF90_PATH_A, 0x18, MASK12BITS);
+        rtl_set_rfreg(hw, RF90_PATH_A, 0x18, MASK12BITS, lc_cal | 0x08000);
+        mdelay(100);
+        if ((tmpreg & 0x70) != 0) {
+                rtl_write_byte(rtlpriv, 0xd03, tmpreg);
+                rtl_set_rfreg(hw, RF90_PATH_A, 0x00, MASK12BITS, rf_a_mode);
+                if (is2t)
+                        rtl_set_rfreg(hw, RF90_PATH_B, 0x00, MASK12BITS,
+                                      rf_b_mode);
+        } else {
+                rtl_write_byte(rtlpriv, REG_TXPAUSE, 0x00);
+        }
+}
+
+static bool _rtl92ce_phy_set_rf_power_state(struct ieee80211_hw *hw,
+                                            enum rf_pwrstate rfpwr_state)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+        bool bresult = true;
+        u8 i, queue_id;
+        struct rtl8192_tx_ring *ring = NULL;
+
+        ppsc->set_rfpowerstate_inprogress = true;
+        switch (rfpwr_state) {
+        case ERFON:
+                if ((ppsc->rfpwr_state == ERFOFF) &&
+                    RT_IN_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC)) {
+                        bool rtstatus;
+                        u32 InitializeCount = 0;
+
+                        do {
+                                InitializeCount++;
+                                RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
+                                         ("IPS Set eRf nic enable\n"));
+                                rtstatus = rtl_ps_enable_nic(hw);
+                        } while ((rtstatus != true)
+                                 && (InitializeCount < 10));
+                        RT_CLEAR_PS_LEVEL(ppsc,
+                                          RT_RF_OFF_LEVL_HALT_NIC);
+                } else {
+                        RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
+                                 ("Set ERFON sleeped:%d ms\n",
+                                  jiffies_to_msecs(jiffies -
+                                                   ppsc->
+                                                   last_sleep_jiffies)));
+                        ppsc->last_awake_jiffies = jiffies;
+                        rtl92ce_phy_set_rf_on(hw);
+                }
+                if (mac->link_state == MAC80211_LINKED) {
+                        rtlpriv->cfg->ops->led_control(hw,
+                                                       LED_CTL_LINK);
+                } else {
+                        rtlpriv->cfg->ops->led_control(hw,
+                                                       LED_CTL_NO_LINK);
+                }
+                break;
+        case ERFOFF:
+                for (queue_id = 0, i = 0;
+                     queue_id < RTL_PCI_MAX_TX_QUEUE_COUNT;) {
+                        ring = &pcipriv->dev.tx_ring[queue_id];
+                        if (skb_queue_len(&ring->queue) == 0 ||
+                                queue_id == BEACON_QUEUE) {
+                                queue_id++;
+                                continue;
+                        } else {
+                                RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
+                                         ("eRf Off/Sleep: %d times "
+                                          "TcbBusyQueue[%d] "
+                                          "=%d before doze!\n", (i + 1),
+                                          queue_id,
+                                          skb_queue_len(&ring->queue)));
+                                udelay(10);
+                                i++;
+                        }
+                        if (i >= MAX_DOZE_WAITING_TIMES_9x) {
+                                RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
+                                         ("\nERFOFF: %d times "
+                                          "TcbBusyQueue[%d] = %d !\n",
+                                          MAX_DOZE_WAITING_TIMES_9x,
+                                          queue_id,
+                                          skb_queue_len(&ring->queue)));
+                                break;
+                        }
+                }
+                if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_HALT_NIC) {
+                        RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
+                                 ("IPS Set eRf nic disable\n"));
+                        rtl_ps_disable_nic(hw);
+                        RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
+                } else {
+                        if (ppsc->rfoff_reason == RF_CHANGE_BY_IPS) {
+                                rtlpriv->cfg->ops->led_control(hw,
+                                                         LED_CTL_NO_LINK);
+                        } else {
+                                rtlpriv->cfg->ops->led_control(hw,
+                                                         LED_CTL_POWER_OFF);
+                        }
+                }
+                break;
+        case ERFSLEEP:
+                if (ppsc->rfpwr_state == ERFOFF)
+                        break;
+                for (queue_id = 0, i = 0;
+                     queue_id < RTL_PCI_MAX_TX_QUEUE_COUNT;) {
+                        ring = &pcipriv->dev.tx_ring[queue_id];
+                        if (skb_queue_len(&ring->queue) == 0) {
+                                queue_id++;
+                                continue;
+                        } else {
+                                RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
+                                         ("eRf Off/Sleep: %d times "
+                                          "TcbBusyQueue[%d] =%d before "
+                                          "doze!\n", (i + 1), queue_id,
+                                          skb_queue_len(&ring->queue)));
+                                udelay(10);
+                                i++;
+                        }
+                        if (i >= MAX_DOZE_WAITING_TIMES_9x) {
+                                RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
+                                         ("\n ERFSLEEP: %d times "
+                                          "TcbBusyQueue[%d] = %d !\n",
+                                          MAX_DOZE_WAITING_TIMES_9x,
+                                          queue_id,
+                                          skb_queue_len(&ring->queue)));
+                                break;
+                        }
+                }
+                RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
+                         ("Set ERFSLEEP awaked:%d ms\n",
+                          jiffies_to_msecs(jiffies -
+                                           ppsc->last_awake_jiffies)));
+                ppsc->last_sleep_jiffies = jiffies;
+                _rtl92ce_phy_set_rf_sleep(hw);
+                break;
+        default:
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("switch case not process\n"));
+                bresult = false;
+                break;
+        }
+        if (bresult)
+                ppsc->rfpwr_state = rfpwr_state;
+        ppsc->set_rfpowerstate_inprogress = false;
+        return bresult;
+}
+
+bool rtl92c_phy_set_rf_power_state(struct ieee80211_hw *hw,
+                                   enum rf_pwrstate rfpwr_state)
+{
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+        bool bresult = false;
+
+        if (rfpwr_state == ppsc->rfpwr_state)
+                return bresult;
+        bresult = _rtl92ce_phy_set_rf_power_state(hw, rfpwr_state);
+        return bresult;
+}
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/phy.h b/drivers/net/wireless/rtlwifi/rtl8192cu/phy.h
new file mode 100644
index 000000000000..c456c15afbf1
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192cu/phy.h
@@ -0,0 +1,34 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#include "../rtl8192ce/phy.h"
+
+void rtl92c_bb_block_on(struct ieee80211_hw *hw);
+bool rtl8192_phy_check_is_legal_rfpath(struct ieee80211_hw *hw, u32 rfpath);
+void rtl92c_phy_set_io(struct ieee80211_hw *hw);
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/reg.h b/drivers/net/wireless/rtlwifi/rtl8192cu/reg.h
new file mode 100644
index 000000000000..7f1be614c998
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192cu/reg.h
@@ -0,0 +1,30 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#include "../rtl8192ce/reg.h"
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/rf.c b/drivers/net/wireless/rtlwifi/rtl8192cu/rf.c
new file mode 100644
index 000000000000..9149adcc8fa5
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192cu/rf.c
@@ -0,0 +1,493 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#include "../wifi.h"
+#include "reg.h"
+#include "def.h"
+#include "phy.h"
+#include "rf.h"
+#include "dm.h"
+
+static bool _rtl92c_phy_rf6052_config_parafile(struct ieee80211_hw *hw);
+
+void rtl92c_phy_rf6052_set_bandwidth(struct ieee80211_hw *hw, u8 bandwidth)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+
+        switch (bandwidth) {
+        case HT_CHANNEL_WIDTH_20:
+                rtlphy->rfreg_chnlval[0] = ((rtlphy->rfreg_chnlval[0] &
+                                             0xfffff3ff) | 0x0400);
+                rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK,
+                              rtlphy->rfreg_chnlval[0]);
+                break;
+        case HT_CHANNEL_WIDTH_20_40:
+                rtlphy->rfreg_chnlval[0] = ((rtlphy->rfreg_chnlval[0] &
+                                             0xfffff3ff));
+                rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK,
+                              rtlphy->rfreg_chnlval[0]);
+                break;
+        default:
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("unknown bandwidth: %#X\n", bandwidth));
+                break;
+        }
+}
+
+void rtl92c_phy_rf6052_set_cck_txpower(struct ieee80211_hw *hw,
+                                       u8 *ppowerlevel)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        u32 tx_agc[2] = { 0, 0 }, tmpval = 0;
+        bool turbo_scanoff = false;
+        u8 idx1, idx2;
+        u8 *ptr;
+
+        if (rtlhal->interface == INTF_PCI) {
+                if (rtlefuse->eeprom_regulatory != 0)
+                        turbo_scanoff = true;
+        } else {
+                if ((rtlefuse->eeprom_regulatory != 0) ||
+                    (rtlefuse->external_pa))
+                        turbo_scanoff = true;
+        }
+        if (mac->act_scanning == true) {
+                tx_agc[RF90_PATH_A] = 0x3f3f3f3f;
+                tx_agc[RF90_PATH_B] = 0x3f3f3f3f;
+                if (turbo_scanoff) {
+                        for (idx1 = RF90_PATH_A; idx1 <= RF90_PATH_B; idx1++) {
+                                tx_agc[idx1] = ppowerlevel[idx1] |
+                                    (ppowerlevel[idx1] << 8) |
+                                    (ppowerlevel[idx1] << 16) |
+                                    (ppowerlevel[idx1] << 24);
+                                if (rtlhal->interface == INTF_USB) {
+                                        if (tx_agc[idx1] > 0x20 &&
+                                            rtlefuse->external_pa)
+                                                tx_agc[idx1] = 0x20;
+                                }
+                        }
+                }
+        } else {
+                if (rtlpriv->dm.dynamic_txhighpower_lvl ==
+                    TXHIGHPWRLEVEL_LEVEL1) {
+                        tx_agc[RF90_PATH_A] = 0x10101010;
+                        tx_agc[RF90_PATH_B] = 0x10101010;
+                } else if (rtlpriv->dm.dynamic_txhighpower_lvl ==
+                           TXHIGHPWRLEVEL_LEVEL1) {
+                        tx_agc[RF90_PATH_A] = 0x00000000;
+                        tx_agc[RF90_PATH_B] = 0x00000000;
+                } else{
+                        for (idx1 = RF90_PATH_A; idx1 <= RF90_PATH_B; idx1++) {
+                                tx_agc[idx1] = ppowerlevel[idx1] |
+                                    (ppowerlevel[idx1] << 8) |
+                                    (ppowerlevel[idx1] << 16) |
+                                    (ppowerlevel[idx1] << 24);
+                        }
+                        if (rtlefuse->eeprom_regulatory == 0) {
+                                tmpval = (rtlphy->mcs_txpwrlevel_origoffset
+                                        [0][6]) +
+                                        (rtlphy->mcs_txpwrlevel_origoffset
+                                        [0][7] <<  8);
+                                tx_agc[RF90_PATH_A] += tmpval;
+                                tmpval = (rtlphy->mcs_txpwrlevel_origoffset
+                                        [0][14]) +
+                                        (rtlphy->mcs_txpwrlevel_origoffset
+                                        [0][15] << 24);
+                                tx_agc[RF90_PATH_B] += tmpval;
+                        }
+                }
+        }
+        for (idx1 = RF90_PATH_A; idx1 <= RF90_PATH_B; idx1++) {
+                ptr = (u8 *) (&(tx_agc[idx1]));
+                for (idx2 = 0; idx2 < 4; idx2++) {
+                        if (*ptr > RF6052_MAX_TX_PWR)
+                                *ptr = RF6052_MAX_TX_PWR;
+                        ptr++;
+                }
+        }
+        tmpval = tx_agc[RF90_PATH_A] & 0xff;
+        rtl_set_bbreg(hw, RTXAGC_A_CCK1_MCS32, MASKBYTE1, tmpval);
+
+        RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
+                ("CCK PWR 1M (rf-A) = 0x%x (reg 0x%x)\n", tmpval,
+                 RTXAGC_A_CCK1_MCS32));
+
+        tmpval = tx_agc[RF90_PATH_A] >> 8;
+        if (mac->mode == WIRELESS_MODE_B)
+                tmpval = tmpval & 0xff00ffff;
+        rtl_set_bbreg(hw, RTXAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval);
+        RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
+                ("CCK PWR 2~11M (rf-A) = 0x%x (reg 0x%x)\n", tmpval,
+                 RTXAGC_B_CCK11_A_CCK2_11));
+        tmpval = tx_agc[RF90_PATH_B] >> 24;
+        rtl_set_bbreg(hw, RTXAGC_B_CCK11_A_CCK2_11, MASKBYTE0, tmpval);
+        RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
+                ("CCK PWR 11M (rf-B) = 0x%x (reg 0x%x)\n", tmpval,
+                 RTXAGC_B_CCK11_A_CCK2_11));
+        tmpval = tx_agc[RF90_PATH_B] & 0x00ffffff;
+        rtl_set_bbreg(hw, RTXAGC_B_CCK1_55_MCS32, 0xffffff00, tmpval);
+        RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
+                ("CCK PWR 1~5.5M (rf-B) = 0x%x (reg 0x%x)\n", tmpval,
+                 RTXAGC_B_CCK1_55_MCS32));
+}
+
+static void rtl92c_phy_get_power_base(struct ieee80211_hw *hw,
+                                      u8 *ppowerlevel, u8 channel,
+                                      u32 *ofdmbase, u32 *mcsbase)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        u32 powerBase0, powerBase1;
+        u8 legacy_pwrdiff = 0, ht20_pwrdiff = 0;
+        u8 i, powerlevel[2];
+
+        for (i = 0; i < 2; i++) {
+                powerlevel[i] = ppowerlevel[i];
+                legacy_pwrdiff = rtlefuse->txpwr_legacyhtdiff[i][channel - 1];
+                powerBase0 = powerlevel[i] + legacy_pwrdiff;
+                powerBase0 = (powerBase0 << 24) | (powerBase0 << 16) |
+                    (powerBase0 << 8) | powerBase0;
+                *(ofdmbase + i) = powerBase0;
+                RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
+                        (" [OFDM power base index rf(%c) = 0x%x]\n",
+                         ((i == 0) ? 'A' : 'B'), *(ofdmbase + i)));
+        }
+        for (i = 0; i < 2; i++) {
+                if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20) {
+                        ht20_pwrdiff = rtlefuse->txpwr_ht20diff[i][channel - 1];
+                        powerlevel[i] += ht20_pwrdiff;
+                }
+                powerBase1 = powerlevel[i];
+                powerBase1 = (powerBase1 << 24) |
+                    (powerBase1 << 16) | (powerBase1 << 8) | powerBase1;
+                *(mcsbase + i) = powerBase1;
+                RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
+                        (" [MCS power base index rf(%c) = 0x%x]\n",
+                         ((i == 0) ? 'A' : 'B'), *(mcsbase + i)));
+        }
+}
+
+static void _rtl92c_get_txpower_writeval_by_regulatory(struct ieee80211_hw *hw,
+                                                       u8 channel, u8 index,
+                                                       u32 *powerBase0,
+                                                       u32 *powerBase1,
+                                                       u32 *p_outwriteval)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
+        u8 i, chnlgroup = 0, pwr_diff_limit[4];
+        u32 writeVal, customer_limit, rf;
+
+        for (rf = 0; rf < 2; rf++) {
+                switch (rtlefuse->eeprom_regulatory) {
+                case 0:
+                        chnlgroup = 0;
+                        writeVal = rtlphy->mcs_txpwrlevel_origoffset
+                            [chnlgroup][index + (rf ? 8 : 0)]
+                            + ((index < 2) ? powerBase0[rf] : powerBase1[rf]);
+                        RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
+                                ("RTK better performance,writeVal(%c) = 0x%x\n",
+                                ((rf == 0) ? 'A' : 'B'), writeVal));
+                        break;
+                case 1:
+                        if (rtlphy->pwrgroup_cnt == 1)
+                                chnlgroup = 0;
+                        if (rtlphy->pwrgroup_cnt >= 3) {
+                                if (channel <= 3)
+                                        chnlgroup = 0;
+                                else if (channel >= 4 && channel <= 9)
+                                        chnlgroup = 1;
+                                else if (channel > 9)
+                                        chnlgroup = 2;
+                                if (rtlphy->current_chan_bw ==
+                                    HT_CHANNEL_WIDTH_20)
+                                        chnlgroup++;
+                                else
+                                        chnlgroup += 4;
+                        }
+                        writeVal = rtlphy->mcs_txpwrlevel_origoffset
+                                        [chnlgroup][index +
+                                        (rf ? 8 : 0)] +
+                                        ((index < 2) ? powerBase0[rf] :
+                                        powerBase1[rf]);
+                        RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
+                                ("Realtek regulatory, 20MHz, "
+                                "writeVal(%c) = 0x%x\n",
+                                ((rf == 0) ? 'A' : 'B'), writeVal));
+                        break;
+                case 2:
+                        writeVal = ((index < 2) ? powerBase0[rf] :
+                                   powerBase1[rf]);
+                        RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
+                                ("Better regulatory,writeVal(%c) = 0x%x\n",
+                                 ((rf == 0) ? 'A' : 'B'), writeVal));
+                        break;
+                case 3:
+                        chnlgroup = 0;
+                        if (rtlphy->current_chan_bw ==
+                            HT_CHANNEL_WIDTH_20_40) {
+                                RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
+                                        ("customer's limit, 40MHzrf(%c) = "
+                                        "0x%x\n", ((rf == 0) ? 'A' : 'B'),
+                                        rtlefuse->pwrgroup_ht40[rf]
+                                        [channel - 1]));
+                        } else {
+                                RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
+                                        ("customer's limit, 20MHz rf(%c) = "
+                                        "0x%x\n", ((rf == 0) ? 'A' : 'B'),
+                                        rtlefuse->pwrgroup_ht20[rf]
+                                        [channel - 1]));
+                        }
+                        for (i = 0; i < 4; i++) {
+                                pwr_diff_limit[i] =
+                                    (u8) ((rtlphy->mcs_txpwrlevel_origoffset
+                                    [chnlgroup][index + (rf ? 8 : 0)]
+                                    & (0x7f << (i * 8))) >> (i * 8));
+                                if (rtlphy->current_chan_bw ==
+                                    HT_CHANNEL_WIDTH_20_40) {
+                                        if (pwr_diff_limit[i] >
+                                            rtlefuse->pwrgroup_ht40[rf]
+                                                [channel - 1])
+                                                pwr_diff_limit[i] = rtlefuse->
+                                                    pwrgroup_ht40[rf]
+                                                    [channel - 1];
+                                } else {
+                                        if (pwr_diff_limit[i] >
+                                            rtlefuse->pwrgroup_ht20[rf]
+                                                [channel - 1])
+                                                pwr_diff_limit[i] =
+                                                    rtlefuse->pwrgroup_ht20[rf]
+                                                    [channel - 1];
+                                }
+                        }
+                        customer_limit = (pwr_diff_limit[3] << 24) |
+                            (pwr_diff_limit[2] << 16) |
+                            (pwr_diff_limit[1] << 8) | (pwr_diff_limit[0]);
+                        RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
+                                ("Customer's limit rf(%c) = 0x%x\n",
+                                 ((rf == 0) ? 'A' : 'B'), customer_limit));
+                        writeVal = customer_limit + ((index < 2) ?
+                                   powerBase0[rf] : powerBase1[rf]);
+                        RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
+                                ("Customer, writeVal rf(%c)= 0x%x\n",
+                                 ((rf == 0) ? 'A' : 'B'), writeVal));
+                        break;
+                default:
+                        chnlgroup = 0;
+                        writeVal = rtlphy->mcs_txpwrlevel_origoffset[chnlgroup]
+                                   [index + (rf ? 8 : 0)] + ((index < 2) ?
+                                   powerBase0[rf] : powerBase1[rf]);
+                        RTPRINT(rtlpriv, FPHY, PHY_TXPWR, ("RTK better "
+                                "performance, writeValrf(%c) = 0x%x\n",
+                                ((rf == 0) ? 'A' : 'B'), writeVal));
+                        break;
+                }
+                if (rtlpriv->dm.dynamic_txhighpower_lvl ==
+                    TXHIGHPWRLEVEL_LEVEL1)
+                        writeVal = 0x14141414;
+                else if (rtlpriv->dm.dynamic_txhighpower_lvl ==
+                         TXHIGHPWRLEVEL_LEVEL2)
+                        writeVal = 0x00000000;
+                if (rtlpriv->dm.dynamic_txhighpower_lvl == TXHIGHPWRLEVEL_BT1)
+                        writeVal = writeVal - 0x06060606;
+                else if (rtlpriv->dm.dynamic_txhighpower_lvl ==
+                         TXHIGHPWRLEVEL_BT2)
+                        writeVal = writeVal;
+                *(p_outwriteval + rf) = writeVal;
+        }
+}
+
+static void _rtl92c_write_ofdm_power_reg(struct ieee80211_hw *hw,
+                                         u8 index, u32 *pValue)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        u16 regoffset_a[6] = {
+                RTXAGC_A_RATE18_06, RTXAGC_A_RATE54_24,
+                RTXAGC_A_MCS03_MCS00, RTXAGC_A_MCS07_MCS04,
+                RTXAGC_A_MCS11_MCS08, RTXAGC_A_MCS15_MCS12
+        };
+        u16 regoffset_b[6] = {
+                RTXAGC_B_RATE18_06, RTXAGC_B_RATE54_24,
+                RTXAGC_B_MCS03_MCS00, RTXAGC_B_MCS07_MCS04,
+                RTXAGC_B_MCS11_MCS08, RTXAGC_B_MCS15_MCS12
+        };
+        u8 i, rf, pwr_val[4];
+        u32 writeVal;
+        u16 regoffset;
+
+        for (rf = 0; rf < 2; rf++) {
+                writeVal = pValue[rf];
+                for (i = 0; i < 4; i++) {
+                        pwr_val[i] = (u8)((writeVal & (0x7f << (i * 8))) >>
+                                          (i * 8));
+                        if (pwr_val[i] > RF6052_MAX_TX_PWR)
+                                pwr_val[i] = RF6052_MAX_TX_PWR;
+                }
+                writeVal = (pwr_val[3] << 24) | (pwr_val[2] << 16) |
+                    (pwr_val[1] << 8) | pwr_val[0];
+                if (rf == 0)
+                        regoffset = regoffset_a[index];
+                else
+                        regoffset = regoffset_b[index];
+                rtl_set_bbreg(hw, regoffset, MASKDWORD, writeVal);
+                RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
+                        ("Set 0x%x = %08x\n", regoffset, writeVal));
+                if (((get_rf_type(rtlphy) == RF_2T2R) &&
+                     (regoffset == RTXAGC_A_MCS15_MCS12 ||
+                      regoffset == RTXAGC_B_MCS15_MCS12)) ||
+                    ((get_rf_type(rtlphy) != RF_2T2R) &&
+                     (regoffset == RTXAGC_A_MCS07_MCS04 ||
+                      regoffset == RTXAGC_B_MCS07_MCS04))) {
+                        writeVal = pwr_val[3];
+                        if (regoffset == RTXAGC_A_MCS15_MCS12 ||
+                            regoffset == RTXAGC_A_MCS07_MCS04)
+                                regoffset = 0xc90;
+                        if (regoffset == RTXAGC_B_MCS15_MCS12 ||
+                            regoffset == RTXAGC_B_MCS07_MCS04)
+                                regoffset = 0xc98;
+                        for (i = 0; i < 3; i++) {
+                                writeVal = (writeVal > 6) ? (writeVal - 6) : 0;
+                                rtl_write_byte(rtlpriv, (u32)(regoffset + i),
+                                              (u8)writeVal);
+                        }
+                }
+        }
+}
+
+void rtl92c_phy_rf6052_set_ofdm_txpower(struct ieee80211_hw *hw,
+                                        u8 *ppowerlevel, u8 channel)
+{
+        u32 writeVal[2], powerBase0[2], powerBase1[2];
+        u8 index = 0;
+
+        rtl92c_phy_get_power_base(hw, ppowerlevel,
+                                  channel, &powerBase0[0], &powerBase1[0]);
+        for (index = 0; index < 6; index++) {
+                _rtl92c_get_txpower_writeval_by_regulatory(hw,
+                                                           channel, index,
+                                                           &powerBase0[0],
+                                                           &powerBase1[0],
+                                                           &writeVal[0]);
+                _rtl92c_write_ofdm_power_reg(hw, index, &writeVal[0]);
+        }
+}
+
+bool rtl92c_phy_rf6052_config(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        bool rtstatus = true;
+        u8 b_reg_hwparafile = 1;
+
+        if (rtlphy->rf_type == RF_1T1R)
+                rtlphy->num_total_rfpath = 1;
+        else
+                rtlphy->num_total_rfpath = 2;
+        if (b_reg_hwparafile == 1)
+                rtstatus = _rtl92c_phy_rf6052_config_parafile(hw);
+        return rtstatus;
+}
+
+static bool _rtl92c_phy_rf6052_config_parafile(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_phy *rtlphy = &(rtlpriv->phy);
+        u32 u4_regvalue = 0;
+        u8 rfpath;
+        bool rtstatus = true;
+        struct bb_reg_def *pphyreg;
+
+        for (rfpath = 0; rfpath < rtlphy->num_total_rfpath; rfpath++) {
+                pphyreg = &rtlphy->phyreg_def[rfpath];
+                switch (rfpath) {
+                case RF90_PATH_A:
+                case RF90_PATH_C:
+                        u4_regvalue = rtl_get_bbreg(hw, pphyreg->rfintfs,
+                                                    BRFSI_RFENV);
+                        break;
+                case RF90_PATH_B:
+                case RF90_PATH_D:
+                        u4_regvalue = rtl_get_bbreg(hw, pphyreg->rfintfs,
+                                                    BRFSI_RFENV << 16);
+                        break;
+                }
+                rtl_set_bbreg(hw, pphyreg->rfintfe, BRFSI_RFENV << 16, 0x1);
+                udelay(1);
+                rtl_set_bbreg(hw, pphyreg->rfintfo, BRFSI_RFENV, 0x1);
+                udelay(1);
+                rtl_set_bbreg(hw, pphyreg->rfhssi_para2,
+                              B3WIREADDREAALENGTH, 0x0);
+                udelay(1);
+                rtl_set_bbreg(hw, pphyreg->rfhssi_para2, B3WIREDATALENGTH, 0x0);
+                udelay(1);
+                switch (rfpath) {
+                case RF90_PATH_A:
+                        rtstatus = rtl92c_phy_config_rf_with_headerfile(hw,
+                                        (enum radio_path) rfpath);
+                        break;
+                case RF90_PATH_B:
+                        rtstatus = rtl92c_phy_config_rf_with_headerfile(hw,
+                                        (enum radio_path) rfpath);
+                        break;
+                case RF90_PATH_C:
+                        break;
+                case RF90_PATH_D:
+                        break;
+                }
+                switch (rfpath) {
+                case RF90_PATH_A:
+                case RF90_PATH_C:
+                        rtl_set_bbreg(hw, pphyreg->rfintfs,
+                                      BRFSI_RFENV, u4_regvalue);
+                        break;
+                case RF90_PATH_B:
+                case RF90_PATH_D:
+                        rtl_set_bbreg(hw, pphyreg->rfintfs,
+                                      BRFSI_RFENV << 16, u4_regvalue);
+                        break;
+                }
+                if (rtstatus != true) {
+                        RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+                                 ("Radio[%d] Fail!!", rfpath));
+                        goto phy_rf_cfg_fail;
+                }
+        }
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, ("<---\n"));
+        return rtstatus;
+phy_rf_cfg_fail:
+        return rtstatus;
+}
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/rf.h b/drivers/net/wireless/rtlwifi/rtl8192cu/rf.h
new file mode 100644
index 000000000000..c4ed125ef4dc
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192cu/rf.h
@@ -0,0 +1,30 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#include "../rtl8192ce/rf.h"
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/sw.c b/drivers/net/wireless/rtlwifi/rtl8192cu/sw.c
new file mode 100644
index 000000000000..4e937e0da8e2
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192cu/sw.c
@@ -0,0 +1,327 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#include "../wifi.h"
+#include "../core.h"
+#include "../usb.h"
+#include "../efuse.h"
+#include "reg.h"
+#include "def.h"
+#include "phy.h"
+#include "mac.h"
+#include "dm.h"
+#include "sw.h"
+#include "trx.h"
+#include "led.h"
+#include "hw.h"
+
+
+MODULE_AUTHOR("Georgia          <georgia@realtek.com>");
+MODULE_AUTHOR("Ziv Huang        <ziv_huang@realtek.com>");
+MODULE_AUTHOR("Larry Finger     <Larry.Finger@lwfinger.net>");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("Realtek 8192C/8188C 802.11n USB wireless");
+MODULE_FIRMWARE("rtlwifi/rtl8192cufw.bin");
+
+static int rtl92cu_init_sw_vars(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        rtlpriv->dm.dm_initialgain_enable = 1;
+        rtlpriv->dm.dm_flag = 0;
+        rtlpriv->dm.disable_framebursting = 0;
+        rtlpriv->dm.thermalvalue = 0;
+        rtlpriv->rtlhal.pfirmware = vmalloc(0x4000);
+        if (!rtlpriv->rtlhal.pfirmware) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("Can't alloc buffer for fw.\n"));
+                return 1;
+        }
+        return 0;
+}
+
+static void rtl92cu_deinit_sw_vars(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        if (rtlpriv->rtlhal.pfirmware) {
+                vfree(rtlpriv->rtlhal.pfirmware);
+                rtlpriv->rtlhal.pfirmware = NULL;
+        }
+}
+
+static struct rtl_hal_ops rtl8192cu_hal_ops = {
+        .init_sw_vars = rtl92cu_init_sw_vars,
+        .deinit_sw_vars = rtl92cu_deinit_sw_vars,
+        .read_chip_version = rtl92c_read_chip_version,
+        .read_eeprom_info = rtl92cu_read_eeprom_info,
+        .enable_interrupt = rtl92c_enable_interrupt,
+        .disable_interrupt = rtl92c_disable_interrupt,
+        .hw_init = rtl92cu_hw_init,
+        .hw_disable = rtl92cu_card_disable,
+        .set_network_type = rtl92cu_set_network_type,
+        .set_chk_bssid = rtl92cu_set_check_bssid,
+        .set_qos = rtl92c_set_qos,
+        .set_bcn_reg = rtl92cu_set_beacon_related_registers,
+        .set_bcn_intv = rtl92cu_set_beacon_interval,
+        .update_interrupt_mask = rtl92cu_update_interrupt_mask,
+        .get_hw_reg = rtl92cu_get_hw_reg,
+        .set_hw_reg = rtl92cu_set_hw_reg,
+        .update_rate_table = rtl92cu_update_hal_rate_table,
+        .update_rate_mask = rtl92cu_update_hal_rate_mask,
+        .fill_tx_desc = rtl92cu_tx_fill_desc,
+        .fill_fake_txdesc = rtl92cu_fill_fake_txdesc,
+        .fill_tx_cmddesc = rtl92cu_tx_fill_cmddesc,
+        .cmd_send_packet = rtl92cu_cmd_send_packet,
+        .query_rx_desc = rtl92cu_rx_query_desc,
+        .set_channel_access = rtl92cu_update_channel_access_setting,
+        .radio_onoff_checking = rtl92cu_gpio_radio_on_off_checking,
+        .set_bw_mode = rtl92c_phy_set_bw_mode,
+        .switch_channel = rtl92c_phy_sw_chnl,
+        .dm_watchdog = rtl92c_dm_watchdog,
+        .scan_operation_backup = rtl92c_phy_scan_operation_backup,
+        .set_rf_power_state = rtl92c_phy_set_rf_power_state,
+        .led_control = rtl92cu_led_control,
+        .enable_hw_sec = rtl92cu_enable_hw_security_config,
+        .set_key = rtl92c_set_key,
+        .init_sw_leds = rtl92cu_init_sw_leds,
+        .deinit_sw_leds = rtl92cu_deinit_sw_leds,
+        .get_bbreg = rtl92c_phy_query_bb_reg,
+        .set_bbreg = rtl92c_phy_set_bb_reg,
+        .get_rfreg = rtl92c_phy_query_rf_reg,
+        .set_rfreg = rtl92c_phy_set_rf_reg,
+};
+
+static struct rtl_mod_params rtl92cu_mod_params = {
+        .sw_crypto = 0,
+};
+
+static struct rtl_hal_usbint_cfg rtl92cu_interface_cfg = {
+        /* rx */
+        .in_ep_num = RTL92C_USB_BULK_IN_NUM,
+        .rx_urb_num = RTL92C_NUM_RX_URBS,
+        .rx_max_size = RTL92C_SIZE_MAX_RX_BUFFER,
+        .usb_rx_hdl = rtl8192cu_rx_hdl,
+        .usb_rx_segregate_hdl = NULL, /* rtl8192c_rx_segregate_hdl; */
+        /* tx */
+        .usb_tx_cleanup = rtl8192c_tx_cleanup,
+        .usb_tx_post_hdl = rtl8192c_tx_post_hdl,
+        .usb_tx_aggregate_hdl = rtl8192c_tx_aggregate_hdl,
+        /* endpoint mapping */
+        .usb_endpoint_mapping = rtl8192cu_endpoint_mapping,
+        .usb_mq_to_hwq = rtl8192cu_mq_to_hwq,
+};
+
+static struct rtl_hal_cfg rtl92cu_hal_cfg = {
+        .name = "rtl92c_usb",
+        .fw_name = "rtlwifi/rtl8192cufw.bin",
+        .ops = &rtl8192cu_hal_ops,
+        .mod_params = &rtl92cu_mod_params,
+        .usb_interface_cfg = &rtl92cu_interface_cfg,
+
+        .maps[SYS_ISO_CTRL] = REG_SYS_ISO_CTRL,
+        .maps[SYS_FUNC_EN] = REG_SYS_FUNC_EN,
+        .maps[SYS_CLK] = REG_SYS_CLKR,
+        .maps[MAC_RCR_AM] = AM,
+        .maps[MAC_RCR_AB] = AB,
+        .maps[MAC_RCR_ACRC32] = ACRC32,
+        .maps[MAC_RCR_ACF] = ACF,
+        .maps[MAC_RCR_AAP] = AAP,
+
+        .maps[EFUSE_TEST] = REG_EFUSE_TEST,
+        .maps[EFUSE_CTRL] = REG_EFUSE_CTRL,
+        .maps[EFUSE_CLK] = 0,
+        .maps[EFUSE_CLK_CTRL] = REG_EFUSE_CTRL,
+        .maps[EFUSE_PWC_EV12V] = PWC_EV12V,
+        .maps[EFUSE_FEN_ELDR] = FEN_ELDR,
+        .maps[EFUSE_LOADER_CLK_EN] = LOADER_CLK_EN,
+        .maps[EFUSE_ANA8M] = EFUSE_ANA8M,
+        .maps[EFUSE_HWSET_MAX_SIZE] = HWSET_MAX_SIZE,
+        .maps[EFUSE_MAX_SECTION_MAP] = EFUSE_MAX_SECTION,
+        .maps[EFUSE_REAL_CONTENT_SIZE] = EFUSE_REAL_CONTENT_LEN,
+
+        .maps[RWCAM] = REG_CAMCMD,
+        .maps[WCAMI] = REG_CAMWRITE,
+        .maps[RCAMO] = REG_CAMREAD,
+        .maps[CAMDBG] = REG_CAMDBG,
+        .maps[SECR] = REG_SECCFG,
+        .maps[SEC_CAM_NONE] = CAM_NONE,
+        .maps[SEC_CAM_WEP40] = CAM_WEP40,
+        .maps[SEC_CAM_TKIP] = CAM_TKIP,
+        .maps[SEC_CAM_AES] = CAM_AES,
+        .maps[SEC_CAM_WEP104] = CAM_WEP104,
+
+        .maps[RTL_IMR_BCNDMAINT6] = IMR_BCNDMAINT6,
+        .maps[RTL_IMR_BCNDMAINT5] = IMR_BCNDMAINT5,
+        .maps[RTL_IMR_BCNDMAINT4] = IMR_BCNDMAINT4,
+        .maps[RTL_IMR_BCNDMAINT3] = IMR_BCNDMAINT3,
+        .maps[RTL_IMR_BCNDMAINT2] = IMR_BCNDMAINT2,
+        .maps[RTL_IMR_BCNDMAINT1] = IMR_BCNDMAINT1,
+        .maps[RTL_IMR_BCNDOK8] = IMR_BCNDOK8,
+        .maps[RTL_IMR_BCNDOK7] = IMR_BCNDOK7,
+        .maps[RTL_IMR_BCNDOK6] = IMR_BCNDOK6,
+        .maps[RTL_IMR_BCNDOK5] = IMR_BCNDOK5,
+        .maps[RTL_IMR_BCNDOK4] = IMR_BCNDOK4,
+        .maps[RTL_IMR_BCNDOK3] = IMR_BCNDOK3,
+        .maps[RTL_IMR_BCNDOK2] = IMR_BCNDOK2,
+        .maps[RTL_IMR_BCNDOK1] = IMR_BCNDOK1,
+        .maps[RTL_IMR_TIMEOUT2] = IMR_TIMEOUT2,
+        .maps[RTL_IMR_TIMEOUT1] = IMR_TIMEOUT1,
+
+        .maps[RTL_IMR_TXFOVW] = IMR_TXFOVW,
+        .maps[RTL_IMR_PSTIMEOUT] = IMR_PSTIMEOUT,
+        .maps[RTL_IMR_BcnInt] = IMR_BCNINT,
+        .maps[RTL_IMR_RXFOVW] = IMR_RXFOVW,
+        .maps[RTL_IMR_RDU] = IMR_RDU,
+        .maps[RTL_IMR_ATIMEND] = IMR_ATIMEND,
+        .maps[RTL_IMR_BDOK] = IMR_BDOK,
+        .maps[RTL_IMR_MGNTDOK] = IMR_MGNTDOK,
+        .maps[RTL_IMR_TBDER] = IMR_TBDER,
+        .maps[RTL_IMR_HIGHDOK] = IMR_HIGHDOK,
+        .maps[RTL_IMR_TBDOK] = IMR_TBDOK,
+        .maps[RTL_IMR_BKDOK] = IMR_BKDOK,
+        .maps[RTL_IMR_BEDOK] = IMR_BEDOK,
+        .maps[RTL_IMR_VIDOK] = IMR_VIDOK,
+        .maps[RTL_IMR_VODOK] = IMR_VODOK,
+        .maps[RTL_IMR_ROK] = IMR_ROK,
+        .maps[RTL_IBSS_INT_MASKS] = (IMR_BCNINT | IMR_TBDOK | IMR_TBDER),
+
+        .maps[RTL_RC_CCK_RATE1M] = DESC92C_RATE1M,
+        .maps[RTL_RC_CCK_RATE2M] = DESC92C_RATE2M,
+        .maps[RTL_RC_CCK_RATE5_5M] = DESC92C_RATE5_5M,
+        .maps[RTL_RC_CCK_RATE11M] = DESC92C_RATE11M,
+        .maps[RTL_RC_OFDM_RATE6M] = DESC92C_RATE6M,
+        .maps[RTL_RC_OFDM_RATE9M] = DESC92C_RATE9M,
+        .maps[RTL_RC_OFDM_RATE12M] = DESC92C_RATE12M,
+        .maps[RTL_RC_OFDM_RATE18M] = DESC92C_RATE18M,
+        .maps[RTL_RC_OFDM_RATE24M] = DESC92C_RATE24M,
+        .maps[RTL_RC_OFDM_RATE36M] = DESC92C_RATE36M,
+        .maps[RTL_RC_OFDM_RATE48M] = DESC92C_RATE48M,
+        .maps[RTL_RC_OFDM_RATE54M] = DESC92C_RATE54M,
+        .maps[RTL_RC_HT_RATEMCS7] = DESC92C_RATEMCS7,
+        .maps[RTL_RC_HT_RATEMCS15] = DESC92C_RATEMCS15,
+};
+
+#define USB_VENDER_ID_REALTEK           0x0bda
+
+/* 2010-10-19 DID_USB_V3.4 */
+static struct usb_device_id rtl8192c_usb_ids[] = {
+
+        /*=== Realtek demoboard ===*/
+        /* Default ID */
+        {RTL_USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8191, rtl92cu_hal_cfg)},
+
+        /****** 8188CU ********/
+        /* 8188CE-VAU USB minCard */
+        {RTL_USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8170, rtl92cu_hal_cfg)},
+        /* 8188cu 1*1 dongle */
+        {RTL_USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8176, rtl92cu_hal_cfg)},
+        /* 8188cu 1*1 dongle, (b/g mode only) */
+        {RTL_USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8177, rtl92cu_hal_cfg)},
+        /* 8188cu Slim Solo */
+        {RTL_USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817a, rtl92cu_hal_cfg)},
+        /* 8188cu Slim Combo */
+        {RTL_USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817b, rtl92cu_hal_cfg)},
+        /* 8188RU High-power USB Dongle */
+        {RTL_USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817d, rtl92cu_hal_cfg)},
+        /* 8188CE-VAU USB minCard (b/g mode only) */
+        {RTL_USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817e, rtl92cu_hal_cfg)},
+        /* 8188 Combo for BC4 */
+        {RTL_USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8754, rtl92cu_hal_cfg)},
+
+        /****** 8192CU ********/
+        /* 8191cu 1*2 */
+        {RTL_USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8177, rtl92cu_hal_cfg)},
+        /* 8192cu 2*2 */
+        {RTL_USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817b, rtl92cu_hal_cfg)},
+        /* 8192CE-VAU USB minCard */
+        {RTL_USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817c, rtl92cu_hal_cfg)},
+
+        /*=== Customer ID ===*/
+        /****** 8188CU ********/
+        {RTL_USB_DEVICE(0x050d, 0x1102, rtl92cu_hal_cfg)}, /*Belkin - Edimax*/
+        {RTL_USB_DEVICE(0x06f8, 0xe033, rtl92cu_hal_cfg)}, /*Hercules - Edimax*/
+        {RTL_USB_DEVICE(0x07b8, 0x8188, rtl92cu_hal_cfg)}, /*Abocom - Abocom*/
+        {RTL_USB_DEVICE(0x07b8, 0x8189, rtl92cu_hal_cfg)}, /*Funai - Abocom*/
+        {RTL_USB_DEVICE(0x0Df6, 0x0052, rtl92cu_hal_cfg)}, /*Sitecom - Edimax*/
+        {RTL_USB_DEVICE(0x0eb0, 0x9071, rtl92cu_hal_cfg)}, /*NO Brand - Etop*/
+        /* HP - Lite-On ,8188CUS Slim Combo */
+        {RTL_USB_DEVICE(0x103c, 0x1629, rtl92cu_hal_cfg)},
+        {RTL_USB_DEVICE(0x2001, 0x3308, rtl92cu_hal_cfg)}, /*D-Link - Alpha*/
+        {RTL_USB_DEVICE(0x2019, 0xab2a, rtl92cu_hal_cfg)}, /*Planex - Abocom*/
+        {RTL_USB_DEVICE(0x2019, 0xed17, rtl92cu_hal_cfg)}, /*PCI - Edimax*/
+        {RTL_USB_DEVICE(0x20f4, 0x648b, rtl92cu_hal_cfg)}, /*TRENDnet - Cameo*/
+        {RTL_USB_DEVICE(0x7392, 0x7811, rtl92cu_hal_cfg)}, /*Edimax - Edimax*/
+        {RTL_USB_DEVICE(0x3358, 0x13d3, rtl92cu_hal_cfg)}, /*Azwave 8188CE-VAU*/
+        /* Russian customer -Azwave (8188CE-VAU  b/g mode only) */
+        {RTL_USB_DEVICE(0x3359, 0x13d3, rtl92cu_hal_cfg)},
+
+        /****** 8192CU ********/
+        {RTL_USB_DEVICE(0x0586, 0x341f, rtl92cu_hal_cfg)}, /*Zyxel -Abocom*/
+        {RTL_USB_DEVICE(0x07aa, 0x0056, rtl92cu_hal_cfg)}, /*ATKK-Gemtek*/
+        {RTL_USB_DEVICE(0x07b8, 0x8178, rtl92cu_hal_cfg)}, /*Funai -Abocom*/
+        {RTL_USB_DEVICE(0x07b8, 0x8178, rtl92cu_hal_cfg)}, /*Abocom -Abocom*/
+        {RTL_USB_DEVICE(0x2001, 0x3307, rtl92cu_hal_cfg)}, /*D-Link-Cameo*/
+        {RTL_USB_DEVICE(0x2001, 0x3309, rtl92cu_hal_cfg)}, /*D-Link-Alpha*/
+        {RTL_USB_DEVICE(0x2001, 0x330a, rtl92cu_hal_cfg)}, /*D-Link-Alpha*/
+        {RTL_USB_DEVICE(0x2019, 0xab2b, rtl92cu_hal_cfg)}, /*Planex -Abocom*/
+        {RTL_USB_DEVICE(0x7392, 0x7822, rtl92cu_hal_cfg)}, /*Edimax -Edimax*/
+        {}
+};
+
+MODULE_DEVICE_TABLE(usb, rtl8192c_usb_ids);
+
+static struct usb_driver rtl8192cu_driver = {
+        .name = "rtl8192cu",
+        .probe = rtl_usb_probe,
+        .disconnect = rtl_usb_disconnect,
+        .id_table = rtl8192c_usb_ids,
+
+#ifdef CONFIG_PM
+        /* .suspend = rtl_usb_suspend, */
+        /* .resume = rtl_usb_resume, */
+        /* .reset_resume = rtl8192c_resume, */
+#endif /* CONFIG_PM */
+#ifdef CONFIG_AUTOSUSPEND
+        .supports_autosuspend = 1,
+#endif
+};
+
+static int __init rtl8192cu_init(void)
+{
+        return usb_register(&rtl8192cu_driver);
+}
+
+static void __exit rtl8192cu_exit(void)
+{
+        usb_deregister(&rtl8192cu_driver);
+}
+
+module_init(rtl8192cu_init);
+module_exit(rtl8192cu_exit);
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/sw.h b/drivers/net/wireless/rtlwifi/rtl8192cu/sw.h
new file mode 100644
index 000000000000..3b2c66339554
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192cu/sw.h
@@ -0,0 +1,35 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#ifndef __RTL92CU_SW_H__
+#define __RTL92CU_SW_H__
+
+#define EFUSE_MAX_SECTION       16
+
+#endif
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/table.c b/drivers/net/wireless/rtlwifi/rtl8192cu/table.c
new file mode 100644
index 000000000000..d57ef5e88a9e
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192cu/table.c
@@ -0,0 +1,1888 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#include "table.h"
+
+u32 RTL8192CUPHY_REG_2TARRAY[RTL8192CUPHY_REG_2TARRAY_LENGTH] = {
+        0x024, 0x0011800f,
+        0x028, 0x00ffdb83,
+        0x800, 0x80040002,
+        0x804, 0x00000003,
+        0x808, 0x0000fc00,
+        0x80c, 0x0000000a,
+        0x810, 0x10005388,
+        0x814, 0x020c3d10,
+        0x818, 0x02200385,
+        0x81c, 0x00000000,
+        0x820, 0x01000100,
+        0x824, 0x00390004,
+        0x828, 0x01000100,
+        0x82c, 0x00390004,
+        0x830, 0x27272727,
+        0x834, 0x27272727,
+        0x838, 0x27272727,
+        0x83c, 0x27272727,
+        0x840, 0x00010000,
+        0x844, 0x00010000,
+        0x848, 0x27272727,
+        0x84c, 0x27272727,
+        0x850, 0x00000000,
+        0x854, 0x00000000,
+        0x858, 0x569a569a,
+        0x85c, 0x0c1b25a4,
+        0x860, 0x66e60230,
+        0x864, 0x061f0130,
+        0x868, 0x27272727,
+        0x86c, 0x2b2b2b27,
+        0x870, 0x07000700,
+        0x874, 0x22184000,
+        0x878, 0x08080808,
+        0x87c, 0x00000000,
+        0x880, 0xc0083070,
+        0x884, 0x000004d5,
+        0x888, 0x00000000,
+        0x88c, 0xcc0000c0,
+        0x890, 0x00000800,
+        0x894, 0xfffffffe,
+        0x898, 0x40302010,
+        0x89c, 0x00706050,
+        0x900, 0x00000000,
+        0x904, 0x00000023,
+        0x908, 0x00000000,
+        0x90c, 0x81121313,
+        0xa00, 0x00d047c8,
+        0xa04, 0x80ff000c,
+        0xa08, 0x8c838300,
+        0xa0c, 0x2e68120f,
+        0xa10, 0x9500bb78,
+        0xa14, 0x11144028,
+        0xa18, 0x00881117,
+        0xa1c, 0x89140f00,
+        0xa20, 0x1a1b0000,
+        0xa24, 0x090e1317,
+        0xa28, 0x00000204,
+        0xa2c, 0x00d30000,
+        0xa70, 0x101fbf00,
+        0xa74, 0x00000007,
+        0xc00, 0x48071d40,
+        0xc04, 0x03a05633,
+        0xc08, 0x000000e4,
+        0xc0c, 0x6c6c6c6c,
+        0xc10, 0x08800000,
+        0xc14, 0x40000100,
+        0xc18, 0x08800000,
+        0xc1c, 0x40000100,
+        0xc20, 0x00000000,
+        0xc24, 0x00000000,
+        0xc28, 0x00000000,
+        0xc2c, 0x00000000,
+        0xc30, 0x69e9ac44,
+        0xc34, 0x469652cf,
+        0xc38, 0x49795994,
+        0xc3c, 0x0a97971c,
+        0xc40, 0x1f7c403f,
+        0xc44, 0x000100b7,
+        0xc48, 0xec020107,
+        0xc4c, 0x007f037f,
+        0xc50, 0x6954341e,
+        0xc54, 0x43bc0094,
+        0xc58, 0x6954341e,
+        0xc5c, 0x433c0094,
+        0xc60, 0x00000000,
+        0xc64, 0x5116848b,
+        0xc68, 0x47c00bff,
+        0xc6c, 0x00000036,
+        0xc70, 0x2c7f000d,
+        0xc74, 0x0186115b,
+        0xc78, 0x0000001f,
+        0xc7c, 0x00b99612,
+        0xc80, 0x40000100,
+        0xc84, 0x20f60000,
+        0xc88, 0x40000100,
+        0xc8c, 0x20200000,
+        0xc90, 0x00121820,
+        0xc94, 0x00000000,
+        0xc98, 0x00121820,
+        0xc9c, 0x00007f7f,
+        0xca0, 0x00000000,
+        0xca4, 0x00000080,
+        0xca8, 0x00000000,
+        0xcac, 0x00000000,
+        0xcb0, 0x00000000,
+        0xcb4, 0x00000000,
+        0xcb8, 0x00000000,
+        0xcbc, 0x28000000,
+        0xcc0, 0x00000000,
+        0xcc4, 0x00000000,
+        0xcc8, 0x00000000,
+        0xccc, 0x00000000,
+        0xcd0, 0x00000000,
+        0xcd4, 0x00000000,
+        0xcd8, 0x64b22427,
+        0xcdc, 0x00766932,
+        0xce0, 0x00222222,
+        0xce4, 0x00000000,
+        0xce8, 0x37644302,
+        0xcec, 0x2f97d40c,
+        0xd00, 0x00080740,
+        0xd04, 0x00020403,
+        0xd08, 0x0000907f,
+        0xd0c, 0x20010201,
+        0xd10, 0xa0633333,
+        0xd14, 0x3333bc43,
+        0xd18, 0x7a8f5b6b,
+        0xd2c, 0xcc979975,
+        0xd30, 0x00000000,
+        0xd34, 0x80608000,
+        0xd38, 0x00000000,
+        0xd3c, 0x00027293,
+        0xd40, 0x00000000,
+        0xd44, 0x00000000,
+        0xd48, 0x00000000,
+        0xd4c, 0x00000000,
+        0xd50, 0x6437140a,
+        0xd54, 0x00000000,
+        0xd58, 0x00000000,
+        0xd5c, 0x30032064,
+        0xd60, 0x4653de68,
+        0xd64, 0x04518a3c,
+        0xd68, 0x00002101,
+        0xd6c, 0x2a201c16,
+        0xd70, 0x1812362e,
+        0xd74, 0x322c2220,
+        0xd78, 0x000e3c24,
+        0xe00, 0x2a2a2a2a,
+        0xe04, 0x2a2a2a2a,
+        0xe08, 0x03902a2a,
+        0xe10, 0x2a2a2a2a,
+        0xe14, 0x2a2a2a2a,
+        0xe18, 0x2a2a2a2a,
+        0xe1c, 0x2a2a2a2a,
+        0xe28, 0x00000000,
+        0xe30, 0x1000dc1f,
+        0xe34, 0x10008c1f,
+        0xe38, 0x02140102,
+        0xe3c, 0x681604c2,
+        0xe40, 0x01007c00,
+        0xe44, 0x01004800,
+        0xe48, 0xfb000000,
+        0xe4c, 0x000028d1,
+        0xe50, 0x1000dc1f,
+        0xe54, 0x10008c1f,
+        0xe58, 0x02140102,
+        0xe5c, 0x28160d05,
+        0xe60, 0x00000010,
+        0xe68, 0x001b25a4,
+        0xe6c, 0x63db25a4,
+        0xe70, 0x63db25a4,
+        0xe74, 0x0c1b25a4,
+        0xe78, 0x0c1b25a4,
+        0xe7c, 0x0c1b25a4,
+        0xe80, 0x0c1b25a4,
+        0xe84, 0x63db25a4,
+        0xe88, 0x0c1b25a4,
+        0xe8c, 0x63db25a4,
+        0xed0, 0x63db25a4,
+        0xed4, 0x63db25a4,
+        0xed8, 0x63db25a4,
+        0xedc, 0x001b25a4,
+        0xee0, 0x001b25a4,
+        0xeec, 0x6fdb25a4,
+        0xf14, 0x00000003,
+        0xf4c, 0x00000000,
+        0xf00, 0x00000300,
+};
+
+u32 RTL8192CUPHY_REG_1TARRAY[RTL8192CUPHY_REG_1TARRAY_LENGTH] = {
+        0x024, 0x0011800f,
+        0x028, 0x00ffdb83,
+        0x800, 0x80040000,
+        0x804, 0x00000001,
+        0x808, 0x0000fc00,
+        0x80c, 0x0000000a,
+        0x810, 0x10005388,
+        0x814, 0x020c3d10,
+        0x818, 0x02200385,
+        0x81c, 0x00000000,
+        0x820, 0x01000100,
+        0x824, 0x00390004,
+        0x828, 0x00000000,
+        0x82c, 0x00000000,
+        0x830, 0x00000000,
+        0x834, 0x00000000,
+        0x838, 0x00000000,
+        0x83c, 0x00000000,
+        0x840, 0x00010000,
+        0x844, 0x00000000,
+        0x848, 0x00000000,
+        0x84c, 0x00000000,
+        0x850, 0x00000000,
+        0x854, 0x00000000,
+        0x858, 0x569a569a,
+        0x85c, 0x001b25a4,
+        0x860, 0x66e60230,
+        0x864, 0x061f0130,
+        0x868, 0x00000000,
+        0x86c, 0x32323200,
+        0x870, 0x07000700,
+        0x874, 0x22004000,
+        0x878, 0x00000808,
+        0x87c, 0x00000000,
+        0x880, 0xc0083070,
+        0x884, 0x000004d5,
+        0x888, 0x00000000,
+        0x88c, 0xccc000c0,
+        0x890, 0x00000800,
+        0x894, 0xfffffffe,
+        0x898, 0x40302010,
+        0x89c, 0x00706050,
+        0x900, 0x00000000,
+        0x904, 0x00000023,
+        0x908, 0x00000000,
+        0x90c, 0x81121111,
+        0xa00, 0x00d047c8,
+        0xa04, 0x80ff000c,
+        0xa08, 0x8c838300,
+        0xa0c, 0x2e68120f,
+        0xa10, 0x9500bb78,
+        0xa14, 0x11144028,
+        0xa18, 0x00881117,
+        0xa1c, 0x89140f00,
+        0xa20, 0x1a1b0000,
+        0xa24, 0x090e1317,
+        0xa28, 0x00000204,
+        0xa2c, 0x00d30000,
+        0xa70, 0x101fbf00,
+        0xa74, 0x00000007,
+        0xc00, 0x48071d40,
+        0xc04, 0x03a05611,
+        0xc08, 0x000000e4,
+        0xc0c, 0x6c6c6c6c,
+        0xc10, 0x08800000,
+        0xc14, 0x40000100,
+        0xc18, 0x08800000,
+        0xc1c, 0x40000100,
+        0xc20, 0x00000000,
+        0xc24, 0x00000000,
+        0xc28, 0x00000000,
+        0xc2c, 0x00000000,
+        0xc30, 0x69e9ac44,
+        0xc34, 0x469652cf,
+        0xc38, 0x49795994,
+        0xc3c, 0x0a97971c,
+        0xc40, 0x1f7c403f,
+        0xc44, 0x000100b7,
+        0xc48, 0xec020107,
+        0xc4c, 0x007f037f,
+        0xc50, 0x6954341e,
+        0xc54, 0x43bc0094,
+        0xc58, 0x6954341e,
+        0xc5c, 0x433c0094,
+        0xc60, 0x00000000,
+        0xc64, 0x5116848b,
+        0xc68, 0x47c00bff,
+        0xc6c, 0x00000036,
+        0xc70, 0x2c7f000d,
+        0xc74, 0x018610db,
+        0xc78, 0x0000001f,
+        0xc7c, 0x00b91612,
+        0xc80, 0x40000100,
+        0xc84, 0x20f60000,
+        0xc88, 0x40000100,
+        0xc8c, 0x20200000,
+        0xc90, 0x00121820,
+        0xc94, 0x00000000,
+        0xc98, 0x00121820,
+        0xc9c, 0x00007f7f,
+        0xca0, 0x00000000,
+        0xca4, 0x00000080,
+        0xca8, 0x00000000,
+        0xcac, 0x00000000,
+        0xcb0, 0x00000000,
+        0xcb4, 0x00000000,
+        0xcb8, 0x00000000,
+        0xcbc, 0x28000000,
+        0xcc0, 0x00000000,
+        0xcc4, 0x00000000,
+        0xcc8, 0x00000000,
+        0xccc, 0x00000000,
+        0xcd0, 0x00000000,
+        0xcd4, 0x00000000,
+        0xcd8, 0x64b22427,
+        0xcdc, 0x00766932,
+        0xce0, 0x00222222,
+        0xce4, 0x00000000,
+        0xce8, 0x37644302,
+        0xcec, 0x2f97d40c,
+        0xd00, 0x00080740,
+        0xd04, 0x00020401,
+        0xd08, 0x0000907f,
+        0xd0c, 0x20010201,
+        0xd10, 0xa0633333,
+        0xd14, 0x3333bc43,
+        0xd18, 0x7a8f5b6b,
+        0xd2c, 0xcc979975,
+        0xd30, 0x00000000,
+        0xd34, 0x80608000,
+        0xd38, 0x00000000,
+        0xd3c, 0x00027293,
+        0xd40, 0x00000000,
+        0xd44, 0x00000000,
+        0xd48, 0x00000000,
+        0xd4c, 0x00000000,
+        0xd50, 0x6437140a,
+        0xd54, 0x00000000,
+        0xd58, 0x00000000,
+        0xd5c, 0x30032064,
+        0xd60, 0x4653de68,
+        0xd64, 0x04518a3c,
+        0xd68, 0x00002101,
+        0xd6c, 0x2a201c16,
+        0xd70, 0x1812362e,
+        0xd74, 0x322c2220,
+        0xd78, 0x000e3c24,
+        0xe00, 0x2a2a2a2a,
+        0xe04, 0x2a2a2a2a,
+        0xe08, 0x03902a2a,
+        0xe10, 0x2a2a2a2a,
+        0xe14, 0x2a2a2a2a,
+        0xe18, 0x2a2a2a2a,
+        0xe1c, 0x2a2a2a2a,
+        0xe28, 0x00000000,
+        0xe30, 0x1000dc1f,
+        0xe34, 0x10008c1f,
+        0xe38, 0x02140102,
+        0xe3c, 0x681604c2,
+        0xe40, 0x01007c00,
+        0xe44, 0x01004800,
+        0xe48, 0xfb000000,
+        0xe4c, 0x000028d1,
+        0xe50, 0x1000dc1f,
+        0xe54, 0x10008c1f,
+        0xe58, 0x02140102,
+        0xe5c, 0x28160d05,
+        0xe60, 0x00000008,
+        0xe68, 0x001b25a4,
+        0xe6c, 0x631b25a0,
+        0xe70, 0x631b25a0,
+        0xe74, 0x081b25a0,
+        0xe78, 0x081b25a0,
+        0xe7c, 0x081b25a0,
+        0xe80, 0x081b25a0,
+        0xe84, 0x631b25a0,
+        0xe88, 0x081b25a0,
+        0xe8c, 0x631b25a0,
+        0xed0, 0x631b25a0,
+        0xed4, 0x631b25a0,
+        0xed8, 0x631b25a0,
+        0xedc, 0x001b25a0,
+        0xee0, 0x001b25a0,
+        0xeec, 0x6b1b25a0,
+        0xf14, 0x00000003,
+        0xf4c, 0x00000000,
+        0xf00, 0x00000300,
+};
+
+u32 RTL8192CUPHY_REG_ARRAY_PG[RTL8192CUPHY_REG_ARRAY_PGLENGTH] = {
+        0xe00, 0xffffffff, 0x07090c0c,
+        0xe04, 0xffffffff, 0x01020405,
+        0xe08, 0x0000ff00, 0x00000000,
+        0x86c, 0xffffff00, 0x00000000,
+        0xe10, 0xffffffff, 0x0b0c0c0e,
+        0xe14, 0xffffffff, 0x01030506,
+        0xe18, 0xffffffff, 0x0b0c0d0e,
+        0xe1c, 0xffffffff, 0x01030509,
+        0x830, 0xffffffff, 0x07090c0c,
+        0x834, 0xffffffff, 0x01020405,
+        0x838, 0xffffff00, 0x00000000,
+        0x86c, 0x000000ff, 0x00000000,
+        0x83c, 0xffffffff, 0x0b0c0d0e,
+        0x848, 0xffffffff, 0x01030509,
+        0x84c, 0xffffffff, 0x0b0c0d0e,
+        0x868, 0xffffffff, 0x01030509,
+        0xe00, 0xffffffff, 0x00000000,
+        0xe04, 0xffffffff, 0x00000000,
+        0xe08, 0x0000ff00, 0x00000000,
+        0x86c, 0xffffff00, 0x00000000,
+        0xe10, 0xffffffff, 0x00000000,
+        0xe14, 0xffffffff, 0x00000000,
+        0xe18, 0xffffffff, 0x00000000,
+        0xe1c, 0xffffffff, 0x00000000,
+        0x830, 0xffffffff, 0x00000000,
+        0x834, 0xffffffff, 0x00000000,
+        0x838, 0xffffff00, 0x00000000,
+        0x86c, 0x000000ff, 0x00000000,
+        0x83c, 0xffffffff, 0x00000000,
+        0x848, 0xffffffff, 0x00000000,
+        0x84c, 0xffffffff, 0x00000000,
+        0x868, 0xffffffff, 0x00000000,
+        0xe00, 0xffffffff, 0x04040404,
+        0xe04, 0xffffffff, 0x00020204,
+        0xe08, 0x0000ff00, 0x00000000,
+        0x86c, 0xffffff00, 0x00000000,
+        0xe10, 0xffffffff, 0x06060606,
+        0xe14, 0xffffffff, 0x00020406,
+        0xe18, 0xffffffff, 0x00000000,
+        0xe1c, 0xffffffff, 0x00000000,
+        0x830, 0xffffffff, 0x04040404,
+        0x834, 0xffffffff, 0x00020204,
+        0x838, 0xffffff00, 0x00000000,
+        0x86c, 0x000000ff, 0x00000000,
+        0x83c, 0xffffffff, 0x06060606,
+        0x848, 0xffffffff, 0x00020406,
+        0x84c, 0xffffffff, 0x00000000,
+        0x868, 0xffffffff, 0x00000000,
+        0xe00, 0xffffffff, 0x00000000,
+        0xe04, 0xffffffff, 0x00000000,
+        0xe08, 0x0000ff00, 0x00000000,
+        0x86c, 0xffffff00, 0x00000000,
+        0xe10, 0xffffffff, 0x00000000,
+        0xe14, 0xffffffff, 0x00000000,
+        0xe18, 0xffffffff, 0x00000000,
+        0xe1c, 0xffffffff, 0x00000000,
+        0x830, 0xffffffff, 0x00000000,
+        0x834, 0xffffffff, 0x00000000,
+        0x838, 0xffffff00, 0x00000000,
+        0x86c, 0x000000ff, 0x00000000,
+        0x83c, 0xffffffff, 0x00000000,
+        0x848, 0xffffffff, 0x00000000,
+        0x84c, 0xffffffff, 0x00000000,
+        0x868, 0xffffffff, 0x00000000,
+        0xe00, 0xffffffff, 0x00000000,
+        0xe04, 0xffffffff, 0x00000000,
+        0xe08, 0x0000ff00, 0x00000000,
+        0x86c, 0xffffff00, 0x00000000,
+        0xe10, 0xffffffff, 0x00000000,
+        0xe14, 0xffffffff, 0x00000000,
+        0xe18, 0xffffffff, 0x00000000,
+        0xe1c, 0xffffffff, 0x00000000,
+        0x830, 0xffffffff, 0x00000000,
+        0x834, 0xffffffff, 0x00000000,
+        0x838, 0xffffff00, 0x00000000,
+        0x86c, 0x000000ff, 0x00000000,
+        0x83c, 0xffffffff, 0x00000000,
+        0x848, 0xffffffff, 0x00000000,
+        0x84c, 0xffffffff, 0x00000000,
+        0x868, 0xffffffff, 0x00000000,
+        0xe00, 0xffffffff, 0x04040404,
+        0xe04, 0xffffffff, 0x00020204,
+        0xe08, 0x0000ff00, 0x00000000,
+        0x86c, 0xffffff00, 0x00000000,
+        0xe10, 0xffffffff, 0x00000000,
+        0xe14, 0xffffffff, 0x00000000,
+        0xe18, 0xffffffff, 0x00000000,
+        0xe1c, 0xffffffff, 0x00000000,
+        0x830, 0xffffffff, 0x04040404,
+        0x834, 0xffffffff, 0x00020204,
+        0x838, 0xffffff00, 0x00000000,
+        0x86c, 0x000000ff, 0x00000000,
+        0x83c, 0xffffffff, 0x00000000,
+        0x848, 0xffffffff, 0x00000000,
+        0x84c, 0xffffffff, 0x00000000,
+        0x868, 0xffffffff, 0x00000000,
+        0xe00, 0xffffffff, 0x00000000,
+        0xe04, 0xffffffff, 0x00000000,
+        0xe08, 0x0000ff00, 0x00000000,
+        0x86c, 0xffffff00, 0x00000000,
+        0xe10, 0xffffffff, 0x00000000,
+        0xe14, 0xffffffff, 0x00000000,
+        0xe18, 0xffffffff, 0x00000000,
+        0xe1c, 0xffffffff, 0x00000000,
+        0x830, 0xffffffff, 0x00000000,
+        0x834, 0xffffffff, 0x00000000,
+        0x838, 0xffffff00, 0x00000000,
+        0x86c, 0x000000ff, 0x00000000,
+        0x83c, 0xffffffff, 0x00000000,
+        0x848, 0xffffffff, 0x00000000,
+        0x84c, 0xffffffff, 0x00000000,
+        0x868, 0xffffffff, 0x00000000,
+};
+
+u32 RTL8192CURADIOA_2TARRAY[RTL8192CURADIOA_2TARRAYLENGTH] = {
+        0x000, 0x00030159,
+        0x001, 0x00031284,
+        0x002, 0x00098000,
+        0x003, 0x00018c63,
+        0x004, 0x000210e7,
+        0x009, 0x0002044f,
+        0x00a, 0x0001adb1,
+        0x00b, 0x00054867,
+        0x00c, 0x0008992e,
+        0x00d, 0x0000e52c,
+        0x00e, 0x00039ce7,
+        0x00f, 0x00000451,
+        0x019, 0x00000000,
+        0x01a, 0x00010255,
+        0x01b, 0x00060a00,
+        0x01c, 0x000fc378,
+        0x01d, 0x000a1250,
+        0x01e, 0x0004445f,
+        0x01f, 0x00080001,
+        0x020, 0x0000b614,
+        0x021, 0x0006c000,
+        0x022, 0x00000000,
+        0x023, 0x00001558,
+        0x024, 0x00000060,
+        0x025, 0x00000483,
+        0x026, 0x0004f000,
+        0x027, 0x000ec7d9,
+        0x028, 0x000577c0,
+        0x029, 0x00004783,
+        0x02a, 0x00000001,
+        0x02b, 0x00021334,
+        0x02a, 0x00000000,
+        0x02b, 0x00000054,
+        0x02a, 0x00000001,
+        0x02b, 0x00000808,
+        0x02b, 0x00053333,
+        0x02c, 0x0000000c,
+        0x02a, 0x00000002,
+        0x02b, 0x00000808,
+        0x02b, 0x0005b333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000003,
+        0x02b, 0x00000808,
+        0x02b, 0x00063333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000004,
+        0x02b, 0x00000808,
+        0x02b, 0x0006b333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000005,
+        0x02b, 0x00000808,
+        0x02b, 0x00073333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000006,
+        0x02b, 0x00000709,
+        0x02b, 0x0005b333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000007,
+        0x02b, 0x00000709,
+        0x02b, 0x00063333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000008,
+        0x02b, 0x0000060a,
+        0x02b, 0x0004b333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000009,
+        0x02b, 0x0000060a,
+        0x02b, 0x00053333,
+        0x02c, 0x0000000d,
+        0x02a, 0x0000000a,
+        0x02b, 0x0000060a,
+        0x02b, 0x0005b333,
+        0x02c, 0x0000000d,
+        0x02a, 0x0000000b,
+        0x02b, 0x0000060a,
+        0x02b, 0x00063333,
+        0x02c, 0x0000000d,
+        0x02a, 0x0000000c,
+        0x02b, 0x0000060a,
+        0x02b, 0x0006b333,
+        0x02c, 0x0000000d,
+        0x02a, 0x0000000d,
+        0x02b, 0x0000060a,
+        0x02b, 0x00073333,
+        0x02c, 0x0000000d,
+        0x02a, 0x0000000e,
+        0x02b, 0x0000050b,
+        0x02b, 0x00066666,
+        0x02c, 0x0000001a,
+        0x02a, 0x000e0000,
+        0x010, 0x0004000f,
+        0x011, 0x000e31fc,
+        0x010, 0x0006000f,
+        0x011, 0x000ff9f8,
+        0x010, 0x0002000f,
+        0x011, 0x000203f9,
+        0x010, 0x0003000f,
+        0x011, 0x000ff500,
+        0x010, 0x00000000,
+        0x011, 0x00000000,
+        0x010, 0x0008000f,
+        0x011, 0x0003f100,
+        0x010, 0x0009000f,
+        0x011, 0x00023100,
+        0x012, 0x00032000,
+        0x012, 0x00071000,
+        0x012, 0x000b0000,
+        0x012, 0x000fc000,
+        0x013, 0x000287af,
+        0x013, 0x000244b7,
+        0x013, 0x000204ab,
+        0x013, 0x0001c49f,
+        0x013, 0x00018493,
+        0x013, 0x00014297,
+        0x013, 0x00010295,
+        0x013, 0x0000c298,
+        0x013, 0x0000819c,
+        0x013, 0x000040a8,
+        0x013, 0x0000001c,
+        0x014, 0x0001944c,
+        0x014, 0x00059444,
+        0x014, 0x0009944c,
+        0x014, 0x000d9444,
+        0x015, 0x0000f424,
+        0x015, 0x0004f424,
+        0x015, 0x0008f424,
+        0x015, 0x000cf424,
+        0x016, 0x000e0330,
+        0x016, 0x000a0330,
+        0x016, 0x00060330,
+        0x016, 0x00020330,
+        0x000, 0x00010159,
+        0x018, 0x0000f401,
+        0x0fe, 0x00000000,
+        0x0fe, 0x00000000,
+        0x01f, 0x00080003,
+        0x0fe, 0x00000000,
+        0x0fe, 0x00000000,
+        0x01e, 0x00044457,
+        0x01f, 0x00080000,
+        0x000, 0x00030159,
+};
+
+u32 RTL8192CU_RADIOB_2TARRAY[RTL8192CURADIOB_2TARRAYLENGTH] = {
+        0x000, 0x00030159,
+        0x001, 0x00031284,
+        0x002, 0x00098000,
+        0x003, 0x00018c63,
+        0x004, 0x000210e7,
+        0x009, 0x0002044f,
+        0x00a, 0x0001adb1,
+        0x00b, 0x00054867,
+        0x00c, 0x0008992e,
+        0x00d, 0x0000e52c,
+        0x00e, 0x00039ce7,
+        0x00f, 0x00000451,
+        0x012, 0x00032000,
+        0x012, 0x00071000,
+        0x012, 0x000b0000,
+        0x012, 0x000fc000,
+        0x013, 0x000287af,
+        0x013, 0x000244b7,
+        0x013, 0x000204ab,
+        0x013, 0x0001c49f,
+        0x013, 0x00018493,
+        0x013, 0x00014297,
+        0x013, 0x00010295,
+        0x013, 0x0000c298,
+        0x013, 0x0000819c,
+        0x013, 0x000040a8,
+        0x013, 0x0000001c,
+        0x014, 0x0001944c,
+        0x014, 0x00059444,
+        0x014, 0x0009944c,
+        0x014, 0x000d9444,
+        0x015, 0x0000f424,
+        0x015, 0x0004f424,
+        0x015, 0x0008f424,
+        0x015, 0x000cf424,
+        0x016, 0x000e0330,
+        0x016, 0x000a0330,
+        0x016, 0x00060330,
+        0x016, 0x00020330,
+};
+
+u32 RTL8192CU_RADIOA_1TARRAY[RTL8192CURADIOA_1TARRAYLENGTH] = {
+        0x000, 0x00030159,
+        0x001, 0x00031284,
+        0x002, 0x00098000,
+        0x003, 0x00018c63,
+        0x004, 0x000210e7,
+        0x009, 0x0002044f,
+        0x00a, 0x0001adb1,
+        0x00b, 0x00054867,
+        0x00c, 0x0008992e,
+        0x00d, 0x0000e52c,
+        0x00e, 0x00039ce7,
+        0x00f, 0x00000451,
+        0x019, 0x00000000,
+        0x01a, 0x00010255,
+        0x01b, 0x00060a00,
+        0x01c, 0x000fc378,
+        0x01d, 0x000a1250,
+        0x01e, 0x0004445f,
+        0x01f, 0x00080001,
+        0x020, 0x0000b614,
+        0x021, 0x0006c000,
+        0x022, 0x00000000,
+        0x023, 0x00001558,
+        0x024, 0x00000060,
+        0x025, 0x00000483,
+        0x026, 0x0004f000,
+        0x027, 0x000ec7d9,
+        0x028, 0x000577c0,
+        0x029, 0x00004783,
+        0x02a, 0x00000001,
+        0x02b, 0x00021334,
+        0x02a, 0x00000000,
+        0x02b, 0x00000054,
+        0x02a, 0x00000001,
+        0x02b, 0x00000808,
+        0x02b, 0x00053333,
+        0x02c, 0x0000000c,
+        0x02a, 0x00000002,
+        0x02b, 0x00000808,
+        0x02b, 0x0005b333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000003,
+        0x02b, 0x00000808,
+        0x02b, 0x00063333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000004,
+        0x02b, 0x00000808,
+        0x02b, 0x0006b333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000005,
+        0x02b, 0x00000808,
+        0x02b, 0x00073333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000006,
+        0x02b, 0x00000709,
+        0x02b, 0x0005b333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000007,
+        0x02b, 0x00000709,
+        0x02b, 0x00063333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000008,
+        0x02b, 0x0000060a,
+        0x02b, 0x0004b333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000009,
+        0x02b, 0x0000060a,
+        0x02b, 0x00053333,
+        0x02c, 0x0000000d,
+        0x02a, 0x0000000a,
+        0x02b, 0x0000060a,
+        0x02b, 0x0005b333,
+        0x02c, 0x0000000d,
+        0x02a, 0x0000000b,
+        0x02b, 0x0000060a,
+        0x02b, 0x00063333,
+        0x02c, 0x0000000d,
+        0x02a, 0x0000000c,
+        0x02b, 0x0000060a,
+        0x02b, 0x0006b333,
+        0x02c, 0x0000000d,
+        0x02a, 0x0000000d,
+        0x02b, 0x0000060a,
+        0x02b, 0x00073333,
+        0x02c, 0x0000000d,
+        0x02a, 0x0000000e,
+        0x02b, 0x0000050b,
+        0x02b, 0x00066666,
+        0x02c, 0x0000001a,
+        0x02a, 0x000e0000,
+        0x010, 0x0004000f,
+        0x011, 0x000e31fc,
+        0x010, 0x0006000f,
+        0x011, 0x000ff9f8,
+        0x010, 0x0002000f,
+        0x011, 0x000203f9,
+        0x010, 0x0003000f,
+        0x011, 0x000ff500,
+        0x010, 0x00000000,
+        0x011, 0x00000000,
+        0x010, 0x0008000f,
+        0x011, 0x0003f100,
+        0x010, 0x0009000f,
+        0x011, 0x00023100,
+        0x012, 0x00032000,
+        0x012, 0x00071000,
+        0x012, 0x000b0000,
+        0x012, 0x000fc000,
+        0x013, 0x000287b3,
+        0x013, 0x000244b7,
+        0x013, 0x000204ab,
+        0x013, 0x0001c49f,
+        0x013, 0x00018493,
+        0x013, 0x0001429b,
+        0x013, 0x00010299,
+        0x013, 0x0000c29c,
+        0x013, 0x000081a0,
+        0x013, 0x000040ac,
+        0x013, 0x00000020,
+        0x014, 0x0001944c,
+        0x014, 0x00059444,
+        0x014, 0x0009944c,
+        0x014, 0x000d9444,
+        0x015, 0x0000f405,
+        0x015, 0x0004f405,
+        0x015, 0x0008f405,
+        0x015, 0x000cf405,
+        0x016, 0x000e0330,
+        0x016, 0x000a0330,
+        0x016, 0x00060330,
+        0x016, 0x00020330,
+        0x000, 0x00010159,
+        0x018, 0x0000f401,
+        0x0fe, 0x00000000,
+        0x0fe, 0x00000000,
+        0x01f, 0x00080003,
+        0x0fe, 0x00000000,
+        0x0fe, 0x00000000,
+        0x01e, 0x00044457,
+        0x01f, 0x00080000,
+        0x000, 0x00030159,
+};
+
+u32 RTL8192CU_RADIOB_1TARRAY[RTL8192CURADIOB_1TARRAYLENGTH] = {
+        0x0,
+};
+
+u32 RTL8192CUMAC_2T_ARRAY[RTL8192CUMAC_2T_ARRAYLENGTH] = {
+        0x420, 0x00000080,
+        0x423, 0x00000000,
+        0x430, 0x00000000,
+        0x431, 0x00000000,
+        0x432, 0x00000000,
+        0x433, 0x00000001,
+        0x434, 0x00000004,
+        0x435, 0x00000005,
+        0x436, 0x00000006,
+        0x437, 0x00000007,
+        0x438, 0x00000000,
+        0x439, 0x00000000,
+        0x43a, 0x00000000,
+        0x43b, 0x00000001,
+        0x43c, 0x00000004,
+        0x43d, 0x00000005,
+        0x43e, 0x00000006,
+        0x43f, 0x00000007,
+        0x440, 0x0000005d,
+        0x441, 0x00000001,
+        0x442, 0x00000000,
+        0x444, 0x00000015,
+        0x445, 0x000000f0,
+        0x446, 0x0000000f,
+        0x447, 0x00000000,
+        0x458, 0x00000041,
+        0x459, 0x000000a8,
+        0x45a, 0x00000072,
+        0x45b, 0x000000b9,
+        0x460, 0x00000066,
+        0x461, 0x00000066,
+        0x462, 0x00000008,
+        0x463, 0x00000003,
+        0x4c8, 0x000000ff,
+        0x4c9, 0x00000008,
+        0x4cc, 0x000000ff,
+        0x4cd, 0x000000ff,
+        0x4ce, 0x00000001,
+        0x500, 0x00000026,
+        0x501, 0x000000a2,
+        0x502, 0x0000002f,
+        0x503, 0x00000000,
+        0x504, 0x00000028,
+        0x505, 0x000000a3,
+        0x506, 0x0000005e,
+        0x507, 0x00000000,
+        0x508, 0x0000002b,
+        0x509, 0x000000a4,
+        0x50a, 0x0000005e,
+        0x50b, 0x00000000,
+        0x50c, 0x0000004f,
+        0x50d, 0x000000a4,
+        0x50e, 0x00000000,
+        0x50f, 0x00000000,
+        0x512, 0x0000001c,
+        0x514, 0x0000000a,
+        0x515, 0x00000010,
+        0x516, 0x0000000a,
+        0x517, 0x00000010,
+        0x51a, 0x00000016,
+        0x524, 0x0000000f,
+        0x525, 0x0000004f,
+        0x546, 0x00000040,
+        0x547, 0x00000000,
+        0x550, 0x00000010,
+        0x551, 0x00000010,
+        0x559, 0x00000002,
+        0x55a, 0x00000002,
+        0x55d, 0x000000ff,
+        0x605, 0x00000030,
+        0x608, 0x0000000e,
+        0x609, 0x0000002a,
+        0x652, 0x00000020,
+        0x63c, 0x0000000a,
+        0x63d, 0x0000000e,
+        0x63e, 0x0000000a,
+        0x63f, 0x0000000e,
+        0x66e, 0x00000005,
+        0x700, 0x00000021,
+        0x701, 0x00000043,
+        0x702, 0x00000065,
+        0x703, 0x00000087,
+        0x708, 0x00000021,
+        0x709, 0x00000043,
+        0x70a, 0x00000065,
+        0x70b, 0x00000087,
+};
+
+u32 RTL8192CUAGCTAB_2TARRAY[RTL8192CUAGCTAB_2TARRAYLENGTH] = {
+        0xc78, 0x7b000001,
+        0xc78, 0x7b010001,
+        0xc78, 0x7b020001,
+        0xc78, 0x7b030001,
+        0xc78, 0x7b040001,
+        0xc78, 0x7b050001,
+        0xc78, 0x7a060001,
+        0xc78, 0x79070001,
+        0xc78, 0x78080001,
+        0xc78, 0x77090001,
+        0xc78, 0x760a0001,
+        0xc78, 0x750b0001,
+        0xc78, 0x740c0001,
+        0xc78, 0x730d0001,
+        0xc78, 0x720e0001,
+        0xc78, 0x710f0001,
+        0xc78, 0x70100001,
+        0xc78, 0x6f110001,
+        0xc78, 0x6e120001,
+        0xc78, 0x6d130001,
+        0xc78, 0x6c140001,
+        0xc78, 0x6b150001,
+        0xc78, 0x6a160001,
+        0xc78, 0x69170001,
+        0xc78, 0x68180001,
+        0xc78, 0x67190001,
+        0xc78, 0x661a0001,
+        0xc78, 0x651b0001,
+        0xc78, 0x641c0001,
+        0xc78, 0x631d0001,
+        0xc78, 0x621e0001,
+        0xc78, 0x611f0001,
+        0xc78, 0x60200001,
+        0xc78, 0x49210001,
+        0xc78, 0x48220001,
+        0xc78, 0x47230001,
+        0xc78, 0x46240001,
+        0xc78, 0x45250001,
+        0xc78, 0x44260001,
+        0xc78, 0x43270001,
+        0xc78, 0x42280001,
+        0xc78, 0x41290001,
+        0xc78, 0x402a0001,
+        0xc78, 0x262b0001,
+        0xc78, 0x252c0001,
+        0xc78, 0x242d0001,
+        0xc78, 0x232e0001,
+        0xc78, 0x222f0001,
+        0xc78, 0x21300001,
+        0xc78, 0x20310001,
+        0xc78, 0x06320001,
+        0xc78, 0x05330001,
+        0xc78, 0x04340001,
+        0xc78, 0x03350001,
+        0xc78, 0x02360001,
+        0xc78, 0x01370001,
+        0xc78, 0x00380001,
+        0xc78, 0x00390001,
+        0xc78, 0x003a0001,
+        0xc78, 0x003b0001,
+        0xc78, 0x003c0001,
+        0xc78, 0x003d0001,
+        0xc78, 0x003e0001,
+        0xc78, 0x003f0001,
+        0xc78, 0x7b400001,
+        0xc78, 0x7b410001,
+        0xc78, 0x7b420001,
+        0xc78, 0x7b430001,
+        0xc78, 0x7b440001,
+        0xc78, 0x7b450001,
+        0xc78, 0x7a460001,
+        0xc78, 0x79470001,
+        0xc78, 0x78480001,
+        0xc78, 0x77490001,
+        0xc78, 0x764a0001,
+        0xc78, 0x754b0001,
+        0xc78, 0x744c0001,
+        0xc78, 0x734d0001,
+        0xc78, 0x724e0001,
+        0xc78, 0x714f0001,
+        0xc78, 0x70500001,
+        0xc78, 0x6f510001,
+        0xc78, 0x6e520001,
+        0xc78, 0x6d530001,
+        0xc78, 0x6c540001,
+        0xc78, 0x6b550001,
+        0xc78, 0x6a560001,
+        0xc78, 0x69570001,
+        0xc78, 0x68580001,
+        0xc78, 0x67590001,
+        0xc78, 0x665a0001,
+        0xc78, 0x655b0001,
+        0xc78, 0x645c0001,
+        0xc78, 0x635d0001,
+        0xc78, 0x625e0001,
+        0xc78, 0x615f0001,
+        0xc78, 0x60600001,
+        0xc78, 0x49610001,
+        0xc78, 0x48620001,
+        0xc78, 0x47630001,
+        0xc78, 0x46640001,
+        0xc78, 0x45650001,
+        0xc78, 0x44660001,
+        0xc78, 0x43670001,
+        0xc78, 0x42680001,
+        0xc78, 0x41690001,
+        0xc78, 0x406a0001,
+        0xc78, 0x266b0001,
+        0xc78, 0x256c0001,
+        0xc78, 0x246d0001,
+        0xc78, 0x236e0001,
+        0xc78, 0x226f0001,
+        0xc78, 0x21700001,
+        0xc78, 0x20710001,
+        0xc78, 0x06720001,
+        0xc78, 0x05730001,
+        0xc78, 0x04740001,
+        0xc78, 0x03750001,
+        0xc78, 0x02760001,
+        0xc78, 0x01770001,
+        0xc78, 0x00780001,
+        0xc78, 0x00790001,
+        0xc78, 0x007a0001,
+        0xc78, 0x007b0001,
+        0xc78, 0x007c0001,
+        0xc78, 0x007d0001,
+        0xc78, 0x007e0001,
+        0xc78, 0x007f0001,
+        0xc78, 0x3800001e,
+        0xc78, 0x3801001e,
+        0xc78, 0x3802001e,
+        0xc78, 0x3803001e,
+        0xc78, 0x3804001e,
+        0xc78, 0x3805001e,
+        0xc78, 0x3806001e,
+        0xc78, 0x3807001e,
+        0xc78, 0x3808001e,
+        0xc78, 0x3c09001e,
+        0xc78, 0x3e0a001e,
+        0xc78, 0x400b001e,
+        0xc78, 0x440c001e,
+        0xc78, 0x480d001e,
+        0xc78, 0x4c0e001e,
+        0xc78, 0x500f001e,
+        0xc78, 0x5210001e,
+        0xc78, 0x5611001e,
+        0xc78, 0x5a12001e,
+        0xc78, 0x5e13001e,
+        0xc78, 0x6014001e,
+        0xc78, 0x6015001e,
+        0xc78, 0x6016001e,
+        0xc78, 0x6217001e,
+        0xc78, 0x6218001e,
+        0xc78, 0x6219001e,
+        0xc78, 0x621a001e,
+        0xc78, 0x621b001e,
+        0xc78, 0x621c001e,
+        0xc78, 0x621d001e,
+        0xc78, 0x621e001e,
+        0xc78, 0x621f001e,
+};
+
+u32 RTL8192CUAGCTAB_1TARRAY[RTL8192CUAGCTAB_1TARRAYLENGTH] = {
+        0xc78, 0x7b000001,
+        0xc78, 0x7b010001,
+        0xc78, 0x7b020001,
+        0xc78, 0x7b030001,
+        0xc78, 0x7b040001,
+        0xc78, 0x7b050001,
+        0xc78, 0x7a060001,
+        0xc78, 0x79070001,
+        0xc78, 0x78080001,
+        0xc78, 0x77090001,
+        0xc78, 0x760a0001,
+        0xc78, 0x750b0001,
+        0xc78, 0x740c0001,
+        0xc78, 0x730d0001,
+        0xc78, 0x720e0001,
+        0xc78, 0x710f0001,
+        0xc78, 0x70100001,
+        0xc78, 0x6f110001,
+        0xc78, 0x6e120001,
+        0xc78, 0x6d130001,
+        0xc78, 0x6c140001,
+        0xc78, 0x6b150001,
+        0xc78, 0x6a160001,
+        0xc78, 0x69170001,
+        0xc78, 0x68180001,
+        0xc78, 0x67190001,
+        0xc78, 0x661a0001,
+        0xc78, 0x651b0001,
+        0xc78, 0x641c0001,
+        0xc78, 0x631d0001,
+        0xc78, 0x621e0001,
+        0xc78, 0x611f0001,
+        0xc78, 0x60200001,
+        0xc78, 0x49210001,
+        0xc78, 0x48220001,
+        0xc78, 0x47230001,
+        0xc78, 0x46240001,
+        0xc78, 0x45250001,
+        0xc78, 0x44260001,
+        0xc78, 0x43270001,
+        0xc78, 0x42280001,
+        0xc78, 0x41290001,
+        0xc78, 0x402a0001,
+        0xc78, 0x262b0001,
+        0xc78, 0x252c0001,
+        0xc78, 0x242d0001,
+        0xc78, 0x232e0001,
+        0xc78, 0x222f0001,
+        0xc78, 0x21300001,
+        0xc78, 0x20310001,
+        0xc78, 0x06320001,
+        0xc78, 0x05330001,
+        0xc78, 0x04340001,
+        0xc78, 0x03350001,
+        0xc78, 0x02360001,
+        0xc78, 0x01370001,
+        0xc78, 0x00380001,
+        0xc78, 0x00390001,
+        0xc78, 0x003a0001,
+        0xc78, 0x003b0001,
+        0xc78, 0x003c0001,
+        0xc78, 0x003d0001,
+        0xc78, 0x003e0001,
+        0xc78, 0x003f0001,
+        0xc78, 0x7b400001,
+        0xc78, 0x7b410001,
+        0xc78, 0x7b420001,
+        0xc78, 0x7b430001,
+        0xc78, 0x7b440001,
+        0xc78, 0x7b450001,
+        0xc78, 0x7a460001,
+        0xc78, 0x79470001,
+        0xc78, 0x78480001,
+        0xc78, 0x77490001,
+        0xc78, 0x764a0001,
+        0xc78, 0x754b0001,
+        0xc78, 0x744c0001,
+        0xc78, 0x734d0001,
+        0xc78, 0x724e0001,
+        0xc78, 0x714f0001,
+        0xc78, 0x70500001,
+        0xc78, 0x6f510001,
+        0xc78, 0x6e520001,
+        0xc78, 0x6d530001,
+        0xc78, 0x6c540001,
+        0xc78, 0x6b550001,
+        0xc78, 0x6a560001,
+        0xc78, 0x69570001,
+        0xc78, 0x68580001,
+        0xc78, 0x67590001,
+        0xc78, 0x665a0001,
+        0xc78, 0x655b0001,
+        0xc78, 0x645c0001,
+        0xc78, 0x635d0001,
+        0xc78, 0x625e0001,
+        0xc78, 0x615f0001,
+        0xc78, 0x60600001,
+        0xc78, 0x49610001,
+        0xc78, 0x48620001,
+        0xc78, 0x47630001,
+        0xc78, 0x46640001,
+        0xc78, 0x45650001,
+        0xc78, 0x44660001,
+        0xc78, 0x43670001,
+        0xc78, 0x42680001,
+        0xc78, 0x41690001,
+        0xc78, 0x406a0001,
+        0xc78, 0x266b0001,
+        0xc78, 0x256c0001,
+        0xc78, 0x246d0001,
+        0xc78, 0x236e0001,
+        0xc78, 0x226f0001,
+        0xc78, 0x21700001,
+        0xc78, 0x20710001,
+        0xc78, 0x06720001,
+        0xc78, 0x05730001,
+        0xc78, 0x04740001,
+        0xc78, 0x03750001,
+        0xc78, 0x02760001,
+        0xc78, 0x01770001,
+        0xc78, 0x00780001,
+        0xc78, 0x00790001,
+        0xc78, 0x007a0001,
+        0xc78, 0x007b0001,
+        0xc78, 0x007c0001,
+        0xc78, 0x007d0001,
+        0xc78, 0x007e0001,
+        0xc78, 0x007f0001,
+        0xc78, 0x3800001e,
+        0xc78, 0x3801001e,
+        0xc78, 0x3802001e,
+        0xc78, 0x3803001e,
+        0xc78, 0x3804001e,
+        0xc78, 0x3805001e,
+        0xc78, 0x3806001e,
+        0xc78, 0x3807001e,
+        0xc78, 0x3808001e,
+        0xc78, 0x3c09001e,
+        0xc78, 0x3e0a001e,
+        0xc78, 0x400b001e,
+        0xc78, 0x440c001e,
+        0xc78, 0x480d001e,
+        0xc78, 0x4c0e001e,
+        0xc78, 0x500f001e,
+        0xc78, 0x5210001e,
+        0xc78, 0x5611001e,
+        0xc78, 0x5a12001e,
+        0xc78, 0x5e13001e,
+        0xc78, 0x6014001e,
+        0xc78, 0x6015001e,
+        0xc78, 0x6016001e,
+        0xc78, 0x6217001e,
+        0xc78, 0x6218001e,
+        0xc78, 0x6219001e,
+        0xc78, 0x621a001e,
+        0xc78, 0x621b001e,
+        0xc78, 0x621c001e,
+        0xc78, 0x621d001e,
+        0xc78, 0x621e001e,
+        0xc78, 0x621f001e,
+};
+
+u32 RTL8192CUPHY_REG_1T_HPArray[RTL8192CUPHY_REG_1T_HPArrayLength] = {
+        0x024, 0x0011800f,
+        0x028, 0x00ffdb83,
+        0x040, 0x000c0004,
+        0x800, 0x80040000,
+        0x804, 0x00000001,
+        0x808, 0x0000fc00,
+        0x80c, 0x0000000a,
+        0x810, 0x10005388,
+        0x814, 0x020c3d10,
+        0x818, 0x02200385,
+        0x81c, 0x00000000,
+        0x820, 0x01000100,
+        0x824, 0x00390204,
+        0x828, 0x00000000,
+        0x82c, 0x00000000,
+        0x830, 0x00000000,
+        0x834, 0x00000000,
+        0x838, 0x00000000,
+        0x83c, 0x00000000,
+        0x840, 0x00010000,
+        0x844, 0x00000000,
+        0x848, 0x00000000,
+        0x84c, 0x00000000,
+        0x850, 0x00000000,
+        0x854, 0x00000000,
+        0x858, 0x569a569a,
+        0x85c, 0x001b25a4,
+        0x860, 0x66e60230,
+        0x864, 0x061f0130,
+        0x868, 0x00000000,
+        0x86c, 0x20202000,
+        0x870, 0x03000300,
+        0x874, 0x22004000,
+        0x878, 0x00000808,
+        0x87c, 0x00ffc3f1,
+        0x880, 0xc0083070,
+        0x884, 0x000004d5,
+        0x888, 0x00000000,
+        0x88c, 0xccc000c0,
+        0x890, 0x00000800,
+        0x894, 0xfffffffe,
+        0x898, 0x40302010,
+        0x89c, 0x00706050,
+        0x900, 0x00000000,
+        0x904, 0x00000023,
+        0x908, 0x00000000,
+        0x90c, 0x81121111,
+        0xa00, 0x00d047c8,
+        0xa04, 0x80ff000c,
+        0xa08, 0x8c838300,
+        0xa0c, 0x2e68120f,
+        0xa10, 0x9500bb78,
+        0xa14, 0x11144028,
+        0xa18, 0x00881117,
+        0xa1c, 0x89140f00,
+        0xa20, 0x15160000,
+        0xa24, 0x070b0f12,
+        0xa28, 0x00000104,
+        0xa2c, 0x00d30000,
+        0xa70, 0x101fbf00,
+        0xa74, 0x00000007,
+        0xc00, 0x48071d40,
+        0xc04, 0x03a05611,
+        0xc08, 0x000000e4,
+        0xc0c, 0x6c6c6c6c,
+        0xc10, 0x08800000,
+        0xc14, 0x40000100,
+        0xc18, 0x08800000,
+        0xc1c, 0x40000100,
+        0xc20, 0x00000000,
+        0xc24, 0x00000000,
+        0xc28, 0x00000000,
+        0xc2c, 0x00000000,
+        0xc30, 0x69e9ac44,
+        0xc34, 0x469652cf,
+        0xc38, 0x49795994,
+        0xc3c, 0x0a97971c,
+        0xc40, 0x1f7c403f,
+        0xc44, 0x000100b7,
+        0xc48, 0xec020107,
+        0xc4c, 0x007f037f,
+        0xc50, 0x6954342e,
+        0xc54, 0x43bc0094,
+        0xc58, 0x6954342f,
+        0xc5c, 0x433c0094,
+        0xc60, 0x00000000,
+        0xc64, 0x5116848b,
+        0xc68, 0x47c00bff,
+        0xc6c, 0x00000036,
+        0xc70, 0x2c46000d,
+        0xc74, 0x018610db,
+        0xc78, 0x0000001f,
+        0xc7c, 0x00b91612,
+        0xc80, 0x24000090,
+        0xc84, 0x20f60000,
+        0xc88, 0x24000090,
+        0xc8c, 0x20200000,
+        0xc90, 0x00121820,
+        0xc94, 0x00000000,
+        0xc98, 0x00121820,
+        0xc9c, 0x00007f7f,
+        0xca0, 0x00000000,
+        0xca4, 0x00000080,
+        0xca8, 0x00000000,
+        0xcac, 0x00000000,
+        0xcb0, 0x00000000,
+        0xcb4, 0x00000000,
+        0xcb8, 0x00000000,
+        0xcbc, 0x28000000,
+        0xcc0, 0x00000000,
+        0xcc4, 0x00000000,
+        0xcc8, 0x00000000,
+        0xccc, 0x00000000,
+        0xcd0, 0x00000000,
+        0xcd4, 0x00000000,
+        0xcd8, 0x64b22427,
+        0xcdc, 0x00766932,
+        0xce0, 0x00222222,
+        0xce4, 0x00000000,
+        0xce8, 0x37644302,
+        0xcec, 0x2f97d40c,
+        0xd00, 0x00080740,
+        0xd04, 0x00020401,
+        0xd08, 0x0000907f,
+        0xd0c, 0x20010201,
+        0xd10, 0xa0633333,
+        0xd14, 0x3333bc43,
+        0xd18, 0x7a8f5b6b,
+        0xd2c, 0xcc979975,
+        0xd30, 0x00000000,
+        0xd34, 0x80608000,
+        0xd38, 0x00000000,
+        0xd3c, 0x00027293,
+        0xd40, 0x00000000,
+        0xd44, 0x00000000,
+        0xd48, 0x00000000,
+        0xd4c, 0x00000000,
+        0xd50, 0x6437140a,
+        0xd54, 0x00000000,
+        0xd58, 0x00000000,
+        0xd5c, 0x30032064,
+        0xd60, 0x4653de68,
+        0xd64, 0x04518a3c,
+        0xd68, 0x00002101,
+        0xd6c, 0x2a201c16,
+        0xd70, 0x1812362e,
+        0xd74, 0x322c2220,
+        0xd78, 0x000e3c24,
+        0xe00, 0x24242424,
+        0xe04, 0x24242424,
+        0xe08, 0x03902024,
+        0xe10, 0x24242424,
+        0xe14, 0x24242424,
+        0xe18, 0x24242424,
+        0xe1c, 0x24242424,
+        0xe28, 0x00000000,
+        0xe30, 0x1000dc1f,
+        0xe34, 0x10008c1f,
+        0xe38, 0x02140102,
+        0xe3c, 0x681604c2,
+        0xe40, 0x01007c00,
+        0xe44, 0x01004800,
+        0xe48, 0xfb000000,
+        0xe4c, 0x000028d1,
+        0xe50, 0x1000dc1f,
+        0xe54, 0x10008c1f,
+        0xe58, 0x02140102,
+        0xe5c, 0x28160d05,
+        0xe60, 0x00000008,
+        0xe68, 0x001b25a4,
+        0xe6c, 0x631b25a0,
+        0xe70, 0x631b25a0,
+        0xe74, 0x081b25a0,
+        0xe78, 0x081b25a0,
+        0xe7c, 0x081b25a0,
+        0xe80, 0x081b25a0,
+        0xe84, 0x631b25a0,
+        0xe88, 0x081b25a0,
+        0xe8c, 0x631b25a0,
+        0xed0, 0x631b25a0,
+        0xed4, 0x631b25a0,
+        0xed8, 0x631b25a0,
+        0xedc, 0x001b25a0,
+        0xee0, 0x001b25a0,
+        0xeec, 0x6b1b25a0,
+        0xee8, 0x31555448,
+        0xf14, 0x00000003,
+        0xf4c, 0x00000000,
+        0xf00, 0x00000300,
+};
+
+u32 RTL8192CUPHY_REG_Array_PG_HP[RTL8192CUPHY_REG_Array_PG_HPLength] = {
+        0xe00, 0xffffffff, 0x06080808,
+        0xe04, 0xffffffff, 0x00040406,
+        0xe08, 0x0000ff00, 0x00000000,
+        0x86c, 0xffffff00, 0x00000000,
+        0xe10, 0xffffffff, 0x04060608,
+        0xe14, 0xffffffff, 0x00020204,
+        0xe18, 0xffffffff, 0x04060608,
+        0xe1c, 0xffffffff, 0x00020204,
+        0x830, 0xffffffff, 0x06080808,
+        0x834, 0xffffffff, 0x00040406,
+        0x838, 0xffffff00, 0x00000000,
+        0x86c, 0x000000ff, 0x00000000,
+        0x83c, 0xffffffff, 0x04060608,
+        0x848, 0xffffffff, 0x00020204,
+        0x84c, 0xffffffff, 0x04060608,
+        0x868, 0xffffffff, 0x00020204,
+        0xe00, 0xffffffff, 0x00000000,
+        0xe04, 0xffffffff, 0x00000000,
+        0xe08, 0x0000ff00, 0x00000000,
+        0x86c, 0xffffff00, 0x00000000,
+        0xe10, 0xffffffff, 0x00000000,
+        0xe14, 0xffffffff, 0x00000000,
+        0xe18, 0xffffffff, 0x00000000,
+        0xe1c, 0xffffffff, 0x00000000,
+        0x830, 0xffffffff, 0x00000000,
+        0x834, 0xffffffff, 0x00000000,
+        0x838, 0xffffff00, 0x00000000,
+        0x86c, 0x000000ff, 0x00000000,
+        0x83c, 0xffffffff, 0x00000000,
+        0x848, 0xffffffff, 0x00000000,
+        0x84c, 0xffffffff, 0x00000000,
+        0x868, 0xffffffff, 0x00000000,
+        0xe00, 0xffffffff, 0x00000000,
+        0xe04, 0xffffffff, 0x00000000,
+        0xe08, 0x0000ff00, 0x00000000,
+        0x86c, 0xffffff00, 0x00000000,
+        0xe10, 0xffffffff, 0x00000000,
+        0xe14, 0xffffffff, 0x00000000,
+        0xe18, 0xffffffff, 0x00000000,
+        0xe1c, 0xffffffff, 0x00000000,
+        0x830, 0xffffffff, 0x00000000,
+        0x834, 0xffffffff, 0x00000000,
+        0x838, 0xffffff00, 0x00000000,
+        0x86c, 0x000000ff, 0x00000000,
+        0x83c, 0xffffffff, 0x00000000,
+        0x848, 0xffffffff, 0x00000000,
+        0x84c, 0xffffffff, 0x00000000,
+        0x868, 0xffffffff, 0x00000000,
+        0xe00, 0xffffffff, 0x00000000,
+        0xe04, 0xffffffff, 0x00000000,
+        0xe08, 0x0000ff00, 0x00000000,
+        0x86c, 0xffffff00, 0x00000000,
+        0xe10, 0xffffffff, 0x00000000,
+        0xe14, 0xffffffff, 0x00000000,
+        0xe18, 0xffffffff, 0x00000000,
+        0xe1c, 0xffffffff, 0x00000000,
+        0x830, 0xffffffff, 0x00000000,
+        0x834, 0xffffffff, 0x00000000,
+        0x838, 0xffffff00, 0x00000000,
+        0x86c, 0x000000ff, 0x00000000,
+        0x83c, 0xffffffff, 0x00000000,
+        0x848, 0xffffffff, 0x00000000,
+        0x84c, 0xffffffff, 0x00000000,
+        0x868, 0xffffffff, 0x00000000,
+        0xe00, 0xffffffff, 0x00000000,
+        0xe04, 0xffffffff, 0x00000000,
+        0xe08, 0x0000ff00, 0x00000000,
+        0x86c, 0xffffff00, 0x00000000,
+        0xe10, 0xffffffff, 0x00000000,
+        0xe14, 0xffffffff, 0x00000000,
+        0xe18, 0xffffffff, 0x00000000,
+        0xe1c, 0xffffffff, 0x00000000,
+        0x830, 0xffffffff, 0x00000000,
+        0x834, 0xffffffff, 0x00000000,
+        0x838, 0xffffff00, 0x00000000,
+        0x86c, 0x000000ff, 0x00000000,
+        0x83c, 0xffffffff, 0x00000000,
+        0x848, 0xffffffff, 0x00000000,
+        0x84c, 0xffffffff, 0x00000000,
+        0x868, 0xffffffff, 0x00000000,
+        0xe00, 0xffffffff, 0x00000000,
+        0xe04, 0xffffffff, 0x00000000,
+        0xe08, 0x0000ff00, 0x00000000,
+        0x86c, 0xffffff00, 0x00000000,
+        0xe10, 0xffffffff, 0x00000000,
+        0xe14, 0xffffffff, 0x00000000,
+        0xe18, 0xffffffff, 0x00000000,
+        0xe1c, 0xffffffff, 0x00000000,
+        0x830, 0xffffffff, 0x00000000,
+        0x834, 0xffffffff, 0x00000000,
+        0x838, 0xffffff00, 0x00000000,
+        0x86c, 0x000000ff, 0x00000000,
+        0x83c, 0xffffffff, 0x00000000,
+        0x848, 0xffffffff, 0x00000000,
+        0x84c, 0xffffffff, 0x00000000,
+        0x868, 0xffffffff, 0x00000000,
+        0xe00, 0xffffffff, 0x00000000,
+        0xe04, 0xffffffff, 0x00000000,
+        0xe08, 0x0000ff00, 0x00000000,
+        0x86c, 0xffffff00, 0x00000000,
+        0xe10, 0xffffffff, 0x00000000,
+        0xe14, 0xffffffff, 0x00000000,
+        0xe18, 0xffffffff, 0x00000000,
+        0xe1c, 0xffffffff, 0x00000000,
+        0x830, 0xffffffff, 0x00000000,
+        0x834, 0xffffffff, 0x00000000,
+        0x838, 0xffffff00, 0x00000000,
+        0x86c, 0x000000ff, 0x00000000,
+        0x83c, 0xffffffff, 0x00000000,
+        0x848, 0xffffffff, 0x00000000,
+        0x84c, 0xffffffff, 0x00000000,
+        0x868, 0xffffffff, 0x00000000,
+};
+
+u32 RTL8192CURadioA_1T_HPArray[RTL8192CURadioA_1T_HPArrayLength] = {
+        0x000, 0x00030159,
+        0x001, 0x00031284,
+        0x002, 0x00098000,
+        0x003, 0x00018c63,
+        0x004, 0x000210e7,
+        0x009, 0x0002044f,
+        0x00a, 0x0001adb0,
+        0x00b, 0x00054867,
+        0x00c, 0x0008992e,
+        0x00d, 0x0000e529,
+        0x00e, 0x00039ce7,
+        0x00f, 0x00000451,
+        0x019, 0x00000000,
+        0x01a, 0x00000255,
+        0x01b, 0x00060a00,
+        0x01c, 0x000fc378,
+        0x01d, 0x000a1250,
+        0x01e, 0x0004445f,
+        0x01f, 0x00080001,
+        0x020, 0x0000b614,
+        0x021, 0x0006c000,
+        0x022, 0x0000083c,
+        0x023, 0x00001558,
+        0x024, 0x00000060,
+        0x025, 0x00000483,
+        0x026, 0x0004f000,
+        0x027, 0x000ec7d9,
+        0x028, 0x000977c0,
+        0x029, 0x00004783,
+        0x02a, 0x00000001,
+        0x02b, 0x00021334,
+        0x02a, 0x00000000,
+        0x02b, 0x00000054,
+        0x02a, 0x00000001,
+        0x02b, 0x00000808,
+        0x02b, 0x00053333,
+        0x02c, 0x0000000c,
+        0x02a, 0x00000002,
+        0x02b, 0x00000808,
+        0x02b, 0x0005b333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000003,
+        0x02b, 0x00000808,
+        0x02b, 0x00063333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000004,
+        0x02b, 0x00000808,
+        0x02b, 0x0006b333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000005,
+        0x02b, 0x00000808,
+        0x02b, 0x00073333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000006,
+        0x02b, 0x00000709,
+        0x02b, 0x0005b333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000007,
+        0x02b, 0x00000709,
+        0x02b, 0x00063333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000008,
+        0x02b, 0x0000060a,
+        0x02b, 0x0004b333,
+        0x02c, 0x0000000d,
+        0x02a, 0x00000009,
+        0x02b, 0x0000060a,
+        0x02b, 0x00053333,
+        0x02c, 0x0000000d,
+        0x02a, 0x0000000a,
+        0x02b, 0x0000060a,
+        0x02b, 0x0005b333,
+        0x02c, 0x0000000d,
+        0x02a, 0x0000000b,
+        0x02b, 0x0000060a,
+        0x02b, 0x00063333,
+        0x02c, 0x0000000d,
+        0x02a, 0x0000000c,
+        0x02b, 0x0000060a,
+        0x02b, 0x0006b333,
+        0x02c, 0x0000000d,
+        0x02a, 0x0000000d,
+        0x02b, 0x0000060a,
+        0x02b, 0x00073333,
+        0x02c, 0x0000000d,
+        0x02a, 0x0000000e,
+        0x02b, 0x0000050b,
+        0x02b, 0x00066666,
+        0x02c, 0x0000001a,
+        0x02a, 0x000e0000,
+        0x010, 0x0004000f,
+        0x011, 0x000e31fc,
+        0x010, 0x0006000f,
+        0x011, 0x000ff9f8,
+        0x010, 0x0002000f,
+        0x011, 0x000203f9,
+        0x010, 0x0003000f,
+        0x011, 0x000ff500,
+        0x010, 0x00000000,
+        0x011, 0x00000000,
+        0x010, 0x0008000f,
+        0x011, 0x0003f100,
+        0x010, 0x0009000f,
+        0x011, 0x00023100,
+        0x012, 0x000d8000,
+        0x012, 0x00090000,
+        0x012, 0x00051000,
+        0x012, 0x00012000,
+        0x013, 0x00028fb4,
+        0x013, 0x00024fa8,
+        0x013, 0x000207a4,
+        0x013, 0x0001c798,
+        0x013, 0x000183a4,
+        0x013, 0x00014398,
+        0x013, 0x000101a4,
+        0x013, 0x0000c198,
+        0x013, 0x000080a4,
+        0x013, 0x00004098,
+        0x013, 0x00000000,
+        0x014, 0x0001944c,
+        0x014, 0x00059444,
+        0x014, 0x0009944c,
+        0x014, 0x000d9444,
+        0x015, 0x0000f405,
+        0x015, 0x0004f405,
+        0x015, 0x0008f405,
+        0x015, 0x000cf405,
+        0x016, 0x000e0330,
+        0x016, 0x000a0330,
+        0x016, 0x00060330,
+        0x016, 0x00020330,
+        0x000, 0x00010159,
+        0x018, 0x0000f401,
+        0x0fe, 0x00000000,
+        0x0fe, 0x00000000,
+        0x01f, 0x00080003,
+        0x0fe, 0x00000000,
+        0x0fe, 0x00000000,
+        0x01e, 0x00044457,
+        0x01f, 0x00080000,
+        0x000, 0x00030159,
+};
+
+u32 Rtl8192CUAGCTAB_1T_HPArray[RTL8192CUAGCTAB_1T_HPArrayLength] = {
+        0xc78, 0x7b000001,
+        0xc78, 0x7b010001,
+        0xc78, 0x7b020001,
+        0xc78, 0x7b030001,
+        0xc78, 0x7b040001,
+        0xc78, 0x7b050001,
+        0xc78, 0x7b060001,
+        0xc78, 0x7b070001,
+        0xc78, 0x7b080001,
+        0xc78, 0x7a090001,
+        0xc78, 0x790a0001,
+        0xc78, 0x780b0001,
+        0xc78, 0x770c0001,
+        0xc78, 0x760d0001,
+        0xc78, 0x750e0001,
+        0xc78, 0x740f0001,
+        0xc78, 0x73100001,
+        0xc78, 0x72110001,
+        0xc78, 0x71120001,
+        0xc78, 0x70130001,
+        0xc78, 0x6f140001,
+        0xc78, 0x6e150001,
+        0xc78, 0x6d160001,
+        0xc78, 0x6c170001,
+        0xc78, 0x6b180001,
+        0xc78, 0x6a190001,
+        0xc78, 0x691a0001,
+        0xc78, 0x681b0001,
+        0xc78, 0x671c0001,
+        0xc78, 0x661d0001,
+        0xc78, 0x651e0001,
+        0xc78, 0x641f0001,
+        0xc78, 0x63200001,
+        0xc78, 0x62210001,
+        0xc78, 0x61220001,
+        0xc78, 0x60230001,
+        0xc78, 0x46240001,
+        0xc78, 0x45250001,
+        0xc78, 0x44260001,
+        0xc78, 0x43270001,
+        0xc78, 0x42280001,
+        0xc78, 0x41290001,
+        0xc78, 0x402a0001,
+        0xc78, 0x262b0001,
+        0xc78, 0x252c0001,
+        0xc78, 0x242d0001,
+        0xc78, 0x232e0001,
+        0xc78, 0x222f0001,
+        0xc78, 0x21300001,
+        0xc78, 0x20310001,
+        0xc78, 0x06320001,
+        0xc78, 0x05330001,
+        0xc78, 0x04340001,
+        0xc78, 0x03350001,
+        0xc78, 0x02360001,
+        0xc78, 0x01370001,
+        0xc78, 0x00380001,
+        0xc78, 0x00390001,
+        0xc78, 0x003a0001,
+        0xc78, 0x003b0001,
+        0xc78, 0x003c0001,
+        0xc78, 0x003d0001,
+        0xc78, 0x003e0001,
+        0xc78, 0x003f0001,
+        0xc78, 0x7b400001,
+        0xc78, 0x7b410001,
+        0xc78, 0x7b420001,
+        0xc78, 0x7b430001,
+        0xc78, 0x7b440001,
+        0xc78, 0x7b450001,
+        0xc78, 0x7b460001,
+        0xc78, 0x7b470001,
+        0xc78, 0x7b480001,
+        0xc78, 0x7a490001,
+        0xc78, 0x794a0001,
+        0xc78, 0x784b0001,
+        0xc78, 0x774c0001,
+        0xc78, 0x764d0001,
+        0xc78, 0x754e0001,
+        0xc78, 0x744f0001,
+        0xc78, 0x73500001,
+        0xc78, 0x72510001,
+        0xc78, 0x71520001,
+        0xc78, 0x70530001,
+        0xc78, 0x6f540001,
+        0xc78, 0x6e550001,
+        0xc78, 0x6d560001,
+        0xc78, 0x6c570001,
+        0xc78, 0x6b580001,
+        0xc78, 0x6a590001,
+        0xc78, 0x695a0001,
+        0xc78, 0x685b0001,
+        0xc78, 0x675c0001,
+        0xc78, 0x665d0001,
+        0xc78, 0x655e0001,
+        0xc78, 0x645f0001,
+        0xc78, 0x63600001,
+        0xc78, 0x62610001,
+        0xc78, 0x61620001,
+        0xc78, 0x60630001,
+        0xc78, 0x46640001,
+        0xc78, 0x45650001,
+        0xc78, 0x44660001,
+        0xc78, 0x43670001,
+        0xc78, 0x42680001,
+        0xc78, 0x41690001,
+        0xc78, 0x406a0001,
+        0xc78, 0x266b0001,
+        0xc78, 0x256c0001,
+        0xc78, 0x246d0001,
+        0xc78, 0x236e0001,
+        0xc78, 0x226f0001,
+        0xc78, 0x21700001,
+        0xc78, 0x20710001,
+        0xc78, 0x06720001,
+        0xc78, 0x05730001,
+        0xc78, 0x04740001,
+        0xc78, 0x03750001,
+        0xc78, 0x02760001,
+        0xc78, 0x01770001,
+        0xc78, 0x00780001,
+        0xc78, 0x00790001,
+        0xc78, 0x007a0001,
+        0xc78, 0x007b0001,
+        0xc78, 0x007c0001,
+        0xc78, 0x007d0001,
+        0xc78, 0x007e0001,
+        0xc78, 0x007f0001,
+        0xc78, 0x3800001e,
+        0xc78, 0x3801001e,
+        0xc78, 0x3802001e,
+        0xc78, 0x3803001e,
+        0xc78, 0x3804001e,
+        0xc78, 0x3805001e,
+        0xc78, 0x3806001e,
+        0xc78, 0x3807001e,
+        0xc78, 0x3808001e,
+        0xc78, 0x3c09001e,
+        0xc78, 0x3e0a001e,
+        0xc78, 0x400b001e,
+        0xc78, 0x440c001e,
+        0xc78, 0x480d001e,
+        0xc78, 0x4c0e001e,
+        0xc78, 0x500f001e,
+        0xc78, 0x5210001e,
+        0xc78, 0x5611001e,
+        0xc78, 0x5a12001e,
+        0xc78, 0x5e13001e,
+        0xc78, 0x6014001e,
+        0xc78, 0x6015001e,
+        0xc78, 0x6016001e,
+        0xc78, 0x6217001e,
+        0xc78, 0x6218001e,
+        0xc78, 0x6219001e,
+        0xc78, 0x621a001e,
+        0xc78, 0x621b001e,
+        0xc78, 0x621c001e,
+        0xc78, 0x621d001e,
+        0xc78, 0x621e001e,
+        0xc78, 0x621f001e,
+};
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/table.h b/drivers/net/wireless/rtlwifi/rtl8192cu/table.h
new file mode 100644
index 000000000000..c3d5cd826cfa
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192cu/table.h
@@ -0,0 +1,71 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#ifndef __RTL92CU_TABLE__H_
+#define __RTL92CU_TABLE__H_
+
+#include <linux/types.h>
+
+#define RTL8192CUPHY_REG_2TARRAY_LENGTH         374
+extern u32 RTL8192CUPHY_REG_2TARRAY[RTL8192CUPHY_REG_2TARRAY_LENGTH];
+#define RTL8192CUPHY_REG_1TARRAY_LENGTH         374
+extern u32 RTL8192CUPHY_REG_1TARRAY[RTL8192CUPHY_REG_1TARRAY_LENGTH];
+
+#define RTL8192CUPHY_REG_ARRAY_PGLENGTH         336
+extern u32 RTL8192CUPHY_REG_ARRAY_PG[RTL8192CUPHY_REG_ARRAY_PGLENGTH];
+
+#define RTL8192CURADIOA_2TARRAYLENGTH   282
+extern u32 RTL8192CURADIOA_2TARRAY[RTL8192CURADIOA_2TARRAYLENGTH];
+#define RTL8192CURADIOB_2TARRAYLENGTH   78
+extern u32 RTL8192CU_RADIOB_2TARRAY[RTL8192CURADIOB_2TARRAYLENGTH];
+#define RTL8192CURADIOA_1TARRAYLENGTH   282
+extern u32 RTL8192CU_RADIOA_1TARRAY[RTL8192CURADIOA_1TARRAYLENGTH];
+#define RTL8192CURADIOB_1TARRAYLENGTH   1
+extern u32 RTL8192CU_RADIOB_1TARRAY[RTL8192CURADIOB_1TARRAYLENGTH];
+
+#define RTL8192CUMAC_2T_ARRAYLENGTH             172
+extern u32 RTL8192CUMAC_2T_ARRAY[RTL8192CUMAC_2T_ARRAYLENGTH];
+
+#define RTL8192CUAGCTAB_2TARRAYLENGTH   320
+extern u32 RTL8192CUAGCTAB_2TARRAY[RTL8192CUAGCTAB_2TARRAYLENGTH];
+#define RTL8192CUAGCTAB_1TARRAYLENGTH   320
+extern u32 RTL8192CUAGCTAB_1TARRAY[RTL8192CUAGCTAB_1TARRAYLENGTH];
+
+#define RTL8192CUPHY_REG_1T_HPArrayLength 378
+extern u32 RTL8192CUPHY_REG_1T_HPArray[RTL8192CUPHY_REG_1T_HPArrayLength];
+
+#define RTL8192CUPHY_REG_Array_PG_HPLength 336
+extern u32 RTL8192CUPHY_REG_Array_PG_HP[RTL8192CUPHY_REG_Array_PG_HPLength];
+
+#define RTL8192CURadioA_1T_HPArrayLength 282
+extern u32 RTL8192CURadioA_1T_HPArray[RTL8192CURadioA_1T_HPArrayLength];
+#define RTL8192CUAGCTAB_1T_HPArrayLength 320
+extern u32 Rtl8192CUAGCTAB_1T_HPArray[RTL8192CUAGCTAB_1T_HPArrayLength];
+
+#endif
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/trx.c b/drivers/net/wireless/rtlwifi/rtl8192cu/trx.c
new file mode 100644
index 000000000000..9855c3e0a4b2
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192cu/trx.c
@@ -0,0 +1,684 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#include "../wifi.h"
+#include "../usb.h"
+#include "../ps.h"
+#include "../base.h"
+#include "reg.h"
+#include "def.h"
+#include "phy.h"
+#include "rf.h"
+#include "dm.h"
+#include "mac.h"
+#include "trx.h"
+
+static int _ConfigVerTOutEP(struct ieee80211_hw *hw)
+{
+        u8 ep_cfg, txqsele;
+        u8 ep_nums = 0;
+
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_usb_priv *usb_priv = rtl_usbpriv(hw);
+        struct rtl_usb *rtlusb = rtl_usbdev(usb_priv);
+
+        rtlusb->out_queue_sel = 0;
+        ep_cfg = rtl_read_byte(rtlpriv, REG_TEST_SIE_OPTIONAL);
+        ep_cfg = (ep_cfg & USB_TEST_EP_MASK) >> USB_TEST_EP_SHIFT;
+        switch (ep_cfg) {
+        case 0:         /* 2 bulk OUT, 1 bulk IN */
+        case 3:
+                rtlusb->out_queue_sel  = TX_SELE_HQ | TX_SELE_LQ;
+                ep_nums = 2;
+                break;
+        case 1: /* 1 bulk IN/OUT => map all endpoint to Low queue */
+        case 2: /* 1 bulk IN, 1 bulk OUT => map all endpoint to High queue */
+                txqsele = rtl_read_byte(rtlpriv, REG_TEST_USB_TXQS);
+                if (txqsele & 0x0F) /* /map all endpoint to High queue */
+                        rtlusb->out_queue_sel =  TX_SELE_HQ;
+                else if (txqsele&0xF0) /* map all endpoint to Low queue */
+                        rtlusb->out_queue_sel =  TX_SELE_LQ;
+                ep_nums = 1;
+                break;
+        default:
+                break;
+        }
+        return (rtlusb->out_ep_nums == ep_nums) ? 0 : -EINVAL;
+}
+
+static int _ConfigVerNOutEP(struct ieee80211_hw *hw)
+{
+        u8 ep_cfg;
+        u8 ep_nums = 0;
+
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_usb_priv *usb_priv = rtl_usbpriv(hw);
+        struct rtl_usb *rtlusb = rtl_usbdev(usb_priv);
+
+        rtlusb->out_queue_sel = 0;
+        /* Normal and High queue */
+        ep_cfg =  rtl_read_byte(rtlpriv, (REG_NORMAL_SIE_EP + 1));
+        if (ep_cfg & USB_NORMAL_SIE_EP_MASK) {
+                rtlusb->out_queue_sel |= TX_SELE_HQ;
+                ep_nums++;
+        }
+        if ((ep_cfg >> USB_NORMAL_SIE_EP_SHIFT) & USB_NORMAL_SIE_EP_MASK) {
+                rtlusb->out_queue_sel |= TX_SELE_NQ;
+                ep_nums++;
+        }
+        /* Low queue */
+        ep_cfg =  rtl_read_byte(rtlpriv, (REG_NORMAL_SIE_EP + 2));
+        if (ep_cfg & USB_NORMAL_SIE_EP_MASK) {
+                rtlusb->out_queue_sel |= TX_SELE_LQ;
+                ep_nums++;
+        }
+        return (rtlusb->out_ep_nums == ep_nums) ? 0 : -EINVAL;
+}
+
+static void _TwoOutEpMapping(struct ieee80211_hw *hw, bool bIsChipB,
+                             bool  bwificfg, struct rtl_ep_map *ep_map)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        if (bwificfg) { /* for WMM */
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
+                         ("USB Chip-B & WMM Setting.....\n"));
+                ep_map->ep_mapping[RTL_TXQ_BE]  = 2;
+                ep_map->ep_mapping[RTL_TXQ_BK]  = 3;
+                ep_map->ep_mapping[RTL_TXQ_VI]  = 3;
+                ep_map->ep_mapping[RTL_TXQ_VO] = 2;
+                ep_map->ep_mapping[RTL_TXQ_MGT] = 2;
+                ep_map->ep_mapping[RTL_TXQ_BCN] = 2;
+                ep_map->ep_mapping[RTL_TXQ_HI]  = 2;
+        } else { /* typical setting */
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
+                         ("USB typical Setting.....\n"));
+                ep_map->ep_mapping[RTL_TXQ_BE]  = 3;
+                ep_map->ep_mapping[RTL_TXQ_BK]  = 3;
+                ep_map->ep_mapping[RTL_TXQ_VI]  = 2;
+                ep_map->ep_mapping[RTL_TXQ_VO]  = 2;
+                ep_map->ep_mapping[RTL_TXQ_MGT] = 2;
+                ep_map->ep_mapping[RTL_TXQ_BCN] = 2;
+                ep_map->ep_mapping[RTL_TXQ_HI]  = 2;
+        }
+}
+
+static void _ThreeOutEpMapping(struct ieee80211_hw *hw, bool  bwificfg,
+                               struct rtl_ep_map *ep_map)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        if (bwificfg) { /* for WMM */
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
+                         ("USB 3EP Setting for WMM.....\n"));
+                ep_map->ep_mapping[RTL_TXQ_BE]  = 5;
+                ep_map->ep_mapping[RTL_TXQ_BK]  = 3;
+                ep_map->ep_mapping[RTL_TXQ_VI]  = 3;
+                ep_map->ep_mapping[RTL_TXQ_VO]  = 2;
+                ep_map->ep_mapping[RTL_TXQ_MGT] = 2;
+                ep_map->ep_mapping[RTL_TXQ_BCN] = 2;
+                ep_map->ep_mapping[RTL_TXQ_HI]  = 2;
+        } else { /* typical setting */
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
+                         ("USB 3EP Setting for typical.....\n"));
+                ep_map->ep_mapping[RTL_TXQ_BE]  = 5;
+                ep_map->ep_mapping[RTL_TXQ_BK]  = 5;
+                ep_map->ep_mapping[RTL_TXQ_VI]  = 3;
+                ep_map->ep_mapping[RTL_TXQ_VO]  = 2;
+                ep_map->ep_mapping[RTL_TXQ_MGT] = 2;
+                ep_map->ep_mapping[RTL_TXQ_BCN] = 2;
+                ep_map->ep_mapping[RTL_TXQ_HI]  = 2;
+        }
+}
+
+static void _OneOutEpMapping(struct ieee80211_hw *hw, struct rtl_ep_map *ep_map)
+{
+        ep_map->ep_mapping[RTL_TXQ_BE]  = 2;
+        ep_map->ep_mapping[RTL_TXQ_BK]  = 2;
+        ep_map->ep_mapping[RTL_TXQ_VI]  = 2;
+        ep_map->ep_mapping[RTL_TXQ_VO] = 2;
+        ep_map->ep_mapping[RTL_TXQ_MGT] = 2;
+        ep_map->ep_mapping[RTL_TXQ_BCN] = 2;
+        ep_map->ep_mapping[RTL_TXQ_HI]  = 2;
+}
+static int _out_ep_mapping(struct ieee80211_hw *hw)
+{
+        int err = 0;
+        bool bIsChipN, bwificfg = false;
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        struct rtl_usb_priv *usb_priv = rtl_usbpriv(hw);
+        struct rtl_usb *rtlusb = rtl_usbdev(usb_priv);
+        struct rtl_ep_map *ep_map = &(rtlusb->ep_map);
+
+        bIsChipN = IS_NORMAL_CHIP(rtlhal->version);
+        switch (rtlusb->out_ep_nums) {
+        case 2:
+                _TwoOutEpMapping(hw, bIsChipN, bwificfg, ep_map);
+                break;
+        case 3:
+                /* Test chip doesn't support three out EPs. */
+                if (!bIsChipN) {
+                        err  =  -EINVAL;
+                        goto err_out;
+                }
+                _ThreeOutEpMapping(hw, bIsChipN, ep_map);
+                break;
+        case 1:
+                _OneOutEpMapping(hw, ep_map);
+                break;
+        default:
+                err  =  -EINVAL;
+                break;
+        }
+err_out:
+        return err;
+
+}
+/* endpoint mapping */
+int  rtl8192cu_endpoint_mapping(struct ieee80211_hw *hw)
+{
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        int error = 0;
+        if (likely(IS_NORMAL_CHIP(rtlhal->version)))
+                error = _ConfigVerNOutEP(hw);
+        else
+                error = _ConfigVerTOutEP(hw);
+        if (error)
+                goto err_out;
+        error = _out_ep_mapping(hw);
+        if (error)
+                goto err_out;
+err_out:
+        return error;
+}
+
+u16 rtl8192cu_mq_to_hwq(__le16 fc, u16 mac80211_queue_index)
+{
+        u16 hw_queue_index;
+
+        if (unlikely(ieee80211_is_beacon(fc))) {
+                hw_queue_index = RTL_TXQ_BCN;
+                goto out;
+        }
+        if (ieee80211_is_mgmt(fc)) {
+                hw_queue_index = RTL_TXQ_MGT;
+                goto out;
+        }
+        switch (mac80211_queue_index) {
+        case 0:
+                hw_queue_index = RTL_TXQ_VO;
+                break;
+        case 1:
+                hw_queue_index = RTL_TXQ_VI;
+                break;
+        case 2:
+                hw_queue_index = RTL_TXQ_BE;
+                break;
+        case 3:
+                hw_queue_index = RTL_TXQ_BK;
+                break;
+        default:
+                hw_queue_index = RTL_TXQ_BE;
+                RT_ASSERT(false, ("QSLT_BE queue, skb_queue:%d\n",
+                          mac80211_queue_index));
+                break;
+        }
+out:
+        return hw_queue_index;
+}
+
+static enum rtl_desc_qsel _rtl8192cu_mq_to_descq(struct ieee80211_hw *hw,
+                                         __le16 fc, u16 mac80211_queue_index)
+{
+        enum rtl_desc_qsel qsel;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        if (unlikely(ieee80211_is_beacon(fc))) {
+                qsel = QSLT_BEACON;
+                goto out;
+        }
+        if (ieee80211_is_mgmt(fc)) {
+                qsel = QSLT_MGNT;
+                goto out;
+        }
+        switch (mac80211_queue_index) {
+        case 0: /* VO */
+                qsel = QSLT_VO;
+                RT_TRACE(rtlpriv, COMP_USB, DBG_DMESG,
+                         ("VO queue, set qsel = 0x%x\n", QSLT_VO));
+                break;
+        case 1: /* VI */
+                qsel = QSLT_VI;
+                RT_TRACE(rtlpriv, COMP_USB, DBG_DMESG,
+                         ("VI queue, set qsel = 0x%x\n", QSLT_VI));
+                break;
+        case 3: /* BK */
+                qsel = QSLT_BK;
+                RT_TRACE(rtlpriv, COMP_USB, DBG_DMESG,
+                         ("BK queue, set qsel = 0x%x\n", QSLT_BK));
+                break;
+        case 2: /* BE */
+        default:
+                qsel = QSLT_BE;
+                RT_TRACE(rtlpriv, COMP_USB, DBG_DMESG,
+                         ("BE queue, set qsel = 0x%x\n", QSLT_BE));
+                break;
+        }
+out:
+        return qsel;
+}
+
+/* =============================================================== */
+
+/*----------------------------------------------------------------------
+ *
+ *      Rx handler
+ *
+ *---------------------------------------------------------------------- */
+bool rtl92cu_rx_query_desc(struct ieee80211_hw *hw,
+                           struct rtl_stats *stats,
+                           struct ieee80211_rx_status *rx_status,
+                           u8 *p_desc, struct sk_buff *skb)
+{
+        struct rx_fwinfo_92c *p_drvinfo;
+        struct rx_desc_92c *pdesc = (struct rx_desc_92c *)p_desc;
+        u32 phystatus = GET_RX_DESC_PHY_STATUS(pdesc);
+
+        stats->length = (u16) GET_RX_DESC_PKT_LEN(pdesc);
+        stats->rx_drvinfo_size = (u8)GET_RX_DESC_DRVINFO_SIZE(pdesc) *
+                                 RX_DRV_INFO_SIZE_UNIT;
+        stats->rx_bufshift = (u8) (GET_RX_DESC_SHIFT(pdesc) & 0x03);
+        stats->icv = (u16) GET_RX_DESC_ICV(pdesc);
+        stats->crc = (u16) GET_RX_DESC_CRC32(pdesc);
+        stats->hwerror = (stats->crc | stats->icv);
+        stats->decrypted = !GET_RX_DESC_SWDEC(pdesc);
+        stats->rate = (u8) GET_RX_DESC_RX_MCS(pdesc);
+        stats->shortpreamble = (u16) GET_RX_DESC_SPLCP(pdesc);
+        stats->isampdu = (bool) (GET_RX_DESC_PAGGR(pdesc) == 1);
+        stats->isampdu = (bool) ((GET_RX_DESC_PAGGR(pdesc) == 1)
+                                   && (GET_RX_DESC_FAGGR(pdesc) == 1));
+        stats->timestamp_low = GET_RX_DESC_TSFL(pdesc);
+        stats->rx_is40Mhzpacket = (bool) GET_RX_DESC_BW(pdesc);
+        rx_status->freq = hw->conf.channel->center_freq;
+        rx_status->band = hw->conf.channel->band;
+        if (GET_RX_DESC_CRC32(pdesc))
+                rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
+        if (!GET_RX_DESC_SWDEC(pdesc))
+                rx_status->flag |= RX_FLAG_DECRYPTED;
+        if (GET_RX_DESC_BW(pdesc))
+                rx_status->flag |= RX_FLAG_40MHZ;
+        if (GET_RX_DESC_RX_HT(pdesc))
+                rx_status->flag |= RX_FLAG_HT;
+        rx_status->flag |= RX_FLAG_TSFT;
+        if (stats->decrypted)
+                rx_status->flag |= RX_FLAG_DECRYPTED;
+        rx_status->rate_idx = _rtl92c_rate_mapping(hw,
+                                                (bool)GET_RX_DESC_RX_HT(pdesc),
+                                                (u8)GET_RX_DESC_RX_MCS(pdesc),
+                                                (bool)GET_RX_DESC_PAGGR(pdesc));
+        rx_status->mactime = GET_RX_DESC_TSFL(pdesc);
+        if (phystatus == true) {
+                p_drvinfo = (struct rx_fwinfo_92c *)(pdesc + RTL_RX_DESC_SIZE);
+                rtl92c_translate_rx_signal_stuff(hw, skb, stats, pdesc,
+                                                 p_drvinfo);
+        }
+        /*rx_status->qual = stats->signal; */
+        rx_status->signal = stats->rssi + 10;
+        /*rx_status->noise = -stats->noise; */
+        return true;
+}
+
+#define RTL_RX_DRV_INFO_UNIT            8
+
+static void _rtl_rx_process(struct ieee80211_hw *hw, struct sk_buff *skb)
+{
+        struct ieee80211_rx_status *rx_status =
+                 (struct ieee80211_rx_status *)IEEE80211_SKB_RXCB(skb);
+        u32 skb_len, pkt_len, drvinfo_len;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u8 *rxdesc;
+        struct rtl_stats stats = {
+                .signal = 0,
+                .noise = -98,
+                .rate = 0,
+        };
+        struct rx_fwinfo_92c *p_drvinfo;
+        bool bv;
+        __le16 fc;
+        struct ieee80211_hdr *hdr;
+
+        memset(rx_status, 0, sizeof(rx_status));
+        rxdesc  = skb->data;
+        skb_len = skb->len;
+        drvinfo_len = (GET_RX_DESC_DRVINFO_SIZE(rxdesc) * RTL_RX_DRV_INFO_UNIT);
+        pkt_len         = GET_RX_DESC_PKT_LEN(rxdesc);
+        /* TODO: Error recovery. drop this skb or something. */
+        WARN_ON(skb_len < (pkt_len + RTL_RX_DESC_SIZE + drvinfo_len));
+        stats.length = (u16) GET_RX_DESC_PKT_LEN(rxdesc);
+        stats.rx_drvinfo_size = (u8)GET_RX_DESC_DRVINFO_SIZE(rxdesc) *
+                                RX_DRV_INFO_SIZE_UNIT;
+        stats.rx_bufshift = (u8) (GET_RX_DESC_SHIFT(rxdesc) & 0x03);
+        stats.icv = (u16) GET_RX_DESC_ICV(rxdesc);
+        stats.crc = (u16) GET_RX_DESC_CRC32(rxdesc);
+        stats.hwerror = (stats.crc | stats.icv);
+        stats.decrypted = !GET_RX_DESC_SWDEC(rxdesc);
+        stats.rate = (u8) GET_RX_DESC_RX_MCS(rxdesc);
+        stats.shortpreamble = (u16) GET_RX_DESC_SPLCP(rxdesc);
+        stats.isampdu = (bool) ((GET_RX_DESC_PAGGR(rxdesc) == 1)
+                                   && (GET_RX_DESC_FAGGR(rxdesc) == 1));
+        stats.timestamp_low = GET_RX_DESC_TSFL(rxdesc);
+        stats.rx_is40Mhzpacket = (bool) GET_RX_DESC_BW(rxdesc);
+        /* TODO: is center_freq changed when doing scan? */
+        /* TODO: Shall we add protection or just skip those two step? */
+        rx_status->freq = hw->conf.channel->center_freq;
+        rx_status->band = hw->conf.channel->band;
+        if (GET_RX_DESC_CRC32(rxdesc))
+                rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
+        if (!GET_RX_DESC_SWDEC(rxdesc))
+                rx_status->flag |= RX_FLAG_DECRYPTED;
+        if (GET_RX_DESC_BW(rxdesc))
+                rx_status->flag |= RX_FLAG_40MHZ;
+        if (GET_RX_DESC_RX_HT(rxdesc))
+                rx_status->flag |= RX_FLAG_HT;
+        /* Data rate */
+        rx_status->rate_idx = _rtl92c_rate_mapping(hw,
+                                                (bool)GET_RX_DESC_RX_HT(rxdesc),
+                                                (u8)GET_RX_DESC_RX_MCS(rxdesc),
+                                                (bool)GET_RX_DESC_PAGGR(rxdesc)
+                                                );
+        /*  There is a phy status after this rx descriptor. */
+        if (GET_RX_DESC_PHY_STATUS(rxdesc)) {
+                p_drvinfo = (struct rx_fwinfo_92c *)(rxdesc + RTL_RX_DESC_SIZE);
+                rtl92c_translate_rx_signal_stuff(hw, skb, &stats,
+                                 (struct rx_desc_92c *)rxdesc, p_drvinfo);
+        }
+        skb_pull(skb, (drvinfo_len + RTL_RX_DESC_SIZE));
+        hdr = (struct ieee80211_hdr *)(skb->data);
+        fc = hdr->frame_control;
+        bv = ieee80211_is_probe_resp(fc);
+        if (bv)
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
+                         ("Got probe response frame.\n"));
+        if (ieee80211_is_beacon(fc))
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
+                         ("Got beacon frame.\n"));
+        if (ieee80211_is_data(fc))
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, ("Got data frame.\n"));
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
+                 ("Fram: fc = 0x%X addr1 = 0x%02X:0x%02X:0x%02X:0x%02X:0x%02X:"
+                 "0x%02X\n", fc, (u32)hdr->addr1[0], (u32)hdr->addr1[1],
+                 (u32)hdr->addr1[2], (u32)hdr->addr1[3], (u32)hdr->addr1[4],
+                 (u32)hdr->addr1[5]));
+        memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
+        ieee80211_rx_irqsafe(hw, skb);
+}
+
+void  rtl8192cu_rx_hdl(struct ieee80211_hw *hw, struct sk_buff * skb)
+{
+        _rtl_rx_process(hw, skb);
+}
+
+void rtl8192c_rx_segregate_hdl(
+        struct ieee80211_hw *hw,
+        struct sk_buff *skb,
+        struct sk_buff_head *skb_list)
+{
+}
+
+/*----------------------------------------------------------------------
+ *
+ *      Tx handler
+ *
+ *---------------------------------------------------------------------- */
+void rtl8192c_tx_cleanup(struct ieee80211_hw *hw, struct sk_buff  *skb)
+{
+}
+
+int rtl8192c_tx_post_hdl(struct ieee80211_hw *hw, struct urb *urb,
+                         struct sk_buff *skb)
+{
+        return 0;
+}
+
+struct sk_buff *rtl8192c_tx_aggregate_hdl(struct ieee80211_hw *hw,
+                                           struct sk_buff_head *list)
+{
+        return skb_dequeue(list);
+}
+
+/*======================================== trx ===============================*/
+
+static void _rtl_fill_usb_tx_desc(u8 *txdesc)
+{
+        SET_TX_DESC_OWN(txdesc, 1);
+        SET_TX_DESC_LAST_SEG(txdesc, 1);
+        SET_TX_DESC_FIRST_SEG(txdesc, 1);
+}
+/**
+ *      For HW recovery information
+ */
+static void _rtl_tx_desc_checksum(u8 *txdesc)
+{
+        u16 *ptr = (u16 *)txdesc;
+        u16     checksum = 0;
+        u32 index;
+
+        /* Clear first */
+        SET_TX_DESC_TX_DESC_CHECKSUM(txdesc, 0);
+        for (index = 0; index < 16; index++)
+                checksum = checksum ^ (*(ptr + index));
+        SET_TX_DESC_TX_DESC_CHECKSUM(txdesc, checksum);
+}
+
+void rtl92cu_tx_fill_desc(struct ieee80211_hw *hw,
+                          struct ieee80211_hdr *hdr, u8 *pdesc_tx,
+                          struct ieee80211_tx_info *info, struct sk_buff *skb,
+                          unsigned int queue_index)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+        bool defaultadapter = true;
+        struct ieee80211_sta *sta = ieee80211_find_sta(mac->vif, mac->bssid);
+        struct rtl_tcb_desc tcb_desc;
+        u8 *qc = ieee80211_get_qos_ctl(hdr);
+        u8 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
+        u16 seq_number;
+        __le16 fc = hdr->frame_control;
+        u8 rate_flag = info->control.rates[0].flags;
+        u16 pktlen = skb->len;
+        enum rtl_desc_qsel fw_qsel = _rtl8192cu_mq_to_descq(hw, fc,
+                                                skb_get_queue_mapping(skb));
+        u8 *txdesc;
+
+        seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
+        rtl_get_tcb_desc(hw, info, skb, &tcb_desc);
+        txdesc = (u8 *)skb_push(skb, RTL_TX_HEADER_SIZE);
+        memset(txdesc, 0, RTL_TX_HEADER_SIZE);
+        SET_TX_DESC_PKT_SIZE(txdesc, pktlen);
+        SET_TX_DESC_LINIP(txdesc, 0);
+        SET_TX_DESC_PKT_OFFSET(txdesc, RTL_DUMMY_OFFSET);
+        SET_TX_DESC_OFFSET(txdesc, RTL_TX_HEADER_SIZE);
+        SET_TX_DESC_TX_RATE(txdesc, tcb_desc.hw_rate);
+        if (tcb_desc.use_shortgi || tcb_desc.use_shortpreamble)
+                SET_TX_DESC_DATA_SHORTGI(txdesc, 1);
+        if (mac->tids[tid].agg.agg_state == RTL_AGG_ON &&
+                    info->flags & IEEE80211_TX_CTL_AMPDU) {
+                SET_TX_DESC_AGG_ENABLE(txdesc, 1);
+                SET_TX_DESC_MAX_AGG_NUM(txdesc, 0x14);
+        } else {
+                SET_TX_DESC_AGG_BREAK(txdesc, 1);
+        }
+        SET_TX_DESC_SEQ(txdesc, seq_number);
+        SET_TX_DESC_RTS_ENABLE(txdesc, ((tcb_desc.rts_enable &&
+                               !tcb_desc.cts_enable) ? 1 : 0));
+        SET_TX_DESC_HW_RTS_ENABLE(txdesc, ((tcb_desc.rts_enable ||
+                                  tcb_desc.cts_enable) ? 1 : 0));
+        SET_TX_DESC_CTS2SELF(txdesc, ((tcb_desc.cts_enable) ? 1 : 0));
+        SET_TX_DESC_RTS_STBC(txdesc, ((tcb_desc.rts_stbc) ? 1 : 0));
+        SET_TX_DESC_RTS_RATE(txdesc, tcb_desc.rts_rate);
+        SET_TX_DESC_RTS_BW(txdesc, 0);
+        SET_TX_DESC_RTS_SC(txdesc, tcb_desc.rts_sc);
+        SET_TX_DESC_RTS_SHORT(txdesc,
+                              ((tcb_desc.rts_rate <= DESC92C_RATE54M) ?
+                               (tcb_desc.rts_use_shortpreamble ? 1 : 0)
+                               : (tcb_desc.rts_use_shortgi ? 1 : 0)));
+        if (mac->bw_40) {
+                if (tcb_desc.packet_bw) {
+                        SET_TX_DESC_DATA_BW(txdesc, 1);
+                        SET_TX_DESC_DATA_SC(txdesc, 3);
+                } else {
+                        SET_TX_DESC_DATA_BW(txdesc, 0);
+                                if (rate_flag & IEEE80211_TX_RC_DUP_DATA)
+                                        SET_TX_DESC_DATA_SC(txdesc,
+                                                          mac->cur_40_prime_sc);
+                        }
+        } else {
+                SET_TX_DESC_DATA_BW(txdesc, 0);
+                SET_TX_DESC_DATA_SC(txdesc, 0);
+        }
+        if (sta) {
+                u8 ampdu_density = sta->ht_cap.ampdu_density;
+                SET_TX_DESC_AMPDU_DENSITY(txdesc, ampdu_density);
+        }
+        if (info->control.hw_key) {
+                struct ieee80211_key_conf *keyconf = info->control.hw_key;
+                switch (keyconf->cipher) {
+                case WLAN_CIPHER_SUITE_WEP40:
+                case WLAN_CIPHER_SUITE_WEP104:
+                case WLAN_CIPHER_SUITE_TKIP:
+                        SET_TX_DESC_SEC_TYPE(txdesc, 0x1);
+                        break;
+                case WLAN_CIPHER_SUITE_CCMP:
+                        SET_TX_DESC_SEC_TYPE(txdesc, 0x3);
+                        break;
+                default:
+                        SET_TX_DESC_SEC_TYPE(txdesc, 0x0);
+                        break;
+                }
+        }
+        SET_TX_DESC_PKT_ID(txdesc, 0);
+        SET_TX_DESC_QUEUE_SEL(txdesc, fw_qsel);
+        SET_TX_DESC_DATA_RATE_FB_LIMIT(txdesc, 0x1F);
+        SET_TX_DESC_RTS_RATE_FB_LIMIT(txdesc, 0xF);
+        SET_TX_DESC_DISABLE_FB(txdesc, 0);
+        SET_TX_DESC_USE_RATE(txdesc, tcb_desc.use_driver_rate ? 1 : 0);
+        if (ieee80211_is_data_qos(fc)) {
+                if (mac->rdg_en) {
+                        RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
+                                 ("Enable RDG function.\n"));
+                        SET_TX_DESC_RDG_ENABLE(txdesc, 1);
+                        SET_TX_DESC_HTC(txdesc, 1);
+                }
+        }
+        if (rtlpriv->dm.useramask) {
+                SET_TX_DESC_RATE_ID(txdesc, tcb_desc.ratr_index);
+                SET_TX_DESC_MACID(txdesc, tcb_desc.mac_id);
+        } else {
+                SET_TX_DESC_RATE_ID(txdesc, 0xC + tcb_desc.ratr_index);
+                SET_TX_DESC_MACID(txdesc, tcb_desc.ratr_index);
+        }
+        if ((!ieee80211_is_data_qos(fc)) && ppsc->leisure_ps &&
+              ppsc->fwctrl_lps) {
+                SET_TX_DESC_HWSEQ_EN(txdesc, 1);
+                SET_TX_DESC_PKT_ID(txdesc, 8);
+                if (!defaultadapter)
+                        SET_TX_DESC_QOS(txdesc, 1);
+        }
+        if (ieee80211_has_morefrags(fc))
+                SET_TX_DESC_MORE_FRAG(txdesc, 1);
+        if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) ||
+            is_broadcast_ether_addr(ieee80211_get_DA(hdr)))
+                SET_TX_DESC_BMC(txdesc, 1);
+        _rtl_fill_usb_tx_desc(txdesc);
+        _rtl_tx_desc_checksum(txdesc);
+        RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, (" %s ==>\n", __func__));
+}
+
+void rtl92cu_fill_fake_txdesc(struct ieee80211_hw *hw, u8 * pDesc,
+                              u32 buffer_len, bool bIsPsPoll)
+{
+        /* Clear all status */
+        memset(pDesc, 0, RTL_TX_HEADER_SIZE);
+        SET_TX_DESC_FIRST_SEG(pDesc, 1); /* bFirstSeg; */
+        SET_TX_DESC_LAST_SEG(pDesc, 1); /* bLastSeg; */
+        SET_TX_DESC_OFFSET(pDesc, RTL_TX_HEADER_SIZE); /* Offset = 32 */
+        SET_TX_DESC_PKT_SIZE(pDesc, buffer_len); /* Buffer size + command hdr */
+        SET_TX_DESC_QUEUE_SEL(pDesc, QSLT_MGNT); /* Fixed queue of Mgnt queue */
+        /* Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error
+         * vlaue by Hw. */
+        if (bIsPsPoll) {
+                SET_TX_DESC_NAV_USE_HDR(pDesc, 1);
+        } else {
+                SET_TX_DESC_HWSEQ_EN(pDesc, 1); /* Hw set sequence number */
+                SET_TX_DESC_PKT_ID(pDesc, 0x100); /* set bit3 to 1. */
+        }
+        SET_TX_DESC_USE_RATE(pDesc, 1); /* use data rate which is set by Sw */
+        SET_TX_DESC_OWN(pDesc, 1);
+        SET_TX_DESC_TX_RATE(pDesc, DESC92C_RATE1M);
+        _rtl_tx_desc_checksum(pDesc);
+}
+
+void rtl92cu_tx_fill_cmddesc(struct ieee80211_hw *hw,
+                             u8 *pdesc, bool firstseg,
+                             bool lastseg, struct sk_buff *skb)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u8 fw_queue = QSLT_BEACON;
+        struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
+        __le16 fc = hdr->frame_control;
+
+        memset((void *)pdesc, 0, RTL_TX_HEADER_SIZE);
+        if (firstseg)
+                SET_TX_DESC_OFFSET(pdesc, RTL_TX_HEADER_SIZE);
+        SET_TX_DESC_TX_RATE(pdesc, DESC92C_RATE1M);
+        SET_TX_DESC_SEQ(pdesc, 0);
+        SET_TX_DESC_LINIP(pdesc, 0);
+        SET_TX_DESC_QUEUE_SEL(pdesc, fw_queue);
+        SET_TX_DESC_FIRST_SEG(pdesc, 1);
+        SET_TX_DESC_LAST_SEG(pdesc, 1);
+        SET_TX_DESC_RATE_ID(pdesc, 7);
+        SET_TX_DESC_MACID(pdesc, 0);
+        SET_TX_DESC_OWN(pdesc, 1);
+        SET_TX_DESC_PKT_SIZE((u8 *) pdesc, (u16) (skb->len));
+        SET_TX_DESC_FIRST_SEG(pdesc, 1);
+        SET_TX_DESC_LAST_SEG(pdesc, 1);
+        SET_TX_DESC_OFFSET(pdesc, 0x20);
+        SET_TX_DESC_USE_RATE(pdesc, 1);
+        if (!ieee80211_is_data_qos(fc)) {
+                SET_TX_DESC_HWSEQ_EN(pdesc, 1);
+                SET_TX_DESC_PKT_ID(pdesc, 8);
+        }
+        RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD, "H2C Tx Cmd Content\n",
+                      pdesc, RTL_TX_DESC_SIZE);
+}
+
+bool rtl92cu_cmd_send_packet(struct ieee80211_hw *hw, struct sk_buff *skb)
+{
+        return true;
+}
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/trx.h b/drivers/net/wireless/rtlwifi/rtl8192cu/trx.h
new file mode 100644
index 000000000000..b396d46edbb7
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8192cu/trx.h
@@ -0,0 +1,430 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2010  Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ * Larry Finger <Larry.Finger@lwfinger.net>
+ *
+ *****************************************************************************/
+
+#ifndef __RTL92CU_TRX_H__
+#define __RTL92CU_TRX_H__
+
+#define RTL92C_USB_BULK_IN_NUM                  1
+#define RTL92C_NUM_RX_URBS                      8
+#define RTL92C_NUM_TX_URBS                      32
+
+#define RTL92C_SIZE_MAX_RX_BUFFER               15360   /* 8192 */
+#define RX_DRV_INFO_SIZE_UNIT                   8
+
+enum usb_rx_agg_mode {
+        USB_RX_AGG_DISABLE,
+        USB_RX_AGG_DMA,
+        USB_RX_AGG_USB,
+        USB_RX_AGG_DMA_USB
+};
+
+#define TX_SELE_HQ                              BIT(0)  /* High Queue */
+#define TX_SELE_LQ                              BIT(1)  /* Low Queue */
+#define TX_SELE_NQ                              BIT(2)  /* Normal Queue */
+
+#define RTL_USB_TX_AGG_NUM_DESC                 5
+
+#define RTL_USB_RX_AGG_PAGE_NUM                 4
+#define RTL_USB_RX_AGG_PAGE_TIMEOUT             3
+
+#define RTL_USB_RX_AGG_BLOCK_NUM                5
+#define RTL_USB_RX_AGG_BLOCK_TIMEOUT            3
+
+/*======================== rx status =========================================*/
+
+struct rx_drv_info_92c {
+        /*
+         * Driver info contain PHY status and other variabel size info
+         * PHY Status content as below
+         */
+
+        /* DWORD 0 */
+        u8 gain_trsw[4];
+
+        /* DWORD 1 */
+        u8 pwdb_all;
+        u8 cfosho[4];
+
+        /* DWORD 2 */
+        u8 cfotail[4];
+
+        /* DWORD 3 */
+        s8 rxevm[2];
+        s8 rxsnr[4];
+
+        /* DWORD 4 */
+        u8 pdsnr[2];
+
+        /* DWORD 5 */
+        u8 csi_current[2];
+        u8 csi_target[2];
+
+        /* DWORD 6 */
+        u8 sigevm;
+        u8 max_ex_pwr;
+        u8 ex_intf_flag:1;
+        u8 sgi_en:1;
+        u8 rxsc:2;
+        u8 reserve:4;
+} __packed;
+
+/* Define a macro that takes a le32 word, converts it to host ordering,
+ * right shifts by a specified count, creates a mask of the specified
+ * bit count, and extracts that number of bits.
+ */
+
+#define SHIFT_AND_MASK_LE(__pdesc, __shift, __bits)             \
+        ((le32_to_cpu(*(((__le32 *)(__pdesc)))) >> (__shift)) & \
+        BIT_LEN_MASK_32(__bits))
+
+/* Define a macro that clears a bit field in an le32 word and
+ * sets the specified value into that bit field. The resulting
+ * value remains in le32 ordering; however, it is properly converted
+ * to host ordering for the clear and set operations before conversion
+ * back to le32.
+ */
+
+#define SET_BITS_OFFSET_LE(__pdesc, __shift, __len, __val)      \
+        (*(__le32 *)(__pdesc) =                                 \
+        (cpu_to_le32((le32_to_cpu(*((__le32 *)(__pdesc))) &     \
+        (~(BIT_OFFSET_LEN_MASK_32((__shift), __len)))) |                \
+        (((u32)(__val) & BIT_LEN_MASK_32(__len)) << (__shift)))));
+
+/* macros to read various fields in RX descriptor */
+
+/* DWORD 0 */
+#define GET_RX_DESC_PKT_LEN(__rxdesc)           \
+        SHIFT_AND_MASK_LE((__rxdesc), 0, 14)
+#define GET_RX_DESC_CRC32(__rxdesc)             \
+        SHIFT_AND_MASK_LE(__rxdesc, 14, 1)
+#define GET_RX_DESC_ICV(__rxdesc)               \
+        SHIFT_AND_MASK_LE(__rxdesc, 15, 1)
+#define GET_RX_DESC_DRVINFO_SIZE(__rxdesc)      \
+        SHIFT_AND_MASK_LE(__rxdesc, 16, 4)
+#define GET_RX_DESC_SECURITY(__rxdesc)          \
+        SHIFT_AND_MASK_LE(__rxdesc, 20, 3)
+#define GET_RX_DESC_QOS(__rxdesc)               \
+        SHIFT_AND_MASK_LE(__rxdesc, 23, 1)
+#define GET_RX_DESC_SHIFT(__rxdesc)             \
+        SHIFT_AND_MASK_LE(__rxdesc, 24, 2)
+#define GET_RX_DESC_PHY_STATUS(__rxdesc)        \
+        SHIFT_AND_MASK_LE(__rxdesc, 26, 1)
+#define GET_RX_DESC_SWDEC(__rxdesc)             \
+        SHIFT_AND_MASK_LE(__rxdesc, 27, 1)
+#define GET_RX_DESC_LAST_SEG(__rxdesc)          \
+        SHIFT_AND_MASK_LE(__rxdesc, 28, 1)
+#define GET_RX_DESC_FIRST_SEG(__rxdesc)         \
+        SHIFT_AND_MASK_LE(__rxdesc, 29, 1)
+#define GET_RX_DESC_EOR(__rxdesc)               \
+        SHIFT_AND_MASK_LE(__rxdesc, 30, 1)
+#define GET_RX_DESC_OWN(__rxdesc)               \
+        SHIFT_AND_MASK_LE(__rxdesc, 31, 1)
+
+/* DWORD 1 */
+#define GET_RX_DESC_MACID(__rxdesc)             \
+        SHIFT_AND_MASK_LE(__rxdesc+4, 0, 5)
+#define GET_RX_DESC_TID(__rxdesc)               \
+        SHIFT_AND_MASK_LE(__rxdesc+4, 5, 4)
+#define GET_RX_DESC_PAGGR(__rxdesc)             \
+        SHIFT_AND_MASK_LE(__rxdesc+4, 14, 1)
+#define GET_RX_DESC_FAGGR(__rxdesc)             \
+        SHIFT_AND_MASK_LE(__rxdesc+4, 15, 1)
+#define GET_RX_DESC_A1_FIT(__rxdesc)            \
+        SHIFT_AND_MASK_LE(__rxdesc+4, 16, 4)
+#define GET_RX_DESC_A2_FIT(__rxdesc)            \
+        SHIFT_AND_MASK_LE(__rxdesc+4, 20, 4)
+#define GET_RX_DESC_PAM(__rxdesc)               \
+        SHIFT_AND_MASK_LE(__rxdesc+4, 24, 1)
+#define GET_RX_DESC_PWR(__rxdesc)               \
+        SHIFT_AND_MASK_LE(__rxdesc+4, 25, 1)
+#define GET_RX_DESC_MORE_DATA(__rxdesc)         \
+        SHIFT_AND_MASK_LE(__rxdesc+4, 26, 1)
+#define GET_RX_DESC_MORE_FRAG(__rxdesc)         \
+        SHIFT_AND_MASK_LE(__rxdesc+4, 27, 1)
+#define GET_RX_DESC_TYPE(__rxdesc)              \
+        SHIFT_AND_MASK_LE(__rxdesc+4, 28, 2)
+#define GET_RX_DESC_MC(__rxdesc)                \
+        SHIFT_AND_MASK_LE(__rxdesc+4, 30, 1)
+#define GET_RX_DESC_BC(__rxdesc)                \
+        SHIFT_AND_MASK_LE(__rxdesc+4, 31, 1)
+
+/* DWORD 2 */
+#define GET_RX_DESC_SEQ(__rxdesc)               \
+        SHIFT_AND_MASK_LE(__rxdesc+8, 0, 12)
+#define GET_RX_DESC_FRAG(__rxdesc)              \
+        SHIFT_AND_MASK_LE(__rxdesc+8, 12, 4)
+#define GET_RX_DESC_USB_AGG_PKTNUM(__rxdesc)    \
+        SHIFT_AND_MASK_LE(__rxdesc+8, 16, 8)
+#define GET_RX_DESC_NEXT_IND(__rxdesc)          \
+        SHIFT_AND_MASK_LE(__rxdesc+8, 30, 1)
+
+/* DWORD 3 */
+#define GET_RX_DESC_RX_MCS(__rxdesc)            \
+        SHIFT_AND_MASK_LE(__rxdesc+12, 0, 6)
+#define GET_RX_DESC_RX_HT(__rxdesc)             \
+        SHIFT_AND_MASK_LE(__rxdesc+12, 6, 1)
+#define GET_RX_DESC_AMSDU(__rxdesc)             \
+        SHIFT_AND_MASK_LE(__rxdesc+12, 7, 1)
+#define GET_RX_DESC_SPLCP(__rxdesc)             \
+        SHIFT_AND_MASK_LE(__rxdesc+12, 8, 1)
+#define GET_RX_DESC_BW(__rxdesc)                \
+        SHIFT_AND_MASK_LE(__rxdesc+12, 9, 1)
+#define GET_RX_DESC_HTC(__rxdesc)               \
+        SHIFT_AND_MASK_LE(__rxdesc+12, 10, 1)
+#define GET_RX_DESC_TCP_CHK_RPT(__rxdesc)       \
+        SHIFT_AND_MASK_LE(__rxdesc+12, 11, 1)
+#define GET_RX_DESC_IP_CHK_RPT(__rxdesc)        \
+        SHIFT_AND_MASK_LE(__rxdesc+12, 12, 1)
+#define GET_RX_DESC_TCP_CHK_VALID(__rxdesc)     \
+        SHIFT_AND_MASK_LE(__rxdesc+12, 13, 1)
+#define GET_RX_DESC_HWPC_ERR(__rxdesc)          \
+        SHIFT_AND_MASK_LE(__rxdesc+12, 14, 1)
+#define GET_RX_DESC_HWPC_IND(__rxdesc)          \
+        SHIFT_AND_MASK_LE(__rxdesc+12, 15, 1)
+#define GET_RX_DESC_IV0(__rxdesc)               \
+        SHIFT_AND_MASK_LE(__rxdesc+12, 16, 16)
+
+/* DWORD 4 */
+#define GET_RX_DESC_IV1(__rxdesc)               \
+        SHIFT_AND_MASK_LE(__rxdesc+16, 0, 32)
+
+/* DWORD 5 */
+#define GET_RX_DESC_TSFL(__rxdesc)              \
+        SHIFT_AND_MASK_LE(__rxdesc+20, 0, 32)
+
+/*======================= tx desc ============================================*/
+
+/* macros to set various fields in TX descriptor */
+
+/* Dword 0 */
+#define SET_TX_DESC_PKT_SIZE(__txdesc, __value)         \
+        SET_BITS_OFFSET_LE(__txdesc, 0, 16, __value)
+#define SET_TX_DESC_OFFSET(__txdesc, __value)           \
+        SET_BITS_OFFSET_LE(__txdesc, 16, 8, __value)
+#define SET_TX_DESC_BMC(__txdesc, __value)              \
+        SET_BITS_OFFSET_LE(__txdesc, 24, 1, __value)
+#define SET_TX_DESC_HTC(__txdesc, __value)              \
+        SET_BITS_OFFSET_LE(__txdesc, 25, 1, __value)
+#define SET_TX_DESC_LAST_SEG(__txdesc, __value)         \
+        SET_BITS_OFFSET_LE(__txdesc, 26, 1, __value)
+#define SET_TX_DESC_FIRST_SEG(__txdesc, __value)        \
+         SET_BITS_OFFSET_LE(__txdesc, 27, 1, __value)
+#define SET_TX_DESC_LINIP(__txdesc, __value)            \
+        SET_BITS_OFFSET_LE(__txdesc, 28, 1, __value)
+#define SET_TX_DESC_NO_ACM(__txdesc, __value)           \
+        SET_BITS_OFFSET_LE(__txdesc, 29, 1, __value)
+#define SET_TX_DESC_GF(__txdesc, __value)               \
+        SET_BITS_OFFSET_LE(__txdesc, 30, 1, __value)
+#define SET_TX_DESC_OWN(__txdesc, __value)              \
+        SET_BITS_OFFSET_LE(__txdesc, 31, 1, __value)
+
+
+/* Dword 1 */
+#define SET_TX_DESC_MACID(__txdesc, __value)            \
+        SET_BITS_OFFSET_LE(__txdesc+4, 0, 5, __value)
+#define SET_TX_DESC_AGG_ENABLE(__txdesc, __value)       \
+        SET_BITS_OFFSET_LE(__txdesc+4, 5, 1, __value)
+#define SET_TX_DESC_AGG_BREAK(__txdesc, __value)        \
+        SET_BITS_OFFSET_LE(__txdesc+4, 6, 1, __value)
+#define SET_TX_DESC_RDG_ENABLE(__txdesc, __value)       \
+        SET_BITS_OFFSET_LE(__txdesc+4, 7, 1, __value)
+#define SET_TX_DESC_QUEUE_SEL(__txdesc, __value)        \
+        SET_BITS_OFFSET_LE(__txdesc+4, 8, 5, __value)
+#define SET_TX_DESC_RDG_NAV_EXT(__txdesc, __value)      \
+        SET_BITS_OFFSET_LE(__txdesc+4, 13, 1, __value)
+#define SET_TX_DESC_LSIG_TXOP_EN(__txdesc, __value)     \
+        SET_BITS_OFFSET_LE(__txdesc+4, 14, 1, __value)
+#define SET_TX_DESC_PIFS(__txdesc, __value)             \
+        SET_BITS_OFFSET_LE(__txdesc+4, 15, 1, __value)
+#define SET_TX_DESC_RATE_ID(__txdesc, __value)          \
+        SET_BITS_OFFSET_LE(__txdesc+4, 16, 4, __value)
+#define SET_TX_DESC_RA_BRSR_ID(__txdesc, __value)       \
+        SET_BITS_OFFSET_LE(__txdesc+4, 16, 4, __value)
+#define SET_TX_DESC_NAV_USE_HDR(__txdesc, __value)      \
+        SET_BITS_OFFSET_LE(__txdesc+4, 20, 1, __value)
+#define SET_TX_DESC_EN_DESC_ID(__txdesc, __value)       \
+        SET_BITS_OFFSET_LE(__txdesc+4, 21, 1, __value)
+#define SET_TX_DESC_SEC_TYPE(__txdesc, __value)         \
+        SET_BITS_OFFSET_LE(__txdesc+4, 22, 2, __value)
+#define SET_TX_DESC_PKT_OFFSET(__txdesc, __value)       \
+        SET_BITS_OFFSET_LE(__txdesc+4, 26, 5, __value)
+
+/* Dword 2 */
+#define SET_TX_DESC_RTS_RC(__txdesc, __value)           \
+        SET_BITS_OFFSET_LE(__txdesc+8, 0, 6, __value)
+#define SET_TX_DESC_DATA_RC(__txdesc, __value)          \
+        SET_BITS_OFFSET_LE(__txdesc+8, 6, 6, __value)
+#define SET_TX_DESC_BAR_RTY_TH(__txdesc, __value)       \
+        SET_BITS_OFFSET_LE(__txdesc+8, 14, 2, __value)
+#define SET_TX_DESC_MORE_FRAG(__txdesc, __value)        \
+        SET_BITS_OFFSET_LE(__txdesc+8, 17, 1, __value)
+#define SET_TX_DESC_RAW(__txdesc, __value)              \
+        SET_BITS_OFFSET_LE(__txdesc+8, 18, 1, __value)
+#define SET_TX_DESC_CCX(__txdesc, __value)              \
+        SET_BITS_OFFSET_LE(__txdesc+8, 19, 1, __value)
+#define SET_TX_DESC_AMPDU_DENSITY(__txdesc, __value)    \
+        SET_BITS_OFFSET_LE(__txdesc+8, 20, 3, __value)
+#define SET_TX_DESC_ANTSEL_A(__txdesc, __value)         \
+        SET_BITS_OFFSET_LE(__txdesc+8, 24, 1, __value)
+#define SET_TX_DESC_ANTSEL_B(__txdesc, __value)         \
+        SET_BITS_OFFSET_LE(__txdesc+8, 25, 1, __value)
+#define SET_TX_DESC_TX_ANT_CCK(__txdesc, __value)       \
+        SET_BITS_OFFSET_LE(__txdesc+8, 26, 2, __value)
+#define SET_TX_DESC_TX_ANTL(__txdesc, __value)          \
+        SET_BITS_OFFSET_LE(__txdesc+8, 28, 2, __value)
+#define SET_TX_DESC_TX_ANT_HT(__txdesc, __value)        \
+        SET_BITS_OFFSET_LE(__txdesc+8, 30, 2, __value)
+
+/* Dword 3 */
+#define SET_TX_DESC_NEXT_HEAP_PAGE(__txdesc, __value)   \
+        SET_BITS_OFFSET_LE(__txdesc+12, 0, 8, __value)
+#define SET_TX_DESC_TAIL_PAGE(__txdesc, __value)        \
+        SET_BITS_OFFSET_LE(__txdesc+12, 8, 8, __value)
+#define SET_TX_DESC_SEQ(__txdesc, __value)              \
+        SET_BITS_OFFSET_LE(__txdesc+12, 16, 12, __value)
+#define SET_TX_DESC_PKT_ID(__txdesc, __value)           \
+        SET_BITS_OFFSET_LE(__txdesc+12, 28, 4, __value)
+
+/* Dword 4 */
+#define SET_TX_DESC_RTS_RATE(__txdesc, __value)         \
+        SET_BITS_OFFSET_LE(__txdesc+16, 0, 5, __value)
+#define SET_TX_DESC_AP_DCFE(__txdesc, __value)          \
+        SET_BITS_OFFSET_LE(__txdesc+16, 5, 1, __value)
+#define SET_TX_DESC_QOS(__txdesc, __value)              \
+        SET_BITS_OFFSET_LE(__txdesc+16, 6, 1, __value)
+#define SET_TX_DESC_HWSEQ_EN(__txdesc, __value)         \
+        SET_BITS_OFFSET_LE(__txdesc+16, 7, 1, __value)
+#define SET_TX_DESC_USE_RATE(__txdesc, __value)         \
+        SET_BITS_OFFSET_LE(__txdesc+16, 8, 1, __value)
+#define SET_TX_DESC_DISABLE_RTS_FB(__txdesc, __value)   \
+        SET_BITS_OFFSET_LE(__txdesc+16, 9, 1, __value)
+#define SET_TX_DESC_DISABLE_FB(__txdesc, __value)       \
+        SET_BITS_OFFSET_LE(__txdesc+16, 10, 1, __value)
+#define SET_TX_DESC_CTS2SELF(__txdesc, __value)         \
+        SET_BITS_OFFSET_LE(__txdesc+16, 11, 1, __value)
+#define SET_TX_DESC_RTS_ENABLE(__txdesc, __value)       \
+        SET_BITS_OFFSET_LE(__txdesc+16, 12, 1, __value)
+#define SET_TX_DESC_HW_RTS_ENABLE(__txdesc, __value)    \
+        SET_BITS_OFFSET_LE(__txdesc+16, 13, 1, __value)
+#define SET_TX_DESC_WAIT_DCTS(__txdesc, __value)        \
+        SET_BITS_OFFSET_LE(__txdesc+16, 18, 1, __value)
+#define SET_TX_DESC_CTS2AP_EN(__txdesc, __value)        \
+        SET_BITS_OFFSET_LE(__txdesc+16, 19, 1, __value)
+#define SET_TX_DESC_DATA_SC(__txdesc, __value)          \
+        SET_BITS_OFFSET_LE(__txdesc+16, 20, 2, __value)
+#define SET_TX_DESC_DATA_STBC(__txdesc, __value)        \
+        SET_BITS_OFFSET_LE(__txdesc+16, 22, 2, __value)
+#define SET_TX_DESC_DATA_SHORT(__txdesc, __value)       \
+        SET_BITS_OFFSET_LE(__txdesc+16, 24, 1, __value)
+#define SET_TX_DESC_DATA_BW(__txdesc, __value)          \
+        SET_BITS_OFFSET_LE(__txdesc+16, 25, 1, __value)
+#define SET_TX_DESC_RTS_SHORT(__txdesc, __value)        \
+        SET_BITS_OFFSET_LE(__txdesc+16, 26, 1, __value)
+#define SET_TX_DESC_RTS_BW(__txdesc, __value)           \
+        SET_BITS_OFFSET_LE(__txdesc+16, 27, 1, __value)
+#define SET_TX_DESC_RTS_SC(__txdesc, __value)           \
+        SET_BITS_OFFSET_LE(__txdesc+16, 28, 2, __value)
+#define SET_TX_DESC_RTS_STBC(__txdesc, __value)         \
+        SET_BITS_OFFSET_LE(__txdesc+16, 30, 2, __value)
+
+/* Dword 5 */
+#define SET_TX_DESC_TX_RATE(__pdesc, __val)             \
+        SET_BITS_OFFSET_LE(__pdesc+20, 0, 6, __val)
+#define SET_TX_DESC_DATA_SHORTGI(__pdesc, __val)        \
+        SET_BITS_OFFSET_LE(__pdesc+20, 6, 1, __val)
+#define SET_TX_DESC_CCX_TAG(__pdesc, __val)             \
+        SET_BITS_OFFSET_LE(__pdesc+20, 7, 1, __val)
+#define SET_TX_DESC_DATA_RATE_FB_LIMIT(__txdesc, __value) \
+        SET_BITS_OFFSET_LE(__txdesc+20, 8, 5, __value)
+#define SET_TX_DESC_RTS_RATE_FB_LIMIT(__txdesc, __value) \
+        SET_BITS_OFFSET_LE(__txdesc+20, 13, 4, __value)
+#define SET_TX_DESC_RETRY_LIMIT_ENABLE(__txdesc, __value) \
+        SET_BITS_OFFSET_LE(__txdesc+20, 17, 1, __value)
+#define SET_TX_DESC_DATA_RETRY_LIMIT(__txdesc, __value) \
+        SET_BITS_OFFSET_LE(__txdesc+20, 18, 6, __value)
+#define SET_TX_DESC_USB_TXAGG_NUM(__txdesc, __value)    \
+        SET_BITS_OFFSET_LE(__txdesc+20, 24, 8, __value)
+
+/* Dword 6 */
+#define SET_TX_DESC_TXAGC_A(__txdesc, __value)          \
+        SET_BITS_OFFSET_LE(__txdesc+24, 0, 5, __value)
+#define SET_TX_DESC_TXAGC_B(__txdesc, __value)          \
+        SET_BITS_OFFSET_LE(__txdesc+24, 5, 5, __value)
+#define SET_TX_DESC_USB_MAX_LEN(__txdesc, __value)      \
+        SET_BITS_OFFSET_LE(__txdesc+24, 10, 1, __value)
+#define SET_TX_DESC_MAX_AGG_NUM(__txdesc, __value)      \
+        SET_BITS_OFFSET_LE(__txdesc+24, 11, 5, __value)
+#define SET_TX_DESC_MCSG1_MAX_LEN(__txdesc, __value)    \
+        SET_BITS_OFFSET_LE(__txdesc+24, 16, 4, __value)
+#define SET_TX_DESC_MCSG2_MAX_LEN(__txdesc, __value)    \
+        SET_BITS_OFFSET_LE(__txdesc+24, 20, 4, __value)
+#define SET_TX_DESC_MCSG3_MAX_LEN(__txdesc, __value)    \
+        SET_BITS_OFFSET_LE(__txdesc+24, 24, 4, __value)
+#define SET_TX_DESC_MCSG7_MAX_LEN(__txdesc, __value)    \
+        SET_BITS_OFFSET_LE(__txdesc+24, 28, 4, __value)
+
+/* Dword 7 */
+#define SET_TX_DESC_TX_DESC_CHECKSUM(__txdesc, __value) \
+        SET_BITS_OFFSET_LE(__txdesc+28, 0, 16, __value)
+#define SET_TX_DESC_MCSG4_MAX_LEN(__txdesc, __value)    \
+        SET_BITS_OFFSET_LE(__txdesc+28, 16, 4, __value)
+#define SET_TX_DESC_MCSG5_MAX_LEN(__txdesc, __value)    \
+        SET_BITS_OFFSET_LE(__txdesc+28, 20, 4, __value)
+#define SET_TX_DESC_MCSG6_MAX_LEN(__txdesc, __value)    \
+        SET_BITS_OFFSET_LE(__txdesc+28, 24, 4, __value)
+#define SET_TX_DESC_MCSG15_MAX_LEN(__txdesc, __value)   \
+        SET_BITS_OFFSET_LE(__txdesc+28, 28, 4, __value)
+
+
+int  rtl8192cu_endpoint_mapping(struct ieee80211_hw *hw);
+u16 rtl8192cu_mq_to_hwq(__le16 fc, u16 mac80211_queue_index);
+bool rtl92cu_rx_query_desc(struct ieee80211_hw *hw,
+                           struct rtl_stats *stats,
+                           struct ieee80211_rx_status *rx_status,
+                           u8 *p_desc, struct sk_buff *skb);
+void  rtl8192cu_rx_hdl(struct ieee80211_hw *hw, struct sk_buff * skb);
+void rtl8192c_rx_segregate_hdl(struct ieee80211_hw *, struct sk_buff *,
+                               struct sk_buff_head *);
+void rtl8192c_tx_cleanup(struct ieee80211_hw *hw, struct sk_buff  *skb);
+int rtl8192c_tx_post_hdl(struct ieee80211_hw *hw, struct urb *urb,
+                         struct sk_buff *skb);
+struct sk_buff *rtl8192c_tx_aggregate_hdl(struct ieee80211_hw *,
+                                           struct sk_buff_head *);
+void rtl92cu_tx_fill_desc(struct ieee80211_hw *hw,
+                          struct ieee80211_hdr *hdr, u8 *pdesc_tx,
+                          struct ieee80211_tx_info *info, struct sk_buff *skb,
+                          unsigned int queue_index);
+void rtl92cu_fill_fake_txdesc(struct ieee80211_hw *hw, u8 * pDesc,
+                              u32 buffer_len, bool bIsPsPoll);
+void rtl92cu_tx_fill_cmddesc(struct ieee80211_hw *hw,
+                             u8 *pdesc, bool b_firstseg,
+                             bool b_lastseg, struct sk_buff *skb);
+bool rtl92cu_cmd_send_packet(struct ieee80211_hw *hw, struct sk_buff *skb);
+
+#endif
diff --git a/drivers/net/wireless/rtlwifi/usb.c b/drivers/net/wireless/rtlwifi/usb.c
new file mode 100644
index 000000000000..a4b2613d6a8c
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/usb.c
@@ -0,0 +1,1035 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2011  Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ *****************************************************************************/
+#include <linux/usb.h>
+#include "core.h"
+#include "wifi.h"
+#include "usb.h"
+#include "base.h"
+#include "ps.h"
+
+#define REALTEK_USB_VENQT_READ                  0xC0
+#define REALTEK_USB_VENQT_WRITE                 0x40
+#define REALTEK_USB_VENQT_CMD_REQ               0x05
+#define REALTEK_USB_VENQT_CMD_IDX               0x00
+
+#define REALTEK_USB_VENQT_MAX_BUF_SIZE          254
+
+static void usbctrl_async_callback(struct urb *urb)
+{
+        if (urb)
+                kfree(urb->context);
+}
+
+static int _usbctrl_vendorreq_async_write(struct usb_device *udev, u8 request,
+                                          u16 value, u16 index, void *pdata,
+                                          u16 len)
+{
+        int rc;
+        unsigned int pipe;
+        u8 reqtype;
+        struct usb_ctrlrequest *dr;
+        struct urb *urb;
+        struct rtl819x_async_write_data {
+                u8 data[REALTEK_USB_VENQT_MAX_BUF_SIZE];
+                struct usb_ctrlrequest dr;
+        } *buf;
+
+        pipe = usb_sndctrlpipe(udev, 0); /* write_out */
+        reqtype =  REALTEK_USB_VENQT_WRITE;
+
+        buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
+        if (!buf)
+                return -ENOMEM;
+
+        urb = usb_alloc_urb(0, GFP_ATOMIC);
+        if (!urb) {
+                kfree(buf);
+                return -ENOMEM;
+        }
+
+        dr = &buf->dr;
+
+        dr->bRequestType = reqtype;
+        dr->bRequest = request;
+        dr->wValue = cpu_to_le16(value);
+        dr->wIndex = cpu_to_le16(index);
+        dr->wLength = cpu_to_le16(len);
+        memcpy(buf, pdata, len);
+        usb_fill_control_urb(urb, udev, pipe,
+                             (unsigned char *)dr, buf, len,
+                             usbctrl_async_callback, buf);
+        rc = usb_submit_urb(urb, GFP_ATOMIC);
+        if (rc < 0)
+                kfree(buf);
+        usb_free_urb(urb);
+        return rc;
+}
+
+static int _usbctrl_vendorreq_sync_read(struct usb_device *udev, u8 request,
+                                        u16 value, u16 index, void *pdata,
+                                        u16 len)
+{
+        unsigned int pipe;
+        int status;
+        u8 reqtype;
+
+        pipe = usb_rcvctrlpipe(udev, 0); /* read_in */
+        reqtype =  REALTEK_USB_VENQT_READ;
+
+        status = usb_control_msg(udev, pipe, request, reqtype, value, index,
+                                 pdata, len, 0); /* max. timeout */
+
+        if (status < 0)
+                printk(KERN_ERR "reg 0x%x, usbctrl_vendorreq TimeOut! "
+                       "status:0x%x value=0x%x\n", value, status,
+                       *(u32 *)pdata);
+        return status;
+}
+
+static u32 _usb_read_sync(struct usb_device *udev, u32 addr, u16 len)
+{
+        u8 request;
+        u16 wvalue;
+        u16 index;
+        u32 *data;
+        u32 ret;
+
+        data = kmalloc(sizeof(u32), GFP_KERNEL);
+        if (!data)
+                return -ENOMEM;
+        request = REALTEK_USB_VENQT_CMD_REQ;
+        index = REALTEK_USB_VENQT_CMD_IDX; /* n/a */
+
+        wvalue = (u16)addr;
+        _usbctrl_vendorreq_sync_read(udev, request, wvalue, index, data, len);
+        ret = *data;
+        kfree(data);
+        return ret;
+}
+
+static u8 _usb_read8_sync(struct rtl_priv *rtlpriv, u32 addr)
+{
+        struct device *dev = rtlpriv->io.dev;
+
+        return (u8)_usb_read_sync(to_usb_device(dev), addr, 1);
+}
+
+static u16 _usb_read16_sync(struct rtl_priv *rtlpriv, u32 addr)
+{
+        struct device *dev = rtlpriv->io.dev;
+
+        return (u16)_usb_read_sync(to_usb_device(dev), addr, 2);
+}
+
+static u32 _usb_read32_sync(struct rtl_priv *rtlpriv, u32 addr)
+{
+        struct device *dev = rtlpriv->io.dev;
+
+        return _usb_read_sync(to_usb_device(dev), addr, 4);
+}
+
+static void _usb_write_async(struct usb_device *udev, u32 addr, u32 val,
+                             u16 len)
+{
+        u8 request;
+        u16 wvalue;
+        u16 index;
+        u32 data;
+
+        request = REALTEK_USB_VENQT_CMD_REQ;
+        index = REALTEK_USB_VENQT_CMD_IDX; /* n/a */
+        wvalue = (u16)(addr&0x0000ffff);
+        data = val;
+        _usbctrl_vendorreq_async_write(udev, request, wvalue, index, &data,
+                                       len);
+}
+
+static void _usb_write8_async(struct rtl_priv *rtlpriv, u32 addr, u8 val)
+{
+        struct device *dev = rtlpriv->io.dev;
+
+        _usb_write_async(to_usb_device(dev), addr, val, 1);
+}
+
+static void _usb_write16_async(struct rtl_priv *rtlpriv, u32 addr, u16 val)
+{
+        struct device *dev = rtlpriv->io.dev;
+
+        _usb_write_async(to_usb_device(dev), addr, val, 2);
+}
+
+static void _usb_write32_async(struct rtl_priv *rtlpriv, u32 addr, u32 val)
+{
+        struct device *dev = rtlpriv->io.dev;
+
+        _usb_write_async(to_usb_device(dev), addr, val, 4);
+}
+
+static int _usb_nbytes_read_write(struct usb_device *udev, bool read, u32 addr,
+                                  u16 len, u8 *pdata)
+{
+        int status;
+        u8 request;
+        u16 wvalue;
+        u16 index;
+
+        request = REALTEK_USB_VENQT_CMD_REQ;
+        index = REALTEK_USB_VENQT_CMD_IDX; /* n/a */
+        wvalue = (u16)addr;
+        if (read)
+                status = _usbctrl_vendorreq_sync_read(udev, request, wvalue,
+                                                      index, pdata, len);
+        else
+                status = _usbctrl_vendorreq_async_write(udev, request, wvalue,
+                                                        index, pdata, len);
+        return status;
+}
+
+static int _usb_readN_sync(struct rtl_priv *rtlpriv, u32 addr, u16 len,
+                           u8 *pdata)
+{
+        struct device *dev = rtlpriv->io.dev;
+
+        return _usb_nbytes_read_write(to_usb_device(dev), true, addr, len,
+                                       pdata);
+}
+
+static int _usb_writeN_async(struct rtl_priv *rtlpriv, u32 addr, u16 len,
+                             u8 *pdata)
+{
+        struct device *dev = rtlpriv->io.dev;
+
+        return _usb_nbytes_read_write(to_usb_device(dev), false, addr, len,
+                                      pdata);
+}
+
+static void _rtl_usb_io_handler_init(struct device *dev,
+                                     struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        rtlpriv->io.dev = dev;
+        mutex_init(&rtlpriv->io.bb_mutex);
+        rtlpriv->io.write8_async        = _usb_write8_async;
+        rtlpriv->io.write16_async       = _usb_write16_async;
+        rtlpriv->io.write32_async       = _usb_write32_async;
+        rtlpriv->io.writeN_async        = _usb_writeN_async;
+        rtlpriv->io.read8_sync          = _usb_read8_sync;
+        rtlpriv->io.read16_sync         = _usb_read16_sync;
+        rtlpriv->io.read32_sync         = _usb_read32_sync;
+        rtlpriv->io.readN_sync          = _usb_readN_sync;
+}
+
+static void _rtl_usb_io_handler_release(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        mutex_destroy(&rtlpriv->io.bb_mutex);
+}
+
+/**
+ *
+ *      Default aggregation handler. Do nothing and just return the oldest skb.
+ */
+static struct sk_buff *_none_usb_tx_aggregate_hdl(struct ieee80211_hw *hw,
+                                                  struct sk_buff_head *list)
+{
+        return skb_dequeue(list);
+}
+
+#define IS_HIGH_SPEED_USB(udev) \
+                ((USB_SPEED_HIGH == (udev)->speed) ? true : false)
+
+static int _rtl_usb_init_tx(struct ieee80211_hw *hw)
+{
+        u32 i;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw));
+
+        rtlusb->max_bulk_out_size = IS_HIGH_SPEED_USB(rtlusb->udev)
+                                                    ? USB_HIGH_SPEED_BULK_SIZE
+                                                    : USB_FULL_SPEED_BULK_SIZE;
+
+        RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, ("USB Max Bulk-out Size=%d\n",
+                 rtlusb->max_bulk_out_size));
+
+        for (i = 0; i < __RTL_TXQ_NUM; i++) {
+                u32 ep_num = rtlusb->ep_map.ep_mapping[i];
+                if (!ep_num) {
+                        RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
+                                 ("Invalid endpoint map setting!\n"));
+                        return -EINVAL;
+                }
+        }
+
+        rtlusb->usb_tx_post_hdl =
+                 rtlpriv->cfg->usb_interface_cfg->usb_tx_post_hdl;
+        rtlusb->usb_tx_cleanup  =
+                 rtlpriv->cfg->usb_interface_cfg->usb_tx_cleanup;
+        rtlusb->usb_tx_aggregate_hdl =
+                 (rtlpriv->cfg->usb_interface_cfg->usb_tx_aggregate_hdl)
+                 ? rtlpriv->cfg->usb_interface_cfg->usb_tx_aggregate_hdl
+                 : &_none_usb_tx_aggregate_hdl;
+
+        init_usb_anchor(&rtlusb->tx_submitted);
+        for (i = 0; i < RTL_USB_MAX_EP_NUM; i++) {
+                skb_queue_head_init(&rtlusb->tx_skb_queue[i]);
+                init_usb_anchor(&rtlusb->tx_pending[i]);
+        }
+        return 0;
+}
+
+static int _rtl_usb_init_rx(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_usb_priv *usb_priv = rtl_usbpriv(hw);
+        struct rtl_usb *rtlusb = rtl_usbdev(usb_priv);
+
+        rtlusb->rx_max_size = rtlpriv->cfg->usb_interface_cfg->rx_max_size;
+        rtlusb->rx_urb_num = rtlpriv->cfg->usb_interface_cfg->rx_urb_num;
+        rtlusb->in_ep = rtlpriv->cfg->usb_interface_cfg->in_ep_num;
+        rtlusb->usb_rx_hdl = rtlpriv->cfg->usb_interface_cfg->usb_rx_hdl;
+        rtlusb->usb_rx_segregate_hdl =
+                rtlpriv->cfg->usb_interface_cfg->usb_rx_segregate_hdl;
+
+        printk(KERN_INFO "rtl8192cu: rx_max_size %d, rx_urb_num %d, in_ep %d\n",
+                rtlusb->rx_max_size, rtlusb->rx_urb_num, rtlusb->in_ep);
+        init_usb_anchor(&rtlusb->rx_submitted);
+        return 0;
+}
+
+static int _rtl_usb_init(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_usb_priv *usb_priv = rtl_usbpriv(hw);
+        struct rtl_usb *rtlusb = rtl_usbdev(usb_priv);
+        int err;
+        u8 epidx;
+        struct usb_interface    *usb_intf = rtlusb->intf;
+        u8 epnums = usb_intf->cur_altsetting->desc.bNumEndpoints;
+
+        rtlusb->out_ep_nums = rtlusb->in_ep_nums = 0;
+        for (epidx = 0; epidx < epnums; epidx++) {
+                struct usb_endpoint_descriptor *pep_desc;
+                pep_desc = &usb_intf->cur_altsetting->endpoint[epidx].desc;
+
+                if (usb_endpoint_dir_in(pep_desc))
+                        rtlusb->in_ep_nums++;
+                else if (usb_endpoint_dir_out(pep_desc))
+                        rtlusb->out_ep_nums++;
+
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
+                         ("USB EP(0x%02x), MaxPacketSize=%d ,Interval=%d.\n",
+                         pep_desc->bEndpointAddress, pep_desc->wMaxPacketSize,
+                         pep_desc->bInterval));
+        }
+        if (rtlusb->in_ep_nums <  rtlpriv->cfg->usb_interface_cfg->in_ep_num)
+                return -EINVAL ;
+
+        /* usb endpoint mapping */
+        err = rtlpriv->cfg->usb_interface_cfg->usb_endpoint_mapping(hw);
+        rtlusb->usb_mq_to_hwq =  rtlpriv->cfg->usb_interface_cfg->usb_mq_to_hwq;
+        _rtl_usb_init_tx(hw);
+        _rtl_usb_init_rx(hw);
+        return err;
+}
+
+static int _rtl_usb_init_sw(struct ieee80211_hw *hw)
+{
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
+        struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw));
+
+        rtlhal->hw = hw;
+        ppsc->inactiveps = false;
+        ppsc->leisure_ps = false;
+        ppsc->fwctrl_lps = false;
+        ppsc->reg_fwctrl_lps = 3;
+        ppsc->reg_max_lps_awakeintvl = 5;
+        ppsc->fwctrl_psmode = FW_PS_DTIM_MODE;
+
+         /* IBSS */
+        mac->beacon_interval = 100;
+
+         /* AMPDU */
+        mac->min_space_cfg = 0;
+        mac->max_mss_density = 0;
+
+        /* set sane AMPDU defaults */
+        mac->current_ampdu_density = 7;
+        mac->current_ampdu_factor = 3;
+
+        /* QOS */
+        rtlusb->acm_method = eAcmWay2_SW;
+
+        /* IRQ */
+        /* HIMR - turn all on */
+        rtlusb->irq_mask[0] = 0xFFFFFFFF;
+        /* HIMR_EX - turn all on */
+        rtlusb->irq_mask[1] = 0xFFFFFFFF;
+        rtlusb->disableHWSM =  true;
+        return 0;
+}
+
+#define __RADIO_TAP_SIZE_RSV    32
+
+static void _rtl_rx_completed(struct urb *urb);
+
+static struct sk_buff *_rtl_prep_rx_urb(struct ieee80211_hw *hw,
+                                        struct rtl_usb *rtlusb,
+                                        struct urb *urb,
+                                        gfp_t gfp_mask)
+{
+        struct sk_buff *skb;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+        skb = __dev_alloc_skb((rtlusb->rx_max_size + __RADIO_TAP_SIZE_RSV),
+                               gfp_mask);
+        if (!skb) {
+                RT_TRACE(rtlpriv, COMP_USB, DBG_EMERG,
+                         ("Failed to __dev_alloc_skb!!\n"))
+                return ERR_PTR(-ENOMEM);
+        }
+
+        /* reserve some space for mac80211's radiotap */
+        skb_reserve(skb, __RADIO_TAP_SIZE_RSV);
+        usb_fill_bulk_urb(urb, rtlusb->udev,
+                          usb_rcvbulkpipe(rtlusb->udev, rtlusb->in_ep),
+                          skb->data, min(skb_tailroom(skb),
+                          (int)rtlusb->rx_max_size),
+                          _rtl_rx_completed, skb);
+
+        _rtl_install_trx_info(rtlusb, skb, rtlusb->in_ep);
+        return skb;
+}
+
+#undef __RADIO_TAP_SIZE_RSV
+
+static void _rtl_usb_rx_process_agg(struct ieee80211_hw *hw,
+                                    struct sk_buff *skb)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u8 *rxdesc = skb->data;
+        struct ieee80211_hdr *hdr;
+        bool unicast = false;
+        __le16 fc;
+        struct ieee80211_rx_status rx_status = {0};
+        struct rtl_stats stats = {
+                .signal = 0,
+                .noise = -98,
+                .rate = 0,
+        };
+
+        skb_pull(skb, RTL_RX_DESC_SIZE);
+        rtlpriv->cfg->ops->query_rx_desc(hw, &stats, &rx_status, rxdesc, skb);
+        skb_pull(skb, (stats.rx_drvinfo_size + stats.rx_bufshift));
+        hdr = (struct ieee80211_hdr *)(skb->data);
+        fc = hdr->frame_control;
+        if (!stats.crc) {
+                memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
+
+                if (is_broadcast_ether_addr(hdr->addr1)) {
+                        /*TODO*/;
+                } else if (is_multicast_ether_addr(hdr->addr1)) {
+                        /*TODO*/
+                } else {
+                        unicast = true;
+                        rtlpriv->stats.rxbytesunicast +=  skb->len;
+                }
+
+                rtl_is_special_data(hw, skb, false);
+
+                if (ieee80211_is_data(fc)) {
+                        rtlpriv->cfg->ops->led_control(hw, LED_CTL_RX);
+
+                        if (unicast)
+                                rtlpriv->link_info.num_rx_inperiod++;
+                }
+        }
+}
+
+static void _rtl_usb_rx_process_noagg(struct ieee80211_hw *hw,
+                                      struct sk_buff *skb)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        u8 *rxdesc = skb->data;
+        struct ieee80211_hdr *hdr;
+        bool unicast = false;
+        __le16 fc;
+        struct ieee80211_rx_status rx_status = {0};
+        struct rtl_stats stats = {
+                .signal = 0,
+                .noise = -98,
+                .rate = 0,
+        };
+
+        skb_pull(skb, RTL_RX_DESC_SIZE);
+        rtlpriv->cfg->ops->query_rx_desc(hw, &stats, &rx_status, rxdesc, skb);
+        skb_pull(skb, (stats.rx_drvinfo_size + stats.rx_bufshift));
+        hdr = (struct ieee80211_hdr *)(skb->data);
+        fc = hdr->frame_control;
+        if (!stats.crc) {
+                memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
+
+                if (is_broadcast_ether_addr(hdr->addr1)) {
+                        /*TODO*/;
+                } else if (is_multicast_ether_addr(hdr->addr1)) {
+                        /*TODO*/
+                } else {
+                        unicast = true;
+                        rtlpriv->stats.rxbytesunicast +=  skb->len;
+                }
+
+                rtl_is_special_data(hw, skb, false);
+
+                if (ieee80211_is_data(fc)) {
+                        rtlpriv->cfg->ops->led_control(hw, LED_CTL_RX);
+
+                        if (unicast)
+                                rtlpriv->link_info.num_rx_inperiod++;
+                }
+                if (likely(rtl_action_proc(hw, skb, false))) {
+                        struct sk_buff *uskb = NULL;
+                        u8 *pdata;
+
+                        uskb = dev_alloc_skb(skb->len + 128);
+                        memcpy(IEEE80211_SKB_RXCB(uskb), &rx_status,
+                               sizeof(rx_status));
+                        pdata = (u8 *)skb_put(uskb, skb->len);
+                        memcpy(pdata, skb->data, skb->len);
+                        dev_kfree_skb_any(skb);
+                        ieee80211_rx_irqsafe(hw, uskb);
+                } else {
+                        dev_kfree_skb_any(skb);
+                }
+        }
+}
+
+static void _rtl_rx_pre_process(struct ieee80211_hw *hw, struct sk_buff *skb)
+{
+        struct sk_buff *_skb;
+        struct sk_buff_head rx_queue;
+        struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw));
+
+        skb_queue_head_init(&rx_queue);
+        if (rtlusb->usb_rx_segregate_hdl)
+                rtlusb->usb_rx_segregate_hdl(hw, skb, &rx_queue);
+        WARN_ON(skb_queue_empty(&rx_queue));
+        while (!skb_queue_empty(&rx_queue)) {
+                _skb = skb_dequeue(&rx_queue);
+                _rtl_usb_rx_process_agg(hw, skb);
+                ieee80211_rx_irqsafe(hw, skb);
+        }
+}
+
+static void _rtl_rx_completed(struct urb *_urb)
+{
+        struct sk_buff *skb = (struct sk_buff *)_urb->context;
+        struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
+        struct rtl_usb *rtlusb = (struct rtl_usb *)info->rate_driver_data[0];
+        struct ieee80211_hw *hw = usb_get_intfdata(rtlusb->intf);
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        int err = 0;
+
+        if (unlikely(IS_USB_STOP(rtlusb)))
+                goto free;
+
+        if (likely(0 == _urb->status)) {
+                /* If this code were moved to work queue, would CPU
+                 * utilization be improved?  NOTE: We shall allocate another skb
+                 * and reuse the original one.
+                 */
+                skb_put(skb, _urb->actual_length);
+
+                if (likely(!rtlusb->usb_rx_segregate_hdl)) {
+                        struct sk_buff *_skb;
+                        _rtl_usb_rx_process_noagg(hw, skb);
+                        _skb = _rtl_prep_rx_urb(hw, rtlusb, _urb, GFP_ATOMIC);
+                        if (IS_ERR(_skb)) {
+                                err = PTR_ERR(_skb);
+                                RT_TRACE(rtlpriv, COMP_USB, DBG_EMERG,
+                                        ("Can't allocate skb for bulk IN!\n"));
+                                return;
+                        }
+                        skb = _skb;
+                } else{
+                        /* TO DO */
+                        _rtl_rx_pre_process(hw, skb);
+                        printk(KERN_ERR "rtlwifi: rx agg not supported\n");
+                }
+                goto resubmit;
+        }
+
+        switch (_urb->status) {
+        /* disconnect */
+        case -ENOENT:
+        case -ECONNRESET:
+        case -ENODEV:
+        case -ESHUTDOWN:
+                goto free;
+        default:
+                break;
+        }
+
+resubmit:
+        skb_reset_tail_pointer(skb);
+        skb_trim(skb, 0);
+
+        usb_anchor_urb(_urb, &rtlusb->rx_submitted);
+        err = usb_submit_urb(_urb, GFP_ATOMIC);
+        if (unlikely(err)) {
+                usb_unanchor_urb(_urb);
+                goto free;
+        }
+        return;
+
+free:
+        dev_kfree_skb_irq(skb);
+}
+
+static int _rtl_usb_receive(struct ieee80211_hw *hw)
+{
+        struct urb *urb;
+        struct sk_buff *skb;
+        int err;
+        int i;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw));
+
+        WARN_ON(0 == rtlusb->rx_urb_num);
+        /* 1600 == 1514 + max WLAN header + rtk info */
+        WARN_ON(rtlusb->rx_max_size < 1600);
+
+        for (i = 0; i < rtlusb->rx_urb_num; i++) {
+                err = -ENOMEM;
+                urb = usb_alloc_urb(0, GFP_KERNEL);
+                if (!urb) {
+                        RT_TRACE(rtlpriv, COMP_USB, DBG_EMERG,
+                                 ("Failed to alloc URB!!\n"))
+                        goto err_out;
+                }
+
+                skb = _rtl_prep_rx_urb(hw, rtlusb, urb, GFP_KERNEL);
+                if (IS_ERR(skb)) {
+                        RT_TRACE(rtlpriv, COMP_USB, DBG_EMERG,
+                                 ("Failed to prep_rx_urb!!\n"))
+                        err = PTR_ERR(skb);
+                        goto err_out;
+                }
+
+                usb_anchor_urb(urb, &rtlusb->rx_submitted);
+                err = usb_submit_urb(urb, GFP_KERNEL);
+                if (err)
+                        goto err_out;
+                usb_free_urb(urb);
+        }
+        return 0;
+
+err_out:
+        usb_kill_anchored_urbs(&rtlusb->rx_submitted);
+        return err;
+}
+
+static int rtl_usb_start(struct ieee80211_hw *hw)
+{
+        int err;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw));
+
+        err = rtlpriv->cfg->ops->hw_init(hw);
+        rtl_init_rx_config(hw);
+
+        /* Enable software */
+        SET_USB_START(rtlusb);
+        /* should after adapter start and interrupt enable. */
+        set_hal_start(rtlhal);
+
+        /* Start bulk IN */
+        _rtl_usb_receive(hw);
+
+        return err;
+}
+/**
+ *
+ *
+ */
+
+/*=======================  tx =========================================*/
+static void rtl_usb_cleanup(struct ieee80211_hw *hw)
+{
+        u32 i;
+        struct sk_buff *_skb;
+        struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw));
+        struct ieee80211_tx_info *txinfo;
+
+        SET_USB_STOP(rtlusb);
+
+        /* clean up rx stuff. */
+        usb_kill_anchored_urbs(&rtlusb->rx_submitted);
+
+        /* clean up tx stuff */
+        for (i = 0; i < RTL_USB_MAX_EP_NUM; i++) {
+                while ((_skb = skb_dequeue(&rtlusb->tx_skb_queue[i]))) {
+                        rtlusb->usb_tx_cleanup(hw, _skb);
+                        txinfo = IEEE80211_SKB_CB(_skb);
+                        ieee80211_tx_info_clear_status(txinfo);
+                        txinfo->flags |= IEEE80211_TX_STAT_ACK;
+                        ieee80211_tx_status_irqsafe(hw, _skb);
+                }
+                usb_kill_anchored_urbs(&rtlusb->tx_pending[i]);
+        }
+        usb_kill_anchored_urbs(&rtlusb->tx_submitted);
+}
+
+/**
+ *
+ * We may add some struct into struct rtl_usb later. Do deinit here.
+ *
+ */
+static void rtl_usb_deinit(struct ieee80211_hw *hw)
+{
+        rtl_usb_cleanup(hw);
+}
+
+static void rtl_usb_stop(struct ieee80211_hw *hw)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw));
+
+        /* should after adapter start and interrupt enable. */
+        set_hal_stop(rtlhal);
+        /* Enable software */
+        SET_USB_STOP(rtlusb);
+        rtl_usb_deinit(hw);
+        rtlpriv->cfg->ops->hw_disable(hw);
+}
+
+static void _rtl_submit_tx_urb(struct ieee80211_hw *hw, struct urb *_urb)
+{
+        int err;
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw));
+
+        usb_anchor_urb(_urb, &rtlusb->tx_submitted);
+        err = usb_submit_urb(_urb, GFP_ATOMIC);
+        if (err < 0) {
+                struct sk_buff *skb;
+
+                RT_TRACE(rtlpriv, COMP_USB, DBG_EMERG,
+                         ("Failed to submit urb.\n"));
+                usb_unanchor_urb(_urb);
+                skb = (struct sk_buff *)_urb->context;
+                kfree_skb(skb);
+        }
+        usb_free_urb(_urb);
+}
+
+static int _usb_tx_post(struct ieee80211_hw *hw, struct urb *urb,
+                        struct sk_buff *skb)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw));
+        struct ieee80211_tx_info *txinfo;
+
+        rtlusb->usb_tx_post_hdl(hw, urb, skb);
+        skb_pull(skb, RTL_TX_HEADER_SIZE);
+        txinfo = IEEE80211_SKB_CB(skb);
+        ieee80211_tx_info_clear_status(txinfo);
+        txinfo->flags |= IEEE80211_TX_STAT_ACK;
+
+        if (urb->status) {
+                RT_TRACE(rtlpriv, COMP_USB, DBG_EMERG,
+                         ("Urb has error status 0x%X\n", urb->status));
+                goto out;
+        }
+        /*  TODO:       statistics */
+out:
+        ieee80211_tx_status_irqsafe(hw, skb);
+        return urb->status;
+}
+
+static void _rtl_tx_complete(struct urb *urb)
+{
+        struct sk_buff *skb = (struct sk_buff *)urb->context;
+        struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
+        struct rtl_usb *rtlusb = (struct rtl_usb *)info->rate_driver_data[0];
+        struct ieee80211_hw *hw = usb_get_intfdata(rtlusb->intf);
+        int err;
+
+        if (unlikely(IS_USB_STOP(rtlusb)))
+                return;
+        err = _usb_tx_post(hw, urb, skb);
+        if (err) {
+                /* Ignore error and keep issuiing other urbs */
+                return;
+        }
+}
+
+static struct urb *_rtl_usb_tx_urb_setup(struct ieee80211_hw *hw,
+                                struct sk_buff *skb, u32 ep_num)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw));
+        struct urb *_urb;
+
+        WARN_ON(NULL == skb);
+        _urb = usb_alloc_urb(0, GFP_ATOMIC);
+        if (!_urb) {
+                RT_TRACE(rtlpriv, COMP_USB, DBG_EMERG,
+                         ("Can't allocate URB for bulk out!\n"));
+                kfree_skb(skb);
+                return NULL;
+        }
+        _rtl_install_trx_info(rtlusb, skb, ep_num);
+        usb_fill_bulk_urb(_urb, rtlusb->udev, usb_sndbulkpipe(rtlusb->udev,
+                          ep_num), skb->data, skb->len, _rtl_tx_complete, skb);
+        _urb->transfer_flags |= URB_ZERO_PACKET;
+        return _urb;
+}
+
+static void _rtl_usb_transmit(struct ieee80211_hw *hw, struct sk_buff *skb,
+                       enum rtl_txq qnum)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw));
+        u32 ep_num;
+        struct urb *_urb = NULL;
+        struct sk_buff *_skb = NULL;
+        struct sk_buff_head *skb_list;
+        struct usb_anchor *urb_list;
+
+        WARN_ON(NULL == rtlusb->usb_tx_aggregate_hdl);
+        if (unlikely(IS_USB_STOP(rtlusb))) {
+                RT_TRACE(rtlpriv, COMP_USB, DBG_EMERG,
+                         ("USB device is stopping...\n"));
+                kfree_skb(skb);
+                return;
+        }
+        ep_num = rtlusb->ep_map.ep_mapping[qnum];
+        skb_list = &rtlusb->tx_skb_queue[ep_num];
+        _skb = skb;
+        _urb = _rtl_usb_tx_urb_setup(hw, _skb, ep_num);
+        if (unlikely(!_urb)) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("Can't allocate urb. Drop skb!\n"));
+                return;
+        }
+        urb_list = &rtlusb->tx_pending[ep_num];
+        _rtl_submit_tx_urb(hw, _urb);
+}
+
+static void _rtl_usb_tx_preprocess(struct ieee80211_hw *hw, struct sk_buff *skb,
+                            u16 hw_queue)
+{
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
+        struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
+        struct rtl_tx_desc *pdesc = NULL;
+        struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
+        __le16 fc = hdr->frame_control;
+        u8 *pda_addr = hdr->addr1;
+        /* ssn */
+        u8 *qc = NULL;
+        u8 tid = 0;
+        u16 seq_number = 0;
+
+        if (ieee80211_is_mgmt(fc))
+                rtl_tx_mgmt_proc(hw, skb);
+        rtl_action_proc(hw, skb, true);
+        if (is_multicast_ether_addr(pda_addr))
+                rtlpriv->stats.txbytesmulticast += skb->len;
+        else if (is_broadcast_ether_addr(pda_addr))
+                rtlpriv->stats.txbytesbroadcast += skb->len;
+        else
+                rtlpriv->stats.txbytesunicast += skb->len;
+        if (ieee80211_is_data_qos(fc)) {
+                qc = ieee80211_get_qos_ctl(hdr);
+                tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
+                seq_number = (le16_to_cpu(hdr->seq_ctrl) &
+                             IEEE80211_SCTL_SEQ) >> 4;
+                seq_number += 1;
+                seq_number <<= 4;
+        }
+        rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc, info, skb,
+                                        hw_queue);
+        if (!ieee80211_has_morefrags(hdr->frame_control)) {
+                if (qc)
+                        mac->tids[tid].seq_number = seq_number;
+        }
+        if (ieee80211_is_data(fc))
+                rtlpriv->cfg->ops->led_control(hw, LED_CTL_TX);
+}
+
+static int rtl_usb_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
+{
+        struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw));
+        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
+        struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
+        __le16 fc = hdr->frame_control;
+        u16 hw_queue;
+
+        if (unlikely(is_hal_stop(rtlhal)))
+                goto err_free;
+        hw_queue = rtlusb->usb_mq_to_hwq(fc, skb_get_queue_mapping(skb));
+        _rtl_usb_tx_preprocess(hw, skb, hw_queue);
+        _rtl_usb_transmit(hw, skb, hw_queue);
+        return NETDEV_TX_OK;
+
+err_free:
+        dev_kfree_skb_any(skb);
+        return NETDEV_TX_OK;
+}
+
+static bool rtl_usb_tx_chk_waitq_insert(struct ieee80211_hw *hw,
+                                        struct sk_buff *skb)
+{
+        return false;
+}
+
+static struct rtl_intf_ops rtl_usb_ops = {
+        .adapter_start = rtl_usb_start,
+        .adapter_stop = rtl_usb_stop,
+        .adapter_tx = rtl_usb_tx,
+        .waitq_insert = rtl_usb_tx_chk_waitq_insert,
+};
+
+int __devinit rtl_usb_probe(struct usb_interface *intf,
+                        const struct usb_device_id *id)
+{
+        int err;
+        struct ieee80211_hw *hw = NULL;
+        struct rtl_priv *rtlpriv = NULL;
+        struct usb_device       *udev;
+        struct rtl_usb_priv *usb_priv;
+
+        hw = ieee80211_alloc_hw(sizeof(struct rtl_priv) +
+                                sizeof(struct rtl_usb_priv), &rtl_ops);
+        if (!hw) {
+                RT_ASSERT(false, ("%s : ieee80211 alloc failed\n", __func__));
+                return -ENOMEM;
+        }
+        rtlpriv = hw->priv;
+        SET_IEEE80211_DEV(hw, &intf->dev);
+        udev = interface_to_usbdev(intf);
+        usb_get_dev(udev);
+        usb_priv = rtl_usbpriv(hw);
+        memset(usb_priv, 0, sizeof(*usb_priv));
+        usb_priv->dev.intf = intf;
+        usb_priv->dev.udev = udev;
+        usb_set_intfdata(intf, hw);
+        /* init cfg & intf_ops */
+        rtlpriv->rtlhal.interface = INTF_USB;
+        rtlpriv->cfg = (struct rtl_hal_cfg *)(id->driver_info);
+        rtlpriv->intf_ops = &rtl_usb_ops;
+        rtl_dbgp_flag_init(hw);
+        /* Init IO handler */
+        _rtl_usb_io_handler_init(&udev->dev, hw);
+        rtlpriv->cfg->ops->read_chip_version(hw);
+        /*like read eeprom and so on */
+        rtlpriv->cfg->ops->read_eeprom_info(hw);
+        if (rtlpriv->cfg->ops->init_sw_vars(hw)) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("Can't init_sw_vars.\n"));
+                goto error_out;
+        }
+        rtlpriv->cfg->ops->init_sw_leds(hw);
+        err = _rtl_usb_init(hw);
+        err = _rtl_usb_init_sw(hw);
+        /* Init mac80211 sw */
+        err = rtl_init_core(hw);
+        if (err) {
+                RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
+                         ("Can't allocate sw for mac80211.\n"));
+                goto error_out;
+        }
+
+        /*init rfkill */
+        /* rtl_init_rfkill(hw); */
+
+        err = ieee80211_register_hw(hw);
+        if (err) {
+                RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG,
+                         ("Can't register mac80211 hw.\n"));
+                goto error_out;
+        } else {
+                rtlpriv->mac80211.mac80211_registered = 1;
+        }
+        set_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
+        return 0;
+error_out:
+        rtl_deinit_core(hw);
+        _rtl_usb_io_handler_release(hw);
+        ieee80211_free_hw(hw);
+        usb_put_dev(udev);
+        return -ENODEV;
+}
+EXPORT_SYMBOL(rtl_usb_probe);
+
+void rtl_usb_disconnect(struct usb_interface *intf)
+{
+        struct ieee80211_hw *hw = usb_get_intfdata(intf);
+        struct rtl_priv *rtlpriv = rtl_priv(hw);
+        struct rtl_mac *rtlmac = rtl_mac(rtl_priv(hw));
+        struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw));
+
+        if (unlikely(!rtlpriv))
+                return;
+        /*ieee80211_unregister_hw will call ops_stop */
+        if (rtlmac->mac80211_registered == 1) {
+                ieee80211_unregister_hw(hw);
+                rtlmac->mac80211_registered = 0;
+        } else {
+                rtl_deinit_deferred_work(hw);
+                rtlpriv->intf_ops->adapter_stop(hw);
+        }
+        /*deinit rfkill */
+        /* rtl_deinit_rfkill(hw); */
+        rtl_usb_deinit(hw);
+        rtl_deinit_core(hw);
+        rtlpriv->cfg->ops->deinit_sw_leds(hw);
+        rtlpriv->cfg->ops->deinit_sw_vars(hw);
+        _rtl_usb_io_handler_release(hw);
+        usb_put_dev(rtlusb->udev);
+        usb_set_intfdata(intf, NULL);
+        ieee80211_free_hw(hw);
+}
+EXPORT_SYMBOL(rtl_usb_disconnect);
+
+int rtl_usb_suspend(struct usb_interface *pusb_intf, pm_message_t message)
+{
+        return 0;
+}
+EXPORT_SYMBOL(rtl_usb_suspend);
+
+int rtl_usb_resume(struct usb_interface *pusb_intf)
+{
+        return 0;
+}
+EXPORT_SYMBOL(rtl_usb_resume);
diff --git a/drivers/net/wireless/rtlwifi/usb.h b/drivers/net/wireless/rtlwifi/usb.h
new file mode 100644
index 000000000000..abadfe918d30
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/usb.h
@@ -0,0 +1,164 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2009-2011  Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
+ * Hsinchu 300, Taiwan.
+ *
+ *****************************************************************************/
+
+#ifndef __RTL_USB_H__
+#define __RTL_USB_H__
+
+#include <linux/usb.h>
+#include <linux/skbuff.h>
+
+#define RTL_USB_DEVICE(vend, prod, cfg) \
+        .match_flags = USB_DEVICE_ID_MATCH_DEVICE, \
+        .idVendor = (vend), \
+        .idProduct = (prod), \
+        .driver_info = (kernel_ulong_t)&(cfg)
+
+#define USB_HIGH_SPEED_BULK_SIZE        512
+#define USB_FULL_SPEED_BULK_SIZE        64
+
+
+#define RTL_USB_MAX_TXQ_NUM             4               /* max tx queue */
+#define RTL_USB_MAX_EP_NUM              6               /* max ep number */
+#define RTL_USB_MAX_TX_URBS_NUM         8
+
+enum rtl_txq {
+        /* These definitions shall be consistent with value
+         * returned by skb_get_queue_mapping
+         *------------------------------------*/
+        RTL_TXQ_BK,
+        RTL_TXQ_BE,
+        RTL_TXQ_VI,
+        RTL_TXQ_VO,
+        /*------------------------------------*/
+        RTL_TXQ_BCN,
+        RTL_TXQ_MGT,
+        RTL_TXQ_HI,
+
+        /* Must be last */
+        __RTL_TXQ_NUM,
+};
+
+struct rtl_ep_map {
+        u32 ep_mapping[__RTL_TXQ_NUM];
+};
+
+struct _trx_info {
+        struct rtl_usb *rtlusb;
+        u32 ep_num;
+};
+
+static inline void _rtl_install_trx_info(struct rtl_usb *rtlusb,
+                                         struct sk_buff *skb,
+                                         u32 ep_num)
+{
+        struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
+        info->rate_driver_data[0] = rtlusb;
+        info->rate_driver_data[1] = (void *)(__kernel_size_t)ep_num;
+}
+
+
+/*  Add suspend/resume later */
+enum rtl_usb_state {
+        USB_STATE_STOP  = 0,
+        USB_STATE_START = 1,
+};
+
+#define IS_USB_STOP(rtlusb_ptr) (USB_STATE_STOP == (rtlusb_ptr)->state)
+#define IS_USB_START(rtlusb_ptr) (USB_STATE_START == (rtlusb_ptr)->state)
+#define SET_USB_STOP(rtlusb_ptr) \
+        do {                                                    \
+                (rtlusb_ptr)->state = USB_STATE_STOP;           \
+        } while (0)
+
+#define SET_USB_START(rtlusb_ptr)                               \
+        do { \
+                (rtlusb_ptr)->state = USB_STATE_START;          \
+        } while (0)
+
+struct rtl_usb {
+        struct usb_device *udev;
+        struct usb_interface *intf;
+        enum rtl_usb_state state;
+
+        /* Bcn control register setting */
+        u32 reg_bcn_ctrl_val;
+        /* for 88/92cu card disable */
+        u8      disableHWSM;
+        /*QOS & EDCA */
+        enum acm_method acm_method;
+        /* irq  . HIMR,HIMR_EX */
+        u32 irq_mask[2];
+        bool irq_enabled;
+
+        u16 (*usb_mq_to_hwq)(__le16 fc, u16 mac80211_queue_index);
+
+        /* Tx */
+        u8 out_ep_nums ;
+        u8 out_queue_sel;
+        struct rtl_ep_map ep_map;
+
+        u32 max_bulk_out_size;
+        u32 tx_submitted_urbs;
+        struct sk_buff_head tx_skb_queue[RTL_USB_MAX_EP_NUM];
+
+        struct usb_anchor tx_pending[RTL_USB_MAX_EP_NUM];
+        struct usb_anchor tx_submitted;
+
+        struct sk_buff *(*usb_tx_aggregate_hdl)(struct ieee80211_hw *,
+                                                struct sk_buff_head *);
+        int (*usb_tx_post_hdl)(struct ieee80211_hw *,
+                               struct urb *, struct sk_buff *);
+        void (*usb_tx_cleanup)(struct ieee80211_hw *, struct sk_buff *);
+
+        /* Rx */
+        u8 in_ep_nums ;
+        u32 in_ep;              /* Bulk IN endpoint number */
+        u32 rx_max_size;        /* Bulk IN max buffer size */
+        u32 rx_urb_num;         /* How many Bulk INs are submitted to host. */
+        struct usb_anchor       rx_submitted;
+        void (*usb_rx_segregate_hdl)(struct ieee80211_hw *, struct sk_buff *,
+                                     struct sk_buff_head *);
+        void (*usb_rx_hdl)(struct ieee80211_hw *, struct sk_buff *);
+};
+
+struct rtl_usb_priv {
+        struct rtl_usb dev;
+        struct rtl_led_ctl ledctl;
+};
+
+#define rtl_usbpriv(hw)  (((struct rtl_usb_priv *)(rtl_priv(hw))->priv))
+#define rtl_usbdev(usbpriv)     (&((usbpriv)->dev))
+
+
+
+int __devinit rtl_usb_probe(struct usb_interface *intf,
+                            const struct usb_device_id *id);
+void rtl_usb_disconnect(struct usb_interface *intf);
+int rtl_usb_suspend(struct usb_interface *pusb_intf, pm_message_t message);
+int rtl_usb_resume(struct usb_interface *pusb_intf);
+
+#endif
diff --git a/drivers/net/wireless/rtlwifi/wifi.h b/drivers/net/wireless/rtlwifi/wifi.h
index d44d79613d2d..4b90b35f211e 100644
--- a/drivers/net/wireless/rtlwifi/wifi.h
+++ b/drivers/net/wireless/rtlwifi/wifi.h
@@ -34,6 +34,7 @@
 #include <linux/firmware.h>
 #include <linux/version.h>
 #include <linux/etherdevice.h>
+#include <linux/usb.h>
 #include <net/mac80211.h>
 #include "debug.h"
 
@@ -82,6 +83,19 @@
 #define MAC80211_3ADDR_LEN                      24
 #define MAC80211_4ADDR_LEN                      30
 
+#define CHANNEL_MAX_NUMBER      (14 + 24 + 21)  /* 14 is the max channel no */
+#define CHANNEL_GROUP_MAX       (3 + 9) /*  ch1~3, 4~9, 10~14 = three groups */
+#define MAX_PG_GROUP                    13
+#define CHANNEL_GROUP_MAX_2G            3
+#define CHANNEL_GROUP_IDX_5GL           3
+#define CHANNEL_GROUP_IDX_5GM           6
+#define CHANNEL_GROUP_IDX_5GH           9
+#define CHANNEL_GROUP_MAX_5G            9
+#define CHANNEL_MAX_NUMBER_2G           14
+#define AVG_THERMAL_NUM                 8
+
+/* for early mode */
+#define EM_HDR_LEN                      8
 enum intf_type {
         INTF_PCI = 0,
         INTF_USB = 1,
@@ -113,11 +127,38 @@ enum hardware_type {
         HARDWARE_TYPE_RTL8192CU,
         HARDWARE_TYPE_RTL8192DE,
         HARDWARE_TYPE_RTL8192DU,
+        HARDWARE_TYPE_RTL8723E,
+        HARDWARE_TYPE_RTL8723U,
 
-        /*keep it last*/
+        /* keep it last */
         HARDWARE_TYPE_NUM
 };
 
+#define IS_HARDWARE_TYPE_8192SU(rtlhal)                 \
+        (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SU)
+#define IS_HARDWARE_TYPE_8192SE(rtlhal)                 \
+        (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
+#define IS_HARDWARE_TYPE_8192CE(rtlhal)                 \
+        (rtlhal->hw_type == HARDWARE_TYPE_RTL8192CE)
+#define IS_HARDWARE_TYPE_8192CU(rtlhal)                 \
+        (rtlhal->hw_type == HARDWARE_TYPE_RTL8192CU)
+#define IS_HARDWARE_TYPE_8192DE(rtlhal)                 \
+        (rtlhal->hw_type == HARDWARE_TYPE_RTL8192DE)
+#define IS_HARDWARE_TYPE_8192DU(rtlhal)                 \
+        (rtlhal->hw_type == HARDWARE_TYPE_RTL8192DU)
+#define IS_HARDWARE_TYPE_8723E(rtlhal)                  \
+        (rtlhal->hw_type == HARDWARE_TYPE_RTL8723E)
+#define IS_HARDWARE_TYPE_8723U(rtlhal)                  \
+        (rtlhal->hw_type == HARDWARE_TYPE_RTL8723U)
+#define IS_HARDWARE_TYPE_8192S(rtlhal)                  \
+(IS_HARDWARE_TYPE_8192SE(rtlhal) || IS_HARDWARE_TYPE_8192SU(rtlhal))
+#define IS_HARDWARE_TYPE_8192C(rtlhal)                  \
+(IS_HARDWARE_TYPE_8192CE(rtlhal) || IS_HARDWARE_TYPE_8192CU(rtlhal))
+#define IS_HARDWARE_TYPE_8192D(rtlhal)                  \
+(IS_HARDWARE_TYPE_8192DE(rtlhal) || IS_HARDWARE_TYPE_8192DU(rtlhal))
+#define IS_HARDWARE_TYPE_8723(rtlhal)                   \
+(IS_HARDWARE_TYPE_8723E(rtlhal) || IS_HARDWARE_TYPE_8723U(rtlhal))
+
 enum scan_operation_backup_opt {
         SCAN_OPT_BACKUP = 0,
         SCAN_OPT_RESTORE,
@@ -315,6 +356,7 @@ enum rf_type {
         RF_1T1R = 0,
         RF_1T2R = 1,
         RF_2T2R = 2,
+        RF_2T2R_GREEN = 3,
 };
 
 enum ht_channel_width {
@@ -359,6 +401,8 @@ enum rtl_var_map {
         EFUSE_LOADER_CLK_EN,
         EFUSE_ANA8M,
         EFUSE_HWSET_MAX_SIZE,
+        EFUSE_MAX_SECTION_MAP,
+        EFUSE_REAL_CONTENT_SIZE,
 
         /*CAM map */
         RWCAM,
@@ -397,6 +441,7 @@ enum rtl_var_map {
         RTL_IMR_ATIMEND,        /*For 92C,ATIM Window End Interrupt */
         RTL_IMR_BDOK,           /*Beacon Queue DMA OK Interrup */
         RTL_IMR_HIGHDOK,        /*High Queue DMA OK Interrupt */
+        RTL_IMR_COMDOK,         /*Command Queue DMA OK Interrupt*/
         RTL_IMR_TBDOK,          /*Transmit Beacon OK interrup */
         RTL_IMR_MGNTDOK,        /*Management Queue DMA OK Interrupt */
         RTL_IMR_TBDER,          /*For 92C,Transmit Beacon Error Interrupt */
@@ -405,7 +450,8 @@ enum rtl_var_map {
         RTL_IMR_VIDOK,          /*AC_VI DMA OK Interrupt */
         RTL_IMR_VODOK,          /*AC_VO DMA Interrupt */
         RTL_IMR_ROK,            /*Receive DMA OK Interrupt */
-        RTL_IBSS_INT_MASKS,     /*(RTL_IMR_BcnInt|RTL_IMR_TBDOK|RTL_IMR_TBDER)*/
+        RTL_IBSS_INT_MASKS,     /*(RTL_IMR_BcnInt | RTL_IMR_TBDOK |
+                                 * RTL_IMR_TBDER) */
 
         /*CCK Rates, TxHT = 0 */
         RTL_RC_CCK_RATE1M,
@@ -481,6 +527,19 @@ enum acm_method {
         eAcmWay2_SW = 2,
 };
 
+enum macphy_mode {
+        SINGLEMAC_SINGLEPHY = 0,
+        DUALMAC_DUALPHY,
+        DUALMAC_SINGLEPHY,
+};
+
+enum band_type {
+        BAND_ON_2_4G = 0,
+        BAND_ON_5G,
+        BAND_ON_BOTH,
+        BANDMAX
+};
+
 /*aci/aifsn Field.
 Ref: WMM spec 2.2.2: WME Parameter Element, p.12.*/
 union aci_aifsn {
@@ -505,6 +564,17 @@ enum wireless_mode {
         WIRELESS_MODE_N_5G = 0x20
 };
 
+#define IS_WIRELESS_MODE_A(wirelessmode)        \
+        (wirelessmode == WIRELESS_MODE_A)
+#define IS_WIRELESS_MODE_B(wirelessmode)        \
+        (wirelessmode == WIRELESS_MODE_B)
+#define IS_WIRELESS_MODE_G(wirelessmode)        \
+        (wirelessmode == WIRELESS_MODE_G)
+#define IS_WIRELESS_MODE_N_24G(wirelessmode)    \
+        (wirelessmode == WIRELESS_MODE_N_24G)
+#define IS_WIRELESS_MODE_N_5G(wirelessmode)     \
+        (wirelessmode == WIRELESS_MODE_N_5G)
+
 enum ratr_table_mode {
         RATR_INX_WIRELESS_NGB = 0,
         RATR_INX_WIRELESS_NG = 1,
@@ -574,11 +644,11 @@ struct rtl_probe_rsp {
 struct rtl_led {
         void *hw;
         enum rtl_led_pin ledpin;
-        bool b_ledon;
+        bool ledon;
 };
 
 struct rtl_led_ctl {
-        bool bled_opendrain;
+        bool led_opendrain;
         struct rtl_led sw_led0;
         struct rtl_led sw_led1;
 };
@@ -603,6 +673,8 @@ struct false_alarm_statistics {
         u32 cnt_rate_illegal;
         u32 cnt_crc8_fail;
         u32 cnt_mcs_fail;
+        u32 cnt_fast_fsync_fail;
+        u32 cnt_sb_search_fail;
         u32 cnt_ofdm_fail;
         u32 cnt_cck_fail;
         u32 cnt_all;
@@ -690,6 +762,32 @@ struct rtl_rfkill {
         bool rfkill_state;      /*0 is off, 1 is on */
 };
 
+#define IQK_MATRIX_REG_NUM      8
+#define IQK_MATRIX_SETTINGS_NUM (1 + 24 + 21)
+struct iqk_matrix_regs {
+        bool b_iqk_done;
+        long value[1][IQK_MATRIX_REG_NUM];
+};
+
+struct phy_parameters {
+        u16 length;
+        u32 *pdata;
+};
+
+enum hw_param_tab_index {
+        PHY_REG_2T,
+        PHY_REG_1T,
+        PHY_REG_PG,
+        RADIOA_2T,
+        RADIOB_2T,
+        RADIOA_1T,
+        RADIOB_1T,
+        MAC_REG,
+        AGCTAB_2T,
+        AGCTAB_1T,
+        MAX_TAB
+};
+
 struct rtl_phy {
         struct bb_reg_def phyreg_def[4];        /*Radio A/B/C/D */
         struct init_gain initgain_backup;
@@ -705,8 +803,9 @@ struct rtl_phy {
         u8 current_channel;
         u8 h2c_box_num;
         u8 set_io_inprogress;
+        u8 lck_inprogress;
 
-        /*record for power tracking*/
+        /* record for power tracking */
         s32 reg_e94;
         s32 reg_e9c;
         s32 reg_ea4;
@@ -723,26 +822,32 @@ struct rtl_phy {
         u32 iqk_mac_backup[IQK_MAC_REG_NUM];
         u32 iqk_bb_backup[10];
 
-        bool b_rfpi_enable;
+        /* Dual mac */
+        bool need_iqk;
+        struct iqk_matrix_regs iqk_matrix_regsetting[IQK_MATRIX_SETTINGS_NUM];
+
+        bool rfpi_enable;
 
         u8 pwrgroup_cnt;
-        u8 bcck_high_power;
-        /* 3 groups of pwr diff by rates*/
-        u32 mcs_txpwrlevel_origoffset[4][16];
+        u8 cck_high_power;
+        /* MAX_PG_GROUP groups of pwr diff by rates */
+        u32 mcs_txpwrlevel_origoffset[MAX_PG_GROUP][16];
         u8 default_initialgain[4];
 
-        /*the current Tx power level*/
+        /* the current Tx power level */
         u8 cur_cck_txpwridx;
         u8 cur_ofdm24g_txpwridx;
 
         u32 rfreg_chnlval[2];
-        bool b_apk_done;
+        bool apk_done;
+        u32 reg_rf3c[2];        /* pathA / pathB  */
 
-        /*fsync*/
         u8 framesync;
         u32 framesync_c34;
 
         u8 num_total_rfpath;
+        struct phy_parameters hwparam_tables[MAX_TAB];
+        u16 rf_pathmap;
 };
 
 #define MAX_TID_COUNT                           9
@@ -768,6 +873,7 @@ struct rtl_tid_data {
 struct rtl_priv;
 struct rtl_io {
         struct device *dev;
+        struct mutex bb_mutex;
 
         /*PCI MEM map */
         unsigned long pci_mem_end;      /*shared mem end        */
@@ -779,11 +885,14 @@ struct rtl_io {
         void (*write8_async) (struct rtl_priv *rtlpriv, u32 addr, u8 val);
         void (*write16_async) (struct rtl_priv *rtlpriv, u32 addr, u16 val);
         void (*write32_async) (struct rtl_priv *rtlpriv, u32 addr, u32 val);
-
-         u8(*read8_sync) (struct rtl_priv *rtlpriv, u32 addr);
-         u16(*read16_sync) (struct rtl_priv *rtlpriv, u32 addr);
-         u32(*read32_sync) (struct rtl_priv *rtlpriv, u32 addr);
-
+        int (*writeN_async) (struct rtl_priv *rtlpriv, u32 addr, u16 len,
+                             u8 *pdata);
+
+        u8(*read8_sync) (struct rtl_priv *rtlpriv, u32 addr);
+        u16(*read16_sync) (struct rtl_priv *rtlpriv, u32 addr);
+        u32(*read32_sync) (struct rtl_priv *rtlpriv, u32 addr);
+        int (*readN_sync) (struct rtl_priv *rtlpriv, u32 addr, u16 len,
+                            u8 *pdata);
 };
 
 struct rtl_mac {
@@ -815,16 +924,24 @@ struct rtl_mac {
         bool act_scanning;
         u8 cnt_after_linked;
 
-         /*RDG*/ bool rdg_en;
+        /* early mode */
+        /* skb wait queue */
+        struct sk_buff_head skb_waitq[MAX_TID_COUNT];
+        u8 earlymode_threshold;
+
+        /*RDG*/
+        bool rdg_en;
 
-         /*AP*/ u8 bssid[6];
-        u8 mcs[16];     /*16 bytes mcs for HT rates.*/
-        u32 basic_rates; /*b/g rates*/
+        /*AP*/
+        u8 bssid[6];
+        u32 vendor;
+        u8 mcs[16];     /* 16 bytes mcs for HT rates. */
+        u32 basic_rates; /* b/g rates */
         u8 ht_enable;
         u8 sgi_40;
         u8 sgi_20;
         u8 bw_40;
-        u8 mode;                /*wireless mode*/
+        u8 mode;                /* wireless mode */
         u8 slot_time;
         u8 short_preamble;
         u8 use_cts_protect;
@@ -835,9 +952,11 @@ struct rtl_mac {
         u8 retry_long;
         u16 assoc_id;
 
-         /*IBSS*/ int beacon_interval;
+        /*IBSS*/
+        int beacon_interval;
 
-         /*AMPDU*/ u8 min_space_cfg;    /*For Min spacing configurations */
+        /*AMPDU*/
+        u8 min_space_cfg;       /*For Min spacing configurations */
         u8 max_mss_density;
         u8 current_ampdu_factor;
         u8 current_ampdu_density;
@@ -852,17 +971,54 @@ struct rtl_hal {
 
         enum intf_type interface;
         u16 hw_type;            /*92c or 92d or 92s and so on */
+        u8 ic_class;
         u8 oem_id;
-        u8 version;             /*version of chip */
+        u32 version;            /*version of chip */
         u8 state;               /*stop 0, start 1 */
 
         /*firmware */
+        u32 fwsize;
         u8 *pfirmware;
-        bool b_h2c_setinprogress;
+        u16 fw_version;
+        u16 fw_subversion;
+        bool h2c_setinprogress;
         u8 last_hmeboxnum;
-        bool bfw_ready;
+        bool fw_ready;
         /*Reserve page start offset except beacon in TxQ. */
         u8 fw_rsvdpage_startoffset;
+        u8 h2c_txcmd_seq;
+
+        /* FW Cmd IO related */
+        u16 fwcmd_iomap;
+        u32 fwcmd_ioparam;
+        bool set_fwcmd_inprogress;
+        u8 current_fwcmd_io;
+
+        /**/
+        bool driver_going2unload;
+
+        /*AMPDU init min space*/
+        u8 minspace_cfg;        /*For Min spacing configurations */
+
+        /* Dual mac */
+        enum macphy_mode macphymode;
+        enum band_type current_bandtype;        /* 0:2.4G, 1:5G */
+        enum band_type current_bandtypebackup;
+        enum band_type bandset;
+        /* dual MAC 0--Mac0 1--Mac1 */
+        u32 interfaceindex;
+        /* just for DualMac S3S4 */
+        u8 macphyctl_reg;
+        bool earlymode_enable;
+        /* Dual mac*/
+        bool during_mac0init_radiob;
+        bool during_mac1init_radioa;
+        bool reloadtxpowerindex;
+        /* True if IMR or IQK  have done
+        for 2.4G in scan progress */
+        bool load_imrandiqk_setting_for2g;
+
+        bool disable_amsdu_8k;
 };
 
 struct rtl_security {
@@ -887,48 +1043,61 @@ struct rtl_security {
 };
 
 struct rtl_dm {
-        /*PHY status for DM */
+        /*PHY status for Dynamic Management */
         long entry_min_undecoratedsmoothed_pwdb;
         long undecorated_smoothed_pwdb; /*out dm */
         long entry_max_undecoratedsmoothed_pwdb;
-        bool b_dm_initialgain_enable;
-        bool bdynamic_txpower_enable;
-        bool bcurrent_turbo_edca;
-        bool bis_any_nonbepkts; /*out dm */
-        bool bis_cur_rdlstate;
-        bool btxpower_trackingInit;
-        bool b_disable_framebursting;
-        bool b_cck_inch14;
-        bool btxpower_tracking;
-        bool b_useramask;
-        bool brfpath_rxenable[4];
-
+        bool dm_initialgain_enable;
+        bool dynamic_txpower_enable;
+        bool current_turbo_edca;
+        bool is_any_nonbepkts;  /*out dm */
+        bool is_cur_rdlstate;
+        bool txpower_trackingInit;
+        bool disable_framebursting;
+        bool cck_inch14;
+        bool txpower_tracking;
+        bool useramask;
+        bool rfpath_rxenable[4];
+        bool inform_fw_driverctrldm;
+        bool current_mrc_switch;
+        u8 txpowercount;
+
+        u8 thermalvalue_rxgain;
         u8 thermalvalue_iqk;
         u8 thermalvalue_lck;
         u8 thermalvalue;
         u8 last_dtp_lvl;
+        u8 thermalvalue_avg[AVG_THERMAL_NUM];
+        u8 thermalvalue_avg_index;
+        bool done_txpower;
         u8 dynamic_txhighpower_lvl;     /*Tx high power level */
-        u8 dm_flag;     /*Indicate if each dynamic mechanism's status. */
+        u8 dm_flag;             /*Indicate each dynamic mechanism's status. */
         u8 dm_type;
         u8 txpower_track_control;
-
+        bool interrupt_migration;
+        bool disable_tx_int;
         char ofdm_index[2];
         char cck_index;
+        u8 power_index_backup[6];
 };
 
-#define EFUSE_MAX_LOGICAL_SIZE                   128
+#define EFUSE_MAX_LOGICAL_SIZE                  256
 
 struct rtl_efuse {
-        bool bautoLoad_ok;
+        bool autoLoad_ok;
         bool bootfromefuse;
         u16 max_physical_size;
-        u8 contents[EFUSE_MAX_LOGICAL_SIZE];
 
         u8 efuse_map[2][EFUSE_MAX_LOGICAL_SIZE];
         u16 efuse_usedbytes;
         u8 efuse_usedpercentage;
+#ifdef EFUSE_REPG_WORKAROUND
+        bool efuse_re_pg_sec1flag;
+        u8 efuse_re_pg_data[8];
+#endif
 
         u8 autoload_failflag;
+        u8 autoload_status;
 
         short epromtype;
         u16 eeprom_vid;
@@ -938,69 +1107,90 @@ struct rtl_efuse {
         u8 eeprom_oemid;
         u16 eeprom_channelplan;
         u8 eeprom_version;
+        u8 board_type;
+        u8 external_pa;
 
         u8 dev_addr[6];
 
-        bool b_txpwr_fromeprom;
+        bool txpwr_fromeprom;
+        u8 eeprom_crystalcap;
         u8 eeprom_tssi[2];
-        u8 eeprom_pwrlimit_ht20[3];
-        u8 eeprom_pwrlimit_ht40[3];
-        u8 eeprom_chnlarea_txpwr_cck[2][3];
-        u8 eeprom_chnlarea_txpwr_ht40_1s[2][3];
-        u8 eeprom_chnlarea_txpwr_ht40_2sdiif[2][3];
-        u8 txpwrlevel_cck[2][14];
-        u8 txpwrlevel_ht40_1s[2][14];   /*For HT 40MHZ pwr */
-        u8 txpwrlevel_ht40_2s[2][14];   /*For HT 40MHZ pwr */
+        u8 eeprom_tssi_5g[3][2]; /* for 5GL/5GM/5GH band. */
+        u8 eeprom_pwrlimit_ht20[CHANNEL_GROUP_MAX];
+        u8 eeprom_pwrlimit_ht40[CHANNEL_GROUP_MAX];
+        u8 eeprom_chnlarea_txpwr_cck[2][CHANNEL_GROUP_MAX_2G];
+        u8 eeprom_chnlarea_txpwr_ht40_1s[2][CHANNEL_GROUP_MAX];
+        u8 eeprom_chnlarea_txpwr_ht40_2sdiif[2][CHANNEL_GROUP_MAX];
+        u8 txpwrlevel_cck[2][CHANNEL_MAX_NUMBER_2G];
+        u8 txpwrlevel_ht40_1s[2][CHANNEL_MAX_NUMBER];   /*For HT 40MHZ pwr */
+        u8 txpwrlevel_ht40_2s[2][CHANNEL_MAX_NUMBER];   /*For HT 40MHZ pwr */
+
+        u8 internal_pa_5g[2];   /* pathA / pathB */
+        u8 eeprom_c9;
+        u8 eeprom_cc;
 
         /*For power group */
-        u8 pwrgroup_ht20[2][14];
-        u8 pwrgroup_ht40[2][14];
-
-        char txpwr_ht20diff[2][14];     /*HT 20<->40 Pwr diff */
-        u8 txpwr_legacyhtdiff[2][14];   /*For HT<->legacy pwr diff */
+        u8 eeprom_pwrgroup[2][3];
+        u8 pwrgroup_ht20[2][CHANNEL_MAX_NUMBER];
+        u8 pwrgroup_ht40[2][CHANNEL_MAX_NUMBER];
+
+        char txpwr_ht20diff[2][CHANNEL_MAX_NUMBER]; /*HT 20<->40 Pwr diff */
+        /*For HT<->legacy pwr diff*/
+        u8 txpwr_legacyhtdiff[2][CHANNEL_MAX_NUMBER];
+        u8 txpwr_safetyflag;                    /* Band edge enable flag */
+        u16 eeprom_txpowerdiff;
+        u8 legacy_httxpowerdiff;        /* Legacy to HT rate power diff */
+        u8 antenna_txpwdiff[3];
 
         u8 eeprom_regulatory;
         u8 eeprom_thermalmeter;
-        /*ThermalMeter, index 0 for RFIC0, and 1 for RFIC1 */
-        u8 thermalmeter[2];
+        u8 thermalmeter[2]; /*ThermalMeter, index 0 for RFIC0, 1 for RFIC1 */
+        u16 tssi_13dbm;
+        u8 crystalcap;          /* CrystalCap. */
+        u8 delta_iqk;
+        u8 delta_lck;
 
         u8 legacy_ht_txpowerdiff;       /*Legacy to HT rate power diff */
-        bool b_apk_thermalmeterignore;
+        bool apk_thermalmeterignore;
+
+        bool b1x1_recvcombine;
+        bool b1ss_support;
+
+        /*channel plan */
+        u8 channel_plan;
 };
 
 struct rtl_ps_ctl {
+        bool pwrdomain_protect;
         bool set_rfpowerstate_inprogress;
-        bool b_in_powersavemode;
+        bool in_powersavemode;
         bool rfchange_inprogress;
-        bool b_swrf_processing;
-        bool b_hwradiooff;
-
-        u32 last_sleep_jiffies;
-        u32 last_awake_jiffies;
-        u32 last_delaylps_stamp_jiffies;
+        bool swrf_processing;
+        bool hwradiooff;
 
         /*
          * just for PCIE ASPM
          * If it supports ASPM, Offset[560h] = 0x40,
          * otherwise Offset[560h] = 0x00.
          * */
-        bool b_support_aspm;
-        bool b_support_backdoor;
+        bool support_aspm;
+        bool support_backdoor;
 
         /*for LPS */
         enum rt_psmode dot11_psmode;    /*Power save mode configured. */
-        bool b_leisure_ps;
-        bool b_fwctrl_lps;
+        bool swctrl_lps;
+        bool leisure_ps;
+        bool fwctrl_lps;
         u8 fwctrl_psmode;
         /*For Fw control LPS mode */
-        u8 b_reg_fwctrl_lps;
+        u8 reg_fwctrl_lps;
         /*Record Fw PS mode status. */
-        bool b_fw_current_inpsmode;
+        bool fw_current_inpsmode;
         u8 reg_max_lps_awakeintvl;
         bool report_linked;
 
         /*for IPS */
-        bool b_inactiveps;
+        bool inactiveps;
 
         u32 rfoff_reason;
 
@@ -1011,8 +1201,26 @@ struct rtl_ps_ctl {
         /*just for PCIE ASPM */
         u8 const_amdpci_aspm;
 
+        bool pwrdown_mode;
+
         enum rf_pwrstate inactive_pwrstate;
         enum rf_pwrstate rfpwr_state;   /*cur power state */
+
+        /* for SW LPS*/
+        bool sw_ps_enabled;
+        bool state;
+        bool state_inap;
+        bool multi_buffered;
+        u16 nullfunc_seq;
+        unsigned int dtim_counter;
+        unsigned int sleep_ms;
+        unsigned long last_sleep_jiffies;
+        unsigned long last_awake_jiffies;
+        unsigned long last_delaylps_stamp_jiffies;
+        unsigned long last_dtim;
+        unsigned long last_beacon;
+        unsigned long last_action;
+        unsigned long last_slept;
 };
 
 struct rtl_stats {
@@ -1038,10 +1246,10 @@ struct rtl_stats {
         s32 recvsignalpower;
         s8 rxpower;             /*in dBm Translate from PWdB */
         u8 signalstrength;      /*in 0-100 index. */
-        u16 b_hwerror:1;
-        u16 b_crc:1;
-        u16 b_icv:1;
-        u16 b_shortpreamble:1;
+        u16 hwerror:1;
+        u16 crc:1;
+        u16 icv:1;
+        u16 shortpreamble:1;
         u16 antenna:1;
         u16 decrypted:1;
         u16 wakeup:1;
@@ -1050,15 +1258,16 @@ struct rtl_stats {
 
         u8 rx_drvinfo_size;
         u8 rx_bufshift;
-        bool b_isampdu;
+        bool isampdu;
+        bool isfirst_ampdu;
         bool rx_is40Mhzpacket;
         u32 rx_pwdb_all;
         u8 rx_mimo_signalstrength[4];   /*in 0~100 index */
         s8 rx_mimo_signalquality[2];
-        bool b_packet_matchbssid;
-        bool b_is_cck;
-        bool b_packet_toself;
-        bool b_packet_beacon;   /*for rssi */
+        bool packet_matchbssid;
+        bool is_cck;
+        bool packet_toself;
+        bool packet_beacon;     /*for rssi */
         char cck_adc_pwdb[4];   /*for rx path selection */
 };
 
@@ -1069,23 +1278,23 @@ struct rt_link_detect {
         u32 num_tx_inperiod;
         u32 num_rx_inperiod;
 
-        bool b_busytraffic;
-        bool b_higher_busytraffic;
-        bool b_higher_busyrxtraffic;
+        bool busytraffic;
+        bool higher_busytraffic;
+        bool higher_busyrxtraffic;
 };
 
 struct rtl_tcb_desc {
-        u8 b_packet_bw:1;
-        u8 b_multicast:1;
-        u8 b_broadcast:1;
-
-        u8 b_rts_stbc:1;
-        u8 b_rts_enable:1;
-        u8 b_cts_enable:1;
-        u8 b_rts_use_shortpreamble:1;
-        u8 b_rts_use_shortgi:1;
+        u8 packet_bw:1;
+        u8 multicast:1;
+        u8 broadcast:1;
+
+        u8 rts_stbc:1;
+        u8 rts_enable:1;
+        u8 cts_enable:1;
+        u8 rts_use_shortpreamble:1;
+        u8 rts_use_shortgi:1;
         u8 rts_sc:1;
-        u8 b_rts_bw:1;
+        u8 rts_bw:1;
         u8 rts_rate;
 
         u8 use_shortgi:1;
@@ -1096,20 +1305,34 @@ struct rtl_tcb_desc {
         u8 ratr_index;
         u8 mac_id;
         u8 hw_rate;
+
+        u8 last_inipkt:1;
+        u8 cmd_or_init:1;
+        u8 queue_index;
+
+        /* early mode */
+        u8 empkt_num;
+        /* The max value by HW */
+        u32 empkt_len[5];
 };
 
 struct rtl_hal_ops {
         int (*init_sw_vars) (struct ieee80211_hw *hw);
         void (*deinit_sw_vars) (struct ieee80211_hw *hw);
+        void (*read_chip_version)(struct ieee80211_hw *hw);
         void (*read_eeprom_info) (struct ieee80211_hw *hw);
         void (*interrupt_recognized) (struct ieee80211_hw *hw,
                                       u32 *p_inta, u32 *p_intb);
         int (*hw_init) (struct ieee80211_hw *hw);
         void (*hw_disable) (struct ieee80211_hw *hw);
+        void (*hw_suspend) (struct ieee80211_hw *hw);
+        void (*hw_resume) (struct ieee80211_hw *hw);
         void (*enable_interrupt) (struct ieee80211_hw *hw);
         void (*disable_interrupt) (struct ieee80211_hw *hw);
         int (*set_network_type) (struct ieee80211_hw *hw,
                                  enum nl80211_iftype type);
+        void (*set_chk_bssid)(struct ieee80211_hw *hw,
+                                bool check_bssid);
         void (*set_bw_mode) (struct ieee80211_hw *hw,
                              enum nl80211_channel_type ch_type);
          u8(*switch_channel) (struct ieee80211_hw *hw);
@@ -1126,23 +1349,26 @@ struct rtl_hal_ops {
                               struct ieee80211_hdr *hdr, u8 *pdesc_tx,
                               struct ieee80211_tx_info *info,
                               struct sk_buff *skb, unsigned int queue_index);
+        void (*fill_fake_txdesc) (struct ieee80211_hw *hw, u8 * pDesc,
+                                  u32 buffer_len, bool bIsPsPoll);
         void (*fill_tx_cmddesc) (struct ieee80211_hw *hw, u8 *pdesc,
-                                 bool b_firstseg, bool b_lastseg,
+                                 bool firstseg, bool lastseg,
                                  struct sk_buff *skb);
-         bool(*query_rx_desc) (struct ieee80211_hw *hw,
+        bool (*cmd_send_packet)(struct ieee80211_hw *hw, struct sk_buff *skb);
+        bool (*query_rx_desc) (struct ieee80211_hw *hw,
                                struct rtl_stats *stats,
                                struct ieee80211_rx_status *rx_status,
                                u8 *pdesc, struct sk_buff *skb);
         void (*set_channel_access) (struct ieee80211_hw *hw);
-         bool(*radio_onoff_checking) (struct ieee80211_hw *hw, u8 *valid);
+        bool (*radio_onoff_checking) (struct ieee80211_hw *hw, u8 *valid);
         void (*dm_watchdog) (struct ieee80211_hw *hw);
         void (*scan_operation_backup) (struct ieee80211_hw *hw, u8 operation);
-         bool(*set_rf_power_state) (struct ieee80211_hw *hw,
+        bool (*set_rf_power_state) (struct ieee80211_hw *hw,
                                     enum rf_pwrstate rfpwr_state);
         void (*led_control) (struct ieee80211_hw *hw,
                              enum led_ctl_mode ledaction);
         void (*set_desc) (u8 *pdesc, bool istx, u8 desc_name, u8 *val);
-         u32(*get_desc) (u8 *pdesc, bool istx, u8 desc_name);
+        u32 (*get_desc) (u8 *pdesc, bool istx, u8 desc_name);
         void (*tx_polling) (struct ieee80211_hw *hw, unsigned int hw_queue);
         void (*enable_hw_sec) (struct ieee80211_hw *hw);
         void (*set_key) (struct ieee80211_hw *hw, u32 key_index,
@@ -1150,10 +1376,10 @@ struct rtl_hal_ops {
                          bool is_wepkey, bool clear_all);
         void (*init_sw_leds) (struct ieee80211_hw *hw);
         void (*deinit_sw_leds) (struct ieee80211_hw *hw);
-         u32(*get_bbreg) (struct ieee80211_hw *hw, u32 regaddr, u32 bitmask);
+        u32 (*get_bbreg) (struct ieee80211_hw *hw, u32 regaddr, u32 bitmask);
         void (*set_bbreg) (struct ieee80211_hw *hw, u32 regaddr, u32 bitmask,
                            u32 data);
-         u32(*get_rfreg) (struct ieee80211_hw *hw, enum radio_path rfpath,
+        u32 (*get_rfreg) (struct ieee80211_hw *hw, enum radio_path rfpath,
                           u32 regaddr, u32 bitmask);
         void (*set_rfreg) (struct ieee80211_hw *hw, enum radio_path rfpath,
                            u32 regaddr, u32 bitmask, u32 data);
@@ -1161,11 +1387,13 @@ struct rtl_hal_ops {
 
 struct rtl_intf_ops {
         /*com */
+        void (*read_efuse_byte)(struct ieee80211_hw *hw, u16 _offset, u8 *pbuf);
         int (*adapter_start) (struct ieee80211_hw *hw);
         void (*adapter_stop) (struct ieee80211_hw *hw);
 
         int (*adapter_tx) (struct ieee80211_hw *hw, struct sk_buff *skb);
         int (*reset_trx_ring) (struct ieee80211_hw *hw);
+        bool (*waitq_insert) (struct ieee80211_hw *hw, struct sk_buff *skb);
 
         /*pci */
         void (*disable_aspm) (struct ieee80211_hw *hw);
@@ -1179,11 +1407,36 @@ struct rtl_mod_params {
         int sw_crypto;
 };
 
+struct rtl_hal_usbint_cfg {
+        /* data - rx */
+        u32 in_ep_num;
+        u32 rx_urb_num;
+        u32 rx_max_size;
+
+        /* op - rx */
+        void (*usb_rx_hdl)(struct ieee80211_hw *, struct sk_buff *);
+        void (*usb_rx_segregate_hdl)(struct ieee80211_hw *, struct sk_buff *,
+                                     struct sk_buff_head *);
+
+        /* tx */
+        void (*usb_tx_cleanup)(struct ieee80211_hw *, struct sk_buff *);
+        int (*usb_tx_post_hdl)(struct ieee80211_hw *, struct urb *,
+                               struct sk_buff *);
+        struct sk_buff *(*usb_tx_aggregate_hdl)(struct ieee80211_hw *,
+                                                struct sk_buff_head *);
+
+        /* endpoint mapping */
+        int (*usb_endpoint_mapping)(struct ieee80211_hw *hw);
+        u16 (*usb_mq_to_hwq)(__le16 fc, u16 mac80211_queue_index);
+};
+
 struct rtl_hal_cfg {
+        u8 bar_id;
         char *name;
         char *fw_name;
         struct rtl_hal_ops *ops;
         struct rtl_mod_params *mod_params;
+        struct rtl_hal_usbint_cfg *usb_interface_cfg;
 
         /*this map used for some registers or vars
            defined int HAL but used in MAIN */
@@ -1202,6 +1455,11 @@ struct rtl_locks {
         spinlock_t rf_ps_lock;
         spinlock_t rf_lock;
         spinlock_t lps_lock;
+        spinlock_t waitq_lock;
+        spinlock_t tx_urb_lock;
+
+        /*Dual mac*/
+        spinlock_t cck_and_rw_pagea_lock;
 };
 
 struct rtl_works {
@@ -1218,12 +1476,20 @@ struct rtl_works {
         struct workqueue_struct *rtl_wq;
         struct delayed_work watchdog_wq;
         struct delayed_work ips_nic_off_wq;
+
+        /* For SW LPS */
+        struct delayed_work ps_work;
+        struct delayed_work ps_rfon_wq;
 };
 
 struct rtl_debug {
         u32 dbgp_type[DBGP_TYPE_MAX];
         u32 global_debuglevel;
         u64 global_debugcomponents;
+
+        /* add for proc debug */
+        struct proc_dir_entry *proc_dir;
+        char proc_name[20];
 };
 
 struct rtl_priv {
@@ -1274,6 +1540,91 @@ struct rtl_priv {
 #define rtl_efuse(rtlpriv)      (&((rtlpriv)->efuse))
 #define rtl_psc(rtlpriv)        (&((rtlpriv)->psc))
 
+
+/***************************************
+    Bluetooth Co-existance Related
+****************************************/
+
+enum bt_ant_num {
+        ANT_X2 = 0,
+        ANT_X1 = 1,
+};
+
+enum bt_co_type {
+        BT_2WIRE = 0,
+        BT_ISSC_3WIRE = 1,
+        BT_ACCEL = 2,
+        BT_CSR_BC4 = 3,
+        BT_CSR_BC8 = 4,
+        BT_RTL8756 = 5,
+};
+
+enum bt_cur_state {
+        BT_OFF = 0,
+        BT_ON = 1,
+};
+
+enum bt_service_type {
+        BT_SCO = 0,
+        BT_A2DP = 1,
+        BT_HID = 2,
+        BT_HID_IDLE = 3,
+        BT_SCAN = 4,
+        BT_IDLE = 5,
+        BT_OTHER_ACTION = 6,
+        BT_BUSY = 7,
+        BT_OTHERBUSY = 8,
+        BT_PAN = 9,
+};
+
+enum bt_radio_shared {
+        BT_RADIO_SHARED = 0,
+        BT_RADIO_INDIVIDUAL = 1,
+};
+
+struct bt_coexist_info {
+
+        /* EEPROM BT info. */
+        u8 eeprom_bt_coexist;
+        u8 eeprom_bt_type;
+        u8 eeprom_bt_ant_num;
+        u8 eeprom_bt_ant_isolation;
+        u8 eeprom_bt_radio_shared;
+
+        u8 bt_coexistence;
+        u8 bt_ant_num;
+        u8 bt_coexist_type;
+        u8 bt_state;
+        u8 bt_cur_state;        /* 0:on, 1:off */
+        u8 bt_ant_isolation;    /* 0:good, 1:bad */
+        u8 bt_pape_ctrl;        /* 0:SW, 1:SW/HW dynamic */
+        u8 bt_service;
+        u8 bt_radio_shared_type;
+        u8 bt_rfreg_origin_1e;
+        u8 bt_rfreg_origin_1f;
+        u8 bt_rssi_state;
+        u32 ratio_tx;
+        u32 ratio_pri;
+        u32 bt_edca_ul;
+        u32 bt_edca_dl;
+
+        bool b_init_set;
+        bool b_bt_busy_traffic;
+        bool b_bt_traffic_mode_set;
+        bool b_bt_non_traffic_mode_set;
+
+        bool b_fw_coexist_all_off;
+        bool b_sw_coexist_all_off;
+        u32 current_state;
+        u32 previous_state;
+        u8 bt_pre_rssi_state;
+
+        u8 b_reg_bt_iso;
+        u8 b_reg_bt_sco;
+
+};
+
+
 /****************************************
         mem access macro define start
         Call endian free function when
@@ -1281,7 +1632,7 @@ struct rtl_priv {
         2. Before write integer to IO.
         3. After read integer from IO.
 ****************************************/
-/* Convert little data endian to host */
+/* Convert little data endian to host ordering */
 #define EF1BYTE(_val)           \
         ((u8)(_val))
 #define EF2BYTE(_val)           \
@@ -1289,27 +1640,21 @@ struct rtl_priv {
 #define EF4BYTE(_val)           \
         (le32_to_cpu(_val))
 
-/* Read data from memory */
-#define READEF1BYTE(_ptr)       \
-        EF1BYTE(*((u8 *)(_ptr)))
+/* Read le16 data from memory and convert to host ordering */
 #define READEF2BYTE(_ptr)       \
         EF2BYTE(*((u16 *)(_ptr)))
-#define READEF4BYTE(_ptr)       \
-        EF4BYTE(*((u32 *)(_ptr)))
 
-/* Write data to memory */
-#define WRITEEF1BYTE(_ptr, _val)        \
-        (*((u8 *)(_ptr))) = EF1BYTE(_val)
+/* Write le16 data to memory in host ordering */
 #define WRITEEF2BYTE(_ptr, _val)        \
         (*((u16 *)(_ptr))) = EF2BYTE(_val)
-#define WRITEEF4BYTE(_ptr, _val)        \
-        (*((u32 *)(_ptr))) = EF4BYTE(_val)
-
-/*Example:
-BIT_LEN_MASK_32(0) => 0x00000000
-BIT_LEN_MASK_32(1) => 0x00000001
-BIT_LEN_MASK_32(2) => 0x00000003
-BIT_LEN_MASK_32(32) => 0xFFFFFFFF*/
+
+/* Create a bit mask
+ * Examples:
+ * BIT_LEN_MASK_32(0) => 0x00000000
+ * BIT_LEN_MASK_32(1) => 0x00000001
+ * BIT_LEN_MASK_32(2) => 0x00000003
+ * BIT_LEN_MASK_32(32) => 0xFFFFFFFF
+ */
 #define BIT_LEN_MASK_32(__bitlen)        \
         (0xFFFFFFFF >> (32 - (__bitlen)))
 #define BIT_LEN_MASK_16(__bitlen)        \
@@ -1317,9 +1662,11 @@ BIT_LEN_MASK_32(32) => 0xFFFFFFFF*/
 #define BIT_LEN_MASK_8(__bitlen) \
         (0xFF >> (8 - (__bitlen)))
 
-/*Example:
-BIT_OFFSET_LEN_MASK_32(0, 2) => 0x00000003
-BIT_OFFSET_LEN_MASK_32(16, 2) => 0x00030000*/
+/* Create an offset bit mask
+ * Examples:
+ * BIT_OFFSET_LEN_MASK_32(0, 2) => 0x00000003
+ * BIT_OFFSET_LEN_MASK_32(16, 2) => 0x00030000
+ */
 #define BIT_OFFSET_LEN_MASK_32(__bitoffset, __bitlen) \
         (BIT_LEN_MASK_32(__bitlen) << (__bitoffset))
 #define BIT_OFFSET_LEN_MASK_16(__bitoffset, __bitlen) \
@@ -1328,8 +1675,9 @@ BIT_OFFSET_LEN_MASK_32(16, 2) => 0x00030000*/
         (BIT_LEN_MASK_8(__bitlen) << (__bitoffset))
 
 /*Description:
-Return 4-byte value in host byte ordering from
-4-byte pointer in little-endian system.*/
+ * Return 4-byte value in host byte ordering from
+ * 4-byte pointer in little-endian system.
+ */
 #define LE_P4BYTE_TO_HOST_4BYTE(__pstart) \
         (EF4BYTE(*((u32 *)(__pstart))))
 #define LE_P2BYTE_TO_HOST_2BYTE(__pstart) \
@@ -1337,28 +1685,10 @@ Return 4-byte value in host byte ordering from
 #define LE_P1BYTE_TO_HOST_1BYTE(__pstart) \
         (EF1BYTE(*((u8 *)(__pstart))))
 
-/*Description:
-Translate subfield (continuous bits in little-endian) of 4-byte
-value to host byte ordering.*/
-#define LE_BITS_TO_4BYTE(__pstart, __bitoffset, __bitlen) \
-        ( \
-                (LE_P4BYTE_TO_HOST_4BYTE(__pstart) >> (__bitoffset))  & \
-                BIT_LEN_MASK_32(__bitlen) \
-        )
-#define LE_BITS_TO_2BYTE(__pstart, __bitoffset, __bitlen) \
-        ( \
-                (LE_P2BYTE_TO_HOST_2BYTE(__pstart) >> (__bitoffset)) & \
-                BIT_LEN_MASK_16(__bitlen) \
-        )
-#define LE_BITS_TO_1BYTE(__pstart, __bitoffset, __bitlen) \
-        ( \
-                (LE_P1BYTE_TO_HOST_1BYTE(__pstart) >> (__bitoffset)) & \
-                BIT_LEN_MASK_8(__bitlen) \
-        )
-
-/*Description:
-Mask subfield (continuous bits in little-endian) of 4-byte value
-and return the result in 4-byte value in host byte ordering.*/
+/* Description:
+ * Mask subfield (continuous bits in little-endian) of 4-byte value
+ * and return the result in 4-byte value in host byte ordering.
+ */
 #define LE_BITS_CLEARED_TO_4BYTE(__pstart, __bitoffset, __bitlen) \
         ( \
                 LE_P4BYTE_TO_HOST_4BYTE(__pstart)  & \
@@ -1375,20 +1705,9 @@ and return the result in 4-byte value in host byte ordering.*/
                 (~BIT_OFFSET_LEN_MASK_8(__bitoffset, __bitlen)) \
         )
 
-/*Description:
-Set subfield of little-endian 4-byte value to specified value.  */
-#define SET_BITS_TO_LE_4BYTE(__pstart, __bitoffset, __bitlen, __val) \
-        *((u32 *)(__pstart)) = EF4BYTE \
-        ( \
-                LE_BITS_CLEARED_TO_4BYTE(__pstart, __bitoffset, __bitlen) | \
-                ((((u32)__val) & BIT_LEN_MASK_32(__bitlen)) << (__bitoffset)) \
-        );
-#define SET_BITS_TO_LE_2BYTE(__pstart, __bitoffset, __bitlen, __val) \
-        *((u16 *)(__pstart)) = EF2BYTE \
-        ( \
-                LE_BITS_CLEARED_TO_2BYTE(__pstart, __bitoffset, __bitlen) | \
-                ((((u16)__val) & BIT_LEN_MASK_16(__bitlen)) << (__bitoffset)) \
-        );
+/* Description:
+ * Set subfield of little-endian 4-byte value to specified value.
+ */
 #define SET_BITS_TO_LE_1BYTE(__pstart, __bitoffset, __bitlen, __val) \
         *((u8 *)(__pstart)) = EF1BYTE \
         ( \
@@ -1400,13 +1719,14 @@ Set subfield of little-endian 4-byte value to specified value.	*/
         mem access macro define end
 ****************************************/
 
-#define packet_get_type(_packet) (EF1BYTE((_packet).octet[0]) & 0xFC)
+#define byte(x, n) ((x >> (8 * n)) & 0xff)
+
 #define RTL_WATCH_DOG_TIME      2000
 #define MSECS(t)                msecs_to_jiffies(t)
-#define WLAN_FC_GET_VERS(fc)    ((fc) & IEEE80211_FCTL_VERS)
-#define WLAN_FC_GET_TYPE(fc)    ((fc) & IEEE80211_FCTL_FTYPE)
-#define WLAN_FC_GET_STYPE(fc)   ((fc) & IEEE80211_FCTL_STYPE)
-#define WLAN_FC_MORE_DATA(fc)   ((fc) & IEEE80211_FCTL_MOREDATA)
+#define WLAN_FC_GET_VERS(fc)    (le16_to_cpu(fc) & IEEE80211_FCTL_VERS)
+#define WLAN_FC_GET_TYPE(fc)    (le16_to_cpu(fc) & IEEE80211_FCTL_FTYPE)
+#define WLAN_FC_GET_STYPE(fc)   (le16_to_cpu(fc) & IEEE80211_FCTL_STYPE)
+#define WLAN_FC_MORE_DATA(fc)   (le16_to_cpu(fc) & IEEE80211_FCTL_MOREDATA)
 #define SEQ_TO_SN(seq)          (((seq) & IEEE80211_SCTL_SEQ) >> 4)
 #define SN_TO_SEQ(ssn)          (((ssn) << 4) & IEEE80211_SCTL_SEQ)
 #define MAX_SN                  ((IEEE80211_SCTL_SEQ) >> 4)
@@ -1420,6 +1740,8 @@ Set subfield of little-endian 4-byte value to specified value.	*/
 #define RT_RF_OFF_LEVL_FW_32K           BIT(5)  /*FW in 32k */
 /*Always enable ASPM and Clock Req in initialization.*/
 #define RT_RF_PS_LEVEL_ALWAYS_ASPM      BIT(6)
+/* no matter RFOFF or SLEEP we set PS_ASPM_LEVL*/
+#define RT_PS_LEVEL_ASPM                BIT(7)
 /*When LPS is on, disable 2R if no packet is received or transmittd.*/
 #define RT_RF_LPS_DISALBE_2R            BIT(30)
 #define RT_RF_LPS_LEVEL_ASPM            BIT(31) /*LPS with ASPM */
@@ -1433,15 +1755,6 @@ Set subfield of little-endian 4-byte value to specified value.	*/
 #define container_of_dwork_rtl(x, y, z) \
         container_of(container_of(x, struct delayed_work, work), y, z)
 
-#define FILL_OCTET_STRING(_os, _octet, _len)    \
-                (_os).octet = (u8 *)(_octet);           \
-                (_os).length = (_len);
-
-#define CP_MACADDR(des, src)    \
-        ((des)[0] = (src)[0], (des)[1] = (src)[1],\
-        (des)[2] = (src)[2], (des)[3] = (src)[3],\
-        (des)[4] = (src)[4], (des)[5] = (src)[5])
-
 static inline u8 rtl_read_byte(struct rtl_priv *rtlpriv, u32 addr)
 {
         return rtlpriv->io.read8_sync(rtlpriv, addr);
diff --git a/drivers/net/wireless/wl12xx/Kconfig b/drivers/net/wireless/wl12xx/Kconfig
index 0e65bce457d6..692ebff38fc8 100644
--- a/drivers/net/wireless/wl12xx/Kconfig
+++ b/drivers/net/wireless/wl12xx/Kconfig
@@ -54,7 +54,7 @@ config WL12XX_SDIO
 
 config WL12XX_SDIO_TEST
         tristate "TI wl12xx SDIO testing support"
-        depends on WL12XX && MMC
+        depends on WL12XX && MMC && WL12XX_SDIO
         default n
         ---help---
           This module adds support for the SDIO bus testing with the
diff --git a/drivers/net/wireless/wl12xx/acx.c b/drivers/net/wireless/wl12xx/acx.c
index afdc601aa7ea..33840d95d17d 100644
--- a/drivers/net/wireless/wl12xx/acx.c
+++ b/drivers/net/wireless/wl12xx/acx.c
@@ -783,6 +783,10 @@ int wl1271_acx_sta_rate_policies(struct wl1271 *wl)
 
         acx->rate_class_cnt = cpu_to_le32(ACX_TX_RATE_POLICY_CNT);
 
+        wl1271_debug(DEBUG_ACX, "basic_rate: 0x%x, full_rate: 0x%x",
+                acx->rate_class[ACX_TX_BASIC_RATE].enabled_rates,
+                acx->rate_class[ACX_TX_AP_FULL_RATE].enabled_rates);
+
         ret = wl1271_cmd_configure(wl, ACX_RATE_POLICY, acx, sizeof(*acx));
         if (ret < 0) {
                 wl1271_warning("Setting of rate policies failed: %d", ret);
@@ -947,9 +951,9 @@ out:
         return ret;
 }
 
-int wl1271_acx_mem_cfg(struct wl1271 *wl)
+int wl1271_acx_ap_mem_cfg(struct wl1271 *wl)
 {
-        struct wl1271_acx_config_memory *mem_conf;
+        struct wl1271_acx_ap_config_memory *mem_conf;
         int ret;
 
         wl1271_debug(DEBUG_ACX, "wl1271 mem cfg");
@@ -961,10 +965,10 @@ int wl1271_acx_mem_cfg(struct wl1271 *wl)
         }
 
         /* memory config */
-        mem_conf->num_stations = DEFAULT_NUM_STATIONS;
-        mem_conf->rx_mem_block_num = ACX_RX_MEM_BLOCKS;
-        mem_conf->tx_min_mem_block_num = ACX_TX_MIN_MEM_BLOCKS;
-        mem_conf->num_ssid_profiles = ACX_NUM_SSID_PROFILES;
+        mem_conf->num_stations = wl->conf.mem.num_stations;
+        mem_conf->rx_mem_block_num = wl->conf.mem.rx_block_num;
+        mem_conf->tx_min_mem_block_num = wl->conf.mem.tx_min_block_num;
+        mem_conf->num_ssid_profiles = wl->conf.mem.ssid_profiles;
         mem_conf->total_tx_descriptors = cpu_to_le32(ACX_TX_DESCRIPTORS);
 
         ret = wl1271_cmd_configure(wl, ACX_MEM_CFG, mem_conf,
@@ -979,13 +983,45 @@ out:
         return ret;
 }
 
-int wl1271_acx_init_mem_config(struct wl1271 *wl)
+int wl1271_acx_sta_mem_cfg(struct wl1271 *wl)
 {
+        struct wl1271_acx_sta_config_memory *mem_conf;
         int ret;
 
-        ret = wl1271_acx_mem_cfg(wl);
-        if (ret < 0)
-                return ret;
+        wl1271_debug(DEBUG_ACX, "wl1271 mem cfg");
+
+        mem_conf = kzalloc(sizeof(*mem_conf), GFP_KERNEL);
+        if (!mem_conf) {
+                ret = -ENOMEM;
+                goto out;
+        }
+
+        /* memory config */
+        mem_conf->num_stations = wl->conf.mem.num_stations;
+        mem_conf->rx_mem_block_num = wl->conf.mem.rx_block_num;
+        mem_conf->tx_min_mem_block_num = wl->conf.mem.tx_min_block_num;
+        mem_conf->num_ssid_profiles = wl->conf.mem.ssid_profiles;
+        mem_conf->total_tx_descriptors = cpu_to_le32(ACX_TX_DESCRIPTORS);
+        mem_conf->dyn_mem_enable = wl->conf.mem.dynamic_memory;
+        mem_conf->tx_free_req = wl->conf.mem.min_req_tx_blocks;
+        mem_conf->rx_free_req = wl->conf.mem.min_req_rx_blocks;
+        mem_conf->tx_min = wl->conf.mem.tx_min;
+
+        ret = wl1271_cmd_configure(wl, ACX_MEM_CFG, mem_conf,
+                                   sizeof(*mem_conf));
+        if (ret < 0) {
+                wl1271_warning("wl1271 mem config failed: %d", ret);
+                goto out;
+        }
+
+out:
+        kfree(mem_conf);
+        return ret;
+}
+
+int wl1271_acx_init_mem_config(struct wl1271 *wl)
+{
+        int ret;
 
         wl->target_mem_map = kzalloc(sizeof(struct wl1271_acx_mem_map),
                                      GFP_KERNEL);
@@ -1476,3 +1512,33 @@ out:
         kfree(acx);
         return ret;
 }
+
+int wl1271_acx_config_ps(struct wl1271 *wl)
+{
+        struct wl1271_acx_config_ps *config_ps;
+        int ret;
+
+        wl1271_debug(DEBUG_ACX, "acx config ps");
+
+        config_ps = kzalloc(sizeof(*config_ps), GFP_KERNEL);
+        if (!config_ps) {
+                ret = -ENOMEM;
+                goto out;
+        }
+
+        config_ps->exit_retries = wl->conf.conn.psm_exit_retries;
+        config_ps->enter_retries = wl->conf.conn.psm_entry_retries;
+        config_ps->null_data_rate = cpu_to_le32(wl->basic_rate);
+
+        ret = wl1271_cmd_configure(wl, ACX_CONFIG_PS, config_ps,
+                                   sizeof(*config_ps));
+
+        if (ret < 0) {
+                wl1271_warning("acx config ps failed: %d", ret);
+                goto out;
+        }
+
+out:
+        kfree(config_ps);
+        return ret;
+}
diff --git a/drivers/net/wireless/wl12xx/acx.h b/drivers/net/wireless/wl12xx/acx.h
index 4bbaf04f434e..4e301de916bb 100644
--- a/drivers/net/wireless/wl12xx/acx.h
+++ b/drivers/net/wireless/wl12xx/acx.h
@@ -133,7 +133,6 @@ enum {
 
 #define DEFAULT_UCAST_PRIORITY          0
 #define DEFAULT_RX_Q_PRIORITY           0
-#define DEFAULT_NUM_STATIONS            1
 #define DEFAULT_RXQ_PRIORITY            0 /* low 0 .. 15 high  */
 #define DEFAULT_RXQ_TYPE                0x07    /* All frames, Data/Ctrl/Mgmt */
 #define TRACE_BUFFER_MAX_SIZE           256
@@ -797,12 +796,9 @@ struct acx_tx_config_options {
         __le16 tx_compl_threshold;   /* number of packets */
 } __packed;
 
-#define ACX_RX_MEM_BLOCKS     70
-#define ACX_TX_MIN_MEM_BLOCKS 40
 #define ACX_TX_DESCRIPTORS    32
-#define ACX_NUM_SSID_PROFILES 1
 
-struct wl1271_acx_config_memory {
+struct wl1271_acx_ap_config_memory {
         struct acx_header header;
 
         u8 rx_mem_block_num;
@@ -812,6 +808,20 @@ struct wl1271_acx_config_memory {
         __le32 total_tx_descriptors;
 } __packed;
 
+struct wl1271_acx_sta_config_memory {
+        struct acx_header header;
+
+        u8 rx_mem_block_num;
+        u8 tx_min_mem_block_num;
+        u8 num_stations;
+        u8 num_ssid_profiles;
+        __le32 total_tx_descriptors;
+        u8 dyn_mem_enable;
+        u8 tx_free_req;
+        u8 rx_free_req;
+        u8 tx_min;
+} __packed;
+
 struct wl1271_acx_mem_map {
         struct acx_header header;
 
@@ -1136,6 +1146,15 @@ struct wl1271_acx_max_tx_retry {
         u8 padding_1[2];
 } __packed;
 
+struct wl1271_acx_config_ps {
+        struct acx_header header;
+
+        u8 exit_retries;
+        u8 enter_retries;
+        u8 padding[2];
+        __le32 null_data_rate;
+} __packed;
+
 enum {
         ACX_WAKE_UP_CONDITIONS      = 0x0002,
         ACX_MEM_CFG                 = 0x0003,
@@ -1193,6 +1212,8 @@ enum {
         ACX_HT_BSS_OPERATION        = 0x0058,
         ACX_COEX_ACTIVITY           = 0x0059,
         ACX_SET_DCO_ITRIM_PARAMS    = 0x0061,
+        ACX_GEN_FW_CMD              = 0x0070,
+        ACX_HOST_IF_CFG_BITMAP      = 0x0071,
         ACX_MAX_TX_FAILURE          = 0x0072,
         DOT11_RX_MSDU_LIFE_TIME     = 0x1004,
         DOT11_CUR_TX_PWR            = 0x100D,
@@ -1200,10 +1221,8 @@ enum {
         DOT11_RTS_THRESHOLD         = 0x1013,
         DOT11_GROUP_ADDRESS_TBL     = 0x1014,
         ACX_PM_CONFIG               = 0x1016,
-
-        MAX_DOT11_IE = DOT11_GROUP_ADDRESS_TBL,
-
-        MAX_IE = 0xFFFF
+        ACX_CONFIG_PS               = 0x1017,
+        ACX_CONFIG_HANGOVER         = 0x1018,
 };
 
 
@@ -1245,7 +1264,8 @@ int wl1271_acx_tid_cfg(struct wl1271 *wl, u8 queue_id, u8 channel_type,
                        u32 apsd_conf0, u32 apsd_conf1);
 int wl1271_acx_frag_threshold(struct wl1271 *wl, u16 frag_threshold);
 int wl1271_acx_tx_config_options(struct wl1271 *wl);
-int wl1271_acx_mem_cfg(struct wl1271 *wl);
+int wl1271_acx_ap_mem_cfg(struct wl1271 *wl);
+int wl1271_acx_sta_mem_cfg(struct wl1271 *wl);
 int wl1271_acx_init_mem_config(struct wl1271 *wl);
 int wl1271_acx_init_rx_interrupt(struct wl1271 *wl);
 int wl1271_acx_smart_reflex(struct wl1271 *wl);
@@ -1269,5 +1289,6 @@ int wl1271_acx_set_ba_receiver_session(struct wl1271 *wl, u8 tid_index, u16 ssn,
                                        bool enable);
 int wl1271_acx_tsf_info(struct wl1271 *wl, u64 *mactime);
 int wl1271_acx_max_tx_retry(struct wl1271 *wl);
+int wl1271_acx_config_ps(struct wl1271 *wl);
 
 #endif /* __WL1271_ACX_H__ */
diff --git a/drivers/net/wireless/wl12xx/cmd.c b/drivers/net/wireless/wl12xx/cmd.c
index 1bb8be5e805b..97ffd7aa57a8 100644
--- a/drivers/net/wireless/wl12xx/cmd.c
+++ b/drivers/net/wireless/wl12xx/cmd.c
@@ -286,6 +286,7 @@ int wl1271_cmd_join(struct wl1271 *wl, u8 bss_type)
         join->rx_filter_options = cpu_to_le32(wl->rx_filter);
         join->bss_type = bss_type;
         join->basic_rate_set = cpu_to_le32(wl->basic_rate_set);
+        join->supported_rate_set = cpu_to_le32(wl->rate_set);
 
         if (wl->band == IEEE80211_BAND_5GHZ)
                 join->bss_type |= WL1271_JOIN_CMD_BSS_TYPE_5GHZ;
@@ -303,6 +304,9 @@ int wl1271_cmd_join(struct wl1271 *wl, u8 bss_type)
         wl->tx_security_last_seq = 0;
         wl->tx_security_seq = 0;
 
+        wl1271_debug(DEBUG_CMD, "cmd join: basic_rate_set=0x%x, rate_set=0x%x",
+                join->basic_rate_set, join->supported_rate_set);
+
         ret = wl1271_cmd_send(wl, CMD_START_JOIN, join, sizeof(*join), 0);
         if (ret < 0) {
                 wl1271_error("failed to initiate cmd join");
@@ -454,7 +458,7 @@ out:
         return ret;
 }
 
-int wl1271_cmd_ps_mode(struct wl1271 *wl, u8 ps_mode, u32 rates, bool send)
+int wl1271_cmd_ps_mode(struct wl1271 *wl, u8 ps_mode)
 {
         struct wl1271_cmd_ps_params *ps_params = NULL;
         int ret = 0;
@@ -468,10 +472,6 @@ int wl1271_cmd_ps_mode(struct wl1271 *wl, u8 ps_mode, u32 rates, bool send)
         }
 
         ps_params->ps_mode = ps_mode;
-        ps_params->send_null_data = send;
-        ps_params->retries = wl->conf.conn.psm_entry_nullfunc_retries;
-        ps_params->hang_over_period = wl->conf.conn.psm_entry_hangover_period;
-        ps_params->null_data_rate = cpu_to_le32(rates);
 
         ret = wl1271_cmd_send(wl, CMD_SET_PS_MODE, ps_params,
                               sizeof(*ps_params), 0);
diff --git a/drivers/net/wireless/wl12xx/cmd.h b/drivers/net/wireless/wl12xx/cmd.h
index 751281414006..54c12e71417e 100644
--- a/drivers/net/wireless/wl12xx/cmd.h
+++ b/drivers/net/wireless/wl12xx/cmd.h
@@ -39,7 +39,7 @@ int wl1271_cmd_test(struct wl1271 *wl, void *buf, size_t buf_len, u8 answer);
 int wl1271_cmd_interrogate(struct wl1271 *wl, u16 id, void *buf, size_t len);
 int wl1271_cmd_configure(struct wl1271 *wl, u16 id, void *buf, size_t len);
 int wl1271_cmd_data_path(struct wl1271 *wl, bool enable);
-int wl1271_cmd_ps_mode(struct wl1271 *wl, u8 ps_mode, u32 rates, bool send);
+int wl1271_cmd_ps_mode(struct wl1271 *wl, u8 ps_mode);
 int wl1271_cmd_read_memory(struct wl1271 *wl, u32 addr, void *answer,
                            size_t len);
 int wl1271_cmd_template_set(struct wl1271 *wl, u16 template_id,
@@ -140,6 +140,7 @@ enum cmd_templ {
                                   * For CTS-to-self (FastCTS) mechanism
                                   * for BT/WLAN coexistence (SoftGemini). */
         CMD_TEMPL_ARP_RSP,
+        CMD_TEMPL_LINK_MEASUREMENT_REPORT,
 
         /* AP-mode specific */
         CMD_TEMPL_AP_BEACON = 13,
@@ -216,6 +217,7 @@ struct wl1271_cmd_join {
          * ACK or CTS frames).
          */
         __le32 basic_rate_set;
+        __le32 supported_rate_set;
         u8 dtim_interval;
         /*
          * bits 0-2: This bitwise field specifies the type
@@ -278,15 +280,7 @@ struct wl1271_cmd_ps_params {
         struct wl1271_cmd_header header;
 
         u8 ps_mode; /* STATION_* */
-        u8 send_null_data; /* Do we have to send NULL data packet ? */
-        u8 retries; /* Number of retires for the initial NULL data packet */
-
-         /*
-          * TUs during which the target stays awake after switching
-          * to power save mode.
-          */
-        u8 hang_over_period;
-        __le32 null_data_rate;
+        u8 padding[3];
 } __packed;
 
 /* HW encryption keys */
diff --git a/drivers/net/wireless/wl12xx/conf.h b/drivers/net/wireless/wl12xx/conf.h
index fd1dac9ab4db..856a8a2fff4f 100644
--- a/drivers/net/wireless/wl12xx/conf.h
+++ b/drivers/net/wireless/wl12xx/conf.h
@@ -960,6 +960,14 @@ struct conf_conn_settings {
         u8 psm_entry_retries;
 
         /*
+         * Specifies the maximum number of times to try PSM exit if it fails
+         * (if sending the appropriate null-func message fails.)
+         *
+         * Range 0 - 255
+         */
+        u8 psm_exit_retries;
+
+        /*
          * Specifies the maximum number of times to try transmit the PSM entry
          * null-func frame for each PSM entry attempt
          *
@@ -1143,6 +1151,46 @@ struct conf_ht_setting {
         u16 inactivity_timeout;
 };
 
+struct conf_memory_settings {
+        /* Number of stations supported in IBSS mode */
+        u8 num_stations;
+
+        /* Number of ssid profiles used in IBSS mode */
+        u8 ssid_profiles;
+
+        /* Number of memory buffers allocated to rx pool */
+        u8 rx_block_num;
+
+        /* Minimum number of blocks allocated to tx pool */
+        u8 tx_min_block_num;
+
+        /* Disable/Enable dynamic memory */
+        u8 dynamic_memory;
+
+        /*
+         * Minimum required free tx memory blocks in order to assure optimum
+         * performence
+         *
+         * Range: 0-120
+         */
+        u8 min_req_tx_blocks;
+
+        /*
+         * Minimum required free rx memory blocks in order to assure optimum
+         * performence
+         *
+         * Range: 0-120
+         */
+        u8 min_req_rx_blocks;
+
+        /*
+         * Minimum number of mem blocks (free+used) guaranteed for TX
+         *
+         * Range: 0-120
+         */
+        u8 tx_min;
+};
+
 struct conf_drv_settings {
         struct conf_sg_settings sg;
         struct conf_rx_settings rx;
@@ -1154,6 +1202,7 @@ struct conf_drv_settings {
         struct conf_scan_settings scan;
         struct conf_rf_settings rf;
         struct conf_ht_setting ht;
+        struct conf_memory_settings mem;
 };
 
 #endif
diff --git a/drivers/net/wireless/wl12xx/event.c b/drivers/net/wireless/wl12xx/event.c
index 3376a5de09d7..1b170c5cc595 100644
--- a/drivers/net/wireless/wl12xx/event.c
+++ b/drivers/net/wireless/wl12xx/event.c
@@ -135,20 +135,6 @@ static int wl1271_event_ps_report(struct wl1271 *wl,
                 /* go to extremely low power mode */
                 wl1271_ps_elp_sleep(wl);
                 break;
-        case EVENT_EXIT_POWER_SAVE_FAIL:
-                wl1271_debug(DEBUG_PSM, "PSM exit failed");
-
-                if (test_bit(WL1271_FLAG_PSM, &wl->flags)) {
-                        wl->psm_entry_retry = 0;
-                        break;
-                }
-
-                /* make sure the firmware goes to active mode - the frame to
-                   be sent next will indicate to the AP, that we are active. */
-                ret = wl1271_ps_set_mode(wl, STATION_ACTIVE_MODE,
-                                         wl->basic_rate, false);
-                break;
-        case EVENT_EXIT_POWER_SAVE_SUCCESS:
         default:
                 break;
         }
diff --git a/drivers/net/wireless/wl12xx/event.h b/drivers/net/wireless/wl12xx/event.h
index 1d5ef670d480..0e80886f3031 100644
--- a/drivers/net/wireless/wl12xx/event.h
+++ b/drivers/net/wireless/wl12xx/event.h
@@ -75,8 +75,6 @@ enum {
 enum {
         EVENT_ENTER_POWER_SAVE_FAIL = 0,
         EVENT_ENTER_POWER_SAVE_SUCCESS,
-        EVENT_EXIT_POWER_SAVE_FAIL,
-        EVENT_EXIT_POWER_SAVE_SUCCESS,
 };
 
 struct event_debug_report {
diff --git a/drivers/net/wireless/wl12xx/init.c b/drivers/net/wireless/wl12xx/init.c
index 70b3dc88a219..62dc9839dd31 100644
--- a/drivers/net/wireless/wl12xx/init.c
+++ b/drivers/net/wireless/wl12xx/init.c
@@ -325,6 +325,11 @@ static int wl1271_sta_hw_init(struct wl1271 *wl)
         if (ret < 0)
                 return ret;
 
+        /* PS config */
+        ret = wl1271_acx_config_ps(wl);
+        if (ret < 0)
+                return ret;
+
         ret = wl1271_sta_init_templates_config(wl);
         if (ret < 0)
                 return ret;
@@ -367,6 +372,10 @@ static int wl1271_sta_hw_init(struct wl1271 *wl)
         if (ret < 0)
                 return ret;
 
+        ret = wl1271_acx_sta_mem_cfg(wl);
+        if (ret < 0)
+                return ret;
+
         return 0;
 }
 
@@ -433,6 +442,10 @@ static int wl1271_ap_hw_init(struct wl1271 *wl)
         if (ret < 0)
                 return ret;
 
+        ret = wl1271_acx_ap_mem_cfg(wl);
+        if (ret < 0)
+                return ret;
+
         return 0;
 }
 
diff --git a/drivers/net/wireless/wl12xx/main.c b/drivers/net/wireless/wl12xx/main.c
index 254b7daccee1..61dea73f5fdc 100644
--- a/drivers/net/wireless/wl12xx/main.c
+++ b/drivers/net/wireless/wl12xx/main.c
@@ -256,6 +256,7 @@ static struct conf_drv_settings default_conf = {
                 .bet_enable                  = CONF_BET_MODE_ENABLE,
                 .bet_max_consecutive         = 10,
                 .psm_entry_retries           = 5,
+                .psm_exit_retries            = 255,
                 .psm_entry_nullfunc_retries  = 3,
                 .psm_entry_hangover_period   = 1,
                 .keep_alive_interval         = 55000,
@@ -297,6 +298,16 @@ static struct conf_drv_settings default_conf = {
                 .tx_ba_win_size = 64,
                 .inactivity_timeout = 10000,
         },
+        .mem = {
+                .num_stations                 = 1,
+                .ssid_profiles                = 1,
+                .rx_block_num                 = 70,
+                .tx_min_block_num             = 40,
+                .dynamic_memory               = 0,
+                .min_req_tx_blocks            = 104,
+                .min_req_rx_blocks            = 22,
+                .tx_min                       = 27,
+        }
 };
 
 static void __wl1271_op_remove_interface(struct wl1271 *wl);
@@ -523,13 +534,19 @@ static int wl1271_plt_init(struct wl1271 *wl)
 }
 
 static void wl1271_fw_status(struct wl1271 *wl,
-                             struct wl1271_fw_status *status)
+                             struct wl1271_fw_full_status *full_status)
 {
+        struct wl1271_fw_common_status *status = &full_status->common;
         struct timespec ts;
         u32 total = 0;
         int i;
 
-        wl1271_raw_read(wl, FW_STATUS_ADDR, status, sizeof(*status), false);
+        if (wl->bss_type == BSS_TYPE_AP_BSS)
+                wl1271_raw_read(wl, FW_STATUS_ADDR, status,
+                                sizeof(struct wl1271_fw_ap_status), false);
+        else
+                wl1271_raw_read(wl, FW_STATUS_ADDR, status,
+                                sizeof(struct wl1271_fw_sta_status), false);
 
         wl1271_debug(DEBUG_IRQ, "intr: 0x%x (fw_rx_counter = %d, "
                      "drv_rx_counter = %d, tx_results_counter = %d)",
@@ -588,7 +605,7 @@ static void wl1271_irq_work(struct work_struct *work)
                 loopcount--;
 
                 wl1271_fw_status(wl, wl->fw_status);
-                intr = le32_to_cpu(wl->fw_status->intr);
+                intr = le32_to_cpu(wl->fw_status->common.intr);
                 if (!intr) {
                         wl1271_debug(DEBUG_IRQ, "Zero interrupt received.");
                         spin_lock_irqsave(&wl->wl_lock, flags);
@@ -610,7 +627,7 @@ static void wl1271_irq_work(struct work_struct *work)
                         wl1271_debug(DEBUG_IRQ, "WL1271_ACX_INTR_DATA");
 
                         /* check for tx results */
-                        if (wl->fw_status->tx_results_counter !=
+                        if (wl->fw_status->common.tx_results_counter !=
                             (wl->tx_results_count & 0xff))
                                 wl1271_tx_complete(wl);
 
@@ -624,7 +641,7 @@ static void wl1271_irq_work(struct work_struct *work)
                                 wl1271_tx_work_locked(wl);
                         }
 
-                        wl1271_rx(wl, wl->fw_status);
+                        wl1271_rx(wl, &wl->fw_status->common);
                 }
 
                 if (intr & WL1271_ACX_INTR_EVENT_A) {
@@ -961,39 +978,10 @@ int wl1271_plt_stop(struct wl1271 *wl)
 static int wl1271_op_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
 {
         struct wl1271 *wl = hw->priv;
-        struct ieee80211_conf *conf = &hw->conf;
-        struct ieee80211_tx_info *txinfo = IEEE80211_SKB_CB(skb);
-        struct ieee80211_sta *sta = txinfo->control.sta;
         unsigned long flags;
         int q;
 
-        /*
-         * peek into the rates configured in the STA entry.
-         * The rates set after connection stage, The first block only BG sets:
-         * the compare is for bit 0-16 of sta_rate_set. The second block add
-         * HT rates in case of HT supported.
-         */
         spin_lock_irqsave(&wl->wl_lock, flags);
-        if (sta &&
-            (sta->supp_rates[conf->channel->band] !=
-            (wl->sta_rate_set & HW_BG_RATES_MASK)) &&
-                wl->bss_type != BSS_TYPE_AP_BSS) {
-                wl->sta_rate_set = sta->supp_rates[conf->channel->band];
-                set_bit(WL1271_FLAG_STA_RATES_CHANGED, &wl->flags);
-        }
-
-#ifdef CONFIG_WL12XX_HT
-        if (sta &&
-            sta->ht_cap.ht_supported &&
-            ((wl->sta_rate_set >> HW_HT_RATES_OFFSET) !=
-              sta->ht_cap.mcs.rx_mask[0])) {
-                /* Clean MCS bits before setting them */
-                wl->sta_rate_set &= HW_BG_RATES_MASK;
-                wl->sta_rate_set |=
-                        (sta->ht_cap.mcs.rx_mask[0] << HW_HT_RATES_OFFSET);
-                set_bit(WL1271_FLAG_STA_RATES_CHANGED, &wl->flags);
-        }
-#endif
         wl->tx_queue_count++;
         spin_unlock_irqrestore(&wl->wl_lock, flags);
 
@@ -1228,7 +1216,6 @@ static void __wl1271_op_remove_interface(struct wl1271 *wl)
         wl->time_offset = 0;
         wl->session_counter = 0;
         wl->rate_set = CONF_TX_RATE_MASK_BASIC;
-        wl->sta_rate_set = 0;
         wl->flags = 0;
         wl->vif = NULL;
         wl->filters = 0;
@@ -1415,7 +1402,6 @@ static int wl1271_sta_handle_idle(struct wl1271 *wl, bool idle)
                                 goto out;
                 }
                 wl->rate_set = wl1271_tx_min_rate_get(wl);
-                wl->sta_rate_set = 0;
                 ret = wl1271_acx_sta_rate_policies(wl);
                 if (ret < 0)
                         goto out;
@@ -2229,6 +2215,7 @@ static void wl1271_bss_info_changed_sta(struct wl1271 *wl,
 {
         bool do_join = false, set_assoc = false;
         bool is_ibss = (wl->bss_type == BSS_TYPE_IBSS);
+        u32 sta_rate_set = 0;
         int ret;
         struct ieee80211_sta *sta;
 
@@ -2294,6 +2281,49 @@ static void wl1271_bss_info_changed_sta(struct wl1271 *wl,
                 }
         }
 
+        rcu_read_lock();
+        sta = ieee80211_find_sta(vif, bss_conf->bssid);
+        if (sta)  {
+                /* save the supp_rates of the ap */
+                sta_rate_set = sta->supp_rates[wl->hw->conf.channel->band];
+                if (sta->ht_cap.ht_supported)
+                        sta_rate_set |=
+                            (sta->ht_cap.mcs.rx_mask[0] << HW_HT_RATES_OFFSET);
+
+                /* handle new association with HT and HT information change */
+                if ((changed & BSS_CHANGED_HT) &&
+                    (bss_conf->channel_type != NL80211_CHAN_NO_HT)) {
+                        ret = wl1271_acx_set_ht_capabilities(wl, &sta->ht_cap,
+                                                             true);
+                        if (ret < 0) {
+                                wl1271_warning("Set ht cap true failed %d",
+                                               ret);
+                                rcu_read_unlock();
+                                goto out;
+                        }
+                        ret = wl1271_acx_set_ht_information(wl,
+                                                bss_conf->ht_operation_mode);
+                        if (ret < 0) {
+                                wl1271_warning("Set ht information failed %d",
+                                               ret);
+                                rcu_read_unlock();
+                                goto out;
+                        }
+                }
+                /* handle new association without HT and disassociation */
+                else if (changed & BSS_CHANGED_ASSOC) {
+                        ret = wl1271_acx_set_ht_capabilities(wl, &sta->ht_cap,
+                                                             false);
+                        if (ret < 0) {
+                                wl1271_warning("Set ht cap false failed %d",
+                                               ret);
+                                rcu_read_unlock();
+                                goto out;
+                        }
+                }
+        }
+        rcu_read_unlock();
+
         if ((changed & BSS_CHANGED_ASSOC)) {
                 if (bss_conf->assoc) {
                         u32 rates;
@@ -2311,6 +2341,9 @@ static void wl1271_bss_info_changed_sta(struct wl1271 *wl,
                         wl->basic_rate_set = wl1271_tx_enabled_rates_get(wl,
                                                                          rates);
                         wl->basic_rate = wl1271_tx_min_rate_get(wl);
+                        if (sta_rate_set)
+                                wl->rate_set = wl1271_tx_enabled_rates_get(wl,
+                                                                sta_rate_set);
                         ret = wl1271_acx_sta_rate_policies(wl);
                         if (ret < 0)
                                 goto out;
@@ -2389,43 +2422,6 @@ static void wl1271_bss_info_changed_sta(struct wl1271 *wl,
         if (ret < 0)
                 goto out;
 
-        rcu_read_lock();
-        sta = ieee80211_find_sta(vif, bss_conf->bssid);
-        if (sta)  {
-                /* handle new association with HT and HT information change */
-                if ((changed & BSS_CHANGED_HT) &&
-                    (bss_conf->channel_type != NL80211_CHAN_NO_HT)) {
-                        ret = wl1271_acx_set_ht_capabilities(wl, &sta->ht_cap,
-                                                             true);
-                        if (ret < 0) {
-                                wl1271_warning("Set ht cap true failed %d",
-                                               ret);
-                                rcu_read_unlock();
-                                goto out;
-                        }
-                        ret = wl1271_acx_set_ht_information(wl,
-                                                bss_conf->ht_operation_mode);
-                        if (ret < 0) {
-                                wl1271_warning("Set ht information failed %d",
-                                               ret);
-                                rcu_read_unlock();
-                                goto out;
-                        }
-                }
-                /* handle new association without HT and disassociation */
-                else if (changed & BSS_CHANGED_ASSOC) {
-                        ret = wl1271_acx_set_ht_capabilities(wl, &sta->ht_cap,
-                                                             false);
-                        if (ret < 0) {
-                                wl1271_warning("Set ht cap false failed %d",
-                                               ret);
-                                rcu_read_unlock();
-                                goto out;
-                        }
-                }
-        }
-        rcu_read_unlock();
-
         if (changed & BSS_CHANGED_ARP_FILTER) {
                 __be32 addr = bss_conf->arp_addr_list[0];
                 WARN_ON(wl->bss_type != BSS_TYPE_STA_BSS);
@@ -3313,7 +3309,6 @@ struct ieee80211_hw *wl1271_alloc_hw(void)
         wl->basic_rate_set = CONF_TX_RATE_MASK_BASIC;
         wl->basic_rate = CONF_TX_RATE_MASK_BASIC;
         wl->rate_set = CONF_TX_RATE_MASK_BASIC;
-        wl->sta_rate_set = 0;
         wl->band = IEEE80211_BAND_2GHZ;
         wl->vif = NULL;
         wl->flags = 0;
diff --git a/drivers/net/wireless/wl12xx/ps.c b/drivers/net/wireless/wl12xx/ps.c
index 60a3738eadb0..2d3086ae6338 100644
--- a/drivers/net/wireless/wl12xx/ps.c
+++ b/drivers/net/wireless/wl12xx/ps.c
@@ -139,8 +139,7 @@ int wl1271_ps_set_mode(struct wl1271 *wl, enum wl1271_cmd_ps_mode mode,
                         return ret;
                 }
 
-                ret = wl1271_cmd_ps_mode(wl, STATION_POWER_SAVE_MODE,
-                                         rates, send);
+                ret = wl1271_cmd_ps_mode(wl, STATION_POWER_SAVE_MODE);
                 if (ret < 0)
                         return ret;
 
@@ -163,8 +162,7 @@ int wl1271_ps_set_mode(struct wl1271 *wl, enum wl1271_cmd_ps_mode mode,
                 if (ret < 0)
                         return ret;
 
-                ret = wl1271_cmd_ps_mode(wl, STATION_ACTIVE_MODE,
-                                         rates, send);
+                ret = wl1271_cmd_ps_mode(wl, STATION_ACTIVE_MODE);
                 if (ret < 0)
                         return ret;
 
diff --git a/drivers/net/wireless/wl12xx/rx.c b/drivers/net/wireless/wl12xx/rx.c
index b0c6ddc2a945..00d250d8da18 100644
--- a/drivers/net/wireless/wl12xx/rx.c
+++ b/drivers/net/wireless/wl12xx/rx.c
@@ -29,14 +29,14 @@
 #include "rx.h"
 #include "io.h"
 
-static u8 wl1271_rx_get_mem_block(struct wl1271_fw_status *status,
+static u8 wl1271_rx_get_mem_block(struct wl1271_fw_common_status *status,
                                   u32 drv_rx_counter)
 {
         return le32_to_cpu(status->rx_pkt_descs[drv_rx_counter]) &
                 RX_MEM_BLOCK_MASK;
 }
 
-static u32 wl1271_rx_get_buf_size(struct wl1271_fw_status *status,
+static u32 wl1271_rx_get_buf_size(struct wl1271_fw_common_status *status,
                                  u32 drv_rx_counter)
 {
         return (le32_to_cpu(status->rx_pkt_descs[drv_rx_counter]) &
@@ -134,7 +134,7 @@ static int wl1271_rx_handle_data(struct wl1271 *wl, u8 *data, u32 length)
         return 0;
 }
 
-void wl1271_rx(struct wl1271 *wl, struct wl1271_fw_status *status)
+void wl1271_rx(struct wl1271 *wl, struct wl1271_fw_common_status *status)
 {
         struct wl1271_acx_mem_map *wl_mem_map = wl->target_mem_map;
         u32 buf_size;
diff --git a/drivers/net/wireless/wl12xx/rx.h b/drivers/net/wireless/wl12xx/rx.h
index 8d048b36bbba..4cef8fa3dee1 100644
--- a/drivers/net/wireless/wl12xx/rx.h
+++ b/drivers/net/wireless/wl12xx/rx.h
@@ -119,7 +119,7 @@ struct wl1271_rx_descriptor {
         u8  reserved;
 } __packed;
 
-void wl1271_rx(struct wl1271 *wl, struct wl1271_fw_status *status);
+void wl1271_rx(struct wl1271 *wl, struct wl1271_fw_common_status *status);
 u8 wl1271_rate_to_idx(int rate, enum ieee80211_band band);
 void wl1271_set_default_filters(struct wl1271 *wl);
 
diff --git a/drivers/net/wireless/wl12xx/tx.c b/drivers/net/wireless/wl12xx/tx.c
index 3507c81c7500..67a00946e3dd 100644
--- a/drivers/net/wireless/wl12xx/tx.c
+++ b/drivers/net/wireless/wl12xx/tx.c
@@ -334,35 +334,13 @@ void wl1271_tx_work_locked(struct wl1271 *wl)
 {
         struct sk_buff *skb;
         bool woken_up = false;
-        u32 sta_rates = 0;
         u32 buf_offset = 0;
         bool sent_packets = false;
         int ret;
 
-        /* check if the rates supported by the AP have changed */
-        if (unlikely(test_and_clear_bit(WL1271_FLAG_STA_RATES_CHANGED,
-                                        &wl->flags))) {
-                unsigned long flags;
-
-                spin_lock_irqsave(&wl->wl_lock, flags);
-                sta_rates = wl->sta_rate_set;
-                spin_unlock_irqrestore(&wl->wl_lock, flags);
-        }
-
         if (unlikely(wl->state == WL1271_STATE_OFF))
                 goto out;
 
-        /* if rates have changed, re-configure the rate policy */
-        if (unlikely(sta_rates)) {
-                ret = wl1271_ps_elp_wakeup(wl, false);
-                if (ret < 0)
-                        goto out;
-                woken_up = true;
-
-                wl->rate_set = wl1271_tx_enabled_rates_get(wl, sta_rates);
-                wl1271_acx_sta_rate_policies(wl);
-        }
-
         while ((skb = wl1271_skb_dequeue(wl))) {
                 if (!woken_up) {
                         ret = wl1271_ps_elp_wakeup(wl, false);
diff --git a/drivers/net/wireless/wl12xx/wl12xx.h b/drivers/net/wireless/wl12xx/wl12xx.h
index d1de13fe7d9a..1d6c94304b1a 100644
--- a/drivers/net/wireless/wl12xx/wl12xx.h
+++ b/drivers/net/wireless/wl12xx/wl12xx.h
@@ -130,7 +130,7 @@ extern u32 wl12xx_debug_level;
 
 
 
-#define WL1271_FW_NAME "wl1271-fw.bin"
+#define WL1271_FW_NAME "wl1271-fw-2.bin"
 #define WL1271_AP_FW_NAME "wl1271-fw-ap.bin"
 
 #define WL1271_NVS_NAME "wl1271-nvs.bin"
@@ -214,8 +214,8 @@ struct wl1271_stats {
 /* Broadcast and Global links + links to stations */
 #define AP_MAX_LINKS               (AP_MAX_STATIONS + 2)
 
-/* FW status registers */
-struct wl1271_fw_status {
+/* FW status registers common for AP/STA */
+struct wl1271_fw_common_status {
         __le32 intr;
         u8  fw_rx_counter;
         u8  drv_rx_counter;
@@ -224,6 +224,11 @@ struct wl1271_fw_status {
         __le32 rx_pkt_descs[NUM_RX_PKT_DESC];
         __le32 tx_released_blks[NUM_TX_QUEUES];
         __le32 fw_localtime;
+} __packed;
+
+/* FW status registers for AP */
+struct wl1271_fw_ap_status {
+        struct wl1271_fw_common_status common;
 
         /* Next fields valid only in AP FW */
 
@@ -238,6 +243,24 @@ struct wl1271_fw_status {
         u8 padding_1[1];
 } __packed;
 
+/* FW status registers for STA */
+struct wl1271_fw_sta_status {
+        struct wl1271_fw_common_status common;
+
+        u8  tx_total;
+        u8  reserved1;
+        __le16 reserved2;
+} __packed;
+
+struct wl1271_fw_full_status {
+        union {
+                struct wl1271_fw_common_status common;
+                struct wl1271_fw_sta_status sta;
+                struct wl1271_fw_ap_status ap;
+        };
+} __packed;
+
+
 struct wl1271_rx_mem_pool_addr {
         u32 addr;
         u32 addr_extra;
@@ -278,6 +301,24 @@ struct wl1271_ap_key {
         u16 tx_seq_16;
 };
 
+enum wl12xx_flags {
+        WL1271_FLAG_STA_ASSOCIATED,
+        WL1271_FLAG_JOINED,
+        WL1271_FLAG_GPIO_POWER,
+        WL1271_FLAG_TX_QUEUE_STOPPED,
+        WL1271_FLAG_IN_ELP,
+        WL1271_FLAG_PSM,
+        WL1271_FLAG_PSM_REQUESTED,
+        WL1271_FLAG_IRQ_PENDING,
+        WL1271_FLAG_IRQ_RUNNING,
+        WL1271_FLAG_IDLE,
+        WL1271_FLAG_IDLE_REQUESTED,
+        WL1271_FLAG_PSPOLL_FAILURE,
+        WL1271_FLAG_STA_STATE_SENT,
+        WL1271_FLAG_FW_TX_BUSY,
+        WL1271_FLAG_AP_STARTED
+};
+
 struct wl1271 {
         struct platform_device *plat_dev;
         struct ieee80211_hw *hw;
@@ -296,22 +337,6 @@ struct wl1271 {
         enum wl1271_state state;
         struct mutex mutex;
 
-#define WL1271_FLAG_STA_RATES_CHANGED  (0)
-#define WL1271_FLAG_STA_ASSOCIATED     (1)
-#define WL1271_FLAG_JOINED             (2)
-#define WL1271_FLAG_GPIO_POWER         (3)
-#define WL1271_FLAG_TX_QUEUE_STOPPED   (4)
-#define WL1271_FLAG_IN_ELP             (5)
-#define WL1271_FLAG_PSM                (6)
-#define WL1271_FLAG_PSM_REQUESTED      (7)
-#define WL1271_FLAG_IRQ_PENDING        (8)
-#define WL1271_FLAG_IRQ_RUNNING        (9)
-#define WL1271_FLAG_IDLE              (10)
-#define WL1271_FLAG_IDLE_REQUESTED    (11)
-#define WL1271_FLAG_PSPOLL_FAILURE    (12)
-#define WL1271_FLAG_STA_STATE_SENT    (13)
-#define WL1271_FLAG_FW_TX_BUSY        (14)
-#define WL1271_FLAG_AP_STARTED        (15)
         unsigned long flags;
 
         struct wl1271_partition_set part;
@@ -405,7 +430,6 @@ struct wl1271 {
          *      bits 16-23 - 802.11n   MCS index mask
          * support only 1 stream, thus only 8 bits for the MCS rates (0-7).
          */
-        u32 sta_rate_set;
         u32 basic_rate_set;
         u32 basic_rate;
         u32 rate_set;
@@ -445,7 +469,7 @@ struct wl1271 {
         u32 buffer_cmd;
         u32 buffer_busyword[WL1271_BUSY_WORD_CNT];
 
-        struct wl1271_fw_status *fw_status;
+        struct wl1271_fw_full_status *fw_status;
         struct wl1271_tx_hw_res_if *tx_res_if;
 
         struct ieee80211_vif *vif;
diff --git a/drivers/net/wireless/zd1211rw/zd_chip.c b/drivers/net/wireless/zd1211rw/zd_chip.c
index 54f68f134ea7..a73a305d3cba 100644
--- a/drivers/net/wireless/zd1211rw/zd_chip.c
+++ b/drivers/net/wireless/zd1211rw/zd_chip.c
@@ -142,8 +142,9 @@ int zd_ioread32v_locked(struct zd_chip *chip, u32 *values, const zd_addr_t *addr
         return 0;
 }
 
-int _zd_iowrite32v_locked(struct zd_chip *chip, const struct zd_ioreq32 *ioreqs,
-                   unsigned int count)
+static int _zd_iowrite32v_async_locked(struct zd_chip *chip,
+                                       const struct zd_ioreq32 *ioreqs,
+                                       unsigned int count)
 {
         int i, j, r;
         struct zd_ioreq16 ioreqs16[USB_MAX_IOWRITE32_COUNT * 2];
@@ -170,7 +171,7 @@ int _zd_iowrite32v_locked(struct zd_chip *chip, const struct zd_ioreq32 *ioreqs,
                 ioreqs16[j+1].addr  = ioreqs[i].addr;
         }
 
-        r = zd_usb_iowrite16v(&chip->usb, ioreqs16, count16);
+        r = zd_usb_iowrite16v_async(&chip->usb, ioreqs16, count16);
 #ifdef DEBUG
         if (r) {
                 dev_dbg_f(zd_chip_dev(chip),
@@ -180,6 +181,20 @@ int _zd_iowrite32v_locked(struct zd_chip *chip, const struct zd_ioreq32 *ioreqs,
         return r;
 }
 
+int _zd_iowrite32v_locked(struct zd_chip *chip, const struct zd_ioreq32 *ioreqs,
+                          unsigned int count)
+{
+        int r;
+
+        zd_usb_iowrite16v_async_start(&chip->usb);
+        r = _zd_iowrite32v_async_locked(chip, ioreqs, count);
+        if (r) {
+                zd_usb_iowrite16v_async_end(&chip->usb, 0);
+                return r;
+        }
+        return zd_usb_iowrite16v_async_end(&chip->usb, 50 /* ms */);
+}
+
 int zd_iowrite16a_locked(struct zd_chip *chip,
                   const struct zd_ioreq16 *ioreqs, unsigned int count)
 {
@@ -187,6 +202,8 @@ int zd_iowrite16a_locked(struct zd_chip *chip,
         unsigned int i, j, t, max;
 
         ZD_ASSERT(mutex_is_locked(&chip->mutex));
+        zd_usb_iowrite16v_async_start(&chip->usb);
+
         for (i = 0; i < count; i += j + t) {
                 t = 0;
                 max = count-i;
@@ -199,8 +216,9 @@ int zd_iowrite16a_locked(struct zd_chip *chip,
                         }
                 }
 
-                r = zd_usb_iowrite16v(&chip->usb, &ioreqs[i], j);
+                r = zd_usb_iowrite16v_async(&chip->usb, &ioreqs[i], j);
                 if (r) {
+                        zd_usb_iowrite16v_async_end(&chip->usb, 0);
                         dev_dbg_f(zd_chip_dev(chip),
                                   "error zd_usb_iowrite16v. Error number %d\n",
                                   r);
@@ -208,7 +226,7 @@ int zd_iowrite16a_locked(struct zd_chip *chip,
                 }
         }
 
-        return 0;
+        return zd_usb_iowrite16v_async_end(&chip->usb, 50 /* ms */);
 }
 
 /* Writes a variable number of 32 bit registers. The functions will split
@@ -221,6 +239,8 @@ int zd_iowrite32a_locked(struct zd_chip *chip,
         int r;
         unsigned int i, j, t, max;
 
+        zd_usb_iowrite16v_async_start(&chip->usb);
+
         for (i = 0; i < count; i += j + t) {
                 t = 0;
                 max = count-i;
@@ -233,8 +253,9 @@ int zd_iowrite32a_locked(struct zd_chip *chip,
                         }
                 }
 
-                r = _zd_iowrite32v_locked(chip, &ioreqs[i], j);
+                r = _zd_iowrite32v_async_locked(chip, &ioreqs[i], j);
                 if (r) {
+                        zd_usb_iowrite16v_async_end(&chip->usb, 0);
                         dev_dbg_f(zd_chip_dev(chip),
                                 "error _zd_iowrite32v_locked."
                                 " Error number %d\n", r);
@@ -242,7 +263,7 @@ int zd_iowrite32a_locked(struct zd_chip *chip,
                 }
         }
 
-        return 0;
+        return zd_usb_iowrite16v_async_end(&chip->usb, 50 /* ms */);
 }
 
 int zd_ioread16(struct zd_chip *chip, zd_addr_t addr, u16 *value)
diff --git a/drivers/net/wireless/zd1211rw/zd_def.h b/drivers/net/wireless/zd1211rw/zd_def.h
index 6ac597ffd3b9..5463ca9ebc01 100644
--- a/drivers/net/wireless/zd1211rw/zd_def.h
+++ b/drivers/net/wireless/zd1211rw/zd_def.h
@@ -45,7 +45,7 @@ typedef u16 __nocast zd_addr_t;
 #ifdef DEBUG
 #  define ZD_ASSERT(x) \
 do { \
-        if (!(x)) { \
+        if (unlikely(!(x))) { \
                 pr_debug("%s:%d ASSERT %s VIOLATED!\n", \
                         __FILE__, __LINE__, __stringify(x)); \
                 dump_stack(); \
diff --git a/drivers/net/wireless/zd1211rw/zd_usb.c b/drivers/net/wireless/zd1211rw/zd_usb.c
index f6df3665fdb6..81e80489a052 100644
--- a/drivers/net/wireless/zd1211rw/zd_usb.c
+++ b/drivers/net/wireless/zd1211rw/zd_usb.c
@@ -1156,6 +1156,7 @@ void zd_usb_init(struct zd_usb *usb, struct ieee80211_hw *hw,
         memset(usb, 0, sizeof(*usb));
         usb->intf = usb_get_intf(intf);
         usb_set_intfdata(usb->intf, hw);
+        init_usb_anchor(&usb->submitted_cmds);
         init_usb_interrupt(usb);
         init_usb_tx(usb);
         init_usb_rx(usb);
@@ -1634,15 +1635,15 @@ int zd_usb_ioread16v(struct zd_usb *usb, u16 *values,
 
         udev = zd_usb_to_usbdev(usb);
         prepare_read_regs_int(usb);
-        r = usb_bulk_msg(udev, usb_sndbulkpipe(udev, EP_REGS_OUT),
-                         req, req_len, &actual_req_len, 50 /* ms */);
+        r = usb_interrupt_msg(udev, usb_sndintpipe(udev, EP_REGS_OUT),
+                              req, req_len, &actual_req_len, 50 /* ms */);
         if (r) {
                 dev_dbg_f(zd_usb_dev(usb),
-                        "error in usb_bulk_msg(). Error number %d\n", r);
+                        "error in usb_interrupt_msg(). Error number %d\n", r);
                 goto error;
         }
         if (req_len != actual_req_len) {
-                dev_dbg_f(zd_usb_dev(usb), "error in usb_bulk_msg()\n"
+                dev_dbg_f(zd_usb_dev(usb), "error in usb_interrupt_msg()\n"
                         " req_len %d != actual_req_len %d\n",
                         req_len, actual_req_len);
                 r = -EIO;
@@ -1663,13 +1664,103 @@ error:
         return r;
 }
 
-int zd_usb_iowrite16v(struct zd_usb *usb, const struct zd_ioreq16 *ioreqs,
-                      unsigned int count)
+static void iowrite16v_urb_complete(struct urb *urb)
+{
+        struct zd_usb *usb = urb->context;
+
+        if (urb->status && !usb->cmd_error)
+                usb->cmd_error = urb->status;
+}
+
+static int zd_submit_waiting_urb(struct zd_usb *usb, bool last)
+{
+        int r = 0;
+        struct urb *urb = usb->urb_async_waiting;
+
+        if (!urb)
+                return 0;
+
+        usb->urb_async_waiting = NULL;
+
+        if (!last)
+                urb->transfer_flags |= URB_NO_INTERRUPT;
+
+        usb_anchor_urb(urb, &usb->submitted_cmds);
+        r = usb_submit_urb(urb, GFP_KERNEL);
+        if (r) {
+                usb_unanchor_urb(urb);
+                dev_dbg_f(zd_usb_dev(usb),
+                        "error in usb_submit_urb(). Error number %d\n", r);
+                goto error;
+        }
+
+        /* fall-through with r == 0 */
+error:
+        usb_free_urb(urb);
+        return r;
+}
+
+void zd_usb_iowrite16v_async_start(struct zd_usb *usb)
+{
+        ZD_ASSERT(usb_anchor_empty(&usb->submitted_cmds));
+        ZD_ASSERT(usb->urb_async_waiting == NULL);
+        ZD_ASSERT(!usb->in_async);
+
+        ZD_ASSERT(mutex_is_locked(&zd_usb_to_chip(usb)->mutex));
+
+        usb->in_async = 1;
+        usb->cmd_error = 0;
+        usb->urb_async_waiting = NULL;
+}
+
+int zd_usb_iowrite16v_async_end(struct zd_usb *usb, unsigned int timeout)
+{
+        int r;
+
+        ZD_ASSERT(mutex_is_locked(&zd_usb_to_chip(usb)->mutex));
+        ZD_ASSERT(usb->in_async);
+
+        /* Submit last iowrite16v URB */
+        r = zd_submit_waiting_urb(usb, true);
+        if (r) {
+                dev_dbg_f(zd_usb_dev(usb),
+                        "error in zd_submit_waiting_usb(). "
+                        "Error number %d\n", r);
+
+                usb_kill_anchored_urbs(&usb->submitted_cmds);
+                goto error;
+        }
+
+        if (timeout)
+                timeout = usb_wait_anchor_empty_timeout(&usb->submitted_cmds,
+                                                        timeout);
+        if (!timeout) {
+                usb_kill_anchored_urbs(&usb->submitted_cmds);
+                if (usb->cmd_error == -ENOENT) {
+                        dev_dbg_f(zd_usb_dev(usb), "timed out");
+                        r = -ETIMEDOUT;
+                        goto error;
+                }
+        }
+
+        r = usb->cmd_error;
+error:
+        usb->in_async = 0;
+        return r;
+}
+
+int zd_usb_iowrite16v_async(struct zd_usb *usb, const struct zd_ioreq16 *ioreqs,
+                            unsigned int count)
 {
         int r;
         struct usb_device *udev;
         struct usb_req_write_regs *req = NULL;
-        int i, req_len, actual_req_len;
+        int i, req_len;
+        struct urb *urb;
+        struct usb_host_endpoint *ep;
+
+        ZD_ASSERT(mutex_is_locked(&zd_usb_to_chip(usb)->mutex));
+        ZD_ASSERT(usb->in_async);
 
         if (count == 0)
                 return 0;
@@ -1685,17 +1776,23 @@ int zd_usb_iowrite16v(struct zd_usb *usb, const struct zd_ioreq16 *ioreqs,
                 return -EWOULDBLOCK;
         }
 
-        ZD_ASSERT(mutex_is_locked(&zd_usb_to_chip(usb)->mutex));
-        BUILD_BUG_ON(sizeof(struct usb_req_write_regs) +
-                     USB_MAX_IOWRITE16_COUNT * sizeof(struct reg_data) >
-                     sizeof(usb->req_buf));
-        BUG_ON(sizeof(struct usb_req_write_regs) +
-               count * sizeof(struct reg_data) >
-               sizeof(usb->req_buf));
+        udev = zd_usb_to_usbdev(usb);
+
+        ep = usb_pipe_endpoint(udev, usb_sndintpipe(udev, EP_REGS_OUT));
+        if (!ep)
+                return -ENOENT;
+
+        urb = usb_alloc_urb(0, GFP_KERNEL);
+        if (!urb)
+                return -ENOMEM;
 
         req_len = sizeof(struct usb_req_write_regs) +
                   count * sizeof(struct reg_data);
-        req = (void *)usb->req_buf;
+        req = kmalloc(req_len, GFP_KERNEL);
+        if (!req) {
+                r = -ENOMEM;
+                goto error;
+        }
 
         req->id = cpu_to_le16(USB_REQ_WRITE_REGS);
         for (i = 0; i < count; i++) {
@@ -1704,28 +1801,44 @@ int zd_usb_iowrite16v(struct zd_usb *usb, const struct zd_ioreq16 *ioreqs,
                 rw->value = cpu_to_le16(ioreqs[i].value);
         }
 
-        udev = zd_usb_to_usbdev(usb);
-        r = usb_bulk_msg(udev, usb_sndbulkpipe(udev, EP_REGS_OUT),
-                         req, req_len, &actual_req_len, 50 /* ms */);
+        usb_fill_int_urb(urb, udev, usb_sndintpipe(udev, EP_REGS_OUT),
+                         req, req_len, iowrite16v_urb_complete, usb,
+                         ep->desc.bInterval);
+        urb->transfer_flags |= URB_FREE_BUFFER | URB_SHORT_NOT_OK;
+
+        /* Submit previous URB */
+        r = zd_submit_waiting_urb(usb, false);
         if (r) {
                 dev_dbg_f(zd_usb_dev(usb),
-                        "error in usb_bulk_msg(). Error number %d\n", r);
-                goto error;
-        }
-        if (req_len != actual_req_len) {
-                dev_dbg_f(zd_usb_dev(usb),
-                        "error in usb_bulk_msg()"
-                        " req_len %d != actual_req_len %d\n",
-                        req_len, actual_req_len);
-                r = -EIO;
+                        "error in zd_submit_waiting_usb(). "
+                        "Error number %d\n", r);
                 goto error;
         }
 
-        /* FALL-THROUGH with r == 0 */
+        /* Delay submit so that URB_NO_INTERRUPT flag can be set for all URBs
+         * of currect batch except for very last.
+         */
+        usb->urb_async_waiting = urb;
+        return 0;
 error:
+        usb_free_urb(urb);
         return r;
 }
 
+int zd_usb_iowrite16v(struct zd_usb *usb, const struct zd_ioreq16 *ioreqs,
+                        unsigned int count)
+{
+        int r;
+
+        zd_usb_iowrite16v_async_start(usb);
+        r = zd_usb_iowrite16v_async(usb, ioreqs, count);
+        if (r) {
+                zd_usb_iowrite16v_async_end(usb, 0);
+                return r;
+        }
+        return zd_usb_iowrite16v_async_end(usb, 50 /* ms */);
+}
+
 int zd_usb_rfwrite(struct zd_usb *usb, u32 value, u8 bits)
 {
         int r;
@@ -1794,15 +1907,15 @@ int zd_usb_rfwrite(struct zd_usb *usb, u32 value, u8 bits)
         }
 
         udev = zd_usb_to_usbdev(usb);
-        r = usb_bulk_msg(udev, usb_sndbulkpipe(udev, EP_REGS_OUT),
-                         req, req_len, &actual_req_len, 50 /* ms */);
+        r = usb_interrupt_msg(udev, usb_sndintpipe(udev, EP_REGS_OUT),
+                              req, req_len, &actual_req_len, 50 /* ms */);
         if (r) {
                 dev_dbg_f(zd_usb_dev(usb),
-                        "error in usb_bulk_msg(). Error number %d\n", r);
+                        "error in usb_interrupt_msg(). Error number %d\n", r);
                 goto out;
         }
         if (req_len != actual_req_len) {
-                dev_dbg_f(zd_usb_dev(usb), "error in usb_bulk_msg()"
+                dev_dbg_f(zd_usb_dev(usb), "error in usb_interrupt_msg()"
                         " req_len %d != actual_req_len %d\n",
                         req_len, actual_req_len);
                 r = -EIO;
diff --git a/drivers/net/wireless/zd1211rw/zd_usb.h b/drivers/net/wireless/zd1211rw/zd_usb.h
index 2d688f48a34c..b3df2c8116cc 100644
--- a/drivers/net/wireless/zd1211rw/zd_usb.h
+++ b/drivers/net/wireless/zd1211rw/zd_usb.h
@@ -217,8 +217,11 @@ struct zd_usb {
         struct zd_usb_rx rx;
         struct zd_usb_tx tx;
         struct usb_interface *intf;
+        struct usb_anchor submitted_cmds;
+        struct urb *urb_async_waiting;
+        int cmd_error;
         u8 req_buf[64]; /* zd_usb_iowrite16v needs 62 bytes */
-        u8 is_zd1211b:1, initialized:1, was_running:1;
+        u8 is_zd1211b:1, initialized:1, was_running:1, in_async:1;
 };
 
 #define zd_usb_dev(usb) (&usb->intf->dev)
@@ -270,6 +273,10 @@ static inline int zd_usb_ioread16(struct zd_usb *usb, u16 *value,
         return zd_usb_ioread16v(usb, value, (const zd_addr_t *)&addr, 1);
 }
 
+void zd_usb_iowrite16v_async_start(struct zd_usb *usb);
+int zd_usb_iowrite16v_async_end(struct zd_usb *usb, unsigned int timeout);
+int zd_usb_iowrite16v_async(struct zd_usb *usb, const struct zd_ioreq16 *ioreqs,
+                            unsigned int count);
 int zd_usb_iowrite16v(struct zd_usb *usb, const struct zd_ioreq16 *ioreqs,
                       unsigned int count);
 
diff --git a/drivers/ssb/main.c b/drivers/ssb/main.c
index 3918d2cc5856..e05ba6eefc7e 100644
--- a/drivers/ssb/main.c
+++ b/drivers/ssb/main.c
@@ -1192,10 +1192,10 @@ void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags)
 }
 EXPORT_SYMBOL(ssb_device_enable);
 
-/* Wait for a bit in a register to get set or unset.
+/* Wait for bitmask in a register to get set or cleared.
  * timeout is in units of ten-microseconds */
-static int ssb_wait_bit(struct ssb_device *dev, u16 reg, u32 bitmask,
-                        int timeout, int set)
+static int ssb_wait_bits(struct ssb_device *dev, u16 reg, u32 bitmask,
+                         int timeout, int set)
 {
         int i;
         u32 val;
@@ -1203,7 +1203,7 @@ static int ssb_wait_bit(struct ssb_device *dev, u16 reg, u32 bitmask,
         for (i = 0; i < timeout; i++) {
                 val = ssb_read32(dev, reg);
                 if (set) {
-                        if (val & bitmask)
+                        if ((val & bitmask) == bitmask)
                                 return 0;
                 } else {
                         if (!(val & bitmask))
@@ -1220,20 +1220,38 @@ static int ssb_wait_bit(struct ssb_device *dev, u16 reg, u32 bitmask,
 
 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags)
 {
-        u32 reject;
+        u32 reject, val;
 
         if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET)
                 return;
 
         reject = ssb_tmslow_reject_bitmask(dev);
-        ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK);
-        ssb_wait_bit(dev, SSB_TMSLOW, reject, 1000, 1);
-        ssb_wait_bit(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0);
-        ssb_write32(dev, SSB_TMSLOW,
-                    SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK |
-                    reject | SSB_TMSLOW_RESET |
-                    core_specific_flags);
-        ssb_flush_tmslow(dev);
+
+        if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_CLOCK) {
+                ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK);
+                ssb_wait_bits(dev, SSB_TMSLOW, reject, 1000, 1);
+                ssb_wait_bits(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0);
+
+                if (ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_INITIATOR) {
+                        val = ssb_read32(dev, SSB_IMSTATE);
+                        val |= SSB_IMSTATE_REJECT;
+                        ssb_write32(dev, SSB_IMSTATE, val);
+                        ssb_wait_bits(dev, SSB_IMSTATE, SSB_IMSTATE_BUSY, 1000,
+                                      0);
+                }
+
+                ssb_write32(dev, SSB_TMSLOW,
+                        SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK |
+                        reject | SSB_TMSLOW_RESET |
+                        core_specific_flags);
+                ssb_flush_tmslow(dev);
+
+                if (ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_INITIATOR) {
+                        val = ssb_read32(dev, SSB_IMSTATE);
+                        val &= ~SSB_IMSTATE_REJECT;
+                        ssb_write32(dev, SSB_IMSTATE, val);
+                }
+        }
 
         ssb_write32(dev, SSB_TMSLOW,
                     reject | SSB_TMSLOW_RESET |
diff --git a/drivers/ssb/pci.c b/drivers/ssb/pci.c
index 158449e55044..a467b20baac8 100644
--- a/drivers/ssb/pci.c
+++ b/drivers/ssb/pci.c
@@ -468,10 +468,14 @@ static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in)
                 SPEX(country_code, SSB_SPROM4_CCODE, 0xFFFF, 0);
                 SPEX(boardflags_lo, SSB_SPROM4_BFLLO, 0xFFFF, 0);
                 SPEX(boardflags_hi, SSB_SPROM4_BFLHI, 0xFFFF, 0);
+                SPEX(boardflags2_lo, SSB_SPROM4_BFL2LO, 0xFFFF, 0);
+                SPEX(boardflags2_hi, SSB_SPROM4_BFL2HI, 0xFFFF, 0);
         } else {
                 SPEX(country_code, SSB_SPROM5_CCODE, 0xFFFF, 0);
                 SPEX(boardflags_lo, SSB_SPROM5_BFLLO, 0xFFFF, 0);
                 SPEX(boardflags_hi, SSB_SPROM5_BFLHI, 0xFFFF, 0);
+                SPEX(boardflags2_lo, SSB_SPROM5_BFL2LO, 0xFFFF, 0);
+                SPEX(boardflags2_hi, SSB_SPROM5_BFL2HI, 0xFFFF, 0);
         }
         SPEX(ant_available_a, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_A,
              SSB_SPROM4_ANTAVAIL_A_SHIFT);
@@ -641,7 +645,7 @@ static int sprom_extract(struct ssb_bus *bus, struct ssb_sprom *out,
                 break;
         default:
                 ssb_printk(KERN_WARNING PFX "Unsupported SPROM"
-                           "  revision %d detected. Will extract"
+                           " revision %d detected. Will extract"
                            " v1\n", out->revision);
                 out->revision = 1;
                 sprom_extract_r123(out, in);
diff --git a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c b/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c
index 991463f4a7f4..9b7b71c294b8 100644
--- a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c
+++ b/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c
@@ -2313,7 +2313,9 @@ static s32 wl_inform_single_bss(struct wl_priv *wl, struct wl_bss_info *bi)
         notif_bss_info->frame_len =
             offsetof(struct ieee80211_mgmt,
                      u.beacon.variable) + wl_get_ielen(wl);
-        freq = ieee80211_channel_to_frequency(notif_bss_info->channel);
+        freq = ieee80211_channel_to_frequency(notif_bss_info->channel,
+                                              band->band);
+
         channel = ieee80211_get_channel(wiphy, freq);
 
         WL_DBG("SSID : \"%s\", rssi %d, channel %d, capability : 0x04%x, bssid %pM\n",