diff options
Diffstat (limited to 'drivers/net/wireless/rtlwifi/rtl8192ce/hw.c')
-rw-r--r-- | drivers/net/wireless/rtlwifi/rtl8192ce/hw.c | 153 |
1 files changed, 70 insertions, 83 deletions
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/hw.c b/drivers/net/wireless/rtlwifi/rtl8192ce/hw.c index 1c41a0c93506..0b910921e606 100644 --- a/drivers/net/wireless/rtlwifi/rtl8192ce/hw.c +++ b/drivers/net/wireless/rtlwifi/rtl8192ce/hw.c | |||
@@ -124,7 +124,7 @@ void rtl92ce_get_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
124 | break; | 124 | break; |
125 | } | 125 | } |
126 | case HW_VAR_FW_PSMODE_STATUS: | 126 | case HW_VAR_FW_PSMODE_STATUS: |
127 | *((bool *) (val)) = ppsc->b_fw_current_inpsmode; | 127 | *((bool *) (val)) = ppsc->fw_current_inpsmode; |
128 | break; | 128 | break; |
129 | case HW_VAR_CORRECT_TSF:{ | 129 | case HW_VAR_CORRECT_TSF:{ |
130 | u64 tsf; | 130 | u64 tsf; |
@@ -173,15 +173,15 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
173 | break; | 173 | break; |
174 | } | 174 | } |
175 | case HW_VAR_BASIC_RATE:{ | 175 | case HW_VAR_BASIC_RATE:{ |
176 | u16 b_rate_cfg = ((u16 *) val)[0]; | 176 | u16 rate_cfg = ((u16 *) val)[0]; |
177 | u8 rate_index = 0; | 177 | u8 rate_index = 0; |
178 | b_rate_cfg = b_rate_cfg & 0x15f; | 178 | rate_cfg &= 0x15f; |
179 | b_rate_cfg |= 0x01; | 179 | rate_cfg |= 0x01; |
180 | rtl_write_byte(rtlpriv, REG_RRSR, b_rate_cfg & 0xff); | 180 | rtl_write_byte(rtlpriv, REG_RRSR, rate_cfg & 0xff); |
181 | rtl_write_byte(rtlpriv, REG_RRSR + 1, | 181 | rtl_write_byte(rtlpriv, REG_RRSR + 1, |
182 | (b_rate_cfg >> 8)&0xff); | 182 | (rate_cfg >> 8)&0xff); |
183 | while (b_rate_cfg > 0x1) { | 183 | while (rate_cfg > 0x1) { |
184 | b_rate_cfg = (b_rate_cfg >> 1); | 184 | rate_cfg = (rate_cfg >> 1); |
185 | rate_index++; | 185 | rate_index++; |
186 | } | 186 | } |
187 | rtl_write_byte(rtlpriv, REG_INIRTS_RATE_SEL, | 187 | rtl_write_byte(rtlpriv, REG_INIRTS_RATE_SEL, |
@@ -318,15 +318,17 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
318 | } | 318 | } |
319 | case HW_VAR_AC_PARAM:{ | 319 | case HW_VAR_AC_PARAM:{ |
320 | u8 e_aci = *((u8 *) val); | 320 | u8 e_aci = *((u8 *) val); |
321 | u32 u4b_ac_param = 0; | 321 | u32 u4b_ac_param; |
322 | u16 cw_min = le16_to_cpu(mac->ac[e_aci].cw_min); | ||
323 | u16 cw_max = le16_to_cpu(mac->ac[e_aci].cw_max); | ||
324 | u16 tx_op = le16_to_cpu(mac->ac[e_aci].tx_op); | ||
322 | 325 | ||
323 | u4b_ac_param |= (u32) mac->ac[e_aci].aifs; | 326 | u4b_ac_param = (u32) mac->ac[e_aci].aifs; |
324 | u4b_ac_param |= ((u32) mac->ac[e_aci].cw_min | 327 | u4b_ac_param |= ((u32)cw_min |
325 | & 0xF) << AC_PARAM_ECW_MIN_OFFSET; | 328 | & 0xF) << AC_PARAM_ECW_MIN_OFFSET; |
326 | u4b_ac_param |= ((u32) mac->ac[e_aci].cw_max & | 329 | u4b_ac_param |= ((u32)cw_max & |
327 | 0xF) << AC_PARAM_ECW_MAX_OFFSET; | 330 | 0xF) << AC_PARAM_ECW_MAX_OFFSET; |
328 | u4b_ac_param |= (u32) mac->ac[e_aci].tx_op | 331 | u4b_ac_param |= (u32)tx_op << AC_PARAM_TXOP_OFFSET; |
329 | << AC_PARAM_TXOP_LIMIT_OFFSET; | ||
330 | 332 | ||
331 | RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, | 333 | RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, |
332 | ("queue:%x, ac_param:%x\n", e_aci, | 334 | ("queue:%x, ac_param:%x\n", e_aci, |
@@ -469,12 +471,12 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
469 | break; | 471 | break; |
470 | } | 472 | } |
471 | case HW_VAR_FW_PSMODE_STATUS: | 473 | case HW_VAR_FW_PSMODE_STATUS: |
472 | ppsc->b_fw_current_inpsmode = *((bool *) val); | 474 | ppsc->fw_current_inpsmode = *((bool *) val); |
473 | break; | 475 | break; |
474 | case HW_VAR_H2C_FW_JOINBSSRPT:{ | 476 | case HW_VAR_H2C_FW_JOINBSSRPT:{ |
475 | u8 mstatus = (*(u8 *) val); | 477 | u8 mstatus = (*(u8 *) val); |
476 | u8 tmp_regcr, tmp_reg422; | 478 | u8 tmp_regcr, tmp_reg422; |
477 | bool b_recover = false; | 479 | bool recover = false; |
478 | 480 | ||
479 | if (mstatus == RT_MEDIA_CONNECT) { | 481 | if (mstatus == RT_MEDIA_CONNECT) { |
480 | rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AID, | 482 | rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AID, |
@@ -491,7 +493,7 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
491 | rtl_read_byte(rtlpriv, | 493 | rtl_read_byte(rtlpriv, |
492 | REG_FWHW_TXQ_CTRL + 2); | 494 | REG_FWHW_TXQ_CTRL + 2); |
493 | if (tmp_reg422 & BIT(6)) | 495 | if (tmp_reg422 & BIT(6)) |
494 | b_recover = true; | 496 | recover = true; |
495 | rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2, | 497 | rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2, |
496 | tmp_reg422 & (~BIT(6))); | 498 | tmp_reg422 & (~BIT(6))); |
497 | 499 | ||
@@ -500,7 +502,7 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
500 | _rtl92ce_set_bcn_ctrl_reg(hw, BIT(3), 0); | 502 | _rtl92ce_set_bcn_ctrl_reg(hw, BIT(3), 0); |
501 | _rtl92ce_set_bcn_ctrl_reg(hw, 0, BIT(4)); | 503 | _rtl92ce_set_bcn_ctrl_reg(hw, 0, BIT(4)); |
502 | 504 | ||
503 | if (b_recover) { | 505 | if (recover) { |
504 | rtl_write_byte(rtlpriv, | 506 | rtl_write_byte(rtlpriv, |
505 | REG_FWHW_TXQ_CTRL + 2, | 507 | REG_FWHW_TXQ_CTRL + 2, |
506 | tmp_reg422); | 508 | tmp_reg422); |
@@ -868,7 +870,7 @@ static void _rtl92ce_enable_aspm_back_door(struct ieee80211_hw *hw) | |||
868 | rtl_write_word(rtlpriv, 0x350, 0x870c); | 870 | rtl_write_word(rtlpriv, 0x350, 0x870c); |
869 | rtl_write_byte(rtlpriv, 0x352, 0x1); | 871 | rtl_write_byte(rtlpriv, 0x352, 0x1); |
870 | 872 | ||
871 | if (ppsc->b_support_backdoor) | 873 | if (ppsc->support_backdoor) |
872 | rtl_write_byte(rtlpriv, 0x349, 0x1b); | 874 | rtl_write_byte(rtlpriv, 0x349, 0x1b); |
873 | else | 875 | else |
874 | rtl_write_byte(rtlpriv, 0x349, 0x03); | 876 | rtl_write_byte(rtlpriv, 0x349, 0x03); |
@@ -940,10 +942,10 @@ int rtl92ce_hw_init(struct ieee80211_hw *hw) | |||
940 | ("Failed to download FW. Init HW " | 942 | ("Failed to download FW. Init HW " |
941 | "without FW now..\n")); | 943 | "without FW now..\n")); |
942 | err = 1; | 944 | err = 1; |
943 | rtlhal->bfw_ready = false; | 945 | rtlhal->fw_ready = false; |
944 | return err; | 946 | return err; |
945 | } else { | 947 | } else { |
946 | rtlhal->bfw_ready = true; | 948 | rtlhal->fw_ready = true; |
947 | } | 949 | } |
948 | 950 | ||
949 | rtlhal->last_hmeboxnum = 0; | 951 | rtlhal->last_hmeboxnum = 0; |
@@ -1170,21 +1172,20 @@ void rtl92ce_set_qos(struct ieee80211_hw *hw, int aci) | |||
1170 | { | 1172 | { |
1171 | struct rtl_priv *rtlpriv = rtl_priv(hw); | 1173 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
1172 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); | 1174 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); |
1173 | |||
1174 | u32 u4b_ac_param; | 1175 | u32 u4b_ac_param; |
1176 | u16 cw_min = le16_to_cpu(mac->ac[aci].cw_min); | ||
1177 | u16 cw_max = le16_to_cpu(mac->ac[aci].cw_max); | ||
1178 | u16 tx_op = le16_to_cpu(mac->ac[aci].tx_op); | ||
1175 | 1179 | ||
1176 | rtl92c_dm_init_edca_turbo(hw); | 1180 | rtl92c_dm_init_edca_turbo(hw); |
1177 | |||
1178 | u4b_ac_param = (u32) mac->ac[aci].aifs; | 1181 | u4b_ac_param = (u32) mac->ac[aci].aifs; |
1179 | u4b_ac_param |= | 1182 | u4b_ac_param |= (u32) ((cw_min & 0xF) << AC_PARAM_ECW_MIN_OFFSET); |
1180 | ((u32) mac->ac[aci].cw_min & 0xF) << AC_PARAM_ECW_MIN_OFFSET; | 1183 | u4b_ac_param |= (u32) ((cw_max & 0xF) << AC_PARAM_ECW_MAX_OFFSET); |
1181 | u4b_ac_param |= | 1184 | u4b_ac_param |= (u32) (tx_op << AC_PARAM_TXOP_OFFSET); |
1182 | ((u32) mac->ac[aci].cw_max & 0xF) << AC_PARAM_ECW_MAX_OFFSET; | ||
1183 | u4b_ac_param |= (u32) mac->ac[aci].tx_op << AC_PARAM_TXOP_LIMIT_OFFSET; | ||
1184 | RT_TRACE(rtlpriv, COMP_QOS, DBG_DMESG, | 1185 | RT_TRACE(rtlpriv, COMP_QOS, DBG_DMESG, |
1185 | ("queue:%x, ac_param:%x aifs:%x cwmin:%x cwmax:%x txop:%x\n", | 1186 | ("queue:%x, ac_param:%x aifs:%x cwmin:%x cwmax:%x txop:%x\n", |
1186 | aci, u4b_ac_param, mac->ac[aci].aifs, mac->ac[aci].cw_min, | 1187 | aci, u4b_ac_param, mac->ac[aci].aifs, cw_min, |
1187 | mac->ac[aci].cw_max, mac->ac[aci].tx_op)); | 1188 | cw_max, tx_op)); |
1188 | switch (aci) { | 1189 | switch (aci) { |
1189 | case AC1_BK: | 1190 | case AC1_BK: |
1190 | rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, u4b_ac_param); | 1191 | rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, u4b_ac_param); |
@@ -1237,7 +1238,7 @@ static void _rtl92ce_poweroff_adapter(struct ieee80211_hw *hw) | |||
1237 | rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x40); | 1238 | rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x40); |
1238 | rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE2); | 1239 | rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE2); |
1239 | rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE0); | 1240 | rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE0); |
1240 | if ((rtl_read_byte(rtlpriv, REG_MCUFWDL) & BIT(7)) && rtlhal->bfw_ready) | 1241 | if ((rtl_read_byte(rtlpriv, REG_MCUFWDL) & BIT(7)) && rtlhal->fw_ready) |
1241 | rtl92c_firmware_selfreset(hw); | 1242 | rtl92c_firmware_selfreset(hw); |
1242 | rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1, 0x51); | 1243 | rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1, 0x51); |
1243 | rtl_write_byte(rtlpriv, REG_MCUFWDL, 0x00); | 1244 | rtl_write_byte(rtlpriv, REG_MCUFWDL, 0x00); |
@@ -1335,19 +1336,6 @@ void rtl92ce_update_interrupt_mask(struct ieee80211_hw *hw, | |||
1335 | rtl92ce_enable_interrupt(hw); | 1336 | rtl92ce_enable_interrupt(hw); |
1336 | } | 1337 | } |
1337 | 1338 | ||
1338 | static u8 _rtl92c_get_chnl_group(u8 chnl) | ||
1339 | { | ||
1340 | u8 group; | ||
1341 | |||
1342 | if (chnl < 3) | ||
1343 | group = 0; | ||
1344 | else if (chnl < 9) | ||
1345 | group = 1; | ||
1346 | else | ||
1347 | group = 2; | ||
1348 | return group; | ||
1349 | } | ||
1350 | |||
1351 | static void _rtl92ce_read_txpower_info_from_hwpg(struct ieee80211_hw *hw, | 1339 | static void _rtl92ce_read_txpower_info_from_hwpg(struct ieee80211_hw *hw, |
1352 | bool autoload_fail, | 1340 | bool autoload_fail, |
1353 | u8 *hwinfo) | 1341 | u8 *hwinfo) |
@@ -1568,7 +1556,7 @@ static void _rtl92ce_read_txpower_info_from_hwpg(struct ieee80211_hw *hw, | |||
1568 | rtlefuse->eeprom_thermalmeter = (tempval & 0x1f); | 1556 | rtlefuse->eeprom_thermalmeter = (tempval & 0x1f); |
1569 | 1557 | ||
1570 | if (rtlefuse->eeprom_thermalmeter == 0x1f || autoload_fail) | 1558 | if (rtlefuse->eeprom_thermalmeter == 0x1f || autoload_fail) |
1571 | rtlefuse->b_apk_thermalmeterignore = true; | 1559 | rtlefuse->apk_thermalmeterignore = true; |
1572 | 1560 | ||
1573 | rtlefuse->thermalmeter[0] = rtlefuse->eeprom_thermalmeter; | 1561 | rtlefuse->thermalmeter[0] = rtlefuse->eeprom_thermalmeter; |
1574 | RTPRINT(rtlpriv, FINIT, INIT_TxPower, | 1562 | RTPRINT(rtlpriv, FINIT, INIT_TxPower, |
@@ -1625,7 +1613,7 @@ static void _rtl92ce_read_adapter_info(struct ieee80211_hw *hw) | |||
1625 | 1613 | ||
1626 | rtlefuse->eeprom_channelplan = *(u8 *)&hwinfo[EEPROM_CHANNELPLAN]; | 1614 | rtlefuse->eeprom_channelplan = *(u8 *)&hwinfo[EEPROM_CHANNELPLAN]; |
1627 | rtlefuse->eeprom_version = *(u16 *)&hwinfo[EEPROM_VERSION]; | 1615 | rtlefuse->eeprom_version = *(u16 *)&hwinfo[EEPROM_VERSION]; |
1628 | rtlefuse->b_txpwr_fromeprom = true; | 1616 | rtlefuse->txpwr_fromeprom = true; |
1629 | rtlefuse->eeprom_oemid = *(u8 *)&hwinfo[EEPROM_CUSTOMER_ID]; | 1617 | rtlefuse->eeprom_oemid = *(u8 *)&hwinfo[EEPROM_CUSTOMER_ID]; |
1630 | 1618 | ||
1631 | RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, | 1619 | RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, |
@@ -1668,7 +1656,7 @@ static void _rtl92ce_hal_customized_behavior(struct ieee80211_hw *hw) | |||
1668 | 1656 | ||
1669 | switch (rtlhal->oem_id) { | 1657 | switch (rtlhal->oem_id) { |
1670 | case RT_CID_819x_HP: | 1658 | case RT_CID_819x_HP: |
1671 | pcipriv->ledctl.bled_opendrain = true; | 1659 | pcipriv->ledctl.led_opendrain = true; |
1672 | break; | 1660 | break; |
1673 | case RT_CID_819x_Lenovo: | 1661 | case RT_CID_819x_Lenovo: |
1674 | case RT_CID_DEFAULT: | 1662 | case RT_CID_DEFAULT: |
@@ -1693,10 +1681,10 @@ void rtl92ce_read_eeprom_info(struct ieee80211_hw *hw) | |||
1693 | 1681 | ||
1694 | rtlhal->version = _rtl92ce_read_chip_version(hw); | 1682 | rtlhal->version = _rtl92ce_read_chip_version(hw); |
1695 | if (get_rf_type(rtlphy) == RF_1T1R) | 1683 | if (get_rf_type(rtlphy) == RF_1T1R) |
1696 | rtlpriv->dm.brfpath_rxenable[0] = true; | 1684 | rtlpriv->dm.rfpath_rxenable[0] = true; |
1697 | else | 1685 | else |
1698 | rtlpriv->dm.brfpath_rxenable[0] = | 1686 | rtlpriv->dm.rfpath_rxenable[0] = |
1699 | rtlpriv->dm.brfpath_rxenable[1] = true; | 1687 | rtlpriv->dm.rfpath_rxenable[1] = true; |
1700 | RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, ("VersionID = 0x%4x\n", | 1688 | RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, ("VersionID = 0x%4x\n", |
1701 | rtlhal->version)); | 1689 | rtlhal->version)); |
1702 | tmp_u1b = rtl_read_byte(rtlpriv, REG_9346CR); | 1690 | tmp_u1b = rtl_read_byte(rtlpriv, REG_9346CR); |
@@ -1725,18 +1713,18 @@ void rtl92ce_update_hal_rate_table(struct ieee80211_hw *hw) | |||
1725 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); | 1713 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); |
1726 | 1714 | ||
1727 | u32 ratr_value = (u32) mac->basic_rates; | 1715 | u32 ratr_value = (u32) mac->basic_rates; |
1728 | u8 *p_mcsrate = mac->mcs; | 1716 | u8 *mcsrate = mac->mcs; |
1729 | u8 ratr_index = 0; | 1717 | u8 ratr_index = 0; |
1730 | u8 b_nmode = mac->ht_enable; | 1718 | u8 nmode = mac->ht_enable; |
1731 | u8 mimo_ps = 1; | 1719 | u8 mimo_ps = 1; |
1732 | u16 shortgi_rate; | 1720 | u16 shortgi_rate; |
1733 | u32 tmp_ratr_value; | 1721 | u32 tmp_ratr_value; |
1734 | u8 b_curtxbw_40mhz = mac->bw_40; | 1722 | u8 curtxbw_40mhz = mac->bw_40; |
1735 | u8 b_curshortgi_40mhz = mac->sgi_40; | 1723 | u8 curshortgi_40mhz = mac->sgi_40; |
1736 | u8 b_curshortgi_20mhz = mac->sgi_20; | 1724 | u8 curshortgi_20mhz = mac->sgi_20; |
1737 | enum wireless_mode wirelessmode = mac->mode; | 1725 | enum wireless_mode wirelessmode = mac->mode; |
1738 | 1726 | ||
1739 | ratr_value |= EF2BYTE((*(u16 *) (p_mcsrate))) << 12; | 1727 | ratr_value |= ((*(u16 *) (mcsrate))) << 12; |
1740 | 1728 | ||
1741 | switch (wirelessmode) { | 1729 | switch (wirelessmode) { |
1742 | case WIRELESS_MODE_B: | 1730 | case WIRELESS_MODE_B: |
@@ -1750,7 +1738,7 @@ void rtl92ce_update_hal_rate_table(struct ieee80211_hw *hw) | |||
1750 | break; | 1738 | break; |
1751 | case WIRELESS_MODE_N_24G: | 1739 | case WIRELESS_MODE_N_24G: |
1752 | case WIRELESS_MODE_N_5G: | 1740 | case WIRELESS_MODE_N_5G: |
1753 | b_nmode = 1; | 1741 | nmode = 1; |
1754 | if (mimo_ps == 0) { | 1742 | if (mimo_ps == 0) { |
1755 | ratr_value &= 0x0007F005; | 1743 | ratr_value &= 0x0007F005; |
1756 | } else { | 1744 | } else { |
@@ -1776,9 +1764,8 @@ void rtl92ce_update_hal_rate_table(struct ieee80211_hw *hw) | |||
1776 | 1764 | ||
1777 | ratr_value &= 0x0FFFFFFF; | 1765 | ratr_value &= 0x0FFFFFFF; |
1778 | 1766 | ||
1779 | if (b_nmode && ((b_curtxbw_40mhz && | 1767 | if (nmode && ((curtxbw_40mhz && curshortgi_40mhz) || (!curtxbw_40mhz && |
1780 | b_curshortgi_40mhz) || (!b_curtxbw_40mhz && | 1768 | curshortgi_20mhz))) { |
1781 | b_curshortgi_20mhz))) { | ||
1782 | 1769 | ||
1783 | ratr_value |= 0x10000000; | 1770 | ratr_value |= 0x10000000; |
1784 | tmp_ratr_value = (ratr_value >> 12); | 1771 | tmp_ratr_value = (ratr_value >> 12); |
@@ -1806,11 +1793,11 @@ void rtl92ce_update_hal_rate_mask(struct ieee80211_hw *hw, u8 rssi_level) | |||
1806 | u32 ratr_bitmap = (u32) mac->basic_rates; | 1793 | u32 ratr_bitmap = (u32) mac->basic_rates; |
1807 | u8 *p_mcsrate = mac->mcs; | 1794 | u8 *p_mcsrate = mac->mcs; |
1808 | u8 ratr_index; | 1795 | u8 ratr_index; |
1809 | u8 b_curtxbw_40mhz = mac->bw_40; | 1796 | u8 curtxbw_40mhz = mac->bw_40; |
1810 | u8 b_curshortgi_40mhz = mac->sgi_40; | 1797 | u8 curshortgi_40mhz = mac->sgi_40; |
1811 | u8 b_curshortgi_20mhz = mac->sgi_20; | 1798 | u8 curshortgi_20mhz = mac->sgi_20; |
1812 | enum wireless_mode wirelessmode = mac->mode; | 1799 | enum wireless_mode wirelessmode = mac->mode; |
1813 | bool b_shortgi = false; | 1800 | bool shortgi = false; |
1814 | u8 rate_mask[5]; | 1801 | u8 rate_mask[5]; |
1815 | u8 macid = 0; | 1802 | u8 macid = 0; |
1816 | u8 mimops = 1; | 1803 | u8 mimops = 1; |
@@ -1852,7 +1839,7 @@ void rtl92ce_update_hal_rate_mask(struct ieee80211_hw *hw, u8 rssi_level) | |||
1852 | } else { | 1839 | } else { |
1853 | if (rtlphy->rf_type == RF_1T2R || | 1840 | if (rtlphy->rf_type == RF_1T2R || |
1854 | rtlphy->rf_type == RF_1T1R) { | 1841 | rtlphy->rf_type == RF_1T1R) { |
1855 | if (b_curtxbw_40mhz) { | 1842 | if (curtxbw_40mhz) { |
1856 | if (rssi_level == 1) | 1843 | if (rssi_level == 1) |
1857 | ratr_bitmap &= 0x000f0000; | 1844 | ratr_bitmap &= 0x000f0000; |
1858 | else if (rssi_level == 2) | 1845 | else if (rssi_level == 2) |
@@ -1868,7 +1855,7 @@ void rtl92ce_update_hal_rate_mask(struct ieee80211_hw *hw, u8 rssi_level) | |||
1868 | ratr_bitmap &= 0x000ff005; | 1855 | ratr_bitmap &= 0x000ff005; |
1869 | } | 1856 | } |
1870 | } else { | 1857 | } else { |
1871 | if (b_curtxbw_40mhz) { | 1858 | if (curtxbw_40mhz) { |
1872 | if (rssi_level == 1) | 1859 | if (rssi_level == 1) |
1873 | ratr_bitmap &= 0x0f0f0000; | 1860 | ratr_bitmap &= 0x0f0f0000; |
1874 | else if (rssi_level == 2) | 1861 | else if (rssi_level == 2) |
@@ -1886,13 +1873,13 @@ void rtl92ce_update_hal_rate_mask(struct ieee80211_hw *hw, u8 rssi_level) | |||
1886 | } | 1873 | } |
1887 | } | 1874 | } |
1888 | 1875 | ||
1889 | if ((b_curtxbw_40mhz && b_curshortgi_40mhz) || | 1876 | if ((curtxbw_40mhz && curshortgi_40mhz) || |
1890 | (!b_curtxbw_40mhz && b_curshortgi_20mhz)) { | 1877 | (!curtxbw_40mhz && curshortgi_20mhz)) { |
1891 | 1878 | ||
1892 | if (macid == 0) | 1879 | if (macid == 0) |
1893 | b_shortgi = true; | 1880 | shortgi = true; |
1894 | else if (macid == 1) | 1881 | else if (macid == 1) |
1895 | b_shortgi = false; | 1882 | shortgi = false; |
1896 | } | 1883 | } |
1897 | break; | 1884 | break; |
1898 | default: | 1885 | default: |
@@ -1906,9 +1893,9 @@ void rtl92ce_update_hal_rate_mask(struct ieee80211_hw *hw, u8 rssi_level) | |||
1906 | } | 1893 | } |
1907 | RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, | 1894 | RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, |
1908 | ("ratr_bitmap :%x\n", ratr_bitmap)); | 1895 | ("ratr_bitmap :%x\n", ratr_bitmap)); |
1909 | *(u32 *)&rate_mask = EF4BYTE((ratr_bitmap & 0x0fffffff) | | 1896 | *(u32 *)&rate_mask = (ratr_bitmap & 0x0fffffff) | |
1910 | (ratr_index << 28)); | 1897 | (ratr_index << 28); |
1911 | rate_mask[4] = macid | (b_shortgi ? 0x20 : 0x00) | 0x80; | 1898 | rate_mask[4] = macid | (shortgi ? 0x20 : 0x00) | 0x80; |
1912 | RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, ("Rate_index:%x, " | 1899 | RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, ("Rate_index:%x, " |
1913 | "ratr_val:%x, %x:%x:%x:%x:%x\n", | 1900 | "ratr_val:%x, %x:%x:%x:%x:%x\n", |
1914 | ratr_index, ratr_bitmap, | 1901 | ratr_index, ratr_bitmap, |
@@ -1940,13 +1927,13 @@ bool rtl92ce_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 * valid) | |||
1940 | struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); | 1927 | struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); |
1941 | enum rf_pwrstate e_rfpowerstate_toset, cur_rfstate; | 1928 | enum rf_pwrstate e_rfpowerstate_toset, cur_rfstate; |
1942 | u8 u1tmp; | 1929 | u8 u1tmp; |
1943 | bool b_actuallyset = false; | 1930 | bool actuallyset = false; |
1944 | unsigned long flag; | 1931 | unsigned long flag; |
1945 | 1932 | ||
1946 | if ((rtlpci->up_first_time == 1) || (rtlpci->being_init_adapter)) | 1933 | if ((rtlpci->up_first_time == 1) || (rtlpci->being_init_adapter)) |
1947 | return false; | 1934 | return false; |
1948 | 1935 | ||
1949 | if (ppsc->b_swrf_processing) | 1936 | if (ppsc->swrf_processing) |
1950 | return false; | 1937 | return false; |
1951 | 1938 | ||
1952 | spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag); | 1939 | spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag); |
@@ -1972,24 +1959,24 @@ bool rtl92ce_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 * valid) | |||
1972 | u1tmp = rtl_read_byte(rtlpriv, REG_GPIO_IO_SEL); | 1959 | u1tmp = rtl_read_byte(rtlpriv, REG_GPIO_IO_SEL); |
1973 | e_rfpowerstate_toset = (u1tmp & BIT(3)) ? ERFON : ERFOFF; | 1960 | e_rfpowerstate_toset = (u1tmp & BIT(3)) ? ERFON : ERFOFF; |
1974 | 1961 | ||
1975 | if ((ppsc->b_hwradiooff == true) && (e_rfpowerstate_toset == ERFON)) { | 1962 | if ((ppsc->hwradiooff == true) && (e_rfpowerstate_toset == ERFON)) { |
1976 | RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG, | 1963 | RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG, |
1977 | ("GPIOChangeRF - HW Radio ON, RF ON\n")); | 1964 | ("GPIOChangeRF - HW Radio ON, RF ON\n")); |
1978 | 1965 | ||
1979 | e_rfpowerstate_toset = ERFON; | 1966 | e_rfpowerstate_toset = ERFON; |
1980 | ppsc->b_hwradiooff = false; | 1967 | ppsc->hwradiooff = false; |
1981 | b_actuallyset = true; | 1968 | actuallyset = true; |
1982 | } else if ((ppsc->b_hwradiooff == false) | 1969 | } else if ((ppsc->hwradiooff == false) |
1983 | && (e_rfpowerstate_toset == ERFOFF)) { | 1970 | && (e_rfpowerstate_toset == ERFOFF)) { |
1984 | RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG, | 1971 | RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG, |
1985 | ("GPIOChangeRF - HW Radio OFF, RF OFF\n")); | 1972 | ("GPIOChangeRF - HW Radio OFF, RF OFF\n")); |
1986 | 1973 | ||
1987 | e_rfpowerstate_toset = ERFOFF; | 1974 | e_rfpowerstate_toset = ERFOFF; |
1988 | ppsc->b_hwradiooff = true; | 1975 | ppsc->hwradiooff = true; |
1989 | b_actuallyset = true; | 1976 | actuallyset = true; |
1990 | } | 1977 | } |
1991 | 1978 | ||
1992 | if (b_actuallyset) { | 1979 | if (actuallyset) { |
1993 | if (e_rfpowerstate_toset == ERFON) { | 1980 | if (e_rfpowerstate_toset == ERFON) { |
1994 | if ((ppsc->reg_rfps_level & RT_RF_OFF_LEVL_ASPM) && | 1981 | if ((ppsc->reg_rfps_level & RT_RF_OFF_LEVL_ASPM) && |
1995 | RT_IN_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_ASPM)) { | 1982 | RT_IN_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_ASPM)) { |
@@ -2028,7 +2015,7 @@ bool rtl92ce_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 * valid) | |||
2028 | } | 2015 | } |
2029 | 2016 | ||
2030 | *valid = 1; | 2017 | *valid = 1; |
2031 | return !ppsc->b_hwradiooff; | 2018 | return !ppsc->hwradiooff; |
2032 | 2019 | ||
2033 | } | 2020 | } |
2034 | 2021 | ||