ARM: arm-soc: Merge branch 'next/pm2' into next/pm

Another smaller branch merged into next/pm before pull request.

Signed-off-by: Olof Johansson <olof@lixom.net>

650 files changed, 14204 insertions, 6266 deletions

diff --git a/arch/alpha/kernel/osf_sys.c b/arch/alpha/kernel/osf_sys.c
index 1e6956a90608..14db93e4c8a8 100644
--- a/arch/alpha/kernel/osf_sys.c
+++ b/arch/alpha/kernel/osf_sys.c
@@ -445,7 +445,7 @@ struct procfs_args {
  * unhappy with OSF UFS. [CHECKME]
  */
 static int
-osf_ufs_mount(char *dirname, struct ufs_args __user *args, int flags)
+osf_ufs_mount(const char *dirname, struct ufs_args __user *args, int flags)
 {
         int retval;
         struct cdfs_args tmp;
@@ -465,7 +465,7 @@ osf_ufs_mount(char *dirname, struct ufs_args __user *args, int flags)
 }
 
 static int
-osf_cdfs_mount(char *dirname, struct cdfs_args __user *args, int flags)
+osf_cdfs_mount(const char *dirname, struct cdfs_args __user *args, int flags)
 {
         int retval;
         struct cdfs_args tmp;
@@ -485,7 +485,7 @@ osf_cdfs_mount(char *dirname, struct cdfs_args __user *args, int flags)
 }
 
 static int
-osf_procfs_mount(char *dirname, struct procfs_args __user *args, int flags)
+osf_procfs_mount(const char *dirname, struct procfs_args __user *args, int flags)
 {
         struct procfs_args tmp;
 
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ade7e924bef5..a920f2c422e9 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -433,19 +433,6 @@ config ARCH_FOOTBRIDGE
           Support for systems based on the DC21285 companion chip
           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 
-config ARCH_MXC
-        bool "Freescale MXC/iMX-based"
-        select ARCH_REQUIRE_GPIOLIB
-        select CLKDEV_LOOKUP
-        select CLKSRC_MMIO
-        select GENERIC_CLOCKEVENTS
-        select GENERIC_IRQ_CHIP
-        select MULTI_IRQ_HANDLER
-        select SPARSE_IRQ
-        select USE_OF
-        help
-          Support for Freescale MXC/iMX-based family of processors
-
 config ARCH_MXS
         bool "Freescale MXS-based"
         select ARCH_REQUIRE_GPIOLIB
@@ -536,6 +523,8 @@ config ARCH_DOVE
         select CPU_V7
         select GENERIC_CLOCKEVENTS
         select MIGHT_HAVE_PCI
+        select PINCTRL
+        select PINCTRL_DOVE
         select PLAT_ORION_LEGACY
         select USB_ARCH_HAS_EHCI
         help
@@ -547,6 +536,8 @@ config ARCH_KIRKWOOD
         select CPU_FEROCEON
         select GENERIC_CLOCKEVENTS
         select PCI
+        select PINCTRL
+        select PINCTRL_KIRKWOOD
         select PLAT_ORION_LEGACY
         help
           Support for the following Marvell Kirkwood series SoCs:
@@ -924,6 +915,7 @@ config ARCH_DAVINCI
         select GENERIC_IRQ_CHIP
         select HAVE_IDE
         select NEED_MACH_GPIO_H
+        select USE_OF
         select ZONE_DMA
         help
           Support for TI's DaVinci platform.
@@ -937,7 +929,6 @@ config ARCH_OMAP
         select CLKSRC_MMIO
         select GENERIC_CLOCKEVENTS
         select HAVE_CLK
-        select NEED_MACH_GPIO_H
         help
           Support for TI's OMAP platform (OMAP1/2/3/4).
 
@@ -959,7 +950,7 @@ config ARCH_ZYNQ
         bool "Xilinx Zynq ARM Cortex A9 Platform"
         select ARM_AMBA
         select ARM_GIC
-        select CLKDEV_LOOKUP
+        select COMMON_CLK
         select CPU_V7
         select GENERIC_CLOCKEVENTS
         select ICST
@@ -1058,7 +1049,7 @@ source "arch/arm/mach-msm/Kconfig"
 
 source "arch/arm/mach-mv78xx0/Kconfig"
 
-source "arch/arm/plat-mxc/Kconfig"
+source "arch/arm/mach-imx/Kconfig"
 
 source "arch/arm/mach-mxs/Kconfig"
 
@@ -1168,7 +1159,7 @@ config ARM_NR_BANKS
 config IWMMXT
         bool "Enable iWMMXt support"
         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
-        default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
+        default y if PXA27x || PXA3xx || ARCH_MMP
         help
           Enable support for iWMMXt context switching at run time if
           running on a CPU that supports it.
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index b0f3857b3a4c..00e9a53888ba 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -132,6 +132,23 @@ choice
                   their output to UART1 serial port on DaVinci TNETV107X
                   devices.
 
+        config DEBUG_ZYNQ_UART0
+                bool "Kernel low-level debugging on Xilinx Zynq using UART0"
+                depends on ARCH_ZYNQ
+                help
+                  Say Y here if you want the debug print routines to direct
+                  their output to UART0 on the Zynq platform.
+
+        config DEBUG_ZYNQ_UART1
+                bool "Kernel low-level debugging on Xilinx Zynq using UART1"
+                depends on ARCH_ZYNQ
+                help
+                  Say Y here if you want the debug print routines to direct
+                  their output to UART1 on the Zynq platform.
+
+                  If you have a ZC702 board and want early boot messages to
+                  appear on the USB serial adaptor, select this option.
+
         config DEBUG_DC21285_PORT
                 bool "Kernel low-level debugging messages via footbridge serial port"
                 depends on FOOTBRIDGE
@@ -209,20 +226,12 @@ choice
                   Say Y here if you want kernel low-level debugging support
                   on i.MX50 or i.MX53.
 
-        config DEBUG_IMX6Q_UART2
-                bool "i.MX6Q Debug UART2"
+        config DEBUG_IMX6Q_UART
+                bool "i.MX6Q Debug UART"
                 depends on SOC_IMX6Q
                 help
                   Say Y here if you want kernel low-level debugging support
-                  on i.MX6Q UART2. This is correct for e.g. the SabreLite
-                  board.
-
-        config DEBUG_IMX6Q_UART4
-                bool "i.MX6Q Debug UART4"
-                depends on SOC_IMX6Q
-                help
-                  Say Y here if you want kernel low-level debugging support
-                  on i.MX6Q UART4.
+                  on i.MX6Q.
 
         config DEBUG_MMP_UART2
                 bool "Kernel low-level debugging message via MMP UART2"
@@ -409,9 +418,25 @@ choice
 
 endchoice
 
+config DEBUG_IMX6Q_UART_PORT
+        int "i.MX6Q Debug UART Port (1-5)" if DEBUG_IMX6Q_UART
+        range 1 5
+        default 1
+        depends on SOC_IMX6Q
+        help
+          Choose UART port on which kernel low-level debug messages
+          should be output.
+
 config DEBUG_LL_INCLUDE
         string
         default "debug/icedcc.S" if DEBUG_ICEDCC
+        default "debug/imx.S" if DEBUG_IMX1_UART || \
+                                 DEBUG_IMX25_UART || \
+                                 DEBUG_IMX21_IMX27_UART || \
+                                 DEBUG_IMX31_IMX35_UART || \
+                                 DEBUG_IMX51_UART || \
+                                 DEBUG_IMX50_IMX53_UART ||\
+                                 DEBUG_IMX6Q_UART
         default "debug/highbank.S" if DEBUG_HIGHBANK_UART
         default "debug/mvebu.S" if DEBUG_MVEBU_UART
         default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 5f914fca911b..97252d86a701 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -196,10 +196,8 @@ machine-$(CONFIG_ARCH_ZYNQ)		+= zynq
 
 # Platform directory name.  This list is sorted alphanumerically
 # by CONFIG_* macro name.
-plat-$(CONFIG_ARCH_MXC)         += mxc
 plat-$(CONFIG_ARCH_OMAP)        += omap
 plat-$(CONFIG_ARCH_S3C64XX)     += samsung
-plat-$(CONFIG_ARCH_ZYNQ)        += versatile
 plat-$(CONFIG_PLAT_IOP)         += iop
 plat-$(CONFIG_PLAT_NOMADIK)     += nomadik
 plat-$(CONFIG_PLAT_ORION)       += orion
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index a517153a13ea..537208f22e56 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -54,10 +54,6 @@ ifeq ($(CONFIG_ARCH_SA1100),y)
 OBJS            += head-sa1100.o
 endif
 
-ifeq ($(CONFIG_ARCH_VT8500),y)
-OBJS            += head-vt8500.o
-endif
-
 ifeq ($(CONFIG_CPU_XSCALE),y)
 OBJS            += head-xscale.o
 endif
diff --git a/arch/arm/boot/compressed/head-vt8500.S b/arch/arm/boot/compressed/head-vt8500.S
deleted file mode 100644
index 1dc1e21a3be3..000000000000
--- a/arch/arm/boot/compressed/head-vt8500.S
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * linux/arch/arm/boot/compressed/head-vt8500.S
- *
- * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
- *
- * VIA VT8500 specific tweaks. This is merged into head.S by the linker.
- *
- */
-
-#include <linux/linkage.h>
-#include <asm/mach-types.h>
-
-                .section        ".start", "ax"
-
-__VT8500_start:
-        @ Compare the SCC ID register against a list of known values
-        ldr     r1, .SCCID
-        ldr     r3, [r1]
-
-        @ VT8500 override
-        ldr     r4, .VT8500SCC
-        cmp     r3, r4
-        ldreq   r7, .ID_BV07
-        beq     .Lendvt8500
-
-        @ WM8505 override
-        ldr     r4, .WM8505SCC
-        cmp     r3, r4
-        ldreq   r7, .ID_8505
-        beq     .Lendvt8500
-
-        @ Otherwise, leave the bootloader's machine id untouched
-
-.SCCID:
-        .word   0xd8120000
-.VT8500SCC:
-        .word   0x34000102
-.WM8505SCC:
-        .word   0x34260103
-
-.ID_BV07:
-        .word   MACH_TYPE_BV07
-.ID_8505:
-        .word   MACH_TYPE_WM8505_7IN_NETBOOK
-
-.Lendvt8500:
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index f37cf9fa5fa0..89dcc14f1931 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -17,13 +17,17 @@ dtb-$(CONFIG_ARCH_AT91) += aks-cdu.dtb \
         usb_a9263.dtb \
         usb_a9g20.dtb
 dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
+dtb-$(CONFIG_ARCH_DAVINCI) += da850-enbw-cmc.dtb \
+        da850-evm.dtb
 dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \
         dove-cubox.dtb \
         dove-dove-db.dtb
 dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
         exynos4210-smdkv310.dtb \
         exynos4210-trats.dtb \
-        exynos5250-smdk5250.dtb
+        exynos4412-smdk4412.dtb \
+        exynos5250-smdk5250.dtb \
+        exynos5250-snow.dtb
 dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb
 dtb-$(CONFIG_ARCH_INTEGRATOR) += integratorap.dtb \
         integratorcp.dtb
@@ -36,11 +40,20 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-dns320.dtb \
         kirkwood-ib62x0.dtb \
         kirkwood-iconnect.dtb \
         kirkwood-iomega_ix2_200.dtb \
+        kirkwood-is2.dtb \
         kirkwood-km_kirkwood.dtb \
         kirkwood-lschlv2.dtb \
         kirkwood-lsxhl.dtb \
+        kirkwood-mplcec4.dtb \
+        kirkwood-ns2.dtb \
+        kirkwood-ns2lite.dtb \
+        kirkwood-ns2max.dtb \
+        kirkwood-ns2mini.dtb \
+        kirkwood-nsa310.dtb \
+        kirkwood-topkick.dtb \
         kirkwood-ts219-6281.dtb \
-        kirkwood-ts219-6282.dtb
+        kirkwood-ts219-6282.dtb \
+        kirkwood-openblocks_a6.dtb
 dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
         msm8960-cdp.dtb
 dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
@@ -51,30 +64,40 @@ dtb-$(CONFIG_ARCH_MXC) += imx51-babbage.dtb \
         imx53-qsb.dtb \
         imx53-smd.dtb \
         imx6q-arm2.dtb \
+        imx6q-sabreauto.dtb \
         imx6q-sabrelite.dtb \
         imx6q-sabresd.dtb
 dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \
         imx23-olinuxino.dtb \
         imx23-stmp378x_devb.dtb \
+        imx28-apf28.dtb \
+        imx28-apf28dev.dtb \
         imx28-apx4devkit.dtb \
         imx28-cfa10036.dtb \
         imx28-cfa10049.dtb \
         imx28-evk.dtb \
         imx28-m28evk.dtb \
+        imx28-sps1.dtb \
         imx28-tx28.dtb
 dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
+        omap3-beagle.dtb \
         omap3-beagle-xm.dtb \
         omap3-evm.dtb \
         omap3-tobi.dtb \
         omap4-panda.dtb \
-        omap4-pandaES.dtb \
-        omap4-var_som.dtb \
+        omap4-panda-es.dtb \
+        omap4-var-som.dtb \
         omap4-sdp.dtb \
         omap5-evm.dtb \
         am335x-evm.dtb \
+        am335x-evmsk.dtb \
         am335x-bone.dtb
+dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb
 dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
-dtb-$(CONFIG_ARCH_U8500) += snowball.dtb
+dtb-$(CONFIG_ARCH_U8500) += snowball.dtb \
+        hrefprev60.dtb \
+        hrefv60plus.dtb \
+        ccu9540.dtb
 dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
         r8a7740-armadillo800eva.dtb \
         sh73a0-kzm9g.dtb
@@ -103,5 +126,6 @@ dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2p-ca5s.dtb \
 dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07.dtb \
         wm8505-ref.dtb \
         wm8650-mid.dtb
+dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb
 
 endif
diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
index c634f87e230e..2c338889df1b 100644
--- a/arch/arm/boot/dts/am335x-bone.dts
+++ b/arch/arm/boot/dts/am335x-bone.dts
@@ -13,11 +13,31 @@
         model = "TI AM335x BeagleBone";
         compatible = "ti,am335x-bone", "ti,am33xx";
 
+        cpus {
+                cpu@0 {
+                        cpu0-supply = <&dcdc2_reg>;
+                };
+        };
+
         memory {
                 device_type = "memory";
                 reg = <0x80000000 0x10000000>; /* 256 MB */
         };
 
+        am33xx_pinmux: pinmux@44e10800 {
+                pinctrl-names = "default";
+                pinctrl-0 = <&user_leds_s0>;
+
+                user_leds_s0: user_leds_s0 {
+                        pinctrl-single,pins = <
+                                0x54 0x7        /* gpmc_a5.gpio1_21, OUTPUT | MODE7 */
+                                0x58 0x17       /* gpmc_a6.gpio1_22, OUTPUT_PULLUP | MODE7 */
+                                0x5c 0x7        /* gpmc_a7.gpio1_23, OUTPUT | MODE7 */
+                                0x60 0x17       /* gpmc_a8.gpio1_24, OUTPUT_PULLUP | MODE7 */
+                        >;
+                };
+        };
+
         ocp {
                 uart1: serial@44e09000 {
                         status = "okay";
@@ -33,6 +53,36 @@
 
                 };
         };
+
+        leds {
+                compatible = "gpio-leds";
+
+                led@2 {
+                        label = "beaglebone:green:heartbeat";
+                        gpios = <&gpio2 21 0>;
+                        linux,default-trigger = "heartbeat";
+                        default-state = "off";
+                };
+
+                led@3 {
+                        label = "beaglebone:green:mmc0";
+                        gpios = <&gpio2 22 0>;
+                        linux,default-trigger = "mmc0";
+                        default-state = "off";
+                };
+
+                led@4 {
+                        label = "beaglebone:green:usr2";
+                        gpios = <&gpio2 23 0>;
+                        default-state = "off";
+                };
+
+                led@5 {
+                        label = "beaglebone:green:usr3";
+                        gpios = <&gpio2 24 0>;
+                        default-state = "off";
+                };
+        };
 };
 
 /include/ "tps65217.dtsi"
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index 185d6325a458..9f65f17ebdf8 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -13,11 +13,39 @@
         model = "TI AM335x EVM";
         compatible = "ti,am335x-evm", "ti,am33xx";
 
+        cpus {
+                cpu@0 {
+                        cpu0-supply = <&vdd1_reg>;
+                };
+        };
+
         memory {
                 device_type = "memory";
                 reg = <0x80000000 0x10000000>; /* 256 MB */
         };
 
+        am33xx_pinmux: pinmux@44e10800 {
+                pinctrl-names = "default";
+                pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0>;
+
+                matrix_keypad_s0: matrix_keypad_s0 {
+                        pinctrl-single,pins = <
+                                0x54 0x7        /* gpmc_a5.gpio1_21, OUTPUT | MODE7 */
+                                0x58 0x7        /* gpmc_a6.gpio1_22, OUTPUT | MODE7 */
+                                0x64 0x27       /* gpmc_a9.gpio1_25, INPUT | MODE7 */
+                                0x68 0x27       /* gpmc_a10.gpio1_26, INPUT | MODE7 */
+                                0x6c 0x27       /* gpmc_a11.gpio1_27, INPUT | MODE7 */
+                        >;
+                };
+
+                volume_keys_s0: volume_keys_s0 {
+                        pinctrl-single,pins = <
+                                0x150 0x27      /* spi0_sclk.gpio0_2, INPUT | MODE7 */
+                                0x154 0x27      /* spi0_d0.gpio0_3, INPUT | MODE7 */
+                        >;
+                };
+        };
+
         ocp {
                 uart1: serial@44e09000 {
                         status = "okay";
@@ -31,6 +59,49 @@
                                 reg = <0x2d>;
                         };
                 };
+
+                i2c2: i2c@4802a000 {
+                        status = "okay";
+                        clock-frequency = <100000>;
+
+                        lis331dlh: lis331dlh@18 {
+                                compatible = "st,lis331dlh", "st,lis3lv02d";
+                                reg = <0x18>;
+                                Vdd-supply = <&lis3_reg>;
+                                Vdd_IO-supply = <&lis3_reg>;
+
+                                st,click-single-x;
+                                st,click-single-y;
+                                st,click-single-z;
+                                st,click-thresh-x = <10>;
+                                st,click-thresh-y = <10>;
+                                st,click-thresh-z = <10>;
+                                st,irq1-click;
+                                st,irq2-click;
+                                st,wakeup-x-lo;
+                                st,wakeup-x-hi;
+                                st,wakeup-y-lo;
+                                st,wakeup-y-hi;
+                                st,wakeup-z-lo;
+                                st,wakeup-z-hi;
+                                st,min-limit-x = <120>;
+                                st,min-limit-y = <120>;
+                                st,min-limit-z = <140>;
+                                st,max-limit-x = <550>;
+                                st,max-limit-y = <550>;
+                                st,max-limit-z = <750>;
+                        };
+
+                        tsl2550: tsl2550@39 {
+                                compatible = "taos,tsl2550";
+                                reg = <0x39>;
+                        };
+
+                        tmp275: tmp275@48 {
+                                compatible = "ti,tmp275";
+                                reg = <0x48>;
+                        };
+                };
         };
 
         vbat: fixedregulator@0 {
@@ -40,6 +111,53 @@
                 regulator-max-microvolt = <5000000>;
                 regulator-boot-on;
         };
+
+        lis3_reg: fixedregulator@1 {
+                compatible = "regulator-fixed";
+                regulator-name = "lis3_reg";
+                regulator-boot-on;
+        };
+
+        matrix_keypad: matrix_keypad@0 {
+                compatible = "gpio-matrix-keypad";
+                debounce-delay-ms = <5>;
+                col-scan-delay-us = <2>;
+
+                row-gpios = <&gpio2 25 0        /* Bank1, pin25 */
+                             &gpio2 26 0        /* Bank1, pin26 */
+                             &gpio2 27 0>;      /* Bank1, pin27 */
+
+                col-gpios = <&gpio2 21 0        /* Bank1, pin21 */
+                             &gpio2 22 0>;      /* Bank1, pin22 */
+
+                linux,keymap = <0x0000008b      /* MENU */
+                                0x0100009e      /* BACK */
+                                0x02000069      /* LEFT */
+                                0x0001006a      /* RIGHT */
+                                0x0101001c      /* ENTER */
+                                0x0201006c>;    /* DOWN */
+        };
+
+        gpio_keys: volume_keys@0 {
+                compatible = "gpio-keys";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                autorepeat;
+
+                switch@9 {
+                        label = "volume-up";
+                        linux,code = <115>;
+                        gpios = <&gpio1 2 1>;
+                        gpio-key,wakeup;
+                };
+
+                switch@10 {
+                        label = "volume-down";
+                        linux,code = <114>;
+                        gpios = <&gpio1 3 1>;
+                        gpio-key,wakeup;
+                };
+        };
 };
 
 /include/ "tps65910.dtsi"
diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts
new file mode 100644
index 000000000000..f5a6162a4ff2
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-evmsk.dts
@@ -0,0 +1,250 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/*
+ * AM335x Starter Kit
+ * http://www.ti.com/tool/tmdssk3358
+ */
+
+/dts-v1/;
+
+/include/ "am33xx.dtsi"
+
+/ {
+        model = "TI AM335x EVM-SK";
+        compatible = "ti,am335x-evmsk", "ti,am33xx";
+
+        cpus {
+                cpu@0 {
+                        cpu0-supply = <&vdd1_reg>;
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x80000000 0x10000000>; /* 256 MB */
+        };
+
+        am33xx_pinmux: pinmux@44e10800 {
+                pinctrl-names = "default";
+                pinctrl-0 = <&user_leds_s0 &gpio_keys_s0>;
+
+                user_leds_s0: user_leds_s0 {
+                        pinctrl-single,pins = <
+                                0x10 0x7        /* gpmc_ad4.gpio1_4, OUTPUT | MODE7 */
+                                0x14 0x7        /* gpmc_ad5.gpio1_5, OUTPUT | MODE7 */
+                                0x18 0x7        /* gpmc_ad6.gpio1_6, OUTPUT | MODE7 */
+                                0x1c 0x7        /* gpmc_ad7.gpio1_7, OUTPUT | MODE7 */
+                        >;
+                };
+
+                gpio_keys_s0: gpio_keys_s0 {
+                        pinctrl-single,pins = <
+                                0x94 0x27       /* gpmc_oen_ren.gpio2_3, INPUT | MODE7 */
+                                0x90 0x27       /* gpmc_advn_ale.gpio2_2, INPUT | MODE7 */
+                                0x70 0x27       /* gpmc_wait0.gpio0_30, INPUT | MODE7 */
+                                0x9c 0x27       /* gpmc_ben0_cle.gpio2_5, INPUT | MODE7 */
+                        >;
+                };
+        };
+
+        ocp {
+                uart1: serial@44e09000 {
+                        status = "okay";
+                };
+
+                i2c1: i2c@44e0b000 {
+                        status = "okay";
+                        clock-frequency = <400000>;
+
+                        tps: tps@2d {
+                                reg = <0x2d>;
+                        };
+
+                        lis331dlh: lis331dlh@18 {
+                                compatible = "st,lis331dlh", "st,lis3lv02d";
+                                reg = <0x18>;
+                                Vdd-supply = <&lis3_reg>;
+                                Vdd_IO-supply = <&lis3_reg>;
+
+                                st,click-single-x;
+                                st,click-single-y;
+                                st,click-single-z;
+                                st,click-thresh-x = <10>;
+                                st,click-thresh-y = <10>;
+                                st,click-thresh-z = <10>;
+                                st,irq1-click;
+                                st,irq2-click;
+                                st,wakeup-x-lo;
+                                st,wakeup-x-hi;
+                                st,wakeup-y-lo;
+                                st,wakeup-y-hi;
+                                st,wakeup-z-lo;
+                                st,wakeup-z-hi;
+                                st,min-limit-x = <120>;
+                                st,min-limit-y = <120>;
+                                st,min-limit-z = <140>;
+                                st,max-limit-x = <550>;
+                                st,max-limit-y = <550>;
+                                st,max-limit-z = <750>;
+                        };
+                };
+        };
+
+        vbat: fixedregulator@0 {
+                compatible = "regulator-fixed";
+                regulator-name = "vbat";
+                regulator-min-microvolt = <5000000>;
+                regulator-max-microvolt = <5000000>;
+                regulator-boot-on;
+        };
+
+        lis3_reg: fixedregulator@1 {
+                compatible = "regulator-fixed";
+                regulator-name = "lis3_reg";
+                regulator-boot-on;
+        };
+
+        leds {
+                compatible = "gpio-leds";
+
+                led@1 {
+                        label = "evmsk:green:usr0";
+                        gpios = <&gpio2 4 0>;
+                        default-state = "off";
+                };
+
+                led@2 {
+                        label = "evmsk:green:usr1";
+                        gpios = <&gpio2 5 0>;
+                        default-state = "off";
+                };
+
+                led@3 {
+                        label = "evmsk:green:mmc0";
+                        gpios = <&gpio2 6 0>;
+                        linux,default-trigger = "mmc0";
+                        default-state = "off";
+                };
+
+                led@4 {
+                        label = "evmsk:green:heartbeat";
+                        gpios = <&gpio2 7 0>;
+                        linux,default-trigger = "heartbeat";
+                        default-state = "off";
+                };
+        };
+
+        gpio_buttons: gpio_buttons@0 {
+                compatible = "gpio-keys";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                switch@1 {
+                        label = "button0";
+                        linux,code = <0x100>;
+                        gpios = <&gpio3 3 0>;
+                };
+
+                switch@2 {
+                        label = "button1";
+                        linux,code = <0x101>;
+                        gpios = <&gpio3 2 0>;
+                };
+
+                switch@3 {
+                        label = "button2";
+                        linux,code = <0x102>;
+                        gpios = <&gpio1 30 0>;
+                        gpio-key,wakeup;
+                };
+
+                switch@4 {
+                        label = "button3";
+                        linux,code = <0x103>;
+                        gpios = <&gpio3 5 0>;
+                };
+        };
+};
+
+/include/ "tps65910.dtsi"
+
+&tps {
+        vcc1-supply = <&vbat>;
+        vcc2-supply = <&vbat>;
+        vcc3-supply = <&vbat>;
+        vcc4-supply = <&vbat>;
+        vcc5-supply = <&vbat>;
+        vcc6-supply = <&vbat>;
+        vcc7-supply = <&vbat>;
+        vccio-supply = <&vbat>;
+
+        regulators {
+                vrtc_reg: regulator@0 {
+                        regulator-always-on;
+                };
+
+                vio_reg: regulator@1 {
+                        regulator-always-on;
+                };
+
+                vdd1_reg: regulator@2 {
+                        /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
+                        regulator-name = "vdd_mpu";
+                        regulator-min-microvolt = <912500>;
+                        regulator-max-microvolt = <1312500>;
+                        regulator-boot-on;
+                        regulator-always-on;
+                };
+
+                vdd2_reg: regulator@3 {
+                        /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
+                        regulator-name = "vdd_core";
+                        regulator-min-microvolt = <912500>;
+                        regulator-max-microvolt = <1150000>;
+                        regulator-boot-on;
+                        regulator-always-on;
+                };
+
+                vdd3_reg: regulator@4 {
+                        regulator-always-on;
+                };
+
+                vdig1_reg: regulator@5 {
+                        regulator-always-on;
+                };
+
+                vdig2_reg: regulator@6 {
+                        regulator-always-on;
+                };
+
+                vpll_reg: regulator@7 {
+                        regulator-always-on;
+                };
+
+                vdac_reg: regulator@8 {
+                        regulator-always-on;
+                };
+
+                vaux1_reg: regulator@9 {
+                        regulator-always-on;
+                };
+
+                vaux2_reg: regulator@10 {
+                        regulator-always-on;
+                };
+
+                vaux33_reg: regulator@11 {
+                        regulator-always-on;
+                };
+
+                vmmc_reg: regulator@12 {
+                        regulator-always-on;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index bb31bff01998..20a3f29a6bfe 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -12,6 +12,7 @@
 
 / {
         compatible = "ti,am33xx";
+        interrupt-parent = <&intc>;
 
         aliases {
                 serial0 = &uart1;
@@ -25,6 +26,21 @@
         cpus {
                 cpu@0 {
                         compatible = "arm,cortex-a8";
+
+                        /*
+                         * To consider voltage drop between PMIC and SoC,
+                         * tolerance value is reduced to 2% from 4% and
+                         * voltage value is increased as a precaution.
+                         */
+                        operating-points = <
+                                /* kHz    uV */
+                                720000  1285000
+                                600000  1225000
+                                500000  1125000
+                                275000  1125000
+                        >;
+                        voltage-tolerance = <2>; /* 2 percentage */
+                        clock-latency = <300000>; /* From omap-cpufreq driver */
                 };
         };
 
@@ -40,6 +56,15 @@
                 };
         };
 
+        am33xx_pinmux: pinmux@44e10800 {
+                compatible = "pinctrl-single";
+                reg = <0x44e10800 0x0238>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                pinctrl-single,register-width = <32>;
+                pinctrl-single,function-mask = <0x7f>;
+        };
+
         /*
          * XXX: Use a flat representation of the AM33XX interconnect.
          * The real AM33XX interconnect network is quite complex.Since
@@ -70,7 +95,6 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         reg = <0x44e07000 0x1000>;
-                        interrupt-parent = <&intc>;
                         interrupts = <96>;
                 };
 
@@ -82,7 +106,6 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         reg = <0x4804c000 0x1000>;
-                        interrupt-parent = <&intc>;
                         interrupts = <98>;
                 };
 
@@ -94,7 +117,6 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         reg = <0x481ac000 0x1000>;
-                        interrupt-parent = <&intc>;
                         interrupts = <32>;
                 };
 
@@ -106,7 +128,6 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         reg = <0x481ae000 0x1000>;
-                        interrupt-parent = <&intc>;
                         interrupts = <62>;
                 };
 
@@ -115,7 +136,6 @@
                         ti,hwmods = "uart1";
                         clock-frequency = <48000000>;
                         reg = <0x44e09000 0x2000>;
-                        interrupt-parent = <&intc>;
                         interrupts = <72>;
                         status = "disabled";
                 };
@@ -125,7 +145,6 @@
                         ti,hwmods = "uart2";
                         clock-frequency = <48000000>;
                         reg = <0x48022000 0x2000>;
-                        interrupt-parent = <&intc>;
                         interrupts = <73>;
                         status = "disabled";
                 };
@@ -135,7 +154,6 @@
                         ti,hwmods = "uart3";
                         clock-frequency = <48000000>;
                         reg = <0x48024000 0x2000>;
-                        interrupt-parent = <&intc>;
                         interrupts = <74>;
                         status = "disabled";
                 };
@@ -145,7 +163,6 @@
                         ti,hwmods = "uart4";
                         clock-frequency = <48000000>;
                         reg = <0x481a6000 0x2000>;
-                        interrupt-parent = <&intc>;
                         interrupts = <44>;
                         status = "disabled";
                 };
@@ -155,7 +172,6 @@
                         ti,hwmods = "uart5";
                         clock-frequency = <48000000>;
                         reg = <0x481a8000 0x2000>;
-                        interrupt-parent = <&intc>;
                         interrupts = <45>;
                         status = "disabled";
                 };
@@ -165,7 +181,6 @@
                         ti,hwmods = "uart6";
                         clock-frequency = <48000000>;
                         reg = <0x481aa000 0x2000>;
-                        interrupt-parent = <&intc>;
                         interrupts = <46>;
                         status = "disabled";
                 };
@@ -176,7 +191,6 @@
                         #size-cells = <0>;
                         ti,hwmods = "i2c1";
                         reg = <0x44e0b000 0x1000>;
-                        interrupt-parent = <&intc>;
                         interrupts = <70>;
                         status = "disabled";
                 };
@@ -187,7 +201,6 @@
                         #size-cells = <0>;
                         ti,hwmods = "i2c2";
                         reg = <0x4802a000 0x1000>;
-                        interrupt-parent = <&intc>;
                         interrupts = <71>;
                         status = "disabled";
                 };
@@ -198,7 +211,6 @@
                         #size-cells = <0>;
                         ti,hwmods = "i2c3";
                         reg = <0x4819c000 0x1000>;
-                        interrupt-parent = <&intc>;
                         interrupts = <30>;
                         status = "disabled";
                 };
@@ -207,8 +219,124 @@
                         compatible = "ti,omap3-wdt";
                         ti,hwmods = "wd_timer2";
                         reg = <0x44e35000 0x1000>;
-                        interrupt-parent = <&intc>;
                         interrupts = <91>;
                 };
+
+                dcan0: d_can@481cc000 {
+                        compatible = "bosch,d_can";
+                        ti,hwmods = "d_can0";
+                        reg = <0x481cc000 0x2000>;
+                        interrupts = <52>;
+                        status = "disabled";
+                };
+
+                dcan1: d_can@481d0000 {
+                        compatible = "bosch,d_can";
+                        ti,hwmods = "d_can1";
+                        reg = <0x481d0000 0x2000>;
+                        interrupts = <55>;
+                        status = "disabled";
+                };
+
+                timer1: timer@44e31000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x44e31000 0x400>;
+                        interrupts = <67>;
+                        ti,hwmods = "timer1";
+                        ti,timer-alwon;
+                };
+
+                timer2: timer@48040000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48040000 0x400>;
+                        interrupts = <68>;
+                        ti,hwmods = "timer2";
+                };
+
+                timer3: timer@48042000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48042000 0x400>;
+                        interrupts = <69>;
+                        ti,hwmods = "timer3";
+                };
+
+                timer4: timer@48044000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48044000 0x400>;
+                        interrupts = <92>;
+                        ti,hwmods = "timer4";
+                        ti,timer-pwm;
+                };
+
+                timer5: timer@48046000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48046000 0x400>;
+                        interrupts = <93>;
+                        ti,hwmods = "timer5";
+                        ti,timer-pwm;
+                };
+
+                timer6: timer@48048000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48048000 0x400>;
+                        interrupts = <94>;
+                        ti,hwmods = "timer6";
+                        ti,timer-pwm;
+                };
+
+                timer7: timer@4804a000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4804a000 0x400>;
+                        interrupts = <95>;
+                        ti,hwmods = "timer7";
+                        ti,timer-pwm;
+                };
+
+                rtc@44e3e000 {
+                        compatible = "ti,da830-rtc";
+                        reg = <0x44e3e000 0x1000>;
+                        interrupts = <75
+                                      76>;
+                        ti,hwmods = "rtc";
+                };
+
+                spi0: spi@48030000 {
+                        compatible = "ti,omap4-mcspi";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        reg = <0x48030000 0x400>;
+                        interrupt = <65>;
+                        ti,spi-num-cs = <2>;
+                        ti,hwmods = "spi0";
+                        status = "disabled";
+                };
+
+                spi1: spi@481a0000 {
+                        compatible = "ti,omap4-mcspi";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        reg = <0x481a0000 0x400>;
+                        interrupt = <125>;
+                        ti,spi-num-cs = <2>;
+                        ti,hwmods = "spi1";
+                        status = "disabled";
+                };
+
+                usb@47400000 {
+                        compatible = "ti,musb-am33xx";
+                        reg = <0x47400000 0x1000        /* usbss */
+                               0x47401000 0x800         /* musb instance 0 */
+                               0x47401800 0x800>;       /* musb instance 1 */
+                        interrupts = <17                /* usbss */
+                                      18                /* musb instance 0 */
+                                      19>;              /* musb instance 1 */
+                        multipoint = <1>;
+                        num-eps = <16>;
+                        ram-bits = <12>;
+                        port0-mode = <3>;
+                        port1-mode = <3>;
+                        power = <250>;
+                        ti,hwmods = "usb_otg_hs";
+                };
         };
 };
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index d410581a5a85..bfb5bb6528b5 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -246,6 +246,12 @@
                                         trigger-external;
                                 };
                         };
+
+                        watchdog@fffffd40 {
+                                compatible = "atmel,at91sam9260-wdt";
+                                reg = <0xfffffd40 0x10>;
+                                status = "disabled";
+                        };
                 };
 
                 nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index 3e6e5c1abbf3..ff5461278c03 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -195,6 +195,12 @@
                                 #size-cells = <0>;
                                 status = "disabled";
                         };
+
+                        watchdog@fffffd40 {
+                                compatible = "atmel,at91sam9260-wdt";
+                                reg = <0xfffffd40 0x10>;
+                                status = "disabled";
+                        };
                 };
 
                 nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 3add030d61f8..a98c00a234eb 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -262,6 +262,12 @@
                                         trigger-value = <0x6>;
                                 };
                         };
+
+                        watchdog@fffffd40 {
+                                compatible = "atmel,at91sam9260-wdt";
+                                reg = <0xfffffd40 0x10>;
+                                status = "disabled";
+                        };
                 };
 
                 nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/ccu9540.dts b/arch/arm/boot/dts/ccu9540.dts
new file mode 100644
index 000000000000..04305463f00d
--- /dev/null
+++ b/arch/arm/boot/dts/ccu9540.dts
@@ -0,0 +1,72 @@
+/*
+ * Copyright 2012 ST-Ericsson AB
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "dbx5x0.dtsi"
+
+/ {
+        model = "ST-Ericsson CCU9540 platform with Device Tree";
+        compatible = "st-ericsson,ccu9540", "st-ericsson,u9540";
+
+        memory {
+                reg = <0x00000000 0x20000000>;
+        };
+
+        soc-u9500 {
+                uart@80120000 {
+                        status = "okay";
+                };
+
+                uart@80121000 {
+                        status = "okay";
+                };
+
+                uart@80007000 {
+                        status = "okay";
+                };
+
+                // External Micro SD slot
+                sdi0_per1@80126000 {
+                        arm,primecell-periphid = <0x10480180>;
+                        max-frequency = <100000000>;
+                        bus-width = <4>;
+                        mmc-cap-sd-highspeed;
+                        mmc-cap-mmc-highspeed;
+                        vmmc-supply = <&ab8500_ldo_aux3_reg>;
+
+                        cd-gpios  = <&gpio7 6 0x4>; // 230
+                        cd-inverted;
+
+                        status = "okay";
+                };
+
+
+                // WLAN SDIO channel
+                sdi1_per2@80118000 {
+                        arm,primecell-periphid = <0x10480180>;
+                        max-frequency = <50000000>;
+                        bus-width = <4>;
+
+                        status = "okay";
+                };
+
+                // On-board eMMC
+                sdi4_per2@80114000 {
+                        arm,primecell-periphid = <0x10480180>;
+                        max-frequency = <100000000>;
+                        bus-width = <8>;
+                        mmc-cap-mmc-highspeed;
+                        vmmc-supply = <&ab8500_ldo_aux2_reg>;
+
+                        status = "okay";
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/cros5250-common.dtsi b/arch/arm/boot/dts/cros5250-common.dtsi
new file mode 100644
index 000000000000..fddd17417433
--- /dev/null
+++ b/arch/arm/boot/dts/cros5250-common.dtsi
@@ -0,0 +1,184 @@
+/*
+ * Common device tree include for all Exynos 5250 boards based off of Daisy.
+ *
+ * Copyright (c) 2012 Google, Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/ {
+        aliases {
+        };
+
+        memory {
+                reg = <0x40000000 0x80000000>;
+        };
+
+        chosen {
+        };
+
+        i2c@12C60000 {
+                samsung,i2c-sda-delay = <100>;
+                samsung,i2c-max-bus-freq = <378000>;
+                gpios = <&gpb3 0 2 3 0>,
+                        <&gpb3 1 2 3 0>;
+        };
+
+        i2c@12C70000 {
+                samsung,i2c-sda-delay = <100>;
+                samsung,i2c-max-bus-freq = <378000>;
+                gpios = <&gpb3 2 2 3 0>,
+                        <&gpb3 3 2 3 0>;
+        };
+
+        i2c@12C80000 {
+                samsung,i2c-sda-delay = <100>;
+                samsung,i2c-max-bus-freq = <66000>;
+
+                /*
+                 * Disabled pullups since external part has its own pullups and
+                 * double-pulling gets us out of spec in some cases.
+                 */
+                gpios = <&gpa0 6 3 0 0>,
+                        <&gpa0 7 3 0 0>;
+
+                hdmiddc@50 {
+                        compatible = "samsung,exynos5-hdmiddc";
+                        reg = <0x50>;
+                };
+        };
+
+        i2c@12C90000 {
+                samsung,i2c-sda-delay = <100>;
+                samsung,i2c-max-bus-freq = <66000>;
+                gpios = <&gpa1 2 3 3 0>,
+                        <&gpa1 3 3 3 0>;
+        };
+
+        i2c@12CA0000 {
+                status = "disabled";
+        };
+
+        i2c@12CB0000 {
+                samsung,i2c-sda-delay = <100>;
+                samsung,i2c-max-bus-freq = <66000>;
+                gpios = <&gpa2 2 3 3 0>,
+                        <&gpa2 3 3 3 0>;
+        };
+
+        i2c@12CC0000 {
+                status = "disabled";
+        };
+
+        i2c@12CD0000 {
+                samsung,i2c-sda-delay = <100>;
+                samsung,i2c-max-bus-freq = <66000>;
+                gpios = <&gpb2 2 3 3 0>,
+                        <&gpb2 3 3 3 0>;
+        };
+
+        i2c@12CE0000 {
+                samsung,i2c-sda-delay = <100>;
+                samsung,i2c-max-bus-freq = <378000>;
+
+                hdmiphy@38 {
+                        compatible = "samsung,exynos5-hdmiphy";
+                        reg = <0x38>;
+                };
+        };
+
+        dwmmc0@12200000 {
+                num-slots = <1>;
+                supports-highspeed;
+                broken-cd;
+                fifo-depth = <0x80>;
+                card-detect-delay = <200>;
+                samsung,dw-mshc-ciu-div = <3>;
+                samsung,dw-mshc-sdr-timing = <2 3 3>;
+                samsung,dw-mshc-ddr-timing = <1 2 3>;
+
+                slot@0 {
+                        reg = <0>;
+                        bus-width = <8>;
+                        gpios = <&gpc0 0 2 0 3>, <&gpc0 1 2 0 3>,
+                                <&gpc1 0 2 3 3>, <&gpc1 1 2 3 3>,
+                                <&gpc1 2 2 3 3>, <&gpc1 3 2 3 3>,
+                                <&gpc0 3 2 3 3>, <&gpc0 4 2 3 3>,
+                                <&gpc0 5 2 3 3>, <&gpc0 6 2 3 3>;
+                };
+        };
+
+        dwmmc1@12210000 {
+                status = "disabled";
+        };
+
+        dwmmc2@12220000 {
+                num-slots = <1>;
+                supports-highspeed;
+                fifo-depth = <0x80>;
+                card-detect-delay = <200>;
+                samsung,dw-mshc-ciu-div = <3>;
+                samsung,dw-mshc-sdr-timing = <2 3 3>;
+                samsung,dw-mshc-ddr-timing = <1 2 3>;
+
+                slot@0 {
+                        reg = <0>;
+                        bus-width = <4>;
+                        samsung,cd-pinmux-gpio = <&gpc3 2 2 3 3>;
+                        wp-gpios = <&gpc2 1 0 0 3>;
+                        gpios = <&gpc3 0 2 0 3>, <&gpc3 1 2 0 3>,
+                                <&gpc3 3 2 3 3>, <&gpc3 4 2 3 3>,
+                                <&gpc3 5 2 3 3>, <&gpc3 6 2 3 3>;
+                };
+        };
+
+        dwmmc3@12230000 {
+                num-slots = <1>;
+                supports-highspeed;
+                broken-cd;
+                fifo-depth = <0x80>;
+                card-detect-delay = <200>;
+                samsung,dw-mshc-ciu-div = <3>;
+                samsung,dw-mshc-sdr-timing = <2 3 3>;
+                samsung,dw-mshc-ddr-timing = <1 2 3>;
+
+                slot@0 {
+                        reg = <0>;
+                        bus-width = <4>;
+                        /* See board-specific dts files for GPIOs */
+                };
+        };
+
+        spi_0: spi@12d20000 {
+                status = "disabled";
+        };
+
+        spi_1: spi@12d30000 {
+                gpios = <&gpa2 4 2 3 0>,
+                        <&gpa2 6 2 3 0>,
+                        <&gpa2 7 2 3 0>;
+                samsung,spi-src-clk = <0>;
+                num-cs = <1>;
+        };
+
+        spi_2: spi@12d40000 {
+                status = "disabled";
+        };
+
+        hdmi {
+                hpd-gpio = <&gpx3 7 0xf 1 3>;
+        };
+
+        gpio-keys {
+                compatible = "gpio-keys";
+
+                power {
+                        label = "Power";
+                        gpios = <&gpx1 3 0 0x10000 0>;
+                        linux,code = <116>; /* KEY_POWER */
+                        gpio-key,wakeup;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/da850-enbw-cmc.dts b/arch/arm/boot/dts/da850-enbw-cmc.dts
new file mode 100644
index 000000000000..422fdb3fcfc1
--- /dev/null
+++ b/arch/arm/boot/dts/da850-enbw-cmc.dts
@@ -0,0 +1,30 @@
+/*
+ * Device Tree for AM1808 EnBW CMC board
+ *
+ * Copyright 2012 DENX Software Engineering GmbH
+ * Heiko Schocher <hs@denx.de>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+/dts-v1/;
+/include/ "da850.dtsi"
+
+/ {
+        compatible = "enbw,cmc", "ti,da850";
+        model = "EnBW CMC";
+
+        soc {
+                serial0: serial@1c42000 {
+                        status = "okay";
+                };
+                serial1: serial@1d0c000 {
+                        status = "okay";
+                };
+                serial2: serial@1d0d000 {
+                        status = "okay";
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/da850-evm.dts b/arch/arm/boot/dts/da850-evm.dts
new file mode 100644
index 000000000000..37dc5a3243b8
--- /dev/null
+++ b/arch/arm/boot/dts/da850-evm.dts
@@ -0,0 +1,28 @@
+/*
+ * Device Tree for DA850 EVM board
+ *
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation, version 2.
+ */
+/dts-v1/;
+/include/ "da850.dtsi"
+
+/ {
+        compatible = "ti,da850-evm", "ti,da850";
+        model = "DA850/AM1808/OMAP-L138 EVM";
+
+        soc {
+                serial0: serial@1c42000 {
+                        status = "okay";
+                };
+                serial1: serial@1d0c000 {
+                        status = "okay";
+                };
+                serial2: serial@1d0d000 {
+                        status = "okay";
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
new file mode 100644
index 000000000000..640ab75c20db
--- /dev/null
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -0,0 +1,60 @@
+/*
+ * Copyright 2012 DENX Software Engineering GmbH
+ * Heiko Schocher <hs@denx.de>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+/include/ "skeleton.dtsi"
+
+/ {
+        arm {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+                intc: interrupt-controller {
+                        compatible = "ti,cp-intc";
+                        interrupt-controller;
+                        #interrupt-cells = <1>;
+                        ti,intc-size = <100>;
+                        reg = <0xfffee000 0x2000>;
+                };
+        };
+        soc {
+                compatible = "simple-bus";
+                model = "da850";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges = <0x0 0x01c00000 0x400000>;
+
+                serial0: serial@1c42000 {
+                        compatible = "ns16550a";
+                        reg = <0x42000 0x100>;
+                        clock-frequency = <150000000>;
+                        reg-shift = <2>;
+                        interrupts = <25>;
+                        interrupt-parent = <&intc>;
+                        status = "disabled";
+                };
+                serial1: serial@1d0c000 {
+                        compatible = "ns16550a";
+                        reg = <0x10c000 0x100>;
+                        clock-frequency = <150000000>;
+                        reg-shift = <2>;
+                        interrupts = <53>;
+                        interrupt-parent = <&intc>;
+                        status = "disabled";
+                };
+                serial2: serial@1d0d000 {
+                        compatible = "ns16550a";
+                        reg = <0x10d000 0x100>;
+                        clock-frequency = <150000000>;
+                        reg-shift = <2>;
+                        interrupts = <61>;
+                        interrupt-parent = <&intc>;
+                        status = "disabled";
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/dbx5x0.dtsi b/arch/arm/boot/dts/dbx5x0.dtsi
index 4b0e0ca08f40..9f553630242a 100644
--- a/arch/arm/boot/dts/dbx5x0.dtsi
+++ b/arch/arm/boot/dts/dbx5x0.dtsi
@@ -209,123 +209,103 @@
                                 // DB8500_REGULATOR_VAPE
                                 db8500_vape_reg: db8500_vape {
                                         regulator-compatible = "db8500_vape";
-                                        regulator-name = "db8500-vape";
                                         regulator-always-on;
                                 };
 
                                 // DB8500_REGULATOR_VARM
                                 db8500_varm_reg: db8500_varm {
                                         regulator-compatible = "db8500_varm";
-                                        regulator-name = "db8500-varm";
                                 };
 
                                 // DB8500_REGULATOR_VMODEM
                                 db8500_vmodem_reg: db8500_vmodem {
                                         regulator-compatible = "db8500_vmodem";
-                                        regulator-name = "db8500-vmodem";
                                 };
 
                                 // DB8500_REGULATOR_VPLL
                                 db8500_vpll_reg: db8500_vpll {
                                         regulator-compatible = "db8500_vpll";
-                                        regulator-name = "db8500-vpll";
                                 };
 
                                 // DB8500_REGULATOR_VSMPS1
                                 db8500_vsmps1_reg: db8500_vsmps1 {
                                         regulator-compatible = "db8500_vsmps1";
-                                        regulator-name = "db8500-vsmps1";
                                 };
 
                                 // DB8500_REGULATOR_VSMPS2
                                 db8500_vsmps2_reg: db8500_vsmps2 {
                                         regulator-compatible = "db8500_vsmps2";
-                                        regulator-name = "db8500-vsmps2";
                                 };
 
                                 // DB8500_REGULATOR_VSMPS3
                                 db8500_vsmps3_reg: db8500_vsmps3 {
                                         regulator-compatible = "db8500_vsmps3";
-                                        regulator-name = "db8500-vsmps3";
                                 };
 
                                 // DB8500_REGULATOR_VRF1
                                 db8500_vrf1_reg: db8500_vrf1 {
                                         regulator-compatible = "db8500_vrf1";
-                                        regulator-name = "db8500-vrf1";
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_SVAMMDSP
                                 db8500_sva_mmdsp_reg: db8500_sva_mmdsp {
                                         regulator-compatible = "db8500_sva_mmdsp";
-                                        regulator-name = "db8500-sva-mmdsp";
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_SVAMMDSPRET
                                 db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret {
                                         regulator-compatible = "db8500_sva_mmdsp_ret";
-                                        regulator-name = "db8500-sva-mmdsp-ret";
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_SVAPIPE
                                 db8500_sva_pipe_reg: db8500_sva_pipe {
                                         regulator-compatible = "db8500_sva_pipe";
-                                        regulator-name = "db8500_sva_pipe";
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_SIAMMDSP
                                 db8500_sia_mmdsp_reg: db8500_sia_mmdsp {
                                         regulator-compatible = "db8500_sia_mmdsp";
-                                        regulator-name = "db8500_sia_mmdsp";
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_SIAMMDSPRET
                                 db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret {
-                                        regulator-name = "db8500-sia-mmdsp-ret";
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_SIAPIPE
                                 db8500_sia_pipe_reg: db8500_sia_pipe {
                                         regulator-compatible = "db8500_sia_pipe";
-                                        regulator-name = "db8500-sia-pipe";
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_SGA
                                 db8500_sga_reg: db8500_sga {
                                         regulator-compatible = "db8500_sga";
-                                        regulator-name = "db8500-sga";
                                         vin-supply = <&db8500_vape_reg>;
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_B2R2_MCDE
                                 db8500_b2r2_mcde_reg: db8500_b2r2_mcde {
                                         regulator-compatible = "db8500_b2r2_mcde";
-                                        regulator-name = "db8500-b2r2-mcde";
                                         vin-supply = <&db8500_vape_reg>;
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_ESRAM12
                                 db8500_esram12_reg: db8500_esram12 {
                                         regulator-compatible = "db8500_esram12";
-                                        regulator-name = "db8500-esram12";
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_ESRAM12RET
                                 db8500_esram12_ret_reg: db8500_esram12_ret {
                                         regulator-compatible = "db8500_esram12_ret";
-                                        regulator-name = "db8500-esram12-ret";
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_ESRAM34
                                 db8500_esram34_reg: db8500_esram34 {
                                         regulator-compatible = "db8500_esram34";
-                                        regulator-name = "db8500-esram34";
                                 };
 
                                 // DB8500_REGULATOR_SWITCH_ESRAM34RET
                                 db8500_esram34_ret_reg: db8500_esram34_ret {
                                         regulator-compatible = "db8500_esram34_ret";
-                                        regulator-name = "db8500-esram34-ret";
                                 };
                         };
 
@@ -404,7 +384,6 @@
                                         // supplies to the display/camera
                                         ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
                                                 regulator-compatible = "ab8500_ldo_aux1";
-                                                regulator-name = "V-DISPLAY";
                                                 regulator-min-microvolt = <2500000>;
                                                 regulator-max-microvolt = <2900000>;
                                                 regulator-boot-on;
@@ -415,7 +394,6 @@
                                         // supplies to the on-board eMMC
                                         ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
                                                 regulator-compatible = "ab8500_ldo_aux2";
-                                                regulator-name = "V-eMMC1";
                                                 regulator-min-microvolt = <1100000>;
                                                 regulator-max-microvolt = <3300000>;
                                         };
@@ -423,7 +401,6 @@
                                         // supply for VAUX3; SDcard slots
                                         ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
                                                 regulator-compatible = "ab8500_ldo_aux3";
-                                                regulator-name = "V-MMC-SD";
                                                 regulator-min-microvolt = <1100000>;
                                                 regulator-max-microvolt = <3300000>;
                                         };
@@ -431,49 +408,41 @@
                                         // supply for v-intcore12; VINTCORE12 LDO
                                         ab8500_ldo_initcore_reg: ab8500_ldo_initcore {
                                                 regulator-compatible = "ab8500_ldo_initcore";
-                                                regulator-name = "V-INTCORE";
                                         };
 
                                         // supply for tvout; gpadc; TVOUT LDO
                                         ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
                                                 regulator-compatible = "ab8500_ldo_tvout";
-                                                regulator-name = "V-TVOUT";
                                         };
 
                                         // supply for ab8500-usb; USB LDO
                                         ab8500_ldo_usb_reg: ab8500_ldo_usb {
                                                 regulator-compatible = "ab8500_ldo_usb";
-                                                regulator-name = "dummy";
                                         };
 
                                         // supply for ab8500-vaudio; VAUDIO LDO
                                         ab8500_ldo_audio_reg: ab8500_ldo_audio {
                                                 regulator-compatible = "ab8500_ldo_audio";
-                                                regulator-name = "V-AUD";
                                         };
 
                                         // supply for v-anamic1 VAMic1-LDO
                                         ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
                                                 regulator-compatible = "ab8500_ldo_anamic1";
-                                                regulator-name = "V-AMIC1";
                                         };
 
                                         // supply for v-amic2; VAMIC2 LDO; reuse constants for AMIC1
                                         ab8500_ldo_amamic2_reg: ab8500_ldo_amamic2 {
                                                 regulator-compatible = "ab8500_ldo_amamic2";
-                                                regulator-name = "V-AMIC2";
                                         };
 
                                         // supply for v-dmic; VDMIC LDO
                                         ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
                                                 regulator-compatible = "ab8500_ldo_dmic";
-                                                regulator-name = "V-DMIC";
                                         };
 
                                         // supply for U8500 CSI/DSI; VANA LDO
                                         ab8500_ldo_ana_reg: ab8500_ldo_ana {
                                                 regulator-compatible = "ab8500_ldo_ana";
-                                                regulator-name = "V-CSI/DSI";
                                         };
                                 };
                         };
@@ -577,42 +546,42 @@
                         status = "disabled";
                 };
 
-                sdi@80126000 {
+                sdi0_per1@80126000 {
                         compatible = "arm,pl18x", "arm,primecell";
                         reg = <0x80126000 0x1000>;
                         interrupts = <0 60 0x4>;
                         status = "disabled";
                 };
 
-                sdi@80118000 {
+                sdi1_per2@80118000 {
                         compatible = "arm,pl18x", "arm,primecell";
                         reg = <0x80118000 0x1000>;
                         interrupts = <0 50 0x4>;
                         status = "disabled";
                 };
 
-                sdi@80005000 {
+                sdi2_per3@80005000 {
                         compatible = "arm,pl18x", "arm,primecell";
                         reg = <0x80005000 0x1000>;
                         interrupts = <0 41 0x4>;
                         status = "disabled";
                 };
 
-                sdi@80119000 {
+                sdi3_per2@80119000 {
                         compatible = "arm,pl18x", "arm,primecell";
                         reg = <0x80119000 0x1000>;
                         interrupts = <0 59 0x4>;
                         status = "disabled";
                 };
 
-                sdi@80114000 {
+                sdi4_per2@80114000 {
                         compatible = "arm,pl18x", "arm,primecell";
                         reg = <0x80114000 0x1000>;
                         interrupts = <0 99 0x4>;
                         status = "disabled";
                 };
 
-                sdi@80008000 {
+                sdi5_per3@80008000 {
                         compatible = "arm,pl18x", "arm,primecell";
                         reg = <0x80008000 0x1000>;
                         interrupts = <0 100 0x4>;
@@ -660,5 +629,19 @@
                         ranges = <0 0x50000000 0x4000000>;
                         status = "disabled";
                 };
+
+                vmmci: regulator-gpio {
+                        compatible = "regulator-gpio";
+
+                        regulator-min-microvolt = <1800000>;
+                        regulator-max-microvolt = <2600000>;
+                        regulator-name = "mmci-reg";
+                        regulator-type = "voltage";
+
+                        states = <1800000 0x1
+                                  2900000 0x0>;
+
+                        status = "disabled";
+                };
         };
 };
diff --git a/arch/arm/boot/dts/dove-cubox.dts b/arch/arm/boot/dts/dove-cubox.dts
index 0adbd5a38095..fed7d3f9f431 100644
--- a/arch/arm/boot/dts/dove-cubox.dts
+++ b/arch/arm/boot/dts/dove-cubox.dts
@@ -40,3 +40,13 @@
                 reg = <0>;
         };
 };
+
+&pinctrl {
+        pinctrl-0 = <&pmx_gpio_18>;
+        pinctrl-names = "default";
+
+        pmx_gpio_18: pmx-gpio-18 {
+                marvell,pins = "mpp18";
+                marvell,function = "gpio";
+        };
+};
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi
index 5a00022383e7..61f391412a5a 100644
--- a/arch/arm/boot/dts/dove.dtsi
+++ b/arch/arm/boot/dts/dove.dtsi
@@ -4,6 +4,12 @@
         compatible = "marvell,dove";
         model = "Marvell Armada 88AP510 SoC";
 
+        aliases {
+                gpio0 = &gpio0;
+                gpio1 = &gpio1;
+                gpio2 = &gpio2;
+        };
+
         soc@f1000000 {
                 compatible = "simple-bus";
                 #address-cells = <1>;
@@ -72,7 +78,8 @@
                         #gpio-cells = <2>;
                         gpio-controller;
                         reg = <0xd0400 0x20>;
-                        ngpio = <32>;
+                        ngpios = <32>;
+                        interrupt-controller;
                         interrupts = <12>, <13>, <14>, <60>;
                 };
 
@@ -81,7 +88,8 @@
                         #gpio-cells = <2>;
                         gpio-controller;
                         reg = <0xd0420 0x20>;
-                        ngpio = <32>;
+                        ngpios = <32>;
+                        interrupt-controller;
                         interrupts = <61>;
                 };
 
@@ -90,7 +98,12 @@
                         #gpio-cells = <2>;
                         gpio-controller;
                         reg = <0xe8400 0x0c>;
-                        ngpio = <8>;
+                        ngpios = <8>;
+                };
+
+                pinctrl: pinctrl@d0200 {
+                        compatible = "marvell,dove-pinctrl";
+                        reg = <0xd0200 0x10>;
                 };
 
                 spi0: spi@10600 {
diff --git a/arch/arm/boot/dts/evk-pro3.dts b/arch/arm/boot/dts/evk-pro3.dts
index b7354e6506de..96e50f569433 100644
--- a/arch/arm/boot/dts/evk-pro3.dts
+++ b/arch/arm/boot/dts/evk-pro3.dts
@@ -22,10 +22,22 @@
                                 status = "okay";
                         };
 
+                        usart0: serial@fffb0000 {
+                                status = "okay";
+                        };
+
+                        usart2: serial@fffb8000 {
+                                status = "okay";
+                        };
+
                         usb1: gadget@fffa4000 {
                                 atmel,vbus-gpio = <&pioC 5 0>;
                                 status = "okay";
                         };
+
+                        watchdog@fffffd40 {
+                                status = "okay";
+                        };
                 };
 
                 usb0: ohci@00500000 {
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index a26c3dd58269..3428f1a94dcc 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -28,6 +28,44 @@
                 spi0 = &spi_0;
                 spi1 = &spi_1;
                 spi2 = &spi_2;
+                i2c0 = &i2c_0;
+                i2c1 = &i2c_1;
+                i2c2 = &i2c_2;
+                i2c3 = &i2c_3;
+                i2c4 = &i2c_4;
+                i2c5 = &i2c_5;
+                i2c6 = &i2c_6;
+                i2c7 = &i2c_7;
+        };
+
+        pd_mfc: mfc-power-domain@10023C40 {
+                compatible = "samsung,exynos4210-pd";
+                reg = <0x10023C40 0x20>;
+        };
+
+        pd_g3d: g3d-power-domain@10023C60 {
+                compatible = "samsung,exynos4210-pd";
+                reg = <0x10023C60 0x20>;
+        };
+
+        pd_lcd0: lcd0-power-domain@10023C80 {
+                compatible = "samsung,exynos4210-pd";
+                reg = <0x10023C80 0x20>;
+        };
+
+        pd_tv: tv-power-domain@10023C20 {
+                compatible = "samsung,exynos4210-pd";
+                reg = <0x10023C20 0x20>;
+        };
+
+        pd_cam: cam-power-domain@10023C00 {
+                compatible = "samsung,exynos4210-pd";
+                reg = <0x10023C00 0x20>;
+        };
+
+        pd_gps: gps-power-domain@10023CE0 {
+                compatible = "samsung,exynos4210-pd";
+                reg = <0x10023CE0 0x20>;
         };
 
         gic:interrupt-controller@10490000 {
@@ -121,7 +159,7 @@
                 status = "disabled";
         };
 
-        i2c@13860000 {
+        i2c_0: i2c@13860000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
                 compatible = "samsung,s3c2440-i2c";
@@ -130,7 +168,7 @@
                 status = "disabled";
         };
 
-        i2c@13870000 {
+        i2c_1: i2c@13870000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
                 compatible = "samsung,s3c2440-i2c";
@@ -139,7 +177,7 @@
                 status = "disabled";
         };
 
-        i2c@13880000 {
+        i2c_2: i2c@13880000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
                 compatible = "samsung,s3c2440-i2c";
@@ -148,7 +186,7 @@
                 status = "disabled";
         };
 
-        i2c@13890000 {
+        i2c_3: i2c@13890000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
                 compatible = "samsung,s3c2440-i2c";
@@ -157,7 +195,7 @@
                 status = "disabled";
         };
 
-        i2c@138A0000 {
+        i2c_4: i2c@138A0000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
                 compatible = "samsung,s3c2440-i2c";
@@ -166,7 +204,7 @@
                 status = "disabled";
         };
 
-        i2c@138B0000 {
+        i2c_5: i2c@138B0000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
                 compatible = "samsung,s3c2440-i2c";
@@ -175,7 +213,7 @@
                 status = "disabled";
         };
 
-        i2c@138C0000 {
+        i2c_6: i2c@138C0000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
                 compatible = "samsung,s3c2440-i2c";
@@ -184,7 +222,7 @@
                 status = "disabled";
         };
 
-        i2c@138D0000 {
+        i2c_7: i2c@138D0000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
                 compatible = "samsung,s3c2440-i2c";
diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts
index 3e68f52e8454..f2710018e84e 100644
--- a/arch/arm/boot/dts/exynos4210-origen.dts
+++ b/arch/arm/boot/dts/exynos4210-origen.dts
@@ -22,38 +22,54 @@
         compatible = "insignal,origen", "samsung,exynos4210";
 
         memory {
-                reg = <0x40000000 0x40000000>;
+                reg = <0x40000000 0x10000000
+                       0x50000000 0x10000000
+                       0x60000000 0x10000000
+                       0x70000000 0x10000000>;
         };
 
         chosen {
                 bootargs ="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC2,115200 init=/linuxrc";
         };
 
+        mmc_reg: voltage-regulator {
+                compatible = "regulator-fixed";
+                regulator-name = "VMEM_VDD_2.8V";
+                regulator-min-microvolt = <2800000>;
+                regulator-max-microvolt = <2800000>;
+                gpio = <&gpx1 1 0>;
+                enable-active-high;
+        };
+
         sdhci@12530000 {
-                samsung,sdhci-bus-width = <4>;
-                linux,mmc_cap_4_bit_data;
-                samsung,sdhci-cd-internal;
-                gpio-cd = <&gpk2 2 2 3 3>;
-                gpios = <&gpk2 0 2 0 3>,
-                        <&gpk2 1 2 0 3>,
-                        <&gpk2 3 2 3 3>,
-                        <&gpk2 4 2 3 3>,
-                        <&gpk2 5 2 3 3>,
-                        <&gpk2 6 2 3 3>;
+                bus-width = <4>;
+                pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4 &sd2_cd>;
+                pinctrl-names = "default";
+                vmmc-supply = <&mmc_reg>;
                 status = "okay";
         };
 
         sdhci@12510000 {
-                samsung,sdhci-bus-width = <4>;
-                linux,mmc_cap_4_bit_data;
-                samsung,sdhci-cd-internal;
-                gpio-cd = <&gpk0 2 2 3 3>;
-                gpios = <&gpk0 0 2 0 3>,
-                        <&gpk0 1 2 0 3>,
-                        <&gpk0 3 2 3 3>,
-                        <&gpk0 4 2 3 3>,
-                        <&gpk0 5 2 3 3>,
-                        <&gpk0 6 2 3 3>;
+                bus-width = <4>;
+                pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_cd>;
+                pinctrl-names = "default";
+                vmmc-supply = <&mmc_reg>;
+                status = "okay";
+        };
+
+        serial@13800000 {
+                status = "okay";
+        };
+
+        serial@13810000 {
+                status = "okay";
+        };
+
+        serial@13820000 {
+                status = "okay";
+        };
+
+        serial@13830000 {
                 status = "okay";
         };
 
@@ -64,35 +80,35 @@
 
                 up {
                         label = "Up";
-                        gpios = <&gpx2 0 0 0x10000 2>;
+                        gpios = <&gpx2 0 1>;
                         linux,code = <103>;
                         gpio-key,wakeup;
                 };
 
                 down {
                         label = "Down";
-                        gpios = <&gpx2 1 0 0x10000 2>;
+                        gpios = <&gpx2 1 1>;
                         linux,code = <108>;
                         gpio-key,wakeup;
                 };
 
                 back {
                         label = "Back";
-                        gpios = <&gpx1 7 0 0x10000 2>;
+                        gpios = <&gpx1 7 1>;
                         linux,code = <158>;
                         gpio-key,wakeup;
                 };
 
                 home {
                         label = "Home";
-                        gpios = <&gpx1 6 0 0x10000 2>;
+                        gpios = <&gpx1 6 1>;
                         linux,code = <102>;
                         gpio-key,wakeup;
                 };
 
                 menu {
                         label = "Menu";
-                        gpios = <&gpx1 5 0 0x10000 2>;
+                        gpios = <&gpx1 5 1>;
                         linux,code = <139>;
                         gpio-key,wakeup;
                 };
@@ -101,7 +117,7 @@
         leds {
                 compatible = "gpio-leds";
                 status {
-                        gpios = <&gpx1 3 0 0x10000 2>;
+                        gpios = <&gpx1 3 1>;
                         linux,default-trigger = "heartbeat";
                 };
         };
diff --git a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
index b12cf272ad0d..55a2efb763d1 100644
--- a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
@@ -16,6 +16,134 @@
 
 / {
         pinctrl@11400000 {
+                gpa0: gpa0 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpa1: gpa1 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpb: gpb {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpc0: gpc0 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpc1: gpc1 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpd0: gpd0 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpd1: gpd1 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpe0: gpe0 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpe1: gpe1 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpe2: gpe2 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpe3: gpe3 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpe4: gpe4 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpf0: gpf0 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpf1: gpf1 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpf2: gpf2 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpf3: gpf3 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
                 uart0_data: uart0-data {
                         samsung,pins = "gpa0-0", "gpa0-1";
                         samsung,pin-function = <0x2>;
@@ -205,200 +333,345 @@
         };
 
         pinctrl@11000000 {
+                gpj0: gpj0 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpj1: gpj1 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpk0: gpk0 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpk1: gpk1 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpk2: gpk2 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpk3: gpk3 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpl0: gpl0 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpl1: gpl1 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpl2: gpl2 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpy0: gpy0 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+
+                gpy1: gpy1 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+
+                gpy2: gpy2 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+
+                gpy3: gpy3 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+
+                gpy4: gpy4 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+
+                gpy5: gpy5 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+
+                gpy6: gpy6 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+
+                gpx0: gpx0 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        interrupt-parent = <&gic>;
+                        interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
+                                     <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>;
+                        #interrupt-cells = <2>;
+                };
+
+                gpx1: gpx1 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        interrupt-parent = <&gic>;
+                        interrupts = <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
+                                     <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
+                        #interrupt-cells = <2>;
+                };
+
+                gpx2: gpx2 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpx3: gpx3 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
                 sd0_clk: sd0-clk {
                         samsung,pins = "gpk0-0";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <0>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd0_cmd: sd0-cmd {
                         samsung,pins = "gpk0-1";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <0>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd0_cd: sd0-cd {
                         samsung,pins = "gpk0-2";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <3>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd0_bus1: sd0-bus-width1 {
                         samsung,pins = "gpk0-3";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <3>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd0_bus4: sd0-bus-width4 {
                         samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <3>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd0_bus8: sd0-bus-width8 {
                         samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
                         samsung,pin-function = <3>;
                         samsung,pin-pud = <3>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd4_clk: sd4-clk {
                         samsung,pins = "gpk0-0";
                         samsung,pin-function = <3>;
                         samsung,pin-pud = <0>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd4_cmd: sd4-cmd {
                         samsung,pins = "gpk0-1";
                         samsung,pin-function = <3>;
                         samsung,pin-pud = <0>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd4_cd: sd4-cd {
                         samsung,pins = "gpk0-2";
                         samsung,pin-function = <3>;
                         samsung,pin-pud = <3>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd4_bus1: sd4-bus-width1 {
                         samsung,pins = "gpk0-3";
                         samsung,pin-function = <3>;
                         samsung,pin-pud = <3>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd4_bus4: sd4-bus-width4 {
                         samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6";
                         samsung,pin-function = <3>;
                         samsung,pin-pud = <3>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd4_bus8: sd4-bus-width8 {
                         samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
                         samsung,pin-function = <3>;
                         samsung,pin-pud = <4>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd1_clk: sd1-clk {
                         samsung,pins = "gpk1-0";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <0>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd1_cmd: sd1-cmd {
                         samsung,pins = "gpk1-1";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <0>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd1_cd: sd1-cd {
                         samsung,pins = "gpk1-2";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <3>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd1_bus1: sd1-bus-width1 {
                         samsung,pins = "gpk1-3";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <3>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd1_bus4: sd1-bus-width4 {
                         samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <3>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd2_clk: sd2-clk {
                         samsung,pins = "gpk2-0";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <0>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd2_cmd: sd2-cmd {
                         samsung,pins = "gpk2-1";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <0>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd2_cd: sd2-cd {
                         samsung,pins = "gpk2-2";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <3>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd2_bus1: sd2-bus-width1 {
                         samsung,pins = "gpk2-3";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <3>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd2_bus4: sd2-bus-width4 {
                         samsung,pins = "gpk2-3", "gpk2-4", "gpk2-5", "gpk2-6";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <3>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd2_bus8: sd2-bus-width8 {
                         samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6";
                         samsung,pin-function = <3>;
                         samsung,pin-pud = <3>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd3_clk: sd3-clk {
                         samsung,pins = "gpk3-0";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <0>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd3_cmd: sd3-cmd {
                         samsung,pins = "gpk3-1";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <0>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd3_cd: sd3-cd {
                         samsung,pins = "gpk3-2";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <3>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd3_bus1: sd3-bus-width1 {
                         samsung,pins = "gpk3-3";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <3>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 sd3_bus4: sd3-bus-width4 {
                         samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6";
                         samsung,pin-function = <2>;
                         samsung,pin-pud = <3>;
-                        samsung,pin-drv = <0>;
+                        samsung,pin-drv = <3>;
                 };
 
                 eint0: ext-int0 {
@@ -438,6 +711,11 @@
         };
 
         pinctrl@03860000 {
+                gpz: gpz {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+
                 i2s0_bus: i2s0-bus {
                         samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3",
                                         "gpz-4", "gpz-5", "gpz-6";
diff --git a/arch/arm/boot/dts/exynos4210-smdkv310.dts b/arch/arm/boot/dts/exynos4210-smdkv310.dts
index 63610c3ba3af..9b23a8255e39 100644
--- a/arch/arm/boot/dts/exynos4210-smdkv310.dts
+++ b/arch/arm/boot/dts/exynos4210-smdkv310.dts
@@ -43,6 +43,22 @@
                 status = "okay";
         };
 
+        serial@13800000 {
+                status = "okay";
+        };
+
+        serial@13810000 {
+                status = "okay";
+        };
+
+        serial@13820000 {
+                status = "okay";
+        };
+
+        serial@13830000 {
+                status = "okay";
+        };
+
         keypad@100A0000 {
                 samsung,keypad-num-rows = <2>;
                 samsung,keypad-num-columns = <8>;
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts
index a21511c14071..c346b64dff55 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -35,24 +35,15 @@
                 regulator-name = "VMEM_VDD_2.8V";
                 regulator-min-microvolt = <2800000>;
                 regulator-max-microvolt = <2800000>;
-                gpio = <&gpk0 2 1 0 0>;
+                gpio = <&gpk0 2 0>;
                 enable-active-high;
         };
 
         sdhci_emmc: sdhci@12510000 {
                 bus-width = <8>;
                 non-removable;
-                broken-voltage;
-                gpios = <&gpk0 0 2 0 3>,
-                        <&gpk0 1 2 0 3>,
-                        <&gpk0 3 2 2 3>,
-                        <&gpk0 4 2 2 3>,
-                        <&gpk0 5 2 2 3>,
-                        <&gpk0 6 2 2 3>,
-                        <&gpk1 3 3 3 3>,
-                        <&gpk1 4 3 3 3>,
-                        <&gpk1 5 3 3 3>,
-                        <&gpk1 6 3 3 3>;
+                pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus8>;
+                pinctrl-names = "default";
                 vmmc-supply = <&vemmc_reg>;
                 status = "okay";
         };
@@ -73,12 +64,74 @@
                 status = "okay";
         };
 
+        gpio-keys {
+                compatible = "gpio-keys";
+
+                vol-down-key {
+                        gpios = <&gpx2 1 1>;
+                        linux,code = <114>;
+                        label = "volume down";
+                        debounce-interval = <10>;
+                };
+
+                vol-up-key {
+                        gpios = <&gpx2 0 1>;
+                        linux,code = <115>;
+                        label = "volume up";
+                        debounce-interval = <10>;
+                };
+
+                power-key {
+                        gpios = <&gpx2 7 1>;
+                        linux,code = <116>;
+                        label = "power";
+                        debounce-interval = <10>;
+                        gpio-key,wakeup;
+                };
+
+                ok-key {
+                        gpios = <&gpx3 5 1>;
+                        linux,code = <352>;
+                        label = "ok";
+                        debounce-interval = <10>;
+                };
+        };
+
+        tsp_reg: voltage-regulator {
+                compatible = "regulator-fixed";
+                regulator-name = "TSP_FIXED_VOLTAGES";
+                regulator-min-microvolt = <2800000>;
+                regulator-max-microvolt = <2800000>;
+                gpio = <&gpl0 3 0>;
+                enable-active-high;
+        };
+
+        i2c@13890000 {
+                samsung,i2c-sda-delay = <100>;
+                samsung,i2c-slave-addr = <0x10>;
+                samsung,i2c-max-bus-freq = <400000>;
+                pinctrl-0 = <&i2c3_bus>;
+                pinctrl-names = "default";
+                status = "okay";
+
+                mms114-touchscreen@48 {
+                        compatible = "melfas,mms114";
+                        reg = <0x48>;
+                        interrupt-parent = <&gpx0>;
+                        interrupts = <4 2>;
+                        x-size = <720>;
+                        y-size = <1280>;
+                        avdd-supply = <&tsp_reg>;
+                        vdd-supply = <&tsp_reg>;
+                };
+        };
+
         i2c@138B0000 {
                 samsung,i2c-sda-delay = <100>;
                 samsung,i2c-slave-addr = <0x10>;
                 samsung,i2c-max-bus-freq = <100000>;
-                gpios = <&gpb 6 3 3 0>,
-                        <&gpb 7 3 3 0>;
+                pinctrl-0 = <&i2c5_bus>;
+                pinctrl-names = "default";
                 status = "okay";
 
                 max8997_pmic@66 {
@@ -93,9 +146,9 @@
                         max8997,pmic-ignore-gpiodvs-side-effect;
                         max8997,pmic-buck125-default-dvs-idx = <0>;
 
-                        max8997,pmic-buck125-dvs-gpios = <&gpx0 5 1 0 0>,
-                                                         <&gpx0 6 1 0 0>,
-                                                         <&gpl0 0 1 0 0>;
+                        max8997,pmic-buck125-dvs-gpios = <&gpx0 5 0>,
+                                                         <&gpx0 6 0>,
+                                                         <&gpl0 0 0>;
 
                         max8997,pmic-buck1-dvs-voltage = <1350000>, <1300000>,
                                                          <1250000>, <1200000>,
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 214c557eda7f..e31bfc4a6f09 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -31,6 +31,11 @@
                 pinctrl2 = &pinctrl_2;
         };
 
+        pd_lcd1: lcd1-power-domain@10023CA0 {
+                compatible = "samsung,exynos4210-pd";
+                reg = <0x10023CA0 0x20>;
+        };
+
         gic:interrupt-controller@10490000 {
                 cpu-offset = <0x8000>;
         };
@@ -46,27 +51,17 @@
                 compatible = "samsung,pinctrl-exynos4210";
                 reg = <0x11400000 0x1000>;
                 interrupts = <0 47 0>;
-                interrupt-controller;
-                #interrupt-cells = <2>;
         };
 
         pinctrl_1: pinctrl@11000000 {
                 compatible = "samsung,pinctrl-exynos4210";
                 reg = <0x11000000 0x1000>;
                 interrupts = <0 46 0>;
-                interrupt-controller;
-                #interrupt-cells = <2>;
 
                 wakup_eint: wakeup-interrupt-controller {
                         compatible = "samsung,exynos4210-wakeup-eint";
                         interrupt-parent = <&gic>;
-                        interrupt-controller;
-                        #interrupt-cells = <2>;
-                        interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
-                                     <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
-                                     <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
-                                     <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>,
-                                     <0 32 0>;
+                        interrupts = <0 32 0>;
                 };
         };
 
@@ -75,232 +70,10 @@
                 reg = <0x03860000 0x1000>;
         };
 
-        gpio-controllers {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                gpio-controller;
-                ranges;
-
-                gpa0: gpio-controller@11400000 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x11400000 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpa1: gpio-controller@11400020 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x11400020 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpb: gpio-controller@11400040 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x11400040 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpc0: gpio-controller@11400060 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x11400060 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpc1: gpio-controller@11400080 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x11400080 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpd0: gpio-controller@114000A0 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x114000A0 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpd1: gpio-controller@114000C0 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x114000C0 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpe0: gpio-controller@114000E0 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x114000E0 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpe1: gpio-controller@11400100 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x11400100 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpe2: gpio-controller@11400120 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x11400120 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpe3: gpio-controller@11400140 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x11400140 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpe4: gpio-controller@11400160 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x11400160 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpf0: gpio-controller@11400180 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x11400180 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpf1: gpio-controller@114001A0 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x114001A0 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpf2: gpio-controller@114001C0 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x114001C0 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpf3: gpio-controller@114001E0 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x114001E0 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpj0: gpio-controller@11000000 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x11000000 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpj1: gpio-controller@11000020 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x11000020 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpk0: gpio-controller@11000040 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x11000040 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpk1: gpio-controller@11000060 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x11000060 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpk2: gpio-controller@11000080 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x11000080 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpk3: gpio-controller@110000A0 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x110000A0 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpl0: gpio-controller@110000C0 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x110000C0 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpl1: gpio-controller@110000E0 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x110000E0 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpl2: gpio-controller@11000100 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x11000100 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpy0: gpio-controller@11000120 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x11000120 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpy1: gpio-controller@11000140 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x11000140 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpy2: gpio-controller@11000160 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x11000160 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpy3: gpio-controller@11000180 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x11000180 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpy4: gpio-controller@110001A0 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x110001A0 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpy5: gpio-controller@110001C0 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x110001C0 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpy6: gpio-controller@110001E0 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x110001E0 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpx0: gpio-controller@11000C00 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x11000C00 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpx1: gpio-controller@11000C20 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x11000C20 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpx2: gpio-controller@11000C40 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x11000C40 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpx3: gpio-controller@11000C60 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x11000C60 0x20>;
-                        #gpio-cells = <4>;
-                };
-
-                gpz: gpio-controller@03860000 {
-                        compatible = "samsung,exynos4-gpio";
-                        reg = <0x03860000 0x20>;
-                        #gpio-cells = <4>;
-                };
+        tmu@100C0000 {
+                compatible = "samsung,exynos4210-tmu";
+                interrupt-parent = <&combiner>;
+                reg = <0x100C0000 0x100>;
+                interrupts = <2 4>;
         };
 };
diff --git a/arch/arm/boot/dts/exynos4212.dtsi b/arch/arm/boot/dts/exynos4212.dtsi
new file mode 100644
index 000000000000..c6ae2005961f
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4212.dtsi
@@ -0,0 +1,28 @@
+/*
+ * Samsung's Exynos4212 SoC device tree source
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Samsung's Exynos4212 SoC device nodes are listed in this file. Exynos4212
+ * based board files can include this file and provide values for board specfic
+ * bindings.
+ *
+ * Note: This file does not include device nodes for all the controllers in
+ * Exynos4212 SoC. As device tree coverage for Exynos4212 increases, additional
+ * nodes can be added to this file.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/include/ "exynos4x12.dtsi"
+
+/ {
+        compatible = "samsung,exynos4212";
+
+        gic:interrupt-controller@10490000 {
+                cpu-offset = <0x8000>;
+        };
+};
diff --git a/arch/arm/boot/dts/exynos4412-smdk4412.dts b/arch/arm/boot/dts/exynos4412-smdk4412.dts
new file mode 100644
index 000000000000..f05bf575cc45
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4412-smdk4412.dts
@@ -0,0 +1,45 @@
+/*
+ * Samsung's Exynos4412 based SMDK board device tree source
+ *
+ * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Device tree source file for Samsung's SMDK4412 board which is based on
+ * Samsung's Exynos4412 SoC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+/include/ "exynos4412.dtsi"
+
+/ {
+        model = "Samsung SMDK evaluation board based on Exynos4412";
+        compatible = "samsung,smdk4412", "samsung,exynos4412";
+
+        memory {
+                reg = <0x40000000 0x40000000>;
+        };
+
+        chosen {
+                bootargs ="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc";
+        };
+
+        serial@13800000 {
+                status = "okay";
+        };
+
+        serial@13810000 {
+                status = "okay";
+        };
+
+        serial@13820000 {
+                status = "okay";
+        };
+
+        serial@13830000 {
+                status = "okay";
+        };
+};
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
new file mode 100644
index 000000000000..d7dfe312772a
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -0,0 +1,28 @@
+/*
+ * Samsung's Exynos4412 SoC device tree source
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Samsung's Exynos4412 SoC device nodes are listed in this file. Exynos4412
+ * based board files can include this file and provide values for board specfic
+ * bindings.
+ *
+ * Note: This file does not include device nodes for all the controllers in
+ * Exynos4412 SoC. As device tree coverage for Exynos4412 increases, additional
+ * nodes can be added to this file.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/include/ "exynos4x12.dtsi"
+
+/ {
+        compatible = "samsung,exynos4412";
+
+        gic:interrupt-controller@10490000 {
+                cpu-offset = <0x4000>;
+        };
+};
diff --git a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
new file mode 100644
index 000000000000..8e6115adcd97
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
@@ -0,0 +1,965 @@
+/*
+ * Samsung's Exynos4x12 SoCs pin-mux and pin-config device tree source
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Samsung's Exynos4x12 SoCs pin-mux and pin-config optiosn are listed as device
+ * tree nodes are listed in this file.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/ {
+        pinctrl@11400000 {
+                gpa0: gpa0 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpa1: gpa1 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpb: gpb {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpc0: gpc0 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpc1: gpc1 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpd0: gpd0 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpd1: gpd1 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpf0: gpf0 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpf1: gpf1 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpf2: gpf2 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpf3: gpf3 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpj0: gpj0 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpj1: gpj1 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                uart0_data: uart0-data {
+                        samsung,pins = "gpa0-0", "gpa0-1";
+                        samsung,pin-function = <0x2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                uart0_fctl: uart0-fctl {
+                        samsung,pins = "gpa0-2", "gpa0-3";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                uart1_data: uart1-data {
+                        samsung,pins = "gpa0-4", "gpa0-5";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                uart1_fctl: uart1-fctl {
+                        samsung,pins = "gpa0-6", "gpa0-7";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                i2c2_bus: i2c2-bus {
+                        samsung,pins = "gpa0-6", "gpa0-7";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <0>;
+                };
+
+                uart2_data: uart2-data {
+                        samsung,pins = "gpa1-0", "gpa1-1";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                uart2_fctl: uart2-fctl {
+                        samsung,pins = "gpa1-2", "gpa1-3";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                uart_audio_a: uart-audio-a {
+                        samsung,pins = "gpa1-0", "gpa1-1";
+                        samsung,pin-function = <4>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                i2c3_bus: i2c3-bus {
+                        samsung,pins = "gpa1-2", "gpa1-3";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <0>;
+                };
+
+                uart3_data: uart3-data {
+                        samsung,pins = "gpa1-4", "gpa1-5";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                uart_audio_b: uart-audio-b {
+                        samsung,pins = "gpa1-4", "gpa1-5";
+                        samsung,pin-function = <4>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                spi0_bus: spi0-bus {
+                        samsung,pins = "gpb-0", "gpb-2", "gpb-3";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <0>;
+                };
+
+                i2c4_bus: i2c4-bus {
+                        samsung,pins = "gpb-0", "gpb-1";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <0>;
+                };
+
+                spi1_bus: spi1-bus {
+                        samsung,pins = "gpb-4", "gpb-6", "gpb-7";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <0>;
+                };
+
+                i2c5_bus: i2c5-bus {
+                        samsung,pins = "gpb-2", "gpb-3";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <0>;
+                };
+
+                i2s1_bus: i2s1-bus {
+                        samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
+                                        "gpc0-4";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                pcm1_bus: pcm1-bus {
+                        samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
+                                        "gpc0-4";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                ac97_bus: ac97-bus {
+                        samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
+                                        "gpc0-4";
+                        samsung,pin-function = <4>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                i2s2_bus: i2s2-bus {
+                        samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3",
+                                        "gpc1-4";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                pcm2_bus: pcm2-bus {
+                        samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3",
+                                        "gpc1-4";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                spdif_bus: spdif-bus {
+                        samsung,pins = "gpc1-0", "gpc1-1";
+                        samsung,pin-function = <4>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                i2c6_bus: i2c6-bus {
+                        samsung,pins = "gpc1-3", "gpc1-4";
+                        samsung,pin-function = <4>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <0>;
+                };
+
+                spi2_bus: spi2-bus {
+                        samsung,pins = "gpc1-1", "gpc1-3", "gpc1-4";
+                        samsung,pin-function = <5>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <0>;
+                };
+
+                pwm0_out: pwm0-out {
+                        samsung,pins = "gpd0-0";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                pwm1_out: pwm1-out {
+                        samsung,pins = "gpd0-1";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                lcd_ctrl: lcd-ctrl {
+                        samsung,pins = "gpd0-0", "gpd0-1";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                i2c7_bus: i2c7-bus {
+                        samsung,pins = "gpd0-2", "gpd0-3";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <0>;
+                };
+
+                pwm2_out: pwm2-out {
+                        samsung,pins = "gpd0-2";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                pwm3_out: pwm3-out {
+                        samsung,pins = "gpd0-3";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                i2c0_bus: i2c0-bus {
+                        samsung,pins = "gpd1-0", "gpd1-1";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <0>;
+                };
+
+                mipi0_clk: mipi0-clk {
+                        samsung,pins = "gpd1-0", "gpd1-1";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                i2c1_bus: i2c1-bus {
+                        samsung,pins = "gpd1-2", "gpd1-3";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <0>;
+                };
+
+                mipi1_clk: mipi1-clk {
+                        samsung,pins = "gpd1-2", "gpd1-3";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                lcd_clk: lcd-clk {
+                        samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                lcd_data16: lcd-data-width16 {
+                        samsung,pins = "gpf0-7", "gpf1-0", "gpf1-1", "gpf1-2",
+                                        "gpf1-3", "gpf1-6", "gpf1-7", "gpf2-0",
+                                        "gpf2-1", "gpf2-2", "gpf2-3", "gpf2-7",
+                                        "gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                lcd_data18: lcd-data-width18 {
+                        samsung,pins = "gpf0-6", "gpf0-7", "gpf1-0", "gpf1-1",
+                                        "gpf1-2", "gpf1-3", "gpf1-6", "gpf1-7",
+                                        "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3",
+                                        "gpf2-6", "gpf2-7", "gpf3-0", "gpf3-1",
+                                        "gpf3-2", "gpf3-3";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                lcd_data24: lcd-data-width24 {
+                        samsung,pins = "gpf0-4", "gpf0-5", "gpf0-6", "gpf0-7",
+                                        "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3",
+                                        "gpf1-4", "gpf1-5", "gpf1-6", "gpf1-7",
+                                        "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3",
+                                        "gpf2-4", "gpf2-5", "gpf2-6", "gpf2-7",
+                                        "gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                lcd_ldi: lcd-ldi {
+                        samsung,pins = "gpf3-4";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                cam_port_a: cam-port-a {
+                        samsung,pins = "gpj0-0", "gpj0-1", "gpj0-2", "gpj0-3",
+                                        "gpj0-4", "gpj0-5", "gpj0-6", "gpj0-7",
+                                        "gpj1-0", "gpj1-1", "gpj1-2", "gpj1-3",
+                                        "gpj1-4";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <0>;
+                };
+        };
+
+        pinctrl@11000000 {
+                gpk0: gpk0 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpk1: gpk1 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpk2: gpk2 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpk3: gpk3 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpl0: gpl0 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpl1: gpl1 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpl2: gpl2 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpm0: gpm0 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpm1: gpm1 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpm2: gpm2 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpm3: gpm3 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpm4: gpm4 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpy0: gpy0 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+
+                gpy1: gpy1 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+
+                gpy2: gpy2 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+
+                gpy3: gpy3 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+
+                gpy4: gpy4 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+
+                gpy5: gpy5 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+
+                gpy6: gpy6 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+
+                gpx0: gpx0 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        interrupt-parent = <&gic>;
+                        interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
+                                     <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>;
+                        #interrupt-cells = <2>;
+                };
+
+                gpx1: gpx1 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        interrupt-parent = <&gic>;
+                        interrupts = <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
+                                     <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
+                        #interrupt-cells = <2>;
+                };
+
+                gpx2: gpx2 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpx3: gpx3 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                sd0_clk: sd0-clk {
+                        samsung,pins = "gpk0-0";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd0_cmd: sd0-cmd {
+                        samsung,pins = "gpk0-1";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd0_cd: sd0-cd {
+                        samsung,pins = "gpk0-2";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd0_bus1: sd0-bus-width1 {
+                        samsung,pins = "gpk0-3";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd0_bus4: sd0-bus-width4 {
+                        samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd0_bus8: sd0-bus-width8 {
+                        samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd4_clk: sd4-clk {
+                        samsung,pins = "gpk0-0";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd4_cmd: sd4-cmd {
+                        samsung,pins = "gpk0-1";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd4_cd: sd4-cd {
+                        samsung,pins = "gpk0-2";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd4_bus1: sd4-bus-width1 {
+                        samsung,pins = "gpk0-3";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd4_bus4: sd4-bus-width4 {
+                        samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd4_bus8: sd4-bus-width8 {
+                        samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <4>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd1_clk: sd1-clk {
+                        samsung,pins = "gpk1-0";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd1_cmd: sd1-cmd {
+                        samsung,pins = "gpk1-1";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd1_cd: sd1-cd {
+                        samsung,pins = "gpk1-2";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd1_bus1: sd1-bus-width1 {
+                        samsung,pins = "gpk1-3";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd1_bus4: sd1-bus-width4 {
+                        samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd2_clk: sd2-clk {
+                        samsung,pins = "gpk2-0";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd2_cmd: sd2-cmd {
+                        samsung,pins = "gpk2-1";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd2_cd: sd2-cd {
+                        samsung,pins = "gpk2-2";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd2_bus1: sd2-bus-width1 {
+                        samsung,pins = "gpk2-3";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd2_bus4: sd2-bus-width4 {
+                        samsung,pins = "gpk2-3", "gpk2-4", "gpk2-5", "gpk2-6";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd2_bus8: sd2-bus-width8 {
+                        samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd3_clk: sd3-clk {
+                        samsung,pins = "gpk3-0";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd3_cmd: sd3-cmd {
+                        samsung,pins = "gpk3-1";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd3_cd: sd3-cd {
+                        samsung,pins = "gpk3-2";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd3_bus1: sd3-bus-width1 {
+                        samsung,pins = "gpk3-3";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <3>;
+                };
+
+                sd3_bus4: sd3-bus-width4 {
+                        samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <3>;
+                };
+
+                keypad_col0: keypad-col0 {
+                        samsung,pins = "gpl2-0";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                keypad_col1: keypad-col1 {
+                        samsung,pins = "gpl2-1";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                keypad_col2: keypad-col2 {
+                        samsung,pins = "gpl2-2";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                keypad_col3: keypad-col3 {
+                        samsung,pins = "gpl2-3";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                keypad_col4: keypad-col4 {
+                        samsung,pins = "gpl2-4";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                keypad_col5: keypad-col5 {
+                        samsung,pins = "gpl2-5";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                keypad_col6: keypad-col6 {
+                        samsung,pins = "gpl2-6";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                keypad_col7: keypad-col7 {
+                        samsung,pins = "gpl2-7";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                cam_port_b: cam-port-b {
+                        samsung,pins = "gpm0-0", "gpm0-1", "gpm0-2", "gpm0-3",
+                                        "gpm0-4", "gpm0-5", "gpm0-6", "gpm0-7",
+                                        "gpm1-0", "gpm1-1", "gpm2-0", "gpm2-1",
+                                        "gpm2-2";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <3>;
+                        samsung,pin-drv = <0>;
+                };
+
+                eint0: ext-int0 {
+                        samsung,pins = "gpx0-0";
+                        samsung,pin-function = <0xf>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                eint8: ext-int8 {
+                        samsung,pins = "gpx1-0";
+                        samsung,pin-function = <0xf>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                eint15: ext-int15 {
+                        samsung,pins = "gpx1-7";
+                        samsung,pin-function = <0xf>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                eint16: ext-int16 {
+                        samsung,pins = "gpx2-0";
+                        samsung,pin-function = <0xf>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                eint31: ext-int31 {
+                        samsung,pins = "gpx3-7";
+                        samsung,pin-function = <0xf>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+        };
+
+        pinctrl@03860000 {
+                gpz: gpz {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                i2s0_bus: i2s0-bus {
+                        samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3",
+                                        "gpz-4", "gpz-5", "gpz-6";
+                        samsung,pin-function = <0x2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                pcm0_bus: pcm0-bus {
+                        samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3",
+                                        "gpz-4";
+                        samsung,pin-function = <0x3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+        };
+
+        pinctrl@106E0000 {
+                gpv0: gpv0 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpv1: gpv1 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpv2: gpv2 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpv3: gpv3 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                gpv4: gpv4 {
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+
+                c2c_bus: c2c-bus {
+                        samsung,pins = "gpv0-0", "gpv0-1", "gpv0-2", "gpv0-3",
+                                        "gpv0-4", "gpv0-5", "gpv0-6", "gpv0-7",
+                                        "gpv1-0", "gpv1-1", "gpv1-2", "gpv1-3",
+                                        "gpv1-4", "gpv1-5", "gpv1-6", "gpv1-7",
+                                        "gpv2-0", "gpv2-1", "gpv2-2", "gpv2-3",
+                                        "gpv2-4", "gpv2-5", "gpv2-6", "gpv2-7",
+                                        "gpv3-0", "gpv3-1", "gpv3-2", "gpv3-3",
+                                        "gpv3-4", "gpv3-5", "gpv3-6", "gpv3-7",
+                                        "gpv4-0", "gpv4-1";
+                        samsung,pin-function = <0x2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
new file mode 100644
index 000000000000..179a62e46c9d
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -0,0 +1,69 @@
+/*
+ * Samsung's Exynos4x12 SoCs device tree source
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Samsung's Exynos4x12 SoCs device nodes are listed in this file. Exynos4x12
+ * based board files can include this file and provide values for board specfic
+ * bindings.
+ *
+ * Note: This file does not include device nodes for all the controllers in
+ * Exynos4x12 SoC. As device tree coverage for Exynos4x12 increases, additional
+ * nodes can be added to this file.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/include/ "exynos4.dtsi"
+/include/ "exynos4x12-pinctrl.dtsi"
+
+/ {
+        aliases {
+                pinctrl0 = &pinctrl_0;
+                pinctrl1 = &pinctrl_1;
+                pinctrl2 = &pinctrl_2;
+                pinctrl3 = &pinctrl_3;
+        };
+
+        combiner:interrupt-controller@10440000 {
+                interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
+                             <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
+                             <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
+                             <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
+                             <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>;
+        };
+
+        pinctrl_0: pinctrl@11400000 {
+                compatible = "samsung,pinctrl-exynos4x12";
+                reg = <0x11400000 0x1000>;
+                interrupts = <0 47 0>;
+        };
+
+        pinctrl_1: pinctrl@11000000 {
+                compatible = "samsung,pinctrl-exynos4x12";
+                reg = <0x11000000 0x1000>;
+                interrupts = <0 46 0>;
+
+                wakup_eint: wakeup-interrupt-controller {
+                        compatible = "samsung,exynos4210-wakeup-eint";
+                        interrupt-parent = <&gic>;
+                        interrupts = <0 32 0>;
+                };
+        };
+
+        pinctrl_2: pinctrl@03860000 {
+                compatible = "samsung,pinctrl-exynos4x12";
+                reg = <0x03860000 0x1000>;
+                interrupt-parent = <&combiner>;
+                interrupts = <10 0>;
+        };
+
+        pinctrl_3: pinctrl@106E0000 {
+                compatible = "samsung,pinctrl-exynos4x12";
+                reg = <0x106E0000 0x1000>;
+                interrupts = <0 72 0>;
+        };
+};
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index a352df403b7a..942d5761ca97 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -17,10 +17,6 @@
         compatible = "samsung,smdk5250", "samsung,exynos5250";
 
         aliases {
-                mshc0 = &dwmmc_0;
-                mshc1 = &dwmmc_1;
-                mshc2 = &dwmmc_2;
-                mshc3 = &dwmmc_3;
         };
 
         memory {
@@ -55,8 +51,31 @@
                 };
         };
 
+        i2c@121D0000 {
+                samsung,i2c-sda-delay = <100>;
+                samsung,i2c-max-bus-freq = <40000>;
+                samsung,i2c-slave-addr = <0x38>;
+
+                sata-phy {
+                        compatible = "samsung,sata-phy";
+                        reg = <0x38>;
+                };
+        };
+
+        sata@122F0000 {
+                samsung,sata-freq = <66>;
+        };
+
         i2c@12C80000 {
-                status = "disabled";
+                samsung,i2c-sda-delay = <100>;
+                samsung,i2c-max-bus-freq = <66000>;
+                gpios = <&gpa0 6 3 3 0>,
+                        <&gpa0 7 3 3 0>;
+
+                hdmiddc@50 {
+                        compatible = "samsung,exynos5-hdmiddc";
+                        reg = <0x50>;
+                };
         };
 
         i2c@12C90000 {
@@ -79,7 +98,17 @@
                 status = "disabled";
         };
 
-        dwmmc_0: dwmmc0@12200000 {
+        i2c@12CE0000 {
+                samsung,i2c-sda-delay = <100>;
+                samsung,i2c-max-bus-freq = <66000>;
+
+                hdmiphy@38 {
+                        compatible = "samsung,exynos5-hdmiphy";
+                        reg = <0x38>;
+                };
+        };
+
+        dwmmc0@12200000 {
                 num-slots = <1>;
                 supports-highspeed;
                 broken-cd;
@@ -100,11 +129,11 @@
                 };
         };
 
-        dwmmc_1: dwmmc1@12210000 {
+        dwmmc1@12210000 {
                 status = "disabled";
         };
 
-        dwmmc_2: dwmmc2@12220000 {
+        dwmmc2@12220000 {
                 num-slots = <1>;
                 supports-highspeed;
                 fifo-depth = <0x80>;
@@ -125,7 +154,7 @@
                 };
         };
 
-        dwmmc_3: dwmmc3@12230000 {
+        dwmmc3@12230000 {
                 status = "disabled";
         };
 
@@ -166,4 +195,13 @@
         spi_2: spi@12d40000 {
                 status = "disabled";
         };
+
+        hdmi {
+                hpd-gpio = <&gpx3 7 0xf 1 3>;
+        };
+
+        codec@11000000 {
+                samsung,mfc-r = <0x43000000 0x800000>;
+                samsung,mfc-l = <0x51000000 0x800000>;
+        };
 };
diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts
new file mode 100644
index 000000000000..17dd951c1cd2
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5250-snow.dts
@@ -0,0 +1,43 @@
+/*
+ * Google Snow board device tree source
+ *
+ * Copyright (c) 2012 Google, Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+/include/ "exynos5250.dtsi"
+/include/ "cros5250-common.dtsi"
+
+/ {
+        model = "Google Snow";
+        compatible = "google,snow", "samsung,exynos5250";
+
+        gpio-keys {
+                compatible = "gpio-keys";
+
+                lid-switch {
+                        label = "Lid";
+                        gpios = <&gpx3 5 0 0x10000 0>;
+                        linux,input-type = <5>; /* EV_SW */
+                        linux,code = <0>; /* SW_LID */
+                        debounce-interval = <1>;
+                        gpio-key,wakeup;
+                };
+        };
+
+        /*
+         * On Snow we've got SIP WiFi and so can keep drive strengths low to
+         * reduce EMI.
+         */
+        dwmmc3@12230000 {
+                slot@0 {
+                        gpios = <&gpc4 0 2 0 0>, <&gpc4 1 2 3 0>,
+                                <&gpc4 3 2 3 0>, <&gpc4 4 2 3 0>,
+                                <&gpc4 5 2 3 0>, <&gpc4 6 2 3 0>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index dddfd6e444dc..36d8246ea50e 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -31,6 +31,10 @@
                 gsc1 = &gsc_1;
                 gsc2 = &gsc_2;
                 gsc3 = &gsc_3;
+                mshc0 = &dwmmc_0;
+                mshc1 = &dwmmc_1;
+                mshc2 = &dwmmc_2;
+                mshc3 = &dwmmc_3;
         };
 
         gic:interrupt-controller@10481000 {
@@ -62,12 +66,24 @@
                 interrupts = <0 42 0>;
         };
 
+        codec@11000000 {
+                compatible = "samsung,mfc-v6";
+                reg = <0x11000000 0x10000>;
+                interrupts = <0 96 0>;
+        };
+
         rtc {
                 compatible = "samsung,s3c6410-rtc";
                 reg = <0x101E0000 0x100>;
                 interrupts = <0 43 0>, <0 44 0>;
         };
 
+        tmu@10060000 {
+                compatible = "samsung,exynos5250-tmu";
+                reg = <0x10060000 0x100>;
+                interrupts = <0 65 0>;
+        };
+
         serial@12C00000 {
                 compatible = "samsung,exynos4210-uart";
                 reg = <0x12C00000 0x100>;
@@ -92,6 +108,17 @@
                 interrupts = <0 54 0>;
         };
 
+        sata@122F0000 {
+                compatible = "samsung,exynos5-sata-ahci";
+                reg = <0x122F0000 0x1ff>;
+                interrupts = <0 115 0>;
+        };
+
+        sata-phy@12170000 {
+                compatible = "samsung,exynos5-sata-phy";
+                reg = <0x12170000 0x1ff>;
+        };
+
         i2c@12C60000 {
                 compatible = "samsung,s3c2440-i2c";
                 reg = <0x12C60000 0x100>;
@@ -156,6 +183,21 @@
                 #size-cells = <0>;
         };
 
+        i2c@12CE0000 {
+                compatible = "samsung,s3c2440-hdmiphy-i2c";
+                reg = <0x12CE0000 0x1000>;
+                interrupts = <0 64 0>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+        };
+
+        i2c@121D0000 {
+                compatible = "samsung,exynos5-sata-phy-i2c";
+                reg = <0x121D0000 0x100>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+        };
+
         spi_0: spi@12d20000 {
                 compatible = "samsung,exynos4210-spi";
                 reg = <0x12d20000 0x100>;
@@ -186,7 +228,7 @@
                 #size-cells = <0>;
         };
 
-        dwmmc0@12200000 {
+        dwmmc_0: dwmmc0@12200000 {
                 compatible = "samsung,exynos5250-dw-mshc";
                 reg = <0x12200000 0x1000>;
                 interrupts = <0 75 0>;
@@ -194,7 +236,7 @@
                 #size-cells = <0>;
         };
 
-        dwmmc1@12210000 {
+        dwmmc_1: dwmmc1@12210000 {
                 compatible = "samsung,exynos5250-dw-mshc";
                 reg = <0x12210000 0x1000>;
                 interrupts = <0 76 0>;
@@ -202,7 +244,7 @@
                 #size-cells = <0>;
         };
 
-        dwmmc2@12220000 {
+        dwmmc_2: dwmmc2@12220000 {
                 compatible = "samsung,exynos5250-dw-mshc";
                 reg = <0x12220000 0x1000>;
                 interrupts = <0 77 0>;
@@ -210,7 +252,7 @@
                 #size-cells = <0>;
         };
 
-        dwmmc3@12230000 {
+        dwmmc_3: dwmmc3@12230000 {
                 compatible = "samsung,exynos5250-dw-mshc";
                 reg = <0x12230000 0x1000>;
                 interrupts = <0 78 0>;
@@ -520,4 +562,16 @@
                 reg = <0x13e30000 0x1000>;
                 interrupts = <0 88 0>;
         };
+
+        hdmi {
+                compatible = "samsung,exynos5-hdmi";
+                reg = <0x14530000 0x100000>;
+                interrupts = <0 95 0>;
+        };
+
+        mixer {
+                compatible = "samsung,exynos5-mixer";
+                reg = <0x14450000 0x10000>;
+                interrupts = <0 94 0>;
+        };
 };
diff --git a/arch/arm/boot/dts/href.dtsi b/arch/arm/boot/dts/href.dtsi
new file mode 100644
index 000000000000..592fb9dc35bd
--- /dev/null
+++ b/arch/arm/boot/dts/href.dtsi
@@ -0,0 +1,273 @@
+/*
+ * Copyright 2012 ST-Ericsson AB
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/include/ "dbx5x0.dtsi"
+
+/ {
+        memory {
+                reg = <0x00000000 0x20000000>;
+        };
+
+        gpio_keys {
+                compatible = "gpio-keys";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                button@1 {
+                        linux,code = <11>;
+                        label = "SFH7741 Proximity Sensor";
+                };
+        };
+
+        soc-u9500 {
+                uart@80120000 {
+                        status = "okay";
+                };
+
+                uart@80121000 {
+                        status = "okay";
+                };
+
+                uart@80007000 {
+                        status = "okay";
+                };
+
+                i2c@80004000 {
+                        tc3589x@42 {
+                                compatible = "tc3589x";
+                                reg = <0x42>;
+                                interrupt-parent = <&gpio6>;
+                                interrupts = <25 0x1>;
+
+                                interrupt-controller;
+                                #interrupt-cells = <2>;
+
+                                tc3589x_gpio: tc3589x_gpio {
+                                        compatible = "tc3589x-gpio";
+                                        interrupts = <0 0x1>;
+
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                        gpio-controller;
+                                        #gpio-cells = <2>;
+                                };
+                        };
+                };
+
+                i2c@80128000 {
+                        lp5521@0x33 {
+                                compatible = "lp5521";
+                                reg = <0x33>;
+                        };
+
+                        lp5521@0x34 {
+                                compatible = "lp5521";
+                                reg = <0x34>;
+                        };
+
+                        bh1780@0x29 {
+                                compatible = "rohm,bh1780gli";
+                                reg = <0x33>;
+                        };
+                };
+
+                // External Micro SD slot
+                sdi0_per1@80126000 {
+                        arm,primecell-periphid = <0x10480180>;
+                        max-frequency = <50000000>;
+                        bus-width = <4>;
+                        mmc-cap-sd-highspeed;
+                        mmc-cap-mmc-highspeed;
+                        vmmc-supply = <&ab8500_ldo_aux3_reg>;
+
+                        cd-gpios  = <&tc3589x_gpio 3 0x4>;
+
+                        status = "okay";
+                };
+
+                // WLAN SDIO channel
+                sdi1_per2@80118000 {
+                        arm,primecell-periphid = <0x10480180>;
+                        max-frequency = <50000000>;
+                        bus-width = <4>;
+
+                        status = "okay";
+                };
+
+                // PoP:ed eMMC
+                sdi2_per3@80005000 {
+                        arm,primecell-periphid = <0x10480180>;
+                        max-frequency = <50000000>;
+                        bus-width = <8>;
+                        mmc-cap-mmc-highspeed;
+
+                        status = "okay";
+                };
+
+                // On-board eMMC
+                sdi4_per2@80114000 {
+                        arm,primecell-periphid = <0x10480180>;
+                        max-frequency = <50000000>;
+                        bus-width = <8>;
+                        mmc-cap-mmc-highspeed;
+                        vmmc-supply = <&ab8500_ldo_aux2_reg>;
+
+                        status = "okay";
+                };
+
+                sound {
+                        compatible = "stericsson,snd-soc-mop500";
+
+                        stericsson,cpu-dai = <&msp1 &msp3>;
+                        stericsson,audio-codec = <&codec>;
+                };
+
+                msp1: msp@80124000 {
+                        status = "okay";
+                };
+
+                msp3: msp@80125000 {
+                        status = "okay";
+                };
+
+                prcmu@80157000 {
+                        db8500-prcmu-regulators {
+                                db8500_vape_reg: db8500_vape {
+                                        regulator-name = "db8500-vape";
+                                };
+
+                                db8500_varm_reg: db8500_varm {
+                                        regulator-name = "db8500-varm";
+                                };
+
+                                db8500_vmodem_reg: db8500_vmodem {
+                                        regulator-name = "db8500-vmodem";
+                                };
+
+                                db8500_vpll_reg: db8500_vpll {
+                                        regulator-name = "db8500-vpll";
+                                };
+
+                                db8500_vsmps1_reg: db8500_vsmps1 {
+                                        regulator-name = "db8500-vsmps1";
+                                };
+
+                                db8500_vsmps2_reg: db8500_vsmps2 {
+                                        regulator-name = "db8500-vsmps2";
+                                };
+
+                                db8500_vsmps3_reg: db8500_vsmps3 {
+                                        regulator-name = "db8500-vsmps3";
+                                };
+
+                                db8500_vrf1_reg: db8500_vrf1 {
+                                        regulator-name = "db8500-vrf1";
+                                };
+
+                                db8500_sva_mmdsp_reg: db8500_sva_mmdsp {
+                                        regulator-name = "db8500-sva-mmdsp";
+                                };
+
+                                db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret {
+                                        regulator-name = "db8500-sva-mmdsp-ret";
+                                };
+
+                                db8500_sva_pipe_reg: db8500_sva_pipe {
+                                        regulator-name = "db8500_sva_pipe";
+                                };
+
+                                db8500_sia_mmdsp_reg: db8500_sia_mmdsp {
+                                        regulator-name = "db8500_sia_mmdsp";
+                                };
+
+                                db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret {
+                                        regulator-name = "db8500-sia-mmdsp-ret";
+                                };
+
+                                db8500_sia_pipe_reg: db8500_sia_pipe {
+                                        regulator-name = "db8500-sia-pipe";
+                                };
+
+                                db8500_sga_reg: db8500_sga {
+                                        regulator-name = "db8500-sga";
+                                };
+
+                                db8500_b2r2_mcde_reg: db8500_b2r2_mcde {
+                                        regulator-name = "db8500-b2r2-mcde";
+                                };
+
+                                db8500_esram12_reg: db8500_esram12 {
+                                        regulator-name = "db8500-esram12";
+                                };
+
+                                db8500_esram12_ret_reg: db8500_esram12_ret {
+                                        regulator-name = "db8500-esram12-ret";
+                                };
+
+                                db8500_esram34_reg: db8500_esram34 {
+                                        regulator-name = "db8500-esram34";
+                                };
+
+                                db8500_esram34_ret_reg: db8500_esram34_ret {
+                                        regulator-name = "db8500-esram34-ret";
+                                };
+                        };
+
+                        ab8500@5 {
+                                ab8500-regulators {
+                                        ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
+                                                regulator-name = "V-DISPLAY";
+                                        };
+
+                                        ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
+                                                regulator-name = "V-eMMC1";
+                                        };
+
+                                        ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
+                                                regulator-name = "V-MMC-SD";
+                                        };
+
+                                        ab8500_ldo_initcore_reg: ab8500_ldo_initcore {
+                                                regulator-name = "V-INTCORE";
+                                        };
+
+                                        ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
+                                                regulator-name = "V-TVOUT";
+                                        };
+
+                                        ab8500_ldo_usb_reg: ab8500_ldo_usb {
+                                                regulator-name = "dummy";
+                                        };
+
+                                        ab8500_ldo_audio_reg: ab8500_ldo_audio {
+                                                regulator-name = "V-AUD";
+                                        };
+
+                                        ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
+                                                regulator-name = "V-AMIC1";
+                                        };
+
+                                        ab8500_ldo_amamic2_reg: ab8500_ldo_amamic2 {
+                                                regulator-name = "V-AMIC2";
+                                        };
+
+                                        ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
+                                                regulator-name = "V-DMIC";
+                                        };
+
+                                        ab8500_ldo_ana_reg: ab8500_ldo_ana {
+                                                regulator-name = "V-CSI/DSI";
+                                        };
+                                };
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/hrefprev60.dts b/arch/arm/boot/dts/hrefprev60.dts
new file mode 100644
index 000000000000..eec29c4a86dc
--- /dev/null
+++ b/arch/arm/boot/dts/hrefprev60.dts
@@ -0,0 +1,48 @@
+/*
+ * Copyright 2012 ST-Ericsson AB
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "dbx5x0.dtsi"
+/include/ "href.dtsi"
+/include/ "stuib.dtsi"
+
+/ {
+        model = "ST-Ericsson HREF (pre-v60) platform with Device Tree";
+        compatible = "st-ericsson,mop500", "st-ericsson,u8500";
+
+        gpio_keys {
+                button@1 {
+                        gpios = <&tc3589x_gpio 7 0x4>;
+                };
+        };
+
+        soc-u9500 {
+                i2c@80004000 {
+                        tps61052@33 {
+                                compatible = "tps61052";
+                                reg = <0x33>;
+                        };
+                };
+
+                i2c@80110000 {
+                        bu21013_tp@0x5c {
+                                reset-gpio = <&tc3589x_gpio 13 0x4>;
+                        };
+                };
+
+                vmmci: regulator-gpio {
+                        gpios = <&tc3589x_gpio 18 0x4>;
+                        gpio-enable = <&tc3589x_gpio 17 0x4>;
+
+                        status = "okay";
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/hrefv60plus.dts b/arch/arm/boot/dts/hrefv60plus.dts
index 2131d77dc9c9..55f4191a626e 100644
--- a/arch/arm/boot/dts/hrefv60plus.dts
+++ b/arch/arm/boot/dts/hrefv60plus.dts
@@ -11,85 +11,200 @@
 
 /dts-v1/;
 /include/ "dbx5x0.dtsi"
+/include/ "href.dtsi"
+/include/ "stuib.dtsi"
 
 / {
-        model = "ST-Ericsson HREF platform with Device Tree";
-        compatible = "st-ericsson,hrefv60+";
+        model = "ST-Ericsson HREF (v60+) platform with Device Tree";
+        compatible = "st-ericsson,hrefv60+", "st-ericsson,u8500";
 
-        memory {
-                reg = <0x00000000 0x20000000>;
+        gpio_keys {
+                button@1 {
+                        gpios = <&gpio6 25 0x4>;
+                };
         };
 
         soc-u9500 {
-                uart@80120000 {
+                i2c@80110000 {
+                        bu21013_tp@0x5c {
+                                reset-gpio = <&gpio4 15 0x4>;
+                        };
+                };
+
+                // External Micro SD slot
+                sdi0_per1@80126000 {
+                        arm,primecell-periphid = <0x10480180>;
+                        max-frequency = <50000000>;
+                        bus-width = <4>;
+                        mmc-cap-sd-highspeed;
+                        mmc-cap-mmc-highspeed;
+                        vmmc-supply = <&ab8500_ldo_aux3_reg>;
+
+                        cd-gpios  = <&tc3589x_gpio 3 0x4>;
+
                         status = "okay";
                 };
 
-                uart@80121000 {
+                // WLAN SDIO channel
+                sdi1_per2@80118000 {
+                        arm,primecell-periphid = <0x10480180>;
+                        max-frequency = <50000000>;
+                        bus-width = <4>;
+
                         status = "okay";
                 };
 
-                uart@80007000 {
+                // PoP:ed eMMC
+                sdi2_per3@80005000 {
+                        arm,primecell-periphid = <0x10480180>;
+                        max-frequency = <50000000>;
+                        bus-width = <8>;
+                        mmc-cap-mmc-highspeed;
+
                         status = "okay";
                 };
 
-                i2c@80004000 {
-                        tc3589x@42 {
-                                compatible = "tc3589x";
-                                reg = <0x42>;
-                                interrupt-parent = <&gpio6>;
-                                interrupts = <25 0x1>;
+                // On-board eMMC
+                sdi4_per2@80114000 {
+                        arm,primecell-periphid = <0x10480180>;
+                        max-frequency = <50000000>;
+                        bus-width = <8>;
+                        mmc-cap-mmc-highspeed;
+                        vmmc-supply = <&ab8500_ldo_aux2_reg>;
 
-                                interrupt-controller;
-                                #interrupt-cells = <2>;
+                        status = "okay";
+                };
 
-                                tc3589x_gpio: tc3589x_gpio {
-                                        compatible = "tc3589x-gpio";
-                                        interrupts = <0 0x1>;
+                prcmu@80157000 {
+                        db8500-prcmu-regulators {
+                                db8500_vape_reg: db8500_vape {
+                                        regulator-name = "db8500-vape";
+                                };
 
-                                        interrupt-controller;
-                                        #interrupt-cells = <2>;
-                                        gpio-controller;
-                                        #gpio-cells = <2>;
+                                db8500_varm_reg: db8500_varm {
+                                        regulator-name = "db8500-varm";
                                 };
-                        };
 
-                        tps61052@33 {
-                                compatible = "tps61052";
-                                reg = <0x33>;
-                        };
-                };
+                                db8500_vmodem_reg: db8500_vmodem {
+                                        regulator-name = "db8500-vmodem";
+                                };
 
-                i2c@80128000 {
-                        lp5521@0x33 {
-                                compatible = "lp5521";
-                                reg = <0x33>;
-                        };
+                                db8500_vpll_reg: db8500_vpll {
+                                        regulator-name = "db8500-vpll";
+                                };
 
-                        lp5521@0x34 {
-                                compatible = "lp5521";
-                                reg = <0x34>;
-                        };
+                                db8500_vsmps1_reg: db8500_vsmps1 {
+                                        regulator-name = "db8500-vsmps1";
+                                };
+
+                                db8500_vsmps2_reg: db8500_vsmps2 {
+                                        regulator-name = "db8500-vsmps2";
+                                };
+
+                                db8500_vsmps3_reg: db8500_vsmps3 {
+                                        regulator-name = "db8500-vsmps3";
+                                };
+
+                                db8500_vrf1_reg: db8500_vrf1 {
+                                        regulator-name = "db8500-vrf1";
+                                };
+
+                                db8500_sva_mmdsp_reg: db8500_sva_mmdsp {
+                                        regulator-name = "db8500-sva-mmdsp";
+                                };
+
+                                db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret {
+                                        regulator-name = "db8500-sva-mmdsp-ret";
+                                };
+
+                                db8500_sva_pipe_reg: db8500_sva_pipe {
+                                        regulator-name = "db8500_sva_pipe";
+                                };
 
-                        bh1780@0x29 {
-                                compatible = "rohm,bh1780gli";
-                                reg = <0x33>;
+                                db8500_sia_mmdsp_reg: db8500_sia_mmdsp {
+                                        regulator-name = "db8500_sia_mmdsp";
+                                };
+
+                                db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret {
+                                        regulator-name = "db8500-sia-mmdsp-ret";
+                                };
+
+                                db8500_sia_pipe_reg: db8500_sia_pipe {
+                                        regulator-name = "db8500-sia-pipe";
+                                };
+
+                                db8500_sga_reg: db8500_sga {
+                                        regulator-name = "db8500-sga";
+                                };
+
+                                db8500_b2r2_mcde_reg: db8500_b2r2_mcde {
+                                        regulator-name = "db8500-b2r2-mcde";
+                                };
+
+                                db8500_esram12_reg: db8500_esram12 {
+                                        regulator-name = "db8500-esram12";
+                                };
+
+                                db8500_esram12_ret_reg: db8500_esram12_ret {
+                                        regulator-name = "db8500-esram12-ret";
+                                };
+
+                                db8500_esram34_reg: db8500_esram34 {
+                                        regulator-name = "db8500-esram34";
+                                };
+
+                                db8500_esram34_ret_reg: db8500_esram34_ret {
+                                        regulator-name = "db8500-esram34-ret";
+                                };
                         };
-                };
 
-                sound {
-                        compatible = "stericsson,snd-soc-mop500";
+                        ab8500@5 {
+                                ab8500-regulators {
+                                        ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
+                                                regulator-name = "V-DISPLAY";
+                                        };
 
-                        stericsson,cpu-dai = <&msp1 &msp3>;
-                        stericsson,audio-codec = <&codec>;
-                };
+                                        ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
+                                                regulator-name = "V-eMMC1";
+                                        };
 
-                msp1: msp@80124000 {
-                        status = "okay";
-                };
+                                        ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
+                                                regulator-name = "V-MMC-SD";
+                                        };
 
-                msp3: msp@80125000 {
-                        status = "okay";
+                                        ab8500_ldo_initcore_reg: ab8500_ldo_initcore {
+                                                regulator-name = "V-INTCORE";
+                                        };
+
+                                        ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
+                                                regulator-name = "V-TVOUT";
+                                        };
+
+                                        ab8500_ldo_usb_reg: ab8500_ldo_usb {
+                                                regulator-name = "dummy";
+                                        };
+
+                                        ab8500_ldo_audio_reg: ab8500_ldo_audio {
+                                                regulator-name = "V-AUD";
+                                        };
+
+                                        ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
+                                                regulator-name = "V-AMIC1";
+                                        };
+
+                                        ab8500_ldo_amamic2_reg: ab8500_ldo_amamic2 {
+                                                regulator-name = "V-AMIC2";
+                                        };
+
+                                        ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
+                                                regulator-name = "V-DMIC";
+                                        };
+
+                                        ab8500_ldo_ana_reg: ab8500_ldo_ana {
+                                                regulator-name = "V-CSI/DSI";
+                                        };
+                                };
+                        };
                 };
         };
 };
diff --git a/arch/arm/boot/dts/imx23-olinuxino.dts b/arch/arm/boot/dts/imx23-olinuxino.dts
index 384d8b66f337..7c43b8e70b9f 100644
--- a/arch/arm/boot/dts/imx23-olinuxino.dts
+++ b/arch/arm/boot/dts/imx23-olinuxino.dts
@@ -40,6 +40,15 @@
                                         reg = <0>;
                                         fsl,pinmux-ids = <
                                                 0x2013 /* MX23_PAD_SSP1_DETECT__GPIO_2_1 */
+                                        >;
+                                        fsl,drive-strength = <0>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <0>;
+                                };
+
+                                led_pin_gpio0_17: led_gpio0_17@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
                                                 0x0113 /* MX23_PAD_GPMI_ALE__GPIO_0_17 */
                                         >;
                                         fsl,drive-strength = <0>;
@@ -47,6 +56,15 @@
                                         fsl,pull-up = <0>;
                                 };
                         };
+
+                        ssp1: ssp@80034000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,imx23-spi";
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&spi2_pins_a>;
+                                status = "okay";
+                        };
                 };
 
                 apbx@80040000 {
@@ -91,11 +109,12 @@
 
         leds {
                 compatible = "gpio-leds";
+                pinctrl-names = "default";
+                pinctrl-0 = <&led_pin_gpio0_17>;
 
                 user {
                         label = "green";
-                        gpios = <&gpio2 1 0>;
-                        linux,default-trigger = "default-on";
+                        gpios = <&gpio2 1 1>;
                 };
         };
 };
diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi
index 6d31aa383460..65415c598a5e 100644
--- a/arch/arm/boot/dts/imx23.dtsi
+++ b/arch/arm/boot/dts/imx23.dtsi
@@ -279,6 +279,19 @@
                                         fsl,voltage = <1>;
                                         fsl,pull-up = <0>;
                                 };
+
+                                spi2_pins_a: spi2@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
+                                                0x0182 /* MX23_PAD_GPMI_WRN__SSP2_SCK */
+                                                0x0142 /* MX23_PAD_GPMI_RDY1__SSP2_CMD */
+                                                0x0002 /* MX23_PAD_GPMI_D00__SSP2_DATA0 */
+                                                0x0032 /* MX23_PAD_GPMI_D03__SSP2_DATA3 */
+                                        >;
+                                        fsl,drive-strength = <1>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <1>;
+                                };
                         };
 
                         digctl@8001c000 {
diff --git a/arch/arm/boot/dts/imx25-karo-tx25.dts b/arch/arm/boot/dts/imx25-karo-tx25.dts
new file mode 100644
index 000000000000..d81f8a0b9794
--- /dev/null
+++ b/arch/arm/boot/dts/imx25-karo-tx25.dts
@@ -0,0 +1,44 @@
+/*
+ * Copyright 2012 Sascha Hauer, Pengutronix
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "imx25.dtsi"
+
+/ {
+        model = "Ka-Ro TX25";
+        compatible = "karo,imx25-tx25", "fsl,imx25";
+
+        memory {
+                reg = <0x80000000 0x02000000 0x90000000 0x02000000>;
+        };
+
+        soc {
+                aips@43f00000 {
+                        uart1: serial@43f90000 {
+                                status = "okay";
+                        };
+                };
+
+                spba@50000000 {
+                        fec: ethernet@50038000 {
+                                status = "okay";
+                                phy-mode = "rmii";
+                        };
+                };
+
+                emi@80000000 {
+                        nand@bb000000 {
+                                nand-on-flash-bbt;
+                                status = "okay";
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi
new file mode 100644
index 000000000000..e1b13ebc96d6
--- /dev/null
+++ b/arch/arm/boot/dts/imx25.dtsi
@@ -0,0 +1,515 @@
+/*
+ * Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+        aliases {
+                serial0 = &uart1;
+                serial1 = &uart2;
+                serial2 = &uart3;
+                serial3 = &uart4;
+                serial4 = &uart5;
+                gpio0 = &gpio1;
+                gpio1 = &gpio2;
+                gpio2 = &gpio3;
+                gpio3 = &gpio4;
+                usb0 = &usbotg;
+                usb1 = &usbhost1;
+        };
+
+        asic: asic-interrupt-controller@68000000 {
+                compatible = "fsl,imx25-asic", "fsl,avic";
+                interrupt-controller;
+                #interrupt-cells = <1>;
+                reg = <0x68000000 0x8000000>;
+        };
+
+        clocks {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                osc {
+                        compatible = "fsl,imx-osc", "fixed-clock";
+                        clock-frequency = <24000000>;
+                };
+        };
+
+        soc {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "simple-bus";
+                interrupt-parent = <&asic>;
+                ranges;
+
+                aips@43f00000 { /* AIPS1 */
+                        compatible = "fsl,aips-bus", "simple-bus";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        reg = <0x43f00000 0x100000>;
+                        ranges;
+
+                        i2c1: i2c@43f80000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
+                                reg = <0x43f80000 0x4000>;
+                                clocks = <&clks 48>;
+                                clock-names = "";
+                                interrupts = <3>;
+                                status = "disabled";
+                        };
+
+                        i2c3: i2c@43f84000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
+                                reg = <0x43f84000 0x4000>;
+                                clocks = <&clks 48>;
+                                clock-names = "";
+                                interrupts = <10>;
+                                status = "disabled";
+                        };
+
+                        can1: can@43f88000 {
+                                compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
+                                reg = <0x43f88000 0x4000>;
+                                interrupts = <43>;
+                                clocks = <&clks 75>, <&clks 75>;
+                                clock-names = "ipg", "per";
+                                status = "disabled";
+                        };
+
+                        can2: can@43f8c000 {
+                                compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
+                                reg = <0x43f8c000 0x4000>;
+                                interrupts = <44>;
+                                clocks = <&clks 76>, <&clks 76>;
+                                clock-names = "ipg", "per";
+                                status = "disabled";
+                        };
+
+                        uart1: serial@43f90000 {
+                                compatible = "fsl,imx25-uart", "fsl,imx21-uart";
+                                reg = <0x43f90000 0x4000>;
+                                interrupts = <45>;
+                                clocks = <&clks 120>, <&clks 57>;
+                                clock-names = "ipg", "per";
+                                status = "disabled";
+                        };
+
+                        uart2: serial@43f94000 {
+                                compatible = "fsl,imx25-uart", "fsl,imx21-uart";
+                                reg = <0x43f94000 0x4000>;
+                                interrupts = <32>;
+                                clocks = <&clks 121>, <&clks 57>;
+                                clock-names = "ipg", "per";
+                                status = "disabled";
+                        };
+
+                        i2c2: i2c@43f98000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
+                                reg = <0x43f98000 0x4000>;
+                                clocks = <&clks 48>;
+                                clock-names = "";
+                                interrupts = <4>;
+                                status = "disabled";
+                        };
+
+                        owire@43f9c000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                reg = <0x43f9c000 0x4000>;
+                                clocks = <&clks 51>;
+                                clock-names = "";
+                                interrupts = <2>;
+                                status = "disabled";
+                        };
+
+                        spi1: cspi@43fa4000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
+                                reg = <0x43fa4000 0x4000>;
+                                clocks = <&clks 62>;
+                                clock-names = "ipg";
+                                interrupts = <14>;
+                                status = "disabled";
+                        };
+
+                        kpp@43fa8000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                reg = <0x43fa8000 0x4000>;
+                                clocks = <&clks 102>;
+                                clock-names = "";
+                                interrupts = <24>;
+                                status = "disabled";
+                        };
+
+                        iomuxc@43fac000{
+                                compatible = "fsl,imx25-iomuxc";
+                                reg = <0x43fac000 0x4000>;
+                        };
+
+                        audmux@43fb0000 {
+                                compatible = "fsl,imx25-audmux", "fsl,imx31-audmux";
+                                reg = <0x43fb0000 0x4000>;
+                                status = "disabled";
+                        };
+                };
+
+                spba@50000000 {
+                        compatible = "fsl,spba-bus", "simple-bus";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        reg = <0x50000000 0x40000>;
+                        ranges;
+
+                        spi3: cspi@50004000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
+                                reg = <0x50004000 0x4000>;
+                                interrupts = <0>;
+                                clocks = <&clks 80>;
+                                clock-names = "ipg";
+                                status = "disabled";
+                        };
+
+                        uart4: serial@50008000 {
+                                compatible = "fsl,imx25-uart", "fsl,imx21-uart";
+                                reg = <0x50008000 0x4000>;
+                                interrupts = <5>;
+                                clocks = <&clks 123>, <&clks 57>;
+                                clock-names = "ipg", "per";
+                                status = "disabled";
+                        };
+
+                        uart3: serial@5000c000 {
+                                compatible = "fsl,imx25-uart", "fsl,imx21-uart";
+                                reg = <0x5000c000 0x4000>;
+                                interrupts = <18>;
+                                clocks = <&clks 122>, <&clks 57>;
+                                clock-names = "ipg", "per";
+                                status = "disabled";
+                        };
+
+                        spi2: cspi@50010000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
+                                reg = <0x50010000 0x4000>;
+                                clocks = <&clks 79>;
+                                clock-names = "ipg";
+                                interrupts = <13>;
+                                status = "disabled";
+                        };
+
+                        ssi2: ssi@50014000 {
+                                compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
+                                reg = <0x50014000 0x4000>;
+                                interrupts = <11>;
+                                status = "disabled";
+                        };
+
+                        esai@50018000 {
+                                reg = <0x50018000 0x4000>;
+                                interrupts = <7>;
+                        };
+
+                        uart5: serial@5002c000 {
+                                compatible = "fsl,imx25-uart", "fsl,imx21-uart";
+                                reg = <0x5002c000 0x4000>;
+                                interrupts = <40>;
+                                clocks = <&clks 124>, <&clks 57>;
+                                clock-names = "ipg", "per";
+                                status = "disabled";
+                        };
+
+                        tsc: tsc@50030000 {
+                                compatible = "fsl,imx25-adc", "fsl,imx21-tsc";
+                                reg = <0x50030000 0x4000>;
+                                interrupts = <46>;
+                                clocks = <&clks 119>;
+                                clock-names = "ipg";
+                                status = "disabled";
+                        };
+
+                        ssi1: ssi@50034000 {
+                                compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
+                                reg = <0x50034000 0x4000>;
+                                interrupts = <12>;
+                                status = "disabled";
+                        };
+
+                        fec: ethernet@50038000 {
+                                compatible = "fsl,imx25-fec";
+                                reg = <0x50038000 0x4000>;
+                                interrupts = <57>;
+                                clocks = <&clks 88>, <&clks 65>;
+                                clock-names = "ipg", "ahb";
+                                status = "disabled";
+                        };
+                };
+
+                aips@53f00000 { /* AIPS2 */
+                        compatible = "fsl,aips-bus", "simple-bus";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        reg = <0x53f00000 0x100000>;
+                        ranges;
+
+                        clks: ccm@53f80000 {
+                                compatible = "fsl,imx25-ccm";
+                                reg = <0x53f80000 0x4000>;
+                                interrupts = <31>;
+                                #clock-cells = <1>;
+                        };
+
+                        gpt4: timer@53f84000 {
+                                compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
+                                reg = <0x53f84000 0x4000>;
+                                clocks = <&clks 9>, <&clks 45>;
+                                clock-names = "ipg", "per";
+                                interrupts = <1>;
+                        };
+
+                        gpt3: timer@53f88000 {
+                                compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
+                                reg = <0x53f88000 0x4000>;
+                                clocks = <&clks 9>, <&clks 47>;
+                                clock-names = "ipg", "per";
+                                interrupts = <29>;
+                        };
+
+                        gpt2: timer@53f8c000 {
+                                compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
+                                reg = <0x53f8c000 0x4000>;
+                                clocks = <&clks 9>, <&clks 47>;
+                                clock-names = "ipg", "per";
+                                interrupts = <53>;
+                        };
+
+                        gpt1: timer@53f90000 {
+                                compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
+                                reg = <0x53f90000 0x4000>;
+                                clocks = <&clks 9>, <&clks 47>;
+                                clock-names = "ipg", "per";
+                                interrupts = <54>;
+                        };
+
+                        epit1: timer@53f94000 {
+                                compatible = "fsl,imx25-epit";
+                                reg = <0x53f94000 0x4000>;
+                                interrupts = <28>;
+                        };
+
+                        epit2: timer@53f98000 {
+                                compatible = "fsl,imx25-epit";
+                                reg = <0x53f98000 0x4000>;
+                                interrupts = <27>;
+                        };
+
+                        gpio4: gpio@53f9c000 {
+                                compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
+                                reg = <0x53f9c000 0x4000>;
+                                interrupts = <23>;
+                                gpio-controller;
+                                #gpio-cells = <2>;
+                                interrupt-controller;
+                                #interrupt-cells = <2>;
+                        };
+
+                        pwm2: pwm@53fa0000 {
+                                compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
+                                #pwm-cells = <2>;
+                                reg = <0x53fa0000 0x4000>;
+                                clocks = <&clks 106>, <&clks 36>;
+                                clock-names = "ipg", "per";
+                                interrupts = <36>;
+                        };
+
+                        gpio3: gpio@53fa4000 {
+                                compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
+                                reg = <0x53fa4000 0x4000>;
+                                interrupts = <16>;
+                                gpio-controller;
+                                #gpio-cells = <2>;
+                                interrupt-controller;
+                                #interrupt-cells = <2>;
+                        };
+
+                        pwm3: pwm@53fa8000 {
+                                compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
+                                #pwm-cells = <2>;
+                                reg = <0x53fa8000 0x4000>;
+                                clocks = <&clks 107>, <&clks 36>;
+                                clock-names = "ipg", "per";
+                                interrupts = <41>;
+                        };
+
+                        esdhc1: esdhc@53fb4000 {
+                                compatible = "fsl,imx25-esdhc";
+                                reg = <0x53fb4000 0x4000>;
+                                interrupts = <9>;
+                                clocks = <&clks 86>, <&clks 63>, <&clks 45>;
+                                clock-names = "ipg", "ahb", "per";
+                                status = "disabled";
+                        };
+
+                        esdhc2: esdhc@53fb8000 {
+                                compatible = "fsl,imx25-esdhc";
+                                reg = <0x53fb8000 0x4000>;
+                                interrupts = <8>;
+                                clocks = <&clks 87>, <&clks 64>, <&clks 46>;
+                                clock-names = "ipg", "ahb", "per";
+                                status = "disabled";
+                        };
+
+                        lcdc@53fbc000 {
+                                reg = <0x53fbc000 0x4000>;
+                                interrupts = <39>;
+                                clocks = <&clks 103>, <&clks 66>, <&clks 49>;
+                                clock-names = "ipg", "ahb", "per";
+                                status = "disabled";
+                        };
+
+                        slcdc@53fc0000 {
+                                reg = <0x53fc0000 0x4000>;
+                                interrupts = <38>;
+                                status = "disabled";
+                        };
+
+                        pwm4: pwm@53fc8000 {
+                                compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
+                                reg = <0x53fc8000 0x4000>;
+                                clocks = <&clks 108>, <&clks 36>;
+                                clock-names = "ipg", "per";
+                                interrupts = <42>;
+                        };
+
+                        gpio1: gpio@53fcc000 {
+                                compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
+                                reg = <0x53fcc000 0x4000>;
+                                interrupts = <52>;
+                                gpio-controller;
+                                #gpio-cells = <2>;
+                                interrupt-controller;
+                                #interrupt-cells = <2>;
+                        };
+
+                        gpio2: gpio@53fd0000 {
+                                compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
+                                reg = <0x53fd0000 0x4000>;
+                                interrupts = <51>;
+                                gpio-controller;
+                                #gpio-cells = <2>;
+                                interrupt-controller;
+                                #interrupt-cells = <2>;
+                        };
+
+                        sdma@53fd4000 {
+                                compatible = "fsl,imx25-sdma", "fsl,imx35-sdma";
+                                reg = <0x53fd4000 0x4000>;
+                                clocks = <&clks 112>, <&clks 68>;
+                                clock-names = "ipg", "ahb";
+                                interrupts = <34>;
+                        };
+
+                        wdog@53fdc000 {
+                                compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
+                                reg = <0x53fdc000 0x4000>;
+                                clocks = <&clks 126>;
+                                clock-names = "";
+                                interrupts = <55>;
+                        };
+
+                        pwm1: pwm@53fe0000 {
+                                compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
+                                #pwm-cells = <2>;
+                                reg = <0x53fe0000 0x4000>;
+                                clocks = <&clks 105>, <&clks 36>;
+                                clock-names = "ipg", "per";
+                                interrupts = <26>;
+                        };
+
+                        usbphy1: usbphy@1 {
+                                compatible = "nop-usbphy";
+                                status = "disabled";
+                        };
+
+                        usbphy2: usbphy@2 {
+                                compatible = "nop-usbphy";
+                                status = "disabled";
+                        };
+
+                        usbotg: usb@53ff4000 {
+                                compatible = "fsl,imx25-usb", "fsl,imx27-usb";
+                                reg = <0x53ff4000 0x0200>;
+                                interrupts = <37>;
+                                clocks = <&clks 9>, <&clks 70>, <&clks 8>;
+                                clock-names = "ipg", "ahb", "per";
+                                fsl,usbmisc = <&usbmisc 0>;
+                                status = "disabled";
+                        };
+
+                        usbhost1: usb@53ff4400 {
+                                compatible = "fsl,imx25-usb", "fsl,imx27-usb";
+                                reg = <0x53ff4400 0x0200>;
+                                interrupts = <35>;
+                                clocks = <&clks 9>, <&clks 70>, <&clks 8>;
+                                clock-names = "ipg", "ahb", "per";
+                                fsl,usbmisc = <&usbmisc 1>;
+                                status = "disabled";
+                        };
+
+                        usbmisc: usbmisc@53ff4600 {
+                                #index-cells = <1>;
+                                compatible = "fsl,imx25-usbmisc";
+                                clocks = <&clks 9>, <&clks 70>, <&clks 8>;
+                                clock-names = "ipg", "ahb", "per";
+                                reg = <0x53ff4600 0x00f>;
+                                status = "disabled";
+                        };
+
+                        dryice@53ffc000 {
+                                compatible = "fsl,imx25-dryice", "fsl,imx25-rtc";
+                                reg = <0x53ffc000 0x4000>;
+                                clocks = <&clks 81>;
+                                clock-names = "ipg";
+                                interrupts = <25>;
+                        };
+                };
+
+                emi@80000000 {
+                        compatible = "fsl,emi-bus", "simple-bus";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        reg = <0x80000000 0x3b002000>;
+                        ranges;
+
+                        nand@bb000000 {
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+
+                                compatible = "fsl,imx25-nand";
+                                reg = <0xbb000000 0x2000>;
+                                clocks = <&clks 50>;
+                                clock-names = "";
+                                interrupts = <33>;
+                                status = "disabled";
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/imx27-apf27.dts b/arch/arm/boot/dts/imx27-apf27.dts
new file mode 100644
index 000000000000..c0327c054de2
--- /dev/null
+++ b/arch/arm/boot/dts/imx27-apf27.dts
@@ -0,0 +1,89 @@
+/*
+ * Copyright 2012 Philippe Reynes <tremyfr@yahoo.fr>
+ * Copyright 2012 Armadeus Systems <support@armadeus.com>
+ *
+ * Based on code which is: Copyright 2012 Sascha Hauer, Pengutronix
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "imx27.dtsi"
+
+/ {
+        model = "Armadeus Systems APF27 module";
+        compatible = "armadeus,imx27-apf27", "fsl,imx27";
+
+        memory {
+                reg = <0xa0000000 0x04000000>;
+        };
+
+        clocks {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                osc26m {
+                        compatible = "fsl,imx-osc26m", "fixed-clock";
+                        clock-frequency = <0>;
+                };
+        };
+
+        soc {
+                aipi@10000000 {
+                        serial@1000a000 {
+                                status = "okay";
+                        };
+
+                        ethernet@1002b000 {
+                                status = "okay";
+                        };
+                };
+
+                nand@d8000000 {
+                        status = "okay";
+                        nand-bus-width = <16>;
+                        nand-ecc-mode = "hw";
+                        nand-on-flash-bbt;
+
+                        partition@0 {
+                                label = "u-boot";
+                                reg = <0x0 0x100000>;
+                        };
+
+                        partition@100000 {
+                                label = "env";
+                                reg = <0x100000 0x80000>;
+                        };
+
+                        partition@180000 {
+                                label = "env2";
+                                reg = <0x180000 0x80000>;
+                        };
+
+                        partition@200000 {
+                                label = "firmware";
+                                reg = <0x200000 0x80000>;
+                        };
+
+                        partition@280000 {
+                                label = "dtb";
+                                reg = <0x280000 0x80000>;
+                        };
+
+                        partition@300000 {
+                                label = "kernel";
+                                reg = <0x300000 0x500000>;
+                        };
+
+                        partition@800000 {
+                                label = "rootfs";
+                                reg = <0x800000 0xf800000>;
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi
index 3e54f1498841..b8d3905915ac 100644
--- a/arch/arm/boot/dts/imx27.dtsi
+++ b/arch/arm/boot/dts/imx27.dtsi
@@ -58,7 +58,7 @@
                         reg = <0x10000000 0x10000000>;
                         ranges;
 
-                        wdog@10002000 {
+                        wdog: wdog@10002000 {
                                 compatible = "fsl,imx27-wdt", "fsl,imx21-wdt";
                                 reg = <0x10002000 0x4000>;
                                 interrupts = <27>;
@@ -113,7 +113,7 @@
                         i2c1: i2c@10012000 {
                                 #address-cells = <1>;
                                 #size-cells = <0>;
-                                compatible = "fsl,imx27-i2c", "fsl,imx1-i2c";
+                                compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
                                 reg = <0x10012000 0x1000>;
                                 interrupts = <12>;
                                 status = "disabled";
@@ -205,7 +205,7 @@
                         i2c2: i2c@1001d000 {
                                 #address-cells = <1>;
                                 #size-cells = <0>;
-                                compatible = "fsl,imx27-i2c", "fsl,imx1-i2c";
+                                compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
                                 reg = <0x1001d000 0x1000>;
                                 interrupts = <1>;
                                 status = "disabled";
@@ -218,7 +218,8 @@
                                 status = "disabled";
                         };
                 };
-                nand@d8000000 {
+
+                nfc: nand@d8000000 {
                         #address-cells = <1>;
                         #size-cells = <1>;
 
diff --git a/arch/arm/boot/dts/imx28-apf28.dts b/arch/arm/boot/dts/imx28-apf28.dts
new file mode 100644
index 000000000000..7eb075876c4c
--- /dev/null
+++ b/arch/arm/boot/dts/imx28-apf28.dts
@@ -0,0 +1,85 @@
+/*
+ * Copyright 2012 Armadeus Systems - <support@armadeus.com>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "imx28.dtsi"
+
+/ {
+        model = "Armadeus Systems APF28 module";
+        compatible = "armadeus,imx28-apf28", "fsl,imx28";
+
+        memory {
+                reg = <0x40000000 0x08000000>;
+        };
+
+        apb@80000000 {
+                apbh@80000000 {
+                        gpmi-nand@8000c000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&gpmi_pins_a &gpmi_status_cfg>;
+                                status = "okay";
+
+                                partition@0 {
+                                        label = "u-boot";
+                                        reg = <0x0 0x300000>;
+                                };
+
+                                partition@300000 {
+                                        label = "env";
+                                        reg = <0x300000 0x80000>;
+                                };
+
+                                partition@380000 {
+                                        label = "env2";
+                                        reg = <0x380000 0x80000>;
+                                };
+
+                                partition@400000 {
+                                        label = "dtb";
+                                        reg = <0x400000 0x80000>;
+                                };
+
+                                partition@480000 {
+                                        label = "splash";
+                                        reg = <0x480000 0x80000>;
+                                };
+
+                                partition@500000 {
+                                        label = "kernel";
+                                        reg = <0x500000 0x800000>;
+                                };
+
+                                partition@d00000 {
+                                        label = "rootfs";
+                                        reg = <0xd00000 0xf300000>;
+                                };
+                        };
+                };
+
+                apbx@80040000 {
+                        duart: serial@80074000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&duart_pins_a>;
+                                status = "okay";
+                        };
+                };
+        };
+
+        ahb@80080000 {
+                mac0: ethernet@800f0000 {
+                        phy-mode = "rmii";
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&mac0_pins_a>;
+                        phy-reset-gpios = <&gpio4 13 0>;
+                        status = "okay";
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/imx28-apf28dev.dts b/arch/arm/boot/dts/imx28-apf28dev.dts
new file mode 100644
index 000000000000..6d8865bfb4b7
--- /dev/null
+++ b/arch/arm/boot/dts/imx28-apf28dev.dts
@@ -0,0 +1,154 @@
+/*
+ * Copyright 2012 Armadeus Systems - <support@armadeus.com>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/* APF28Dev is a docking board for the APF28 SOM */
+/include/ "imx28-apf28.dts"
+
+/ {
+        model = "Armadeus Systems APF28Dev docking/development board";
+        compatible = "armadeus,imx28-apf28dev", "armadeus,imx28-apf28", "fsl,imx28";
+
+        apb@80000000 {
+                apbh@80000000 {
+                        ssp0: ssp@80010000 {
+                                compatible = "fsl,imx28-mmc";
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&mmc0_4bit_pins_a
+                                        &mmc0_cd_cfg &mmc0_sck_cfg>;
+                                bus-width = <4>;
+                                status = "okay";
+                        };
+
+                        ssp2: ssp@80014000 {
+                                compatible = "fsl,imx28-spi";
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&spi2_pins_a>;
+                                status = "okay";
+                        };
+
+                        pinctrl@80018000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&hog_pins_apf28dev>;
+
+                                hog_pins_apf28dev: hog@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
+                                                0x1103 /* MX28_PAD_LCD_D16__GPIO_1_16 */
+                                                0x1113 /* MX28_PAD_LCD_D17__GPIO_1_17 */
+                                                0x1123 /* MX28_PAD_LCD_D18__GPIO_1_18 */
+                                                0x1133 /* MX28_PAD_LCD_D19__GPIO_1_19 */
+                                                0x1143 /* MX28_PAD_LCD_D20__GPIO_1_20 */
+                                                0x1153 /* MX28_PAD_LCD_D21__GPIO_1_21 */
+                                                0x1163 /* MX28_PAD_LCD_D22__GPIO_1_22 */
+                                        >;
+                                        fsl,drive-strength = <0>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <0>;
+                                };
+
+                                lcdif_pins_apf28dev: lcdif-apf28dev@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
+                                                0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */
+                                                0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */
+                                                0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */
+                                                0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */
+                                        >;
+                                        fsl,drive-strength = <0>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <0>;
+                                };
+                        };
+
+                        lcdif@80030000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&lcdif_16bit_pins_a
+                                                &lcdif_pins_apf28dev>;
+                                status = "okay";
+                        };
+                };
+
+                apbx@80040000 {
+                        lradc@80050000 {
+                                status = "okay";
+                        };
+
+                        i2c0: i2c@80058000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&i2c0_pins_a>;
+                                status = "okay";
+                        };
+
+                        pwm: pwm@80064000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pwm3_pins_a &pwm4_pins_a>;
+                                status = "okay";
+                        };
+
+                        usbphy0: usbphy@8007c000 {
+                                status = "okay";
+                        };
+
+                        usbphy1: usbphy@8007e000 {
+                                status = "okay";
+                        };
+                };
+        };
+
+        ahb@80080000 {
+                usb0: usb@80080000 {
+                        vbus-supply = <&reg_usb0_vbus>;
+                        status = "okay";
+                };
+
+                usb1: usb@80090000 {
+                        status = "okay";
+                };
+
+                mac1: ethernet@800f4000 {
+                        phy-mode = "rmii";
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&mac1_pins_a>;
+                        phy-reset-gpios = <&gpio0 23 0>;
+                        status = "okay";
+                };
+        };
+
+        regulators {
+                compatible = "simple-bus";
+
+                reg_usb0_vbus: usb0_vbus {
+                        compatible = "regulator-fixed";
+                        regulator-name = "usb0_vbus";
+                        regulator-min-microvolt = <5000000>;
+                        regulator-max-microvolt = <5000000>;
+                        gpio = <&gpio1 23 1>;
+                };
+        };
+
+        leds {
+                compatible = "gpio-leds";
+
+                user {
+                        label = "Heartbeat";
+                        gpios = <&gpio0 21 0>;
+                        linux,default-trigger = "heartbeat";
+                };
+        };
+
+        backlight {
+                compatible = "pwm-backlight";
+
+                pwms = <&pwm 3 191000>;
+                brightness-levels = <0 4 8 16 32 64 128 255>;
+                default-brightness-level = <6>;
+        };
+};
diff --git a/arch/arm/boot/dts/imx28-cfa10036.dts b/arch/arm/boot/dts/imx28-cfa10036.dts
index c03a577beca3..1594694532b9 100644
--- a/arch/arm/boot/dts/imx28-cfa10036.dts
+++ b/arch/arm/boot/dts/imx28-cfa10036.dts
@@ -22,6 +22,31 @@
 
         apb@80000000 {
                 apbh@80000000 {
+                        pinctrl@80018000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&hog_pins_cfa10036>;
+
+                                hog_pins_cfa10036: hog-10036@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
+                                                0x2073 /* MX28_PAD_SSP0_D7__GPIO_2_7 */
+                                        >;
+                                        fsl,drive-strength = <0>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <0>;
+                                };
+
+                                led_pins_cfa10036: leds-10036@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
+                                                0x3043 /* MX28_PAD_AUART1_RX__GPIO_3_4 */
+                                        >;
+                                        fsl,drive-strength = <0>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <0>;
+                                };
+                        };
+
                         ssp0: ssp@80010000 {
                                 compatible = "fsl,imx28-mmc";
                                 pinctrl-names = "default";
@@ -33,16 +58,37 @@
                 };
 
                 apbx@80040000 {
+                        pwm: pwm@80064000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pwm4_pins_a>;
+                                status = "okay";
+                        };
+
                         duart: serial@80074000 {
                                 pinctrl-names = "default";
                                 pinctrl-0 = <&duart_pins_b>;
                                 status = "okay";
                         };
+
+                        i2c0: i2c@80058000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&i2c0_pins_b>;
+                                status = "okay";
+
+                                ssd1307: oled@3c {
+                                        compatible = "solomon,ssd1307fb-i2c";
+                                        reg = <0x3c>;
+                                        pwms = <&pwm 4 3000>;
+                                        reset-gpios = <&gpio2 7 0>;
+                                };
+                        };
                 };
         };
 
         leds {
                 compatible = "gpio-leds";
+                pinctrl-names = "default";
+                pinctrl-0 = <&led_pins_cfa10036>;
 
                 power {
                         gpios = <&gpio3 4 1>;
diff --git a/arch/arm/boot/dts/imx28-cfa10049.dts b/arch/arm/boot/dts/imx28-cfa10049.dts
index 05c892e931e3..b222614ac9e0 100644
--- a/arch/arm/boot/dts/imx28-cfa10049.dts
+++ b/arch/arm/boot/dts/imx28-cfa10049.dts
@@ -22,6 +22,22 @@
         apb@80000000 {
                 apbh@80000000 {
                         pinctrl@80018000 {
+                                pinctrl-names = "default", "default";
+                                pinctrl-1 = <&hog_pins_cfa10049>;
+
+                                hog_pins_cfa10049: hog-10049@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
+                                                0x0073 /* MX28_PAD_GPMI_D7__GPIO_0_7 */
+                                                0x1163 /* MX28_PAD_LCD_D22__GPIO_1_22 */
+                                                0x1173 /* MX28_PAD_LCD_D22__GPIO_1_23 */
+                                                0x2153 /* MX28_PAD_SSP2_D5__GPIO_2_21 */
+                                        >;
+                                        fsl,drive-strength = <0>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <0>;
+                                };
+
                                 spi3_pins_cfa10049: spi3-cfa10049@0 {
                                         reg = <0>;
                                         fsl,pinmux-ids = <
@@ -29,6 +45,7 @@
                                                 0x01c1 /* MX28_PAD_GPMI_RESETN__SSP3_CMD */
                                                 0x0111 /* MX28_PAD_GPMI_CE1N__SSP3_D3 */
                                                 0x01a2 /* MX28_PAD_GPMI_ALE__SSP3_D4 */
+                                                0x01b2 /* MX28_PAD_GPMI_CLE__SSP3_D5 */
                                         >;
                                         fsl,drive-strength = <1>;
                                         fsl,voltage = <1>;
@@ -60,6 +77,11 @@
                                         spi-max-frequency = <100000>;
                                 };
 
+                                dac0: dh2228@2 {
+                                        compatible = "rohm,dh2228fv";
+                                        reg = <2>;
+                                        spi-max-frequency = <100000>;
+                                };
                         };
                 };
 
@@ -96,4 +118,15 @@
                         gpio = <&gpio0 7 1>;
                 };
         };
+
+        ahb@80080000 {
+                mac0: ethernet@800f0000 {
+                        phy-mode = "rmii";
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&mac0_pins_a>;
+                        phy-reset-gpios = <&gpio2 21 0>;
+                        phy-reset-duration = <100>;
+                        status = "okay";
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/imx28-evk.dts b/arch/arm/boot/dts/imx28-evk.dts
index a0ad71ca3a44..2da316e04409 100644
--- a/arch/arm/boot/dts/imx28-evk.dts
+++ b/arch/arm/boot/dts/imx28-evk.dts
@@ -76,7 +76,6 @@
                                                 0x20c3 /* MX28_PAD_SSP1_SCK__GPIO_2_12 */
                                                 0x31c3 /* MX28_PAD_PWM3__GPIO_3_28 */
                                                 0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */
-                                                0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */
                                                 0x3083 /* MX28_PAD_AUART2_RX__GPIO_3_8 */
                                                 0x3093 /* MX28_PAD_AUART2_TX__GPIO_3_9 */
                                         >;
@@ -85,6 +84,16 @@
                                         fsl,pull-up = <0>;
                                 };
 
+                                led_pin_gpio3_5: led_gpio3_5@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
+                                                0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */
+                                        >;
+                                        fsl,drive-strength = <0>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <0>;
+                                };
+
                                 gpmi_pins_evk: gpmi-nand-evk@0 {
                                         reg = <0>;
                                         fsl,pinmux-ids = <
@@ -288,6 +297,8 @@
 
         leds {
                 compatible = "gpio-leds";
+                pinctrl-names = "default";
+                pinctrl-0 = <&led_pin_gpio3_5>;
 
                 user {
                         label = "Heartbeat";
diff --git a/arch/arm/boot/dts/imx28-sps1.dts b/arch/arm/boot/dts/imx28-sps1.dts
new file mode 100644
index 000000000000..e6cde8aa7fff
--- /dev/null
+++ b/arch/arm/boot/dts/imx28-sps1.dts
@@ -0,0 +1,169 @@
+/*
+ * Copyright (C) 2012 Marek Vasut <marex@denx.de>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "imx28.dtsi"
+
+/ {
+        model = "SchulerControl GmbH, SC SPS 1";
+        compatible = "schulercontrol,imx28-sps1", "fsl,imx28";
+
+        memory {
+                reg = <0x40000000 0x08000000>;
+        };
+
+        apb@80000000 {
+                apbh@80000000 {
+                        pinctrl@80018000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&hog_pins_a>;
+
+                                hog_pins_a: hog-gpios@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
+                                                0x0003 /* MX28_PAD_GPMI_D00__GPIO_0_0 */
+                                                0x0033 /* MX28_PAD_GPMI_D03__GPIO_0_3 */
+                                                0x0063 /* MX28_PAD_GPMI_D06__GPIO_0_6 */
+                                        >;
+                                        fsl,drive-strength = <0>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <0>;
+                                };
+
+                        };
+
+                        ssp0: ssp@80010000 {
+                                compatible = "fsl,imx28-mmc";
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&mmc0_4bit_pins_a>;
+                                bus-width = <4>;
+                                status = "okay";
+                        };
+
+                        ssp2: ssp@80014000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,imx28-spi";
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&spi2_pins_a>;
+                                status = "okay";
+
+                                flash: m25p80@0 {
+                                        #address-cells = <1>;
+                                        #size-cells = <1>;
+                                        compatible = "everspin,mr25h256", "mr25h256";
+                                        spi-max-frequency = <40000000>;
+                                        reg = <0>;
+                                };
+                        };
+                };
+
+                apbx@80040000 {
+                        i2c0: i2c@80058000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&i2c0_pins_a>;
+                                clock-frequency = <400000>;
+                                status = "okay";
+
+                                rtc: rtc@51 {
+                                        compatible = "nxp,pcf8563";
+                                        reg = <0x51>;
+                                };
+
+                                eeprom: eeprom@52 {
+                                        compatible = "atmel,24c64";
+                                        reg = <0x52>;
+                                        pagesize = <32>;
+                                };
+                        };
+
+                        duart: serial@80074000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&duart_pins_a>;
+                                status = "okay";
+                        };
+
+                        usbphy0: usbphy@8007c000 {
+                                status = "okay";
+                        };
+
+                        auart0: serial@8006a000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&auart0_pins_a>;
+                                status = "okay";
+                        };
+                };
+        };
+
+        ahb@80080000 {
+                usb0: usb@80080000 {
+                        vbus-supply = <&reg_usb0_vbus>;
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&usbphy0_pins_b>;
+                        status = "okay";
+                };
+
+                mac0: ethernet@800f0000 {
+                        phy-mode = "rmii";
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&mac0_pins_a>;
+                        status = "okay";
+                };
+
+                mac1: ethernet@800f4000 {
+                        phy-mode = "rmii";
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&mac1_pins_a>;
+                        status = "okay";
+                };
+        };
+
+        regulators {
+                compatible = "simple-bus";
+
+                reg_usb0_vbus: usb0_vbus {
+                        compatible = "regulator-fixed";
+                        regulator-name = "usb0_vbus";
+                        regulator-min-microvolt = <5000000>;
+                        regulator-max-microvolt = <5000000>;
+                        gpio = <&gpio3 9 0>;
+                };
+        };
+
+        leds {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "gpio-leds";
+                status = "okay";
+
+                led@1 {
+                        label = "sps1-1:yellow:user";
+                        gpios = <&gpio0 6 0>;
+                        linux,default-trigger = "heartbeat";
+                        reg = <0>;
+                };
+
+                led@2 {
+                        label = "sps1-2:red:user";
+                        gpios = <&gpio0 3 0>;
+                        linux,default-trigger = "heartbeat";
+                        reg = <1>;
+                };
+
+                led@3 {
+                        label = "sps1-3:red:user";
+                        gpios = <&gpio0 0 0>;
+                        default-trigger = "heartbeat";
+                        reg = <2>;
+                };
+
+        };
+};
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
index 55c57ea6169e..d7013f73f2e9 100644
--- a/arch/arm/boot/dts/imx28.dtsi
+++ b/arch/arm/boot/dts/imx28.dtsi
@@ -492,6 +492,16 @@
                                         fsl,pull-up = <0>;
                                 };
 
+                                pwm3_pins_a: pwm3@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
+                                                0x31c0 /* MX28_PAD_PWM3__PWM_3 */
+                                        >;
+                                        fsl,drive-strength = <0>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <0>;
+                                };
+
                                 pwm4_pins_a: pwm4@0 {
                                         reg = <0>;
                                         fsl,pinmux-ids = <
@@ -535,6 +545,31 @@
                                         fsl,pull-up = <0>;
                                 };
 
+                                lcdif_16bit_pins_a: lcdif-16bit@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <
+                                                0x1000 /* MX28_PAD_LCD_D00__LCD_D0 */
+                                                0x1010 /* MX28_PAD_LCD_D01__LCD_D1 */
+                                                0x1020 /* MX28_PAD_LCD_D02__LCD_D2 */
+                                                0x1030 /* MX28_PAD_LCD_D03__LCD_D3 */
+                                                0x1040 /* MX28_PAD_LCD_D04__LCD_D4 */
+                                                0x1050 /* MX28_PAD_LCD_D05__LCD_D5 */
+                                                0x1060 /* MX28_PAD_LCD_D06__LCD_D6 */
+                                                0x1070 /* MX28_PAD_LCD_D07__LCD_D7 */
+                                                0x1080 /* MX28_PAD_LCD_D08__LCD_D8 */
+                                                0x1090 /* MX28_PAD_LCD_D09__LCD_D9 */
+                                                0x10a0 /* MX28_PAD_LCD_D10__LCD_D10 */
+                                                0x10b0 /* MX28_PAD_LCD_D11__LCD_D11 */
+                                                0x10c0 /* MX28_PAD_LCD_D12__LCD_D12 */
+                                                0x10d0 /* MX28_PAD_LCD_D13__LCD_D13 */
+                                                0x10e0 /* MX28_PAD_LCD_D14__LCD_D14 */
+                                                0x10f0 /* MX28_PAD_LCD_D15__LCD_D15 */
+                                        >;
+                                        fsl,drive-strength = <0>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <0>;
+                                };
+
                                 can0_pins_a: can0@0 {
                                         reg = <0>;
                                         fsl,pinmux-ids = <
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index 75d069fcf897..1fdee31b4909 100644
--- a/arch/arm/boot/dts/imx51.dtsi
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -76,17 +76,18 @@
                                 reg = <0x70000000 0x40000>;
                                 ranges;
 
-                                esdhc@70004000 { /* ESDHC1 */
+                                esdhc1: esdhc@70004000 {
                                         compatible = "fsl,imx51-esdhc";
                                         reg = <0x70004000 0x4000>;
                                         interrupts = <1>;
                                         status = "disabled";
                                 };
 
-                                esdhc@70008000 { /* ESDHC2 */
+                                esdhc2: esdhc@70008000 {
                                         compatible = "fsl,imx51-esdhc";
                                         reg = <0x70008000 0x4000>;
                                         interrupts = <2>;
+                                        bus-width = <4>;
                                         status = "disabled";
                                 };
 
@@ -97,7 +98,7 @@
                                         status = "disabled";
                                 };
 
-                                ecspi@70010000 { /* ECSPI1 */
+                                ecspi1: ecspi@70010000 {
                                         #address-cells = <1>;
                                         #size-cells = <0>;
                                         compatible = "fsl,imx51-ecspi";
@@ -115,43 +116,45 @@
                                         status = "disabled";
                                 };
 
-                                esdhc@70020000 { /* ESDHC3 */
+                                esdhc3: esdhc@70020000 {
                                         compatible = "fsl,imx51-esdhc";
                                         reg = <0x70020000 0x4000>;
                                         interrupts = <3>;
+                                        bus-width = <4>;
                                         status = "disabled";
                                 };
 
-                                esdhc@70024000 { /* ESDHC4 */
+                                esdhc4: esdhc@70024000 {
                                         compatible = "fsl,imx51-esdhc";
                                         reg = <0x70024000 0x4000>;
                                         interrupts = <4>;
+                                        bus-width = <4>;
                                         status = "disabled";
                                 };
                         };
 
-                        usb@73f80000 {
+                        usbotg: usb@73f80000 {
                                 compatible = "fsl,imx51-usb", "fsl,imx27-usb";
                                 reg = <0x73f80000 0x0200>;
                                 interrupts = <18>;
                                 status = "disabled";
                         };
 
-                        usb@73f80200 {
+                        usbh1: usb@73f80200 {
                                 compatible = "fsl,imx51-usb", "fsl,imx27-usb";
                                 reg = <0x73f80200 0x0200>;
                                 interrupts = <14>;
                                 status = "disabled";
                         };
 
-                        usb@73f80400 {
+                        usbh2: usb@73f80400 {
                                 compatible = "fsl,imx51-usb", "fsl,imx27-usb";
                                 reg = <0x73f80400 0x0200>;
                                 interrupts = <16>;
                                 status = "disabled";
                         };
 
-                        usb@73f80600 {
+                        usbh3: usb@73f80600 {
                                 compatible = "fsl,imx51-usb", "fsl,imx27-usb";
                                 reg = <0x73f80600 0x0200>;
                                 interrupts = <17>;
@@ -198,20 +201,20 @@
                                 #interrupt-cells = <2>;
                         };
 
-                        wdog@73f98000 { /* WDOG1 */
+                        wdog1: wdog@73f98000 {
                                 compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
                                 reg = <0x73f98000 0x4000>;
                                 interrupts = <58>;
                         };
 
-                        wdog@73f9c000 { /* WDOG2 */
+                        wdog2: wdog@73f9c000 {
                                 compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
                                 reg = <0x73f9c000 0x4000>;
                                 interrupts = <59>;
                                 status = "disabled";
                         };
 
-                        iomuxc@73fa8000 {
+                        iomuxc: iomuxc@73fa8000 {
                                 compatible = "fsl,imx51-iomuxc";
                                 reg = <0x73fa8000 0x4000>;
 
@@ -349,7 +352,7 @@
                         reg = <0x80000000 0x10000000>;
                         ranges;
 
-                        ecspi@83fac000 { /* ECSPI2 */
+                        ecspi2: ecspi@83fac000 {
                                 #address-cells = <1>;
                                 #size-cells = <0>;
                                 compatible = "fsl,imx51-ecspi";
@@ -358,14 +361,14 @@
                                 status = "disabled";
                         };
 
-                        sdma@83fb0000 {
+                        sdma: sdma@83fb0000 {
                                 compatible = "fsl,imx51-sdma", "fsl,imx35-sdma";
                                 reg = <0x83fb0000 0x4000>;
                                 interrupts = <6>;
                                 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin";
                         };
 
-                        cspi@83fc0000 {
+                        cspi: cspi@83fc0000 {
                                 #address-cells = <1>;
                                 #size-cells = <0>;
                                 compatible = "fsl,imx51-cspi", "fsl,imx35-cspi";
@@ -374,19 +377,19 @@
                                 status = "disabled";
                         };
 
-                        i2c@83fc4000 { /* I2C2 */
+                        i2c2: i2c@83fc4000 {
                                 #address-cells = <1>;
                                 #size-cells = <0>;
-                                compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
+                                compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
                                 reg = <0x83fc4000 0x4000>;
                                 interrupts = <63>;
                                 status = "disabled";
                         };
 
-                        i2c@83fc8000 { /* I2C1 */
+                        i2c1: i2c@83fc8000 {
                                 #address-cells = <1>;
                                 #size-cells = <0>;
-                                compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
+                                compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
                                 reg = <0x83fc8000 0x4000>;
                                 interrupts = <62>;
                                 status = "disabled";
@@ -401,13 +404,13 @@
                                 status = "disabled";
                         };
 
-                        audmux@83fd0000 {
+                        audmux: audmux@83fd0000 {
                                 compatible = "fsl,imx51-audmux", "fsl,imx31-audmux";
                                 reg = <0x83fd0000 0x4000>;
                                 status = "disabled";
                         };
 
-                        nand@83fdb000 {
+                        nfc: nand@83fdb000 {
                                 compatible = "fsl,imx51-nand";
                                 reg = <0x83fdb000 0x1000 0xcfff0000 0x10000>;
                                 interrupts = <8>;
@@ -423,7 +426,7 @@
                                 status = "disabled";
                         };
 
-                        ethernet@83fec000 {
+                        fec: ethernet@83fec000 {
                                 compatible = "fsl,imx51-fec", "fsl,imx27-fec";
                                 reg = <0x83fec000 0x4000>;
                                 interrupts = <87>;
diff --git a/arch/arm/boot/dts/imx53-qsb.dts b/arch/arm/boot/dts/imx53-qsb.dts
index 08948af86d1a..b0075537195b 100644
--- a/arch/arm/boot/dts/imx53-qsb.dts
+++ b/arch/arm/boot/dts/imx53-qsb.dts
@@ -60,10 +60,17 @@
                                                         697  0x80000000 /* MX53_PAD_EIM_DA12__GPIO3_12 */
                                                         701  0x80000000 /* MX53_PAD_EIM_DA13__GPIO3_13 */
                                                         868  0x80000000 /* MX53_PAD_PATA_DA_0__GPIO7_6 */
+                                                        1149 0x80000000 /* MX53_PAD_GPIO_16__GPIO7_11 */
+                                                >;
+                                        };
+
+                                        led_pin_gpio7_7: led_gpio7_7@0 {
+                                                fsl,pins = <
                                                         873  0x80000000 /* MX53_PAD_PATA_DA_1__GPIO7_7 */
                                                 >;
                                         };
                                 };
+
                         };
 
                         uart1: serial@53fbc000 {
@@ -100,76 +107,93 @@
                                 pmic: dialog@48 {
                                         compatible = "dlg,da9053-aa", "dlg,da9052";
                                         reg = <0x48>;
+                                        interrupt-parent = <&gpio7>;
+                                        interrupts = <11 0x8>; /* low-level active IRQ at GPIO7_11 */
 
                                         regulators {
-                                                buck0 {
+                                                buck1_reg: buck1 {
                                                         regulator-min-microvolt = <500000>;
                                                         regulator-max-microvolt = <2075000>;
+                                                        regulator-always-on;
                                                 };
 
-                                                buck1 {
+                                                buck2_reg: buck2 {
                                                         regulator-min-microvolt = <500000>;
                                                         regulator-max-microvolt = <2075000>;
+                                                        regulator-always-on;
                                                 };
 
-                                                buck2 {
+                                                buck3_reg: buck3 {
                                                         regulator-min-microvolt = <925000>;
                                                         regulator-max-microvolt = <2500000>;
+                                                        regulator-always-on;
                                                 };
 
-                                                buck3 {
+                                                buck4_reg: buck4 {
                                                         regulator-min-microvolt = <925000>;
                                                         regulator-max-microvolt = <2500000>;
+                                                        regulator-always-on;
                                                 };
 
-                                                ldo4 {
+                                                ldo1_reg: ldo1 {
                                                         regulator-min-microvolt = <600000>;
                                                         regulator-max-microvolt = <1800000>;
+                                                        regulator-boot-on;
+                                                        regulator-always-on;
                                                 };
 
-                                                ldo5 {
+                                                ldo2_reg: ldo2 {
+                                                        regulator-min-microvolt = <600000>;
+                                                        regulator-max-microvolt = <1800000>;
+                                                        regulator-always-on;
+                                                };
+
+                                                ldo3_reg: ldo3 {
                                                         regulator-min-microvolt = <600000>;
                                                         regulator-max-microvolt = <1800000>;
+                                                        regulator-always-on;
                                                 };
 
-                                                ldo6 {
+                                                ldo4_reg: ldo4 {
                                                         regulator-min-microvolt = <1725000>;
                                                         regulator-max-microvolt = <3300000>;
+                                                        regulator-always-on;
                                                 };
 
-                                                ldo7 {
+                                                ldo5_reg: ldo5 {
                                                         regulator-min-microvolt = <1725000>;
                                                         regulator-max-microvolt = <3300000>;
+                                                        regulator-always-on;
                                                 };
 
-                                                ldo8 {
+                                                ldo6_reg: ldo6 {
                                                         regulator-min-microvolt = <1200000>;
                                                         regulator-max-microvolt = <3600000>;
+                                                        regulator-always-on;
                                                 };
 
-                                                ldo9 {
+                                                ldo7_reg: ldo7 {
                                                         regulator-min-microvolt = <1200000>;
                                                         regulator-max-microvolt = <3600000>;
+                                                        regulator-always-on;
                                                 };
 
-                                                ldo10 {
+                                                ldo8_reg: ldo8 {
                                                         regulator-min-microvolt = <1200000>;
                                                         regulator-max-microvolt = <3600000>;
+                                                        regulator-always-on;
                                                 };
 
-                                                ldo11 {
+                                                ldo9_reg: ldo9 {
                                                         regulator-min-microvolt = <1200000>;
                                                         regulator-max-microvolt = <3600000>;
+                                                        regulator-always-on;
                                                 };
 
-                                                ldo12 {
+                                                ldo10_reg: ldo10 {
                                                         regulator-min-microvolt = <1250000>;
                                                         regulator-max-microvolt = <3650000>;
-                                                };
-
-                                                ldo13 {
-                                                        regulator-min-microvolt = <1200000>;
-                                                        regulator-max-microvolt = <3600000>;
+                                                        regulator-always-on;
                                                 };
                                         };
                                 };
@@ -216,6 +240,8 @@
 
         leds {
                 compatible = "gpio-leds";
+                pinctrl-names = "default";
+                pinctrl-0 = <&led_pin_gpio7_7>;
 
                 user {
                         label = "Heartbeat";
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 76ebb1ad2675..f45d4b1e21b5 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -81,17 +81,19 @@
                                 reg = <0x50000000 0x40000>;
                                 ranges;
 
-                                esdhc@50004000 { /* ESDHC1 */
+                                esdhc1: esdhc@50004000 {
                                         compatible = "fsl,imx53-esdhc";
                                         reg = <0x50004000 0x4000>;
                                         interrupts = <1>;
+                                        bus-width = <4>;
                                         status = "disabled";
                                 };
 
-                                esdhc@50008000 { /* ESDHC2 */
+                                esdhc2: esdhc@50008000 {
                                         compatible = "fsl,imx53-esdhc";
                                         reg = <0x50008000 0x4000>;
                                         interrupts = <2>;
+                                        bus-width = <4>;
                                         status = "disabled";
                                 };
 
@@ -102,7 +104,7 @@
                                         status = "disabled";
                                 };
 
-                                ecspi@50010000 { /* ECSPI1 */
+                                ecspi1: ecspi@50010000 {
                                         #address-cells = <1>;
                                         #size-cells = <0>;
                                         compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi";
@@ -120,43 +122,45 @@
                                         status = "disabled";
                                 };
 
-                                esdhc@50020000 { /* ESDHC3 */
+                                esdhc3: esdhc@50020000 {
                                         compatible = "fsl,imx53-esdhc";
                                         reg = <0x50020000 0x4000>;
                                         interrupts = <3>;
+                                        bus-width = <4>;
                                         status = "disabled";
                                 };
 
-                                esdhc@50024000 { /* ESDHC4 */
+                                esdhc4: esdhc@50024000 {
                                         compatible = "fsl,imx53-esdhc";
                                         reg = <0x50024000 0x4000>;
                                         interrupts = <4>;
+                                        bus-width = <4>;
                                         status = "disabled";
                                 };
                         };
 
-                        usb@53f80000 {
+                        usbotg: usb@53f80000 {
                                 compatible = "fsl,imx53-usb", "fsl,imx27-usb";
                                 reg = <0x53f80000 0x0200>;
                                 interrupts = <18>;
                                 status = "disabled";
                         };
 
-                        usb@53f80200 {
+                        usbh1: usb@53f80200 {
                                 compatible = "fsl,imx53-usb", "fsl,imx27-usb";
                                 reg = <0x53f80200 0x0200>;
                                 interrupts = <14>;
                                 status = "disabled";
                         };
 
-                        usb@53f80400 {
+                        usbh2: usb@53f80400 {
                                 compatible = "fsl,imx53-usb", "fsl,imx27-usb";
                                 reg = <0x53f80400 0x0200>;
                                 interrupts = <16>;
                                 status = "disabled";
                         };
 
-                        usb@53f80600 {
+                        usbh3: usb@53f80600 {
                                 compatible = "fsl,imx53-usb", "fsl,imx27-usb";
                                 reg = <0x53f80600 0x0200>;
                                 interrupts = <17>;
@@ -203,20 +207,20 @@
                                 #interrupt-cells = <2>;
                         };
 
-                        wdog@53f98000 { /* WDOG1 */
+                        wdog1: wdog@53f98000 {
                                 compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
                                 reg = <0x53f98000 0x4000>;
                                 interrupts = <58>;
                         };
 
-                        wdog@53f9c000 { /* WDOG2 */
+                        wdog2: wdog@53f9c000 {
                                 compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
                                 reg = <0x53f9c000 0x4000>;
                                 interrupts = <59>;
                                 status = "disabled";
                         };
 
-                        iomuxc@53fa8000 {
+                        iomuxc: iomuxc@53fa8000 {
                                 compatible = "fsl,imx53-iomuxc";
                                 reg = <0x53fa8000 0x4000>;
 
@@ -316,6 +320,24 @@
                                         };
                                 };
 
+                                can1 {
+                                        pinctrl_can1_1: can1grp-1 {
+                                                fsl,pins = <
+                                                        847 0x80000000  /* MX53_PAD_PATA_INTRQ__CAN1_TXCAN */
+                                                        853 0x80000000  /* MX53_PAD_PATA_DIOR__CAN1_RXCAN */
+                                                >;
+                                        };
+                                };
+
+                                can2 {
+                                        pinctrl_can2_1: can2grp-1 {
+                                                fsl,pins = <
+                                                        67  0x80000000  /* MX53_PAD_KEY_COL4__CAN2_TXCAN */
+                                                        74  0x80000000  /* MX53_PAD_KEY_ROW4__CAN2_RXCAN */
+                                                >;
+                                        };
+                                };
+
                                 i2c1 {
                                         pinctrl_i2c1_1: i2c1grp-1 {
                                                 fsl,pins = <
@@ -334,6 +356,15 @@
                                         };
                                 };
 
+                                i2c3 {
+                                        pinctrl_i2c3_1: i2c3grp-1 {
+                                                fsl,pins = <
+                                                        1102 0xc0000000 /* MX53_PAD_GPIO_6__I2C3_SDA */
+                                                        1130 0xc0000000 /* MX53_PAD_GPIO_5__I2C3_SCL */
+                                                >;
+                                        };
+                                };
+
                                 uart1 {
                                         pinctrl_uart1_1: uart1grp-1 {
                                                 fsl,pins = <
@@ -369,6 +400,25 @@
                                                 >;
                                         };
                                 };
+
+                                uart4 {
+                                        pinctrl_uart4_1: uart4grp-1 {
+                                                fsl,pins = <
+                                                        11 0x1c5        /* MX53_PAD_KEY_COL0__UART4_TXD_MUX */
+                                                        18 0x1c5        /* MX53_PAD_KEY_ROW0__UART4_RXD_MUX */
+                                                >;
+                                        };
+                                };
+
+                                uart5 {
+                                        pinctrl_uart5_1: uart5grp-1 {
+                                                fsl,pins = <
+                                                        24 0x1c5        /* MX53_PAD_KEY_COL1__UART5_TXD_MUX */
+                                                        31 0x1c5        /* MX53_PAD_KEY_ROW1__UART5_RXD_MUX */
+                                                >;
+                                        };
+                                };
+
                         };
 
                         uart1: serial@53fbc000 {
@@ -429,10 +479,10 @@
                                 #interrupt-cells = <2>;
                         };
 
-                        i2c@53fec000 { /* I2C3 */
+                        i2c3: i2c@53fec000 {
                                 #address-cells = <1>;
                                 #size-cells = <0>;
-                                compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
+                                compatible = "fsl,imx53-i2c", "fsl,imx21-i2c";
                                 reg = <0x53fec000 0x4000>;
                                 interrupts = <64>;
                                 status = "disabled";
@@ -460,7 +510,7 @@
                                 status = "disabled";
                         };
 
-                        ecspi@63fac000 { /* ECSPI2 */
+                        ecspi2: ecspi@63fac000 {
                                 #address-cells = <1>;
                                 #size-cells = <0>;
                                 compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi";
@@ -469,14 +519,14 @@
                                 status = "disabled";
                         };
 
-                        sdma@63fb0000 {
+                        sdma: sdma@63fb0000 {
                                 compatible = "fsl,imx53-sdma", "fsl,imx35-sdma";
                                 reg = <0x63fb0000 0x4000>;
                                 interrupts = <6>;
                                 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
                         };
 
-                        cspi@63fc0000 {
+                        cspi: cspi@63fc0000 {
                                 #address-cells = <1>;
                                 #size-cells = <0>;
                                 compatible = "fsl,imx53-cspi", "fsl,imx35-cspi";
@@ -485,19 +535,19 @@
                                 status = "disabled";
                         };
 
-                        i2c@63fc4000 { /* I2C2 */
+                        i2c2: i2c@63fc4000 {
                                 #address-cells = <1>;
                                 #size-cells = <0>;
-                                compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
+                                compatible = "fsl,imx53-i2c", "fsl,imx21-i2c";
                                 reg = <0x63fc4000 0x4000>;
                                 interrupts = <63>;
                                 status = "disabled";
                         };
 
-                        i2c@63fc8000 { /* I2C1 */
+                        i2c1: i2c@63fc8000 {
                                 #address-cells = <1>;
                                 #size-cells = <0>;
-                                compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
+                                compatible = "fsl,imx53-i2c", "fsl,imx21-i2c";
                                 reg = <0x63fc8000 0x4000>;
                                 interrupts = <62>;
                                 status = "disabled";
@@ -512,13 +562,13 @@
                                 status = "disabled";
                         };
 
-                        audmux@63fd0000 {
+                        audmux: audmux@63fd0000 {
                                 compatible = "fsl,imx53-audmux", "fsl,imx31-audmux";
                                 reg = <0x63fd0000 0x4000>;
                                 status = "disabled";
                         };
 
-                        nand@63fdb000 {
+                        nfc: nand@63fdb000 {
                                 compatible = "fsl,imx53-nand";
                                 reg = <0x63fdb000 0x1000 0xf7ff0000 0x10000>;
                                 interrupts = <8>;
@@ -534,7 +584,7 @@
                                 status = "disabled";
                         };
 
-                        ethernet@63fec000 {
+                        fec: ethernet@63fec000 {
                                 compatible = "fsl,imx53-fec", "fsl,imx25-fec";
                                 reg = <0x63fec000 0x4000>;
                                 interrupts = <87>;
diff --git a/arch/arm/boot/dts/imx6q-sabreauto.dts b/arch/arm/boot/dts/imx6q-sabreauto.dts
new file mode 100644
index 000000000000..826e4ad1477e
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-sabreauto.dts
@@ -0,0 +1,64 @@
+/*
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "imx6q.dtsi"
+
+/ {
+        model = "Freescale i.MX6 Quad SABRE Automotive Board";
+        compatible = "fsl,imx6q-sabreauto", "fsl,imx6q";
+
+        memory {
+                reg = <0x10000000 0x80000000>;
+        };
+
+        soc {
+                aips-bus@02000000 { /* AIPS1 */
+                        iomuxc@020e0000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_hog>;
+
+                                hog {
+                                        pinctrl_hog: hoggrp {
+                                                fsl,pins = <
+                                                        1376 0x80000000 /* MX6Q_PAD_NANDF_CS2__GPIO_6_15 */
+                                                        13   0x80000000 /* MX6Q_PAD_SD2_DAT2__GPIO_1_13 */
+                                                >;
+                                        };
+                                };
+                        };
+                };
+
+                aips-bus@02100000 { /* AIPS2 */
+                        uart4: serial@021f0000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_uart4_1>;
+                                status = "okay";
+                        };
+
+                        ethernet@02188000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_enet_2>;
+                                phy-mode = "rgmii";
+                                status = "okay";
+                        };
+
+                        usdhc@02198000 { /* uSDHC3 */
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_usdhc3_1>;
+                                cd-gpios = <&gpio6 15 0>;
+                                wp-gpios = <&gpio1 13 0>;
+                                status = "okay";
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/imx6q-sabresd.dts b/arch/arm/boot/dts/imx6q-sabresd.dts
index e596c28c214d..a42402562b7b 100644
--- a/arch/arm/boot/dts/imx6q-sabresd.dts
+++ b/arch/arm/boot/dts/imx6q-sabresd.dts
@@ -38,6 +38,8 @@
                                 hog {
                                         pinctrl_hog: hoggrp {
                                                 fsl,pins = <
+                                                        1004 0x80000000 /* MX6Q_PAD_GPIO_4__GPIO_1_4 */
+                                                        1012 0x80000000 /* MX6Q_PAD_GPIO_5__GPIO_1_5 */
                                                         1402 0x80000000 /* MX6Q_PAD_NANDF_D0__GPIO_2_0 */
                                                         1410 0x80000000 /* MX6Q_PAD_NANDF_D1__GPIO_2_1 */
                                                         1418 0x80000000 /* MX6Q_PAD_NANDF_D2__GPIO_2_2 */
@@ -73,4 +75,20 @@
                         };
                 };
         };
+
+        gpio-keys {
+                compatible = "gpio-keys";
+
+                volume-up {
+                        label = "Volume Up";
+                        gpios = <&gpio1 4 0>;
+                        linux,code = <115>; /* KEY_VOLUMEUP */
+                };
+
+                volume-down {
+                        label = "Volume Down";
+                        gpios = <&gpio1 5 0>;
+                        linux,code = <114>; /* KEY_VOLUMEDOWN */
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index f3990b04fecf..6dfeaedef307 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -36,6 +36,14 @@
                         compatible = "arm,cortex-a9";
                         reg = <0>;
                         next-level-cache = <&L2>;
+                        operating-points = <
+                                /* kHz    uV */
+                                792000  1100000
+                                396000  950000
+                                198000  850000
+                        >;
+                        clock-latency = <61036>; /* two CLK32 periods */
+                        cpu0-supply = <&reg_cpu>;
                 };
 
                 cpu@1 {
@@ -100,7 +108,7 @@
                         clocks = <&clks 106>;
                 };
 
-                gpmi-nand@00112000 {
+                nfc: gpmi-nand@00112000 {
                         compatible = "fsl,imx6q-gpmi-nand";
                         #address-cells = <1>;
                         #size-cells = <1>;
@@ -144,12 +152,12 @@
                                 reg = <0x02000000 0x40000>;
                                 ranges;
 
-                                spdif@02004000 {
+                                spdif: spdif@02004000 {
                                         reg = <0x02004000 0x4000>;
                                         interrupts = <0 52 0x04>;
                                 };
 
-                                ecspi@02008000 { /* eCSPI1 */
+                                ecspi1: ecspi@02008000 {
                                         #address-cells = <1>;
                                         #size-cells = <0>;
                                         compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
@@ -160,7 +168,7 @@
                                         status = "disabled";
                                 };
 
-                                ecspi@0200c000 { /* eCSPI2 */
+                                ecspi2: ecspi@0200c000 {
                                         #address-cells = <1>;
                                         #size-cells = <0>;
                                         compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
@@ -171,7 +179,7 @@
                                         status = "disabled";
                                 };
 
-                                ecspi@02010000 { /* eCSPI3 */
+                                ecspi3: ecspi@02010000 {
                                         #address-cells = <1>;
                                         #size-cells = <0>;
                                         compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
@@ -182,7 +190,7 @@
                                         status = "disabled";
                                 };
 
-                                ecspi@02014000 { /* eCSPI4 */
+                                ecspi4: ecspi@02014000 {
                                         #address-cells = <1>;
                                         #size-cells = <0>;
                                         compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
@@ -193,7 +201,7 @@
                                         status = "disabled";
                                 };
 
-                                ecspi@02018000 { /* eCSPI5 */
+                                ecspi5: ecspi@02018000 {
                                         #address-cells = <1>;
                                         #size-cells = <0>;
                                         compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
@@ -213,7 +221,7 @@
                                         status = "disabled";
                                 };
 
-                                esai@02024000 {
+                                esai: esai@02024000 {
                                         reg = <0x02024000 0x4000>;
                                         interrupts = <0 51 0x04>;
                                 };
@@ -248,7 +256,7 @@
                                         status = "disabled";
                                 };
 
-                                asrc@02034000 {
+                                asrc: asrc@02034000 {
                                         reg = <0x02034000 0x4000>;
                                         interrupts = <0 50 0x04>;
                                 };
@@ -258,7 +266,7 @@
                                 };
                         };
 
-                        vpu@02040000 {
+                        vpu: vpu@02040000 {
                                 reg = <0x02040000 0x3c000>;
                                 interrupts = <0 3 0x04 0 12 0x04>;
                         };
@@ -267,37 +275,37 @@
                                 reg = <0x0207c000 0x4000>;
                         };
 
-                        pwm@02080000 { /* PWM1 */
+                        pwm1: pwm@02080000 {
                                 reg = <0x02080000 0x4000>;
                                 interrupts = <0 83 0x04>;
                         };
 
-                        pwm@02084000 { /* PWM2 */
+                        pwm2: pwm@02084000 {
                                 reg = <0x02084000 0x4000>;
                                 interrupts = <0 84 0x04>;
                         };
 
-                        pwm@02088000 { /* PWM3 */
+                        pwm3: pwm@02088000 {
                                 reg = <0x02088000 0x4000>;
                                 interrupts = <0 85 0x04>;
                         };
 
-                        pwm@0208c000 { /* PWM4 */
+                        pwm4: pwm@0208c000 {
                                 reg = <0x0208c000 0x4000>;
                                 interrupts = <0 86 0x04>;
                         };
 
-                        flexcan@02090000 { /* CAN1 */
+                        can1: flexcan@02090000 {
                                 reg = <0x02090000 0x4000>;
                                 interrupts = <0 110 0x04>;
                         };
 
-                        flexcan@02094000 { /* CAN2 */
+                        can2: flexcan@02094000 {
                                 reg = <0x02094000 0x4000>;
                                 interrupts = <0 111 0x04>;
                         };
 
-                        gpt@02098000 {
+                        gpt: gpt@02098000 {
                                 compatible = "fsl,imx6q-gpt";
                                 reg = <0x02098000 0x4000>;
                                 interrupts = <0 55 0x04>;
@@ -373,19 +381,19 @@
                                 #interrupt-cells = <2>;
                         };
 
-                        kpp@020b8000 {
+                        kpp: kpp@020b8000 {
                                 reg = <0x020b8000 0x4000>;
                                 interrupts = <0 82 0x04>;
                         };
 
-                        wdog@020bc000 { /* WDOG1 */
+                        wdog1: wdog@020bc000 {
                                 compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
                                 reg = <0x020bc000 0x4000>;
                                 interrupts = <0 80 0x04>;
                                 clocks = <&clks 0>;
                         };
 
-                        wdog@020c0000 { /* WDOG2 */
+                        wdog2: wdog@020c0000 {
                                 compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
                                 reg = <0x020c0000 0x4000>;
                                 interrupts = <0 81 0x04>;
@@ -447,7 +455,7 @@
                                         anatop-max-voltage = <2750000>;
                                 };
 
-                                regulator-vddcore@140 {
+                                reg_cpu: regulator-vddcore@140 {
                                         compatible = "fsl,anatop-regulator";
                                         regulator-name = "cpu";
                                         regulator-min-microvolt = <725000>;
@@ -505,27 +513,35 @@
                         };
 
                         snvs@020cc000 {
-                                reg = <0x020cc000 0x4000>;
-                                interrupts = <0 19 0x04 0 20 0x04>;
+                                compatible = "fsl,sec-v4.0-mon", "simple-bus";
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                ranges = <0 0x020cc000 0x4000>;
+
+                                snvs-rtc-lp@34 {
+                                        compatible = "fsl,sec-v4.0-mon-rtc-lp";
+                                        reg = <0x34 0x58>;
+                                        interrupts = <0 19 0x04 0 20 0x04>;
+                                };
                         };
 
-                        epit@020d0000 { /* EPIT1 */
+                        epit1: epit@020d0000 { /* EPIT1 */
                                 reg = <0x020d0000 0x4000>;
                                 interrupts = <0 56 0x04>;
                         };
 
-                        epit@020d4000 { /* EPIT2 */
+                        epit2: epit@020d4000 { /* EPIT2 */
                                 reg = <0x020d4000 0x4000>;
                                 interrupts = <0 57 0x04>;
                         };
 
-                        src@020d8000 {
+                        src: src@020d8000 {
                                 compatible = "fsl,imx6q-src";
                                 reg = <0x020d8000 0x4000>;
                                 interrupts = <0 91 0x04 0 96 0x04>;
                         };
 
-                        gpc@020dc000 {
+                        gpc: gpc@020dc000 {
                                 compatible = "fsl,imx6q-gpc";
                                 reg = <0x020dc000 0x4000>;
                                 interrupts = <0 89 0x04 0 90 0x04>;
@@ -536,7 +552,7 @@
                                 reg = <0x020e0000 0x38>;
                         };
 
-                        iomuxc@020e0000 {
+                        iomuxc: iomuxc@020e0000 {
                                 compatible = "fsl,imx6q-iomuxc";
                                 reg = <0x020e0000 0x4000>;
 
@@ -748,17 +764,17 @@
                                 };
                         };
 
-                        dcic@020e4000 { /* DCIC1 */
+                        dcic1: dcic@020e4000 {
                                 reg = <0x020e4000 0x4000>;
                                 interrupts = <0 124 0x04>;
                         };
 
-                        dcic@020e8000 { /* DCIC2 */
+                        dcic2: dcic@020e8000 {
                                 reg = <0x020e8000 0x4000>;
                                 interrupts = <0 125 0x04>;
                         };
 
-                        sdma@020ec000 {
+                        sdma: sdma@020ec000 {
                                 compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma";
                                 reg = <0x020ec000 0x4000>;
                                 interrupts = <0 2 0x04>;
@@ -784,7 +800,7 @@
                                 reg = <0x0217c000 0x4000>;
                         };
 
-                        usb@02184000 { /* USB OTG */
+                        usbotg: usb@02184000 {
                                 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
                                 reg = <0x02184000 0x200>;
                                 interrupts = <0 43 0x04>;
@@ -794,7 +810,7 @@
                                 status = "disabled";
                         };
 
-                        usb@02184200 { /* USB1 */
+                        usbh1: usb@02184200 {
                                 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
                                 reg = <0x02184200 0x200>;
                                 interrupts = <0 40 0x04>;
@@ -804,7 +820,7 @@
                                 status = "disabled";
                         };
 
-                        usb@02184400 { /* USB2 */
+                        usbh2: usb@02184400 {
                                 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
                                 reg = <0x02184400 0x200>;
                                 interrupts = <0 41 0x04>;
@@ -813,7 +829,7 @@
                                 status = "disabled";
                         };
 
-                        usb@02184600 { /* USB3 */
+                        usbh3: usb@02184600 {
                                 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
                                 reg = <0x02184600 0x200>;
                                 interrupts = <0 42 0x04>;
@@ -822,14 +838,14 @@
                                 status = "disabled";
                         };
 
-                        usbmisc: usbmisc@02184800 {
+                        usbmisc: usbmisc: usbmisc@02184800 {
                                 #index-cells = <1>;
                                 compatible = "fsl,imx6q-usbmisc";
                                 reg = <0x02184800 0x200>;
                                 clocks = <&clks 162>;
                         };
 
-                        ethernet@02188000 {
+                        fec: ethernet@02188000 {
                                 compatible = "fsl,imx6q-fec";
                                 reg = <0x02188000 0x4000>;
                                 interrupts = <0 118 0x04 0 119 0x04>;
@@ -843,66 +859,70 @@
                                 interrupts = <0 53 0x04 0 117 0x04 0 126 0x04>;
                         };
 
-                        usdhc@02190000 { /* uSDHC1 */
+                        usdhc1: usdhc@02190000 {
                                 compatible = "fsl,imx6q-usdhc";
                                 reg = <0x02190000 0x4000>;
                                 interrupts = <0 22 0x04>;
                                 clocks = <&clks 163>, <&clks 163>, <&clks 163>;
                                 clock-names = "ipg", "ahb", "per";
+                                bus-width = <4>;
                                 status = "disabled";
                         };
 
-                        usdhc@02194000 { /* uSDHC2 */
+                        usdhc2: usdhc@02194000 {
                                 compatible = "fsl,imx6q-usdhc";
                                 reg = <0x02194000 0x4000>;
                                 interrupts = <0 23 0x04>;
                                 clocks = <&clks 164>, <&clks 164>, <&clks 164>;
                                 clock-names = "ipg", "ahb", "per";
+                                bus-width = <4>;
                                 status = "disabled";
                         };
 
-                        usdhc@02198000 { /* uSDHC3 */
+                        usdhc3: usdhc@02198000 {
                                 compatible = "fsl,imx6q-usdhc";
                                 reg = <0x02198000 0x4000>;
                                 interrupts = <0 24 0x04>;
                                 clocks = <&clks 165>, <&clks 165>, <&clks 165>;
                                 clock-names = "ipg", "ahb", "per";
+                                bus-width = <4>;
                                 status = "disabled";
                         };
 
-                        usdhc@0219c000 { /* uSDHC4 */
+                        usdhc4: usdhc@0219c000 {
                                 compatible = "fsl,imx6q-usdhc";
                                 reg = <0x0219c000 0x4000>;
                                 interrupts = <0 25 0x04>;
                                 clocks = <&clks 166>, <&clks 166>, <&clks 166>;
                                 clock-names = "ipg", "ahb", "per";
+                                bus-width = <4>;
                                 status = "disabled";
                         };
 
-                        i2c@021a0000 { /* I2C1 */
+                        i2c1: i2c@021a0000 {
                                 #address-cells = <1>;
                                 #size-cells = <0>;
-                                compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c";
+                                compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
                                 reg = <0x021a0000 0x4000>;
                                 interrupts = <0 36 0x04>;
                                 clocks = <&clks 125>;
                                 status = "disabled";
                         };
 
-                        i2c@021a4000 { /* I2C2 */
+                        i2c2: i2c@021a4000 {
                                 #address-cells = <1>;
                                 #size-cells = <0>;
-                                compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c";
+                                compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
                                 reg = <0x021a4000 0x4000>;
                                 interrupts = <0 37 0x04>;
                                 clocks = <&clks 126>;
                                 status = "disabled";
                         };
 
-                        i2c@021a8000 { /* I2C3 */
+                        i2c3: i2c@021a8000 {
                                 #address-cells = <1>;
                                 #size-cells = <0>;
-                                compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c";
+                                compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
                                 reg = <0x021a8000 0x4000>;
                                 interrupts = <0 38 0x04>;
                                 clocks = <&clks 127>;
@@ -913,12 +933,12 @@
                                 reg = <0x021ac000 0x4000>;
                         };
 
-                        mmdc@021b0000 { /* MMDC0 */
+                        mmdc0: mmdc@021b0000 { /* MMDC0 */
                                 compatible = "fsl,imx6q-mmdc";
                                 reg = <0x021b0000 0x4000>;
                         };
 
-                        mmdc@021b4000 { /* MMDC1 */
+                        mmdc1: mmdc@021b4000 { /* MMDC1 */
                                 reg = <0x021b4000 0x4000>;
                         };
 
@@ -946,7 +966,7 @@
                                 interrupts = <0 109 0x04>;
                         };
 
-                        audmux@021d8000 {
+                        audmux: audmux@021d8000 {
                                 compatible = "fsl,imx6q-audmux", "fsl,imx31-audmux";
                                 reg = <0x021d8000 0x4000>;
                                 status = "disabled";
diff --git a/arch/arm/boot/dts/integratorap.dts b/arch/arm/boot/dts/integratorap.dts
index 61767757b50a..c9c3fa344647 100644
--- a/arch/arm/boot/dts/integratorap.dts
+++ b/arch/arm/boot/dts/integratorap.dts
@@ -18,6 +18,11 @@
                 bootargs = "root=/dev/ram0 console=ttyAM0,38400n8 earlyprintk";
         };
 
+        syscon {
+                /* AP system controller registers */
+                reg = <0x11000000 0x100>;
+        };
+
         timer0: timer@13000000 {
                 compatible = "arm,integrator-timer";
         };
diff --git a/arch/arm/boot/dts/integratorcp.dts b/arch/arm/boot/dts/integratorcp.dts
index 2dd5e4e48481..8b119399025a 100644
--- a/arch/arm/boot/dts/integratorcp.dts
+++ b/arch/arm/boot/dts/integratorcp.dts
@@ -18,6 +18,11 @@
                 bootargs = "root=/dev/ram0 console=ttyAMA0,38400n8 earlyprintk";
         };
 
+        cpcon {
+                /* CP controller registers */
+                reg = <0xcb000000 0x100>;
+        };
+
         timer0: timer@13000000 {
                 compatible = "arm,sp804", "arm,primecell";
         };
diff --git a/arch/arm/boot/dts/kirkwood-6281.dtsi b/arch/arm/boot/dts/kirkwood-6281.dtsi
new file mode 100644
index 000000000000..d6c9d65cbaeb
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-6281.dtsi
@@ -0,0 +1,44 @@
+/ {
+        ocp@f1000000 {
+                pinctrl: pinctrl@10000 {
+                        compatible = "marvell,88f6281-pinctrl";
+                        reg = <0x10000 0x20>;
+
+                        pmx_nand: pmx-nand {
+                                marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
+                                               "mpp4", "mpp5", "mpp18",
+                                               "mpp19";
+                                marvell,function = "nand";
+                        };
+                        pmx_sata0: pmx-sata0 {
+                                marvell,pins = "mpp5", "mpp21", "mpp23";
+                                marvell,function = "sata0";
+                        };
+                        pmx_sata1: pmx-sata1 {
+                                marvell,pins = "mpp4", "mpp20", "mpp22";
+                                marvell,function = "sata1";
+                        };
+                        pmx_spi: pmx-spi {
+                                marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3";
+                                marvell,function = "spi";
+                        };
+                        pmx_twsi0: pmx-twsi0 {
+                                marvell,pins = "mpp8", "mpp9";
+                                marvell,function = "twsi0";
+                        };
+                        pmx_uart0: pmx-uart0 {
+                                marvell,pins = "mpp10", "mpp11";
+                                marvell,function = "uart0";
+                        };
+                        pmx_uart1: pmx-uart1 {
+                                marvell,pins = "mpp13", "mpp14";
+                                marvell,function = "uart1";
+                        };
+                        pmx_sdio: pmx-sdio {
+                                marvell,pins = "mpp12", "mpp13", "mpp14",
+                                               "mpp15", "mpp16", "mpp17";
+                                marvell,function = "sdio";
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/kirkwood-6282.dtsi b/arch/arm/boot/dts/kirkwood-6282.dtsi
new file mode 100644
index 000000000000..9ae2004d5675
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-6282.dtsi
@@ -0,0 +1,45 @@
+/ {
+        ocp@f1000000 {
+
+                pinctrl: pinctrl@10000 {
+                        compatible = "marvell,88f6282-pinctrl";
+                        reg = <0x10000 0x20>;
+
+                        pmx_sata0: pmx-sata0 {
+                                marvell,pins = "mpp5", "mpp21", "mpp23";
+                                marvell,function = "sata0";
+                        };
+                        pmx_sata1: pmx-sata1 {
+                                marvell,pins = "mpp4", "mpp20", "mpp22";
+                                marvell,function = "sata1";
+                        };
+                        pmx_spi: pmx-spi {
+                                marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3";
+                                marvell,function = "spi";
+                        };
+                        pmx_twsi0: pmx-twsi0 {
+                                marvell,pins = "mpp8", "mpp9";
+                                marvell,function = "twsi0";
+                        };
+                        pmx_uart0: pmx-uart0 {
+                                marvell,pins = "mpp10", "mpp11";
+                                marvell,function = "uart0";
+                        };
+
+                        pmx_uart1: pmx-uart1 {
+                                marvell,pins = "mpp13", "mpp14";
+                                marvell,function = "uart1";
+                        };
+                };
+
+                i2c@11100 {
+                        compatible = "marvell,mv64xxx-i2c";
+                        reg = <0x11100 0x20>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        interrupts = <32>;
+                        clock-frequency = <100000>;
+                        status = "disabled";
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/kirkwood-98dx4122.dtsi b/arch/arm/boot/dts/kirkwood-98dx4122.dtsi
new file mode 100644
index 000000000000..3271e4c8ea07
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-98dx4122.dtsi
@@ -0,0 +1,31 @@
+/ {
+        ocp@f1000000 {
+                pinctrl: pinctrl@10000 {
+                        compatible = "marvell,98dx4122-pinctrl";
+                        reg = <0x10000 0x20>;
+
+                        pmx_nand: pmx-nand {
+                                marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
+                                               "mpp4", "mpp5", "mpp18",
+                                               "mpp19";
+                                marvell,function = "nand";
+                        };
+                        pmx_spi: pmx-spi {
+                                marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3";
+                                marvell,function = "spi";
+                        };
+                        pmx_twsi0: pmx-twsi0 {
+                                marvell,pins = "mpp8", "mpp9";
+                                marvell,function = "twsi0";
+                        };
+                        pmx_uart0: pmx-uart0 {
+                                marvell,pins = "mpp10", "mpp11";
+                                marvell,function = "uart0";
+                        };
+                        pmx_uart1: pmx-uart1 {
+                                marvell,pins = "mpp13", "mpp14";
+                                marvell,function = "uart1";
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/kirkwood-dnskw.dtsi b/arch/arm/boot/dts/kirkwood-dnskw.dtsi
index 9b32d0272825..6875ac00c174 100644
--- a/arch/arm/boot/dts/kirkwood-dnskw.dtsi
+++ b/arch/arm/boot/dts/kirkwood-dnskw.dtsi
@@ -1,4 +1,5 @@
 /include/ "kirkwood.dtsi"
+/include/ "kirkwood-6281.dtsi"
 
 / {
         model = "D-Link DNS NASes (kirkwood-based)";
@@ -35,7 +36,116 @@
                                       6000 2>;
         };
 
+        gpio_poweroff {
+                compatible = "gpio-poweroff";
+                gpios = <&gpio1 4 0>;
+        };
+
         ocp@f1000000 {
+                pinctrl: pinctrl@10000 {
+
+                        pinctrl-0 = < &pmx_nand &pmx_uart1
+                                      &pmx_sata0 &pmx_sata1
+                                      &pmx_led_power
+                                      &pmx_led_red_right_hdd
+                                      &pmx_led_red_left_hdd
+                                      &pmx_led_red_usb_325
+                                      &pmx_button_power
+                                      &pmx_led_red_usb_320
+                                      &pmx_power_off &pmx_power_back_on
+                                      &pmx_power_sata0 &pmx_power_sata1
+                                      &pmx_present_sata0 &pmx_present_sata1
+                                      &pmx_led_white_usb &pmx_fan_tacho
+                                      &pmx_fan_high_speed &pmx_fan_low_speed
+                                      &pmx_button_unmount &pmx_button_reset
+                                      &pmx_temp_alarm >;
+                        pinctrl-names = "default";
+
+                        pmx_sata0: pmx-sata0 {
+                                marvell,pins = "mpp20";
+                                marvell,function = "sata1";
+                        };
+                        pmx_sata1: pmx-sata1 {
+                                marvell,pins = "mpp21";
+                                marvell,function = "sata0";
+                        };
+                        pmx_led_power: pmx-led-power {
+                                marvell,pins = "mpp26";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_red_right_hdd: pmx-led-red-right-hdd {
+                                marvell,pins = "mpp27";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_red_left_hdd: pmx-led-red-left-hdd {
+                                marvell,pins = "mpp28";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_red_usb_325: pmx-led-red-usb-325 {
+                                marvell,pins = "mpp29";
+                                marvell,function = "gpio";
+                        };
+                        pmx_button_power: pmx-button-power {
+                                marvell,pins = "mpp34";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_red_usb_320: pmx-led-red-usb-320 {
+                                marvell,pins = "mpp35";
+                                marvell,function = "gpio";
+                        };
+                        pmx_power_off: pmx-power-off {
+                                marvell,pins = "mpp36";
+                                marvell,function = "gpio";
+                        };
+                        pmx_power_back_on: pmx-power-back-on {
+                                marvell,pins = "mpp37";
+                                marvell,function = "gpio";
+                        };
+                        pmx_power_sata0: pmx-power-sata0 {
+                                marvell,pins = "mpp39";
+                                marvell,function = "gpio";
+                        };
+                        pmx_power_sata1: pmx-power-sata1 {
+                                marvell,pins = "mpp40";
+                                marvell,function = "gpio";
+                        };
+                        pmx_present_sata0: pmx-present-sata0 {
+                                marvell,pins = "mpp41";
+                                marvell,function = "gpio";
+                        };
+                        pmx_present_sata1: pmx-present-sata1 {
+                                marvell,pins = "mpp42";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_white_usb: pmx-led-white-usb {
+                                marvell,pins = "mpp43";
+                                marvell,function = "gpio";
+                        };
+                        pmx_fan_tacho: pmx-fan-tacho {
+                                marvell,pins = "mpp44";
+                                marvell,function = "gpio";
+                        };
+                        pmx_fan_high_speed: pmx-fan-high-speed {
+                                marvell,pins = "mpp45";
+                                marvell,function = "gpio";
+                        };
+                        pmx_fan_low_speed: pmx-fan-low-speed {
+                                marvell,pins = "mpp46";
+                                marvell,function = "gpio";
+                        };
+                        pmx_button_unmount: pmx-button-unmount {
+                                marvell,pins = "mpp47";
+                                marvell,function = "gpio";
+                        };
+                        pmx_button_reset: pmx-button-reset {
+                                marvell,pins = "mpp48";
+                                marvell,function = "gpio";
+                        };
+                        pmx_temp_alarm: pmx-temp-alarm {
+                                marvell,pins = "mpp49";
+                                marvell,function = "gpio";
+                        };
+                };
                 sata@80000 {
                         status = "okay";
                         nr-ports = <2>;
@@ -43,6 +153,7 @@
 
                 nand@3000000 {
                         status = "okay";
+                        chip-delay = <35>;
 
                         partition@0 {
                                 label = "u-boot";
@@ -76,4 +187,33 @@
                         };
                 };
         };
+
+        regulators {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                sata0_power: regulator@1 {
+                        compatible = "regulator-fixed";
+                        reg = <1>;
+                        regulator-name = "SATA0 Power";
+                        regulator-min-microvolt = <5000000>;
+                        regulator-max-microvolt = <5000000>;
+                        enable-active-high;
+                        regulator-always-on;
+                        regulator-boot-on;
+                        gpio = <&gpio1 7 0>;
+                };
+                sata1_power: regulator@2 {
+                        compatible = "regulator-fixed";
+                        reg = <2>;
+                        regulator-name = "SATA1 Power";
+                        regulator-min-microvolt = <5000000>;
+                        regulator-max-microvolt = <5000000>;
+                        enable-active-high;
+                        regulator-always-on;
+                        regulator-boot-on;
+                        gpio = <&gpio1 8 0>;
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/kirkwood-dockstar.dts b/arch/arm/boot/dts/kirkwood-dockstar.dts
index 08a582414b88..2e3dd34e21a5 100644
--- a/arch/arm/boot/dts/kirkwood-dockstar.dts
+++ b/arch/arm/boot/dts/kirkwood-dockstar.dts
@@ -1,6 +1,7 @@
 /dts-v1/;
 
 /include/ "kirkwood.dtsi"
+/include/ "kirkwood-6281.dtsi"
 
 / {
         model = "Seagate FreeAgent Dockstar";
@@ -16,6 +17,25 @@
         };
 
         ocp@f1000000 {
+                pinctrl: pinctrl@10000 {
+
+                        pinctrl-0 = < &pmx_usb_power_enable
+                                      &pmx_led_green &pmx_led_orange >;
+                        pinctrl-names = "default";
+
+                        pmx_usb_power_enable: pmx-usb-power-enable {
+                                marvell,pins = "mpp29";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_green: pmx-led-green {
+                                marvell,pins = "mpp46";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_orange: pmx-led-orange {
+                                marvell,pins = "mpp47";
+                                marvell,function = "gpio";
+                        };
+                };
                 serial@12000 {
                         clock-frequency = <200000000>;
                         status = "ok";
@@ -54,4 +74,21 @@
                         gpios = <&gpio1 15 1>;
                 };
         };
+        regulators {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                usb_power: regulator@1 {
+                        compatible = "regulator-fixed";
+                        reg = <1>;
+                        regulator-name = "USB Power";
+                        regulator-min-microvolt = <5000000>;
+                        regulator-max-microvolt = <5000000>;
+                        enable-active-high;
+                        regulator-always-on;
+                        regulator-boot-on;
+                        gpio = <&gpio0 29 0>;
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/kirkwood-dreamplug.dts b/arch/arm/boot/dts/kirkwood-dreamplug.dts
index 26e281fbf6bc..f2d386c95b07 100644
--- a/arch/arm/boot/dts/kirkwood-dreamplug.dts
+++ b/arch/arm/boot/dts/kirkwood-dreamplug.dts
@@ -1,6 +1,7 @@
 /dts-v1/;
 
 /include/ "kirkwood.dtsi"
+/include/ "kirkwood-6281.dtsi"
 
 / {
         model = "Globalscale Technologies Dreamplug";
@@ -16,6 +17,26 @@
         };
 
         ocp@f1000000 {
+                pinctrl: pinctrl@10000 {
+
+                        pinctrl-0 = < &pmx_spi
+                                      &pmx_led_bluetooth &pmx_led_wifi
+                                      &pmx_led_wifi_ap >;
+                        pinctrl-names = "default";
+
+                        pmx_led_bluetooth: pmx-led-bluetooth {
+                                marvell,pins = "mpp47";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_wifi: pmx-led-wifi {
+                                marvell,pins = "mpp48";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_wifi_ap: pmx-led-wifi-ap {
+                                marvell,pins = "mpp49";
+                                marvell,function = "gpio";
+                        };
+                };
                 serial@12000 {
                         clock-frequency = <200000000>;
                         status = "ok";
diff --git a/arch/arm/boot/dts/kirkwood-goflexnet.dts b/arch/arm/boot/dts/kirkwood-goflexnet.dts
index 7c8238fbb6f9..1b133e0c566e 100644
--- a/arch/arm/boot/dts/kirkwood-goflexnet.dts
+++ b/arch/arm/boot/dts/kirkwood-goflexnet.dts
@@ -1,6 +1,7 @@
 /dts-v1/;
 
 /include/ "kirkwood.dtsi"
+/include/ "kirkwood-6281.dtsi"
 
 / {
         model = "Seagate GoFlex Net";
@@ -16,6 +17,61 @@
         };
 
         ocp@f1000000 {
+                pinctrl: pinctrl@10000 {
+
+                        pinctrl-0 = < &pmx_usb_power_enable &pmx_led_orange
+                                      &pmx_led_left_cap_0 &pmx_led_left_cap_1
+                                      &pmx_led_left_cap_2 &pmx_led_left_cap_3
+                                      &pmx_led_right_cap_0 &pmx_led_right_cap_1
+                                      &pmx_led_right_cap_2 &pmx_led_right_cap_3
+                                    >;
+                        pinctrl-names = "default";
+
+                        pmx_usb_power_enable: pmx-usb-power-enable {
+                                marvell,pins = "mpp29";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_right_cap_0: pmx-led_right_cap_0 {
+                                marvell,pins = "mpp38";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_right_cap_1: pmx-led_right_cap_1 {
+                                marvell,pins = "mpp39";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_right_cap_2: pmx-led_right_cap_2 {
+                                marvell,pins = "mpp40";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_right_cap_3: pmx-led_right_cap_3 {
+                                marvell,pins = "mpp41";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_left_cap_0: pmx-led_left_cap_0 {
+                                marvell,pins = "mpp42";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_left_cap_1: pmx-led_left_cap_1 {
+                                marvell,pins = "mpp43";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_left_cap_2: pmx-led_left_cap_2 {
+                                marvell,pins = "mpp44";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_left_cap_3: pmx-led_left_cap_3 {
+                                marvell,pins = "mpp45";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_green: pmx-led_green {
+                                marvell,pins = "mpp46";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_orange: pmx-led_orange {
+                                marvell,pins = "mpp47";
+                                marvell,function = "gpio";
+                        };
+                };
                 serial@12000 {
                         clock-frequency = <200000000>;
                         status = "ok";
@@ -96,4 +152,21 @@
                         gpios = <&gpio1 9 0>;
                 };
         };
+        regulators {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                usb_power: regulator@1 {
+                        compatible = "regulator-fixed";
+                        reg = <1>;
+                        regulator-name = "USB Power";
+                        regulator-min-microvolt = <5000000>;
+                        regulator-max-microvolt = <5000000>;
+                        enable-active-high;
+                        regulator-always-on;
+                        regulator-boot-on;
+                        gpio = <&gpio0 29 0>;
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/kirkwood-ib62x0.dts b/arch/arm/boot/dts/kirkwood-ib62x0.dts
index 66794ed75ff1..71902da33d63 100644
--- a/arch/arm/boot/dts/kirkwood-ib62x0.dts
+++ b/arch/arm/boot/dts/kirkwood-ib62x0.dts
@@ -1,6 +1,7 @@
 /dts-v1/;
 
 /include/ "kirkwood.dtsi"
+/include/ "kirkwood-6281.dtsi"
 
 / {
         model = "RaidSonic ICY BOX IB-NAS62x0 (Rev B)";
@@ -16,6 +17,39 @@
         };
 
         ocp@f1000000 {
+                pinctrl: pinctrl@10000 {
+
+                        pinctrl-0 = < &pmx_nand
+                                      &pmx_led_os_red &pmx_power_off
+                                      &pmx_led_os_green &pmx_led_usb_transfer
+                                      &pmx_button_reset &pmx_button_usb_copy >;
+                        pinctrl-names = "default";
+
+                        pmx_led_os_red: pmx-led-os-red {
+                                marvell,pins = "mpp22";
+                                marvell,function = "gpio";
+                        };
+                        pmx_power_off: pmx-power-off {
+                                marvell,pins = "mpp24";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_os_green: pmx-led-os-green {
+                                marvell,pins = "mpp25";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_usb_transfer: pmx-led-usb-transfer {
+                                marvell,pins = "mpp27";
+                                marvell,function = "gpio";
+                        };
+                        pmx_button_reset: pmx-button-reset {
+                                marvell,pins = "mpp28";
+                                marvell,function = "gpio";
+                        };
+                        pmx_button_usb_copy: pmx-button-usb-copy {
+                                marvell,pins = "mpp29";
+                                marvell,function = "gpio";
+                        };
+                };
                 serial@12000 {
                         clock-frequency = <200000000>;
                         status = "okay";
@@ -79,4 +113,10 @@
                         gpios = <&gpio0 27 0>;
                 };
         };
+        gpio_poweroff {
+                compatible = "gpio-poweroff";
+                gpios = <&gpio0 24 0>;
+        };
+
+
 };
diff --git a/arch/arm/boot/dts/kirkwood-iconnect.dts b/arch/arm/boot/dts/kirkwood-iconnect.dts
index d97cd9d4753e..504f16be8b54 100644
--- a/arch/arm/boot/dts/kirkwood-iconnect.dts
+++ b/arch/arm/boot/dts/kirkwood-iconnect.dts
@@ -1,6 +1,7 @@
 /dts-v1/;
 
 /include/ "kirkwood.dtsi"
+/include/ "kirkwood-6281.dtsi"
 
 / {
         model = "Iomega Iconnect";
@@ -18,6 +19,56 @@
         };
 
         ocp@f1000000 {
+                pinctrl: pinctrl@10000 {
+
+                        pinctrl-0 = < &pmx_gpio_12 &pmx_gpio_35
+                                      &pmx_gpio_41 &pmx_gpio_42
+                                      &pmx_gpio_43 &pmx_gpio_44
+                                      &pmx_gpio_45 &pmx_gpio_46
+                                      &pmx_gpio_47 &pmx_gpio_48 >;
+                        pinctrl-names = "default";
+
+                        pmx_gpio_12: pmx-gpio-12 {
+                                marvell,pins = "mpp12";
+                                marvell,function = "gpio";
+                        };
+                        pmx_gpio_35: pmx-gpio-35 {
+                                marvell,pins = "mpp35";
+                                marvell,function = "gpio";
+                        };
+                        pmx_gpio_41: pmx-gpio-41 {
+                                marvell,pins = "mpp41";
+                                marvell,function = "gpio";
+                        };
+                        pmx_gpio_42: pmx-gpio-42 {
+                                marvell,pins = "mpp42";
+                                marvell,function = "gpio";
+                        };
+                        pmx_gpio_43: pmx-gpio-43 {
+                                marvell,pins = "mpp43";
+                                marvell,function = "gpio";
+                        };
+                        pmx_gpio_44: pmx-gpio-44 {
+                                marvell,pins = "mpp44";
+                                marvell,function = "gpio";
+                        };
+                        pmx_gpio_45: pmx-gpio-45 {
+                                marvell,pins = "mpp45";
+                                marvell,function = "gpio";
+                        };
+                        pmx_gpio_46: pmx-gpio-46 {
+                                marvell,pins = "mpp46";
+                                marvell,function = "gpio";
+                        };
+                        pmx_gpio_47: pmx-gpio-47 {
+                                marvell,pins = "mpp47";
+                                marvell,function = "gpio";
+                        };
+                        pmx_gpio_48: pmx-gpio-48 {
+                                marvell,pins = "mpp48";
+                                marvell,function = "gpio";
+                        };
+                };
                 i2c@11000 {
                         status = "okay";
 
diff --git a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
index 865aeec40a26..6cae4599c4b3 100644
--- a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
+++ b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
@@ -1,6 +1,7 @@
 /dts-v1/;
 
 /include/ "kirkwood.dtsi"
+/include/ "kirkwood-6281.dtsi"
 
 / {
         model = "Iomega StorCenter ix2-200";
@@ -16,6 +17,94 @@
         };
 
         ocp@f1000000 {
+                pinctrl: pinctrl@10000 {
+
+                        pinctrl-0 = < &pmx_button_reset &pmx_button_power
+                                      &pmx_led_backup &pmx_led_power
+                                      &pmx_button_otb &pmx_led_rebuild
+                                      &pmx_led_health
+                                      &pmx_led_sata_brt_ctrl_1
+                                      &pmx_led_sata_brt_ctrl_2
+                                      &pmx_led_backup_brt_ctrl_1
+                                      &pmx_led_backup_brt_ctrl_2
+                                      &pmx_led_power_brt_ctrl_1
+                                      &pmx_led_power_brt_ctrl_2
+                                      &pmx_led_health_brt_ctrl_1
+                                      &pmx_led_health_brt_ctrl_2
+                                      &pmx_led_rebuild_brt_ctrl_1
+                                      &pmx_led_rebuild_brt_ctrl_2 >;
+                        pinctrl-names = "default";
+
+                        pmx_button_reset: pmx-button-reset {
+                                marvell,pins = "mpp12";
+                                marvell,function = "gpio";
+                        };
+                        pmx_button_power: pmx-button-power {
+                                marvell,pins = "mpp14";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_backup: pmx-led-backup {
+                                marvell,pins = "mpp15";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_power: pmx-led-power {
+                                marvell,pins = "mpp16";
+                                marvell,function = "gpio";
+                        };
+                        pmx_button_otb: pmx-button-otb {
+                                marvell,pins = "mpp35";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_rebuild: pmx-led-rebuild {
+                                marvell,pins = "mpp36";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_health: pmx-led_health {
+                                marvell,pins = "mpp37";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_sata_brt_ctrl_1: pmx-led-sata-brt-ctrl-1 {
+                                marvell,pins = "mpp38";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_sata_brt_ctrl_2: pmx-led-sata-brt-ctrl-2 {
+                                marvell,pins = "mpp39";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_backup_brt_ctrl_1: pmx-led-backup-brt-ctrl-1 {
+                                marvell,pins = "mpp40";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_backup_brt_ctrl_2: pmx-led-backup-brt-ctrl-2 {
+                                marvell,pins = "mpp41";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_power_brt_ctrl_1: pmx-led-power-brt-ctrl-1 {
+                                marvell,pins = "mpp42";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_power_brt_ctrl_2: pmx-led-power-brt-ctrl-2 {
+                                marvell,pins = "mpp43";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_health_brt_ctrl_1: pmx-led-health-brt-ctrl-1 {
+                                marvell,pins = "mpp44";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_health_brt_ctrl_2: pmx-led-health-brt-ctrl-2 {
+                                marvell,pins = "mpp45";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_rebuild_brt_ctrl_1: pmx-led-rebuild-brt-ctrl-1 {
+                                marvell,pins = "mpp44";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_rebuild_brt_ctrl_2: pmx-led-rebuild-brt-ctrl-2 {
+                                marvell,pins = "mpp45";
+                                marvell,function = "gpio";
+                        };
+
+                };
                 i2c@11000 {
                         status = "okay";
 
diff --git a/arch/arm/boot/dts/kirkwood-is2.dts b/arch/arm/boot/dts/kirkwood-is2.dts
new file mode 100644
index 000000000000..0bdce0ad7277
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-is2.dts
@@ -0,0 +1,30 @@
+/dts-v1/;
+
+/include/ "kirkwood-ns2-common.dtsi"
+
+/ {
+        model = "LaCie Internet Space v2";
+        compatible = "lacie,inetspace_v2", "marvell,kirkwood-88f6281", "marvell,kirkwood";
+
+        memory {
+                device_type = "memory";
+                reg = <0x00000000 0x8000000>;
+        };
+
+        ocp@f1000000 {
+                sata@80000 {
+                        status = "okay";
+                        nr-ports = <1>;
+                };
+        };
+
+        ns2-leds {
+                compatible = "lacie,ns2-leds";
+
+                blue-sata {
+                        label = "ns2:blue:sata";
+                        slow-gpio = <&gpio0 29 0>;
+                        cmd-gpio = <&gpio0 30 0>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/kirkwood-km_kirkwood.dts b/arch/arm/boot/dts/kirkwood-km_kirkwood.dts
index 75bdb93fed26..8db3123ac80f 100644
--- a/arch/arm/boot/dts/kirkwood-km_kirkwood.dts
+++ b/arch/arm/boot/dts/kirkwood-km_kirkwood.dts
@@ -1,6 +1,7 @@
 /dts-v1/;
 
 /include/ "kirkwood.dtsi"
+/include/ "kirkwood-98dx4122.dtsi"
 
 / {
         model = "Keymile Kirkwood Reference Design";
@@ -16,6 +17,22 @@
         };
 
         ocp@f1000000 {
+                pinctrl: pinctrl@10000 {
+
+                        pinctrl-0 = < &pmx_nand &pmx_i2c_gpio_sda
+                                &pmx_i2c_gpio_scl >;
+                        pinctrl-names = "default";
+
+                        pmx_i2c_gpio_sda: pmx-gpio-sda {
+                                marvell,pins = "mpp8";
+                                marvell,function = "gpio";
+                        };
+                        pmx_i2c_gpio_scl: pmx-gpio-scl {
+                                marvell,pins = "mpp9";
+                                marvell,function = "gpio";
+                        };
+                };
+
                 serial@12000 {
                         clock-frequency = <200000000>;
                         status = "ok";
diff --git a/arch/arm/boot/dts/kirkwood-lsxl.dtsi b/arch/arm/boot/dts/kirkwood-lsxl.dtsi
index 8fea375c734d..37d45c4f88fb 100644
--- a/arch/arm/boot/dts/kirkwood-lsxl.dtsi
+++ b/arch/arm/boot/dts/kirkwood-lsxl.dtsi
@@ -1,4 +1,5 @@
 /include/ "kirkwood.dtsi"
+/include/ "kirkwood-6281.dtsi"
 
 / {
         chosen {
@@ -6,6 +7,71 @@
         };
 
         ocp@f1000000 {
+                pinctrl: pinctrl@10000 {
+
+                        pinctrl-0 = < &pmx_power_hdd &pmx_usb_vbus
+                                      &pmx_fan_low &pmx_fan_high
+                                      &pmx_led_function_red &pmx_led_alarm
+                                      &pmx_led_info &pmx_led_power
+                                      &pmx_fan_lock &pmx_button_function
+                                      &pmx_power_switch &pmx_power_auto_switch
+                                      &pmx_led_function_blue >;
+                        pinctrl-names = "default";
+
+                        pmx_power_hdd: pmx-power-hdd {
+                                marvell,pins = "mpp10";
+                                marvell,function = "gpo";
+                        };
+                        pmx_usb_vbus: pmx-usb-vbus {
+                                marvell,pins = "mpp11";
+                                marvell,function = "gpio";
+                        };
+                        pmx_fan_high: pmx-fan-high {
+                                marvell,pins = "mpp18";
+                                marvell,function = "gpo";
+                        };
+                        pmx_fan_low: pmx-fan-low {
+                                marvell,pins = "mpp19";
+                                marvell,function = "gpo";
+                        };
+                        pmx_led_function_blue: pmx-led-function-blue {
+                                marvell,pins = "mpp36";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_alarm: pmx-led-alarm {
+                                marvell,pins = "mpp37";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_info: pmx-led-info {
+                                marvell,pins = "mpp38";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_power: pmx-led-power {
+                                marvell,pins = "mpp39";
+                                marvell,function = "gpio";
+                        };
+                        pmx_fan_lock: pmx-fan-lock {
+                                marvell,pins = "mpp40";
+                                marvell,function = "gpio";
+                        };
+                        pmx_button_function: pmx-button-function {
+                                marvell,pins = "mpp41";
+                                marvell,function = "gpio";
+                        };
+                        pmx_power_switch: pmx-power-switch {
+                                marvell,pins = "mpp42";
+                                marvell,function = "gpio";
+                        };
+                        pmx_power_auto_switch: pmx-power-auto-switch {
+                                marvell,pins = "mpp43";
+                                marvell,function = "gpio";
+                        };
+                        pmx_led_function_red: pmx-led-function_red {
+                                marvell,pins = "mpp48";
+                                marvell,function = "gpio";
+                        };
+
+                };
                 sata@80000 {
                         status = "okay";
                         nr-ports = <1>;
@@ -94,4 +160,44 @@
                         gpios = <&gpio1 16 1>;
                 };
         };
+
+        gpio_fan {
+                compatible = "gpio-fan";
+                gpios = <&gpio0 19 1
+                         &gpio0 18 1>;
+                gpio-fan,speed-map = <0    3
+                                      1500 2
+                                      3250 1
+                                      5000 0>;
+                alarm-gpios = <&gpio1 8 0>;
+        };
+
+        regulators {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                usb_power: regulator@1 {
+                        compatible = "regulator-fixed";
+                        reg = <1>;
+                        regulator-name = "USB Power";
+                        regulator-min-microvolt = <5000000>;
+                        regulator-max-microvolt = <5000000>;
+                        enable-active-high;
+                        regulator-always-on;
+                        regulator-boot-on;
+                        gpio = <&gpio0 11 0>;
+                };
+                hdd_power: regulator@2 {
+                        compatible = "regulator-fixed";
+                        reg = <2>;
+                        regulator-name = "HDD Power";
+                        regulator-min-microvolt = <5000000>;
+                        regulator-max-microvolt = <5000000>;
+                        enable-active-high;
+                        regulator-always-on;
+                        regulator-boot-on;
+                        gpio = <&gpio0 10 0>;
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/kirkwood-mplcec4.dts b/arch/arm/boot/dts/kirkwood-mplcec4.dts
new file mode 100644
index 000000000000..262c65403760
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-mplcec4.dts
@@ -0,0 +1,178 @@
+/dts-v1/;
+
+/include/ "kirkwood.dtsi"
+/include/ "kirkwood-6281.dtsi"
+
+/ {
+        model = "MPL CEC4";
+        compatible = "mpl,cec4-10", "mpl,cec4", "marvell,kirkwood-88f6281", "marvell,kirkwood";
+
+        memory {
+                device_type = "memory";
+                reg = <0x00000000 0x20000000>;
+        };
+
+        chosen {
+                bootargs = "console=ttyS0,115200n8 earlyprintk";
+        };
+
+        ocp@f1000000 {
+                pinctrl: pinctrl@10000 {
+
+                        pinctrl-0 = < &pmx_nand &pmx_uart0
+                                      &pmx_led_health &pmx_sdio
+                                      &pmx_sata0 &pmx_sata1
+                                      &pmx_led_user1o
+                                      &pmx_led_user1g &pmx_led_user0o
+                                      &pmx_led_user0g &pmx_led_misc
+                                      &pmx_sdio_cd
+                                    >;
+                        pinctrl-names = "default";
+
+                        pmx_led_health: pmx-led-health {
+                                marvell,pins = "mpp7";
+                                marvell,function = "gpo";
+                        };
+
+                        pmx_sata1: pmx-sata1 {
+                                marvell,pins = "mpp34";
+                                marvell,function = "sata1";
+                        };
+
+                        pmx_sata0: pmx-sata0 {
+                                marvell,pins = "mpp35";
+                                marvell,function = "sata0";
+                        };
+
+                        pmx_led_user1o: pmx-led-user1o {
+                                marvell,pins = "mpp40";
+                                marvell,function = "gpio";
+                        };
+
+                        pmx_led_user1g: pmx-led-user1g {
+                                marvell,pins = "mpp41";
+                                marvell,function = "gpio";
+                        };
+
+                        pmx_led_user0o: pmx-led-user0o {
+                                marvell,pins = "mpp44";
+                                marvell,function = "gpio";
+                        };
+
+                        pmx_led_user0g: pmx-led-user0g {
+                                marvell,pins = "mpp45";
+                                marvell,function = "gpio";
+                        };
+
+                        pmx_led_misc: pmx-led-misc {
+                                marvell,pins = "mpp46";
+                                marvell,function = "gpio";
+                        };
+
+                        pmx_sdio_cd: pmx-sdio-cd {
+                                marvell,pins = "mpp47";
+                                marvell,function = "gpio";
+                        };
+                };
+
+                i2c@11000 {
+                        status = "okay";
+
+                        rtc@51 {
+                                compatible = "nxp,pcf8563";
+                                reg = <0x51>;
+                        };
+
+                        eeprom@57 {
+                                compatible = "atmel,24c02";
+                                reg = <0x57>;
+                        };
+
+                };
+
+                serial@12000 {
+                        clock-frequency = <200000000>;
+                        status = "ok";
+                };
+
+                nand@3000000 {
+                        status = "okay";
+
+                        partition@0 {
+                                label = "uboot";
+                                reg = <0x0000000 0x100000>;
+                        };
+
+                        partition@100000 {
+                                label = "env";
+                                reg = <0x100000 0x80000>;
+                        };
+
+                        partition@180000 {
+                                label = "fdt";
+                                reg = <0x180000 0x80000>;
+                        };
+
+                        partition@200000 {
+                                label = "kernel";
+                                reg = <0x200000 0x400000>;
+                        };
+
+                        partition@600000 {
+                                label = "rootfs";
+                                reg = <0x600000 0x1fa00000>;
+                        };
+                };
+
+                rtc@10300 {
+                        status = "disabled";
+                };
+
+                sata@80000 {
+                        nr-ports = <2>;
+                        status = "okay";
+
+                };
+        };
+
+        gpio-leds {
+                compatible = "gpio-leds";
+
+                health {
+                        label = "status:green:health";
+                        gpios = <&gpio0 7 1>;
+                };
+
+                user1o {
+                        label = "user1:orange";
+                        gpios = <&gpio1 8 1>;
+                        default-state = "on";
+                };
+
+                user1g {
+                        label = "user1:green";
+                        gpios = <&gpio1 9 1>;
+                        default-state = "on";
+                };
+
+                user0o {
+                        label = "user0:orange";
+                        gpios = <&gpio1 12 1>;
+                        default-state = "on";
+                };
+
+                user0g {
+                        label = "user0:green";
+                        gpios = <&gpio1 13 1>;
+                        default-state = "on";
+                };
+
+                misc {
+                        label = "status:orange:misc";
+                        gpios = <&gpio1 14 1>;
+                        default-state = "on";
+                };
+
+        };
+};
+
diff --git a/arch/arm/boot/dts/kirkwood-ns2-common.dtsi b/arch/arm/boot/dts/kirkwood-ns2-common.dtsi
new file mode 100644
index 000000000000..9bc6785ad228
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-ns2-common.dtsi
@@ -0,0 +1,63 @@
+/include/ "kirkwood.dtsi"
+
+/ {
+        chosen {
+                bootargs = "console=ttyS0,115200n8";
+        };
+
+        ocp@f1000000 {
+                serial@12000 {
+                        clock-frequency = <166666667>;
+                        status = "okay";
+                };
+
+                spi@10600 {
+                        status = "okay";
+
+                        flash@0 {
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                compatible = "mx25l4005a";
+                                reg = <0>;
+                                spi-max-frequency = <20000000>;
+                                mode = <0>;
+
+                                partition@0 {
+                                        reg = <0x0 0x80000>;
+                                        label = "u-boot";
+                                };
+                        };
+                };
+
+                i2c@11000 {
+                        status = "okay";
+
+                        eeprom@50 {
+                                compatible = "at,24c04";
+                                pagesize = <16>;
+                                reg = <0x50>;
+                        };
+                };
+        };
+
+        gpio_keys {
+                compatible = "gpio-keys";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                button@1 {
+                        label = "Power push button";
+                        linux,code = <116>;
+                        gpios = <&gpio1 0 0>;
+                };
+        };
+
+        gpio-leds {
+                compatible = "gpio-leds";
+
+                red-fail {
+                        label = "ns2:red:fail";
+                        gpios = <&gpio0 12 0>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/kirkwood-ns2.dts b/arch/arm/boot/dts/kirkwood-ns2.dts
new file mode 100644
index 000000000000..f2d36ecf36d8
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-ns2.dts
@@ -0,0 +1,30 @@
+/dts-v1/;
+
+/include/ "kirkwood-ns2-common.dtsi"
+
+/ {
+        model = "LaCie Network Space v2";
+        compatible = "lacie,netspace_v2", "marvell,kirkwood-88f6281", "marvell,kirkwood";
+
+        memory {
+                device_type = "memory";
+                reg = <0x00000000 0x10000000>;
+        };
+
+        ocp@f1000000 {
+                sata@80000 {
+                        status = "okay";
+                        nr-ports = <1>;
+                };
+        };
+
+        ns2-leds {
+                compatible = "lacie,ns2-leds";
+
+                blue-sata {
+                        label = "ns2:blue:sata";
+                        slow-gpio = <&gpio0 29 0>;
+                        cmd-gpio = <&gpio0 30 0>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/kirkwood-ns2lite.dts b/arch/arm/boot/dts/kirkwood-ns2lite.dts
new file mode 100644
index 000000000000..b02eb4ea1bb4
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-ns2lite.dts
@@ -0,0 +1,30 @@
+/dts-v1/;
+
+/include/ "kirkwood-ns2-common.dtsi"
+
+/ {
+        model = "LaCie Network Space Lite v2";
+        compatible = "lacie,netspace_lite_v2", "marvell,kirkwood-88f6192", "marvell,kirkwood";
+
+        memory {
+                device_type = "memory";
+                reg = <0x00000000 0x8000000>;
+        };
+
+        ocp@f1000000 {
+                sata@80000 {
+                        status = "okay";
+                        nr-ports = <1>;
+                };
+        };
+
+        gpio-leds {
+                compatible = "gpio-leds";
+
+                blue-sata {
+                        label = "ns2:blue:sata";
+                        gpios = <&gpio0 30 1>;
+                        linux,default-trigger = "default-on";
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/kirkwood-ns2max.dts b/arch/arm/boot/dts/kirkwood-ns2max.dts
new file mode 100644
index 000000000000..bcec4d6cada7
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-ns2max.dts
@@ -0,0 +1,49 @@
+/dts-v1/;
+
+/include/ "kirkwood-ns2-common.dtsi"
+
+/ {
+        model = "LaCie Network Space Max v2";
+        compatible = "lacie,netspace_max_v2", "marvell,kirkwood-88f6281", "marvell,kirkwood";
+
+        memory {
+                device_type = "memory";
+                reg = <0x00000000 0x10000000>;
+        };
+
+        ocp@f1000000 {
+                sata@80000 {
+                        status = "okay";
+                        nr-ports = <2>;
+                };
+        };
+
+        gpio_fan {
+                compatible = "gpio-fan";
+                gpios = <&gpio0 22 1
+                         &gpio0  7 1
+                         &gpio1  1 1
+                         &gpio0 23 1>;
+                gpio-fan,speed-map =
+                        <   0  0
+                         1500 15
+                         1700 14
+                         1800 13
+                         2100 12
+                         3100 11
+                         3300 10
+                         4300  9
+                         5500  8>;
+                alarm-gpios = <&gpio0 25 1>;
+        };
+
+        ns2-leds {
+                compatible = "lacie,ns2-leds";
+
+                blue-sata {
+                        label = "ns2:blue:sata";
+                        slow-gpio = <&gpio0 29 0>;
+                        cmd-gpio = <&gpio0 30 0>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/kirkwood-ns2mini.dts b/arch/arm/boot/dts/kirkwood-ns2mini.dts
new file mode 100644
index 000000000000..b79f5eb25589
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-ns2mini.dts
@@ -0,0 +1,49 @@
+/dts-v1/;
+
+/include/ "kirkwood-ns2-common.dtsi"
+
+/ {
+        model = "LaCie Network Space Mini v2";
+        compatible = "lacie,netspace_mini_v2", "marvell,kirkwood-88f6192", "marvell,kirkwood";
+
+        memory {
+                device_type = "memory";
+                reg = <0x00000000 0x8000000>;
+        };
+
+        ocp@f1000000 {
+                sata@80000 {
+                        status = "okay";
+                        nr-ports = <1>;
+                };
+        };
+
+        gpio_fan {
+                compatible = "gpio-fan";
+                gpios = <&gpio0 22 1
+                         &gpio0  7 1
+                         &gpio1  1 1
+                         &gpio0 23 1>;
+                gpio-fan,speed-map =
+                        <   0  0
+                         3000 15
+                         3180 14
+                         4140 13
+                         4570 12
+                         6760 11
+                         7140 10
+                         7980  9
+                         9200  8>;
+                alarm-gpios = <&gpio0 25 1>;
+        };
+
+        ns2-leds {
+                compatible = "lacie,ns2-leds";
+
+                blue-sata {
+                        label = "ns2:blue:sata";
+                        slow-gpio = <&gpio0 29 0>;
+                        cmd-gpio = <&gpio0 30 0>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/kirkwood-nsa310.dts b/arch/arm/boot/dts/kirkwood-nsa310.dts
new file mode 100644
index 000000000000..5509f9659546
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-nsa310.dts
@@ -0,0 +1,144 @@
+/dts-v1/;
+
+/include/ "kirkwood.dtsi"
+
+/ {
+        model = "ZyXEL NSA310";
+        compatible = "zyxel,nsa310", "marvell,kirkwood-88f6281", "marvell,kirkwood";
+
+        memory {
+                device_type = "memory";
+                reg = <0x00000000 0x10000000>;
+        };
+
+        chosen {
+                bootargs = "console=ttyS0,115200";
+        };
+
+        ocp@f1000000 {
+
+                serial@12000 {
+                        clock-frequency = <200000000>;
+                        status = "ok";
+                };
+
+                sata@80000 {
+                        status = "okay";
+                        nr-ports = <2>;
+                };
+
+                i2c@11000 {
+                        status = "okay";
+                };
+
+                nand@3000000 {
+                        status = "okay";
+                        chip-delay = <35>;
+
+                        partition@0 {
+                                label = "uboot";
+                                reg = <0x0000000 0x0100000>;
+                                read-only;
+                        };
+                        partition@100000 {
+                                label = "uboot_env";
+                                reg = <0x0100000 0x0080000>;
+                        };
+                        partition@180000 {
+                                label = "key_store";
+                                reg = <0x0180000 0x0080000>;
+                        };
+                        partition@200000 {
+                                label = "info";
+                                reg = <0x0200000 0x0080000>;
+                        };
+                        partition@280000 {
+                                label = "etc";
+                                reg = <0x0280000 0x0a00000>;
+                        };
+                        partition@c80000 {
+                                label = "kernel_1";
+                                reg = <0x0c80000 0x0a00000>;
+                        };
+                        partition@1680000 {
+                                label = "rootfs1";
+                                reg = <0x1680000 0x2fc0000>;
+                        };
+                        partition@4640000 {
+                                label = "kernel_2";
+                                reg = <0x4640000 0x0a00000>;
+                        };
+                        partition@5040000 {
+                                label = "rootfs2";
+                                reg = <0x5040000 0x2fc0000>;
+                        };
+                };
+        };
+
+        gpio_keys {
+                compatible = "gpio-keys";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                button@1 {
+                        label = "Power Button";
+                        linux,code = <116>;
+                        gpios = <&gpio1 14 0>;
+                };
+                button@2 {
+                        label = "Copy Button";
+                        linux,code = <133>;
+                        gpios = <&gpio1 5 1>;
+                };
+                button@3 {
+                        label = "Reset Button";
+                        linux,code = <0x198>;
+                        gpios = <&gpio1 4 1>;
+                };
+        };
+
+        gpio-leds {
+                compatible = "gpio-leds";
+
+                green-sys {
+                        label = "nsa310:green:sys";
+                        gpios = <&gpio0 28 0>;
+                };
+                red-sys {
+                        label = "nsa310:red:sys";
+                        gpios = <&gpio0 29 0>;
+                };
+                green-hdd {
+                        label = "nsa310:green:hdd";
+                        gpios = <&gpio1 9 0>;
+                };
+                red-hdd {
+                        label = "nsa310:red:hdd";
+                        gpios = <&gpio1 10 0>;
+                };
+                green-esata {
+                        label = "nsa310:green:esata";
+                        gpios = <&gpio0 12 0>;
+                };
+                red-esata {
+                        label = "nsa310:red:esata";
+                        gpios = <&gpio0 13 0>;
+                };
+                green-usb {
+                        label = "nsa310:green:usb";
+                        gpios = <&gpio0 15 0>;
+                };
+                red-usb {
+                        label = "nsa310:red:usb";
+                        gpios = <&gpio0 16 0>;
+                };
+                green-copy {
+                        label = "nsa310:green:copy";
+                        gpios = <&gpio1 7 0>;
+                };
+                red-copy {
+                        label = "nsa310:red:copy";
+                        gpios = <&gpio1 8 0>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/kirkwood-openblocks_a6.dts b/arch/arm/boot/dts/kirkwood-openblocks_a6.dts
new file mode 100644
index 000000000000..49d3d74d4d38
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-openblocks_a6.dts
@@ -0,0 +1,98 @@
+/dts-v1/;
+
+/include/ "kirkwood.dtsi"
+/include/ "kirkwood-6282.dtsi"
+
+/ {
+        model = "Plat'Home OpenBlocksA6";
+        compatible = "plathome,openblocks-a6", "marvell,kirkwood-88f6283", "marvell,kirkwood";
+
+        memory {
+                device_type = "memory";
+                reg = <0x00000000 0x20000000>;
+        };
+
+        chosen {
+                bootargs = "console=ttyS0,115200n8 earlyprintk";
+        };
+
+        ocp@f1000000 {
+                serial@12000 {
+                        clock-frequency = <200000000>;
+                        status = "ok";
+                };
+
+                serial@12100 {
+                        clock-frequency = <200000000>;
+                        status = "ok";
+                };
+
+                nand@3000000 {
+                        chip-delay = <25>;
+                        status = "okay";
+
+                        partition@0 {
+                                label = "uboot";
+                                reg = <0x0 0x90000>;
+                        };
+
+                        partition@90000 {
+                                label = "env";
+                                reg = <0x90000 0x44000>;
+                        };
+
+                        partition@d4000 {
+                                label = "test";
+                                reg = <0xd4000 0x24000>;
+                        };
+
+                        partition@f4000 {
+                                label = "conf";
+                                reg = <0xf4000 0x400000>;
+                        };
+
+                        partition@4f4000 {
+                                label = "linux";
+                                reg = <0x4f4000 0x1d20000>;
+                        };
+
+                        partition@2214000 {
+                                label = "user";
+                                reg = <0x2214000 0x1dec000>;
+                        };
+                };
+
+                sata@80000 {
+                        nr-ports = <1>;
+                        status = "okay";
+                };
+
+                i2c@11100 {
+                        status = "okay";
+
+                        s35390a: s35390a@30 {
+                                compatible = "s35390a";
+                                reg = <0x30>;
+                        };
+                };
+        };
+
+        gpio-leds {
+                compatible = "gpio-leds";
+
+                led-red {
+                        label = "obsa6:red:stat";
+                        gpios = <&gpio1 9 1>;
+                };
+
+                led-green {
+                        label = "obsa6:green:stat";
+                        gpios = <&gpio1 10 1>;
+                };
+
+                led-yellow {
+                        label = "obsa6:yellow:stat";
+                        gpios = <&gpio1 11 1>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/kirkwood-topkick.dts b/arch/arm/boot/dts/kirkwood-topkick.dts
new file mode 100644
index 000000000000..c0de5a7f660d
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-topkick.dts
@@ -0,0 +1,85 @@
+/dts-v1/;
+
+/include/ "kirkwood.dtsi"
+
+/ {
+        model = "Univeral Scientific Industrial Co. Topkick-1281P2";
+        compatible = "usi,topkick-1281P2", "usi,topkick", "marvell,kirkwood-88f6282", "marvell,kirkwood";
+
+        memory {
+                device_type = "memory";
+                reg = <0x00000000 0x10000000>;
+        };
+
+        chosen {
+                bootargs = "console=ttyS0,115200n8 earlyprintk";
+        };
+
+        ocp@f1000000 {
+                serial@12000 {
+                        clock-frequency = <200000000>;
+                        status = "ok";
+                };
+
+                nand@3000000 {
+                        status = "okay";
+
+                        partition@0 {
+                                label = "u-boot";
+                                reg = <0x0000000 0x180000>;
+                        };
+
+                        partition@180000 {
+                                label = "u-boot env";
+                                reg = <0x0180000 0x20000>;
+                        };
+
+                        partition@200000 {
+                                label = "uImage";
+                                reg = <0x0200000 0x600000>;
+                        };
+
+                        partition@800000 {
+                                label = "uInitrd";
+                                reg = <0x0800000 0x1000000>;
+                        };
+
+                        partition@1800000 {
+                                label = "rootfs";
+                                reg = <0x1800000 0xe800000>;
+                        };
+                };
+
+                sata@80000 {
+                        status = "okay";
+                        nr-ports = <1>;
+                };
+        };
+
+        gpio-leds {
+                compatible = "gpio-leds";
+
+                disk {
+                        label = "topkick:yellow:disk";
+                        gpios = <&gpio0 21 1>;
+                        linux,default-trigger = "ide-disk";
+                };
+                system2 {
+                        label = "topkick:red:system";
+                        gpios = <&gpio1 5 1>;
+                };
+                system {
+                        label = "topkick:blue:system";
+                        gpios = <&gpio1 6 1>;
+                        default-state = "on";
+                };
+                wifi {
+                        label = "topkick:green:wifi";
+                        gpios = <&gpio1 7 1>;
+                };
+                wifi2 {
+                        label = "topkick:yellow:wifi";
+                        gpios = <&gpio1 16 1>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/kirkwood-ts219-6281.dts b/arch/arm/boot/dts/kirkwood-ts219-6281.dts
index ccbf32757800..8295c833887f 100644
--- a/arch/arm/boot/dts/kirkwood-ts219-6281.dts
+++ b/arch/arm/boot/dts/kirkwood-ts219-6281.dts
@@ -1,8 +1,39 @@
 /dts-v1/;
 
 /include/ "kirkwood-ts219.dtsi"
+/include/ "kirkwood-6281.dtsi"
 
 / {
+        ocp@f1000000 {
+                pinctrl: pinctrl@10000 {
+
+                        pinctrl-0 = < &pmx_uart0 &pmx_uart1 &pmx_spi
+                                      &pmx_twsi0 &pmx_sata0 &pmx_sata1
+                                      &pmx_ram_size &pmx_reset_button
+                                      &pmx_USB_copy_button &pmx_board_id>;
+                        pinctrl-names = "default";
+
+                        pmx_ram_size: pmx-ram-size {
+                                /* RAM: 0: 256 MB, 1: 512 MB */
+                                marvell,pins = "mpp36";
+                                marvell,function = "gpio";
+                        };
+                        pmx_USB_copy_button: pmx-USB-copy-button {
+                                marvell,pins = "mpp15";
+                                marvell,function = "gpio";
+                        };
+                        pmx_reset_button: pmx-reset-button {
+                                marvell,pins = "mpp16";
+                                marvell,function = "gpio";
+                        };
+                        pmx_board_id: pmx-board-id {
+                                /* 0: TS-11x, 1: TS-21x */
+                                marvell,pins = "mpp44";
+                                marvell,function = "gpio";
+                        };
+                };
+        };
+
         gpio_keys {
                 compatible = "gpio-keys";
                 #address-cells = <1>;
diff --git a/arch/arm/boot/dts/kirkwood-ts219-6282.dts b/arch/arm/boot/dts/kirkwood-ts219-6282.dts
index fbe9932161a1..df3f95dfba33 100644
--- a/arch/arm/boot/dts/kirkwood-ts219-6282.dts
+++ b/arch/arm/boot/dts/kirkwood-ts219-6282.dts
@@ -1,8 +1,39 @@
 /dts-v1/;
 
 /include/ "kirkwood-ts219.dtsi"
+/include/ "kirkwood-6282.dtsi"
 
 / {
+        ocp@f1000000 {
+                pinctrl: pinctrl@10000 {
+
+                        pinctrl-0 = < &pmx_uart0 &pmx_uart1 &pmx_spi
+                                      &pmx_twsi0 &pmx_sata0 &pmx_sata1
+                                      &pmx_ram_size &pmx_reset_button
+                                      &pmx_USB_copy_button &pmx_board_id>;
+                        pinctrl-names = "default";
+
+                        pmx_ram_size: pmx-ram-size {
+                                /* RAM: 0: 256 MB, 1: 512 MB */
+                                marvell,pins = "mpp36";
+                                marvell,function = "gpio";
+                        };
+                        pmx_reset_button: pmx-reset-button {
+                                marvell,pins = "mpp37";
+                                marvell,function = "gpio";
+                        };
+                        pmx_USB_copy_button: pmx-USB-copy-button {
+                                marvell,pins = "mpp43";
+                                marvell,function = "gpio";
+                        };
+                        pmx_board_id: pmx-board-id {
+                                /* 0: TS-11x, 1: TS-21x */
+                                marvell,pins = "mpp44";
+                                marvell,function = "gpio";
+                        };
+                };
+        };
+
         gpio_keys {
                 compatible = "gpio-keys";
                 #address-cells = <1>;
diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi
index 4e5b8154a5be..a990c30f0a26 100644
--- a/arch/arm/boot/dts/kirkwood.dtsi
+++ b/arch/arm/boot/dts/kirkwood.dtsi
@@ -4,6 +4,10 @@
         compatible = "marvell,kirkwood";
         interrupt-parent = <&intc>;
 
+        aliases {
+               gpio0 = &gpio0;
+               gpio1 = &gpio1;
+        };
         intc: interrupt-controller {
                 compatible = "marvell,orion-intc", "marvell,intc";
                 interrupt-controller;
@@ -24,7 +28,8 @@
                         #gpio-cells = <2>;
                         gpio-controller;
                         reg = <0x10100 0x40>;
-                        ngpio = <32>;
+                        ngpios = <32>;
+                        interrupt-controller;
                         interrupts = <35>, <36>, <37>, <38>;
                 };
 
@@ -33,7 +38,8 @@
                         #gpio-cells = <2>;
                         gpio-controller;
                         reg = <0x10140 0x40>;
-                        ngpio = <18>;
+                        ngpios = <18>;
+                        interrupt-controller;
                         interrupts = <39>, <40>, <41>;
                 };
 
@@ -77,6 +83,13 @@
                         status = "okay";
                 };
 
+                ehci@50000 {
+                        compatible = "marvell,orion-ehci";
+                        reg = <0x50000 0x1000>;
+                        interrupts = <19>;
+                        status = "okay";
+                };
+
                 sata@80000 {
                         compatible = "marvell,orion-sata";
                         reg = <0x80000 0x5000>;
diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi
index e5ffe960dbf3..1582f484a867 100644
--- a/arch/arm/boot/dts/lpc32xx.dtsi
+++ b/arch/arm/boot/dts/lpc32xx.dtsi
@@ -182,6 +182,13 @@
                                 pnx,timeout = <0x64>;
                         };
 
+                        mpwm: mpwm@400E8000 {
+                                compatible = "nxp,lpc3220-motor-pwm";
+                                reg = <0x400E8000 0x78>;
+                                status = "disabled";
+                                #pwm-cells = <2>;
+                        };
+
                         i2cusb: i2c@31020300 {
                                 compatible = "nxp,pnx-i2c";
                                 reg = <0x31020300 0x100>;
diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi
index 581cb081cb0f..761c4b69b25b 100644
--- a/arch/arm/boot/dts/omap2.dtsi
+++ b/arch/arm/boot/dts/omap2.dtsi
@@ -12,6 +12,7 @@
 
 / {
         compatible = "ti,omap2430", "ti,omap2420", "ti,omap2";
+        interrupt-parent = <&intc>;
 
         aliases {
                 serial0 = &uart1;
@@ -65,5 +66,90 @@
                         ti,hwmods = "uart3";
                         clock-frequency = <48000000>;
                 };
+
+                timer2: timer@4802a000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4802a000 0x400>;
+                        interrupts = <38>;
+                        ti,hwmods = "timer2";
+                };
+
+                timer3: timer@48078000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48078000 0x400>;
+                        interrupts = <39>;
+                        ti,hwmods = "timer3";
+                };
+
+                timer4: timer@4807a000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4807a000 0x400>;
+                        interrupts = <40>;
+                        ti,hwmods = "timer4";
+                };
+
+                timer5: timer@4807c000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4807c000 0x400>;
+                        interrupts = <41>;
+                        ti,hwmods = "timer5";
+                        ti,timer-dsp;
+                };
+
+                timer6: timer@4807e000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4807e000 0x400>;
+                        interrupts = <42>;
+                        ti,hwmods = "timer6";
+                        ti,timer-dsp;
+                };
+
+                timer7: timer@48080000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48080000 0x400>;
+                        interrupts = <43>;
+                        ti,hwmods = "timer7";
+                        ti,timer-dsp;
+                };
+
+                timer8: timer@48082000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48082000 0x400>;
+                        interrupts = <44>;
+                        ti,hwmods = "timer8";
+                        ti,timer-dsp;
+                };
+
+                timer9: timer@48084000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48084000 0x400>;
+                        interrupts = <45>;
+                        ti,hwmods = "timer9";
+                        ti,timer-pwm;
+                };
+
+                timer10: timer@48086000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48086000 0x400>;
+                        interrupts = <46>;
+                        ti,hwmods = "timer10";
+                        ti,timer-pwm;
+                };
+
+                timer11: timer@48088000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48088000 0x400>;
+                        interrupts = <47>;
+                        ti,hwmods = "timer11";
+                        ti,timer-pwm;
+                };
+
+                timer12: timer@4808a000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4808a000 0x400>;
+                        interrupts = <48>;
+                        ti,hwmods = "timer12";
+                        ti,timer-pwm;
+                };
         };
 };
diff --git a/arch/arm/boot/dts/omap2420.dtsi b/arch/arm/boot/dts/omap2420.dtsi
index bfd76b4a0ddc..af6560908905 100644
--- a/arch/arm/boot/dts/omap2420.dtsi
+++ b/arch/arm/boot/dts/omap2420.dtsi
@@ -14,6 +14,12 @@
         compatible = "ti,omap2420", "ti,omap2";
 
         ocp {
+                counter32k: counter@48004000 {
+                        compatible = "ti,omap-counter32k";
+                        reg = <0x48004000 0x20>;
+                        ti,hwmods = "counter_32k";
+                };
+
                 omap2420_pmx: pinmux@48000030 {
                         compatible = "ti,omap2420-padconf", "pinctrl-single";
                         reg = <0x48000030 0x0113>;
@@ -30,7 +36,6 @@
                         interrupts = <59>, /* TX interrupt */
                                      <60>; /* RX interrupt */
                         interrupt-names = "tx", "rx";
-                        interrupt-parent = <&intc>;
                         ti,hwmods = "mcbsp1";
                 };
 
@@ -41,8 +46,15 @@
                         interrupts = <62>, /* TX interrupt */
                                      <63>; /* RX interrupt */
                         interrupt-names = "tx", "rx";
-                        interrupt-parent = <&intc>;
                         ti,hwmods = "mcbsp2";
                 };
+
+                timer1: timer@48028000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48028000 0x400>;
+                        interrupts = <37>;
+                        ti,hwmods = "timer1";
+                        ti,timer-alwon;
+                };
         };
 };
diff --git a/arch/arm/boot/dts/omap2430.dtsi b/arch/arm/boot/dts/omap2430.dtsi
index 4565d9750f4d..c3924457c9b6 100644
--- a/arch/arm/boot/dts/omap2430.dtsi
+++ b/arch/arm/boot/dts/omap2430.dtsi
@@ -14,6 +14,12 @@
         compatible = "ti,omap2430", "ti,omap2";
 
         ocp {
+                counter32k: counter@49020000 {
+                        compatible = "ti,omap-counter32k";
+                        reg = <0x49020000 0x20>;
+                        ti,hwmods = "counter_32k";
+                };
+
                 omap2430_pmx: pinmux@49002030 {
                         compatible = "ti,omap2430-padconf", "pinctrl-single";
                         reg = <0x49002030 0x0154>;
@@ -32,7 +38,6 @@
                                      <60>, /* RX interrupt */
                                      <61>; /* RX overflow interrupt */
                         interrupt-names = "common", "tx", "rx", "rx_overflow";
-                        interrupt-parent = <&intc>;
                         ti,buffer-size = <128>;
                         ti,hwmods = "mcbsp1";
                 };
@@ -45,7 +50,6 @@
                                      <62>, /* TX interrupt */
                                      <63>; /* RX interrupt */
                         interrupt-names = "common", "tx", "rx";
-                        interrupt-parent = <&intc>;
                         ti,buffer-size = <128>;
                         ti,hwmods = "mcbsp2";
                 };
@@ -58,7 +62,6 @@
                                      <89>, /* TX interrupt */
                                      <90>; /* RX interrupt */
                         interrupt-names = "common", "tx", "rx";
-                        interrupt-parent = <&intc>;
                         ti,buffer-size = <128>;
                         ti,hwmods = "mcbsp3";
                 };
@@ -71,7 +74,6 @@
                                      <54>, /* TX interrupt */
                                      <55>; /* RX interrupt */
                         interrupt-names = "common", "tx", "rx";
-                        interrupt-parent = <&intc>;
                         ti,buffer-size = <128>;
                         ti,hwmods = "mcbsp4";
                 };
@@ -84,9 +86,16 @@
                                      <81>, /* TX interrupt */
                                      <82>; /* RX interrupt */
                         interrupt-names = "common", "tx", "rx";
-                        interrupt-parent = <&intc>;
                         ti,buffer-size = <128>;
                         ti,hwmods = "mcbsp5";
                 };
+
+                timer1: timer@49018000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x49018000 0x400>;
+                        interrupts = <37>;
+                        ti,hwmods = "timer1";
+                        ti,timer-alwon;
+                };
         };
 };
diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts
index c38cf76df81f..3705a81c1fc2 100644
--- a/arch/arm/boot/dts/omap3-beagle-xm.dts
+++ b/arch/arm/boot/dts/omap3-beagle-xm.dts
@@ -55,12 +55,6 @@
                 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
                 interrupt-parent = <&intc>;
 
-                vsim: regulator-vsim {
-                        compatible = "ti,twl4030-vsim";
-                        regulator-min-microvolt = <1800000>;
-                        regulator-max-microvolt = <3000000>;
-                };
-
                 twl_audio: audio {
                         compatible = "ti,twl4030-audio";
                         codec {
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
new file mode 100644
index 000000000000..f624dc85d441
--- /dev/null
+++ b/arch/arm/boot/dts/omap3-beagle.dts
@@ -0,0 +1,67 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+/include/ "omap3.dtsi"
+
+/ {
+        model = "TI OMAP3 BeagleBoard";
+        compatible = "ti,omap3-beagle", "ti,omap3";
+
+        memory {
+                device_type = "memory";
+                reg = <0x80000000 0x10000000>; /* 256 MB */
+        };
+
+        leds {
+                compatible = "gpio-leds";
+                pmu_stat {
+                        label = "beagleboard::pmu_stat";
+                        gpios = <&twl_gpio 19 0>; /* LEDB */
+                };
+
+                heartbeat {
+                        label = "beagleboard::usr0";
+                        gpios = <&gpio5 22 0>; /* 150 -> D6 LED */
+                        linux,default-trigger = "heartbeat";
+                };
+
+                mmc {
+                        label = "beagleboard::usr1";
+                        gpios = <&gpio5 21 0>; /* 149 -> D7 LED */
+                        linux,default-trigger = "mmc0";
+                };
+        };
+
+};
+
+&i2c1 {
+        clock-frequency = <2600000>;
+
+        twl: twl@48 {
+                reg = <0x48>;
+                interrupts = <7>; /* SYS_NIRQ cascaded to intc */
+                interrupt-parent = <&intc>;
+        };
+};
+
+/include/ "twl4030.dtsi"
+
+&mmc1 {
+        vmmc-supply = <&vmmc1>;
+        vmmc_aux-supply = <&vsim>;
+        bus-width = <8>;
+};
+
+&mmc2 {
+        status = "disabled";
+};
+
+&mmc3 {
+        status = "disabled";
+};
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 696e929d0304..1acc26148ffc 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -12,6 +12,7 @@
 
 / {
         compatible = "ti,omap3430", "ti,omap3";
+        interrupt-parent = <&intc>;
 
         aliases {
                 serial0 = &uart1;
@@ -60,6 +61,12 @@
                 ranges;
                 ti,hwmods = "l3_main";
 
+                counter32k: counter@48320000 {
+                        compatible = "ti,omap-counter32k";
+                        reg = <0x48320000 0x20>;
+                        ti,hwmods = "counter_32k";
+                };
+
                 intc: interrupt-controller@48200000 {
                         compatible = "ti,omap2-intc";
                         interrupt-controller;
@@ -240,7 +247,6 @@
                                      <59>, /* TX interrupt */
                                      <60>; /* RX interrupt */
                         interrupt-names = "common", "tx", "rx";
-                        interrupt-parent = <&intc>;
                         ti,buffer-size = <128>;
                         ti,hwmods = "mcbsp1";
                 };
@@ -255,7 +261,6 @@
                                      <63>, /* RX interrupt */
                                      <4>;  /* Sidetone */
                         interrupt-names = "common", "tx", "rx", "sidetone";
-                        interrupt-parent = <&intc>;
                         ti,buffer-size = <1280>;
                         ti,hwmods = "mcbsp2", "mcbsp2_sidetone";
                 };
@@ -270,7 +275,6 @@
                                      <90>, /* RX interrupt */
                                      <5>;  /* Sidetone */
                         interrupt-names = "common", "tx", "rx", "sidetone";
-                        interrupt-parent = <&intc>;
                         ti,buffer-size = <128>;
                         ti,hwmods = "mcbsp3", "mcbsp3_sidetone";
                 };
@@ -283,7 +287,6 @@
                                      <54>, /* TX interrupt */
                                      <55>; /* RX interrupt */
                         interrupt-names = "common", "tx", "rx";
-                        interrupt-parent = <&intc>;
                         ti,buffer-size = <128>;
                         ti,hwmods = "mcbsp4";
                 };
@@ -296,9 +299,103 @@
                                      <81>, /* TX interrupt */
                                      <82>; /* RX interrupt */
                         interrupt-names = "common", "tx", "rx";
-                        interrupt-parent = <&intc>;
                         ti,buffer-size = <128>;
                         ti,hwmods = "mcbsp5";
                 };
+
+                timer1: timer@48318000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48318000 0x400>;
+                        interrupts = <37>;
+                        ti,hwmods = "timer1";
+                        ti,timer-alwon;
+                };
+
+                timer2: timer@49032000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x49032000 0x400>;
+                        interrupts = <38>;
+                        ti,hwmods = "timer2";
+                };
+
+                timer3: timer@49034000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x49034000 0x400>;
+                        interrupts = <39>;
+                        ti,hwmods = "timer3";
+                };
+
+                timer4: timer@49036000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x49036000 0x400>;
+                        interrupts = <40>;
+                        ti,hwmods = "timer4";
+                };
+
+                timer5: timer@49038000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x49038000 0x400>;
+                        interrupts = <41>;
+                        ti,hwmods = "timer5";
+                        ti,timer-dsp;
+                };
+
+                timer6: timer@4903a000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4903a000 0x400>;
+                        interrupts = <42>;
+                        ti,hwmods = "timer6";
+                        ti,timer-dsp;
+                };
+
+                timer7: timer@4903c000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4903c000 0x400>;
+                        interrupts = <43>;
+                        ti,hwmods = "timer7";
+                        ti,timer-dsp;
+                };
+
+                timer8: timer@4903e000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4903e000 0x400>;
+                        interrupts = <44>;
+                        ti,hwmods = "timer8";
+                        ti,timer-pwm;
+                        ti,timer-dsp;
+                };
+
+                timer9: timer@49040000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x49040000 0x400>;
+                        interrupts = <45>;
+                        ti,hwmods = "timer9";
+                        ti,timer-pwm;
+                };
+
+                timer10: timer@48086000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48086000 0x400>;
+                        interrupts = <46>;
+                        ti,hwmods = "timer10";
+                        ti,timer-pwm;
+                };
+
+                timer11: timer@48088000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48088000 0x400>;
+                        interrupts = <47>;
+                        ti,hwmods = "timer11";
+                        ti,timer-pwm;
+                };
+
+                timer12: timer@48304000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48304000 0x400>;
+                        interrupts = <95>;
+                        ti,hwmods = "timer12";
+                        ti,timer-alwon;
+                        ti,timer-secure;
+                };
         };
 };
diff --git a/arch/arm/boot/dts/omap4-panda-a4.dts b/arch/arm/boot/dts/omap4-panda-a4.dts
new file mode 100644
index 000000000000..75466d2abfb5
--- /dev/null
+++ b/arch/arm/boot/dts/omap4-panda-a4.dts
@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/include/ "omap4-panda.dts"
+
+/* Pandaboard Rev A4+ have external pullups on SCL & SDA */
+&dss_hdmi_pins {
+        pinctrl-single,pins = <
+                0x5a 0x118      /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */
+                0x5c 0x100      /* hdmi_scl.hdmi_scl INPUT | MODE 0 */
+                0x5e 0x100      /* hdmi_sda.hdmi_sda INPUT | MODE 0 */
+                >;
+};
diff --git a/arch/arm/boot/dts/omap4-pandaES.dts b/arch/arm/boot/dts/omap4-panda-es.dts
index d4ba43a48d9b..73bc1a67e444 100644
--- a/arch/arm/boot/dts/omap4-pandaES.dts
+++ b/arch/arm/boot/dts/omap4-panda-es.dts
@@ -22,3 +22,12 @@
                 "AFML", "Line In",
                 "AFMR", "Line In";
 };
+
+/* PandaboardES has external pullups on SCL & SDA */
+&dss_hdmi_pins {
+        pinctrl-single,pins = <
+                0x5a 0x118      /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */
+                0x5c 0x100      /* hdmi_scl.hdmi_scl INPUT | MODE 0 */
+                0x5e 0x100      /* hdmi_sda.hdmi_sda INPUT | MODE 0 */
+                >;
+};
diff --git a/arch/arm/boot/dts/omap4-panda.dts b/arch/arm/boot/dts/omap4-panda.dts
index e8f927cbb376..4122efe31cfd 100644
--- a/arch/arm/boot/dts/omap4-panda.dts
+++ b/arch/arm/boot/dts/omap4-panda.dts
@@ -65,6 +65,8 @@
                         &twl6040_pins
                         &mcpdm_pins
                         &mcbsp1_pins
+                        &dss_hdmi_pins
+                        &tpd12s015_pins
         >;
 
         twl6040_pins: pinmux_twl6040_pins {
@@ -92,6 +94,22 @@
                         0xc4 0x100      /* abe_mcbsp1_fsx.abe_mcbsp1_fsx INPUT | MODE0 */
                 >;
         };
+
+        dss_hdmi_pins: pinmux_dss_hdmi_pins {
+                pinctrl-single,pins = <
+                        0x5a 0x118      /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */
+                        0x5c 0x118      /* hdmi_scl.hdmi_scl INPUT PULLUP | MODE 0 */
+                        0x5e 0x118      /* hdmi_sda.hdmi_sda INPUT PULLUP | MODE 0 */
+                >;
+        };
+
+        tpd12s015_pins: pinmux_tpd12s015_pins {
+                pinctrl-single,pins = <
+                        0x22 0x3        /* gpmc_a17.gpio_41 OUTPUT | MODE3 */
+                        0x48 0x3        /* gpmc_nbe1.gpio_60 OUTPUT | MODE3 */
+                        0x58 0x10b      /* hdmi_hpd.gpio_63 INPUT PULLDOWN | MODE3 */
+                >;
+        };
 };
 
 &i2c1 {
@@ -184,3 +202,7 @@
 &dmic {
         status = "disabled";
 };
+
+&twl_usb_comparator {
+        usb-supply = <&vusb>;
+};
diff --git a/arch/arm/boot/dts/omap4-sdp-es23plus.dts b/arch/arm/boot/dts/omap4-sdp-es23plus.dts
new file mode 100644
index 000000000000..b4a40ffbce31
--- /dev/null
+++ b/arch/arm/boot/dts/omap4-sdp-es23plus.dts
@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/include/ "omap4-sdp.dts"
+
+/* SDP boards with 4430 ES2.3+ or 4460 have external pullups on SCL & SDA */
+&dss_hdmi_pins {
+        pinctrl-single,pins = <
+                0x5a 0x118      /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */
+                0x5c 0x100      /* hdmi_scl.hdmi_scl INPUT | MODE 0 */
+                0x5e 0x100      /* hdmi_sda.hdmi_sda INPUT | MODE 0 */
+                >;
+};
diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts
index 5b7e04fbff50..43e5258a9372 100644
--- a/arch/arm/boot/dts/omap4-sdp.dts
+++ b/arch/arm/boot/dts/omap4-sdp.dts
@@ -124,6 +124,8 @@
                         &dmic_pins
                         &mcbsp1_pins
                         &mcbsp2_pins
+                        &dss_hdmi_pins
+                        &tpd12s015_pins
         >;
 
         uart2_pins: pinmux_uart2_pins {
@@ -194,6 +196,22 @@
                         0xbc 0x100      /* abe_mcbsp2_fsx.abe_mcbsp2_fsx INPUT | MODE0 */
                 >;
         };
+
+        dss_hdmi_pins: pinmux_dss_hdmi_pins {
+                pinctrl-single,pins = <
+                        0x5a 0x118      /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */
+                        0x5c 0x118      /* hdmi_scl.hdmi_scl INPUT PULLUP | MODE 0 */
+                        0x5e 0x118      /* hdmi_sda.hdmi_sda INPUT PULLUP | MODE 0 */
+                >;
+        };
+
+        tpd12s015_pins: pinmux_tpd12s015_pins {
+                pinctrl-single,pins = <
+                        0x22 0x3        /* gpmc_a17.gpio_41 OUTPUT | MODE3 */
+                        0x48 0x3        /* gpmc_nbe1.gpio_60 OUTPUT | MODE3 */
+                        0x58 0x10b      /* hdmi_hpd.gpio_63 INPUT PULLDOWN | MODE3 */
+                >;
+        };
 };
 
 &i2c1 {
@@ -406,3 +424,7 @@
 &mcbsp3 {
         status = "disabled";
 };
+
+&twl_usb_comparator {
+        usb-supply = <&vusb>;
+};
diff --git a/arch/arm/boot/dts/omap4-var_som.dts b/arch/arm/boot/dts/omap4-var-som.dts
index 6601e6af6092..6601e6af6092 100644
--- a/arch/arm/boot/dts/omap4-var_som.dts
+++ b/arch/arm/boot/dts/omap4-var-som.dts
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 3883f94fdbd0..739bb79e410e 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -95,6 +95,12 @@
                 ranges;
                 ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
 
+                counter32k: counter@4a304000 {
+                        compatible = "ti,omap-counter32k";
+                        reg = <0x4a304000 0x20>;
+                        ti,hwmods = "counter_32k";
+                };
+
                 omap4_pmx_core: pinmux@4a100040 {
                         compatible = "ti,omap4-padconf", "pinctrl-single";
                         reg = <0x4a100040 0x0196>;
@@ -340,7 +346,6 @@
                               <0x49032000 0x7f>; /* L3 Interconnect */
                         reg-names = "mpu", "dma";
                         interrupts = <0 112 0x4>;
-                        interrupt-parent = <&gic>;
                         ti,hwmods = "mcpdm";
                 };
 
@@ -350,7 +355,6 @@
                               <0x4902e000 0x7f>; /* L3 Interconnect */
                         reg-names = "mpu", "dma";
                         interrupts = <0 114 0x4>;
-                        interrupt-parent = <&gic>;
                         ti,hwmods = "dmic";
                 };
 
@@ -361,7 +365,6 @@
                         reg-names = "mpu", "dma";
                         interrupts = <0 17 0x4>;
                         interrupt-names = "common";
-                        interrupt-parent = <&gic>;
                         ti,buffer-size = <128>;
                         ti,hwmods = "mcbsp1";
                 };
@@ -373,7 +376,6 @@
                         reg-names = "mpu", "dma";
                         interrupts = <0 22 0x4>;
                         interrupt-names = "common";
-                        interrupt-parent = <&gic>;
                         ti,buffer-size = <128>;
                         ti,hwmods = "mcbsp2";
                 };
@@ -385,7 +387,6 @@
                         reg-names = "mpu", "dma";
                         interrupts = <0 23 0x4>;
                         interrupt-names = "common";
-                        interrupt-parent = <&gic>;
                         ti,buffer-size = <128>;
                         ti,hwmods = "mcbsp3";
                 };
@@ -396,7 +397,6 @@
                         reg-names = "mpu";
                         interrupts = <0 16 0x4>;
                         interrupt-names = "common";
-                        interrupt-parent = <&gic>;
                         ti,buffer-size = <128>;
                         ti,hwmods = "mcbsp4";
                 };
@@ -431,12 +431,103 @@
                         hw-caps-temp-alert;
                 };
 
-                ocp2scp {
+                ocp2scp@4a0ad000 {
                         compatible = "ti,omap-ocp2scp";
+                        reg = <0x4a0ad000 0x1f>;
                         #address-cells = <1>;
                         #size-cells = <1>;
                         ranges;
                         ti,hwmods = "ocp2scp_usb_phy";
                 };
+
+                timer1: timer@4a318000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4a318000 0x80>;
+                        interrupts = <0 37 0x4>;
+                        ti,hwmods = "timer1";
+                        ti,timer-alwon;
+                };
+
+                timer2: timer@48032000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48032000 0x80>;
+                        interrupts = <0 38 0x4>;
+                        ti,hwmods = "timer2";
+                };
+
+                timer3: timer@48034000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48034000 0x80>;
+                        interrupts = <0 39 0x4>;
+                        ti,hwmods = "timer3";
+                };
+
+                timer4: timer@48036000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48036000 0x80>;
+                        interrupts = <0 40 0x4>;
+                        ti,hwmods = "timer4";
+                };
+
+                timer5: timer@40138000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x40138000 0x80>,
+                              <0x49038000 0x80>;
+                        interrupts = <0 41 0x4>;
+                        ti,hwmods = "timer5";
+                        ti,timer-dsp;
+                };
+
+                timer6: timer@4013a000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4013a000 0x80>,
+                              <0x4903a000 0x80>;
+                        interrupts = <0 42 0x4>;
+                        ti,hwmods = "timer6";
+                        ti,timer-dsp;
+                };
+
+                timer7: timer@4013c000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4013c000 0x80>,
+                              <0x4903c000 0x80>;
+                        interrupts = <0 43 0x4>;
+                        ti,hwmods = "timer7";
+                        ti,timer-dsp;
+                };
+
+                timer8: timer@4013e000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4013e000 0x80>,
+                              <0x4903e000 0x80>;
+                        interrupts = <0 44 0x4>;
+                        ti,hwmods = "timer8";
+                        ti,timer-pwm;
+                        ti,timer-dsp;
+                };
+
+                timer9: timer@4803e000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4803e000 0x80>;
+                        interrupts = <0 45 0x4>;
+                        ti,hwmods = "timer9";
+                        ti,timer-pwm;
+                };
+
+                timer10: timer@48086000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48086000 0x80>;
+                        interrupts = <0 46 0x4>;
+                        ti,hwmods = "timer10";
+                        ti,timer-pwm;
+                };
+
+                timer11: timer@48088000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48088000 0x80>;
+                        interrupts = <0 47 0x4>;
+                        ti,hwmods = "timer11";
+                        ti,timer-pwm;
+                };
         };
 };
diff --git a/arch/arm/boot/dts/omap5-evm.dts b/arch/arm/boot/dts/omap5-evm.dts
index c663eba73168..8722c15bbba2 100644
--- a/arch/arm/boot/dts/omap5-evm.dts
+++ b/arch/arm/boot/dts/omap5-evm.dts
@@ -8,6 +8,7 @@
 /dts-v1/;
 
 /include/ "omap5.dtsi"
+/include/ "samsung_k3pe0e000b.dtsi"
 
 / {
         model = "TI OMAP5 EVM board";
@@ -15,7 +16,7 @@
 
         memory {
                 device_type = "memory";
-                reg = <0x80000000 0x40000000>; /* 1 GB */
+                reg = <0x80000000 0x80000000>; /* 2 GB */
         };
 
         vmmcsd_fixed: fixedregulator-mmcsd {
@@ -140,3 +141,13 @@
 &mcbsp3 {
         status = "disabled";
 };
+
+&emif1 {
+        cs1-used;
+        device-handle = <&samsung_K3PE0E000B>;
+};
+
+&emif2 {
+        cs1-used;
+        device-handle = <&samsung_K3PE0E000B>;
+};
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 42c78beb4fdc..790bb2a4b343 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -77,6 +77,12 @@
                 ranges;
                 ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
 
+                counter32k: counter@4ae04000 {
+                        compatible = "ti,omap-counter32k";
+                        reg = <0x4ae04000 0x40>;
+                        ti,hwmods = "counter_32k";
+                };
+
                 omap5_pmx_core: pinmux@4a002840 {
                         compatible = "ti,omap4-padconf", "pinctrl-single";
                         reg = <0x4a002840 0x01b6>;
@@ -104,6 +110,8 @@
 
                 gpio1: gpio@4ae10000 {
                         compatible = "ti,omap4-gpio";
+                        reg = <0x4ae10000 0x200>;
+                        interrupts = <0 29 0x4>;
                         ti,hwmods = "gpio1";
                         gpio-controller;
                         #gpio-cells = <2>;
@@ -113,6 +121,8 @@
 
                 gpio2: gpio@48055000 {
                         compatible = "ti,omap4-gpio";
+                        reg = <0x48055000 0x200>;
+                        interrupts = <0 30 0x4>;
                         ti,hwmods = "gpio2";
                         gpio-controller;
                         #gpio-cells = <2>;
@@ -122,6 +132,8 @@
 
                 gpio3: gpio@48057000 {
                         compatible = "ti,omap4-gpio";
+                        reg = <0x48057000 0x200>;
+                        interrupts = <0 31 0x4>;
                         ti,hwmods = "gpio3";
                         gpio-controller;
                         #gpio-cells = <2>;
@@ -131,6 +143,8 @@
 
                 gpio4: gpio@48059000 {
                         compatible = "ti,omap4-gpio";
+                        reg = <0x48059000 0x200>;
+                        interrupts = <0 32 0x4>;
                         ti,hwmods = "gpio4";
                         gpio-controller;
                         #gpio-cells = <2>;
@@ -140,6 +154,8 @@
 
                 gpio5: gpio@4805b000 {
                         compatible = "ti,omap4-gpio";
+                        reg = <0x4805b000 0x200>;
+                        interrupts = <0 33 0x4>;
                         ti,hwmods = "gpio5";
                         gpio-controller;
                         #gpio-cells = <2>;
@@ -149,6 +165,8 @@
 
                 gpio6: gpio@4805d000 {
                         compatible = "ti,omap4-gpio";
+                        reg = <0x4805d000 0x200>;
+                        interrupts = <0 34 0x4>;
                         ti,hwmods = "gpio6";
                         gpio-controller;
                         #gpio-cells = <2>;
@@ -158,6 +176,8 @@
 
                 gpio7: gpio@48051000 {
                         compatible = "ti,omap4-gpio";
+                        reg = <0x48051000 0x200>;
+                        interrupts = <0 35 0x4>;
                         ti,hwmods = "gpio7";
                         gpio-controller;
                         #gpio-cells = <2>;
@@ -167,6 +187,8 @@
 
                 gpio8: gpio@48053000 {
                         compatible = "ti,omap4-gpio";
+                        reg = <0x48053000 0x200>;
+                        interrupts = <0 121 0x4>;
                         ti,hwmods = "gpio8";
                         gpio-controller;
                         #gpio-cells = <2>;
@@ -176,6 +198,8 @@
 
                 i2c1: i2c@48070000 {
                         compatible = "ti,omap4-i2c";
+                        reg = <0x48070000 0x100>;
+                        interrupts = <0 56 0x4>;
                         #address-cells = <1>;
                         #size-cells = <0>;
                         ti,hwmods = "i2c1";
@@ -183,6 +207,8 @@
 
                 i2c2: i2c@48072000 {
                         compatible = "ti,omap4-i2c";
+                        reg = <0x48072000 0x100>;
+                        interrupts = <0 57 0x4>;
                         #address-cells = <1>;
                         #size-cells = <0>;
                         ti,hwmods = "i2c2";
@@ -190,20 +216,26 @@
 
                 i2c3: i2c@48060000 {
                         compatible = "ti,omap4-i2c";
+                        reg = <0x48060000 0x100>;
+                        interrupts = <0 61 0x4>;
                         #address-cells = <1>;
                         #size-cells = <0>;
                         ti,hwmods = "i2c3";
                 };
 
-                i2c4: i2c@4807A000 {
+                i2c4: i2c@4807a000 {
                         compatible = "ti,omap4-i2c";
+                        reg = <0x4807a000 0x100>;
+                        interrupts = <0 62 0x4>;
                         #address-cells = <1>;
                         #size-cells = <0>;
                         ti,hwmods = "i2c4";
                 };
 
-                i2c5: i2c@4807C000 {
+                i2c5: i2c@4807c000 {
                         compatible = "ti,omap4-i2c";
+                        reg = <0x4807c000 0x100>;
+                        interrupts = <0 60 0x4>;
                         #address-cells = <1>;
                         #size-cells = <0>;
                         ti,hwmods = "i2c5";
@@ -211,42 +243,56 @@
 
                 uart1: serial@4806a000 {
                         compatible = "ti,omap4-uart";
+                        reg = <0x4806a000 0x100>;
+                        interrupts = <0 72 0x4>;
                         ti,hwmods = "uart1";
                         clock-frequency = <48000000>;
                 };
 
                 uart2: serial@4806c000 {
                         compatible = "ti,omap4-uart";
+                        reg = <0x4806c000 0x100>;
+                        interrupts = <0 73 0x4>;
                         ti,hwmods = "uart2";
                         clock-frequency = <48000000>;
                 };
 
                 uart3: serial@48020000 {
                         compatible = "ti,omap4-uart";
+                        reg = <0x48020000 0x100>;
+                        interrupts = <0 74 0x4>;
                         ti,hwmods = "uart3";
                         clock-frequency = <48000000>;
                 };
 
                 uart4: serial@4806e000 {
                         compatible = "ti,omap4-uart";
+                        reg = <0x4806e000 0x100>;
+                        interrupts = <0 70 0x4>;
                         ti,hwmods = "uart4";
                         clock-frequency = <48000000>;
                 };
 
                 uart5: serial@48066000 {
-                        compatible = "ti,omap5-uart";
+                        compatible = "ti,omap4-uart";
+                        reg = <0x48066000 0x100>;
+                        interrupts = <0 105 0x4>;
                         ti,hwmods = "uart5";
                         clock-frequency = <48000000>;
                 };
 
                 uart6: serial@48068000 {
-                        compatible = "ti,omap6-uart";
+                        compatible = "ti,omap4-uart";
+                        reg = <0x48068000 0x100>;
+                        interrupts = <0 106 0x4>;
                         ti,hwmods = "uart6";
                         clock-frequency = <48000000>;
                 };
 
                 mmc1: mmc@4809c000 {
                         compatible = "ti,omap4-hsmmc";
+                        reg = <0x4809c000 0x400>;
+                        interrupts = <0 83 0x4>;
                         ti,hwmods = "mmc1";
                         ti,dual-volt;
                         ti,needs-special-reset;
@@ -254,24 +300,32 @@
 
                 mmc2: mmc@480b4000 {
                         compatible = "ti,omap4-hsmmc";
+                        reg = <0x480b4000 0x400>;
+                        interrupts = <0 86 0x4>;
                         ti,hwmods = "mmc2";
                         ti,needs-special-reset;
                 };
 
                 mmc3: mmc@480ad000 {
                         compatible = "ti,omap4-hsmmc";
+                        reg = <0x480ad000 0x400>;
+                        interrupts = <0 94 0x4>;
                         ti,hwmods = "mmc3";
                         ti,needs-special-reset;
                 };
 
                 mmc4: mmc@480d1000 {
                         compatible = "ti,omap4-hsmmc";
+                        reg = <0x480d1000 0x400>;
+                        interrupts = <0 96 0x4>;
                         ti,hwmods = "mmc4";
                         ti,needs-special-reset;
                 };
 
                 mmc5: mmc@480d5000 {
                         compatible = "ti,omap4-hsmmc";
+                        reg = <0x480d5000 0x400>;
+                        interrupts = <0 59 0x4>;
                         ti,hwmods = "mmc5";
                         ti,needs-special-reset;
                 };
@@ -287,7 +341,6 @@
                               <0x49032000 0x7f>; /* L3 Interconnect */
                         reg-names = "mpu", "dma";
                         interrupts = <0 112 0x4>;
-                        interrupt-parent = <&gic>;
                         ti,hwmods = "mcpdm";
                 };
 
@@ -297,7 +350,6 @@
                               <0x4902e000 0x7f>; /* L3 Interconnect */
                         reg-names = "mpu", "dma";
                         interrupts = <0 114 0x4>;
-                        interrupt-parent = <&gic>;
                         ti,hwmods = "dmic";
                 };
 
@@ -308,7 +360,6 @@
                         reg-names = "mpu", "dma";
                         interrupts = <0 17 0x4>;
                         interrupt-names = "common";
-                        interrupt-parent = <&gic>;
                         ti,buffer-size = <128>;
                         ti,hwmods = "mcbsp1";
                 };
@@ -320,7 +371,6 @@
                         reg-names = "mpu", "dma";
                         interrupts = <0 22 0x4>;
                         interrupt-names = "common";
-                        interrupt-parent = <&gic>;
                         ti,buffer-size = <128>;
                         ti,hwmods = "mcbsp2";
                 };
@@ -332,9 +382,119 @@
                         reg-names = "mpu", "dma";
                         interrupts = <0 23 0x4>;
                         interrupt-names = "common";
-                        interrupt-parent = <&gic>;
                         ti,buffer-size = <128>;
                         ti,hwmods = "mcbsp3";
                 };
+
+                timer1: timer@4ae18000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4ae18000 0x80>;
+                        interrupts = <0 37 0x4>;
+                        ti,hwmods = "timer1";
+                        ti,timer-alwon;
+                };
+
+                timer2: timer@48032000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48032000 0x80>;
+                        interrupts = <0 38 0x4>;
+                        ti,hwmods = "timer2";
+                };
+
+                timer3: timer@48034000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48034000 0x80>;
+                        interrupts = <0 39 0x4>;
+                        ti,hwmods = "timer3";
+                };
+
+                timer4: timer@48036000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48036000 0x80>;
+                        interrupts = <0 40 0x4>;
+                        ti,hwmods = "timer4";
+                };
+
+                timer5: timer@40138000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x40138000 0x80>,
+                              <0x49038000 0x80>;
+                        interrupts = <0 41 0x4>;
+                        ti,hwmods = "timer5";
+                        ti,timer-dsp;
+                };
+
+                timer6: timer@4013a000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4013a000 0x80>,
+                              <0x4903a000 0x80>;
+                        interrupts = <0 42 0x4>;
+                        ti,hwmods = "timer6";
+                        ti,timer-dsp;
+                        ti,timer-pwm;
+                };
+
+                timer7: timer@4013c000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4013c000 0x80>,
+                              <0x4903c000 0x80>;
+                        interrupts = <0 43 0x4>;
+                        ti,hwmods = "timer7";
+                        ti,timer-dsp;
+                };
+
+                timer8: timer@4013e000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4013e000 0x80>,
+                              <0x4903e000 0x80>;
+                        interrupts = <0 44 0x4>;
+                        ti,hwmods = "timer8";
+                        ti,timer-dsp;
+                        ti,timer-pwm;
+                };
+
+                timer9: timer@4803e000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4803e000 0x80>;
+                        interrupts = <0 45 0x4>;
+                        ti,hwmods = "timer9";
+                };
+
+                timer10: timer@48086000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48086000 0x80>;
+                        interrupts = <0 46 0x4>;
+                        ti,hwmods = "timer10";
+                };
+
+                timer11: timer@48088000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48088000 0x80>;
+                        interrupts = <0 47 0x4>;
+                        ti,hwmods = "timer11";
+                        ti,timer-pwm;
+                };
+
+                emif1: emif@0x4c000000 {
+                        compatible      = "ti,emif-4d5";
+                        ti,hwmods       = "emif1";
+                        phy-type        = <2>; /* DDR PHY type: Intelli PHY */
+                        reg = <0x4c000000 0x400>;
+                        interrupts = <0 110 0x4>;
+                        hw-caps-read-idle-ctrl;
+                        hw-caps-ll-interface;
+                        hw-caps-temp-alert;
+                };
+
+                emif2: emif@0x4d000000 {
+                        compatible      = "ti,emif-4d5";
+                        ti,hwmods       = "emif2";
+                        phy-type        = <2>; /* DDR PHY type: Intelli PHY */
+                        reg = <0x4d000000 0x400>;
+                        interrupts = <0 111 0x4>;
+                        hw-caps-read-idle-ctrl;
+                        hw-caps-ll-interface;
+                        hw-caps-temp-alert;
+                };
         };
 };
diff --git a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
new file mode 100644
index 000000000000..5a3a58b7e18f
--- /dev/null
+++ b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
@@ -0,0 +1,55 @@
+/*
+ * Copyright (C) 2012 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+/include/ "orion5x.dtsi"
+
+/ {
+        model = "LaCie Ethernet Disk mini V2";
+        compatible = "lacie,ethernet-disk-mini-v2", "marvell-orion5x-88f5182", "marvell,orion5x";
+
+        memory {
+                reg = <0x00000000 0x4000000>; /* 64 MB */
+        };
+
+        chosen {
+                bootargs = "console=ttyS0,115200n8 earlyprintk";
+        };
+
+        ocp@f1000000 {
+                serial@12000 {
+                        clock-frequency = <166666667>;
+                        status = "okay";
+                };
+
+                sata@80000 {
+                        status = "okay";
+                        nr-ports = <2>;
+                };
+        };
+
+        gpio_keys {
+                compatible = "gpio-keys";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                button@1 {
+                        label = "Power-on Switch";
+                        linux,code = <116>; /* KEY_POWER */
+                        gpios = <&gpio0 18 0>;
+                };
+        };
+
+        gpio_leds {
+                compatible = "gpio-leds";
+
+                led@1 {
+                        label = "power:blue";
+                        gpios = <&gpio0 16 1>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/orion5x.dtsi b/arch/arm/boot/dts/orion5x.dtsi
new file mode 100644
index 000000000000..8aad00f81ed9
--- /dev/null
+++ b/arch/arm/boot/dts/orion5x.dtsi
@@ -0,0 +1,98 @@
+/*
+ * Copyright (C) 2012 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+        model = "Marvell Orion5x SoC";
+        compatible = "marvell,orion5x";
+        interrupt-parent = <&intc>;
+
+        intc: interrupt-controller {
+                compatible = "marvell,orion-intc", "marvell,intc";
+                interrupt-controller;
+                #interrupt-cells = <1>;
+                reg = <0xf1020204 0x04>;
+        };
+
+        ocp@f1000000 {
+                compatible = "simple-bus";
+                ranges = <0x00000000 0xf1000000 0x4000000
+                          0xf2200000 0xf2200000 0x0000800>;
+                #address-cells = <1>;
+                #size-cells = <1>;
+
+                gpio0: gpio@10100 {
+                        compatible = "marvell,orion-gpio";
+                        #gpio-cells = <2>;
+                        gpio-controller;
+                        reg = <0x10100 0x40>;
+                        ngpio = <32>;
+                        interrupts = <6>, <7>, <8>, <9>;
+                };
+
+                serial@12000 {
+                        compatible = "ns16550a";
+                        reg = <0x12000 0x100>;
+                        reg-shift = <2>;
+                        interrupts = <3>;
+                        /* set clock-frequency in board dts */
+                        status = "disabled";
+                };
+
+                serial@12100 {
+                        compatible = "ns16550a";
+                        reg = <0x12100 0x100>;
+                        reg-shift = <2>;
+                        interrupts = <4>;
+                        /* set clock-frequency in board dts */
+                        status = "disabled";
+                };
+
+                spi@10600 {
+                        compatible = "marvell,orion-spi";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <0>;
+                        reg = <0x10600 0x28>;
+                        status = "disabled";
+                };
+
+                wdt@20300 {
+                        compatible = "marvell,orion-wdt";
+                        reg = <0x20300 0x28>;
+                        status = "okay";
+                };
+
+                sata@80000 {
+                        compatible = "marvell,orion-sata";
+                        reg = <0x80000 0x5000>;
+                        interrupts = <29>;
+                        status = "disabled";
+                };
+
+                i2c@11000 {
+                        compatible = "marvell,mv64xxx-i2c";
+                        reg = <0x11000 0x20>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        interrupts = <5>;
+                        clock-frequency = <100000>;
+                        status = "disabled";
+                };
+
+                crypto@90000 {
+                        compatible = "marvell,orion-crypto";
+                        reg = <0x90000 0x10000>,
+                              <0xf2200000 0x800>;
+                        reg-names = "regs", "sram";
+                        interrupts = <22>;
+                        status = "okay";
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/samsung_k3pe0e000b.dtsi b/arch/arm/boot/dts/samsung_k3pe0e000b.dtsi
new file mode 100644
index 000000000000..9657a5cbc3ad
--- /dev/null
+++ b/arch/arm/boot/dts/samsung_k3pe0e000b.dtsi
@@ -0,0 +1,67 @@
+/*
+ * Timings and Geometry for Samsung K3PE0E000B memory part
+ */
+
+/ {
+        samsung_K3PE0E000B: lpddr2 {
+                compatible      = "Samsung,K3PE0E000B","jedec,lpddr2-s4";
+                density         = <4096>;
+                io-width        = <32>;
+
+                tRPab-min-tck   = <3>;
+                tRCD-min-tck    = <3>;
+                tWR-min-tck     = <3>;
+                tRASmin-min-tck = <3>;
+                tRRD-min-tck    = <2>;
+                tWTR-min-tck    = <2>;
+                tXP-min-tck     = <2>;
+                tRTP-min-tck    = <2>;
+                tCKE-min-tck    = <3>;
+                tCKESR-min-tck  = <3>;
+                tFAW-min-tck    = <8>;
+
+                timings_samsung_K3PE0E000B_533MHz: lpddr2-timings@0 {
+                        compatible      = "jedec,lpddr2-timings";
+                        min-freq        = <10000000>;
+                        max-freq        = <533333333>;
+                        tRPab           = <21000>;
+                        tRCD            = <18000>;
+                        tWR             = <15000>;
+                        tRAS-min        = <42000>;
+                        tRRD            = <10000>;
+                        tWTR            = <7500>;
+                        tXP             = <7500>;
+                        tRTP            = <7500>;
+                        tCKESR          = <15000>;
+                        tDQSCK-max      = <5500>;
+                        tFAW            = <50000>;
+                        tZQCS           = <90000>;
+                        tZQCL           = <360000>;
+                        tZQinit         = <1000000>;
+                        tRAS-max-ns     = <70000>;
+                        tDQSCK-max-derated = <6000>;
+                };
+
+                timings_samsung_K3PE0E000B_266MHz: lpddr2-timings@1 {
+                        compatible      = "jedec,lpddr2-timings";
+                        min-freq        = <10000000>;
+                        max-freq        = <266666666>;
+                        tRPab           = <21000>;
+                        tRCD            = <18000>;
+                        tWR             = <15000>;
+                        tRAS-min        = <42000>;
+                        tRRD            = <10000>;
+                        tWTR            = <7500>;
+                        tXP             = <7500>;
+                        tRTP            = <7500>;
+                        tCKESR          = <15000>;
+                        tDQSCK-max      = <5500>;
+                        tFAW            = <50000>;
+                        tZQCS           = <90000>;
+                        tZQCL           = <360000>;
+                        tZQinit         = <1000000>;
+                        tRAS-max-ns     = <70000>;
+                        tDQSCK-max-derated = <6000>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/snowball.dts b/arch/arm/boot/dts/snowball.dts
index 702c0baa6004..9e02a913eb62 100644
--- a/arch/arm/boot/dts/snowball.dts
+++ b/arch/arm/boot/dts/snowball.dts
@@ -14,7 +14,7 @@
 
 / {
         model = "Calao Systems Snowball platform with device tree";
-        compatible = "calaosystems,snowball-a9500";
+        compatible = "calaosystems,snowball-a9500", "st-ericsson,u9500";
 
         memory {
                 reg = <0x00000000 0x20000000>;
@@ -120,10 +120,10 @@
                 };
 
                 // External Micro SD slot
-                sdi@80126000 {
+                sdi0_per1@80126000 {
                         arm,primecell-periphid = <0x10480180>;
                         max-frequency = <50000000>;
-                        bus-width = <8>;
+                        bus-width = <4>;
                         mmc-cap-mmc-highspeed;
                         vmmc-supply = <&ab8500_ldo_aux3_reg>;
 
@@ -134,7 +134,7 @@
                 };
 
                 // On-board eMMC
-                sdi@80114000 {
+                sdi4_per2@80114000 {
                         arm,primecell-periphid = <0x10480180>;
                         max-frequency = <50000000>;
                         bus-width = <8>;
@@ -183,5 +183,137 @@
                                 reg = <0x33>;
                         };
                 };
+
+                prcmu@80157000 {
+                        db8500-prcmu-regulators {
+                                db8500_vape_reg: db8500_vape {
+                                        regulator-name = "db8500-vape";
+                                };
+
+                                db8500_varm_reg: db8500_varm {
+                                        regulator-name = "db8500-varm";
+                                };
+
+                                db8500_vmodem_reg: db8500_vmodem {
+                                        regulator-name = "db8500-vmodem";
+                                };
+
+                                db8500_vpll_reg: db8500_vpll {
+                                        regulator-name = "db8500-vpll";
+                                };
+
+                                db8500_vsmps1_reg: db8500_vsmps1 {
+                                        regulator-name = "db8500-vsmps1";
+                                };
+
+                                db8500_vsmps2_reg: db8500_vsmps2 {
+                                        regulator-name = "db8500-vsmps2";
+                                };
+
+                                db8500_vsmps3_reg: db8500_vsmps3 {
+                                        regulator-name = "db8500-vsmps3";
+                                };
+
+                                db8500_vrf1_reg: db8500_vrf1 {
+                                        regulator-name = "db8500-vrf1";
+                                };
+
+                                db8500_sva_mmdsp_reg: db8500_sva_mmdsp {
+                                        regulator-name = "db8500-sva-mmdsp";
+                                };
+
+                                db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret {
+                                        regulator-name = "db8500-sva-mmdsp-ret";
+                                };
+
+                                db8500_sva_pipe_reg: db8500_sva_pipe {
+                                        regulator-name = "db8500_sva_pipe";
+                                };
+
+                                db8500_sia_mmdsp_reg: db8500_sia_mmdsp {
+                                        regulator-name = "db8500_sia_mmdsp";
+                                };
+
+                                db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret {
+                                        regulator-name = "db8500-sia-mmdsp-ret";
+                                };
+
+                                db8500_sia_pipe_reg: db8500_sia_pipe {
+                                        regulator-name = "db8500-sia-pipe";
+                                };
+
+                                db8500_sga_reg: db8500_sga {
+                                        regulator-name = "db8500-sga";
+                                };
+
+                                db8500_b2r2_mcde_reg: db8500_b2r2_mcde {
+                                        regulator-name = "db8500-b2r2-mcde";
+                                };
+
+                                db8500_esram12_reg: db8500_esram12 {
+                                        regulator-name = "db8500-esram12";
+                                };
+
+                                db8500_esram12_ret_reg: db8500_esram12_ret {
+                                        regulator-name = "db8500-esram12-ret";
+                                };
+
+                                db8500_esram34_reg: db8500_esram34 {
+                                        regulator-name = "db8500-esram34";
+                                };
+
+                                db8500_esram34_ret_reg: db8500_esram34_ret {
+                                        regulator-name = "db8500-esram34-ret";
+                                };
+                        };
+
+                        ab8500@5 {
+                                ab8500-regulators {
+                                        ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
+                                                regulator-name = "V-DISPLAY";
+                                        };
+
+                                        ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
+                                                regulator-name = "V-eMMC1";
+                                        };
+
+                                        ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
+                                                regulator-name = "V-MMC-SD";
+                                        };
+
+                                        ab8500_ldo_initcore_reg: ab8500_ldo_initcore {
+                                                regulator-name = "V-INTCORE";
+                                        };
+
+                                        ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
+                                                regulator-name = "V-TVOUT";
+                                        };
+
+                                        ab8500_ldo_usb_reg: ab8500_ldo_usb {
+                                                regulator-name = "dummy";
+                                        };
+
+                                        ab8500_ldo_audio_reg: ab8500_ldo_audio {
+                                                regulator-name = "V-AUD";
+                                        };
+
+                                        ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
+                                                regulator-name = "V-AMIC1";
+                                        };
+
+                                        ab8500_ldo_amamic2_reg: ab8500_ldo_amamic2 {
+                                                regulator-name = "V-AMIC2";
+                                        };
+
+                                        ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
+                                                regulator-name = "V-DMIC";
+                                        };
+
+                                        ab8500_ldo_ana_reg: ab8500_ldo_ana {
+                                                regulator-name = "V-CSI/DSI";
+                                        };
+                                };
+                        };
+                };
         };
 };
diff --git a/arch/arm/boot/dts/stuib.dtsi b/arch/arm/boot/dts/stuib.dtsi
new file mode 100644
index 000000000000..39446a247e79
--- /dev/null
+++ b/arch/arm/boot/dts/stuib.dtsi
@@ -0,0 +1,78 @@
+/*
+ * Copyright 2012 ST-Ericsson AB
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/ {
+        soc-u9500 {
+                i2c@80004000 {
+                        stmpe1601: stmpe1601@40 {
+                                compatible = "st,stmpe1601";
+                                reg = <0x40>;
+                                interrupts = <26 0x1>;
+                                interrupt-parent = <&gpio6>;
+                                interrupt-controller;
+
+                                wakeup-source;
+                                st,autosleep-timeout = <1024>;
+
+                                stmpe_keypad {
+                                        compatible = "st,stmpe-keypad";
+
+                                        debounce-interval = <64>;
+                                        st,scan-count = <8>;
+                                        st,no-autorepeat;
+
+                                        linux,keymap = <0x205006b
+                                                        0x4010074
+                                                        0x3050072
+                                                        0x1030004
+                                                        0x502006a
+                                                        0x500000a
+                                                        0x5008b
+                                                        0x706001c
+                                                        0x405000b
+                                                        0x6070003
+                                                        0x3040067
+                                                        0x303006c
+                                                        0x60400e7
+                                                        0x602009e
+                                                        0x4020073
+                                                        0x5050002
+                                                        0x4030069
+                                                        0x3020008>;
+                                };
+                        };
+                };
+
+                i2c@80110000 {
+                        bu21013_tp@0x5c {
+                                compatible = "rhom,bu21013_tp";
+                                reg = <0x5c>;
+                                touch-gpio = <&gpio2 20 0x4>;
+                                avdd-supply = <&ab8500_ldo_aux1_reg>;
+
+                                rhom,touch-max-x = <384>;
+                                rhom,touch-max-y = <704>;
+                                rhom,flip-y;
+                        };
+
+                        bu21013_tp@0x5d {
+                                compatible = "rhom,bu21013_tp";
+                                reg = <0x5d>;
+                                touch-gpio = <&gpio2 20 0x4>;
+                                avdd-supply = <&ab8500_ldo_aux1_reg>;
+
+                                rhom,touch-max-x = <384>;
+                                rhom,touch-max-y = <704>;
+                                rhom,flip-y;
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts
index c3ef1ad26b6a..43eb72af8948 100644
--- a/arch/arm/boot/dts/tegra20-harmony.dts
+++ b/arch/arm/boot/dts/tegra20-harmony.dts
@@ -10,6 +10,18 @@
                 reg = <0x00000000 0x40000000>;
         };
 
+        host1x {
+                hdmi {
+                        status = "okay";
+
+                        vdd-supply = <&hdmi_vdd_reg>;
+                        pll-supply = <&hdmi_pll_reg>;
+
+                        nvidia,ddc-i2c-bus = <&hdmi_ddc>;
+                        nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
+                };
+        };
+
         pinmux {
                 pinctrl-names = "default";
                 pinctrl-0 = <&state_default>;
@@ -262,9 +274,9 @@
                 };
         };
 
-        i2c@7000c400 {
+        hdmi_ddc: i2c@7000c400 {
                 status = "okay";
-                clock-frequency = <400000>;
+                clock-frequency = <100000>;
         };
 
         i2c@7000c500 {
@@ -297,131 +309,98 @@
                         vinldo9-supply = <&sm2_reg>;
 
                         regulators {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-
-                                sys_reg: regulator@0 {
-                                        reg = <0>;
-                                        regulator-compatible = "sys";
+                                sys_reg: sys {
                                         regulator-name = "vdd_sys";
                                         regulator-always-on;
                                 };
 
-                                regulator@1 {
-                                        reg = <1>;
-                                        regulator-compatible = "sm0";
+                                sm0 {
                                         regulator-name = "vdd_sm0,vdd_core";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <1200000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@2 {
-                                        reg = <2>;
-                                        regulator-compatible = "sm1";
+                                sm1 {
                                         regulator-name = "vdd_sm1,vdd_cpu";
                                         regulator-min-microvolt = <1000000>;
                                         regulator-max-microvolt = <1000000>;
                                         regulator-always-on;
                                 };
 
-                                sm2_reg: regulator@3 {
-                                        reg = <3>;
-                                        regulator-compatible = "sm2";
+                                sm2_reg: sm2 {
                                         regulator-name = "vdd_sm2,vin_ldo*";
                                         regulator-min-microvolt = <3700000>;
                                         regulator-max-microvolt = <3700000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@4 {
-                                        reg = <4>;
-                                        regulator-compatible = "ldo0";
+                                ldo0 {
                                         regulator-name = "vdd_ldo0,vddio_pex_clk";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                 };
 
-                                regulator@5 {
-                                        reg = <5>;
-                                        regulator-compatible = "ldo1";
+                                ldo1 {
                                         regulator-name = "vdd_ldo1,avdd_pll*";
                                         regulator-min-microvolt = <1100000>;
                                         regulator-max-microvolt = <1100000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@6 {
-                                        reg = <6>;
-                                        regulator-compatible = "ldo2";
+                                ldo2 {
                                         regulator-name = "vdd_ldo2,vdd_rtc";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <1200000>;
                                 };
 
-                                regulator@7 {
-                                        reg = <7>;
-                                        regulator-compatible = "ldo3";
+                                ldo3 {
                                         regulator-name = "vdd_ldo3,avdd_usb*";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@8 {
-                                        reg = <8>;
-                                        regulator-compatible = "ldo4";
+                                ldo4 {
                                         regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@9 {
-                                        reg = <9>;
-                                        regulator-compatible = "ldo5";
+                                ldo5 {
                                         regulator-name = "vdd_ldo5,vcore_mmc";
                                         regulator-min-microvolt = <2850000>;
                                         regulator-max-microvolt = <2850000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@10 {
-                                        reg = <10>;
-                                        regulator-compatible = "ldo6";
+                                ldo6 {
                                         regulator-name = "vdd_ldo6,avdd_vdac";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                 };
 
-                                regulator@11 {
-                                        reg = <11>;
-                                        regulator-compatible = "ldo7";
+                                hdmi_vdd_reg: ldo7 {
                                         regulator-name = "vdd_ldo7,avdd_hdmi";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                 };
 
-                                regulator@12 {
-                                        reg = <12>;
-                                        regulator-compatible = "ldo8";
+                                hdmi_pll_reg: ldo8 {
                                         regulator-name = "vdd_ldo8,avdd_hdmi_pll";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                 };
 
-                                regulator@13 {
-                                        reg = <13>;
-                                        regulator-compatible = "ldo9";
+                                ldo9 {
                                         regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
                                         regulator-min-microvolt = <2850000>;
                                         regulator-max-microvolt = <2850000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@14 {
-                                        reg = <14>;
-                                        regulator-compatible = "ldo_rtc";
+                                ldo_rtc {
                                         regulator-name = "vdd_rtc_out,vdd_cell";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
@@ -429,6 +408,11 @@
                                 };
                         };
                 };
+
+                temperature-sensor@4c {
+                        compatible = "adi,adt7461";
+                        reg = <0x4c>;
+                };
         };
 
         pmc {
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts
index ddf287f52d49..6a93d1404c76 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -291,37 +291,26 @@
                         vinldo9-supply = <&sm2_reg>;
 
                         regulators {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-
-                                sys_reg: regulator@0 {
-                                        reg = <0>;
-                                        regulator-compatible = "sys";
+                                sys_reg: sys {
                                         regulator-name = "vdd_sys";
                                         regulator-always-on;
                                 };
 
-                                regulator@1 {
-                                        reg = <1>;
-                                        regulator-compatible = "sm0";
+                                sm0 {
                                         regulator-name = "+1.2vs_sm0,vdd_core";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <1200000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@2 {
-                                        reg = <2>;
-                                        regulator-compatible = "sm1";
+                                sm1 {
                                         regulator-name = "+1.0vs_sm1,vdd_cpu";
                                         regulator-min-microvolt = <1000000>;
                                         regulator-max-microvolt = <1000000>;
                                         regulator-always-on;
                                 };
 
-                                sm2_reg: regulator@3 {
-                                        reg = <3>;
-                                        regulator-compatible = "sm2";
+                                sm2_reg: sm2 {
                                         regulator-name = "+3.7vs_sm2,vin_ldo*";
                                         regulator-min-microvolt = <3700000>;
                                         regulator-max-microvolt = <3700000>;
@@ -330,53 +319,41 @@
 
                                 /* LDO0 is not connected to anything */
 
-                                regulator@5 {
-                                        reg = <5>;
-                                        regulator-compatible = "ldo1";
+                                ldo1 {
                                         regulator-name = "+1.1vs_ldo1,avdd_pll*";
                                         regulator-min-microvolt = <1100000>;
                                         regulator-max-microvolt = <1100000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@6 {
-                                        reg = <6>;
-                                        regulator-compatible = "ldo2";
+                                ldo2 {
                                         regulator-name = "+1.2vs_ldo2,vdd_rtc";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <1200000>;
                                 };
 
-                                regulator@7 {
-                                        reg = <7>;
-                                        regulator-compatible = "ldo3";
+                                ldo3 {
                                         regulator-name = "+3.3vs_ldo3,avdd_usb*";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@8 {
-                                        reg = <8>;
-                                        regulator-compatible = "ldo4";
+                                ldo4 {
                                         regulator-name = "+1.8vs_ldo4,avdd_osc,vddio_sys";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@9 {
-                                        reg = <9>;
-                                        regulator-compatible = "ldo5";
+                                ldo5 {
                                         regulator-name = "+2.85vs_ldo5,vcore_mmc";
                                         regulator-min-microvolt = <2850000>;
                                         regulator-max-microvolt = <2850000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@10 {
-                                        reg = <10>;
-                                        regulator-compatible = "ldo6";
+                                ldo6 {
                                         /*
                                          * Research indicates this should be
                                          * 1.8v; other boards that use this
@@ -390,34 +367,26 @@
                                         regulator-max-microvolt = <1800000>;
                                 };
 
-                                regulator@11 {
-                                        reg = <11>;
-                                        regulator-compatible = "ldo7";
+                                ldo7 {
                                         regulator-name = "+3.3vs_ldo7,avdd_hdmi";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                 };
 
-                                regulator@12 {
-                                        reg = <12>;
-                                        regulator-compatible = "ldo8";
+                                ldo8 {
                                         regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                 };
 
-                                regulator@13 {
-                                        reg = <13>;
-                                        regulator-compatible = "ldo9";
+                                ldo9 {
                                         regulator-name = "+2.85vs_ldo9,vdd_ddr_rx";
                                         regulator-min-microvolt = <2850000>;
                                         regulator-max-microvolt = <2850000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@14 {
-                                        reg = <14>;
-                                        regulator-compatible = "ldo_rtc";
+                                ldo_rtc {
                                         regulator-name = "+3.3vs_rtc";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
diff --git a/arch/arm/boot/dts/tegra20-plutux.dts b/arch/arm/boot/dts/tegra20-plutux.dts
index 331a3ef24d59..289480026fbf 100644
--- a/arch/arm/boot/dts/tegra20-plutux.dts
+++ b/arch/arm/boot/dts/tegra20-plutux.dts
@@ -6,6 +6,12 @@
         model = "Avionic Design Plutux board";
         compatible = "ad,plutux", "ad,tamonten", "nvidia,tegra20";
 
+        host1x {
+                hdmi {
+                        status = "okay";
+                };
+        };
+
         i2c@7000c000 {
                 wm8903: wm8903@1a {
                         compatible = "wlf,wm8903";
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts
index f0ba901676ac..eafeca65eb21 100644
--- a/arch/arm/boot/dts/tegra20-seaboard.dts
+++ b/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -395,37 +395,26 @@
                         vinldo9-supply = <&sm2_reg>;
 
                         regulators {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-
-                                sys_reg: regulator@0 {
-                                        reg = <0>;
-                                        regulator-compatible = "sys";
+                                sys_reg: sys {
                                         regulator-name = "vdd_sys";
                                         regulator-always-on;
                                 };
 
-                                regulator@1 {
-                                        reg = <1>;
-                                        regulator-compatible = "sm0";
+                                sm0 {
                                         regulator-name = "vdd_sm0,vdd_core";
                                         regulator-min-microvolt = <1300000>;
                                         regulator-max-microvolt = <1300000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@2 {
-                                        reg = <2>;
-                                        regulator-compatible = "sm1";
+                                sm1 {
                                         regulator-name = "vdd_sm1,vdd_cpu";
                                         regulator-min-microvolt = <1125000>;
                                         regulator-max-microvolt = <1125000>;
                                         regulator-always-on;
                                 };
 
-                                sm2_reg: regulator@3 {
-                                        reg = <3>;
-                                        regulator-compatible = "sm2";
+                                sm2_reg: sm2 {
                                         regulator-name = "vdd_sm2,vin_ldo*";
                                         regulator-min-microvolt = <3700000>;
                                         regulator-max-microvolt = <3700000>;
@@ -434,86 +423,66 @@
 
                                 /* LDO0 is not connected to anything */
 
-                                regulator@5 {
-                                        reg = <5>;
-                                        regulator-compatible = "ldo1";
+                                ldo1 {
                                         regulator-name = "vdd_ldo1,avdd_pll*";
                                         regulator-min-microvolt = <1100000>;
                                         regulator-max-microvolt = <1100000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@6 {
-                                        reg = <6>;
-                                        regulator-compatible = "ldo2";
+                                ldo2 {
                                         regulator-name = "vdd_ldo2,vdd_rtc";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <1200000>;
                                 };
 
-                                regulator@7 {
-                                        reg = <7>;
-                                        regulator-compatible = "ldo3";
+                                ldo3 {
                                         regulator-name = "vdd_ldo3,avdd_usb*";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@8 {
-                                        reg = <8>;
-                                        regulator-compatible = "ldo4";
+                                ldo4 {
                                         regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@9 {
-                                        reg = <9>;
-                                        regulator-compatible = "ldo5";
+                                ldo5 {
                                         regulator-name = "vdd_ldo5,vcore_mmc";
                                         regulator-min-microvolt = <2850000>;
                                         regulator-max-microvolt = <2850000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@10 {
-                                        reg = <10>;
-                                        regulator-compatible = "ldo6";
+                                ldo6 {
                                         regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                 };
 
-                                regulator@11 {
-                                        reg = <11>;
-                                        regulator-compatible = "ldo7";
+                                ldo7 {
                                         regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                 };
 
-                                regulator@12 {
-                                        reg = <12>;
-                                        regulator-compatible = "ldo8";
+                                ldo8 {
                                         regulator-name = "vdd_ldo8,avdd_hdmi_pll";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                 };
 
-                                regulator@13 {
-                                        reg = <13>;
-                                        regulator-compatible = "ldo9";
+                                ldo9 {
                                         regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
                                         regulator-min-microvolt = <2850000>;
                                         regulator-max-microvolt = <2850000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@14 {
-                                        reg = <14>;
-                                        regulator-compatible = "ldo_rtc";
+                                ldo_rtc {
                                         regulator-name = "vdd_rtc_out,vdd_cell";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
@@ -592,6 +561,12 @@
                 status = "okay";
         };
 
+        sdhci@c8000000 {
+                status = "okay";
+                power-gpios = <&gpio 86 0>; /* gpio PK6 */
+                bus-width = <4>;
+        };
+
         sdhci@c8000400 {
                 status = "okay";
                 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
diff --git a/arch/arm/boot/dts/tegra20-tamonten.dtsi b/arch/arm/boot/dts/tegra20-tamonten.dtsi
index f18cec9f6a77..a239ccdfaa52 100644
--- a/arch/arm/boot/dts/tegra20-tamonten.dtsi
+++ b/arch/arm/boot/dts/tegra20-tamonten.dtsi
@@ -8,6 +8,16 @@
                 reg = <0x00000000 0x20000000>;
         };
 
+        host1x {
+                hdmi {
+                        vdd-supply = <&hdmi_vdd_reg>;
+                        pll-supply = <&hdmi_pll_reg>;
+
+                        nvidia,ddc-i2c-bus = <&hdmi_ddc>;
+                        nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
+                };
+        };
+
         pinmux {
                 pinctrl-names = "default";
                 pinctrl-0 = <&state_default>;
@@ -62,10 +72,6 @@
                                 nvidia,pins = "dap4";
                                 nvidia,function = "dap4";
                         };
-                        ddc {
-                                nvidia,pins = "ddc";
-                                nvidia,function = "i2c2";
-                        };
                         dta {
                                 nvidia,pins = "dta", "dtd";
                                 nvidia,function = "sdio2";
@@ -91,7 +97,7 @@
                                 nvidia,function = "pcie";
                         };
                         hdint {
-                                nvidia,pins = "hdint", "pta";
+                                nvidia,pins = "hdint";
                                 nvidia,function = "hdmi";
                         };
                         i2cp {
@@ -230,6 +236,39 @@
                                 nvidia,pull = <1>;
                         };
                 };
+
+                state_i2cmux_ddc: pinmux_i2cmux_ddc {
+                        ddc {
+                                nvidia,pins = "ddc";
+                                nvidia,function = "i2c2";
+                        };
+                        pta {
+                                nvidia,pins = "pta";
+                                nvidia,function = "rsvd4";
+                        };
+                };
+
+                state_i2cmux_pta: pinmux_i2cmux_pta {
+                        ddc {
+                                nvidia,pins = "ddc";
+                                nvidia,function = "rsvd4";
+                        };
+                        pta {
+                                nvidia,pins = "pta";
+                                nvidia,function = "i2c2";
+                        };
+                };
+
+                state_i2cmux_idle: pinmux_i2cmux_idle {
+                        ddc {
+                                nvidia,pins = "ddc";
+                                nvidia,function = "rsvd4";
+                        };
+                        pta {
+                                nvidia,pins = "pta";
+                                nvidia,function = "rsvd4";
+                        };
+                };
         };
 
         i2s@70002800 {
@@ -246,6 +285,36 @@
                 status = "okay";
         };
 
+        i2c@7000c400 {
+                clock-frequency = <100000>;
+                status = "okay";
+        };
+
+        i2cmux {
+                compatible = "i2c-mux-pinctrl";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                i2c-parent = <&{/i2c@7000c400}>;
+
+                pinctrl-names = "ddc", "pta", "idle";
+                pinctrl-0 = <&state_i2cmux_ddc>;
+                pinctrl-1 = <&state_i2cmux_pta>;
+                pinctrl-2 = <&state_i2cmux_idle>;
+
+                hdmi_ddc: i2c@0 {
+                        reg = <0>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+
+                i2c@1 {
+                        reg = <1>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+        };
+
         i2c@7000d000 {
                 clock-frequency = <400000>;
                 status = "okay";
@@ -271,97 +340,72 @@
                         vinldo9-supply = <&sm2_reg>;
 
                         regulators {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-
-                                sys_reg: regulator@0 {
-                                        reg = <0>;
-                                        regulator-compatible = "sys";
+                                sys_reg: sys {
                                         regulator-name = "vdd_sys";
                                         regulator-always-on;
                                 };
 
-                                regulator@1 {
-                                        reg = <1>;
-                                        regulator-compatible = "sm0";
+                                sm0 {
                                         regulator-name = "vdd_sys_sm0,vdd_core";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <1200000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@2 {
-                                        reg = <2>;
-                                        regulator-compatible = "sm1";
+                                sm1 {
                                         regulator-name = "vdd_sys_sm1,vdd_cpu";
                                         regulator-min-microvolt = <1000000>;
                                         regulator-max-microvolt = <1000000>;
                                         regulator-always-on;
                                 };
 
-                                sm2_reg: regulator@3 {
-                                        reg = <3>;
-                                        regulator-compatible = "sm2";
+                                sm2_reg: sm2 {
                                         regulator-name = "vdd_sys_sm2,vin_ldo*";
                                         regulator-min-microvolt = <3700000>;
                                         regulator-max-microvolt = <3700000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@4 {
-                                        reg = <4>;
-                                        regulator-compatible = "ldo0";
+                                ldo0 {
                                         regulator-name = "vdd_ldo0,vddio_pex_clk";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                 };
 
-                                regulator@5 {
-                                        reg = <5>;
-                                        regulator-compatible = "ldo1";
+                                ldo1 {
                                         regulator-name = "vdd_ldo1,avdd_pll*";
                                         regulator-min-microvolt = <1100000>;
                                         regulator-max-microvolt = <1100000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@6 {
-                                        reg = <6>;
-                                        regulator-compatible = "ldo2";
+                                ldo2 {
                                         regulator-name = "vdd_ldo2,vdd_rtc";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <1200000>;
                                 };
 
-                                regulator@7 {
-                                        reg = <7>;
-                                        regulator-compatible = "ldo3";
+                                ldo3 {
                                         regulator-name = "vdd_ldo3,avdd_usb*";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@8 {
-                                        reg = <8>;
-                                        regulator-compatible = "ldo4";
+                                ldo4 {
                                         regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@9 {
-                                        reg = <9>;
-                                        regulator-compatible = "ldo5";
+                                ldo5 {
                                         regulator-name = "vdd_ldo5,vcore_mmc";
                                         regulator-min-microvolt = <2850000>;
                                         regulator-max-microvolt = <2850000>;
                                 };
 
-                                regulator@10 {
-                                        reg = <10>;
-                                        regulator-compatible = "ldo6";
+                                ldo6 {
                                         regulator-name = "vdd_ldo6,avdd_vdac";
                                         /*
                                          * According to the Tegra 2 Automotive
@@ -373,25 +417,19 @@
                                         regulator-max-microvolt = <2850000>;
                                 };
 
-                                regulator@11 {
-                                        reg = <11>;
-                                        regulator-compatible = "ldo7";
+                                hdmi_vdd_reg: ldo7 {
                                         regulator-name = "vdd_ldo7,avdd_hdmi";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                 };
 
-                                regulator@12 {
-                                        reg = <12>;
-                                        regulator-compatible = "ldo8";
+                                hdmi_pll_reg: ldo8 {
                                         regulator-name = "vdd_ldo8,avdd_hdmi_pll";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                 };
 
-                                regulator@13 {
-                                        reg = <13>;
-                                        regulator-compatible = "ldo9";
+                                ldo9 {
                                         regulator-name = "vdd_ldo9,vdd_ddr_rx,avdd_cam";
                                         /*
                                          * According to the Tegra 2 Automotive
@@ -404,9 +442,7 @@
                                         regulator-always-on;
                                 };
 
-                                regulator@14 {
-                                        reg = <14>;
-                                        regulator-compatible = "ldo_rtc";
+                                ldo_rtc {
                                         regulator-name = "vdd_rtc_out";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
@@ -414,6 +450,11 @@
                                 };
                         };
                 };
+
+                temperature-sensor@4c {
+                        compatible = "onnn,nct1008";
+                        reg = <0x4c>;
+                };
         };
 
         pmc {
diff --git a/arch/arm/boot/dts/tegra20-tec.dts b/arch/arm/boot/dts/tegra20-tec.dts
index 9aff31b0fe4a..402b21004bef 100644
--- a/arch/arm/boot/dts/tegra20-tec.dts
+++ b/arch/arm/boot/dts/tegra20-tec.dts
@@ -6,10 +6,13 @@
         model = "Avionic Design Tamonten Evaluation Carrier";
         compatible = "ad,tec", "ad,tamonten", "nvidia,tegra20";
 
-        i2c@7000c000 {
-                clock-frequency = <400000>;
-                status = "okay";
+        host1x {
+                hdmi {
+                        status = "okay";
+                };
+        };
 
+        i2c@7000c000 {
                 wm8903: wm8903@1a {
                         compatible = "wlf,wm8903";
                         reg = <0x1a>;
diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts
index 27fb8a67ea42..b70b4cb754c8 100644
--- a/arch/arm/boot/dts/tegra20-trimslice.dts
+++ b/arch/arm/boot/dts/tegra20-trimslice.dts
@@ -10,6 +10,18 @@
                 reg = <0x00000000 0x40000000>;
         };
 
+        host1x {
+                hdmi {
+                        status = "okay";
+
+                        vdd-supply = <&hdmi_vdd_reg>;
+                        pll-supply = <&hdmi_pll_reg>;
+
+                        nvidia,ddc-i2c-bus = <&hdmi_ddc>;
+                        nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
+                };
+        };
+
         pinmux {
                 pinctrl-names = "default";
                 pinctrl-0 = <&state_default>;
@@ -249,14 +261,24 @@
                 clock-frequency = <216000000>;
         };
 
-        i2c@7000c000 {
+        dvi_ddc: i2c@7000c000 {
                 status = "okay";
-                clock-frequency = <400000>;
+                clock-frequency = <100000>;
         };
 
-        i2c@7000c400 {
+        spi@7000c380 {
                 status = "okay";
-                clock-frequency = <400000>;
+                spi-max-frequency = <48000000>;
+                spi-flash@0 {
+                        compatible = "winbond,w25q80bl";
+                        reg = <0>;
+                        spi-max-frequency = <48000000>;
+                };
+        };
+
+        hdmi_ddc: i2c@7000c400 {
+                status = "okay";
+                clock-frequency = <100000>;
         };
 
         i2c@7000c500 {
@@ -300,6 +322,30 @@
                 bus-width = <4>;
         };
 
+        regulators {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                hdmi_vdd_reg: regulator@0 {
+                        compatible = "regulator-fixed";
+                        reg = <0>;
+                        regulator-name = "avdd_hdmi";
+                        regulator-min-microvolt = <3300000>;
+                        regulator-max-microvolt = <3300000>;
+                        regulator-always-on;
+                };
+
+                hdmi_pll_reg: regulator@1 {
+                        compatible = "regulator-fixed";
+                        reg = <1>;
+                        regulator-name = "avdd_hdmi_pll";
+                        regulator-min-microvolt = <1800000>;
+                        regulator-max-microvolt = <1800000>;
+                        regulator-always-on;
+                };
+        };
+
         sound {
                 compatible = "nvidia,tegra-audio-trimslice";
                 nvidia,i2s-controller = <&tegra_i2s1>;
diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts
index 3e5952fcfbc5..adc47547eaae 100644
--- a/arch/arm/boot/dts/tegra20-ventana.dts
+++ b/arch/arm/boot/dts/tegra20-ventana.dts
@@ -64,11 +64,6 @@
                                 nvidia,pins = "dap4";
                                 nvidia,function = "dap4";
                         };
-                        ddc {
-                                nvidia,pins = "ddc", "owc", "spdi", "spdo",
-                                        "uac";
-                                nvidia,function = "rsvd2";
-                        };
                         dta {
                                 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
                                 nvidia,function = "vi";
@@ -98,7 +93,7 @@
                                 nvidia,function = "pcie";
                         };
                         hdint {
-                                nvidia,pins = "hdint", "pta";
+                                nvidia,pins = "hdint";
                                 nvidia,function = "hdmi";
                         };
                         i2cp {
@@ -129,6 +124,10 @@
                                         "lspi", "lvp1", "lvs";
                                 nvidia,function = "displaya";
                         };
+                        owc {
+                                nvidia,pins = "owc", "spdi", "spdo", "uac";
+                                nvidia,function = "rsvd2";
+                        };
                         pmc {
                                 nvidia,pins = "pmc";
                                 nvidia,function = "pwr_on";
@@ -237,6 +236,49 @@
                                         "ld23_22";
                                 nvidia,pull = <1>;
                         };
+                        drive_sdio1 {
+                                nvidia,pins = "drive_sdio1";
+                                nvidia,high-speed-mode = <0>;
+                                nvidia,schmitt = <1>;
+                                nvidia,low-power-mode = <3>;
+                                nvidia,pull-down-strength = <31>;
+                                nvidia,pull-up-strength = <31>;
+                                nvidia,slew-rate-rising = <3>;
+                                nvidia,slew-rate-falling = <3>;
+                        };
+                };
+
+                state_i2cmux_ddc: pinmux_i2cmux_ddc {
+                        ddc {
+                                nvidia,pins = "ddc";
+                                nvidia,function = "i2c2";
+                        };
+                        pta {
+                                nvidia,pins = "pta";
+                                nvidia,function = "rsvd4";
+                        };
+                };
+
+                state_i2cmux_pta: pinmux_i2cmux_pta {
+                        ddc {
+                                nvidia,pins = "ddc";
+                                nvidia,function = "rsvd4";
+                        };
+                        pta {
+                                nvidia,pins = "pta";
+                                nvidia,function = "i2c2";
+                        };
+                };
+
+                state_i2cmux_idle: pinmux_i2cmux_idle {
+                        ddc {
+                                nvidia,pins = "ddc";
+                                nvidia,function = "rsvd4";
+                        };
+                        pta {
+                                nvidia,pins = "pta";
+                                nvidia,function = "rsvd4";
+                        };
                 };
         };
 
@@ -281,6 +323,31 @@
                 clock-frequency = <400000>;
         };
 
+        i2cmux {
+                compatible = "i2c-mux-pinctrl";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                i2c-parent = <&{/i2c@7000c400}>;
+
+                pinctrl-names = "ddc", "pta", "idle";
+                pinctrl-0 = <&state_i2cmux_ddc>;
+                pinctrl-1 = <&state_i2cmux_pta>;
+                pinctrl-2 = <&state_i2cmux_idle>;
+
+                i2c@0 {
+                        reg = <0>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+
+                i2c@1 {
+                        reg = <1>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+        };
+
         i2c@7000c500 {
                 status = "okay";
                 clock-frequency = <400000>;
@@ -311,37 +378,26 @@
                         vinldo9-supply = <&sm2_reg>;
 
                         regulators {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-
-                                sys_reg: regulator@0 {
-                                        reg = <0>;
-                                        regulator-compatible = "sys";
+                                sys_reg: sys {
                                         regulator-name = "vdd_sys";
                                         regulator-always-on;
                                 };
 
-                                regulator@1 {
-                                        reg = <1>;
-                                        regulator-compatible = "sm0";
+                                sm0 {
                                         regulator-name = "vdd_sm0,vdd_core";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <1200000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@2 {
-                                        reg = <2>;
-                                        regulator-compatible = "sm1";
+                                sm1 {
                                         regulator-name = "vdd_sm1,vdd_cpu";
                                         regulator-min-microvolt = <1000000>;
                                         regulator-max-microvolt = <1000000>;
                                         regulator-always-on;
                                 };
 
-                                sm2_reg: regulator@3 {
-                                        reg = <3>;
-                                        regulator-compatible = "sm2";
+                                sm2_reg: sm2 {
                                         regulator-name = "vdd_sm2,vin_ldo*";
                                         regulator-min-microvolt = <3700000>;
                                         regulator-max-microvolt = <3700000>;
@@ -350,86 +406,66 @@
 
                                 /* LDO0 is not connected to anything */
 
-                                regulator@5 {
-                                        reg = <5>;
-                                        regulator-compatible = "ldo1";
+                                ldo1 {
                                         regulator-name = "vdd_ldo1,avdd_pll*";
                                         regulator-min-microvolt = <1100000>;
                                         regulator-max-microvolt = <1100000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@6 {
-                                        reg = <6>;
-                                        regulator-compatible = "ldo2";
+                                ldo2 {
                                         regulator-name = "vdd_ldo2,vdd_rtc";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <1200000>;
                                 };
 
-                                regulator@7 {
-                                        reg = <7>;
-                                        regulator-compatible = "ldo3";
+                                ldo3 {
                                         regulator-name = "vdd_ldo3,avdd_usb*";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@8 {
-                                        reg = <8>;
-                                        regulator-compatible = "ldo4";
+                                ldo4 {
                                         regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@9 {
-                                        reg = <9>;
-                                        regulator-compatible = "ldo5";
+                                ldo5 {
                                         regulator-name = "vdd_ldo5,vcore_mmc";
                                         regulator-min-microvolt = <2850000>;
                                         regulator-max-microvolt = <2850000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@10 {
-                                        reg = <10>;
-                                        regulator-compatible = "ldo6";
+                                ldo6 {
                                         regulator-name = "vdd_ldo6,avdd_vdac";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                 };
 
-                                regulator@11 {
-                                        reg = <11>;
-                                        regulator-compatible = "ldo7";
+                                ldo7 {
                                         regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                 };
 
-                                regulator@12 {
-                                        reg = <12>;
-                                        regulator-compatible = "ldo8";
+                                ldo8 {
                                         regulator-name = "vdd_ldo8,avdd_hdmi_pll";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                 };
 
-                                regulator@13 {
-                                        reg = <13>;
-                                        regulator-compatible = "ldo9";
+                                ldo9 {
                                         regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
                                         regulator-min-microvolt = <2850000>;
                                         regulator-max-microvolt = <2850000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@14 {
-                                        reg = <14>;
-                                        regulator-compatible = "ldo_rtc";
+                                ldo_rtc {
                                         regulator-name = "vdd_rtc_out,vdd_cell";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
@@ -437,6 +473,11 @@
                                 };
                         };
                 };
+
+                temperature-sensor@4c {
+                        compatible = "onnn,nct1008";
+                        reg = <0x4c>;
+                };
         };
 
         pmc {
@@ -456,6 +497,12 @@
                 status = "okay";
         };
 
+        sdhci@c8000000 {
+                status = "okay";
+                power-gpios = <&gpio 86 0>; /* gpio PK6 */
+                bus-width = <4>;
+        };
+
         sdhci@c8000400 {
                 status = "okay";
                 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
diff --git a/arch/arm/boot/dts/tegra20-whistler.dts b/arch/arm/boot/dts/tegra20-whistler.dts
index c636d002d6d8..20d576ecd555 100644
--- a/arch/arm/boot/dts/tegra20-whistler.dts
+++ b/arch/arm/boot/dts/tegra20-whistler.dts
@@ -10,6 +10,18 @@
                 reg = <0x00000000 0x20000000>;
         };
 
+        host1x {
+                hdmi {
+                        status = "okay";
+
+                        vdd-supply = <&hdmi_vdd_reg>;
+                        pll-supply = <&hdmi_pll_reg>;
+
+                        nvidia,ddc-i2c-bus = <&hdmi_ddc>;
+                        nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
+                };
+        };
+
         pinmux {
                 pinctrl-names = "default";
                 pinctrl-0 = <&state_default>;
@@ -246,6 +258,11 @@
                 clock-frequency = <216000000>;
         };
 
+        hdmi_ddc: i2c@7000c400 {
+                status = "okay";
+                clock-frequency = <100000>;
+        };
+
         i2c@7000d000 {
                 status = "okay";
                 clock-frequency = <100000>;
@@ -295,243 +312,182 @@
                         in20-supply = <&mbatt_reg>;
 
                         regulators {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-
-                                mbatt_reg: regulator@0 {
-                                        reg = <0>;
-                                        regulator-compatible = "mbatt";
+                                mbatt_reg: mbatt {
                                         regulator-name = "vbat_pmu";
                                         regulator-always-on;
                                 };
 
-                                regulator@1 {
-                                        reg = <1>;
-                                        regulator-compatible = "sd1";
+                                sd1 {
                                         regulator-name = "nvvdd_sv1,vdd_cpu_pmu";
                                         regulator-min-microvolt = <1000000>;
                                         regulator-max-microvolt = <1000000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@2 {
-                                        reg = <2>;
-                                        regulator-compatible = "sd2";
+                                sd2 {
                                         regulator-name = "nvvdd_sv2,vdd_core";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <1200000>;
                                         regulator-always-on;
                                 };
 
-                                nvvdd_sv3_reg: regulator@3 {
-                                        reg = <3>;
-                                        regulator-compatible = "sd3";
+                                nvvdd_sv3_reg: sd3 {
                                         regulator-name = "nvvdd_sv3";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@4 {
-                                        reg = <4>;
-                                        regulator-compatible = "ldo1";
+                                ldo1 {
                                         regulator-name = "nvvdd_ldo1,vddio_rx_ddr,vcore_acc";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@5 {
-                                        reg = <5>;
-                                        regulator-compatible = "ldo2";
+                                ldo2 {
                                         regulator-name = "nvvdd_ldo2,avdd_pll*";
                                         regulator-min-microvolt = <1100000>;
                                         regulator-max-microvolt = <1100000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@6 {
-                                        reg = <6>;
-                                        regulator-compatible = "ldo3";
+                                ldo3 {
                                         regulator-name = "nvvdd_ldo3,vcom_1v8b";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@7 {
-                                        reg = <7>;
-                                        regulator-compatible = "ldo4";
+                                ldo4 {
                                         regulator-name = "nvvdd_ldo4,avdd_usb*";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@8 {
-                                        reg = <8>;
-                                        regulator-compatible = "ldo5";
+                                ldo5 {
                                         regulator-name = "nvvdd_ldo5,vcore_mmc,avdd_lcd1,vddio_1wire";
                                         regulator-min-microvolt = <2800000>;
                                         regulator-max-microvolt = <2800000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@9 {
-                                        reg = <9>;
-                                        regulator-compatible = "ldo6";
+                                hdmi_pll_reg: ldo6 {
                                         regulator-name = "nvvdd_ldo6,avdd_hdmi_pll";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                 };
 
-                                regulator@10 {
-                                        reg = <10>;
-                                        regulator-compatible = "ldo7";
+                                ldo7 {
                                         regulator-name = "nvvdd_ldo7,avddio_audio";
                                         regulator-min-microvolt = <2800000>;
                                         regulator-max-microvolt = <2800000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@11 {
-                                        reg = <11>;
-                                        regulator-compatible = "ldo8";
+                                ldo8 {
                                         regulator-name = "nvvdd_ldo8,vcom_3v0,vcore_cmps";
                                         regulator-min-microvolt = <3000000>;
                                         regulator-max-microvolt = <3000000>;
                                 };
 
-                                regulator@12 {
-                                        reg = <12>;
-                                        regulator-compatible = "ldo9";
+                                ldo9 {
                                         regulator-name = "nvvdd_ldo9,avdd_cam*";
                                         regulator-min-microvolt = <2800000>;
                                         regulator-max-microvolt = <2800000>;
                                 };
 
-                                regulator@13 {
-                                        reg = <13>;
-                                        regulator-compatible = "ldo10";
+                                ldo10 {
                                         regulator-name = "nvvdd_ldo10,avdd_usb_ic_3v0";
                                         regulator-min-microvolt = <3000000>;
                                         regulator-max-microvolt = <3000000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@14 {
-                                        reg = <14>;
-                                        regulator-compatible = "ldo11";
+                                hdmi_vdd_reg: ldo11 {
                                         regulator-name = "nvvdd_ldo11,vddio_pex_clk,vcom_33,avdd_hdmi";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                 };
 
-                                regulator@15 {
-                                        reg = <15>;
-                                        regulator-compatible = "ldo12";
+                                ldo12 {
                                         regulator-name = "nvvdd_ldo12,vddio_sdio";
                                         regulator-min-microvolt = <2800000>;
                                         regulator-max-microvolt = <2800000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@16 {
-                                        reg = <16>;
-                                        regulator-compatible = "ldo13";
+                                ldo13 {
                                         regulator-name = "nvvdd_ldo13,vcore_phtn,vdd_af";
                                         regulator-min-microvolt = <2800000>;
                                         regulator-max-microvolt = <2800000>;
                                 };
 
-                                regulator@17 {
-                                        reg = <17>;
-                                        regulator-compatible = "ldo14";
+                                ldo14 {
                                         regulator-name = "nvvdd_ldo14,avdd_vdac";
                                         regulator-min-microvolt = <2800000>;
                                         regulator-max-microvolt = <2800000>;
                                 };
 
-                                regulator@18 {
-                                        reg = <18>;
-                                        regulator-compatible = "ldo15";
+                                ldo15 {
                                         regulator-name = "nvvdd_ldo15,vcore_temp,vddio_hdcp";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                 };
 
-                                regulator@19 {
-                                        reg = <19>;
-                                        regulator-compatible = "ldo16";
+                                ldo16 {
                                         regulator-name = "nvvdd_ldo16,vdd_dbrtr";
                                         regulator-min-microvolt = <1300000>;
                                         regulator-max-microvolt = <1300000>;
                                 };
 
-                                regulator@20 {
-                                        reg = <20>;
-                                        regulator-compatible = "ldo17";
+                                ldo17 {
                                         regulator-name = "nvvdd_ldo17,vddio_mipi";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <1200000>;
                                 };
 
-                                regulator@21 {
-                                        reg = <21>;
-                                        regulator-compatible = "ldo18";
+                                ldo18 {
                                         regulator-name = "nvvdd_ldo18,vddio_vi,vcore_cam*";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                 };
 
-                                regulator@22 {
-                                        reg = <22>;
-                                        regulator-compatible = "ldo19";
+                                ldo19 {
                                         regulator-name = "nvvdd_ldo19,avdd_lcd2,vddio_lx";
                                         regulator-min-microvolt = <2800000>;
                                         regulator-max-microvolt = <2800000>;
                                 };
 
-                                regulator@23 {
-                                        reg = <23>;
-                                        regulator-compatible = "ldo20";
+                                ldo20 {
                                         regulator-name = "nvvdd_ldo20,vddio_ddr_1v2,vddio_hsic,vcom_1v2";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <1200000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@24 {
-                                        reg = <24>;
-                                        regulator-compatible = "out5v";
+                                out5v {
                                         regulator-name = "usb0_vbus_reg";
                                 };
 
-                                regulator@25 {
-                                        reg = <25>;
-                                        regulator-compatible = "out33v";
+                                out33v {
                                         regulator-name = "pmu_out3v3";
                                 };
 
-                                regulator@26 {
-                                        reg = <26>;
-                                        regulator-compatible = "bbat";
+                                bbat {
                                         regulator-name = "pmu_bbat";
                                         regulator-min-microvolt = <2400000>;
                                         regulator-max-microvolt = <2400000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@27 {
-                                        reg = <27>;
-                                        regulator-compatible = "sdby";
+                                sdby {
                                         regulator-name = "vdd_aon";
                                         regulator-always-on;
                                 };
 
-                                regulator@28 {
-                                        reg = <28>;
-                                        regulator-compatible = "vrtc";
+                                vrtc {
                                         regulator-name = "vrtc,pmu_vccadc";
                                         regulator-always-on;
                                 };
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index f3a09d0d45bc..fba998e3954a 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -4,6 +4,102 @@
         compatible = "nvidia,tegra20";
         interrupt-parent = <&intc>;
 
+        host1x {
+                compatible = "nvidia,tegra20-host1x", "simple-bus";
+                reg = <0x50000000 0x00024000>;
+                interrupts = <0 65 0x04   /* mpcore syncpt */
+                              0 67 0x04>; /* mpcore general */
+
+                #address-cells = <1>;
+                #size-cells = <1>;
+
+                ranges = <0x54000000 0x54000000 0x04000000>;
+
+                mpe {
+                        compatible = "nvidia,tegra20-mpe";
+                        reg = <0x54040000 0x00040000>;
+                        interrupts = <0 68 0x04>;
+                };
+
+                vi {
+                        compatible = "nvidia,tegra20-vi";
+                        reg = <0x54080000 0x00040000>;
+                        interrupts = <0 69 0x04>;
+                };
+
+                epp {
+                        compatible = "nvidia,tegra20-epp";
+                        reg = <0x540c0000 0x00040000>;
+                        interrupts = <0 70 0x04>;
+                };
+
+                isp {
+                        compatible = "nvidia,tegra20-isp";
+                        reg = <0x54100000 0x00040000>;
+                        interrupts = <0 71 0x04>;
+                };
+
+                gr2d {
+                        compatible = "nvidia,tegra20-gr2d";
+                        reg = <0x54140000 0x00040000>;
+                        interrupts = <0 72 0x04>;
+                };
+
+                gr3d {
+                        compatible = "nvidia,tegra20-gr3d";
+                        reg = <0x54180000 0x00040000>;
+                };
+
+                dc@54200000 {
+                        compatible = "nvidia,tegra20-dc";
+                        reg = <0x54200000 0x00040000>;
+                        interrupts = <0 73 0x04>;
+
+                        rgb {
+                                status = "disabled";
+                        };
+                };
+
+                dc@54240000 {
+                        compatible = "nvidia,tegra20-dc";
+                        reg = <0x54240000 0x00040000>;
+                        interrupts = <0 74 0x04>;
+
+                        rgb {
+                                status = "disabled";
+                        };
+                };
+
+                hdmi {
+                        compatible = "nvidia,tegra20-hdmi";
+                        reg = <0x54280000 0x00040000>;
+                        interrupts = <0 75 0x04>;
+                        status = "disabled";
+                };
+
+                tvo {
+                        compatible = "nvidia,tegra20-tvo";
+                        reg = <0x542c0000 0x00040000>;
+                        interrupts = <0 76 0x04>;
+                        status = "disabled";
+                };
+
+                dsi {
+                        compatible = "nvidia,tegra20-dsi";
+                        reg = <0x54300000 0x00040000>;
+                        status = "disabled";
+                };
+        };
+
+        cache-controller@50043000 {
+                compatible = "arm,pl310-cache";
+                reg = <0x50043000 0x1000>;
+                arm,data-latency = <5 5 2>;
+                arm,tag-latency = <4 4 2>;
+                cache-unified;
+                cache-level = <2>;
+        };
+
         intc: interrupt-controller {
                 compatible = "arm,cortex-a9-gic";
                 reg = <0x50041000 0x1000
@@ -138,6 +234,16 @@
                 status = "disabled";
         };
 
+        spi@7000c380 {
+                compatible = "nvidia,tegra20-sflash";
+                reg = <0x7000c380 0x80>;
+                interrupts = <0 39 0x04>;
+                nvidia,dma-request-selector = <&apbdma 11>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
+
         i2c@7000c400 {
                 compatible = "nvidia,tegra20-i2c";
                 reg = <0x7000c400 0x100>;
@@ -165,6 +271,46 @@
                 status = "disabled";
         };
 
+        spi@7000d400 {
+                compatible = "nvidia,tegra20-slink";
+                reg = <0x7000d400 0x200>;
+                interrupts = <0 59 0x04>;
+                nvidia,dma-request-selector = <&apbdma 15>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
+
+        spi@7000d600 {
+                compatible = "nvidia,tegra20-slink";
+                reg = <0x7000d600 0x200>;
+                interrupts = <0 82 0x04>;
+                nvidia,dma-request-selector = <&apbdma 16>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
+
+        spi@7000d800 {
+                compatible = "nvidia,tegra20-slink";
+                reg = <0x7000d480 0x200>;
+                interrupts = <0 83 0x04>;
+                nvidia,dma-request-selector = <&apbdma 17>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
+
+        spi@7000da00 {
+                compatible = "nvidia,tegra20-slink";
+                reg = <0x7000da00 0x200>;
+                interrupts = <0 93 0x04>;
+                nvidia,dma-request-selector = <&apbdma 18>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
+
         pmc {
                 compatible = "nvidia,tegra20-pmc";
                 reg = <0x7000e400 0x400>;
diff --git a/arch/arm/boot/dts/tegra30-cardhu-a02.dts b/arch/arm/boot/dts/tegra30-cardhu-a02.dts
index dd4222f00eca..adc88aa50eb6 100644
--- a/arch/arm/boot/dts/tegra30-cardhu-a02.dts
+++ b/arch/arm/boot/dts/tegra30-cardhu-a02.dts
@@ -83,5 +83,11 @@
                         gpio = <&gpio 83 0>; /* GPIO PK3 */
                 };
         };
+
+        sdhci@78000400 {
+                status = "okay";
+                power-gpios = <&gpio 28 0>; /* gpio PD4 */
+                bus-width = <4>;
+        };
 };
 
diff --git a/arch/arm/boot/dts/tegra30-cardhu-a04.dts b/arch/arm/boot/dts/tegra30-cardhu-a04.dts
index 0828f097ca86..08163e145d57 100644
--- a/arch/arm/boot/dts/tegra30-cardhu-a04.dts
+++ b/arch/arm/boot/dts/tegra30-cardhu-a04.dts
@@ -95,4 +95,10 @@
                         gpio = <&gpio 232 0>; /* GPIO PDD0 */
                 };
         };
+
+        sdhci@78000400 {
+                status = "okay";
+                power-gpios = <&gpio 27 0>; /* gpio PD3 */
+                bus-width = <4>;
+        };
 };
diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi
index d10c9c5a3606..bdb2a660f376 100644
--- a/arch/arm/boot/dts/tegra30-cardhu.dtsi
+++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi
@@ -52,6 +52,22 @@
                                 nvidia,pull = <2>;
                                 nvidia,tristate = <0>;
                         };
+                        sdmmc3_clk_pa6 {
+                                nvidia,pins = "sdmmc3_clk_pa6";
+                                nvidia,function = "sdmmc3";
+                                nvidia,pull = <0>;
+                                nvidia,tristate = <0>;
+                        };
+                        sdmmc3_cmd_pa7 {
+                                nvidia,pins =   "sdmmc3_cmd_pa7",
+                                                "sdmmc3_dat0_pb7",
+                                                "sdmmc3_dat1_pb6",
+                                                "sdmmc3_dat2_pb5",
+                                                "sdmmc3_dat3_pb4";
+                                nvidia,function = "sdmmc3";
+                                nvidia,pull = <2>;
+                                nvidia,tristate = <0>;
+                        };
                         sdmmc4_clk_pcc4 {
                                 nvidia,pins =   "sdmmc4_clk_pcc4",
                                                 "sdmmc4_rst_n_pcc3";
@@ -81,6 +97,15 @@
                                 nvidia,pull = <0>;
                                 nvidia,tristate = <0>;
                         };
+                        sdio3 {
+                                nvidia,pins = "drive_sdio3";
+                                nvidia,high-speed-mode = <0>;
+                                nvidia,schmitt = <0>;
+                                nvidia,pull-down-strength = <46>;
+                                nvidia,pull-up-strength = <42>;
+                                nvidia,slew-rate-rising = <1>;
+                                nvidia,slew-rate-falling = <1>;
+                        };
                 };
         };
 
@@ -171,56 +196,41 @@
                         vccio-supply = <&vdd_ac_bat_reg>;
 
                         regulators {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-
-                                vdd1_reg: regulator@0 {
-                                        reg = <0>;
-                                        regulator-compatible = "vdd1";
+                                vdd1_reg: vdd1 {
                                         regulator-name = "vddio_ddr_1v2";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <1200000>;
                                         regulator-always-on;
                                 };
 
-                                vdd2_reg: regulator@1 {
-                                        reg = <1>;
-                                        regulator-compatible = "vdd2";
+                                vdd2_reg: vdd2 {
                                         regulator-name = "vdd_1v5_gen";
                                         regulator-min-microvolt = <1500000>;
                                         regulator-max-microvolt = <1500000>;
                                         regulator-always-on;
                                 };
 
-                                vddctrl_reg: regulator@2 {
-                                        reg = <2>;
-                                        regulator-compatible = "vddctrl";
+                                vddctrl_reg: vddctrl {
                                         regulator-name = "vdd_cpu,vdd_sys";
                                         regulator-min-microvolt = <1000000>;
                                         regulator-max-microvolt = <1000000>;
                                         regulator-always-on;
                                 };
 
-                                vio_reg: regulator@3 {
-                                        reg = <3>;
-                                        regulator-compatible = "vio";
+                                vio_reg: vio {
                                         regulator-name = "vdd_1v8_gen";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                         regulator-always-on;
                                 };
 
-                                ldo1_reg: regulator@4 {
-                                        reg = <4>;
-                                        regulator-compatible = "ldo1";
+                                ldo1_reg: ldo1 {
                                         regulator-name = "vdd_pexa,vdd_pexb";
                                         regulator-min-microvolt = <1050000>;
                                         regulator-max-microvolt = <1050000>;
                                 };
 
-                                ldo2_reg: regulator@5 {
-                                        reg = <5>;
-                                        regulator-compatible = "ldo2";
+                                ldo2_reg: ldo2 {
                                         regulator-name = "vdd_sata,avdd_plle";
                                         regulator-min-microvolt = <1050000>;
                                         regulator-max-microvolt = <1050000>;
@@ -228,44 +238,34 @@
 
                                 /* LDO3 is not connected to anything */
 
-                                ldo4_reg: regulator@7 {
-                                        reg = <7>;
-                                        regulator-compatible = "ldo4";
+                                ldo4_reg: ldo4 {
                                         regulator-name = "vdd_rtc";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <1200000>;
                                         regulator-always-on;
                                 };
 
-                                ldo5_reg: regulator@8 {
-                                        reg = <8>;
-                                        regulator-compatible = "ldo5";
+                                ldo5_reg: ldo5 {
                                         regulator-name = "vddio_sdmmc,avdd_vdac";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                         regulator-always-on;
                                 };
 
-                                ldo6_reg: regulator@9 {
-                                        reg = <9>;
-                                        regulator-compatible = "ldo6";
+                                ldo6_reg: ldo6 {
                                         regulator-name = "avdd_dsi_csi,pwrdet_mipi";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <1200000>;
                                 };
 
-                                ldo7_reg: regulator@10 {
-                                        reg = <10>;
-                                        regulator-compatible = "ldo7";
+                                ldo7_reg: ldo7 {
                                         regulator-name = "vdd_pllm,x,u,a_p_c_s";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <1200000>;
                                         regulator-always-on;
                                 };
 
-                                ldo8_reg: regulator@11 {
-                                        reg = <11>;
-                                        regulator-compatible = "ldo8";
+                                ldo8_reg: ldo8 {
                                         regulator-name = "vdd_ddr_hs";
                                         regulator-min-microvolt = <1000000>;
                                         regulator-max-microvolt = <1000000>;
@@ -275,6 +275,16 @@
                 };
         };
 
+        spi@7000da00 {
+                status = "okay";
+                spi-max-frequency = <25000000>;
+                spi-flash@1 {
+                        compatible = "winbond,w25q32";
+                        reg = <1>;
+                        spi-max-frequency = <20000000>;
+                };
+        };
+
         ahub {
                 i2s@70080400 {
                         status = "okay";
@@ -409,6 +419,8 @@
                         regulator-name = "vdd_com";
                         regulator-min-microvolt = <3300000>;
                         regulator-max-microvolt = <3300000>;
+                        regulator-always-on;
+                        regulator-boot-on;
                         enable-active-high;
                         gpio = <&gpio 24 0>; /* gpio PD0 */
                         vin-supply = <&sys_3v3_reg>;
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index df7f2270fc91..efa603d47a6a 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -4,6 +4,102 @@
         compatible = "nvidia,tegra30";
         interrupt-parent = <&intc>;
 
+        host1x {
+                compatible = "nvidia,tegra30-host1x", "simple-bus";
+                reg = <0x50000000 0x00024000>;
+                interrupts = <0 65 0x04   /* mpcore syncpt */
+                              0 67 0x04>; /* mpcore general */
+
+                #address-cells = <1>;
+                #size-cells = <1>;
+
+                ranges = <0x54000000 0x54000000 0x04000000>;
+
+                mpe {
+                        compatible = "nvidia,tegra30-mpe";
+                        reg = <0x54040000 0x00040000>;
+                        interrupts = <0 68 0x04>;
+                };
+
+                vi {
+                        compatible = "nvidia,tegra30-vi";
+                        reg = <0x54080000 0x00040000>;
+                        interrupts = <0 69 0x04>;
+                };
+
+                epp {
+                        compatible = "nvidia,tegra30-epp";
+                        reg = <0x540c0000 0x00040000>;
+                        interrupts = <0 70 0x04>;
+                };
+
+                isp {
+                        compatible = "nvidia,tegra30-isp";
+                        reg = <0x54100000 0x00040000>;
+                        interrupts = <0 71 0x04>;
+                };
+
+                gr2d {
+                        compatible = "nvidia,tegra30-gr2d";
+                        reg = <0x54140000 0x00040000>;
+                        interrupts = <0 72 0x04>;
+                };
+
+                gr3d {
+                        compatible = "nvidia,tegra30-gr3d";
+                        reg = <0x54180000 0x00040000>;
+                };
+
+                dc@54200000 {
+                        compatible = "nvidia,tegra30-dc";
+                        reg = <0x54200000 0x00040000>;
+                        interrupts = <0 73 0x04>;
+
+                        rgb {
+                                status = "disabled";
+                        };
+                };
+
+                dc@54240000 {
+                        compatible = "nvidia,tegra30-dc";
+                        reg = <0x54240000 0x00040000>;
+                        interrupts = <0 74 0x04>;
+
+                        rgb {
+                                status = "disabled";
+                        };
+                };
+
+                hdmi {
+                        compatible = "nvidia,tegra30-hdmi";
+                        reg = <0x54280000 0x00040000>;
+                        interrupts = <0 75 0x04>;
+                        status = "disabled";
+                };
+
+                tvo {
+                        compatible = "nvidia,tegra30-tvo";
+                        reg = <0x542c0000 0x00040000>;
+                        interrupts = <0 76 0x04>;
+                        status = "disabled";
+                };
+
+                dsi {
+                        compatible = "nvidia,tegra30-dsi";
+                        reg = <0x54300000 0x00040000>;
+                        status = "disabled";
+                };
+        };
+
+        cache-controller@50043000 {
+                compatible = "arm,pl310-cache";
+                reg = <0x50043000 0x1000>;
+                arm,data-latency = <6 6 2>;
+                arm,tag-latency = <5 5 2>;
+                cache-unified;
+                cache-level = <2>;
+        };
+
         intc: interrupt-controller {
                 compatible = "arm,cortex-a9-gic";
                 reg = <0x50041000 0x1000
@@ -168,6 +264,66 @@
                 status = "disabled";
         };
 
+        spi@7000d400 {
+                compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+                reg = <0x7000d400 0x200>;
+                interrupts = <0 59 0x04>;
+                nvidia,dma-request-selector = <&apbdma 15>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
+
+        spi@7000d600 {
+                compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+                reg = <0x7000d600 0x200>;
+                interrupts = <0 82 0x04>;
+                nvidia,dma-request-selector = <&apbdma 16>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
+
+        spi@7000d800 {
+                compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+                reg = <0x7000d480 0x200>;
+                interrupts = <0 83 0x04>;
+                nvidia,dma-request-selector = <&apbdma 17>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
+
+        spi@7000da00 {
+                compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+                reg = <0x7000da00 0x200>;
+                interrupts = <0 93 0x04>;
+                nvidia,dma-request-selector = <&apbdma 18>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
+
+        spi@7000dc00 {
+                compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+                reg = <0x7000dc00 0x200>;
+                interrupts = <0 94 0x04>;
+                nvidia,dma-request-selector = <&apbdma 27>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
+
+        spi@7000de00 {
+                compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+                reg = <0x7000de00 0x200>;
+                interrupts = <0 79 0x04>;
+                nvidia,dma-request-selector = <&apbdma 28>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
+
         pmc {
                 compatible = "nvidia,tegra20-pmc", "nvidia,tegra30-pmc";
                 reg = <0x7000e400 0x400>;
diff --git a/arch/arm/boot/dts/twl4030.dtsi b/arch/arm/boot/dts/twl4030.dtsi
index ff000172c93c..63411b036932 100644
--- a/arch/arm/boot/dts/twl4030.dtsi
+++ b/arch/arm/boot/dts/twl4030.dtsi
@@ -37,6 +37,24 @@
                 regulator-max-microvolt = <3150000>;
         };
 
+        vusb1v5: regulator-vusb1v5 {
+                compatible = "ti,twl4030-vusb1v5";
+        };
+
+        vusb1v8: regulator-vusb1v8 {
+                compatible = "ti,twl4030-vusb1v8";
+        };
+
+        vusb3v1: regulator-vusb3v1 {
+                compatible = "ti,twl4030-vusb3v1";
+        };
+
+        vsim: regulator-vsim {
+                compatible = "ti,twl4030-vsim";
+                regulator-min-microvolt = <1800000>;
+                regulator-max-microvolt = <3000000>;
+        };
+
         twl_gpio: gpio {
                 compatible = "ti,twl4030-gpio";
                 gpio-controller;
@@ -44,4 +62,13 @@
                 interrupt-controller;
                 #interrupt-cells = <1>;
         };
+
+        twl4030-usb {
+                compatible = "ti,twl4030-usb";
+                interrupts = <10>, <4>;
+                usb1v5-supply = <&vusb1v5>;
+                usb1v8-supply = <&vusb1v8>;
+                usb3v1-supply = <&vusb3v1>;
+                usb_mode = <1>;
+        };
 };
diff --git a/arch/arm/boot/dts/twl6030.dtsi b/arch/arm/boot/dts/twl6030.dtsi
index 123e2c40218a..9996cfc5ee80 100644
--- a/arch/arm/boot/dts/twl6030.dtsi
+++ b/arch/arm/boot/dts/twl6030.dtsi
@@ -86,4 +86,9 @@
         clk32kg: regulator-clk32kg {
                 compatible = "ti,twl6030-clk32kg";
         };
+
+        twl_usb_comparator: usb-comparator {
+                compatible = "ti,twl6030-usb";
+                interrupts = <4>, <10>;
+        };
 };
diff --git a/arch/arm/boot/dts/u9540.dts b/arch/arm/boot/dts/u9540.dts
new file mode 100644
index 000000000000..95892ec6c342
--- /dev/null
+++ b/arch/arm/boot/dts/u9540.dts
@@ -0,0 +1,72 @@
+/*
+ * Copyright 2012 ST-Ericsson AB
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "dbx5x0.dtsi"
+
+/ {
+        model = "ST-Ericsson U9540 platform with Device Tree";
+        compatible = "st-ericsson,u9540";
+
+        memory {
+                reg = <0x00000000 0x20000000>;
+        };
+
+        soc-u9500 {
+                uart@80120000 {
+                        status = "okay";
+                };
+
+                uart@80121000 {
+                        status = "okay";
+                };
+
+                uart@80007000 {
+                        status = "okay";
+                };
+
+                // External Micro SD slot
+                sdi0_per1@80126000 {
+                        arm,primecell-periphid = <0x10480180>;
+                        max-frequency = <100000000>;
+                        bus-width = <4>;
+                        mmc-cap-sd-highspeed;
+                        mmc-cap-mmc-highspeed;
+                        vmmc-supply = <&ab8500_ldo_aux3_reg>;
+
+                        cd-gpios  = <&gpio7 6 0x4>; // 230
+                        cd-inverted;
+
+                        status = "okay";
+                };
+
+
+                // WLAN SDIO channel
+                sdi1_per2@80118000 {
+                        arm,primecell-periphid = <0x10480180>;
+                        max-frequency = <50000000>;
+                        bus-width = <4>;
+
+                        status = "okay";
+                };
+
+                // On-board eMMC
+                sdi4_per2@80114000 {
+                        arm,primecell-periphid = <0x10480180>;
+                        max-frequency = <100000000>;
+                        bus-width = <8>;
+                        mmc-cap-mmc-highspeed;
+                        vmmc-supply = <&ab8500_ldo_aux2_reg>;
+
+                        status = "okay";
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
new file mode 100644
index 000000000000..401c1262d4ed
--- /dev/null
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -0,0 +1,166 @@
+/*
+ *  Copyright (C) 2011 Xilinx
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+/include/ "skeleton.dtsi"
+
+/ {
+        compatible = "xlnx,zynq-7000";
+
+        amba {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                interrupt-parent = <&intc>;
+                ranges;
+
+                intc: interrupt-controller@f8f01000 {
+                        compatible = "arm,cortex-a9-gic";
+                        #interrupt-cells = <3>;
+                        #address-cells = <1>;
+                        interrupt-controller;
+                        reg = <0xF8F01000 0x1000>,
+                              <0xF8F00100 0x100>;
+                };
+
+                L2: cache-controller {
+                        compatible = "arm,pl310-cache";
+                        reg = <0xF8F02000 0x1000>;
+                        arm,data-latency = <2 3 2>;
+                        arm,tag-latency = <2 3 2>;
+                        cache-unified;
+                        cache-level = <2>;
+                };
+
+                uart0: uart@e0000000 {
+                        compatible = "xlnx,xuartps";
+                        reg = <0xE0000000 0x1000>;
+                        interrupts = <0 27 4>;
+                        clock = <50000000>;
+                };
+
+                uart1: uart@e0001000 {
+                        compatible = "xlnx,xuartps";
+                        reg = <0xE0001000 0x1000>;
+                        interrupts = <0 50 4>;
+                        clock = <50000000>;
+                };
+
+                slcr: slcr@f8000000 {
+                        compatible = "xlnx,zynq-slcr";
+                        reg = <0xF8000000 0x1000>;
+
+                        clocks {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+
+                                ps_clk: ps_clk {
+                                        #clock-cells = <0>;
+                                        compatible = "fixed-clock";
+                                        /* clock-frequency set in board-specific file */
+                                        clock-output-names = "ps_clk";
+                                };
+                                armpll: armpll {
+                                        #clock-cells = <0>;
+                                        compatible = "xlnx,zynq-pll";
+                                        clocks = <&ps_clk>;
+                                        reg = <0x100 0x110>;
+                                        clock-output-names = "armpll";
+                                };
+                                ddrpll: ddrpll {
+                                        #clock-cells = <0>;
+                                        compatible = "xlnx,zynq-pll";
+                                        clocks = <&ps_clk>;
+                                        reg = <0x104 0x114>;
+                                        clock-output-names = "ddrpll";
+                                };
+                                iopll: iopll {
+                                        #clock-cells = <0>;
+                                        compatible = "xlnx,zynq-pll";
+                                        clocks = <&ps_clk>;
+                                        reg = <0x108 0x118>;
+                                        clock-output-names = "iopll";
+                                };
+                                uart_clk: uart_clk {
+                                        #clock-cells = <1>;
+                                        compatible = "xlnx,zynq-periph-clock";
+                                        clocks = <&iopll &armpll &ddrpll>;
+                                        reg = <0x154>;
+                                        clock-output-names = "uart0_ref_clk",
+                                                             "uart1_ref_clk";
+                                };
+                                cpu_clk: cpu_clk {
+                                        #clock-cells = <1>;
+                                        compatible = "xlnx,zynq-cpu-clock";
+                                        clocks = <&iopll &armpll &ddrpll>;
+                                        reg = <0x120 0x1C4>;
+                                        clock-output-names = "cpu_6x4x",
+                                                             "cpu_3x2x",
+                                                             "cpu_2x",
+                                                             "cpu_1x";
+                                };
+                        };
+                };
+
+                ttc0: ttc0@f8001000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "xlnx,ttc";
+                        reg = <0xF8001000 0x1000>;
+                        clocks = <&cpu_clk 3>;
+                        clock-names = "cpu_1x";
+                        clock-ranges;
+
+                        ttc0_0: ttc0.0 {
+                                status = "disabled";
+                                reg = <0>;
+                                interrupts = <0 10 4>;
+                        };
+                        ttc0_1: ttc0.1 {
+                                status = "disabled";
+                                reg = <1>;
+                                interrupts = <0 11 4>;
+                        };
+                        ttc0_2: ttc0.2 {
+                                status = "disabled";
+                                reg = <2>;
+                                interrupts = <0 12 4>;
+                        };
+                };
+
+                ttc1: ttc1@f8002000 {
+                        #interrupt-parent = <&intc>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "xlnx,ttc";
+                        reg = <0xF8002000 0x1000>;
+                        clocks = <&cpu_clk 3>;
+                        clock-names = "cpu_1x";
+                        clock-ranges;
+
+                        ttc1_0: ttc1.0 {
+                                status = "disabled";
+                                reg = <0>;
+                                interrupts = <0 37 4>;
+                        };
+                        ttc1_1: ttc1.1 {
+                                status = "disabled";
+                                reg = <1>;
+                                interrupts = <0 38 4>;
+                        };
+                        ttc1_2: ttc1.2 {
+                                status = "disabled";
+                                reg = <2>;
+                                interrupts = <0 39 4>;
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/zynq-ep107.dts b/arch/arm/boot/dts/zynq-ep107.dts
deleted file mode 100644
index 37ca192fb193..000000000000
--- a/arch/arm/boot/dts/zynq-ep107.dts
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- *  Copyright (C) 2011 Xilinx
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/dts-v1/;
-/ {
-        model = "Xilinx Zynq EP107";
-        compatible = "xlnx,zynq-ep107";
-        #address-cells = <1>;
-        #size-cells = <1>;
-        interrupt-parent = <&intc>;
-
-        memory {
-                device_type = "memory";
-                reg = <0x0 0x10000000>;
-        };
-
-        chosen {
-                bootargs = "console=ttyPS0,9600 root=/dev/ram rw initrd=0x800000,8M earlyprintk";
-                linux,stdout-path = &uart0;
-        };
-
-        amba {
-                compatible = "simple-bus";
-                #address-cells = <1>;
-                #size-cells = <1>;
-                ranges;
-
-                intc: interrupt-controller@f8f01000 {
-                        interrupt-controller;
-                        compatible = "arm,gic";
-                        reg = <0xF8F01000 0x1000>;
-                        #interrupt-cells = <2>;
-                };
-
-                uart0: uart@e0000000 {
-                        compatible = "xlnx,xuartps";
-                        reg = <0xE0000000 0x1000>;
-                        interrupts = <59 0>;
-                        clock = <50000000>;
-                };
-        };
-};
diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts
new file mode 100644
index 000000000000..c772942a399a
--- /dev/null
+++ b/arch/arm/boot/dts/zynq-zc702.dts
@@ -0,0 +1,44 @@
+/*
+ *  Copyright (C) 2011 Xilinx
+ *  Copyright (C) 2012 National Instruments Corp.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+/dts-v1/;
+/include/ "zynq-7000.dtsi"
+
+/ {
+        model = "Zynq ZC702 Development Board";
+        compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
+
+        memory {
+                device_type = "memory";
+                reg = <0x0 0x40000000>;
+        };
+
+        chosen {
+                bootargs = "console=ttyPS1,115200 earlyprintk";
+        };
+
+};
+
+&ps_clk {
+        clock-frequency = <33333330>;
+};
+
+&ttc0_0 {
+        status = "ok";
+        compatible = "xlnx,ttc-counter-clocksource";
+};
+
+&ttc0_1 {
+        status = "ok";
+        compatible = "xlnx,ttc-counter-clockevent";
+};
diff --git a/arch/arm/configs/dove_defconfig b/arch/arm/configs/dove_defconfig
index 40db34cf2771..0b7ee92c5713 100644
--- a/arch/arm/configs/dove_defconfig
+++ b/arch/arm/configs/dove_defconfig
@@ -8,11 +8,19 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
 CONFIG_ARCH_DOVE=y
 CONFIG_MACH_DOVE_DB=y
+CONFIG_MACH_CM_A510=y
+CONFIG_MACH_DOVE_DT=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_AEABI=y
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_HIGHMEM=y
+CONFIG_USE_OF=y
+CONFIG_ATAGS=y
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_ARM_ATAG_DTB_COMPAT=y
+CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y
 CONFIG_VFP=y
 CONFIG_NET=y
 CONFIG_PACKET=y
@@ -62,6 +70,9 @@ CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 # CONFIG_SERIAL_8250_PCI is not set
 CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_SERIAL_OF_PLATFORM=y
 # CONFIG_HW_RANDOM is not set
 CONFIG_I2C=y
 CONFIG_I2C_CHARDEV=y
@@ -74,6 +85,18 @@ CONFIG_USB_DEVICEFS=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_ROOT_HUB_TT=y
 CONFIG_USB_STORAGE=y
+CONFIG_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_IO_ACCESSORS=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_DOVE=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_MV=y
 CONFIG_DMADEVICES=y
@@ -122,6 +145,7 @@ CONFIG_CRYPTO_TWOFISH=y
 CONFIG_CRYPTO_DEFLATE=y
 CONFIG_CRYPTO_LZO=y
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_DEV_MV_CESA=y
 CONFIG_CRC_CCITT=y
 CONFIG_CRC16=y
 CONFIG_LIBCRC32C=y
diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig
index 78ed575feb1a..f71302c3ac33 100644
--- a/arch/arm/configs/imx_v4_v5_defconfig
+++ b/arch/arm/configs/imx_v4_v5_defconfig
@@ -18,7 +18,9 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_IOSCHED_DEADLINE is not set
 # CONFIG_IOSCHED_CFQ is not set
 CONFIG_ARCH_MXC=y
-CONFIG_ARCH_IMX_V4_V5=y
+CONFIG_ARCH_MULTI_V4T=y
+CONFIG_ARCH_MULTI_V5=y
+# CONFIG_ARCH_MULTI_V7 is not set
 CONFIG_ARCH_MX1ADS=y
 CONFIG_MACH_SCB9328=y
 CONFIG_MACH_APF9328=y
diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig
index 394ded624e37..44f117aab52c 100644
--- a/arch/arm/configs/imx_v6_v7_defconfig
+++ b/arch/arm/configs/imx_v6_v7_defconfig
@@ -17,6 +17,8 @@ CONFIG_MODVERSIONS=y
 CONFIG_MODULE_SRCVERSION_ALL=y
 # CONFIG_BLK_DEV_BSG is not set
 CONFIG_ARCH_MXC=y
+CONFIG_ARCH_MULTI_V6=y
+CONFIG_ARCH_MULTI_V7=y
 CONFIG_MACH_MX31LILLY=y
 CONFIG_MACH_MX31LITE=y
 CONFIG_MACH_PCM037=y
diff --git a/arch/arm/configs/kirkwood_defconfig b/arch/arm/configs/kirkwood_defconfig
index 74eee0c78f28..93f3794ba5cb 100644
--- a/arch/arm/configs/kirkwood_defconfig
+++ b/arch/arm/configs/kirkwood_defconfig
@@ -27,6 +27,14 @@ CONFIG_MACH_GOFLEXNET_DT=y
 CONFIG_MACH_LSXL_DT=y
 CONFIG_MACH_IOMEGA_IX2_200_DT=y
 CONFIG_MACH_KM_KIRKWOOD_DT=y
+CONFIG_MACH_INETSPACE_V2_DT=y
+CONFIG_MACH_MPLCEC4_DT=y
+CONFIG_MACH_NETSPACE_V2_DT=y
+CONFIG_MACH_NETSPACE_MAX_V2_DT=y
+CONFIG_MACH_NETSPACE_LITE_V2_DT=y
+CONFIG_MACH_NETSPACE_MINI_V2_DT=y
+CONFIG_MACH_OPENBLOCKS_A6_DT=y
+CONFIG_MACH_TOPKICK_DT=y
 CONFIG_MACH_TS219=y
 CONFIG_MACH_TS41X=y
 CONFIG_MACH_DOCKSTAR=y
@@ -40,6 +48,7 @@ CONFIG_MACH_D2NET_V2=y
 CONFIG_MACH_NET2BIG_V2=y
 CONFIG_MACH_NET5BIG_V2=y
 CONFIG_MACH_T5325=y
+CONFIG_MACH_NSA310_DT=y
 # CONFIG_CPU_FEROCEON_OLD_ID is not set
 CONFIG_PREEMPT=y
 CONFIG_AEABI=y
diff --git a/arch/arm/configs/mxs_defconfig b/arch/arm/configs/mxs_defconfig
index 048aaca60814..7bf535104e26 100644
--- a/arch/arm/configs/mxs_defconfig
+++ b/arch/arm/configs/mxs_defconfig
@@ -61,6 +61,8 @@ CONFIG_MTD_NAND_GPMI_NAND=y
 CONFIG_NETDEVICES=y
 CONFIG_NET_ETHERNET=y
 CONFIG_ENC28J60=y
+CONFIG_USB_USBNET=y
+CONFIG_USB_NET_SMSC95XX=y
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
 # CONFIG_WLAN is not set
@@ -158,6 +160,10 @@ CONFIG_NFS_V3=y
 CONFIG_NFS_V3_ACL=y
 CONFIG_NFS_V4=y
 CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_ISO8859_15=y
 CONFIG_PRINTK_TIME=y
 CONFIG_FRAME_WARN=2048
 CONFIG_MAGIC_SYSRQ=y
diff --git a/arch/arm/configs/orion5x_defconfig b/arch/arm/configs/orion5x_defconfig
index cd5e6ba9a54d..952430d9e2d9 100644
--- a/arch/arm/configs/orion5x_defconfig
+++ b/arch/arm/configs/orion5x_defconfig
@@ -1,7 +1,8 @@
 CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_EXPERT=y
 # CONFIG_SLUB_DEBUG is not set
 CONFIG_PROFILING=y
@@ -10,6 +11,8 @@ CONFIG_KPROBES=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_BSD_DISKLABEL=y
 CONFIG_ARCH_ORION5X=y
 CONFIG_MACH_DB88F5281=y
 CONFIG_MACH_RD88F5182=y
@@ -24,7 +27,7 @@ CONFIG_MACH_TS409=y
 CONFIG_MACH_WRT350N_V2=y
 CONFIG_MACH_TS78XX=y
 CONFIG_MACH_MV2120=y
-CONFIG_MACH_EDMINI_V2=y
+CONFIG_MACH_EDMINI_V2_DT=y
 CONFIG_MACH_D2NET=y
 CONFIG_MACH_BIGDISK=y
 CONFIG_MACH_NET2BIG=y
@@ -33,17 +36,13 @@ CONFIG_MACH_WNR854T=y
 CONFIG_MACH_RD88F5181L_GE=y
 CONFIG_MACH_RD88F5181L_FXO=y
 CONFIG_MACH_RD88F6183AP_GE=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
 CONFIG_PREEMPT=y
 CONFIG_AEABI=y
-CONFIG_LEDS=y
-CONFIG_LEDS_CPU=y
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_ARM_APPENDED_DTB=y
 CONFIG_FPE_NWFPE=y
 CONFIG_VFP=y
-# CONFIG_SUSPEND is not set
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
@@ -54,13 +53,10 @@ CONFIG_IP_PNP_DHCP=y
 CONFIG_IP_PNP_BOOTP=y
 # CONFIG_IPV6 is not set
 CONFIG_NET_DSA=y
-CONFIG_NET_DSA_MV88E6131=y
-CONFIG_NET_DSA_MV88E6123_61_65=y
 CONFIG_NET_PKTGEN=m
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 # CONFIG_FIRMWARE_IN_KERNEL is not set
 CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
@@ -82,12 +78,11 @@ CONFIG_CHR_DEV_SG=m
 CONFIG_ATA=y
 CONFIG_SATA_MV=y
 CONFIG_NETDEVICES=y
-CONFIG_MARVELL_PHY=y
-CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
-CONFIG_NET_PCI=y
+CONFIG_NET_DSA_MV88E6131=y
+CONFIG_NET_DSA_MV88E6123_61_65=y
 CONFIG_MV643XX_ETH=y
-# CONFIG_NETDEV_10000 is not set
+CONFIG_MARVELL_PHY=y
 # CONFIG_INPUT_MOUSEDEV is not set
 CONFIG_INPUT_EVDEV=y
 # CONFIG_KEYBOARD_ATKBD is not set
@@ -95,11 +90,12 @@ CONFIG_KEYBOARD_GPIO=y
 # CONFIG_INPUT_MOUSE is not set
 # CONFIG_SERIO is not set
 # CONFIG_VT is not set
+CONFIG_LEGACY_PTY_COUNT=16
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 # CONFIG_SERIAL_8250_PCI is not set
 CONFIG_SERIAL_8250_RUNTIME_UARTS=2
-CONFIG_LEGACY_PTY_COUNT=16
+CONFIG_SERIAL_OF_PLATFORM=y
 CONFIG_HW_RANDOM_TIMERIOMEM=m
 CONFIG_I2C=y
 # CONFIG_I2C_COMPAT is not set
@@ -109,10 +105,8 @@ CONFIG_GPIO_SYSFS=y
 CONFIG_SENSORS_LM75=y
 # CONFIG_VGA_ARB is not set
 CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_ROOT_HUB_TT=y
-CONFIG_USB_EHCI_TT_NEWSCHED=y
 CONFIG_USB_PRINTER=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_STORAGE_DATAFAB=y
@@ -140,7 +134,6 @@ CONFIG_EXT2_FS=y
 CONFIG_EXT3_FS=y
 # CONFIG_EXT3_FS_XATTR is not set
 CONFIG_EXT4_FS=m
-CONFIG_INOTIFY=y
 CONFIG_ISO9660_FS=m
 CONFIG_JOLIET=y
 CONFIG_UDF_FS=m
@@ -150,25 +143,18 @@ CONFIG_TMPFS=y
 CONFIG_JFFS2_FS=y
 CONFIG_CRAMFS=y
 CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
 CONFIG_ROOT_NFS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_BSD_DISKLABEL=y
 CONFIG_NLS_CODEPAGE_437=y
 CONFIG_NLS_CODEPAGE_850=y
 CONFIG_NLS_ISO8859_1=y
 CONFIG_NLS_ISO8859_2=y
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_KERNEL=y
 # CONFIG_DEBUG_BUGVERBOSE is not set
 CONFIG_DEBUG_INFO=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 CONFIG_LATENCYTOP=y
-CONFIG_SYSCTL_SYSCALL_CHECK=y
 # CONFIG_FTRACE is not set
 CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
 CONFIG_DEBUG_LL=y
 CONFIG_CRYPTO_CBC=m
 CONFIG_CRYPTO_ECB=m
diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig
index da6845493caa..6fe7ede6f0c2 100644
--- a/arch/arm/configs/u8500_defconfig
+++ b/arch/arm/configs/u8500_defconfig
@@ -76,6 +76,7 @@ CONFIG_AB8500_CORE=y
 CONFIG_REGULATOR=y
 CONFIG_REGULATOR_AB8500=y
 CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_REGULATOR_GPIO=y
 # CONFIG_HID_SUPPORT is not set
 CONFIG_USB_GADGET=y
 CONFIG_AB8500_USB=y
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
index 23004847bb05..8ea02ac3ec1a 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -211,13 +211,6 @@ static inline void dma_free_writecombine(struct device *dev, size_t size,
 extern void __init init_dma_coherent_pool_size(unsigned long size);
 
 /*
- * This can be called during boot to increase the size of the consistent
- * DMA region above it's default value of 2MB. It must be called before the
- * memory allocator is initialised, i.e. before any core_initcall.
- */
-static inline void init_consistent_dma_size(unsigned long size) { }
-
-/*
  * For SA-1111, IXP425, and ADI systems  the dma-mapping functions are "magic"
  * and utilize bounce buffers as needed to work around limited DMA windows.
  *
diff --git a/arch/arm/include/debug/imx.S b/arch/arm/include/debug/imx.S
new file mode 100644
index 000000000000..0c4e17d4d359
--- /dev/null
+++ b/arch/arm/include/debug/imx.S
@@ -0,0 +1,74 @@
+/* arch/arm/mach-imx/include/mach/debug-macro.S
+ *
+ * Debugging macro include header
+ *
+ *  Copyright (C) 1994-1999 Russell King
+ *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#define IMX6Q_UART1_BASE_ADDR   0x02020000
+#define IMX6Q_UART2_BASE_ADDR   0x021e8000
+#define IMX6Q_UART3_BASE_ADDR   0x021ec000
+#define IMX6Q_UART4_BASE_ADDR   0x021f0000
+#define IMX6Q_UART5_BASE_ADDR   0x021f4000
+
+/*
+ * IMX6Q_UART_BASE_ADDR is put in the middle to force the expansion
+ * of IMX6Q_UART##n##_BASE_ADDR.
+ */
+#define IMX6Q_UART_BASE_ADDR(n) IMX6Q_UART##n##_BASE_ADDR
+#define IMX6Q_UART_BASE(n)      IMX6Q_UART_BASE_ADDR(n)
+#define IMX6Q_DEBUG_UART_BASE   IMX6Q_UART_BASE(CONFIG_DEBUG_IMX6Q_UART_PORT)
+
+#ifdef CONFIG_DEBUG_IMX1_UART
+#define UART_PADDR      0x00206000
+#elif defined (CONFIG_DEBUG_IMX25_UART)
+#define UART_PADDR      0x43f90000
+#elif defined (CONFIG_DEBUG_IMX21_IMX27_UART)
+#define UART_PADDR      0x1000a000
+#elif defined (CONFIG_DEBUG_IMX31_IMX35_UART)
+#define UART_PADDR      0x43f90000
+#elif defined (CONFIG_DEBUG_IMX51_UART)
+#define UART_PADDR      0x73fbc000
+#elif defined (CONFIG_DEBUG_IMX50_IMX53_UART)
+#define UART_PADDR      0x53fbc000
+#elif defined (CONFIG_DEBUG_IMX6Q_UART)
+#define UART_PADDR      IMX6Q_DEBUG_UART_BASE
+#endif
+
+/*
+ * FIXME: This is a copy of IMX_IO_P2V in hardware.h, and needs to
+ * stay sync with that.  It's hard to maintain, and should be fixed
+ * globally for multi-platform build to use a fixed virtual address
+ * for low-level debug uart port across platforms.
+ */
+#define IMX_IO_P2V(x)   (                                               \
+                        (((x) & 0x80000000) >> 7) |                     \
+                        (0xf4000000 +                                   \
+                        (((x) & 0x50000000) >> 6) +                     \
+                        (((x) & 0x0b000000) >> 4) +                     \
+                        (((x) & 0x000fffff))))
+
+#define UART_VADDR      IMX_IO_P2V(UART_PADDR)
+
+                .macro  addruart, rp, rv, tmp
+                ldr     \rp, =UART_PADDR        @ physical
+                ldr     \rv, =UART_VADDR        @ virtual
+                .endm
+
+                .macro  senduart,rd,rx
+                str     \rd, [\rx, #0x40]       @ TXDATA
+                .endm
+
+                .macro  waituart,rd,rx
+                .endm
+
+                .macro  busyuart,rd,rx
+1002:           ldr     \rd, [\rx, #0x98]       @ SR2
+                tst     \rd, #1 << 3            @ TXDC
+                beq     1002b                   @ wait until transmit done
+                .endm
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 84af1b506d92..b7ae124c16e5 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -343,7 +343,6 @@ static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = {
 static void __init at91sam9g45_map_io(void)
 {
         at91_init_sram(0, AT91SAM9G45_SRAM_BASE, AT91SAM9G45_SRAM_SIZE);
-        init_consistent_dma_size(SZ_4M);
 }
 
 static void __init at91sam9g45_ioremap_registers(void)
diff --git a/arch/arm/mach-at91/include/mach/atmel-mci.h b/arch/arm/mach-at91/include/mach/atmel-mci.h
index cd580a12e904..3069e4135573 100644
--- a/arch/arm/mach-at91/include/mach/atmel-mci.h
+++ b/arch/arm/mach-at91/include/mach/atmel-mci.h
@@ -14,11 +14,4 @@ struct mci_dma_data {
 #define slave_data_ptr(s)       (&(s)->sdata)
 #define find_slave_dev(s)       ((s)->sdata.dma_dev)
 
-#define setup_dma_addr(s, t, r) do {            \
-        if (s) {                                \
-                (s)->sdata.tx_reg = (t);        \
-                (s)->sdata.rx_reg = (r);        \
-        }                                       \
-} while (0)
-
 #endif /* __MACH_ATMEL_MCI_H */
diff --git a/arch/arm/mach-bcm2835/Makefile.boot b/arch/arm/mach-bcm2835/Makefile.boot
index 2d30e17f5b69..b3271754e9fd 100644
--- a/arch/arm/mach-bcm2835/Makefile.boot
+++ b/arch/arm/mach-bcm2835/Makefile.boot
@@ -1,3 +1 @@
-   zreladdr-y := 0x00008000
-params_phys-y := 0x00000100
-initrd_phys-y := 0x00800000
+zreladdr-y := 0x00008000
diff --git a/arch/arm/mach-bcm2835/bcm2835.c b/arch/arm/mach-bcm2835/bcm2835.c
index f6fea4933571..53e3842c9330 100644
--- a/arch/arm/mach-bcm2835/bcm2835.c
+++ b/arch/arm/mach-bcm2835/bcm2835.c
@@ -30,12 +30,12 @@ static struct map_desc io_map __initdata = {
         .type = MT_DEVICE
 };
 
-void __init bcm2835_map_io(void)
+static void __init bcm2835_map_io(void)
 {
         iotable_init(&io_map, 1);
 }
 
-void __init bcm2835_init(void)
+static void __init bcm2835_init(void)
 {
         int ret;
 
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
index f8eecb959413..0153950f6068 100644
--- a/arch/arm/mach-davinci/Kconfig
+++ b/arch/arm/mach-davinci/Kconfig
@@ -58,6 +58,14 @@ config ARCH_DAVINCI_TNETV107X
 
 comment "DaVinci Board Type"
 
+config MACH_DA8XX_DT
+        bool "Support DA8XX platforms using device tree"
+        default y
+        depends on ARCH_DAVINCI_DA8XX
+        help
+          Say y here to include support for TI DaVinci DA850 based using
+          Flattened Device Tree. More information at Documentation/devicetree
+
 config MACH_DAVINCI_EVM
         bool "TI DM644x EVM"
         default ARCH_DAVINCI_DM644x
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
index 2227effcb0e9..fb5c1aa98a63 100644
--- a/arch/arm/mach-davinci/Makefile
+++ b/arch/arm/mach-davinci/Makefile
@@ -22,6 +22,7 @@ obj-$(CONFIG_AINTC)			+= irq.o
 obj-$(CONFIG_CP_INTC)                   += cp_intc.o
 
 # Board specific
+obj-$(CONFIG_MACH_DA8XX_DT)             += da8xx-dt.o
 obj-$(CONFIG_MACH_DAVINCI_EVM)          += board-dm644x-evm.o
 obj-$(CONFIG_MACH_SFFSDR)               += board-sffsdr.o
 obj-$(CONFIG_MACH_NEUROS_OSD2)          += board-neuros-osd2.o
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c
index 88ebea89abdf..cdf8d0746e79 100644
--- a/arch/arm/mach-davinci/board-dm355-evm.c
+++ b/arch/arm/mach-davinci/board-dm355-evm.c
@@ -324,7 +324,7 @@ static __init void dm355_evm_init(void)
         if (IS_ERR(aemif))
                 WARN("%s: unable to get AEMIF clock\n", __func__);
         else
-                clk_enable(aemif);
+                clk_prepare_enable(aemif);
 
         platform_add_devices(davinci_evm_devices,
                              ARRAY_SIZE(davinci_evm_devices));
diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c
index 2f88103c6459..d41954507fc2 100644
--- a/arch/arm/mach-davinci/board-dm355-leopard.c
+++ b/arch/arm/mach-davinci/board-dm355-leopard.c
@@ -246,7 +246,7 @@ static __init void dm355_leopard_init(void)
         if (IS_ERR(aemif))
                 WARN("%s: unable to get AEMIF clock\n", __func__);
         else
-                clk_enable(aemif);
+                clk_prepare_enable(aemif);
 
         platform_add_devices(davinci_leopard_devices,
                              ARRAY_SIZE(davinci_leopard_devices));
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index 1b4a8adcfdc9..5d49c75388ca 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -478,7 +478,7 @@ static void __init evm_init_cpld(void)
         aemif_clk = clk_get(NULL, "aemif");
         if (IS_ERR(aemif_clk))
                 return;
-        clk_enable(aemif_clk);
+        clk_prepare_enable(aemif_clk);
 
         if (request_mem_region(DM365_ASYNC_EMIF_DATA_CE1_BASE, SECTION_SIZE,
                         "cpld") == NULL)
@@ -489,7 +489,7 @@ static void __init evm_init_cpld(void)
                                 SECTION_SIZE);
 fail:
                 pr_err("ERROR: can't map CPLD\n");
-                clk_disable(aemif_clk);
+                clk_disable_unprepare(aemif_clk);
                 return;
         }
 
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index f22572cee49d..a84dfcbc1154 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -776,7 +776,7 @@ static __init void davinci_evm_init(void)
         struct davinci_soc_info *soc_info = &davinci_soc_info;
 
         aemif_clk = clk_get(NULL, "aemif");
-        clk_enable(aemif_clk);
+        clk_prepare_enable(aemif_clk);
 
         if (HAS_ATA) {
                 if (HAS_NAND || HAS_NOR)
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index 1dbf85beed1b..9211e8800c79 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -194,7 +194,7 @@ static int evm_led_setup(struct i2c_client *client, int gpio,
         while (ngpio--) {
                 leds->gpio = gpio++;
                 leds++;
-        };
+        }
 
         evm_led_dev = platform_device_alloc("leds-gpio", 0);
         platform_device_add_data(evm_led_dev, &evm_led_data,
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c
index 144bf31d68dd..3e3e3afebf88 100644
--- a/arch/arm/mach-davinci/board-neuros-osd2.c
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
@@ -188,7 +188,7 @@ static __init void davinci_ntosd2_init(void)
         struct davinci_soc_info *soc_info = &davinci_soc_info;
 
         aemif_clk = clk_get(NULL, "aemif");
-        clk_enable(aemif_clk);
+        clk_prepare_enable(aemif_clk);
 
         if (HAS_ATA) {
                 if (HAS_NAND)
diff --git a/arch/arm/mach-davinci/common.c b/arch/arm/mach-davinci/common.c
index 64b0f65a8639..a794f6d9d444 100644
--- a/arch/arm/mach-davinci/common.c
+++ b/arch/arm/mach-davinci/common.c
@@ -87,8 +87,6 @@ void __init davinci_common_init(struct davinci_soc_info *soc_info)
                 iotable_init(davinci_soc_info.io_desc,
                                 davinci_soc_info.io_desc_num);
 
-        init_consistent_dma_size(14 << 20);
-
         /*
          * Normally devicemaps_init() would flush caches and tlb after
          * mdesc->map_io(), but we must also do it here because of the CPU
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index b90c172d5541..68c5fe01857c 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -212,6 +212,12 @@ static struct clk tptc2_clk = {
         .flags          = ALWAYS_ENABLED,
 };
 
+static struct clk pruss_clk = {
+        .name           = "pruss",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA8XX_LPSC0_PRUSS,
+};
+
 static struct clk uart0_clk = {
         .name           = "uart0",
         .parent         = &pll0_sysclk2,
@@ -385,6 +391,7 @@ static struct clk_lookup da850_clks[] = {
         CLK(NULL,               "tptc1",        &tptc1_clk),
         CLK(NULL,               "tpcc1",        &tpcc1_clk),
         CLK(NULL,               "tptc2",        &tptc2_clk),
+        CLK("pruss_uio",        "pruss",        &pruss_clk),
         CLK(NULL,               "uart0",        &uart0_clk),
         CLK(NULL,               "uart1",        &uart1_clk),
         CLK(NULL,               "uart2",        &uart2_clk),
@@ -781,12 +788,6 @@ static struct map_desc da850_io_desc[] = {
                 .length         = DA8XX_CP_INTC_SIZE,
                 .type           = MT_DEVICE
         },
-        {
-                .virtual        = SRAM_VIRT,
-                .pfn            = __phys_to_pfn(DA8XX_ARM_RAM_BASE),
-                .length         = SZ_8K,
-                .type           = MT_DEVICE
-        },
 };
 
 static u32 da850_psc_bases[] = { DA8XX_PSC0_BASE, DA8XX_PSC1_BASE };
@@ -1239,8 +1240,8 @@ static struct davinci_soc_info davinci_soc_info_da850 = {
         .gpio_irq               = IRQ_DA8XX_GPIO0,
         .serial_dev             = &da8xx_serial_device,
         .emac_pdata             = &da8xx_emac_pdata,
-        .sram_dma               = DA8XX_ARM_RAM_BASE,
-        .sram_len               = SZ_8K,
+        .sram_dma               = DA8XX_SHARED_RAM_BASE,
+        .sram_len               = SZ_128K,
 };
 
 void __init da850_init(void)
diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c
new file mode 100644
index 000000000000..37c27af18fa0
--- /dev/null
+++ b/arch/arm/mach-davinci/da8xx-dt.c
@@ -0,0 +1,66 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Modified from mach-omap/omap2/board-generic.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/io.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <linux/irqdomain.h>
+
+#include <asm/mach/arch.h>
+
+#include <mach/common.h>
+#include <mach/cp_intc.h>
+#include <mach/da8xx.h>
+
+#define DA8XX_NUM_UARTS 3
+
+void __init da8xx_uart_clk_enable(void)
+{
+        int i;
+        for (i = 0; i < DA8XX_NUM_UARTS; i++)
+                davinci_serial_setup_clk(i, NULL);
+}
+
+static struct of_device_id da8xx_irq_match[] __initdata = {
+        { .compatible = "ti,cp-intc", .data = cp_intc_of_init, },
+        { }
+};
+
+static void __init da8xx_init_irq(void)
+{
+        of_irq_init(da8xx_irq_match);
+}
+
+#ifdef CONFIG_ARCH_DAVINCI_DA850
+
+static void __init da850_init_machine(void)
+{
+        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+
+        da8xx_uart_clk_enable();
+}
+
+static const char *da850_boards_compat[] __initdata = {
+        "enbw,cmc",
+        "ti,da850-evm",
+        "ti,da850",
+        NULL,
+};
+
+DT_MACHINE_START(DA850_DT, "Generic DA850/OMAP-L138/AM18x")
+        .map_io         = da850_init,
+        .init_irq       = da8xx_init_irq,
+        .timer          = &davinci_timer,
+        .init_machine   = da850_init_machine,
+        .dt_compat      = da850_boards_compat,
+        .init_late      = davinci_init_late,
+        .restart        = da8xx_restart,
+MACHINE_END
+
+#endif
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index bd2f72b414bc..46c9a0c09ae5 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -22,6 +22,7 @@
 #include <mach/time.h>
 #include <mach/da8xx.h>
 #include <mach/cpuidle.h>
+#include <mach/sram.h>
 
 #include "clock.h"
 #include "asp.h"
@@ -32,6 +33,7 @@
 #define DA8XX_WDOG_BASE                 0x01c21000 /* DA8XX_TIMER64P1_BASE */
 #define DA8XX_I2C0_BASE                 0x01c22000
 #define DA8XX_RTC_BASE                  0x01c23000
+#define DA8XX_PRUSS_MEM_BASE            0x01c30000
 #define DA8XX_MMCSD0_BASE               0x01c40000
 #define DA8XX_SPI0_BASE                 0x01c41000
 #define DA830_SPI1_BASE                 0x01e12000
@@ -518,6 +520,75 @@ void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata)
         }
 }
 
+static struct resource da8xx_pruss_resources[] = {
+        {
+                .start  = DA8XX_PRUSS_MEM_BASE,
+                .end    = DA8XX_PRUSS_MEM_BASE + 0xFFFF,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = IRQ_DA8XX_EVTOUT0,
+                .end    = IRQ_DA8XX_EVTOUT0,
+                .flags  = IORESOURCE_IRQ,
+        },
+        {
+                .start  = IRQ_DA8XX_EVTOUT1,
+                .end    = IRQ_DA8XX_EVTOUT1,
+                .flags  = IORESOURCE_IRQ,
+        },
+        {
+                .start  = IRQ_DA8XX_EVTOUT2,
+                .end    = IRQ_DA8XX_EVTOUT2,
+                .flags  = IORESOURCE_IRQ,
+        },
+        {
+                .start  = IRQ_DA8XX_EVTOUT3,
+                .end    = IRQ_DA8XX_EVTOUT3,
+                .flags  = IORESOURCE_IRQ,
+        },
+        {
+                .start  = IRQ_DA8XX_EVTOUT4,
+                .end    = IRQ_DA8XX_EVTOUT4,
+                .flags  = IORESOURCE_IRQ,
+        },
+        {
+                .start  = IRQ_DA8XX_EVTOUT5,
+                .end    = IRQ_DA8XX_EVTOUT5,
+                .flags  = IORESOURCE_IRQ,
+        },
+        {
+                .start  = IRQ_DA8XX_EVTOUT6,
+                .end    = IRQ_DA8XX_EVTOUT6,
+                .flags  = IORESOURCE_IRQ,
+        },
+        {
+                .start  = IRQ_DA8XX_EVTOUT7,
+                .end    = IRQ_DA8XX_EVTOUT7,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct uio_pruss_pdata da8xx_uio_pruss_pdata = {
+        .pintc_base     = 0x4000,
+};
+
+static struct platform_device da8xx_uio_pruss_dev = {
+        .name           = "pruss_uio",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(da8xx_pruss_resources),
+        .resource       = da8xx_pruss_resources,
+        .dev            = {
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                .platform_data          = &da8xx_uio_pruss_pdata,
+        }
+};
+
+int __init da8xx_register_uio_pruss(void)
+{
+        da8xx_uio_pruss_pdata.sram_pool = sram_get_gen_pool();
+        return platform_device_register(&da8xx_uio_pruss_dev);
+}
+
 static const struct display_panel disp_panel = {
         QVGA,
         16,
@@ -900,7 +971,7 @@ static int da850_sata_init(struct device *dev, void __iomem *addr)
         if (IS_ERR(da850_sata_clk))
                 return PTR_ERR(da850_sata_clk);
 
-        ret = clk_enable(da850_sata_clk);
+        ret = clk_prepare_enable(da850_sata_clk);
         if (ret)
                 goto err0;
 
@@ -931,7 +1002,7 @@ static int da850_sata_init(struct device *dev, void __iomem *addr)
         return 0;
 
 err1:
-        clk_disable(da850_sata_clk);
+        clk_disable_unprepare(da850_sata_clk);
 err0:
         clk_put(da850_sata_clk);
         return ret;
@@ -939,7 +1010,7 @@ err0:
 
 static void da850_sata_exit(struct device *dev)
 {
-        clk_disable(da850_sata_clk);
+        clk_disable_unprepare(da850_sata_clk);
         clk_put(da850_sata_clk);
 }
 
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index a255434908db..b49c3b77d55e 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -758,12 +758,6 @@ static struct map_desc dm355_io_desc[] = {
                 .length         = IO_SIZE,
                 .type           = MT_DEVICE
         },
-        {
-                .virtual        = SRAM_VIRT,
-                .pfn            = __phys_to_pfn(0x00010000),
-                .length         = SZ_32K,
-                .type           = MT_MEMORY_NONCACHED,
-        },
 };
 
 /* Contents of JTAG ID register used to identify exact cpu type */
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index b680c832e0ba..6c3980540be0 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -985,12 +985,6 @@ static struct map_desc dm365_io_desc[] = {
                 .length         = IO_SIZE,
                 .type           = MT_DEVICE
         },
-        {
-                .virtual        = SRAM_VIRT,
-                .pfn            = __phys_to_pfn(0x00010000),
-                .length         = SZ_32K,
-                .type           = MT_MEMORY_NONCACHED,
-        },
 };
 
 static struct resource dm365_ks_resources[] = {
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index cd0c8b1e1ecf..11c79a3362ef 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -713,8 +713,7 @@ static int dm644x_venc_setup_clock(enum vpbe_enc_timings_type type,
                 break;
         case VPBE_ENC_CUSTOM_TIMINGS:
                 if (pclock <= 27000000) {
-                        v |= DM644X_VPSS_MUXSEL_PLL2_MODE |
-                             DM644X_VPSS_DACCLKEN;
+                        v |= DM644X_VPSS_DACCLKEN;
                         writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL));
                 } else {
                         /*
@@ -786,12 +785,6 @@ static struct map_desc dm644x_io_desc[] = {
                 .length         = IO_SIZE,
                 .type           = MT_DEVICE
         },
-        {
-                .virtual        = SRAM_VIRT,
-                .pfn            = __phys_to_pfn(0x00008000),
-                .length         = SZ_16K,
-                .type           = MT_MEMORY_NONCACHED,
-        },
 };
 
 /* Contents of JTAG ID register used to identify exact cpu type */
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 97c0f8e555bd..ac7b431c4c8e 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -756,12 +756,6 @@ static struct map_desc dm646x_io_desc[] = {
                 .length         = IO_SIZE,
                 .type           = MT_DEVICE
         },
-        {
-                .virtual        = SRAM_VIRT,
-                .pfn            = __phys_to_pfn(0x00010000),
-                .length         = SZ_32K,
-                .type           = MT_MEMORY_NONCACHED,
-        },
 };
 
 /* Contents of JTAG ID register used to identify exact cpu type */
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index bdc4aa8e672a..046c7238a3d6 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -104,8 +104,6 @@ int davinci_pm_init(void);
 static inline int davinci_pm_init(void) { return 0; }
 #endif
 
-/* standard place to map on-chip SRAMs; they *may* support DMA */
-#define SRAM_VIRT       0xfffe0000
 #define SRAM_SIZE       SZ_128K
 
 #endif /* __ARCH_ARM_MACH_DAVINCI_COMMON_H */
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index aaccdc4528fc..700d311c6854 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -26,6 +26,7 @@
 #include <linux/platform_data/mmc-davinci.h>
 #include <linux/platform_data/usb-davinci.h>
 #include <linux/platform_data/spi-davinci.h>
+#include <linux/platform_data/uio_pruss.h>
 
 #include <media/davinci/vpif_types.h>
 
@@ -72,6 +73,7 @@ extern unsigned int da850_max_speed;
 #define DA8XX_AEMIF_CS2_BASE    0x60000000
 #define DA8XX_AEMIF_CS3_BASE    0x62000000
 #define DA8XX_AEMIF_CTL_BASE    0x68000000
+#define DA8XX_SHARED_RAM_BASE   0x80000000
 #define DA8XX_ARM_RAM_BASE      0xffff0000
 
 void __init da830_init(void);
@@ -86,6 +88,7 @@ int da8xx_register_watchdog(void);
 int da8xx_register_usb20(unsigned mA, unsigned potpgt);
 int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
 int da8xx_register_emac(void);
+int da8xx_register_uio_pruss(void);
 int da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata);
 int da8xx_register_mmcsd0(struct davinci_mmc_config *config);
 int da850_register_mmcsd1(struct davinci_mmc_config *config);
diff --git a/arch/arm/mach-davinci/include/mach/serial.h b/arch/arm/mach-davinci/include/mach/serial.h
index 46b3cd11c3c2..2d9d921e8b01 100644
--- a/arch/arm/mach-davinci/include/mach/serial.h
+++ b/arch/arm/mach-davinci/include/mach/serial.h
@@ -43,6 +43,7 @@ struct davinci_uart_config {
 };
 
 extern int davinci_serial_init(struct davinci_uart_config *);
+extern int davinci_serial_setup_clk(unsigned instance, unsigned int *rate);
 #endif
 
 #endif /* __ASM_ARCH_SERIAL_H */
diff --git a/arch/arm/mach-davinci/include/mach/sram.h b/arch/arm/mach-davinci/include/mach/sram.h
index 111f7cc71e07..4e5db56218b8 100644
--- a/arch/arm/mach-davinci/include/mach/sram.h
+++ b/arch/arm/mach-davinci/include/mach/sram.h
@@ -24,4 +24,7 @@
 extern void *sram_alloc(size_t len, dma_addr_t *dma);
 extern void sram_free(void *addr, size_t len);
 
+/* Get the struct gen_pool * for use in platform data */
+extern struct gen_pool *sram_get_gen_pool(void);
+
 #endif /* __MACH_SRAM_H */
diff --git a/arch/arm/mach-davinci/serial.c b/arch/arm/mach-davinci/serial.c
index 1875740fe27c..f2625814c3c9 100644
--- a/arch/arm/mach-davinci/serial.c
+++ b/arch/arm/mach-davinci/serial.c
@@ -70,11 +70,33 @@ static void __init davinci_serial_reset(struct plat_serial8250_port *p)
                                  UART_DM646X_SCR_TX_WATERMARK);
 }
 
-int __init davinci_serial_init(struct davinci_uart_config *info)
+/* Enable UART clock and obtain its rate */
+int __init davinci_serial_setup_clk(unsigned instance, unsigned int *rate)
 {
-        int i;
         char name[16];
-        struct clk *uart_clk;
+        struct clk *clk;
+        struct davinci_soc_info *soc_info = &davinci_soc_info;
+        struct device *dev = &soc_info->serial_dev->dev;
+
+        sprintf(name, "uart%d", instance);
+        clk = clk_get(dev, name);
+        if (IS_ERR(clk)) {
+                pr_err("%s:%d: failed to get UART%d clock\n",
+                                        __func__, __LINE__, instance);
+                return PTR_ERR(clk);
+        }
+
+        clk_prepare_enable(clk);
+
+        if (rate)
+                *rate = clk_get_rate(clk);
+
+        return 0;
+}
+
+int __init davinci_serial_init(struct davinci_uart_config *info)
+{
+        int i, ret;
         struct davinci_soc_info *soc_info = &davinci_soc_info;
         struct device *dev = &soc_info->serial_dev->dev;
         struct plat_serial8250_port *p = dev->platform_data;
@@ -87,16 +109,9 @@ int __init davinci_serial_init(struct davinci_uart_config *info)
                 if (!(info->enabled_uarts & (1 << i)))
                         continue;
 
-                sprintf(name, "uart%d", i);
-                uart_clk = clk_get(dev, name);
-                if (IS_ERR(uart_clk)) {
-                        printk(KERN_ERR "%s:%d: failed to get UART%d clock\n",
-                                        __func__, __LINE__, i);
+                ret = davinci_serial_setup_clk(i, &p->uartclk);
+                if (ret)
                         continue;
-                }
-
-                clk_enable(uart_clk);
-                p->uartclk = clk_get_rate(uart_clk);
 
                 if (!p->membase && p->mapbase) {
                         p->membase = ioremap(p->mapbase, SZ_4K);
diff --git a/arch/arm/mach-davinci/sram.c b/arch/arm/mach-davinci/sram.c
index db0f7787faf1..c5f7ee5cc80a 100644
--- a/arch/arm/mach-davinci/sram.c
+++ b/arch/arm/mach-davinci/sram.c
@@ -10,6 +10,7 @@
  */
 #include <linux/module.h>
 #include <linux/init.h>
+#include <linux/io.h>
 #include <linux/genalloc.h>
 
 #include <mach/common.h>
@@ -17,6 +18,11 @@
 
 static struct gen_pool *sram_pool;
 
+struct gen_pool *sram_get_gen_pool(void)
+{
+        return sram_pool;
+}
+
 void *sram_alloc(size_t len, dma_addr_t *dma)
 {
         unsigned long vaddr;
@@ -32,7 +38,7 @@ void *sram_alloc(size_t len, dma_addr_t *dma)
                 return NULL;
 
         if (dma)
-                *dma = dma_base + (vaddr - SRAM_VIRT);
+                *dma = gen_pool_virt_to_phys(sram_pool, vaddr);
         return (void *)vaddr;
 
 }
@@ -53,8 +59,10 @@ EXPORT_SYMBOL(sram_free);
  */
 static int __init sram_init(void)
 {
+        phys_addr_t phys = davinci_soc_info.sram_dma;
         unsigned len = davinci_soc_info.sram_len;
         int status = 0;
+        void *addr;
 
         if (len) {
                 len = min_t(unsigned, len, SRAM_SIZE);
@@ -62,8 +70,17 @@ static int __init sram_init(void)
                 if (!sram_pool)
                         status = -ENOMEM;
         }
-        if (sram_pool)
-                status = gen_pool_add(sram_pool, SRAM_VIRT, len, -1);
+
+        if (sram_pool) {
+                addr = ioremap(phys, len);
+                if (!addr)
+                        return -ENOMEM;
+                status = gen_pool_add_virt(sram_pool, (unsigned)addr,
+                                           phys, len, -1);
+                if (status < 0)
+                        iounmap(addr);
+        }
+
         WARN_ON(status < 0);
         return status;
 }
diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c
index 75da315b6587..9847938785ca 100644
--- a/arch/arm/mach-davinci/time.c
+++ b/arch/arm/mach-davinci/time.c
@@ -379,7 +379,7 @@ static void __init davinci_timer_init(void)
 
         timer_clk = clk_get(NULL, "timer0");
         BUG_ON(IS_ERR(timer_clk));
-        clk_enable(timer_clk);
+        clk_prepare_enable(timer_clk);
 
         /* init timer hw */
         timer_init();
@@ -429,7 +429,7 @@ void davinci_watchdog_reset(struct platform_device *pdev)
         wd_clk = clk_get(&pdev->dev, NULL);
         if (WARN_ON(IS_ERR(wd_clk)))
                 return;
-        clk_enable(wd_clk);
+        clk_prepare_enable(wd_clk);
 
         /* disable, internal clock source */
         __raw_writel(0, base + TCR);
diff --git a/arch/arm/mach-davinci/usb.c b/arch/arm/mach-davinci/usb.c
index f77b95336e2b..34509ffba221 100644
--- a/arch/arm/mach-davinci/usb.c
+++ b/arch/arm/mach-davinci/usb.c
@@ -42,14 +42,8 @@ static struct musb_hdrc_config musb_config = {
 };
 
 static struct musb_hdrc_platform_data usb_data = {
-#if defined(CONFIG_USB_MUSB_OTG)
         /* OTG requires a Mini-AB connector */
         .mode           = MUSB_OTG,
-#elif defined(CONFIG_USB_MUSB_PERIPHERAL)
-        .mode           = MUSB_PERIPHERAL,
-#elif defined(CONFIG_USB_MUSB_HOST)
-        .mode           = MUSB_HOST,
-#endif
         .clock          = "usb",
         .config         = &musb_config,
 };
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index da55107033dd..bb3b09aa9183 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -63,6 +63,7 @@ config SOC_EXYNOS5250
         depends on ARCH_EXYNOS5
         select S5P_PM if PM
         select S5P_SLEEP if PM
+        select S5P_DEV_MFC
         select SAMSUNG_DMADEV
         help
           Enable EXYNOS5250 SoC support
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index 9b58024f7d43..1797dee88a0d 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -53,7 +53,6 @@ obj-$(CONFIG_EXYNOS4_DEV_AHCI)		+= dev-ahci.o
 obj-$(CONFIG_EXYNOS4_DEV_DWMCI)         += dev-dwmci.o
 obj-$(CONFIG_EXYNOS_DEV_DMA)            += dma.o
 obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI)      += dev-ohci.o
-obj-$(CONFIG_EXYNOS_DEV_DRM)            += dev-drm.o
 obj-$(CONFIG_EXYNOS_DEV_SYSMMU)         += dev-sysmmu.o
 
 obj-$(CONFIG_ARCH_EXYNOS)               += setup-i2c0.o
diff --git a/arch/arm/mach-exynos/clock-exynos4.c b/arch/arm/mach-exynos/clock-exynos4.c
index 6a45c9a9abe9..efead60b9436 100644
--- a/arch/arm/mach-exynos/clock-exynos4.c
+++ b/arch/arm/mach-exynos/clock-exynos4.c
@@ -576,6 +576,10 @@ static struct clk exynos4_init_clocks_off[] = {
                 .enable         = exynos4_clk_ip_peril_ctrl,
                 .ctrlbit        = (1 << 15),
         }, {
+                .name           = "tmu_apbif",
+                .enable         = exynos4_clk_ip_perir_ctrl,
+                .ctrlbit        = (1 << 17),
+        }, {
                 .name           = "keypad",
                 .enable         = exynos4_clk_ip_perir_ctrl,
                 .ctrlbit        = (1 << 16),
@@ -613,11 +617,6 @@ static struct clk exynos4_init_clocks_off[] = {
                 .ctrlbit        = (1 << 18),
         }, {
                 .name           = "iis",
-                .devname        = "samsung-i2s.0",
-                .enable         = exynos4_clk_ip_peril_ctrl,
-                .ctrlbit        = (1 << 19),
-        }, {
-                .name           = "iis",
                 .devname        = "samsung-i2s.1",
                 .enable         = exynos4_clk_ip_peril_ctrl,
                 .ctrlbit        = (1 << 20),
diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c
index c44ca1ee1b8d..7652f5d78a56 100644
--- a/arch/arm/mach-exynos/clock-exynos5.c
+++ b/arch/arm/mach-exynos/clock-exynos5.c
@@ -196,6 +196,11 @@ static int exynos5_clk_ip_isp1_ctrl(struct clk *clk, int enable)
         return s5p_gatectrl(EXYNOS5_CLKGATE_IP_ISP1, clk, enable);
 }
 
+static int exynos5_clk_hdmiphy_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(S5P_HDMI_PHY_CONTROL, clk, enable);
+}
+
 /* Core list of CMU_CPU side */
 
 static struct clksrc_clk exynos5_clk_mout_apll = {
@@ -292,7 +297,7 @@ static struct clksrc_sources exynos5_clk_src_mpll = {
         .nr_sources     = ARRAY_SIZE(exynos5_clk_src_mpll_list),
 };
 
-struct clksrc_clk exynos5_clk_mout_mpll = {
+static struct clksrc_clk exynos5_clk_mout_mpll = {
         .clk = {
                 .name           = "mout_mpll",
         },
@@ -467,12 +472,12 @@ static struct clksrc_clk exynos5_clk_pclk_acp = {
 
 /* Core list of CMU_TOP side */
 
-struct clk *exynos5_clkset_aclk_top_list[] = {
+static struct clk *exynos5_clkset_aclk_top_list[] = {
         [0] = &exynos5_clk_mout_mpll_user.clk,
         [1] = &exynos5_clk_mout_bpll_user.clk,
 };
 
-struct clksrc_sources exynos5_clkset_aclk = {
+static struct clksrc_sources exynos5_clkset_aclk = {
         .sources        = exynos5_clkset_aclk_top_list,
         .nr_sources     = ARRAY_SIZE(exynos5_clkset_aclk_top_list),
 };
@@ -486,12 +491,12 @@ static struct clksrc_clk exynos5_clk_aclk_400 = {
         .reg_div = { .reg = EXYNOS5_CLKDIV_TOP0, .shift = 24, .size = 3 },
 };
 
-struct clk *exynos5_clkset_aclk_333_166_list[] = {
+static struct clk *exynos5_clkset_aclk_333_166_list[] = {
         [0] = &exynos5_clk_mout_cpll.clk,
         [1] = &exynos5_clk_mout_mpll_user.clk,
 };
 
-struct clksrc_sources exynos5_clkset_aclk_333_166 = {
+static struct clksrc_sources exynos5_clkset_aclk_333_166 = {
         .sources        = exynos5_clkset_aclk_333_166_list,
         .nr_sources     = ARRAY_SIZE(exynos5_clkset_aclk_333_166_list),
 };
@@ -616,6 +621,11 @@ static struct clk exynos5_init_clocks_off[] = {
                 .enable         = exynos5_clk_ip_peric_ctrl,
                 .ctrlbit        = (1 << 24),
         }, {
+                .name           = "tmu_apbif",
+                .parent         = &exynos5_clk_aclk_66.clk,
+                .enable         = exynos5_clk_ip_peris_ctrl,
+                .ctrlbit        = (1 << 21),
+        }, {
                 .name           = "rtc",
                 .parent         = &exynos5_clk_aclk_66.clk,
                 .enable         = exynos5_clk_ip_peris_ctrl,
@@ -664,17 +674,22 @@ static struct clk exynos5_init_clocks_off[] = {
                 .ctrlbit        = (1 << 25),
         }, {
                 .name           = "mfc",
-                .devname        = "s5p-mfc",
+                .devname        = "s5p-mfc-v6",
                 .enable         = exynos5_clk_ip_mfc_ctrl,
                 .ctrlbit        = (1 << 0),
         }, {
                 .name           = "hdmi",
-                .devname        = "exynos4-hdmi",
+                .devname        = "exynos5-hdmi",
                 .enable         = exynos5_clk_ip_disp1_ctrl,
                 .ctrlbit        = (1 << 6),
         }, {
+                .name           = "hdmiphy",
+                .devname        = "exynos5-hdmi",
+                .enable         = exynos5_clk_hdmiphy_ctrl,
+                .ctrlbit        = (1 << 0),
+        }, {
                 .name           = "mixer",
-                .devname        = "s5p-mixer",
+                .devname        = "exynos5-mixer",
                 .enable         = exynos5_clk_ip_disp1_ctrl,
                 .ctrlbit        = (1 << 5),
         }, {
@@ -966,7 +981,7 @@ static struct clk exynos5_clk_fimd1 = {
         .ctrlbit        = (1 << 0),
 };
 
-struct clk *exynos5_clkset_group_list[] = {
+static struct clk *exynos5_clkset_group_list[] = {
         [0] = &clk_ext_xtal_mux,
         [1] = NULL,
         [2] = &exynos5_clk_sclk_hdmi24m,
@@ -979,7 +994,7 @@ struct clk *exynos5_clkset_group_list[] = {
         [9] = &exynos5_clk_mout_cpll.clk,
 };
 
-struct clksrc_sources exynos5_clkset_group = {
+static struct clksrc_sources exynos5_clkset_group = {
         .sources        = exynos5_clkset_group_list,
         .nr_sources     = ARRAY_SIZE(exynos5_clkset_group_list),
 };
@@ -1195,7 +1210,7 @@ static struct clksrc_clk exynos5_clk_sclk_spi2 = {
         .reg_div = { .reg = EXYNOS5_CLKDIV_PERIC2, .shift = 8, .size = 8 },
 };
 
-struct clksrc_clk exynos5_clk_sclk_fimd1 = {
+static struct clksrc_clk exynos5_clk_sclk_fimd1 = {
         .clk    = {
                 .name           = "sclk_fimd",
                 .devname        = "exynos5-fb.1",
@@ -1476,7 +1491,7 @@ static void exynos5_clock_resume(void)
 #define exynos5_clock_resume NULL
 #endif
 
-struct syscore_ops exynos5_clock_syscore_ops = {
+static struct syscore_ops exynos5_clock_syscore_ops = {
         .suspend        = exynos5_clock_suspend,
         .resume         = exynos5_clock_resume,
 };
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 8dd19c696a60..454bc6ed9a8d 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -63,7 +63,7 @@ static void exynos4_map_io(void);
 static void exynos5_map_io(void);
 static void exynos4_init_clocks(int xtal);
 static void exynos5_init_clocks(int xtal);
-static void exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+static void exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no);
 static int exynos_init(void);
 
 static struct cpu_table cpu_ids[] __initdata = {
@@ -72,7 +72,7 @@ static struct cpu_table cpu_ids[] __initdata = {
                 .idmask         = EXYNOS4_CPU_MASK,
                 .map_io         = exynos4_map_io,
                 .init_clocks    = exynos4_init_clocks,
-                .init_uarts     = exynos_init_uarts,
+                .init_uarts     = exynos4_init_uarts,
                 .init           = exynos_init,
                 .name           = name_exynos4210,
         }, {
@@ -80,7 +80,7 @@ static struct cpu_table cpu_ids[] __initdata = {
                 .idmask         = EXYNOS4_CPU_MASK,
                 .map_io         = exynos4_map_io,
                 .init_clocks    = exynos4_init_clocks,
-                .init_uarts     = exynos_init_uarts,
+                .init_uarts     = exynos4_init_uarts,
                 .init           = exynos_init,
                 .name           = name_exynos4212,
         }, {
@@ -88,7 +88,7 @@ static struct cpu_table cpu_ids[] __initdata = {
                 .idmask         = EXYNOS4_CPU_MASK,
                 .map_io         = exynos4_map_io,
                 .init_clocks    = exynos4_init_clocks,
-                .init_uarts     = exynos_init_uarts,
+                .init_uarts     = exynos4_init_uarts,
                 .init           = exynos_init,
                 .name           = name_exynos4412,
         }, {
@@ -96,7 +96,6 @@ static struct cpu_table cpu_ids[] __initdata = {
                 .idmask         = EXYNOS5_SOC_MASK,
                 .map_io         = exynos5_map_io,
                 .init_clocks    = exynos5_init_clocks,
-                .init_uarts     = exynos_init_uarts,
                 .init           = exynos_init,
                 .name           = name_exynos5250,
         },
@@ -257,25 +256,10 @@ static struct map_desc exynos5_iodesc[] __initdata = {
                 .length         = SZ_64K,
                 .type           = MT_DEVICE,
         }, {
-                .virtual        = (unsigned long)S5P_VA_COMBINER_BASE,
-                .pfn            = __phys_to_pfn(EXYNOS5_PA_COMBINER),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
                 .virtual        = (unsigned long)S3C_VA_UART,
                 .pfn            = __phys_to_pfn(EXYNOS5_PA_UART),
                 .length         = SZ_512K,
                 .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S5P_VA_GIC_CPU,
-                .pfn            = __phys_to_pfn(EXYNOS5_PA_GIC_CPU),
-                .length         = SZ_8K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S5P_VA_GIC_DIST,
-                .pfn            = __phys_to_pfn(EXYNOS5_PA_GIC_DIST),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
         },
 };
 
@@ -354,23 +338,6 @@ static void __init exynos4_map_io(void)
 static void __init exynos5_map_io(void)
 {
         iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc));
-
-        s3c_device_i2c0.resource[0].start = EXYNOS5_PA_IIC(0);
-        s3c_device_i2c0.resource[0].end   = EXYNOS5_PA_IIC(0) + SZ_4K - 1;
-        s3c_device_i2c0.resource[1].start = EXYNOS5_IRQ_IIC;
-        s3c_device_i2c0.resource[1].end   = EXYNOS5_IRQ_IIC;
-
-        s3c_sdhci_setname(0, "exynos4-sdhci");
-        s3c_sdhci_setname(1, "exynos4-sdhci");
-        s3c_sdhci_setname(2, "exynos4-sdhci");
-        s3c_sdhci_setname(3, "exynos4-sdhci");
-
-        /* The I2C bus controllers are directly compatible with s3c2440 */
-        s3c_i2c0_setname("s3c2440-i2c");
-        s3c_i2c1_setname("s3c2440-i2c");
-        s3c_i2c2_setname("s3c2440-i2c");
-
-        s3c64xx_spi_setname("exynos4210-spi");
 }
 
 static void __init exynos4_init_clocks(int xtal)
@@ -589,7 +556,8 @@ static void __init combiner_init(void __iomem *combiner_base,
 }
 
 #ifdef CONFIG_OF
-int __init combiner_of_init(struct device_node *np, struct device_node *parent)
+static int __init combiner_of_init(struct device_node *np,
+                                   struct device_node *parent)
 {
         void __iomem *combiner_base;
 
@@ -729,7 +697,7 @@ static int __init exynos_init(void)
 
 /* uart registration process */
 
-static void __init exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+static void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no)
 {
         struct s3c2410_uartcfg *tcfg = cfg;
         u32 ucnt;
@@ -737,10 +705,7 @@ static void __init exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no)
         for (ucnt = 0; ucnt < no; ucnt++, tcfg++)
                 tcfg->has_fracval = 1;
 
-        if (soc_is_exynos5250())
-                s3c24xx_init_uartdevs("exynos4210-uart", exynos5_uart_resources, cfg, no);
-        else
-                s3c24xx_init_uartdevs("exynos4210-uart", exynos4_uart_resources, cfg, no);
+        s3c24xx_init_uartdevs("exynos4210-uart", exynos4_uart_resources, cfg, no);
 }
 
 static void __iomem *exynos_eint_base;
@@ -972,14 +937,7 @@ static void exynos_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
         struct irq_chip *chip = irq_get_chip(irq);
 
         chained_irq_enter(chip, desc);
-        chip->irq_mask(&desc->irq_data);
-
-        if (chip->irq_ack)
-                chip->irq_ack(&desc->irq_data);
-
         generic_handle_irq(*irq_data);
-
-        chip->irq_unmask(&desc->irq_data);
         chained_irq_exit(chip, desc);
 }
 
@@ -999,11 +957,14 @@ static int __init exynos_init_irq_eint(void)
          * platforms switch over to using the pinctrl driver, the wakeup
          * interrupt support code here can be completely removed.
          */
+        static const struct of_device_id exynos_pinctrl_ids[] = {
+                { .compatible = "samsung,pinctrl-exynos4210", },
+                { .compatible = "samsung,pinctrl-exynos4x12", },
+        };
         struct device_node *pctrl_np, *wkup_np;
-        const char *pctrl_compat = "samsung,pinctrl-exynos4210";
         const char *wkup_compat = "samsung,exynos4210-wakeup-eint";
 
-        for_each_compatible_node(pctrl_np, NULL, pctrl_compat) {
+        for_each_matching_node(pctrl_np, exynos_pinctrl_ids) {
                 if (of_device_is_available(pctrl_np)) {
                         wkup_np = of_find_compatible_node(pctrl_np, NULL,
                                                         wkup_compat);
diff --git a/arch/arm/mach-exynos/dev-audio.c b/arch/arm/mach-exynos/dev-audio.c
index ae321c7cb15f..a1cb42c39590 100644
--- a/arch/arm/mach-exynos/dev-audio.c
+++ b/arch/arm/mach-exynos/dev-audio.c
@@ -14,9 +14,9 @@
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
 #include <linux/gpio.h>
+#include <linux/platform_data/asoc-s3c.h>
 
 #include <plat/gpio-cfg.h>
-#include <linux/platform_data/asoc-s3c.h>
 
 #include <mach/map.h>
 #include <mach/dma.h>
diff --git a/arch/arm/mach-exynos/dev-drm.c b/arch/arm/mach-exynos/dev-drm.c
deleted file mode 100644
index 17c9c6ecc2e0..000000000000
--- a/arch/arm/mach-exynos/dev-drm.c
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * linux/arch/arm/mach-exynos/dev-drm.c
- *
- * Copyright (c) 2012 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * EXYNOS - core DRM device
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#include <linux/kernel.h>
-#include <linux/dma-mapping.h>
-#include <linux/platform_device.h>
-
-#include <plat/devs.h>
-
-static u64 exynos_drm_dma_mask = DMA_BIT_MASK(32);
-
-struct platform_device exynos_device_drm = {
-        .name   = "exynos-drm",
-        .dev    = {
-                .dma_mask               = &exynos_drm_dma_mask,
-                .coherent_dma_mask      = DMA_BIT_MASK(32),
-        }
-};
diff --git a/arch/arm/mach-exynos/dev-ohci.c b/arch/arm/mach-exynos/dev-ohci.c
index 14ed7951a2c6..4244d02dafbd 100644
--- a/arch/arm/mach-exynos/dev-ohci.c
+++ b/arch/arm/mach-exynos/dev-ohci.c
@@ -12,10 +12,10 @@
 
 #include <linux/dma-mapping.h>
 #include <linux/platform_device.h>
+#include <linux/platform_data/usb-exynos.h>
 
 #include <mach/irqs.h>
 #include <mach/map.h>
-#include <linux/platform_data/usb-exynos.h>
 
 #include <plat/devs.h>
 #include <plat/usb-phy.h>
diff --git a/arch/arm/mach-exynos/dev-uart.c b/arch/arm/mach-exynos/dev-uart.c
index 2e85c022fd16..7c42f4b7c8be 100644
--- a/arch/arm/mach-exynos/dev-uart.c
+++ b/arch/arm/mach-exynos/dev-uart.c
@@ -52,27 +52,3 @@ struct s3c24xx_uart_resources exynos4_uart_resources[] __initdata = {
                 .nr_resources   = ARRAY_SIZE(exynos4_uart3_resource),
         },
 };
-
-EXYNOS_UART_RESOURCE(5, 0)
-EXYNOS_UART_RESOURCE(5, 1)
-EXYNOS_UART_RESOURCE(5, 2)
-EXYNOS_UART_RESOURCE(5, 3)
-
-struct s3c24xx_uart_resources exynos5_uart_resources[] __initdata = {
-        [0] = {
-                .resources      = exynos5_uart0_resource,
-                .nr_resources   = ARRAY_SIZE(exynos5_uart0_resource),
-        },
-        [1] = {
-                .resources      = exynos5_uart1_resource,
-                .nr_resources   = ARRAY_SIZE(exynos5_uart0_resource),
-        },
-        [2] = {
-                .resources      = exynos5_uart2_resource,
-                .nr_resources   = ARRAY_SIZE(exynos5_uart2_resource),
-        },
-        [3] = {
-                .resources      = exynos5_uart3_resource,
-                .nr_resources   = ARRAY_SIZE(exynos5_uart3_resource),
-        },
-};
diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c
index 21d568b3b149..87e07d6fc615 100644
--- a/arch/arm/mach-exynos/dma.c
+++ b/arch/arm/mach-exynos/dma.c
@@ -275,6 +275,9 @@ static int __init exynos_dma_init(void)
                 exynos_pdma1_pdata.nr_valid_peri =
                         ARRAY_SIZE(exynos4210_pdma1_peri);
                 exynos_pdma1_pdata.peri_id = exynos4210_pdma1_peri;
+
+                if (samsung_rev() == EXYNOS4210_REV_0)
+                        exynos_mdma1_device.res.start = EXYNOS4_PA_S_MDMA1;
         } else if (soc_is_exynos4212() || soc_is_exynos4412()) {
                 exynos_pdma0_pdata.nr_valid_peri =
                         ARRAY_SIZE(exynos4212_pdma0_peri);
diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h
index 35bced6f9092..5d44616c2014 100644
--- a/arch/arm/mach-exynos/include/mach/irqs.h
+++ b/arch/arm/mach-exynos/include/mach/irqs.h
@@ -136,6 +136,9 @@
 #define EXYNOS4_IRQ_TSI                 IRQ_SPI(115)
 #define EXYNOS4_IRQ_SATA                IRQ_SPI(116)
 
+#define EXYNOS4_IRQ_TMU_TRIG0           COMBINER_IRQ(2, 4)
+#define EXYNOS4_IRQ_TMU_TRIG1           COMBINER_IRQ(3, 4)
+
 #define EXYNOS4_IRQ_SYSMMU_MDMA0_0      COMBINER_IRQ(4, 0)
 #define EXYNOS4_IRQ_SYSMMU_SSS_0        COMBINER_IRQ(4, 1)
 #define EXYNOS4_IRQ_SYSMMU_FIMC0_0      COMBINER_IRQ(4, 2)
@@ -259,11 +262,6 @@
 #define EXYNOS5_IRQ_IEM_IEC             IRQ_SPI(48)
 #define EXYNOS5_IRQ_IEM_APC             IRQ_SPI(49)
 #define EXYNOS5_IRQ_GPIO_C2C            IRQ_SPI(50)
-#define EXYNOS5_IRQ_UART0               IRQ_SPI(51)
-#define EXYNOS5_IRQ_UART1               IRQ_SPI(52)
-#define EXYNOS5_IRQ_UART2               IRQ_SPI(53)
-#define EXYNOS5_IRQ_UART3               IRQ_SPI(54)
-#define EXYNOS5_IRQ_UART4               IRQ_SPI(55)
 #define EXYNOS5_IRQ_IIC                 IRQ_SPI(56)
 #define EXYNOS5_IRQ_IIC1                IRQ_SPI(57)
 #define EXYNOS5_IRQ_IIC2                IRQ_SPI(58)
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index 8480849affb9..9f180aa3a848 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -88,8 +88,11 @@
 #define EXYNOS4_PA_TWD                  0x10500600
 #define EXYNOS4_PA_L2CC                 0x10502000
 
+#define EXYNOS4_PA_TMU                  0x100C0000
+
 #define EXYNOS4_PA_MDMA0                0x10810000
 #define EXYNOS4_PA_MDMA1                0x12850000
+#define EXYNOS4_PA_S_MDMA1              0x12840000
 #define EXYNOS4_PA_PDMA0                0x12680000
 #define EXYNOS4_PA_PDMA1                0x12690000
 #define EXYNOS5_PA_MDMA0                0x10800000
@@ -279,7 +282,6 @@
 #define EXYNOS5_PA_UART1                0x12C10000
 #define EXYNOS5_PA_UART2                0x12C20000
 #define EXYNOS5_PA_UART3                0x12C30000
-#define EXYNOS5_SZ_UART                 SZ_256
 
 #define S3C_VA_UARTx(x)                 (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
 
diff --git a/arch/arm/mach-exynos/include/mach/regs-pmu.h b/arch/arm/mach-exynos/include/mach/regs-pmu.h
index d4e392b811a3..70b2795f5283 100644
--- a/arch/arm/mach-exynos/include/mach/regs-pmu.h
+++ b/arch/arm/mach-exynos/include/mach/regs-pmu.h
@@ -230,8 +230,6 @@
 
 /* For EXYNOS5 */
 
-#define EXYNOS5_USB_CFG                                         S5P_PMUREG(0x0230)
-
 #define EXYNOS5_AUTO_WDTRESET_DISABLE                           S5P_PMUREG(0x0408)
 #define EXYNOS5_MASK_WDTRESET_REQUEST                           S5P_PMUREG(0x040C)
 
diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c b/arch/arm/mach-exynos/mach-exynos4-dt.c
index eadf4b59e7d2..8858068d2b6a 100644
--- a/arch/arm/mach-exynos/mach-exynos4-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos4-dt.c
@@ -77,6 +77,8 @@ static const struct of_dev_auxdata exynos4_auxdata_lookup[] __initconst = {
                                 "exynos4210-spi.2", NULL),
         OF_DEV_AUXDATA("arm,pl330", EXYNOS4_PA_PDMA0, "dma-pl330.0", NULL),
         OF_DEV_AUXDATA("arm,pl330", EXYNOS4_PA_PDMA1, "dma-pl330.1", NULL),
+        OF_DEV_AUXDATA("samsung,exynos4210-tmu", EXYNOS4_PA_TMU,
+                                "exynos-tmu", NULL),
         {},
 };
 
@@ -94,6 +96,8 @@ static void __init exynos4_dt_machine_init(void)
 
 static char const *exynos4_dt_compat[] __initdata = {
         "samsung,exynos4210",
+        "samsung,exynos4212",
+        "samsung,exynos4412",
         NULL
 };
 
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c
index db1cd8eacf28..25f464cf7979 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -11,6 +11,8 @@
 
 #include <linux/of_platform.h>
 #include <linux/serial_core.h>
+#include <linux/memblock.h>
+#include <linux/of_fdt.h>
 
 #include <asm/mach/arch.h>
 #include <asm/hardware/gic.h>
@@ -18,6 +20,7 @@
 
 #include <plat/cpu.h>
 #include <plat/regs-serial.h>
+#include <plat/mfc.h>
 
 #include "common.h"
 
@@ -47,6 +50,20 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
                                 "s3c2440-i2c.0", NULL),
         OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(1),
                                 "s3c2440-i2c.1", NULL),
+        OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(2),
+                                "s3c2440-i2c.2", NULL),
+        OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(3),
+                                "s3c2440-i2c.3", NULL),
+        OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(4),
+                                "s3c2440-i2c.4", NULL),
+        OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(5),
+                                "s3c2440-i2c.5", NULL),
+        OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(6),
+                                "s3c2440-i2c.6", NULL),
+        OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(7),
+                                "s3c2440-i2c.7", NULL),
+        OF_DEV_AUXDATA("samsung,s3c2440-hdmiphy-i2c", EXYNOS5_PA_IIC(8),
+                                "s3c2440-hdmiphy-i2c", NULL),
         OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI0,
                                 "dw_mmc.0", NULL),
         OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI1,
@@ -61,6 +78,12 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
                                 "exynos4210-spi.1", NULL),
         OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI2,
                                 "exynos4210-spi.2", NULL),
+        OF_DEV_AUXDATA("samsung,exynos5-sata-ahci", 0x122F0000,
+                                "exynos5-sata", NULL),
+        OF_DEV_AUXDATA("samsung,exynos5-sata-phy", 0x12170000,
+                                "exynos5-sata-phy", NULL),
+        OF_DEV_AUXDATA("samsung,exynos5-sata-phy-i2c", 0x121D0000,
+                                "exynos5-sata-phy-i2c", NULL),
         OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA0, "dma-pl330.0", NULL),
         OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.1", NULL),
         OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_MDMA1, "dma-pl330.2", NULL),
@@ -72,6 +95,13 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
                                 "exynos-gsc.2", NULL),
         OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC3,
                                 "exynos-gsc.3", NULL),
+        OF_DEV_AUXDATA("samsung,exynos5-hdmi", 0x14530000,
+                                "exynos5-hdmi", NULL),
+        OF_DEV_AUXDATA("samsung,exynos5-mixer", 0x14450000,
+                                "exynos5-mixer", NULL),
+        OF_DEV_AUXDATA("samsung,mfc-v6", 0x11000000, "s5p-mfc-v6", NULL),
+        OF_DEV_AUXDATA("samsung,exynos5250-tmu", 0x10060000,
+                                "exynos-tmu", NULL),
         {},
 };
 
@@ -92,6 +122,17 @@ static char const *exynos5250_dt_compat[] __initdata = {
         NULL
 };
 
+static void __init exynos5_reserve(void)
+{
+        struct s5p_mfc_dt_meminfo mfc_mem;
+
+        /* Reserve memory for MFC only if it's available */
+        mfc_mem.compatible = "samsung,mfc-v6";
+        if (of_scan_flat_dt(s5p_fdt_find_mfc_mem, &mfc_mem))
+                s5p_mfc_reserve_mem(mfc_mem.roff, mfc_mem.rsize, mfc_mem.loff,
+                                mfc_mem.lsize);
+}
+
 DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)")
         /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
         .init_irq       = exynos5_init_irq,
@@ -103,4 +144,5 @@ DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)")
         .timer          = &exynos4_timer,
         .dt_compat      = exynos5250_dt_compat,
         .restart        = exynos5_restart,
+        .reserve        = exynos5_reserve,
 MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index c05d7aa84031..27d4ed8b116e 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -25,7 +25,10 @@
 #include <linux/mmc/host.h>
 #include <linux/fb.h>
 #include <linux/pwm_backlight.h>
+#include <linux/platform_data/i2c-s3c2410.h>
+#include <linux/platform_data/mipi-csis.h>
 #include <linux/platform_data/s3c-hsotg.h>
+#include <linux/platform_data/usb-ehci-s5p.h>
 #include <drm/exynos_drm.h>
 
 #include <video/platform_lcd.h>
@@ -45,14 +48,11 @@
 #include <plat/devs.h>
 #include <plat/fb.h>
 #include <plat/sdhci.h>
-#include <linux/platform_data/usb-ehci-s5p.h>
 #include <plat/clock.h>
 #include <plat/gpio-cfg.h>
-#include <linux/platform_data/i2c-s3c2410.h>
 #include <plat/mfc.h>
 #include <plat/fimc-core.h>
 #include <plat/camport.h>
-#include <linux/platform_data/mipi-csis.h>
 
 #include <mach/map.h>
 
@@ -113,7 +113,6 @@ static struct s3c_sdhci_platdata nuri_hsmmc0_data __initdata = {
         .host_caps              = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
                                 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
                                 MMC_CAP_ERASE),
-        .host_caps2             = MMC_CAP2_BROKEN_VOLTAGE,
         .cd_type                = S3C_SDHCI_CD_PERMANENT,
 };
 
@@ -1327,9 +1326,6 @@ static struct platform_device *nuri_devices[] __initdata = {
         &cam_vdda_fixed_rdev,
         &cam_8m_12v_fixed_rdev,
         &exynos4_bus_devfreq,
-#ifdef CONFIG_DRM_EXYNOS
-        &exynos_device_drm,
-#endif
 };
 
 static void __init nuri_map_io(void)
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c
index 9adf491674ea..c931ce15a966 100644
--- a/arch/arm/mach-exynos/mach-origen.c
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -23,7 +23,10 @@
 #include <linux/mfd/max8997.h>
 #include <linux/lcd.h>
 #include <linux/rfkill-gpio.h>
+#include <linux/platform_data/i2c-s3c2410.h>
 #include <linux/platform_data/s3c-hsotg.h>
+#include <linux/platform_data/usb-ehci-s5p.h>
+#include <linux/platform_data/usb-exynos.h>
 
 #include <asm/mach/arch.h>
 #include <asm/hardware/gic.h>
@@ -36,8 +39,6 @@
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/sdhci.h>
-#include <linux/platform_data/i2c-s3c2410.h>
-#include <linux/platform_data/usb-ehci-s5p.h>
 #include <plat/clock.h>
 #include <plat/gpio-cfg.h>
 #include <plat/backlight.h>
@@ -45,7 +46,6 @@
 #include <plat/mfc.h>
 #include <plat/hdmi.h>
 
-#include <linux/platform_data/usb-exynos.h>
 #include <mach/map.h>
 
 #include <drm/exynos_drm.h>
@@ -709,9 +709,6 @@ static struct platform_device *origen_devices[] __initdata = {
         &s5p_device_mfc_l,
         &s5p_device_mfc_r,
         &s5p_device_mixer,
-#ifdef CONFIG_DRM_EXYNOS
-        &exynos_device_drm,
-#endif
         &exynos4_device_ohci,
         &origen_device_gpiokeys,
         &origen_lcd_hv070wsa,
diff --git a/arch/arm/mach-exynos/mach-smdk4x12.c b/arch/arm/mach-exynos/mach-smdk4x12.c
index 730f1ac65928..a1555a73c7af 100644
--- a/arch/arm/mach-exynos/mach-smdk4x12.c
+++ b/arch/arm/mach-exynos/mach-smdk4x12.c
@@ -21,6 +21,7 @@
 #include <linux/pwm_backlight.h>
 #include <linux/regulator/machine.h>
 #include <linux/serial_core.h>
+#include <linux/platform_data/i2c-s3c2410.h>
 #include <linux/platform_data/s3c-hsotg.h>
 
 #include <asm/mach/arch.h>
@@ -34,7 +35,6 @@
 #include <plat/devs.h>
 #include <plat/fb.h>
 #include <plat/gpio-cfg.h>
-#include <linux/platform_data/i2c-s3c2410.h>
 #include <plat/keypad.h>
 #include <plat/mfc.h>
 #include <plat/regs-serial.h>
@@ -317,9 +317,6 @@ static struct platform_device *smdk4x12_devices[] __initdata = {
         &s5p_device_mfc,
         &s5p_device_mfc_l,
         &s5p_device_mfc_r,
-#ifdef CONFIG_DRM_EXYNOS
-        &exynos_device_drm,
-#endif
         &samsung_device_keypad,
 };
 
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c
index ee4fb1a9cb72..063cb94b934d 100644
--- a/arch/arm/mach-exynos/mach-smdkv310.c
+++ b/arch/arm/mach-exynos/mach-smdkv310.c
@@ -20,7 +20,10 @@
 #include <linux/input.h>
 #include <linux/pwm.h>
 #include <linux/pwm_backlight.h>
+#include <linux/platform_data/i2c-s3c2410.h>
 #include <linux/platform_data/s3c-hsotg.h>
+#include <linux/platform_data/usb-ehci-s5p.h>
+#include <linux/platform_data/usb-exynos.h>
 
 #include <asm/mach/arch.h>
 #include <asm/hardware/gic.h>
@@ -35,16 +38,13 @@
 #include <plat/fb.h>
 #include <plat/keypad.h>
 #include <plat/sdhci.h>
-#include <linux/platform_data/i2c-s3c2410.h>
 #include <plat/gpio-cfg.h>
 #include <plat/backlight.h>
 #include <plat/mfc.h>
-#include <linux/platform_data/usb-ehci-s5p.h>
 #include <plat/clock.h>
 #include <plat/hdmi.h>
 
 #include <mach/map.h>
-#include <linux/platform_data/usb-exynos.h>
 
 #include <drm/exynos_drm.h>
 #include "common.h"
@@ -300,9 +300,6 @@ static struct platform_device *smdkv310_devices[] __initdata = {
         &s5p_device_fimc_md,
         &s5p_device_g2d,
         &s5p_device_jpeg,
-#ifdef CONFIG_DRM_EXYNOS
-        &exynos_device_drm,
-#endif
         &exynos4_device_ac97,
         &exynos4_device_i2s0,
         &exynos4_device_ohci,
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index ebc9dd339a38..9e3340f18950 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -23,6 +23,8 @@
 #include <linux/i2c-gpio.h>
 #include <linux/i2c/mcs.h>
 #include <linux/i2c/atmel_mxt_ts.h>
+#include <linux/platform_data/i2c-s3c2410.h>
+#include <linux/platform_data/mipi-csis.h>
 #include <linux/platform_data/s3c-hsotg.h>
 #include <drm/exynos_drm.h>
 
@@ -35,7 +37,6 @@
 #include <plat/clock.h>
 #include <plat/cpu.h>
 #include <plat/devs.h>
-#include <linux/platform_data/i2c-s3c2410.h>
 #include <plat/gpio-cfg.h>
 #include <plat/fb.h>
 #include <plat/mfc.h>
@@ -43,7 +44,6 @@
 #include <plat/fimc-core.h>
 #include <plat/s5p-time.h>
 #include <plat/camport.h>
-#include <linux/platform_data/mipi-csis.h>
 
 #include <mach/map.h>
 
@@ -754,7 +754,6 @@ static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
         .max_width              = 8,
         .host_caps              = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
                                 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
-        .host_caps2             = MMC_CAP2_BROKEN_VOLTAGE,
         .cd_type                = S3C_SDHCI_CD_PERMANENT,
 };
 
@@ -1081,9 +1080,6 @@ static struct platform_device *universal_devices[] __initdata = {
         &s5p_device_onenand,
         &s5p_device_fimd0,
         &s5p_device_jpeg,
-#ifdef CONFIG_DRM_EXYNOS
-        &exynos_device_drm,
-#endif
         &s3c_device_usb_hsotg,
         &s5p_device_mfc,
         &s5p_device_mfc_l,
diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c
index c0bc83a7663e..9f1351de52f7 100644
--- a/arch/arm/mach-exynos/pm_domains.c
+++ b/arch/arm/mach-exynos/pm_domains.c
@@ -19,6 +19,8 @@
 #include <linux/pm_domain.h>
 #include <linux/delay.h>
 #include <linux/of_address.h>
+#include <linux/of_platform.h>
+#include <linux/sched.h>
 
 #include <mach/regs-pmu.h>
 #include <plat/devs.h>
@@ -83,12 +85,88 @@ static struct exynos_pm_domain PD = {			\
 }
 
 #ifdef CONFIG_OF
+static void exynos_add_device_to_domain(struct exynos_pm_domain *pd,
+                                         struct device *dev)
+{
+        int ret;
+
+        dev_dbg(dev, "adding to power domain %s\n", pd->pd.name);
+
+        while (1) {
+                ret = pm_genpd_add_device(&pd->pd, dev);
+                if (ret != -EAGAIN)
+                        break;
+                cond_resched();
+        }
+
+        pm_genpd_dev_need_restore(dev, true);
+}
+
+static void exynos_remove_device_from_domain(struct device *dev)
+{
+        struct generic_pm_domain *genpd = dev_to_genpd(dev);
+        int ret;
+
+        dev_dbg(dev, "removing from power domain %s\n", genpd->name);
+
+        while (1) {
+                ret = pm_genpd_remove_device(genpd, dev);
+                if (ret != -EAGAIN)
+                        break;
+                cond_resched();
+        }
+}
+
+static void exynos_read_domain_from_dt(struct device *dev)
+{
+        struct platform_device *pd_pdev;
+        struct exynos_pm_domain *pd;
+        struct device_node *node;
+
+        node = of_parse_phandle(dev->of_node, "samsung,power-domain", 0);
+        if (!node)
+                return;
+        pd_pdev = of_find_device_by_node(node);
+        if (!pd_pdev)
+                return;
+        pd = platform_get_drvdata(pd_pdev);
+        exynos_add_device_to_domain(pd, dev);
+}
+
+static int exynos_pm_notifier_call(struct notifier_block *nb,
+                                    unsigned long event, void *data)
+{
+        struct device *dev = data;
+
+        switch (event) {
+        case BUS_NOTIFY_BIND_DRIVER:
+                if (dev->of_node)
+                        exynos_read_domain_from_dt(dev);
+
+                break;
+
+        case BUS_NOTIFY_UNBOUND_DRIVER:
+                exynos_remove_device_from_domain(dev);
+
+                break;
+        }
+        return NOTIFY_DONE;
+}
+
+static struct notifier_block platform_nb = {
+        .notifier_call = exynos_pm_notifier_call,
+};
+
 static __init int exynos_pm_dt_parse_domains(void)
 {
+        struct platform_device *pdev;
         struct device_node *np;
 
         for_each_compatible_node(np, NULL, "samsung,exynos4210-pd") {
                 struct exynos_pm_domain *pd;
+                int on;
+
+                pdev = of_find_device_by_node(np);
 
                 pd = kzalloc(sizeof(*pd), GFP_KERNEL);
                 if (!pd) {
@@ -97,15 +175,22 @@ static __init int exynos_pm_dt_parse_domains(void)
                         return -ENOMEM;
                 }
 
-                if (of_get_property(np, "samsung,exynos4210-pd-off", NULL))
-                        pd->is_off = true;
-                pd->name = np->name;
+                pd->pd.name = kstrdup(np->name, GFP_KERNEL);
+                pd->name = pd->pd.name;
                 pd->base = of_iomap(np, 0);
                 pd->pd.power_off = exynos_pd_power_off;
                 pd->pd.power_on = exynos_pd_power_on;
                 pd->pd.of_node = np;
-                pm_genpd_init(&pd->pd, NULL, false);
+
+                platform_set_drvdata(pdev, pd);
+
+                on = __raw_readl(pd->base + 0x4) & S5P_INT_LOCAL_PWR_EN;
+
+                pm_genpd_init(&pd->pd, NULL, !on);
         }
+
+        bus_register_notifier(&platform_bus_type, &platform_nb);
+
         return 0;
 }
 #else
diff --git a/arch/arm/plat-mxc/3ds_debugboard.c b/arch/arm/mach-imx/3ds_debugboard.c
index 5c10ad05df74..134377352966 100644
--- a/arch/arm/plat-mxc/3ds_debugboard.c
+++ b/arch/arm/mach-imx/3ds_debugboard.c
@@ -21,7 +21,7 @@
 #include <linux/regulator/machine.h>
 #include <linux/regulator/fixed.h>
 
-#include <mach/hardware.h>
+#include "hardware.h"
 
 /* LAN9217 ethernet base address */
 #define LAN9217_BASE_ADDR(n)    (n + 0x0)
diff --git a/arch/arm/plat-mxc/include/mach/3ds_debugboard.h b/arch/arm/mach-imx/3ds_debugboard.h
index 9fd6cb3f8fad..9fd6cb3f8fad 100644
--- a/arch/arm/plat-mxc/include/mach/3ds_debugboard.h
+++ b/arch/arm/mach-imx/3ds_debugboard.h
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 8d276584650e..b09924112f99 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -1,3 +1,70 @@
+config ARCH_MXC
+        bool "Freescale i.MX family" if ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7
+        select ARCH_REQUIRE_GPIOLIB
+        select ARM_PATCH_PHYS_VIRT
+        select AUTO_ZRELADDR if !ZBOOT_ROM
+        select CLKDEV_LOOKUP
+        select CLKSRC_MMIO
+        select GENERIC_CLOCKEVENTS
+        select GENERIC_IRQ_CHIP
+        select MULTI_IRQ_HANDLER
+        select SPARSE_IRQ
+        select USE_OF
+        help
+          Support for Freescale MXC/iMX-based family of processors
+
+menu "Freescale i.MX support"
+        depends on ARCH_MXC
+
+config MXC_IRQ_PRIOR
+        bool "Use IRQ priority"
+        help
+          Select this if you want to use prioritized IRQ handling.
+          This feature prevents higher priority ISR to be interrupted
+          by lower priority IRQ even IRQF_DISABLED flag is not set.
+          This may be useful in embedded applications, where are strong
+          requirements for timing.
+          Say N here, unless you have a specialized requirement.
+
+config MXC_TZIC
+        bool
+
+config MXC_AVIC
+        bool
+
+config MXC_DEBUG_BOARD
+        bool "Enable MXC debug board(for 3-stack)"
+        help
+          The debug board is an integral part of the MXC 3-stack(PDK)
+          platforms, it can be attached or removed from the peripheral
+          board. On debug board, several debug devices(ethernet, UART,
+          buttons, LEDs and JTAG) are implemented. Between the MCU and
+          these devices, a CPLD is added as a bridge which performs
+          data/address de-multiplexing and decode, signal level shift,
+          interrupt control and various board functions.
+
+config HAVE_EPIT
+        bool
+
+config MXC_USE_EPIT
+        bool "Use EPIT instead of GPT"
+        depends on HAVE_EPIT
+        help
+          Use EPIT as the system timer on systems that have it. Normally you
+          don't have a reason to do so as the EPIT has the same features and
+          uses the same clocks as the GPT. Anyway, on some systems the GPT
+          may be in use for other purposes.
+
+config MXC_ULPI
+        bool
+
+config ARCH_HAS_RNGA
+        bool
+
+config IRAM_ALLOC
+        bool
+        select GENERIC_ALLOCATOR
+
 config HAVE_IMX_GPC
         bool
 
@@ -5,6 +72,12 @@ config HAVE_IMX_MMDC
         bool
 
 config HAVE_IMX_SRC
+        def_bool y if SMP
+
+config IMX_HAVE_IOMUX_V1
+        bool
+
+config ARCH_MXC_IOMUX_V3
         bool
 
 config ARCH_MX1
@@ -104,7 +177,7 @@ config	SOC_IMX51
         select PINCTRL_IMX51
         select SOC_IMX5
 
-if ARCH_IMX_V4_V5
+if ARCH_MULTI_V4T
 
 comment "MX1 platforms:"
 config MACH_MXLADS
@@ -133,6 +206,10 @@ config MACH_APF9328
         help
           Say Yes here if you are using the Armadeus APF9328 development board
 
+endif
+
+if ARCH_MULTI_V5
+
 comment "MX21 platforms:"
 
 config MACH_MX21ADS
@@ -195,6 +272,13 @@ config MACH_EUKREA_MBIMXSD25_BASEBOARD
 
 endchoice
 
+config MACH_IMX25_DT
+        bool "Support i.MX25 platforms from device tree"
+        select SOC_IMX25
+        help
+          Include support for Freescale i.MX25 based platforms
+          using the device tree for discovery
+
 comment "MX27 platforms:"
 
 config MACH_MX27ADS
@@ -384,7 +468,7 @@ config MACH_IMX27_DT
 
 endif
 
-if ARCH_IMX_V6_V7
+if ARCH_MULTI_V6
 
 comment "MX31 platforms:"
 
@@ -649,6 +733,10 @@ config MACH_VPR200
           Include support for VPR200 platform. This includes specific
           configurations for the board and its peripherals.
 
+endif
+
+if ARCH_MULTI_V7
+
 comment "i.MX5 platforms:"
 
 config MACH_MX50_RDP
@@ -748,7 +836,14 @@ config	SOC_IMX53
 
 config SOC_IMX6Q
         bool "i.MX6 Quad support"
+        select ARCH_HAS_CPUFREQ
+        select ARCH_HAS_OPP
         select ARM_CPU_SUSPEND if PM
+        select ARM_ERRATA_743622
+        select ARM_ERRATA_751472
+        select ARM_ERRATA_754322
+        select ARM_ERRATA_764369 if SMP
+        select ARM_ERRATA_775420
         select ARM_GIC
         select COMMON_CLK
         select CPU_V7
@@ -756,13 +851,20 @@ config SOC_IMX6Q
         select HAVE_CAN_FLEXCAN if CAN
         select HAVE_IMX_GPC
         select HAVE_IMX_MMDC
-        select HAVE_IMX_SRC
         select HAVE_SMP
         select MFD_SYSCON
         select PINCTRL
         select PINCTRL_IMX6Q
+        select PL310_ERRATA_588369 if CACHE_PL310
+        select PL310_ERRATA_727915 if CACHE_PL310
+        select PL310_ERRATA_769419 if CACHE_PL310
+        select PM_OPP if PM
 
         help
           This enables support for Freescale i.MX6 Quad processor.
 
 endif
+
+source "arch/arm/mach-imx/devices/Kconfig"
+
+endmenu
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 895754aeb4f3..0634b3152c24 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -1,3 +1,5 @@
+obj-y := time.o cpu.o system.o irq-common.o
+
 obj-$(CONFIG_SOC_IMX1) += clk-imx1.o mm-imx1.o
 obj-$(CONFIG_SOC_IMX21) += clk-imx21.o mm-imx21.o
 
@@ -15,6 +17,24 @@ obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clk-imx51-imx53.o ehci-imx5.o $(i
 obj-$(CONFIG_COMMON_CLK) += clk-pllv1.o clk-pllv2.o clk-pllv3.o clk-gate2.o \
                             clk-pfd.o clk-busy.o clk.o
 
+obj-$(CONFIG_IMX_HAVE_IOMUX_V1) += iomux-v1.o
+obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o
+
+obj-$(CONFIG_MXC_TZIC) += tzic.o
+obj-$(CONFIG_MXC_AVIC) += avic.o
+
+obj-$(CONFIG_IRAM_ALLOC) += iram_alloc.o
+obj-$(CONFIG_MXC_ULPI) += ulpi.o
+obj-$(CONFIG_MXC_USE_EPIT) += epit.o
+obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o
+obj-$(CONFIG_CPU_FREQ_IMX)    += cpufreq.o
+obj-$(CONFIG_CPU_IDLE) += cpuidle.o
+
+ifdef CONFIG_SND_IMX_SOC
+obj-y += ssi-fiq.o
+obj-y += ssi-fiq-ksym.o
+endif
+
 # Support for CMOS sensor interface
 obj-$(CONFIG_MX1_VIDEO) += mx1-camera-fiq.o mx1-camera-fiq-ksym.o
 
@@ -30,6 +50,7 @@ obj-$(CONFIG_MACH_MX21ADS) += mach-mx21ads.o
 obj-$(CONFIG_MACH_MX25_3DS) += mach-mx25_3ds.o
 obj-$(CONFIG_MACH_EUKREA_CPUIMX25SD) += mach-eukrea_cpuimx25.o
 obj-$(CONFIG_MACH_EUKREA_MBIMXSD25_BASEBOARD) += eukrea_mbimxsd25-baseboard.o
+obj-$(CONFIG_MACH_IMX25_DT) += imx25-dt.o
 
 # i.MX27 based machines
 obj-$(CONFIG_MACH_MX27ADS) += mach-mx27ads.o
@@ -89,3 +110,5 @@ obj-$(CONFIG_MACH_MX50_RDP) += mach-mx50_rdp.o
 
 obj-$(CONFIG_MACH_IMX51_DT) += imx51-dt.o
 obj-$(CONFIG_SOC_IMX53) += mach-imx53.o
+
+obj-y += devices/
diff --git a/arch/arm/plat-mxc/avic.c b/arch/arm/mach-imx/avic.c
index cbd55c36def3..0eff23ed92b9 100644
--- a/arch/arm/plat-mxc/avic.c
+++ b/arch/arm/mach-imx/avic.c
@@ -22,12 +22,11 @@
 #include <linux/irqdomain.h>
 #include <linux/io.h>
 #include <linux/of.h>
-#include <mach/common.h>
 #include <asm/mach/irq.h>
 #include <asm/exception.h>
-#include <mach/hardware.h>
-#include <mach/irqs.h>
 
+#include "common.h"
+#include "hardware.h"
 #include "irq-common.h"
 
 #define AVIC_INTCNTL            0x00    /* int control reg */
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31lilly.h b/arch/arm/mach-imx/board-mx31lilly.h
index 0df71bfefbb1..0df71bfefbb1 100644
--- a/arch/arm/plat-mxc/include/mach/board-mx31lilly.h
+++ b/arch/arm/mach-imx/board-mx31lilly.h
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31lite.h b/arch/arm/mach-imx/board-mx31lite.h
index c1ad0ae807cc..c1ad0ae807cc 100644
--- a/arch/arm/plat-mxc/include/mach/board-mx31lite.h
+++ b/arch/arm/mach-imx/board-mx31lite.h
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31moboard.h b/arch/arm/mach-imx/board-mx31moboard.h
index de14543891cf..de14543891cf 100644
--- a/arch/arm/plat-mxc/include/mach/board-mx31moboard.h
+++ b/arch/arm/mach-imx/board-mx31moboard.h
diff --git a/arch/arm/plat-mxc/include/mach/board-pcm038.h b/arch/arm/mach-imx/board-pcm038.h
index 6f371e35753d..6f371e35753d 100644
--- a/arch/arm/plat-mxc/include/mach/board-pcm038.h
+++ b/arch/arm/mach-imx/board-pcm038.h
diff --git a/arch/arm/mach-imx/clk-imx1.c b/arch/arm/mach-imx/clk-imx1.c
index 516ddee1948e..15f9d223cf0b 100644
--- a/arch/arm/mach-imx/clk-imx1.c
+++ b/arch/arm/mach-imx/clk-imx1.c
@@ -22,9 +22,9 @@
 #include <linux/clkdev.h>
 #include <linux/err.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
 #include "clk.h"
+#include "common.h"
+#include "hardware.h"
 
 /* CCM register addresses */
 #define IO_ADDR_CCM(off)        (MX1_IO_ADDRESS(MX1_CCM_BASE_ADDR + (off)))
@@ -82,7 +82,8 @@ int __init mx1_clocks_init(unsigned long fref)
                         pr_err("imx1 clk %d: register failed with %ld\n",
                                 i, PTR_ERR(clk[i]));
 
-        clk_register_clkdev(clk[dma_gate], "ahb", "imx-dma");
+        clk_register_clkdev(clk[dma_gate], "ahb", "imx1-dma");
+        clk_register_clkdev(clk[hclk], "ipg", "imx1-dma");
         clk_register_clkdev(clk[csi_gate], NULL, "mx1-camera.0");
         clk_register_clkdev(clk[mma_gate], "mma", NULL);
         clk_register_clkdev(clk[usbd_gate], NULL, "imx_udc.0");
@@ -94,18 +95,18 @@ int __init mx1_clocks_init(unsigned long fref)
         clk_register_clkdev(clk[hclk], "ipg", "imx1-uart.1");
         clk_register_clkdev(clk[per1], "per", "imx1-uart.2");
         clk_register_clkdev(clk[hclk], "ipg", "imx1-uart.2");
-        clk_register_clkdev(clk[hclk], NULL, "imx-i2c.0");
+        clk_register_clkdev(clk[hclk], NULL, "imx1-i2c.0");
         clk_register_clkdev(clk[per2], "per", "imx1-cspi.0");
         clk_register_clkdev(clk[dummy], "ipg", "imx1-cspi.0");
         clk_register_clkdev(clk[per2], "per", "imx1-cspi.1");
         clk_register_clkdev(clk[dummy], "ipg", "imx1-cspi.1");
         clk_register_clkdev(clk[per2], NULL, "imx-mmc.0");
-        clk_register_clkdev(clk[per2], "per", "imx-fb.0");
-        clk_register_clkdev(clk[dummy], "ipg", "imx-fb.0");
-        clk_register_clkdev(clk[dummy], "ahb", "imx-fb.0");
+        clk_register_clkdev(clk[per2], "per", "imx1-fb.0");
+        clk_register_clkdev(clk[dummy], "ipg", "imx1-fb.0");
+        clk_register_clkdev(clk[dummy], "ahb", "imx1-fb.0");
         clk_register_clkdev(clk[hclk], "mshc", NULL);
         clk_register_clkdev(clk[per3], "ssi", NULL);
-        clk_register_clkdev(clk[clk32], NULL, "mxc_rtc.0");
+        clk_register_clkdev(clk[clk32], NULL, "imx1-rtc.0");
         clk_register_clkdev(clk[clko], "clko", NULL);
 
         mxc_timer_init(MX1_IO_ADDRESS(MX1_TIM1_BASE_ADDR), MX1_TIM1_INT);
diff --git a/arch/arm/mach-imx/clk-imx21.c b/arch/arm/mach-imx/clk-imx21.c
index cf65148bc519..d7ed66091a2a 100644
--- a/arch/arm/mach-imx/clk-imx21.c
+++ b/arch/arm/mach-imx/clk-imx21.c
@@ -25,9 +25,9 @@
 #include <linux/module.h>
 #include <linux/err.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
 #include "clk.h"
+#include "common.h"
+#include "hardware.h"
 
 #define IO_ADDR_CCM(off)        (MX21_IO_ADDRESS(MX21_CCM_BASE_ADDR + (off)))
 
@@ -156,16 +156,16 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href)
         clk_register_clkdev(clk[cspi2_ipg_gate], "ipg", "imx21-cspi.1");
         clk_register_clkdev(clk[per2], "per", "imx21-cspi.2");
         clk_register_clkdev(clk[cspi3_ipg_gate], "ipg", "imx21-cspi.2");
-        clk_register_clkdev(clk[per3], "per", "imx-fb.0");
-        clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx-fb.0");
-        clk_register_clkdev(clk[lcdc_hclk_gate], "ahb", "imx-fb.0");
+        clk_register_clkdev(clk[per3], "per", "imx21-fb.0");
+        clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx21-fb.0");
+        clk_register_clkdev(clk[lcdc_hclk_gate], "ahb", "imx21-fb.0");
         clk_register_clkdev(clk[usb_gate], "per", "imx21-hcd.0");
         clk_register_clkdev(clk[usb_hclk_gate], "ahb", "imx21-hcd.0");
-        clk_register_clkdev(clk[nfc_gate], NULL, "mxc_nand.0");
-        clk_register_clkdev(clk[dma_hclk_gate], "ahb", "imx-dma");
-        clk_register_clkdev(clk[dma_gate], "ipg", "imx-dma");
+        clk_register_clkdev(clk[nfc_gate], NULL, "imx21-nand.0");
+        clk_register_clkdev(clk[dma_hclk_gate], "ahb", "imx21-dma");
+        clk_register_clkdev(clk[dma_gate], "ipg", "imx21-dma");
         clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0");
-        clk_register_clkdev(clk[i2c_gate], NULL, "imx-i2c.0");
+        clk_register_clkdev(clk[i2c_gate], NULL, "imx21-i2c.0");
         clk_register_clkdev(clk[kpp_gate], NULL, "mxc-keypad");
         clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1.0");
         clk_register_clkdev(clk[brom_gate], "brom", NULL);
diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c
index 01e2f843bf2e..b197aa73dc4b 100644
--- a/arch/arm/mach-imx/clk-imx25.c
+++ b/arch/arm/mach-imx/clk-imx25.c
@@ -23,11 +23,14 @@
 #include <linux/io.h>
 #include <linux/clkdev.h>
 #include <linux/err.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/mx25.h>
 #include "clk.h"
+#include "common.h"
+#include "hardware.h"
+#include "mx25.h"
 
 #define CRM_BASE        MX25_IO_ADDRESS(MX25_CRM_BASE_ADDR)
 
@@ -55,6 +58,8 @@
 
 #define ccm(x)  (CRM_BASE + (x))
 
+static struct clk_onecell_data clk_data;
+
 static const char *cpu_sel_clks[] = { "mpll", "mpll_cpu_3_4", };
 static const char *per_sel_clks[] = { "ahb", "upll", };
 
@@ -64,24 +69,30 @@ enum mx25_clks {
         per7_sel, per8_sel, per9_sel, per10_sel, per11_sel, per12_sel,
         per13_sel, per14_sel, per15_sel, per0, per1, per2, per3, per4, per5,
         per6, per7, per8, per9, per10, per11, per12, per13, per14, per15,
-        csi_ipg_per, esdhc1_ipg_per, esdhc2_ipg_per, gpt_ipg_per, i2c_ipg_per,
-        lcdc_ipg_per, nfc_ipg_per, ssi1_ipg_per, ssi2_ipg_per, uart_ipg_per,
-        csi_ahb, esdhc1_ahb, esdhc2_ahb, fec_ahb, lcdc_ahb, sdma_ahb,
-        usbotg_ahb, can1_ipg, can2_ipg, csi_ipg, cspi1_ipg, cspi2_ipg,
-        cspi3_ipg, dryice_ipg, esdhc1_ipg, esdhc2_ipg, fec_ipg, iim_ipg,
-        kpp_ipg, lcdc_ipg, pwm1_ipg, pwm2_ipg, pwm3_ipg, pwm4_ipg, sdma_ipg,
-        ssi1_ipg, ssi2_ipg, tsc_ipg, uart1_ipg, uart2_ipg, uart3_ipg,
-        uart4_ipg, uart5_ipg, wdt_ipg, clk_max
+        csi_ipg_per, epit_ipg_per, esai_ipg_per, esdhc1_ipg_per, esdhc2_ipg_per,
+        gpt_ipg_per, i2c_ipg_per, lcdc_ipg_per, nfc_ipg_per, owire_ipg_per,
+        pwm_ipg_per, sim1_ipg_per, sim2_ipg_per, ssi1_ipg_per, ssi2_ipg_per,
+        uart_ipg_per, ata_ahb, reserved1, csi_ahb, emi_ahb, esai_ahb, esdhc1_ahb,
+        esdhc2_ahb, fec_ahb, lcdc_ahb, rtic_ahb, sdma_ahb, slcdc_ahb, usbotg_ahb,
+        reserved2, reserved3, reserved4, reserved5, can1_ipg, can2_ipg, csi_ipg,
+        cspi1_ipg, cspi2_ipg, cspi3_ipg, dryice_ipg, ect_ipg, epit1_ipg, epit2_ipg,
+        reserved6, esdhc1_ipg, esdhc2_ipg, fec_ipg, reserved7, reserved8, reserved9,
+        gpt1_ipg, gpt2_ipg, gpt3_ipg, gpt4_ipg, reserved10, reserved11, reserved12,
+        iim_ipg, reserved13, reserved14, kpp_ipg, lcdc_ipg, reserved15, pwm1_ipg,
+        pwm2_ipg, pwm3_ipg, pwm4_ipg, rngb_ipg, reserved16, scc_ipg, sdma_ipg,
+        sim1_ipg, sim2_ipg, slcdc_ipg, spba_ipg, ssi1_ipg, ssi2_ipg, tsc_ipg,
+        uart1_ipg, uart2_ipg, uart3_ipg, uart4_ipg, uart5_ipg, reserved17,
+        wdt_ipg, clk_max
 };
 
 static struct clk *clk[clk_max];
 
-int __init mx25_clocks_init(void)
+static int __init __mx25_clocks_init(unsigned long osc_rate)
 {
         int i;
 
         clk[dummy] = imx_clk_fixed("dummy", 0);
-        clk[osc] = imx_clk_fixed("osc", 24000000);
+        clk[osc] = imx_clk_fixed("osc", osc_rate);
         clk[mpll] = imx_clk_pllv1("mpll", "osc", ccm(CCM_MPCTL));
         clk[upll] = imx_clk_pllv1("upll", "osc", ccm(CCM_UPCTL));
         clk[mpll_cpu_3_4] = imx_clk_fixed_factor("mpll_cpu_3_4", "mpll", 3, 4);
@@ -123,22 +134,36 @@ int __init mx25_clocks_init(void)
         clk[per14] = imx_clk_divider("per14", "per14_sel", ccm(CCM_PCDR3), 16, 6);
         clk[per15] = imx_clk_divider("per15", "per15_sel", ccm(CCM_PCDR3), 24, 6);
         clk[csi_ipg_per] = imx_clk_gate("csi_ipg_per", "per0", ccm(CCM_CGCR0), 0);
+        clk[epit_ipg_per] = imx_clk_gate("epit_ipg_per", "per1", ccm(CCM_CGCR0),  1);
+        clk[esai_ipg_per] = imx_clk_gate("esai_ipg_per", "per2", ccm(CCM_CGCR0),  2);
         clk[esdhc1_ipg_per] = imx_clk_gate("esdhc1_ipg_per", "per3", ccm(CCM_CGCR0),  3);
         clk[esdhc2_ipg_per] = imx_clk_gate("esdhc2_ipg_per", "per4", ccm(CCM_CGCR0),  4);
         clk[gpt_ipg_per] = imx_clk_gate("gpt_ipg_per", "per5", ccm(CCM_CGCR0),  5);
         clk[i2c_ipg_per] = imx_clk_gate("i2c_ipg_per", "per6", ccm(CCM_CGCR0),  6);
         clk[lcdc_ipg_per] = imx_clk_gate("lcdc_ipg_per", "per7", ccm(CCM_CGCR0),  7);
         clk[nfc_ipg_per] = imx_clk_gate("nfc_ipg_per", "per8", ccm(CCM_CGCR0),  8);
+        clk[owire_ipg_per] = imx_clk_gate("owire_ipg_per", "per9", ccm(CCM_CGCR0),  9);
+        clk[pwm_ipg_per] = imx_clk_gate("pwm_ipg_per", "per10", ccm(CCM_CGCR0),  10);
+        clk[sim1_ipg_per] = imx_clk_gate("sim1_ipg_per", "per11", ccm(CCM_CGCR0),  11);
+        clk[sim2_ipg_per] = imx_clk_gate("sim2_ipg_per", "per12", ccm(CCM_CGCR0),  12);
         clk[ssi1_ipg_per] = imx_clk_gate("ssi1_ipg_per", "per13", ccm(CCM_CGCR0), 13);
         clk[ssi2_ipg_per] = imx_clk_gate("ssi2_ipg_per", "per14", ccm(CCM_CGCR0), 14);
         clk[uart_ipg_per] = imx_clk_gate("uart_ipg_per", "per15", ccm(CCM_CGCR0), 15);
+        clk[ata_ahb] = imx_clk_gate("ata_ahb", "ahb", ccm(CCM_CGCR0), 16);
+        /* CCM_CGCR0(17): reserved */
         clk[csi_ahb] = imx_clk_gate("csi_ahb", "ahb", ccm(CCM_CGCR0), 18);
+        clk[emi_ahb] = imx_clk_gate("emi_ahb", "ahb", ccm(CCM_CGCR0), 19);
+        clk[esai_ahb] = imx_clk_gate("esai_ahb", "ahb", ccm(CCM_CGCR0), 20);
         clk[esdhc1_ahb] = imx_clk_gate("esdhc1_ahb", "ahb", ccm(CCM_CGCR0), 21);
         clk[esdhc2_ahb] = imx_clk_gate("esdhc2_ahb", "ahb", ccm(CCM_CGCR0), 22);
         clk[fec_ahb] = imx_clk_gate("fec_ahb", "ahb", ccm(CCM_CGCR0), 23);
         clk[lcdc_ahb] = imx_clk_gate("lcdc_ahb", "ahb", ccm(CCM_CGCR0), 24);
+        clk[rtic_ahb] = imx_clk_gate("rtic_ahb", "ahb", ccm(CCM_CGCR0), 25);
         clk[sdma_ahb] = imx_clk_gate("sdma_ahb", "ahb", ccm(CCM_CGCR0), 26);
+        clk[slcdc_ahb] = imx_clk_gate("slcdc_ahb", "ahb", ccm(CCM_CGCR0), 27);
         clk[usbotg_ahb] = imx_clk_gate("usbotg_ahb", "ahb", ccm(CCM_CGCR0), 28);
+        /* CCM_CGCR0(29-31): reserved */
+        /* CCM_CGCR1(0): reserved in datasheet, used as audmux in FSL kernel */
         clk[can1_ipg] = imx_clk_gate("can1_ipg", "ipg", ccm(CCM_CGCR1),  2);
         clk[can2_ipg] = imx_clk_gate("can2_ipg", "ipg", ccm(CCM_CGCR1),  3);
         clk[csi_ipg] = imx_clk_gate("csi_ipg", "ipg", ccm(CCM_CGCR1),  4);
@@ -146,17 +171,41 @@ int __init mx25_clocks_init(void)
         clk[cspi2_ipg] = imx_clk_gate("cspi2_ipg", "ipg", ccm(CCM_CGCR1),  6);
         clk[cspi3_ipg] = imx_clk_gate("cspi3_ipg", "ipg", ccm(CCM_CGCR1),  7);
         clk[dryice_ipg] = imx_clk_gate("dryice_ipg", "ipg", ccm(CCM_CGCR1),  8);
+        clk[ect_ipg] = imx_clk_gate("ect_ipg", "ipg", ccm(CCM_CGCR1),  9);
+        clk[epit1_ipg] = imx_clk_gate("epit1_ipg", "ipg", ccm(CCM_CGCR1),  10);
+        clk[epit2_ipg] = imx_clk_gate("epit2_ipg", "ipg", ccm(CCM_CGCR1),  11);
+        /* CCM_CGCR1(12): reserved in datasheet, used as esai in FSL kernel */
         clk[esdhc1_ipg] = imx_clk_gate("esdhc1_ipg", "ipg", ccm(CCM_CGCR1), 13);
         clk[esdhc2_ipg] = imx_clk_gate("esdhc2_ipg", "ipg", ccm(CCM_CGCR1), 14);
         clk[fec_ipg] = imx_clk_gate("fec_ipg", "ipg", ccm(CCM_CGCR1), 15);
+        /* CCM_CGCR1(16): reserved in datasheet, used as gpio1 in FSL kernel */
+        /* CCM_CGCR1(17): reserved in datasheet, used as gpio2 in FSL kernel */
+        /* CCM_CGCR1(18): reserved in datasheet, used as gpio3 in FSL kernel */
+        clk[gpt1_ipg] = imx_clk_gate("gpt1_ipg", "ipg", ccm(CCM_CGCR1), 19);
+        clk[gpt2_ipg] = imx_clk_gate("gpt2_ipg", "ipg", ccm(CCM_CGCR1), 20);
+        clk[gpt3_ipg] = imx_clk_gate("gpt3_ipg", "ipg", ccm(CCM_CGCR1), 21);
+        clk[gpt4_ipg] = imx_clk_gate("gpt4_ipg", "ipg", ccm(CCM_CGCR1), 22);
+        /* CCM_CGCR1(23): reserved in datasheet, used as i2c1 in FSL kernel */
+        /* CCM_CGCR1(24): reserved in datasheet, used as i2c2 in FSL kernel */
+        /* CCM_CGCR1(25): reserved in datasheet, used as i2c3 in FSL kernel */
         clk[iim_ipg] = imx_clk_gate("iim_ipg", "ipg", ccm(CCM_CGCR1), 26);
+        /* CCM_CGCR1(27): reserved in datasheet, used as iomuxc in FSL kernel */
+        /* CCM_CGCR1(28): reserved in datasheet, used as kpp in FSL kernel */
         clk[kpp_ipg] = imx_clk_gate("kpp_ipg", "ipg", ccm(CCM_CGCR1), 28);
         clk[lcdc_ipg] = imx_clk_gate("lcdc_ipg", "ipg", ccm(CCM_CGCR1), 29);
+        /* CCM_CGCR1(30): reserved in datasheet, used as owire in FSL kernel */
         clk[pwm1_ipg] = imx_clk_gate("pwm1_ipg", "ipg", ccm(CCM_CGCR1), 31);
         clk[pwm2_ipg] = imx_clk_gate("pwm2_ipg", "ipg", ccm(CCM_CGCR2),  0);
         clk[pwm3_ipg] = imx_clk_gate("pwm3_ipg", "ipg", ccm(CCM_CGCR2),  1);
         clk[pwm4_ipg] = imx_clk_gate("pwm4_ipg", "ipg", ccm(CCM_CGCR2),  2);
+        clk[rngb_ipg] = imx_clk_gate("rngb_ipg", "ipg", ccm(CCM_CGCR2),  3);
+        /* CCM_CGCR2(4): reserved in datasheet, used as rtic in FSL kernel */
+        clk[scc_ipg] = imx_clk_gate("scc_ipg", "ipg", ccm(CCM_CGCR2),  5);
         clk[sdma_ipg] = imx_clk_gate("sdma_ipg", "ipg", ccm(CCM_CGCR2),  6);
+        clk[sim1_ipg] = imx_clk_gate("sim1_ipg", "ipg", ccm(CCM_CGCR2),  7);
+        clk[sim2_ipg] = imx_clk_gate("sim2_ipg", "ipg", ccm(CCM_CGCR2),  8);
+        clk[slcdc_ipg] = imx_clk_gate("slcdc_ipg", "ipg", ccm(CCM_CGCR2),  9);
+        clk[spba_ipg] = imx_clk_gate("spba_ipg", "ipg", ccm(CCM_CGCR2),  10);
         clk[ssi1_ipg] = imx_clk_gate("ssi1_ipg", "ipg", ccm(CCM_CGCR2), 11);
         clk[ssi2_ipg] = imx_clk_gate("ssi2_ipg", "ipg", ccm(CCM_CGCR2), 12);
         clk[tsc_ipg] = imx_clk_gate("tsc_ipg", "ipg", ccm(CCM_CGCR2), 13);
@@ -165,6 +214,7 @@ int __init mx25_clocks_init(void)
         clk[uart3_ipg] = imx_clk_gate("uart3_ipg", "ipg", ccm(CCM_CGCR2), 16);
         clk[uart4_ipg] = imx_clk_gate("uart4_ipg", "ipg", ccm(CCM_CGCR2), 17);
         clk[uart5_ipg] = imx_clk_gate("uart5_ipg", "ipg", ccm(CCM_CGCR2), 18);
+        /* CCM_CGCR2(19): reserved in datasheet, but used as wdt in FSL kernel */
         clk[wdt_ipg] = imx_clk_gate("wdt_ipg", "ipg", ccm(CCM_CGCR2), 19);
 
         for (i = 0; i < ARRAY_SIZE(clk); i++)
@@ -172,6 +222,18 @@ int __init mx25_clocks_init(void)
                         pr_err("i.MX25 clk %d: register failed with %ld\n",
                                 i, PTR_ERR(clk[i]));
 
+        clk_prepare_enable(clk[emi_ahb]);
+
+        clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0");
+        clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0");
+
+        return 0;
+}
+
+int __init mx25_clocks_init(void)
+{
+        __mx25_clocks_init(24000000);
+
         /* i.mx25 has the i.mx21 type uart */
         clk_register_clkdev(clk[uart1_ipg], "ipg", "imx21-uart.0");
         clk_register_clkdev(clk[uart_ipg_per], "per", "imx21-uart.0");
@@ -183,8 +245,6 @@ int __init mx25_clocks_init(void)
         clk_register_clkdev(clk[uart_ipg_per], "per", "imx21-uart.3");
         clk_register_clkdev(clk[uart5_ipg], "ipg", "imx21-uart.4");
         clk_register_clkdev(clk[uart_ipg_per], "per", "imx21-uart.4");
-        clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0");
-        clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0");
         clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.0");
         clk_register_clkdev(clk[usbotg_ahb], "ahb", "mxc-ehci.0");
         clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.0");
@@ -197,7 +257,7 @@ int __init mx25_clocks_init(void)
         clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc");
         clk_register_clkdev(clk[usbotg_ahb], "ahb", "fsl-usb2-udc");
         clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc");
-        clk_register_clkdev(clk[nfc_ipg_per], NULL, "mxc_nand.0");
+        clk_register_clkdev(clk[nfc_ipg_per], NULL, "imx25-nand.0");
         /* i.mx25 has the i.mx35 type cspi */
         clk_register_clkdev(clk[cspi1_ipg], NULL, "imx35-cspi.0");
         clk_register_clkdev(clk[cspi2_ipg], NULL, "imx35-cspi.1");
@@ -212,15 +272,15 @@ int __init mx25_clocks_init(void)
         clk_register_clkdev(clk[per10], "per", "mxc_pwm.3");
         clk_register_clkdev(clk[kpp_ipg], NULL, "imx-keypad");
         clk_register_clkdev(clk[tsc_ipg], NULL, "mx25-adc");
-        clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.0");
-        clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.1");
-        clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.2");
+        clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx21-i2c.0");
+        clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx21-i2c.1");
+        clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx21-i2c.2");
         clk_register_clkdev(clk[fec_ipg], "ipg", "imx25-fec.0");
         clk_register_clkdev(clk[fec_ahb], "ahb", "imx25-fec.0");
         clk_register_clkdev(clk[dryice_ipg], NULL, "imxdi_rtc.0");
-        clk_register_clkdev(clk[lcdc_ipg_per], "per", "imx-fb.0");
-        clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx-fb.0");
-        clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx-fb.0");
+        clk_register_clkdev(clk[lcdc_ipg_per], "per", "imx21-fb.0");
+        clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx21-fb.0");
+        clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx21-fb.0");
         clk_register_clkdev(clk[wdt_ipg], NULL, "imx2-wdt.0");
         clk_register_clkdev(clk[ssi1_ipg], NULL, "imx-ssi.0");
         clk_register_clkdev(clk[ssi2_ipg], NULL, "imx-ssi.1");
@@ -230,9 +290,9 @@ int __init mx25_clocks_init(void)
         clk_register_clkdev(clk[esdhc2_ipg_per], "per", "sdhci-esdhc-imx25.1");
         clk_register_clkdev(clk[esdhc2_ipg], "ipg", "sdhci-esdhc-imx25.1");
         clk_register_clkdev(clk[esdhc2_ahb], "ahb", "sdhci-esdhc-imx25.1");
-        clk_register_clkdev(clk[csi_ipg_per], "per", "mx2-camera.0");
-        clk_register_clkdev(clk[csi_ipg], "ipg", "mx2-camera.0");
-        clk_register_clkdev(clk[csi_ahb], "ahb", "mx2-camera.0");
+        clk_register_clkdev(clk[csi_ipg_per], "per", "imx25-camera.0");
+        clk_register_clkdev(clk[csi_ipg], "ipg", "imx25-camera.0");
+        clk_register_clkdev(clk[csi_ahb], "ahb", "imx25-camera.0");
         clk_register_clkdev(clk[dummy], "audmux", NULL);
         clk_register_clkdev(clk[can1_ipg], NULL, "flexcan.0");
         clk_register_clkdev(clk[can2_ipg], NULL, "flexcan.1");
@@ -242,5 +302,40 @@ int __init mx25_clocks_init(void)
         clk_register_clkdev(clk[iim_ipg], "iim", NULL);
 
         mxc_timer_init(MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), MX25_INT_GPT1);
+
+        return 0;
+}
+
+int __init mx25_clocks_init_dt(void)
+{
+        struct device_node *np;
+        void __iomem *base;
+        int irq;
+        unsigned long osc_rate = 24000000;
+
+        /* retrieve the freqency of fixed clocks from device tree */
+        for_each_compatible_node(np, NULL, "fixed-clock") {
+                u32 rate;
+                if (of_property_read_u32(np, "clock-frequency", &rate))
+                        continue;
+
+                if (of_device_is_compatible(np, "fsl,imx-osc"))
+                        osc_rate = rate;
+        }
+
+        np = of_find_compatible_node(NULL, NULL, "fsl,imx25-ccm");
+        clk_data.clks = clk;
+        clk_data.clk_num = ARRAY_SIZE(clk);
+        of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
+
+        __mx25_clocks_init(osc_rate);
+
+        np = of_find_compatible_node(NULL, NULL, "fsl,imx25-gpt");
+        base = of_iomap(np, 0);
+        WARN_ON(!base);
+        irq = irq_of_parse_and_map(np, 0);
+
+        mxc_timer_init(base, irq);
+
         return 0;
 }
diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c
index 366e5d59d886..585ab256c58f 100644
--- a/arch/arm/mach-imx/clk-imx27.c
+++ b/arch/arm/mach-imx/clk-imx27.c
@@ -6,9 +6,9 @@
 #include <linux/clk-provider.h>
 #include <linux/of.h>
 
-#include <mach/common.h>
-#include <mach/hardware.h>
 #include "clk.h"
+#include "common.h"
+#include "hardware.h"
 
 #define IO_ADDR_CCM(off)        (MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR + (off)))
 
@@ -211,19 +211,19 @@ int __init mx27_clocks_init(unsigned long fref)
         clk_register_clkdev(clk[gpt6_ipg_gate], "ipg", "imx-gpt.5");
         clk_register_clkdev(clk[per1_gate], "per", "imx-gpt.5");
         clk_register_clkdev(clk[pwm_ipg_gate], NULL, "mxc_pwm.0");
-        clk_register_clkdev(clk[per2_gate], "per", "mxc-mmc.0");
-        clk_register_clkdev(clk[sdhc1_ipg_gate], "ipg", "mxc-mmc.0");
-        clk_register_clkdev(clk[per2_gate], "per", "mxc-mmc.1");
-        clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "mxc-mmc.1");
-        clk_register_clkdev(clk[per2_gate], "per", "mxc-mmc.2");
-        clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "mxc-mmc.2");
+        clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.0");
+        clk_register_clkdev(clk[sdhc1_ipg_gate], "ipg", "imx21-mmc.0");
+        clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.1");
+        clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "imx21-mmc.1");
+        clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.2");
+        clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "imx21-mmc.2");
         clk_register_clkdev(clk[cspi1_ipg_gate], NULL, "imx27-cspi.0");
         clk_register_clkdev(clk[cspi2_ipg_gate], NULL, "imx27-cspi.1");
         clk_register_clkdev(clk[cspi3_ipg_gate], NULL, "imx27-cspi.2");
-        clk_register_clkdev(clk[per3_gate], "per", "imx-fb.0");
-        clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx-fb.0");
-        clk_register_clkdev(clk[lcdc_ahb_gate], "ahb", "imx-fb.0");
-        clk_register_clkdev(clk[csi_ahb_gate], "ahb", "mx2-camera.0");
+        clk_register_clkdev(clk[per3_gate], "per", "imx21-fb.0");
+        clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx21-fb.0");
+        clk_register_clkdev(clk[lcdc_ahb_gate], "ahb", "imx21-fb.0");
+        clk_register_clkdev(clk[csi_ahb_gate], "ahb", "imx27-camera.0");
         clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc");
         clk_register_clkdev(clk[usb_ipg_gate], "ipg", "fsl-usb2-udc");
         clk_register_clkdev(clk[usb_ahb_gate], "ahb", "fsl-usb2-udc");
@@ -238,27 +238,27 @@ int __init mx27_clocks_init(unsigned long fref)
         clk_register_clkdev(clk[usb_ahb_gate], "ahb", "mxc-ehci.2");
         clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0");
         clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1");
-        clk_register_clkdev(clk[nfc_baud_gate], NULL, "mxc_nand.0");
+        clk_register_clkdev(clk[nfc_baud_gate], NULL, "imx27-nand.0");
         clk_register_clkdev(clk[vpu_baud_gate], "per", "coda-imx27.0");
         clk_register_clkdev(clk[vpu_ahb_gate], "ahb", "coda-imx27.0");
-        clk_register_clkdev(clk[dma_ahb_gate], "ahb", "imx-dma");
-        clk_register_clkdev(clk[dma_ipg_gate], "ipg", "imx-dma");
+        clk_register_clkdev(clk[dma_ahb_gate], "ahb", "imx27-dma");
+        clk_register_clkdev(clk[dma_ipg_gate], "ipg", "imx27-dma");
         clk_register_clkdev(clk[fec_ipg_gate], "ipg", "imx27-fec.0");
         clk_register_clkdev(clk[fec_ahb_gate], "ahb", "imx27-fec.0");
         clk_register_clkdev(clk[wdog_ipg_gate], NULL, "imx2-wdt.0");
-        clk_register_clkdev(clk[i2c1_ipg_gate], NULL, "imx-i2c.0");
-        clk_register_clkdev(clk[i2c2_ipg_gate], NULL, "imx-i2c.1");
+        clk_register_clkdev(clk[i2c1_ipg_gate], NULL, "imx21-i2c.0");
+        clk_register_clkdev(clk[i2c2_ipg_gate], NULL, "imx21-i2c.1");
         clk_register_clkdev(clk[owire_ipg_gate], NULL, "mxc_w1.0");
         clk_register_clkdev(clk[kpp_ipg_gate], NULL, "imx-keypad");
-        clk_register_clkdev(clk[emma_ahb_gate], "emma-ahb", "mx2-camera.0");
-        clk_register_clkdev(clk[emma_ipg_gate], "emma-ipg", "mx2-camera.0");
+        clk_register_clkdev(clk[emma_ahb_gate], "emma-ahb", "imx27-camera.0");
+        clk_register_clkdev(clk[emma_ipg_gate], "emma-ipg", "imx27-camera.0");
         clk_register_clkdev(clk[emma_ahb_gate], "ahb", "m2m-emmaprp.0");
         clk_register_clkdev(clk[emma_ipg_gate], "ipg", "m2m-emmaprp.0");
         clk_register_clkdev(clk[iim_ipg_gate], "iim", NULL);
         clk_register_clkdev(clk[gpio_ipg_gate], "gpio", NULL);
         clk_register_clkdev(clk[brom_ahb_gate], "brom", NULL);
         clk_register_clkdev(clk[ata_ahb_gate], "ata", NULL);
-        clk_register_clkdev(clk[rtc_ipg_gate], NULL, "mxc_rtc");
+        clk_register_clkdev(clk[rtc_ipg_gate], NULL, "imx21-rtc");
         clk_register_clkdev(clk[scc_ipg_gate], "scc", NULL);
         clk_register_clkdev(clk[cpu_div], "cpu", NULL);
         clk_register_clkdev(clk[emi_ahb_gate], "emi_ahb" , NULL);
diff --git a/arch/arm/mach-imx/clk-imx31.c b/arch/arm/mach-imx/clk-imx31.c
index 1253af2d9971..8be64e0a4ace 100644
--- a/arch/arm/mach-imx/clk-imx31.c
+++ b/arch/arm/mach-imx/clk-imx31.c
@@ -22,12 +22,11 @@
 #include <linux/err.h>
 #include <linux/of.h>
 
-#include <mach/hardware.h>
-#include <mach/mx31.h>
-#include <mach/common.h>
-
 #include "clk.h"
+#include "common.h"
 #include "crmregs-imx3.h"
+#include "hardware.h"
+#include "mx31.h"
 
 static const char *mcu_main_sel[] = { "spll", "mpll", };
 static const char *per_sel[] = { "per_div", "ipg", };
@@ -124,10 +123,10 @@ int __init mx31_clocks_init(unsigned long fref)
         clk_register_clkdev(clk[cspi3_gate], NULL, "imx31-cspi.2");
         clk_register_clkdev(clk[pwm_gate], "pwm", NULL);
         clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0");
-        clk_register_clkdev(clk[rtc_gate], NULL, "mxc_rtc");
+        clk_register_clkdev(clk[rtc_gate], NULL, "imx21-rtc");
         clk_register_clkdev(clk[epit1_gate], "epit", NULL);
         clk_register_clkdev(clk[epit2_gate], "epit", NULL);
-        clk_register_clkdev(clk[nfc], NULL, "mxc_nand.0");
+        clk_register_clkdev(clk[nfc], NULL, "imx27-nand.0");
         clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core");
         clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb");
         clk_register_clkdev(clk[kpp_gate], NULL, "imx-keypad");
@@ -155,12 +154,12 @@ int __init mx31_clocks_init(unsigned long fref)
         clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.3");
         clk_register_clkdev(clk[uart5_gate], "per", "imx21-uart.4");
         clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.4");
-        clk_register_clkdev(clk[i2c1_gate], NULL, "imx-i2c.0");
-        clk_register_clkdev(clk[i2c2_gate], NULL, "imx-i2c.1");
-        clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2");
+        clk_register_clkdev(clk[i2c1_gate], NULL, "imx21-i2c.0");
+        clk_register_clkdev(clk[i2c2_gate], NULL, "imx21-i2c.1");
+        clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2");
         clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1.0");
-        clk_register_clkdev(clk[sdhc1_gate], NULL, "mxc-mmc.0");
-        clk_register_clkdev(clk[sdhc2_gate], NULL, "mxc-mmc.1");
+        clk_register_clkdev(clk[sdhc1_gate], NULL, "imx31-mmc.0");
+        clk_register_clkdev(clk[sdhc2_gate], NULL, "imx31-mmc.1");
         clk_register_clkdev(clk[ssi1_gate], NULL, "imx-ssi.0");
         clk_register_clkdev(clk[ssi2_gate], NULL, "imx-ssi.1");
         clk_register_clkdev(clk[firi_gate], "firi", NULL);
diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c
index 177259b523cd..66f3d65ea275 100644
--- a/arch/arm/mach-imx/clk-imx35.c
+++ b/arch/arm/mach-imx/clk-imx35.c
@@ -14,11 +14,10 @@
 #include <linux/of.h>
 #include <linux/err.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
-
 #include "crmregs-imx3.h"
 #include "clk.h"
+#include "common.h"
+#include "hardware.h"
 
 struct arm_ahb_div {
         unsigned char arm, ahb, sel;
@@ -226,9 +225,9 @@ int __init mx35_clocks_init()
         clk_register_clkdev(clk[fec_gate], NULL, "imx27-fec.0");
         clk_register_clkdev(clk[gpt_gate], "per", "imx-gpt.0");
         clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0");
-        clk_register_clkdev(clk[i2c1_gate], NULL, "imx-i2c.0");
-        clk_register_clkdev(clk[i2c2_gate], NULL, "imx-i2c.1");
-        clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2");
+        clk_register_clkdev(clk[i2c1_gate], NULL, "imx21-i2c.0");
+        clk_register_clkdev(clk[i2c2_gate], NULL, "imx21-i2c.1");
+        clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2");
         clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core");
         clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb");
         clk_register_clkdev(clk[kpp_gate], NULL, "imx-keypad");
@@ -256,7 +255,7 @@ int __init mx35_clocks_init()
         clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc");
         clk_register_clkdev(clk[usbotg_gate], "ahb", "fsl-usb2-udc");
         clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0");
-        clk_register_clkdev(clk[nfc_div], NULL, "mxc_nand.0");
+        clk_register_clkdev(clk[nfc_div], NULL, "imx25-nand.0");
         clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0");
 
         clk_prepare_enable(clk[spba_gate]);
diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c
index a0bf84803eac..abb71f6b4d60 100644
--- a/arch/arm/mach-imx/clk-imx51-imx53.c
+++ b/arch/arm/mach-imx/clk-imx51-imx53.c
@@ -14,11 +14,10 @@
 #include <linux/of.h>
 #include <linux/err.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
-
 #include "crm-regs-imx5.h"
 #include "clk.h"
+#include "common.h"
+#include "hardware.h"
 
 /* Low-power Audio Playback Mode clock */
 static const char *lp_apm_sel[] = { "osc", };
@@ -258,8 +257,8 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
         clk_register_clkdev(clk[cspi_ipg_gate], NULL, "imx35-cspi.2");
         clk_register_clkdev(clk[pwm1_ipg_gate], "pwm", "mxc_pwm.0");
         clk_register_clkdev(clk[pwm2_ipg_gate], "pwm", "mxc_pwm.1");
-        clk_register_clkdev(clk[i2c1_gate], NULL, "imx-i2c.0");
-        clk_register_clkdev(clk[i2c2_gate], NULL, "imx-i2c.1");
+        clk_register_clkdev(clk[i2c1_gate], NULL, "imx21-i2c.0");
+        clk_register_clkdev(clk[i2c2_gate], NULL, "imx21-i2c.1");
         clk_register_clkdev(clk[usboh3_per_gate], "per", "mxc-ehci.0");
         clk_register_clkdev(clk[usboh3_gate], "ipg", "mxc-ehci.0");
         clk_register_clkdev(clk[usboh3_gate], "ahb", "mxc-ehci.0");
@@ -272,7 +271,7 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
         clk_register_clkdev(clk[usboh3_per_gate], "per", "fsl-usb2-udc");
         clk_register_clkdev(clk[usboh3_gate], "ipg", "fsl-usb2-udc");
         clk_register_clkdev(clk[usboh3_gate], "ahb", "fsl-usb2-udc");
-        clk_register_clkdev(clk[nfc_gate], NULL, "mxc_nand");
+        clk_register_clkdev(clk[nfc_gate], NULL, "imx51-nand");
         clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0");
         clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1");
         clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "imx-ssi.2");
@@ -345,7 +344,7 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
 
         mx5_clocks_common_init(rate_ckil, rate_osc, rate_ckih1, rate_ckih2);
 
-        clk_register_clkdev(clk[hsi2c_gate], NULL, "imx-i2c.2");
+        clk_register_clkdev(clk[hsi2c_gate], NULL, "imx21-i2c.2");
         clk_register_clkdev(clk[mx51_mipi], "mipi_hsp", NULL);
         clk_register_clkdev(clk[vpu_gate], NULL, "imx51-vpu.0");
         clk_register_clkdev(clk[fec_gate], NULL, "imx27-fec.0");
@@ -440,7 +439,7 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
         mx5_clocks_common_init(rate_ckil, rate_osc, rate_ckih1, rate_ckih2);
 
         clk_register_clkdev(clk[vpu_gate], NULL, "imx53-vpu.0");
-        clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2");
+        clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2");
         clk_register_clkdev(clk[fec_gate], NULL, "imx25-fec.0");
         clk_register_clkdev(clk[ipu_gate], "bus", "imx53-ipu");
         clk_register_clkdev(clk[ipu_di0_gate], "di0", "imx53-ipu");
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 3ec242f3341e..5f9f5919dd74 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -19,8 +19,9 @@
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
-#include <mach/common.h>
+
 #include "clk.h"
+#include "common.h"
 
 #define CCGR0                           0x68
 #define CCGR1                           0x6c
@@ -405,6 +406,7 @@ int __init mx6q_clocks_init(void)
         clk_register_clkdev(clk[cko1_sel], "cko1_sel", NULL);
         clk_register_clkdev(clk[ahb], "ahb", NULL);
         clk_register_clkdev(clk[cko1], "cko1", NULL);
+        clk_register_clkdev(clk[arm], NULL, "cpu0");
 
         /*
          * The gpmi needs 100MHz frequency in the EDO/Sync mode,
diff --git a/arch/arm/mach-imx/clk-pllv1.c b/arch/arm/mach-imx/clk-pllv1.c
index 02be73178912..abff350ba24c 100644
--- a/arch/arm/mach-imx/clk-pllv1.c
+++ b/arch/arm/mach-imx/clk-pllv1.c
@@ -4,10 +4,10 @@
 #include <linux/slab.h>
 #include <linux/kernel.h>
 #include <linux/err.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
 
 #include "clk.h"
+#include "common.h"
+#include "hardware.h"
 
 /**
  * pll v1
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/mach-imx/common.h
index ead901814c0d..7191ab4434e5 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/mach-imx/common.h
@@ -66,6 +66,7 @@ extern int mx51_clocks_init(unsigned long ckil, unsigned long osc,
                         unsigned long ckih1, unsigned long ckih2);
 extern int mx53_clocks_init(unsigned long ckil, unsigned long osc,
                         unsigned long ckih1, unsigned long ckih2);
+extern int mx25_clocks_init_dt(void);
 extern int mx27_clocks_init_dt(void);
 extern int mx31_clocks_init_dt(void);
 extern int mx51_clocks_init_dt(void);
@@ -79,6 +80,7 @@ extern void mxc_arch_reset_init(void __iomem *);
 extern int mx53_revision(void);
 extern int mx53_display_revision(void);
 extern void imx_set_aips(void __iomem *);
+extern int mxc_device_init(void);
 
 enum mxc_cpu_pwr_mode {
         WAIT_CLOCKED,           /* wfi only */
diff --git a/arch/arm/mach-imx/cpu-imx25.c b/arch/arm/mach-imx/cpu-imx25.c
index 6914bcbf84e4..96ec64b5ff7d 100644
--- a/arch/arm/mach-imx/cpu-imx25.c
+++ b/arch/arm/mach-imx/cpu-imx25.c
@@ -11,8 +11,9 @@
  */
 #include <linux/module.h>
 #include <linux/io.h>
-#include <mach/hardware.h>
-#include <mach/iim.h>
+
+#include "iim.h"
+#include "hardware.h"
 
 static int mx25_cpu_rev = -1;
 
diff --git a/arch/arm/mach-imx/cpu-imx27.c b/arch/arm/mach-imx/cpu-imx27.c
index ff38e1505f67..fe8d36f7e30e 100644
--- a/arch/arm/mach-imx/cpu-imx27.c
+++ b/arch/arm/mach-imx/cpu-imx27.c
@@ -24,7 +24,7 @@
 #include <linux/io.h>
 #include <linux/module.h>
 
-#include <mach/hardware.h>
+#include "hardware.h"
 
 static int mx27_cpu_rev = -1;
 static int mx27_cpu_partnumber;
diff --git a/arch/arm/mach-imx/cpu-imx31.c b/arch/arm/mach-imx/cpu-imx31.c
index 3f2345f0cdaf..fde1860a2521 100644
--- a/arch/arm/mach-imx/cpu-imx31.c
+++ b/arch/arm/mach-imx/cpu-imx31.c
@@ -11,9 +11,10 @@
 
 #include <linux/module.h>
 #include <linux/io.h>
-#include <mach/hardware.h>
-#include <mach/iim.h>
-#include <mach/common.h>
+
+#include "common.h"
+#include "hardware.h"
+#include "iim.h"
 
 static int mx31_cpu_rev = -1;
 
diff --git a/arch/arm/mach-imx/cpu-imx35.c b/arch/arm/mach-imx/cpu-imx35.c
index 846e46eb8cbf..ec3aaa098c17 100644
--- a/arch/arm/mach-imx/cpu-imx35.c
+++ b/arch/arm/mach-imx/cpu-imx35.c
@@ -10,8 +10,9 @@
  */
 #include <linux/module.h>
 #include <linux/io.h>
-#include <mach/hardware.h>
-#include <mach/iim.h>
+
+#include "hardware.h"
+#include "iim.h"
 
 static int mx35_cpu_rev = -1;
 
diff --git a/arch/arm/mach-imx/cpu-imx5.c b/arch/arm/mach-imx/cpu-imx5.c
index 8eb15a2fcaf9..d88760014ff9 100644
--- a/arch/arm/mach-imx/cpu-imx5.c
+++ b/arch/arm/mach-imx/cpu-imx5.c
@@ -15,9 +15,10 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/module.h>
-#include <mach/hardware.h>
 #include <linux/io.h>
 
+#include "hardware.h"
+
 static int mx5_cpu_rev = -1;
 
 #define IIM_SREV 0x24
diff --git a/arch/arm/plat-mxc/cpu.c b/arch/arm/mach-imx/cpu.c
index 220dd6f93126..03fcbd082593 100644
--- a/arch/arm/plat-mxc/cpu.c
+++ b/arch/arm/mach-imx/cpu.c
@@ -1,7 +1,8 @@
 
 #include <linux/module.h>
 #include <linux/io.h>
-#include <mach/hardware.h>
+
+#include "hardware.h"
 
 unsigned int __mxc_cpu_type;
 EXPORT_SYMBOL(__mxc_cpu_type);
diff --git a/arch/arm/mach-imx/cpu_op-mx51.c b/arch/arm/mach-imx/cpu_op-mx51.c
index 7b92cd6da6d3..b9ef692b61a2 100644
--- a/arch/arm/mach-imx/cpu_op-mx51.c
+++ b/arch/arm/mach-imx/cpu_op-mx51.c
@@ -13,9 +13,10 @@
 
 #include <linux/bug.h>
 #include <linux/types.h>
-#include <mach/hardware.h>
 #include <linux/kernel.h>
 
+#include "hardware.h"
+
 static struct cpu_op mx51_cpu_op[] = {
         {
         .cpu_rate = 160000000,},
diff --git a/arch/arm/plat-mxc/cpufreq.c b/arch/arm/mach-imx/cpufreq.c
index b5b6f8083130..36e8b3994470 100644
--- a/arch/arm/plat-mxc/cpufreq.c
+++ b/arch/arm/mach-imx/cpufreq.c
@@ -22,7 +22,8 @@
 #include <linux/clk.h>
 #include <linux/err.h>
 #include <linux/slab.h>
-#include <mach/hardware.h>
+
+#include "hardware.h"
 
 #define CLK32_FREQ      32768
 #define NANOSECOND      (1000 * 1000 * 1000)
diff --git a/arch/arm/plat-mxc/cpuidle.c b/arch/arm/mach-imx/cpuidle.c
index d4cb511a44a8..d4cb511a44a8 100644
--- a/arch/arm/plat-mxc/cpuidle.c
+++ b/arch/arm/mach-imx/cpuidle.c
diff --git a/arch/arm/plat-mxc/include/mach/cpuidle.h b/arch/arm/mach-imx/cpuidle.h
index bc932d1af372..bc932d1af372 100644
--- a/arch/arm/plat-mxc/include/mach/cpuidle.h
+++ b/arch/arm/mach-imx/cpuidle.h
diff --git a/arch/arm/mach-imx/devices-imx1.h b/arch/arm/mach-imx/devices-imx1.h
index 3aad1e70de96..f9b5afc6bcd1 100644
--- a/arch/arm/mach-imx/devices-imx1.h
+++ b/arch/arm/mach-imx/devices-imx1.h
@@ -6,8 +6,7 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/mx1.h>
-#include <mach/devices-common.h>
+#include "devices/devices-common.h"
 
 extern const struct imx_imx_fb_data imx1_imx_fb_data;
 #define imx1_add_imx_fb(pdata) \
diff --git a/arch/arm/mach-imx/devices-imx21.h b/arch/arm/mach-imx/devices-imx21.h
index 93ece55f75df..bd9393280159 100644
--- a/arch/arm/mach-imx/devices-imx21.h
+++ b/arch/arm/mach-imx/devices-imx21.h
@@ -6,8 +6,7 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/mx21.h>
-#include <mach/devices-common.h>
+#include "devices/devices-common.h"
 
 extern const struct imx_imx21_hcd_data imx21_imx21_hcd_data;
 #define imx21_add_imx21_hcd(pdata)      \
diff --git a/arch/arm/mach-imx/devices-imx25.h b/arch/arm/mach-imx/devices-imx25.h
index f8e03dd1f116..0d2922bc575c 100644
--- a/arch/arm/mach-imx/devices-imx25.h
+++ b/arch/arm/mach-imx/devices-imx25.h
@@ -6,8 +6,7 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/mx25.h>
-#include <mach/devices-common.h>
+#include "devices/devices-common.h"
 
 extern const struct imx_fec_data imx25_fec_data;
 #define imx25_add_fec(pdata)    \
diff --git a/arch/arm/mach-imx/devices-imx27.h b/arch/arm/mach-imx/devices-imx27.h
index 04822932cdd1..8a1ad7972d4c 100644
--- a/arch/arm/mach-imx/devices-imx27.h
+++ b/arch/arm/mach-imx/devices-imx27.h
@@ -6,8 +6,7 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/mx27.h>
-#include <mach/devices-common.h>
+#include "devices/devices-common.h"
 
 extern const struct imx_fec_data imx27_fec_data;
 #define imx27_add_fec(pdata)    \
diff --git a/arch/arm/mach-imx/devices-imx31.h b/arch/arm/mach-imx/devices-imx31.h
index 8b2ceb45bb83..e8d1611bbc8e 100644
--- a/arch/arm/mach-imx/devices-imx31.h
+++ b/arch/arm/mach-imx/devices-imx31.h
@@ -6,8 +6,7 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/mx31.h>
-#include <mach/devices-common.h>
+#include "devices/devices-common.h"
 
 extern const struct imx_fsl_usb2_udc_data imx31_fsl_usb2_udc_data;
 #define imx31_add_fsl_usb2_udc(pdata)   \
diff --git a/arch/arm/mach-imx/devices-imx35.h b/arch/arm/mach-imx/devices-imx35.h
index c3e9f206ac2b..e2675f1b141c 100644
--- a/arch/arm/mach-imx/devices-imx35.h
+++ b/arch/arm/mach-imx/devices-imx35.h
@@ -6,8 +6,7 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/mx35.h>
-#include <mach/devices-common.h>
+#include "devices/devices-common.h"
 
 extern const struct imx_fec_data imx35_fec_data;
 #define imx35_add_fec(pdata)    \
diff --git a/arch/arm/mach-imx/devices-imx50.h b/arch/arm/mach-imx/devices-imx50.h
index 7216667eaafc..2c290391f298 100644
--- a/arch/arm/mach-imx/devices-imx50.h
+++ b/arch/arm/mach-imx/devices-imx50.h
@@ -18,8 +18,7 @@
  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  */
 
-#include <mach/mx50.h>
-#include <mach/devices-common.h>
+#include "devices/devices-common.h"
 
 extern const struct imx_imx_uart_1irq_data imx50_imx_uart_data[];
 #define imx50_add_imx_uart(id, pdata)   \
diff --git a/arch/arm/mach-imx/devices-imx51.h b/arch/arm/mach-imx/devices-imx51.h
index 9f1718725195..deee5baee88c 100644
--- a/arch/arm/mach-imx/devices-imx51.h
+++ b/arch/arm/mach-imx/devices-imx51.h
@@ -6,8 +6,7 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/mx51.h>
-#include <mach/devices-common.h>
+#include "devices/devices-common.h"
 
 extern const struct imx_fec_data imx51_fec_data;
 #define imx51_add_fec(pdata)    \
diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/mach-imx/devices/Kconfig
index a35d9841f494..a35d9841f494 100644
--- a/arch/arm/plat-mxc/devices/Kconfig
+++ b/arch/arm/mach-imx/devices/Kconfig
diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/mach-imx/devices/Makefile
index 76f3195475d0..2abe2a5144d0 100644
--- a/arch/arm/plat-mxc/devices/Makefile
+++ b/arch/arm/mach-imx/devices/Makefile
@@ -1,3 +1,5 @@
+obj-y := devices.o
+
 obj-$(CONFIG_IMX_HAVE_PLATFORM_FEC) += platform-fec.o
 obj-$(CONFIG_IMX_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o
 obj-$(CONFIG_IMX_HAVE_PLATFORM_FSL_USB2_UDC) += platform-fsl-usb2-udc.o
diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/mach-imx/devices/devices-common.h
index eaf79d220c9a..e4b790b9e2aa 100644
--- a/arch/arm/plat-mxc/include/mach/devices-common.h
+++ b/arch/arm/mach-imx/devices/devices-common.h
@@ -108,6 +108,7 @@ struct platform_device *__init imx_add_imxdi_rtc(
 
 #include <linux/platform_data/video-imxfb.h>
 struct imx_imx_fb_data {
+        const char *devid;
         resource_size_t iobase;
         resource_size_t iosize;
         resource_size_t irq;
@@ -118,6 +119,7 @@ struct platform_device *__init imx_add_imx_fb(
 
 #include <linux/platform_data/i2c-imx.h>
 struct imx_imx_i2c_data {
+        const char *devid;
         int id;
         resource_size_t iobase;
         resource_size_t iosize;
@@ -219,6 +221,7 @@ struct platform_device *__init imx_add_mx1_camera(
 
 #include <linux/platform_data/camera-mx2.h>
 struct imx_mx2_camera_data {
+        const char *devid;
         resource_size_t iobasecsi;
         resource_size_t iosizecsi;
         resource_size_t irqcsi;
@@ -244,6 +247,7 @@ struct platform_device *__init imx_add_mxc_ehci(
 
 #include <linux/platform_data/mmc-mxcmmc.h>
 struct imx_mxc_mmc_data {
+        const char *devid;
         int id;
         resource_size_t iobase;
         resource_size_t iosize;
@@ -256,6 +260,7 @@ struct platform_device *__init imx_add_mxc_mmc(
 
 #include <linux/platform_data/mtd-mxc_nand.h>
 struct imx_mxc_nand_data {
+        const char *devid;
         /*
          * id is traditionally 0, but -1 is more appropriate.  We use -1 for new
          * machines but don't change existing devices as the nand device usually
@@ -290,6 +295,7 @@ struct platform_device *__init imx_add_mxc_pwm(
 
 /* mxc_rtc */
 struct imx_mxc_rtc_data {
+        const char *devid;
         resource_size_t iobase;
         resource_size_t irq;
 };
@@ -326,7 +332,8 @@ struct platform_device *__init imx_add_spi_imx(
                 const struct imx_spi_imx_data *data,
                 const struct spi_imx_master *pdata);
 
-struct platform_device *imx_add_imx_dma(void);
+struct platform_device *imx_add_imx_dma(char *name, resource_size_t iobase,
+                                        int irq, int irq_err);
 struct platform_device *imx_add_imx_sdma(char *name,
         resource_size_t iobase, int irq, struct sdma_platform_data *pdata);
 
diff --git a/arch/arm/plat-mxc/devices.c b/arch/arm/mach-imx/devices/devices.c
index 4d55a7a26e98..1b37482407f9 100644
--- a/arch/arm/plat-mxc/devices.c
+++ b/arch/arm/mach-imx/devices/devices.c
@@ -21,7 +21,6 @@
 #include <linux/init.h>
 #include <linux/err.h>
 #include <linux/platform_device.h>
-#include <mach/common.h>
 
 struct device mxc_aips_bus = {
         .init_name      = "mxc_aips",
@@ -33,7 +32,7 @@ struct device mxc_ahb_bus = {
         .parent         = &platform_bus,
 };
 
-static int __init mxc_device_init(void)
+int __init mxc_device_init(void)
 {
         int ret;
 
@@ -46,4 +45,3 @@ static int __init mxc_device_init(void)
 done:
         return ret;
 }
-core_initcall(mxc_device_init);
diff --git a/arch/arm/plat-mxc/devices/platform-ahci-imx.c b/arch/arm/mach-imx/devices/platform-ahci-imx.c
index ade4a1c4e2a3..3d87dd9c284a 100644
--- a/arch/arm/plat-mxc/devices/platform-ahci-imx.c
+++ b/arch/arm/mach-imx/devices/platform-ahci-imx.c
@@ -24,8 +24,9 @@
 #include <linux/device.h>
 #include <linux/dma-mapping.h>
 #include <asm/sizes.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_ahci_imx_data_entry_single(soc, _devid)             \
         {                                                               \
diff --git a/arch/arm/plat-mxc/devices/platform-fec.c b/arch/arm/mach-imx/devices/platform-fec.c
index 0bae44e890db..2cb188ad9a0a 100644
--- a/arch/arm/plat-mxc/devices/platform-fec.c
+++ b/arch/arm/mach-imx/devices/platform-fec.c
@@ -8,8 +8,9 @@
  */
 #include <linux/dma-mapping.h>
 #include <asm/sizes.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_fec_data_entry_single(soc, _devid)                          \
         {                                                               \
diff --git a/arch/arm/plat-mxc/devices/platform-flexcan.c b/arch/arm/mach-imx/devices/platform-flexcan.c
index 4e8497af2eb1..1078bf0a94ef 100644
--- a/arch/arm/plat-mxc/devices/platform-flexcan.c
+++ b/arch/arm/mach-imx/devices/platform-flexcan.c
@@ -5,8 +5,8 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_flexcan_data_entry_single(soc, _id, _hwid, _size)           \
         {                                                               \
diff --git a/arch/arm/plat-mxc/devices/platform-fsl-usb2-udc.c b/arch/arm/mach-imx/devices/platform-fsl-usb2-udc.c
index 848038f301fd..37e44398197b 100644
--- a/arch/arm/plat-mxc/devices/platform-fsl-usb2-udc.c
+++ b/arch/arm/mach-imx/devices/platform-fsl-usb2-udc.c
@@ -7,8 +7,9 @@
  * Free Software Foundation.
  */
 #include <linux/dma-mapping.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_fsl_usb2_udc_data_entry_single(soc)                         \
         {                                                               \
diff --git a/arch/arm/plat-mxc/devices/platform-gpio-mxc.c b/arch/arm/mach-imx/devices/platform-gpio-mxc.c
index a7919a241032..26483fa94b75 100644
--- a/arch/arm/plat-mxc/devices/platform-gpio-mxc.c
+++ b/arch/arm/mach-imx/devices/platform-gpio-mxc.c
@@ -6,7 +6,7 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/devices-common.h>
+#include "devices-common.h"
 
 struct platform_device *__init mxc_register_gpio(char *name, int id,
         resource_size_t iobase, resource_size_t iosize, int irq, int irq_high)
diff --git a/arch/arm/plat-mxc/devices/platform-gpio_keys.c b/arch/arm/mach-imx/devices/platform-gpio_keys.c
index 1c53a532ea0e..486282539c76 100644
--- a/arch/arm/plat-mxc/devices/platform-gpio_keys.c
+++ b/arch/arm/mach-imx/devices/platform-gpio_keys.c
@@ -16,8 +16,9 @@
  * Boston, MA  02110-1301, USA.
  */
 #include <asm/sizes.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+
+#include "../hardware.h"
+#include "devices-common.h"
 
 struct platform_device *__init imx_add_gpio_keys(
                 const struct gpio_keys_platform_data *pdata)
diff --git a/arch/arm/plat-mxc/devices/platform-imx-dma.c b/arch/arm/mach-imx/devices/platform-imx-dma.c
index 7fa7e9c92468..ccdb5dc4ddbd 100644
--- a/arch/arm/plat-mxc/devices/platform-imx-dma.c
+++ b/arch/arm/mach-imx/devices/platform-imx-dma.c
@@ -6,12 +6,29 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/devices-common.h>
+#include "devices-common.h"
 
-struct platform_device __init __maybe_unused *imx_add_imx_dma(void)
+struct platform_device __init __maybe_unused *imx_add_imx_dma(char *name,
+        resource_size_t iobase, int irq, int irq_err)
 {
+        struct resource res[] = {
+                {
+                        .start = iobase,
+                        .end = iobase + SZ_4K - 1,
+                        .flags = IORESOURCE_MEM,
+                }, {
+                        .start = irq,
+                        .end = irq,
+                        .flags = IORESOURCE_IRQ,
+                }, {
+                        .start = irq_err,
+                        .end = irq_err,
+                        .flags = IORESOURCE_IRQ,
+                },
+        };
+
         return platform_device_register_resndata(&mxc_ahb_bus,
-                        "imx-dma", -1, NULL, 0, NULL, 0);
+                        name, -1, res, ARRAY_SIZE(res), NULL, 0);
 }
 
 struct platform_device __init __maybe_unused *imx_add_imx_sdma(char *name,
diff --git a/arch/arm/plat-mxc/devices/platform-imx-fb.c b/arch/arm/mach-imx/devices/platform-imx-fb.c
index 2b0b5e0aa998..10b0ed39f07f 100644
--- a/arch/arm/plat-mxc/devices/platform-imx-fb.c
+++ b/arch/arm/mach-imx/devices/platform-imx-fb.c
@@ -7,11 +7,13 @@
  * Free Software Foundation.
  */
 #include <linux/dma-mapping.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
 
-#define imx_imx_fb_data_entry_single(soc, _size)                        \
+#include "../hardware.h"
+#include "devices-common.h"
+
+#define imx_imx_fb_data_entry_single(soc, _devid, _size)                \
         {                                                               \
+                .devid = _devid,                                        \
                 .iobase = soc ## _LCDC_BASE_ADDR,                       \
                 .iosize = _size,                                        \
                 .irq = soc ## _INT_LCDC,                                \
@@ -19,22 +21,22 @@
 
 #ifdef CONFIG_SOC_IMX1
 const struct imx_imx_fb_data imx1_imx_fb_data __initconst =
-        imx_imx_fb_data_entry_single(MX1, SZ_4K);
+        imx_imx_fb_data_entry_single(MX1, "imx1-fb", SZ_4K);
 #endif /* ifdef CONFIG_SOC_IMX1 */
 
 #ifdef CONFIG_SOC_IMX21
 const struct imx_imx_fb_data imx21_imx_fb_data __initconst =
-        imx_imx_fb_data_entry_single(MX21, SZ_4K);
+        imx_imx_fb_data_entry_single(MX21, "imx21-fb", SZ_4K);
 #endif /* ifdef CONFIG_SOC_IMX21 */
 
 #ifdef CONFIG_SOC_IMX25
 const struct imx_imx_fb_data imx25_imx_fb_data __initconst =
-        imx_imx_fb_data_entry_single(MX25, SZ_16K);
+        imx_imx_fb_data_entry_single(MX25, "imx21-fb", SZ_16K);
 #endif /* ifdef CONFIG_SOC_IMX25 */
 
 #ifdef CONFIG_SOC_IMX27
 const struct imx_imx_fb_data imx27_imx_fb_data __initconst =
-        imx_imx_fb_data_entry_single(MX27, SZ_4K);
+        imx_imx_fb_data_entry_single(MX27, "imx21-fb", SZ_4K);
 #endif /* ifdef CONFIG_SOC_IMX27 */
 
 struct platform_device *__init imx_add_imx_fb(
diff --git a/arch/arm/plat-mxc/devices/platform-imx-i2c.c b/arch/arm/mach-imx/devices/platform-imx-i2c.c
index 19ad580c0be3..8e30e5703cd2 100644
--- a/arch/arm/plat-mxc/devices/platform-imx-i2c.c
+++ b/arch/arm/mach-imx/devices/platform-imx-i2c.c
@@ -6,34 +6,35 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
 
-#define imx_imx_i2c_data_entry_single(soc, _id, _hwid, _size)           \
+#define imx_imx_i2c_data_entry_single(soc, _devid, _id, _hwid, _size)   \
         {                                                               \
+                .devid = _devid,                                        \
                 .id = _id,                                              \
                 .iobase = soc ## _I2C ## _hwid ## _BASE_ADDR,           \
                 .iosize = _size,                                        \
                 .irq = soc ## _INT_I2C ## _hwid,                        \
         }
 
-#define imx_imx_i2c_data_entry(soc, _id, _hwid, _size)                  \
-        [_id] = imx_imx_i2c_data_entry_single(soc, _id, _hwid, _size)
+#define imx_imx_i2c_data_entry(soc, _devid, _id, _hwid, _size)          \
+        [_id] = imx_imx_i2c_data_entry_single(soc, _devid, _id, _hwid, _size)
 
 #ifdef CONFIG_SOC_IMX1
 const struct imx_imx_i2c_data imx1_imx_i2c_data __initconst =
-        imx_imx_i2c_data_entry_single(MX1, 0, , SZ_4K);
+        imx_imx_i2c_data_entry_single(MX1, "imx1-i2c", 0, , SZ_4K);
 #endif /* ifdef CONFIG_SOC_IMX1 */
 
 #ifdef CONFIG_SOC_IMX21
 const struct imx_imx_i2c_data imx21_imx_i2c_data __initconst =
-        imx_imx_i2c_data_entry_single(MX21, 0, , SZ_4K);
+        imx_imx_i2c_data_entry_single(MX21, "imx21-i2c", 0, , SZ_4K);
 #endif /* ifdef CONFIG_SOC_IMX21 */
 
 #ifdef CONFIG_SOC_IMX25
 const struct imx_imx_i2c_data imx25_imx_i2c_data[] __initconst = {
 #define imx25_imx_i2c_data_entry(_id, _hwid)                            \
-        imx_imx_i2c_data_entry(MX25, _id, _hwid, SZ_16K)
+        imx_imx_i2c_data_entry(MX25, "imx21-i2c", _id, _hwid, SZ_16K)
         imx25_imx_i2c_data_entry(0, 1),
         imx25_imx_i2c_data_entry(1, 2),
         imx25_imx_i2c_data_entry(2, 3),
@@ -43,7 +44,7 @@ const struct imx_imx_i2c_data imx25_imx_i2c_data[] __initconst = {
 #ifdef CONFIG_SOC_IMX27
 const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst = {
 #define imx27_imx_i2c_data_entry(_id, _hwid)                            \
-        imx_imx_i2c_data_entry(MX27, _id, _hwid, SZ_4K)
+        imx_imx_i2c_data_entry(MX27, "imx21-i2c", _id, _hwid, SZ_4K)
         imx27_imx_i2c_data_entry(0, 1),
         imx27_imx_i2c_data_entry(1, 2),
 };
@@ -52,7 +53,7 @@ const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst = {
 #ifdef CONFIG_SOC_IMX31
 const struct imx_imx_i2c_data imx31_imx_i2c_data[] __initconst = {
 #define imx31_imx_i2c_data_entry(_id, _hwid)                            \
-        imx_imx_i2c_data_entry(MX31, _id, _hwid, SZ_4K)
+        imx_imx_i2c_data_entry(MX31, "imx21-i2c", _id, _hwid, SZ_4K)
         imx31_imx_i2c_data_entry(0, 1),
         imx31_imx_i2c_data_entry(1, 2),
         imx31_imx_i2c_data_entry(2, 3),
@@ -62,7 +63,7 @@ const struct imx_imx_i2c_data imx31_imx_i2c_data[] __initconst = {
 #ifdef CONFIG_SOC_IMX35
 const struct imx_imx_i2c_data imx35_imx_i2c_data[] __initconst = {
 #define imx35_imx_i2c_data_entry(_id, _hwid)                            \
-        imx_imx_i2c_data_entry(MX35, _id, _hwid, SZ_4K)
+        imx_imx_i2c_data_entry(MX35, "imx21-i2c", _id, _hwid, SZ_4K)
         imx35_imx_i2c_data_entry(0, 1),
         imx35_imx_i2c_data_entry(1, 2),
         imx35_imx_i2c_data_entry(2, 3),
@@ -72,7 +73,7 @@ const struct imx_imx_i2c_data imx35_imx_i2c_data[] __initconst = {
 #ifdef CONFIG_SOC_IMX50
 const struct imx_imx_i2c_data imx50_imx_i2c_data[] __initconst = {
 #define imx50_imx_i2c_data_entry(_id, _hwid)                            \
-        imx_imx_i2c_data_entry(MX50, _id, _hwid, SZ_4K)
+        imx_imx_i2c_data_entry(MX50, "imx21-i2c", _id, _hwid, SZ_4K)
         imx50_imx_i2c_data_entry(0, 1),
         imx50_imx_i2c_data_entry(1, 2),
         imx50_imx_i2c_data_entry(2, 3),
@@ -82,10 +83,11 @@ const struct imx_imx_i2c_data imx50_imx_i2c_data[] __initconst = {
 #ifdef CONFIG_SOC_IMX51
 const struct imx_imx_i2c_data imx51_imx_i2c_data[] __initconst = {
 #define imx51_imx_i2c_data_entry(_id, _hwid)                            \
-        imx_imx_i2c_data_entry(MX51, _id, _hwid, SZ_4K)
+        imx_imx_i2c_data_entry(MX51, "imx21-i2c", _id, _hwid, SZ_4K)
         imx51_imx_i2c_data_entry(0, 1),
         imx51_imx_i2c_data_entry(1, 2),
         {
+                .devid = "imx21-i2c",
                 .id = 2,
                 .iobase = MX51_HSI2C_DMA_BASE_ADDR,
                 .iosize = SZ_16K,
@@ -97,7 +99,7 @@ const struct imx_imx_i2c_data imx51_imx_i2c_data[] __initconst = {
 #ifdef CONFIG_SOC_IMX53
 const struct imx_imx_i2c_data imx53_imx_i2c_data[] __initconst = {
 #define imx53_imx_i2c_data_entry(_id, _hwid)                            \
-        imx_imx_i2c_data_entry(MX53, _id, _hwid, SZ_4K)
+        imx_imx_i2c_data_entry(MX53, "imx21-i2c", _id, _hwid, SZ_4K)
         imx53_imx_i2c_data_entry(0, 1),
         imx53_imx_i2c_data_entry(1, 2),
         imx53_imx_i2c_data_entry(2, 3),
@@ -120,7 +122,7 @@ struct platform_device *__init imx_add_imx_i2c(
                 },
         };
 
-        return imx_add_platform_device("imx-i2c", data->id,
+        return imx_add_platform_device(data->devid, data->id,
                         res, ARRAY_SIZE(res),
                         pdata, sizeof(*pdata));
 }
diff --git a/arch/arm/plat-mxc/devices/platform-imx-keypad.c b/arch/arm/mach-imx/devices/platform-imx-keypad.c
index 479c3e9f771f..8f22a4c98a4c 100644
--- a/arch/arm/plat-mxc/devices/platform-imx-keypad.c
+++ b/arch/arm/mach-imx/devices/platform-imx-keypad.c
@@ -6,8 +6,8 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_imx_keypad_data_entry_single(soc, _size)                    \
         {                                                               \
diff --git a/arch/arm/plat-mxc/devices/platform-imx-ssi.c b/arch/arm/mach-imx/devices/platform-imx-ssi.c
index 21c6f30e1017..bfcb8f3dfa8d 100644
--- a/arch/arm/plat-mxc/devices/platform-imx-ssi.c
+++ b/arch/arm/mach-imx/devices/platform-imx-ssi.c
@@ -6,8 +6,8 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_imx_ssi_data_entry(soc, _id, _hwid, _size)                  \
         [_id] = {                                                       \
diff --git a/arch/arm/plat-mxc/devices/platform-imx-uart.c b/arch/arm/mach-imx/devices/platform-imx-uart.c
index d390f00bd294..67bf866a2cb6 100644
--- a/arch/arm/plat-mxc/devices/platform-imx-uart.c
+++ b/arch/arm/mach-imx/devices/platform-imx-uart.c
@@ -6,8 +6,8 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_imx_uart_3irq_data_entry(soc, _id, _hwid, _size)            \
         [_id] = {                                                       \
diff --git a/arch/arm/plat-mxc/devices/platform-imx2-wdt.c b/arch/arm/mach-imx/devices/platform-imx2-wdt.c
index 5e07ef2bf1c4..ec75d6413686 100644
--- a/arch/arm/plat-mxc/devices/platform-imx2-wdt.c
+++ b/arch/arm/mach-imx/devices/platform-imx2-wdt.c
@@ -7,8 +7,9 @@
  * Free Software Foundation.
  */
 #include <asm/sizes.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_imx2_wdt_data_entry_single(soc, _id, _hwid, _size)          \
         {                                                               \
diff --git a/arch/arm/plat-mxc/devices/platform-imx21-hcd.c b/arch/arm/mach-imx/devices/platform-imx21-hcd.c
index 5770a42f33bf..30c81616a9a1 100644
--- a/arch/arm/plat-mxc/devices/platform-imx21-hcd.c
+++ b/arch/arm/mach-imx/devices/platform-imx21-hcd.c
@@ -6,8 +6,8 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_imx21_hcd_data_entry_single(soc)                            \
         {                                                               \
diff --git a/arch/arm/plat-mxc/devices/platform-imx27-coda.c b/arch/arm/mach-imx/devices/platform-imx27-coda.c
index 8b12aacdf396..25bebc29e546 100644
--- a/arch/arm/plat-mxc/devices/platform-imx27-coda.c
+++ b/arch/arm/mach-imx/devices/platform-imx27-coda.c
@@ -7,8 +7,8 @@
  * Free Software Foundation.
  */
 
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
 
 #ifdef CONFIG_SOC_IMX27
 const struct imx_imx27_coda_data imx27_coda_data __initconst = {
diff --git a/arch/arm/plat-mxc/devices/platform-imx_udc.c b/arch/arm/mach-imx/devices/platform-imx_udc.c
index 6fd675dfce14..5ced7e4e2c71 100644
--- a/arch/arm/plat-mxc/devices/platform-imx_udc.c
+++ b/arch/arm/mach-imx/devices/platform-imx_udc.c
@@ -6,8 +6,8 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_imx_udc_data_entry_single(soc, _size)                       \
         {                                                               \
diff --git a/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c b/arch/arm/mach-imx/devices/platform-imxdi_rtc.c
index 805336fdc252..5bb490d556ea 100644
--- a/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c
+++ b/arch/arm/mach-imx/devices/platform-imxdi_rtc.c
@@ -7,8 +7,9 @@
  * Free Software Foundation.
  */
 #include <asm/sizes.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_imxdi_rtc_data_entry_single(soc)                            \
         {                                                               \
diff --git a/arch/arm/plat-mxc/devices/platform-ipu-core.c b/arch/arm/mach-imx/devices/platform-ipu-core.c
index d1e33cc6f12e..fc4dd7cedc11 100644
--- a/arch/arm/plat-mxc/devices/platform-ipu-core.c
+++ b/arch/arm/mach-imx/devices/platform-ipu-core.c
@@ -7,8 +7,9 @@
  * Free Software Foundation.
  */
 #include <linux/dma-mapping.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_ipu_core_entry_single(soc)                                  \
 {                                                                       \
diff --git a/arch/arm/plat-mxc/devices/platform-mx1-camera.c b/arch/arm/mach-imx/devices/platform-mx1-camera.c
index edcc581a30a9..2c6788131080 100644
--- a/arch/arm/plat-mxc/devices/platform-mx1-camera.c
+++ b/arch/arm/mach-imx/devices/platform-mx1-camera.c
@@ -6,8 +6,8 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_mx1_camera_data_entry_single(soc, _size)                    \
         {                                                               \
diff --git a/arch/arm/plat-mxc/devices/platform-mx2-camera.c b/arch/arm/mach-imx/devices/platform-mx2-camera.c
index 11eace953a09..f4910160346b 100644
--- a/arch/arm/plat-mxc/devices/platform-mx2-camera.c
+++ b/arch/arm/mach-imx/devices/platform-mx2-camera.c
@@ -6,17 +6,19 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
 
-#define imx_mx2_camera_data_entry_single(soc)                           \
+#define imx_mx2_camera_data_entry_single(soc, _devid)                   \
         {                                                               \
+                .devid = _devid,                                        \
                 .iobasecsi = soc ## _CSI_BASE_ADDR,                     \
                 .iosizecsi = SZ_4K,                                     \
                 .irqcsi = soc ## _INT_CSI,                              \
         }
-#define imx_mx2_camera_data_entry_single_emma(soc)                      \
+#define imx_mx2_camera_data_entry_single_emma(soc, _devid)              \
         {                                                               \
+                .devid = _devid,                                        \
                 .iobasecsi = soc ## _CSI_BASE_ADDR,                     \
                 .iosizecsi = SZ_32,                                     \
                 .irqcsi = soc ## _INT_CSI,                              \
@@ -27,12 +29,12 @@
 
 #ifdef CONFIG_SOC_IMX25
 const struct imx_mx2_camera_data imx25_mx2_camera_data __initconst =
-        imx_mx2_camera_data_entry_single(MX25);
+        imx_mx2_camera_data_entry_single(MX25, "imx25-camera");
 #endif /* ifdef CONFIG_SOC_IMX25 */
 
 #ifdef CONFIG_SOC_IMX27
 const struct imx_mx2_camera_data imx27_mx2_camera_data __initconst =
-        imx_mx2_camera_data_entry_single_emma(MX27);
+        imx_mx2_camera_data_entry_single_emma(MX27, "imx27-camera");
 #endif /* ifdef CONFIG_SOC_IMX27 */
 
 struct platform_device *__init imx_add_mx2_camera(
@@ -58,7 +60,7 @@ struct platform_device *__init imx_add_mx2_camera(
                         .flags = IORESOURCE_IRQ,
                 },
         };
-        return imx_add_platform_device_dmamask("mx2-camera", 0,
+        return imx_add_platform_device_dmamask(data->devid, 0,
                         res, data->iobaseemmaprp ? 4 : 2,
                         pdata, sizeof(*pdata), DMA_BIT_MASK(32));
 }
diff --git a/arch/arm/plat-mxc/devices/platform-mxc-ehci.c b/arch/arm/mach-imx/devices/platform-mxc-ehci.c
index 35851d889aca..5d4bbbfde641 100644
--- a/arch/arm/plat-mxc/devices/platform-mxc-ehci.c
+++ b/arch/arm/mach-imx/devices/platform-mxc-ehci.c
@@ -7,8 +7,9 @@
  * Free Software Foundation.
  */
 #include <linux/dma-mapping.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_mxc_ehci_data_entry_single(soc, _id, hs)                    \
         {                                                               \
diff --git a/arch/arm/plat-mxc/devices/platform-mxc-mmc.c b/arch/arm/mach-imx/devices/platform-mxc-mmc.c
index e7b920b58675..b8203c760c8f 100644
--- a/arch/arm/plat-mxc/devices/platform-mxc-mmc.c
+++ b/arch/arm/mach-imx/devices/platform-mxc-mmc.c
@@ -7,24 +7,26 @@
  * Free Software Foundation.
  */
 #include <linux/dma-mapping.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
 
-#define imx_mxc_mmc_data_entry_single(soc, _id, _hwid, _size)           \
+#include "../hardware.h"
+#include "devices-common.h"
+
+#define imx_mxc_mmc_data_entry_single(soc, _devid, _id, _hwid, _size)   \
         {                                                               \
+                .devid = _devid,                                        \
                 .id = _id,                                              \
                 .iobase = soc ## _SDHC ## _hwid ## _BASE_ADDR,          \
                 .iosize = _size,                                        \
                 .irq = soc ## _INT_SDHC ## _hwid,                       \
                 .dmareq = soc ## _DMA_REQ_SDHC ## _hwid,                \
         }
-#define imx_mxc_mmc_data_entry(soc, _id, _hwid, _size)                  \
-        [_id] = imx_mxc_mmc_data_entry_single(soc, _id, _hwid, _size)
+#define imx_mxc_mmc_data_entry(soc, _devid, _id, _hwid, _size)          \
+        [_id] = imx_mxc_mmc_data_entry_single(soc, _devid, _id, _hwid, _size)
 
 #ifdef CONFIG_SOC_IMX21
 const struct imx_mxc_mmc_data imx21_mxc_mmc_data[] __initconst = {
 #define imx21_mxc_mmc_data_entry(_id, _hwid)                            \
-        imx_mxc_mmc_data_entry(MX21, _id, _hwid, SZ_4K)
+        imx_mxc_mmc_data_entry(MX21, "imx21-mmc", _id, _hwid, SZ_4K)
         imx21_mxc_mmc_data_entry(0, 1),
         imx21_mxc_mmc_data_entry(1, 2),
 };
@@ -33,7 +35,7 @@ const struct imx_mxc_mmc_data imx21_mxc_mmc_data[] __initconst = {
 #ifdef CONFIG_SOC_IMX27
 const struct imx_mxc_mmc_data imx27_mxc_mmc_data[] __initconst = {
 #define imx27_mxc_mmc_data_entry(_id, _hwid)                            \
-        imx_mxc_mmc_data_entry(MX27, _id, _hwid, SZ_4K)
+        imx_mxc_mmc_data_entry(MX27, "imx21-mmc", _id, _hwid, SZ_4K)
         imx27_mxc_mmc_data_entry(0, 1),
         imx27_mxc_mmc_data_entry(1, 2),
 };
@@ -42,7 +44,7 @@ const struct imx_mxc_mmc_data imx27_mxc_mmc_data[] __initconst = {
 #ifdef CONFIG_SOC_IMX31
 const struct imx_mxc_mmc_data imx31_mxc_mmc_data[] __initconst = {
 #define imx31_mxc_mmc_data_entry(_id, _hwid)                            \
-        imx_mxc_mmc_data_entry(MX31, _id, _hwid, SZ_16K)
+        imx_mxc_mmc_data_entry(MX31, "imx31-mmc", _id, _hwid, SZ_16K)
         imx31_mxc_mmc_data_entry(0, 1),
         imx31_mxc_mmc_data_entry(1, 2),
 };
@@ -67,7 +69,7 @@ struct platform_device *__init imx_add_mxc_mmc(
                         .flags = IORESOURCE_DMA,
                 },
         };
-        return imx_add_platform_device_dmamask("mxc-mmc", data->id,
+        return imx_add_platform_device_dmamask(data->devid, data->id,
                         res, ARRAY_SIZE(res),
                         pdata, sizeof(*pdata), DMA_BIT_MASK(32));
 }
diff --git a/arch/arm/plat-mxc/devices/platform-mxc_nand.c b/arch/arm/mach-imx/devices/platform-mxc_nand.c
index 95b75cc70515..7af1c53e42b5 100644
--- a/arch/arm/plat-mxc/devices/platform-mxc_nand.c
+++ b/arch/arm/mach-imx/devices/platform-mxc_nand.c
@@ -7,18 +7,21 @@
  * Free Software Foundation.
  */
 #include <asm/sizes.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
 
-#define imx_mxc_nand_data_entry_single(soc, _size)                      \
+#include "../hardware.h"
+#include "devices-common.h"
+
+#define imx_mxc_nand_data_entry_single(soc, _devid, _size)              \
         {                                                               \
+                .devid = _devid,                                        \
                 .iobase = soc ## _NFC_BASE_ADDR,                        \
                 .iosize = _size,                                        \
                 .irq = soc ## _INT_NFC                                  \
         }
 
-#define imx_mxc_nandv3_data_entry_single(soc, _size)                    \
+#define imx_mxc_nandv3_data_entry_single(soc, _devid, _size)            \
         {                                                               \
+                .devid = _devid,                                        \
                 .id = -1,                                               \
                 .iobase = soc ## _NFC_BASE_ADDR,                        \
                 .iosize = _size,                                        \
@@ -28,32 +31,32 @@
 
 #ifdef CONFIG_SOC_IMX21
 const struct imx_mxc_nand_data imx21_mxc_nand_data __initconst =
-        imx_mxc_nand_data_entry_single(MX21, SZ_4K);
+        imx_mxc_nand_data_entry_single(MX21, "imx21-nand", SZ_4K);
 #endif /* ifdef CONFIG_SOC_IMX21 */
 
 #ifdef CONFIG_SOC_IMX25
 const struct imx_mxc_nand_data imx25_mxc_nand_data __initconst =
-        imx_mxc_nand_data_entry_single(MX25, SZ_8K);
+        imx_mxc_nand_data_entry_single(MX25, "imx25-nand", SZ_8K);
 #endif /* ifdef CONFIG_SOC_IMX25 */
 
 #ifdef CONFIG_SOC_IMX27
 const struct imx_mxc_nand_data imx27_mxc_nand_data __initconst =
-        imx_mxc_nand_data_entry_single(MX27, SZ_4K);
+        imx_mxc_nand_data_entry_single(MX27, "imx27-nand", SZ_4K);
 #endif /* ifdef CONFIG_SOC_IMX27 */
 
 #ifdef CONFIG_SOC_IMX31
 const struct imx_mxc_nand_data imx31_mxc_nand_data __initconst =
-        imx_mxc_nand_data_entry_single(MX31, SZ_4K);
+        imx_mxc_nand_data_entry_single(MX31, "imx27-nand", SZ_4K);
 #endif
 
 #ifdef CONFIG_SOC_IMX35
 const struct imx_mxc_nand_data imx35_mxc_nand_data __initconst =
-        imx_mxc_nand_data_entry_single(MX35, SZ_8K);
+        imx_mxc_nand_data_entry_single(MX35, "imx25-nand", SZ_8K);
 #endif
 
 #ifdef CONFIG_SOC_IMX51
 const struct imx_mxc_nand_data imx51_mxc_nand_data __initconst =
-        imx_mxc_nandv3_data_entry_single(MX51, SZ_16K);
+        imx_mxc_nandv3_data_entry_single(MX51, "imx51-nand", SZ_16K);
 #endif
 
 struct platform_device *__init imx_add_mxc_nand(
@@ -76,7 +79,7 @@ struct platform_device *__init imx_add_mxc_nand(
                         .flags = IORESOURCE_MEM,
                 },
         };
-        return imx_add_platform_device("mxc_nand", data->id,
+        return imx_add_platform_device(data->devid, data->id,
                         res, ARRAY_SIZE(res) - !data->axibase,
                         pdata, sizeof(*pdata));
 }
diff --git a/arch/arm/plat-mxc/devices/platform-mxc_pwm.c b/arch/arm/mach-imx/devices/platform-mxc_pwm.c
index b0c4ae298111..dcd289777687 100644
--- a/arch/arm/plat-mxc/devices/platform-mxc_pwm.c
+++ b/arch/arm/mach-imx/devices/platform-mxc_pwm.c
@@ -6,8 +6,8 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_mxc_pwm_data_entry_single(soc, _id, _hwid, _size)           \
         {                                                               \
diff --git a/arch/arm/plat-mxc/devices/platform-mxc_rnga.c b/arch/arm/mach-imx/devices/platform-mxc_rnga.c
index b4b7612b6e17..c58404badb59 100644
--- a/arch/arm/plat-mxc/devices/platform-mxc_rnga.c
+++ b/arch/arm/mach-imx/devices/platform-mxc_rnga.c
@@ -6,8 +6,8 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
 
 struct imx_mxc_rnga_data {
         resource_size_t iobase;
diff --git a/arch/arm/plat-mxc/devices/platform-mxc_rtc.c b/arch/arm/mach-imx/devices/platform-mxc_rtc.c
index a5c9ad5721c2..c7fffaadf847 100644
--- a/arch/arm/plat-mxc/devices/platform-mxc_rtc.c
+++ b/arch/arm/mach-imx/devices/platform-mxc_rtc.c
@@ -6,23 +6,24 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
 
-#define imx_mxc_rtc_data_entry_single(soc)                              \
+#define imx_mxc_rtc_data_entry_single(soc, _devid)                      \
         {                                                               \
+                .devid = _devid,                                        \
                 .iobase = soc ## _RTC_BASE_ADDR,                        \
                 .irq = soc ## _INT_RTC,                                 \
         }
 
 #ifdef CONFIG_SOC_IMX31
 const struct imx_mxc_rtc_data imx31_mxc_rtc_data __initconst =
-        imx_mxc_rtc_data_entry_single(MX31);
+        imx_mxc_rtc_data_entry_single(MX31, "imx21-rtc");
 #endif /* ifdef CONFIG_SOC_IMX31 */
 
 #ifdef CONFIG_SOC_IMX35
 const struct imx_mxc_rtc_data imx35_mxc_rtc_data __initconst =
-        imx_mxc_rtc_data_entry_single(MX35);
+        imx_mxc_rtc_data_entry_single(MX35, "imx21-rtc");
 #endif /* ifdef CONFIG_SOC_IMX35 */
 
 struct platform_device *__init imx_add_mxc_rtc(
@@ -40,6 +41,6 @@ struct platform_device *__init imx_add_mxc_rtc(
                 },
         };
 
-        return imx_add_platform_device("mxc_rtc", -1,
+        return imx_add_platform_device(data->devid, -1,
                         res, ARRAY_SIZE(res), NULL, 0);
 }
diff --git a/arch/arm/plat-mxc/devices/platform-mxc_w1.c b/arch/arm/mach-imx/devices/platform-mxc_w1.c
index 96fa5ea91fe8..88c18b720d63 100644
--- a/arch/arm/plat-mxc/devices/platform-mxc_w1.c
+++ b/arch/arm/mach-imx/devices/platform-mxc_w1.c
@@ -6,8 +6,8 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_mxc_w1_data_entry_single(soc)                               \
         {                                                               \
diff --git a/arch/arm/plat-mxc/devices/platform-pata_imx.c b/arch/arm/mach-imx/devices/platform-pata_imx.c
index 70e2f2a44714..e4ec11c8ce55 100644
--- a/arch/arm/plat-mxc/devices/platform-pata_imx.c
+++ b/arch/arm/mach-imx/devices/platform-pata_imx.c
@@ -3,8 +3,8 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_pata_imx_data_entry_single(soc, _size)                      \
         {                                                               \
diff --git a/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c b/arch/arm/mach-imx/devices/platform-sdhci-esdhc-imx.c
index 3793e475cd95..e66a4e316311 100644
--- a/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c
+++ b/arch/arm/mach-imx/devices/platform-sdhci-esdhc-imx.c
@@ -6,10 +6,11 @@
  * Free Software Foundation.
  */
 
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
 #include <linux/platform_data/mmc-esdhc-imx.h>
 
+#include "../hardware.h"
+#include "devices-common.h"
+
 #define imx_sdhci_esdhc_imx_data_entry_single(soc, _devid, _id, hwid) \
         {                                                               \
                 .devid = _devid,                                        \
diff --git a/arch/arm/plat-mxc/devices/platform-spi_imx.c b/arch/arm/mach-imx/devices/platform-spi_imx.c
index 9c50c14c8f92..8880bcb11e05 100644
--- a/arch/arm/plat-mxc/devices/platform-spi_imx.c
+++ b/arch/arm/mach-imx/devices/platform-spi_imx.c
@@ -6,8 +6,8 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_spi_imx_data_entry_single(soc, type, _devid, _id, hwid, _size) \
         {                                                               \
diff --git a/arch/arm/mach-imx/ehci-imx25.c b/arch/arm/mach-imx/ehci-imx25.c
index 576af7446952..134c190e3003 100644
--- a/arch/arm/mach-imx/ehci-imx25.c
+++ b/arch/arm/mach-imx/ehci-imx25.c
@@ -15,10 +15,10 @@
 
 #include <linux/platform_device.h>
 #include <linux/io.h>
-
-#include <mach/hardware.h>
 #include <linux/platform_data/usb-ehci-mxc.h>
 
+#include "hardware.h"
+
 #define USBCTRL_OTGBASE_OFFSET  0x600
 
 #define MX25_OTG_SIC_SHIFT      29
diff --git a/arch/arm/mach-imx/ehci-imx27.c b/arch/arm/mach-imx/ehci-imx27.c
index cd6e1f81508d..448d9115539d 100644
--- a/arch/arm/mach-imx/ehci-imx27.c
+++ b/arch/arm/mach-imx/ehci-imx27.c
@@ -15,10 +15,10 @@
 
 #include <linux/platform_device.h>
 #include <linux/io.h>
-
-#include <mach/hardware.h>
 #include <linux/platform_data/usb-ehci-mxc.h>
 
+#include "hardware.h"
+
 #define USBCTRL_OTGBASE_OFFSET  0x600
 
 #define MX27_OTG_SIC_SHIFT      29
diff --git a/arch/arm/mach-imx/ehci-imx31.c b/arch/arm/mach-imx/ehci-imx31.c
index 9a880c78af34..05de4e1e39d7 100644
--- a/arch/arm/mach-imx/ehci-imx31.c
+++ b/arch/arm/mach-imx/ehci-imx31.c
@@ -15,10 +15,10 @@
 
 #include <linux/platform_device.h>
 #include <linux/io.h>
-
-#include <mach/hardware.h>
 #include <linux/platform_data/usb-ehci-mxc.h>
 
+#include "hardware.h"
+
 #define USBCTRL_OTGBASE_OFFSET  0x600
 
 #define MX31_OTG_SIC_SHIFT      29
diff --git a/arch/arm/mach-imx/ehci-imx35.c b/arch/arm/mach-imx/ehci-imx35.c
index 293397852e4e..554e7cccff53 100644
--- a/arch/arm/mach-imx/ehci-imx35.c
+++ b/arch/arm/mach-imx/ehci-imx35.c
@@ -15,10 +15,10 @@
 
 #include <linux/platform_device.h>
 #include <linux/io.h>
-
-#include <mach/hardware.h>
 #include <linux/platform_data/usb-ehci-mxc.h>
 
+#include "hardware.h"
+
 #define USBCTRL_OTGBASE_OFFSET  0x600
 
 #define MX35_OTG_SIC_SHIFT      29
diff --git a/arch/arm/mach-imx/ehci-imx5.c b/arch/arm/mach-imx/ehci-imx5.c
index cf8d00e5cce1..e49710b10c68 100644
--- a/arch/arm/mach-imx/ehci-imx5.c
+++ b/arch/arm/mach-imx/ehci-imx5.c
@@ -15,10 +15,10 @@
 
 #include <linux/platform_device.h>
 #include <linux/io.h>
-
-#include <mach/hardware.h>
 #include <linux/platform_data/usb-ehci-mxc.h>
 
+#include "hardware.h"
+
 #define MXC_OTG_OFFSET                  0
 #define MXC_H1_OFFSET                   0x200
 #define MXC_H2_OFFSET                   0x400
diff --git a/arch/arm/plat-mxc/epit.c b/arch/arm/mach-imx/epit.c
index 88726f4dbbfa..04a5961beeac 100644
--- a/arch/arm/plat-mxc/epit.c
+++ b/arch/arm/mach-imx/epit.c
@@ -51,10 +51,10 @@
 #include <linux/clockchips.h>
 #include <linux/clk.h>
 #include <linux/err.h>
-
-#include <mach/hardware.h>
 #include <asm/mach/time.h>
-#include <mach/common.h>
+
+#include "common.h"
+#include "hardware.h"
 
 static struct clock_event_device clockevent_epit;
 static enum clock_event_mode clockevent_mode = CLOCK_EVT_MODE_UNUSED;
diff --git a/arch/arm/plat-mxc/include/mach/eukrea-baseboards.h b/arch/arm/mach-imx/eukrea-baseboards.h
index a21d3313f994..a21d3313f994 100644
--- a/arch/arm/plat-mxc/include/mach/eukrea-baseboards.h
+++ b/arch/arm/mach-imx/eukrea-baseboards.h
diff --git a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c
index 98aef571b9f8..b4c70028d359 100644
--- a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c
@@ -29,11 +29,10 @@
 
 #include <asm/mach/arch.h>
 
-#include <mach/common.h>
-#include <mach/iomux-mx27.h>
-#include <mach/hardware.h>
-
+#include "common.h"
 #include "devices-imx27.h"
+#include "hardware.h"
+#include "iomux-mx27.h"
 
 static const int eukrea_mbimx27_pins[] __initconst = {
         /* UART2 */
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
index 0b84666792f0..e2b70f4c1a2c 100644
--- a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
@@ -26,14 +26,14 @@
 #include <linux/spi/spi.h>
 #include <video/platform_lcd.h>
 
-#include <mach/hardware.h>
-#include <mach/iomux-mx25.h>
-#include <mach/common.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
-#include <mach/mx25.h>
 
+#include "common.h"
 #include "devices-imx25.h"
+#include "hardware.h"
+#include "iomux-mx25.h"
+#include "mx25.h"
 
 static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = {
         /* LCD */
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c
index c6532a007d46..5a2d5ef12dd5 100644
--- a/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c
@@ -36,11 +36,10 @@
 #include <asm/mach/time.h>
 #include <asm/mach/map.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx35.h>
-
+#include "common.h"
 #include "devices-imx35.h"
+#include "hardware.h"
+#include "iomux-mx35.h"
 
 static const struct fb_videomode fb_modedb[] = {
         {
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c
index 8b0de30d7a3f..9be6c1e69d68 100644
--- a/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c
@@ -36,11 +36,10 @@
 #include <asm/mach/time.h>
 #include <asm/mach/map.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx51.h>
-
+#include "common.h"
 #include "devices-imx51.h"
+#include "hardware.h"
+#include "iomux-mx51.h"
 
 static iomux_v3_cfg_t eukrea_mbimxsd51_pads[] = {
         /* LED */
diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/mach-imx/hardware.h
index ebf10654bb42..3ce7fa3bd43f 100644
--- a/arch/arm/plat-mxc/include/mach/hardware.h
+++ b/arch/arm/mach-imx/hardware.h
@@ -105,20 +105,20 @@
 
 #define IMX_IO_ADDRESS(x)       IOMEM(IMX_IO_P2V(x))
 
-#include <mach/mxc.h>
+#include "mxc.h"
 
-#include <mach/mx6q.h>
-#include <mach/mx50.h>
-#include <mach/mx51.h>
-#include <mach/mx53.h>
-#include <mach/mx3x.h>
-#include <mach/mx31.h>
-#include <mach/mx35.h>
-#include <mach/mx2x.h>
-#include <mach/mx21.h>
-#include <mach/mx27.h>
-#include <mach/mx1.h>
-#include <mach/mx25.h>
+#include "mx6q.h"
+#include "mx50.h"
+#include "mx51.h"
+#include "mx53.h"
+#include "mx3x.h"
+#include "mx31.h"
+#include "mx35.h"
+#include "mx2x.h"
+#include "mx21.h"
+#include "mx27.h"
+#include "mx1.h"
+#include "mx25.h"
 
 #define imx_map_entry(soc, name, _type) {                               \
         .virtual = soc ## _IO_P2V(soc ## _ ## name ## _BASE_ADDR),      \
diff --git a/arch/arm/mach-imx/hotplug.c b/arch/arm/mach-imx/hotplug.c
index b07b778dc9a8..3dec962b0770 100644
--- a/arch/arm/mach-imx/hotplug.c
+++ b/arch/arm/mach-imx/hotplug.c
@@ -13,7 +13,8 @@
 #include <linux/errno.h>
 #include <asm/cacheflush.h>
 #include <asm/cp15.h>
-#include <mach/common.h>
+
+#include "common.h"
 
 static inline void cpu_enter_lowpower(void)
 {
diff --git a/arch/arm/plat-mxc/include/mach/iim.h b/arch/arm/mach-imx/iim.h
index 315bffadafda..315bffadafda 100644
--- a/arch/arm/plat-mxc/include/mach/iim.h
+++ b/arch/arm/mach-imx/iim.h
diff --git a/arch/arm/mach-imx/imx25-dt.c b/arch/arm/mach-imx/imx25-dt.c
new file mode 100644
index 000000000000..e17dfbc42192
--- /dev/null
+++ b/arch/arm/mach-imx/imx25-dt.c
@@ -0,0 +1,48 @@
+/*
+ * Copyright 2012 Sascha Hauer, Pengutronix
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <linux/irq.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/time.h>
+#include "common.h"
+#include "mx25.h"
+
+static void __init imx25_dt_init(void)
+{
+        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+}
+
+static void __init imx25_timer_init(void)
+{
+        mx25_clocks_init_dt();
+}
+
+static struct sys_timer imx25_timer = {
+        .init = imx25_timer_init,
+};
+
+static const char * const imx25_dt_board_compat[] __initconst = {
+        "fsl,imx25",
+        NULL
+};
+
+DT_MACHINE_START(IMX25_DT, "Freescale i.MX25 (Device Tree Support)")
+        .map_io         = mx25_map_io,
+        .init_early     = imx25_init_early,
+        .init_irq       = mx25_init_irq,
+        .handle_irq     = imx25_handle_irq,
+        .timer          = &imx25_timer,
+        .init_machine   = imx25_dt_init,
+        .dt_compat      = imx25_dt_board_compat,
+        .restart        = mxc_restart,
+MACHINE_END
diff --git a/arch/arm/mach-imx/imx27-dt.c b/arch/arm/mach-imx/imx27-dt.c
index e80d5235dac0..ebfae96543c4 100644
--- a/arch/arm/mach-imx/imx27-dt.c
+++ b/arch/arm/mach-imx/imx27-dt.c
@@ -14,21 +14,22 @@
 #include <linux/of_platform.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
-#include <mach/common.h>
-#include <mach/mx27.h>
+
+#include "common.h"
+#include "mx27.h"
 
 static const struct of_dev_auxdata imx27_auxdata_lookup[] __initconst = {
         OF_DEV_AUXDATA("fsl,imx27-uart", MX27_UART1_BASE_ADDR, "imx21-uart.0", NULL),
         OF_DEV_AUXDATA("fsl,imx27-uart", MX27_UART2_BASE_ADDR, "imx21-uart.1", NULL),
         OF_DEV_AUXDATA("fsl,imx27-uart", MX27_UART3_BASE_ADDR, "imx21-uart.2", NULL),
         OF_DEV_AUXDATA("fsl,imx27-fec", MX27_FEC_BASE_ADDR, "imx27-fec.0", NULL),
-        OF_DEV_AUXDATA("fsl,imx27-i2c", MX27_I2C1_BASE_ADDR, "imx-i2c.0", NULL),
-        OF_DEV_AUXDATA("fsl,imx27-i2c", MX27_I2C2_BASE_ADDR, "imx-i2c.1", NULL),
+        OF_DEV_AUXDATA("fsl,imx27-i2c", MX27_I2C1_BASE_ADDR, "imx21-i2c.0", NULL),
+        OF_DEV_AUXDATA("fsl,imx27-i2c", MX27_I2C2_BASE_ADDR, "imx21-i2c.1", NULL),
         OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI1_BASE_ADDR, "imx27-cspi.0", NULL),
         OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI2_BASE_ADDR, "imx27-cspi.1", NULL),
         OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI3_BASE_ADDR, "imx27-cspi.2", NULL),
         OF_DEV_AUXDATA("fsl,imx27-wdt", MX27_WDOG_BASE_ADDR, "imx2-wdt.0", NULL),
-        OF_DEV_AUXDATA("fsl,imx27-nand", MX27_NFC_BASE_ADDR, "mxc_nand.0", NULL),
+        OF_DEV_AUXDATA("fsl,imx27-nand", MX27_NFC_BASE_ADDR, "imx27-nand.0", NULL),
         { /* sentinel */ }
 };
 
diff --git a/arch/arm/mach-imx/imx31-dt.c b/arch/arm/mach-imx/imx31-dt.c
index a68ba207b2b7..af476de2570e 100644
--- a/arch/arm/mach-imx/imx31-dt.c
+++ b/arch/arm/mach-imx/imx31-dt.c
@@ -14,8 +14,9 @@
 #include <linux/of_platform.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
-#include <mach/common.h>
-#include <mach/mx31.h>
+
+#include "common.h"
+#include "mx31.h"
 
 static const struct of_dev_auxdata imx31_auxdata_lookup[] __initconst = {
         OF_DEV_AUXDATA("fsl,imx31-uart", MX31_UART1_BASE_ADDR,
diff --git a/arch/arm/mach-imx/imx51-dt.c b/arch/arm/mach-imx/imx51-dt.c
index f233b4bb2342..50742990a136 100644
--- a/arch/arm/mach-imx/imx51-dt.c
+++ b/arch/arm/mach-imx/imx51-dt.c
@@ -15,8 +15,9 @@
 #include <linux/of_platform.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
-#include <mach/common.h>
-#include <mach/mx51.h>
+
+#include "common.h"
+#include "mx51.h"
 
 /*
  * Lookup table for attaching a specific name and platform_data pointer to
@@ -36,8 +37,8 @@ static const struct of_dev_auxdata imx51_auxdata_lookup[] __initconst = {
         OF_DEV_AUXDATA("fsl,imx51-ecspi", MX51_ECSPI1_BASE_ADDR, "imx51-ecspi.0", NULL),
         OF_DEV_AUXDATA("fsl,imx51-ecspi", MX51_ECSPI2_BASE_ADDR, "imx51-ecspi.1", NULL),
         OF_DEV_AUXDATA("fsl,imx51-cspi", MX51_CSPI_BASE_ADDR, "imx35-cspi.0", NULL),
-        OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C1_BASE_ADDR, "imx-i2c.0", NULL),
-        OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C2_BASE_ADDR, "imx-i2c.1", NULL),
+        OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C1_BASE_ADDR, "imx21-i2c.0", NULL),
+        OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C2_BASE_ADDR, "imx21-i2c.1", NULL),
         OF_DEV_AUXDATA("fsl,imx51-sdma", MX51_SDMA_BASE_ADDR, "imx35-sdma", NULL),
         OF_DEV_AUXDATA("fsl,imx51-wdt", MX51_WDOG1_BASE_ADDR, "imx2-wdt.0", NULL),
         { /* sentinel */ }
diff --git a/arch/arm/mach-imx/include/mach/dma-mx1-mx2.h b/arch/arm/mach-imx/include/mach/dma-mx1-mx2.h
deleted file mode 100644
index df5f522da6b3..000000000000
--- a/arch/arm/mach-imx/include/mach/dma-mx1-mx2.h
+++ /dev/null
@@ -1,10 +0,0 @@
-#ifndef __MACH_DMA_MX1_MX2_H__
-#define __MACH_DMA_MX1_MX2_H__
-/*
- * Don't use this header in new code, it will go away when all users are
- * converted to mach/dma-v1.h
- */
-
-#include <mach/dma-v1.h>
-
-#endif /* ifndef __MACH_DMA_MX1_MX2_H__ */
diff --git a/arch/arm/mach-imx/iomux-imx31.c b/arch/arm/mach-imx/iomux-imx31.c
index 82bd4403b450..cabefbc5e7c1 100644
--- a/arch/arm/mach-imx/iomux-imx31.c
+++ b/arch/arm/mach-imx/iomux-imx31.c
@@ -22,8 +22,9 @@
 #include <linux/spinlock.h>
 #include <linux/io.h>
 #include <linux/kernel.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx3.h>
+
+#include "hardware.h"
+#include "iomux-mx3.h"
 
 /*
  * IOMUX register (base) addresses
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx1.h b/arch/arm/mach-imx/iomux-mx1.h
index 6b1507cf378e..95f4681d85d7 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx1.h
+++ b/arch/arm/mach-imx/iomux-mx1.h
@@ -18,7 +18,7 @@
 #ifndef __MACH_IOMUX_MX1_H__
 #define __MACH_IOMUX_MX1_H__
 
-#include <mach/iomux-v1.h>
+#include "iomux-v1.h"
 
 #define PA0_AIN_SPI2_CLK        (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 0)
 #define PA0_AF_ETMTRACESYNC     (GPIO_PORTA | GPIO_AF | 0)
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx21.h b/arch/arm/mach-imx/iomux-mx21.h
index 1495dfda7834..a70cffceb085 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx21.h
+++ b/arch/arm/mach-imx/iomux-mx21.h
@@ -18,8 +18,8 @@
 #ifndef __MACH_IOMUX_MX21_H__
 #define __MACH_IOMUX_MX21_H__
 
-#include <mach/iomux-mx2x.h>
-#include <mach/iomux-v1.h>
+#include "iomux-mx2x.h"
+#include "iomux-v1.h"
 
 /* Primary GPIO pin functions */
 
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx25.h b/arch/arm/mach-imx/iomux-mx25.h
index c61ec0fc10d4..be51e838375c 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx25.h
+++ b/arch/arm/mach-imx/iomux-mx25.h
@@ -19,7 +19,7 @@
 #ifndef __MACH_IOMUX_MX25_H__
 #define __MACH_IOMUX_MX25_H__
 
-#include <mach/iomux-v3.h>
+#include "iomux-v3.h"
 
 /*
  * IOMUX/PAD Bit field definitions
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx27.h b/arch/arm/mach-imx/iomux-mx27.h
index d9f9a6e32d80..218e99e89e86 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx27.h
+++ b/arch/arm/mach-imx/iomux-mx27.h
@@ -19,8 +19,8 @@
 #ifndef __MACH_IOMUX_MX27_H__
 #define __MACH_IOMUX_MX27_H__
 
-#include <mach/iomux-mx2x.h>
-#include <mach/iomux-v1.h>
+#include "iomux-mx2x.h"
+#include "iomux-v1.h"
 
 /* Primary GPIO pin functions */
 
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx2x.h b/arch/arm/mach-imx/iomux-mx2x.h
index 7a9b20abda09..7a9b20abda09 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx2x.h
+++ b/arch/arm/mach-imx/iomux-mx2x.h
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx3.h b/arch/arm/mach-imx/iomux-mx3.h
index f79f78a1c0ed..f79f78a1c0ed 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx3.h
+++ b/arch/arm/mach-imx/iomux-mx3.h
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx35.h b/arch/arm/mach-imx/iomux-mx35.h
index 3117c18bbbd9..90bfa6b5be6a 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx35.h
+++ b/arch/arm/mach-imx/iomux-mx35.h
@@ -19,7 +19,7 @@
 #ifndef __MACH_IOMUX_MX35_H__
 #define __MACH_IOMUX_MX35_H__
 
-#include <mach/iomux-v3.h>
+#include "iomux-v3.h"
 
 /*
  * The naming convention for the pad modes is MX35_PAD_<padname>__<padmode>
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx50.h b/arch/arm/mach-imx/iomux-mx50.h
index 98e7fd0b9083..00f56e0e8009 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx50.h
+++ b/arch/arm/mach-imx/iomux-mx50.h
@@ -19,7 +19,7 @@
 #ifndef __MACH_IOMUX_MX50_H__
 #define __MACH_IOMUX_MX50_H__
 
-#include <mach/iomux-v3.h>
+#include "iomux-v3.h"
 
 #define MX50_ELCDIF_PAD_CTRL    (PAD_CTL_PKE | PAD_CTL_DSE_HIGH)
 
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx51.h b/arch/arm/mach-imx/iomux-mx51.h
index 2623e7a2e190..75bbcc4aa2d2 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx51.h
+++ b/arch/arm/mach-imx/iomux-mx51.h
@@ -13,7 +13,7 @@
 #ifndef __MACH_IOMUX_MX51_H__
 #define __MACH_IOMUX_MX51_H__
 
-#include <mach/iomux-v3.h>
+#include "iomux-v3.h"
 #define __NA_   0x000
 
 
diff --git a/arch/arm/plat-mxc/iomux-v1.c b/arch/arm/mach-imx/iomux-v1.c
index 1f73963bc13e..2b156d1d9e21 100644
--- a/arch/arm/plat-mxc/iomux-v1.c
+++ b/arch/arm/mach-imx/iomux-v1.c
@@ -28,9 +28,10 @@
 #include <linux/string.h>
 #include <linux/gpio.h>
 
-#include <mach/hardware.h>
 #include <asm/mach/map.h>
-#include <mach/iomux-v1.h>
+
+#include "hardware.h"
+#include "iomux-v1.h"
 
 static void __iomem *imx_iomuxv1_baseaddr;
 static unsigned imx_iomuxv1_numports;
diff --git a/arch/arm/plat-mxc/include/mach/iomux-v1.h b/arch/arm/mach-imx/iomux-v1.h
index 02651a40fe23..02651a40fe23 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-v1.h
+++ b/arch/arm/mach-imx/iomux-v1.h
diff --git a/arch/arm/plat-mxc/iomux-v3.c b/arch/arm/mach-imx/iomux-v3.c
index 99a9cdb9d6be..9dae74bf47fc 100644
--- a/arch/arm/plat-mxc/iomux-v3.c
+++ b/arch/arm/mach-imx/iomux-v3.c
@@ -25,9 +25,10 @@
 #include <linux/string.h>
 #include <linux/gpio.h>
 
-#include <mach/hardware.h>
 #include <asm/mach/map.h>
-#include <mach/iomux-v3.h>
+
+#include "hardware.h"
+#include "iomux-v3.h"
 
 static void __iomem *base;
 
diff --git a/arch/arm/plat-mxc/include/mach/iomux-v3.h b/arch/arm/mach-imx/iomux-v3.h
index 2fa3b5430102..2fa3b5430102 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-v3.h
+++ b/arch/arm/mach-imx/iomux-v3.h
diff --git a/arch/arm/plat-mxc/include/mach/iram.h b/arch/arm/mach-imx/iram.h
index 022690c33702..022690c33702 100644
--- a/arch/arm/plat-mxc/include/mach/iram.h
+++ b/arch/arm/mach-imx/iram.h
diff --git a/arch/arm/plat-mxc/iram_alloc.c b/arch/arm/mach-imx/iram_alloc.c
index 074c3869626a..6c80424f678e 100644
--- a/arch/arm/plat-mxc/iram_alloc.c
+++ b/arch/arm/mach-imx/iram_alloc.c
@@ -22,7 +22,8 @@
 #include <linux/module.h>
 #include <linux/spinlock.h>
 #include <linux/genalloc.h>
-#include <mach/iram.h>
+
+#include "iram.h"
 
 static unsigned long iram_phys_base;
 static void __iomem *iram_virt_base;
diff --git a/arch/arm/plat-mxc/irq-common.c b/arch/arm/mach-imx/irq-common.c
index b6e11458e5ae..b6e11458e5ae 100644
--- a/arch/arm/plat-mxc/irq-common.c
+++ b/arch/arm/mach-imx/irq-common.c
diff --git a/arch/arm/plat-mxc/irq-common.h b/arch/arm/mach-imx/irq-common.h
index 6ccb3a14c693..5b2dabba330f 100644
--- a/arch/arm/plat-mxc/irq-common.h
+++ b/arch/arm/mach-imx/irq-common.h
@@ -19,6 +19,9 @@
 #ifndef __PLAT_MXC_IRQ_COMMON_H__
 #define __PLAT_MXC_IRQ_COMMON_H__
 
+/* all normal IRQs can be FIQs */
+#define FIQ_START       0
+
 struct mxc_extra_irq
 {
         int (*set_priority)(unsigned char irq, unsigned char prio);
diff --git a/arch/arm/mach-imx/lluart.c b/arch/arm/mach-imx/lluart.c
index c40a34c00489..2fdc9bf2fb5e 100644
--- a/arch/arm/mach-imx/lluart.c
+++ b/arch/arm/mach-imx/lluart.c
@@ -14,19 +14,28 @@
 #include <asm/page.h>
 #include <asm/sizes.h>
 #include <asm/mach/map.h>
-#include <mach/hardware.h>
+
+#include "hardware.h"
+
+#define IMX6Q_UART1_BASE_ADDR   0x02020000
+#define IMX6Q_UART2_BASE_ADDR   0x021e8000
+#define IMX6Q_UART3_BASE_ADDR   0x021ec000
+#define IMX6Q_UART4_BASE_ADDR   0x021f0000
+#define IMX6Q_UART5_BASE_ADDR   0x021f4000
+
+/*
+ * IMX6Q_UART_BASE_ADDR is put in the middle to force the expansion
+ * of IMX6Q_UART##n##_BASE_ADDR.
+ */
+#define IMX6Q_UART_BASE_ADDR(n) IMX6Q_UART##n##_BASE_ADDR
+#define IMX6Q_UART_BASE(n)      IMX6Q_UART_BASE_ADDR(n)
+#define IMX6Q_DEBUG_UART_BASE   IMX6Q_UART_BASE(CONFIG_DEBUG_IMX6Q_UART_PORT)
 
 static struct map_desc imx_lluart_desc = {
-#ifdef CONFIG_DEBUG_IMX6Q_UART2
-        .virtual        = MX6Q_IO_P2V(MX6Q_UART2_BASE_ADDR),
-        .pfn            = __phys_to_pfn(MX6Q_UART2_BASE_ADDR),
-        .length         = MX6Q_UART2_SIZE,
-        .type           = MT_DEVICE,
-#endif
-#ifdef CONFIG_DEBUG_IMX6Q_UART4
-        .virtual        = MX6Q_IO_P2V(MX6Q_UART4_BASE_ADDR),
-        .pfn            = __phys_to_pfn(MX6Q_UART4_BASE_ADDR),
-        .length         = MX6Q_UART4_SIZE,
+#ifdef CONFIG_DEBUG_IMX6Q_UART
+        .virtual        = IMX_IO_P2V(IMX6Q_DEBUG_UART_BASE),
+        .pfn            = __phys_to_pfn(IMX6Q_DEBUG_UART_BASE),
+        .length         = 0x4000,
         .type           = MT_DEVICE,
 #endif
 };
diff --git a/arch/arm/mach-imx/mach-apf9328.c b/arch/arm/mach-imx/mach-apf9328.c
index 7b99a79722b6..5c9bd2c66e6d 100644
--- a/arch/arm/mach-imx/mach-apf9328.c
+++ b/arch/arm/mach-imx/mach-apf9328.c
@@ -25,11 +25,10 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx1.h>
-
+#include "common.h"
 #include "devices-imx1.h"
+#include "hardware.h"
+#include "iomux-mx1.h"
 
 static const int apf9328_pins[] __initconst = {
         /* UART1 */
diff --git a/arch/arm/mach-imx/mach-armadillo5x0.c b/arch/arm/mach-imx/mach-armadillo5x0.c
index 5985ed1b8c98..59bd6b06a6b5 100644
--- a/arch/arm/mach-imx/mach-armadillo5x0.c
+++ b/arch/arm/mach-imx/mach-armadillo5x0.c
@@ -41,19 +41,18 @@
 #include <linux/regulator/machine.h>
 #include <linux/regulator/fixed.h>
 
-#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 #include <asm/memory.h>
 #include <asm/mach/map.h>
 
-#include <mach/common.h>
-#include <mach/iomux-mx3.h>
-#include <mach/ulpi.h>
-
+#include "common.h"
 #include "devices-imx31.h"
 #include "crmregs-imx3.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
+#include "ulpi.h"
 
 static int armadillo5x0_pins[] = {
         /* UART1 */
diff --git a/arch/arm/mach-imx/mach-bug.c b/arch/arm/mach-imx/mach-bug.c
index 9a9897749dd6..3a39d5aec07a 100644
--- a/arch/arm/mach-imx/mach-bug.c
+++ b/arch/arm/mach-imx/mach-bug.c
@@ -19,15 +19,14 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 
-#include <mach/iomux-mx3.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-
 #include <asm/mach/time.h>
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
 
+#include "common.h"
 #include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
 
 static const struct imxuart_platform_data uart_pdata __initconst = {
         .flags = IMXUART_HAVE_RTSCTS,
diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c
index 2bb9e18d9ee1..12a370646b45 100644
--- a/arch/arm/mach-imx/mach-cpuimx27.c
+++ b/arch/arm/mach-imx/mach-cpuimx27.c
@@ -34,13 +34,12 @@
 #include <asm/mach/time.h>
 #include <asm/mach/map.h>
 
-#include <mach/eukrea-baseboards.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx27.h>
-#include <mach/ulpi.h>
-
+#include "common.h"
 #include "devices-imx27.h"
+#include "eukrea-baseboards.h"
+#include "hardware.h"
+#include "iomux-mx27.h"
+#include "ulpi.h"
 
 static const int eukrea_cpuimx27_pins[] __initconst = {
         /* UART1 */
diff --git a/arch/arm/mach-imx/mach-cpuimx35.c b/arch/arm/mach-imx/mach-cpuimx35.c
index d49b0ec6bdec..5a31bf8c8f4c 100644
--- a/arch/arm/mach-imx/mach-cpuimx35.c
+++ b/arch/arm/mach-imx/mach-cpuimx35.c
@@ -37,12 +37,11 @@
 #include <asm/mach/time.h>
 #include <asm/mach/map.h>
 
-#include <mach/eukrea-baseboards.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx35.h>
-
+#include "common.h"
 #include "devices-imx35.h"
+#include "eukrea-baseboards.h"
+#include "hardware.h"
+#include "iomux-mx35.h"
 
 static const struct imxuart_platform_data uart_pdata __initconst = {
         .flags = IMXUART_HAVE_RTSCTS,
diff --git a/arch/arm/mach-imx/mach-cpuimx51sd.c b/arch/arm/mach-imx/mach-cpuimx51sd.c
index b87cc49ab1e8..b727de029c8f 100644
--- a/arch/arm/mach-imx/mach-cpuimx51sd.c
+++ b/arch/arm/mach-imx/mach-cpuimx51sd.c
@@ -26,18 +26,17 @@
 #include <linux/spi/spi.h>
 #include <linux/can/platform/mcp251x.h>
 
-#include <mach/eukrea-baseboards.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx51.h>
-
 #include <asm/setup.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 
+#include "common.h"
 #include "devices-imx51.h"
 #include "cpu_op-mx51.h"
+#include "eukrea-baseboards.h"
+#include "hardware.h"
+#include "iomux-mx51.h"
 
 #define USBH1_RST               IMX_GPIO_NR(2, 28)
 #define ETH_RST                 IMX_GPIO_NR(2, 31)
diff --git a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
index 017bbb70ea41..75027a5ad8b7 100644
--- a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
+++ b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
@@ -27,18 +27,18 @@
 #include <linux/usb/otg.h>
 #include <linux/usb/ulpi.h>
 
-#include <mach/eukrea-baseboards.h>
-#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 #include <asm/memory.h>
 #include <asm/mach/map.h>
-#include <mach/common.h>
-#include <mach/mx25.h>
-#include <mach/iomux-mx25.h>
 
+#include "common.h"
 #include "devices-imx25.h"
+#include "eukrea-baseboards.h"
+#include "hardware.h"
+#include "iomux-mx25.h"
+#include "mx25.h"
 
 static const struct imxuart_platform_data uart_pdata __initconst = {
         .flags = IMXUART_HAVE_RTSCTS,
diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
index 141756f00ae5..b74422679126 100644
--- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
+++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
@@ -40,11 +40,11 @@
 #include <asm/mach/time.h>
 #include <asm/system_info.h>
 #include <asm/memblock.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx27.h>
 
+#include "common.h"
 #include "devices-imx27.h"
+#include "hardware.h"
+#include "iomux-mx27.h"
 
 #define TVP5150_RSTN (GPIO_PORTC + 18)
 #define TVP5150_PWDN (GPIO_PORTC + 19)
diff --git a/arch/arm/mach-imx/mach-imx27ipcam.c b/arch/arm/mach-imx/mach-imx27ipcam.c
index 7381387a8905..53a860112938 100644
--- a/arch/arm/mach-imx/mach-imx27ipcam.c
+++ b/arch/arm/mach-imx/mach-imx27ipcam.c
@@ -17,11 +17,11 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx27.h>
 
+#include "hardware.h"
+#include "common.h"
 #include "devices-imx27.h"
+#include "iomux-mx27.h"
 
 static const int mx27ipcam_pins[] __initconst = {
         /* UART1 */
diff --git a/arch/arm/mach-imx/mach-imx27lite.c b/arch/arm/mach-imx/mach-imx27lite.c
index 1f45b9189229..fc8dce931378 100644
--- a/arch/arm/mach-imx/mach-imx27lite.c
+++ b/arch/arm/mach-imx/mach-imx27lite.c
@@ -20,11 +20,11 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 #include <asm/mach/map.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx27.h>
 
+#include "common.h"
 #include "devices-imx27.h"
+#include "hardware.h"
+#include "iomux-mx27.h"
 
 static const int mx27lite_pins[] __initconst = {
         /* UART1 */
diff --git a/arch/arm/mach-imx/mach-imx53.c b/arch/arm/mach-imx/mach-imx53.c
index 29711e95579f..e71e62610eba 100644
--- a/arch/arm/mach-imx/mach-imx53.c
+++ b/arch/arm/mach-imx/mach-imx53.c
@@ -19,8 +19,9 @@
 #include <linux/of_platform.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
-#include <mach/common.h>
-#include <mach/mx53.h>
+
+#include "common.h"
+#include "mx53.h"
 
 /*
  * Lookup table for attaching a specific name and platform_data pointer to
@@ -42,9 +43,9 @@ static const struct of_dev_auxdata imx53_auxdata_lookup[] __initconst = {
         OF_DEV_AUXDATA("fsl,imx53-ecspi", MX53_ECSPI1_BASE_ADDR, "imx51-ecspi.0", NULL),
         OF_DEV_AUXDATA("fsl,imx53-ecspi", MX53_ECSPI2_BASE_ADDR, "imx51-ecspi.1", NULL),
         OF_DEV_AUXDATA("fsl,imx53-cspi", MX53_CSPI_BASE_ADDR, "imx35-cspi.0", NULL),
-        OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C1_BASE_ADDR, "imx-i2c.0", NULL),
-        OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C2_BASE_ADDR, "imx-i2c.1", NULL),
-        OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C3_BASE_ADDR, "imx-i2c.2", NULL),
+        OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C1_BASE_ADDR, "imx21-i2c.0", NULL),
+        OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C2_BASE_ADDR, "imx21-i2c.1", NULL),
+        OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C3_BASE_ADDR, "imx21-i2c.2", NULL),
         OF_DEV_AUXDATA("fsl,imx53-sdma", MX53_SDMA_BASE_ADDR, "imx35-sdma", NULL),
         OF_DEV_AUXDATA("fsl,imx53-wdt", MX53_WDOG1_BASE_ADDR, "imx2-wdt.0", NULL),
         { /* sentinel */ }
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 47c91f7185d2..9511142d436c 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -33,10 +33,44 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 #include <asm/system_misc.h>
-#include <mach/common.h>
-#include <mach/cpuidle.h>
-#include <mach/hardware.h>
 
+#include "common.h"
+#include "cpuidle.h"
+#include "hardware.h"
+
+#define IMX6Q_ANALOG_DIGPROG    0x260
+
+static int imx6q_revision(void)
+{
+        struct device_node *np;
+        void __iomem *base;
+        static u32 rev;
+
+        if (!rev) {
+                np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop");
+                if (!np)
+                        return IMX_CHIP_REVISION_UNKNOWN;
+                base = of_iomap(np, 0);
+                if (!base) {
+                        of_node_put(np);
+                        return IMX_CHIP_REVISION_UNKNOWN;
+                }
+                rev =  readl_relaxed(base + IMX6Q_ANALOG_DIGPROG);
+                iounmap(base);
+                of_node_put(np);
+        }
+
+        switch (rev & 0xff) {
+        case 0:
+                return IMX_CHIP_REVISION_1_0;
+        case 1:
+                return IMX_CHIP_REVISION_1_1;
+        case 2:
+                return IMX_CHIP_REVISION_1_2;
+        default:
+                return IMX_CHIP_REVISION_UNKNOWN;
+        }
+}
 
 void imx6q_restart(char mode, const char *cmd)
 {
@@ -192,6 +226,7 @@ static void __init imx6q_timer_init(void)
 {
         mx6q_clocks_init();
         twd_local_timer_of_register();
+        imx_print_silicon_rev("i.MX6Q", imx6q_revision());
 }
 
 static struct sys_timer imx6q_timer = {
diff --git a/arch/arm/mach-imx/mach-kzm_arm11_01.c b/arch/arm/mach-imx/mach-kzm_arm11_01.c
index 0330078ff788..2e536ea53444 100644
--- a/arch/arm/mach-imx/mach-kzm_arm11_01.c
+++ b/arch/arm/mach-imx/mach-kzm_arm11_01.c
@@ -36,11 +36,10 @@
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
 
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx3.h>
-
+#include "common.h"
 #include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
 
 #define KZM_ARM11_IO_ADDRESS(x) (IOMEM(                                 \
         IMX_IO_P2V_MODULE(x, MX31_CS4) ?:                               \
diff --git a/arch/arm/mach-imx/mach-mx1ads.c b/arch/arm/mach-imx/mach-mx1ads.c
index 667f359a2e8b..06b483783e68 100644
--- a/arch/arm/mach-imx/mach-mx1ads.c
+++ b/arch/arm/mach-imx/mach-mx1ads.c
@@ -23,11 +23,10 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx1.h>
-
+#include "common.h"
 #include "devices-imx1.h"
+#include "hardware.h"
+#include "iomux-mx1.h"
 
 static const int mx1ads_pins[] __initconst = {
         /* UART1 */
diff --git a/arch/arm/mach-imx/mach-mx21ads.c b/arch/arm/mach-imx/mach-mx21ads.c
index ed22e3fe6ec8..6adb3136bb08 100644
--- a/arch/arm/mach-imx/mach-mx21ads.c
+++ b/arch/arm/mach-imx/mach-mx21ads.c
@@ -18,15 +18,15 @@
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/physmap.h>
 #include <linux/gpio.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 #include <asm/mach/map.h>
-#include <mach/iomux-mx21.h>
 
+#include "common.h"
 #include "devices-imx21.h"
+#include "hardware.h"
+#include "iomux-mx21.h"
 
 /*
  * Memory-mapped I/O on MX21ADS base board
diff --git a/arch/arm/mach-imx/mach-mx25_3ds.c b/arch/arm/mach-imx/mach-mx25_3ds.c
index ce247fd1269a..b1b03aa55bb8 100644
--- a/arch/arm/mach-imx/mach-mx25_3ds.c
+++ b/arch/arm/mach-imx/mach-mx25_3ds.c
@@ -31,17 +31,17 @@
 #include <linux/platform_device.h>
 #include <linux/usb/otg.h>
 
-#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 #include <asm/memory.h>
 #include <asm/mach/map.h>
-#include <mach/common.h>
-#include <mach/mx25.h>
-#include <mach/iomux-mx25.h>
 
+#include "common.h"
 #include "devices-imx25.h"
+#include "hardware.h"
+#include "iomux-mx25.h"
+#include "mx25.h"
 
 #define MX25PDK_CAN_PWDN        IMX_GPIO_NR(4, 6)
 
diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c
index 05996f39005c..d0e547fa925f 100644
--- a/arch/arm/mach-imx/mach-mx27_3ds.c
+++ b/arch/arm/mach-imx/mach-mx27_3ds.c
@@ -36,13 +36,13 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx27.h>
-#include <mach/ulpi.h>
-#include <mach/3ds_debugboard.h>
 
+#include "3ds_debugboard.h"
+#include "common.h"
 #include "devices-imx27.h"
+#include "hardware.h"
+#include "iomux-mx27.h"
+#include "ulpi.h"
 
 #define SD1_EN_GPIO             IMX_GPIO_NR(2, 25)
 #define OTG_PHY_RESET_GPIO      IMX_GPIO_NR(2, 23)
diff --git a/arch/arm/mach-imx/mach-mx27ads.c b/arch/arm/mach-imx/mach-mx27ads.c
index 7dc59bac0e55..3d036f57f0e6 100644
--- a/arch/arm/mach-imx/mach-mx27ads.c
+++ b/arch/arm/mach-imx/mach-mx27ads.c
@@ -21,15 +21,15 @@
 #include <linux/mtd/physmap.h>
 #include <linux/i2c.h>
 #include <linux/irq.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 #include <asm/mach/map.h>
-#include <mach/iomux-mx27.h>
 
+#include "common.h"
 #include "devices-imx27.h"
+#include "hardware.h"
+#include "iomux-mx27.h"
 
 /*
  * Base address of PBC controller, CS4
diff --git a/arch/arm/mach-imx/mach-mx31_3ds.c b/arch/arm/mach-imx/mach-mx31_3ds.c
index 8915f937b7d5..bc301befdd06 100644
--- a/arch/arm/mach-imx/mach-mx31_3ds.c
+++ b/arch/arm/mach-imx/mach-mx31_3ds.c
@@ -30,19 +30,19 @@
 
 #include <media/soc_camera.h>
 
-#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 #include <asm/memory.h>
 #include <asm/mach/map.h>
 #include <asm/memblock.h>
-#include <mach/common.h>
-#include <mach/iomux-mx3.h>
-#include <mach/3ds_debugboard.h>
-#include <mach/ulpi.h>
 
+#include "3ds_debugboard.h"
+#include "common.h"
 #include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
+#include "ulpi.h"
 
 static int mx31_3ds_pins[] = {
         /* UART1 */
@@ -393,7 +393,7 @@ static struct regulator_init_data gpo_init = {
 };
 
 static struct regulator_consumer_supply vmmc2_consumers[] = {
-        REGULATOR_SUPPLY("vmmc", "mxc-mmc.0"),
+        REGULATOR_SUPPLY("vmmc", "imx31-mmc.0"),
 };
 
 static struct regulator_init_data vmmc2_init = {
diff --git a/arch/arm/mach-imx/mach-mx31ads.c b/arch/arm/mach-imx/mach-mx31ads.c
index e774b07f48d3..8b56f8883f32 100644
--- a/arch/arm/mach-imx/mach-mx31ads.c
+++ b/arch/arm/mach-imx/mach-mx31ads.c
@@ -28,8 +28,6 @@
 #include <asm/mach/time.h>
 #include <asm/memory.h>
 #include <asm/mach/map.h>
-#include <mach/common.h>
-#include <mach/iomux-mx3.h>
 
 #ifdef CONFIG_MACH_MX31ADS_WM1133_EV1
 #include <linux/mfd/wm8350/audio.h>
@@ -37,7 +35,10 @@
 #include <linux/mfd/wm8350/pmic.h>
 #endif
 
+#include "common.h"
 #include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
 
 /* Base address of PBC controller */
 #define PBC_BASE_ADDRESS        MX31_CS4_BASE_ADDR_VIRT
diff --git a/arch/arm/mach-imx/mach-mx31lilly.c b/arch/arm/mach-imx/mach-mx31lilly.c
index 34b9bf075daf..08b9965c8b36 100644
--- a/arch/arm/mach-imx/mach-mx31lilly.c
+++ b/arch/arm/mach-imx/mach-mx31lilly.c
@@ -42,13 +42,12 @@
 #include <asm/mach/time.h>
 #include <asm/mach/map.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx3.h>
-#include <mach/board-mx31lilly.h>
-#include <mach/ulpi.h>
-
+#include "board-mx31lilly.h"
+#include "common.h"
 #include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
+#include "ulpi.h"
 
 /*
  * This file contains module-specific initialization routines for LILLY-1131.
diff --git a/arch/arm/mach-imx/mach-mx31lite.c b/arch/arm/mach-imx/mach-mx31lite.c
index ef57cff5abfb..bdcd92e59518 100644
--- a/arch/arm/mach-imx/mach-mx31lite.c
+++ b/arch/arm/mach-imx/mach-mx31lite.c
@@ -39,13 +39,12 @@
 #include <asm/page.h>
 #include <asm/setup.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/board-mx31lite.h>
-#include <mach/iomux-mx3.h>
-#include <mach/ulpi.h>
-
+#include "board-mx31lite.h"
+#include "common.h"
 #include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
+#include "ulpi.h"
 
 /*
  * This file contains the module-specific initialization routines.
diff --git a/arch/arm/mach-imx/mach-mx31moboard.c b/arch/arm/mach-imx/mach-mx31moboard.c
index 459e754ef8c9..2517cfa9f26b 100644
--- a/arch/arm/mach-imx/mach-mx31moboard.c
+++ b/arch/arm/mach-imx/mach-mx31moboard.c
@@ -42,14 +42,14 @@
 #include <asm/mach/time.h>
 #include <asm/mach/map.h>
 #include <asm/memblock.h>
-#include <mach/board-mx31moboard.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx3.h>
-#include <mach/ulpi.h>
 #include <linux/platform_data/asoc-imx-ssi.h>
 
+#include "board-mx31moboard.h"
+#include "common.h"
 #include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
+#include "ulpi.h"
 
 static unsigned int moboard_pins[] = {
         /* UART0 */
@@ -175,11 +175,11 @@ static const struct spi_imx_master moboard_spi1_pdata __initconst = {
 
 static struct regulator_consumer_supply sdhc_consumers[] = {
         {
-                .dev_name = "mxc-mmc.0",
+                .dev_name = "imx31-mmc.0",
                 .supply = "sdhc0_vcc",
         },
         {
-                .dev_name = "mxc-mmc.1",
+                .dev_name = "imx31-mmc.1",
                 .supply = "sdhc1_vcc",
         },
 };
diff --git a/arch/arm/mach-imx/mach-mx35_3ds.c b/arch/arm/mach-imx/mach-mx35_3ds.c
index 504983c68aa8..5277da45d60c 100644
--- a/arch/arm/mach-imx/mach-mx35_3ds.c
+++ b/arch/arm/mach-imx/mach-mx35_3ds.c
@@ -43,15 +43,15 @@
 #include <asm/mach/map.h>
 #include <asm/memblock.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx35.h>
-#include <mach/3ds_debugboard.h>
 #include <video/platform_lcd.h>
 
 #include <media/soc_camera.h>
 
+#include "3ds_debugboard.h"
+#include "common.h"
 #include "devices-imx35.h"
+#include "hardware.h"
+#include "iomux-mx35.h"
 
 #define GPIO_MC9S08DZ60_GPS_ENABLE 0
 #define GPIO_MC9S08DZ60_HDD_ENABLE 4
diff --git a/arch/arm/mach-imx/mach-mx50_rdp.c b/arch/arm/mach-imx/mach-mx50_rdp.c
index 42b66e8d9615..0c1f88a80bdc 100644
--- a/arch/arm/mach-imx/mach-mx50_rdp.c
+++ b/arch/arm/mach-imx/mach-mx50_rdp.c
@@ -24,17 +24,16 @@
 #include <linux/delay.h>
 #include <linux/io.h>
 
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx50.h>
-
 #include <asm/irq.h>
 #include <asm/setup.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 
+#include "common.h"
 #include "devices-imx50.h"
+#include "hardware.h"
+#include "iomux-mx50.h"
 
 #define FEC_EN          IMX_GPIO_NR(6, 23)
 #define FEC_RESET_B     IMX_GPIO_NR(4, 12)
diff --git a/arch/arm/mach-imx/mach-mx51_3ds.c b/arch/arm/mach-imx/mach-mx51_3ds.c
index 9ee84a4af639..abc25bd1107b 100644
--- a/arch/arm/mach-imx/mach-mx51_3ds.c
+++ b/arch/arm/mach-imx/mach-mx51_3ds.c
@@ -19,12 +19,11 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx51.h>
-#include <mach/3ds_debugboard.h>
-
+#include "3ds_debugboard.h"
+#include "common.h"
 #include "devices-imx51.h"
+#include "hardware.h"
+#include "iomux-mx51.h"
 
 #define MX51_3DS_ECSPI2_CS      (GPIO_PORTC + 28)
 
diff --git a/arch/arm/mach-imx/mach-mx51_babbage.c b/arch/arm/mach-imx/mach-mx51_babbage.c
index 7b31cbde8775..d9a84ca2199a 100644
--- a/arch/arm/mach-imx/mach-mx51_babbage.c
+++ b/arch/arm/mach-imx/mach-mx51_babbage.c
@@ -20,17 +20,16 @@
 #include <linux/spi/flash.h>
 #include <linux/spi/spi.h>
 
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx51.h>
-
 #include <asm/setup.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 
+#include "common.h"
 #include "devices-imx51.h"
 #include "cpu_op-mx51.h"
+#include "hardware.h"
+#include "iomux-mx51.h"
 
 #define BABBAGE_USB_HUB_RESET   IMX_GPIO_NR(1, 7)
 #define BABBAGE_USBH1_STP       IMX_GPIO_NR(1, 27)
diff --git a/arch/arm/mach-imx/mach-mxt_td60.c b/arch/arm/mach-imx/mach-mxt_td60.c
index 0bf6d30aa32d..f4a8c7e108e1 100644
--- a/arch/arm/mach-imx/mach-mxt_td60.c
+++ b/arch/arm/mach-imx/mach-mxt_td60.c
@@ -21,17 +21,17 @@
 #include <linux/mtd/physmap.h>
 #include <linux/i2c.h>
 #include <linux/irq.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 #include <asm/mach/map.h>
 #include <linux/gpio.h>
-#include <mach/iomux-mx27.h>
 #include <linux/i2c/pca953x.h>
 
+#include "common.h"
 #include "devices-imx27.h"
+#include "hardware.h"
+#include "iomux-mx27.h"
 
 static const int mxt_td60_pins[] __initconst = {
         /* UART0 */
diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c
index de8516b7d69f..eee369fa94a2 100644
--- a/arch/arm/mach-imx/mach-pca100.c
+++ b/arch/arm/mach-imx/mach-pca100.c
@@ -32,13 +32,13 @@
 
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx27.h>
 #include <asm/mach/time.h>
-#include <mach/ulpi.h>
 
+#include "common.h"
 #include "devices-imx27.h"
+#include "hardware.h"
+#include "iomux-mx27.h"
+#include "ulpi.h"
 
 #define OTG_PHY_CS_GPIO (GPIO_PORTB + 23)
 #define USBH2_PHY_CS_GPIO (GPIO_PORTB + 24)
diff --git a/arch/arm/mach-imx/mach-pcm037.c b/arch/arm/mach-imx/mach-pcm037.c
index e3c45130fb3c..547fef133f65 100644
--- a/arch/arm/mach-imx/mach-pcm037.c
+++ b/arch/arm/mach-imx/mach-pcm037.c
@@ -42,13 +42,13 @@
 #include <asm/mach/time.h>
 #include <asm/mach/map.h>
 #include <asm/memblock.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx3.h>
-#include <mach/ulpi.h>
 
+#include "common.h"
 #include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
 #include "pcm037.h"
+#include "ulpi.h"
 
 static enum pcm037_board_variant pcm037_instance = PCM037_PCM970;
 
diff --git a/arch/arm/mach-imx/mach-pcm037_eet.c b/arch/arm/mach-imx/mach-pcm037_eet.c
index 11ffa81ad17d..8fd8255068ee 100644
--- a/arch/arm/mach-imx/mach-pcm037_eet.c
+++ b/arch/arm/mach-imx/mach-pcm037_eet.c
@@ -11,13 +11,12 @@
 #include <linux/platform_device.h>
 #include <linux/spi/spi.h>
 
-#include <mach/common.h>
-#include <mach/iomux-mx3.h>
-
 #include <asm/mach-types.h>
 
 #include "pcm037.h"
+#include "common.h"
 #include "devices-imx31.h"
+#include "iomux-mx3.h"
 
 static unsigned int pcm037_eet_pins[] = {
         /* Reserve and hardwire GPIO 57 high - S6E63D6 chipselect */
diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c
index 95f49d936fd3..4aa0d0798605 100644
--- a/arch/arm/mach-imx/mach-pcm038.c
+++ b/arch/arm/mach-imx/mach-pcm038.c
@@ -33,13 +33,12 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 
-#include <mach/board-pcm038.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx27.h>
-#include <mach/ulpi.h>
-
+#include "board-pcm038.h"
+#include "common.h"
 #include "devices-imx27.h"
+#include "hardware.h"
+#include "iomux-mx27.h"
+#include "ulpi.h"
 
 static const int pcm038_pins[] __initconst = {
         /* UART1 */
@@ -212,7 +211,7 @@ static const struct spi_imx_master pcm038_spi0_data __initconst = {
 
 static struct regulator_consumer_supply sdhc1_consumers[] = {
         {
-                .dev_name = "mxc-mmc.1",
+                .dev_name = "imx21-mmc.1",
                 .supply = "sdhc_vcc",
         },
 };
diff --git a/arch/arm/mach-imx/mach-pcm043.c b/arch/arm/mach-imx/mach-pcm043.c
index e4bd4387e344..92445440221e 100644
--- a/arch/arm/mach-imx/mach-pcm043.c
+++ b/arch/arm/mach-imx/mach-pcm043.c
@@ -33,12 +33,11 @@
 #include <asm/mach/time.h>
 #include <asm/mach/map.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx35.h>
-#include <mach/ulpi.h>
-
+#include "common.h"
 #include "devices-imx35.h"
+#include "hardware.h"
+#include "iomux-mx35.h"
+#include "ulpi.h"
 
 static const struct fb_videomode fb_modedb[] = {
         {
diff --git a/arch/arm/mach-imx/mach-qong.c b/arch/arm/mach-imx/mach-qong.c
index fb25fbd31226..96d9a91f8a3b 100644
--- a/arch/arm/mach-imx/mach-qong.c
+++ b/arch/arm/mach-imx/mach-qong.c
@@ -21,17 +21,17 @@
 #include <linux/mtd/nand.h>
 #include <linux/gpio.h>
 
-#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 #include <asm/mach/map.h>
-#include <mach/common.h>
 #include <asm/page.h>
 #include <asm/setup.h>
-#include <mach/iomux-mx3.h>
 
+#include "common.h"
 #include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
 
 /* FPGA defines */
 #define QONG_FPGA_VERSION(major, minor, rev)    \
diff --git a/arch/arm/mach-imx/mach-scb9328.c b/arch/arm/mach-imx/mach-scb9328.c
index 67ff38e9a3ca..fc970409dbaf 100644
--- a/arch/arm/mach-imx/mach-scb9328.c
+++ b/arch/arm/mach-imx/mach-scb9328.c
@@ -20,11 +20,10 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx1.h>
-
+#include "common.h"
 #include "devices-imx1.h"
+#include "hardware.h"
+#include "iomux-mx1.h"
 
 /*
  * This scb9328 has a 32MiB flash
diff --git a/arch/arm/mach-imx/mach-vpr200.c b/arch/arm/mach-imx/mach-vpr200.c
index 39eb7960e2a4..3aecf91e4289 100644
--- a/arch/arm/mach-imx/mach-vpr200.c
+++ b/arch/arm/mach-imx/mach-vpr200.c
@@ -28,15 +28,14 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx35.h>
-
 #include <linux/i2c.h>
 #include <linux/i2c/at24.h>
 #include <linux/mfd/mc13xxx.h>
 
+#include "common.h"
 #include "devices-imx35.h"
+#include "hardware.h"
+#include "iomux-mx35.h"
 
 #define GPIO_LCDPWR     IMX_GPIO_NR(1, 2)
 #define GPIO_PMIC_INT   IMX_GPIO_NR(2, 0)
diff --git a/arch/arm/mach-imx/mm-imx1.c b/arch/arm/mach-imx/mm-imx1.c
index 6d60d51868bc..7a146671e65a 100644
--- a/arch/arm/mach-imx/mm-imx1.c
+++ b/arch/arm/mach-imx/mm-imx1.c
@@ -22,9 +22,10 @@
 
 #include <asm/mach/map.h>
 
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-v1.h>
+#include "common.h"
+#include "devices/devices-common.h"
+#include "hardware.h"
+#include "iomux-v1.h"
 
 static struct map_desc imx_io_desc[] __initdata = {
         imx_map_entry(MX1, IO, MT_DEVICE),
@@ -58,5 +59,7 @@ void __init imx1_soc_init(void)
                                                 MX1_GPIO_INT_PORTC, 0);
         mxc_register_gpio("imx1-gpio", 3, MX1_GPIO4_BASE_ADDR, SZ_256,
                                                 MX1_GPIO_INT_PORTD, 0);
+        imx_add_imx_dma("imx1-dma", MX1_DMA_BASE_ADDR,
+                        MX1_DMA_INT, MX1_DMA_ERR);
         pinctrl_provide_dummies();
 }
diff --git a/arch/arm/mach-imx/mm-imx21.c b/arch/arm/mach-imx/mm-imx21.c
index d056dad0940d..d8ccd3a8ec53 100644
--- a/arch/arm/mach-imx/mm-imx21.c
+++ b/arch/arm/mach-imx/mm-imx21.c
@@ -21,12 +21,13 @@
 #include <linux/mm.h>
 #include <linux/init.h>
 #include <linux/pinctrl/machine.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/devices-common.h>
 #include <asm/pgtable.h>
 #include <asm/mach/map.h>
-#include <mach/iomux-v1.h>
+
+#include "common.h"
+#include "devices/devices-common.h"
+#include "hardware.h"
+#include "iomux-v1.h"
 
 /* MX21 memory map definition */
 static struct map_desc imx21_io_desc[] __initdata = {
@@ -81,6 +82,8 @@ static const struct resource imx21_audmux_res[] __initconst = {
 
 void __init imx21_soc_init(void)
 {
+        mxc_device_init();
+
         mxc_register_gpio("imx21-gpio", 0, MX21_GPIO1_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
         mxc_register_gpio("imx21-gpio", 1, MX21_GPIO2_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
         mxc_register_gpio("imx21-gpio", 2, MX21_GPIO3_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
@@ -89,7 +92,8 @@ void __init imx21_soc_init(void)
         mxc_register_gpio("imx21-gpio", 5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
 
         pinctrl_provide_dummies();
-        imx_add_imx_dma();
+        imx_add_imx_dma("imx21-dma", MX21_DMA_BASE_ADDR,
+                        MX21_INT_DMACH0, 0); /* No ERR irq */
         platform_device_register_simple("imx21-audmux", 0, imx21_audmux_res,
                                         ARRAY_SIZE(imx21_audmux_res));
 }
diff --git a/arch/arm/mach-imx/mm-imx25.c b/arch/arm/mach-imx/mm-imx25.c
index f3f5c6542ab4..9357707bb7af 100644
--- a/arch/arm/mach-imx/mm-imx25.c
+++ b/arch/arm/mach-imx/mm-imx25.c
@@ -24,11 +24,11 @@
 #include <asm/pgtable.h>
 #include <asm/mach/map.h>
 
-#include <mach/common.h>
-#include <mach/devices-common.h>
-#include <mach/hardware.h>
-#include <mach/mx25.h>
-#include <mach/iomux-v3.h>
+#include "common.h"
+#include "devices/devices-common.h"
+#include "hardware.h"
+#include "iomux-v3.h"
+#include "mx25.h"
 
 /*
  * This table defines static virtual address mappings for I/O regions.
@@ -89,6 +89,8 @@ static const struct resource imx25_audmux_res[] __initconst = {
 
 void __init imx25_soc_init(void)
 {
+        mxc_device_init();
+
         /* i.mx25 has the i.mx35 type gpio */
         mxc_register_gpio("imx35-gpio", 0, MX25_GPIO1_BASE_ADDR, SZ_16K, MX25_INT_GPIO1, 0);
         mxc_register_gpio("imx35-gpio", 1, MX25_GPIO2_BASE_ADDR, SZ_16K, MX25_INT_GPIO2, 0);
diff --git a/arch/arm/mach-imx/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c
index e7e24afc45ed..4f1be65a7b5f 100644
--- a/arch/arm/mach-imx/mm-imx27.c
+++ b/arch/arm/mach-imx/mm-imx27.c
@@ -21,12 +21,13 @@
 #include <linux/mm.h>
 #include <linux/init.h>
 #include <linux/pinctrl/machine.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/devices-common.h>
 #include <asm/pgtable.h>
 #include <asm/mach/map.h>
-#include <mach/iomux-v1.h>
+
+#include "common.h"
+#include "devices/devices-common.h"
+#include "hardware.h"
+#include "iomux-v1.h"
 
 /* MX27 memory map definition */
 static struct map_desc imx27_io_desc[] __initdata = {
@@ -81,6 +82,8 @@ static const struct resource imx27_audmux_res[] __initconst = {
 
 void __init imx27_soc_init(void)
 {
+        mxc_device_init();
+
         /* i.mx27 has the i.mx21 type gpio */
         mxc_register_gpio("imx21-gpio", 0, MX27_GPIO1_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
         mxc_register_gpio("imx21-gpio", 1, MX27_GPIO2_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
@@ -90,7 +93,8 @@ void __init imx27_soc_init(void)
         mxc_register_gpio("imx21-gpio", 5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
 
         pinctrl_provide_dummies();
-        imx_add_imx_dma();
+        imx_add_imx_dma("imx27-dma", MX27_DMA_BASE_ADDR,
+                        MX27_INT_DMACH0, 0); /* No ERR irq */
         /* imx27 has the imx21 type audmux */
         platform_device_register_simple("imx21-audmux", 0, imx27_audmux_res,
                                         ARRAY_SIZE(imx27_audmux_res));
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
index b5deb0554552..cefa047c4053 100644
--- a/arch/arm/mach-imx/mm-imx3.c
+++ b/arch/arm/mach-imx/mm-imx3.c
@@ -26,12 +26,11 @@
 #include <asm/hardware/cache-l2x0.h>
 #include <asm/mach/map.h>
 
-#include <mach/common.h>
-#include <mach/devices-common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-v3.h>
-
+#include "common.h"
 #include "crmregs-imx3.h"
+#include "devices/devices-common.h"
+#include "hardware.h"
+#include "iomux-v3.h"
 
 void __iomem *mx3_ccm_base;
 
@@ -175,6 +174,8 @@ void __init imx31_soc_init(void)
 
         imx3_init_l2x0();
 
+        mxc_device_init();
+
         mxc_register_gpio("imx31-gpio", 0, MX31_GPIO1_BASE_ADDR, SZ_16K, MX31_INT_GPIO1, 0);
         mxc_register_gpio("imx31-gpio", 1, MX31_GPIO2_BASE_ADDR, SZ_16K, MX31_INT_GPIO2, 0);
         mxc_register_gpio("imx31-gpio", 2, MX31_GPIO3_BASE_ADDR, SZ_16K, MX31_INT_GPIO3, 0);
@@ -271,6 +272,8 @@ void __init imx35_soc_init(void)
 
         imx3_init_l2x0();
 
+        mxc_device_init();
+
         mxc_register_gpio("imx35-gpio", 0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0);
         mxc_register_gpio("imx35-gpio", 1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0);
         mxc_register_gpio("imx35-gpio", 2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0);
diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c
index acb0aadb4255..f92caf1b30ba 100644
--- a/arch/arm/mach-imx/mm-imx5.c
+++ b/arch/arm/mach-imx/mm-imx5.c
@@ -18,10 +18,10 @@
 
 #include <asm/mach/map.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/devices-common.h>
-#include <mach/iomux-v3.h>
+#include "common.h"
+#include "devices/devices-common.h"
+#include "hardware.h"
+#include "iomux-v3.h"
 
 /*
  * Define the MX50 memory map.
@@ -138,6 +138,8 @@ static const struct resource imx51_audmux_res[] __initconst = {
 
 void __init imx50_soc_init(void)
 {
+        mxc_device_init();
+
         /* i.mx50 has the i.mx35 type gpio */
         mxc_register_gpio("imx35-gpio", 0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH);
         mxc_register_gpio("imx35-gpio", 1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH);
@@ -153,6 +155,8 @@ void __init imx50_soc_init(void)
 
 void __init imx51_soc_init(void)
 {
+        mxc_device_init();
+
         /* i.mx51 has the i.mx35 type gpio */
         mxc_register_gpio("imx35-gpio", 0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_INT_GPIO1_LOW, MX51_INT_GPIO1_HIGH);
         mxc_register_gpio("imx35-gpio", 1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_INT_GPIO2_LOW, MX51_INT_GPIO2_HIGH);
diff --git a/arch/arm/plat-mxc/include/mach/mx1.h b/arch/arm/mach-imx/mx1.h
index 45bd31cc34d6..45bd31cc34d6 100644
--- a/arch/arm/plat-mxc/include/mach/mx1.h
+++ b/arch/arm/mach-imx/mx1.h
diff --git a/arch/arm/plat-mxc/include/mach/mx21.h b/arch/arm/mach-imx/mx21.h
index 468738aa997f..468738aa997f 100644
--- a/arch/arm/plat-mxc/include/mach/mx21.h
+++ b/arch/arm/mach-imx/mx21.h
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/mach-imx/mx25.h
index ec466400a200..ec466400a200 100644
--- a/arch/arm/plat-mxc/include/mach/mx25.h
+++ b/arch/arm/mach-imx/mx25.h
diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/mach-imx/mx27.h
index e074616d54ca..e074616d54ca 100644
--- a/arch/arm/plat-mxc/include/mach/mx27.h
+++ b/arch/arm/mach-imx/mx27.h
diff --git a/arch/arm/plat-mxc/include/mach/mx2x.h b/arch/arm/mach-imx/mx2x.h
index 11642f5b224c..11642f5b224c 100644
--- a/arch/arm/plat-mxc/include/mach/mx2x.h
+++ b/arch/arm/mach-imx/mx2x.h
diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/mach-imx/mx31.h
index ee9b1f9215df..ee9b1f9215df 100644
--- a/arch/arm/plat-mxc/include/mach/mx31.h
+++ b/arch/arm/mach-imx/mx31.h
diff --git a/arch/arm/mach-imx/mx31lilly-db.c b/arch/arm/mach-imx/mx31lilly-db.c
index 29e890f92055..d4361b80c5fb 100644
--- a/arch/arm/mach-imx/mx31lilly-db.c
+++ b/arch/arm/mach-imx/mx31lilly-db.c
@@ -30,12 +30,11 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx3.h>
-#include <mach/board-mx31lilly.h>
-
+#include "board-mx31lilly.h"
+#include "common.h"
 #include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
 
 /*
  * This file contains board-specific initialization routines for the
diff --git a/arch/arm/mach-imx/mx31lite-db.c b/arch/arm/mach-imx/mx31lite-db.c
index 83d17d9e0bc8..5a160b7e4fce 100644
--- a/arch/arm/mach-imx/mx31lite-db.c
+++ b/arch/arm/mach-imx/mx31lite-db.c
@@ -31,12 +31,11 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx3.h>
-#include <mach/board-mx31lite.h>
-
+#include "board-mx31lite.h"
+#include "common.h"
 #include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
 
 /*
  * This file contains board-specific initialization routines for the
diff --git a/arch/arm/mach-imx/mx31moboard-devboard.c b/arch/arm/mach-imx/mx31moboard-devboard.c
index cc285e507286..52d5b1574721 100644
--- a/arch/arm/mach-imx/mx31moboard-devboard.c
+++ b/arch/arm/mach-imx/mx31moboard-devboard.c
@@ -22,12 +22,11 @@
 
 #include <linux/usb/otg.h>
 
-#include <mach/common.h>
-#include <mach/iomux-mx3.h>
-#include <mach/hardware.h>
-#include <mach/ulpi.h>
-
+#include "common.h"
 #include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
+#include "ulpi.h"
 
 static unsigned int devboard_pins[] = {
         /* UART1 */
diff --git a/arch/arm/mach-imx/mx31moboard-marxbot.c b/arch/arm/mach-imx/mx31moboard-marxbot.c
index 135c90e3a45f..a4f43e90f3c1 100644
--- a/arch/arm/mach-imx/mx31moboard-marxbot.c
+++ b/arch/arm/mach-imx/mx31moboard-marxbot.c
@@ -24,14 +24,13 @@
 
 #include <linux/usb/otg.h>
 
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx3.h>
-#include <mach/ulpi.h>
-
 #include <media/soc_camera.h>
 
+#include "common.h"
 #include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
+#include "ulpi.h"
 
 static unsigned int marxbot_pins[] = {
         /* SDHC2 */
diff --git a/arch/arm/mach-imx/mx31moboard-smartbot.c b/arch/arm/mach-imx/mx31moboard-smartbot.c
index fabb801e7994..04ae45dbfaa7 100644
--- a/arch/arm/mach-imx/mx31moboard-smartbot.c
+++ b/arch/arm/mach-imx/mx31moboard-smartbot.c
@@ -23,15 +23,14 @@
 #include <linux/usb/otg.h>
 #include <linux/usb/ulpi.h>
 
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx3.h>
-#include <mach/board-mx31moboard.h>
-#include <mach/ulpi.h>
-
 #include <media/soc_camera.h>
 
+#include "board-mx31moboard.h"
+#include "common.h"
 #include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
+#include "ulpi.h"
 
 static unsigned int smartbot_pins[] = {
         /* UART1 */
diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/mach-imx/mx35.h
index 2af5d3a699c7..2af5d3a699c7 100644
--- a/arch/arm/plat-mxc/include/mach/mx35.h
+++ b/arch/arm/mach-imx/mx35.h
diff --git a/arch/arm/plat-mxc/include/mach/mx3x.h b/arch/arm/mach-imx/mx3x.h
index 96fb4fbc8ad7..96fb4fbc8ad7 100644
--- a/arch/arm/plat-mxc/include/mach/mx3x.h
+++ b/arch/arm/mach-imx/mx3x.h
diff --git a/arch/arm/plat-mxc/include/mach/mx50.h b/arch/arm/mach-imx/mx50.h
index 09ac19c1570c..09ac19c1570c 100644
--- a/arch/arm/plat-mxc/include/mach/mx50.h
+++ b/arch/arm/mach-imx/mx50.h
diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/mach-imx/mx51.h
index af844f76261a..af844f76261a 100644
--- a/arch/arm/plat-mxc/include/mach/mx51.h
+++ b/arch/arm/mach-imx/mx51.h
diff --git a/arch/arm/plat-mxc/include/mach/mx53.h b/arch/arm/mach-imx/mx53.h
index f829d1c22501..f829d1c22501 100644
--- a/arch/arm/plat-mxc/include/mach/mx53.h
+++ b/arch/arm/mach-imx/mx53.h
diff --git a/arch/arm/plat-mxc/include/mach/mx6q.h b/arch/arm/mach-imx/mx6q.h
index f7e7dbac8f4b..19d3f54db5af 100644
--- a/arch/arm/plat-mxc/include/mach/mx6q.h
+++ b/arch/arm/mach-imx/mx6q.h
@@ -27,9 +27,5 @@
 #define MX6Q_CCM_SIZE                   0x4000
 #define MX6Q_ANATOP_BASE_ADDR           0x020c8000
 #define MX6Q_ANATOP_SIZE                0x1000
-#define MX6Q_UART2_BASE_ADDR            0x021e8000
-#define MX6Q_UART2_SIZE                 0x4000
-#define MX6Q_UART4_BASE_ADDR            0x021f0000
-#define MX6Q_UART4_SIZE                 0x4000
 
 #endif  /* __MACH_MX6Q_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/mach-imx/mxc.h
index d78298366a91..d78298366a91 100644
--- a/arch/arm/plat-mxc/include/mach/mxc.h
+++ b/arch/arm/mach-imx/mxc.h
diff --git a/arch/arm/mach-imx/pcm970-baseboard.c b/arch/arm/mach-imx/pcm970-baseboard.c
index 9917e2ff51da..51c608234089 100644
--- a/arch/arm/mach-imx/pcm970-baseboard.c
+++ b/arch/arm/mach-imx/pcm970-baseboard.c
@@ -23,11 +23,10 @@
 
 #include <asm/mach/arch.h>
 
-#include <mach/common.h>
-#include <mach/iomux-mx27.h>
-#include <mach/hardware.h>
-
+#include "common.h"
 #include "devices-imx27.h"
+#include "hardware.h"
+#include "iomux-mx27.h"
 
 static const int pcm970_pins[] __initconst = {
         /* SDHC */
diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c
index 2ac43e1a2dfd..3777b805b76b 100644
--- a/arch/arm/mach-imx/platsmp.c
+++ b/arch/arm/mach-imx/platsmp.c
@@ -16,8 +16,9 @@
 #include <asm/smp_scu.h>
 #include <asm/hardware/gic.h>
 #include <asm/mach/map.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
+
+#include "common.h"
+#include "hardware.h"
 
 static void __iomem *scu_base;
 
diff --git a/arch/arm/mach-imx/pm-imx27.c b/arch/arm/mach-imx/pm-imx27.c
index 6fcffa7db978..56d02d064fbf 100644
--- a/arch/arm/mach-imx/pm-imx27.c
+++ b/arch/arm/mach-imx/pm-imx27.c
@@ -10,7 +10,8 @@
 #include <linux/kernel.h>
 #include <linux/suspend.h>
 #include <linux/io.h>
-#include <mach/hardware.h>
+
+#include "hardware.h"
 
 static int mx27_suspend_enter(suspend_state_t state)
 {
diff --git a/arch/arm/mach-imx/pm-imx3.c b/arch/arm/mach-imx/pm-imx3.c
index 822103bdb709..6a07006ff0f4 100644
--- a/arch/arm/mach-imx/pm-imx3.c
+++ b/arch/arm/mach-imx/pm-imx3.c
@@ -9,10 +9,11 @@
  * http://www.gnu.org/copyleft/gpl.html
  */
 #include <linux/io.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+
+#include "common.h"
 #include "crmregs-imx3.h"
+#include "devices/devices-common.h"
+#include "hardware.h"
 
 /*
  * Set cpu low power mode before WFI instruction. This function is called
diff --git a/arch/arm/mach-imx/pm-imx5.c b/arch/arm/mach-imx/pm-imx5.c
index 19621ed1ffa5..2e063c2deb9e 100644
--- a/arch/arm/mach-imx/pm-imx5.c
+++ b/arch/arm/mach-imx/pm-imx5.c
@@ -16,10 +16,11 @@
 #include <asm/cacheflush.h>
 #include <asm/system_misc.h>
 #include <asm/tlbflush.h>
-#include <mach/common.h>
-#include <mach/cpuidle.h>
-#include <mach/hardware.h>
+
+#include "common.h"
+#include "cpuidle.h"
 #include "crm-regs-imx5.h"
+#include "hardware.h"
 
 /*
  * The WAIT_UNCLOCKED_POWER_OFF state only requires <= 500ns to exit.
diff --git a/arch/arm/mach-imx/pm-imx6q.c b/arch/arm/mach-imx/pm-imx6q.c
index f7b0c2b1b905..a17543da602d 100644
--- a/arch/arm/mach-imx/pm-imx6q.c
+++ b/arch/arm/mach-imx/pm-imx6q.c
@@ -18,8 +18,9 @@
 #include <asm/proc-fns.h>
 #include <asm/suspend.h>
 #include <asm/hardware/cache-l2x0.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
+
+#include "common.h"
+#include "hardware.h"
 
 extern unsigned long phys_l2x0_saved_regs;
 
diff --git a/arch/arm/plat-mxc/ssi-fiq-ksym.c b/arch/arm/mach-imx/ssi-fiq-ksym.c
index 792090f9a032..792090f9a032 100644
--- a/arch/arm/plat-mxc/ssi-fiq-ksym.c
+++ b/arch/arm/mach-imx/ssi-fiq-ksym.c
diff --git a/arch/arm/plat-mxc/ssi-fiq.S b/arch/arm/mach-imx/ssi-fiq.S
index a8b93c5f29b5..a8b93c5f29b5 100644
--- a/arch/arm/plat-mxc/ssi-fiq.S
+++ b/arch/arm/mach-imx/ssi-fiq.S
diff --git a/arch/arm/plat-mxc/system.c b/arch/arm/mach-imx/system.c
index 3da78cfc5a94..695e0d73bf85 100644
--- a/arch/arm/plat-mxc/system.c
+++ b/arch/arm/mach-imx/system.c
@@ -22,12 +22,13 @@
 #include <linux/err.h>
 #include <linux/delay.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
 #include <asm/system_misc.h>
 #include <asm/proc-fns.h>
 #include <asm/mach-types.h>
 
+#include "common.h"
+#include "hardware.h"
+
 static void __iomem *wdog_base;
 
 /*
diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/mach-imx/time.c
index a17abcf98325..f017302f6d09 100644
--- a/arch/arm/plat-mxc/time.c
+++ b/arch/arm/mach-imx/time.c
@@ -27,10 +27,11 @@
 #include <linux/clk.h>
 #include <linux/err.h>
 
-#include <mach/hardware.h>
 #include <asm/sched_clock.h>
 #include <asm/mach/time.h>
-#include <mach/common.h>
+
+#include "common.h"
+#include "hardware.h"
 
 /*
  * There are 2 versions of the timer hardware on Freescale MXC hardware.
diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/mach-imx/tzic.c
index 3ed1adbc09f8..9721161f208f 100644
--- a/arch/arm/plat-mxc/tzic.c
+++ b/arch/arm/mach-imx/tzic.c
@@ -21,10 +21,8 @@
 #include <asm/mach/irq.h>
 #include <asm/exception.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/irqs.h>
-
+#include "common.h"
+#include "hardware.h"
 #include "irq-common.h"
 
 /*
diff --git a/arch/arm/plat-mxc/ulpi.c b/arch/arm/mach-imx/ulpi.c
index d2963427184f..0f051957d10c 100644
--- a/arch/arm/plat-mxc/ulpi.c
+++ b/arch/arm/mach-imx/ulpi.c
@@ -24,7 +24,7 @@
 #include <linux/usb/otg.h>
 #include <linux/usb/ulpi.h>
 
-#include <mach/ulpi.h>
+#include "ulpi.h"
 
 /* ULPIVIEW register bits */
 #define ULPIVW_WU               (1 << 31)       /* Wakeup */
diff --git a/arch/arm/plat-mxc/include/mach/ulpi.h b/arch/arm/mach-imx/ulpi.h
index 42bdaca6d7d9..42bdaca6d7d9 100644
--- a/arch/arm/plat-mxc/include/mach/ulpi.h
+++ b/arch/arm/mach-imx/ulpi.h
diff --git a/arch/arm/mach-integrator/Kconfig b/arch/arm/mach-integrator/Kconfig
index 350e26636a06..abeff25532ab 100644
--- a/arch/arm/mach-integrator/Kconfig
+++ b/arch/arm/mach-integrator/Kconfig
@@ -8,6 +8,7 @@ config ARCH_INTEGRATOR_AP
         select MIGHT_HAVE_PCI
         select SERIAL_AMBA_PL010
         select SERIAL_AMBA_PL010_CONSOLE
+        select SOC_BUS
         help
           Include support for the ARM(R) Integrator/AP and
           Integrator/PP2 platforms.
@@ -19,6 +20,7 @@ config ARCH_INTEGRATOR_CP
         select PLAT_VERSATILE_CLCD
         select SERIAL_AMBA_PL011
         select SERIAL_AMBA_PL011_CONSOLE
+        select SOC_BUS
         help
           Include support for the ARM(R) Integrator CP platform.
 
diff --git a/arch/arm/mach-integrator/common.h b/arch/arm/mach-integrator/common.h
index c3ff21b5ea24..79197d8b34aa 100644
--- a/arch/arm/mach-integrator/common.h
+++ b/arch/arm/mach-integrator/common.h
@@ -1,6 +1,12 @@
 #include <linux/amba/serial.h>
-extern struct amba_pl010_data integrator_uart_data;
+#ifdef CONFIG_ARCH_INTEGRATOR_AP
+extern struct amba_pl010_data ap_uart_data;
+#else
+/* Not used without Integrator/AP support anyway */
+struct amba_pl010_data ap_uart_data {};
+#endif
 void integrator_init_early(void);
 int integrator_init(bool is_cp);
 void integrator_reserve(void);
 void integrator_restart(char, const char *);
+void integrator_init_sysfs(struct device *parent, u32 id);
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index ea22a17246d7..39c060f75e47 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -18,10 +18,10 @@
 #include <linux/memblock.h>
 #include <linux/sched.h>
 #include <linux/smp.h>
-#include <linux/termios.h>
 #include <linux/amba/bus.h>
 #include <linux/amba/serial.h>
 #include <linux/io.h>
+#include <linux/stat.h>
 
 #include <mach/hardware.h>
 #include <mach/platform.h>
@@ -46,10 +46,10 @@ static AMBA_APB_DEVICE(rtc, "rtc", 0,
         INTEGRATOR_RTC_BASE, INTEGRATOR_RTC_IRQ, NULL);
 
 static AMBA_APB_DEVICE(uart0, "uart0", 0,
-        INTEGRATOR_UART0_BASE, INTEGRATOR_UART0_IRQ, &integrator_uart_data);
+        INTEGRATOR_UART0_BASE, INTEGRATOR_UART0_IRQ, NULL);
 
 static AMBA_APB_DEVICE(uart1, "uart1", 0,
-        INTEGRATOR_UART1_BASE, INTEGRATOR_UART1_IRQ, &integrator_uart_data);
+        INTEGRATOR_UART1_BASE, INTEGRATOR_UART1_IRQ, NULL);
 
 static AMBA_APB_DEVICE(kmi0, "kmi0", 0, KMI0_BASE, KMI0_IRQ, NULL);
 static AMBA_APB_DEVICE(kmi1, "kmi1", 0, KMI1_BASE, KMI1_IRQ, NULL);
@@ -77,6 +77,8 @@ int __init integrator_init(bool is_cp)
                 uart1_device.periphid   = 0x00041010;
                 kmi0_device.periphid    = 0x00041050;
                 kmi1_device.periphid    = 0x00041050;
+                uart0_device.dev.platform_data = &ap_uart_data;
+                uart1_device.dev.platform_data = &ap_uart_data;
         }
 
         for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
@@ -89,49 +91,6 @@ int __init integrator_init(bool is_cp)
 
 #endif
 
-/*
- * On the Integrator platform, the port RTS and DTR are provided by
- * bits in the following SC_CTRLS register bits:
- *        RTS  DTR
- *  UART0  7    6
- *  UART1  5    4
- */
-#define SC_CTRLC        __io_address(INTEGRATOR_SC_CTRLC)
-#define SC_CTRLS        __io_address(INTEGRATOR_SC_CTRLS)
-
-static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *base, unsigned int mctrl)
-{
-        unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask;
-        u32 phybase = dev->res.start;
-
-        if (phybase == INTEGRATOR_UART0_BASE) {
-                /* UART0 */
-                rts_mask = 1 << 4;
-                dtr_mask = 1 << 5;
-        } else {
-                /* UART1 */
-                rts_mask = 1 << 6;
-                dtr_mask = 1 << 7;
-        }
-
-        if (mctrl & TIOCM_RTS)
-                ctrlc |= rts_mask;
-        else
-                ctrls |= rts_mask;
-
-        if (mctrl & TIOCM_DTR)
-                ctrlc |= dtr_mask;
-        else
-                ctrls |= dtr_mask;
-
-        __raw_writel(ctrls, SC_CTRLS);
-        __raw_writel(ctrlc, SC_CTRLC);
-}
-
-struct amba_pl010_data integrator_uart_data = {
-        .set_mctrl = integrator_uart_set_mctrl,
-};
-
 static DEFINE_RAW_SPINLOCK(cm_lock);
 
 /**
@@ -169,3 +128,93 @@ void integrator_restart(char mode, const char *cmd)
 {
         cm_control(CM_CTRL_RESET, CM_CTRL_RESET);
 }
+
+static u32 integrator_id;
+
+static ssize_t intcp_get_manf(struct device *dev,
+                              struct device_attribute *attr,
+                              char *buf)
+{
+        return sprintf(buf, "%02x\n", integrator_id >> 24);
+}
+
+static struct device_attribute intcp_manf_attr =
+        __ATTR(manufacturer,  S_IRUGO, intcp_get_manf,  NULL);
+
+static ssize_t intcp_get_arch(struct device *dev,
+                              struct device_attribute *attr,
+                              char *buf)
+{
+        const char *arch;
+
+        switch ((integrator_id >> 16) & 0xff) {
+        case 0x00:
+                arch = "ASB little-endian";
+                break;
+        case 0x01:
+                arch = "AHB little-endian";
+                break;
+        case 0x03:
+                arch = "AHB-Lite system bus, bi-endian";
+                break;
+        case 0x04:
+                arch = "AHB";
+                break;
+        default:
+                arch = "Unknown";
+                break;
+        }
+
+        return sprintf(buf, "%s\n", arch);
+}
+
+static struct device_attribute intcp_arch_attr =
+        __ATTR(architecture,  S_IRUGO, intcp_get_arch,  NULL);
+
+static ssize_t intcp_get_fpga(struct device *dev,
+                              struct device_attribute *attr,
+                              char *buf)
+{
+        const char *fpga;
+
+        switch ((integrator_id >> 12) & 0xf) {
+        case 0x01:
+                fpga = "XC4062";
+                break;
+        case 0x02:
+                fpga = "XC4085";
+                break;
+        case 0x04:
+                fpga = "EPM7256AE (Altera PLD)";
+                break;
+        default:
+                fpga = "Unknown";
+                break;
+        }
+
+        return sprintf(buf, "%s\n", fpga);
+}
+
+static struct device_attribute intcp_fpga_attr =
+        __ATTR(fpga,  S_IRUGO, intcp_get_fpga,  NULL);
+
+static ssize_t intcp_get_build(struct device *dev,
+                               struct device_attribute *attr,
+                               char *buf)
+{
+        return sprintf(buf, "%02x\n", (integrator_id >> 4) & 0xFF);
+}
+
+static struct device_attribute intcp_build_attr =
+        __ATTR(build,  S_IRUGO, intcp_get_build,  NULL);
+
+
+
+void integrator_init_sysfs(struct device *parent, u32 id)
+{
+        integrator_id = id;
+        device_create_file(parent, &intcp_manf_attr);
+        device_create_file(parent, &intcp_arch_attr);
+        device_create_file(parent, &intcp_fpga_attr);
+        device_create_file(parent, &intcp_build_attr);
+}
diff --git a/arch/arm/mach-integrator/include/mach/platform.h b/arch/arm/mach-integrator/include/mach/platform.h
index efeac5d0bc9e..be5859efe10e 100644
--- a/arch/arm/mach-integrator/include/mach/platform.h
+++ b/arch/arm/mach-integrator/include/mach/platform.h
@@ -190,7 +190,6 @@
 #define INTEGRATOR_SC_CTRLC_OFFSET      0x0C
 #define INTEGRATOR_SC_DEC_OFFSET        0x10
 #define INTEGRATOR_SC_ARB_OFFSET        0x14
-#define INTEGRATOR_SC_PCIENABLE_OFFSET  0x18
 #define INTEGRATOR_SC_LOCK_OFFSET       0x1C
 
 #define INTEGRATOR_SC_BASE              0x11000000
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index e6617c134faf..a0a7cbbb7a70 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -37,6 +37,9 @@
 #include <linux/of_irq.h>
 #include <linux/of_address.h>
 #include <linux/of_platform.h>
+#include <linux/stat.h>
+#include <linux/sys_soc.h>
+#include <linux/termios.h>
 #include <video/vga.h>
 
 #include <mach/hardware.h>
@@ -60,7 +63,10 @@
 
 #include "common.h"
 
-/* 
+/* Base address to the AP system controller */
+void __iomem *ap_syscon_base;
+
+/*
  * All IO addresses are mapped onto VA 0xFFFx.xxxx, where x.xxxx
  * is the (PA >> 12).
  *
@@ -68,7 +74,6 @@
  * just for now).
  */
 #define VA_IC_BASE      __io_address(INTEGRATOR_IC_BASE)
-#define VA_SC_BASE      __io_address(INTEGRATOR_SC_BASE)
 #define VA_EBI_BASE     __io_address(INTEGRATOR_EBI_BASE)
 #define VA_CMIC_BASE    __io_address(INTEGRATOR_HDR_IC)
 
@@ -97,11 +102,6 @@ static struct map_desc ap_io_desc[] __initdata = {
                 .length         = SZ_4K,
                 .type           = MT_DEVICE
         }, {
-                .virtual        = IO_ADDRESS(INTEGRATOR_SC_BASE),
-                .pfn            = __phys_to_pfn(INTEGRATOR_SC_BASE),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE
-        }, {
                 .virtual        = IO_ADDRESS(INTEGRATOR_EBI_BASE),
                 .pfn            = __phys_to_pfn(INTEGRATOR_EBI_BASE),
                 .length         = SZ_4K,
@@ -122,11 +122,6 @@ static struct map_desc ap_io_desc[] __initdata = {
                 .length         = SZ_4K,
                 .type           = MT_DEVICE
         }, {
-                .virtual        = IO_ADDRESS(INTEGRATOR_UART1_BASE),
-                .pfn            = __phys_to_pfn(INTEGRATOR_UART1_BASE),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE
-        }, {
                 .virtual        = IO_ADDRESS(INTEGRATOR_DBG_BASE),
                 .pfn            = __phys_to_pfn(INTEGRATOR_DBG_BASE),
                 .length         = SZ_4K,
@@ -201,8 +196,6 @@ device_initcall(irq_syscore_init);
 /*
  * Flash handling.
  */
-#define SC_CTRLC (VA_SC_BASE + INTEGRATOR_SC_CTRLC_OFFSET)
-#define SC_CTRLS (VA_SC_BASE + INTEGRATOR_SC_CTRLS_OFFSET)
 #define EBI_CSR1 (VA_EBI_BASE + INTEGRATOR_EBI_CSR1_OFFSET)
 #define EBI_LOCK (VA_EBI_BASE + INTEGRATOR_EBI_LOCK_OFFSET)
 
@@ -210,7 +203,8 @@ static int ap_flash_init(struct platform_device *dev)
 {
         u32 tmp;
 
-        writel(INTEGRATOR_SC_CTRL_nFLVPPEN | INTEGRATOR_SC_CTRL_nFLWP, SC_CTRLC);
+        writel(INTEGRATOR_SC_CTRL_nFLVPPEN | INTEGRATOR_SC_CTRL_nFLWP,
+               ap_syscon_base + INTEGRATOR_SC_CTRLC_OFFSET);
 
         tmp = readl(EBI_CSR1) | INTEGRATOR_EBI_WRITE_ENABLE;
         writel(tmp, EBI_CSR1);
@@ -227,7 +221,8 @@ static void ap_flash_exit(struct platform_device *dev)
 {
         u32 tmp;
 
-        writel(INTEGRATOR_SC_CTRL_nFLVPPEN | INTEGRATOR_SC_CTRL_nFLWP, SC_CTRLC);
+        writel(INTEGRATOR_SC_CTRL_nFLVPPEN | INTEGRATOR_SC_CTRL_nFLWP,
+               ap_syscon_base + INTEGRATOR_SC_CTRLC_OFFSET);
 
         tmp = readl(EBI_CSR1) & ~INTEGRATOR_EBI_WRITE_ENABLE;
         writel(tmp, EBI_CSR1);
@@ -241,9 +236,12 @@ static void ap_flash_exit(struct platform_device *dev)
 
 static void ap_flash_set_vpp(struct platform_device *pdev, int on)
 {
-        void __iomem *reg = on ? SC_CTRLS : SC_CTRLC;
-
-        writel(INTEGRATOR_SC_CTRL_nFLVPPEN, reg);
+        if (on)
+                writel(INTEGRATOR_SC_CTRL_nFLVPPEN,
+                       ap_syscon_base + INTEGRATOR_SC_CTRLS_OFFSET);
+        else
+                writel(INTEGRATOR_SC_CTRL_nFLVPPEN,
+                       ap_syscon_base + INTEGRATOR_SC_CTRLC_OFFSET);
 }
 
 static struct physmap_flash_data ap_flash_data = {
@@ -254,6 +252,45 @@ static struct physmap_flash_data ap_flash_data = {
 };
 
 /*
+ * For the PL010 found in the Integrator/AP some of the UART control is
+ * implemented in the system controller and accessed using a callback
+ * from the driver.
+ */
+static void integrator_uart_set_mctrl(struct amba_device *dev,
+                                void __iomem *base, unsigned int mctrl)
+{
+        unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask;
+        u32 phybase = dev->res.start;
+
+        if (phybase == INTEGRATOR_UART0_BASE) {
+                /* UART0 */
+                rts_mask = 1 << 4;
+                dtr_mask = 1 << 5;
+        } else {
+                /* UART1 */
+                rts_mask = 1 << 6;
+                dtr_mask = 1 << 7;
+        }
+
+        if (mctrl & TIOCM_RTS)
+                ctrlc |= rts_mask;
+        else
+                ctrls |= rts_mask;
+
+        if (mctrl & TIOCM_DTR)
+                ctrlc |= dtr_mask;
+        else
+                ctrls |= dtr_mask;
+
+        __raw_writel(ctrls, ap_syscon_base + INTEGRATOR_SC_CTRLS_OFFSET);
+        __raw_writel(ctrlc, ap_syscon_base + INTEGRATOR_SC_CTRLC_OFFSET);
+}
+
+struct amba_pl010_data ap_uart_data = {
+        .set_mctrl = integrator_uart_set_mctrl,
+};
+
+/*
  * Where is the timer (VA)?
  */
 #define TIMER0_VA_BASE __io_address(INTEGRATOR_TIMER0_BASE)
@@ -450,9 +487,9 @@ static struct of_dev_auxdata ap_auxdata_lookup[] __initdata = {
         OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_RTC_BASE,
                 "rtc", NULL),
         OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART0_BASE,
-                "uart0", &integrator_uart_data),
+                "uart0", &ap_uart_data),
         OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART1_BASE,
-                "uart1", &integrator_uart_data),
+                "uart1", &ap_uart_data),
         OF_DEV_AUXDATA("arm,primecell", KMI0_BASE,
                 "kmi0", NULL),
         OF_DEV_AUXDATA("arm,primecell", KMI1_BASE,
@@ -465,12 +502,60 @@ static struct of_dev_auxdata ap_auxdata_lookup[] __initdata = {
 static void __init ap_init_of(void)
 {
         unsigned long sc_dec;
+        struct device_node *root;
+        struct device_node *syscon;
+        struct device *parent;
+        struct soc_device *soc_dev;
+        struct soc_device_attribute *soc_dev_attr;
+        u32 ap_sc_id;
+        int err;
         int i;
 
-        of_platform_populate(NULL, of_default_bus_match_table,
-                        ap_auxdata_lookup, NULL);
+        /* Here we create an SoC device for the root node */
+        root = of_find_node_by_path("/");
+        if (!root)
+                return;
+        syscon = of_find_node_by_path("/syscon");
+        if (!syscon)
+                return;
+
+        ap_syscon_base = of_iomap(syscon, 0);
+        if (!ap_syscon_base)
+                return;
 
-        sc_dec = readl(VA_SC_BASE + INTEGRATOR_SC_DEC_OFFSET);
+        ap_sc_id = readl(ap_syscon_base);
+
+        soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
+        if (!soc_dev_attr)
+                return;
+
+        err = of_property_read_string(root, "compatible",
+                                      &soc_dev_attr->soc_id);
+        if (err)
+                return;
+        err = of_property_read_string(root, "model", &soc_dev_attr->machine);
+        if (err)
+                return;
+        soc_dev_attr->family = "Integrator";
+        soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%c",
+                                           'A' + (ap_sc_id & 0x0f));
+
+        soc_dev = soc_device_register(soc_dev_attr);
+        if (IS_ERR_OR_NULL(soc_dev)) {
+                kfree(soc_dev_attr->revision);
+                kfree(soc_dev_attr);
+                return;
+        }
+
+        parent = soc_device_to_device(soc_dev);
+
+        if (!IS_ERR_OR_NULL(parent))
+                integrator_init_sysfs(parent, ap_sc_id);
+
+        of_platform_populate(root, of_default_bus_match_table,
+                        ap_auxdata_lookup, parent);
+
+        sc_dec = readl(ap_syscon_base + INTEGRATOR_SC_DEC_OFFSET);
         for (i = 0; i < 4; i++) {
                 struct lm_device *lmdev;
 
@@ -514,6 +599,27 @@ MACHINE_END
 #ifdef CONFIG_ATAGS
 
 /*
+ * For the ATAG boot some static mappings are needed. This will
+ * go away with the ATAG support down the road.
+ */
+
+static struct map_desc ap_io_desc_atag[] __initdata = {
+        {
+                .virtual        = IO_ADDRESS(INTEGRATOR_SC_BASE),
+                .pfn            = __phys_to_pfn(INTEGRATOR_SC_BASE),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE
+        },
+};
+
+static void __init ap_map_io_atag(void)
+{
+        iotable_init(ap_io_desc_atag, ARRAY_SIZE(ap_io_desc_atag));
+        ap_syscon_base = __io_address(INTEGRATOR_SC_BASE);
+        ap_map_io();
+}
+
+/*
  * This is where non-devicetree initialization code is collected and stashed
  * for eventual deletion.
  */
@@ -581,7 +687,7 @@ static void __init ap_init(void)
 
         platform_device_register(&cfi_flash_device);
 
-        sc_dec = readl(VA_SC_BASE + INTEGRATOR_SC_DEC_OFFSET);
+        sc_dec = readl(ap_syscon_base + INTEGRATOR_SC_DEC_OFFSET);
         for (i = 0; i < 4; i++) {
                 struct lm_device *lmdev;
 
@@ -608,7 +714,7 @@ MACHINE_START(INTEGRATOR, "ARM-Integrator")
         /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
         .atag_offset    = 0x100,
         .reserve        = integrator_reserve,
-        .map_io         = ap_map_io,
+        .map_io         = ap_map_io_atag,
         .nr_irqs        = NR_IRQS_INTEGRATOR_AP,
         .init_early     = ap_init_early,
         .init_irq       = ap_init_irq,
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 5b08e8e4cc83..29df06b35d0d 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -26,6 +26,7 @@
 #include <linux/of_irq.h>
 #include <linux/of_address.h>
 #include <linux/of_platform.h>
+#include <linux/sys_soc.h>
 
 #include <mach/hardware.h>
 #include <mach/platform.h>
@@ -51,11 +52,13 @@
 
 #include "common.h"
 
+/* Base address to the CP controller */
+static void __iomem *intcp_con_base;
+
 #define INTCP_PA_FLASH_BASE             0x24000000
 
 #define INTCP_PA_CLCD_BASE              0xc0000000
 
-#define INTCP_VA_CTRL_BASE              __io_address(INTEGRATOR_CP_CTL_BASE)
 #define INTCP_FLASHPROG                 0x04
 #define CINTEGRATOR_FLASHPROG_FLVPPEN   (1 << 0)
 #define CINTEGRATOR_FLASHPROG_FLWREN    (1 << 1)
@@ -82,11 +85,6 @@ static struct map_desc intcp_io_desc[] __initdata = {
                 .length         = SZ_4K,
                 .type           = MT_DEVICE
         }, {
-                .virtual        = IO_ADDRESS(INTEGRATOR_SC_BASE),
-                .pfn            = __phys_to_pfn(INTEGRATOR_SC_BASE),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE
-        }, {
                 .virtual        = IO_ADDRESS(INTEGRATOR_EBI_BASE),
                 .pfn            = __phys_to_pfn(INTEGRATOR_EBI_BASE),
                 .length         = SZ_4K,
@@ -107,11 +105,6 @@ static struct map_desc intcp_io_desc[] __initdata = {
                 .length         = SZ_4K,
                 .type           = MT_DEVICE
         }, {
-                .virtual        = IO_ADDRESS(INTEGRATOR_UART1_BASE),
-                .pfn            = __phys_to_pfn(INTEGRATOR_UART1_BASE),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE
-        }, {
                 .virtual        = IO_ADDRESS(INTEGRATOR_DBG_BASE),
                 .pfn            = __phys_to_pfn(INTEGRATOR_DBG_BASE),
                 .length         = SZ_4K,
@@ -126,11 +119,6 @@ static struct map_desc intcp_io_desc[] __initdata = {
                 .pfn            = __phys_to_pfn(INTEGRATOR_CP_SIC_BASE),
                 .length         = SZ_4K,
                 .type           = MT_DEVICE
-        }, {
-                .virtual        = IO_ADDRESS(INTEGRATOR_CP_CTL_BASE),
-                .pfn            = __phys_to_pfn(INTEGRATOR_CP_CTL_BASE),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE
         }
 };
 
@@ -146,9 +134,9 @@ static int intcp_flash_init(struct platform_device *dev)
 {
         u32 val;
 
-        val = readl(INTCP_VA_CTRL_BASE + INTCP_FLASHPROG);
+        val = readl(intcp_con_base + INTCP_FLASHPROG);
         val |= CINTEGRATOR_FLASHPROG_FLWREN;
-        writel(val, INTCP_VA_CTRL_BASE + INTCP_FLASHPROG);
+        writel(val, intcp_con_base + INTCP_FLASHPROG);
 
         return 0;
 }
@@ -157,21 +145,21 @@ static void intcp_flash_exit(struct platform_device *dev)
 {
         u32 val;
 
-        val = readl(INTCP_VA_CTRL_BASE + INTCP_FLASHPROG);
+        val = readl(intcp_con_base + INTCP_FLASHPROG);
         val &= ~(CINTEGRATOR_FLASHPROG_FLVPPEN|CINTEGRATOR_FLASHPROG_FLWREN);
-        writel(val, INTCP_VA_CTRL_BASE + INTCP_FLASHPROG);
+        writel(val, intcp_con_base + INTCP_FLASHPROG);
 }
 
 static void intcp_flash_set_vpp(struct platform_device *pdev, int on)
 {
         u32 val;
 
-        val = readl(INTCP_VA_CTRL_BASE + INTCP_FLASHPROG);
+        val = readl(intcp_con_base + INTCP_FLASHPROG);
         if (on)
                 val |= CINTEGRATOR_FLASHPROG_FLVPPEN;
         else
                 val &= ~CINTEGRATOR_FLASHPROG_FLVPPEN;
-        writel(val, INTCP_VA_CTRL_BASE + INTCP_FLASHPROG);
+        writel(val, intcp_con_base + INTCP_FLASHPROG);
 }
 
 static struct physmap_flash_data intcp_flash_data = {
@@ -190,7 +178,7 @@ static struct physmap_flash_data intcp_flash_data = {
 static unsigned int mmc_status(struct device *dev)
 {
         unsigned int status = readl(__io_address(0xca000000 + 4));
-        writel(8, __io_address(INTEGRATOR_CP_CTL_BASE + 8));
+        writel(8, intcp_con_base + 8);
 
         return status & 8;
 }
@@ -318,9 +306,9 @@ static struct of_dev_auxdata intcp_auxdata_lookup[] __initdata = {
         OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_RTC_BASE,
                 "rtc", NULL),
         OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART0_BASE,
-                "uart0", &integrator_uart_data),
+                "uart0", NULL),
         OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART1_BASE,
-                "uart1", &integrator_uart_data),
+                "uart1", NULL),
         OF_DEV_AUXDATA("arm,primecell", KMI0_BASE,
                 "kmi0", NULL),
         OF_DEV_AUXDATA("arm,primecell", KMI1_BASE,
@@ -338,8 +326,57 @@ static struct of_dev_auxdata intcp_auxdata_lookup[] __initdata = {
 
 static void __init intcp_init_of(void)
 {
-        of_platform_populate(NULL, of_default_bus_match_table,
-                        intcp_auxdata_lookup, NULL);
+        struct device_node *root;
+        struct device_node *cpcon;
+        struct device *parent;
+        struct soc_device *soc_dev;
+        struct soc_device_attribute *soc_dev_attr;
+        u32 intcp_sc_id;
+        int err;
+
+        /* Here we create an SoC device for the root node */
+        root = of_find_node_by_path("/");
+        if (!root)
+                return;
+        cpcon = of_find_node_by_path("/cpcon");
+        if (!cpcon)
+                return;
+
+        intcp_con_base = of_iomap(cpcon, 0);
+        if (!intcp_con_base)
+                return;
+
+        intcp_sc_id = readl(intcp_con_base);
+
+        soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
+        if (!soc_dev_attr)
+                return;
+
+        err = of_property_read_string(root, "compatible",
+                                      &soc_dev_attr->soc_id);
+        if (err)
+                return;
+        err = of_property_read_string(root, "model", &soc_dev_attr->machine);
+        if (err)
+                return;
+        soc_dev_attr->family = "Integrator";
+        soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%c",
+                                           'A' + (intcp_sc_id & 0x0f));
+
+        soc_dev = soc_device_register(soc_dev_attr);
+        if (IS_ERR_OR_NULL(soc_dev)) {
+                kfree(soc_dev_attr->revision);
+                kfree(soc_dev_attr);
+                return;
+        }
+
+        parent = soc_device_to_device(soc_dev);
+
+        if (!IS_ERR_OR_NULL(parent))
+                integrator_init_sysfs(parent, intcp_sc_id);
+
+        of_platform_populate(root, of_default_bus_match_table,
+                        intcp_auxdata_lookup, parent);
 }
 
 static const char * intcp_dt_board_compat[] = {
@@ -365,6 +402,28 @@ MACHINE_END
 #ifdef CONFIG_ATAGS
 
 /*
+ * For the ATAG boot some static mappings are needed. This will
+ * go away with the ATAG support down the road.
+ */
+
+static struct map_desc intcp_io_desc_atag[] __initdata = {
+        {
+                .virtual        = IO_ADDRESS(INTEGRATOR_CP_CTL_BASE),
+                .pfn            = __phys_to_pfn(INTEGRATOR_CP_CTL_BASE),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE
+        },
+};
+
+static void __init intcp_map_io_atag(void)
+{
+        iotable_init(intcp_io_desc_atag, ARRAY_SIZE(intcp_io_desc_atag));
+        intcp_con_base = __io_address(INTEGRATOR_CP_CTL_BASE);
+        intcp_map_io();
+}
+
+
+/*
  * This is where non-devicetree initialization code is collected and stashed
  * for eventual deletion.
  */
@@ -503,7 +562,7 @@ MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP")
         /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
         .atag_offset    = 0x100,
         .reserve        = integrator_reserve,
-        .map_io         = intcp_map_io,
+        .map_io         = intcp_map_io_atag,
         .nr_irqs        = NR_IRQS_INTEGRATOR_CP,
         .init_early     = intcp_init_early,
         .init_irq       = intcp_init_irq,
diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c
index bbeca59df66b..be50e795536d 100644
--- a/arch/arm/mach-integrator/pci_v3.c
+++ b/arch/arm/mach-integrator/pci_v3.c
@@ -191,12 +191,9 @@ static void __iomem *v3_open_config_window(struct pci_bus *bus,
         /*
          * Trap out illegal values
          */
-        if (offset > 255)
-                BUG();
-        if (busnr > 255)
-                BUG();
-        if (devfn > 255)
-                BUG();
+        BUG_ON(offset > 255);
+        BUG_ON(busnr > 255);
+        BUG_ON(devfn > 255);
 
         if (busnr == 0) {
                 int slot = PCI_SLOT(devfn);
@@ -388,9 +385,10 @@ static int __init pci_v3_setup_resources(struct pci_sys_data *sys)
  * means I can't get additional information on the reason for the pm2fb
  * problems.  I suppose I'll just have to mind-meld with the machine. ;)
  */
-#define SC_PCI     __io_address(INTEGRATOR_SC_PCIENABLE)
-#define SC_LBFADDR __io_address(INTEGRATOR_SC_BASE + 0x20)
-#define SC_LBFCODE __io_address(INTEGRATOR_SC_BASE + 0x24)
+static void __iomem *ap_syscon_base;
+#define INTEGRATOR_SC_PCIENABLE_OFFSET  0x18
+#define INTEGRATOR_SC_LBFADDR_OFFSET    0x20
+#define INTEGRATOR_SC_LBFCODE_OFFSET    0x24
 
 static int
 v3_pci_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
@@ -401,13 +399,13 @@ v3_pci_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
         char buf[128];
 
         sprintf(buf, "V3 fault: addr 0x%08lx, FSR 0x%03x, PC 0x%08lx [%08lx] LBFADDR=%08x LBFCODE=%02x ISTAT=%02x\n",
-                addr, fsr, pc, instr, __raw_readl(SC_LBFADDR), __raw_readl(SC_LBFCODE) & 255,
+                addr, fsr, pc, instr, __raw_readl(ap_syscon_base + INTEGRATOR_SC_LBFADDR_OFFSET), __raw_readl(ap_syscon_base + INTEGRATOR_SC_LBFCODE_OFFSET) & 255,
                 v3_readb(V3_LB_ISTAT));
         printk(KERN_DEBUG "%s", buf);
 #endif
 
         v3_writeb(V3_LB_ISTAT, 0);
-        __raw_writel(3, SC_PCI);
+        __raw_writel(3, ap_syscon_base + INTEGRATOR_SC_PCIENABLE_OFFSET);
 
         /*
          * If the instruction being executed was a read,
@@ -449,15 +447,15 @@ static irqreturn_t v3_irq(int dummy, void *devid)
 
         sprintf(buf, "V3 int %d: pc=0x%08lx [%08lx] LBFADDR=%08x LBFCODE=%02x "
                 "ISTAT=%02x\n", IRQ_AP_V3INT, pc, instr,
-                __raw_readl(SC_LBFADDR),
-                __raw_readl(SC_LBFCODE) & 255,
+                __raw_readl(ap_syscon_base + INTEGRATOR_SC_LBFADDR_OFFSET),
+                __raw_readl(ap_syscon_base + INTEGRATOR_SC_LBFCODE_OFFSET) & 255,
                 v3_readb(V3_LB_ISTAT));
         printascii(buf);
 #endif
 
         v3_writew(V3_PCI_STAT, 0xf000);
         v3_writeb(V3_LB_ISTAT, 0);
-        __raw_writel(3, SC_PCI);
+        __raw_writel(3, ap_syscon_base + INTEGRATOR_SC_PCIENABLE_OFFSET);
 
 #ifdef CONFIG_DEBUG_LL
         /*
@@ -480,6 +478,10 @@ int __init pci_v3_setup(int nr, struct pci_sys_data *sys)
         if (nr == 0) {
                 sys->mem_offset = PHYS_PCI_MEM_BASE;
                 ret = pci_v3_setup_resources(sys);
+                /* Remap the Integrator system controller */
+                ap_syscon_base = ioremap(INTEGRATOR_SC_BASE, 0x100);
+                if (!ap_syscon_base)
+                        return -EINVAL;
         }
 
         return ret;
@@ -568,7 +570,7 @@ void __init pci_v3_preinit(void)
         v3_writeb(V3_LB_ISTAT, 0);
         v3_writew(V3_LB_CFG, v3_readw(V3_LB_CFG) | (1 << 10));
         v3_writeb(V3_LB_IMASK, 0x28);
-        __raw_writel(3, SC_PCI);
+        __raw_writel(3, ap_syscon_base + INTEGRATOR_SC_PCIENABLE_OFFSET);
 
         /*
          * Grab the PCI error interrupt.
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig
index 50bca5032b7e..503d7dd944ff 100644
--- a/arch/arm/mach-kirkwood/Kconfig
+++ b/arch/arm/mach-kirkwood/Kconfig
@@ -46,6 +46,11 @@ config MACH_GURUPLUG
 
 config ARCH_KIRKWOOD_DT
         bool "Marvell Kirkwood Flattened Device Tree"
+        select POWER_SUPPLY
+        select POWER_RESET
+        select POWER_RESET_GPIO
+        select REGULATOR
+        select REGULATOR_FIXED_VOLTAGE
         select USE_OF
         help
           Say 'Y' here if you want your kernel to support the
@@ -130,6 +135,63 @@ config MACH_KM_KIRKWOOD_DT
           Say 'Y' here if you want your kernel to support the
           Keymile Kirkwood Reference Desgin, using Flattened Device Tree.
 
+config MACH_INETSPACE_V2_DT
+        bool "LaCie Internet Space v2 NAS (Flattened Device Tree)"
+        select ARCH_KIRKWOOD_DT
+        help
+          Say 'Y' here if you want your kernel to support the LaCie
+          Internet Space v2 NAS, using Flattened Device Tree.
+
+config MACH_MPLCEC4_DT
+        bool "MPL CEC4 (Flattened Device Tree)"
+        select ARCH_KIRKWOOD_DT
+        help
+          Say 'Y' here if you want your kernel to support the
+          MPL CEC4 (Flattened Device Tree).
+
+config MACH_NETSPACE_V2_DT
+        bool "LaCie Network Space v2 NAS (Flattened Device Tree)"
+        select ARCH_KIRKWOOD_DT
+        help
+          Say 'Y' here if you want your kernel to support the LaCie
+          Network Space v2 NAS, using Flattened Device Tree.
+
+config MACH_NETSPACE_MAX_V2_DT
+        bool "LaCie Network Space Max v2 NAS (Flattened Device Tree)"
+        select ARCH_KIRKWOOD_DT
+        help
+          Say 'Y' here if you want your kernel to support the LaCie
+          Network Space Max v2 NAS, using Flattened Device Tree.
+
+config MACH_NETSPACE_LITE_V2_DT
+        bool "LaCie Network Space Lite v2 NAS (Flattened Device Tree)"
+        select ARCH_KIRKWOOD_DT
+        help
+          Say 'Y' here if you want your kernel to support the LaCie
+          Network Space Lite v2 NAS, using Flattened Device Tree.
+
+config MACH_NETSPACE_MINI_V2_DT
+        bool "LaCie Network Space Mini v2 NAS (Flattened Device Tree)"
+        select ARCH_KIRKWOOD_DT
+        help
+          Say 'Y' here if you want your kernel to support the LaCie
+          Network Space Mini v2 NAS (aka SafeBox), using Flattened
+          Device Tree.
+
+config MACH_OPENBLOCKS_A6_DT
+        bool "Plat'Home OpenBlocks A6 (Flattened Device Tree)"
+        select ARCH_KIRKWOOD_DT
+        help
+          Say 'Y' here if you want your kernel to support the
+          Plat'Home OpenBlocks A6 (Flattened Device Tree).
+
+config MACH_TOPKICK_DT
+        bool "USI Topkick (Flattened Device Tree)"
+        select ARCH_KIRKWOOD_DT
+        help
+          Say 'Y' here if you want your kernel to support the
+          USI Topkick, using Flattened Device Tree
+
 config MACH_TS219
         bool "QNAP TS-110, TS-119, TS-119P+, TS-210, TS-219, TS-219P and TS-219P+ Turbo NAS"
         help
@@ -216,6 +278,14 @@ config MACH_T5325
           Say 'Y' here if you want your kernel to support the
           HP t5325 Thin Client.
 
+config MACH_NSA310_DT
+        bool "ZyXEL NSA-310 (Flattened Device Tree)"
+        select ARCH_KIRKWOOD_DT
+        select ARM_ATAG_DTB_COMPAT
+        help
+          Say 'Y' here if you want your kernel to support the
+          ZyXEL NSA-310 board (Flattened Device Tree).
+
 endmenu
 
 endif
diff --git a/arch/arm/mach-kirkwood/Makefile b/arch/arm/mach-kirkwood/Makefile
index 294779f892d9..8d2e5a96247c 100644
--- a/arch/arm/mach-kirkwood/Makefile
+++ b/arch/arm/mach-kirkwood/Makefile
@@ -31,3 +31,12 @@ obj-$(CONFIG_MACH_GOFLEXNET_DT)		+= board-goflexnet.o
 obj-$(CONFIG_MACH_LSXL_DT)              += board-lsxl.o
 obj-$(CONFIG_MACH_IOMEGA_IX2_200_DT)    += board-iomega_ix2_200.o
 obj-$(CONFIG_MACH_KM_KIRKWOOD_DT)       += board-km_kirkwood.o
+obj-$(CONFIG_MACH_INETSPACE_V2_DT)      += board-ns2.o
+obj-$(CONFIG_MACH_MPLCEC4_DT)           += board-mplcec4.o
+obj-$(CONFIG_MACH_NETSPACE_V2_DT)       += board-ns2.o
+obj-$(CONFIG_MACH_NETSPACE_MAX_V2_DT)   += board-ns2.o
+obj-$(CONFIG_MACH_NETSPACE_LITE_V2_DT)  += board-ns2.o
+obj-$(CONFIG_MACH_NETSPACE_MINI_V2_DT)  += board-ns2.o
+obj-$(CONFIG_MACH_NSA310_DT)            += board-nsa310.o
+obj-$(CONFIG_MACH_OPENBLOCKS_A6_DT)     += board-openblocks_a6.o
+obj-$(CONFIG_MACH_TOPKICK_DT)           += board-usi_topkick.o
diff --git a/arch/arm/mach-kirkwood/board-dnskw.c b/arch/arm/mach-kirkwood/board-dnskw.c
index 43d16d6714b8..a1aa87f09180 100644
--- a/arch/arm/mach-kirkwood/board-dnskw.c
+++ b/arch/arm/mach-kirkwood/board-dnskw.c
@@ -17,51 +17,11 @@
 #include <linux/mv643xx_eth.h>
 #include <linux/gpio.h>
 #include "common.h"
-#include "mpp.h"
 
 static struct mv643xx_eth_platform_data dnskw_ge00_data = {
         .phy_addr       = MV643XX_ETH_PHY_ADDR(8),
 };
 
-static unsigned int dnskw_mpp_config[] __initdata = {
-        MPP13_UART1_TXD,        /* Custom ... */
-        MPP14_UART1_RXD,        /* ... Controller (DNS-320 only) */
-        MPP20_SATA1_ACTn,       /* LED: White Right HDD */
-        MPP21_SATA0_ACTn,       /* LED: White Left HDD */
-        MPP24_GPIO,
-        MPP25_GPIO,
-        MPP26_GPIO,     /* LED: Power */
-        MPP27_GPIO,     /* LED: Red Right HDD */
-        MPP28_GPIO,     /* LED: Red Left HDD */
-        MPP29_GPIO,     /* LED: Red USB (DNS-325 only) */
-        MPP30_GPIO,
-        MPP31_GPIO,
-        MPP32_GPIO,
-        MPP33_GPO,
-        MPP34_GPIO,     /* Button: Front power */
-        MPP35_GPIO,     /* LED: Red USB (DNS-320 only) */
-        MPP36_GPIO,     /* Power: Turn off board */
-        MPP37_GPIO,     /* Power: Turn back on after power failure */
-        MPP38_GPIO,
-        MPP39_GPIO,     /* Power: SATA0 */
-        MPP40_GPIO,     /* Power: SATA1 */
-        MPP41_GPIO,     /* SATA0 present */
-        MPP42_GPIO,     /* SATA1 present */
-        MPP43_GPIO,     /* LED: White USB */
-        MPP44_GPIO,     /* Fan: Tachometer Pin */
-        MPP45_GPIO,     /* Fan: high speed */
-        MPP46_GPIO,     /* Fan: low speed */
-        MPP47_GPIO,     /* Button: Back unmount */
-        MPP48_GPIO,     /* Button: Back reset */
-        MPP49_GPIO,     /* Temp Alarm (DNS-325) Pin of U5 (DNS-320) */
-        0
-};
-
-static void dnskw_power_off(void)
-{
-        gpio_set_value(36, 1);
-}
-
 /* Register any GPIO for output and set the value */
 static void __init dnskw_gpio_register(unsigned gpio, char *name, int def)
 {
@@ -76,22 +36,8 @@ static void __init dnskw_gpio_register(unsigned gpio, char *name, int def)
 
 void __init dnskw_init(void)
 {
-        kirkwood_mpp_conf(dnskw_mpp_config);
-
-        kirkwood_ehci_init();
         kirkwood_ge00_init(&dnskw_ge00_data);
 
-        /* Register power-off GPIO. */
-        if (gpio_request(36, "dnskw:power:off") == 0
-            && gpio_direction_output(36, 0) == 0)
-                pm_power_off = dnskw_power_off;
-        else
-                pr_err("dnskw: failed to configure power-off GPIO\n");
-
-        /* Ensure power is supplied to both HDDs */
-        dnskw_gpio_register(39, "dnskw:power:sata0", 1);
-        dnskw_gpio_register(40, "dnskw:power:sata1", 1);
-
         /* Set NAS to turn back on after a power failure */
         dnskw_gpio_register(37, "dnskw:power:recover", 1);
 }
diff --git a/arch/arm/mach-kirkwood/board-dockstar.c b/arch/arm/mach-kirkwood/board-dockstar.c
index f2fbb023e679..d7196db33984 100644
--- a/arch/arm/mach-kirkwood/board-dockstar.c
+++ b/arch/arm/mach-kirkwood/board-dockstar.c
@@ -16,46 +16,17 @@
 
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/ata_platform.h>
 #include <linux/mv643xx_eth.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/of_fdt.h>
-#include <linux/of_irq.h>
-#include <linux/of_platform.h>
-#include <linux/gpio.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <mach/kirkwood.h>
-#include <mach/bridge-regs.h>
-#include <linux/platform_data/mmc-mvsdio.h>
 #include "common.h"
-#include "mpp.h"
 
 static struct mv643xx_eth_platform_data dockstar_ge00_data = {
         .phy_addr       = MV643XX_ETH_PHY_ADDR(0),
 };
 
-static unsigned int dockstar_mpp_config[] __initdata = {
-        MPP29_GPIO,     /* USB Power Enable */
-        MPP46_GPIO,     /* LED green */
-        MPP47_GPIO,     /* LED orange */
-        0
-};
-
 void __init dockstar_dt_init(void)
 {
         /*
          * Basic setup. Needs to be called early.
          */
-        kirkwood_mpp_conf(dockstar_mpp_config);
-
-        if (gpio_request(29, "USB Power Enable") != 0 ||
-            gpio_direction_output(29, 1) != 0)
-                pr_err("can't setup GPIO 29 (USB Power Enable)\n");
-        kirkwood_ehci_init();
-
         kirkwood_ge00_init(&dockstar_ge00_data);
 }
diff --git a/arch/arm/mach-kirkwood/board-dreamplug.c b/arch/arm/mach-kirkwood/board-dreamplug.c
index 20af53a56c0e..08248e24ffcd 100644
--- a/arch/arm/mach-kirkwood/board-dreamplug.c
+++ b/arch/arm/mach-kirkwood/board-dreamplug.c
@@ -13,26 +13,10 @@
 
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/ata_platform.h>
 #include <linux/mv643xx_eth.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/of_fdt.h>
-#include <linux/of_irq.h>
-#include <linux/of_platform.h>
 #include <linux/gpio.h>
-#include <linux/mtd/physmap.h>
-#include <linux/spi/flash.h>
-#include <linux/spi/spi.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <mach/kirkwood.h>
-#include <mach/bridge-regs.h>
 #include <linux/platform_data/mmc-mvsdio.h>
 #include "common.h"
-#include "mpp.h"
 
 static struct mv643xx_eth_platform_data dreamplug_ge00_data = {
         .phy_addr       = MV643XX_ETH_PHY_ADDR(0),
@@ -46,25 +30,11 @@ static struct mvsdio_platform_data dreamplug_mvsdio_data = {
         /* unfortunately the CD signal has not been connected */
 };
 
-static unsigned int dreamplug_mpp_config[] __initdata = {
-        MPP0_SPI_SCn,
-        MPP1_SPI_MOSI,
-        MPP2_SPI_SCK,
-        MPP3_SPI_MISO,
-        MPP47_GPIO,     /* Bluetooth LED */
-        MPP48_GPIO,     /* Wifi LED */
-        MPP49_GPIO,     /* Wifi AP LED */
-        0
-};
-
 void __init dreamplug_init(void)
 {
         /*
          * Basic setup. Needs to be called early.
          */
-        kirkwood_mpp_conf(dreamplug_mpp_config);
-
-        kirkwood_ehci_init();
         kirkwood_ge00_init(&dreamplug_ge00_data);
         kirkwood_ge01_init(&dreamplug_ge01_data);
         kirkwood_sdio_init(&dreamplug_mvsdio_data);
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
index d94872fed8c0..375f7d88551c 100644
--- a/arch/arm/mach-kirkwood/board-dt.c
+++ b/arch/arm/mach-kirkwood/board-dt.c
@@ -26,10 +26,12 @@ static struct of_device_id kirkwood_dt_match_table[] __initdata = {
         { }
 };
 
-struct of_dev_auxdata kirkwood_auxdata_lookup[] __initdata = {
+static struct of_dev_auxdata kirkwood_auxdata_lookup[] __initdata = {
         OF_DEV_AUXDATA("marvell,orion-spi", 0xf1010600, "orion_spi.0", NULL),
         OF_DEV_AUXDATA("marvell,mv64xxx-i2c", 0xf1011000, "mv64xxx_i2c.0",
                        NULL),
+        OF_DEV_AUXDATA("marvell,mv64xxx-i2c", 0xf1011100, "mv64xxx_i2c.1",
+                       NULL),
         OF_DEV_AUXDATA("marvell,orion-wdt", 0xf1020300, "orion_wdt", NULL),
         OF_DEV_AUXDATA("marvell,orion-sata", 0xf1080000, "sata_mv.0", NULL),
         OF_DEV_AUXDATA("marvell,orion-nand", 0xf4000000, "orion_nand", NULL),
@@ -94,11 +96,30 @@ static void __init kirkwood_dt_init(void)
         if (of_machine_is_compatible("keymile,km_kirkwood"))
                 km_kirkwood_init();
 
+        if (of_machine_is_compatible("lacie,inetspace_v2") ||
+            of_machine_is_compatible("lacie,netspace_v2") ||
+            of_machine_is_compatible("lacie,netspace_max_v2") ||
+            of_machine_is_compatible("lacie,netspace_lite_v2") ||
+            of_machine_is_compatible("lacie,netspace_mini_v2"))
+                ns2_init();
+
+        if (of_machine_is_compatible("mpl,cec4"))
+                mplcec4_init();
+
+        if (of_machine_is_compatible("plathome,openblocks-a6"))
+                openblocks_a6_init();
+
+        if (of_machine_is_compatible("usi,topkick"))
+                usi_topkick_init();
+
+        if (of_machine_is_compatible("zyxel,nsa310"))
+                nsa310_init();
+
         of_platform_populate(NULL, kirkwood_dt_match_table,
                              kirkwood_auxdata_lookup, NULL);
 }
 
-static const char *kirkwood_dt_board_compat[] = {
+static const char * const kirkwood_dt_board_compat[] = {
         "globalscale,dreamplug",
         "dlink,dns-320",
         "dlink,dns-325",
@@ -110,6 +131,15 @@ static const char *kirkwood_dt_board_compat[] = {
         "buffalo,lsxl",
         "iom,ix2-200",
         "keymile,km_kirkwood",
+        "lacie,inetspace_v2",
+        "lacie,netspace_max_v2",
+        "lacie,netspace_v2",
+        "lacie,netspace_lite_v2",
+        "lacie,netspace_mini_v2",
+        "mpl,cec4",
+        "plathome,openblocks-a6",
+        "usi,topkick",
+        "zyxel,nsa310",
         NULL
 };
 
diff --git a/arch/arm/mach-kirkwood/board-goflexnet.c b/arch/arm/mach-kirkwood/board-goflexnet.c
index 001ca8c96980..9db979aec82e 100644
--- a/arch/arm/mach-kirkwood/board-goflexnet.c
+++ b/arch/arm/mach-kirkwood/board-goflexnet.c
@@ -18,54 +18,17 @@
 
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/ata_platform.h>
 #include <linux/mv643xx_eth.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/of_fdt.h>
-#include <linux/of_irq.h>
-#include <linux/of_platform.h>
-#include <linux/gpio.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <mach/kirkwood.h>
-#include <mach/bridge-regs.h>
-#include <linux/platform_data/mmc-mvsdio.h>
 #include "common.h"
-#include "mpp.h"
 
 static struct mv643xx_eth_platform_data goflexnet_ge00_data = {
         .phy_addr       = MV643XX_ETH_PHY_ADDR(0),
 };
 
-static unsigned int goflexnet_mpp_config[] __initdata = {
-        MPP29_GPIO,     /* USB Power Enable */
-        MPP47_GPIO,     /* LED Orange */
-        MPP46_GPIO,     /* LED Green */
-        MPP45_GPIO,     /* LED Left Capacity 3 */
-        MPP44_GPIO,     /* LED Left Capacity 2 */
-        MPP43_GPIO,     /* LED Left Capacity 1 */
-        MPP42_GPIO,     /* LED Left Capacity 0 */
-        MPP41_GPIO,     /* LED Right Capacity 3 */
-        MPP40_GPIO,     /* LED Right Capacity 2 */
-        MPP39_GPIO,     /* LED Right Capacity 1 */
-        MPP38_GPIO,     /* LED Right Capacity 0 */
-        0
-};
-
 void __init goflexnet_init(void)
 {
         /*
          * Basic setup. Needs to be called early.
          */
-        kirkwood_mpp_conf(goflexnet_mpp_config);
-
-        if (gpio_request(29, "USB Power Enable") != 0 ||
-            gpio_direction_output(29, 1) != 0)
-                pr_err("can't setup GPIO 29 (USB Power Enable)\n");
-        kirkwood_ehci_init();
-
         kirkwood_ge00_init(&goflexnet_ge00_data);
 }
diff --git a/arch/arm/mach-kirkwood/board-ib62x0.c b/arch/arm/mach-kirkwood/board-ib62x0.c
index cfc47f80e734..9f6f496380d8 100644
--- a/arch/arm/mach-kirkwood/board-ib62x0.c
+++ b/arch/arm/mach-kirkwood/board-ib62x0.c
@@ -13,59 +13,18 @@
 
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/mtd/partitions.h>
-#include <linux/ata_platform.h>
 #include <linux/mv643xx_eth.h>
-#include <linux/gpio.h>
 #include <linux/input.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <mach/kirkwood.h>
 #include "common.h"
-#include "mpp.h"
-
-#define IB62X0_GPIO_POWER_OFF   24
 
 static struct mv643xx_eth_platform_data ib62x0_ge00_data = {
         .phy_addr       = MV643XX_ETH_PHY_ADDR(8),
 };
 
-static unsigned int ib62x0_mpp_config[] __initdata = {
-        MPP0_NF_IO2,
-        MPP1_NF_IO3,
-        MPP2_NF_IO4,
-        MPP3_NF_IO5,
-        MPP4_NF_IO6,
-        MPP5_NF_IO7,
-        MPP18_NF_IO0,
-        MPP19_NF_IO1,
-        MPP22_GPIO,     /* OS LED red */
-        MPP24_GPIO,     /* Power off device */
-        MPP25_GPIO,     /* OS LED green */
-        MPP27_GPIO,     /* USB transfer LED */
-        MPP28_GPIO,     /* Reset button */
-        MPP29_GPIO,     /* USB Copy button */
-        0
-};
-
-static void ib62x0_power_off(void)
-{
-        gpio_set_value(IB62X0_GPIO_POWER_OFF, 1);
-}
-
 void __init ib62x0_init(void)
 {
         /*
          * Basic setup. Needs to be called early.
          */
-        kirkwood_mpp_conf(ib62x0_mpp_config);
-
-        kirkwood_ehci_init();
         kirkwood_ge00_init(&ib62x0_ge00_data);
-        if (gpio_request(IB62X0_GPIO_POWER_OFF, "ib62x0:power:off") == 0 &&
-            gpio_direction_output(IB62X0_GPIO_POWER_OFF, 0) == 0)
-                pm_power_off = ib62x0_power_off;
-        else
-                pr_err("board-ib62x0: failed to configure power-off GPIO\n");
 }
diff --git a/arch/arm/mach-kirkwood/board-iconnect.c b/arch/arm/mach-kirkwood/board-iconnect.c
index d084b1e2943a..c8ebde4919e2 100644
--- a/arch/arm/mach-kirkwood/board-iconnect.c
+++ b/arch/arm/mach-kirkwood/board-iconnect.c
@@ -10,42 +10,16 @@
 
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/platform_device.h>
 #include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/of_fdt.h>
-#include <linux/of_irq.h>
-#include <linux/of_platform.h>
 #include <linux/mv643xx_eth.h>
-#include <linux/gpio.h>
-#include <asm/mach/arch.h>
-#include <mach/kirkwood.h>
 #include "common.h"
-#include "mpp.h"
 
 static struct mv643xx_eth_platform_data iconnect_ge00_data = {
         .phy_addr       = MV643XX_ETH_PHY_ADDR(11),
 };
 
-static unsigned int iconnect_mpp_config[] __initdata = {
-        MPP12_GPIO,
-        MPP35_GPIO,
-        MPP41_GPIO,
-        MPP42_GPIO,
-        MPP43_GPIO,
-        MPP44_GPIO,
-        MPP45_GPIO,
-        MPP46_GPIO,
-        MPP47_GPIO,
-        MPP48_GPIO,
-        0
-};
-
 void __init iconnect_init(void)
 {
-        kirkwood_mpp_conf(iconnect_mpp_config);
-
-        kirkwood_ehci_init();
         kirkwood_ge00_init(&iconnect_ge00_data);
 }
 
diff --git a/arch/arm/mach-kirkwood/board-iomega_ix2_200.c b/arch/arm/mach-kirkwood/board-iomega_ix2_200.c
index 158fb97d0397..f655b2637b0e 100644
--- a/arch/arm/mach-kirkwood/board-iomega_ix2_200.c
+++ b/arch/arm/mach-kirkwood/board-iomega_ix2_200.c
@@ -10,12 +10,9 @@
 
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/platform_device.h>
 #include <linux/mv643xx_eth.h>
 #include <linux/ethtool.h>
-#include <mach/kirkwood.h>
 #include "common.h"
-#include "mpp.h"
 
 static struct mv643xx_eth_platform_data iomega_ix2_200_ge00_data = {
         .phy_addr       = MV643XX_ETH_PHY_NONE,
@@ -23,35 +20,10 @@ static struct mv643xx_eth_platform_data iomega_ix2_200_ge00_data = {
         .duplex         = DUPLEX_FULL,
 };
 
-static unsigned int iomega_ix2_200_mpp_config[] __initdata = {
-        MPP12_GPIO,                     /* Reset Button */
-        MPP14_GPIO,                     /* Power Button */
-        MPP15_GPIO,                     /* Backup LED (blue) */
-        MPP16_GPIO,                     /* Power LED (white) */
-        MPP35_GPIO,                     /* OTB Button */
-        MPP36_GPIO,                     /* Rebuild LED (white) */
-        MPP37_GPIO,                     /* Health LED (red) */
-        MPP38_GPIO,                     /* SATA LED brightness control 1 */
-        MPP39_GPIO,                     /* SATA LED brightness control 2 */
-        MPP40_GPIO,                     /* Backup LED brightness control 1 */
-        MPP41_GPIO,                     /* Backup LED brightness control 2 */
-        MPP42_GPIO,                     /* Power LED brightness control 1 */
-        MPP43_GPIO,                     /* Power LED brightness control 2 */
-        MPP44_GPIO,                     /* Health LED brightness control 1 */
-        MPP45_GPIO,                     /* Health LED brightness control 2 */
-        MPP46_GPIO,                     /* Rebuild LED brightness control 1 */
-        MPP47_GPIO,                     /* Rebuild LED brightness control 2 */
-        0
-};
-
 void __init iomega_ix2_200_init(void)
 {
         /*
          * Basic setup. Needs to be called early.
          */
-        kirkwood_mpp_conf(iomega_ix2_200_mpp_config);
-
-        kirkwood_ehci_init();
-
         kirkwood_ge01_init(&iomega_ix2_200_ge00_data);
 }
diff --git a/arch/arm/mach-kirkwood/board-km_kirkwood.c b/arch/arm/mach-kirkwood/board-km_kirkwood.c
index f7d32834b757..44e4605ba0bf 100644
--- a/arch/arm/mach-kirkwood/board-km_kirkwood.c
+++ b/arch/arm/mach-kirkwood/board-km_kirkwood.c
@@ -18,27 +18,15 @@
 #include <linux/clk.h>
 #include <linux/clk-private.h>
 #include "common.h"
-#include "mpp.h"
 
 static struct mv643xx_eth_platform_data km_kirkwood_ge00_data = {
         .phy_addr       = MV643XX_ETH_PHY_ADDR(0),
 };
 
-static unsigned int km_kirkwood_mpp_config[] __initdata = {
-        MPP8_GPIO,      /* I2C SDA */
-        MPP9_GPIO,      /* I2C SCL */
-        0
-};
-
 void __init km_kirkwood_init(void)
 {
         struct clk *sata_clk;
         /*
-         * Basic setup. Needs to be called early.
-         */
-        kirkwood_mpp_conf(km_kirkwood_mpp_config);
-
-        /*
          * Our variant of kirkwood (integrated in the Bobcat) hangs on accessing
          * SATA bits (14-15) of the Clock Gating Control Register. Since these
          * devices are also not present in this variant, their clocks get
@@ -52,6 +40,5 @@ void __init km_kirkwood_init(void)
         if (!IS_ERR(sata_clk))
                 sata_clk->flags |= CLK_IGNORE_UNUSED;
 
-        kirkwood_ehci_init();
         kirkwood_ge00_init(&km_kirkwood_ge00_data);
 }
diff --git a/arch/arm/mach-kirkwood/board-lsxl.c b/arch/arm/mach-kirkwood/board-lsxl.c
index 83d8975592f8..4ec8b7ae784a 100644
--- a/arch/arm/mach-kirkwood/board-lsxl.c
+++ b/arch/arm/mach-kirkwood/board-lsxl.c
@@ -14,19 +14,8 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
-#include <linux/mtd/partitions.h>
-#include <linux/ata_platform.h>
-#include <linux/spi/flash.h>
-#include <linux/spi/spi.h>
 #include <linux/mv643xx_eth.h>
-#include <linux/gpio.h>
-#include <linux/gpio-fan.h>
-#include <linux/input.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <mach/kirkwood.h>
 #include "common.h"
-#include "mpp.h"
 
 static struct mv643xx_eth_platform_data lsxl_ge00_data = {
         .phy_addr       = MV643XX_ETH_PHY_ADDR(0),
@@ -36,68 +25,6 @@ static struct mv643xx_eth_platform_data lsxl_ge01_data = {
         .phy_addr       = MV643XX_ETH_PHY_ADDR(8),
 };
 
-static unsigned int lsxl_mpp_config[] __initdata = {
-        MPP10_GPO,      /* HDD Power Enable */
-        MPP11_GPIO,     /* USB Vbus Enable */
-        MPP18_GPO,      /* FAN High Enable# */
-        MPP19_GPO,      /* FAN Low Enable# */
-        MPP36_GPIO,     /* Function Blue LED */
-        MPP37_GPIO,     /* Alarm LED */
-        MPP38_GPIO,     /* Info LED */
-        MPP39_GPIO,     /* Power LED */
-        MPP40_GPIO,     /* Fan Lock */
-        MPP41_GPIO,     /* Function Button */
-        MPP42_GPIO,     /* Power Switch */
-        MPP43_GPIO,     /* Power Auto Switch */
-        MPP48_GPIO,     /* Function Red LED */
-        0
-};
-
-#define LSXL_GPIO_FAN_HIGH      18
-#define LSXL_GPIO_FAN_LOW       19
-#define LSXL_GPIO_FAN_LOCK      40
-
-static struct gpio_fan_alarm lsxl_alarm = {
-        .gpio = LSXL_GPIO_FAN_LOCK,
-};
-
-static struct gpio_fan_speed lsxl_speeds[] = {
-        {
-                .rpm = 0,
-                .ctrl_val = 3,
-        }, {
-                .rpm = 1500,
-                .ctrl_val = 1,
-        }, {
-                .rpm = 3250,
-                .ctrl_val = 2,
-        }, {
-                .rpm = 5000,
-                .ctrl_val = 0,
-        }
-};
-
-static int lsxl_gpio_list[] = {
-        LSXL_GPIO_FAN_HIGH, LSXL_GPIO_FAN_LOW,
-};
-
-static struct gpio_fan_platform_data lsxl_fan_data = {
-        .num_ctrl = ARRAY_SIZE(lsxl_gpio_list),
-        .ctrl = lsxl_gpio_list,
-        .alarm = &lsxl_alarm,
-        .num_speed = ARRAY_SIZE(lsxl_speeds),
-        .speed = lsxl_speeds,
-};
-
-static struct platform_device lsxl_fan_device = {
-        .name = "gpio-fan",
-        .id = -1,
-        .num_resources = 0,
-        .dev = {
-                .platform_data = &lsxl_fan_data,
-        },
-};
-
 /*
  * On the LS-XHL/LS-CHLv2, the shutdown process is following:
  * - Userland monitors key events until the power switch goes to off position
@@ -111,24 +38,14 @@ static void lsxl_power_off(void)
         kirkwood_restart('h', NULL);
 }
 
-#define LSXL_GPIO_HDD_POWER 10
-#define LSXL_GPIO_USB_POWER 11
-
 void __init lsxl_init(void)
 {
         /*
          * Basic setup. Needs to be called early.
          */
-        kirkwood_mpp_conf(lsxl_mpp_config);
-
-        /* usb and sata power on */
-        gpio_set_value(LSXL_GPIO_USB_POWER, 1);
-        gpio_set_value(LSXL_GPIO_HDD_POWER, 1);
 
-        kirkwood_ehci_init();
         kirkwood_ge00_init(&lsxl_ge00_data);
         kirkwood_ge01_init(&lsxl_ge01_data);
-        platform_device_register(&lsxl_fan_device);
 
         /* register power-off method */
         pm_power_off = lsxl_power_off;
diff --git a/arch/arm/mach-kirkwood/board-mplcec4.c b/arch/arm/mach-kirkwood/board-mplcec4.c
new file mode 100644
index 000000000000..56bfe5a1605a
--- /dev/null
+++ b/arch/arm/mach-kirkwood/board-mplcec4.c
@@ -0,0 +1,44 @@
+/*
+ * Copyright (C) 2012 MPL AG, Switzerland
+ * Stefan Peter <s.peter@mpl.ch>
+ *
+ * arch/arm/mach-kirkwood/board-mplcec4.c
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/mv643xx_eth.h>
+#include <linux/platform_data/mmc-mvsdio.h>
+#include "common.h"
+#include "mpp.h"
+
+static struct mv643xx_eth_platform_data mplcec4_ge00_data = {
+        .phy_addr       = MV643XX_ETH_PHY_ADDR(1),
+};
+
+static struct mv643xx_eth_platform_data mplcec4_ge01_data = {
+        .phy_addr       = MV643XX_ETH_PHY_ADDR(2),
+};
+
+static struct mvsdio_platform_data mplcec4_mvsdio_data = {
+        .gpio_card_detect = 47, /* MPP47 used as SD card detect */
+};
+
+
+void __init mplcec4_init(void)
+{
+        /*
+         * Basic setup. Needs to be called early.
+         */
+        kirkwood_ge00_init(&mplcec4_ge00_data);
+        kirkwood_ge01_init(&mplcec4_ge01_data);
+        kirkwood_sdio_init(&mplcec4_mvsdio_data);
+        kirkwood_pcie_init(KW_PCIE0);
+}
+
+
+
diff --git a/arch/arm/mach-kirkwood/board-ns2.c b/arch/arm/mach-kirkwood/board-ns2.c
new file mode 100644
index 000000000000..8821720ab5a4
--- /dev/null
+++ b/arch/arm/mach-kirkwood/board-ns2.c
@@ -0,0 +1,86 @@
+/*
+ * Copyright 2012 (C), Simon Guinot <simon.guinot@sequanux.org>
+ *
+ * arch/arm/mach-kirkwood/board-ns2.c
+ *
+ * LaCie Network Space v2 board (and parents) initialization for drivers
+ * not converted to flattened device tree yet.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/mv643xx_eth.h>
+#include <linux/gpio.h>
+#include <linux/of.h>
+#include "common.h"
+#include "mpp.h"
+
+static struct mv643xx_eth_platform_data ns2_ge00_data = {
+        .phy_addr       = MV643XX_ETH_PHY_ADDR(8),
+};
+
+static unsigned int ns2_mpp_config[] __initdata = {
+        MPP0_SPI_SCn,
+        MPP1_SPI_MOSI,
+        MPP2_SPI_SCK,
+        MPP3_SPI_MISO,
+        MPP4_NF_IO6,
+        MPP5_NF_IO7,
+        MPP6_SYSRST_OUTn,
+        MPP7_GPO,               /* Fan speed (bit 1) */
+        MPP8_TW0_SDA,
+        MPP9_TW0_SCK,
+        MPP10_UART0_TXD,
+        MPP11_UART0_RXD,
+        MPP12_GPO,              /* Red led */
+        MPP14_GPIO,             /* USB fuse */
+        MPP16_GPIO,             /* SATA 0 power */
+        MPP17_GPIO,             /* SATA 1 power */
+        MPP18_NF_IO0,
+        MPP19_NF_IO1,
+        MPP20_SATA1_ACTn,
+        MPP21_SATA0_ACTn,
+        MPP22_GPIO,             /* Fan speed (bit 0) */
+        MPP23_GPIO,             /* Fan power */
+        MPP24_GPIO,             /* USB mode select */
+        MPP25_GPIO,             /* Fan rotation fail */
+        MPP26_GPIO,             /* USB device vbus */
+        MPP28_GPIO,             /* USB enable host vbus */
+        MPP29_GPIO,             /* Blue led (slow register) */
+        MPP30_GPIO,             /* Blue led (command register) */
+        MPP31_GPIO,             /* Board power off */
+        MPP32_GPIO,             /* Power button (0 = Released, 1 = Pushed) */
+        MPP33_GPO,              /* Fan speed (bit 2) */
+        0
+};
+
+#define NS2_GPIO_POWER_OFF      31
+
+static void ns2_power_off(void)
+{
+        gpio_set_value(NS2_GPIO_POWER_OFF, 1);
+}
+
+void __init ns2_init(void)
+{
+        /*
+         * Basic setup. Needs to be called early.
+         */
+        kirkwood_mpp_conf(ns2_mpp_config);
+
+        if (of_machine_is_compatible("lacie,netspace_lite_v2") ||
+            of_machine_is_compatible("lacie,netspace_mini_v2"))
+                ns2_ge00_data.phy_addr = MV643XX_ETH_PHY_ADDR(0);
+        kirkwood_ge00_init(&ns2_ge00_data);
+
+        if (gpio_request(NS2_GPIO_POWER_OFF, "power-off") == 0 &&
+            gpio_direction_output(NS2_GPIO_POWER_OFF, 0) == 0)
+                pm_power_off = ns2_power_off;
+        else
+                pr_err("ns2: failed to configure power-off GPIO\n");
+}
diff --git a/arch/arm/mach-kirkwood/board-nsa310.c b/arch/arm/mach-kirkwood/board-nsa310.c
new file mode 100644
index 000000000000..f58d2e1a4042
--- /dev/null
+++ b/arch/arm/mach-kirkwood/board-nsa310.c
@@ -0,0 +1,101 @@
+/*
+ * arch/arm/mach-kirkwood/nsa-310-setup.c
+ *
+ * ZyXEL NSA-310 Setup
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/i2c.h>
+#include <linux/gpio.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <mach/kirkwood.h>
+#include "common.h"
+#include "mpp.h"
+
+#define NSA310_GPIO_USB_POWER_OFF       21
+#define NSA310_GPIO_POWER_OFF           48
+
+static unsigned int nsa310_mpp_config[] __initdata = {
+        MPP12_GPIO, /* led esata green */
+        MPP13_GPIO, /* led esata red */
+        MPP15_GPIO, /* led usb green */
+        MPP16_GPIO, /* led usb red */
+        MPP21_GPIO, /* control usb power off */
+        MPP28_GPIO, /* led sys green */
+        MPP29_GPIO, /* led sys red */
+        MPP36_GPIO, /* key reset */
+        MPP37_GPIO, /* key copy */
+        MPP39_GPIO, /* led copy green */
+        MPP40_GPIO, /* led copy red */
+        MPP41_GPIO, /* led hdd green */
+        MPP42_GPIO, /* led hdd red */
+        MPP44_GPIO, /* ?? */
+        MPP46_GPIO, /* key power */
+        MPP48_GPIO, /* control power off */
+        0
+};
+
+static struct i2c_board_info __initdata nsa310_i2c_info[] = {
+        { I2C_BOARD_INFO("adt7476", 0x2e) },
+};
+
+static void nsa310_power_off(void)
+{
+        gpio_set_value(NSA310_GPIO_POWER_OFF, 1);
+}
+
+static int __init nsa310_gpio_request(unsigned int gpio, unsigned long flags,
+                                       const char *label)
+{
+        int err;
+
+        err = gpio_request_one(gpio, flags, label);
+        if (err)
+                pr_err("NSA-310: can't setup GPIO%u (%s), err=%d\n",
+                        gpio, label, err);
+
+        return err;
+}
+
+static void __init nsa310_gpio_init(void)
+{
+        int err;
+
+        err = nsa310_gpio_request(NSA310_GPIO_POWER_OFF, GPIOF_OUT_INIT_LOW,
+                                  "Power Off");
+        if (!err)
+                pm_power_off = nsa310_power_off;
+
+        nsa310_gpio_request(NSA310_GPIO_USB_POWER_OFF, GPIOF_OUT_INIT_LOW,
+                            "USB Power Off");
+}
+
+void __init nsa310_init(void)
+{
+        u32 dev, rev;
+
+        kirkwood_mpp_conf(nsa310_mpp_config);
+
+        nsa310_gpio_init();
+
+        kirkwood_pcie_id(&dev, &rev);
+
+        i2c_register_board_info(0, ARRAY_AND_SIZE(nsa310_i2c_info));
+}
+
+static int __init nsa310_pci_init(void)
+{
+        if (of_machine_is_compatible("zyxel,nsa310"))
+                kirkwood_pcie_init(KW_PCIE0);
+
+        return 0;
+}
+
+subsys_initcall(nsa310_pci_init);
diff --git a/arch/arm/mach-kirkwood/board-openblocks_a6.c b/arch/arm/mach-kirkwood/board-openblocks_a6.c
new file mode 100644
index 000000000000..815fc6451d52
--- /dev/null
+++ b/arch/arm/mach-kirkwood/board-openblocks_a6.c
@@ -0,0 +1,70 @@
+/*
+ * Copyright 2012 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+ *
+ * arch/arm/mach-kirkwood/board-openblocks_a6.c
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/mv643xx_eth.h>
+#include <linux/clk.h>
+#include <linux/clk-private.h>
+#include "common.h"
+#include "mpp.h"
+
+static struct mv643xx_eth_platform_data openblocks_ge00_data = {
+        .phy_addr       = MV643XX_ETH_PHY_ADDR(0),
+};
+
+static unsigned int openblocks_a6_mpp_config[] __initdata = {
+        MPP0_NF_IO2,
+        MPP1_NF_IO3,
+        MPP2_NF_IO4,
+        MPP3_NF_IO5,
+        MPP4_NF_IO6,
+        MPP5_NF_IO7,
+        MPP6_SYSRST_OUTn,
+        MPP8_UART1_RTS,
+        MPP9_UART1_CTS,
+        MPP10_UART0_TXD,
+        MPP11_UART0_RXD,
+        MPP13_UART1_TXD,
+        MPP14_UART1_RXD,
+        MPP15_UART0_RTS,
+        MPP16_UART0_CTS,
+        MPP18_NF_IO0,
+        MPP19_NF_IO1,
+        MPP20_GPIO, /* DIP SW0 */
+        MPP21_GPIO, /* DIP SW1 */
+        MPP22_GPIO, /* DIP SW2 */
+        MPP23_GPIO, /* DIP SW3 */
+        MPP24_GPIO, /* GPIO 0 */
+        MPP25_GPIO, /* GPIO 1 */
+        MPP26_GPIO, /* GPIO 2 */
+        MPP27_GPIO, /* GPIO 3 */
+        MPP28_GPIO, /* GPIO 4 */
+        MPP29_GPIO, /* GPIO 5 */
+        MPP30_GPIO, /* GPIO 6 */
+        MPP31_GPIO, /* GPIO 7 */
+        MPP36_TW1_SDA,
+        MPP37_TW1_SCK,
+        MPP38_GPIO, /* INIT */
+        MPP39_GPIO, /* USB OC */
+        MPP41_GPIO, /* LED: Red */
+        MPP42_GPIO, /* LED: Green */
+        MPP43_GPIO, /* LED: Yellow */
+        0,
+};
+
+void __init openblocks_a6_init(void)
+{
+        /*
+         * Basic setup. Needs to be called early.
+         */
+        kirkwood_mpp_conf(openblocks_a6_mpp_config);
+        kirkwood_ge00_init(&openblocks_ge00_data);
+}
diff --git a/arch/arm/mach-kirkwood/board-ts219.c b/arch/arm/mach-kirkwood/board-ts219.c
index 1750e68506c1..acb0187c7ee1 100644
--- a/arch/arm/mach-kirkwood/board-ts219.c
+++ b/arch/arm/mach-kirkwood/board-ts219.c
@@ -19,54 +19,25 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/mv643xx_eth.h>
-#include <linux/ata_platform.h>
-#include <linux/gpio_keys.h>
-#include <linux/input.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <mach/kirkwood.h>
 #include "common.h"
-#include "mpp.h"
 #include "tsx1x-common.h"
 
 static struct mv643xx_eth_platform_data qnap_ts219_ge00_data = {
         .phy_addr       = MV643XX_ETH_PHY_ADDR(8),
 };
 
-static unsigned int qnap_ts219_mpp_config[] __initdata = {
-        MPP0_SPI_SCn,
-        MPP1_SPI_MOSI,
-        MPP2_SPI_SCK,
-        MPP3_SPI_MISO,
-        MPP4_SATA1_ACTn,
-        MPP5_SATA0_ACTn,
-        MPP8_TW0_SDA,
-        MPP9_TW0_SCK,
-        MPP10_UART0_TXD,
-        MPP11_UART0_RXD,
-        MPP13_UART1_TXD,        /* PIC controller */
-        MPP14_UART1_RXD,        /* PIC controller */
-        MPP15_GPIO,             /* USB Copy button (on devices with 88F6281) */
-        MPP16_GPIO,             /* Reset button (on devices with 88F6281) */
-        MPP36_GPIO,             /* RAM: 0: 256 MB, 1: 512 MB */
-        MPP37_GPIO,             /* Reset button (on devices with 88F6282) */
-        MPP43_GPIO,             /* USB Copy button (on devices with 88F6282) */
-        MPP44_GPIO,             /* Board ID: 0: TS-11x, 1: TS-21x */
-        0
-};
-
 void __init qnap_dt_ts219_init(void)
 {
         u32 dev, rev;
 
-        kirkwood_mpp_conf(qnap_ts219_mpp_config);
-
         kirkwood_pcie_id(&dev, &rev);
         if (dev == MV88F6282_DEV_ID)
                 qnap_ts219_ge00_data.phy_addr = MV643XX_ETH_PHY_ADDR(0);
 
         kirkwood_ge00_init(&qnap_ts219_ge00_data);
-        kirkwood_ehci_init();
 
         pm_power_off = qnap_tsx1x_power_off;
 }
diff --git a/arch/arm/mach-kirkwood/board-usi_topkick.c b/arch/arm/mach-kirkwood/board-usi_topkick.c
new file mode 100644
index 000000000000..15e69fcde9f4
--- /dev/null
+++ b/arch/arm/mach-kirkwood/board-usi_topkick.c
@@ -0,0 +1,81 @@
+/*
+ * Copyright 2012 (C), Jason Cooper <jason@lakedaemon.net>
+ *
+ * arch/arm/mach-kirkwood/board-usi_topkick.c
+ *
+ * USI Topkick Init for drivers not converted to flattened device tree yet.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/mv643xx_eth.h>
+#include <linux/gpio.h>
+#include <linux/platform_data/mmc-mvsdio.h>
+#include "common.h"
+#include "mpp.h"
+
+static struct mv643xx_eth_platform_data topkick_ge00_data = {
+        .phy_addr       = MV643XX_ETH_PHY_ADDR(0),
+};
+
+static struct mvsdio_platform_data topkick_mvsdio_data = {
+        /* unfortunately the CD signal has not been connected */
+};
+
+/*
+ * GPIO LED layout
+ *
+ *       /-SYS_LED(2)
+ *       |
+ *       |   /-DISK_LED
+ *       |   |
+ *       |   |   /-WLAN_LED(2)
+ *       |   |   |
+ * [SW] [*] [*] [*]
+ */
+
+/*
+ * Switch positions
+ *
+ *     /-SW_LEFT
+ *     |
+ *     |   /-SW_IDLE
+ *     |   |
+ *     |   |   /-SW_RIGHT
+ *     |   |   |
+ * PS [L] [I] [R] LEDS
+ */
+
+static unsigned int topkick_mpp_config[] __initdata = {
+        MPP21_GPIO,     /* DISK_LED           (low active) - yellow */
+        MPP36_GPIO,     /* SATA0 power enable (high active) */
+        MPP37_GPIO,     /* SYS_LED2           (low active) - red */
+        MPP38_GPIO,     /* SYS_LED            (low active) - blue */
+        MPP39_GPIO,     /* WLAN_LED           (low active) - green */
+        MPP43_GPIO,     /* SW_LEFT            (low active) */
+        MPP44_GPIO,     /* SW_RIGHT           (low active) */
+        MPP45_GPIO,     /* SW_IDLE            (low active) */
+        MPP46_GPIO,     /* SW_LEFT            (low active) */
+        MPP48_GPIO,     /* WLAN_LED2          (low active) - yellow */
+        0
+};
+
+#define TOPKICK_SATA0_PWR_ENABLE 36
+
+void __init usi_topkick_init(void)
+{
+        /*
+         * Basic setup. Needs to be called early.
+         */
+        kirkwood_mpp_conf(topkick_mpp_config);
+
+        /* SATA0 power enable */
+        gpio_set_value(TOPKICK_SATA0_PWR_ENABLE, 1);
+
+        kirkwood_ge00_init(&topkick_ge00_data);
+        kirkwood_sdio_init(&topkick_mvsdio_data);
+}
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index 2c6c218fb79e..5303be62b311 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -18,10 +18,10 @@
 #include <linux/clk-provider.h>
 #include <linux/spinlock.h>
 #include <linux/mv643xx_i2c.h>
+#include <linux/timex.h>
+#include <linux/kexec.h>
 #include <net/dsa.h>
 #include <asm/page.h>
-#include <asm/timex.h>
-#include <asm/kexec.h>
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
 #include <mach/kirkwood.h>
@@ -266,6 +266,7 @@ void __init kirkwood_clk_init(void)
         orion_clkdev_add("1", "pcie", pex1);
         orion_clkdev_add(NULL, "kirkwood-i2s", audio);
         orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".0", runit);
+        orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".1", runit);
 
         /* Marvell says runit is used by SPI, UART, NAND, TWSI, ...,
          * so should never be gated.
@@ -425,7 +426,7 @@ void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
 /*****************************************************************************
  * SPI
  ****************************************************************************/
-void __init kirkwood_spi_init()
+void __init kirkwood_spi_init(void)
 {
         orion_spi_init(SPI_PHYS_BASE);
 }
@@ -646,8 +647,7 @@ void __init kirkwood_l2_init(void)
 
 void __init kirkwood_init(void)
 {
-        printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
-                kirkwood_id(), kirkwood_tclk);
+        pr_info("Kirkwood: %s, TCLK=%d.\n", kirkwood_id(), kirkwood_tclk);
 
         /*
          * Disable propagation of mbus errors to the CPU local bus,
@@ -671,7 +671,7 @@ void __init kirkwood_init(void)
         kirkwood_xor1_init();
         kirkwood_crypto_init();
 
-#ifdef CONFIG_KEXEC 
+#ifdef CONFIG_KEXEC
         kexec_reinit = kirkwood_enable_pcie;
 #endif
 }
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h
index bcffd7ca1ca2..5ffa57f08c80 100644
--- a/arch/arm/mach-kirkwood/common.h
+++ b/arch/arm/mach-kirkwood/common.h
@@ -47,7 +47,8 @@ void kirkwood_i2c_init(void);
 void kirkwood_uart0_init(void);
 void kirkwood_uart1_init(void);
 void kirkwood_nand_init(struct mtd_partition *parts, int nr_parts, int delay);
-void kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts, int (*dev_ready)(struct mtd_info *));
+void kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts,
+                            int (*dev_ready)(struct mtd_info *));
 void kirkwood_audio_init(void);
 void kirkwood_restart(char, const char *);
 void kirkwood_clk_init(void);
@@ -112,6 +113,40 @@ void km_kirkwood_init(void);
 static inline void km_kirkwood_init(void) {};
 #endif
 
+#ifdef CONFIG_MACH_MPLCEC4_DT
+void mplcec4_init(void);
+#else
+static inline void mplcec4_init(void) {};
+#endif
+
+#if defined(CONFIG_MACH_INETSPACE_V2_DT) || \
+        defined(CONFIG_MACH_NETSPACE_V2_DT) || \
+        defined(CONFIG_MACH_NETSPACE_MAX_V2_DT) || \
+        defined(CONFIG_MACH_NETSPACE_LITE_V2_DT) || \
+        defined(CONFIG_MACH_NETSPACE_MINI_V2_DT)
+void ns2_init(void);
+#else
+static inline void ns2_init(void) {};
+#endif
+
+#ifdef CONFIG_MACH_NSA310_DT
+void nsa310_init(void);
+#else
+static inline void nsa310_init(void) {};
+#endif
+
+#ifdef CONFIG_MACH_OPENBLOCKS_A6_DT
+void openblocks_a6_init(void);
+#else
+static inline void openblocks_a6_init(void) {};
+#endif
+
+#ifdef CONFIG_MACH_TOPKICK_DT
+void usi_topkick_init(void);
+#else
+static inline void usi_topkick_init(void) {};
+#endif
+
 /* early init functions not converted to fdt yet */
 char *kirkwood_id(void);
 void kirkwood_l2_init(void);
diff --git a/arch/arm/mach-kirkwood/cpuidle.c b/arch/arm/mach-kirkwood/cpuidle.c
index 0f1710941878..f7304670f2f8 100644
--- a/arch/arm/mach-kirkwood/cpuidle.c
+++ b/arch/arm/mach-kirkwood/cpuidle.c
@@ -64,7 +64,7 @@ static int kirkwood_init_cpuidle(void)
 
         cpuidle_register_driver(&kirkwood_idle_driver);
         if (cpuidle_register_device(device)) {
-                printk(KERN_ERR "kirkwood_init_cpuidle: Failed registering\n");
+                pr_err("kirkwood_init_cpuidle: Failed registering\n");
                 return -EIO;
         }
         return 0;
diff --git a/arch/arm/mach-kirkwood/dockstar-setup.c b/arch/arm/mach-kirkwood/dockstar-setup.c
index 23dcb19cc2a7..791a98fafa29 100644
--- a/arch/arm/mach-kirkwood/dockstar-setup.c
+++ b/arch/arm/mach-kirkwood/dockstar-setup.c
@@ -93,7 +93,7 @@ static void __init dockstar_init(void)
 
         if (gpio_request(29, "USB Power Enable") != 0 ||
             gpio_direction_output(29, 1) != 0)
-                printk(KERN_ERR "can't set up GPIO 29 (USB Power Enable)\n");
+                pr_err("can't set up GPIO 29 (USB Power Enable)\n");
         kirkwood_ehci_init();
 
         kirkwood_ge00_init(&dockstar_ge00_data);
diff --git a/arch/arm/mach-kirkwood/irq.c b/arch/arm/mach-kirkwood/irq.c
index 884703535a0a..2a97a2e4163c 100644
--- a/arch/arm/mach-kirkwood/irq.c
+++ b/arch/arm/mach-kirkwood/irq.c
@@ -14,6 +14,7 @@
 #include <mach/bridge-regs.h>
 #include <plat/orion-gpio.h>
 #include <plat/irq.h>
+#include "common.h"
 
 static int __initdata gpio0_irqs[4] = {
         IRQ_KIRKWOOD_GPIO_LOW_0_7,
diff --git a/arch/arm/mach-kirkwood/lacie_v2-common.c b/arch/arm/mach-kirkwood/lacie_v2-common.c
index 285edab776e9..489495976fcd 100644
--- a/arch/arm/mach-kirkwood/lacie_v2-common.c
+++ b/arch/arm/mach-kirkwood/lacie_v2-common.c
@@ -19,6 +19,7 @@
 #include <mach/irqs.h>
 #include <plat/time.h>
 #include "common.h"
+#include "lacie_v2-common.h"
 
 /*****************************************************************************
  * 512KB SPI Flash on Boot Device (MACRONIX MX25L4005)
diff --git a/arch/arm/mach-kirkwood/mpp.c b/arch/arm/mach-kirkwood/mpp.c
index 0c6ad63f10c7..827cde42414f 100644
--- a/arch/arm/mach-kirkwood/mpp.c
+++ b/arch/arm/mach-kirkwood/mpp.c
@@ -30,8 +30,8 @@ static unsigned int __init kirkwood_variant(void)
         if (dev == MV88F6180_DEV_ID)
                 return MPP_F6180_MASK;
 
-        printk(KERN_ERR "MPP setup: unknown kirkwood variant "
-                        "(dev %#x rev %#x)\n", dev, rev);
+        pr_err("MPP setup: unknown kirkwood variant (dev %#x rev %#x)\n",
+               dev, rev);
         return 0;
 }
 
diff --git a/arch/arm/mach-kirkwood/netspace_v2-setup.c b/arch/arm/mach-kirkwood/netspace_v2-setup.c
index 88b0788bacae..728e86d33f0c 100644
--- a/arch/arm/mach-kirkwood/netspace_v2-setup.c
+++ b/arch/arm/mach-kirkwood/netspace_v2-setup.c
@@ -79,7 +79,7 @@ static struct platform_device netspace_v2_gpio_buttons = {
         .name           = "gpio-keys",
         .id             = -1,
         .dev            = {
-                .platform_data  = &netspace_v2_button_data,
+                .platform_data  = &netspace_v2_button_data,
         },
 };
 
@@ -211,7 +211,7 @@ static unsigned int netspace_v2_mpp_config[] __initdata = {
         MPP29_GPIO,             /* Blue led (slow register) */
         MPP30_GPIO,             /* Blue led (command register) */
         MPP31_GPIO,             /* Board power off */
-        MPP32_GPIO,             /* Power button (0 = Released, 1 = Pushed) */
+        MPP32_GPIO,             /* Power button (0 = Released, 1 = Pushed) */
         MPP33_GPO,              /* Fan speed (bit 2) */
         0
 };
diff --git a/arch/arm/mach-kirkwood/openrd-setup.c b/arch/arm/mach-kirkwood/openrd-setup.c
index 134ef50d58fc..7e81e9b586bf 100644
--- a/arch/arm/mach-kirkwood/openrd-setup.c
+++ b/arch/arm/mach-kirkwood/openrd-setup.c
@@ -121,14 +121,12 @@ static int __init uart1_mpp_config(void)
         kirkwood_mpp_conf(openrd_uart1_mpp_config);
 
         if (gpio_request(34, "SD_UART1_SEL")) {
-                printk(KERN_ERR "GPIO request failed for SD/UART1 selection"
-                                ", gpio: 34\n");
+                pr_err("GPIO request 34 failed for SD/UART1 selection\n");
                 return -EIO;
         }
 
         if (gpio_request(28, "RS232_RS485_SEL")) {
-                printk(KERN_ERR "GPIO request failed for RS232/RS485 selection"
-                                ", gpio# 28\n");
+                pr_err("GPIO request 28 failed for RS232/RS485 selection\n");
                 gpio_free(34);
                 return -EIO;
         }
@@ -185,15 +183,13 @@ static void __init openrd_init(void)
 
         if (uart1 <= 0) {
                 if (uart1 < 0)
-                        printk(KERN_ERR "Invalid kernel parameter to select "
-                                "UART1. Defaulting to SD. ERROR CODE: %d\n",
-                                uart1);
+                        pr_err("Invalid kernel parameter to select UART1. Defaulting to SD. ERROR CODE: %d\n",
+                               uart1);
 
                 /* Select SD
                  * Pin # 34: 0 => UART1, 1 => SD */
                 if (gpio_request(34, "SD_UART1_SEL")) {
-                        printk(KERN_ERR "GPIO request failed for SD/UART1 "
-                                        "selection, gpio: 34\n");
+                        pr_err("GPIO request 34 failed for SD/UART1 selection\n");
                 } else {
 
                         gpio_direction_output(34, 1);
diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c
index ec544918b12c..1e9f90ee0f5c 100644
--- a/arch/arm/mach-kirkwood/pcie.c
+++ b/arch/arm/mach-kirkwood/pcie.c
@@ -26,7 +26,7 @@ static void kirkwood_enable_pcie_clk(const char *port)
 
         clk = clk_get_sys("pcie", port);
         if (IS_ERR(clk)) {
-                printk(KERN_ERR "PCIE clock %s missing\n", port);
+                pr_err("PCIE clock %s missing\n", port);
                 return;
         }
         clk_prepare_enable(clk);
@@ -168,7 +168,7 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
                 return 0;
 
         index = pcie_port_map[nr];
-        printk(KERN_INFO "PCI: bus%d uses PCIe port %d\n", sys->busnr, index);
+        pr_info("PCI: bus%d uses PCIe port %d\n", sys->busnr, index);
 
         pp = kzalloc(sizeof(*pp), GFP_KERNEL);
         if (!pp)
@@ -186,7 +186,8 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
         case 1:
                 kirkwood_enable_pcie_clk("1");
                 pcie1_ioresources_init(pp);
-                pci_ioremap_io(SZ_64K * sys->busnr, KIRKWOOD_PCIE1_IO_PHYS_BASE);
+                pci_ioremap_io(SZ_64K * sys->busnr,
+                               KIRKWOOD_PCIE1_IO_PHYS_BASE);
                 break;
         default:
                 panic("PCIe setup: invalid controller %d", index);
@@ -224,22 +225,6 @@ static void __devinit rc_pci_fixup(struct pci_dev *dev)
 }
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL, PCI_ANY_ID, rc_pci_fixup);
 
-static struct pci_bus __init *
-kirkwood_pcie_scan_bus(int nr, struct pci_sys_data *sys)
-{
-        struct pci_bus *bus;
-
-        if (nr < num_pcie_ports) {
-                bus = pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys,
-                                        &sys->resources);
-        } else {
-                bus = NULL;
-                BUG();
-        }
-
-        return bus;
-}
-
 static int __init kirkwood_pcie_map_irq(const struct pci_dev *dev, u8 slot,
         u8 pin)
 {
@@ -251,19 +236,19 @@ static int __init kirkwood_pcie_map_irq(const struct pci_dev *dev, u8 slot,
 
 static struct hw_pci kirkwood_pci __initdata = {
         .setup          = kirkwood_pcie_setup,
-        .scan           = kirkwood_pcie_scan_bus,
         .map_irq        = kirkwood_pcie_map_irq,
+        .ops            = &pcie_ops,
 };
 
 static void __init add_pcie_port(int index, void __iomem *base)
 {
-        printk(KERN_INFO "Kirkwood PCIe port %d: ", index);
+        pr_info("Kirkwood PCIe port %d: ", index);
 
         if (orion_pcie_link_up(base)) {
-                printk(KERN_INFO "link up\n");
+                pr_info("link up\n");
                 pcie_port_map[num_pcie_ports++] = index;
         } else
-                printk(KERN_INFO "link down, ignoring\n");
+                pr_info("link down, ignoring\n");
 }
 
 void __init kirkwood_pcie_init(unsigned int portmask)
diff --git a/arch/arm/mach-kirkwood/sheevaplug-setup.c b/arch/arm/mach-kirkwood/sheevaplug-setup.c
index 28d0abaf4bd9..8a175948b28d 100644
--- a/arch/arm/mach-kirkwood/sheevaplug-setup.c
+++ b/arch/arm/mach-kirkwood/sheevaplug-setup.c
@@ -117,7 +117,7 @@ static void __init sheevaplug_init(void)
 
         if (gpio_request(29, "USB Power Enable") != 0 ||
             gpio_direction_output(29, 1) != 0)
-                printk(KERN_ERR "can't set up GPIO 29 (USB Power Enable)\n");
+                pr_err("can't set up GPIO 29 (USB Power Enable)\n");
         kirkwood_ehci_init();
 
         kirkwood_ge00_init(&sheevaplug_ge00_data);
diff --git a/arch/arm/mach-kirkwood/t5325-setup.c b/arch/arm/mach-kirkwood/t5325-setup.c
index bad738e44044..f2daf711e72e 100644
--- a/arch/arm/mach-kirkwood/t5325-setup.c
+++ b/arch/arm/mach-kirkwood/t5325-setup.c
@@ -29,7 +29,7 @@
 #include "common.h"
 #include "mpp.h"
 
-struct mtd_partition hp_t5325_partitions[] = {
+static struct mtd_partition hp_t5325_partitions[] = {
         {
                 .name           = "u-boot env",
                 .size           = SZ_64K,
@@ -59,14 +59,14 @@ struct mtd_partition hp_t5325_partitions[] = {
         },
 };
 
-const struct flash_platform_data hp_t5325_flash = {
+static const struct flash_platform_data hp_t5325_flash = {
         .type           = "mx25l8005",
         .name           = "spi_flash",
         .parts          = hp_t5325_partitions,
         .nr_parts       = ARRAY_SIZE(hp_t5325_partitions),
 };
 
-struct spi_board_info __initdata hp_t5325_spi_slave_info[] = {
+static struct spi_board_info __initdata hp_t5325_spi_slave_info[] = {
         {
                 .modalias       = "m25p80",
                 .platform_data  = &hp_t5325_flash,
diff --git a/arch/arm/mach-kirkwood/ts41x-setup.c b/arch/arm/mach-kirkwood/ts41x-setup.c
index 367a9400f532..e4c61279ea86 100644
--- a/arch/arm/mach-kirkwood/ts41x-setup.c
+++ b/arch/arm/mach-kirkwood/ts41x-setup.c
@@ -170,8 +170,7 @@ static int __init ts41x_pci_init(void)
                 else
                         kirkwood_pcie_init(KW_PCIE0);
         }
-
-   return 0;
+        return 0;
 }
 subsys_initcall(ts41x_pci_init);
 
diff --git a/arch/arm/mach-kirkwood/tsx1x-common.c b/arch/arm/mach-kirkwood/tsx1x-common.c
index 8943ede29b44..cec87cef76ca 100644
--- a/arch/arm/mach-kirkwood/tsx1x-common.c
+++ b/arch/arm/mach-kirkwood/tsx1x-common.c
@@ -7,6 +7,7 @@
 #include <linux/serial_reg.h>
 #include <mach/kirkwood.h>
 #include "common.h"
+#include "tsx1x-common.h"
 
 /*
  * QNAP TS-x1x Boards flash
@@ -29,7 +30,7 @@
  *
  ***************************************************************************/
 
-struct mtd_partition qnap_tsx1x_partitions[] = {
+static struct mtd_partition qnap_tsx1x_partitions[] = {
         {
                 .name           = "U-Boot",
                 .size           = 0x00080000,
@@ -58,14 +59,14 @@ struct mtd_partition qnap_tsx1x_partitions[] = {
         },
 };
 
-const struct flash_platform_data qnap_tsx1x_flash = {
+static const struct flash_platform_data qnap_tsx1x_flash = {
         .type           = "m25p128",
         .name           = "spi_flash",
         .parts          = qnap_tsx1x_partitions,
         .nr_parts       = ARRAY_SIZE(qnap_tsx1x_partitions),
 };
 
-struct spi_board_info __initdata qnap_tsx1x_spi_slave_info[] = {
+static struct spi_board_info __initdata qnap_tsx1x_spi_slave_info[] = {
         {
                 .modalias       = "m25p80",
                 .platform_data  = &qnap_tsx1x_flash,
diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c
index 4748ec551a68..98070370d602 100644
--- a/arch/arm/mach-mxs/mach-mxs.c
+++ b/arch/arm/mach-mxs/mach-mxs.c
@@ -100,6 +100,25 @@ static struct fb_videomode apx4devkit_video_modes[] = {
         },
 };
 
+static struct fb_videomode apf28dev_video_modes[] = {
+        {
+                .name = "LW700",
+                .refresh = 60,
+                .xres = 800,
+                .yres = 480,
+                .pixclock = 30303, /* picosecond */
+                .left_margin = 96,
+                .right_margin = 96, /* at least 3 & 1 */
+                .upper_margin = 0x14,
+                .lower_margin = 0x15,
+                .hsync_len = 64,
+                .vsync_len = 4,
+                .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT |
+                                FB_SYNC_DATA_ENABLE_HIGH_ACT |
+                                FB_SYNC_DOTCLK_FAILING_ACT,
+        },
+};
+
 static struct mxsfb_platform_data mxsfb_pdata __initdata;
 
 /*
@@ -160,6 +179,7 @@ static struct sys_timer imx28_timer = {
 enum mac_oui {
         OUI_FSL,
         OUI_DENX,
+        OUI_CRYSTALFONTZ,
 };
 
 static void __init update_fec_mac_prop(enum mac_oui oui)
@@ -175,8 +195,12 @@ static void __init update_fec_mac_prop(enum mac_oui oui)
                 np = of_find_compatible_node(from, NULL, "fsl,imx28-fec");
                 if (!np)
                         return;
+
                 from = np;
 
+                if (of_get_property(np, "local-mac-address", NULL))
+                        continue;
+
                 newmac = kzalloc(sizeof(*newmac) + 6, GFP_KERNEL);
                 if (!newmac)
                         return;
@@ -205,6 +229,11 @@ static void __init update_fec_mac_prop(enum mac_oui oui)
                         macaddr[1] = 0xe5;
                         macaddr[2] = 0x4e;
                         break;
+                case OUI_CRYSTALFONTZ:
+                        macaddr[0] = 0x58;
+                        macaddr[1] = 0xb9;
+                        macaddr[2] = 0xe1;
+                        break;
                 }
                 val = ocotp[i];
                 macaddr[3] = (val >> 16) & 0xff;
@@ -261,6 +290,11 @@ static void __init m28evk_init(void)
         mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
 }
 
+static void __init sc_sps1_init(void)
+{
+        enable_clk_enet_out();
+}
+
 static int apx4devkit_phy_fixup(struct phy_device *phy)
 {
         phy->dev_flags |= MICREL_PHY_50MHZ_CLK;
@@ -355,6 +389,22 @@ static void __init tx28_post_init(void)
         pinctrl_put(pctl);
 }
 
+static void __init cfa10049_init(void)
+{
+        enable_clk_enet_out();
+        update_fec_mac_prop(OUI_CRYSTALFONTZ);
+}
+
+static void __init apf28_init(void)
+{
+        enable_clk_enet_out();
+
+        mxsfb_pdata.mode_list = apf28dev_video_modes;
+        mxsfb_pdata.mode_count = ARRAY_SIZE(apf28dev_video_modes);
+        mxsfb_pdata.default_bpp = 16;
+        mxsfb_pdata.ld_intf_width = STMLCDIF_16BIT;
+}
+
 static void __init mxs_machine_init(void)
 {
         if (of_machine_is_compatible("fsl,imx28-evk"))
@@ -365,6 +415,12 @@ static void __init mxs_machine_init(void)
                 m28evk_init();
         else if (of_machine_is_compatible("bluegiga,apx4devkit"))
                 apx4devkit_init();
+        else if (of_machine_is_compatible("crystalfontz,cfa10049"))
+                cfa10049_init();
+        else if (of_machine_is_compatible("armadeus,imx28-apf28"))
+                apf28_init();
+        else if (of_machine_is_compatible("schulercontrol,imx28-sps1"))
+                sc_sps1_init();
 
         of_platform_populate(NULL, of_default_bus_match_table,
                              mxs_auxdata_lookup, NULL);
diff --git a/arch/arm/mach-mxs/timer.c b/arch/arm/mach-mxs/timer.c
index 7c3792613392..856f4c796061 100644
--- a/arch/arm/mach-mxs/timer.c
+++ b/arch/arm/mach-mxs/timer.c
@@ -29,6 +29,7 @@
 #include <linux/of_irq.h>
 
 #include <asm/mach/time.h>
+#include <asm/sched_clock.h>
 #include <mach/mxs.h>
 #include <mach/common.h>
 
@@ -233,15 +234,22 @@ static struct clocksource clocksource_mxs = {
         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
+static u32 notrace mxs_read_sched_clock_v2(void)
+{
+        return ~readl_relaxed(mxs_timrot_base + HW_TIMROT_RUNNING_COUNTn(1));
+}
+
 static int __init mxs_clocksource_init(struct clk *timer_clk)
 {
         unsigned int c = clk_get_rate(timer_clk);
 
         if (timrot_is_v1())
                 clocksource_register_hz(&clocksource_mxs, c);
-        else
+        else {
                 clocksource_mmio_init(mxs_timrot_base + HW_TIMROT_RUNNING_COUNTn(1),
                         "mxs_timer", c, 200, 32, clocksource_mmio_readl_down);
+                setup_sched_clock(mxs_read_sched_clock_v2, 32, c);
+        }
 
         return 0;
 }
diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile
index cd169c386161..f0e69cbc5baa 100644
--- a/arch/arm/mach-omap1/Makefile
+++ b/arch/arm/mach-omap1/Makefile
@@ -3,7 +3,8 @@
 #
 
 # Common support
-obj-y := io.o id.o sram.o time.o irq.o mux.o flash.o serial.o devices.o dma.o
+obj-y := io.o id.o sram-init.o sram.o time.o irq.o mux.o flash.o \
+         serial.o devices.o dma.o
 obj-y += clock.o clock_data.o opp_data.o reset.o pm_bus.o timer.o
 
 ifneq ($(CONFIG_SND_OMAP_SOC_MCBSP),)
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c
index 8b5800acf726..e067f221f0f9 100644
--- a/arch/arm/mach-omap1/board-fsample.c
+++ b/arch/arm/mach-omap1/board-fsample.c
@@ -30,13 +30,13 @@
 #include <mach/tc.h>
 #include <mach/mux.h>
 #include <mach/flash.h>
-#include <../plat-omap/fpga.h>
 #include <linux/platform_data/keypad-omap.h>
 
 #include <mach/hardware.h>
 
 #include "iomap.h"
 #include "common.h"
+#include "fpga.h"
 
 /* fsample is pretty close to p2-sample */
 
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index 9134b646f01b..dcf364d1a8b1 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -39,7 +39,7 @@
 #include <asm/mach/map.h>
 
 #include <mach/mux.h>
-#include <plat-omap/dma-omap.h>
+#include <linux/omap-dma.h>
 #include <mach/tc.h>
 #include <mach/irda.h>
 #include <linux/platform_data/keypad-omap.h>
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
index bf213d1d8075..b3fcdedb44ca 100644
--- a/arch/arm/mach-omap1/board-h3.c
+++ b/arch/arm/mach-omap1/board-h3.c
@@ -43,7 +43,7 @@
 #include <mach/mux.h>
 #include <mach/tc.h>
 #include <linux/platform_data/keypad-omap.h>
-#include <plat-omap/dma-omap.h>
+#include <linux/omap-dma.h>
 #include <mach/flash.h>
 
 #include <mach/hardware.h>
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index c66334f22471..f8033fab0f82 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -33,7 +33,6 @@
 
 #include <mach/mux.h>
 #include <mach/flash.h>
-#include <../plat-omap/fpga.h>
 #include <mach/tc.h>
 #include <linux/platform_data/keypad-omap.h>
 
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
index 584b6fab894b..c33dceb46607 100644
--- a/arch/arm/mach-omap1/board-palmte.c
+++ b/arch/arm/mach-omap1/board-palmte.c
@@ -37,7 +37,7 @@
 #include <mach/flash.h>
 #include <mach/mux.h>
 #include <mach/tc.h>
-#include <plat-omap/dma-omap.h>
+#include <linux/omap-dma.h>
 #include <mach/irda.h>
 #include <linux/platform_data/keypad-omap.h>
 
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c
index fbc986bfe69e..2948b0ee4be8 100644
--- a/arch/arm/mach-omap1/board-palmtt.c
+++ b/arch/arm/mach-omap1/board-palmtt.c
@@ -36,7 +36,7 @@
 
 #include <mach/flash.h>
 #include <mach/mux.h>
-#include <plat-omap/dma-omap.h>
+#include <linux/omap-dma.h>
 #include <mach/tc.h>
 #include <mach/irda.h>
 #include <linux/platform_data/keypad-omap.h>
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index 60d917a93763..7a05895c0be3 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -38,7 +38,7 @@
 
 #include <mach/flash.h>
 #include <mach/mux.h>
-#include <plat-omap/dma-omap.h>
+#include <linux/omap-dma.h>
 #include <mach/tc.h>
 #include <mach/irda.h>
 #include <linux/platform_data/keypad-omap.h>
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c
index 030bd48727be..9a7e483ed6fd 100644
--- a/arch/arm/mach-omap1/board-perseus2.c
+++ b/arch/arm/mach-omap1/board-perseus2.c
@@ -30,13 +30,13 @@
 
 #include <mach/tc.h>
 #include <mach/mux.h>
-#include <../plat-omap/fpga.h>
 #include <mach/flash.h>
 
 #include <mach/hardware.h>
 
 #include "iomap.h"
 #include "common.h"
+#include "fpga.h"
 
 static const unsigned int p2_keymap[] = {
         KEY(0, 0, KEY_UP),
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c
index 1ebc7e08d6e5..20ed52ae1714 100644
--- a/arch/arm/mach-omap1/board-sx1.c
+++ b/arch/arm/mach-omap1/board-sx1.c
@@ -36,7 +36,7 @@
 
 #include <mach/flash.h>
 #include <mach/mux.h>
-#include <plat-omap/dma-omap.h>
+#include <linux/omap-dma.h>
 #include <mach/irda.h>
 #include <mach/tc.h>
 #include <mach/board-sx1.h>
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 931f3f6d396b..4f5fd4a084c0 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -24,12 +24,11 @@
 
 #include <mach/hardware.h>
 
-#include "../plat-omap/sram.h"
-
 #include "soc.h"
 #include "iomap.h"
 #include "clock.h"
 #include "opp.h"
+#include "sram.h"
 
 __u32 arm_idlect1_mask;
 struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p;
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
index 28aea55a412e..cb7c6ae2e3fc 100644
--- a/arch/arm/mach-omap1/clock_data.c
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -27,10 +27,9 @@
 #include <mach/hardware.h>
 #include <mach/usb.h>   /* for OTG_BASE */
 
-#include "../plat-omap/sram.h"
-
 #include "iomap.h"
 #include "clock.h"
+#include "sram.h"
 
 /* Some ARM_IDLECT1 bit shifts - used in struct arm_idlect1_clk */
 #define IDL_CLKOUT_ARM_SHIFT                    12
diff --git a/arch/arm/mach-omap1/common.h b/arch/arm/mach-omap1/common.h
index ecd0bb664dad..b53e0854422f 100644
--- a/arch/arm/mach-omap1/common.h
+++ b/arch/arm/mach-omap1/common.h
@@ -26,11 +26,10 @@
 #ifndef __ARCH_ARM_MACH_OMAP1_COMMON_H
 #define __ARCH_ARM_MACH_OMAP1_COMMON_H
 
-#include "../plat-omap/common.h"
 #include <linux/mtd/mtd.h>
 #include <linux/i2c-omap.h>
 
-#include "../plat-omap/i2c.h"
+#include <plat/i2c.h>
 
 #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
 void omap7xx_map_io(void);
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index 745031870ce4..0af635205e8a 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -28,12 +28,11 @@
 #include <mach/camera.h>
 #include <mach/hardware.h>
 
-#include "../plat-omap/sram.h"
-
 #include "common.h"
 #include "clock.h"
 #include "dma.h"
 #include "mmc.h"
+#include "sram.h"
 
 #if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
 
diff --git a/arch/arm/mach-omap1/dma.c b/arch/arm/mach-omap1/dma.c
index 71305c15fbd5..e190611e4b46 100644
--- a/arch/arm/mach-omap1/dma.c
+++ b/arch/arm/mach-omap1/dma.c
@@ -25,7 +25,7 @@
 #include <linux/device.h>
 #include <linux/io.h>
 
-#include <plat-omap/dma-omap.h>
+#include <linux/omap-dma.h>
 #include <mach/tc.h>
 
 #include <mach/irqs.h>
@@ -321,6 +321,9 @@ static int __init omap1_system_dma_init(void)
                 d->dev_caps = ENABLE_1510_MODE;
         enable_1510_mode = d->dev_caps & ENABLE_1510_MODE;
 
+        if (cpu_is_omap16xx())
+                d->dev_caps = ENABLE_16XX_MODE;
+
         d->dev_caps             |= SRC_PORT;
         d->dev_caps             |= DST_PORT;
         d->dev_caps             |= SRC_INDEX;
diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c
index d940fac9a9ed..8bd71b2d0967 100644
--- a/arch/arm/mach-omap1/fpga.c
+++ b/arch/arm/mach-omap1/fpga.c
@@ -27,12 +27,11 @@
 #include <asm/irq.h>
 #include <asm/mach/irq.h>
 
-#include <../plat-omap/fpga.h>
-
 #include <mach/hardware.h>
 
 #include "iomap.h"
 #include "common.h"
+#include "fpga.h"
 
 static void fpga_mask_irq(struct irq_data *d)
 {
diff --git a/arch/arm/plat-omap/fpga.h b/arch/arm/mach-omap1/fpga.h
index 54faaa93e6f4..4b4307a80e48 100644
--- a/arch/arm/plat-omap/fpga.h
+++ b/arch/arm/mach-omap1/fpga.h
@@ -1,6 +1,4 @@
 /*
- * arch/arm/plat-omap/include/mach/fpga.h
- *
  * Interrupt handler for OMAP-1510 FPGA
  *
  * Copyright (C) 2001 RidgeRun, Inc.
@@ -38,26 +36,6 @@
 #define H2P2_DBG_FPGA_LAN_STATUS        IOMEM(H2P2_DBG_FPGA_BASE + 0x1A)        /* LAN Status line */
 #define H2P2_DBG_FPGA_LAN_RESET         IOMEM(H2P2_DBG_FPGA_BASE + 0x1C)        /* LAN Reset line */
 
-/* NOTE:  most boards don't have a static mapping for the FPGA ... */
-struct h2p2_dbg_fpga {
-        /* offset 0x00 */
-        u16             smc91x[8];
-        /* offset 0x10 */
-        u16             fpga_rev;
-        u16             board_rev;
-        u16             gpio_outputs;
-        u16             leds;
-        /* offset 0x18 */
-        u16             misc_inputs;
-        u16             lan_status;
-        u16             lan_reset;
-        u16             reserved0;
-        /* offset 0x20 */
-        u16             ps2_data;
-        u16             ps2_ctrl;
-        /* plus also 4 rs232 ports ... */
-};
-
 /* LEDs definition on debug board (16 LEDs, all physically green) */
 #define H2P2_DBG_FPGA_LED_GREEN         (1 << 15)
 #define H2P2_DBG_FPGA_LED_AMBER         (1 << 14)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index 98e6f39224a4..02b3eb2e201c 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -19,6 +19,8 @@
 #include <linux/gpio.h>
 #include <linux/platform_data/gpio-omap.h>
 
+#include <mach/irqs.h>
+
 #define OMAP1_MPUIO_VBASE               OMAP1_MPUIO_BASE
 #define OMAP1510_GPIO_BASE              0xFFFCE000
 
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 33f419236b17..b9952a258d82 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -19,6 +19,8 @@
 #include <linux/gpio.h>
 #include <linux/platform_data/gpio-omap.h>
 
+#include <mach/irqs.h>
+
 #define OMAP1610_GPIO1_BASE             0xfffbe400
 #define OMAP1610_GPIO2_BASE             0xfffbec00
 #define OMAP1610_GPIO3_BASE             0xfffbb400
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index 958ce9acee95..f5819b2b7cbe 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -19,6 +19,8 @@
 #include <linux/gpio.h>
 #include <linux/platform_data/gpio-omap.h>
 
+#include <mach/irqs.h>
+
 #define OMAP7XX_GPIO1_BASE              0xfffbc000
 #define OMAP7XX_GPIO2_BASE              0xfffbc800
 #define OMAP7XX_GPIO3_BASE              0xfffbd000
diff --git a/arch/arm/mach-omap1/i2c.c b/arch/arm/mach-omap1/i2c.c
index 32bcbb8d6c73..faca808cb3d9 100644
--- a/arch/arm/mach-omap1/i2c.c
+++ b/arch/arm/mach-omap1/i2c.c
@@ -23,7 +23,7 @@
 #include <mach/mux.h>
 #include "soc.h"
 
-#include "../plat-omap/i2c.h"
+#include <plat/i2c.h>
 
 #define OMAP_I2C_SIZE           0x3f
 #define OMAP1_I2C_BASE          0xfffb3800
@@ -54,6 +54,9 @@ int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *pdata,
         struct platform_device *pdev;
         struct resource *res;
 
+        if (bus_id > 1)
+                return -EINVAL;
+
         omap1_i2c_mux_pins(bus_id);
 
         pdev = &omap_i2c_devices[bus_id - 1];
diff --git a/arch/arm/mach-omap1/include/mach/entry-macro.S b/arch/arm/mach-omap1/include/mach/entry-macro.S
index 88f08cab1717..78a8c6c24764 100644
--- a/arch/arm/mach-omap1/include/mach/entry-macro.S
+++ b/arch/arm/mach-omap1/include/mach/entry-macro.S
@@ -13,8 +13,6 @@
 #include <mach/hardware.h>
 #include <mach/irqs.h>
 
-#include "../../iomap.h"
-
                 .macro  get_irqnr_preamble, base, tmp
                 .endm
 
diff --git a/arch/arm/mach-omap1/include/mach/gpio.h b/arch/arm/mach-omap1/include/mach/gpio.h
deleted file mode 100644
index ebf86c0f4f46..000000000000
--- a/arch/arm/mach-omap1/include/mach/gpio.h
+++ /dev/null
@@ -1,3 +0,0 @@
-/*
- * arch/arm/mach-omap1/include/mach/gpio.h
- */
diff --git a/arch/arm/mach-omap1/include/mach/hardware.h b/arch/arm/mach-omap1/include/mach/hardware.h
index dc3237bd72d2..5875a5098d35 100644
--- a/arch/arm/mach-omap1/include/mach/hardware.h
+++ b/arch/arm/mach-omap1/include/mach/hardware.h
@@ -39,7 +39,7 @@
 #include <asm/sizes.h>
 #ifndef __ASSEMBLER__
 #include <asm/types.h>
-#include "../../mach-omap1/soc.h"
+#include <mach/soc.h>
 
 /*
  * NOTE: Please use ioremap + __raw_read/write where possible instead of these
@@ -72,6 +72,9 @@ static inline u32 omap_cs3_phys(void)
 
 #endif  /* ifndef __ASSEMBLER__ */
 
+#define OMAP1_IO_OFFSET         0x01000000      /* Virtual IO = 0xfefb0000 */
+#define OMAP1_IO_ADDRESS(pa)    IOMEM((pa) - OMAP1_IO_OFFSET)
+
 #include <mach/serial.h>
 
 /*
diff --git a/arch/arm/mach-omap1/include/mach/memory.h b/arch/arm/mach-omap1/include/mach/memory.h
index 351ae4f2c514..3c2530523111 100644
--- a/arch/arm/mach-omap1/include/mach/memory.h
+++ b/arch/arm/mach-omap1/include/mach/memory.h
@@ -19,7 +19,7 @@
  * because of the strncmp().
  */
 #if defined(CONFIG_ARCH_OMAP15XX) && !defined(__ASSEMBLER__)
-#include "../../mach-omap1/soc.h"
+#include <mach/soc.h>
 
 /*
  * OMAP-1510 Local Bus address offset
diff --git a/arch/arm/mach-omap1/include/mach/soc.h b/arch/arm/mach-omap1/include/mach/soc.h
new file mode 100644
index 000000000000..6cf9c1cc2bef
--- /dev/null
+++ b/arch/arm/mach-omap1/include/mach/soc.h
@@ -0,0 +1,229 @@
+/*
+ * OMAP cpu type detection
+ *
+ * Copyright (C) 2004, 2008 Nokia Corporation
+ *
+ * Copyright (C) 2009-11 Texas Instruments.
+ *
+ * Written by Tony Lindgren <tony.lindgren@nokia.com>
+ *
+ * Added OMAP4/5 specific defines - Santosh Shilimkar<santosh.shilimkar@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#ifndef __ASM_ARCH_OMAP_CPU_H
+#define __ASM_ARCH_OMAP_CPU_H
+
+#ifndef __ASSEMBLY__
+
+#include <linux/bitops.h>
+
+/*
+ * Test if multicore OMAP support is needed
+ */
+#undef MULTI_OMAP1
+#undef OMAP_NAME
+
+#ifdef CONFIG_ARCH_OMAP730
+# ifdef OMAP_NAME
+#  undef  MULTI_OMAP1
+#  define MULTI_OMAP1
+# else
+#  define OMAP_NAME omap730
+# endif
+#endif
+#ifdef CONFIG_ARCH_OMAP850
+# ifdef OMAP_NAME
+#  undef  MULTI_OMAP1
+#  define MULTI_OMAP1
+# else
+#  define OMAP_NAME omap850
+# endif
+#endif
+#ifdef CONFIG_ARCH_OMAP15XX
+# ifdef OMAP_NAME
+#  undef  MULTI_OMAP1
+#  define MULTI_OMAP1
+# else
+#  define OMAP_NAME omap1510
+# endif
+#endif
+#ifdef CONFIG_ARCH_OMAP16XX
+# ifdef OMAP_NAME
+#  undef  MULTI_OMAP1
+#  define MULTI_OMAP1
+# else
+#  define OMAP_NAME omap16xx
+# endif
+#endif
+
+/*
+ * omap_rev bits:
+ * CPU id bits  (0730, 1510, 1710, 2422...)     [31:16]
+ * CPU revision (See _REV_ defined in cpu.h)    [15:08]
+ * CPU class bits (15xx, 16xx, 24xx, 34xx...)   [07:00]
+ */
+unsigned int omap_rev(void);
+
+/*
+ * Get the CPU revision for OMAP devices
+ */
+#define GET_OMAP_REVISION()     ((omap_rev() >> 8) & 0xff)
+
+/*
+ * Macros to group OMAP into cpu classes.
+ * These can be used in most places.
+ * cpu_is_omap7xx():    True for OMAP730, OMAP850
+ * cpu_is_omap15xx():   True for OMAP1510, OMAP5910 and OMAP310
+ * cpu_is_omap16xx():   True for OMAP1610, OMAP5912 and OMAP1710
+ */
+#define GET_OMAP_CLASS  (omap_rev() & 0xff)
+
+#define IS_OMAP_CLASS(class, id)                        \
+static inline int is_omap ##class (void)                \
+{                                                       \
+        return (GET_OMAP_CLASS == (id)) ? 1 : 0;        \
+}
+
+#define GET_OMAP_SUBCLASS       ((omap_rev() >> 20) & 0x0fff)
+
+#define IS_OMAP_SUBCLASS(subclass, id)                  \
+static inline int is_omap ##subclass (void)             \
+{                                                       \
+        return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0;     \
+}
+
+IS_OMAP_CLASS(7xx, 0x07)
+IS_OMAP_CLASS(15xx, 0x15)
+IS_OMAP_CLASS(16xx, 0x16)
+
+#define cpu_is_omap7xx()                0
+#define cpu_is_omap15xx()               0
+#define cpu_is_omap16xx()               0
+
+#if defined(MULTI_OMAP1)
+# if defined(CONFIG_ARCH_OMAP730)
+#  undef  cpu_is_omap7xx
+#  define cpu_is_omap7xx()              is_omap7xx()
+# endif
+# if defined(CONFIG_ARCH_OMAP850)
+#  undef  cpu_is_omap7xx
+#  define cpu_is_omap7xx()              is_omap7xx()
+# endif
+# if defined(CONFIG_ARCH_OMAP15XX)
+#  undef  cpu_is_omap15xx
+#  define cpu_is_omap15xx()             is_omap15xx()
+# endif
+# if defined(CONFIG_ARCH_OMAP16XX)
+#  undef  cpu_is_omap16xx
+#  define cpu_is_omap16xx()             is_omap16xx()
+# endif
+#else
+# if defined(CONFIG_ARCH_OMAP730)
+#  undef  cpu_is_omap7xx
+#  define cpu_is_omap7xx()              1
+# endif
+# if defined(CONFIG_ARCH_OMAP850)
+#  undef  cpu_is_omap7xx
+#  define cpu_is_omap7xx()              1
+# endif
+# if defined(CONFIG_ARCH_OMAP15XX)
+#  undef  cpu_is_omap15xx
+#  define cpu_is_omap15xx()             1
+# endif
+# if defined(CONFIG_ARCH_OMAP16XX)
+#  undef  cpu_is_omap16xx
+#  define cpu_is_omap16xx()             1
+# endif
+#endif
+
+/*
+ * Macros to detect individual cpu types.
+ * These are only rarely needed.
+ * cpu_is_omap310():    True for OMAP310
+ * cpu_is_omap1510():   True for OMAP1510
+ * cpu_is_omap1610():   True for OMAP1610
+ * cpu_is_omap1611():   True for OMAP1611
+ * cpu_is_omap5912():   True for OMAP5912
+ * cpu_is_omap1621():   True for OMAP1621
+ * cpu_is_omap1710():   True for OMAP1710
+ */
+#define GET_OMAP_TYPE   ((omap_rev() >> 16) & 0xffff)
+
+#define IS_OMAP_TYPE(type, id)                          \
+static inline int is_omap ##type (void)                 \
+{                                                       \
+        return (GET_OMAP_TYPE == (id)) ? 1 : 0;         \
+}
+
+IS_OMAP_TYPE(310, 0x0310)
+IS_OMAP_TYPE(1510, 0x1510)
+IS_OMAP_TYPE(1610, 0x1610)
+IS_OMAP_TYPE(1611, 0x1611)
+IS_OMAP_TYPE(5912, 0x1611)
+IS_OMAP_TYPE(1621, 0x1621)
+IS_OMAP_TYPE(1710, 0x1710)
+
+#define cpu_is_omap310()                0
+#define cpu_is_omap1510()               0
+#define cpu_is_omap1610()               0
+#define cpu_is_omap5912()               0
+#define cpu_is_omap1611()               0
+#define cpu_is_omap1621()               0
+#define cpu_is_omap1710()               0
+
+/* These are needed to compile common code */
+#ifdef CONFIG_ARCH_OMAP1
+#define cpu_is_omap242x()               0
+#define cpu_is_omap2430()               0
+#define cpu_is_omap243x()               0
+#define cpu_is_omap24xx()               0
+#define cpu_is_omap34xx()               0
+#define cpu_is_omap44xx()               0
+#define soc_is_omap54xx()               0
+#define soc_is_am33xx()                 0
+#define cpu_class_is_omap1()            1
+#define cpu_class_is_omap2()            0
+#endif
+
+/*
+ * Whether we have MULTI_OMAP1 or not, we still need to distinguish
+ * between 310 vs. 1510 and 1611B/5912 vs. 1710.
+ */
+
+#if defined(CONFIG_ARCH_OMAP15XX)
+# undef  cpu_is_omap310
+# undef  cpu_is_omap1510
+# define cpu_is_omap310()               is_omap310()
+# define cpu_is_omap1510()              is_omap1510()
+#endif
+
+#if defined(CONFIG_ARCH_OMAP16XX)
+# undef  cpu_is_omap1610
+# undef  cpu_is_omap1611
+# undef  cpu_is_omap5912
+# undef  cpu_is_omap1621
+# undef  cpu_is_omap1710
+# define cpu_is_omap1610()              is_omap1610()
+# define cpu_is_omap1611()              is_omap1611()
+# define cpu_is_omap5912()              is_omap5912()
+# define cpu_is_omap1621()              is_omap1621()
+# define cpu_is_omap1710()              is_omap1710()
+#endif
+
+#endif  /* __ASSEMBLY__ */
+#endif
diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c
index 44389d7cd255..499b8accb83d 100644
--- a/arch/arm/mach-omap1/io.c
+++ b/arch/arm/mach-omap1/io.c
@@ -18,7 +18,7 @@
 
 #include <mach/mux.h>
 #include <mach/tc.h>
-#include <plat-omap/dma-omap.h>
+#include <linux/omap-dma.h>
 
 #include "iomap.h"
 #include "common.h"
@@ -134,7 +134,6 @@ void __init omap1_init_early(void)
          */
         omap1_clk_init();
         omap1_mux_init();
-        omap_init_consistent_dma_size();
 }
 
 void __init omap1_init_late(void)
diff --git a/arch/arm/mach-omap1/iomap.h b/arch/arm/mach-omap1/iomap.h
index 330c4716b028..f4e2d7a21365 100644
--- a/arch/arm/mach-omap1/iomap.h
+++ b/arch/arm/mach-omap1/iomap.h
@@ -22,9 +22,6 @@
  * 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
-#define OMAP1_IO_OFFSET         0x01000000      /* Virtual IO = 0xfefb0000 */
-#define OMAP1_IO_ADDRESS(pa)    IOMEM((pa) - OMAP1_IO_OFFSET)
-
 /*
  * ----------------------------------------------------------------------------
  * Omap1 specific IO mapping
diff --git a/arch/arm/mach-omap1/lcd_dma.c b/arch/arm/mach-omap1/lcd_dma.c
index 7ed8c1857d56..77924be37d41 100644
--- a/arch/arm/mach-omap1/lcd_dma.c
+++ b/arch/arm/mach-omap1/lcd_dma.c
@@ -27,7 +27,7 @@
 #include <linux/interrupt.h>
 #include <linux/io.h>
 
-#include <plat-omap/dma-omap.h>
+#include <linux/omap-dma.h>
 
 #include <mach/hardware.h>
 #include <mach/lcdc.h>
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
index c6d8fdf92e9c..b0d4723c9a90 100644
--- a/arch/arm/mach-omap1/mcbsp.c
+++ b/arch/arm/mach-omap1/mcbsp.c
@@ -19,7 +19,7 @@
 #include <linux/platform_device.h>
 #include <linux/slab.h>
 
-#include <plat-omap/dma-omap.h>
+#include <linux/omap-dma.h>
 #include <mach/mux.h>
 #include "soc.h"
 #include <linux/platform_data/asoc-ti-mcbsp.h>
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c
index b2c2328d7c18..7a7690ab6cb8 100644
--- a/arch/arm/mach-omap1/pm.c
+++ b/arch/arm/mach-omap1/pm.c
@@ -44,6 +44,7 @@
 #include <linux/io.h>
 #include <linux/atomic.h>
 
+#include <asm/fncpy.h>
 #include <asm/system_misc.h>
 #include <asm/irq.h>
 #include <asm/mach/time.h>
@@ -51,16 +52,15 @@
 
 #include <mach/tc.h>
 #include <mach/mux.h>
-#include <plat-omap/dma-omap.h>
+#include <linux/omap-dma.h>
 #include <plat/dmtimer.h>
 
 #include <mach/irqs.h>
 
-#include "../plat-omap/sram.h"
-
 #include "iomap.h"
 #include "clock.h"
 #include "pm.h"
+#include "sram.h"
 
 static unsigned int arm_sleep_save[ARM_SLEEP_SAVE_SIZE];
 static unsigned short dsp_sleep_save[DSP_SLEEP_SAVE_SIZE];
diff --git a/arch/arm/mach-omap1/sleep.S b/arch/arm/mach-omap1/sleep.S
index 0e628743bd03..a908c51839a4 100644
--- a/arch/arm/mach-omap1/sleep.S
+++ b/arch/arm/mach-omap1/sleep.S
@@ -36,6 +36,8 @@
 
 #include <asm/assembler.h>
 
+#include <mach/hardware.h>
+
 #include "iomap.h"
 #include "pm.h"
 
diff --git a/arch/arm/mach-omap1/soc.h b/arch/arm/mach-omap1/soc.h
index 6cf9c1cc2bef..69daf0187b1d 100644
--- a/arch/arm/mach-omap1/soc.h
+++ b/arch/arm/mach-omap1/soc.h
@@ -1,229 +1,4 @@
 /*
- * OMAP cpu type detection
- *
- * Copyright (C) 2004, 2008 Nokia Corporation
- *
- * Copyright (C) 2009-11 Texas Instruments.
- *
- * Written by Tony Lindgren <tony.lindgren@nokia.com>
- *
- * Added OMAP4/5 specific defines - Santosh Shilimkar<santosh.shilimkar@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
+ * We can move mach/soc.h here once the drivers are fixed
  */
-
-#ifndef __ASM_ARCH_OMAP_CPU_H
-#define __ASM_ARCH_OMAP_CPU_H
-
-#ifndef __ASSEMBLY__
-
-#include <linux/bitops.h>
-
-/*
- * Test if multicore OMAP support is needed
- */
-#undef MULTI_OMAP1
-#undef OMAP_NAME
-
-#ifdef CONFIG_ARCH_OMAP730
-# ifdef OMAP_NAME
-#  undef  MULTI_OMAP1
-#  define MULTI_OMAP1
-# else
-#  define OMAP_NAME omap730
-# endif
-#endif
-#ifdef CONFIG_ARCH_OMAP850
-# ifdef OMAP_NAME
-#  undef  MULTI_OMAP1
-#  define MULTI_OMAP1
-# else
-#  define OMAP_NAME omap850
-# endif
-#endif
-#ifdef CONFIG_ARCH_OMAP15XX
-# ifdef OMAP_NAME
-#  undef  MULTI_OMAP1
-#  define MULTI_OMAP1
-# else
-#  define OMAP_NAME omap1510
-# endif
-#endif
-#ifdef CONFIG_ARCH_OMAP16XX
-# ifdef OMAP_NAME
-#  undef  MULTI_OMAP1
-#  define MULTI_OMAP1
-# else
-#  define OMAP_NAME omap16xx
-# endif
-#endif
-
-/*
- * omap_rev bits:
- * CPU id bits  (0730, 1510, 1710, 2422...)     [31:16]
- * CPU revision (See _REV_ defined in cpu.h)    [15:08]
- * CPU class bits (15xx, 16xx, 24xx, 34xx...)   [07:00]
- */
-unsigned int omap_rev(void);
-
-/*
- * Get the CPU revision for OMAP devices
- */
-#define GET_OMAP_REVISION()     ((omap_rev() >> 8) & 0xff)
-
-/*
- * Macros to group OMAP into cpu classes.
- * These can be used in most places.
- * cpu_is_omap7xx():    True for OMAP730, OMAP850
- * cpu_is_omap15xx():   True for OMAP1510, OMAP5910 and OMAP310
- * cpu_is_omap16xx():   True for OMAP1610, OMAP5912 and OMAP1710
- */
-#define GET_OMAP_CLASS  (omap_rev() & 0xff)
-
-#define IS_OMAP_CLASS(class, id)                        \
-static inline int is_omap ##class (void)                \
-{                                                       \
-        return (GET_OMAP_CLASS == (id)) ? 1 : 0;        \
-}
-
-#define GET_OMAP_SUBCLASS       ((omap_rev() >> 20) & 0x0fff)
-
-#define IS_OMAP_SUBCLASS(subclass, id)                  \
-static inline int is_omap ##subclass (void)             \
-{                                                       \
-        return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0;     \
-}
-
-IS_OMAP_CLASS(7xx, 0x07)
-IS_OMAP_CLASS(15xx, 0x15)
-IS_OMAP_CLASS(16xx, 0x16)
-
-#define cpu_is_omap7xx()                0
-#define cpu_is_omap15xx()               0
-#define cpu_is_omap16xx()               0
-
-#if defined(MULTI_OMAP1)
-# if defined(CONFIG_ARCH_OMAP730)
-#  undef  cpu_is_omap7xx
-#  define cpu_is_omap7xx()              is_omap7xx()
-# endif
-# if defined(CONFIG_ARCH_OMAP850)
-#  undef  cpu_is_omap7xx
-#  define cpu_is_omap7xx()              is_omap7xx()
-# endif
-# if defined(CONFIG_ARCH_OMAP15XX)
-#  undef  cpu_is_omap15xx
-#  define cpu_is_omap15xx()             is_omap15xx()
-# endif
-# if defined(CONFIG_ARCH_OMAP16XX)
-#  undef  cpu_is_omap16xx
-#  define cpu_is_omap16xx()             is_omap16xx()
-# endif
-#else
-# if defined(CONFIG_ARCH_OMAP730)
-#  undef  cpu_is_omap7xx
-#  define cpu_is_omap7xx()              1
-# endif
-# if defined(CONFIG_ARCH_OMAP850)
-#  undef  cpu_is_omap7xx
-#  define cpu_is_omap7xx()              1
-# endif
-# if defined(CONFIG_ARCH_OMAP15XX)
-#  undef  cpu_is_omap15xx
-#  define cpu_is_omap15xx()             1
-# endif
-# if defined(CONFIG_ARCH_OMAP16XX)
-#  undef  cpu_is_omap16xx
-#  define cpu_is_omap16xx()             1
-# endif
-#endif
-
-/*
- * Macros to detect individual cpu types.
- * These are only rarely needed.
- * cpu_is_omap310():    True for OMAP310
- * cpu_is_omap1510():   True for OMAP1510
- * cpu_is_omap1610():   True for OMAP1610
- * cpu_is_omap1611():   True for OMAP1611
- * cpu_is_omap5912():   True for OMAP5912
- * cpu_is_omap1621():   True for OMAP1621
- * cpu_is_omap1710():   True for OMAP1710
- */
-#define GET_OMAP_TYPE   ((omap_rev() >> 16) & 0xffff)
-
-#define IS_OMAP_TYPE(type, id)                          \
-static inline int is_omap ##type (void)                 \
-{                                                       \
-        return (GET_OMAP_TYPE == (id)) ? 1 : 0;         \
-}
-
-IS_OMAP_TYPE(310, 0x0310)
-IS_OMAP_TYPE(1510, 0x1510)
-IS_OMAP_TYPE(1610, 0x1610)
-IS_OMAP_TYPE(1611, 0x1611)
-IS_OMAP_TYPE(5912, 0x1611)
-IS_OMAP_TYPE(1621, 0x1621)
-IS_OMAP_TYPE(1710, 0x1710)
-
-#define cpu_is_omap310()                0
-#define cpu_is_omap1510()               0
-#define cpu_is_omap1610()               0
-#define cpu_is_omap5912()               0
-#define cpu_is_omap1611()               0
-#define cpu_is_omap1621()               0
-#define cpu_is_omap1710()               0
-
-/* These are needed to compile common code */
-#ifdef CONFIG_ARCH_OMAP1
-#define cpu_is_omap242x()               0
-#define cpu_is_omap2430()               0
-#define cpu_is_omap243x()               0
-#define cpu_is_omap24xx()               0
-#define cpu_is_omap34xx()               0
-#define cpu_is_omap44xx()               0
-#define soc_is_omap54xx()               0
-#define soc_is_am33xx()                 0
-#define cpu_class_is_omap1()            1
-#define cpu_class_is_omap2()            0
-#endif
-
-/*
- * Whether we have MULTI_OMAP1 or not, we still need to distinguish
- * between 310 vs. 1510 and 1611B/5912 vs. 1710.
- */
-
-#if defined(CONFIG_ARCH_OMAP15XX)
-# undef  cpu_is_omap310
-# undef  cpu_is_omap1510
-# define cpu_is_omap310()               is_omap310()
-# define cpu_is_omap1510()              is_omap1510()
-#endif
-
-#if defined(CONFIG_ARCH_OMAP16XX)
-# undef  cpu_is_omap1610
-# undef  cpu_is_omap1611
-# undef  cpu_is_omap5912
-# undef  cpu_is_omap1621
-# undef  cpu_is_omap1710
-# define cpu_is_omap1610()              is_omap1610()
-# define cpu_is_omap1611()              is_omap1611()
-# define cpu_is_omap5912()              is_omap5912()
-# define cpu_is_omap1621()              is_omap1621()
-# define cpu_is_omap1710()              is_omap1710()
-#endif
-
-#endif  /* __ASSEMBLY__ */
-#endif
+#include <mach/soc.h>
diff --git a/arch/arm/mach-omap1/sram-init.c b/arch/arm/mach-omap1/sram-init.c
new file mode 100644
index 000000000000..6431b0f862ce
--- /dev/null
+++ b/arch/arm/mach-omap1/sram-init.c
@@ -0,0 +1,76 @@
+/*
+ * OMAP SRAM detection and management
+ *
+ * Copyright (C) 2005 Nokia Corporation
+ * Written by Tony Lindgren <tony@atomide.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+
+#include <asm/fncpy.h>
+#include <asm/tlb.h>
+#include <asm/cacheflush.h>
+
+#include <asm/mach/map.h>
+
+#include "soc.h"
+#include "sram.h"
+
+#define OMAP1_SRAM_PA           0x20000000
+#define SRAM_BOOTLOADER_SZ      0x80
+
+/*
+ * The amount of SRAM depends on the core type.
+ * Note that we cannot try to test for SRAM here because writes
+ * to secure SRAM will hang the system. Also the SRAM is not
+ * yet mapped at this point.
+ */
+static void __init omap_detect_and_map_sram(void)
+{
+        unsigned long omap_sram_skip = SRAM_BOOTLOADER_SZ;
+        unsigned long omap_sram_start = OMAP1_SRAM_PA;
+        unsigned long omap_sram_size;
+
+        if (cpu_is_omap7xx())
+                omap_sram_size = 0x32000;       /* 200K */
+        else if (cpu_is_omap15xx())
+                omap_sram_size = 0x30000;       /* 192K */
+        else if (cpu_is_omap1610() || cpu_is_omap1611() ||
+                        cpu_is_omap1621() || cpu_is_omap1710())
+                omap_sram_size = 0x4000;        /* 16K */
+        else {
+                pr_err("Could not detect SRAM size\n");
+                omap_sram_size = 0x4000;
+        }
+
+        omap_map_sram(omap_sram_start, omap_sram_size,
+                omap_sram_skip, 1);
+}
+
+static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl);
+
+void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
+{
+        BUG_ON(!_omap_sram_reprogram_clock);
+        /* On 730, bit 13 must always be 1 */
+        if (cpu_is_omap7xx())
+                ckctl |= 0x2000;
+        _omap_sram_reprogram_clock(dpllctl, ckctl);
+}
+
+int __init omap_sram_init(void)
+{
+        omap_detect_and_map_sram();
+        _omap_sram_reprogram_clock =
+                        omap_sram_push(omap1_sram_reprogram_clock,
+                                        omap1_sram_reprogram_clock_sz);
+
+        return 0;
+}
diff --git a/arch/arm/mach-omap1/sram.h b/arch/arm/mach-omap1/sram.h
new file mode 100644
index 000000000000..d5a6c8362301
--- /dev/null
+++ b/arch/arm/mach-omap1/sram.h
@@ -0,0 +1,7 @@
+#include <plat/sram.h>
+
+extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl);
+
+/* Do not use these */
+extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
+extern unsigned long omap1_sram_reprogram_clock_sz;
diff --git a/arch/arm/mach-omap1/timer.c b/arch/arm/mach-omap1/timer.c
index cdeb9d3ef640..bde7a35e5000 100644
--- a/arch/arm/mach-omap1/timer.c
+++ b/arch/arm/mach-omap1/timer.c
@@ -25,6 +25,7 @@
 #include <linux/err.h>
 #include <linux/slab.h>
 #include <linux/platform_device.h>
+#include <linux/platform_data/dmtimer-omap.h>
 
 #include <mach/irqs.h>
 
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c
index 74529549130c..41152fadd4c0 100644
--- a/arch/arm/mach-omap1/timer32k.c
+++ b/arch/arm/mach-omap1/timer32k.c
@@ -50,7 +50,7 @@
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
 
-#include <plat/dmtimer.h>
+#include <plat/counter-32k.h>
 
 #include <mach/hardware.h>
 
diff --git a/arch/arm/mach-omap1/usb.c b/arch/arm/mach-omap1/usb.c
index 84267edd9421..104fed366b8f 100644
--- a/arch/arm/mach-omap1/usb.c
+++ b/arch/arm/mach-omap1/usb.c
@@ -301,7 +301,7 @@ static inline void otg_device_init(struct omap_usb_config *pdata)
 
 #endif
 
-u32 __init omap1_usb0_init(unsigned nwires, unsigned is_device)
+static u32 __init omap1_usb0_init(unsigned nwires, unsigned is_device)
 {
         u32     syscon1 = 0;
 
@@ -409,7 +409,7 @@ u32 __init omap1_usb0_init(unsigned nwires, unsigned is_device)
         return syscon1 << 16;
 }
 
-u32 __init omap1_usb1_init(unsigned nwires)
+static u32 __init omap1_usb1_init(unsigned nwires)
 {
         u32     syscon1 = 0;
 
@@ -475,7 +475,7 @@ bad:
         return syscon1 << 20;
 }
 
-u32 __init omap1_usb2_init(unsigned nwires, unsigned alt_pingroup)
+static u32 __init omap1_usb2_init(unsigned nwires, unsigned alt_pingroup)
 {
         u32     syscon1 = 0;
 
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 798f35b8ea59..745401020c2b 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -5,7 +5,7 @@
 # Common support
 obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \
          common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \
-         omap_device.o
+         omap_device.o sram.o
 
 omap-2-3-common                         = irq.o
 hwmod-common                            = omap_hwmod.o \
@@ -73,6 +73,8 @@ obj-$(CONFIG_ARCH_OMAP4)		+= opp4xxx_data.o
 endif
 
 # Power Management
+obj-$(CONFIG_OMAP_PM_NOOP)              += omap-pm-noop.o
+
 ifeq ($(CONFIG_PM),y)
 obj-$(CONFIG_ARCH_OMAP2)                += pm24xx.o
 obj-$(CONFIG_ARCH_OMAP2)                += sleep24xx.o
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index acb0a524ff7b..4815ea6f8f5d 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -28,7 +28,6 @@
 #include <linux/io.h>
 #include <linux/gpio.h>
 
-#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 6601754f9512..7b201546834d 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -31,7 +31,7 @@
 #include <asm/mach/map.h>
 
 #include "common.h"
-#include <plat-omap/dma-omap.h>
+#include <linux/omap-dma.h>
 #include <video/omapdss.h>
 #include <video/omap-panel-tfp410.h>
 
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 488f86fd0e72..c8e37dc00892 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -44,8 +44,6 @@
 #include <video/omap-panel-tfp410.h>
 #include <linux/platform_data/spi-omap2-mcspi.h>
 
-#include <mach/hardware.h>
-
 #include "common.h"
 #include "mux.h"
 #include "sdram-micron-mt46h32m32lf-6.h"
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index 699caec8f9e2..ebbc2adb499e 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -297,6 +297,6 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = cm_t3517_init,
         .init_late      = am35xx_init_late,
-        .timer          = &omap3_timer,
+        .timer          = &omap3_gp_timer,
         .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 475e14f07216..f0715a369c44 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -97,6 +97,23 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
         .dt_compat      = omap3_boards_compat,
         .restart        = omap3xxx_restart,
 MACHINE_END
+
+static const char *omap3_gp_boards_compat[] __initdata = {
+        "ti,omap3-beagle",
+        NULL,
+};
+
+DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)")
+        .reserve        = omap_reserve,
+        .map_io         = omap3_map_io,
+        .init_early     = omap3430_init_early,
+        .init_irq       = omap_intc_of_init,
+        .handle_irq     = omap3_intc_handle_irq,
+        .init_machine   = omap_generic_init,
+        .timer          = &omap3_secure_timer,
+        .dt_compat      = omap3_gp_boards_compat,
+        .restart        = omap3xxx_restart,
+MACHINE_END
 #endif
 
 #ifdef CONFIG_SOC_AM33XX
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 3c1e458f68a1..9a3878ec2256 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -32,8 +32,8 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
-#include <plat-omap/dma-omap.h>
-#include "debug-devices.h"
+#include <linux/omap-dma.h>
+#include <plat/debug-devices.h>
 
 #include <video/omapdss.h>
 #include <video/omap-panel-generic-dpi.h>
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index cea5d5292628..0f24cb84ba5a 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -579,6 +579,11 @@ static void __init igep_wlan_bt_init(void)
         } else
                 return;
 
+        /* Make sure that the GPIO pins are muxed correctly */
+        omap_mux_init_gpio(igep_wlan_bt_gpios[0].gpio, OMAP_PIN_OUTPUT);
+        omap_mux_init_gpio(igep_wlan_bt_gpios[1].gpio, OMAP_PIN_OUTPUT);
+        omap_mux_init_gpio(igep_wlan_bt_gpios[2].gpio, OMAP_PIN_OUTPUT);
+
         err = gpio_request_array(igep_wlan_bt_gpios,
                                  ARRAY_SIZE(igep_wlan_bt_gpios));
         if (err) {
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 140b73094aff..c8fde3e56441 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -45,7 +45,6 @@
 #include <asm/mach/flash.h>
 #include <asm/mach/map.h>
 
-#include "common.h"
 #include <video/omapdss.h>
 #include <video/omap-panel-generic-dpi.h>
 #include <video/omap-panel-tfp410.h>
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index 07005fe40a2a..60529e0b3d67 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -31,7 +31,7 @@
 #include <asm/system_info.h>
 
 #include "common.h"
-#include <plat-omap/dma-omap.h>
+#include <linux/omap-dma.h>
 #include "gpmc-smc91x.h"
 
 #include "board-rx51.h"
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index bf8f74b0ce3e..ee1045c0ad67 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -24,7 +24,7 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
-#include <plat-omap/dma-omap.h>
+#include <linux/omap-dma.h>
 
 #include "common.h"
 #include "mux.h"
diff --git a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
index a0ae3c09f97a..d8620105c42a 100644
--- a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
+++ b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
@@ -25,14 +25,13 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 
-#include "../plat-omap/sram.h"
-
 #include "clock.h"
 #include "clock2xxx.h"
 #include "opp2xxx.h"
 #include "cm2xxx.h"
 #include "cm-regbits-24xx.h"
 #include "sdrc.h"
+#include "sram.h"
 
 /* #define DOWN_VARIABLE_DPLL 1 */              /* Experimental */
 
diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
index 7af224208a25..ae2b35e76dc8 100644
--- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
+++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
@@ -33,8 +33,6 @@
 #include <linux/cpufreq.h>
 #include <linux/slab.h>
 
-#include "../plat-omap/sram.h"
-
 #include "soc.h"
 #include "clock.h"
 #include "clock2xxx.h"
@@ -42,6 +40,7 @@
 #include "cm2xxx.h"
 #include "cm-regbits-24xx.h"
 #include "sdrc.h"
+#include "sram.h"
 
 const struct prcm_config *curr_prcm_set;
 const struct prcm_config *rate_table;
diff --git a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
index 8e48c6d602e7..eb69acf21014 100644
--- a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
+++ b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
@@ -21,12 +21,11 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 
-#include "../plat-omap/sram.h"
-
 #include "clock.h"
 #include "clock3xxx.h"
 #include "clock34xx.h"
 #include "sdrc.h"
+#include "sram.h"
 
 #define CYCLES_PER_MHZ                  1000000
 
diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
index b2dfcd777194..058ce3c0873e 100644
--- a/arch/arm/mach-omap2/cm33xx.c
+++ b/arch/arm/mach-omap2/cm33xx.c
@@ -22,8 +22,6 @@
 #include <linux/err.h>
 #include <linux/io.h>
 
-#include "../plat-omap/common.h"
-
 #include "clockdomain.h"
 #include "cm.h"
 #include "cm33xx.h"
diff --git a/arch/arm/mach-omap2/cm_common.c b/arch/arm/mach-omap2/cm_common.c
index 0bab493ec133..40b3b5a84458 100644
--- a/arch/arm/mach-omap2/cm_common.c
+++ b/arch/arm/mach-omap2/cm_common.c
@@ -13,6 +13,7 @@
 
 #include <linux/kernel.h>
 #include <linux/init.h>
+#include <linux/errno.h>
 
 #include "cm2xxx.h"
 #include "cm3xxx.h"
diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c
index ad856092c06a..d246efd9f734 100644
--- a/arch/arm/mach-omap2/common-board-devices.c
+++ b/arch/arm/mach-omap2/common-board-devices.c
@@ -63,30 +63,36 @@ void __init omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
         struct spi_board_info *spi_bi = &ads7846_spi_board_info;
         int err;
 
-        err = gpio_request_one(gpio_pendown, GPIOF_IN, "TSPenDown");
-        if (err) {
-                pr_err("Couldn't obtain gpio for TSPenDown: %d\n", err);
-                return;
-        }
+        /*
+         * If a board defines get_pendown_state() function, request the pendown
+         * GPIO and set the GPIO debounce time.
+         * If a board does not define the get_pendown_state() function, then
+         * the ads7846 driver will setup the pendown GPIO itself.
+         */
+        if (board_pdata && board_pdata->get_pendown_state) {
+                err = gpio_request_one(gpio_pendown, GPIOF_IN, "TSPenDown");
+                if (err) {
+                        pr_err("Couldn't obtain gpio for TSPenDown: %d\n", err);
+                        return;
+                }
+
+                if (gpio_debounce)
+                        gpio_set_debounce(gpio_pendown, gpio_debounce);
 
-        if (gpio_debounce)
-                gpio_set_debounce(gpio_pendown, gpio_debounce);
+                gpio_export(gpio_pendown, 0);
+        }
 
         spi_bi->bus_num = bus_num;
         spi_bi->irq     = gpio_to_irq(gpio_pendown);
 
+        ads7846_config.gpio_pendown = gpio_pendown;
+
         if (board_pdata) {
                 board_pdata->gpio_pendown = gpio_pendown;
+                board_pdata->gpio_pendown_debounce = gpio_debounce;
                 spi_bi->platform_data = board_pdata;
-                if (board_pdata->get_pendown_state)
-                        gpio_export(gpio_pendown, 0);
-        } else {
-                ads7846_config.gpio_pendown = gpio_pendown;
         }
 
-        if (!board_pdata || (board_pdata && !board_pdata->get_pendown_state))
-                gpio_free(gpio_pendown);
-
         spi_register_board_info(&ads7846_spi_board_info, 1);
 }
 #else
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index c57eeeac7d11..3bbcde87dead 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -34,8 +34,6 @@
 
 #include <asm/proc-fns.h>
 
-#include "../plat-omap/common.h"
-
 #include "i2c.h"
 #include "serial.h"
 
@@ -84,6 +82,7 @@ extern void omap2_init_common_infrastructure(void);
 extern struct sys_timer omap2_timer;
 extern struct sys_timer omap3_timer;
 extern struct sys_timer omap3_secure_timer;
+extern struct sys_timer omap3_gp_timer;
 extern struct sys_timer omap3_am33xx_timer;
 extern struct sys_timer omap4_timer;
 extern struct sys_timer omap5_timer;
@@ -280,5 +279,8 @@ struct omap2_hsmmc_info;
 extern int omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers);
 extern void omap_reserve(void);
 
+struct omap_hwmod;
+extern int omap_dss_reset(struct omap_hwmod *);
+
 #endif /* __ASSEMBLER__ */
 #endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index d2215e9873a5..cafe04660a4b 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -24,7 +24,7 @@
 #include <asm/mach-types.h>
 #include <asm/mach/map.h>
 
-#include <plat-omap/dma-omap.h>
+#include <linux/omap-dma.h>
 
 #include "iomap.h"
 #include "omap_hwmod.h"
diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c
index b1926cd70468..612b98249873 100644
--- a/arch/arm/mach-omap2/dma.c
+++ b/arch/arm/mach-omap2/dma.c
@@ -28,7 +28,7 @@
 #include <linux/init.h>
 #include <linux/device.h>
 
-#include <plat-omap/dma-omap.h>
+#include <linux/omap-dma.h>
 
 #include "soc.h"
 #include "omap_hwmod.h"
@@ -276,6 +276,9 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
                 return -ENOMEM;
         }
 
+        if (cpu_is_omap34xx() && (omap_type() != OMAP2_DEVICE_TYPE_GP))
+                d->dev_caps |= HS_CHANNELS_RESERVED;
+
         /* Check the capabilities register for descriptor loading feature */
         if (dma_read(CAPS_0, 0) & DMA_HAS_DESCRIPTOR_CAPS)
                 dma_common_ch_end = CCDN;
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index e3406dce59be..4a964338992a 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -14,7 +14,6 @@
 #include <linux/string.h>
 #include <linux/delay.h>
 #include <linux/gpio.h>
-#include <mach/hardware.h>
 #include <linux/platform_data/gpio-omap.h>
 
 #include "soc.h"
diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c
index be092e8e5d85..fbb9b152cd5e 100644
--- a/arch/arm/mach-omap2/i2c.c
+++ b/arch/arm/mach-omap2/i2c.c
@@ -107,6 +107,19 @@ int omap_i2c_reset(struct omap_hwmod *oh)
         return 0;
 }
 
+static int __init omap_i2c_nr_ports(void)
+{
+        int ports = 0;
+
+        if (cpu_is_omap24xx())
+                ports = 2;
+        else if (cpu_is_omap34xx())
+                ports = 3;
+        else if (cpu_is_omap44xx())
+                ports = 4;
+        return ports;
+}
+
 static const char name[] = "omap_i2c";
 
 int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *i2c_pdata,
@@ -119,6 +132,9 @@ int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *i2c_pdata,
         struct omap_i2c_bus_platform_data *pdata;
         struct omap_i2c_dev_attr *dev_attr;
 
+        if (bus_id > omap_i2c_nr_ports())
+                return -EINVAL;
+
         omap2_i2c_mux_pins(bus_id);
 
         l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id);
diff --git a/arch/arm/mach-omap2/i2c.h b/arch/arm/mach-omap2/i2c.h
index 81dbb992a6bc..42b6f2e7d190 100644
--- a/arch/arm/mach-omap2/i2c.h
+++ b/arch/arm/mach-omap2/i2c.h
@@ -19,7 +19,7 @@
  *
  */
 
-#include "../plat-omap/i2c.h"
+#include <plat/i2c.h>
 
 #ifndef __MACH_OMAP2_I2C_H
 #define __MACH_OMAP2_I2C_H
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index f1e121502789..45cc7ed4dd58 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -28,6 +28,9 @@
 #include "soc.h"
 #include "control.h"
 
+#define OMAP4_SILICON_TYPE_STANDARD             0x01
+#define OMAP4_SILICON_TYPE_PERFORMANCE          0x02
+
 static unsigned int omap_revision;
 static const char *cpu_rev;
 u32 omap_features;
@@ -273,25 +276,11 @@ void __init omap4xxx_check_features(void)
 {
         u32 si_type;
 
-        if (cpu_is_omap443x())
-                omap_features |= OMAP4_HAS_MPU_1GHZ;
-
+        si_type =
+        (read_tap_reg(OMAP4_CTRL_MODULE_CORE_STD_FUSE_PROD_ID_1) >> 16) & 0x03;
 
-        if (cpu_is_omap446x()) {
-                si_type =
-                        read_tap_reg(OMAP4_CTRL_MODULE_CORE_STD_FUSE_PROD_ID_1);
-                switch ((si_type & (3 << 16)) >> 16) {
-                case 2:
-                        /* High performance device */
-                        omap_features |= OMAP4_HAS_MPU_1_5GHZ;
-                        break;
-                case 1:
-                default:
-                        /* Standard device */
-                        omap_features |= OMAP4_HAS_MPU_1_2GHZ;
-                        break;
-                }
-        }
+        if (si_type == OMAP4_SILICON_TYPE_PERFORMANCE)
+                omap_features = OMAP4_HAS_PERF_SILICON;
 }
 
 void __init ti81xx_check_features(void)
diff --git a/arch/arm/mach-omap2/include/mach/debug-macro.S b/arch/arm/mach-omap2/include/mach/debug-macro.S
index 4b5cbdfac028..cfaed13d0040 100644
--- a/arch/arm/mach-omap2/include/mach/debug-macro.S
+++ b/arch/arm/mach-omap2/include/mach/debug-macro.S
@@ -13,7 +13,7 @@
 
 #include <linux/serial_reg.h>
 
-#include <../mach-omap2/serial.h>
+#include <mach/serial.h>
 
 #define UART_OFFSET(addr)       ((addr) & 0x00ffffff)
 
diff --git a/arch/arm/mach-omap2/include/mach/gpio.h b/arch/arm/mach-omap2/include/mach/gpio.h
deleted file mode 100644
index 5621cc59c9f4..000000000000
--- a/arch/arm/mach-omap2/include/mach/gpio.h
+++ /dev/null
@@ -1,3 +0,0 @@
-/*
- * arch/arm/mach-omap2/include/mach/gpio.h
- */
diff --git a/arch/arm/mach-omap2/include/mach/serial.h b/arch/arm/mach-omap2/include/mach/serial.h
new file mode 100644
index 000000000000..70eda00db7a4
--- /dev/null
+++ b/arch/arm/mach-omap2/include/mach/serial.h
@@ -0,0 +1,103 @@
+/*
+ * Copyright (C) 2009 Texas Instruments
+ * Added OMAP4 support- Santosh Shilimkar <santosh.shilimkar@ti.com>
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/*
+ * Memory entry used for the DEBUG_LL UART configuration, relative to
+ * start of RAM. See also uncompress.h and debug-macro.S.
+ *
+ * Note that using a memory location for storing the UART configuration
+ * has at least two limitations:
+ *
+ * 1. Kernel uncompress code cannot overlap OMAP_UART_INFO as the
+ *    uncompress code could then partially overwrite itself
+ * 2. We assume printascii is called at least once before paging_init,
+ *    and addruart has a chance to read OMAP_UART_INFO
+ */
+#define OMAP_UART_INFO_OFS      0x3ffc
+
+/* OMAP2 serial ports */
+#define OMAP2_UART1_BASE        0x4806a000
+#define OMAP2_UART2_BASE        0x4806c000
+#define OMAP2_UART3_BASE        0x4806e000
+
+/* OMAP3 serial ports */
+#define OMAP3_UART1_BASE        OMAP2_UART1_BASE
+#define OMAP3_UART2_BASE        OMAP2_UART2_BASE
+#define OMAP3_UART3_BASE        0x49020000
+#define OMAP3_UART4_BASE        0x49042000      /* Only on 36xx */
+#define OMAP3_UART4_AM35XX_BASE 0x4809E000      /* Only on AM35xx */
+
+/* OMAP4 serial ports */
+#define OMAP4_UART1_BASE        OMAP2_UART1_BASE
+#define OMAP4_UART2_BASE        OMAP2_UART2_BASE
+#define OMAP4_UART3_BASE        0x48020000
+#define OMAP4_UART4_BASE        0x4806e000
+
+/* TI81XX serial ports */
+#define TI81XX_UART1_BASE       0x48020000
+#define TI81XX_UART2_BASE       0x48022000
+#define TI81XX_UART3_BASE       0x48024000
+
+/* AM3505/3517 UART4 */
+#define AM35XX_UART4_BASE       0x4809E000      /* Only on AM3505/3517 */
+
+/* AM33XX serial port */
+#define AM33XX_UART1_BASE       0x44E09000
+
+/* OMAP5 serial ports */
+#define OMAP5_UART1_BASE        OMAP2_UART1_BASE
+#define OMAP5_UART2_BASE        OMAP2_UART2_BASE
+#define OMAP5_UART3_BASE        OMAP4_UART3_BASE
+#define OMAP5_UART4_BASE        OMAP4_UART4_BASE
+#define OMAP5_UART5_BASE        0x48066000
+#define OMAP5_UART6_BASE        0x48068000
+
+/* External port on Zoom2/3 */
+#define ZOOM_UART_BASE          0x10000000
+#define ZOOM_UART_VIRT          0xfa400000
+
+#define OMAP_PORT_SHIFT         2
+#define ZOOM_PORT_SHIFT         1
+
+#define OMAP24XX_BASE_BAUD      (48000000/16)
+
+/*
+ * DEBUG_LL port encoding stored into the UART1 scratchpad register by
+ * decomp_setup in uncompress.h
+ */
+#define OMAP2UART1              21
+#define OMAP2UART2              22
+#define OMAP2UART3              23
+#define OMAP3UART1              OMAP2UART1
+#define OMAP3UART2              OMAP2UART2
+#define OMAP3UART3              33
+#define OMAP3UART4              34              /* Only on 36xx */
+#define OMAP4UART1              OMAP2UART1
+#define OMAP4UART2              OMAP2UART2
+#define OMAP4UART3              43
+#define OMAP4UART4              44
+#define TI81XXUART1             81
+#define TI81XXUART2             82
+#define TI81XXUART3             83
+#define AM33XXUART1             84
+#define OMAP5UART3              OMAP4UART3
+#define OMAP5UART4              OMAP4UART4
+#define ZOOM_UART               95              /* Only on zoom2/3 */
+
+#ifndef __ASSEMBLER__
+
+struct omap_board_data;
+struct omap_uart_port_info;
+
+extern void omap_serial_init(void);
+extern void omap_serial_board_init(struct omap_uart_port_info *platform_data);
+extern void omap_serial_init_port(struct omap_board_data *bdata,
+                struct omap_uart_port_info *platform_data);
+#endif
diff --git a/arch/arm/mach-omap2/include/mach/uncompress.h b/arch/arm/mach-omap2/include/mach/uncompress.h
index 28d1ec0e869a..8e3546d3e041 100644
--- a/arch/arm/mach-omap2/include/mach/uncompress.h
+++ b/arch/arm/mach-omap2/include/mach/uncompress.h
@@ -23,7 +23,7 @@
 #include <asm/memory.h>
 #include <asm/mach-types.h>
 
-#include <../mach-omap2/serial.h>
+#include <mach/serial.h>
 
 #define MDR1_MODE_MASK                  0x07
 
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 924bf24693cd..2c3fdd65387b 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -25,9 +25,7 @@
 #include <asm/tlb.h>
 #include <asm/mach/map.h>
 
-#include <plat-omap/dma-omap.h>
-
-#include "../plat-omap/sram.h"
+#include <linux/omap-dma.h>
 
 #include "omap_hwmod.h"
 #include "soc.h"
@@ -44,6 +42,7 @@
 #include "sdrc.h"
 #include "control.h"
 #include "serial.h"
+#include "sram.h"
 #include "cm2xxx.h"
 #include "cm3xxx.h"
 #include "prm.h"
@@ -51,6 +50,10 @@
 #include "prcm_mpu44xx.h"
 #include "prminst44xx.h"
 #include "cminst44xx.h"
+#include "prm2xxx.h"
+#include "prm3xxx.h"
+#include "prm44xx.h"
+
 /*
  * The machine specific code may provide the extra mapping besides the
  * default mapping provided here.
@@ -361,11 +364,6 @@ static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
         return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
 }
 
-static void __init omap_common_init_early(void)
-{
-        omap_init_consistent_dma_size();
-}
-
 static void __init omap_hwmod_init_postsetup(void)
 {
         u8 postsetup_state;
@@ -392,8 +390,8 @@ void __init omap2420_init_early(void)
         omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE));
         omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE), NULL);
         omap2xxx_check_revision();
+        omap2xxx_prm_init();
         omap2xxx_cm_init();
-        omap_common_init_early();
         omap2xxx_voltagedomains_init();
         omap242x_powerdomains_init();
         omap242x_clockdomains_init();
@@ -422,8 +420,8 @@ void __init omap2430_init_early(void)
         omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE));
         omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE), NULL);
         omap2xxx_check_revision();
+        omap2xxx_prm_init();
         omap2xxx_cm_init();
-        omap_common_init_early();
         omap2xxx_voltagedomains_init();
         omap243x_powerdomains_init();
         omap243x_clockdomains_init();
@@ -457,8 +455,8 @@ void __init omap3_init_early(void)
         omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), NULL);
         omap3xxx_check_revision();
         omap3xxx_check_features();
+        omap3xxx_prm_init();
         omap3xxx_cm_init();
-        omap_common_init_early();
         omap3xxx_voltagedomains_init();
         omap3xxx_powerdomains_init();
         omap3xxx_clockdomains_init();
@@ -497,7 +495,6 @@ void __init ti81xx_init_early(void)
         omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), NULL);
         omap3xxx_check_revision();
         ti81xx_check_features();
-        omap_common_init_early();
         omap3xxx_voltagedomains_init();
         omap3xxx_powerdomains_init();
         omap3xxx_clockdomains_init();
@@ -566,7 +563,6 @@ void __init am33xx_init_early(void)
         omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), NULL);
         omap3xxx_check_revision();
         ti81xx_check_features();
-        omap_common_init_early();
         am33xx_voltagedomains_init();
         am33xx_powerdomains_init();
         am33xx_clockdomains_init();
@@ -591,7 +587,7 @@ void __init omap4430_init_early(void)
         omap_cm_base_init();
         omap4xxx_check_revision();
         omap4xxx_check_features();
-        omap_common_init_early();
+        omap44xx_prm_init();
         omap44xx_voltagedomains_init();
         omap44xx_powerdomains_init();
         omap44xx_clockdomains_init();
@@ -623,7 +619,6 @@ void __init omap5_init_early(void)
         omap_prm_base_init();
         omap_cm_base_init();
         omap5xxx_check_revision();
-        omap_common_init_early();
 }
 #endif
 
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index bf496510eb5e..df49f2a49461 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -21,7 +21,7 @@
 #include <linux/platform_data/asoc-ti-mcbsp.h>
 #include <linux/pm_runtime.h>
 
-#include <plat-omap/dma-omap.h>
+#include <linux/omap-dma.h>
 
 #include "omap_device.h"
 
diff --git a/arch/arm/plat-omap/omap-pm-noop.c b/arch/arm/mach-omap2/omap-pm-noop.c
index 198685b894b0..6a3be2bebddb 100644
--- a/arch/arm/plat-omap/omap-pm-noop.c
+++ b/arch/arm/mach-omap2/omap-pm-noop.c
@@ -22,8 +22,8 @@
 #include <linux/device.h>
 #include <linux/platform_device.h>
 
-#include "../mach-omap2/omap_device.h"
-#include "../mach-omap2/omap-pm.h"
+#include "omap_device.h"
+#include "omap-pm.h"
 
 static bool off_mode_enabled;
 static int dummy_context_loss_counter;
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 64fce07a3ccd..5695885ea340 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -25,8 +25,6 @@
 #include <asm/mach/map.h>
 #include <asm/memblock.h>
 
-#include "../plat-omap/sram.h"
-
 #include "omap-wakeupgen.h"
 #include "soc.h"
 #include "iomap.h"
@@ -37,6 +35,7 @@
 #include "prcm_mpu44xx.h"
 #include "omap4-sar-layout.h"
 #include "omap-secure.h"
+#include "sram.h"
 
 #ifdef CONFIG_CACHE_L2X0
 static void __iomem *l2cache_base;
diff --git a/arch/arm/mach-omap2/omap_device.c b/arch/arm/mach-omap2/omap_device.c
index 0ef934fec364..e065daa537c0 100644
--- a/arch/arm/mach-omap2/omap_device.c
+++ b/arch/arm/mach-omap2/omap_device.c
@@ -441,19 +441,21 @@ int omap_device_get_context_loss_count(struct platform_device *pdev)
 /**
  * omap_device_count_resources - count number of struct resource entries needed
  * @od: struct omap_device *
+ * @flags: Type of resources to include when counting (IRQ/DMA/MEM)
  *
  * Count the number of struct resource entries needed for this
  * omap_device @od.  Used by omap_device_build_ss() to determine how
  * much memory to allocate before calling
  * omap_device_fill_resources().  Returns the count.
  */
-static int omap_device_count_resources(struct omap_device *od)
+static int omap_device_count_resources(struct omap_device *od,
+                                       unsigned long flags)
 {
         int c = 0;
         int i;
 
         for (i = 0; i < od->hwmods_cnt; i++)
-                c += omap_hwmod_count_resources(od->hwmods[i]);
+                c += omap_hwmod_count_resources(od->hwmods[i], flags);
 
         pr_debug("omap_device: %s: counted %d total resources across %d hwmods\n",
                  od->pdev->name, c, od->hwmods_cnt);
@@ -557,52 +559,73 @@ struct omap_device *omap_device_alloc(struct platform_device *pdev,
         od->hwmods = hwmods;
         od->pdev = pdev;
 
-        res_count = omap_device_count_resources(od);
         /*
+         * Non-DT Boot:
+         *   Here, pdev->num_resources = 0, and we should get all the
+         *   resources from hwmod.
+         *
          * DT Boot:
          *   OF framework will construct the resource structure (currently
          *   does for MEM & IRQ resource) and we should respect/use these
          *   resources, killing hwmod dependency.
          *   If pdev->num_resources > 0, we assume that MEM & IRQ resources
          *   have been allocated by OF layer already (through DTB).
-         *
-         * Non-DT Boot:
-         *   Here, pdev->num_resources = 0, and we should get all the
-         *   resources from hwmod.
+         *   As preparation for the future we examine the OF provided resources
+         *   to see if we have DMA resources provided already. In this case
+         *   there is no need to update the resources for the device, we use the
+         *   OF provided ones.
          *
          * TODO: Once DMA resource is available from OF layer, we should
          *   kill filling any resources from hwmod.
          */
-        if (res_count > pdev->num_resources) {
-                /* Allocate resources memory to account for new resources */
-                res = kzalloc(sizeof(struct resource) * res_count, GFP_KERNEL);
-                if (!res)
-                        goto oda_exit3;
-
-                /*
-                 * If pdev->num_resources > 0, then assume that,
-                 * MEM and IRQ resources will only come from DT and only
-                 * fill DMA resource from hwmod layer.
-                 */
-                if (pdev->num_resources && pdev->resource) {
-                        dev_dbg(&pdev->dev, "%s(): resources already allocated %d\n",
-                                __func__, res_count);
-                        memcpy(res, pdev->resource,
-                               sizeof(struct resource) * pdev->num_resources);
-                        _od_fill_dma_resources(od, &res[pdev->num_resources]);
-                } else {
-                        dev_dbg(&pdev->dev, "%s(): using resources from hwmod %d\n",
-                                __func__, res_count);
-                        omap_device_fill_resources(od, res);
+        if (!pdev->num_resources) {
+                /* Count all resources for the device */
+                res_count = omap_device_count_resources(od, IORESOURCE_IRQ |
+                                                            IORESOURCE_DMA |
+                                                            IORESOURCE_MEM);
+        } else {
+                /* Take a look if we already have DMA resource via DT */
+                for (i = 0; i < pdev->num_resources; i++) {
+                        struct resource *r = &pdev->resource[i];
+
+                        /* We have it, no need to touch the resources */
+                        if (r->flags == IORESOURCE_DMA)
+                                goto have_everything;
                 }
+                /* Count only DMA resources for the device */
+                res_count = omap_device_count_resources(od, IORESOURCE_DMA);
+                /* The device has no DMA resource, no need for update */
+                if (!res_count)
+                        goto have_everything;
 
-                ret = platform_device_add_resources(pdev, res, res_count);
-                kfree(res);
+                res_count += pdev->num_resources;
+        }
 
-                if (ret)
-                        goto oda_exit3;
+        /* Allocate resources memory to account for new resources */
+        res = kzalloc(sizeof(struct resource) * res_count, GFP_KERNEL);
+        if (!res)
+                goto oda_exit3;
+
+        if (!pdev->num_resources) {
+                dev_dbg(&pdev->dev, "%s: using %d resources from hwmod\n",
+                        __func__, res_count);
+                omap_device_fill_resources(od, res);
+        } else {
+                dev_dbg(&pdev->dev,
+                        "%s: appending %d DMA resources from hwmod\n",
+                        __func__, res_count - pdev->num_resources);
+                memcpy(res, pdev->resource,
+                       sizeof(struct resource) * pdev->num_resources);
+                _od_fill_dma_resources(od, &res[pdev->num_resources]);
         }
 
+        ret = platform_device_add_resources(pdev, res, res_count);
+        kfree(res);
+
+        if (ret)
+                goto oda_exit3;
+
+have_everything:
         if (!pm_lats) {
                 pm_lats = omap_default_latency;
                 pm_lats_cnt = ARRAY_SIZE(omap_default_latency);
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 3f3bf323e201..4653efb87a27 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -187,6 +187,8 @@ struct omap_hwmod_soc_ops {
         int (*is_hardreset_asserted)(struct omap_hwmod *oh,
                                      struct omap_hwmod_rst_info *ohri);
         int (*init_clkdm)(struct omap_hwmod *oh);
+        void (*update_context_lost)(struct omap_hwmod *oh);
+        int (*get_context_lost)(struct omap_hwmod *oh);
 };
 
 /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
@@ -2015,6 +2017,42 @@ static void _reconfigure_io_chain(void)
 }
 
 /**
+ * _omap4_update_context_lost - increment hwmod context loss counter if
+ * hwmod context was lost, and clear hardware context loss reg
+ * @oh: hwmod to check for context loss
+ *
+ * If the PRCM indicates that the hwmod @oh lost context, increment
+ * our in-memory context loss counter, and clear the RM_*_CONTEXT
+ * bits. No return value.
+ */
+static void _omap4_update_context_lost(struct omap_hwmod *oh)
+{
+        if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT)
+                return;
+
+        if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition,
+                                          oh->clkdm->pwrdm.ptr->prcm_offs,
+                                          oh->prcm.omap4.context_offs))
+                return;
+
+        oh->prcm.omap4.context_lost_counter++;
+        prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition,
+                                         oh->clkdm->pwrdm.ptr->prcm_offs,
+                                         oh->prcm.omap4.context_offs);
+}
+
+/**
+ * _omap4_get_context_lost - get context loss counter for a hwmod
+ * @oh: hwmod to get context loss counter for
+ *
+ * Returns the in-memory context loss counter for a hwmod.
+ */
+static int _omap4_get_context_lost(struct omap_hwmod *oh)
+{
+        return oh->prcm.omap4.context_lost_counter;
+}
+
+/**
  * _enable - enable an omap_hwmod
  * @oh: struct omap_hwmod *
  *
@@ -2097,6 +2135,9 @@ static int _enable(struct omap_hwmod *oh)
         if (soc_ops.enable_module)
                 soc_ops.enable_module(oh);
 
+        if (soc_ops.update_context_lost)
+                soc_ops.update_context_lost(oh);
+
         r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
                 -EINVAL;
         if (!r) {
@@ -3421,7 +3462,7 @@ int omap_hwmod_reset(struct omap_hwmod *oh)
 /**
  * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  * @oh: struct omap_hwmod *
- * @res: pointer to the first element of an array of struct resource to fill
+ * @flags: Type of resources to include when counting (IRQ/DMA/MEM)
  *
  * Count the number of struct resource array elements necessary to
  * contain omap_hwmod @oh resources.  Intended to be called by code
@@ -3434,20 +3475,25 @@ int omap_hwmod_reset(struct omap_hwmod *oh)
  * resource IDs.
  *
  */
-int omap_hwmod_count_resources(struct omap_hwmod *oh)
+int omap_hwmod_count_resources(struct omap_hwmod *oh, unsigned long flags)
 {
-        struct omap_hwmod_ocp_if *os;
-        struct list_head *p;
-        int ret;
-        int i = 0;
+        int ret = 0;
 
-        ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
+        if (flags & IORESOURCE_IRQ)
+                ret += _count_mpu_irqs(oh);
 
-        p = oh->slave_ports.next;
+        if (flags & IORESOURCE_DMA)
+                ret += _count_sdma_reqs(oh);
 
-        while (i < oh->slaves_cnt) {
-                os = _fetch_next_ocp_if(&p, &i);
-                ret += _count_ocp_if_addr_spaces(os);
+        if (flags & IORESOURCE_MEM) {
+                int i = 0;
+                struct omap_hwmod_ocp_if *os;
+                struct list_head *p = oh->slave_ports.next;
+
+                while (i < oh->slaves_cnt) {
+                        os = _fetch_next_ocp_if(&p, &i);
+                        ret += _count_ocp_if_addr_spaces(os);
+                }
         }
 
         return ret;
@@ -3942,17 +3988,21 @@ ohsps_unlock:
  * omap_hwmod_get_context_loss_count - get lost context count
  * @oh: struct omap_hwmod *
  *
- * Query the powerdomain of of @oh to get the context loss
- * count for this device.
+ * Returns the context loss count of associated @oh
+ * upon success, or zero if no context loss data is available.
  *
- * Returns the context loss count of the powerdomain assocated with @oh
- * upon success, or zero if no powerdomain exists for @oh.
+ * On OMAP4, this queries the per-hwmod context loss register,
+ * assuming one exists.  If not, or on OMAP2/3, this queries the
+ * enclosing powerdomain context loss count.
  */
 int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
 {
         struct powerdomain *pwrdm;
         int ret = 0;
 
+        if (soc_ops.get_context_lost)
+                return soc_ops.get_context_lost(oh);
+
         pwrdm = omap_hwmod_get_pwrdm(oh);
         if (pwrdm)
                 ret = pwrdm_get_context_loss_count(pwrdm);
@@ -4067,6 +4117,8 @@ void __init omap_hwmod_init(void)
                 soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
                 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
                 soc_ops.init_clkdm = _init_clkdm;
+                soc_ops.update_context_lost = _omap4_update_context_lost;
+                soc_ops.get_context_lost = _omap4_get_context_lost;
         } else if (soc_is_am33xx()) {
                 soc_ops.enable_module = _am33xx_enable_module;
                 soc_ops.disable_module = _am33xx_disable_module;
diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h
index 87a3c5b7aa74..3ae852a522f9 100644
--- a/arch/arm/mach-omap2/omap_hwmod.h
+++ b/arch/arm/mach-omap2/omap_hwmod.h
@@ -2,7 +2,7 @@
  * omap_hwmod macros, structures
  *
  * Copyright (C) 2009-2011 Nokia Corporation
- * Copyright (C) 2012 Texas Instruments, Inc.
+ * Copyright (C) 2011-2012 Texas Instruments, Inc.
  * Paul Walmsley
  *
  * Created in collaboration with (alphabetical order): Benoît Cousson,
@@ -394,12 +394,15 @@ struct omap_hwmod_omap2_prcm {
 
 /**
  * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data
- * @clkctrl_reg: PRCM address of the clock control register
- * @rstctrl_reg: address of the XXX_RSTCTRL register located in the PRM
+ * @clkctrl_offs: offset of the PRCM clock control register
+ * @rstctrl_offs: offset of the XXX_RSTCTRL register located in the PRM
+ * @context_offs: offset of the RM_*_CONTEXT register
  * @lostcontext_mask: bitmask for selecting bits from RM_*_CONTEXT register
  * @rstst_reg: (AM33XX only) address of the XXX_RSTST register in the PRM
  * @submodule_wkdep_bit: bit shift of the WKDEP range
  * @flags: PRCM register capabilities for this IP block
+ * @modulemode: allowable modulemodes
+ * @context_lost_counter: Count of module level context lost
  *
  * If @lostcontext_mask is not defined, context loss check code uses
  * whole register without masking. @lostcontext_mask should only be
@@ -415,6 +418,7 @@ struct omap_hwmod_omap4_prcm {
         u8              submodule_wkdep_bit;
         u8              modulemode;
         u8              flags;
+        int             context_lost_counter;
 };
 
 
@@ -633,7 +637,7 @@ void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs);
 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs);
 int omap_hwmod_softreset(struct omap_hwmod *oh);
 
-int omap_hwmod_count_resources(struct omap_hwmod *oh);
+int omap_hwmod_count_resources(struct omap_hwmod *oh, unsigned long flags);
 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res);
 int omap_hwmod_fill_dma_resources(struct omap_hwmod *oh, struct resource *res);
 int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index a8b3368dca3d..b5efe58c0be0 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -15,8 +15,7 @@
 
 #include <linux/i2c-omap.h>
 #include <linux/platform_data/spi-omap2-mcspi.h>
-
-#include <plat-omap/dma-omap.h>
+#include <linux/omap-dma.h>
 #include <plat/dmtimer.h>
 
 #include "omap_hwmod.h"
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index dc768c50e523..6c8fa70ddadd 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -16,8 +16,7 @@
 #include <linux/i2c-omap.h>
 #include <linux/platform_data/asoc-ti-mcbsp.h>
 #include <linux/platform_data/spi-omap2-mcspi.h>
-
-#include <plat-omap/dma-omap.h>
+#include <linux/omap-dma.h>
 #include <plat/dmtimer.h>
 
 #include "omap_hwmod.h"
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
index 05c6a5906550..534974e08add 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
@@ -10,9 +10,8 @@
  * published by the Free Software Foundation.
  */
 
-#include <plat-omap/dma-omap.h>
-
-#include "../plat-omap/common.h"
+#include <linux/dmaengine.h>
+#include <linux/omap-dma.h>
 
 #include "omap_hwmod.h"
 #include "hdq1w.h"
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
index a0116d08cf45..e596117004d4 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
@@ -10,7 +10,7 @@
  */
 
 #include <linux/platform_data/gpio-omap.h>
-#include <plat-omap/dma-omap.h>
+#include <linux/omap-dma.h>
 #include <plat/dmtimer.h>
 #include <linux/platform_data/spi-omap2-mcspi.h>
 
@@ -58,8 +58,9 @@ static struct omap_hwmod_class_sysconfig omap2xxx_timer_sysc = {
         .syss_offs      = 0x0014,
         .sysc_flags     = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
                            SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
-                           SYSC_HAS_AUTOIDLE),
+                           SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
         .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+        .clockact       = CLOCKACT_TEST_ICLK,
         .sysc_fields    = &omap_hwmod_sysc_type1,
 };
 
@@ -268,6 +269,7 @@ struct omap_hwmod omap2xxx_timer1_hwmod = {
         },
         .dev_attr       = &capability_alwon_dev_attr,
         .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer2 */
@@ -286,6 +288,7 @@ struct omap_hwmod omap2xxx_timer2_hwmod = {
                 },
         },
         .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer3 */
@@ -304,6 +307,7 @@ struct omap_hwmod omap2xxx_timer3_hwmod = {
                 },
         },
         .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer4 */
@@ -322,6 +326,7 @@ struct omap_hwmod omap2xxx_timer4_hwmod = {
                 },
         },
         .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer5 */
@@ -341,6 +346,7 @@ struct omap_hwmod omap2xxx_timer5_hwmod = {
         },
         .dev_attr       = &capability_dsp_dev_attr,
         .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer6 */
@@ -360,6 +366,7 @@ struct omap_hwmod omap2xxx_timer6_hwmod = {
         },
         .dev_attr       = &capability_dsp_dev_attr,
         .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer7 */
@@ -379,6 +386,7 @@ struct omap_hwmod omap2xxx_timer7_hwmod = {
         },
         .dev_attr       = &capability_dsp_dev_attr,
         .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer8 */
@@ -398,6 +406,7 @@ struct omap_hwmod omap2xxx_timer8_hwmod = {
         },
         .dev_attr       = &capability_dsp_dev_attr,
         .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer9 */
@@ -417,6 +426,7 @@ struct omap_hwmod omap2xxx_timer9_hwmod = {
         },
         .dev_attr       = &capability_pwm_dev_attr,
         .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer10 */
@@ -436,6 +446,7 @@ struct omap_hwmod omap2xxx_timer10_hwmod = {
         },
         .dev_attr       = &capability_pwm_dev_attr,
         .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer11 */
@@ -455,6 +466,7 @@ struct omap_hwmod omap2xxx_timer11_hwmod = {
         },
         .dev_attr       = &capability_pwm_dev_attr,
         .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer12 */
@@ -474,6 +486,7 @@ struct omap_hwmod omap2xxx_timer12_hwmod = {
         },
         .dev_attr       = &capability_pwm_dev_attr,
         .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* wd_timer2 */
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index abe66ced903f..0f10919f227f 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -19,7 +19,7 @@
 #include <linux/power/smartreflex.h>
 #include <linux/platform_data/gpio-omap.h>
 
-#include <plat-omap/dma-omap.h>
+#include <linux/omap-dma.h>
 #include "l3_3xxx.h"
 #include "l4_3xxx.h"
 #include <linux/platform_data/asoc-ti-mcbsp.h>
@@ -153,29 +153,16 @@ static struct omap_hwmod omap3xxx_debugss_hwmod = {
 };
 
 /* timer class */
-static struct omap_hwmod_class_sysconfig omap3xxx_timer_1ms_sysc = {
-        .rev_offs       = 0x0000,
-        .sysc_offs      = 0x0010,
-        .syss_offs      = 0x0014,
-        .sysc_flags     = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
-                                SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
-                                SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE),
-        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
-        .sysc_fields    = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class omap3xxx_timer_1ms_hwmod_class = {
-        .name = "timer",
-        .sysc = &omap3xxx_timer_1ms_sysc,
-};
-
 static struct omap_hwmod_class_sysconfig omap3xxx_timer_sysc = {
         .rev_offs       = 0x0000,
         .sysc_offs      = 0x0010,
         .syss_offs      = 0x0014,
-        .sysc_flags     = (SYSC_HAS_SIDLEMODE | SYSC_HAS_ENAWAKEUP |
-                           SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
+        .sysc_flags     = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
+                           SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
+                           SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE |
+                           SYSS_HAS_RESET_STATUS),
         .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+        .clockact       = CLOCKACT_TEST_ICLK,
         .sysc_fields    = &omap_hwmod_sysc_type1,
 };
 
@@ -224,7 +211,8 @@ static struct omap_hwmod omap3xxx_timer1_hwmod = {
                 },
         },
         .dev_attr       = &capability_alwon_dev_attr,
-        .class          = &omap3xxx_timer_1ms_hwmod_class,
+        .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer2 */
@@ -241,7 +229,8 @@ static struct omap_hwmod omap3xxx_timer2_hwmod = {
                         .idlest_idle_bit = OMAP3430_ST_GPT2_SHIFT,
                 },
         },
-        .class          = &omap3xxx_timer_1ms_hwmod_class,
+        .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer3 */
@@ -259,6 +248,7 @@ static struct omap_hwmod omap3xxx_timer3_hwmod = {
                 },
         },
         .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer4 */
@@ -276,6 +266,7 @@ static struct omap_hwmod omap3xxx_timer4_hwmod = {
                 },
         },
         .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer5 */
@@ -294,6 +285,7 @@ static struct omap_hwmod omap3xxx_timer5_hwmod = {
         },
         .dev_attr       = &capability_dsp_dev_attr,
         .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer6 */
@@ -312,6 +304,7 @@ static struct omap_hwmod omap3xxx_timer6_hwmod = {
         },
         .dev_attr       = &capability_dsp_dev_attr,
         .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer7 */
@@ -330,6 +323,7 @@ static struct omap_hwmod omap3xxx_timer7_hwmod = {
         },
         .dev_attr       = &capability_dsp_dev_attr,
         .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer8 */
@@ -348,6 +342,7 @@ static struct omap_hwmod omap3xxx_timer8_hwmod = {
         },
         .dev_attr       = &capability_dsp_pwm_dev_attr,
         .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer9 */
@@ -366,6 +361,7 @@ static struct omap_hwmod omap3xxx_timer9_hwmod = {
         },
         .dev_attr       = &capability_pwm_dev_attr,
         .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer10 */
@@ -383,7 +379,8 @@ static struct omap_hwmod omap3xxx_timer10_hwmod = {
                 },
         },
         .dev_attr       = &capability_pwm_dev_attr,
-        .class          = &omap3xxx_timer_1ms_hwmod_class,
+        .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer11 */
@@ -402,6 +399,7 @@ static struct omap_hwmod omap3xxx_timer11_hwmod = {
         },
         .dev_attr       = &capability_pwm_dev_attr,
         .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer12 */
@@ -425,6 +423,7 @@ static struct omap_hwmod omap3xxx_timer12_hwmod = {
         },
         .dev_attr       = &capability_secure_dev_attr,
         .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /*
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index d6700d3ddd04..ce1661d18e56 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -24,15 +24,14 @@
 #include <linux/platform_data/omap_ocp2scp.h>
 #include <linux/i2c-omap.h>
 
-#include <plat-omap/dma-omap.h>
+#include <linux/omap-dma.h>
 
+#include <linux/platform_data/omap_ocp2scp.h>
 #include <linux/platform_data/spi-omap2-mcspi.h>
 #include <linux/platform_data/asoc-ti-mcbsp.h>
 #include <plat/dmtimer.h>
 #include <plat/iommu.h>
 
-#include "../plat-omap/common.h"
-
 #include "omap_hwmod.h"
 #include "omap_hwmod_common_data.h"
 #include "cm1_44xx.h"
@@ -3105,6 +3104,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_timer_1ms_sysc = {
                            SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
                            SYSS_HAS_RESET_STATUS),
         .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+        .clockact       = CLOCKACT_TEST_ICLK,
         .sysc_fields    = &omap_hwmod_sysc_type1,
 };
 
@@ -3158,6 +3158,7 @@ static struct omap_hwmod omap44xx_timer1_hwmod = {
         .name           = "timer1",
         .class          = &omap44xx_timer_1ms_hwmod_class,
         .clkdm_name     = "l4_wkup_clkdm",
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
         .mpu_irqs       = omap44xx_timer1_irqs,
         .main_clk       = "timer1_fck",
         .prcm = {
@@ -3180,6 +3181,7 @@ static struct omap_hwmod omap44xx_timer2_hwmod = {
         .name           = "timer2",
         .class          = &omap44xx_timer_1ms_hwmod_class,
         .clkdm_name     = "l4_per_clkdm",
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
         .mpu_irqs       = omap44xx_timer2_irqs,
         .main_clk       = "timer2_fck",
         .prcm = {
@@ -3354,6 +3356,7 @@ static struct omap_hwmod omap44xx_timer10_hwmod = {
         .name           = "timer10",
         .class          = &omap44xx_timer_1ms_hwmod_class,
         .clkdm_name     = "l4_per_clkdm",
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
         .mpu_irqs       = omap44xx_timer10_irqs,
         .main_clk       = "timer10_fck",
         .prcm = {
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 3cf4fdfd7ab0..e2c291f52f92 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -30,7 +30,6 @@
 #include "clock.h"
 #include "powerdomain.h"
 #include "clockdomain.h"
-#include <plat/dmtimer.h>
 #include "omap-pm.h"
 
 #include "soc.h"
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index 3d35bd64487c..c333fa6dffa8 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -31,14 +31,14 @@
 #include <linux/gpio.h>
 #include <linux/platform_data/gpio-omap.h>
 
+#include <asm/fncpy.h>
+
 #include <asm/mach/time.h>
 #include <asm/mach/irq.h>
 #include <asm/mach-types.h>
 #include <asm/system_misc.h>
 
-#include <plat-omap/dma-omap.h>
-
-#include "../plat-omap/sram.h"
+#include <linux/omap-dma.h>
 
 #include "soc.h"
 #include "common.h"
@@ -48,6 +48,7 @@
 #include "cm2xxx.h"
 #include "cm-regbits-24xx.h"
 #include "sdrc.h"
+#include "sram.h"
 #include "pm.h"
 #include "control.h"
 #include "powerdomain.h"
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index a9b8da1629bf..7be3622cfc85 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -28,19 +28,17 @@
 #include <linux/clk.h>
 #include <linux/delay.h>
 #include <linux/slab.h>
+#include <linux/omap-dma.h>
 #include <linux/platform_data/gpio-omap.h>
 
 #include <trace/events/power.h>
 
+#include <asm/fncpy.h>
 #include <asm/suspend.h>
 #include <asm/system_misc.h>
 
 #include "clockdomain.h"
 #include "powerdomain.h"
-#include <plat-omap/dma-omap.h>
-
-#include "../plat-omap/sram.h"
-
 #include "soc.h"
 #include "common.h"
 #include "cm3xxx.h"
@@ -50,6 +48,7 @@
 #include "prm3xxx.h"
 #include "pm.h"
 #include "sdrc.h"
+#include "sram.h"
 #include "control.h"
 
 /* pm34xx errata defined in pm.h */
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index a1a266ce90da..ac25ae6667cf 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -114,16 +114,25 @@ struct prm_reset_src_map {
 
 /**
  * struct prm_ll_data - fn ptrs to per-SoC PRM function implementations
- * @read_reset_sources: ptr to the Soc PRM-specific get_reset_source impl
+ * @read_reset_sources: ptr to the SoC PRM-specific get_reset_source impl
+ * @was_any_context_lost_old: ptr to the SoC PRM context loss test fn
+ * @clear_context_loss_flags_old: ptr to the SoC PRM context loss flag clear fn
+ *
+ * XXX @was_any_context_lost_old and @clear_context_loss_flags_old are
+ * deprecated.
  */
 struct prm_ll_data {
         u32 (*read_reset_sources)(void);
+        bool (*was_any_context_lost_old)(u8 part, s16 inst, u16 idx);
+        void (*clear_context_loss_flags_old)(u8 part, s16 inst, u16 idx);
 };
 
 extern int prm_register(struct prm_ll_data *pld);
 extern int prm_unregister(struct prm_ll_data *pld);
 
 extern u32 prm_read_reset_sources(void);
+extern bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx);
+extern void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx);
 
 #endif
 
diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c
index bf24fc47603b..faeab18696df 100644
--- a/arch/arm/mach-omap2/prm2xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx.c
@@ -118,14 +118,13 @@ static struct prm_ll_data omap2xxx_prm_ll_data = {
         .read_reset_sources = &omap2xxx_prm_read_reset_sources,
 };
 
-static int __init omap2xxx_prm_init(void)
+int __init omap2xxx_prm_init(void)
 {
         if (!cpu_is_omap24xx())
                 return 0;
 
         return prm_register(&omap2xxx_prm_ll_data);
 }
-subsys_initcall(omap2xxx_prm_init);
 
 static void __exit omap2xxx_prm_exit(void)
 {
diff --git a/arch/arm/mach-omap2/prm2xxx.h b/arch/arm/mach-omap2/prm2xxx.h
index fe8a14f190ab..3194dd87e0e4 100644
--- a/arch/arm/mach-omap2/prm2xxx.h
+++ b/arch/arm/mach-omap2/prm2xxx.h
@@ -126,8 +126,7 @@ extern int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm);
 
 extern void omap2xxx_prm_dpll_reset(void);
 
-extern int __init prm2xxx_init(void);
-extern int __exit prm2xxx_exit(void);
+extern int __init omap2xxx_prm_init(void);
 
 #endif
 
diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c
index 53ec9cbaa3d3..1ac73883f891 100644
--- a/arch/arm/mach-omap2/prm33xx.c
+++ b/arch/arm/mach-omap2/prm33xx.c
@@ -19,8 +19,6 @@
 #include <linux/err.h>
 #include <linux/io.h>
 
-#include "../plat-omap/common.h"
-
 #include "common.h"
 #include "powerdomain.h"
 #include "prm33xx.h"
diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c
index b86116cf0db9..db198d058584 100644
--- a/arch/arm/mach-omap2/prm3xxx.c
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@ -383,27 +383,30 @@ static struct prm_ll_data omap3xxx_prm_ll_data = {
         .read_reset_sources = &omap3xxx_prm_read_reset_sources,
 };
 
-static int __init omap3xxx_prm_init(void)
+int __init omap3xxx_prm_init(void)
+{
+        if (!cpu_is_omap34xx())
+                return 0;
+
+        return prm_register(&omap3xxx_prm_ll_data);
+}
+
+static int __init omap3xxx_prm_late_init(void)
 {
         int ret;
 
         if (!cpu_is_omap34xx())
                 return 0;
 
-        ret = prm_register(&omap3xxx_prm_ll_data);
-        if (ret)
-                return ret;
-
         omap3xxx_prm_enable_io_wakeup();
         ret = omap_prcm_register_chain_handler(&omap3_prcm_irq_setup);
         if (!ret)
                 irq_set_status_flags(omap_prcm_event_to_irq("io"),
                                      IRQ_NOAUTOEN);
 
-
         return ret;
 }
-subsys_initcall(omap3xxx_prm_init);
+subsys_initcall(omap3xxx_prm_late_init);
 
 static void __exit omap3xxx_prm_exit(void)
 {
diff --git a/arch/arm/mach-omap2/prm3xxx.h b/arch/arm/mach-omap2/prm3xxx.h
index 10cd41a8129e..277f71794e61 100644
--- a/arch/arm/mach-omap2/prm3xxx.h
+++ b/arch/arm/mach-omap2/prm3xxx.h
@@ -154,6 +154,7 @@ extern void omap3xxx_prm_restore_irqen(u32 *saved_mask);
 
 extern void omap3xxx_prm_dpll3_reset(void);
 
+extern int __init omap3xxx_prm_init(void);
 extern u32 omap3xxx_prm_get_reset_sources(void);
 
 #endif /* __ASSEMBLER */
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 6d3467af205d..7498bc77fe8b 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -346,6 +346,37 @@ static u32 omap44xx_prm_read_reset_sources(void)
         return r;
 }
 
+/**
+ * omap44xx_prm_was_any_context_lost_old - was module hardware context lost?
+ * @part: PRM partition ID (e.g., OMAP4430_PRM_PARTITION)
+ * @inst: PRM instance offset (e.g., OMAP4430_PRM_MPU_INST)
+ * @idx: CONTEXT register offset
+ *
+ * Return 1 if any bits were set in the *_CONTEXT_* register
+ * identified by (@part, @inst, @idx), which means that some context
+ * was lost for that module; otherwise, return 0.
+ */
+static bool omap44xx_prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx)
+{
+        return (omap4_prminst_read_inst_reg(part, inst, idx)) ? 1 : 0;
+}
+
+/**
+ * omap44xx_prm_clear_context_lost_flags_old - clear context loss flags
+ * @part: PRM partition ID (e.g., OMAP4430_PRM_PARTITION)
+ * @inst: PRM instance offset (e.g., OMAP4430_PRM_MPU_INST)
+ * @idx: CONTEXT register offset
+ *
+ * Clear hardware context loss bits for the module identified by
+ * (@part, @inst, @idx).  No return value.  XXX Writes to reserved bits;
+ * is there a way to avoid this?
+ */
+static void omap44xx_prm_clear_context_loss_flags_old(u8 part, s16 inst,
+                                                      u16 idx)
+{
+        omap4_prminst_write_inst_reg(0xffffffff, part, inst, idx);
+}
+
 /* Powerdomain low-level functions */
 
 static int omap4_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
@@ -613,24 +644,28 @@ struct pwrdm_ops omap4_pwrdm_operations = {
  */
 static struct prm_ll_data omap44xx_prm_ll_data = {
         .read_reset_sources = &omap44xx_prm_read_reset_sources,
+        .was_any_context_lost_old = &omap44xx_prm_was_any_context_lost_old,
+        .clear_context_loss_flags_old = &omap44xx_prm_clear_context_loss_flags_old,
 };
 
-static int __init omap44xx_prm_init(void)
+int __init omap44xx_prm_init(void)
 {
-        int ret;
-
         if (!cpu_is_omap44xx())
                 return 0;
 
-        ret = prm_register(&omap44xx_prm_ll_data);
-        if (ret)
-                return ret;
+        return prm_register(&omap44xx_prm_ll_data);
+}
+
+static int __init omap44xx_prm_late_init(void)
+{
+        if (!cpu_is_omap44xx())
+                return 0;
 
         omap44xx_prm_enable_io_wakeup();
 
         return omap_prcm_register_chain_handler(&omap4_prcm_irq_setup);
 }
-subsys_initcall(omap44xx_prm_init);
+subsys_initcall(omap44xx_prm_late_init);
 
 static void __exit omap44xx_prm_exit(void)
 {
diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h
index c8e1accdc90e..22b0979206ca 100644
--- a/arch/arm/mach-omap2/prm44xx.h
+++ b/arch/arm/mach-omap2/prm44xx.h
@@ -771,6 +771,7 @@ extern void omap44xx_prm_ocp_barrier(void);
 extern void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask);
 extern void omap44xx_prm_restore_irqen(u32 *saved_mask);
 
+extern int __init omap44xx_prm_init(void);
 extern u32 omap44xx_prm_get_reset_sources(void);
 
 # endif
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index d2e0798a4c82..228b850e632f 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -24,8 +24,6 @@
 #include <linux/interrupt.h>
 #include <linux/slab.h>
 
-#include "../plat-omap/common.h"
-
 #include "prm2xxx_3xxx.h"
 #include "prm2xxx.h"
 #include "prm3xxx.h"
@@ -367,6 +365,51 @@ u32 prm_read_reset_sources(void)
 }
 
 /**
+ * prm_was_any_context_lost_old - was device context lost? (old API)
+ * @part: PRM partition ID (e.g., OMAP4430_PRM_PARTITION)
+ * @inst: PRM instance offset (e.g., OMAP4430_PRM_MPU_INST)
+ * @idx: CONTEXT register offset
+ *
+ * Return 1 if any bits were set in the *_CONTEXT_* register
+ * identified by (@part, @inst, @idx), which means that some context
+ * was lost for that module; otherwise, return 0.  XXX Deprecated;
+ * callers need to use a less-SoC-dependent way to identify hardware
+ * IP blocks.
+ */
+bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx)
+{
+        bool ret = true;
+
+        if (prm_ll_data->was_any_context_lost_old)
+                ret = prm_ll_data->was_any_context_lost_old(part, inst, idx);
+        else
+                WARN_ONCE(1, "prm: %s: no mapping function defined\n",
+                          __func__);
+
+        return ret;
+}
+
+/**
+ * prm_clear_context_lost_flags_old - clear context loss flags (old API)
+ * @part: PRM partition ID (e.g., OMAP4430_PRM_PARTITION)
+ * @inst: PRM instance offset (e.g., OMAP4430_PRM_MPU_INST)
+ * @idx: CONTEXT register offset
+ *
+ * Clear hardware context loss bits for the module identified by
+ * (@part, @inst, @idx).  No return value.  XXX Deprecated; callers
+ * need to use a less-SoC-dependent way to identify hardware IP
+ * blocks.
+ */
+void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx)
+{
+        if (prm_ll_data->clear_context_loss_flags_old)
+                prm_ll_data->clear_context_loss_flags_old(part, inst, idx);
+        else
+                WARN_ONCE(1, "prm: %s: no mapping function defined\n",
+                          __func__);
+}
+
+/**
  * prm_register - register per-SoC low-level data with the PRM
  * @pld: low-level per-SoC OMAP PRM data & function pointers to register
  *
diff --git a/arch/arm/mach-omap2/sdrc.c b/arch/arm/mach-omap2/sdrc.c
index 3ed0d62333c5..dae7e4804a48 100644
--- a/arch/arm/mach-omap2/sdrc.c
+++ b/arch/arm/mach-omap2/sdrc.c
@@ -23,8 +23,6 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 
-#include "../plat-omap/sram.h"
-
 #include "common.h"
 #include "clock.h"
 #include "sdrc.h"
diff --git a/arch/arm/mach-omap2/sdrc2xxx.c b/arch/arm/mach-omap2/sdrc2xxx.c
index 26c1728e09ca..907291714643 100644
--- a/arch/arm/mach-omap2/sdrc2xxx.c
+++ b/arch/arm/mach-omap2/sdrc2xxx.c
@@ -24,14 +24,13 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 
-#include "../plat-omap/sram.h"
-
 #include "soc.h"
 #include "iomap.h"
 #include "common.h"
 #include "prm2xxx.h"
 #include "clock.h"
 #include "sdrc.h"
+#include "sram.h"
 
 /* Memory timing, DLL mode flags */
 #define M_DDR           1
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index aa30a3c20883..93d102535c85 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -26,9 +26,9 @@
 #include <linux/slab.h>
 #include <linux/pm_runtime.h>
 #include <linux/console.h>
+#include <linux/omap-dma.h>
 
 #include <plat/omap-serial.h>
-#include <plat-omap/dma-omap.h>
 
 #include "common.h"
 #include "omap_hwmod.h"
diff --git a/arch/arm/mach-omap2/serial.h b/arch/arm/mach-omap2/serial.h
index 6a6806271fcf..c4014f013df0 100644
--- a/arch/arm/mach-omap2/serial.h
+++ b/arch/arm/mach-omap2/serial.h
@@ -1,112 +1 @@
-/*
- * arch/arm/plat-omap/include/mach/serial.h
- *
- * Copyright (C) 2009 Texas Instruments
- * Added OMAP4 support- Santosh Shilimkar <santosh.shilimkar@ti.com>
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __ASM_ARCH_SERIAL_H
-#define __ASM_ARCH_SERIAL_H
-
-#include <linux/init.h>
-
-/*
- * Memory entry used for the DEBUG_LL UART configuration, relative to
- * start of RAM. See also uncompress.h and debug-macro.S.
- *
- * Note that using a memory location for storing the UART configuration
- * has at least two limitations:
- *
- * 1. Kernel uncompress code cannot overlap OMAP_UART_INFO as the
- *    uncompress code could then partially overwrite itself
- * 2. We assume printascii is called at least once before paging_init,
- *    and addruart has a chance to read OMAP_UART_INFO
- */
-#define OMAP_UART_INFO_OFS      0x3ffc
-
-/* OMAP2 serial ports */
-#define OMAP2_UART1_BASE        0x4806a000
-#define OMAP2_UART2_BASE        0x4806c000
-#define OMAP2_UART3_BASE        0x4806e000
-
-/* OMAP3 serial ports */
-#define OMAP3_UART1_BASE        OMAP2_UART1_BASE
-#define OMAP3_UART2_BASE        OMAP2_UART2_BASE
-#define OMAP3_UART3_BASE        0x49020000
-#define OMAP3_UART4_BASE        0x49042000      /* Only on 36xx */
-#define OMAP3_UART4_AM35XX_BASE 0x4809E000      /* Only on AM35xx */
-
-/* OMAP4 serial ports */
-#define OMAP4_UART1_BASE        OMAP2_UART1_BASE
-#define OMAP4_UART2_BASE        OMAP2_UART2_BASE
-#define OMAP4_UART3_BASE        0x48020000
-#define OMAP4_UART4_BASE        0x4806e000
-
-/* TI81XX serial ports */
-#define TI81XX_UART1_BASE       0x48020000
-#define TI81XX_UART2_BASE       0x48022000
-#define TI81XX_UART3_BASE       0x48024000
-
-/* AM3505/3517 UART4 */
-#define AM35XX_UART4_BASE       0x4809E000      /* Only on AM3505/3517 */
-
-/* AM33XX serial port */
-#define AM33XX_UART1_BASE       0x44E09000
-
-/* OMAP5 serial ports */
-#define OMAP5_UART1_BASE        OMAP2_UART1_BASE
-#define OMAP5_UART2_BASE        OMAP2_UART2_BASE
-#define OMAP5_UART3_BASE        OMAP4_UART3_BASE
-#define OMAP5_UART4_BASE        OMAP4_UART4_BASE
-#define OMAP5_UART5_BASE        0x48066000
-#define OMAP5_UART6_BASE        0x48068000
-
-/* External port on Zoom2/3 */
-#define ZOOM_UART_BASE          0x10000000
-#define ZOOM_UART_VIRT          0xfa400000
-
-#define OMAP_PORT_SHIFT         2
-#define ZOOM_PORT_SHIFT         1
-
-#define OMAP24XX_BASE_BAUD      (48000000/16)
-
-/*
- * DEBUG_LL port encoding stored into the UART1 scratchpad register by
- * decomp_setup in uncompress.h
- */
-#define OMAP2UART1              21
-#define OMAP2UART2              22
-#define OMAP2UART3              23
-#define OMAP3UART1              OMAP2UART1
-#define OMAP3UART2              OMAP2UART2
-#define OMAP3UART3              33
-#define OMAP3UART4              34              /* Only on 36xx */
-#define OMAP4UART1              OMAP2UART1
-#define OMAP4UART2              OMAP2UART2
-#define OMAP4UART3              43
-#define OMAP4UART4              44
-#define TI81XXUART1             81
-#define TI81XXUART2             82
-#define TI81XXUART3             83
-#define AM33XXUART1             84
-#define OMAP5UART3              OMAP4UART3
-#define OMAP5UART4              OMAP4UART4
-#define ZOOM_UART               95              /* Only on zoom2/3 */
-
-#ifndef __ASSEMBLER__
-
-struct omap_board_data;
-struct omap_uart_port_info;
-
-extern void omap_serial_init(void);
-extern void omap_serial_board_init(struct omap_uart_port_info *platform_data);
-extern void omap_serial_init_port(struct omap_board_data *bdata,
-                struct omap_uart_port_info *platform_data);
-#endif
-
-#endif
+#include <mach/serial.h>
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index 474dba7263e3..d1dedc8195ed 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -26,13 +26,12 @@
 
 #include <asm/assembler.h>
 
-#include "../plat-omap/sram.h"
-
 #include "omap34xx.h"
 #include "iomap.h"
 #include "cm3xxx.h"
 #include "prm3xxx.h"
 #include "sdrc.h"
+#include "sram.h"
 #include "control.h"
 
 /*
diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h
index 070096496e20..f31d90774de0 100644
--- a/arch/arm/mach-omap2/soc.h
+++ b/arch/arm/mach-omap2/soc.h
@@ -435,9 +435,7 @@ extern u32 omap_features;
 #define OMAP3_HAS_IO_WAKEUP             BIT(6)
 #define OMAP3_HAS_SDRC                  BIT(7)
 #define OMAP3_HAS_IO_CHAIN_CTRL         BIT(8)
-#define OMAP4_HAS_MPU_1GHZ              BIT(9)
-#define OMAP4_HAS_MPU_1_2GHZ            BIT(10)
-#define OMAP4_HAS_MPU_1_5GHZ            BIT(11)
+#define OMAP4_HAS_PERF_SILICON          BIT(9)
 
 
 #define OMAP3_HAS_FEATURE(feat,flag)                    \
@@ -465,9 +463,7 @@ static inline unsigned int omap4_has_ ##feat(void)	\
         return omap_features & OMAP4_HAS_ ##flag;       \
 }                                                       \
 
-OMAP4_HAS_FEATURE(mpu_1ghz, MPU_1GHZ)
-OMAP4_HAS_FEATURE(mpu_1_2ghz, MPU_1_2GHZ)
-OMAP4_HAS_FEATURE(mpu_1_5ghz, MPU_1_5GHZ)
+OMAP4_HAS_FEATURE(perf_silicon, PERF_SILICON)
 
 #endif  /* __ASSEMBLY__ */
 
diff --git a/arch/arm/mach-omap2/sram.c b/arch/arm/mach-omap2/sram.c
new file mode 100644
index 000000000000..0ff0f068bea8
--- /dev/null
+++ b/arch/arm/mach-omap2/sram.c
@@ -0,0 +1,305 @@
+/*
+ *
+ * OMAP SRAM detection and management
+ *
+ * Copyright (C) 2005 Nokia Corporation
+ * Written by Tony Lindgren <tony@atomide.com>
+ *
+ * Copyright (C) 2009-2012 Texas Instruments
+ * Added OMAP4/5 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+
+#include <asm/fncpy.h>
+#include <asm/tlb.h>
+#include <asm/cacheflush.h>
+
+#include <asm/mach/map.h>
+
+#include "soc.h"
+#include "iomap.h"
+#include "prm2xxx_3xxx.h"
+#include "sdrc.h"
+#include "sram.h"
+
+#define OMAP2_SRAM_PUB_PA       (OMAP2_SRAM_PA + 0xf800)
+#define OMAP3_SRAM_PUB_PA       (OMAP3_SRAM_PA + 0x8000)
+#ifdef CONFIG_OMAP4_ERRATA_I688
+#define OMAP4_SRAM_PUB_PA       OMAP4_SRAM_PA
+#else
+#define OMAP4_SRAM_PUB_PA       (OMAP4_SRAM_PA + 0x4000)
+#endif
+#define OMAP5_SRAM_PA           0x40300000
+
+#define SRAM_BOOTLOADER_SZ      0x00
+
+#define OMAP24XX_VA_REQINFOPERM0        OMAP2_L3_IO_ADDRESS(0x68005048)
+#define OMAP24XX_VA_READPERM0           OMAP2_L3_IO_ADDRESS(0x68005050)
+#define OMAP24XX_VA_WRITEPERM0          OMAP2_L3_IO_ADDRESS(0x68005058)
+
+#define OMAP34XX_VA_REQINFOPERM0        OMAP2_L3_IO_ADDRESS(0x68012848)
+#define OMAP34XX_VA_READPERM0           OMAP2_L3_IO_ADDRESS(0x68012850)
+#define OMAP34XX_VA_WRITEPERM0          OMAP2_L3_IO_ADDRESS(0x68012858)
+#define OMAP34XX_VA_ADDR_MATCH2         OMAP2_L3_IO_ADDRESS(0x68012880)
+#define OMAP34XX_VA_SMS_RG_ATT0         OMAP2_L3_IO_ADDRESS(0x6C000048)
+
+#define GP_DEVICE               0x300
+
+#define ROUND_DOWN(value,boundary)      ((value) & (~((boundary)-1)))
+
+static unsigned long omap_sram_start;
+static unsigned long omap_sram_skip;
+static unsigned long omap_sram_size;
+
+/*
+ * Depending on the target RAMFS firewall setup, the public usable amount of
+ * SRAM varies.  The default accessible size for all device types is 2k. A GP
+ * device allows ARM11 but not other initiators for full size. This
+ * functionality seems ok until some nice security API happens.
+ */
+static int is_sram_locked(void)
+{
+        if (OMAP2_DEVICE_TYPE_GP == omap_type()) {
+                /* RAMFW: R/W access to all initiators for all qualifier sets */
+                if (cpu_is_omap242x()) {
+                        __raw_writel(0xFF, OMAP24XX_VA_REQINFOPERM0); /* all q-vects */
+                        __raw_writel(0xCFDE, OMAP24XX_VA_READPERM0);  /* all i-read */
+                        __raw_writel(0xCFDE, OMAP24XX_VA_WRITEPERM0); /* all i-write */
+                }
+                if (cpu_is_omap34xx()) {
+                        __raw_writel(0xFFFF, OMAP34XX_VA_REQINFOPERM0); /* all q-vects */
+                        __raw_writel(0xFFFF, OMAP34XX_VA_READPERM0);  /* all i-read */
+                        __raw_writel(0xFFFF, OMAP34XX_VA_WRITEPERM0); /* all i-write */
+                        __raw_writel(0x0, OMAP34XX_VA_ADDR_MATCH2);
+                        __raw_writel(0xFFFFFFFF, OMAP34XX_VA_SMS_RG_ATT0);
+                }
+                return 0;
+        } else
+                return 1; /* assume locked with no PPA or security driver */
+}
+
+/*
+ * The amount of SRAM depends on the core type.
+ * Note that we cannot try to test for SRAM here because writes
+ * to secure SRAM will hang the system. Also the SRAM is not
+ * yet mapped at this point.
+ */
+static void __init omap_detect_sram(void)
+{
+        omap_sram_skip = SRAM_BOOTLOADER_SZ;
+        if (is_sram_locked()) {
+                if (cpu_is_omap34xx()) {
+                        omap_sram_start = OMAP3_SRAM_PUB_PA;
+                        if ((omap_type() == OMAP2_DEVICE_TYPE_EMU) ||
+                            (omap_type() == OMAP2_DEVICE_TYPE_SEC)) {
+                                omap_sram_size = 0x7000; /* 28K */
+                                omap_sram_skip += SZ_16K;
+                        } else {
+                                omap_sram_size = 0x8000; /* 32K */
+                        }
+                } else if (cpu_is_omap44xx()) {
+                        omap_sram_start = OMAP4_SRAM_PUB_PA;
+                        omap_sram_size = 0xa000; /* 40K */
+                } else if (soc_is_omap54xx()) {
+                        omap_sram_start = OMAP5_SRAM_PA;
+                        omap_sram_size = SZ_128K; /* 128KB */
+                } else {
+                        omap_sram_start = OMAP2_SRAM_PUB_PA;
+                        omap_sram_size = 0x800; /* 2K */
+                }
+        } else {
+                if (soc_is_am33xx()) {
+                        omap_sram_start = AM33XX_SRAM_PA;
+                        omap_sram_size = 0x10000; /* 64K */
+                } else if (cpu_is_omap34xx()) {
+                        omap_sram_start = OMAP3_SRAM_PA;
+                        omap_sram_size = 0x10000; /* 64K */
+                } else if (cpu_is_omap44xx()) {
+                        omap_sram_start = OMAP4_SRAM_PA;
+                        omap_sram_size = 0xe000; /* 56K */
+                } else if (soc_is_omap54xx()) {
+                        omap_sram_start = OMAP5_SRAM_PA;
+                        omap_sram_size = SZ_128K; /* 128KB */
+                } else {
+                        omap_sram_start = OMAP2_SRAM_PA;
+                        if (cpu_is_omap242x())
+                                omap_sram_size = 0xa0000; /* 640K */
+                        else if (cpu_is_omap243x())
+                                omap_sram_size = 0x10000; /* 64K */
+                }
+        }
+}
+
+/*
+ * Note that we cannot use ioremap for SRAM, as clock init needs SRAM early.
+ */
+static void __init omap2_map_sram(void)
+{
+        int cached = 1;
+
+#ifdef CONFIG_OMAP4_ERRATA_I688
+        if (cpu_is_omap44xx()) {
+                omap_sram_start += PAGE_SIZE;
+                omap_sram_size -= SZ_16K;
+        }
+#endif
+        if (cpu_is_omap34xx()) {
+                /*
+                 * SRAM must be marked as non-cached on OMAP3 since the
+                 * CORE DPLL M2 divider change code (in SRAM) runs with the
+                 * SDRAM controller disabled, and if it is marked cached,
+                 * the ARM may attempt to write cache lines back to SDRAM
+                 * which will cause the system to hang.
+                 */
+                cached = 0;
+        }
+
+        omap_map_sram(omap_sram_start, omap_sram_size,
+                        omap_sram_skip, cached);
+}
+
+static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
+                              u32 base_cs, u32 force_unlock);
+
+void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
+                   u32 base_cs, u32 force_unlock)
+{
+        BUG_ON(!_omap2_sram_ddr_init);
+        _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl,
+                             base_cs, force_unlock);
+}
+
+static void (*_omap2_sram_reprogram_sdrc)(u32 perf_level, u32 dll_val,
+                                          u32 mem_type);
+
+void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type)
+{
+        BUG_ON(!_omap2_sram_reprogram_sdrc);
+        _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type);
+}
+
+static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
+
+u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass)
+{
+        BUG_ON(!_omap2_set_prcm);
+        return _omap2_set_prcm(dpll_ctrl_val, sdrc_rfr_val, bypass);
+}
+
+#ifdef CONFIG_SOC_OMAP2420
+static int __init omap242x_sram_init(void)
+{
+        _omap2_sram_ddr_init = omap_sram_push(omap242x_sram_ddr_init,
+                                        omap242x_sram_ddr_init_sz);
+
+        _omap2_sram_reprogram_sdrc = omap_sram_push(omap242x_sram_reprogram_sdrc,
+                                            omap242x_sram_reprogram_sdrc_sz);
+
+        _omap2_set_prcm = omap_sram_push(omap242x_sram_set_prcm,
+                                         omap242x_sram_set_prcm_sz);
+
+        return 0;
+}
+#else
+static inline int omap242x_sram_init(void)
+{
+        return 0;
+}
+#endif
+
+#ifdef CONFIG_SOC_OMAP2430
+static int __init omap243x_sram_init(void)
+{
+        _omap2_sram_ddr_init = omap_sram_push(omap243x_sram_ddr_init,
+                                        omap243x_sram_ddr_init_sz);
+
+        _omap2_sram_reprogram_sdrc = omap_sram_push(omap243x_sram_reprogram_sdrc,
+                                            omap243x_sram_reprogram_sdrc_sz);
+
+        _omap2_set_prcm = omap_sram_push(omap243x_sram_set_prcm,
+                                         omap243x_sram_set_prcm_sz);
+
+        return 0;
+}
+#else
+static inline int omap243x_sram_init(void)
+{
+        return 0;
+}
+#endif
+
+#ifdef CONFIG_ARCH_OMAP3
+
+static u32 (*_omap3_sram_configure_core_dpll)(
+                        u32 m2, u32 unlock_dll, u32 f, u32 inc,
+                        u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
+                        u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
+                        u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
+                        u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1);
+
+u32 omap3_configure_core_dpll(u32 m2, u32 unlock_dll, u32 f, u32 inc,
+                        u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
+                        u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
+                        u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
+                        u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1)
+{
+        BUG_ON(!_omap3_sram_configure_core_dpll);
+        return _omap3_sram_configure_core_dpll(
+                        m2, unlock_dll, f, inc,
+                        sdrc_rfr_ctrl_0, sdrc_actim_ctrl_a_0,
+                        sdrc_actim_ctrl_b_0, sdrc_mr_0,
+                        sdrc_rfr_ctrl_1, sdrc_actim_ctrl_a_1,
+                        sdrc_actim_ctrl_b_1, sdrc_mr_1);
+}
+
+void omap3_sram_restore_context(void)
+{
+        omap_sram_reset();
+
+        _omap3_sram_configure_core_dpll =
+                omap_sram_push(omap3_sram_configure_core_dpll,
+                               omap3_sram_configure_core_dpll_sz);
+        omap_push_sram_idle();
+}
+
+static inline int omap34xx_sram_init(void)
+{
+        omap3_sram_restore_context();
+        return 0;
+}
+#else
+static inline int omap34xx_sram_init(void)
+{
+        return 0;
+}
+#endif /* CONFIG_ARCH_OMAP3 */
+
+static inline int am33xx_sram_init(void)
+{
+        return 0;
+}
+
+int __init omap_sram_init(void)
+{
+        omap_detect_sram();
+        omap2_map_sram();
+
+        if (cpu_is_omap242x())
+                omap242x_sram_init();
+        else if (cpu_is_omap2430())
+                omap243x_sram_init();
+        else if (soc_is_am33xx())
+                am33xx_sram_init();
+        else if (cpu_is_omap34xx())
+                omap34xx_sram_init();
+
+        return 0;
+}
diff --git a/arch/arm/plat-omap/sram.h b/arch/arm/mach-omap2/sram.h
index cefda2e09869..ca7277c2a9ee 100644
--- a/arch/arm/plat-omap/sram.h
+++ b/arch/arm/mach-omap2/sram.h
@@ -1,6 +1,4 @@
 /*
- * arch/arm/plat-omap/include/mach/sram.h
- *
  * Interface for functions that need to be run in internal SRAM
  *
  * This program is free software; you can redistribute it and/or modify
@@ -8,26 +6,8 @@
  * published by the Free Software Foundation.
  */
 
-#ifndef __ARCH_ARM_OMAP_SRAM_H
-#define __ARCH_ARM_OMAP_SRAM_H
-
 #ifndef __ASSEMBLY__
-#include <asm/fncpy.h>
-
-int __init omap_sram_init(void);
-
-extern void *omap_sram_push_address(unsigned long size);
-
-/* Macro to push a function to the internal SRAM, using the fncpy API */
-#define omap_sram_push(funcp, size) ({                          \
-        typeof(&(funcp)) _res = NULL;                           \
-        void *_sram_address = omap_sram_push_address(size);     \
-        if (_sram_address)                                      \
-                _res = fncpy(_sram_address, &(funcp), size);    \
-        _res;                                                   \
-})
-
-extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl);
+#include <plat/sram.h>
 
 extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
                                 u32 base_cs, u32 force_unlock);
@@ -44,9 +24,6 @@ extern u32 omap3_configure_core_dpll(
 extern void omap3_sram_restore_context(void);
 
 /* Do not use these */
-extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
-extern unsigned long omap1_sram_reprogram_clock_sz;
-
 extern void omap24xx_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
 extern unsigned long omap24xx_sram_reprogram_clock_sz;
 
@@ -104,4 +81,3 @@ static inline void omap_push_sram_idle(void) {}
 #define OMAP4_SRAM_PA           0x40300000
 #endif
 #define AM33XX_SRAM_PA          0x40300000
-#endif
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 565e5755c9bc..b9cff72ceaec 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -37,6 +37,10 @@
 #include <linux/clockchips.h>
 #include <linux/slab.h>
 #include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/dmtimer-omap.h>
 
 #include <asm/mach/time.h>
 #include <asm/smp_twd.h>
@@ -45,6 +49,7 @@
 #include <asm/arch_timer.h>
 #include "omap_hwmod.h"
 #include "omap_device.h"
+#include <plat/counter-32k.h>
 #include <plat/dmtimer.h>
 #include "omap-pm.h"
 
@@ -61,18 +66,6 @@
 #define OMAP3_32K_SOURCE        "omap_32k_fck"
 #define OMAP4_32K_SOURCE        "sys_32k_ck"
 
-#ifdef CONFIG_OMAP_32K_TIMER
-#define OMAP2_CLKEV_SOURCE      OMAP2_32K_SOURCE
-#define OMAP3_CLKEV_SOURCE      OMAP3_32K_SOURCE
-#define OMAP4_CLKEV_SOURCE      OMAP4_32K_SOURCE
-#define OMAP3_SECURE_TIMER      12
-#else
-#define OMAP2_CLKEV_SOURCE      OMAP2_MPU_SOURCE
-#define OMAP3_CLKEV_SOURCE      OMAP3_MPU_SOURCE
-#define OMAP4_CLKEV_SOURCE      OMAP4_MPU_SOURCE
-#define OMAP3_SECURE_TIMER      1
-#endif
-
 #define REALTIME_COUNTER_BASE                           0x48243200
 #define INCREMENTER_NUMERATOR_OFFSET                    0x10
 #define INCREMENTER_DENUMERATOR_RELOAD_OFFSET           0x14
@@ -103,7 +96,7 @@ static int omap2_gp_timer_set_next_event(unsigned long cycles,
                                          struct clock_event_device *evt)
 {
         __omap_dm_timer_load_start(&clkev, OMAP_TIMER_CTRL_ST,
-                                                0xffffffff - cycles, 1);
+                                   0xffffffff - cycles, OMAP_TIMER_POSTED);
 
         return 0;
 }
@@ -113,7 +106,7 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
 {
         u32 period;
 
-        __omap_dm_timer_stop(&clkev, 1, clkev.rate);
+        __omap_dm_timer_stop(&clkev, OMAP_TIMER_POSTED, clkev.rate);
 
         switch (mode) {
         case CLOCK_EVT_MODE_PERIODIC:
@@ -121,10 +114,10 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
                 period -= 1;
                 /* Looks like we need to first set the load value separately */
                 __omap_dm_timer_write(&clkev, OMAP_TIMER_LOAD_REG,
-                                        0xffffffff - period, 1);
+                                      0xffffffff - period, OMAP_TIMER_POSTED);
                 __omap_dm_timer_load_start(&clkev,
                                         OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST,
-                                                0xffffffff - period, 1);
+                                        0xffffffff - period, OMAP_TIMER_POSTED);
                 break;
         case CLOCK_EVT_MODE_ONESHOT:
                 break;
@@ -144,36 +137,144 @@ static struct clock_event_device clockevent_gpt = {
         .set_mode       = omap2_gp_timer_set_mode,
 };
 
+static struct property device_disabled = {
+        .name = "status",
+        .length = sizeof("disabled"),
+        .value = "disabled",
+};
+
+static struct of_device_id omap_timer_match[] __initdata = {
+        { .compatible = "ti,omap2-timer", },
+        { }
+};
+
+/**
+ * omap_get_timer_dt - get a timer using device-tree
+ * @match       - device-tree match structure for matching a device type
+ * @property    - optional timer property to match
+ *
+ * Helper function to get a timer during early boot using device-tree for use
+ * as kernel system timer. Optionally, the property argument can be used to
+ * select a timer with a specific property. Once a timer is found then mark
+ * the timer node in device-tree as disabled, to prevent the kernel from
+ * registering this timer as a platform device and so no one else can use it.
+ */
+static struct device_node * __init omap_get_timer_dt(struct of_device_id *match,
+                                                     const char *property)
+{
+        struct device_node *np;
+
+        for_each_matching_node(np, match) {
+                if (!of_device_is_available(np)) {
+                        of_node_put(np);
+                        continue;
+                }
+
+                if (property && !of_get_property(np, property, NULL)) {
+                        of_node_put(np);
+                        continue;
+                }
+
+                prom_add_property(np, &device_disabled);
+                return np;
+        }
+
+        return NULL;
+}
+
+/**
+ * omap_dmtimer_init - initialisation function when device tree is used
+ *
+ * For secure OMAP3 devices, timers with device type "timer-secure" cannot
+ * be used by the kernel as they are reserved. Therefore, to prevent the
+ * kernel registering these devices remove them dynamically from the device
+ * tree on boot.
+ */
+void __init omap_dmtimer_init(void)
+{
+        struct device_node *np;
+
+        if (!cpu_is_omap34xx())
+                return;
+
+        /* If we are a secure device, remove any secure timer nodes */
+        if ((omap_type() != OMAP2_DEVICE_TYPE_GP)) {
+                np = omap_get_timer_dt(omap_timer_match, "ti,timer-secure");
+                if (np)
+                        of_node_put(np);
+        }
+}
+
+/**
+ * omap_dm_timer_get_errata - get errata flags for a timer
+ *
+ * Get the timer errata flags that are specific to the OMAP device being used.
+ */
+u32 __init omap_dm_timer_get_errata(void)
+{
+        if (cpu_is_omap24xx())
+                return 0;
+
+        return OMAP_TIMER_ERRATA_I103_I767;
+}
+
 static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
                                                 int gptimer_id,
-                                                const char *fck_source)
+                                                const char *fck_source,
+                                                const char *property,
+                                                int posted)
 {
         char name[10]; /* 10 = sizeof("gptXX_Xck0") */
+        const char *oh_name;
+        struct device_node *np;
         struct omap_hwmod *oh;
-        struct resource irq_rsrc, mem_rsrc;
-        size_t size;
-        int res = 0;
-        int r;
-
-        sprintf(name, "timer%d", gptimer_id);
-        omap_hwmod_setup_one(name);
-        oh = omap_hwmod_lookup(name);
+        struct resource irq, mem;
+        int r = 0;
+
+        if (of_have_populated_dt()) {
+                np = omap_get_timer_dt(omap_timer_match, NULL);
+                if (!np)
+                        return -ENODEV;
+
+                of_property_read_string_index(np, "ti,hwmods", 0, &oh_name);
+                if (!oh_name)
+                        return -ENODEV;
+
+                timer->irq = irq_of_parse_and_map(np, 0);
+                if (!timer->irq)
+                        return -ENXIO;
+
+                timer->io_base = of_iomap(np, 0);
+
+                of_node_put(np);
+        } else {
+                if (omap_dm_timer_reserve_systimer(gptimer_id))
+                        return -ENODEV;
+
+                sprintf(name, "timer%d", gptimer_id);
+                oh_name = name;
+        }
+
+        oh = omap_hwmod_lookup(oh_name);
         if (!oh)
                 return -ENODEV;
 
-        r = omap_hwmod_get_resource_byname(oh, IORESOURCE_IRQ, NULL, &irq_rsrc);
-        if (r)
-                return -ENXIO;
-        timer->irq = irq_rsrc.start;
+        if (!of_have_populated_dt()) {
+                r = omap_hwmod_get_resource_byname(oh, IORESOURCE_IRQ, NULL,
+                                                   &irq);
+                if (r)
+                        return -ENXIO;
+                timer->irq = irq.start;
 
-        r = omap_hwmod_get_resource_byname(oh, IORESOURCE_MEM, NULL, &mem_rsrc);
-        if (r)
-                return -ENXIO;
-        timer->phys_base = mem_rsrc.start;
-        size = mem_rsrc.end - mem_rsrc.start;
+                r = omap_hwmod_get_resource_byname(oh, IORESOURCE_MEM, NULL,
+                                                   &mem);
+                if (r)
+                        return -ENXIO;
+
+                /* Static mapping, never released */
+                timer->io_base = ioremap(mem.start, mem.end - mem.start);
+        }
 
-        /* Static mapping, never released */
-        timer->io_base = ioremap(timer->phys_base, size);
         if (!timer->io_base)
                 return -ENXIO;
 
@@ -182,42 +283,56 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
         if (IS_ERR(timer->fclk))
                 return -ENODEV;
 
-        omap_hwmod_enable(oh);
-
-        if (omap_dm_timer_reserve_systimer(gptimer_id))
-                return -ENODEV;
-
+        /* FIXME: Need to remove hard-coded test on timer ID */
         if (gptimer_id != 12) {
                 struct clk *src;
 
                 src = clk_get(NULL, fck_source);
                 if (IS_ERR(src)) {
-                        res = -EINVAL;
+                        r = -EINVAL;
                 } else {
-                        res = __omap_dm_timer_set_source(timer->fclk, src);
-                        if (IS_ERR_VALUE(res))
-                                pr_warning("%s: timer%i cannot set source\n",
-                                                __func__, gptimer_id);
+                        r = clk_set_parent(timer->fclk, src);
+                        if (IS_ERR_VALUE(r))
+                                pr_warn("%s: %s cannot set source\n",
+                                        __func__, oh->name);
                         clk_put(src);
                 }
         }
+
+        omap_hwmod_setup_one(oh_name);
+        omap_hwmod_enable(oh);
         __omap_dm_timer_init_regs(timer);
-        __omap_dm_timer_reset(timer, 1, 1);
-        timer->posted = 1;
 
-        timer->rate = clk_get_rate(timer->fclk);
+        if (posted)
+                __omap_dm_timer_enable_posted(timer);
+
+        /* Check that the intended posted configuration matches the actual */
+        if (posted != timer->posted)
+                return -EINVAL;
 
+        timer->rate = clk_get_rate(timer->fclk);
         timer->reserved = 1;
 
-        return res;
+        return r;
 }
 
 static void __init omap2_gp_clockevent_init(int gptimer_id,
-                                                const char *fck_source)
+                                                const char *fck_source,
+                                                const char *property)
 {
         int res;
 
-        res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source);
+        clkev.errata = omap_dm_timer_get_errata();
+
+        /*
+         * For clock-event timers we never read the timer counter and
+         * so we are not impacted by errata i103 and i767. Therefore,
+         * we can safely ignore this errata for clock-event timers.
+         */
+        __omap_dm_timer_override_errata(&clkev, OMAP_TIMER_ERRATA_I103_I767);
+
+        res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source, property,
+                                     OMAP_TIMER_POSTED);
         BUG_ON(res);
 
         omap2_gp_timer_irq.dev_id = &clkev;
@@ -250,7 +365,8 @@ static bool use_gptimer_clksrc;
  */
 static cycle_t clocksource_read_cycles(struct clocksource *cs)
 {
-        return (cycle_t)__omap_dm_timer_read_counter(&clksrc, 1);
+        return (cycle_t)__omap_dm_timer_read_counter(&clksrc,
+                                                     OMAP_TIMER_NONPOSTED);
 }
 
 static struct clocksource clocksource_gpt = {
@@ -264,21 +380,41 @@ static struct clocksource clocksource_gpt = {
 static u32 notrace dmtimer_read_sched_clock(void)
 {
         if (clksrc.reserved)
-                return __omap_dm_timer_read_counter(&clksrc, 1);
+                return __omap_dm_timer_read_counter(&clksrc,
+                                                    OMAP_TIMER_NONPOSTED);
 
         return 0;
 }
 
-#ifdef CONFIG_OMAP_32K_TIMER
+static struct of_device_id omap_counter_match[] __initdata = {
+        { .compatible = "ti,omap-counter32k", },
+        { }
+};
+
 /* Setup free-running counter for clocksource */
 static int __init omap2_sync32k_clocksource_init(void)
 {
         int ret;
+        struct device_node *np = NULL;
         struct omap_hwmod *oh;
         void __iomem *vbase;
         const char *oh_name = "counter_32k";
 
         /*
+         * If device-tree is present, then search the DT blob
+         * to see if the 32kHz counter is supported.
+         */
+        if (of_have_populated_dt()) {
+                np = omap_get_timer_dt(omap_counter_match, NULL);
+                if (!np)
+                        return -ENODEV;
+
+                of_property_read_string_index(np, "ti,hwmods", 0, &oh_name);
+                if (!oh_name)
+                        return -ENODEV;
+        }
+
+        /*
          * First check hwmod data is available for sync32k counter
          */
         oh = omap_hwmod_lookup(oh_name);
@@ -287,7 +423,13 @@ static int __init omap2_sync32k_clocksource_init(void)
 
         omap_hwmod_setup_one(oh_name);
 
-        vbase = omap_hwmod_get_mpu_rt_va(oh);
+        if (np) {
+                vbase = of_iomap(np, 0);
+                of_node_put(np);
+        } else {
+                vbase = omap_hwmod_get_mpu_rt_va(oh);
+        }
+
         if (!vbase) {
                 pr_warn("%s: failed to get counter_32k resource\n", __func__);
                 return -ENXIO;
@@ -309,23 +451,21 @@ static int __init omap2_sync32k_clocksource_init(void)
 
         return ret;
 }
-#else
-static inline int omap2_sync32k_clocksource_init(void)
-{
-        return -ENODEV;
-}
-#endif
 
 static void __init omap2_gptimer_clocksource_init(int gptimer_id,
                                                 const char *fck_source)
 {
         int res;
 
-        res = omap_dm_timer_init_one(&clksrc, gptimer_id, fck_source);
+        clksrc.errata = omap_dm_timer_get_errata();
+
+        res = omap_dm_timer_init_one(&clksrc, gptimer_id, fck_source, NULL,
+                                     OMAP_TIMER_NONPOSTED);
         BUG_ON(res);
 
         __omap_dm_timer_load_start(&clksrc,
-                        OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, 1);
+                                   OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0,
+                                   OMAP_TIMER_NONPOSTED);
         setup_sched_clock(dmtimer_read_sched_clock, 32, clksrc.rate);
 
         if (clocksource_register_hz(&clocksource_gpt, clksrc.rate))
@@ -336,25 +476,6 @@ static void __init omap2_gptimer_clocksource_init(int gptimer_id,
                         gptimer_id, clksrc.rate);
 }
 
-static void __init omap2_clocksource_init(int gptimer_id,
-                                                const char *fck_source)
-{
-        /*
-         * First give preference to kernel parameter configuration
-         * by user (clocksource="gp_timer").
-         *
-         * In case of missing kernel parameter for clocksource,
-         * first check for availability for 32k-sync timer, in case
-         * of failure in finding 32k_counter module or registering
-         * it as clocksource, execution will fallback to gp-timer.
-         */
-        if (use_gptimer_clksrc == true)
-                omap2_gptimer_clocksource_init(gptimer_id, fck_source);
-        else if (omap2_sync32k_clocksource_init())
-                /* Fall back to gp-timer code */
-                omap2_gptimer_clocksource_init(gptimer_id, fck_source);
-}
-
 #ifdef CONFIG_SOC_HAS_REALTIME_COUNTER
 /*
  * The realtime counter also called master counter, is a free-running
@@ -433,48 +554,65 @@ static inline void __init realtime_counter_init(void)
 {}
 #endif
 
-#define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src,                  \
+#define OMAP_SYS_GP_TIMER_INIT(name, clkev_nr, clkev_src, clkev_prop,   \
+                               clksrc_nr, clksrc_src)                   \
+static void __init omap##name##_gptimer_timer_init(void)                \
+{                                                                       \
+        omap_dmtimer_init();                                            \
+        omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop);    \
+        omap2_gptimer_clocksource_init((clksrc_nr), clksrc_src);        \
+}
+
+#define OMAP_SYS_32K_TIMER_INIT(name, clkev_nr, clkev_src, clkev_prop,  \
                                 clksrc_nr, clksrc_src)                  \
-static void __init omap##name##_timer_init(void)                        \
+static void __init omap##name##_sync32k_timer_init(void)                \
 {                                                                       \
-        omap2_gp_clockevent_init((clkev_nr), clkev_src);                \
-        omap2_clocksource_init((clksrc_nr), clksrc_src);                \
+        omap_dmtimer_init();                                            \
+        omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop);    \
+        /* Enable the use of clocksource="gp_timer" kernel parameter */ \
+        if (use_gptimer_clksrc)                                         \
+                omap2_gptimer_clocksource_init((clksrc_nr), clksrc_src);\
+        else                                                            \
+                omap2_sync32k_clocksource_init();                       \
 }
 
-#define OMAP_SYS_TIMER(name)                                            \
+#define OMAP_SYS_TIMER(name, clksrc)                                    \
 struct sys_timer omap##name##_timer = {                                 \
-        .init   = omap##name##_timer_init,                              \
+        .init   = omap##name##_##clksrc##_timer_init,                   \
 };
 
 #ifdef CONFIG_ARCH_OMAP2
-OMAP_SYS_TIMER_INIT(2, 1, OMAP2_CLKEV_SOURCE, 2, OMAP2_MPU_SOURCE)
-OMAP_SYS_TIMER(2)
-#endif
+OMAP_SYS_32K_TIMER_INIT(2, 1, OMAP2_32K_SOURCE, "ti,timer-alwon",
+                        2, OMAP2_MPU_SOURCE);
+OMAP_SYS_TIMER(2, sync32k);
+#endif /* CONFIG_ARCH_OMAP2 */
 
 #ifdef CONFIG_ARCH_OMAP3
-OMAP_SYS_TIMER_INIT(3, 1, OMAP3_CLKEV_SOURCE, 2, OMAP3_MPU_SOURCE)
-OMAP_SYS_TIMER(3)
-OMAP_SYS_TIMER_INIT(3_secure, OMAP3_SECURE_TIMER, OMAP3_CLKEV_SOURCE,
-                        2, OMAP3_MPU_SOURCE)
-OMAP_SYS_TIMER(3_secure)
-#endif
+OMAP_SYS_32K_TIMER_INIT(3, 1, OMAP3_32K_SOURCE, "ti,timer-alwon",
+                        2, OMAP3_MPU_SOURCE);
+OMAP_SYS_TIMER(3, sync32k);
+OMAP_SYS_32K_TIMER_INIT(3_secure, 12, OMAP3_32K_SOURCE, "ti,timer-secure",
+                        2, OMAP3_MPU_SOURCE);
+OMAP_SYS_TIMER(3_secure, sync32k);
+OMAP_SYS_GP_TIMER_INIT(3_gp, 1, OMAP3_MPU_SOURCE, "ti,timer-alwon",
+                       2, OMAP3_MPU_SOURCE);
+OMAP_SYS_TIMER(3_gp, gptimer);
+#endif /* CONFIG_ARCH_OMAP3 */
 
 #ifdef CONFIG_SOC_AM33XX
-OMAP_SYS_TIMER_INIT(3_am33xx, 1, OMAP4_MPU_SOURCE, 2, OMAP4_MPU_SOURCE)
-OMAP_SYS_TIMER(3_am33xx)
-#endif
+OMAP_SYS_GP_TIMER_INIT(3_am33xx, 1, OMAP4_MPU_SOURCE, "ti,timer-alwon",
+                       2, OMAP4_MPU_SOURCE);
+OMAP_SYS_TIMER(3_am33xx, gptimer);
+#endif /* CONFIG_SOC_AM33XX */
 
 #ifdef CONFIG_ARCH_OMAP4
+OMAP_SYS_32K_TIMER_INIT(4, 1, OMAP4_32K_SOURCE, "ti,timer-alwon",
+                        2, OMAP4_MPU_SOURCE);
 #ifdef CONFIG_LOCAL_TIMERS
-static DEFINE_TWD_LOCAL_TIMER(twd_local_timer,
-                              OMAP44XX_LOCAL_TWD_BASE, 29);
-#endif
-
-static void __init omap4_timer_init(void)
+static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, OMAP44XX_LOCAL_TWD_BASE, 29);
+static void __init omap4_local_timer_init(void)
 {
-        omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE);
-        omap2_clocksource_init(2, OMAP4_MPU_SOURCE);
-#ifdef CONFIG_LOCAL_TIMERS
+        omap4_sync32k_timer_init();
         /* Local timers are not supprted on OMAP4430 ES1.0 */
         if (omap_rev() != OMAP4430_REV_ES1_0) {
                 int err;
@@ -488,26 +626,32 @@ static void __init omap4_timer_init(void)
                 if (err)
                         pr_err("twd_local_timer_register failed %d\n", err);
         }
-#endif
 }
-OMAP_SYS_TIMER(4)
-#endif
+#else /* CONFIG_LOCAL_TIMERS */
+static inline void omap4_local_timer_init(void)
+{
+        omap4_sync32_timer_init();
+}
+#endif /* CONFIG_LOCAL_TIMERS */
+OMAP_SYS_TIMER(4, local);
+#endif /* CONFIG_ARCH_OMAP4 */
 
 #ifdef CONFIG_SOC_OMAP5
-static void __init omap5_timer_init(void)
+OMAP_SYS_32K_TIMER_INIT(5, 1, OMAP4_32K_SOURCE, "ti,timer-alwon",
+                        2, OMAP4_MPU_SOURCE);
+static void __init omap5_realtime_timer_init(void)
 {
         int err;
 
-        omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE);
-        omap2_clocksource_init(2, OMAP4_MPU_SOURCE);
+        omap5_sync32k_timer_init();
         realtime_counter_init();
 
         err = arch_timer_of_register();
         if (err)
                 pr_err("%s: arch_timer_register failed %d\n", __func__, err);
 }
-OMAP_SYS_TIMER(5)
-#endif
+OMAP_SYS_TIMER(5, realtime);
+#endif /* CONFIG_SOC_OMAP5 */
 
 /**
  * omap_timer_init - build and register timer device with an
@@ -559,6 +703,9 @@ static int __init omap_timer_init(struct omap_hwmod *oh, void *unused)
         if (timer_dev_attr)
                 pdata->timer_capability = timer_dev_attr->timer_capability;
 
+        pdata->timer_errata = omap_dm_timer_get_errata();
+        pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count;
+
         pdev = omap_device_build(name, id, oh, pdata, sizeof(*pdata),
                                  NULL, 0, 0);
 
@@ -583,6 +730,10 @@ static int __init omap2_dm_timer_init(void)
 {
         int ret;
 
+        /* If dtb is there, the devices will be created dynamically */
+        if (of_have_populated_dt())
+                return -ENODEV;
+
         ret = omap_hwmod_for_each_by_class("timer", omap_timer_init, NULL);
         if (unlikely(ret)) {
                 pr_err("%s: device registration failed.\n", __func__);
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 3fa2bdb44106..e49b40b4c90a 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -70,6 +70,7 @@ void __init omap4_pmic_init(const char *pmic_type,
 {
         /* PMIC part*/
         omap_mux_init_signal("sys_nirq1", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE);
+        omap_mux_init_signal("fref_clk0_out.sys_drm_msecure", OMAP_PIN_OUTPUT);
         omap_pmic_init(1, 400, pmic_type, 7 + OMAP44XX_IRQ_GIC_START, pmic_data);
 
         /* Register additional devices on i2c1 bus if needed */
diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig
index 0673f0c10432..2cb2f06c20f5 100644
--- a/arch/arm/mach-orion5x/Kconfig
+++ b/arch/arm/mach-orion5x/Kconfig
@@ -2,6 +2,13 @@ if ARCH_ORION5X
 
 menu "Orion Implementations"
 
+config ARCH_ORION5X_DT
+        bool "Marvell Orion5x Flattened Device Tree"
+        select USE_OF
+        help
+          Say 'Y' here if you want your kernel to support the
+          Marvell Orion5x using flattened device tree.
+
 config MACH_DB88F5281
         bool "Marvell Orion-2 Development Board"
         select I2C_BOARDINFO
@@ -96,12 +103,13 @@ config MACH_MV2120
           Say 'Y' here if you want your kernel to support the
           HP Media Vault mv2120 or mv5100.
 
-config MACH_EDMINI_V2
-        bool "LaCie Ethernet Disk mini V2"
+config MACH_EDMINI_V2_DT
+        bool "LaCie Ethernet Disk mini V2 (Flattened Device Tree)"
         select I2C_BOARDINFO
+        select ARCH_ORION5X_DT
         help
           Say 'Y' here if you want your kernel to support the
-          LaCie Ethernet Disk mini V2.
+          LaCie Ethernet Disk mini V2 (Flattened Device Tree).
 
 config MACH_D2NET
         bool "LaCie d2 Network"
diff --git a/arch/arm/mach-orion5x/Makefile b/arch/arm/mach-orion5x/Makefile
index 7f18cdacd487..9e809a7c05c0 100644
--- a/arch/arm/mach-orion5x/Makefile
+++ b/arch/arm/mach-orion5x/Makefile
@@ -12,7 +12,6 @@ obj-$(CONFIG_MACH_TS409)	+= ts409-setup.o tsx09-common.o
 obj-$(CONFIG_MACH_WRT350N_V2)   += wrt350n-v2-setup.o
 obj-$(CONFIG_MACH_TS78XX)       += ts78xx-setup.o
 obj-$(CONFIG_MACH_MV2120)       += mv2120-setup.o
-obj-$(CONFIG_MACH_EDMINI_V2)    += edmini_v2-setup.o
 obj-$(CONFIG_MACH_D2NET)        += d2net-setup.o
 obj-$(CONFIG_MACH_BIGDISK)      += d2net-setup.o
 obj-$(CONFIG_MACH_NET2BIG)      += net2big-setup.o
@@ -22,3 +21,6 @@ obj-$(CONFIG_MACH_RD88F5181L_GE)	+= rd88f5181l-ge-setup.o
 obj-$(CONFIG_MACH_RD88F5181L_FXO)       += rd88f5181l-fxo-setup.o
 obj-$(CONFIG_MACH_RD88F6183AP_GE)       += rd88f6183ap-ge-setup.o
 obj-$(CONFIG_MACH_LINKSTATION_LSCHL)    += ls-chl-setup.o
+
+obj-$(CONFIG_ARCH_ORION5X_DT)           += board-dt.o
+obj-$(CONFIG_MACH_EDMINI_V2_DT) += edmini_v2-setup.o
diff --git a/arch/arm/mach-orion5x/board-dt.c b/arch/arm/mach-orion5x/board-dt.c
new file mode 100644
index 000000000000..32e5c211a89b
--- /dev/null
+++ b/arch/arm/mach-orion5x/board-dt.c
@@ -0,0 +1,79 @@
+/*
+ * Copyright 2012 (C), Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ *
+ * arch/arm/mach-orion5x/board-dt.c
+ *
+ * Flattened Device Tree board initialization
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <asm/system_misc.h>
+#include <asm/mach/arch.h>
+#include <mach/orion5x.h>
+#include <plat/irq.h>
+#include "common.h"
+
+struct of_dev_auxdata orion5x_auxdata_lookup[] __initdata = {
+        OF_DEV_AUXDATA("marvell,orion-spi", 0xf1010600, "orion_spi.0", NULL),
+        OF_DEV_AUXDATA("marvell,mv64xxx-i2c", 0xf1011000, "mv64xxx_i2c.0",
+                       NULL),
+        OF_DEV_AUXDATA("marvell,orion-wdt", 0xf1020300, "orion_wdt", NULL),
+        OF_DEV_AUXDATA("marvell,orion-sata", 0xf1080000, "sata_mv.0", NULL),
+        OF_DEV_AUXDATA("marvell,orion-crypto", 0xf1090000, "mv_crypto", NULL),
+        {},
+};
+
+static void __init orion5x_dt_init(void)
+{
+        char *dev_name;
+        u32 dev, rev;
+
+        orion5x_id(&dev, &rev, &dev_name);
+        printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, orion5x_tclk);
+
+        /*
+         * Setup Orion address map
+         */
+        orion5x_setup_cpu_mbus_bridge();
+
+        /* Setup root of clk tree */
+        clk_init();
+
+        /*
+         * Don't issue "Wait for Interrupt" instruction if we are
+         * running on D0 5281 silicon.
+         */
+        if (dev == MV88F5281_DEV_ID && rev == MV88F5281_REV_D0) {
+                printk(KERN_INFO "Orion: Applying 5281 D0 WFI workaround.\n");
+                disable_hlt();
+        }
+
+        if (of_machine_is_compatible("lacie,ethernet-disk-mini-v2"))
+                edmini_v2_init();
+
+        of_platform_populate(NULL, of_default_bus_match_table,
+                             orion5x_auxdata_lookup, NULL);
+}
+
+static const char *orion5x_dt_compat[] = {
+        "marvell,orion5x",
+        NULL,
+};
+
+DT_MACHINE_START(ORION5X_DT, "Marvell Orion5x (Flattened Device Tree)")
+        /* Maintainer: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> */
+        .map_io         = orion5x_map_io,
+        .init_early     = orion5x_init_early,
+        .init_irq       = orion_dt_init_irq,
+        .timer          = &orion5x_timer,
+        .init_machine   = orion5x_dt_init,
+        .restart        = orion5x_restart,
+        .dt_compat      = orion5x_dt_compat,
+MACHINE_END
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index b3eb3da01160..550f92320afb 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -65,7 +65,7 @@ void __init orion5x_map_io(void)
  ****************************************************************************/
 static struct clk *tclk;
 
-static void __init clk_init(void)
+void __init clk_init(void)
 {
         tclk = clk_register_fixed_rate(NULL, "tclk", NULL, CLK_IS_ROOT,
                                        orion5x_tclk);
@@ -236,7 +236,7 @@ struct sys_timer orion5x_timer = {
 /*
  * Identify device ID and rev from PCIe configuration header space '0'.
  */
-static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name)
+void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name)
 {
         orion5x_pcie_id(dev, rev);
 
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
index 31bab92ce038..7db5cdd9c4b7 100644
--- a/arch/arm/mach-orion5x/common.h
+++ b/arch/arm/mach-orion5x/common.h
@@ -12,6 +12,8 @@ void orion5x_map_io(void);
 void orion5x_init_early(void);
 void orion5x_init_irq(void);
 void orion5x_init(void);
+void orion5x_id(u32 *dev, u32 *rev, char **dev_name);
+void clk_init(void);
 extern int orion5x_tclk;
 extern struct sys_timer orion5x_timer;
 
@@ -54,6 +56,13 @@ int orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys);
 struct pci_bus *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys);
 int orion5x_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
 
+/* board init functions for boards not fully converted to fdt */
+#ifdef CONFIG_MACH_EDMINI_V2_DT
+void edmini_v2_init(void);
+#else
+static inline void edmini_v2_init(void) {};
+#endif
+
 struct meminfo;
 struct tag;
 extern void __init tag_fixup_mem32(struct tag *, char **, struct meminfo *);
diff --git a/arch/arm/mach-orion5x/edmini_v2-setup.c b/arch/arm/mach-orion5x/edmini_v2-setup.c
index 355e962137c7..d675e727803d 100644
--- a/arch/arm/mach-orion5x/edmini_v2-setup.c
+++ b/arch/arm/mach-orion5x/edmini_v2-setup.c
@@ -115,69 +115,6 @@ static struct i2c_board_info __initdata edmini_v2_i2c_rtc = {
 };
 
 /*****************************************************************************
- * Sata
- ****************************************************************************/
-
-static struct mv_sata_platform_data edmini_v2_sata_data = {
-        .n_ports        = 2,
-};
-
-/*****************************************************************************
- * GPIO LED (simple - doesn't use hardware blinking support)
- ****************************************************************************/
-
-#define EDMINI_V2_GPIO_LED_POWER        16
-
-static struct gpio_led edmini_v2_leds[] = {
-        {
-                .name = "power:blue",
-                .gpio = EDMINI_V2_GPIO_LED_POWER,
-                .active_low = 1,
-        },
-};
-
-static struct gpio_led_platform_data edmini_v2_led_data = {
-        .num_leds = ARRAY_SIZE(edmini_v2_leds),
-        .leds = edmini_v2_leds,
-};
-
-static struct platform_device edmini_v2_gpio_leds = {
-        .name           = "leds-gpio",
-        .id             = -1,
-        .dev            = {
-                .platform_data  = &edmini_v2_led_data,
-        },
-};
-
-/****************************************************************************
- * GPIO key
- ****************************************************************************/
-
-#define EDMINI_V2_GPIO_KEY_POWER        18
-
-static struct gpio_keys_button edmini_v2_buttons[] = {
-        {
-                .code           = KEY_POWER,
-                .gpio           = EDMINI_V2_GPIO_KEY_POWER,
-                .desc           = "Power Button",
-                .active_low     = 0,
-        },
-};
-
-static struct gpio_keys_platform_data edmini_v2_button_data = {
-        .buttons        = edmini_v2_buttons,
-        .nbuttons       = ARRAY_SIZE(edmini_v2_buttons),
-};
-
-static struct platform_device edmini_v2_gpio_buttons = {
-        .name           = "gpio-keys",
-        .id             = -1,
-        .dev            = {
-                .platform_data  = &edmini_v2_button_data,
-        },
-};
-
-/*****************************************************************************
  * General Setup
  ****************************************************************************/
 static unsigned int edminiv2_mpp_modes[] __initdata = {
@@ -207,13 +144,8 @@ static unsigned int edminiv2_mpp_modes[] __initdata = {
         0,
 };
 
-static void __init edmini_v2_init(void)
+void __init edmini_v2_init(void)
 {
-        /*
-         * Setup basic Orion functions. Need to be called early.
-         */
-        orion5x_init();
-
         orion5x_mpp_conf(edminiv2_mpp_modes);
 
         /*
@@ -221,15 +153,10 @@ static void __init edmini_v2_init(void)
          */
         orion5x_ehci0_init();
         orion5x_eth_init(&edmini_v2_eth_data);
-        orion5x_i2c_init();
-        orion5x_sata_init(&edmini_v2_sata_data);
-        orion5x_uart0_init();
 
         orion5x_setup_dev_boot_win(EDMINI_V2_NOR_BOOT_BASE,
                                 EDMINI_V2_NOR_BOOT_SIZE);
         platform_device_register(&edmini_v2_nor_flash);
-        platform_device_register(&edmini_v2_gpio_leds);
-        platform_device_register(&edmini_v2_gpio_buttons);
 
         pr_notice("edmini_v2: USB device port, flash write and power-off "
                   "are not yet supported.\n");
@@ -247,16 +174,3 @@ static void __init edmini_v2_init(void)
 
         i2c_register_board_info(0, &edmini_v2_i2c_rtc, 1);
 }
-
-/* Warning: LaCie use a wrong mach-type (0x20e=526) in their bootloader. */
-MACHINE_START(EDMINI_V2, "LaCie Ethernet Disk mini V2")
-        /* Maintainer: Christopher Moore <moore@free.fr> */
-        .atag_offset    = 0x100,
-        .init_machine   = edmini_v2_init,
-        .map_io         = orion5x_map_io,
-        .init_early     = orion5x_init_early,
-        .init_irq       = orion5x_init_irq,
-        .timer          = &orion5x_timer,
-        .fixup          = tag_fixup_mem32,
-        .restart        = orion5x_restart,
-MACHINE_END
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index 11aa7399dc09..86eec4159cbc 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -2,27 +2,6 @@ if ARCH_PXA
 
 menu "Intel PXA2xx/PXA3xx Implementations"
 
-config ARCH_PXA_V7
-        bool "ARMv7 (PXA95x) based systems"
-
-if ARCH_PXA_V7
-comment "Marvell Dev Platforms (sorted by hardware release time)"
-config MACH_TAVOREVB3
-        bool "PXA95x Development Platform (aka TavorEVB III)"
-        select CPU_PXA955
-
-config MACH_SAARB
-        bool "PXA955 Handheld Platform (aka SAARB)"
-        select CPU_PXA955
-endif
-
-config PXA_V7_MACH_AUTO
-        def_bool y
-        depends on ARCH_PXA_V7
-        depends on !MACH_SAARB
-        select MACH_TAVOREVB3
-
-if !ARCH_PXA_V7
 comment "Intel/Marvell Dev Platforms (sorted by hardware release time)"
 
 config MACH_PXA3XX_DT
@@ -630,7 +609,6 @@ config MACH_ZIPIT2
         bool "Zipit Z2 Handheld"
         select HAVE_PWM
         select PXA27x
-endif
 endmenu
 
 config PXA25x
@@ -688,18 +666,6 @@ config CPU_PXA935
         help
           PXA935 (codename Tavor-P65)
 
-config PXA95x
-        bool
-        select CPU_PJ4
-        help
-          Select code specific to PXA95x variants
-
-config CPU_PXA955
-        bool
-        select PXA95x
-        help
-          PXA950 (codename MG1)
-
 config PXA_SHARP_C7xx
         bool
         select SHARPSL_PM
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index ee88d6eae648..12c500558387 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -19,7 +19,6 @@ endif
 obj-$(CONFIG_PXA25x)            += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa25x.o
 obj-$(CONFIG_PXA27x)            += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa27x.o
 obj-$(CONFIG_PXA3xx)            += mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o smemc.o pxa3xx-ulpi.o
-obj-$(CONFIG_PXA95x)            += mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o pxa95x.o smemc.o
 obj-$(CONFIG_CPU_PXA300)        += pxa300.o
 obj-$(CONFIG_CPU_PXA320)        += pxa320.o
 obj-$(CONFIG_CPU_PXA930)        += pxa930.o
@@ -36,9 +35,7 @@ obj-$(CONFIG_MACH_ZYLONITE300)	+= zylonite.o zylonite_pxa300.o
 obj-$(CONFIG_MACH_ZYLONITE320)  += zylonite.o zylonite_pxa320.o
 obj-$(CONFIG_MACH_LITTLETON)    += littleton.o
 obj-$(CONFIG_MACH_TAVOREVB)     += tavorevb.o
-obj-$(CONFIG_MACH_TAVOREVB3)    += tavorevb3.o
 obj-$(CONFIG_MACH_SAAR)         += saar.o
-obj-$(CONFIG_MACH_SAARB)        += saarb.o
 
 # 3rd Party Dev Platforms
 obj-$(CONFIG_ARCH_PXA_IDP)      += idp.o
diff --git a/arch/arm/mach-pxa/clock.h b/arch/arm/mach-pxa/clock.h
index 3a258b1bf1aa..1f65d32c8d5e 100644
--- a/arch/arm/mach-pxa/clock.h
+++ b/arch/arm/mach-pxa/clock.h
@@ -57,7 +57,7 @@ void clk_pxa2xx_cken_disable(struct clk *clk);
 
 extern struct syscore_ops pxa2xx_clock_syscore_ops;
 
-#if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x)
+#if defined(CONFIG_PXA3xx)
 #define DEFINE_PXA3_CKEN(_name, _cken, _rate, _delay)   \
 struct clk clk_##_name = {                              \
                 .ops    = &clk_pxa3xx_cken_ops,         \
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c
index ddaa04de8e22..daa86d39ed9e 100644
--- a/arch/arm/mach-pxa/devices.c
+++ b/arch/arm/mach-pxa/devices.c
@@ -703,7 +703,7 @@ void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
 }
 #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
 
-#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x)
+#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
 static struct resource pxa27x_resource_keypad[] = {
         [0] = {
                 .start  = 0x41500000,
@@ -872,7 +872,7 @@ struct platform_device pxa27x_device_pwm1 = {
         .resource       = pxa27x_resource_pwm1,
         .num_resources  = ARRAY_SIZE(pxa27x_resource_pwm1),
 };
-#endif /* CONFIG_PXA27x || CONFIG_PXA3xx || CONFIG_PXA95x*/
+#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
 
 #ifdef CONFIG_PXA3xx
 static struct resource pxa3xx_resources_mci2[] = {
@@ -981,7 +981,7 @@ struct platform_device pxa3xx_device_gcu = {
 
 #endif /* CONFIG_PXA3xx */
 
-#if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x)
+#if defined(CONFIG_PXA3xx)
 static struct resource pxa3xx_resources_i2c_power[] = {
         {
                 .start  = 0x40f500c0,
@@ -1082,7 +1082,7 @@ struct platform_device pxa3xx_device_ssp4 = {
         .resource       = pxa3xx_resource_ssp4,
         .num_resources  = ARRAY_SIZE(pxa3xx_resource_ssp4),
 };
-#endif /* CONFIG_PXA3xx || CONFIG_PXA95x */
+#endif /* CONFIG_PXA3xx */
 
 struct resource pxa_resource_gpio[] = {
         {
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h
index 56d92e5cad85..ccb06e485520 100644
--- a/arch/arm/mach-pxa/include/mach/hardware.h
+++ b/arch/arm/mach-pxa/include/mach/hardware.h
@@ -194,17 +194,6 @@
 #define __cpu_is_pxa935(id)     (0)
 #endif
 
-#ifdef CONFIG_CPU_PXA955
-#define __cpu_is_pxa955(id)                             \
-        ({                                              \
-                unsigned int _id = (id) >> 4 & 0xfff;   \
-                _id == 0x581 || _id == 0xc08            \
-                        || _id == 0xb76;                \
-        })
-#else
-#define __cpu_is_pxa955(id)     (0)
-#endif
-
 #define cpu_is_pxa210()                                 \
         ({                                              \
                 __cpu_is_pxa210(read_cpuid_id());       \
@@ -255,10 +244,6 @@
                 __cpu_is_pxa935(read_cpuid_id());       \
          })
 
-#define cpu_is_pxa955()                                 \
-        ({                                              \
-                __cpu_is_pxa955(read_cpuid_id());       \
-        })
 
 
 /*
@@ -297,15 +282,6 @@
 #define __cpu_is_pxa93x(id)     (0)
 #endif
 
-#ifdef CONFIG_PXA95x
-#define __cpu_is_pxa95x(id)                             \
-        ({                                              \
-                __cpu_is_pxa955(id);                    \
-        })
-#else
-#define __cpu_is_pxa95x(id)     (0)
-#endif
-
 #define cpu_is_pxa2xx()                                 \
         ({                                              \
                 __cpu_is_pxa2xx(read_cpuid_id());       \
@@ -321,10 +297,6 @@
                 __cpu_is_pxa93x(read_cpuid_id());       \
          })
 
-#define cpu_is_pxa95x()                                 \
-        ({                                              \
-                __cpu_is_pxa95x(read_cpuid_id());       \
-        })
 
 /*
  * return current memory and LCD clock frequency in units of 10kHz
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
index 8765782dd955..48c2fd851686 100644
--- a/arch/arm/mach-pxa/include/mach/irqs.h
+++ b/arch/arm/mach-pxa/include/mach/irqs.h
@@ -84,7 +84,6 @@
 #define IRQ_PXA935_MMC0 PXA_IRQ(72)     /* MMC0 Controller (PXA935) */
 #define IRQ_PXA935_MMC1 PXA_IRQ(73)     /* MMC1 Controller (PXA935) */
 #define IRQ_PXA935_MMC2 PXA_IRQ(74)     /* MMC2 Controller (PXA935) */
-#define IRQ_PXA955_MMC3 PXA_IRQ(75)     /* MMC3 Controller (PXA955) */
 #define IRQ_U2P         PXA_IRQ(93)     /* USB PHY D+/D- Lines (PXA935) */
 
 #define PXA_GPIO_IRQ_BASE       PXA_IRQ(96)
diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx.h b/arch/arm/mach-pxa/include/mach/pxa3xx.h
index cd3e57f42688..6dd7fa163e29 100644
--- a/arch/arm/mach-pxa/include/mach/pxa3xx.h
+++ b/arch/arm/mach-pxa/include/mach/pxa3xx.h
@@ -7,7 +7,6 @@
 
 extern void __init pxa3xx_map_io(void);
 extern void __init pxa3xx_init_irq(void);
-extern void __init pxa95x_init_irq(void);
 
 #define pxa3xx_handle_irq       ichp_handle_irq
 
diff --git a/arch/arm/mach-pxa/include/mach/pxa95x.h b/arch/arm/mach-pxa/include/mach/pxa95x.h
deleted file mode 100644
index cbb097c4cb1f..000000000000
--- a/arch/arm/mach-pxa/include/mach/pxa95x.h
+++ /dev/null
@@ -1,7 +0,0 @@
-#ifndef __MACH_PXA95X_H
-#define __MACH_PXA95X_H
-
-#include <mach/pxa3xx.h>
-#include <mach/mfp-pxa930.h>
-
-#endif /* __MACH_PXA95X_H */
diff --git a/arch/arm/mach-pxa/pxa3xx-ulpi.c b/arch/arm/mach-pxa/pxa3xx-ulpi.c
index 7dbe3ccf1993..e329ccefd364 100644
--- a/arch/arm/mach-pxa/pxa3xx-ulpi.c
+++ b/arch/arm/mach-pxa/pxa3xx-ulpi.c
@@ -384,18 +384,7 @@ static struct platform_driver pxa3xx_u2d_ulpi_driver = {
         .probe          = pxa3xx_u2d_probe,
         .remove         = pxa3xx_u2d_remove,
 };
-
-static int pxa3xx_u2d_ulpi_init(void)
-{
-        return platform_driver_register(&pxa3xx_u2d_ulpi_driver);
-}
-module_init(pxa3xx_u2d_ulpi_init);
-
-static void __exit pxa3xx_u2d_ulpi_exit(void)
-{
-        platform_driver_unregister(&pxa3xx_u2d_ulpi_driver);
-}
-module_exit(pxa3xx_u2d_ulpi_exit);
+module_platform_driver(pxa3xx_u2d_ulpi_driver);
 
 MODULE_DESCRIPTION("PXA3xx U2D ULPI driver");
 MODULE_AUTHOR("Igor Grinberg");
diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c
deleted file mode 100644
index 47601f80e6e7..000000000000
--- a/arch/arm/mach-pxa/pxa95x.c
+++ /dev/null
@@ -1,295 +0,0 @@
-/*
- * linux/arch/arm/mach-pxa/pxa95x.c
- *
- * code specific to PXA95x aka MGx
- *
- * Copyright (C) 2009-2010 Marvell International Ltd.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/pm.h>
-#include <linux/platform_device.h>
-#include <linux/i2c/pxa-i2c.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-#include <linux/syscore_ops.h>
-
-#include <mach/hardware.h>
-#include <mach/pxa3xx-regs.h>
-#include <mach/pxa930.h>
-#include <mach/reset.h>
-#include <mach/pm.h>
-#include <mach/dma.h>
-
-#include "generic.h"
-#include "devices.h"
-#include "clock.h"
-
-static struct mfp_addr_map pxa95x_mfp_addr_map[] __initdata = {
-
-        MFP_ADDR(GPIO0, 0x02e0),
-        MFP_ADDR(GPIO1, 0x02dc),
-        MFP_ADDR(GPIO2, 0x02e8),
-        MFP_ADDR(GPIO3, 0x02d8),
-        MFP_ADDR(GPIO4, 0x02e4),
-        MFP_ADDR(GPIO5, 0x02ec),
-        MFP_ADDR(GPIO6, 0x02f8),
-        MFP_ADDR(GPIO7, 0x02fc),
-        MFP_ADDR(GPIO8, 0x0300),
-        MFP_ADDR(GPIO9, 0x02d4),
-        MFP_ADDR(GPIO10, 0x02f4),
-        MFP_ADDR(GPIO11, 0x02f0),
-        MFP_ADDR(GPIO12, 0x0304),
-        MFP_ADDR(GPIO13, 0x0310),
-        MFP_ADDR(GPIO14, 0x0308),
-        MFP_ADDR(GPIO15, 0x030c),
-        MFP_ADDR(GPIO16, 0x04e8),
-        MFP_ADDR(GPIO17, 0x04f4),
-        MFP_ADDR(GPIO18, 0x04f8),
-        MFP_ADDR(GPIO19, 0x04fc),
-        MFP_ADDR(GPIO20, 0x0518),
-        MFP_ADDR(GPIO21, 0x051c),
-        MFP_ADDR(GPIO22, 0x04ec),
-        MFP_ADDR(GPIO23, 0x0500),
-        MFP_ADDR(GPIO24, 0x04f0),
-        MFP_ADDR(GPIO25, 0x0504),
-        MFP_ADDR(GPIO26, 0x0510),
-        MFP_ADDR(GPIO27, 0x0514),
-        MFP_ADDR(GPIO28, 0x0520),
-        MFP_ADDR(GPIO29, 0x0600),
-        MFP_ADDR(GPIO30, 0x0618),
-        MFP_ADDR(GPIO31, 0x0610),
-        MFP_ADDR(GPIO32, 0x060c),
-        MFP_ADDR(GPIO33, 0x061c),
-        MFP_ADDR(GPIO34, 0x0620),
-        MFP_ADDR(GPIO35, 0x0628),
-        MFP_ADDR(GPIO36, 0x062c),
-        MFP_ADDR(GPIO37, 0x0630),
-        MFP_ADDR(GPIO38, 0x0634),
-        MFP_ADDR(GPIO39, 0x0638),
-        MFP_ADDR(GPIO40, 0x063c),
-        MFP_ADDR(GPIO41, 0x0614),
-        MFP_ADDR(GPIO42, 0x0624),
-        MFP_ADDR(GPIO43, 0x0608),
-        MFP_ADDR(GPIO44, 0x0604),
-        MFP_ADDR(GPIO45, 0x050c),
-        MFP_ADDR(GPIO46, 0x0508),
-        MFP_ADDR(GPIO47, 0x02bc),
-        MFP_ADDR(GPIO48, 0x02b4),
-        MFP_ADDR(GPIO49, 0x02b8),
-        MFP_ADDR(GPIO50, 0x02c8),
-        MFP_ADDR(GPIO51, 0x02c0),
-        MFP_ADDR(GPIO52, 0x02c4),
-        MFP_ADDR(GPIO53, 0x02d0),
-        MFP_ADDR(GPIO54, 0x02cc),
-        MFP_ADDR(GPIO55, 0x029c),
-        MFP_ADDR(GPIO56, 0x02a0),
-        MFP_ADDR(GPIO57, 0x0294),
-        MFP_ADDR(GPIO58, 0x0298),
-        MFP_ADDR(GPIO59, 0x02a4),
-        MFP_ADDR(GPIO60, 0x02a8),
-        MFP_ADDR(GPIO61, 0x02b0),
-        MFP_ADDR(GPIO62, 0x02ac),
-        MFP_ADDR(GPIO63, 0x0640),
-        MFP_ADDR(GPIO64, 0x065c),
-        MFP_ADDR(GPIO65, 0x0648),
-        MFP_ADDR(GPIO66, 0x0644),
-        MFP_ADDR(GPIO67, 0x0674),
-        MFP_ADDR(GPIO68, 0x0658),
-        MFP_ADDR(GPIO69, 0x0654),
-        MFP_ADDR(GPIO70, 0x0660),
-        MFP_ADDR(GPIO71, 0x0668),
-        MFP_ADDR(GPIO72, 0x0664),
-        MFP_ADDR(GPIO73, 0x0650),
-        MFP_ADDR(GPIO74, 0x066c),
-        MFP_ADDR(GPIO75, 0x064c),
-        MFP_ADDR(GPIO76, 0x0670),
-        MFP_ADDR(GPIO77, 0x0678),
-        MFP_ADDR(GPIO78, 0x067c),
-        MFP_ADDR(GPIO79, 0x0694),
-        MFP_ADDR(GPIO80, 0x069c),
-        MFP_ADDR(GPIO81, 0x06a0),
-        MFP_ADDR(GPIO82, 0x06a4),
-        MFP_ADDR(GPIO83, 0x0698),
-        MFP_ADDR(GPIO84, 0x06bc),
-        MFP_ADDR(GPIO85, 0x06b4),
-        MFP_ADDR(GPIO86, 0x06b0),
-        MFP_ADDR(GPIO87, 0x06c0),
-        MFP_ADDR(GPIO88, 0x06c4),
-        MFP_ADDR(GPIO89, 0x06ac),
-        MFP_ADDR(GPIO90, 0x0680),
-        MFP_ADDR(GPIO91, 0x0684),
-        MFP_ADDR(GPIO92, 0x0688),
-        MFP_ADDR(GPIO93, 0x0690),
-        MFP_ADDR(GPIO94, 0x068c),
-        MFP_ADDR(GPIO95, 0x06a8),
-        MFP_ADDR(GPIO96, 0x06b8),
-        MFP_ADDR(GPIO97, 0x0410),
-        MFP_ADDR(GPIO98, 0x0418),
-        MFP_ADDR(GPIO99, 0x041c),
-        MFP_ADDR(GPIO100, 0x0414),
-        MFP_ADDR(GPIO101, 0x0408),
-        MFP_ADDR(GPIO102, 0x0324),
-        MFP_ADDR(GPIO103, 0x040c),
-        MFP_ADDR(GPIO104, 0x0400),
-        MFP_ADDR(GPIO105, 0x0328),
-        MFP_ADDR(GPIO106, 0x0404),
-
-        MFP_ADDR(GPIO159, 0x0524),
-        MFP_ADDR(GPIO163, 0x0534),
-        MFP_ADDR(GPIO167, 0x0544),
-        MFP_ADDR(GPIO168, 0x0548),
-        MFP_ADDR(GPIO169, 0x054c),
-        MFP_ADDR(GPIO170, 0x0550),
-        MFP_ADDR(GPIO171, 0x0554),
-        MFP_ADDR(GPIO172, 0x0558),
-        MFP_ADDR(GPIO173, 0x055c),
-
-        MFP_ADDR(nXCVREN, 0x0204),
-        MFP_ADDR(DF_CLE_nOE, 0x020c),
-        MFP_ADDR(DF_nADV1_ALE, 0x0218),
-        MFP_ADDR(DF_SCLK_E, 0x0214),
-        MFP_ADDR(DF_SCLK_S, 0x0210),
-        MFP_ADDR(nBE0, 0x021c),
-        MFP_ADDR(nBE1, 0x0220),
-        MFP_ADDR(DF_nADV2_ALE, 0x0224),
-        MFP_ADDR(DF_INT_RnB, 0x0228),
-        MFP_ADDR(DF_nCS0, 0x022c),
-        MFP_ADDR(DF_nCS1, 0x0230),
-        MFP_ADDR(nLUA, 0x0254),
-        MFP_ADDR(nLLA, 0x0258),
-        MFP_ADDR(DF_nWE, 0x0234),
-        MFP_ADDR(DF_nRE_nOE, 0x0238),
-        MFP_ADDR(DF_ADDR0, 0x024c),
-        MFP_ADDR(DF_ADDR1, 0x0250),
-        MFP_ADDR(DF_ADDR2, 0x025c),
-        MFP_ADDR(DF_ADDR3, 0x0260),
-        MFP_ADDR(DF_IO0, 0x023c),
-        MFP_ADDR(DF_IO1, 0x0240),
-        MFP_ADDR(DF_IO2, 0x0244),
-        MFP_ADDR(DF_IO3, 0x0248),
-        MFP_ADDR(DF_IO4, 0x0264),
-        MFP_ADDR(DF_IO5, 0x0268),
-        MFP_ADDR(DF_IO6, 0x026c),
-        MFP_ADDR(DF_IO7, 0x0270),
-        MFP_ADDR(DF_IO8, 0x0274),
-        MFP_ADDR(DF_IO9, 0x0278),
-        MFP_ADDR(DF_IO10, 0x027c),
-        MFP_ADDR(DF_IO11, 0x0280),
-        MFP_ADDR(DF_IO12, 0x0284),
-        MFP_ADDR(DF_IO13, 0x0288),
-        MFP_ADDR(DF_IO14, 0x028c),
-        MFP_ADDR(DF_IO15, 0x0290),
-
-        MFP_ADDR(GSIM_UIO, 0x0314),
-        MFP_ADDR(GSIM_UCLK, 0x0318),
-        MFP_ADDR(GSIM_UDET, 0x031c),
-        MFP_ADDR(GSIM_nURST, 0x0320),
-
-        MFP_ADDR(PMIC_INT, 0x06c8),
-
-        MFP_ADDR(RDY, 0x0200),
-
-        MFP_ADDR_END,
-};
-
-static DEFINE_CK(pxa95x_lcd, LCD, &clk_pxa3xx_hsio_ops);
-static DEFINE_CLK(pxa95x_pout, &clk_pxa3xx_pout_ops, 13000000, 70);
-static DEFINE_PXA3_CKEN(pxa95x_ffuart, FFUART, 14857000, 1);
-static DEFINE_PXA3_CKEN(pxa95x_btuart, BTUART, 14857000, 1);
-static DEFINE_PXA3_CKEN(pxa95x_stuart, STUART, 14857000, 1);
-static DEFINE_PXA3_CKEN(pxa95x_i2c, I2C, 32842000, 0);
-static DEFINE_PXA3_CKEN(pxa95x_keypad, KEYPAD, 32768, 0);
-static DEFINE_PXA3_CKEN(pxa95x_ssp1, SSP1, 13000000, 0);
-static DEFINE_PXA3_CKEN(pxa95x_ssp2, SSP2, 13000000, 0);
-static DEFINE_PXA3_CKEN(pxa95x_ssp3, SSP3, 13000000, 0);
-static DEFINE_PXA3_CKEN(pxa95x_ssp4, SSP4, 13000000, 0);
-static DEFINE_PXA3_CKEN(pxa95x_pwm0, PWM0, 13000000, 0);
-static DEFINE_PXA3_CKEN(pxa95x_pwm1, PWM1, 13000000, 0);
-static DEFINE_PXA3_CKEN(pxa95x_gpio, GPIO, 13000000, 0);
-
-static struct clk_lookup pxa95x_clkregs[] = {
-        INIT_CLKREG(&clk_pxa95x_pout, NULL, "CLK_POUT"),
-        /* Power I2C clock is always on */
-        INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL),
-        INIT_CLKREG(&clk_pxa95x_lcd, "pxa2xx-fb", NULL),
-        INIT_CLKREG(&clk_pxa95x_ffuart, "pxa2xx-uart.0", NULL),
-        INIT_CLKREG(&clk_pxa95x_btuart, "pxa2xx-uart.1", NULL),
-        INIT_CLKREG(&clk_pxa95x_stuart, "pxa2xx-uart.2", NULL),
-        INIT_CLKREG(&clk_pxa95x_stuart, "pxa2xx-ir", "UARTCLK"),
-        INIT_CLKREG(&clk_pxa95x_i2c, "pxa2xx-i2c.0", NULL),
-        INIT_CLKREG(&clk_pxa95x_keypad, "pxa27x-keypad", NULL),
-        INIT_CLKREG(&clk_pxa95x_ssp1, "pxa27x-ssp.0", NULL),
-        INIT_CLKREG(&clk_pxa95x_ssp2, "pxa27x-ssp.1", NULL),
-        INIT_CLKREG(&clk_pxa95x_ssp3, "pxa27x-ssp.2", NULL),
-        INIT_CLKREG(&clk_pxa95x_ssp4, "pxa27x-ssp.3", NULL),
-        INIT_CLKREG(&clk_pxa95x_pwm0, "pxa27x-pwm.0", NULL),
-        INIT_CLKREG(&clk_pxa95x_pwm1, "pxa27x-pwm.1", NULL),
-        INIT_CLKREG(&clk_pxa95x_gpio, "pxa-gpio", NULL),
-        INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
-};
-
-void __init pxa95x_init_irq(void)
-{
-        pxa_init_irq(96, NULL);
-}
-
-/*
- * device registration specific to PXA93x.
- */
-
-void __init pxa95x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
-{
-        pxa_register_device(&pxa3xx_device_i2c_power, info);
-}
-
-static struct platform_device *devices[] __initdata = {
-        &pxa_device_gpio,
-        &sa1100_device_rtc,
-        &pxa_device_rtc,
-        &pxa27x_device_ssp1,
-        &pxa27x_device_ssp2,
-        &pxa27x_device_ssp3,
-        &pxa3xx_device_ssp4,
-        &pxa27x_device_pwm0,
-        &pxa27x_device_pwm1,
-};
-
-static int __init pxa95x_init(void)
-{
-        int ret = 0, i;
-
-        if (cpu_is_pxa95x()) {
-                mfp_init_base(io_p2v(MFPR_BASE));
-                mfp_init_addr(pxa95x_mfp_addr_map);
-
-                reset_status = ARSR;
-
-                /*
-                 * clear RDH bit every time after reset
-                 *
-                 * Note: the last 3 bits DxS are write-1-to-clear so carefully
-                 * preserve them here in case they will be referenced later
-                 */
-                ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S);
-
-                clkdev_add_table(pxa95x_clkregs, ARRAY_SIZE(pxa95x_clkregs));
-
-                if ((ret = pxa_init_dma(IRQ_DMA, 32)))
-                        return ret;
-
-                register_syscore_ops(&pxa_irq_syscore_ops);
-                register_syscore_ops(&pxa3xx_clock_syscore_ops);
-
-                ret = platform_add_devices(devices, ARRAY_SIZE(devices));
-        }
-
-        return ret;
-}
-
-postcore_initcall(pxa95x_init);
diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c
deleted file mode 100644
index 5aded5e6148f..000000000000
--- a/arch/arm/mach-pxa/saarb.c
+++ /dev/null
@@ -1,115 +0,0 @@
-/*
- *  linux/arch/arm/mach-pxa/saarb.c
- *
- *  Support for the Marvell Handheld Platform (aka SAARB)
- *
- *  Copyright (C) 2007-2010 Marvell International Ltd.
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License version 2 as
- *  publishhed by the Free Software Foundation.
- */
-#include <linux/gpio.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/i2c.h>
-#include <linux/i2c/pxa-i2c.h>
-#include <linux/mfd/88pm860x.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-
-#include <mach/irqs.h>
-#include <mach/hardware.h>
-#include <mach/mfp.h>
-#include <mach/mfp-pxa930.h>
-#include <mach/pxa95x.h>
-
-#include "generic.h"
-
-#define SAARB_NR_IRQS   (IRQ_BOARD_START + 40)
-
-static struct pm860x_touch_pdata saarb_touch = {
-        .gpadc_prebias  = 1,
-        .slot_cycle     = 1,
-        .tsi_prebias    = 6,
-        .pen_prebias    = 16,
-        .pen_prechg     = 2,
-        .res_x          = 300,
-};
-
-static struct pm860x_backlight_pdata saarb_backlight[] = {
-        {
-                .id     = PM8606_ID_BACKLIGHT,
-                .iset   = PM8606_WLED_CURRENT(24),
-                .flags  = PM8606_BACKLIGHT1,
-        },
-        {},
-};
-
-static struct pm860x_led_pdata saarb_led[] = {
-        {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED1_RED,
-        }, {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED1_GREEN,
-        }, {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED1_BLUE,
-        }, {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED2_RED,
-        }, {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED2_GREEN,
-        }, {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED2_BLUE,
-        },
-};
-
-static struct pm860x_platform_data saarb_pm8607_info = {
-        .touch          = &saarb_touch,
-        .backlight      = &saarb_backlight[0],
-        .led            = &saarb_led[0],
-        .companion_addr = 0x10,
-        .irq_mode       = 0,
-        .irq_base       = IRQ_BOARD_START,
-
-        .i2c_port       = GI2C_PORT,
-};
-
-static struct i2c_board_info saarb_i2c_info[] = {
-        {
-                .type           = "88PM860x",
-                .addr           = 0x34,
-                .platform_data  = &saarb_pm8607_info,
-                .irq            = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO83)),
-        },
-};
-
-static void __init saarb_init(void)
-{
-        pxa_set_ffuart_info(NULL);
-        pxa_set_i2c_info(NULL);
-        i2c_register_board_info(0, ARRAY_AND_SIZE(saarb_i2c_info));
-}
-
-MACHINE_START(SAARB, "PXA955 Handheld Platform (aka SAARB)")
-        .atag_offset    = 0x100,
-        .map_io         = pxa3xx_map_io,
-        .nr_irqs        = SAARB_NR_IRQS,
-        .init_irq       = pxa95x_init_irq,
-        .handle_irq     = pxa3xx_handle_irq,
-        .timer          = &pxa_timer,
-        .init_machine   = saarb_init,
-        .restart        = pxa_restart,
-MACHINE_END
-
diff --git a/arch/arm/mach-pxa/tavorevb3.c b/arch/arm/mach-pxa/tavorevb3.c
deleted file mode 100644
index f7d9305cfd77..000000000000
--- a/arch/arm/mach-pxa/tavorevb3.c
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- *  linux/arch/arm/mach-pxa/tavorevb3.c
- *
- *  Support for the Marvell EVB3 Development Platform.
- *
- *  Copyright:  (C) Copyright 2008-2010 Marvell International Ltd.
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License version 2 as
- *  publishhed by the Free Software Foundation.
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-#include <linux/interrupt.h>
-#include <linux/i2c.h>
-#include <linux/i2c/pxa-i2c.h>
-#include <linux/gpio.h>
-#include <linux/mfd/88pm860x.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-
-#include <mach/pxa930.h>
-
-#include "devices.h"
-#include "generic.h"
-
-#define TAVOREVB3_NR_IRQS       (IRQ_BOARD_START + 24)
-
-static mfp_cfg_t evb3_mfp_cfg[] __initdata = {
-        /* UART */
-        GPIO53_UART1_TXD,
-        GPIO54_UART1_RXD,
-
-        /* PMIC */
-        PMIC_INT_GPIO83,
-};
-
-#if defined(CONFIG_I2C_PXA) || defined(CONFIG_I2C_PXA_MODULE)
-static struct pm860x_touch_pdata evb3_touch = {
-        .gpadc_prebias  = 1,
-        .slot_cycle     = 1,
-        .tsi_prebias    = 6,
-        .pen_prebias    = 16,
-        .pen_prechg     = 2,
-        .res_x          = 300,
-};
-
-static struct pm860x_backlight_pdata evb3_backlight[] = {
-        {
-                .id     = PM8606_ID_BACKLIGHT,
-                .iset   = PM8606_WLED_CURRENT(24),
-                .flags  = PM8606_BACKLIGHT1,
-        },
-        {},
-};
-
-static struct pm860x_led_pdata evb3_led[] = {
-        {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED1_RED,
-        }, {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED1_GREEN,
-        }, {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED1_BLUE,
-        }, {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED2_RED,
-        }, {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED2_GREEN,
-        }, {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED2_BLUE,
-        },
-};
-
-static struct pm860x_platform_data evb3_pm8607_info = {
-        .touch                          = &evb3_touch,
-        .backlight                      = &evb3_backlight[0],
-        .led                            = &evb3_led[0],
-        .companion_addr                 = 0x10,
-        .irq_mode                       = 0,
-        .irq_base                       = IRQ_BOARD_START,
-
-        .i2c_port                       = GI2C_PORT,
-};
-
-static struct i2c_board_info evb3_i2c_info[] = {
-        {
-                .type           = "88PM860x",
-                .addr           = 0x34,
-                .platform_data  = &evb3_pm8607_info,
-                .irq            = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO83)),
-        },
-};
-
-static void __init evb3_init_i2c(void)
-{
-        pxa_set_i2c_info(NULL);
-        i2c_register_board_info(0, ARRAY_AND_SIZE(evb3_i2c_info));
-}
-#else
-static inline void evb3_init_i2c(void) {}
-#endif
-
-static void __init evb3_init(void)
-{
-        /* initialize MFP configurations */
-        pxa3xx_mfp_config(ARRAY_AND_SIZE(evb3_mfp_cfg));
-
-        pxa_set_ffuart_info(NULL);
-
-        evb3_init_i2c();
-}
-
-MACHINE_START(TAVOREVB3, "PXA950 Evaluation Board (aka TavorEVB3)")
-        .atag_offset    = 0x100,
-        .map_io         = pxa3xx_map_io,
-        .nr_irqs        = TAVOREVB3_NR_IRQS,
-        .init_irq       = pxa3xx_init_irq,
-        .handle_irq       = pxa3xx_handle_irq,
-        .timer          = &pxa_timer,
-        .init_machine   = evb3_init,
-        .restart        = pxa_restart,
-MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2443.c b/arch/arm/mach-s3c24xx/clock-s3c2443.c
index 7f689ce1be61..bdaba59b42dc 100644
--- a/arch/arm/mach-s3c24xx/clock-s3c2443.c
+++ b/arch/arm/mach-s3c24xx/clock-s3c2443.c
@@ -158,12 +158,6 @@ static struct clk init_clocks_off[] = {
                 .devname        = "s3c2410-spi.0",
                 .parent         = &clk_p,
                 .enable         = s3c2443_clkcon_enable_p,
-                .ctrlbit        = S3C2443_PCLKCON_SPI0,
-        }, {
-                .name           = "spi",
-                .devname        = "s3c2410-spi.1",
-                .parent         = &clk_p,
-                .enable         = s3c2443_clkcon_enable_p,
                 .ctrlbit        = S3C2443_PCLKCON_SPI1,
         }
 };
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c
index 28041e83dc82..1a6f85777449 100644
--- a/arch/arm/mach-s3c64xx/clock.c
+++ b/arch/arm/mach-s3c64xx/clock.c
@@ -138,11 +138,7 @@ static struct clk init_clocks_off[] = {
                 .ctrlbit        = S3C_CLKCON_PCLK_TSADC,
         }, {
                 .name           = "i2c",
-#ifdef CONFIG_S3C_DEV_I2C1
                 .devname        = "s3c2440-i2c.0",
-#else
-                .devname        = "s3c2440-i2c",
-#endif
                 .parent         = &clk_p,
                 .enable         = s3c64xx_pclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_PCLK_IIC,
@@ -319,10 +315,6 @@ static struct clk init_clocks_off[] = {
                 .enable         = s3c64xx_sclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_SCLK_MFC,
         }, {
-                .name           = "cam",
-                .enable         = s3c64xx_sclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_SCLK_CAM,
-        }, {
                 .name           = "sclk_jpeg",
                 .enable         = s3c64xx_sclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_SCLK_JPEG,
@@ -681,15 +673,6 @@ static struct clksrc_sources clkset_audio2 = {
         .nr_sources     = ARRAY_SIZE(clkset_audio2_list),
 };
 
-static struct clk *clkset_camif_list[] = {
-        &clk_h2,
-};
-
-static struct clksrc_sources clkset_camif = {
-        .sources        = clkset_camif_list,
-        .nr_sources     = ARRAY_SIZE(clkset_camif_list),
-};
-
 static struct clksrc_clk clksrcs[] = {
         {
                 .clk    = {
@@ -744,10 +727,9 @@ static struct clksrc_clk clksrcs[] = {
                         .name           = "camera",
                         .ctrlbit        = S3C_CLKCON_SCLK_CAM,
                         .enable         = s3c64xx_sclk_ctrl,
+                        .parent         = &clk_h2,
                 },
                 .reg_div        = { .reg = S3C_CLK_DIV0, .shift = 20, .size = 4  },
-                .reg_src        = { .reg = NULL, .shift = 0, .size = 0  },
-                .sources        = &clkset_camif,
         },
 };
 
diff --git a/arch/arm/mach-s3c64xx/common.c b/arch/arm/mach-s3c64xx/common.c
index be746e33e86c..aef303b8997e 100644
--- a/arch/arm/mach-s3c64xx/common.c
+++ b/arch/arm/mach-s3c64xx/common.c
@@ -155,7 +155,6 @@ void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
         /* initialise the io descriptors we need for initialisation */
         iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc));
         iotable_init(mach_desc, size);
-        init_consistent_dma_size(SZ_8M);
 
         /* detect cpu id */
         s3c64xx_init_cpu();
diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c
index 111e404a81fd..8ae5800e807f 100644
--- a/arch/arm/mach-s5p64x0/common.c
+++ b/arch/arm/mach-s5p64x0/common.c
@@ -187,7 +187,6 @@ void __init s5p6440_map_io(void)
         s5p6440_default_sdhci2();
 
         iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc));
-        init_consistent_dma_size(SZ_8M);
 }
 
 void __init s5p6450_map_io(void)
@@ -202,7 +201,6 @@ void __init s5p6450_map_io(void)
         s5p6450_default_sdhci2();
 
         iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc));
-        init_consistent_dma_size(SZ_8M);
 }
 
 /*
diff --git a/arch/arm/mach-s5pv210/common.c b/arch/arm/mach-s5pv210/common.c
index a0c50efe8145..9dfe93e2624d 100644
--- a/arch/arm/mach-s5pv210/common.c
+++ b/arch/arm/mach-s5pv210/common.c
@@ -169,8 +169,6 @@ void __init s5pv210_init_io(struct map_desc *mach_desc, int size)
 
 void __init s5pv210_map_io(void)
 {
-        init_consistent_dma_size(14 << 20);
-
         /* initialise device information early */
         s5pv210_default_sdhci0();
         s5pv210_default_sdhci1();
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index 55e1dba4ffde..c72b31078c99 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -774,7 +774,6 @@ static void __init goni_pmic_init(void)
 /* MoviNAND */
 static struct s3c_sdhci_platdata goni_hsmmc0_data __initdata = {
         .max_width              = 4,
-        .host_caps2             = MMC_CAP2_BROKEN_VOLTAGE,
         .cd_type                = S3C_SDHCI_CD_PERMANENT,
 };
 
diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
index 11bb1d984197..96f11394c7c0 100644
--- a/arch/arm/mach-shmobile/setup-r8a7740.c
+++ b/arch/arm/mach-shmobile/setup-r8a7740.c
@@ -66,12 +66,6 @@ static struct map_desc r8a7740_io_desc[] __initdata = {
 void __init r8a7740_map_io(void)
 {
         iotable_init(r8a7740_io_desc, ARRAY_SIZE(r8a7740_io_desc));
-
-        /*
-         * DMA memory at 0xff200000 - 0xffdfffff. The default 2MB size isn't
-         * enough to allocate the frame buffer memory.
-         */
-        init_consistent_dma_size(12 << 20);
 }
 
 /* SCIFA0 */
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
index a07954fbcd22..be6f746c97fa 100644
--- a/arch/arm/mach-shmobile/setup-sh7372.c
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -58,12 +58,6 @@ static struct map_desc sh7372_io_desc[] __initdata = {
 void __init sh7372_map_io(void)
 {
         iotable_init(sh7372_io_desc, ARRAY_SIZE(sh7372_io_desc));
-
-        /*
-         * DMA memory at 0xff200000 - 0xffdfffff. The default 2MB size isn't
-         * enough to allocate the frame buffer memory.
-         */
-        init_consistent_dma_size(12 << 20);
 }
 
 /* SCIFA0 */
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 9aa653b3eb32..6cc23cc83509 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -12,10 +12,12 @@ obj-$(CONFIG_CPU_IDLE)			+= cpuidle.o
 obj-$(CONFIG_CPU_IDLE)                  += sleep.o
 obj-$(CONFIG_ARCH_TEGRA_2x_SOC)         += tegra20_clocks.o
 obj-$(CONFIG_ARCH_TEGRA_2x_SOC)         += tegra20_clocks_data.o
+obj-$(CONFIG_ARCH_TEGRA_2x_SOC)         += tegra20_speedo.o
 obj-$(CONFIG_ARCH_TEGRA_2x_SOC)         += tegra2_emc.o
 obj-$(CONFIG_ARCH_TEGRA_2x_SOC)         += sleep-t20.o
 obj-$(CONFIG_ARCH_TEGRA_3x_SOC)         += tegra30_clocks.o
 obj-$(CONFIG_ARCH_TEGRA_3x_SOC)         += tegra30_clocks_data.o
+obj-$(CONFIG_ARCH_TEGRA_3x_SOC)         += tegra30_speedo.o
 obj-$(CONFIG_ARCH_TEGRA_3x_SOC)         += sleep-t30.o
 obj-$(CONFIG_SMP)                       += platsmp.o headsmp.o
 obj-$(CONFIG_SMP)                       += reset.o
diff --git a/arch/arm/mach-tegra/apbio.c b/arch/arm/mach-tegra/apbio.c
index b5015d0f1912..d091675ba376 100644
--- a/arch/arm/mach-tegra/apbio.c
+++ b/arch/arm/mach-tegra/apbio.c
@@ -15,7 +15,6 @@
 
 #include <linux/kernel.h>
 #include <linux/io.h>
-#include <mach/iomap.h>
 #include <linux/of.h>
 #include <linux/dmaengine.h>
 #include <linux/dma-mapping.h>
@@ -24,9 +23,8 @@
 #include <linux/sched.h>
 #include <linux/mutex.h>
 
-#include <mach/dma.h>
-
 #include "apbio.h"
+#include "iomap.h"
 
 #if defined(CONFIG_TEGRA20_APB_DMA)
 static DEFINE_MUTEX(tegra_apb_dma_lock);
@@ -71,7 +69,6 @@ bool tegra_apb_dma_init(void)
 
         dma_sconfig.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
         dma_sconfig.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
-        dma_sconfig.slave_id = TEGRA_DMA_REQ_SEL_CNTR;
         dma_sconfig.src_maxburst = 1;
         dma_sconfig.dst_maxburst = 1;
 
diff --git a/arch/arm/mach-tegra/board-dt-tegra20.c b/arch/arm/mach-tegra/board-dt-tegra20.c
index aa5325cd1c42..734d9cc87f2e 100644
--- a/arch/arm/mach-tegra/board-dt-tegra20.c
+++ b/arch/arm/mach-tegra/board-dt-tegra20.c
@@ -40,12 +40,10 @@
 #include <asm/mach/time.h>
 #include <asm/setup.h>
 
-#include <mach/iomap.h>
-#include <mach/irqs.h>
-
 #include "board.h"
 #include "clock.h"
 #include "common.h"
+#include "iomap.h"
 
 struct tegra_ehci_platform_data tegra_ehci1_pdata = {
         .operating_mode = TEGRA_USB_OTG,
@@ -91,6 +89,17 @@ struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
                        &tegra_ehci3_pdata),
         OF_DEV_AUXDATA("nvidia,tegra20-apbdma", TEGRA_APB_DMA_BASE, "tegra-apbdma", NULL),
         OF_DEV_AUXDATA("nvidia,tegra20-pwm", TEGRA_PWFM_BASE, "tegra-pwm", NULL),
+        OF_DEV_AUXDATA("nvidia,tegra20-sflash", 0x7000c380, "spi", NULL),
+        OF_DEV_AUXDATA("nvidia,tegra20-slink", 0x7000D400, "spi_tegra.0", NULL),
+        OF_DEV_AUXDATA("nvidia,tegra20-slink", 0x7000D600, "spi_tegra.1", NULL),
+        OF_DEV_AUXDATA("nvidia,tegra20-slink", 0x7000D800, "spi_tegra.2", NULL),
+        OF_DEV_AUXDATA("nvidia,tegra20-slink", 0x7000DA00, "spi_tegra.3", NULL),
+        OF_DEV_AUXDATA("nvidia,tegra20-host1x", 0x50000000, "host1x", NULL),
+        OF_DEV_AUXDATA("nvidia,tegra20-dc", 0x54200000, "tegradc.0", NULL),
+        OF_DEV_AUXDATA("nvidia,tegra20-dc", 0x54240000, "tegradc.1", NULL),
+        OF_DEV_AUXDATA("nvidia,tegra20-hdmi", 0x54280000, "hdmi", NULL),
+        OF_DEV_AUXDATA("nvidia,tegra20-dsi", 0x54300000, "dsi", NULL),
+        OF_DEV_AUXDATA("nvidia,tegra20-tvo", 0x542c0000, "tvo", NULL),
         {}
 };
 
@@ -104,8 +113,20 @@ static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
         { "pll_a",      "pll_p_out1",   56448000,       true },
         { "pll_a_out0", "pll_a",        11289600,       true },
         { "cdev1",      NULL,           0,              true },
+        { "blink",      "clk_32k",      32768,          true },
         { "i2s1",       "pll_a_out0",   11289600,       false},
         { "i2s2",       "pll_a_out0",   11289600,       false},
+        { "sdmmc1",     "pll_p",        48000000,       false},
+        { "sdmmc3",     "pll_p",        48000000,       false},
+        { "sdmmc4",     "pll_p",        48000000,       false},
+        { "spi",        "pll_p",        20000000,       false },
+        { "sbc1",       "pll_p",        100000000,      false },
+        { "sbc2",       "pll_p",        100000000,      false },
+        { "sbc3",       "pll_p",        100000000,      false },
+        { "sbc4",       "pll_p",        100000000,      false },
+        { "host1x",     "pll_c",        150000000,      false },
+        { "disp1",      "pll_p",        600000000,      false },
+        { "disp2",      "pll_p",        600000000,      false },
         { NULL,         NULL,           0,              0},
 };
 
diff --git a/arch/arm/mach-tegra/board-dt-tegra30.c b/arch/arm/mach-tegra/board-dt-tegra30.c
index 5e92a81f9a2e..6497d1236b08 100644
--- a/arch/arm/mach-tegra/board-dt-tegra30.c
+++ b/arch/arm/mach-tegra/board-dt-tegra30.c
@@ -33,11 +33,10 @@
 #include <asm/mach/arch.h>
 #include <asm/hardware/gic.h>
 
-#include <mach/iomap.h>
-
 #include "board.h"
 #include "clock.h"
 #include "common.h"
+#include "iomap.h"
 
 struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = {
         OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000000, "sdhci-tegra.0", NULL),
@@ -52,6 +51,18 @@ struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = {
         OF_DEV_AUXDATA("nvidia,tegra30-ahub", 0x70080000, "tegra30-ahub", NULL),
         OF_DEV_AUXDATA("nvidia,tegra30-apbdma", 0x6000a000, "tegra-apbdma", NULL),
         OF_DEV_AUXDATA("nvidia,tegra30-pwm", TEGRA_PWFM_BASE, "tegra-pwm", NULL),
+        OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000D400, "spi_tegra.0", NULL),
+        OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000D600, "spi_tegra.1", NULL),
+        OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000D800, "spi_tegra.2", NULL),
+        OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000DA00, "spi_tegra.3", NULL),
+        OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000DC00, "spi_tegra.4", NULL),
+        OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000DE00, "spi_tegra.5", NULL),
+        OF_DEV_AUXDATA("nvidia,tegra30-host1x", 0x50000000, "host1x", NULL),
+        OF_DEV_AUXDATA("nvidia,tegra30-dc", 0x54200000, "tegradc.0", NULL),
+        OF_DEV_AUXDATA("nvidia,tegra30-dc", 0x54240000, "tegradc.1", NULL),
+        OF_DEV_AUXDATA("nvidia,tegra30-hdmi", 0x54280000, "hdmi", NULL),
+        OF_DEV_AUXDATA("nvidia,tegra30-dsi", 0x54300000, "dsi", NULL),
+        OF_DEV_AUXDATA("nvidia,tegra30-tvo", 0x542c0000, "tvo", NULL),
         {}
 };
 
@@ -62,11 +73,24 @@ static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
         { "pll_a_out0", "pll_a",        11289600,       true },
         { "extern1",    "pll_a_out0",   0,              true },
         { "clk_out_1",  "extern1",      0,              true },
+        { "blink",      "clk_32k",      32768,          true },
         { "i2s0",       "pll_a_out0",   11289600,       false},
         { "i2s1",       "pll_a_out0",   11289600,       false},
         { "i2s2",       "pll_a_out0",   11289600,       false},
         { "i2s3",       "pll_a_out0",   11289600,       false},
         { "i2s4",       "pll_a_out0",   11289600,       false},
+        { "sdmmc1",     "pll_p",        48000000,       false},
+        { "sdmmc3",     "pll_p",        48000000,       false},
+        { "sdmmc4",     "pll_p",        48000000,       false},
+        { "sbc1",       "pll_p",        100000000,      false},
+        { "sbc2",       "pll_p",        100000000,      false},
+        { "sbc3",       "pll_p",        100000000,      false},
+        { "sbc4",       "pll_p",        100000000,      false},
+        { "sbc5",       "pll_p",        100000000,      false},
+        { "sbc6",       "pll_p",        100000000,      false},
+        { "host1x",     "pll_c",        150000000,      false},
+        { "disp1",      "pll_p",        600000000,      false},
+        { "disp2",      "pll_p",        600000000,      false},
         { NULL,         NULL,           0,              0},
 };
 
diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c
index fd82085eca5d..867bf8bf5561 100644
--- a/arch/arm/mach-tegra/clock.c
+++ b/arch/arm/mach-tegra/clock.c
@@ -27,8 +27,6 @@
 #include <linux/seq_file.h>
 #include <linux/slab.h>
 
-#include <mach/clk.h>
-
 #include "board.h"
 #include "clock.h"
 #include "tegra_cpu_car.h"
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index 0b0a5f556d34..3e03e5f15c14 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -26,13 +26,13 @@
 #include <asm/hardware/cache-l2x0.h>
 #include <asm/hardware/gic.h>
 
-#include <mach/iomap.h>
 #include <mach/powergate.h>
 
 #include "board.h"
 #include "clock.h"
 #include "common.h"
 #include "fuse.h"
+#include "iomap.h"
 #include "pmc.h"
 #include "apbio.h"
 #include "sleep.h"
@@ -104,25 +104,26 @@ static __initdata struct tegra_clk_init_table tegra30_clk_init_table[] = {
         { "clk_m",      NULL,           0,              true },
         { "pll_p",      "clk_m",        408000000,      true },
         { "pll_p_out1", "pll_p",        9600000,        true },
+        { "pll_p_out4", "pll_p",        102000000,      true },
+        { "sclk",       "pll_p_out4",   102000000,      true },
+        { "hclk",       "sclk",         102000000,      true },
+        { "pclk",       "hclk",         51000000,       true },
         { NULL,         NULL,           0,              0},
 };
 #endif
 
 
-static void __init tegra_init_cache(u32 tag_latency, u32 data_latency)
+static void __init tegra_init_cache(void)
 {
 #ifdef CONFIG_CACHE_L2X0
         void __iomem *p = IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x3000;
         u32 aux_ctrl, cache_type;
 
-        writel_relaxed(tag_latency, p + L2X0_TAG_LATENCY_CTRL);
-        writel_relaxed(data_latency, p + L2X0_DATA_LATENCY_CTRL);
-
         cache_type = readl(p + L2X0_CACHE_TYPE);
         aux_ctrl = (cache_type & 0x700) << (17-8);
-        aux_ctrl |= 0x6C000001;
+        aux_ctrl |= 0x7C400001;
 
-        l2x0_init(p, aux_ctrl, 0x8200c3fe);
+        l2x0_of_init(aux_ctrl, 0x8200c3fe);
 #endif
 
 }
@@ -134,7 +135,7 @@ void __init tegra20_init_early(void)
         tegra_init_fuse();
         tegra2_init_clocks();
         tegra_clk_init_from_table(tegra20_clk_init_table);
-        tegra_init_cache(0x331, 0x441);
+        tegra_init_cache();
         tegra_pmc_init();
         tegra_powergate_init();
         tegra20_hotplug_init();
@@ -147,7 +148,7 @@ void __init tegra30_init_early(void)
         tegra_init_fuse();
         tegra30_init_clocks();
         tegra_clk_init_from_table(tegra30_clk_init_table);
-        tegra_init_cache(0x441, 0x551);
+        tegra_init_cache();
         tegra_pmc_init();
         tegra_powergate_init();
         tegra30_hotplug_init();
diff --git a/arch/arm/mach-tegra/cpu-tegra.c b/arch/arm/mach-tegra/cpu-tegra.c
index 627bf0f4262e..a74d3c7d2e26 100644
--- a/arch/arm/mach-tegra/cpu-tegra.c
+++ b/arch/arm/mach-tegra/cpu-tegra.c
@@ -30,9 +30,6 @@
 #include <linux/io.h>
 #include <linux/suspend.h>
 
-
-#include <mach/clk.h>
-
 /* Frequency table index must be sequential starting at 0 */
 static struct cpufreq_frequency_table freq_table[] = {
         { 0, 216000 },
diff --git a/arch/arm/mach-tegra/cpuidle.c b/arch/arm/mach-tegra/cpuidle.c
index 566e2f88899b..9a6f051b382e 100644
--- a/arch/arm/mach-tegra/cpuidle.c
+++ b/arch/arm/mach-tegra/cpuidle.c
@@ -29,8 +29,6 @@
 
 #include <asm/proc-fns.h>
 
-#include <mach/iomap.h>
-
 static int tegra_idle_enter_lp3(struct cpuidle_device *dev,
                                 struct cpuidle_driver *drv, int index);
 
diff --git a/arch/arm/mach-tegra/flowctrl.c b/arch/arm/mach-tegra/flowctrl.c
index f07488e0bd32..ffaa286a71e1 100644
--- a/arch/arm/mach-tegra/flowctrl.c
+++ b/arch/arm/mach-tegra/flowctrl.c
@@ -22,9 +22,8 @@
 #include <linux/kernel.h>
 #include <linux/io.h>
 
-#include <mach/iomap.h>
-
 #include "flowctrl.h"
+#include "iomap.h"
 
 u8 flowctrl_offset_halt_cpu[] = {
         FLOW_CTRL_HALT_CPU0_EVENTS,
diff --git a/arch/arm/mach-tegra/fuse.c b/arch/arm/mach-tegra/fuse.c
index 0b7db174a5de..8121742711fe 100644
--- a/arch/arm/mach-tegra/fuse.c
+++ b/arch/arm/mach-tegra/fuse.c
@@ -21,22 +21,28 @@
 #include <linux/io.h>
 #include <linux/export.h>
 
-#include <mach/iomap.h>
-
 #include "fuse.h"
+#include "iomap.h"
 #include "apbio.h"
 
 #define FUSE_UID_LOW            0x108
 #define FUSE_UID_HIGH           0x10c
 #define FUSE_SKU_INFO           0x110
-#define FUSE_SPARE_BIT          0x200
+
+#define TEGRA20_FUSE_SPARE_BIT          0x200
+#define TEGRA30_FUSE_SPARE_BIT          0x244
 
 int tegra_sku_id;
 int tegra_cpu_process_id;
 int tegra_core_process_id;
 int tegra_chip_id;
+int tegra_cpu_speedo_id;                /* only exist in Tegra30 and later */
+int tegra_soc_speedo_id;
 enum tegra_revision tegra_revision;
 
+static int tegra_fuse_spare_bit;
+static void (*tegra_init_speedo_data)(void);
+
 /* The BCT to use at boot is specified by board straps that can be read
  * through a APB misc register and decoded. 2 bits, i.e. 4 possible BCTs.
  */
@@ -57,14 +63,14 @@ static const char *tegra_revision_name[TEGRA_REVISION_MAX] = {
         [TEGRA_REVISION_A04]     = "A04",
 };
 
-static inline u32 tegra_fuse_readl(unsigned long offset)
+u32 tegra_fuse_readl(unsigned long offset)
 {
         return tegra_apb_readl(TEGRA_FUSE_BASE + offset);
 }
 
-static inline bool get_spare_fuse(int bit)
+bool tegra_spare_fuse(int bit)
 {
-        return tegra_fuse_readl(FUSE_SPARE_BIT + bit * 4);
+        return tegra_fuse_readl(tegra_fuse_spare_bit + bit * 4);
 }
 
 static enum tegra_revision tegra_get_revision(u32 id)
@@ -78,7 +84,7 @@ static enum tegra_revision tegra_get_revision(u32 id)
                 return TEGRA_REVISION_A02;
         case 3:
                 if (tegra_chip_id == TEGRA20 &&
-                        (get_spare_fuse(18) || get_spare_fuse(19)))
+                        (tegra_spare_fuse(18) || tegra_spare_fuse(19)))
                         return TEGRA_REVISION_A03p;
                 else
                         return TEGRA_REVISION_A03;
@@ -89,6 +95,16 @@ static enum tegra_revision tegra_get_revision(u32 id)
         }
 }
 
+static void tegra_get_process_id(void)
+{
+        u32 reg;
+
+        reg = tegra_fuse_readl(tegra_fuse_spare_bit);
+        tegra_cpu_process_id = (reg >> 6) & 3;
+        reg = tegra_fuse_readl(tegra_fuse_spare_bit);
+        tegra_core_process_id = (reg >> 12) & 3;
+}
+
 void tegra_init_fuse(void)
 {
         u32 id;
@@ -100,19 +116,29 @@ void tegra_init_fuse(void)
         reg = tegra_fuse_readl(FUSE_SKU_INFO);
         tegra_sku_id = reg & 0xFF;
 
-        reg = tegra_fuse_readl(FUSE_SPARE_BIT);
-        tegra_cpu_process_id = (reg >> 6) & 3;
-
-        reg = tegra_fuse_readl(FUSE_SPARE_BIT);
-        tegra_core_process_id = (reg >> 12) & 3;
-
         reg = tegra_apb_readl(TEGRA_APB_MISC_BASE + STRAP_OPT);
         tegra_bct_strapping = (reg & RAM_ID_MASK) >> RAM_CODE_SHIFT;
 
         id = readl_relaxed(IO_ADDRESS(TEGRA_APB_MISC_BASE) + 0x804);
         tegra_chip_id = (id >> 8) & 0xff;
 
+        switch (tegra_chip_id) {
+        case TEGRA20:
+                tegra_fuse_spare_bit = TEGRA20_FUSE_SPARE_BIT;
+                tegra_init_speedo_data = &tegra20_init_speedo_data;
+                break;
+        case TEGRA30:
+                tegra_fuse_spare_bit = TEGRA30_FUSE_SPARE_BIT;
+                tegra_init_speedo_data = &tegra30_init_speedo_data;
+                break;
+        default:
+                pr_warn("Tegra: unknown chip id %d\n", tegra_chip_id);
+                tegra_fuse_spare_bit = TEGRA20_FUSE_SPARE_BIT;
+                tegra_init_speedo_data = &tegra_get_process_id;
+        }
+
         tegra_revision = tegra_get_revision(id);
+        tegra_init_speedo_data();
 
         pr_info("Tegra Revision: %s SKU: %d CPU Process: %d Core Process: %d\n",
                 tegra_revision_name[tegra_revision],
diff --git a/arch/arm/mach-tegra/fuse.h b/arch/arm/mach-tegra/fuse.h
index d2107b2cb85a..ff1383dd61a7 100644
--- a/arch/arm/mach-tegra/fuse.h
+++ b/arch/arm/mach-tegra/fuse.h
@@ -42,11 +42,27 @@ extern int tegra_sku_id;
 extern int tegra_cpu_process_id;
 extern int tegra_core_process_id;
 extern int tegra_chip_id;
+extern int tegra_cpu_speedo_id;         /* only exist in Tegra30 and later */
+extern int tegra_soc_speedo_id;
 extern enum tegra_revision tegra_revision;
 
 extern int tegra_bct_strapping;
 
 unsigned long long tegra_chip_uid(void);
 void tegra_init_fuse(void);
+bool tegra_spare_fuse(int bit);
+u32 tegra_fuse_readl(unsigned long offset);
+
+#ifdef CONFIG_ARCH_TEGRA_2x_SOC
+void tegra20_init_speedo_data(void);
+#else
+static inline void tegra20_init_speedo_data(void) {}
+#endif
+
+#ifdef CONFIG_ARCH_TEGRA_3x_SOC
+void tegra30_init_speedo_data(void);
+#else
+static inline void tegra30_init_speedo_data(void) {}
+#endif
 
 #endif
diff --git a/arch/arm/mach-tegra/headsmp.S b/arch/arm/mach-tegra/headsmp.S
index 6addc78cb6b2..93f0370cc95b 100644
--- a/arch/arm/mach-tegra/headsmp.S
+++ b/arch/arm/mach-tegra/headsmp.S
@@ -3,9 +3,8 @@
 
 #include <asm/cache.h>
 
-#include <mach/iomap.h>
-
 #include "flowctrl.h"
+#include "iomap.h"
 #include "reset.h"
 #include "sleep.h"
 
diff --git a/arch/arm/mach-tegra/include/mach/debug-macro.S b/arch/arm/mach-tegra/include/mach/debug-macro.S
index 8ce0661b8a3d..44ca7b1d8b8a 100644
--- a/arch/arm/mach-tegra/include/mach/debug-macro.S
+++ b/arch/arm/mach-tegra/include/mach/debug-macro.S
@@ -26,8 +26,8 @@
 
 #include <linux/serial_reg.h>
 
-#include <mach/iomap.h>
-#include <mach/irammap.h>
+#include "../../iomap.h"
+#include "../../irammap.h"
 
                 .macro  addruart, rp, rv, tmp
                 adr     \rp, 99f                @ actual addr of 99f
diff --git a/arch/arm/mach-tegra/include/mach/dma.h b/arch/arm/mach-tegra/include/mach/dma.h
deleted file mode 100644
index 3081cc6dda3b..000000000000
--- a/arch/arm/mach-tegra/include/mach/dma.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * arch/arm/mach-tegra/include/mach/dma.h
- *
- * Copyright (c) 2008-2009, NVIDIA Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
- */
-
-#ifndef __MACH_TEGRA_DMA_H
-#define __MACH_TEGRA_DMA_H
-
-#include <linux/list.h>
-
-#define TEGRA_DMA_REQ_SEL_CNTR                  0
-#define TEGRA_DMA_REQ_SEL_I2S_2                 1
-#define TEGRA_DMA_REQ_SEL_I2S_1                 2
-#define TEGRA_DMA_REQ_SEL_SPD_I                 3
-#define TEGRA_DMA_REQ_SEL_UI_I                  4
-#define TEGRA_DMA_REQ_SEL_MIPI                  5
-#define TEGRA_DMA_REQ_SEL_I2S2_2                6
-#define TEGRA_DMA_REQ_SEL_I2S2_1                7
-#define TEGRA_DMA_REQ_SEL_UARTA                 8
-#define TEGRA_DMA_REQ_SEL_UARTB                 9
-#define TEGRA_DMA_REQ_SEL_UARTC                 10
-#define TEGRA_DMA_REQ_SEL_SPI                   11
-#define TEGRA_DMA_REQ_SEL_AC97                  12
-#define TEGRA_DMA_REQ_SEL_ACMODEM               13
-#define TEGRA_DMA_REQ_SEL_SL4B                  14
-#define TEGRA_DMA_REQ_SEL_SL2B1                 15
-#define TEGRA_DMA_REQ_SEL_SL2B2                 16
-#define TEGRA_DMA_REQ_SEL_SL2B3                 17
-#define TEGRA_DMA_REQ_SEL_SL2B4                 18
-#define TEGRA_DMA_REQ_SEL_UARTD                 19
-#define TEGRA_DMA_REQ_SEL_UARTE                 20
-#define TEGRA_DMA_REQ_SEL_I2C                   21
-#define TEGRA_DMA_REQ_SEL_I2C2                  22
-#define TEGRA_DMA_REQ_SEL_I2C3                  23
-#define TEGRA_DMA_REQ_SEL_DVC_I2C               24
-#define TEGRA_DMA_REQ_SEL_OWR                   25
-#define TEGRA_DMA_REQ_SEL_INVALID               31
-
-#endif
diff --git a/arch/arm/mach-tegra/include/mach/powergate.h b/arch/arm/mach-tegra/include/mach/powergate.h
index 4752b1a68f35..06763fe7529d 100644
--- a/arch/arm/mach-tegra/include/mach/powergate.h
+++ b/arch/arm/mach-tegra/include/mach/powergate.h
@@ -20,6 +20,8 @@
 #ifndef _MACH_TEGRA_POWERGATE_H_
 #define _MACH_TEGRA_POWERGATE_H_
 
+struct clk;
+
 #define TEGRA_POWERGATE_CPU     0
 #define TEGRA_POWERGATE_3D      1
 #define TEGRA_POWERGATE_VENC    2
diff --git a/arch/arm/mach-tegra/include/mach/tegra-ahb.h b/arch/arm/mach-tegra/include/mach/tegra-ahb.h
deleted file mode 100644
index e0f8c84b1d8c..000000000000
--- a/arch/arm/mach-tegra/include/mach/tegra-ahb.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- */
-
-#ifndef __MACH_TEGRA_AHB_H__
-#define __MACH_TEGRA_AHB_H__
-
-extern int tegra_ahb_enable_smmu(struct device_node *ahb);
-
-#endif  /* __MACH_TEGRA_AHB_H__ */
diff --git a/arch/arm/mach-tegra/include/mach/uncompress.h b/arch/arm/mach-tegra/include/mach/uncompress.h
index 937c4c50219e..27725750ca3e 100644
--- a/arch/arm/mach-tegra/include/mach/uncompress.h
+++ b/arch/arm/mach-tegra/include/mach/uncompress.h
@@ -28,8 +28,8 @@
 #include <linux/types.h>
 #include <linux/serial_reg.h>
 
-#include <mach/iomap.h>
-#include <mach/irammap.h>
+#include "../../iomap.h"
+#include "../../irammap.h"
 
 #define BIT(x) (1 << (x))
 #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
diff --git a/arch/arm/mach-tegra/io.c b/arch/arm/mach-tegra/io.c
index 58b4baf9c483..7d09f301b3a1 100644
--- a/arch/arm/mach-tegra/io.c
+++ b/arch/arm/mach-tegra/io.c
@@ -26,9 +26,9 @@
 
 #include <asm/page.h>
 #include <asm/mach/map.h>
-#include <mach/iomap.h>
 
 #include "board.h"
+#include "iomap.h"
 
 static struct map_desc tegra_io_desc[] __initdata = {
         {
diff --git a/arch/arm/mach-tegra/include/mach/iomap.h b/arch/arm/mach-tegra/iomap.h
index fee3a94c4549..53151030a07d 100644
--- a/arch/arm/mach-tegra/include/mach/iomap.h
+++ b/arch/arm/mach-tegra/iomap.h
@@ -1,6 +1,4 @@
 /*
- * arch/arm/mach-tegra/include/mach/iomap.h
- *
  * Copyright (C) 2010 Google, Inc.
  *
  * Author:
diff --git a/arch/arm/mach-tegra/include/mach/irammap.h b/arch/arm/mach-tegra/irammap.h
index 0cbe63261854..0cbe63261854 100644
--- a/arch/arm/mach-tegra/include/mach/irammap.h
+++ b/arch/arm/mach-tegra/irammap.h
diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c
index 2f5bd2db8e1f..b7886f183511 100644
--- a/arch/arm/mach-tegra/irq.c
+++ b/arch/arm/mach-tegra/irq.c
@@ -25,9 +25,8 @@
 
 #include <asm/hardware/gic.h>
 
-#include <mach/iomap.h>
-
 #include "board.h"
+#include "iomap.h"
 
 #define ICTLR_CPU_IEP_VFIQ      0x08
 #define ICTLR_CPU_IEP_FIR       0x14
diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c
index a8dba6489c9b..f18fc3ab4e58 100644
--- a/arch/arm/mach-tegra/pcie.c
+++ b/arch/arm/mach-tegra/pcie.c
@@ -37,11 +37,11 @@
 #include <asm/sizes.h>
 #include <asm/mach/pci.h>
 
-#include <mach/iomap.h>
 #include <mach/clk.h>
 #include <mach/powergate.h>
 
 #include "board.h"
+#include "iomap.h"
 
 /* register definitions */
 #define AFI_OFFSET      0x3800
diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c
index 81cb26591acf..1b926df99c4b 100644
--- a/arch/arm/mach-tegra/platsmp.c
+++ b/arch/arm/mach-tegra/platsmp.c
@@ -24,8 +24,6 @@
 #include <asm/mach-types.h>
 #include <asm/smp_scu.h>
 
-#include <mach/clk.h>
-#include <mach/iomap.h>
 #include <mach/powergate.h>
 
 #include "fuse.h"
@@ -34,6 +32,7 @@
 #include "tegra_cpu_car.h"
 
 #include "common.h"
+#include "iomap.h"
 
 extern void tegra_secondary_startup(void);
 
diff --git a/arch/arm/mach-tegra/pmc.c b/arch/arm/mach-tegra/pmc.c
index 7af6a54404be..d4fdb5fcec20 100644
--- a/arch/arm/mach-tegra/pmc.c
+++ b/arch/arm/mach-tegra/pmc.c
@@ -19,7 +19,7 @@
 #include <linux/io.h>
 #include <linux/of.h>
 
-#include <mach/iomap.h>
+#include "iomap.h"
 
 #define PMC_CTRL                0x0
 #define PMC_CTRL_INTR_LOW       (1 << 17)
diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c
index de0662de28a0..2cc1185d902e 100644
--- a/arch/arm/mach-tegra/powergate.c
+++ b/arch/arm/mach-tegra/powergate.c
@@ -28,10 +28,10 @@
 #include <linux/spinlock.h>
 
 #include <mach/clk.h>
-#include <mach/iomap.h>
 #include <mach/powergate.h>
 
 #include "fuse.h"
+#include "iomap.h"
 
 #define PWRGATE_TOGGLE          0x30
 #define  PWRGATE_TOGGLE_START   (1 << 8)
diff --git a/arch/arm/mach-tegra/reset.c b/arch/arm/mach-tegra/reset.c
index 5beb7ebe2948..e05da7d10c3b 100644
--- a/arch/arm/mach-tegra/reset.c
+++ b/arch/arm/mach-tegra/reset.c
@@ -22,9 +22,8 @@
 #include <asm/cacheflush.h>
 #include <asm/hardware/cache-l2x0.h>
 
-#include <mach/iomap.h>
-#include <mach/irammap.h>
-
+#include "iomap.h"
+#include "irammap.h"
 #include "reset.h"
 #include "fuse.h"
 
diff --git a/arch/arm/mach-tegra/sleep-t20.S b/arch/arm/mach-tegra/sleep-t20.S
index a36ae413e2b8..72ce709799da 100644
--- a/arch/arm/mach-tegra/sleep-t20.S
+++ b/arch/arm/mach-tegra/sleep-t20.S
@@ -22,8 +22,6 @@
 
 #include <asm/assembler.h>
 
-#include <mach/iomap.h>
-
 #include "sleep.h"
 #include "flowctrl.h"
 
diff --git a/arch/arm/mach-tegra/sleep-t30.S b/arch/arm/mach-tegra/sleep-t30.S
index 777d9cee8b90..be7614b7c5cb 100644
--- a/arch/arm/mach-tegra/sleep-t30.S
+++ b/arch/arm/mach-tegra/sleep-t30.S
@@ -18,8 +18,6 @@
 
 #include <asm/assembler.h>
 
-#include <mach/iomap.h>
-
 #include "sleep.h"
 #include "flowctrl.h"
 
diff --git a/arch/arm/mach-tegra/sleep.S b/arch/arm/mach-tegra/sleep.S
index ea81554c4833..08e9481c049e 100644
--- a/arch/arm/mach-tegra/sleep.S
+++ b/arch/arm/mach-tegra/sleep.S
@@ -26,7 +26,7 @@
 
 #include <asm/assembler.h>
 
-#include <mach/iomap.h>
+#include "iomap.h"
 
 #include "flowctrl.h"
 #include "sleep.h"
diff --git a/arch/arm/mach-tegra/sleep.h b/arch/arm/mach-tegra/sleep.h
index e25a7cd703d9..4889b281c5f9 100644
--- a/arch/arm/mach-tegra/sleep.h
+++ b/arch/arm/mach-tegra/sleep.h
@@ -17,7 +17,7 @@
 #ifndef __MACH_TEGRA_SLEEP_H
 #define __MACH_TEGRA_SLEEP_H
 
-#include <mach/iomap.h>
+#include "iomap.h"
 
 #define TEGRA_ARM_PERIF_VIRT (TEGRA_ARM_PERIF_BASE - IO_CPU_PHYS \
                                         + IO_CPU_VIRT)
diff --git a/arch/arm/mach-tegra/tegra20_clocks.c b/arch/arm/mach-tegra/tegra20_clocks.c
index deb873fb12b6..4eb6bc81a87b 100644
--- a/arch/arm/mach-tegra/tegra20_clocks.c
+++ b/arch/arm/mach-tegra/tegra20_clocks.c
@@ -27,10 +27,9 @@
 #include <linux/clkdev.h>
 #include <linux/clk.h>
 
-#include <mach/iomap.h>
-
 #include "clock.h"
 #include "fuse.h"
+#include "iomap.h"
 #include "tegra2_emc.h"
 #include "tegra_cpu_car.h"
 
diff --git a/arch/arm/mach-tegra/tegra20_clocks_data.c b/arch/arm/mach-tegra/tegra20_clocks_data.c
index 8d398a33adf7..a23a0734e352 100644
--- a/arch/arm/mach-tegra/tegra20_clocks_data.c
+++ b/arch/arm/mach-tegra/tegra20_clocks_data.c
@@ -27,8 +27,6 @@
 #include <linux/io.h>
 #include <linux/clk.h>
 
-#include <mach/iomap.h>
-
 #include "clock.h"
 #include "fuse.h"
 #include "tegra2_emc.h"
@@ -248,11 +246,16 @@ static struct clk_pll_freq_table tegra_pll_d_freq_table[] = {
         { 19200000, 216000000, 135, 12, 1, 3},
         { 26000000, 216000000, 216, 26, 1, 4},
 
+        { 12000000, 297000000,  99,  4, 1, 4 },
+        { 12000000, 339000000, 113,  4, 1, 4 },
+
         { 12000000, 594000000, 594, 12, 1, 8},
         { 13000000, 594000000, 594, 13, 1, 8},
         { 19200000, 594000000, 495, 16, 1, 8},
         { 26000000, 594000000, 594, 26, 1, 8},
 
+        { 12000000, 616000000, 616, 12, 1, 8},
+
         { 12000000, 1000000000, 1000, 12, 1, 12},
         { 13000000, 1000000000, 1000, 13, 1, 12},
         { 19200000, 1000000000, 625,  12, 1, 8},
@@ -1038,9 +1041,6 @@ static struct clk_duplicate tegra_clk_duplicates[] = {
         CLK_DUPLICATE("usbd",   "utmip-pad",    NULL),
         CLK_DUPLICATE("usbd",   "tegra-ehci.0", NULL),
         CLK_DUPLICATE("usbd",   "tegra-otg",    NULL),
-        CLK_DUPLICATE("hdmi",   "tegradc.0",    "hdmi"),
-        CLK_DUPLICATE("hdmi",   "tegradc.1",    "hdmi"),
-        CLK_DUPLICATE("host1x", "tegra_grhost", "host1x"),
         CLK_DUPLICATE("2d",     "tegra_grhost", "gr2d"),
         CLK_DUPLICATE("3d",     "tegra_grhost", "gr3d"),
         CLK_DUPLICATE("epp",    "tegra_grhost", "epp"),
@@ -1053,6 +1053,9 @@ static struct clk_duplicate tegra_clk_duplicates[] = {
         CLK_DUPLICATE("pll_p_out3", "tegra-i2c.1", "fast-clk"),
         CLK_DUPLICATE("pll_p_out3", "tegra-i2c.2", "fast-clk"),
         CLK_DUPLICATE("pll_p_out3", "tegra-i2c.3", "fast-clk"),
+        CLK_DUPLICATE("pll_p", "tegradc.0", "parent"),
+        CLK_DUPLICATE("pll_p", "tegradc.1", "parent"),
+        CLK_DUPLICATE("pll_d_out0", "hdmi", "parent"),
 };
 
 #define CLK(dev, con, ck)       \
diff --git a/arch/arm/mach-tegra/tegra20_speedo.c b/arch/arm/mach-tegra/tegra20_speedo.c
new file mode 100644
index 000000000000..fa6eb570623f
--- /dev/null
+++ b/arch/arm/mach-tegra/tegra20_speedo.c
@@ -0,0 +1,109 @@
+/*
+ * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/kernel.h>
+#include <linux/bug.h>
+
+#include "fuse.h"
+
+#define CPU_SPEEDO_LSBIT                20
+#define CPU_SPEEDO_MSBIT                29
+#define CPU_SPEEDO_REDUND_LSBIT         30
+#define CPU_SPEEDO_REDUND_MSBIT         39
+#define CPU_SPEEDO_REDUND_OFFS  (CPU_SPEEDO_REDUND_MSBIT - CPU_SPEEDO_MSBIT)
+
+#define CORE_SPEEDO_LSBIT               40
+#define CORE_SPEEDO_MSBIT               47
+#define CORE_SPEEDO_REDUND_LSBIT        48
+#define CORE_SPEEDO_REDUND_MSBIT        55
+#define CORE_SPEEDO_REDUND_OFFS (CORE_SPEEDO_REDUND_MSBIT - CORE_SPEEDO_MSBIT)
+
+#define SPEEDO_MULT                     4
+
+#define PROCESS_CORNERS_NUM             4
+
+#define SPEEDO_ID_SELECT_0(rev)         ((rev) <= 2)
+#define SPEEDO_ID_SELECT_1(sku)         \
+        (((sku) != 20) && ((sku) != 23) && ((sku) != 24) && \
+         ((sku) != 27) && ((sku) != 28))
+
+enum {
+        SPEEDO_ID_0,
+        SPEEDO_ID_1,
+        SPEEDO_ID_2,
+        SPEEDO_ID_COUNT,
+};
+
+static const u32 cpu_process_speedos[][PROCESS_CORNERS_NUM] = {
+        {315, 366, 420, UINT_MAX},
+        {303, 368, 419, UINT_MAX},
+        {316, 331, 383, UINT_MAX},
+};
+
+static const u32 core_process_speedos[][PROCESS_CORNERS_NUM] = {
+        {165, 195, 224, UINT_MAX},
+        {165, 195, 224, UINT_MAX},
+        {165, 195, 224, UINT_MAX},
+};
+
+void tegra20_init_speedo_data(void)
+{
+        u32 reg;
+        u32 val;
+        int i;
+
+        BUILD_BUG_ON(ARRAY_SIZE(cpu_process_speedos) != SPEEDO_ID_COUNT);
+        BUILD_BUG_ON(ARRAY_SIZE(core_process_speedos) != SPEEDO_ID_COUNT);
+
+        if (SPEEDO_ID_SELECT_0(tegra_revision))
+                tegra_soc_speedo_id = SPEEDO_ID_0;
+        else if (SPEEDO_ID_SELECT_1(tegra_sku_id))
+                tegra_soc_speedo_id = SPEEDO_ID_1;
+        else
+                tegra_soc_speedo_id = SPEEDO_ID_2;
+
+        val = 0;
+        for (i = CPU_SPEEDO_MSBIT; i >= CPU_SPEEDO_LSBIT; i--) {
+                reg = tegra_spare_fuse(i) |
+                        tegra_spare_fuse(i + CPU_SPEEDO_REDUND_OFFS);
+                val = (val << 1) | (reg & 0x1);
+        }
+        val = val * SPEEDO_MULT;
+        pr_debug("%s CPU speedo value %u\n", __func__, val);
+
+        for (i = 0; i < (PROCESS_CORNERS_NUM - 1); i++) {
+                if (val <= cpu_process_speedos[tegra_soc_speedo_id][i])
+                        break;
+        }
+        tegra_cpu_process_id = i;
+
+        val = 0;
+        for (i = CORE_SPEEDO_MSBIT; i >= CORE_SPEEDO_LSBIT; i--) {
+                reg = tegra_spare_fuse(i) |
+                        tegra_spare_fuse(i + CORE_SPEEDO_REDUND_OFFS);
+                val = (val << 1) | (reg & 0x1);
+        }
+        val = val * SPEEDO_MULT;
+        pr_debug("%s Core speedo value %u\n", __func__, val);
+
+        for (i = 0; i < (PROCESS_CORNERS_NUM - 1); i++) {
+                if (val <= core_process_speedos[tegra_soc_speedo_id][i])
+                        break;
+        }
+        tegra_core_process_id = i;
+
+        pr_info("Tegra20 Soc Speedo ID %d", tegra_soc_speedo_id);
+}
diff --git a/arch/arm/mach-tegra/tegra2_emc.c b/arch/arm/mach-tegra/tegra2_emc.c
index 5070d833bdd1..837c7b9ea63b 100644
--- a/arch/arm/mach-tegra/tegra2_emc.c
+++ b/arch/arm/mach-tegra/tegra2_emc.c
@@ -25,8 +25,6 @@
 #include <linux/platform_device.h>
 #include <linux/platform_data/tegra_emc.h>
 
-#include <mach/iomap.h>
-
 #include "tegra2_emc.h"
 #include "fuse.h"
 
diff --git a/arch/arm/mach-tegra/tegra30_clocks.c b/arch/arm/mach-tegra/tegra30_clocks.c
index e9de5dfd94ec..f5b453f4bf4d 100644
--- a/arch/arm/mach-tegra/tegra30_clocks.c
+++ b/arch/arm/mach-tegra/tegra30_clocks.c
@@ -31,10 +31,9 @@
 
 #include <asm/clkdev.h>
 
-#include <mach/iomap.h>
-
 #include "clock.h"
 #include "fuse.h"
+#include "iomap.h"
 #include "tegra_cpu_car.h"
 
 #define USE_PLL_LOCK_BITS 0
@@ -792,6 +791,112 @@ struct clk_ops tegra30_twd_ops = {
         .recalc_rate = tegra30_twd_clk_recalc_rate,
 };
 
+/* bus clock functions */
+static int tegra30_bus_clk_is_enabled(struct clk_hw *hw)
+{
+        struct clk_tegra *c = to_clk_tegra(hw);
+        u32 val = clk_readl(c->reg);
+
+        c->state = ((val >> c->reg_shift) & BUS_CLK_DISABLE) ? OFF : ON;
+        return c->state;
+}
+
+static int tegra30_bus_clk_enable(struct clk_hw *hw)
+{
+        struct clk_tegra *c = to_clk_tegra(hw);
+        u32 val;
+
+        val = clk_readl(c->reg);
+        val &= ~(BUS_CLK_DISABLE << c->reg_shift);
+        clk_writel(val, c->reg);
+
+        return 0;
+}
+
+static void tegra30_bus_clk_disable(struct clk_hw *hw)
+{
+        struct clk_tegra *c = to_clk_tegra(hw);
+        u32 val;
+
+        val = clk_readl(c->reg);
+        val |= BUS_CLK_DISABLE << c->reg_shift;
+        clk_writel(val, c->reg);
+}
+
+static unsigned long tegra30_bus_clk_recalc_rate(struct clk_hw *hw,
+                        unsigned long prate)
+{
+        struct clk_tegra *c = to_clk_tegra(hw);
+        u32 val = clk_readl(c->reg);
+        u64 rate = prate;
+
+        c->div = ((val >> c->reg_shift) & BUS_CLK_DIV_MASK) + 1;
+        c->mul = 1;
+
+        if (c->mul != 0 && c->div != 0) {
+                rate *= c->mul;
+                rate += c->div - 1; /* round up */
+                do_div(rate, c->div);
+        }
+        return rate;
+}
+
+static int tegra30_bus_clk_set_rate(struct clk_hw *hw, unsigned long rate,
+                unsigned long parent_rate)
+{
+        struct clk_tegra *c = to_clk_tegra(hw);
+        int ret = -EINVAL;
+        u32 val;
+        int i;
+
+        val = clk_readl(c->reg);
+        for (i = 1; i <= 4; i++) {
+                if (rate == parent_rate / i) {
+                        val &= ~(BUS_CLK_DIV_MASK << c->reg_shift);
+                        val |= (i - 1) << c->reg_shift;
+                        clk_writel(val, c->reg);
+                        c->div = i;
+                        c->mul = 1;
+                        ret = 0;
+                        break;
+                }
+        }
+
+        return ret;
+}
+
+static long tegra30_bus_clk_round_rate(struct clk_hw *hw, unsigned long rate,
+                                unsigned long *prate)
+{
+        unsigned long parent_rate = *prate;
+        s64 divider;
+
+        if (rate >= parent_rate)
+                return parent_rate;
+
+        divider = parent_rate;
+        divider += rate - 1;
+        do_div(divider, rate);
+
+        if (divider < 0)
+                return divider;
+
+        if (divider > 4)
+                divider = 4;
+        do_div(parent_rate, divider);
+
+        return parent_rate;
+}
+
+struct clk_ops tegra30_bus_ops = {
+        .is_enabled = tegra30_bus_clk_is_enabled,
+        .enable = tegra30_bus_clk_enable,
+        .disable = tegra30_bus_clk_disable,
+        .set_rate = tegra30_bus_clk_set_rate,
+        .round_rate = tegra30_bus_clk_round_rate,
+        .recalc_rate = tegra30_bus_clk_recalc_rate,
+};
+
 /* Blink output functions */
 static int tegra30_blink_clk_is_enabled(struct clk_hw *hw)
 {
diff --git a/arch/arm/mach-tegra/tegra30_clocks.h b/arch/arm/mach-tegra/tegra30_clocks.h
index f2f88fef6b8b..7a34adb2f72d 100644
--- a/arch/arm/mach-tegra/tegra30_clocks.h
+++ b/arch/arm/mach-tegra/tegra30_clocks.h
@@ -34,6 +34,7 @@ extern struct clk_ops tegra_clk_out_ops;
 extern struct clk_ops tegra30_super_ops;
 extern struct clk_ops tegra30_blink_clk_ops;
 extern struct clk_ops tegra30_twd_ops;
+extern struct clk_ops tegra30_bus_ops;
 extern struct clk_ops tegra30_periph_clk_ops;
 extern struct clk_ops tegra30_dsib_clk_ops;
 extern struct clk_ops tegra_nand_clk_ops;
diff --git a/arch/arm/mach-tegra/tegra30_clocks_data.c b/arch/arm/mach-tegra/tegra30_clocks_data.c
index 3d2e5532a9ea..6942c7add3bb 100644
--- a/arch/arm/mach-tegra/tegra30_clocks_data.c
+++ b/arch/arm/mach-tegra/tegra30_clocks_data.c
@@ -711,6 +711,50 @@ static struct clk tegra_clk_sclk = {
         .num_parents = ARRAY_SIZE(mux_sclk),
 };
 
+static const char *tegra_hclk_parent_names[] = {
+        "tegra_sclk",
+};
+
+static struct clk *tegra_hclk_parents[] = {
+        &tegra_clk_sclk,
+};
+
+static struct clk tegra_hclk;
+static struct clk_tegra tegra_hclk_hw = {
+        .hw = {
+                .clk = &tegra_hclk,
+        },
+        .flags = DIV_BUS,
+        .reg = 0x30,
+        .reg_shift = 4,
+        .max_rate = 378000000,
+        .min_rate = 12000000,
+};
+DEFINE_CLK_TEGRA(hclk, 0, &tegra30_bus_ops, 0, tegra_hclk_parent_names,
+                tegra_hclk_parents, &tegra_clk_sclk);
+
+static const char *tegra_pclk_parent_names[] = {
+        "tegra_hclk",
+};
+
+static struct clk *tegra_pclk_parents[] = {
+        &tegra_hclk,
+};
+
+static struct clk tegra_pclk;
+static struct clk_tegra tegra_pclk_hw = {
+        .hw = {
+                .clk = &tegra_pclk,
+        },
+        .flags = DIV_BUS,
+        .reg = 0x30,
+        .reg_shift = 0,
+        .max_rate = 167000000,
+        .min_rate = 12000000,
+};
+DEFINE_CLK_TEGRA(pclk, 0, &tegra30_bus_ops, 0, tegra_pclk_parent_names,
+                tegra_pclk_parents, &tegra_hclk);
+
 static const char *mux_blink[] = {
         "clk_32k",
 };
@@ -1254,8 +1298,6 @@ struct clk_duplicate tegra_clk_duplicates[] = {
         CLK_DUPLICATE("usbd", "utmip-pad", NULL),
         CLK_DUPLICATE("usbd", "tegra-ehci.0", NULL),
         CLK_DUPLICATE("usbd", "tegra-otg", NULL),
-        CLK_DUPLICATE("hdmi", "tegradc.0", "hdmi"),
-        CLK_DUPLICATE("hdmi", "tegradc.1", "hdmi"),
         CLK_DUPLICATE("dsib", "tegradc.0", "dsib"),
         CLK_DUPLICATE("dsia", "tegradc.1", "dsia"),
         CLK_DUPLICATE("bsev", "tegra-avp", "bsev"),
@@ -1293,6 +1335,9 @@ struct clk_duplicate tegra_clk_duplicates[] = {
         CLK_DUPLICATE("pll_p_out3", "tegra-i2c.2", "fast-clk"),
         CLK_DUPLICATE("pll_p_out3", "tegra-i2c.3", "fast-clk"),
         CLK_DUPLICATE("pll_p_out3", "tegra-i2c.4", "fast-clk"),
+        CLK_DUPLICATE("pll_p", "tegradc.0", "parent"),
+        CLK_DUPLICATE("pll_p", "tegradc.1", "parent"),
+        CLK_DUPLICATE("pll_d2_out0", "hdmi", "parent"),
 };
 
 struct clk *tegra_ptr_clks[] = {
@@ -1325,6 +1370,8 @@ struct clk *tegra_ptr_clks[] = {
         &tegra_cml1,
         &tegra_pciex,
         &tegra_clk_sclk,
+        &tegra_hclk,
+        &tegra_pclk,
         &tegra_clk_blink,
         &tegra30_clk_twd,
 };
diff --git a/arch/arm/mach-tegra/tegra30_speedo.c b/arch/arm/mach-tegra/tegra30_speedo.c
new file mode 100644
index 000000000000..125cb16424a6
--- /dev/null
+++ b/arch/arm/mach-tegra/tegra30_speedo.c
@@ -0,0 +1,292 @@
+/*
+ * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/kernel.h>
+#include <linux/bug.h>
+
+#include "fuse.h"
+
+#define CORE_PROCESS_CORNERS_NUM        1
+#define CPU_PROCESS_CORNERS_NUM         6
+
+#define FUSE_SPEEDO_CALIB_0     0x114
+#define FUSE_PACKAGE_INFO       0X1FC
+#define FUSE_TEST_PROG_VER      0X128
+
+#define G_SPEEDO_BIT_MINUS1     58
+#define G_SPEEDO_BIT_MINUS1_R   59
+#define G_SPEEDO_BIT_MINUS2     60
+#define G_SPEEDO_BIT_MINUS2_R   61
+#define LP_SPEEDO_BIT_MINUS1    62
+#define LP_SPEEDO_BIT_MINUS1_R  63
+#define LP_SPEEDO_BIT_MINUS2    64
+#define LP_SPEEDO_BIT_MINUS2_R  65
+
+enum {
+        THRESHOLD_INDEX_0,
+        THRESHOLD_INDEX_1,
+        THRESHOLD_INDEX_2,
+        THRESHOLD_INDEX_3,
+        THRESHOLD_INDEX_4,
+        THRESHOLD_INDEX_5,
+        THRESHOLD_INDEX_6,
+        THRESHOLD_INDEX_7,
+        THRESHOLD_INDEX_8,
+        THRESHOLD_INDEX_9,
+        THRESHOLD_INDEX_10,
+        THRESHOLD_INDEX_11,
+        THRESHOLD_INDEX_COUNT,
+};
+
+static const u32 core_process_speedos[][CORE_PROCESS_CORNERS_NUM] = {
+        {180},
+        {170},
+        {195},
+        {180},
+        {168},
+        {192},
+        {180},
+        {170},
+        {195},
+        {180},
+        {180},
+        {180},
+};
+
+static const u32 cpu_process_speedos[][CPU_PROCESS_CORNERS_NUM] = {
+        {306, 338, 360, 376, UINT_MAX},
+        {295, 336, 358, 375, UINT_MAX},
+        {325, 325, 358, 375, UINT_MAX},
+        {325, 325, 358, 375, UINT_MAX},
+        {292, 324, 348, 364, UINT_MAX},
+        {324, 324, 348, 364, UINT_MAX},
+        {324, 324, 348, 364, UINT_MAX},
+        {295, 336, 358, 375, UINT_MAX},
+        {358, 358, 358, 358, 397, UINT_MAX},
+        {364, 364, 364, 364, 397, UINT_MAX},
+        {295, 336, 358, 375, 391, UINT_MAX},
+        {295, 336, 358, 375, 391, UINT_MAX},
+};
+
+static int threshold_index;
+static int package_id;
+
+static void fuse_speedo_calib(u32 *speedo_g, u32 *speedo_lp)
+{
+        u32 reg;
+        int ate_ver;
+        int bit_minus1;
+        int bit_minus2;
+
+        reg = tegra_fuse_readl(FUSE_SPEEDO_CALIB_0);
+
+        *speedo_lp = (reg & 0xFFFF) * 4;
+        *speedo_g = ((reg >> 16) & 0xFFFF) * 4;
+
+        ate_ver = tegra_fuse_readl(FUSE_TEST_PROG_VER);
+        pr_info("%s: ATE prog ver %d.%d\n", __func__, ate_ver/10, ate_ver%10);
+
+        if (ate_ver >= 26) {
+                bit_minus1 = tegra_spare_fuse(LP_SPEEDO_BIT_MINUS1);
+                bit_minus1 |= tegra_spare_fuse(LP_SPEEDO_BIT_MINUS1_R);
+                bit_minus2 = tegra_spare_fuse(LP_SPEEDO_BIT_MINUS2);
+                bit_minus2 |= tegra_spare_fuse(LP_SPEEDO_BIT_MINUS2_R);
+                *speedo_lp |= (bit_minus1 << 1) | bit_minus2;
+
+                bit_minus1 = tegra_spare_fuse(G_SPEEDO_BIT_MINUS1);
+                bit_minus1 |= tegra_spare_fuse(G_SPEEDO_BIT_MINUS1_R);
+                bit_minus2 = tegra_spare_fuse(G_SPEEDO_BIT_MINUS2);
+                bit_minus2 |= tegra_spare_fuse(G_SPEEDO_BIT_MINUS2_R);
+                *speedo_g |= (bit_minus1 << 1) | bit_minus2;
+        } else {
+                *speedo_lp |= 0x3;
+                *speedo_g |= 0x3;
+        }
+}
+
+static void rev_sku_to_speedo_ids(int rev, int sku)
+{
+        switch (rev) {
+        case TEGRA_REVISION_A01:
+                tegra_cpu_speedo_id = 0;
+                tegra_soc_speedo_id = 0;
+                threshold_index = THRESHOLD_INDEX_0;
+                break;
+        case TEGRA_REVISION_A02:
+        case TEGRA_REVISION_A03:
+                switch (sku) {
+                case 0x87:
+                case 0x82:
+                        tegra_cpu_speedo_id = 1;
+                        tegra_soc_speedo_id = 1;
+                        threshold_index = THRESHOLD_INDEX_1;
+                        break;
+                case 0x81:
+                        switch (package_id) {
+                        case 1:
+                                tegra_cpu_speedo_id = 2;
+                                tegra_soc_speedo_id = 2;
+                                threshold_index = THRESHOLD_INDEX_2;
+                                break;
+                        case 2:
+                                tegra_cpu_speedo_id = 4;
+                                tegra_soc_speedo_id = 1;
+                                threshold_index = THRESHOLD_INDEX_7;
+                                break;
+                        default:
+                                pr_err("Tegra30: Unknown pkg %d\n", package_id);
+                                BUG();
+                                break;
+                        }
+                        break;
+                case 0x80:
+                        switch (package_id) {
+                        case 1:
+                                tegra_cpu_speedo_id = 5;
+                                tegra_soc_speedo_id = 2;
+                                threshold_index = THRESHOLD_INDEX_8;
+                                break;
+                        case 2:
+                                tegra_cpu_speedo_id = 6;
+                                tegra_soc_speedo_id = 2;
+                                threshold_index = THRESHOLD_INDEX_9;
+                                break;
+                        default:
+                                pr_err("Tegra30: Unknown pkg %d\n", package_id);
+                                BUG();
+                                break;
+                        }
+                        break;
+                case 0x83:
+                        switch (package_id) {
+                        case 1:
+                                tegra_cpu_speedo_id = 7;
+                                tegra_soc_speedo_id = 1;
+                                threshold_index = THRESHOLD_INDEX_10;
+                                break;
+                        case 2:
+                                tegra_cpu_speedo_id = 3;
+                                tegra_soc_speedo_id = 2;
+                                threshold_index = THRESHOLD_INDEX_3;
+                                break;
+                        default:
+                                pr_err("Tegra30: Unknown pkg %d\n", package_id);
+                                BUG();
+                                break;
+                        }
+                        break;
+                case 0x8F:
+                        tegra_cpu_speedo_id = 8;
+                        tegra_soc_speedo_id = 1;
+                        threshold_index = THRESHOLD_INDEX_11;
+                        break;
+                case 0x08:
+                        tegra_cpu_speedo_id = 1;
+                        tegra_soc_speedo_id = 1;
+                        threshold_index = THRESHOLD_INDEX_4;
+                        break;
+                case 0x02:
+                        tegra_cpu_speedo_id = 2;
+                        tegra_soc_speedo_id = 2;
+                        threshold_index = THRESHOLD_INDEX_5;
+                        break;
+                case 0x04:
+                        tegra_cpu_speedo_id = 3;
+                        tegra_soc_speedo_id = 2;
+                        threshold_index = THRESHOLD_INDEX_6;
+                        break;
+                case 0:
+                        switch (package_id) {
+                        case 1:
+                                tegra_cpu_speedo_id = 2;
+                                tegra_soc_speedo_id = 2;
+                                threshold_index = THRESHOLD_INDEX_2;
+                                break;
+                        case 2:
+                                tegra_cpu_speedo_id = 3;
+                                tegra_soc_speedo_id = 2;
+                                threshold_index = THRESHOLD_INDEX_3;
+                                break;
+                        default:
+                                pr_err("Tegra30: Unknown pkg %d\n", package_id);
+                                BUG();
+                                break;
+                        }
+                        break;
+                default:
+                        pr_warn("Tegra30: Unknown SKU %d\n", sku);
+                        tegra_cpu_speedo_id = 0;
+                        tegra_soc_speedo_id = 0;
+                        threshold_index = THRESHOLD_INDEX_0;
+                        break;
+                }
+                break;
+        default:
+                pr_warn("Tegra30: Unknown chip rev %d\n", rev);
+                tegra_cpu_speedo_id = 0;
+                tegra_soc_speedo_id = 0;
+                threshold_index = THRESHOLD_INDEX_0;
+                break;
+        }
+}
+
+void tegra30_init_speedo_data(void)
+{
+        u32 cpu_speedo_val;
+        u32 core_speedo_val;
+        int i;
+
+        BUILD_BUG_ON(ARRAY_SIZE(cpu_process_speedos) !=
+                        THRESHOLD_INDEX_COUNT);
+        BUILD_BUG_ON(ARRAY_SIZE(core_process_speedos) !=
+                        THRESHOLD_INDEX_COUNT);
+
+        package_id = tegra_fuse_readl(FUSE_PACKAGE_INFO) & 0x0F;
+
+        rev_sku_to_speedo_ids(tegra_revision, tegra_sku_id);
+        fuse_speedo_calib(&cpu_speedo_val, &core_speedo_val);
+        pr_debug("%s CPU speedo value %u\n", __func__, cpu_speedo_val);
+        pr_debug("%s Core speedo value %u\n", __func__, core_speedo_val);
+
+        for (i = 0; i < CPU_PROCESS_CORNERS_NUM; i++) {
+                if (cpu_speedo_val < cpu_process_speedos[threshold_index][i])
+                        break;
+        }
+        tegra_cpu_process_id = i - 1;
+
+        if (tegra_cpu_process_id == -1) {
+                pr_warn("Tegra30: CPU speedo value %3d out of range",
+                       cpu_speedo_val);
+                tegra_cpu_process_id = 0;
+                tegra_cpu_speedo_id = 1;
+        }
+
+        for (i = 0; i < CORE_PROCESS_CORNERS_NUM; i++) {
+                if (core_speedo_val < core_process_speedos[threshold_index][i])
+                        break;
+        }
+        tegra_core_process_id = i - 1;
+
+        if (tegra_core_process_id == -1) {
+                pr_warn("Tegra30: CORE speedo value %3d out of range",
+                       core_speedo_val);
+                tegra_core_process_id = 0;
+                tegra_soc_speedo_id = 1;
+        }
+
+        pr_info("Tegra30: CPU Speedo ID %d, Soc Speedo ID %d",
+                tegra_cpu_speedo_id, tegra_soc_speedo_id);
+}
diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c
index d3b8c8e7368f..6ff503536512 100644
--- a/arch/arm/mach-tegra/timer.c
+++ b/arch/arm/mach-tegra/timer.c
@@ -31,11 +31,11 @@
 #include <asm/smp_twd.h>
 #include <asm/sched_clock.h>
 
-#include <mach/iomap.h>
 #include <mach/irqs.h>
 
 #include "board.h"
 #include "clock.h"
+#include "iomap.h"
 
 #define RTC_SECONDS            0x08
 #define RTC_SHADOW_SECONDS     0x0c
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index b8efac4daed8..d8632ebb1eaf 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -82,8 +82,6 @@ static struct map_desc u300_io_desc[] __initdata = {
 static void __init u300_map_io(void)
 {
         iotable_init(u300_io_desc, ARRAY_SIZE(u300_io_desc));
-        /* We enable a real big DMA buffer if need be. */
-        init_consistent_dma_size(SZ_4M);
 }
 
 /*
diff --git a/arch/arm/mach-ux500/board-mop500-audio.c b/arch/arm/mach-ux500/board-mop500-audio.c
index 070629a95625..7adbed5df8a1 100644
--- a/arch/arm/mach-ux500/board-mop500-audio.c
+++ b/arch/arm/mach-ux500/board-mop500-audio.c
@@ -150,15 +150,6 @@ static struct platform_device snd_soc_mop500 = {
         },
 };
 
-/* Platform device for Ux500-PCM */
-static struct platform_device ux500_pcm = {
-                .name = "ux500-pcm",
-                .id = 0,
-                .dev = {
-                        .platform_data = NULL,
-                },
-};
-
 struct msp_i2s_platform_data msp2_platform_data = {
         .id = MSP_I2S_2,
         .msp_i2s_dma_rx = &msp2_dma_rx,
@@ -186,10 +177,3 @@ void mop500_audio_init(struct device *parent)
         db8500_add_msp_i2s(parent, 3, U8500_MSP3_BASE, IRQ_DB8500_MSP1,
                            &msp3_platform_data);
 }
-
-/* Due for removal once the MSP driver has been fully DT:ed. */
-void mop500_of_audio_init(struct device *parent)
-{
-        pr_info("%s: Register platform-device 'ux500-pcm'\n", __func__);
-        platform_device_register(&ux500_pcm);
-}
diff --git a/arch/arm/mach-ux500/board-mop500-stuib.c b/arch/arm/mach-ux500/board-mop500-stuib.c
index 8c979770d872..564f57d5d8a7 100644
--- a/arch/arm/mach-ux500/board-mop500-stuib.c
+++ b/arch/arm/mach-ux500/board-mop500-stuib.c
@@ -162,18 +162,6 @@ static struct bu21013_platform_device tsc_plat_device = {
         .y_flip = true,
 };
 
-static struct bu21013_platform_device tsc_plat2_device = {
-        .cs_en = bu21013_gpio_board_init,
-        .cs_dis = bu21013_gpio_board_exit,
-        .irq_read_val = bu21013_read_pin_val,
-        .irq = NOMADIK_GPIO_TO_IRQ(TOUCH_GPIO_PIN),
-        .touch_x_max = TOUCH_XMAX,
-        .touch_y_max = TOUCH_YMAX,
-        .ext_clk = false,
-        .x_flip = false,
-        .y_flip = true,
-};
-
 static struct i2c_board_info __initdata u8500_i2c3_devices_stuib[] = {
         {
                 I2C_BOARD_INFO("bu21013_tp", 0x5C),
@@ -181,21 +169,17 @@ static struct i2c_board_info __initdata u8500_i2c3_devices_stuib[] = {
         },
         {
                 I2C_BOARD_INFO("bu21013_tp", 0x5D),
-                .platform_data = &tsc_plat2_device,
+                .platform_data = &tsc_plat_device,
         },
 
 };
 
 void __init mop500_stuib_init(void)
 {
-        if (machine_is_hrefv60()) {
+        if (machine_is_hrefv60())
                 tsc_plat_device.cs_pin = HREFV60_TOUCH_RST_GPIO;
-                tsc_plat2_device.cs_pin = HREFV60_TOUCH_RST_GPIO;
-        } else {
+        else
                 tsc_plat_device.cs_pin = GPIO_BU21013_CS;
-                tsc_plat2_device.cs_pin = GPIO_BU21013_CS;
-
-        }
 
         mop500_uib_i2c_add(0, mop500_i2c0_devices_stuib,
                         ARRAY_SIZE(mop500_i2c0_devices_stuib));
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index 416d436111f2..daa4237ac0dc 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -33,8 +33,6 @@
 #include <linux/smsc911x.h>
 #include <linux/gpio_keys.h>
 #include <linux/delay.h>
-#include <linux/of.h>
-#include <linux/of_platform.h>
 #include <linux/leds.h>
 #include <linux/pinctrl/consumer.h>
 
@@ -464,7 +462,7 @@ static struct stedma40_chan_cfg ssp0_dma_cfg_tx = {
 };
 #endif
 
-static struct pl022_ssp_controller ssp0_plat = {
+struct pl022_ssp_controller ssp0_plat = {
         .bus_id = 0,
 #ifdef CONFIG_STE_DMA40
         .enable_dma = 1,
@@ -541,7 +539,7 @@ static struct stedma40_chan_cfg uart2_dma_cfg_tx = {
 };
 #endif
 
-static struct amba_pl011_data uart0_plat = {
+struct amba_pl011_data uart0_plat = {
 #ifdef CONFIG_STE_DMA40
         .dma_filter = stedma40_filter,
         .dma_rx_param = &uart0_dma_cfg_rx,
@@ -549,7 +547,7 @@ static struct amba_pl011_data uart0_plat = {
 #endif
 };
 
-static struct amba_pl011_data uart1_plat = {
+struct amba_pl011_data uart1_plat = {
 #ifdef CONFIG_STE_DMA40
         .dma_filter = stedma40_filter,
         .dma_rx_param = &uart1_dma_cfg_rx,
@@ -557,7 +555,7 @@ static struct amba_pl011_data uart1_plat = {
 #endif
 };
 
-static struct amba_pl011_data uart2_plat = {
+struct amba_pl011_data uart2_plat = {
 #ifdef CONFIG_STE_DMA40
         .dma_filter = stedma40_filter,
         .dma_rx_param = &uart2_dma_cfg_rx,
@@ -618,8 +616,6 @@ static void __init mop500_init_machine(void)
 
         /* This board has full regulator constraints */
         regulator_has_full_constraints();
-
-        mop500_uib_init();
 }
 
 static void __init snowball_init_machine(void)
@@ -684,8 +680,6 @@ static void __init hrefv60_init_machine(void)
 
         /* This board has full regulator constraints */
         regulator_has_full_constraints();
-
-        mop500_uib_init();
 }
 
 MACHINE_START(U8500, "ST-Ericsson MOP500 platform")
@@ -721,135 +715,5 @@ MACHINE_START(SNOWBALL, "Calao Systems Snowball platform")
         .timer          = &ux500_timer,
         .handle_irq     = gic_handle_irq,
         .init_machine   = snowball_init_machine,
-        .init_late      = ux500_init_late,
-MACHINE_END
-
-#ifdef CONFIG_MACH_UX500_DT
-
-struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
-        /* Requires call-back bindings. */
-        OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata),
-        /* Requires DMA and call-back bindings. */
-        OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat),
-        OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat),
-        OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat),
-        /* Requires DMA bindings. */
-        OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0",  &ssp0_plat),
-        OF_DEV_AUXDATA("arm,pl18x", 0x80126000, "sdi0",  &mop500_sdi0_data),
-        OF_DEV_AUXDATA("arm,pl18x", 0x80118000, "sdi1",  &mop500_sdi1_data),
-        OF_DEV_AUXDATA("arm,pl18x", 0x80005000, "sdi2",  &mop500_sdi2_data),
-        OF_DEV_AUXDATA("arm,pl18x", 0x80114000, "sdi4",  &mop500_sdi4_data),
-        /* Requires clock name bindings. */
-        OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e000, "gpio.0", NULL),
-        OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e080, "gpio.1", NULL),
-        OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e000, "gpio.2", NULL),
-        OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e080, "gpio.3", NULL),
-        OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e100, "gpio.4", NULL),
-        OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e180, "gpio.5", NULL),
-        OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e000, "gpio.6", NULL),
-        OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e080, "gpio.7", NULL),
-        OF_DEV_AUXDATA("st,nomadik-gpio", 0xa03fe000, "gpio.8", NULL),
-        OF_DEV_AUXDATA("st,nomadik-i2c", 0x80004000, "nmk-i2c.0", NULL),
-        OF_DEV_AUXDATA("st,nomadik-i2c", 0x80122000, "nmk-i2c.1", NULL),
-        OF_DEV_AUXDATA("st,nomadik-i2c", 0x80128000, "nmk-i2c.2", NULL),
-        OF_DEV_AUXDATA("st,nomadik-i2c", 0x80110000, "nmk-i2c.3", NULL),
-        OF_DEV_AUXDATA("st,nomadik-i2c", 0x8012a000, "nmk-i2c.4", NULL),
-        /* Requires device name bindings. */
-        OF_DEV_AUXDATA("stericsson,nmk_pinctrl", 0, "pinctrl-db8500", NULL),
-        /* Requires clock name and DMA bindings. */
-        OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000,
-                "ux500-msp-i2s.0", &msp0_platform_data),
-        OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000,
-                "ux500-msp-i2s.1", &msp1_platform_data),
-        OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80117000,
-                "ux500-msp-i2s.2", &msp2_platform_data),
-        OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80125000,
-                "ux500-msp-i2s.3", &msp3_platform_data),
-        {},
-};
-
-static const struct of_device_id u8500_local_bus_nodes[] = {
-        /* only create devices below soc node */
-        { .compatible = "stericsson,db8500", },
-        { .compatible = "stericsson,db8500-prcmu", },
-        { .compatible = "simple-bus"},
-        { },
-};
-
-static void __init u8500_init_machine(void)
-{
-        struct device *parent = NULL;
-        int i2c0_devs;
-        int i;
-
-        /* Pinmaps must be in place before devices register */
-        if (of_machine_is_compatible("st-ericsson,mop500"))
-                mop500_pinmaps_init();
-        else if (of_machine_is_compatible("calaosystems,snowball-a9500"))
-                snowball_pinmaps_init();
-        else if (of_machine_is_compatible("st-ericsson,hrefv60+"))
-                hrefv60_pinmaps_init();
-
-        parent = u8500_of_init_devices();
-
-        for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
-                mop500_platform_devs[i]->dev.parent = parent;
-
-        /* automatically probe child nodes of db8500 device */
-        of_platform_populate(NULL, u8500_local_bus_nodes, u8500_auxdata_lookup, parent);
-
-        if (of_machine_is_compatible("st-ericsson,mop500")) {
-                mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR;
-
-                platform_add_devices(mop500_platform_devs,
-                                ARRAY_SIZE(mop500_platform_devs));
-
-                mop500_sdi_init(parent);
-                mop500_audio_init(parent);
-                i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
-                i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
-                i2c_register_board_info(2, mop500_i2c2_devices,
-                                        ARRAY_SIZE(mop500_i2c2_devices));
-
-                mop500_uib_init();
-
-        } else if (of_machine_is_compatible("calaosystems,snowball-a9500")) {
-                mop500_of_audio_init(parent);
-        } else if (of_machine_is_compatible("st-ericsson,hrefv60+")) {
-                /*
-                 * The HREFv60 board removed a GPIO expander and routed
-                 * all these GPIO pins to the internal GPIO controller
-                 * instead.
-                 */
-                mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO;
-                platform_add_devices(mop500_platform_devs,
-                                ARRAY_SIZE(mop500_platform_devs));
-
-                mop500_uib_init();
-        }
-
-        /* This board has full regulator constraints */
-        regulator_has_full_constraints();
-}
-
-static const char * u8500_dt_board_compat[] = {
-        "calaosystems,snowball-a9500",
-        "st-ericsson,hrefv60+",
-        "st-ericsson,u8500",
-        "st-ericsson,mop500",
-        NULL,
-};
-
-
-DT_MACHINE_START(U8500_DT, "ST-Ericsson U8500 platform (Device Tree Support)")
-        .smp            = smp_ops(ux500_smp_ops),
-        .map_io         = u8500_map_io,
-        .init_irq       = ux500_init_irq,
-        /* we re-use nomadik timer here */
-        .timer          = &ux500_timer,
-        .handle_irq     = gic_handle_irq,
-        .init_machine   = u8500_init_machine,
-        .init_late      = ux500_init_late,
-        .dt_compat      = u8500_dt_board_compat,
+        .init_late      = NULL,
 MACHINE_END
-#endif
diff --git a/arch/arm/mach-ux500/board-mop500.h b/arch/arm/mach-ux500/board-mop500.h
index aca39a68712a..eaa605f5d90d 100644
--- a/arch/arm/mach-ux500/board-mop500.h
+++ b/arch/arm/mach-ux500/board-mop500.h
@@ -89,6 +89,10 @@ extern struct msp_i2s_platform_data msp1_platform_data;
 extern struct msp_i2s_platform_data msp2_platform_data;
 extern struct msp_i2s_platform_data msp3_platform_data;
 extern struct arm_pmu_platdata db8500_pmu_platdata;
+extern struct amba_pl011_data uart0_plat;
+extern struct amba_pl011_data uart1_plat;
+extern struct amba_pl011_data uart2_plat;
+extern struct pl022_ssp_controller ssp0_plat;
 
 extern void mop500_sdi_init(struct device *parent);
 extern void snowball_sdi_init(struct device *parent);
@@ -100,14 +104,8 @@ void __init mop500_pinmaps_init(void);
 void __init snowball_pinmaps_init(void);
 void __init hrefv60_pinmaps_init(void);
 void mop500_audio_init(struct device *parent);
-/* Due for removal once the MSP driver has been fully DT:ed. */
-void mop500_of_audio_init(struct device *parent);
 
 int __init mop500_uib_init(void);
 void mop500_uib_i2c_add(int busnum, struct i2c_board_info *info,
                 unsigned n);
-
-/* TODO: Once all pieces are DT:ed, remove completely. */
-struct device * __init u8500_of_init_devices(void);
-
 #endif
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index bcdfe6b1d453..4c6ce012daef 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -17,9 +17,15 @@
 #include <linux/platform_device.h>
 #include <linux/io.h>
 #include <linux/mfd/abx500/ab8500.h>
+#include <linux/mfd/dbx500-prcmu.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/regulator/machine.h>
 
 #include <asm/pmu.h>
 #include <asm/mach/map.h>
+#include <asm/mach/arch.h>
+#include <asm/hardware/gic.h>
 #include <plat/gpio-nomadik.h>
 #include <mach/hardware.h>
 #include <mach/setup.h>
@@ -29,6 +35,7 @@
 
 #include "devices-db8500.h"
 #include "ste-dma40-db8500.h"
+#include "board-mop500.h"
 
 /* minimum static i/o mapping required to boot U8500 platforms */
 static struct map_desc u8500_uart_io_desc[] __initdata = {
@@ -215,7 +222,7 @@ struct device * __init u8500_init_devices(struct ab8500_platform_data *ab8500)
         db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg);
 
         platform_device_register_data(parent,
-                "cpufreq-u8500", -1, NULL, 0);
+                "cpufreq-ux500", -1, NULL, 0);
 
         for (i = 0; i < ARRAY_SIZE(platform_devs); i++)
                 platform_devs[i]->dev.parent = parent;
@@ -227,17 +234,17 @@ struct device * __init u8500_init_devices(struct ab8500_platform_data *ab8500)
         return parent;
 }
 
+#ifdef CONFIG_MACH_UX500_DT
+
 /* TODO: Once all pieces are DT:ed, remove completely. */
-struct device * __init u8500_of_init_devices(void)
+static struct device * __init u8500_of_init_devices(void)
 {
-        struct device *parent;
-
-        parent = db8500_soc_device_init();
+        struct device *parent = db8500_soc_device_init();
 
         db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg);
 
         platform_device_register_data(parent,
-                "cpufreq-u8500", -1, NULL, 0);
+                "cpufreq-ux500", -1, NULL, 0);
 
         u8500_dma40_device.dev.parent = parent;
 
@@ -251,3 +258,95 @@ struct device * __init u8500_of_init_devices(void)
 
         return parent;
 }
+
+static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
+        /* Requires call-back bindings. */
+        OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata),
+        /* Requires DMA bindings. */
+        OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat),
+        OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat),
+        OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat),
+        OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0",  &ssp0_plat),
+        OF_DEV_AUXDATA("arm,pl18x", 0x80126000, "sdi0",  &mop500_sdi0_data),
+        OF_DEV_AUXDATA("arm,pl18x", 0x80118000, "sdi1",  &mop500_sdi1_data),
+        OF_DEV_AUXDATA("arm,pl18x", 0x80005000, "sdi2",  &mop500_sdi2_data),
+        OF_DEV_AUXDATA("arm,pl18x", 0x80114000, "sdi4",  &mop500_sdi4_data),
+        /* Requires clock name bindings. */
+        OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e000, "gpio.0", NULL),
+        OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e080, "gpio.1", NULL),
+        OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e000, "gpio.2", NULL),
+        OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e080, "gpio.3", NULL),
+        OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e100, "gpio.4", NULL),
+        OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e180, "gpio.5", NULL),
+        OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e000, "gpio.6", NULL),
+        OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e080, "gpio.7", NULL),
+        OF_DEV_AUXDATA("st,nomadik-gpio", 0xa03fe000, "gpio.8", NULL),
+        OF_DEV_AUXDATA("st,nomadik-i2c", 0x80004000, "nmk-i2c.0", NULL),
+        OF_DEV_AUXDATA("st,nomadik-i2c", 0x80122000, "nmk-i2c.1", NULL),
+        OF_DEV_AUXDATA("st,nomadik-i2c", 0x80128000, "nmk-i2c.2", NULL),
+        OF_DEV_AUXDATA("st,nomadik-i2c", 0x80110000, "nmk-i2c.3", NULL),
+        OF_DEV_AUXDATA("st,nomadik-i2c", 0x8012a000, "nmk-i2c.4", NULL),
+        /* Requires device name bindings. */
+        OF_DEV_AUXDATA("stericsson,nmk_pinctrl", 0, "pinctrl-db8500", NULL),
+        /* Requires clock name and DMA bindings. */
+        OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000,
+                "ux500-msp-i2s.0", &msp0_platform_data),
+        OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000,
+                "ux500-msp-i2s.1", &msp1_platform_data),
+        OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80117000,
+                "ux500-msp-i2s.2", &msp2_platform_data),
+        OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80125000,
+                "ux500-msp-i2s.3", &msp3_platform_data),
+        {},
+};
+
+static const struct of_device_id u8500_local_bus_nodes[] = {
+        /* only create devices below soc node */
+        { .compatible = "stericsson,db8500", },
+        { .compatible = "stericsson,db8500-prcmu", },
+        { .compatible = "simple-bus"},
+        { },
+};
+
+static void __init u8500_init_machine(void)
+{
+        struct device *parent = NULL;
+
+        /* Pinmaps must be in place before devices register */
+        if (of_machine_is_compatible("st-ericsson,mop500"))
+                mop500_pinmaps_init();
+        else if (of_machine_is_compatible("calaosystems,snowball-a9500"))
+                snowball_pinmaps_init();
+        else if (of_machine_is_compatible("st-ericsson,hrefv60+"))
+                hrefv60_pinmaps_init();
+        else if (of_machine_is_compatible("st-ericsson,ccu9540")) {}
+                /* TODO: Add pinmaps for ccu9540 board. */
+
+        /* TODO: Export SoC, USB, cpu-freq and DMA40 */
+        parent = u8500_of_init_devices();
+
+        /* automatically probe child nodes of db8500 device */
+        of_platform_populate(NULL, u8500_local_bus_nodes, u8500_auxdata_lookup, parent);
+}
+
+static const char * stericsson_dt_platform_compat[] = {
+        "st-ericsson,u8500",
+        "st-ericsson,u8540",
+        "st-ericsson,u9500",
+        "st-ericsson,u9540",
+        NULL,
+};
+
+DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)")
+        .smp            = smp_ops(ux500_smp_ops),
+        .map_io         = u8500_map_io,
+        .init_irq       = ux500_init_irq,
+        /* we re-use nomadik timer here */
+        .timer          = &ux500_timer,
+        .handle_irq     = gic_handle_irq,
+        .init_machine   = u8500_init_machine,
+        .init_late      = NULL,
+        .dt_compat      = stericsson_dt_platform_compat,
+MACHINE_END
+
+#endif
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c
index 1f3fbc2bb776..721e7b4275f3 100644
--- a/arch/arm/mach-ux500/cpu.c
+++ b/arch/arm/mach-ux500/cpu.c
@@ -26,6 +26,8 @@
 #include <mach/setup.h>
 #include <mach/devices.h>
 
+#include "board-mop500.h"
+
 void __iomem *_PRCMU_BASE;
 
 /*
@@ -82,6 +84,7 @@ void __init ux500_init_irq(void)
 
 void __init ux500_init_late(void)
 {
+        mop500_uib_init();
 }
 
 static const char * __init ux500_get_machine(void)
diff --git a/arch/arm/mach-vt8500/include/mach/hardware.h b/arch/arm/mach-vt8500/include/mach/hardware.h
deleted file mode 100644
index db4163f72c39..000000000000
--- a/arch/arm/mach-vt8500/include/mach/hardware.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/* arch/arm/mach-vt8500/include/mach/hardware.h
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
diff --git a/arch/arm/mach-vt8500/include/mach/i8042.h b/arch/arm/mach-vt8500/include/mach/i8042.h
deleted file mode 100644
index cd7143cad6f3..000000000000
--- a/arch/arm/mach-vt8500/include/mach/i8042.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/* arch/arm/mach-vt8500/include/mach/i8042.h
- *
- * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-extern unsigned long wmt_i8042_base __initdata;
-extern int wmt_i8042_kbd_irq;
-extern int wmt_i8042_aux_irq;
diff --git a/arch/arm/mach-vt8500/include/mach/restart.h b/arch/arm/mach-vt8500/include/mach/restart.h
deleted file mode 100644
index 738979518acb..000000000000
--- a/arch/arm/mach-vt8500/include/mach/restart.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/* linux/arch/arm/mach-vt8500/restart.h
- *
- * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-void vt8500_setup_restart(void);
-void vt8500_restart(char mode, const char *cmd);
diff --git a/arch/arm/mach-vt8500/timer.c b/arch/arm/mach-vt8500/timer.c
index 050e1833f2d0..3dd21a47881f 100644
--- a/arch/arm/mach-vt8500/timer.c
+++ b/arch/arm/mach-vt8500/timer.c
@@ -1,5 +1,5 @@
 /*
- *  arch/arm/mach-vt8500/timer_dt.c
+ *  arch/arm/mach-vt8500/timer.c
  *
  *  Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
  *  Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
diff --git a/arch/arm/mach-vt8500/vt8500.c b/arch/arm/mach-vt8500/vt8500.c
index 8d3871f110a5..a5bd28692b06 100644
--- a/arch/arm/mach-vt8500/vt8500.c
+++ b/arch/arm/mach-vt8500/vt8500.c
@@ -31,8 +31,6 @@
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
 
-#include <mach/restart.h>
-
 #include "common.h"
 
 #define LEGACY_GPIO_BASE        0xD8110000
diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
index ab5cfddc0d7b..79bf5fb4dad3 100644
--- a/arch/arm/mach-zynq/common.c
+++ b/arch/arm/mach-zynq/common.c
@@ -19,19 +19,21 @@
 #include <linux/cpumask.h>
 #include <linux/platform_device.h>
 #include <linux/clk.h>
+#include <linux/clk/zynq.h>
+#include <linux/of_address.h>
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
 #include <linux/of.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
+#include <asm/mach/time.h>
 #include <asm/mach-types.h>
 #include <asm/page.h>
 #include <asm/hardware/gic.h>
 #include <asm/hardware/cache-l2x0.h>
 
 #include <mach/zynq_soc.h>
-#include <mach/clkdev.h>
 #include "common.h"
 
 static struct of_device_id zynq_of_bus_ids[] __initdata = {
@@ -45,22 +47,25 @@ static struct of_device_id zynq_of_bus_ids[] __initdata = {
  */
 static void __init xilinx_init_machine(void)
 {
-#ifdef CONFIG_CACHE_L2X0
         /*
          * 64KB way size, 8-way associativity, parity disabled
          */
-        l2x0_init(PL310_L2CC_BASE, 0x02060000, 0xF0F0FFFF);
-#endif
+        l2x0_of_init(0x02060000, 0xF0F0FFFF);
 
         of_platform_bus_probe(NULL, zynq_of_bus_ids, NULL);
 }
 
+static struct of_device_id irq_match[] __initdata = {
+        { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
+        { }
+};
+
 /**
  * xilinx_irq_init() - Interrupt controller initialization for the GIC.
  */
 static void __init xilinx_irq_init(void)
 {
-        gic_init(0, 29, SCU_GIC_DIST_BASE, SCU_GIC_CPU_BASE);
+        of_irq_init(irq_match);
 }
 
 /* The minimum devices needed to be mapped before the VM system is up and
@@ -71,31 +76,47 @@ static struct map_desc io_desc[] __initdata = {
         {
                 .virtual        = TTC0_VIRT,
                 .pfn            = __phys_to_pfn(TTC0_PHYS),
-                .length         = SZ_4K,
+                .length         = TTC0_SIZE,
                 .type           = MT_DEVICE,
         }, {
                 .virtual        = SCU_PERIPH_VIRT,
                 .pfn            = __phys_to_pfn(SCU_PERIPH_PHYS),
-                .length         = SZ_8K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = PL310_L2CC_VIRT,
-                .pfn            = __phys_to_pfn(PL310_L2CC_PHYS),
-                .length         = SZ_4K,
+                .length         = SCU_PERIPH_SIZE,
                 .type           = MT_DEVICE,
         },
 
 #ifdef CONFIG_DEBUG_LL
         {
-                .virtual        = UART0_VIRT,
-                .pfn            = __phys_to_pfn(UART0_PHYS),
-                .length         = SZ_4K,
+                .virtual        = LL_UART_VADDR,
+                .pfn            = __phys_to_pfn(LL_UART_PADDR),
+                .length         = UART_SIZE,
                 .type           = MT_DEVICE,
         },
 #endif
 
 };
 
+static void __init xilinx_zynq_timer_init(void)
+{
+        struct device_node *np;
+        void __iomem *slcr;
+
+        np = of_find_compatible_node(NULL, NULL, "xlnx,zynq-slcr");
+        slcr = of_iomap(np, 0);
+        WARN_ON(!slcr);
+
+        xilinx_zynq_clocks_init(slcr);
+
+        xttcpss_timer_init();
+}
+
+/*
+ * Instantiate and initialize the system timer structure
+ */
+static struct sys_timer xttcpss_sys_timer = {
+        .init           = xilinx_zynq_timer_init,
+};
+
 /**
  * xilinx_map_io() - Create memory mappings needed for early I/O.
  */
@@ -105,7 +126,8 @@ static void __init xilinx_map_io(void)
 }
 
 static const char *xilinx_dt_match[] = {
-        "xlnx,zynq-ep107",
+        "xlnx,zynq-zc702",
+        "xlnx,zynq-7000",
         NULL
 };
 
diff --git a/arch/arm/mach-zynq/common.h b/arch/arm/mach-zynq/common.h
index a009644a1555..954b91c13c91 100644
--- a/arch/arm/mach-zynq/common.h
+++ b/arch/arm/mach-zynq/common.h
@@ -17,8 +17,6 @@
 #ifndef __MACH_ZYNQ_COMMON_H__
 #define __MACH_ZYNQ_COMMON_H__
 
-#include <asm/mach/time.h>
-
-extern struct sys_timer xttcpss_sys_timer;
+void __init xttcpss_timer_init(void);
 
 #endif
diff --git a/arch/arm/mach-zynq/include/mach/clkdev.h b/arch/arm/mach-zynq/include/mach/clkdev.h
deleted file mode 100644
index c6e73d81a459..000000000000
--- a/arch/arm/mach-zynq/include/mach/clkdev.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * arch/arm/mach-zynq/include/mach/clkdev.h
- *
- *  Copyright (C) 2011 Xilinx, Inc.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-#ifndef __MACH_CLKDEV_H__
-#define __MACH_CLKDEV_H__
-
-#include <plat/clock.h>
-
-struct clk {
-        unsigned long           rate;
-        const struct clk_ops    *ops;
-        const struct icst_params *params;
-        void __iomem            *vcoreg;
-};
-
-#define __clk_get(clk) ({ 1; })
-#define __clk_put(clk) do { } while (0)
-
-#endif
diff --git a/arch/arm/mach-zynq/include/mach/zynq_soc.h b/arch/arm/mach-zynq/include/mach/zynq_soc.h
index d0d3f8fb06dd..5ebbd8e6eeee 100644
--- a/arch/arm/mach-zynq/include/mach/zynq_soc.h
+++ b/arch/arm/mach-zynq/include/mach/zynq_soc.h
@@ -15,34 +15,39 @@
 #ifndef __MACH_XILINX_SOC_H__
 #define __MACH_XILINX_SOC_H__
 
+#include <asm/pgtable.h>
+
 #define PERIPHERAL_CLOCK_RATE           2500000
 
-/* For now, all mappings are flat (physical = virtual)
+/* Static peripheral mappings are mapped at the top of the vmalloc region.  The
+ * early uart mapping causes intermediate problems/failure at certain
+ * addresses, including the very top of the vmalloc region.  Map it at an
+ * address that is known to work.
  */
-#define UART0_PHYS                      0xE0000000
-#define UART0_VIRT                      UART0_PHYS
-
-#define TTC0_PHYS                       0xF8001000
-#define TTC0_VIRT                       TTC0_PHYS
-
-#define PL310_L2CC_PHYS                 0xF8F02000
-#define PL310_L2CC_VIRT                 PL310_L2CC_PHYS
+#define UART0_PHYS              0xE0000000
+#define UART1_PHYS              0xE0001000
+#define UART_SIZE               SZ_4K
+#define UART_VIRT               0xF0001000
+
+#define TTC0_PHYS               0xF8001000
+#define TTC0_SIZE               SZ_4K
+#define TTC0_VIRT               (VMALLOC_END - TTC0_SIZE)
+
+#define SCU_PERIPH_PHYS         0xF8F00000
+#define SCU_PERIPH_SIZE         SZ_8K
+#define SCU_PERIPH_VIRT         (TTC0_VIRT - SCU_PERIPH_SIZE)
+
+#if IS_ENABLED(CONFIG_DEBUG_ZYNQ_UART1)
+# define LL_UART_PADDR          UART1_PHYS
+#else
+# define LL_UART_PADDR          UART0_PHYS
+#endif
 
-#define SCU_PERIPH_PHYS                 0xF8F00000
-#define SCU_PERIPH_VIRT                 SCU_PERIPH_PHYS
+#define LL_UART_VADDR           UART_VIRT
 
 /* The following are intended for the devices that are mapped early */
 
 #define TTC0_BASE                       IOMEM(TTC0_VIRT)
 #define SCU_PERIPH_BASE                 IOMEM(SCU_PERIPH_VIRT)
-#define SCU_GIC_CPU_BASE                (SCU_PERIPH_BASE + 0x100)
-#define SCU_GIC_DIST_BASE               (SCU_PERIPH_BASE + 0x1000)
-#define PL310_L2CC_BASE                 IOMEM(PL310_L2CC_VIRT)
-
-/*
- * Mandatory for CONFIG_LL_DEBUG, UART is mapped virtual = physical
- */
-#define LL_UART_PADDR   UART0_PHYS
-#define LL_UART_VADDR   UART0_VIRT
 
 #endif
diff --git a/arch/arm/mach-zynq/timer.c b/arch/arm/mach-zynq/timer.c
index c2c96cc7d6e7..9662306aa12f 100644
--- a/arch/arm/mach-zynq/timer.c
+++ b/arch/arm/mach-zynq/timer.c
@@ -23,32 +23,15 @@
 #include <linux/clocksource.h>
 #include <linux/clockchips.h>
 #include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/slab.h>
+#include <linux/clk-provider.h>
 
-#include <asm/mach/time.h>
 #include <mach/zynq_soc.h>
 #include "common.h"
 
-#define IRQ_TIMERCOUNTER0       42
-
-/*
- * This driver configures the 2 16-bit count-up timers as follows:
- *
- * T1: Timer 1, clocksource for generic timekeeping
- * T2: Timer 2, clockevent source for hrtimers
- * T3: Timer 3, <unused>
- *
- * The input frequency to the timer module for emulation is 2.5MHz which is
- * common to all the timer channels (T1, T2, and T3). With a pre-scaler of 32,
- * the timers are clocked at 78.125KHz (12.8 us resolution).
- *
- * The input frequency to the timer module in silicon will be 200MHz. With the
- * pre-scaler of 32, the timers are clocked at 6.25MHz (160ns resolution).
- */
-#define XTTCPSS_CLOCKSOURCE     0       /* Timer 1 as a generic timekeeping */
-#define XTTCPSS_CLOCKEVENT      1       /* Timer 2 as a clock event */
-
-#define XTTCPSS_TIMER_BASE              TTC0_BASE
-#define XTTCPCC_EVENT_TIMER_IRQ         (IRQ_TIMERCOUNTER0 + 1)
 /*
  * Timer Register Offset Definitions of Timer 1, Increment base address by 4
  * and use same offsets for Timer 2
@@ -65,9 +48,14 @@
 
 #define XTTCPSS_CNT_CNTRL_DISABLE_MASK  0x1
 
-/* Setup the timers to use pre-scaling */
-
-#define TIMER_RATE (PERIPHERAL_CLOCK_RATE / 32)
+/* Setup the timers to use pre-scaling, using a fixed value for now that will
+ * work across most input frequency, but it may need to be more dynamic
+ */
+#define PRESCALE_EXPONENT       11      /* 2 ^ PRESCALE_EXPONENT = PRESCALE */
+#define PRESCALE                2048    /* The exponent must match this */
+#define CLK_CNTRL_PRESCALE      ((PRESCALE_EXPONENT - 1) << 1)
+#define CLK_CNTRL_PRESCALE_EN   1
+#define CNT_CNTRL_RESET         (1<<4)
 
 /**
  * struct xttcpss_timer - This definition defines local timer structure
@@ -75,11 +63,25 @@
  * @base_addr:  Base address of timer
  **/
 struct xttcpss_timer {
-        void __iomem *base_addr;
+        void __iomem    *base_addr;
 };
 
-static struct xttcpss_timer timers[2];
-static struct clock_event_device xttcpss_clockevent;
+struct xttcpss_timer_clocksource {
+        struct xttcpss_timer    xttc;
+        struct clocksource      cs;
+};
+
+#define to_xttcpss_timer_clksrc(x) \
+                container_of(x, struct xttcpss_timer_clocksource, cs)
+
+struct xttcpss_timer_clockevent {
+        struct xttcpss_timer            xttc;
+        struct clock_event_device       ce;
+        struct clk                      *clk;
+};
+
+#define to_xttcpss_timer_clkevent(x) \
+                container_of(x, struct xttcpss_timer_clockevent, ce)
 
 /**
  * xttcpss_set_interval - Set the timer interval value
@@ -101,7 +103,7 @@ static void xttcpss_set_interval(struct xttcpss_timer *timer,
 
         /* Reset the counter (0x10) so that it starts from 0, one-shot
            mode makes this needed for timing to be right. */
-        ctrl_reg |= 0x10;
+        ctrl_reg |= CNT_CNTRL_RESET;
         ctrl_reg &= ~XTTCPSS_CNT_CNTRL_DISABLE_MASK;
         __raw_writel(ctrl_reg, timer->base_addr + XTTCPSS_CNT_CNTRL_OFFSET);
 }
@@ -116,90 +118,31 @@ static void xttcpss_set_interval(struct xttcpss_timer *timer,
  **/
 static irqreturn_t xttcpss_clock_event_interrupt(int irq, void *dev_id)
 {
-        struct clock_event_device *evt = &xttcpss_clockevent;
-        struct xttcpss_timer *timer = dev_id;
+        struct xttcpss_timer_clockevent *xttce = dev_id;
+        struct xttcpss_timer *timer = &xttce->xttc;
 
         /* Acknowledge the interrupt and call event handler */
         __raw_writel(__raw_readl(timer->base_addr + XTTCPSS_ISR_OFFSET),
                         timer->base_addr + XTTCPSS_ISR_OFFSET);
 
-        evt->event_handler(evt);
+        xttce->ce.event_handler(&xttce->ce);
 
         return IRQ_HANDLED;
 }
 
-static struct irqaction event_timer_irq = {
-        .name   = "xttcpss clockevent",
-        .flags  = IRQF_DISABLED | IRQF_TIMER,
-        .handler = xttcpss_clock_event_interrupt,
-};
-
 /**
- * xttcpss_timer_hardware_init - Initialize the timer hardware
- *
- * Initialize the hardware to start the clock source, get the clock
- * event timer ready to use, and hook up the interrupt.
- **/
-static void __init xttcpss_timer_hardware_init(void)
-{
-        /* Setup the clock source counter to be an incrementing counter
-         * with no interrupt and it rolls over at 0xFFFF. Pre-scale
-           it by 32 also. Let it start running now.
-         */
-        timers[XTTCPSS_CLOCKSOURCE].base_addr = XTTCPSS_TIMER_BASE;
-
-        __raw_writel(0x0, timers[XTTCPSS_CLOCKSOURCE].base_addr +
-                                XTTCPSS_IER_OFFSET);
-        __raw_writel(0x9, timers[XTTCPSS_CLOCKSOURCE].base_addr +
-                                XTTCPSS_CLK_CNTRL_OFFSET);
-        __raw_writel(0x10, timers[XTTCPSS_CLOCKSOURCE].base_addr +
-                                XTTCPSS_CNT_CNTRL_OFFSET);
-
-        /* Setup the clock event timer to be an interval timer which
-         * is prescaled by 32 using the interval interrupt. Leave it
-         * disabled for now.
-         */
-
-        timers[XTTCPSS_CLOCKEVENT].base_addr = XTTCPSS_TIMER_BASE + 4;
-
-        __raw_writel(0x23, timers[XTTCPSS_CLOCKEVENT].base_addr +
-                        XTTCPSS_CNT_CNTRL_OFFSET);
-        __raw_writel(0x9, timers[XTTCPSS_CLOCKEVENT].base_addr +
-                        XTTCPSS_CLK_CNTRL_OFFSET);
-        __raw_writel(0x1, timers[XTTCPSS_CLOCKEVENT].base_addr +
-                        XTTCPSS_IER_OFFSET);
-
-        /* Setup IRQ the clock event timer */
-        event_timer_irq.dev_id = &timers[XTTCPSS_CLOCKEVENT];
-        setup_irq(XTTCPCC_EVENT_TIMER_IRQ, &event_timer_irq);
-}
-
-/**
- * __raw_readl_cycles - Reads the timer counter register
+ * __xttc_clocksource_read - Reads the timer counter register
  *
  * returns: Current timer counter register value
  **/
-static cycle_t __raw_readl_cycles(struct clocksource *cs)
+static cycle_t __xttc_clocksource_read(struct clocksource *cs)
 {
-        struct xttcpss_timer *timer = &timers[XTTCPSS_CLOCKSOURCE];
+        struct xttcpss_timer *timer = &to_xttcpss_timer_clksrc(cs)->xttc;
 
         return (cycle_t)__raw_readl(timer->base_addr +
                                 XTTCPSS_COUNT_VAL_OFFSET);
 }
 
-
-/*
- * Instantiate and initialize the clock source structure
- */
-static struct clocksource clocksource_xttcpss = {
-        .name           = "xttcpss_timer1",
-        .rating         = 200,                  /* Reasonable clock source */
-        .read           = __raw_readl_cycles,
-        .mask           = CLOCKSOURCE_MASK(16),
-        .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
-};
-
-
 /**
  * xttcpss_set_next_event - Sets the time interval for next event
  *
@@ -211,7 +154,8 @@ static struct clocksource clocksource_xttcpss = {
 static int xttcpss_set_next_event(unsigned long cycles,
                                         struct clock_event_device *evt)
 {
-        struct xttcpss_timer *timer = &timers[XTTCPSS_CLOCKEVENT];
+        struct xttcpss_timer_clockevent *xttce = to_xttcpss_timer_clkevent(evt);
+        struct xttcpss_timer *timer = &xttce->xttc;
 
         xttcpss_set_interval(timer, cycles);
         return 0;
@@ -226,12 +170,15 @@ static int xttcpss_set_next_event(unsigned long cycles,
 static void xttcpss_set_mode(enum clock_event_mode mode,
                                         struct clock_event_device *evt)
 {
-        struct xttcpss_timer *timer = &timers[XTTCPSS_CLOCKEVENT];
+        struct xttcpss_timer_clockevent *xttce = to_xttcpss_timer_clkevent(evt);
+        struct xttcpss_timer *timer = &xttce->xttc;
         u32 ctrl_reg;
 
         switch (mode) {
         case CLOCK_EVT_MODE_PERIODIC:
-                xttcpss_set_interval(timer, TIMER_RATE / HZ);
+                xttcpss_set_interval(timer,
+                                     DIV_ROUND_CLOSEST(clk_get_rate(xttce->clk),
+                                                       PRESCALE * HZ));
                 break;
         case CLOCK_EVT_MODE_ONESHOT:
         case CLOCK_EVT_MODE_UNUSED:
@@ -252,15 +199,106 @@ static void xttcpss_set_mode(enum clock_event_mode mode,
         }
 }
 
-/*
- * Instantiate and initialize the clock event structure
- */
-static struct clock_event_device xttcpss_clockevent = {
-        .name           = "xttcpss_timer2",
-        .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
-        .set_next_event = xttcpss_set_next_event,
-        .set_mode       = xttcpss_set_mode,
-        .rating         = 200,
+static void __init zynq_ttc_setup_clocksource(struct device_node *np,
+                                             void __iomem *base)
+{
+        struct xttcpss_timer_clocksource *ttccs;
+        struct clk *clk;
+        int err;
+        u32 reg;
+
+        ttccs = kzalloc(sizeof(*ttccs), GFP_KERNEL);
+        if (WARN_ON(!ttccs))
+                return;
+
+        err = of_property_read_u32(np, "reg", &reg);
+        if (WARN_ON(err))
+                return;
+
+        clk = of_clk_get_by_name(np, "cpu_1x");
+        if (WARN_ON(IS_ERR(clk)))
+                return;
+
+        err = clk_prepare_enable(clk);
+        if (WARN_ON(err))
+                return;
+
+        ttccs->xttc.base_addr = base + reg * 4;
+
+        ttccs->cs.name = np->name;
+        ttccs->cs.rating = 200;
+        ttccs->cs.read = __xttc_clocksource_read;
+        ttccs->cs.mask = CLOCKSOURCE_MASK(16);
+        ttccs->cs.flags = CLOCK_SOURCE_IS_CONTINUOUS;
+
+        __raw_writel(0x0,  ttccs->xttc.base_addr + XTTCPSS_IER_OFFSET);
+        __raw_writel(CLK_CNTRL_PRESCALE | CLK_CNTRL_PRESCALE_EN,
+                     ttccs->xttc.base_addr + XTTCPSS_CLK_CNTRL_OFFSET);
+        __raw_writel(CNT_CNTRL_RESET,
+                     ttccs->xttc.base_addr + XTTCPSS_CNT_CNTRL_OFFSET);
+
+        err = clocksource_register_hz(&ttccs->cs, clk_get_rate(clk) / PRESCALE);
+        if (WARN_ON(err))
+                return;
+}
+
+static void __init zynq_ttc_setup_clockevent(struct device_node *np,
+                                            void __iomem *base)
+{
+        struct xttcpss_timer_clockevent *ttcce;
+        int err, irq;
+        u32 reg;
+
+        ttcce = kzalloc(sizeof(*ttcce), GFP_KERNEL);
+        if (WARN_ON(!ttcce))
+                return;
+
+        err = of_property_read_u32(np, "reg", &reg);
+        if (WARN_ON(err))
+                return;
+
+        ttcce->xttc.base_addr = base + reg * 4;
+
+        ttcce->clk = of_clk_get_by_name(np, "cpu_1x");
+        if (WARN_ON(IS_ERR(ttcce->clk)))
+                return;
+
+        err = clk_prepare_enable(ttcce->clk);
+        if (WARN_ON(err))
+                return;
+
+        irq = irq_of_parse_and_map(np, 0);
+        if (WARN_ON(!irq))
+                return;
+
+        ttcce->ce.name = np->name;
+        ttcce->ce.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
+        ttcce->ce.set_next_event = xttcpss_set_next_event;
+        ttcce->ce.set_mode = xttcpss_set_mode;
+        ttcce->ce.rating = 200;
+        ttcce->ce.irq = irq;
+
+        __raw_writel(0x23, ttcce->xttc.base_addr + XTTCPSS_CNT_CNTRL_OFFSET);
+        __raw_writel(CLK_CNTRL_PRESCALE | CLK_CNTRL_PRESCALE_EN,
+                     ttcce->xttc.base_addr + XTTCPSS_CLK_CNTRL_OFFSET);
+        __raw_writel(0x1,  ttcce->xttc.base_addr + XTTCPSS_IER_OFFSET);
+
+        err = request_irq(irq, xttcpss_clock_event_interrupt, IRQF_TIMER,
+                          np->name, ttcce);
+        if (WARN_ON(err))
+                return;
+
+        clockevents_config_and_register(&ttcce->ce,
+                                        clk_get_rate(ttcce->clk) / PRESCALE,
+                                        1, 0xfffe);
+}
+
+static const __initconst struct of_device_id zynq_ttc_match[] = {
+        { .compatible = "xlnx,ttc-counter-clocksource",
+                .data = zynq_ttc_setup_clocksource, },
+        { .compatible = "xlnx,ttc-counter-clockevent",
+                .data = zynq_ttc_setup_clockevent, },
+        {}
 };
 
 /**
@@ -269,30 +307,27 @@ static struct clock_event_device xttcpss_clockevent = {
  * Initializes the timer hardware and register the clock source and clock event
  * timers with Linux kernal timer framework
  **/
-static void __init xttcpss_timer_init(void)
+void __init xttcpss_timer_init(void)
 {
-        xttcpss_timer_hardware_init();
-        clocksource_register_hz(&clocksource_xttcpss, TIMER_RATE);
-
-        /* Calculate the parameters to allow the clockevent to operate using
-           integer math
-        */
-        clockevents_calc_mult_shift(&xttcpss_clockevent, TIMER_RATE, 4);
-
-        xttcpss_clockevent.max_delta_ns =
-                clockevent_delta2ns(0xfffe, &xttcpss_clockevent);
-        xttcpss_clockevent.min_delta_ns =
-                clockevent_delta2ns(1, &xttcpss_clockevent);
-
-        /* Indicate that clock event is on 1st CPU as SMP boot needs it */
-
-        xttcpss_clockevent.cpumask = cpumask_of(0);
-        clockevents_register_device(&xttcpss_clockevent);
+        struct device_node *np;
+
+        for_each_compatible_node(np, NULL, "xlnx,ttc") {
+                struct device_node *np_chld;
+                void __iomem *base;
+
+                base = of_iomap(np, 0);
+                if (WARN_ON(!base))
+                        return;
+
+                for_each_available_child_of_node(np, np_chld) {
+                        int (*cb)(struct device_node *np, void __iomem *base);
+                        const struct of_device_id *match;
+
+                        match = of_match_node(zynq_ttc_match, np_chld);
+                        if (match) {
+                                cb = match->data;
+                                cb(np_chld, base);
+                        }
+                }
+        }
 }
-
-/*
- * Instantiate and initialize the system timer structure
- */
-struct sys_timer xttcpss_sys_timer = {
-        .init           = xttcpss_timer_init,
-};
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
deleted file mode 100644
index 88e1e2e7a20d..000000000000
--- a/arch/arm/plat-mxc/Kconfig
+++ /dev/null
@@ -1,89 +0,0 @@
-if ARCH_MXC
-
-source "arch/arm/plat-mxc/devices/Kconfig"
-
-menu "Freescale MXC Implementations"
-
-choice
-        prompt "Freescale CPU family:"
-        default ARCH_IMX_V6_V7
-
-config ARCH_IMX_V4_V5
-        bool "i.MX1, i.MX21, i.MX25, i.MX27"
-        select ARM_PATCH_PHYS_VIRT
-        select AUTO_ZRELADDR if !ZBOOT_ROM
-        help
-          This enables support for systems based on the Freescale i.MX ARMv4
-          and ARMv5 SoCs
-
-config ARCH_IMX_V6_V7
-        bool "i.MX3, i.MX5, i.MX6"
-        select ARM_PATCH_PHYS_VIRT
-        select AUTO_ZRELADDR if !ZBOOT_ROM
-        select MIGHT_HAVE_CACHE_L2X0
-        help
-          This enables support for systems based on the Freescale i.MX3, i.MX5
-          and i.MX6 family.
-
-endchoice
-
-source "arch/arm/mach-imx/Kconfig"
-
-endmenu
-
-config MXC_IRQ_PRIOR
-        bool "Use IRQ priority"
-        help
-          Select this if you want to use prioritized IRQ handling.
-          This feature prevents higher priority ISR to be interrupted
-          by lower priority IRQ even IRQF_DISABLED flag is not set.
-          This may be useful in embedded applications, where are strong
-          requirements for timing.
-          Say N here, unless you have a specialized requirement.
-
-config MXC_TZIC
-        bool
-
-config MXC_AVIC
-        bool
-
-config MXC_DEBUG_BOARD
-        bool "Enable MXC debug board(for 3-stack)"
-        help
-          The debug board is an integral part of the MXC 3-stack(PDK)
-          platforms, it can be attached or removed from the peripheral
-          board. On debug board, several debug devices(ethernet, UART,
-          buttons, LEDs and JTAG) are implemented. Between the MCU and
-          these devices, a CPLD is added as a bridge which performs
-          data/address de-multiplexing and decode, signal level shift,
-          interrupt control and various board functions.
-
-config HAVE_EPIT
-        bool
-
-config MXC_USE_EPIT
-        bool "Use EPIT instead of GPT"
-        depends on HAVE_EPIT
-        help
-          Use EPIT as the system timer on systems that have it. Normally you
-          don't have a reason to do so as the EPIT has the same features and
-          uses the same clocks as the GPT. Anyway, on some systems the GPT
-          may be in use for other purposes.
-
-config MXC_ULPI
-        bool
-
-config ARCH_HAS_RNGA
-        bool
-
-config IMX_HAVE_IOMUX_V1
-        bool
-
-config ARCH_MXC_IOMUX_V3
-        bool
-
-config IRAM_ALLOC
-        bool
-        select GENERIC_ALLOCATOR
-
-endif
diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile
deleted file mode 100644
index 149237e24850..000000000000
--- a/arch/arm/plat-mxc/Makefile
+++ /dev/null
@@ -1,24 +0,0 @@
-#
-# Makefile for the linux kernel.
-#
-
-# Common support
-obj-y := time.o devices.o cpu.o system.o irq-common.o
-
-obj-$(CONFIG_MXC_TZIC) += tzic.o
-obj-$(CONFIG_MXC_AVIC) += avic.o
-
-obj-$(CONFIG_IMX_HAVE_IOMUX_V1) += iomux-v1.o
-obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o
-obj-$(CONFIG_IRAM_ALLOC) += iram_alloc.o
-obj-$(CONFIG_MXC_ULPI) += ulpi.o
-obj-$(CONFIG_MXC_USE_EPIT) += epit.o
-obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o
-obj-$(CONFIG_CPU_FREQ_IMX)    += cpufreq.o
-obj-$(CONFIG_CPU_IDLE) += cpuidle.o
-ifdef CONFIG_SND_IMX_SOC
-obj-y += ssi-fiq.o
-obj-y += ssi-fiq-ksym.o
-endif
-
-obj-y += devices/
diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S
deleted file mode 100644
index 761e45f9456f..000000000000
--- a/arch/arm/plat-mxc/include/mach/debug-macro.S
+++ /dev/null
@@ -1,51 +0,0 @@
-/* arch/arm/mach-imx/include/mach/debug-macro.S
- *
- * Debugging macro include header
- *
- *  Copyright (C) 1994-1999 Russell King
- *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-#include <mach/hardware.h>
-
-#ifdef CONFIG_DEBUG_IMX1_UART
-#define UART_PADDR      MX1_UART1_BASE_ADDR
-#elif defined (CONFIG_DEBUG_IMX25_UART)
-#define UART_PADDR      MX25_UART1_BASE_ADDR
-#elif defined (CONFIG_DEBUG_IMX21_IMX27_UART)
-#define UART_PADDR      MX2x_UART1_BASE_ADDR
-#elif defined (CONFIG_DEBUG_IMX31_IMX35_UART)
-#define UART_PADDR      MX3x_UART1_BASE_ADDR
-#elif defined (CONFIG_DEBUG_IMX51_UART)
-#define UART_PADDR      MX51_UART1_BASE_ADDR
-#elif defined (CONFIG_DEBUG_IMX50_IMX53_UART)
-#define UART_PADDR      MX53_UART1_BASE_ADDR
-#elif defined (CONFIG_DEBUG_IMX6Q_UART2)
-#define UART_PADDR      MX6Q_UART2_BASE_ADDR
-#elif defined (CONFIG_DEBUG_IMX6Q_UART4)
-#define UART_PADDR      MX6Q_UART4_BASE_ADDR
-#endif
-
-#define UART_VADDR      IMX_IO_ADDRESS(UART_PADDR)
-
-                .macro  addruart, rp, rv, tmp
-                ldr     \rp, =UART_PADDR        @ physical
-                ldr     \rv, =UART_VADDR        @ virtual
-                .endm
-
-                .macro  senduart,rd,rx
-                str     \rd, [\rx, #0x40]       @ TXDATA
-                .endm
-
-                .macro  waituart,rd,rx
-                .endm
-
-                .macro  busyuart,rd,rx
-1002:           ldr     \rd, [\rx, #0x98]       @ SR2
-                tst     \rd, #1 << 3            @ TXDC
-                beq     1002b                   @ wait until transmit done
-                .endm
diff --git a/arch/arm/plat-mxc/include/mach/ipu.h b/arch/arm/plat-mxc/include/mach/ipu.h
deleted file mode 100644
index 539e559d18b2..000000000000
--- a/arch/arm/plat-mxc/include/mach/ipu.h
+++ /dev/null
@@ -1,177 +0,0 @@
-/*
- * Copyright (C) 2008
- * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
- *
- * Copyright (C) 2005-2007 Freescale Semiconductor, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef _IPU_H_
-#define _IPU_H_
-
-#include <linux/types.h>
-#include <linux/dmaengine.h>
-
-/* IPU DMA Controller channel definitions. */
-enum ipu_channel {
-        IDMAC_IC_0 = 0,         /* IC (encoding task) to memory */
-        IDMAC_IC_1 = 1,         /* IC (viewfinder task) to memory */
-        IDMAC_ADC_0 = 1,
-        IDMAC_IC_2 = 2,
-        IDMAC_ADC_1 = 2,
-        IDMAC_IC_3 = 3,
-        IDMAC_IC_4 = 4,
-        IDMAC_IC_5 = 5,
-        IDMAC_IC_6 = 6,
-        IDMAC_IC_7 = 7,         /* IC (sensor data) to memory */
-        IDMAC_IC_8 = 8,
-        IDMAC_IC_9 = 9,
-        IDMAC_IC_10 = 10,
-        IDMAC_IC_11 = 11,
-        IDMAC_IC_12 = 12,
-        IDMAC_IC_13 = 13,
-        IDMAC_SDC_0 = 14,       /* Background synchronous display data */
-        IDMAC_SDC_1 = 15,       /* Foreground data (overlay) */
-        IDMAC_SDC_2 = 16,
-        IDMAC_SDC_3 = 17,
-        IDMAC_ADC_2 = 18,
-        IDMAC_ADC_3 = 19,
-        IDMAC_ADC_4 = 20,
-        IDMAC_ADC_5 = 21,
-        IDMAC_ADC_6 = 22,
-        IDMAC_ADC_7 = 23,
-        IDMAC_PF_0 = 24,
-        IDMAC_PF_1 = 25,
-        IDMAC_PF_2 = 26,
-        IDMAC_PF_3 = 27,
-        IDMAC_PF_4 = 28,
-        IDMAC_PF_5 = 29,
-        IDMAC_PF_6 = 30,
-        IDMAC_PF_7 = 31,
-};
-
-/* Order significant! */
-enum ipu_channel_status {
-        IPU_CHANNEL_FREE,
-        IPU_CHANNEL_INITIALIZED,
-        IPU_CHANNEL_READY,
-        IPU_CHANNEL_ENABLED,
-};
-
-#define IPU_CHANNELS_NUM 32
-
-enum pixel_fmt {
-        /* 1 byte */
-        IPU_PIX_FMT_GENERIC,
-        IPU_PIX_FMT_RGB332,
-        IPU_PIX_FMT_YUV420P,
-        IPU_PIX_FMT_YUV422P,
-        IPU_PIX_FMT_YUV420P2,
-        IPU_PIX_FMT_YVU422P,
-        /* 2 bytes */
-        IPU_PIX_FMT_RGB565,
-        IPU_PIX_FMT_RGB666,
-        IPU_PIX_FMT_BGR666,
-        IPU_PIX_FMT_YUYV,
-        IPU_PIX_FMT_UYVY,
-        /* 3 bytes */
-        IPU_PIX_FMT_RGB24,
-        IPU_PIX_FMT_BGR24,
-        /* 4 bytes */
-        IPU_PIX_FMT_GENERIC_32,
-        IPU_PIX_FMT_RGB32,
-        IPU_PIX_FMT_BGR32,
-        IPU_PIX_FMT_ABGR32,
-        IPU_PIX_FMT_BGRA32,
-        IPU_PIX_FMT_RGBA32,
-};
-
-enum ipu_color_space {
-        IPU_COLORSPACE_RGB,
-        IPU_COLORSPACE_YCBCR,
-        IPU_COLORSPACE_YUV
-};
-
-/*
- * Enumeration of IPU rotation modes
- */
-enum ipu_rotate_mode {
-        /* Note the enum values correspond to BAM value */
-        IPU_ROTATE_NONE = 0,
-        IPU_ROTATE_VERT_FLIP = 1,
-        IPU_ROTATE_HORIZ_FLIP = 2,
-        IPU_ROTATE_180 = 3,
-        IPU_ROTATE_90_RIGHT = 4,
-        IPU_ROTATE_90_RIGHT_VFLIP = 5,
-        IPU_ROTATE_90_RIGHT_HFLIP = 6,
-        IPU_ROTATE_90_LEFT = 7,
-};
-
-/*
- * Enumeration of DI ports for ADC.
- */
-enum display_port {
-        DISP0,
-        DISP1,
-        DISP2,
-        DISP3
-};
-
-struct idmac_video_param {
-        unsigned short          in_width;
-        unsigned short          in_height;
-        uint32_t                in_pixel_fmt;
-        unsigned short          out_width;
-        unsigned short          out_height;
-        uint32_t                out_pixel_fmt;
-        unsigned short          out_stride;
-        bool                    graphics_combine_en;
-        bool                    global_alpha_en;
-        bool                    key_color_en;
-        enum display_port       disp;
-        unsigned short          out_left;
-        unsigned short          out_top;
-};
-
-/*
- * Union of initialization parameters for a logical channel. So far only video
- * parameters are used.
- */
-union ipu_channel_param {
-        struct idmac_video_param video;
-};
-
-struct idmac_tx_desc {
-        struct dma_async_tx_descriptor  txd;
-        struct scatterlist              *sg;    /* scatterlist for this */
-        unsigned int                    sg_len; /* tx-descriptor. */
-        struct list_head                list;
-};
-
-struct idmac_channel {
-        struct dma_chan         dma_chan;
-        dma_cookie_t            completed;      /* last completed cookie           */
-        union ipu_channel_param params;
-        enum ipu_channel        link;   /* input channel, linked to the output     */
-        enum ipu_channel_status status;
-        void                    *client;        /* Only one client per channel     */
-        unsigned int            n_tx_desc;
-        struct idmac_tx_desc    *desc;          /* allocated tx-descriptors        */
-        struct scatterlist      *sg[2]; /* scatterlist elements in buffer-0 and -1 */
-        struct list_head        free_list;      /* free tx-descriptors             */
-        struct list_head        queue;          /* queued tx-descriptors           */
-        spinlock_t              lock;           /* protects sg[0,1], queue         */
-        struct mutex            chan_mutex; /* protects status, cookie, free_list  */
-        bool                    sec_chan_en;
-        int                     active_buffer;
-        unsigned int            eof_irq;
-        char                    eof_name[16];   /* EOF IRQ name for request_irq()  */
-};
-
-#define to_tx_desc(tx) container_of(tx, struct idmac_tx_desc, txd)
-#define to_idmac_chan(c) container_of(c, struct idmac_channel, dma_chan)
-
-#endif
diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h
deleted file mode 100644
index d73f5e8ea9cb..000000000000
--- a/arch/arm/plat-mxc/include/mach/irqs.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- *  Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
- */
-
-/*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_ARCH_MXC_IRQS_H__
-#define __ASM_ARCH_MXC_IRQS_H__
-
-extern int imx_irq_set_priority(unsigned char irq, unsigned char prio);
-
-/* all normal IRQs can be FIQs */
-#define FIQ_START       0
-/* switch between IRQ and FIQ */
-extern int mxc_set_irq_fiq(unsigned int irq, unsigned int type);
-
-#endif /* __ASM_ARCH_MXC_IRQS_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/timex.h b/arch/arm/plat-mxc/include/mach/timex.h
deleted file mode 100644
index 10343d1f87e1..000000000000
--- a/arch/arm/plat-mxc/include/mach/timex.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- *  Copyright (C) 1999 ARM Limited
- * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef __ASM_ARCH_MXC_TIMEX_H__
-#define __ASM_ARCH_MXC_TIMEX_H__
-
-/* Bogus value */
-#define CLOCK_TICK_RATE 12345678
-
-#endif                          /* __ASM_ARCH_MXC_TIMEX_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h
deleted file mode 100644
index 477971b00930..000000000000
--- a/arch/arm/plat-mxc/include/mach/uncompress.h
+++ /dev/null
@@ -1,132 +0,0 @@
-/*
- *  arch/arm/plat-mxc/include/mach/uncompress.h
- *
- *  Copyright (C) 1999 ARM Limited
- *  Copyright (C) Shane Nay (shane@minirl.com)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#ifndef __ASM_ARCH_MXC_UNCOMPRESS_H__
-#define __ASM_ARCH_MXC_UNCOMPRESS_H__
-
-#define __MXC_BOOT_UNCOMPRESS
-
-#include <asm/mach-types.h>
-
-unsigned long uart_base;
-
-#define UART(x) (*(volatile unsigned long *)(uart_base + (x)))
-
-#define USR2 0x98
-#define USR2_TXFE (1<<14)
-#define TXR  0x40
-#define UCR1 0x80
-#define UCR1_UARTEN 1
-
-/*
- * The following code assumes the serial port has already been
- * initialized by the bootloader.  We search for the first enabled
- * port in the most probable order.  If you didn't setup a port in
- * your bootloader then nothing will appear (which might be desired).
- *
- * This does not append a newline
- */
-
-static void putc(int ch)
-{
-        if (!uart_base)
-                return;
-        if (!(UART(UCR1) & UCR1_UARTEN))
-                return;
-
-        while (!(UART(USR2) & USR2_TXFE))
-                barrier();
-
-        UART(TXR) = ch;
-}
-
-static inline void flush(void)
-{
-}
-
-#define MX1_UART1_BASE_ADDR     0x00206000
-#define MX25_UART1_BASE_ADDR    0x43f90000
-#define MX2X_UART1_BASE_ADDR    0x1000a000
-#define MX3X_UART1_BASE_ADDR    0x43F90000
-#define MX3X_UART2_BASE_ADDR    0x43F94000
-#define MX3X_UART5_BASE_ADDR    0x43FB4000
-#define MX51_UART1_BASE_ADDR    0x73fbc000
-#define MX50_UART1_BASE_ADDR    0x53fbc000
-#define MX53_UART1_BASE_ADDR    0x53fbc000
-
-static __inline__ void __arch_decomp_setup(unsigned long arch_id)
-{
-        switch (arch_id) {
-        case MACH_TYPE_MX1ADS:
-        case MACH_TYPE_SCB9328:
-                uart_base = MX1_UART1_BASE_ADDR;
-                break;
-        case MACH_TYPE_MX25_3DS:
-                uart_base = MX25_UART1_BASE_ADDR;
-                break;
-        case MACH_TYPE_IMX27LITE:
-        case MACH_TYPE_MX27_3DS:
-        case MACH_TYPE_MX27ADS:
-        case MACH_TYPE_PCM038:
-        case MACH_TYPE_MX21ADS:
-        case MACH_TYPE_PCA100:
-        case MACH_TYPE_MXT_TD60:
-        case MACH_TYPE_IMX27IPCAM:
-                uart_base = MX2X_UART1_BASE_ADDR;
-                break;
-        case MACH_TYPE_MX31LITE:
-        case MACH_TYPE_ARMADILLO5X0:
-        case MACH_TYPE_MX31MOBOARD:
-        case MACH_TYPE_QONG:
-        case MACH_TYPE_MX31_3DS:
-        case MACH_TYPE_PCM037:
-        case MACH_TYPE_MX31ADS:
-        case MACH_TYPE_MX35_3DS:
-        case MACH_TYPE_PCM043:
-        case MACH_TYPE_LILLY1131:
-        case MACH_TYPE_VPR200:
-        case MACH_TYPE_EUKREA_CPUIMX35SD:
-                uart_base = MX3X_UART1_BASE_ADDR;
-                break;
-        case MACH_TYPE_MAGX_ZN5:
-                uart_base = MX3X_UART2_BASE_ADDR;
-                break;
-        case MACH_TYPE_BUG:
-                uart_base = MX3X_UART5_BASE_ADDR;
-                break;
-        case MACH_TYPE_MX51_BABBAGE:
-        case MACH_TYPE_EUKREA_CPUIMX51SD:
-        case MACH_TYPE_MX51_3DS:
-                uart_base = MX51_UART1_BASE_ADDR;
-                break;
-        case MACH_TYPE_MX50_RDP:
-                uart_base = MX50_UART1_BASE_ADDR;
-                break;
-        case MACH_TYPE_MX53_EVK:
-        case MACH_TYPE_MX53_LOCO:
-        case MACH_TYPE_MX53_SMD:
-        case MACH_TYPE_MX53_ARD:
-                uart_base = MX53_UART1_BASE_ADDR;
-                break;
-        default:
-                break;
-        }
-}
-
-#define arch_decomp_setup()     __arch_decomp_setup(arch_id)
-#define arch_decomp_wdog()
-
-#endif                          /* __ASM_ARCH_MXC_UNCOMPRESS_H__ */
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index 82fcb206b5b2..665870dce3c8 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -154,6 +154,12 @@ config OMAP_32K_TIMER
           intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is
           currently only available for OMAP16XX, 24XX, 34XX and OMAP4/5.
 
+          On OMAP2PLUS this value is only used for CONFIG_HZ and
+          CLOCK_TICK_RATE compile time calculation.
+          The actual timer selection is done in the board file
+          through the (DT_)MACHINE_START structure.
+
+
 config OMAP3_L2_AUX_SECURE_SAVE_RESTORE
         bool "OMAP3 HS/EMU save and restore for L2 AUX control register"
         depends on ARCH_OMAP3 && PM
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index 4bd0ace20e98..8d885848600a 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -3,7 +3,7 @@
 #
 
 # Common support
-obj-y := common.o sram.o dma.o fb.o counter_32k.o
+obj-y := sram.o dma.o fb.o counter_32k.o
 obj-m :=
 obj-n :=
 obj-  :=
@@ -19,4 +19,3 @@ obj-y += $(i2c-omap-m) $(i2c-omap-y)
 # OMAP mailbox framework
 obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox.o
 
-obj-$(CONFIG_OMAP_PM_NOOP) += omap-pm-noop.o
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
deleted file mode 100644
index a1555e028123..000000000000
--- a/arch/arm/plat-omap/common.c
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * linux/arch/arm/plat-omap/common.c
- *
- * Code common to all OMAP machines.
- * The file is created by Tony Lindgren <tony@atomide.com>
- *
- * Copyright (C) 2009 Texas Instruments
- * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/io.h>
-#include <linux/dma-mapping.h>
-
-#include "common.h"
-#include <plat-omap/dma-omap.h>
-
-void __init omap_init_consistent_dma_size(void)
-{
-#ifdef CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE
-        init_consistent_dma_size(CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE << 20);
-#endif
-}
diff --git a/arch/arm/plat-omap/common.h b/arch/arm/plat-omap/common.h
deleted file mode 100644
index 8ae0542a37d9..000000000000
--- a/arch/arm/plat-omap/common.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * Header for shared OMAP code in plat-omap.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the  GNU General Public License along
- * with this program; if not, write  to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef __ARCH_ARM_MACH_OMAP_COMMON_H
-#define __ARCH_ARM_MACH_OMAP_COMMON_H
-
-extern int __init omap_init_clocksource_32k(void __iomem *vbase);
-
-extern void __init omap_check_revision(void);
-
-extern void omap_reserve(void);
-struct omap_hwmod;
-extern int omap_dss_reset(struct omap_hwmod *);
-
-#endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index 66bf3f9324fe..f3771cdb9838 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -22,8 +22,6 @@
 #include <asm/mach/time.h>
 #include <asm/sched_clock.h>
 
-#include "common.h"
-
 /* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */
 #define OMAP2_32KSYNCNT_REV_OFF         0x0
 #define OMAP2_32KSYNCNT_REV_SCHEME      (0x3 << 30)
diff --git a/arch/arm/plat-omap/debug-devices.c b/arch/arm/plat-omap/debug-devices.c
index 5a4678edd65a..a609e2161817 100644
--- a/arch/arm/plat-omap/debug-devices.c
+++ b/arch/arm/plat-omap/debug-devices.c
@@ -15,8 +15,7 @@
 #include <linux/io.h>
 #include <linux/smc91x.h>
 
-#include <mach/hardware.h>
-#include "../mach-omap2/debug-devices.h"
+#include <plat/debug-devices.h>
 
 /* Many OMAP development platforms reuse the same "debug board"; these
  * platforms include H2, H3, H4, and Perseus2.
diff --git a/arch/arm/plat-omap/debug-leds.c b/arch/arm/plat-omap/debug-leds.c
index feca128bc8ed..aa7ebc6bcd65 100644
--- a/arch/arm/plat-omap/debug-leds.c
+++ b/arch/arm/plat-omap/debug-leds.c
@@ -17,16 +17,33 @@
 #include <linux/platform_data/gpio-omap.h>
 #include <linux/slab.h>
 
-#include <mach/hardware.h>
 #include <asm/mach-types.h>
 
-#include "fpga.h"
-
 /* Many OMAP development platforms reuse the same "debug board"; these
  * platforms include H2, H3, H4, and Perseus2.  There are 16 LEDs on the
  * debug board (all green), accessed through FPGA registers.
  */
 
+/* NOTE:  most boards don't have a static mapping for the FPGA ... */
+struct h2p2_dbg_fpga {
+        /* offset 0x00 */
+        u16             smc91x[8];
+        /* offset 0x10 */
+        u16             fpga_rev;
+        u16             board_rev;
+        u16             gpio_outputs;
+        u16             leds;
+        /* offset 0x18 */
+        u16             misc_inputs;
+        u16             lan_status;
+        u16             lan_reset;
+        u16             reserved0;
+        /* offset 0x20 */
+        u16             ps2_data;
+        u16             ps2_ctrl;
+        /* plus also 4 rs232 ports ... */
+};
+
 static struct h2p2_dbg_fpga __iomem *fpga;
 
 static u16 fpga_led_state;
@@ -94,7 +111,7 @@ static int fpga_probe(struct platform_device *pdev)
         if (!iomem)
                 return -ENODEV;
 
-        fpga = ioremap(iomem->start, H2P2_DBG_FPGA_SIZE);
+        fpga = ioremap(iomem->start, resource_size(iomem));
         __raw_writew(0xff, &fpga->leds);
 
         for (i = 0; i < ARRAY_SIZE(dbg_leds); i++) {
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 49803cc18787..37a488aaa2ba 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -36,10 +36,7 @@
 #include <linux/slab.h>
 #include <linux/delay.h>
 
-#include <plat-omap/dma-omap.h>
-
-#include "../mach-omap1/soc.h"
-#include "../mach-omap2/soc.h"
+#include <linux/omap-dma.h>
 
 /*
  * MAX_LOGICAL_DMA_CH_COUNT: the maximum number of logical DMA
@@ -182,7 +179,7 @@ void omap_set_dma_priority(int lch, int dst_port, int priority)
         unsigned long reg;
         u32 l;
 
-        if (cpu_class_is_omap1()) {
+        if (dma_omap1()) {
                 switch (dst_port) {
                 case OMAP_DMA_PORT_OCP_T1:      /* FFFECC00 */
                         reg = OMAP_TC_OCPT1_PRIOR;
@@ -234,7 +231,7 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count,
         l |= data_type;
         p->dma_write(l, CSDP, lch);
 
-        if (cpu_class_is_omap1()) {
+        if (dma_omap1()) {
                 u16 ccr;
 
                 ccr = p->dma_read(CCR, lch);
@@ -250,7 +247,7 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count,
                 p->dma_write(ccr, CCR2, lch);
         }
 
-        if (cpu_class_is_omap2() && dma_trigger) {
+        if (dma_omap2plus() && dma_trigger) {
                 u32 val;
 
                 val = p->dma_read(CCR, lch);
@@ -290,7 +287,7 @@ void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode, u32 color)
 {
         BUG_ON(omap_dma_in_1510_mode());
 
-        if (cpu_class_is_omap1()) {
+        if (dma_omap1()) {
                 u16 w;
 
                 w = p->dma_read(CCR2, lch);
@@ -320,7 +317,7 @@ void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode, u32 color)
                 p->dma_write(w, LCH_CTRL, lch);
         }
 
-        if (cpu_class_is_omap2()) {
+        if (dma_omap2plus()) {
                 u32 val;
 
                 val = p->dma_read(CCR, lch);
@@ -348,7 +345,7 @@ EXPORT_SYMBOL(omap_set_dma_color_mode);
 
 void omap_set_dma_write_mode(int lch, enum omap_dma_write_mode mode)
 {
-        if (cpu_class_is_omap2()) {
+        if (dma_omap2plus()) {
                 u32 csdp;
 
                 csdp = p->dma_read(CSDP, lch);
@@ -361,7 +358,7 @@ EXPORT_SYMBOL(omap_set_dma_write_mode);
 
 void omap_set_dma_channel_mode(int lch, enum omap_dma_channel_mode mode)
 {
-        if (cpu_class_is_omap1() && !cpu_is_omap15xx()) {
+        if (dma_omap1() && !dma_omap15xx()) {
                 u32 l;
 
                 l = p->dma_read(LCH_CTRL, lch);
@@ -379,7 +376,7 @@ void omap_set_dma_src_params(int lch, int src_port, int src_amode,
 {
         u32 l;
 
-        if (cpu_class_is_omap1()) {
+        if (dma_omap1()) {
                 u16 w;
 
                 w = p->dma_read(CSDP, lch);
@@ -421,7 +418,7 @@ EXPORT_SYMBOL(omap_set_dma_params);
 
 void omap_set_dma_src_index(int lch, int eidx, int fidx)
 {
-        if (cpu_class_is_omap2())
+        if (dma_omap2plus())
                 return;
 
         p->dma_write(eidx, CSEI, lch);
@@ -453,13 +450,13 @@ void omap_set_dma_src_burst_mode(int lch, enum omap_dma_burst_mode burst_mode)
         case OMAP_DMA_DATA_BURST_DIS:
                 break;
         case OMAP_DMA_DATA_BURST_4:
-                if (cpu_class_is_omap2())
+                if (dma_omap2plus())
                         burst = 0x1;
                 else
                         burst = 0x2;
                 break;
         case OMAP_DMA_DATA_BURST_8:
-                if (cpu_class_is_omap2()) {
+                if (dma_omap2plus()) {
                         burst = 0x2;
                         break;
                 }
@@ -469,7 +466,7 @@ void omap_set_dma_src_burst_mode(int lch, enum omap_dma_burst_mode burst_mode)
                  * fall through
                  */
         case OMAP_DMA_DATA_BURST_16:
-                if (cpu_class_is_omap2()) {
+                if (dma_omap2plus()) {
                         burst = 0x3;
                         break;
                 }
@@ -493,7 +490,7 @@ void omap_set_dma_dest_params(int lch, int dest_port, int dest_amode,
 {
         u32 l;
 
-        if (cpu_class_is_omap1()) {
+        if (dma_omap1()) {
                 l = p->dma_read(CSDP, lch);
                 l &= ~(0x1f << 9);
                 l |= dest_port << 9;
@@ -514,7 +511,7 @@ EXPORT_SYMBOL(omap_set_dma_dest_params);
 
 void omap_set_dma_dest_index(int lch, int eidx, int fidx)
 {
-        if (cpu_class_is_omap2())
+        if (dma_omap2plus())
                 return;
 
         p->dma_write(eidx, CDEI, lch);
@@ -546,19 +543,19 @@ void omap_set_dma_dest_burst_mode(int lch, enum omap_dma_burst_mode burst_mode)
         case OMAP_DMA_DATA_BURST_DIS:
                 break;
         case OMAP_DMA_DATA_BURST_4:
-                if (cpu_class_is_omap2())
+                if (dma_omap2plus())
                         burst = 0x1;
                 else
                         burst = 0x2;
                 break;
         case OMAP_DMA_DATA_BURST_8:
-                if (cpu_class_is_omap2())
+                if (dma_omap2plus())
                         burst = 0x2;
                 else
                         burst = 0x3;
                 break;
         case OMAP_DMA_DATA_BURST_16:
-                if (cpu_class_is_omap2()) {
+                if (dma_omap2plus()) {
                         burst = 0x3;
                         break;
                 }
@@ -579,7 +576,7 @@ EXPORT_SYMBOL(omap_set_dma_dest_burst_mode);
 static inline void omap_enable_channel_irq(int lch)
 {
         /* Clear CSR */
-        if (cpu_class_is_omap1())
+        if (dma_omap1())
                 p->dma_read(CSR, lch);
         else
                 p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch);
@@ -593,7 +590,7 @@ static inline void omap_disable_channel_irq(int lch)
         /* disable channel interrupts */
         p->dma_write(0, CICR, lch);
         /* Clear CSR */
-        if (cpu_class_is_omap1())
+        if (dma_omap1())
                 p->dma_read(CSR, lch);
         else
                 p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch);
@@ -617,7 +614,7 @@ static inline void enable_lnk(int lch)
 
         l = p->dma_read(CLNK_CTRL, lch);
 
-        if (cpu_class_is_omap1())
+        if (dma_omap1())
                 l &= ~(1 << 14);
 
         /* Set the ENABLE_LNK bits */
@@ -625,7 +622,7 @@ static inline void enable_lnk(int lch)
                 l = dma_chan[lch].next_lch | (1 << 15);
 
 #ifndef CONFIG_ARCH_OMAP1
-        if (cpu_class_is_omap2())
+        if (dma_omap2plus())
                 if (dma_chan[lch].next_linked_ch != -1)
                         l = dma_chan[lch].next_linked_ch | (1 << 15);
 #endif
@@ -642,12 +639,12 @@ static inline void disable_lnk(int lch)
         /* Disable interrupts */
         omap_disable_channel_irq(lch);
 
-        if (cpu_class_is_omap1()) {
+        if (dma_omap1()) {
                 /* Set the STOP_LNK bit */
                 l |= 1 << 14;
         }
 
-        if (cpu_class_is_omap2()) {
+        if (dma_omap2plus()) {
                 /* Clear the ENABLE_LNK bit */
                 l &= ~(1 << 15);
         }
@@ -661,7 +658,7 @@ static inline void omap2_enable_irq_lch(int lch)
         u32 val;
         unsigned long flags;
 
-        if (!cpu_class_is_omap2())
+        if (dma_omap1())
                 return;
 
         spin_lock_irqsave(&dma_chan_lock, flags);
@@ -679,7 +676,7 @@ static inline void omap2_disable_irq_lch(int lch)
         u32 val;
         unsigned long flags;
 
-        if (!cpu_class_is_omap2())
+        if (dma_omap1())
                 return;
 
         spin_lock_irqsave(&dma_chan_lock, flags);
@@ -718,7 +715,7 @@ int omap_request_dma(int dev_id, const char *dev_name,
         if (p->clear_lch_regs)
                 p->clear_lch_regs(free_ch);
 
-        if (cpu_class_is_omap2())
+        if (dma_omap2plus())
                 omap_clear_dma(free_ch);
 
         spin_unlock_irqrestore(&dma_chan_lock, flags);
@@ -729,7 +726,7 @@ int omap_request_dma(int dev_id, const char *dev_name,
         chan->flags = 0;
 
 #ifndef CONFIG_ARCH_OMAP1
-        if (cpu_class_is_omap2()) {
+        if (dma_omap2plus()) {
                 chan->chain_id = -1;
                 chan->next_linked_ch = -1;
         }
@@ -737,13 +734,13 @@ int omap_request_dma(int dev_id, const char *dev_name,
 
         chan->enabled_irqs = OMAP_DMA_DROP_IRQ | OMAP_DMA_BLOCK_IRQ;
 
-        if (cpu_class_is_omap1())
+        if (dma_omap1())
                 chan->enabled_irqs |= OMAP1_DMA_TOUT_IRQ;
-        else if (cpu_class_is_omap2())
+        else if (dma_omap2plus())
                 chan->enabled_irqs |= OMAP2_DMA_MISALIGNED_ERR_IRQ |
                         OMAP2_DMA_TRANS_ERR_IRQ;
 
-        if (cpu_is_omap16xx()) {
+        if (dma_omap16xx()) {
                 /* If the sync device is set, configure it dynamically. */
                 if (dev_id != 0) {
                         set_gdma_dev(free_ch + 1, dev_id);
@@ -754,11 +751,11 @@ int omap_request_dma(int dev_id, const char *dev_name,
                  * id.
                  */
                 p->dma_write(dev_id | (1 << 10), CCR, free_ch);
-        } else if (cpu_is_omap7xx() || cpu_is_omap15xx()) {
+        } else if (dma_omap1()) {
                 p->dma_write(dev_id, CCR, free_ch);
         }
 
-        if (cpu_class_is_omap2()) {
+        if (dma_omap2plus()) {
                 omap_enable_channel_irq(free_ch);
                 omap2_enable_irq_lch(free_ch);
         }
@@ -780,7 +777,7 @@ void omap_free_dma(int lch)
         }
 
         /* Disable interrupt for logical channel */
-        if (cpu_class_is_omap2())
+        if (dma_omap2plus())
                 omap2_disable_irq_lch(lch);
 
         /* Disable all DMA interrupts for the channel. */
@@ -790,7 +787,7 @@ void omap_free_dma(int lch)
         p->dma_write(0, CCR, lch);
 
         /* Clear registers */
-        if (cpu_class_is_omap2())
+        if (dma_omap2plus())
                 omap_clear_dma(lch);
 
         spin_lock_irqsave(&dma_chan_lock, flags);
@@ -816,7 +813,7 @@ omap_dma_set_global_params(int arb_rate, int max_fifo_depth, int tparams)
 {
         u32 reg;
 
-        if (!cpu_class_is_omap2()) {
+        if (dma_omap1()) {
                 printk(KERN_ERR "FIXME: no %s on 15xx/16xx\n", __func__);
                 return;
         }
@@ -855,7 +852,7 @@ omap_dma_set_prio_lch(int lch, unsigned char read_prio,
         }
         l = p->dma_read(CCR, lch);
         l &= ~((1 << 6) | (1 << 26));
-        if (cpu_class_is_omap2() && !cpu_is_omap242x())
+        if (d->dev_caps & IS_RW_PRIORITY)
                 l |= ((read_prio & 0x1) << 6) | ((write_prio & 0x1) << 26);
         else
                 l |= ((read_prio & 0x1) << 6);
@@ -888,7 +885,7 @@ void omap_start_dma(int lch)
          * The CPC/CDAC register needs to be initialized to zero
          * before starting dma transfer.
          */
-        if (cpu_is_omap15xx())
+        if (dma_omap15xx())
                 p->dma_write(0, CPC, lch);
         else
                 p->dma_write(0, CDAC, lch);
@@ -1051,7 +1048,7 @@ dma_addr_t omap_get_dma_src_pos(int lch)
 {
         dma_addr_t offset = 0;
 
-        if (cpu_is_omap15xx())
+        if (dma_omap15xx())
                 offset = p->dma_read(CPC, lch);
         else
                 offset = p->dma_read(CSAC, lch);
@@ -1059,7 +1056,7 @@ dma_addr_t omap_get_dma_src_pos(int lch)
         if (IS_DMA_ERRATA(DMA_ERRATA_3_3) && offset == 0)
                 offset = p->dma_read(CSAC, lch);
 
-        if (!cpu_is_omap15xx()) {
+        if (!dma_omap15xx()) {
                 /*
                  * CDAC == 0 indicates that the DMA transfer on the channel has
                  * not been started (no data has been transferred so far).
@@ -1071,7 +1068,7 @@ dma_addr_t omap_get_dma_src_pos(int lch)
                         offset = p->dma_read(CSSA, lch);
         }
 
-        if (cpu_class_is_omap1())
+        if (dma_omap1())
                 offset |= (p->dma_read(CSSA, lch) & 0xFFFF0000);
 
         return offset;
@@ -1090,7 +1087,7 @@ dma_addr_t omap_get_dma_dst_pos(int lch)
 {
         dma_addr_t offset = 0;
 
-        if (cpu_is_omap15xx())
+        if (dma_omap15xx())
                 offset = p->dma_read(CPC, lch);
         else
                 offset = p->dma_read(CDAC, lch);
@@ -1099,7 +1096,7 @@ dma_addr_t omap_get_dma_dst_pos(int lch)
          * omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is
          * read before the DMA controller finished disabling the channel.
          */
-        if (!cpu_is_omap15xx() && offset == 0) {
+        if (!dma_omap15xx() && offset == 0) {
                 offset = p->dma_read(CDAC, lch);
                 /*
                  * CDAC == 0 indicates that the DMA transfer on the channel has
@@ -1110,7 +1107,7 @@ dma_addr_t omap_get_dma_dst_pos(int lch)
                         offset = p->dma_read(CDSA, lch);
         }
 
-        if (cpu_class_is_omap1())
+        if (dma_omap1())
                 offset |= (p->dma_read(CDSA, lch) & 0xFFFF0000);
 
         return offset;
@@ -1127,7 +1124,7 @@ int omap_dma_running(void)
 {
         int lch;
 
-        if (cpu_class_is_omap1())
+        if (dma_omap1())
                 if (omap_lcd_dma_running())
                         return 1;
 
@@ -2030,7 +2027,7 @@ static int __devinit omap_system_dma_probe(struct platform_device *pdev)
         dma_chan                = d->chan;
         enable_1510_mode        = d->dev_caps & ENABLE_1510_MODE;
 
-        if (cpu_class_is_omap2()) {
+        if (dma_omap2plus()) {
                 dma_linked_lch = kzalloc(sizeof(struct dma_link_info) *
                                                 dma_lch_count, GFP_KERNEL);
                 if (!dma_linked_lch) {
@@ -2042,7 +2039,7 @@ static int __devinit omap_system_dma_probe(struct platform_device *pdev)
         spin_lock_init(&dma_chan_lock);
         for (ch = 0; ch < dma_chan_count; ch++) {
                 omap_clear_dma(ch);
-                if (cpu_class_is_omap2())
+                if (dma_omap2plus())
                         omap2_disable_irq_lch(ch);
 
                 dma_chan[ch].dev_id = -1;
@@ -2051,7 +2048,7 @@ static int __devinit omap_system_dma_probe(struct platform_device *pdev)
                 if (ch >= 6 && enable_1510_mode)
                         continue;
 
-                if (cpu_class_is_omap1()) {
+                if (dma_omap1()) {
                         /*
                          * request_irq() doesn't like dev_id (ie. ch) being
                          * zero, so we have to kludge around this.
@@ -2076,11 +2073,11 @@ static int __devinit omap_system_dma_probe(struct platform_device *pdev)
                 }
         }
 
-        if (cpu_class_is_omap2() && !cpu_is_omap242x())
+        if (d->dev_caps & IS_RW_PRIORITY)
                 omap_dma_set_global_params(DMA_DEFAULT_ARB_RATE,
                                 DMA_DEFAULT_FIFO_DEPTH, 0);
 
-        if (cpu_class_is_omap2()) {
+        if (dma_omap2plus()) {
                 strcpy(irq_name, "0");
                 dma_irq = platform_get_irq_byname(pdev, irq_name);
                 if (dma_irq < 0) {
@@ -2095,9 +2092,8 @@ static int __devinit omap_system_dma_probe(struct platform_device *pdev)
                 }
         }
 
-        /* reserve dma channels 0 and 1 in high security devices */
-        if (cpu_is_omap34xx() &&
-                (omap_type() != OMAP2_DEVICE_TYPE_GP)) {
+        /* reserve dma channels 0 and 1 in high security devices on 34xx */
+        if (d->dev_caps & HS_CHANNELS_RESERVED) {
                 pr_info("Reserving DMA channels 0 and 1 for HS ROM code\n");
                 dma_chan[0].dev_id = 0;
                 dma_chan[1].dev_id = 1;
@@ -2124,7 +2120,7 @@ static int __devexit omap_system_dma_remove(struct platform_device *pdev)
 {
         int dma_irq;
 
-        if (cpu_class_is_omap2()) {
+        if (dma_omap2plus()) {
                 char irq_name[4];
                 strcpy(irq_name, "0");
                 dma_irq = platform_get_irq_byname(pdev, irq_name);
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 4a0b30a4ebda..89585c293554 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -35,18 +35,19 @@
  * 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
+#include <linux/clk.h>
 #include <linux/module.h>
 #include <linux/io.h>
 #include <linux/device.h>
 #include <linux/err.h>
 #include <linux/pm_runtime.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/dmtimer-omap.h>
 
 #include <plat/dmtimer.h>
 
-#include <mach/hardware.h>
-
-#include "../mach-omap2/omap-pm.h"
-
 static u32 omap_reserved_systimers;
 static LIST_HEAD(omap_timer_list);
 static DEFINE_SPINLOCK(dm_timer_lock);
@@ -85,10 +86,6 @@ static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg,
 
 static void omap_timer_restore_context(struct omap_dm_timer *timer)
 {
-        if (timer->revision == 1)
-                __raw_writel(timer->context.tistat, timer->sys_stat);
-
-        __raw_writel(timer->context.tisr, timer->irq_stat);
         omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG,
                                 timer->context.twer);
         omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG,
@@ -104,39 +101,38 @@ static void omap_timer_restore_context(struct omap_dm_timer *timer)
                                 timer->context.tclr);
 }
 
-static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer)
+static int omap_dm_timer_reset(struct omap_dm_timer *timer)
 {
-        int c;
+        u32 l, timeout = 100000;
 
-        if (!timer->sys_stat)
-                return;
+        if (timer->revision != 1)
+                return -EINVAL;
 
-        c = 0;
-        while (!(__raw_readl(timer->sys_stat) & 1)) {
-                c++;
-                if (c > 100000) {
-                        printk(KERN_ERR "Timer failed to reset\n");
-                        return;
-                }
-        }
-}
+        omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06);
 
-static void omap_dm_timer_reset(struct omap_dm_timer *timer)
-{
-        omap_dm_timer_enable(timer);
-        if (timer->pdev->id != 1) {
-                omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06);
-                omap_dm_timer_wait_for_reset(timer);
+        do {
+                l = __omap_dm_timer_read(timer,
+                                         OMAP_TIMER_V1_SYS_STAT_OFFSET, 0);
+        } while (!l && timeout--);
+
+        if (!timeout) {
+                dev_err(&timer->pdev->dev, "Timer failed to reset\n");
+                return -ETIMEDOUT;
         }
 
-        __omap_dm_timer_reset(timer, 0, 0);
-        omap_dm_timer_disable(timer);
-        timer->posted = 1;
+        /* Configure timer for smart-idle mode */
+        l = __omap_dm_timer_read(timer, OMAP_TIMER_OCP_CFG_OFFSET, 0);
+        l |= 0x2 << 0x3;
+        __omap_dm_timer_write(timer, OMAP_TIMER_OCP_CFG_OFFSET, l, 0);
+
+        timer->posted = 0;
+
+        return 0;
 }
 
-int omap_dm_timer_prepare(struct omap_dm_timer *timer)
+static int omap_dm_timer_prepare(struct omap_dm_timer *timer)
 {
-        int ret;
+        int rc;
 
         /*
          * FIXME: OMAP1 devices do not use the clock framework for dmtimers so
@@ -151,13 +147,20 @@ int omap_dm_timer_prepare(struct omap_dm_timer *timer)
                 }
         }
 
-        if (timer->capability & OMAP_TIMER_NEEDS_RESET)
-                omap_dm_timer_reset(timer);
+        omap_dm_timer_enable(timer);
 
-        ret = omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ);
+        if (timer->capability & OMAP_TIMER_NEEDS_RESET) {
+                rc = omap_dm_timer_reset(timer);
+                if (rc) {
+                        omap_dm_timer_disable(timer);
+                        return rc;
+                }
+        }
 
-        timer->posted = 1;
-        return ret;
+        __omap_dm_timer_enable_posted(timer);
+        omap_dm_timer_disable(timer);
+
+        return omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ);
 }
 
 static inline u32 omap_dm_timer_reserved_systimer(int id)
@@ -213,6 +216,13 @@ struct omap_dm_timer *omap_dm_timer_request_specific(int id)
         unsigned long flags;
         int ret = 0;
 
+        /* Requesting timer by ID is not supported when device tree is used */
+        if (of_have_populated_dt()) {
+                pr_warn("%s: Please use omap_dm_timer_request_by_cap()\n",
+                        __func__);
+                return NULL;
+        }
+
         spin_lock_irqsave(&dm_timer_lock, flags);
         list_for_each_entry(t, &omap_timer_list, node) {
                 if (t->pdev->id == id && !t->reserved) {
@@ -238,6 +248,58 @@ struct omap_dm_timer *omap_dm_timer_request_specific(int id)
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_request_specific);
 
+/**
+ * omap_dm_timer_request_by_cap - Request a timer by capability
+ * @cap:        Bit mask of capabilities to match
+ *
+ * Find a timer based upon capabilities bit mask. Callers of this function
+ * should use the definitions found in the plat/dmtimer.h file under the
+ * comment "timer capabilities used in hwmod database". Returns pointer to
+ * timer handle on success and a NULL pointer on failure.
+ */
+struct omap_dm_timer *omap_dm_timer_request_by_cap(u32 cap)
+{
+        struct omap_dm_timer *timer = NULL, *t;
+        unsigned long flags;
+
+        if (!cap)
+                return NULL;
+
+        spin_lock_irqsave(&dm_timer_lock, flags);
+        list_for_each_entry(t, &omap_timer_list, node) {
+                if ((!t->reserved) && ((t->capability & cap) == cap)) {
+                        /*
+                         * If timer is not NULL, we have already found one timer
+                         * but it was not an exact match because it had more
+                         * capabilites that what was required. Therefore,
+                         * unreserve the last timer found and see if this one
+                         * is a better match.
+                         */
+                        if (timer)
+                                timer->reserved = 0;
+
+                        timer = t;
+                        timer->reserved = 1;
+
+                        /* Exit loop early if we find an exact match */
+                        if (t->capability == cap)
+                                break;
+                }
+        }
+        spin_unlock_irqrestore(&dm_timer_lock, flags);
+
+        if (timer && omap_dm_timer_prepare(timer)) {
+                timer->reserved = 0;
+                timer = NULL;
+        }
+
+        if (!timer)
+                pr_debug("%s: timer request failed!\n", __func__);
+
+        return timer;
+}
+EXPORT_SYMBOL_GPL(omap_dm_timer_request_by_cap);
+
 int omap_dm_timer_free(struct omap_dm_timer *timer)
 {
         if (unlikely(!timer))
@@ -272,7 +334,7 @@ int omap_dm_timer_get_irq(struct omap_dm_timer *timer)
 EXPORT_SYMBOL_GPL(omap_dm_timer_get_irq);
 
 #if defined(CONFIG_ARCH_OMAP1)
-
+#include <mach/hardware.h>
 /**
  * omap_dm_timer_modify_idlect_mask - Check if any running timers use ARMXOR
  * @inputmask: current value of idlect mask
@@ -349,7 +411,8 @@ int omap_dm_timer_start(struct omap_dm_timer *timer)
         omap_dm_timer_enable(timer);
 
         if (!(timer->capability & OMAP_TIMER_ALWON)) {
-                if (omap_pm_get_dev_context_loss_count(&timer->pdev->dev) !=
+                if (timer->get_context_loss_count &&
+                        timer->get_context_loss_count(&timer->pdev->dev) !=
                                 timer->ctx_loss_count)
                         omap_timer_restore_context(timer);
         }
@@ -378,9 +441,11 @@ int omap_dm_timer_stop(struct omap_dm_timer *timer)
 
         __omap_dm_timer_stop(timer, timer->posted, rate);
 
-        if (!(timer->capability & OMAP_TIMER_ALWON))
-                timer->ctx_loss_count =
-                        omap_pm_get_dev_context_loss_count(&timer->pdev->dev);
+        if (!(timer->capability & OMAP_TIMER_ALWON)) {
+                if (timer->get_context_loss_count)
+                        timer->ctx_loss_count =
+                                timer->get_context_loss_count(&timer->pdev->dev);
+        }
 
         /*
          * Since the register values are computed and written within
@@ -389,7 +454,6 @@ int omap_dm_timer_stop(struct omap_dm_timer *timer)
          */
         timer->context.tclr =
                         omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
-        timer->context.tisr = __raw_readl(timer->irq_stat);
         omap_dm_timer_disable(timer);
         return 0;
 }
@@ -399,7 +463,7 @@ int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
 {
         int ret;
         char *parent_name = NULL;
-        struct clk *fclk, *parent;
+        struct clk *parent;
         struct dmtimer_platform_data *pdata;
 
         if (unlikely(!timer))
@@ -415,14 +479,11 @@ int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
          * use the clock framework to set the parent clock. To be removed
          * once OMAP1 migrated to using clock framework for dmtimers
          */
-        if (pdata->set_timer_src)
+        if (pdata && pdata->set_timer_src)
                 return pdata->set_timer_src(timer->pdev, source);
 
-        fclk = clk_get(&timer->pdev->dev, "fck");
-        if (IS_ERR_OR_NULL(fclk)) {
-                pr_err("%s: fck not found\n", __func__);
+        if (!timer->fclk)
                 return -EINVAL;
-        }
 
         switch (source) {
         case OMAP_TIMER_SRC_SYS_CLK:
@@ -441,18 +502,15 @@ int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
         parent = clk_get(&timer->pdev->dev, parent_name);
         if (IS_ERR_OR_NULL(parent)) {
                 pr_err("%s: %s not found\n", __func__, parent_name);
-                ret = -EINVAL;
-                goto out;
+                return -EINVAL;
         }
 
-        ret = clk_set_parent(fclk, parent);
+        ret = clk_set_parent(timer->fclk, parent);
         if (IS_ERR_VALUE(ret))
                 pr_err("%s: failed to set %s as parent\n", __func__,
                         parent_name);
 
         clk_put(parent);
-out:
-        clk_put(fclk);
 
         return ret;
 }
@@ -496,7 +554,8 @@ int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
         omap_dm_timer_enable(timer);
 
         if (!(timer->capability & OMAP_TIMER_ALWON)) {
-                if (omap_pm_get_dev_context_loss_count(&timer->pdev->dev) !=
+                if (timer->get_context_loss_count &&
+                        timer->get_context_loss_count(&timer->pdev->dev) !=
                                 timer->ctx_loss_count)
                         omap_timer_restore_context(timer);
         }
@@ -534,8 +593,8 @@ int omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
                 l |= OMAP_TIMER_CTRL_CE;
         else
                 l &= ~OMAP_TIMER_CTRL_CE;
-        omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
         omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG, match);
+        omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
 
         /* Save the context */
         timer->context.tclr = l;
@@ -611,6 +670,37 @@ int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable);
 
+/**
+ * omap_dm_timer_set_int_disable - disable timer interrupts
+ * @timer:      pointer to timer handle
+ * @mask:       bit mask of interrupts to be disabled
+ *
+ * Disables the specified timer interrupts for a timer.
+ */
+int omap_dm_timer_set_int_disable(struct omap_dm_timer *timer, u32 mask)
+{
+        u32 l = mask;
+
+        if (unlikely(!timer))
+                return -EINVAL;
+
+        omap_dm_timer_enable(timer);
+
+        if (timer->revision == 1)
+                l = __raw_readl(timer->irq_ena) & ~mask;
+
+        __raw_writel(l, timer->irq_dis);
+        l = omap_dm_timer_read_reg(timer, OMAP_TIMER_WAKEUP_EN_REG) & ~mask;
+        omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG, l);
+
+        /* Save the context */
+        timer->context.tier &= ~mask;
+        timer->context.twer &= ~mask;
+        omap_dm_timer_disable(timer);
+        return 0;
+}
+EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_disable);
+
 unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer)
 {
         unsigned int l;
@@ -632,8 +722,7 @@ int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value)
                 return -EINVAL;
 
         __omap_dm_timer_write_status(timer, value);
-        /* Save the context */
-        timer->context.tisr = value;
+
         return 0;
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_write_status);
@@ -696,7 +785,7 @@ static int __devinit omap_dm_timer_probe(struct platform_device *pdev)
         struct device *dev = &pdev->dev;
         struct dmtimer_platform_data *pdata = pdev->dev.platform_data;
 
-        if (!pdata) {
+        if (!pdata && !dev->of_node) {
                 dev_err(dev, "%s: no platform data.\n", __func__);
                 return -ENODEV;
         }
@@ -725,11 +814,25 @@ static int __devinit omap_dm_timer_probe(struct platform_device *pdev)
                 return -ENOMEM;
         }
 
-        timer->id = pdev->id;
+        if (dev->of_node) {
+                if (of_find_property(dev->of_node, "ti,timer-alwon", NULL))
+                        timer->capability |= OMAP_TIMER_ALWON;
+                if (of_find_property(dev->of_node, "ti,timer-dsp", NULL))
+                        timer->capability |= OMAP_TIMER_HAS_DSP_IRQ;
+                if (of_find_property(dev->of_node, "ti,timer-pwm", NULL))
+                        timer->capability |= OMAP_TIMER_HAS_PWM;
+                if (of_find_property(dev->of_node, "ti,timer-secure", NULL))
+                        timer->capability |= OMAP_TIMER_SECURE;
+        } else {
+                timer->id = pdev->id;
+                timer->errata = pdata->timer_errata;
+                timer->capability = pdata->timer_capability;
+                timer->reserved = omap_dm_timer_reserved_systimer(timer->id);
+                timer->get_context_loss_count = pdata->get_context_loss_count;
+        }
+
         timer->irq = irq->start;
-        timer->reserved = omap_dm_timer_reserved_systimer(timer->id);
         timer->pdev = pdev;
-        timer->capability = pdata->timer_capability;
 
         /* Skip pm_runtime_enable for OMAP1 */
         if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) {
@@ -769,7 +872,8 @@ static int __devexit omap_dm_timer_remove(struct platform_device *pdev)
 
         spin_lock_irqsave(&dm_timer_lock, flags);
         list_for_each_entry(timer, &omap_timer_list, node)
-                if (timer->pdev->id == pdev->id) {
+                if (!strcmp(dev_name(&timer->pdev->dev),
+                            dev_name(&pdev->dev))) {
                         list_del(&timer->node);
                         ret = 0;
                         break;
@@ -779,11 +883,18 @@ static int __devexit omap_dm_timer_remove(struct platform_device *pdev)
         return ret;
 }
 
+static const struct of_device_id omap_timer_match[] = {
+        { .compatible = "ti,omap2-timer", },
+        {},
+};
+MODULE_DEVICE_TABLE(of, omap_timer_match);
+
 static struct platform_driver omap_dm_timer_driver = {
         .probe  = omap_dm_timer_probe,
         .remove = __devexit_p(omap_dm_timer_remove),
         .driver = {
                 .name   = "omap_timer",
+                .of_match_table = of_match_ptr(omap_timer_match),
         },
 };
 
diff --git a/arch/arm/plat-omap/fb.c b/arch/arm/plat-omap/fb.c
index f868caeedfd6..3a77b30f53d4 100644
--- a/arch/arm/plat-omap/fb.c
+++ b/arch/arm/plat-omap/fb.c
@@ -30,7 +30,6 @@
 #include <linux/io.h>
 #include <linux/omapfb.h>
 
-#include <mach/hardware.h>
 #include <asm/mach/map.h>
 
 #include <plat/cpu.h>
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index be6deb7c12ec..f9df624d108c 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -31,34 +31,13 @@
 #include <linux/err.h>
 #include <linux/clk.h>
 
-#include <mach/irqs.h>
-
-#include "../mach-omap1/soc.h"
-#include "../mach-omap2/soc.h"
-
-#include "i2c.h"
+#include <plat/i2c.h>
 
 #define OMAP_I2C_MAX_CONTROLLERS 4
 static struct omap_i2c_bus_platform_data i2c_pdata[OMAP_I2C_MAX_CONTROLLERS];
 
 #define OMAP_I2C_CMDLINE_SETUP  (BIT(31))
 
-static int __init omap_i2c_nr_ports(void)
-{
-        int ports = 0;
-
-        if (cpu_class_is_omap1())
-                ports = 1;
-        else if (cpu_is_omap24xx())
-                ports = 2;
-        else if (cpu_is_omap34xx())
-                ports = 3;
-        else if (cpu_is_omap44xx())
-                ports = 4;
-
-        return ports;
-}
-
 /**
  * omap_i2c_bus_setup - Process command line options for the I2C bus speed
  * @str: String of options
@@ -72,12 +51,11 @@ static int __init omap_i2c_nr_ports(void)
  */
 static int __init omap_i2c_bus_setup(char *str)
 {
-        int ports;
         int ints[3];
 
-        ports = omap_i2c_nr_ports();
         get_options(str, 3, ints);
-        if (ints[0] < 2 || ints[1] < 1 || ints[1] > ports)
+        if (ints[0] < 2 || ints[1] < 1 ||
+                        ints[1] > OMAP_I2C_MAX_CONTROLLERS)
                 return 0;
         i2c_pdata[ints[1] - 1].clkrate = ints[2];
         i2c_pdata[ints[1] - 1].clkrate |= OMAP_I2C_CMDLINE_SETUP;
@@ -122,7 +100,7 @@ int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
 {
         int err;
 
-        BUG_ON(bus_id < 1 || bus_id > omap_i2c_nr_ports());
+        BUG_ON(bus_id < 1 || bus_id > OMAP_I2C_MAX_CONTROLLERS);
 
         if (info) {
                 err = i2c_register_board_info(bus_id, info, len);
diff --git a/arch/arm/plat-omap/include/plat-omap/dma-omap.h b/arch/arm/plat-omap/include/plat-omap/dma-omap.h
deleted file mode 100644
index 222be7e934e5..000000000000
--- a/arch/arm/plat-omap/include/plat-omap/dma-omap.h
+++ /dev/null
@@ -1,367 +0,0 @@
-/*
- *  OMAP DMA handling defines and function
- *
- *  Copyright (C) 2003 Nokia Corporation
- *  Author: Juha Yrjölä <juha.yrjola@nokia.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#ifndef __ASM_ARCH_DMA_H
-#define __ASM_ARCH_DMA_H
-
-#include <linux/platform_device.h>
-
-#define INT_DMA_LCD                     25
-
-#define OMAP1_DMA_TOUT_IRQ              (1 << 0)
-#define OMAP_DMA_DROP_IRQ               (1 << 1)
-#define OMAP_DMA_HALF_IRQ               (1 << 2)
-#define OMAP_DMA_FRAME_IRQ              (1 << 3)
-#define OMAP_DMA_LAST_IRQ               (1 << 4)
-#define OMAP_DMA_BLOCK_IRQ              (1 << 5)
-#define OMAP1_DMA_SYNC_IRQ              (1 << 6)
-#define OMAP2_DMA_PKT_IRQ               (1 << 7)
-#define OMAP2_DMA_TRANS_ERR_IRQ         (1 << 8)
-#define OMAP2_DMA_SECURE_ERR_IRQ        (1 << 9)
-#define OMAP2_DMA_SUPERVISOR_ERR_IRQ    (1 << 10)
-#define OMAP2_DMA_MISALIGNED_ERR_IRQ    (1 << 11)
-
-#define OMAP_DMA_CCR_EN                 (1 << 7)
-#define OMAP_DMA_CCR_RD_ACTIVE          (1 << 9)
-#define OMAP_DMA_CCR_WR_ACTIVE          (1 << 10)
-#define OMAP_DMA_CCR_SEL_SRC_DST_SYNC   (1 << 24)
-#define OMAP_DMA_CCR_BUFFERING_DISABLE  (1 << 25)
-
-#define OMAP_DMA_DATA_TYPE_S8           0x00
-#define OMAP_DMA_DATA_TYPE_S16          0x01
-#define OMAP_DMA_DATA_TYPE_S32          0x02
-
-#define OMAP_DMA_SYNC_ELEMENT           0x00
-#define OMAP_DMA_SYNC_FRAME             0x01
-#define OMAP_DMA_SYNC_BLOCK             0x02
-#define OMAP_DMA_SYNC_PACKET            0x03
-
-#define OMAP_DMA_DST_SYNC_PREFETCH      0x02
-#define OMAP_DMA_SRC_SYNC               0x01
-#define OMAP_DMA_DST_SYNC               0x00
-
-#define OMAP_DMA_PORT_EMIFF             0x00
-#define OMAP_DMA_PORT_EMIFS             0x01
-#define OMAP_DMA_PORT_OCP_T1            0x02
-#define OMAP_DMA_PORT_TIPB              0x03
-#define OMAP_DMA_PORT_OCP_T2            0x04
-#define OMAP_DMA_PORT_MPUI              0x05
-
-#define OMAP_DMA_AMODE_CONSTANT         0x00
-#define OMAP_DMA_AMODE_POST_INC         0x01
-#define OMAP_DMA_AMODE_SINGLE_IDX       0x02
-#define OMAP_DMA_AMODE_DOUBLE_IDX       0x03
-
-#define DMA_DEFAULT_FIFO_DEPTH          0x10
-#define DMA_DEFAULT_ARB_RATE            0x01
-/* Pass THREAD_RESERVE ORed with THREAD_FIFO for tparams */
-#define DMA_THREAD_RESERVE_NORM         (0x00 << 12) /* Def */
-#define DMA_THREAD_RESERVE_ONET         (0x01 << 12)
-#define DMA_THREAD_RESERVE_TWOT         (0x02 << 12)
-#define DMA_THREAD_RESERVE_THREET       (0x03 << 12)
-#define DMA_THREAD_FIFO_NONE            (0x00 << 14) /* Def */
-#define DMA_THREAD_FIFO_75              (0x01 << 14)
-#define DMA_THREAD_FIFO_25              (0x02 << 14)
-#define DMA_THREAD_FIFO_50              (0x03 << 14)
-
-/* DMA4_OCP_SYSCONFIG bits */
-#define DMA_SYSCONFIG_MIDLEMODE_MASK            (3 << 12)
-#define DMA_SYSCONFIG_CLOCKACTIVITY_MASK        (3 << 8)
-#define DMA_SYSCONFIG_EMUFREE                   (1 << 5)
-#define DMA_SYSCONFIG_SIDLEMODE_MASK            (3 << 3)
-#define DMA_SYSCONFIG_SOFTRESET                 (1 << 2)
-#define DMA_SYSCONFIG_AUTOIDLE                  (1 << 0)
-
-#define DMA_SYSCONFIG_MIDLEMODE(n)              ((n) << 12)
-#define DMA_SYSCONFIG_SIDLEMODE(n)              ((n) << 3)
-
-#define DMA_IDLEMODE_SMARTIDLE                  0x2
-#define DMA_IDLEMODE_NO_IDLE                    0x1
-#define DMA_IDLEMODE_FORCE_IDLE                 0x0
-
-/* Chaining modes*/
-#ifndef CONFIG_ARCH_OMAP1
-#define OMAP_DMA_STATIC_CHAIN           0x1
-#define OMAP_DMA_DYNAMIC_CHAIN          0x2
-#define OMAP_DMA_CHAIN_ACTIVE           0x1
-#define OMAP_DMA_CHAIN_INACTIVE         0x0
-#endif
-
-#define DMA_CH_PRIO_HIGH                0x1
-#define DMA_CH_PRIO_LOW                 0x0 /* Def */
-
-/* Errata handling */
-#define IS_DMA_ERRATA(id)               (errata & (id))
-#define SET_DMA_ERRATA(id)              (errata |= (id))
-
-#define DMA_ERRATA_IFRAME_BUFFERING     BIT(0x0)
-#define DMA_ERRATA_PARALLEL_CHANNELS    BIT(0x1)
-#define DMA_ERRATA_i378                 BIT(0x2)
-#define DMA_ERRATA_i541                 BIT(0x3)
-#define DMA_ERRATA_i88                  BIT(0x4)
-#define DMA_ERRATA_3_3                  BIT(0x5)
-#define DMA_ROMCODE_BUG                 BIT(0x6)
-
-/* Attributes for OMAP DMA Contrller */
-#define DMA_LINKED_LCH                  BIT(0x0)
-#define GLOBAL_PRIORITY                 BIT(0x1)
-#define RESERVE_CHANNEL                 BIT(0x2)
-#define IS_CSSA_32                      BIT(0x3)
-#define IS_CDSA_32                      BIT(0x4)
-#define IS_RW_PRIORITY                  BIT(0x5)
-#define ENABLE_1510_MODE                BIT(0x6)
-#define SRC_PORT                        BIT(0x7)
-#define DST_PORT                        BIT(0x8)
-#define SRC_INDEX                       BIT(0x9)
-#define DST_INDEX                       BIT(0xA)
-#define IS_BURST_ONLY4                  BIT(0xB)
-#define CLEAR_CSR_ON_READ               BIT(0xC)
-#define IS_WORD_16                      BIT(0xD)
-
-/* Defines for DMA Capabilities */
-#define DMA_HAS_TRANSPARENT_CAPS        (0x1 << 18)
-#define DMA_HAS_CONSTANT_FILL_CAPS      (0x1 << 19)
-#define DMA_HAS_DESCRIPTOR_CAPS         (0x3 << 20)
-
-enum omap_reg_offsets {
-
-GCR,            GSCR,           GRST1,          HW_ID,
-PCH2_ID,        PCH0_ID,        PCH1_ID,        PCHG_ID,
-PCHD_ID,        CAPS_0,         CAPS_1,         CAPS_2,
-CAPS_3,         CAPS_4,         PCH2_SR,        PCH0_SR,
-PCH1_SR,        PCHD_SR,        REVISION,       IRQSTATUS_L0,
-IRQSTATUS_L1,   IRQSTATUS_L2,   IRQSTATUS_L3,   IRQENABLE_L0,
-IRQENABLE_L1,   IRQENABLE_L2,   IRQENABLE_L3,   SYSSTATUS,
-OCP_SYSCONFIG,
-
-/* omap1+ specific */
-CPC, CCR2, LCH_CTRL,
-
-/* Common registers for all omap's */
-CSDP,           CCR,            CICR,           CSR,
-CEN,            CFN,            CSFI,           CSEI,
-CSAC,           CDAC,           CDEI,
-CDFI,           CLNK_CTRL,
-
-/* Channel specific registers */
-CSSA,           CDSA,           COLOR,
-CCEN,           CCFN,
-
-/* omap3630 and omap4 specific */
-CDP,            CNDP,           CCDN,
-
-};
-
-enum omap_dma_burst_mode {
-        OMAP_DMA_DATA_BURST_DIS = 0,
-        OMAP_DMA_DATA_BURST_4,
-        OMAP_DMA_DATA_BURST_8,
-        OMAP_DMA_DATA_BURST_16,
-};
-
-enum end_type {
-        OMAP_DMA_LITTLE_ENDIAN = 0,
-        OMAP_DMA_BIG_ENDIAN
-};
-
-enum omap_dma_color_mode {
-        OMAP_DMA_COLOR_DIS = 0,
-        OMAP_DMA_CONSTANT_FILL,
-        OMAP_DMA_TRANSPARENT_COPY
-};
-
-enum omap_dma_write_mode {
-        OMAP_DMA_WRITE_NON_POSTED = 0,
-        OMAP_DMA_WRITE_POSTED,
-        OMAP_DMA_WRITE_LAST_NON_POSTED
-};
-
-enum omap_dma_channel_mode {
-        OMAP_DMA_LCH_2D = 0,
-        OMAP_DMA_LCH_G,
-        OMAP_DMA_LCH_P,
-        OMAP_DMA_LCH_PD
-};
-
-struct omap_dma_channel_params {
-        int data_type;          /* data type 8,16,32 */
-        int elem_count;         /* number of elements in a frame */
-        int frame_count;        /* number of frames in a element */
-
-        int src_port;           /* Only on OMAP1 REVISIT: Is this needed? */
-        int src_amode;          /* constant, post increment, indexed,
-                                        double indexed */
-        unsigned long src_start;        /* source address : physical */
-        int src_ei;             /* source element index */
-        int src_fi;             /* source frame index */
-
-        int dst_port;           /* Only on OMAP1 REVISIT: Is this needed? */
-        int dst_amode;          /* constant, post increment, indexed,
-                                        double indexed */
-        unsigned long dst_start;        /* source address : physical */
-        int dst_ei;             /* source element index */
-        int dst_fi;             /* source frame index */
-
-        int trigger;            /* trigger attached if the channel is
-                                        synchronized */
-        int sync_mode;          /* sycn on element, frame , block or packet */
-        int src_or_dst_synch;   /* source synch(1) or destination synch(0) */
-
-        int ie;                 /* interrupt enabled */
-
-        unsigned char read_prio;/* read priority */
-        unsigned char write_prio;/* write priority */
-
-#ifndef CONFIG_ARCH_OMAP1
-        enum omap_dma_burst_mode burst_mode; /* Burst mode 4/8/16 words */
-#endif
-};
-
-struct omap_dma_lch {
-        int next_lch;
-        int dev_id;
-        u16 saved_csr;
-        u16 enabled_irqs;
-        const char *dev_name;
-        void (*callback)(int lch, u16 ch_status, void *data);
-        void *data;
-        long flags;
-        /* required for Dynamic chaining */
-        int prev_linked_ch;
-        int next_linked_ch;
-        int state;
-        int chain_id;
-        int status;
-};
-
-struct omap_dma_dev_attr {
-        u32 dev_caps;
-        u16 lch_count;
-        u16 chan_count;
-        struct omap_dma_lch *chan;
-};
-
-/* System DMA platform data structure */
-struct omap_system_dma_plat_info {
-        struct omap_dma_dev_attr *dma_attr;
-        u32 errata;
-        void (*disable_irq_lch)(int lch);
-        void (*show_dma_caps)(void);
-        void (*clear_lch_regs)(int lch);
-        void (*clear_dma)(int lch);
-        void (*dma_write)(u32 val, int reg, int lch);
-        u32 (*dma_read)(int reg, int lch);
-};
-
-extern void __init omap_init_consistent_dma_size(void);
-extern void omap_set_dma_priority(int lch, int dst_port, int priority);
-extern int omap_request_dma(int dev_id, const char *dev_name,
-                        void (*callback)(int lch, u16 ch_status, void *data),
-                        void *data, int *dma_ch);
-extern void omap_enable_dma_irq(int ch, u16 irq_bits);
-extern void omap_disable_dma_irq(int ch, u16 irq_bits);
-extern void omap_free_dma(int ch);
-extern void omap_start_dma(int lch);
-extern void omap_stop_dma(int lch);
-extern void omap_set_dma_transfer_params(int lch, int data_type,
-                                         int elem_count, int frame_count,
-                                         int sync_mode,
-                                         int dma_trigger, int src_or_dst_synch);
-extern void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode,
-                                    u32 color);
-extern void omap_set_dma_write_mode(int lch, enum omap_dma_write_mode mode);
-extern void omap_set_dma_channel_mode(int lch, enum omap_dma_channel_mode mode);
-
-extern void omap_set_dma_src_params(int lch, int src_port, int src_amode,
-                                    unsigned long src_start,
-                                    int src_ei, int src_fi);
-extern void omap_set_dma_src_index(int lch, int eidx, int fidx);
-extern void omap_set_dma_src_data_pack(int lch, int enable);
-extern void omap_set_dma_src_burst_mode(int lch,
-                                        enum omap_dma_burst_mode burst_mode);
-
-extern void omap_set_dma_dest_params(int lch, int dest_port, int dest_amode,
-                                     unsigned long dest_start,
-                                     int dst_ei, int dst_fi);
-extern void omap_set_dma_dest_index(int lch, int eidx, int fidx);
-extern void omap_set_dma_dest_data_pack(int lch, int enable);
-extern void omap_set_dma_dest_burst_mode(int lch,
-                                         enum omap_dma_burst_mode burst_mode);
-
-extern void omap_set_dma_params(int lch,
-                                struct omap_dma_channel_params *params);
-
-extern void omap_dma_link_lch(int lch_head, int lch_queue);
-extern void omap_dma_unlink_lch(int lch_head, int lch_queue);
-
-extern int omap_set_dma_callback(int lch,
-                        void (*callback)(int lch, u16 ch_status, void *data),
-                        void *data);
-extern dma_addr_t omap_get_dma_src_pos(int lch);
-extern dma_addr_t omap_get_dma_dst_pos(int lch);
-extern void omap_clear_dma(int lch);
-extern int omap_get_dma_active_status(int lch);
-extern int omap_dma_running(void);
-extern void omap_dma_set_global_params(int arb_rate, int max_fifo_depth,
-                                       int tparams);
-extern int omap_dma_set_prio_lch(int lch, unsigned char read_prio,
-                                 unsigned char write_prio);
-extern void omap_set_dma_dst_endian_type(int lch, enum end_type etype);
-extern void omap_set_dma_src_endian_type(int lch, enum end_type etype);
-extern int omap_get_dma_index(int lch, int *ei, int *fi);
-
-void omap_dma_global_context_save(void);
-void omap_dma_global_context_restore(void);
-
-extern void omap_dma_disable_irq(int lch);
-
-/* Chaining APIs */
-#ifndef CONFIG_ARCH_OMAP1
-extern int omap_request_dma_chain(int dev_id, const char *dev_name,
-                                  void (*callback) (int lch, u16 ch_status,
-                                                    void *data),
-                                  int *chain_id, int no_of_chans,
-                                  int chain_mode,
-                                  struct omap_dma_channel_params params);
-extern int omap_free_dma_chain(int chain_id);
-extern int omap_dma_chain_a_transfer(int chain_id, int src_start,
-                                     int dest_start, int elem_count,
-                                     int frame_count, void *callbk_data);
-extern int omap_start_dma_chain_transfers(int chain_id);
-extern int omap_stop_dma_chain_transfers(int chain_id);
-extern int omap_get_dma_chain_index(int chain_id, int *ei, int *fi);
-extern int omap_get_dma_chain_dst_pos(int chain_id);
-extern int omap_get_dma_chain_src_pos(int chain_id);
-
-extern int omap_modify_dma_chain_params(int chain_id,
-                                        struct omap_dma_channel_params params);
-extern int omap_dma_chain_status(int chain_id);
-#endif
-
-#if defined(CONFIG_ARCH_OMAP1) && defined(CONFIG_FB_OMAP)
-#include <mach/lcd_dma.h>
-#else
-static inline int omap_lcd_dma_running(void)
-{
-        return 0;
-}
-#endif
-
-#endif /* __ASM_ARCH_DMA_H */
diff --git a/arch/arm/plat-omap/include/plat/counter-32k.h b/arch/arm/plat-omap/include/plat/counter-32k.h
new file mode 100644
index 000000000000..da000d482ff2
--- /dev/null
+++ b/arch/arm/plat-omap/include/plat/counter-32k.h
@@ -0,0 +1 @@
+int omap_init_clocksource_32k(void __iomem *vbase);
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index ba542ec8d513..b4516aba67ed 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -29,7 +29,7 @@
 #define __ASM_ARCH_OMAP_CPU_H
 
 #ifdef CONFIG_ARCH_OMAP1
-#include "../../mach-omap1/soc.h"
+#include <mach/soc.h>
 #endif
 
 #ifdef CONFIG_ARCH_OMAP2PLUS
diff --git a/arch/arm/mach-omap2/debug-devices.h b/arch/arm/plat-omap/include/plat/debug-devices.h
index a4edbd2f7484..8fc4287222dd 100644
--- a/arch/arm/mach-omap2/debug-devices.h
+++ b/arch/arm/plat-omap/include/plat/debug-devices.h
@@ -1,9 +1,2 @@
-#ifndef _OMAP_DEBUG_DEVICES_H
-#define _OMAP_DEBUG_DEVICES_H
-
-#include <linux/types.h>
-
 /* for TI reference platforms sharing the same debug card */
 extern int debug_card_init(u32 addr, unsigned gpio);
-
-#endif
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h
index 85868e98c11c..a3fbc48c332e 100644
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
@@ -32,7 +32,6 @@
  * 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
-#include <linux/clk.h>
 #include <linux/delay.h>
 #include <linux/io.h>
 #include <linux/platform_device.h>
@@ -55,6 +54,10 @@
 #define OMAP_TIMER_TRIGGER_OVERFLOW             0x01
 #define OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE 0x02
 
+/* posted mode types */
+#define OMAP_TIMER_NONPOSTED                    0x00
+#define OMAP_TIMER_POSTED                       0x01
+
 /* timer capabilities used in hwmod database */
 #define OMAP_TIMER_SECURE                               0x80000000
 #define OMAP_TIMER_ALWON                                0x40000000
@@ -62,16 +65,22 @@
 #define OMAP_TIMER_NEEDS_RESET                          0x10000000
 #define OMAP_TIMER_HAS_DSP_IRQ                          0x08000000
 
+/*
+ * timer errata flags
+ *
+ * Errata i103/i767 impacts all OMAP3/4/5 devices including AM33xx. This
+ * errata prevents us from using posted mode on these devices, unless the
+ * timer counter register is never read. For more details please refer to
+ * the OMAP3/4/5 errata documents.
+ */
+#define OMAP_TIMER_ERRATA_I103_I767                     0x80000000
+
 struct omap_timer_capability_dev_attr {
         u32 timer_capability;
 };
 
-struct omap_dm_timer;
-
 struct timer_regs {
         u32 tidr;
-        u32 tistat;
-        u32 tisr;
         u32 tier;
         u32 twer;
         u32 tclr;
@@ -90,15 +99,35 @@ struct timer_regs {
         u32 towr;
 };
 
-struct dmtimer_platform_data {
-        /* set_timer_src - Only used for OMAP1 devices */
-        int (*set_timer_src)(struct platform_device *pdev, int source);
-        u32 timer_capability;
+struct omap_dm_timer {
+        int id;
+        int irq;
+        struct clk *fclk;
+
+        void __iomem    *io_base;
+        void __iomem    *irq_stat;      /* TISR/IRQSTATUS interrupt status */
+        void __iomem    *irq_ena;       /* irq enable */
+        void __iomem    *irq_dis;       /* irq disable, only on v2 ip */
+        void __iomem    *pend;          /* write pending */
+        void __iomem    *func_base;     /* function register base */
+
+        unsigned long rate;
+        unsigned reserved:1;
+        unsigned posted:1;
+        struct timer_regs context;
+        int (*get_context_loss_count)(struct device *);
+        int ctx_loss_count;
+        int revision;
+        u32 capability;
+        u32 errata;
+        struct platform_device *pdev;
+        struct list_head node;
 };
 
 int omap_dm_timer_reserve_systimer(int id);
 struct omap_dm_timer *omap_dm_timer_request(void);
 struct omap_dm_timer *omap_dm_timer_request_specific(int timer_id);
+struct omap_dm_timer *omap_dm_timer_request_by_cap(u32 cap);
 int omap_dm_timer_free(struct omap_dm_timer *timer);
 void omap_dm_timer_enable(struct omap_dm_timer *timer);
 void omap_dm_timer_disable(struct omap_dm_timer *timer);
@@ -120,6 +149,7 @@ int omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on, int toggle, i
 int omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler);
 
 int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, unsigned int value);
+int omap_dm_timer_set_int_disable(struct omap_dm_timer *timer, u32 mask);
 
 unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer);
 int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value);
@@ -245,33 +275,6 @@ int omap_dm_timers_active(void);
 #define OMAP_TIMER_TICK_INT_MASK_COUNT_REG                              \
                 (_OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET | (WP_TOWR << WPSHIFT))
 
-struct omap_dm_timer {
-        unsigned long phys_base;
-        int id;
-        int irq;
-        struct clk *fclk;
-
-        void __iomem    *io_base;
-        void __iomem    *sys_stat;      /* TISTAT timer status */
-        void __iomem    *irq_stat;      /* TISR/IRQSTATUS interrupt status */
-        void __iomem    *irq_ena;       /* irq enable */
-        void __iomem    *irq_dis;       /* irq disable, only on v2 ip */
-        void __iomem    *pend;          /* write pending */
-        void __iomem    *func_base;     /* function register base */
-
-        unsigned long rate;
-        unsigned reserved:1;
-        unsigned posted:1;
-        struct timer_regs context;
-        int ctx_loss_count;
-        int revision;
-        u32 capability;
-        struct platform_device *pdev;
-        struct list_head node;
-};
-
-int omap_dm_timer_prepare(struct omap_dm_timer *timer);
-
 static inline u32 __omap_dm_timer_read(struct omap_dm_timer *timer, u32 reg,
                                                 int posted)
 {
@@ -300,16 +303,13 @@ static inline void __omap_dm_timer_init_regs(struct omap_dm_timer *timer)
         tidr = __raw_readl(timer->io_base);
         if (!(tidr >> 16)) {
                 timer->revision = 1;
-                timer->sys_stat = timer->io_base +
-                                OMAP_TIMER_V1_SYS_STAT_OFFSET;
                 timer->irq_stat = timer->io_base + OMAP_TIMER_V1_STAT_OFFSET;
                 timer->irq_ena = timer->io_base + OMAP_TIMER_V1_INT_EN_OFFSET;
-                timer->irq_dis = NULL;
+                timer->irq_dis = timer->io_base + OMAP_TIMER_V1_INT_EN_OFFSET;
                 timer->pend = timer->io_base + _OMAP_TIMER_WRITE_PEND_OFFSET;
                 timer->func_base = timer->io_base;
         } else {
                 timer->revision = 2;
-                timer->sys_stat = NULL;
                 timer->irq_stat = timer->io_base + OMAP_TIMER_V2_IRQSTATUS;
                 timer->irq_ena = timer->io_base + OMAP_TIMER_V2_IRQENABLE_SET;
                 timer->irq_dis = timer->io_base + OMAP_TIMER_V2_IRQENABLE_CLR;
@@ -320,45 +320,44 @@ static inline void __omap_dm_timer_init_regs(struct omap_dm_timer *timer)
         }
 }
 
-/* Assumes the source clock has been set by caller */
-static inline void __omap_dm_timer_reset(struct omap_dm_timer *timer,
-                                        int autoidle, int wakeup)
+/*
+ * __omap_dm_timer_enable_posted - enables write posted mode
+ * @timer:      pointer to timer instance handle
+ *
+ * Enables the write posted mode for the timer. When posted mode is enabled
+ * writes to certain timer registers are immediately acknowledged by the
+ * internal bus and hence prevents stalling the CPU waiting for the write to
+ * complete. Enabling this feature can improve performance for writing to the
+ * timer registers.
+ */
+static inline void __omap_dm_timer_enable_posted(struct omap_dm_timer *timer)
 {
-        u32 l;
+        if (timer->posted)
+                return;
 
-        l = __raw_readl(timer->io_base + OMAP_TIMER_OCP_CFG_OFFSET);
-        l |= 0x02 << 3;  /* Set to smart-idle mode */
-        l |= 0x2 << 8;   /* Set clock activity to perserve f-clock on idle */
+        if (timer->errata & OMAP_TIMER_ERRATA_I103_I767)
+                return;
 
-        if (autoidle)
-                l |= 0x1 << 0;
-
-        if (wakeup)
-                l |= 1 << 2;
-
-        __raw_writel(l, timer->io_base + OMAP_TIMER_OCP_CFG_OFFSET);
-
-        /* Match hardware reset default of posted mode */
         __omap_dm_timer_write(timer, OMAP_TIMER_IF_CTRL_REG,
-                                        OMAP_TIMER_CTRL_POSTED, 0);
+                              OMAP_TIMER_CTRL_POSTED, 0);
+        timer->context.tsicr = OMAP_TIMER_CTRL_POSTED;
+        timer->posted = OMAP_TIMER_POSTED;
 }
 
-static inline int __omap_dm_timer_set_source(struct clk *timer_fck,
-                                                struct clk *parent)
+/**
+ * __omap_dm_timer_override_errata - override errata flags for a timer
+ * @timer:      pointer to timer handle
+ * @errata:     errata flags to be ignored
+ *
+ * For a given timer, override a timer errata by clearing the flags
+ * specified by the errata argument. A specific erratum should only be
+ * overridden for a timer if the timer is used in such a way the erratum
+ * has no impact.
+ */
+static inline void __omap_dm_timer_override_errata(struct omap_dm_timer *timer,
+                                                   u32 errata)
 {
-        int ret;
-
-        clk_disable(timer_fck);
-        ret = clk_set_parent(timer_fck, parent);
-        clk_enable(timer_fck);
-
-        /*
-         * When the functional clock disappears, too quick writes seem
-         * to cause an abort. XXX Is this still necessary?
-         */
-        __delay(300000);
-
-        return ret;
+        timer->errata &= ~errata;
 }
 
 static inline void __omap_dm_timer_stop(struct omap_dm_timer *timer,
diff --git a/arch/arm/plat-omap/i2c.h b/arch/arm/plat-omap/include/plat/i2c.h
index 7a9028cb5a75..7a9028cb5a75 100644
--- a/arch/arm/plat-omap/i2c.h
+++ b/arch/arm/plat-omap/include/plat/i2c.h
diff --git a/arch/arm/plat-omap/include/plat/sram.h b/arch/arm/plat-omap/include/plat/sram.h
new file mode 100644
index 000000000000..ba4525059a99
--- /dev/null
+++ b/arch/arm/plat-omap/include/plat/sram.h
@@ -0,0 +1,16 @@
+int omap_sram_init(void);
+
+void omap_map_sram(unsigned long start, unsigned long size,
+                        unsigned long skip, int cached);
+void omap_sram_reset(void);
+
+extern void *omap_sram_push_address(unsigned long size);
+
+/* Macro to push a function to the internal SRAM, using the fncpy API */
+#define omap_sram_push(funcp, size) ({                          \
+        typeof(&(funcp)) _res = NULL;                           \
+        void *_sram_address = omap_sram_push_address(size);     \
+        if (_sram_address)                                      \
+                _res = fncpy(_sram_address, &(funcp), size);    \
+        _res;                                                   \
+})
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 70dcc225157f..743fc2836f7a 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -20,198 +20,20 @@
 #include <linux/init.h>
 #include <linux/io.h>
 
+#include <asm/fncpy.h>
 #include <asm/tlb.h>
 #include <asm/cacheflush.h>
 
 #include <asm/mach/map.h>
 
-#include "../mach-omap1/soc.h"
-#include "../mach-omap2/soc.h"
-
-#include "sram.h"
-
-/* XXX These "sideways" includes will disappear when sram.c becomes a driver */
-#include "../mach-omap2/iomap.h"
-#include "../mach-omap2/prm2xxx_3xxx.h"
-#include "../mach-omap2/sdrc.h"
-
-#define OMAP1_SRAM_PA           0x20000000
-#define OMAP2_SRAM_PUB_PA       (OMAP2_SRAM_PA + 0xf800)
-#define OMAP3_SRAM_PUB_PA       (OMAP3_SRAM_PA + 0x8000)
-#ifdef CONFIG_OMAP4_ERRATA_I688
-#define OMAP4_SRAM_PUB_PA       OMAP4_SRAM_PA
-#else
-#define OMAP4_SRAM_PUB_PA       (OMAP4_SRAM_PA + 0x4000)
-#endif
-#define OMAP5_SRAM_PA           0x40300000
-
-#if defined(CONFIG_ARCH_OMAP2PLUS)
-#define SRAM_BOOTLOADER_SZ      0x00
-#else
-#define SRAM_BOOTLOADER_SZ      0x80
-#endif
-
-#define OMAP24XX_VA_REQINFOPERM0        OMAP2_L3_IO_ADDRESS(0x68005048)
-#define OMAP24XX_VA_READPERM0           OMAP2_L3_IO_ADDRESS(0x68005050)
-#define OMAP24XX_VA_WRITEPERM0          OMAP2_L3_IO_ADDRESS(0x68005058)
-
-#define OMAP34XX_VA_REQINFOPERM0        OMAP2_L3_IO_ADDRESS(0x68012848)
-#define OMAP34XX_VA_READPERM0           OMAP2_L3_IO_ADDRESS(0x68012850)
-#define OMAP34XX_VA_WRITEPERM0          OMAP2_L3_IO_ADDRESS(0x68012858)
-#define OMAP34XX_VA_ADDR_MATCH2         OMAP2_L3_IO_ADDRESS(0x68012880)
-#define OMAP34XX_VA_SMS_RG_ATT0         OMAP2_L3_IO_ADDRESS(0x6C000048)
-
-#define GP_DEVICE               0x300
-
 #define ROUND_DOWN(value,boundary)      ((value) & (~((boundary)-1)))
 
-static unsigned long omap_sram_start;
 static void __iomem *omap_sram_base;
 static unsigned long omap_sram_skip;
 static unsigned long omap_sram_size;
 static void __iomem *omap_sram_ceil;
 
 /*
- * Depending on the target RAMFS firewall setup, the public usable amount of
- * SRAM varies.  The default accessible size for all device types is 2k. A GP
- * device allows ARM11 but not other initiators for full size. This
- * functionality seems ok until some nice security API happens.
- */
-static int is_sram_locked(void)
-{
-        if (OMAP2_DEVICE_TYPE_GP == omap_type()) {
-                /* RAMFW: R/W access to all initiators for all qualifier sets */
-                if (cpu_is_omap242x()) {
-                        __raw_writel(0xFF, OMAP24XX_VA_REQINFOPERM0); /* all q-vects */
-                        __raw_writel(0xCFDE, OMAP24XX_VA_READPERM0);  /* all i-read */
-                        __raw_writel(0xCFDE, OMAP24XX_VA_WRITEPERM0); /* all i-write */
-                }
-                if (cpu_is_omap34xx()) {
-                        __raw_writel(0xFFFF, OMAP34XX_VA_REQINFOPERM0); /* all q-vects */
-                        __raw_writel(0xFFFF, OMAP34XX_VA_READPERM0);  /* all i-read */
-                        __raw_writel(0xFFFF, OMAP34XX_VA_WRITEPERM0); /* all i-write */
-                        __raw_writel(0x0, OMAP34XX_VA_ADDR_MATCH2);
-                        __raw_writel(0xFFFFFFFF, OMAP34XX_VA_SMS_RG_ATT0);
-                }
-                return 0;
-        } else
-                return 1; /* assume locked with no PPA or security driver */
-}
-
-/*
- * The amount of SRAM depends on the core type.
- * Note that we cannot try to test for SRAM here because writes
- * to secure SRAM will hang the system. Also the SRAM is not
- * yet mapped at this point.
- */
-static void __init omap_detect_sram(void)
-{
-        omap_sram_skip = SRAM_BOOTLOADER_SZ;
-        if (cpu_class_is_omap2()) {
-                if (is_sram_locked()) {
-                        if (cpu_is_omap34xx()) {
-                                omap_sram_start = OMAP3_SRAM_PUB_PA;
-                                if ((omap_type() == OMAP2_DEVICE_TYPE_EMU) ||
-                                    (omap_type() == OMAP2_DEVICE_TYPE_SEC)) {
-                                        omap_sram_size = 0x7000; /* 28K */
-                                        omap_sram_skip += SZ_16K;
-                                } else {
-                                        omap_sram_size = 0x8000; /* 32K */
-                                }
-                        } else if (cpu_is_omap44xx()) {
-                                omap_sram_start = OMAP4_SRAM_PUB_PA;
-                                omap_sram_size = 0xa000; /* 40K */
-                        } else if (soc_is_omap54xx()) {
-                                omap_sram_start = OMAP5_SRAM_PA;
-                                omap_sram_size = SZ_128K; /* 128KB */
-                        } else {
-                                omap_sram_start = OMAP2_SRAM_PUB_PA;
-                                omap_sram_size = 0x800; /* 2K */
-                        }
-                } else {
-                        if (soc_is_am33xx()) {
-                                omap_sram_start = AM33XX_SRAM_PA;
-                                omap_sram_size = 0x10000; /* 64K */
-                        } else if (cpu_is_omap34xx()) {
-                                omap_sram_start = OMAP3_SRAM_PA;
-                                omap_sram_size = 0x10000; /* 64K */
-                        } else if (cpu_is_omap44xx()) {
-                                omap_sram_start = OMAP4_SRAM_PA;
-                                omap_sram_size = 0xe000; /* 56K */
-                        } else if (soc_is_omap54xx()) {
-                                omap_sram_start = OMAP5_SRAM_PA;
-                                omap_sram_size = SZ_128K; /* 128KB */
-                        } else {
-                                omap_sram_start = OMAP2_SRAM_PA;
-                                if (cpu_is_omap242x())
-                                        omap_sram_size = 0xa0000; /* 640K */
-                                else if (cpu_is_omap243x())
-                                        omap_sram_size = 0x10000; /* 64K */
-                        }
-                }
-        } else {
-                omap_sram_start = OMAP1_SRAM_PA;
-
-                if (cpu_is_omap7xx())
-                        omap_sram_size = 0x32000;       /* 200K */
-                else if (cpu_is_omap15xx())
-                        omap_sram_size = 0x30000;       /* 192K */
-                else if (cpu_is_omap1610() || cpu_is_omap1611() ||
-                                cpu_is_omap1621() || cpu_is_omap1710())
-                        omap_sram_size = 0x4000;        /* 16K */
-                else {
-                        pr_err("Could not detect SRAM size\n");
-                        omap_sram_size = 0x4000;
-                }
-        }
-}
-
-/*
- * Note that we cannot use ioremap for SRAM, as clock init needs SRAM early.
- */
-static void __init omap_map_sram(void)
-{
-        int cached = 1;
-
-        if (omap_sram_size == 0)
-                return;
-
-#ifdef CONFIG_OMAP4_ERRATA_I688
-        if (cpu_is_omap44xx()) {
-                omap_sram_start += PAGE_SIZE;
-                omap_sram_size -= SZ_16K;
-        }
-#endif
-        if (cpu_is_omap34xx()) {
-                /*
-                 * SRAM must be marked as non-cached on OMAP3 since the
-                 * CORE DPLL M2 divider change code (in SRAM) runs with the
-                 * SDRAM controller disabled, and if it is marked cached,
-                 * the ARM may attempt to write cache lines back to SDRAM
-                 * which will cause the system to hang.
-                 */
-                cached = 0;
-        }
-
-        omap_sram_start = ROUND_DOWN(omap_sram_start, PAGE_SIZE);
-        omap_sram_base = __arm_ioremap_exec(omap_sram_start, omap_sram_size,
-                                                cached);
-        if (!omap_sram_base) {
-                pr_err("SRAM: Could not map\n");
-                return;
-        }
-
-        omap_sram_ceil = omap_sram_base + omap_sram_size;
-
-        /*
-         * Looks like we need to preserve some bootloader code at the
-         * beginning of SRAM for jumping to flash for reboot to work...
-         */
-        memset_io(omap_sram_base + omap_sram_skip, 0,
-                  omap_sram_size - omap_sram_skip);
-}
-
-/*
  * Memory allocator for SRAM: calculates the new ceiling address
  * for pushing a function using the fncpy API.
  *
@@ -236,171 +58,39 @@ void *omap_sram_push_address(unsigned long size)
         return (void *)omap_sram_ceil;
 }
 
-#ifdef CONFIG_ARCH_OMAP1
-
-static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl);
-
-void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
-{
-        BUG_ON(!_omap_sram_reprogram_clock);
-        /* On 730, bit 13 must always be 1 */
-        if (cpu_is_omap7xx())
-                ckctl |= 0x2000;
-        _omap_sram_reprogram_clock(dpllctl, ckctl);
-}
-
-static int __init omap1_sram_init(void)
-{
-        _omap_sram_reprogram_clock =
-                        omap_sram_push(omap1_sram_reprogram_clock,
-                                        omap1_sram_reprogram_clock_sz);
-
-        return 0;
-}
-
-#else
-#define omap1_sram_init()       do {} while (0)
-#endif
-
-#if defined(CONFIG_ARCH_OMAP2)
-
-static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
-                              u32 base_cs, u32 force_unlock);
-
-void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
-                   u32 base_cs, u32 force_unlock)
-{
-        BUG_ON(!_omap2_sram_ddr_init);
-        _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl,
-                             base_cs, force_unlock);
-}
-
-static void (*_omap2_sram_reprogram_sdrc)(u32 perf_level, u32 dll_val,
-                                          u32 mem_type);
-
-void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type)
-{
-        BUG_ON(!_omap2_sram_reprogram_sdrc);
-        _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type);
-}
-
-static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
-
-u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass)
-{
-        BUG_ON(!_omap2_set_prcm);
-        return _omap2_set_prcm(dpll_ctrl_val, sdrc_rfr_val, bypass);
-}
-#endif
-
-#ifdef CONFIG_SOC_OMAP2420
-static int __init omap242x_sram_init(void)
-{
-        _omap2_sram_ddr_init = omap_sram_push(omap242x_sram_ddr_init,
-                                        omap242x_sram_ddr_init_sz);
-
-        _omap2_sram_reprogram_sdrc = omap_sram_push(omap242x_sram_reprogram_sdrc,
-                                            omap242x_sram_reprogram_sdrc_sz);
-
-        _omap2_set_prcm = omap_sram_push(omap242x_sram_set_prcm,
-                                         omap242x_sram_set_prcm_sz);
-
-        return 0;
-}
-#else
-static inline int omap242x_sram_init(void)
-{
-        return 0;
-}
-#endif
-
-#ifdef CONFIG_SOC_OMAP2430
-static int __init omap243x_sram_init(void)
-{
-        _omap2_sram_ddr_init = omap_sram_push(omap243x_sram_ddr_init,
-                                        omap243x_sram_ddr_init_sz);
-
-        _omap2_sram_reprogram_sdrc = omap_sram_push(omap243x_sram_reprogram_sdrc,
-                                            omap243x_sram_reprogram_sdrc_sz);
-
-        _omap2_set_prcm = omap_sram_push(omap243x_sram_set_prcm,
-                                         omap243x_sram_set_prcm_sz);
-
-        return 0;
-}
-#else
-static inline int omap243x_sram_init(void)
-{
-        return 0;
-}
-#endif
-
-#ifdef CONFIG_ARCH_OMAP3
-
-static u32 (*_omap3_sram_configure_core_dpll)(
-                        u32 m2, u32 unlock_dll, u32 f, u32 inc,
-                        u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
-                        u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
-                        u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
-                        u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1);
-
-u32 omap3_configure_core_dpll(u32 m2, u32 unlock_dll, u32 f, u32 inc,
-                        u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
-                        u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
-                        u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
-                        u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1)
-{
-        BUG_ON(!_omap3_sram_configure_core_dpll);
-        return _omap3_sram_configure_core_dpll(
-                        m2, unlock_dll, f, inc,
-                        sdrc_rfr_ctrl_0, sdrc_actim_ctrl_a_0,
-                        sdrc_actim_ctrl_b_0, sdrc_mr_0,
-                        sdrc_rfr_ctrl_1, sdrc_actim_ctrl_a_1,
-                        sdrc_actim_ctrl_b_1, sdrc_mr_1);
-}
-
-void omap3_sram_restore_context(void)
+/*
+ * The SRAM context is lost during off-idle and stack
+ * needs to be reset.
+ */
+void omap_sram_reset(void)
 {
         omap_sram_ceil = omap_sram_base + omap_sram_size;
-
-        _omap3_sram_configure_core_dpll =
-                omap_sram_push(omap3_sram_configure_core_dpll,
-                               omap3_sram_configure_core_dpll_sz);
-        omap_push_sram_idle();
 }
 
-static inline int omap34xx_sram_init(void)
-{
-        omap3_sram_restore_context();
-        return 0;
-}
-#else
-static inline int omap34xx_sram_init(void)
-{
-        return 0;
-}
-#endif /* CONFIG_ARCH_OMAP3 */
-
-static inline int am33xx_sram_init(void)
+/*
+ * Note that we cannot use ioremap for SRAM, as clock init needs SRAM early.
+ */
+void __init omap_map_sram(unsigned long start, unsigned long size,
+                                 unsigned long skip, int cached)
 {
-        return 0;
-}
+        if (size == 0)
+                return;
 
-int __init omap_sram_init(void)
-{
-        omap_detect_sram();
-        omap_map_sram();
+        start = ROUND_DOWN(start, PAGE_SIZE);
+        omap_sram_size = size;
+        omap_sram_skip = skip;
+        omap_sram_base = __arm_ioremap_exec(start, size, cached);
+        if (!omap_sram_base) {
+                pr_err("SRAM: Could not map\n");
+                return;
+        }
 
-        if (!(cpu_class_is_omap2()))
-                omap1_sram_init();
-        else if (cpu_is_omap242x())
-                omap242x_sram_init();
-        else if (cpu_is_omap2430())
-                omap243x_sram_init();
-        else if (soc_is_am33xx())
-                am33xx_sram_init();
-        else if (cpu_is_omap34xx())
-                omap34xx_sram_init();
+        omap_sram_reset();
 
-        return 0;
+        /*
+         * Looks like we need to preserve some bootloader code at the
+         * beginning of SRAM for jumping to flash for reboot to work...
+         */
+        memset_io(omap_sram_base + omap_sram_skip, 0,
+                  omap_sram_size - omap_sram_skip);
 }
diff --git a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c
index 1867944415ca..8db0b981ca64 100644
--- a/arch/arm/plat-orion/irq.c
+++ b/arch/arm/plat-orion/irq.c
@@ -41,7 +41,7 @@ void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
 static int __init orion_add_irq_domain(struct device_node *np,
                                        struct device_node *interrupt_parent)
 {
-        int i = 0, irq_gpio;
+        int i = 0;
         void __iomem *base;
 
         do {
@@ -54,10 +54,6 @@ static int __init orion_add_irq_domain(struct device_node *np,
 
         irq_domain_add_legacy(np, i * 32, 0, 0,
                               &irq_domain_simple_ops, NULL);
-
-        irq_gpio = i * 32;
-        orion_gpio_of_init(irq_gpio);
-
         return 0;
 }
 
diff --git a/arch/arm/plat-pxa/Makefile b/arch/arm/plat-pxa/Makefile
index af8e484001e5..1fc941944912 100644
--- a/arch/arm/plat-pxa/Makefile
+++ b/arch/arm/plat-pxa/Makefile
@@ -5,7 +5,6 @@
 obj-y   := dma.o
 
 obj-$(CONFIG_PXA3xx)            += mfp.o
-obj-$(CONFIG_PXA95x)            += mfp.o
 obj-$(CONFIG_ARCH_MMP)          += mfp.o
 
 obj-$(CONFIG_PXA_SSP)           += ssp.o
diff --git a/arch/arm/plat-pxa/include/plat/mfp.h b/arch/arm/plat-pxa/include/plat/mfp.h
index 5c79c29f2833..10bc4f3757d1 100644
--- a/arch/arm/plat-pxa/include/plat/mfp.h
+++ b/arch/arm/plat-pxa/include/plat/mfp.h
@@ -423,7 +423,7 @@ typedef unsigned long mfp_cfg_t;
         ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DS_MASK | MFP_LPM_STATE_MASK)) |\
          (MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_##drv | MFP_LPM_##lpm))
 
-#if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x) || defined(CONFIG_ARCH_MMP)
+#if defined(CONFIG_PXA3xx) || defined(CONFIG_ARCH_MMP)
 /*
  * each MFP pin will have a MFPR register, since the offset of the
  * register varies between processors, the processor specific code
@@ -470,6 +470,6 @@ void mfp_write(int mfp, unsigned long mfpr_val);
 void mfp_config(unsigned long *mfp_cfgs, int num);
 void mfp_config_run(void);
 void mfp_config_lpm(void);
-#endif /* CONFIG_PXA3xx || CONFIG_PXA95x || CONFIG_ARCH_MMP */
+#endif /* CONFIG_PXA3xx || CONFIG_ARCH_MMP */
 
 #endif /* __ASM_PLAT_MFP_H */
diff --git a/arch/arm/plat-samsung/adc.c b/arch/arm/plat-samsung/adc.c
index b1e05ccff3ac..37542c2689a2 100644
--- a/arch/arm/plat-samsung/adc.c
+++ b/arch/arm/plat-samsung/adc.c
@@ -344,7 +344,7 @@ static int s3c_adc_probe(struct platform_device *pdev)
         int ret;
         unsigned tmp;
 
-        adc = kzalloc(sizeof(struct adc_device), GFP_KERNEL);
+        adc = devm_kzalloc(dev, sizeof(struct adc_device), GFP_KERNEL);
         if (adc == NULL) {
                 dev_err(dev, "failed to allocate adc_device\n");
                 return -ENOMEM;
@@ -355,50 +355,46 @@ static int s3c_adc_probe(struct platform_device *pdev)
         adc->pdev = pdev;
         adc->prescale = S3C2410_ADCCON_PRSCVL(49);
 
-        adc->vdd = regulator_get(dev, "vdd");
+        adc->vdd = devm_regulator_get(dev, "vdd");
         if (IS_ERR(adc->vdd)) {
                 dev_err(dev, "operating without regulator \"vdd\" .\n");
-                ret = PTR_ERR(adc->vdd);
-                goto err_alloc;
+                return PTR_ERR(adc->vdd);
         }
 
         adc->irq = platform_get_irq(pdev, 1);
         if (adc->irq <= 0) {
                 dev_err(dev, "failed to get adc irq\n");
-                ret = -ENOENT;
-                goto err_reg;
+                return -ENOENT;
         }
 
-        ret = request_irq(adc->irq, s3c_adc_irq, 0, dev_name(dev), adc);
+        ret = devm_request_irq(dev, adc->irq, s3c_adc_irq, 0, dev_name(dev),
+                                adc);
         if (ret < 0) {
                 dev_err(dev, "failed to attach adc irq\n");
-                goto err_reg;
+                return ret;
         }
 
-        adc->clk = clk_get(dev, "adc");
+        adc->clk = devm_clk_get(dev, "adc");
         if (IS_ERR(adc->clk)) {
                 dev_err(dev, "failed to get adc clock\n");
-                ret = PTR_ERR(adc->clk);
-                goto err_irq;
+                return PTR_ERR(adc->clk);
         }
 
         regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
         if (!regs) {
                 dev_err(dev, "failed to find registers\n");
-                ret = -ENXIO;
-                goto err_clk;
+                return -ENXIO;
         }
 
-        adc->regs = ioremap(regs->start, resource_size(regs));
+        adc->regs = devm_request_and_ioremap(dev, regs);
         if (!adc->regs) {
                 dev_err(dev, "failed to map registers\n");
-                ret = -ENXIO;
-                goto err_clk;
+                return -ENXIO;
         }
 
         ret = regulator_enable(adc->vdd);
         if (ret)
-                goto err_ioremap;
+                return ret;
 
         clk_enable(adc->clk);
 
@@ -418,32 +414,14 @@ static int s3c_adc_probe(struct platform_device *pdev)
         adc_dev = adc;
 
         return 0;
-
- err_ioremap:
-        iounmap(adc->regs);
- err_clk:
-        clk_put(adc->clk);
-
- err_irq:
-        free_irq(adc->irq, adc);
- err_reg:
-        regulator_put(adc->vdd);
- err_alloc:
-        kfree(adc);
-        return ret;
 }
 
 static int __devexit s3c_adc_remove(struct platform_device *pdev)
 {
         struct adc_device *adc = platform_get_drvdata(pdev);
 
-        iounmap(adc->regs);
-        free_irq(adc->irq, adc);
         clk_disable(adc->clk);
         regulator_disable(adc->vdd);
-        regulator_put(adc->vdd);
-        clk_put(adc->clk);
-        kfree(adc);
 
         return 0;
 }
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index 03f654d55eff..bc50b20a8ffc 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -486,11 +486,7 @@ static struct resource s3c_i2c0_resource[] = {
 
 struct platform_device s3c_device_i2c0 = {
         .name           = "s3c2410-i2c",
-#ifdef CONFIG_S3C_DEV_I2C1
         .id             = 0,
-#else
-        .id             = -1,
-#endif
         .num_resources  = ARRAY_SIZE(s3c_i2c0_resource),
         .resource       = s3c_i2c0_resource,
 };
@@ -933,6 +929,7 @@ struct platform_device s5p_device_mfc_r = {
                 .coherent_dma_mask      = DMA_BIT_MASK(32),
         },
 };
+
 #endif /* CONFIG_S5P_DEV_MFC */
 
 /* MIPI CSIS */
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index 5da4b4f38f40..133e3e4170fb 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -133,8 +133,6 @@ extern struct platform_device exynos4_device_pcm1;
 extern struct platform_device exynos4_device_pcm2;
 extern struct platform_device exynos4_device_spdif;
 
-extern struct platform_device exynos_device_drm;
-
 extern struct platform_device samsung_asoc_dma;
 extern struct platform_device samsung_asoc_idma;
 extern struct platform_device samsung_device_keypad;
diff --git a/arch/arm/plat-samsung/include/plat/mfc.h b/arch/arm/plat-samsung/include/plat/mfc.h
index ac13227272f0..e6d7c42d68b6 100644
--- a/arch/arm/plat-samsung/include/plat/mfc.h
+++ b/arch/arm/plat-samsung/include/plat/mfc.h
@@ -10,6 +10,14 @@
 #ifndef __PLAT_SAMSUNG_MFC_H
 #define __PLAT_SAMSUNG_MFC_H __FILE__
 
+struct s5p_mfc_dt_meminfo {
+        unsigned long   loff;
+        unsigned long   lsize;
+        unsigned long   roff;
+        unsigned long   rsize;
+        char            *compatible;
+};
+
 /**
  * s5p_mfc_reserve_mem - function to early reserve memory for MFC driver
  * @rbase:      base address for MFC 'right' memory interface
@@ -24,4 +32,7 @@
 void __init s5p_mfc_reserve_mem(phys_addr_t rbase, unsigned int rsize,
                                 phys_addr_t lbase, unsigned int lsize);
 
+int __init s5p_fdt_find_mfc_mem(unsigned long node, const char *uname,
+                                int depth, void *data);
+
 #endif /* __PLAT_SAMSUNG_MFC_H */
diff --git a/arch/arm/plat-samsung/s5p-dev-mfc.c b/arch/arm/plat-samsung/s5p-dev-mfc.c
index ad6089465e2a..5ec104b5408b 100644
--- a/arch/arm/plat-samsung/s5p-dev-mfc.c
+++ b/arch/arm/plat-samsung/s5p-dev-mfc.c
@@ -14,6 +14,8 @@
 #include <linux/dma-mapping.h>
 #include <linux/memblock.h>
 #include <linux/ioport.h>
+#include <linux/of_fdt.h>
+#include <linux/of.h>
 
 #include <mach/map.h>
 #include <plat/devs.h>
@@ -69,3 +71,35 @@ static int __init s5p_mfc_memory_init(void)
         return 0;
 }
 device_initcall(s5p_mfc_memory_init);
+
+#ifdef CONFIG_OF
+int __init s5p_fdt_find_mfc_mem(unsigned long node, const char *uname,
+                                int depth, void *data)
+{
+        __be32 *prop;
+        unsigned long len;
+        struct s5p_mfc_dt_meminfo *mfc_mem = data;
+
+        if (!data)
+                return 0;
+
+        if (!of_flat_dt_is_compatible(node, mfc_mem->compatible))
+                return 0;
+
+        prop = of_get_flat_dt_prop(node, "samsung,mfc-l", &len);
+        if (!prop || (len != 2 * sizeof(unsigned long)))
+                return 0;
+
+        mfc_mem->loff = be32_to_cpu(prop[0]);
+        mfc_mem->lsize = be32_to_cpu(prop[1]);
+
+        prop = of_get_flat_dt_prop(node, "samsung,mfc-r", &len);
+        if (!prop || (len != 2 * sizeof(unsigned long)))
+                return 0;
+
+        mfc_mem->roff = be32_to_cpu(prop[0]);
+        mfc_mem->rsize = be32_to_cpu(prop[1]);
+
+        return 1;
+}
+#endif
diff --git a/arch/m68k/include/asm/signal.h b/arch/m68k/include/asm/signal.h
index 67e489d8d1bd..2df26b57c26a 100644
--- a/arch/m68k/include/asm/signal.h
+++ b/arch/m68k/include/asm/signal.h
@@ -41,7 +41,7 @@ struct k_sigaction {
 static inline void sigaddset(sigset_t *set, int _sig)
 {
         asm ("bfset %0{%1,#1}"
-                : "+od" (*set)
+                : "+o" (*set)
                 : "id" ((_sig - 1) ^ 31)
                 : "cc");
 }
@@ -49,7 +49,7 @@ static inline void sigaddset(sigset_t *set, int _sig)
 static inline void sigdelset(sigset_t *set, int _sig)
 {
         asm ("bfclr %0{%1,#1}"
-                : "+od" (*set)
+                : "+o" (*set)
                 : "id" ((_sig - 1) ^ 31)
                 : "cc");
 }
@@ -65,7 +65,7 @@ static inline int __gen_sigismember(sigset_t *set, int _sig)
         int ret;
         asm ("bfextu %1{%2,#1},%0"
                 : "=d" (ret)
-                : "od" (*set), "id" ((_sig-1) ^ 31)
+                : "o" (*set), "id" ((_sig-1) ^ 31)
                 : "cc");
         return ret;
 }
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index a53f8ec37aac..290dc6a1d7a3 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -79,7 +79,7 @@ static struct resource data_resource = { .name = "Kernel data", };
 void __init add_memory_region(phys_t start, phys_t size, long type)
 {
         int x = boot_mem_map.nr_map;
-        struct boot_mem_map_entry *prev = boot_mem_map.map + x - 1;
+        int i;
 
         /* Sanity check */
         if (start + size < start) {
@@ -88,15 +88,29 @@ void __init add_memory_region(phys_t start, phys_t size, long type)
         }
 
         /*
-         * Try to merge with previous entry if any.  This is far less than
-         * perfect but is sufficient for most real world cases.
+         * Try to merge with existing entry, if any.
          */
-        if (x && prev->addr + prev->size == start && prev->type == type) {
-                prev->size += size;
+        for (i = 0; i < boot_mem_map.nr_map; i++) {
+                struct boot_mem_map_entry *entry = boot_mem_map.map + i;
+                unsigned long top;
+
+                if (entry->type != type)
+                        continue;
+
+                if (start + size < entry->addr)
+                        continue;                       /* no overlap */
+
+                if (entry->addr + entry->size < start)
+                        continue;                       /* no overlap */
+
+                top = max(entry->addr + entry->size, start + size);
+                entry->addr = min(entry->addr, start);
+                entry->size = top - entry->addr;
+
                 return;
         }
 
-        if (x == BOOT_MEM_MAP_MAX) {
+        if (boot_mem_map.nr_map == BOOT_MEM_MAP_MAX) {
                 pr_err("Ooops! Too many entries in the memory map!\n");
                 return;
         }
diff --git a/arch/mips/lib/mips-atomic.c b/arch/mips/lib/mips-atomic.c
index e091430dbeb1..cd160be3ce4d 100644
--- a/arch/mips/lib/mips-atomic.c
+++ b/arch/mips/lib/mips-atomic.c
@@ -56,7 +56,7 @@ __asm__(
         "       .set    pop                                             \n"
         "       .endm                                                   \n");
 
-void arch_local_irq_disable(void)
+notrace void arch_local_irq_disable(void)
 {
         preempt_disable();
         __asm__ __volatile__(
@@ -93,7 +93,7 @@ __asm__(
         "       .set    pop                                             \n"
         "       .endm                                                   \n");
 
-unsigned long arch_local_irq_save(void)
+notrace unsigned long arch_local_irq_save(void)
 {
         unsigned long flags;
         preempt_disable();
@@ -135,7 +135,7 @@ __asm__(
         "       .set    pop                                             \n"
         "       .endm                                                   \n");
 
-void arch_local_irq_restore(unsigned long flags)
+notrace void arch_local_irq_restore(unsigned long flags)
 {
         unsigned long __tmp1;
 
@@ -159,7 +159,7 @@ void arch_local_irq_restore(unsigned long flags)
 EXPORT_SYMBOL(arch_local_irq_restore);
 
 
-void __arch_local_irq_restore(unsigned long flags)
+notrace void __arch_local_irq_restore(unsigned long flags)
 {
         unsigned long __tmp1;
 
diff --git a/arch/parisc/kernel/signal32.c b/arch/parisc/kernel/signal32.c
index fd49aeda9eb8..5dede04f2f3e 100644
--- a/arch/parisc/kernel/signal32.c
+++ b/arch/parisc/kernel/signal32.c
@@ -65,7 +65,8 @@ put_sigset32(compat_sigset_t __user *up, sigset_t *set, size_t sz)
 {
         compat_sigset_t s;
 
-        if (sz != sizeof *set) panic("put_sigset32()");
+        if (sz != sizeof *set)
+                return -EINVAL;
         sigset_64to32(&s, set);
 
         return copy_to_user(up, &s, sizeof s);
@@ -77,7 +78,8 @@ get_sigset32(compat_sigset_t __user *up, sigset_t *set, size_t sz)
         compat_sigset_t s;
         int r;
 
-        if (sz != sizeof *set) panic("put_sigset32()");
+        if (sz != sizeof *set)
+                return -EINVAL;
 
         if ((r = copy_from_user(&s, up, sz)) == 0) {
                 sigset_32to64(set, &s);
diff --git a/arch/parisc/kernel/sys_parisc.c b/arch/parisc/kernel/sys_parisc.c
index 7426e40699bd..f76c10863c62 100644
--- a/arch/parisc/kernel/sys_parisc.c
+++ b/arch/parisc/kernel/sys_parisc.c
@@ -73,6 +73,8 @@ static unsigned long get_shared_area(struct address_space *mapping,
         struct vm_area_struct *vma;
         int offset = mapping ? get_offset(mapping) : 0;
 
+        offset = (offset + (pgoff << PAGE_SHIFT)) & 0x3FF000;
+
         addr = DCACHE_ALIGN(addr - offset) + offset;
 
         for (vma = find_vma(current->mm, addr); ; vma = vma->vm_next) {
diff --git a/arch/powerpc/boot/dts/mpc5200b.dtsi b/arch/powerpc/boot/dts/mpc5200b.dtsi
index 7ab286ab5300..39ed65a44c5f 100644
--- a/arch/powerpc/boot/dts/mpc5200b.dtsi
+++ b/arch/powerpc/boot/dts/mpc5200b.dtsi
@@ -231,6 +231,12 @@
                         interrupts = <2 7 0>;
                 };
 
+                sclpc@3c00 {
+                        compatible = "fsl,mpc5200-lpbfifo";
+                        reg = <0x3c00 0x60>;
+                        interrupts = <2 23 0>;
+                };
+
                 i2c@3d00 {
                         #address-cells = <1>;
                         #size-cells = <0>;
diff --git a/arch/powerpc/boot/dts/o2d.dtsi b/arch/powerpc/boot/dts/o2d.dtsi
index 3444eb8f0ade..24f668039295 100644
--- a/arch/powerpc/boot/dts/o2d.dtsi
+++ b/arch/powerpc/boot/dts/o2d.dtsi
@@ -86,12 +86,6 @@
                                 reg = <0>;
                         };
                 };
-
-                sclpc@3c00 {
-                        compatible = "fsl,mpc5200-lpbfifo";
-                        reg = <0x3c00 0x60>;
-                        interrupts = <3 23 0>;
-                };
         };
 
         localbus {
diff --git a/arch/powerpc/boot/dts/pcm030.dts b/arch/powerpc/boot/dts/pcm030.dts
index 9e354997eb7e..96512c058033 100644
--- a/arch/powerpc/boot/dts/pcm030.dts
+++ b/arch/powerpc/boot/dts/pcm030.dts
@@ -59,7 +59,7 @@
                         #gpio-cells = <2>;
                 };
 
-                psc@2000 { /* PSC1 in ac97 mode */
+                audioplatform: psc@2000 { /* PSC1 in ac97 mode */
                         compatible = "mpc5200b-psc-ac97","fsl,mpc5200b-psc-ac97";
                         cell-index = <0>;
                 };
@@ -134,4 +134,9 @@
         localbus {
                 status = "disabled";
         };
+
+        sound {
+                compatible = "phytec,pcm030-audio-fabric";
+                asoc-platform = <&audioplatform>;
+        };
 };
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
index 8520b58a5e9a..b89ef65392dc 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pic.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
@@ -372,10 +372,11 @@ static int mpc52xx_irqhost_map(struct irq_domain *h, unsigned int virq,
         case MPC52xx_IRQ_L1_MAIN: irqchip = &mpc52xx_main_irqchip; break;
         case MPC52xx_IRQ_L1_PERP: irqchip = &mpc52xx_periph_irqchip; break;
         case MPC52xx_IRQ_L1_SDMA: irqchip = &mpc52xx_sdma_irqchip; break;
-        default:
-                pr_err("%s: invalid irq: virq=%i, l1=%i, l2=%i\n",
-                       __func__, virq, l1irq, l2irq);
-                return -EINVAL;
+        case MPC52xx_IRQ_L1_CRIT:
+                pr_warn("%s: Critical IRQ #%d is unsupported! Nopping it.\n",
+                        __func__, l2irq);
+                irq_set_chip(virq, &no_irq_chip);
+                return 0;
         }
 
         irq_set_chip_and_handler(virq, irqchip, handle_level_irq);
diff --git a/arch/powerpc/platforms/pseries/eeh_pe.c b/arch/powerpc/platforms/pseries/eeh_pe.c
index 797cd181dc3f..d16c8ded1084 100644
--- a/arch/powerpc/platforms/pseries/eeh_pe.c
+++ b/arch/powerpc/platforms/pseries/eeh_pe.c
@@ -449,7 +449,7 @@ int eeh_rmv_from_parent_pe(struct eeh_dev *edev, int purge_pe)
                         if (list_empty(&pe->edevs)) {
                                 cnt = 0;
                                 list_for_each_entry(child, &pe->child_list, child) {
-                                        if (!(pe->type & EEH_PE_INVALID)) {
+                                        if (!(child->type & EEH_PE_INVALID)) {
                                                 cnt++;
                                                 break;
                                         }
diff --git a/arch/powerpc/platforms/pseries/msi.c b/arch/powerpc/platforms/pseries/msi.c
index d19f4977c834..e5b084723131 100644
--- a/arch/powerpc/platforms/pseries/msi.c
+++ b/arch/powerpc/platforms/pseries/msi.c
@@ -220,7 +220,8 @@ static struct device_node *find_pe_dn(struct pci_dev *dev, int *total)
 
         /* Get the top level device in the PE */
         edev = of_node_to_eeh_dev(dn);
-        edev = list_first_entry(&edev->pe->edevs, struct eeh_dev, list);
+        if (edev->pe)
+                edev = list_first_entry(&edev->pe->edevs, struct eeh_dev, list);
         dn = eeh_dev_to_of_node(edev);
         if (!dn)
                 return NULL;
diff --git a/arch/sparc/include/asm/prom.h b/arch/sparc/include/asm/prom.h
index f93003123bce..67c62578d170 100644
--- a/arch/sparc/include/asm/prom.h
+++ b/arch/sparc/include/asm/prom.h
@@ -63,10 +63,13 @@ extern char *of_console_options;
 extern void irq_trans_init(struct device_node *dp);
 extern char *build_path_component(struct device_node *dp);
 
-/* SPARC has a local implementation */
+/* SPARC has local implementations */
 extern int of_address_to_resource(struct device_node *dev, int index,
                                   struct resource *r);
 #define of_address_to_resource of_address_to_resource
 
+void __iomem *of_iomap(struct device_node *node, int index);
+#define of_iomap of_iomap
+
 #endif /* __KERNEL__ */
 #endif /* _SPARC_PROM_H */
diff --git a/arch/sparc/kernel/signal_64.c b/arch/sparc/kernel/signal_64.c
index 867de2f8189c..689e1ba62809 100644
--- a/arch/sparc/kernel/signal_64.c
+++ b/arch/sparc/kernel/signal_64.c
@@ -295,9 +295,7 @@ void do_rt_sigreturn(struct pt_regs *regs)
                 err |= restore_fpu_state(regs, fpu_save);
 
         err |= __copy_from_user(&set, &sf->mask, sizeof(sigset_t));
-        err |= do_sigaltstack(&sf->stack, NULL, (unsigned long)sf);
-
-        if (err)
+        if (err || do_sigaltstack(&sf->stack, NULL, (unsigned long)sf) == -EFAULT)
                 goto segv;
 
         err |= __get_user(rwin_save, &sf->rwin_save);
diff --git a/arch/x86/boot/compressed/eboot.c b/arch/x86/boot/compressed/eboot.c
index c760e073963e..e87b0cac14b5 100644
--- a/arch/x86/boot/compressed/eboot.c
+++ b/arch/x86/boot/compressed/eboot.c
@@ -12,6 +12,8 @@
 #include <asm/setup.h>
 #include <asm/desc.h>
 
+#undef memcpy                   /* Use memcpy from misc.c */
+
 #include "eboot.h"
 
 static efi_system_table_t *sys_table;
diff --git a/arch/x86/boot/header.S b/arch/x86/boot/header.S
index 2a017441b8b2..8c132a625b94 100644
--- a/arch/x86/boot/header.S
+++ b/arch/x86/boot/header.S
@@ -476,6 +476,3 @@ die:
 setup_corrupt:
         .byte   7
         .string "No setup signature found...\n"
-
-        .data
-dummy:  .long   0
diff --git a/arch/x86/include/asm/ptrace.h b/arch/x86/include/asm/ptrace.h
index dcfde52979c3..19f16ebaf4fa 100644
--- a/arch/x86/include/asm/ptrace.h
+++ b/arch/x86/include/asm/ptrace.h
@@ -205,21 +205,14 @@ static inline bool user_64bit_mode(struct pt_regs *regs)
 }
 #endif
 
-/*
- * X86_32 CPUs don't save ss and esp if the CPU is already in kernel mode
- * when it traps.  The previous stack will be directly underneath the saved
- * registers, and 'sp/ss' won't even have been saved. Thus the '&regs->sp'.
- *
- * This is valid only for kernel mode traps.
- */
-static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
-{
 #ifdef CONFIG_X86_32
-        return (unsigned long)(&regs->sp);
+extern unsigned long kernel_stack_pointer(struct pt_regs *regs);
 #else
+static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
+{
         return regs->sp;
-#endif
 }
+#endif
 
 #define GET_IP(regs) ((regs)->ip)
 #define GET_FP(regs) ((regs)->bp)
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index f7e98a2c0d12..1b7d1656a042 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -631,6 +631,20 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
                 }
         }
 
+        /*
+         * The way access filter has a performance penalty on some workloads.
+         * Disable it on the affected CPUs.
+         */
+        if ((c->x86 == 0x15) &&
+            (c->x86_model >= 0x02) && (c->x86_model < 0x20)) {
+                u64 val;
+
+                if (!rdmsrl_safe(0xc0011021, &val) && !(val & 0x1E)) {
+                        val |= 0x1E;
+                        wrmsrl_safe(0xc0011021, val);
+                }
+        }
+
         cpu_detect_cache_sizes(c);
 
         /* Multi core CPU? */
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index 698b6ec12e0f..1ac581f38dfa 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -6,7 +6,7 @@
  *
  *  Written by Jacob Shin - AMD, Inc.
  *
- *  Support: borislav.petkov@amd.com
+ *  Maintained by: Borislav Petkov <bp@alien8.de>
  *
  *  April 2006
  *     - added support for AMD Family 0x10 processors
diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel.c b/arch/x86/kernel/cpu/mcheck/mce_intel.c
index 5f88abf07e9c..4f9a3cbfc4a3 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_intel.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_intel.c
@@ -285,34 +285,39 @@ void cmci_clear(void)
         raw_spin_unlock_irqrestore(&cmci_discover_lock, flags);
 }
 
+static long cmci_rediscover_work_func(void *arg)
+{
+        int banks;
+
+        /* Recheck banks in case CPUs don't all have the same */
+        if (cmci_supported(&banks))
+                cmci_discover(banks);
+
+        return 0;
+}
+
 /*
  * After a CPU went down cycle through all the others and rediscover
  * Must run in process context.
  */
 void cmci_rediscover(int dying)
 {
-        int banks;
-        int cpu;
-        cpumask_var_t old;
+        int cpu, banks;
 
         if (!cmci_supported(&banks))
                 return;
-        if (!alloc_cpumask_var(&old, GFP_KERNEL))
-                return;
-        cpumask_copy(old, &current->cpus_allowed);
 
         for_each_online_cpu(cpu) {
                 if (cpu == dying)
                         continue;
-                if (set_cpus_allowed_ptr(current, cpumask_of(cpu)))
+
+                if (cpu == smp_processor_id()) {
+                        cmci_rediscover_work_func(NULL);
                         continue;
-                /* Recheck banks in case CPUs don't all have the same */
-                if (cmci_supported(&banks))
-                        cmci_discover(banks);
-        }
+                }
 
-        set_cpus_allowed_ptr(current, old);
-        free_cpumask_var(old);
+                work_on_cpu(cpu, cmci_rediscover_work_func, NULL);
+        }
 }
 
 /*
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S
index b51b2c7ee51f..1328fe49a3f1 100644
--- a/arch/x86/kernel/entry_64.S
+++ b/arch/x86/kernel/entry_64.S
@@ -995,8 +995,8 @@ END(interrupt)
          */
         .p2align CONFIG_X86_L1_CACHE_SHIFT
 common_interrupt:
-        ASM_CLAC
         XCPT_FRAME
+        ASM_CLAC
         addq $-0x80,(%rsp)              /* Adjust vector to [-256,-1] range */
         interrupt do_IRQ
         /* 0(%rsp): old_rsp-ARGOFFSET */
@@ -1135,8 +1135,8 @@ END(common_interrupt)
  */
 .macro apicinterrupt num sym do_sym
 ENTRY(\sym)
-        ASM_CLAC
         INTR_FRAME
+        ASM_CLAC
         pushq_cfi $~(\num)
 .Lcommon_\sym:
         interrupt \do_sym
@@ -1190,8 +1190,8 @@ apicinterrupt IRQ_WORK_VECTOR \
  */
 .macro zeroentry sym do_sym
 ENTRY(\sym)
-        ASM_CLAC
         INTR_FRAME
+        ASM_CLAC
         PARAVIRT_ADJUST_EXCEPTION_FRAME
         pushq_cfi $-1           /* ORIG_RAX: no syscall to restart */
         subq $ORIG_RAX-R15, %rsp
@@ -1208,8 +1208,8 @@ END(\sym)
 
 .macro paranoidzeroentry sym do_sym
 ENTRY(\sym)
-        ASM_CLAC
         INTR_FRAME
+        ASM_CLAC
         PARAVIRT_ADJUST_EXCEPTION_FRAME
         pushq_cfi $-1           /* ORIG_RAX: no syscall to restart */
         subq $ORIG_RAX-R15, %rsp
@@ -1227,8 +1227,8 @@ END(\sym)
 #define INIT_TSS_IST(x) PER_CPU_VAR(init_tss) + (TSS_ist + ((x) - 1) * 8)
 .macro paranoidzeroentry_ist sym do_sym ist
 ENTRY(\sym)
-        ASM_CLAC
         INTR_FRAME
+        ASM_CLAC
         PARAVIRT_ADJUST_EXCEPTION_FRAME
         pushq_cfi $-1           /* ORIG_RAX: no syscall to restart */
         subq $ORIG_RAX-R15, %rsp
@@ -1247,8 +1247,8 @@ END(\sym)
 
 .macro errorentry sym do_sym
 ENTRY(\sym)
-        ASM_CLAC
         XCPT_FRAME
+        ASM_CLAC
         PARAVIRT_ADJUST_EXCEPTION_FRAME
         subq $ORIG_RAX-R15, %rsp
         CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15
@@ -1266,8 +1266,8 @@ END(\sym)
         /* error code is on the stack already */
 .macro paranoiderrorentry sym do_sym
 ENTRY(\sym)
-        ASM_CLAC
         XCPT_FRAME
+        ASM_CLAC
         PARAVIRT_ADJUST_EXCEPTION_FRAME
         subq $ORIG_RAX-R15, %rsp
         CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15
diff --git a/arch/x86/kernel/microcode_amd.c b/arch/x86/kernel/microcode_amd.c
index 7720ff5a9ee2..efdec7cd8e01 100644
--- a/arch/x86/kernel/microcode_amd.c
+++ b/arch/x86/kernel/microcode_amd.c
@@ -8,8 +8,8 @@
  *  Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
  *
  *  Maintainers:
- *  Andreas Herrmann <andreas.herrmann3@amd.com>
- *  Borislav Petkov <borislav.petkov@amd.com>
+ *  Andreas Herrmann <herrmann.der.user@googlemail.com>
+ *  Borislav Petkov <bp@alien8.de>
  *
  *  This driver allows to upgrade microcode on F10h AMD
  *  CPUs and later.
@@ -190,6 +190,7 @@ static unsigned int verify_patch_size(int cpu, u32 patch_size,
 #define F1XH_MPB_MAX_SIZE 2048
 #define F14H_MPB_MAX_SIZE 1824
 #define F15H_MPB_MAX_SIZE 4096
+#define F16H_MPB_MAX_SIZE 3458
 
         switch (c->x86) {
         case 0x14:
@@ -198,6 +199,9 @@ static unsigned int verify_patch_size(int cpu, u32 patch_size,
         case 0x15:
                 max_size = F15H_MPB_MAX_SIZE;
                 break;
+        case 0x16:
+                max_size = F16H_MPB_MAX_SIZE;
+                break;
         default:
                 max_size = F1XH_MPB_MAX_SIZE;
                 break;
diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c
index b00b33a18390..5e0596b0632e 100644
--- a/arch/x86/kernel/ptrace.c
+++ b/arch/x86/kernel/ptrace.c
@@ -22,6 +22,7 @@
 #include <linux/perf_event.h>
 #include <linux/hw_breakpoint.h>
 #include <linux/rcupdate.h>
+#include <linux/module.h>
 
 #include <asm/uaccess.h>
 #include <asm/pgtable.h>
@@ -166,6 +167,35 @@ static inline bool invalid_selector(u16 value)
 
 #define FLAG_MASK               FLAG_MASK_32
 
+/*
+ * X86_32 CPUs don't save ss and esp if the CPU is already in kernel mode
+ * when it traps.  The previous stack will be directly underneath the saved
+ * registers, and 'sp/ss' won't even have been saved. Thus the '&regs->sp'.
+ *
+ * Now, if the stack is empty, '&regs->sp' is out of range. In this
+ * case we try to take the previous stack. To always return a non-null
+ * stack pointer we fall back to regs as stack if no previous stack
+ * exists.
+ *
+ * This is valid only for kernel mode traps.
+ */
+unsigned long kernel_stack_pointer(struct pt_regs *regs)
+{
+        unsigned long context = (unsigned long)regs & ~(THREAD_SIZE - 1);
+        unsigned long sp = (unsigned long)&regs->sp;
+        struct thread_info *tinfo;
+
+        if (context == (sp & ~(THREAD_SIZE - 1)))
+                return sp;
+
+        tinfo = (struct thread_info *)context;
+        if (tinfo->previous_esp)
+                return tinfo->previous_esp;
+
+        return (unsigned long)regs;
+}
+EXPORT_SYMBOL_GPL(kernel_stack_pointer);
+
 static unsigned long *pt_regs_access(struct pt_regs *regs, unsigned long regno)
 {
         BUILD_BUG_ON(offsetof(struct pt_regs, bx) != 0);
diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
index 0777f042e400..60f926cd8b0e 100644
--- a/arch/x86/mm/tlb.c
+++ b/arch/x86/mm/tlb.c
@@ -197,7 +197,7 @@ void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start,
         }
 
         if (end == TLB_FLUSH_ALL || tlb_flushall_shift == -1
-                                        || vmflag == VM_HUGETLB) {
+                                        || vmflag & VM_HUGETLB) {
                 local_flush_tlb();
                 goto flush_all;
         }
diff --git a/arch/x86/pci/ce4100.c b/arch/x86/pci/ce4100.c
index 41bd2a2d2c50..b914e20b5a00 100644
--- a/arch/x86/pci/ce4100.c
+++ b/arch/x86/pci/ce4100.c
@@ -115,6 +115,16 @@ static void sata_revid_read(struct sim_dev_reg *reg, u32 *value)
         reg_read(reg, value);
 }
 
+static void reg_noirq_read(struct sim_dev_reg *reg, u32 *value)
+{
+        unsigned long flags;
+
+        raw_spin_lock_irqsave(&pci_config_lock, flags);
+        /* force interrupt pin value to 0 */
+        *value = reg->sim_reg.value & 0xfff00ff;
+        raw_spin_unlock_irqrestore(&pci_config_lock, flags);
+}
+
 static struct sim_dev_reg bus1_fixups[] = {
         DEFINE_REG(2, 0, 0x10, (16*MB), reg_init, reg_read, reg_write)
         DEFINE_REG(2, 0, 0x14, (256), reg_init, reg_read, reg_write)
@@ -144,6 +154,7 @@ static struct sim_dev_reg bus1_fixups[] = {
         DEFINE_REG(11, 5, 0x10, (64*KB), reg_init, reg_read, reg_write)
         DEFINE_REG(11, 6, 0x10, (256), reg_init, reg_read, reg_write)
         DEFINE_REG(11, 7, 0x10, (64*KB), reg_init, reg_read, reg_write)
+        DEFINE_REG(11, 7, 0x3c, 256, reg_init, reg_noirq_read, reg_write)
         DEFINE_REG(12, 0, 0x10, (128*KB), reg_init, reg_read, reg_write)
         DEFINE_REG(12, 0, 0x14, (256), reg_init, reg_read, reg_write)
         DEFINE_REG(12, 1, 0x10, (1024), reg_init, reg_read, reg_write)
@@ -161,8 +172,10 @@ static struct sim_dev_reg bus1_fixups[] = {
         DEFINE_REG(16, 0, 0x10, (64*KB), reg_init, reg_read, reg_write)
         DEFINE_REG(16, 0, 0x14, (64*MB), reg_init, reg_read, reg_write)
         DEFINE_REG(16, 0, 0x18, (64*MB), reg_init, reg_read, reg_write)
+        DEFINE_REG(16, 0, 0x3c, 256, reg_init, reg_noirq_read, reg_write)
         DEFINE_REG(17, 0, 0x10, (128*KB), reg_init, reg_read, reg_write)
         DEFINE_REG(18, 0, 0x10, (1*KB), reg_init, reg_read, reg_write)
+        DEFINE_REG(18, 0, 0x3c, 256, reg_init, reg_noirq_read, reg_write)
 };
 
 static void __init init_sim_regs(void)
diff --git a/arch/x86/platform/ce4100/ce4100.c b/arch/x86/platform/ce4100/ce4100.c
index 4c61b52191eb..92525cb8e54c 100644
--- a/arch/x86/platform/ce4100/ce4100.c
+++ b/arch/x86/platform/ce4100/ce4100.c
@@ -21,12 +21,25 @@
 #include <asm/i8259.h>
 #include <asm/io.h>
 #include <asm/io_apic.h>
+#include <asm/emergency-restart.h>
 
 static int ce4100_i8042_detect(void)
 {
         return 0;
 }
 
+/*
+ * The CE4100 platform has an internal 8051 Microcontroller which is
+ * responsible for signaling to the external Power Management Unit the
+ * intention to reset, reboot or power off the system. This 8051 device has
+ * its command register mapped at I/O port 0xcf9 and the value 0x4 is used
+ * to power off the system.
+ */
+static void ce4100_power_off(void)
+{
+        outb(0x4, 0xcf9);
+}
+
 #ifdef CONFIG_SERIAL_8250
 
 static unsigned int mem_serial_in(struct uart_port *p, int offset)
@@ -139,8 +152,19 @@ void __init x86_ce4100_early_setup(void)
         x86_init.mpparse.find_smp_config = x86_init_noop;
         x86_init.pci.init = ce4100_pci_init;
 
+        /*
+         * By default, the reboot method is ACPI which is supported by the
+         * CE4100 bootloader CEFDK using FADT.ResetReg Address and ResetValue
+         * the bootloader will however issue a system power off instead of
+         * reboot. By using BOOT_KBD we ensure proper system reboot as
+         * expected.
+         */
+        reboot_type = BOOT_KBD;
+
 #ifdef CONFIG_X86_IO_APIC
         x86_init.pci.init_irq = sdv_pci_init;
         x86_init.mpparse.setup_ioapic_ids = setup_ioapic_ids_from_mpc_nocheck;
 #endif
+
+        pm_power_off = ce4100_power_off;
 }