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Diffstat (limited to 'arch/arm/boot/dts/imx6q-sabreauto.dts')
-rw-r--r--arch/arm/boot/dts/imx6q-sabreauto.dts64
1 files changed, 64 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6q-sabreauto.dts b/arch/arm/boot/dts/imx6q-sabreauto.dts
new file mode 100644
index 000000000000..826e4ad1477e
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-sabreauto.dts
@@ -0,0 +1,64 @@
1/*
2 * Copyright 2012 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13/dts-v1/;
14/include/ "imx6q.dtsi"
15
16/ {
17 model = "Freescale i.MX6 Quad SABRE Automotive Board";
18 compatible = "fsl,imx6q-sabreauto", "fsl,imx6q";
19
20 memory {
21 reg = <0x10000000 0x80000000>;
22 };
23
24 soc {
25 aips-bus@02000000 { /* AIPS1 */
26 iomuxc@020e0000 {
27 pinctrl-names = "default";
28 pinctrl-0 = <&pinctrl_hog>;
29
30 hog {
31 pinctrl_hog: hoggrp {
32 fsl,pins = <
33 1376 0x80000000 /* MX6Q_PAD_NANDF_CS2__GPIO_6_15 */
34 13 0x80000000 /* MX6Q_PAD_SD2_DAT2__GPIO_1_13 */
35 >;
36 };
37 };
38 };
39 };
40
41 aips-bus@02100000 { /* AIPS2 */
42 uart4: serial@021f0000 {
43 pinctrl-names = "default";
44 pinctrl-0 = <&pinctrl_uart4_1>;
45 status = "okay";
46 };
47
48 ethernet@02188000 {
49 pinctrl-names = "default";
50 pinctrl-0 = <&pinctrl_enet_2>;
51 phy-mode = "rgmii";
52 status = "okay";
53 };
54
55 usdhc@02198000 { /* uSDHC3 */
56 pinctrl-names = "default";
57 pinctrl-0 = <&pinctrl_usdhc3_1>;
58 cd-gpios = <&gpio6 15 0>;
59 wp-gpios = <&gpio1 13 0>;
60 status = "okay";
61 };
62 };
63 };
64};