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Diffstat (limited to 'arch/arm/boot/dts/omap4.dtsi')
-rw-r--r--arch/arm/boot/dts/omap4.dtsi105
1 files changed, 98 insertions, 7 deletions
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 3883f94fdbd0..739bb79e410e 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -95,6 +95,12 @@
95 ranges; 95 ranges;
96 ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3"; 96 ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
97 97
98 counter32k: counter@4a304000 {
99 compatible = "ti,omap-counter32k";
100 reg = <0x4a304000 0x20>;
101 ti,hwmods = "counter_32k";
102 };
103
98 omap4_pmx_core: pinmux@4a100040 { 104 omap4_pmx_core: pinmux@4a100040 {
99 compatible = "ti,omap4-padconf", "pinctrl-single"; 105 compatible = "ti,omap4-padconf", "pinctrl-single";
100 reg = <0x4a100040 0x0196>; 106 reg = <0x4a100040 0x0196>;
@@ -340,7 +346,6 @@
340 <0x49032000 0x7f>; /* L3 Interconnect */ 346 <0x49032000 0x7f>; /* L3 Interconnect */
341 reg-names = "mpu", "dma"; 347 reg-names = "mpu", "dma";
342 interrupts = <0 112 0x4>; 348 interrupts = <0 112 0x4>;
343 interrupt-parent = <&gic>;
344 ti,hwmods = "mcpdm"; 349 ti,hwmods = "mcpdm";
345 }; 350 };
346 351
@@ -350,7 +355,6 @@
350 <0x4902e000 0x7f>; /* L3 Interconnect */ 355 <0x4902e000 0x7f>; /* L3 Interconnect */
351 reg-names = "mpu", "dma"; 356 reg-names = "mpu", "dma";
352 interrupts = <0 114 0x4>; 357 interrupts = <0 114 0x4>;
353 interrupt-parent = <&gic>;
354 ti,hwmods = "dmic"; 358 ti,hwmods = "dmic";
355 }; 359 };
356 360
@@ -361,7 +365,6 @@
361 reg-names = "mpu", "dma"; 365 reg-names = "mpu", "dma";
362 interrupts = <0 17 0x4>; 366 interrupts = <0 17 0x4>;
363 interrupt-names = "common"; 367 interrupt-names = "common";
364 interrupt-parent = <&gic>;
365 ti,buffer-size = <128>; 368 ti,buffer-size = <128>;
366 ti,hwmods = "mcbsp1"; 369 ti,hwmods = "mcbsp1";
367 }; 370 };
@@ -373,7 +376,6 @@
373 reg-names = "mpu", "dma"; 376 reg-names = "mpu", "dma";
374 interrupts = <0 22 0x4>; 377 interrupts = <0 22 0x4>;
375 interrupt-names = "common"; 378 interrupt-names = "common";
376 interrupt-parent = <&gic>;
377 ti,buffer-size = <128>; 379 ti,buffer-size = <128>;
378 ti,hwmods = "mcbsp2"; 380 ti,hwmods = "mcbsp2";
379 }; 381 };
@@ -385,7 +387,6 @@
385 reg-names = "mpu", "dma"; 387 reg-names = "mpu", "dma";
386 interrupts = <0 23 0x4>; 388 interrupts = <0 23 0x4>;
387 interrupt-names = "common"; 389 interrupt-names = "common";
388 interrupt-parent = <&gic>;
389 ti,buffer-size = <128>; 390 ti,buffer-size = <128>;
390 ti,hwmods = "mcbsp3"; 391 ti,hwmods = "mcbsp3";
391 }; 392 };
@@ -396,7 +397,6 @@
396 reg-names = "mpu"; 397 reg-names = "mpu";
397 interrupts = <0 16 0x4>; 398 interrupts = <0 16 0x4>;
398 interrupt-names = "common"; 399 interrupt-names = "common";
399 interrupt-parent = <&gic>;
400 ti,buffer-size = <128>; 400 ti,buffer-size = <128>;
401 ti,hwmods = "mcbsp4"; 401 ti,hwmods = "mcbsp4";
402 }; 402 };
@@ -431,12 +431,103 @@
431 hw-caps-temp-alert; 431 hw-caps-temp-alert;
432 }; 432 };
433 433
434 ocp2scp { 434 ocp2scp@4a0ad000 {
435 compatible = "ti,omap-ocp2scp"; 435 compatible = "ti,omap-ocp2scp";
436 reg = <0x4a0ad000 0x1f>;
436 #address-cells = <1>; 437 #address-cells = <1>;
437 #size-cells = <1>; 438 #size-cells = <1>;
438 ranges; 439 ranges;
439 ti,hwmods = "ocp2scp_usb_phy"; 440 ti,hwmods = "ocp2scp_usb_phy";
440 }; 441 };
442
443 timer1: timer@4a318000 {
444 compatible = "ti,omap2-timer";
445 reg = <0x4a318000 0x80>;
446 interrupts = <0 37 0x4>;
447 ti,hwmods = "timer1";
448 ti,timer-alwon;
449 };
450
451 timer2: timer@48032000 {
452 compatible = "ti,omap2-timer";
453 reg = <0x48032000 0x80>;
454 interrupts = <0 38 0x4>;
455 ti,hwmods = "timer2";
456 };
457
458 timer3: timer@48034000 {
459 compatible = "ti,omap2-timer";
460 reg = <0x48034000 0x80>;
461 interrupts = <0 39 0x4>;
462 ti,hwmods = "timer3";
463 };
464
465 timer4: timer@48036000 {
466 compatible = "ti,omap2-timer";
467 reg = <0x48036000 0x80>;
468 interrupts = <0 40 0x4>;
469 ti,hwmods = "timer4";
470 };
471
472 timer5: timer@40138000 {
473 compatible = "ti,omap2-timer";
474 reg = <0x40138000 0x80>,
475 <0x49038000 0x80>;
476 interrupts = <0 41 0x4>;
477 ti,hwmods = "timer5";
478 ti,timer-dsp;
479 };
480
481 timer6: timer@4013a000 {
482 compatible = "ti,omap2-timer";
483 reg = <0x4013a000 0x80>,
484 <0x4903a000 0x80>;
485 interrupts = <0 42 0x4>;
486 ti,hwmods = "timer6";
487 ti,timer-dsp;
488 };
489
490 timer7: timer@4013c000 {
491 compatible = "ti,omap2-timer";
492 reg = <0x4013c000 0x80>,
493 <0x4903c000 0x80>;
494 interrupts = <0 43 0x4>;
495 ti,hwmods = "timer7";
496 ti,timer-dsp;
497 };
498
499 timer8: timer@4013e000 {
500 compatible = "ti,omap2-timer";
501 reg = <0x4013e000 0x80>,
502 <0x4903e000 0x80>;
503 interrupts = <0 44 0x4>;
504 ti,hwmods = "timer8";
505 ti,timer-pwm;
506 ti,timer-dsp;
507 };
508
509 timer9: timer@4803e000 {
510 compatible = "ti,omap2-timer";
511 reg = <0x4803e000 0x80>;
512 interrupts = <0 45 0x4>;
513 ti,hwmods = "timer9";
514 ti,timer-pwm;
515 };
516
517 timer10: timer@48086000 {
518 compatible = "ti,omap2-timer";
519 reg = <0x48086000 0x80>;
520 interrupts = <0 46 0x4>;
521 ti,hwmods = "timer10";
522 ti,timer-pwm;
523 };
524
525 timer11: timer@48088000 {
526 compatible = "ti,omap2-timer";
527 reg = <0x48088000 0x80>;
528 interrupts = <0 47 0x4>;
529 ti,hwmods = "timer11";
530 ti,timer-pwm;
531 };
441 }; 532 };
442}; 533};