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authorArnd Bergmann <arnd@arndb.de>2014-07-26 06:01:10 -0400
committerArnd Bergmann <arnd@arndb.de>2014-07-26 06:01:27 -0400
commit96bda115ec552ff75319f85828f6c333d101b401 (patch)
treee30895f65413fdf8fd91c026faad1a3fb54b0653 /arch/arm/plat-samsung/include/plat
parent8e5655cd4f7e140ceb24705f913406e9f56b7d54 (diff)
parentf1ff47454bb2fe0d5644f981679d1bea532816fd (diff)
Merge tag 's5pv210-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc
Merge "Samsung S5PV210 DT support for v3.17" from Kukjin Kim: - support common clock framework for s5pv210 clock - add generic PHY driver on s5pv210 to support it via DT - add dt support for s5pv210-goni, smdkc110, smdkv210 and torbreck boards - remove board files from mach-s5pv210 and unused codes - enable multiplatform for s5pv210 * tag 's5pv210-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: clk: samsung: s5pv210: Remove legacy board support ARM: SAMSUNG: Remove remaining legacy code gpio: samsung: Remove legacy support of S5PV210 ARM: S5PV210: Enable multi-platform build support cpufreq: s5pv210: Make the driver multiplatform aware ARM: S5PV210: Register cpufreq platform device ARM: S5PV210: move debug-macro.S into the common space ARM: S5PV210: Untie PM support from legacy code ARM: S5PV210: Remove support for board files ARM: dts: Add Device tree for s5pc110/s5pv210 boards ARM: dts: Add Device tree for s5pv210 SoC ARM: S5PV210: Add board file for boot using Device Tree phy: Add support for S5PV210 to the Exynos USB 2.0 PHY driver clk: samsung: Add S5PV210 Audio Subsystem clock driver ARM: SAMSUNG: Remove legacy clock code serial: samsung: Remove support for legacy clock code cpufreq: s3c24xx: Remove some dead code ARM: S5PV210: Migrate clock handling to Common Clock Framework clk: samsung: Add clock driver for S5PV210 and compatible SoCs Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/plat-samsung/include/plat')
-rw-r--r--arch/arm/plat-samsung/include/plat/camport.h28
-rw-r--r--arch/arm/plat-samsung/include/plat/clock-clksrc.h83
-rw-r--r--arch/arm/plat-samsung/include/plat/clock.h152
-rw-r--r--arch/arm/plat-samsung/include/plat/cpu-freq-core.h3
-rw-r--r--arch/arm/plat-samsung/include/plat/cpu.h13
-rw-r--r--arch/arm/plat-samsung/include/plat/devs.h42
-rw-r--r--arch/arm/plat-samsung/include/plat/fb-core.h15
-rw-r--r--arch/arm/plat-samsung/include/plat/fb.h22
-rw-r--r--arch/arm/plat-samsung/include/plat/fimc-core.h51
-rw-r--r--arch/arm/plat-samsung/include/plat/gpio-cfg.h64
-rw-r--r--arch/arm/plat-samsung/include/plat/hdmi.h16
-rw-r--r--arch/arm/plat-samsung/include/plat/irqs.h72
-rw-r--r--arch/arm/plat-samsung/include/plat/mfc.h35
-rw-r--r--arch/arm/plat-samsung/include/plat/pll.h323
-rw-r--r--arch/arm/plat-samsung/include/plat/s5p-clock.h65
-rw-r--r--arch/arm/plat-samsung/include/plat/sdhci.h47
-rw-r--r--arch/arm/plat-samsung/include/plat/tv-core.h44
17 files changed, 0 insertions, 1075 deletions
diff --git a/arch/arm/plat-samsung/include/plat/camport.h b/arch/arm/plat-samsung/include/plat/camport.h
deleted file mode 100644
index a5708bf84b3a..000000000000
--- a/arch/arm/plat-samsung/include/plat/camport.h
+++ /dev/null
@@ -1,28 +0,0 @@
1/*
2 * Copyright (C) 2011 Samsung Electronics Co., Ltd.
3 *
4 * S5P series camera interface helper functions
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __PLAT_SAMSUNG_CAMPORT_H_
12#define __PLAT_SAMSUNG_CAMPORT_H_ __FILE__
13
14enum s5p_camport_id {
15 S5P_CAMPORT_A,
16 S5P_CAMPORT_B,
17};
18
19/*
20 * The helper functions to configure GPIO for the camera parallel bus.
21 * The camera port can be multiplexed with any FIMC entity, even multiple
22 * FIMC entities are allowed to be attached to a single port simultaneously.
23 * These functions are to be used in the board setup code.
24 */
25int s5pv210_fimc_setup_gpio(enum s5p_camport_id id);
26int exynos4_fimc_setup_gpio(enum s5p_camport_id id);
27
28#endif /* __PLAT_SAMSUNG_CAMPORT_H */
diff --git a/arch/arm/plat-samsung/include/plat/clock-clksrc.h b/arch/arm/plat-samsung/include/plat/clock-clksrc.h
deleted file mode 100644
index 50a8ca7c3760..000000000000
--- a/arch/arm/plat-samsung/include/plat/clock-clksrc.h
+++ /dev/null
@@ -1,83 +0,0 @@
1/* linux/arch/arm/plat-samsung/include/plat/clock-clksrc.h
2 *
3 * Parts taken from arch/arm/plat-s3c64xx/clock.c
4 * Copyright 2008 Openmoko, Inc.
5 * Copyright 2008 Simtec Electronics
6 * Ben Dooks <ben@simtec.co.uk>
7 * http://armlinux.simtec.co.uk/
8 *
9 * Copyright 2009 Ben Dooks <ben-linux@fluff.org>
10 * Copyright 2009 Harald Welte
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15*/
16
17/**
18 * struct clksrc_sources - list of sources for a given clock
19 * @sources: array of pointers to clocks
20 * @nr_sources: The size of @sources
21 */
22struct clksrc_sources {
23 unsigned int nr_sources;
24 struct clk **sources;
25};
26
27/**
28 * struct clksrc_reg - register definition for clock control bits
29 * @reg: pointer to the register in virtual memory.
30 * @shift: the shift in bits to where the bitfield is.
31 * @size: the size in bits of the bitfield.
32 *
33 * This specifies the size and position of the bits we are interested
34 * in within the register specified by @reg.
35 */
36struct clksrc_reg {
37 void __iomem *reg;
38 unsigned short shift;
39 unsigned short size;
40};
41
42/**
43 * struct clksrc_clk - class of clock for newer style samsung devices.
44 * @clk: the standard clock representation
45 * @sources: the sources for this clock
46 * @reg_src: the register definition for selecting the clock's source
47 * @reg_div: the register definition for the clock's output divisor
48 *
49 * This clock implements the features required by the newer SoCs where
50 * the standard clock block provides an input mux and a post-mux divisor
51 * to provide the periperhal's clock.
52 *
53 * The array of @sources provides the mapping of mux position to the
54 * clock, and @reg_src shows the code where to modify to change the mux
55 * position. The @reg_div defines how to change the divider settings on
56 * the output.
57 */
58struct clksrc_clk {
59 struct clk clk;
60 struct clksrc_sources *sources;
61
62 struct clksrc_reg reg_src;
63 struct clksrc_reg reg_div;
64};
65
66/**
67 * s3c_set_clksrc() - setup the clock from the register settings
68 * @clk: The clock to setup.
69 * @announce: true to announce the setting to printk().
70 *
71 * Setup the clock from the current register settings, for when the
72 * kernel boots or if it is resuming from a possibly unknown state.
73 */
74extern void s3c_set_clksrc(struct clksrc_clk *clk, bool announce);
75
76/**
77 * s3c_register_clksrc() register clocks from an array of clksrc clocks
78 * @srcs: The array of clocks to register
79 * @size: The size of the @srcs array.
80 *
81 * Initialise and register the array of clocks described by @srcs.
82 */
83extern void s3c_register_clksrc(struct clksrc_clk *srcs, int size);
diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h
deleted file mode 100644
index 63239f409807..000000000000
--- a/arch/arm/plat-samsung/include/plat/clock.h
+++ /dev/null
@@ -1,152 +0,0 @@
1/* linux/arch/arm/plat-s3c/include/plat/clock.h
2 *
3 * Copyright (c) 2004-2005 Simtec Electronics
4 * http://www.simtec.co.uk/products/SWLINUX/
5 * Written by Ben Dooks, <ben@simtec.co.uk>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#ifndef __ASM_PLAT_CLOCK_H
13#define __ASM_PLAT_CLOCK_H __FILE__
14
15#include <linux/spinlock.h>
16#include <linux/clkdev.h>
17
18struct clk;
19
20/**
21 * struct clk_ops - standard clock operations
22 * @set_rate: set the clock rate, see clk_set_rate().
23 * @get_rate: get the clock rate, see clk_get_rate().
24 * @round_rate: round a given clock rate, see clk_round_rate().
25 * @set_parent: set the clock's parent, see clk_set_parent().
26 *
27 * Group the common clock implementations together so that we
28 * don't have to keep setting the same fields again. We leave
29 * enable in struct clk.
30 *
31 * Adding an extra layer of indirection into the process should
32 * not be a problem as it is unlikely these operations are going
33 * to need to be called quickly.
34 */
35struct clk_ops {
36 int (*set_rate)(struct clk *c, unsigned long rate);
37 unsigned long (*get_rate)(struct clk *c);
38 unsigned long (*round_rate)(struct clk *c, unsigned long rate);
39 int (*set_parent)(struct clk *c, struct clk *parent);
40};
41
42struct clk {
43 struct list_head list;
44 struct module *owner;
45 struct clk *parent;
46 const char *name;
47 const char *devname;
48 int id;
49 int usage;
50 unsigned long rate;
51 unsigned long ctrlbit;
52
53 struct clk_ops *ops;
54 int (*enable)(struct clk *, int enable);
55 struct clk_lookup lookup;
56#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
57 struct dentry *dent; /* For visible tree hierarchy */
58#endif
59};
60
61/* other clocks which may be registered by board support */
62
63extern struct clk s3c24xx_dclk0;
64extern struct clk s3c24xx_dclk1;
65extern struct clk s3c24xx_clkout0;
66extern struct clk s3c24xx_clkout1;
67extern struct clk s3c24xx_uclk;
68
69extern struct clk clk_usb_bus;
70
71/* core clock support */
72
73extern struct clk clk_f;
74extern struct clk clk_h;
75extern struct clk clk_p;
76extern struct clk clk_mpll;
77extern struct clk clk_upll;
78extern struct clk clk_epll;
79extern struct clk clk_xtal;
80extern struct clk clk_ext;
81
82/* S3C2443/S3C2416 specific clocks */
83extern struct clksrc_clk clk_epllref;
84extern struct clksrc_clk clk_esysclk;
85
86/* S3C24XX UART clocks */
87extern struct clk s3c24xx_clk_uart0;
88extern struct clk s3c24xx_clk_uart1;
89extern struct clk s3c24xx_clk_uart2;
90
91/* S3C64XX specific clocks */
92extern struct clk clk_h2;
93extern struct clk clk_27m;
94extern struct clk clk_48m;
95extern struct clk clk_xusbxti;
96
97extern int clk_default_setrate(struct clk *clk, unsigned long rate);
98extern struct clk_ops clk_ops_def_setrate;
99
100/* exports for arch/arm/mach-s3c2410
101 *
102 * Please DO NOT use these outside of arch/arm/mach-s3c2410
103*/
104
105extern spinlock_t clocks_lock;
106
107extern int s3c2410_clkcon_enable(struct clk *clk, int enable);
108
109extern int s3c24xx_register_clock(struct clk *clk);
110extern int s3c24xx_register_clocks(struct clk **clk, int nr_clks);
111
112extern void s3c_register_clocks(struct clk *clk, int nr_clks);
113extern void s3c_disable_clocks(struct clk *clkp, int nr_clks);
114
115extern int s3c24xx_register_baseclocks(unsigned long xtal);
116
117extern void s5p_register_clocks(unsigned long xtal_freq);
118
119extern void s3c24xx_setup_clocks(unsigned long fclk,
120 unsigned long hclk,
121 unsigned long pclk);
122
123extern void s3c2410_setup_clocks(void);
124extern void s3c2412_setup_clocks(void);
125extern void s3c244x_setup_clocks(void);
126
127/* S3C2410 specific clock functions */
128
129extern int s3c2410_baseclk_add(void);
130
131/* S3C2443/S3C2416 specific clock functions */
132
133typedef unsigned int (*pll_fn)(unsigned int reg, unsigned int base);
134
135extern void s3c2443_common_setup_clocks(pll_fn get_mpll);
136extern void s3c2443_common_init_clocks(int xtal, pll_fn get_mpll,
137 unsigned int *divs, int nr_divs,
138 int divmask);
139
140extern int s3c2443_clkcon_enable_h(struct clk *clk, int enable);
141extern int s3c2443_clkcon_enable_p(struct clk *clk, int enable);
142extern int s3c2443_clkcon_enable_s(struct clk *clk, int enable);
143
144/* S3C64XX specific functions and clocks */
145
146extern int s3c64xx_sclk_ctrl(struct clk *clk, int enable);
147
148/* Global watchdog clock used by arch_wtd_reset() callback */
149
150extern struct clk *s3c2410_wdtclk;
151
152#endif /* __ASM_PLAT_CLOCK_H */
diff --git a/arch/arm/plat-samsung/include/plat/cpu-freq-core.h b/arch/arm/plat-samsung/include/plat/cpu-freq-core.h
index 72d4178ad23b..317c52303288 100644
--- a/arch/arm/plat-samsung/include/plat/cpu-freq-core.h
+++ b/arch/arm/plat-samsung/include/plat/cpu-freq-core.h
@@ -140,7 +140,6 @@ struct s3c_cpufreq_config {
140 * any frequency changes. This is really only need by devices like the 140 * any frequency changes. This is really only need by devices like the
141 * S3C2410 where there is no or limited divider between the PLL and the 141 * S3C2410 where there is no or limited divider between the PLL and the
142 * ARMCLK. 142 * ARMCLK.
143 * @resume_clocks: Update the clocks on resume.
144 * @get_iotiming: Get the current IO timing data, mainly for use at start. 143 * @get_iotiming: Get the current IO timing data, mainly for use at start.
145 * @set_iotiming: Update the IO timings from the cached copies calculated 144 * @set_iotiming: Update the IO timings from the cached copies calculated
146 * from the @calc_iotiming entry when changing the frequency. 145 * from the @calc_iotiming entry when changing the frequency.
@@ -169,8 +168,6 @@ struct s3c_cpufreq_info {
169 168
170 /* driver routines */ 169 /* driver routines */
171 170
172 void (*resume_clocks)(void);
173
174 int (*get_iotiming)(struct s3c_cpufreq_config *cfg, 171 int (*get_iotiming)(struct s3c_cpufreq_config *cfg,
175 struct s3c_iotimings *timings); 172 struct s3c_iotimings *timings);
176 173
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h
index d1d4659025bb..61d14f3a0426 100644
--- a/arch/arm/plat-samsung/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -47,7 +47,6 @@ IS_SAMSUNG_CPU(s3c24xx, S3C24XX_CPU_ID, S3C24XX_CPU_MASK)
47IS_SAMSUNG_CPU(s3c2412, S3C2412_CPU_ID, S3C2412_CPU_MASK) 47IS_SAMSUNG_CPU(s3c2412, S3C2412_CPU_ID, S3C2412_CPU_MASK)
48IS_SAMSUNG_CPU(s3c6400, S3C6400_CPU_ID, S3C64XX_CPU_MASK) 48IS_SAMSUNG_CPU(s3c6400, S3C6400_CPU_ID, S3C64XX_CPU_MASK)
49IS_SAMSUNG_CPU(s3c6410, S3C6410_CPU_ID, S3C64XX_CPU_MASK) 49IS_SAMSUNG_CPU(s3c6410, S3C6410_CPU_ID, S3C64XX_CPU_MASK)
50IS_SAMSUNG_CPU(s5pv210, S5PV210_CPU_ID, S5PV210_CPU_MASK)
51 50
52#if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2412) || \ 51#if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2412) || \
53 defined(CONFIG_CPU_S3C2416) || defined(CONFIG_CPU_S3C2440) || \ 52 defined(CONFIG_CPU_S3C2416) || defined(CONFIG_CPU_S3C2440) || \
@@ -76,12 +75,6 @@ IS_SAMSUNG_CPU(s5pv210, S5PV210_CPU_ID, S5PV210_CPU_MASK)
76# define soc_is_s3c64xx() 0 75# define soc_is_s3c64xx() 0
77#endif 76#endif
78 77
79#if defined(CONFIG_CPU_S5PV210)
80# define soc_is_s5pv210() is_samsung_s5pv210()
81#else
82# define soc_is_s5pv210() 0
83#endif
84
85#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE } 78#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE }
86 79
87#ifndef KHZ 80#ifndef KHZ
@@ -117,12 +110,9 @@ extern void s3c_init_cpu(unsigned long idcode,
117 110
118/* core initialisation functions */ 111/* core initialisation functions */
119 112
120extern void s5p_init_irq(u32 *vic, u32 num_vic);
121
122extern void s3c24xx_init_io(struct map_desc *mach_desc, int size); 113extern void s3c24xx_init_io(struct map_desc *mach_desc, int size);
123 114
124extern void s3c64xx_init_cpu(void); 115extern void s3c64xx_init_cpu(void);
125extern void s5p_init_cpu(void __iomem *cpuid_addr);
126 116
127extern unsigned int samsung_rev(void); 117extern unsigned int samsung_rev(void);
128 118
@@ -149,8 +139,5 @@ extern struct bus_type s3c2440_subsys;
149extern struct bus_type s3c2442_subsys; 139extern struct bus_type s3c2442_subsys;
150extern struct bus_type s3c2443_subsys; 140extern struct bus_type s3c2443_subsys;
151extern struct bus_type s3c6410_subsys; 141extern struct bus_type s3c6410_subsys;
152extern struct bus_type s5pv210_subsys;
153
154extern void (*s5pc1xx_idle)(void);
155 142
156#endif 143#endif
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index 5f5a28d08c2e..e23fed311e5f 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -25,9 +25,6 @@ struct s3c24xx_uart_resources {
25 25
26extern struct s3c24xx_uart_resources s3c2410_uart_resources[]; 26extern struct s3c24xx_uart_resources s3c2410_uart_resources[];
27extern struct s3c24xx_uart_resources s3c64xx_uart_resources[]; 27extern struct s3c24xx_uart_resources s3c64xx_uart_resources[];
28extern struct s3c24xx_uart_resources s5p_uart_resources[];
29extern struct s3c24xx_uart_resources exynos4_uart_resources[];
30extern struct s3c24xx_uart_resources exynos5_uart_resources[];
31 28
32extern struct platform_device *s3c24xx_uart_devs[]; 29extern struct platform_device *s3c24xx_uart_devs[];
33extern struct platform_device *s3c24xx_uart_src[]; 30extern struct platform_device *s3c24xx_uart_src[];
@@ -75,45 +72,6 @@ extern struct platform_device s3c_device_usb_hsotg;
75extern struct platform_device s3c_device_usb_hsudc; 72extern struct platform_device s3c_device_usb_hsudc;
76extern struct platform_device s3c_device_wdt; 73extern struct platform_device s3c_device_wdt;
77 74
78extern struct platform_device s5p_device_fimc0;
79extern struct platform_device s5p_device_fimc1;
80extern struct platform_device s5p_device_fimc2;
81extern struct platform_device s5p_device_fimc3;
82extern struct platform_device s5p_device_fimc_md;
83extern struct platform_device s5p_device_jpeg;
84extern struct platform_device s5p_device_g2d;
85extern struct platform_device s5p_device_fimd0;
86extern struct platform_device s5p_device_hdmi;
87extern struct platform_device s5p_device_i2c_hdmiphy;
88extern struct platform_device s5p_device_mfc;
89extern struct platform_device s5p_device_mfc_l;
90extern struct platform_device s5p_device_mfc_r;
91extern struct platform_device s5p_device_mipi_csis0;
92extern struct platform_device s5p_device_mipi_csis1;
93extern struct platform_device s5p_device_mixer;
94extern struct platform_device s5p_device_onenand;
95extern struct platform_device s5p_device_sdo;
96
97extern struct platform_device s5pv210_device_ac97;
98extern struct platform_device s5pv210_device_iis0;
99extern struct platform_device s5pv210_device_iis1;
100extern struct platform_device s5pv210_device_iis2;
101extern struct platform_device s5pv210_device_pcm0;
102extern struct platform_device s5pv210_device_pcm1;
103extern struct platform_device s5pv210_device_pcm2;
104extern struct platform_device s5pv210_device_spdif;
105
106extern struct platform_device exynos4_device_ac97;
107extern struct platform_device exynos4_device_ahci;
108extern struct platform_device exynos4_device_i2s0;
109extern struct platform_device exynos4_device_i2s1;
110extern struct platform_device exynos4_device_i2s2;
111extern struct platform_device exynos4_device_ohci;
112extern struct platform_device exynos4_device_pcm0;
113extern struct platform_device exynos4_device_pcm1;
114extern struct platform_device exynos4_device_pcm2;
115extern struct platform_device exynos4_device_spdif;
116
117extern struct platform_device samsung_asoc_idma; 75extern struct platform_device samsung_asoc_idma;
118extern struct platform_device samsung_device_keypad; 76extern struct platform_device samsung_device_keypad;
119extern struct platform_device samsung_device_pwm; 77extern struct platform_device samsung_device_pwm;
diff --git a/arch/arm/plat-samsung/include/plat/fb-core.h b/arch/arm/plat-samsung/include/plat/fb-core.h
index 6abcbf139cee..bca383efcf6d 100644
--- a/arch/arm/plat-samsung/include/plat/fb-core.h
+++ b/arch/arm/plat-samsung/include/plat/fb-core.h
@@ -26,19 +26,4 @@ static inline void s3c_fb_setname(char *name)
26#endif 26#endif
27} 27}
28 28
29/* Re-define device name depending on support. */
30static inline void s5p_fb_setname(int id, char *name)
31{
32 switch (id) {
33#ifdef CONFIG_S5P_DEV_FIMD0
34 case 0:
35 s5p_device_fimd0.name = name;
36 break;
37#endif
38 default:
39 printk(KERN_ERR "%s: invalid device id(%d)\n", __func__, id);
40 break;
41 }
42}
43
44#endif /* __ASM_PLAT_FB_CORE_H */ 29#endif /* __ASM_PLAT_FB_CORE_H */
diff --git a/arch/arm/plat-samsung/include/plat/fb.h b/arch/arm/plat-samsung/include/plat/fb.h
index 5a0e26afb961..b89f8f208515 100644
--- a/arch/arm/plat-samsung/include/plat/fb.h
+++ b/arch/arm/plat-samsung/include/plat/fb.h
@@ -26,32 +26,10 @@
26extern void s3c_fb_set_platdata(struct s3c_fb_platdata *pd); 26extern void s3c_fb_set_platdata(struct s3c_fb_platdata *pd);
27 27
28/** 28/**
29 * s5p_fimd0_set_platdata() - Setup the FB device with platform data.
30 * @pd: The platform data to set. The data is copied from the passed structure
31 * so the machine data can mark the data __initdata so that any unused
32 * machines will end up dumping their data at runtime.
33 */
34extern void s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd);
35
36/**
37 * s3c64xx_fb_gpio_setup_24bpp() - S3C64XX setup function for 24bpp LCD 29 * s3c64xx_fb_gpio_setup_24bpp() - S3C64XX setup function for 24bpp LCD
38 * 30 *
39 * Initialise the GPIO for an 24bpp LCD display on the RGB interface. 31 * Initialise the GPIO for an 24bpp LCD display on the RGB interface.
40 */ 32 */
41extern void s3c64xx_fb_gpio_setup_24bpp(void); 33extern void s3c64xx_fb_gpio_setup_24bpp(void);
42 34
43/**
44 * s5pv210_fb_gpio_setup_24bpp() - S5PV210/S5PC110 setup function for 24bpp LCD
45 *
46 * Initialise the GPIO for an 24bpp LCD display on the RGB interface.
47 */
48extern void s5pv210_fb_gpio_setup_24bpp(void);
49
50/**
51 * exynos4_fimd0_gpio_setup_24bpp() - Exynos4 setup function for 24bpp LCD0
52 *
53 * Initialise the GPIO for an 24bpp LCD display on the RGB interface 0.
54 */
55extern void exynos4_fimd0_gpio_setup_24bpp(void);
56
57#endif /* __PLAT_S3C_FB_H */ 35#endif /* __PLAT_S3C_FB_H */
diff --git a/arch/arm/plat-samsung/include/plat/fimc-core.h b/arch/arm/plat-samsung/include/plat/fimc-core.h
deleted file mode 100644
index 1d6cb2b8b094..000000000000
--- a/arch/arm/plat-samsung/include/plat/fimc-core.h
+++ /dev/null
@@ -1,51 +0,0 @@
1/*
2 * arch/arm/plat-samsung/include/plat/fimc-core.h
3 *
4 * Copyright 2010 Samsung Electronics Co., Ltd.
5 * Sylwester Nawrocki <s.nawrocki@samsung.com>
6 *
7 * Samsung camera interface driver core functions
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#ifndef __ASM_PLAT_FIMC_CORE_H
15#define __ASM_PLAT_FIMC_CORE_H __FILE__
16
17/*
18 * These functions are only for use with the core support code, such as
19 * the CPU-specific initialization code.
20 */
21
22/* Re-define device name to differentiate the subsystem in various SoCs. */
23static inline void s3c_fimc_setname(int id, char *name)
24{
25 switch (id) {
26#ifdef CONFIG_S5P_DEV_FIMC0
27 case 0:
28 s5p_device_fimc0.name = name;
29 break;
30#endif
31#ifdef CONFIG_S5P_DEV_FIMC1
32 case 1:
33 s5p_device_fimc1.name = name;
34 break;
35#endif
36#ifdef CONFIG_S5P_DEV_FIMC2
37 case 2:
38 s5p_device_fimc2.name = name;
39 break;
40#endif
41#ifdef CONFIG_S5P_DEV_FIMC3
42 case 3:
43 s5p_device_fimc3.name = name;
44 break;
45#endif
46 default:
47 break;
48 }
49}
50
51#endif /* __ASM_PLAT_FIMC_CORE_H */
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
index 08740eed050c..b5294eff18b5 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
@@ -27,7 +27,6 @@
27#include <linux/types.h> 27#include <linux/types.h>
28 28
29typedef unsigned int __bitwise__ samsung_gpio_pull_t; 29typedef unsigned int __bitwise__ samsung_gpio_pull_t;
30typedef unsigned int __bitwise__ s5p_gpio_drvstr_t;
31 30
32/* forward declaration if gpio-core.h hasn't been included */ 31/* forward declaration if gpio-core.h hasn't been included */
33struct samsung_gpio_chip; 32struct samsung_gpio_chip;
@@ -180,67 +179,4 @@ static inline int s3c_gpio_cfgrange_nopull(unsigned int pin, unsigned int size,
180 return s3c_gpio_cfgall_range(pin, size, cfg, S3C_GPIO_PULL_NONE); 179 return s3c_gpio_cfgall_range(pin, size, cfg, S3C_GPIO_PULL_NONE);
181} 180}
182 181
183/* Define values for the drvstr available for each gpio pin.
184 *
185 * These values control the value of the output signal driver strength,
186 * configurable on most pins on the S5P series.
187 */
188#define S5P_GPIO_DRVSTR_LV1 ((__force s5p_gpio_drvstr_t)0x0)
189#define S5P_GPIO_DRVSTR_LV2 ((__force s5p_gpio_drvstr_t)0x2)
190#define S5P_GPIO_DRVSTR_LV3 ((__force s5p_gpio_drvstr_t)0x1)
191#define S5P_GPIO_DRVSTR_LV4 ((__force s5p_gpio_drvstr_t)0x3)
192
193/**
194 * s5c_gpio_get_drvstr() - get the driver streght value of a gpio pin
195 * @pin: The pin number to get the settings for
196 *
197 * Read the driver streght value for the specified pin.
198*/
199extern s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin);
200
201/**
202 * s3c_gpio_set_drvstr() - set the driver streght value of a gpio pin
203 * @pin: The pin number to configure the driver streght value
204 * @drvstr: The new value of the driver strength
205 *
206 * This function sets the driver strength value for the specified pin.
207 * It will return 0 if successful, or a negative error code if the pin
208 * cannot support the requested setting.
209*/
210extern int s5p_gpio_set_drvstr(unsigned int pin, s5p_gpio_drvstr_t drvstr);
211
212/**
213 * s5p_register_gpio_interrupt() - register interrupt support for a gpio group
214 * @pin: The pin number from the group to be registered
215 *
216 * This function registers gpio interrupt support for the group that the
217 * specified pin belongs to.
218 *
219 * The total number of gpio pins is quite large ob s5p series. Registering
220 * irq support for all of them would be a resource waste. Because of that the
221 * interrupt support for standard gpio pins is registered dynamically.
222 *
223 * It will return the irq number of the interrupt that has been registered
224 * or -ENOMEM if no more gpio interrupts can be registered. It is allowed
225 * to call this function more than once for the same gpio group (the group
226 * will be registered only once).
227 */
228extern int s5p_register_gpio_interrupt(int pin);
229
230/** s5p_register_gpioint_bank() - add gpio bank for further gpio interrupt
231 * registration (see s5p_register_gpio_interrupt function)
232 * @chain_irq: chained irq number for the gpio int handler for this bank
233 * @start: start gpio group number of this bank
234 * @nr_groups: number of gpio groups handled by this bank
235 *
236 * This functions registers initial information about gpio banks that
237 * can be later used by the s5p_register_gpio_interrupt() function to
238 * enable support for gpio interrupt for particular gpio group.
239 */
240#ifdef CONFIG_S5P_GPIO_INT
241extern int s5p_register_gpioint_bank(int chain_irq, int start, int nr_groups);
242#else
243#define s5p_register_gpioint_bank(chain_irq, start, nr_groups) do { } while (0)
244#endif
245
246#endif /* __PLAT_GPIO_CFG_H */ 182#endif /* __PLAT_GPIO_CFG_H */
diff --git a/arch/arm/plat-samsung/include/plat/hdmi.h b/arch/arm/plat-samsung/include/plat/hdmi.h
deleted file mode 100644
index 331d046ac2c5..000000000000
--- a/arch/arm/plat-samsung/include/plat/hdmi.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/*
2 * Copyright (C) 2012 Samsung Electronics Co.Ltd
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 */
9
10#ifndef __PLAT_SAMSUNG_HDMI_H
11#define __PLAT_SAMSUNG_HDMI_H __FILE__
12
13extern void s5p_hdmi_set_platdata(struct i2c_board_info *hdmiphy_info,
14 struct i2c_board_info *mhl_info, int mhl_bus);
15
16#endif /* __PLAT_SAMSUNG_HDMI_H */
diff --git a/arch/arm/plat-samsung/include/plat/irqs.h b/arch/arm/plat-samsung/include/plat/irqs.h
deleted file mode 100644
index 039001c0ef05..000000000000
--- a/arch/arm/plat-samsung/include/plat/irqs.h
+++ /dev/null
@@ -1,72 +0,0 @@
1/* linux/arch/arm/plat-samsung/include/plat/irqs.h
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P Common IRQ support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __PLAT_SAMSUNG_IRQS_H
14#define __PLAT_SAMSUNG_IRQS_H __FILE__
15
16/* we keep the first set of CPU IRQs out of the range of
17 * the ISA space, so that the PC104 has them to itself
18 * and we don't end up having to do horrible things to the
19 * standard ISA drivers....
20 *
21 * note, since we're using the VICs, our start must be a
22 * mulitple of 32 to allow the common code to work
23 */
24
25#define S5P_IRQ_OFFSET (32)
26
27#define S5P_IRQ(x) ((x) + S5P_IRQ_OFFSET)
28
29#define S5P_VIC0_BASE S5P_IRQ(0)
30#define S5P_VIC1_BASE S5P_IRQ(32)
31#define S5P_VIC2_BASE S5P_IRQ(64)
32#define S5P_VIC3_BASE S5P_IRQ(96)
33
34#define VIC_BASE(x) (S5P_VIC0_BASE + ((x)*32))
35
36#define IRQ_VIC0_BASE S5P_VIC0_BASE
37#define IRQ_VIC1_BASE S5P_VIC1_BASE
38#define IRQ_VIC2_BASE S5P_VIC2_BASE
39
40/* VIC based IRQs */
41
42#define S5P_IRQ_VIC0(x) (S5P_VIC0_BASE + (x))
43#define S5P_IRQ_VIC1(x) (S5P_VIC1_BASE + (x))
44#define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x))
45#define S5P_IRQ_VIC3(x) (S5P_VIC3_BASE + (x))
46
47#define IRQ_EINT(x) ((x) < 16 ? ((x) + S5P_EINT_BASE1) \
48 : ((x) - 16 + S5P_EINT_BASE2))
49
50#define EINT_OFFSET(irq) ((irq) < S5P_EINT_BASE2 ? \
51 ((irq) - S5P_EINT_BASE1) : \
52 ((irq) + 16 - S5P_EINT_BASE2))
53
54#define IRQ_EINT_BIT(x) EINT_OFFSET(x)
55
56/* Typically only a few gpio chips require gpio interrupt support.
57 To avoid memory waste irq descriptors are allocated only for
58 S5P_GPIOINT_GROUP_COUNT chips, each with total number of
59 S5P_GPIOINT_GROUP_SIZE pins/irqs. Each GPIOINT group can be assiged
60 to any gpio chip with the s5p_register_gpio_interrupt() function */
61#define S5P_GPIOINT_GROUP_COUNT 4
62#define S5P_GPIOINT_GROUP_SIZE 8
63#define S5P_GPIOINT_COUNT (S5P_GPIOINT_GROUP_COUNT * S5P_GPIOINT_GROUP_SIZE)
64
65/* IRQ types common for all s5p platforms */
66#define S5P_IRQ_TYPE_LEVEL_LOW (0x00)
67#define S5P_IRQ_TYPE_LEVEL_HIGH (0x01)
68#define S5P_IRQ_TYPE_EDGE_FALLING (0x02)
69#define S5P_IRQ_TYPE_EDGE_RISING (0x03)
70#define S5P_IRQ_TYPE_EDGE_BOTH (0x04)
71
72#endif /* __PLAT_SAMSUNG_IRQS_H */
diff --git a/arch/arm/plat-samsung/include/plat/mfc.h b/arch/arm/plat-samsung/include/plat/mfc.h
deleted file mode 100644
index 033654e91e22..000000000000
--- a/arch/arm/plat-samsung/include/plat/mfc.h
+++ /dev/null
@@ -1,35 +0,0 @@
1/*
2 * Copyright (C) 2011 Samsung Electronics Co.Ltd
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 */
9
10#ifndef __PLAT_SAMSUNG_MFC_H
11#define __PLAT_SAMSUNG_MFC_H __FILE__
12
13struct s5p_mfc_dt_meminfo {
14 unsigned long loff;
15 unsigned long lsize;
16 unsigned long roff;
17 unsigned long rsize;
18 char *compatible;
19};
20
21/**
22 * s5p_mfc_reserve_mem - function to early reserve memory for MFC driver
23 * @rbase: base address for MFC 'right' memory interface
24 * @rsize: size of the memory reserved for MFC 'right' interface
25 * @lbase: base address for MFC 'left' memory interface
26 * @lsize: size of the memory reserved for MFC 'left' interface
27 *
28 * This function reserves system memory for both MFC device memory
29 * interfaces and registers it to respective struct device entries as
30 * coherent memory.
31 */
32void __init s5p_mfc_reserve_mem(phys_addr_t rbase, unsigned int rsize,
33 phys_addr_t lbase, unsigned int lsize);
34
35#endif /* __PLAT_SAMSUNG_MFC_H */
diff --git a/arch/arm/plat-samsung/include/plat/pll.h b/arch/arm/plat-samsung/include/plat/pll.h
deleted file mode 100644
index 357af7c1c664..000000000000
--- a/arch/arm/plat-samsung/include/plat/pll.h
+++ /dev/null
@@ -1,323 +0,0 @@
1/* linux/arch/arm/plat-samsung/include/plat/pll.h
2 *
3 * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Copyright 2008 Openmoko, Inc.
7 * Copyright 2008 Simtec Electronics
8 * Ben Dooks <ben@simtec.co.uk>
9 * http://armlinux.simtec.co.uk/
10 *
11 * Samsung PLL codes
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16*/
17
18#include <asm/div64.h>
19
20#define S3C24XX_PLL_MDIV_MASK (0xFF)
21#define S3C24XX_PLL_PDIV_MASK (0x1F)
22#define S3C24XX_PLL_SDIV_MASK (0x3)
23#define S3C24XX_PLL_MDIV_SHIFT (12)
24#define S3C24XX_PLL_PDIV_SHIFT (4)
25#define S3C24XX_PLL_SDIV_SHIFT (0)
26
27static inline unsigned int s3c24xx_get_pll(unsigned int pllval,
28 unsigned int baseclk)
29{
30 unsigned int mdiv, pdiv, sdiv;
31 uint64_t fvco;
32
33 mdiv = (pllval >> S3C24XX_PLL_MDIV_SHIFT) & S3C24XX_PLL_MDIV_MASK;
34 pdiv = (pllval >> S3C24XX_PLL_PDIV_SHIFT) & S3C24XX_PLL_PDIV_MASK;
35 sdiv = (pllval >> S3C24XX_PLL_SDIV_SHIFT) & S3C24XX_PLL_SDIV_MASK;
36
37 fvco = (uint64_t)baseclk * (mdiv + 8);
38 do_div(fvco, (pdiv + 2) << sdiv);
39
40 return (unsigned int)fvco;
41}
42
43#define S3C2416_PLL_MDIV_MASK (0x3FF)
44#define S3C2416_PLL_PDIV_MASK (0x3F)
45#define S3C2416_PLL_SDIV_MASK (0x7)
46#define S3C2416_PLL_MDIV_SHIFT (14)
47#define S3C2416_PLL_PDIV_SHIFT (5)
48#define S3C2416_PLL_SDIV_SHIFT (0)
49
50static inline unsigned int s3c2416_get_pll(unsigned int pllval,
51 unsigned int baseclk)
52{
53 unsigned int mdiv, pdiv, sdiv;
54 uint64_t fvco;
55
56 mdiv = (pllval >> S3C2416_PLL_MDIV_SHIFT) & S3C2416_PLL_MDIV_MASK;
57 pdiv = (pllval >> S3C2416_PLL_PDIV_SHIFT) & S3C2416_PLL_PDIV_MASK;
58 sdiv = (pllval >> S3C2416_PLL_SDIV_SHIFT) & S3C2416_PLL_SDIV_MASK;
59
60 fvco = (uint64_t)baseclk * mdiv;
61 do_div(fvco, (pdiv << sdiv));
62
63 return (unsigned int)fvco;
64}
65
66#define S3C6400_PLL_MDIV_MASK (0x3FF)
67#define S3C6400_PLL_PDIV_MASK (0x3F)
68#define S3C6400_PLL_SDIV_MASK (0x7)
69#define S3C6400_PLL_MDIV_SHIFT (16)
70#define S3C6400_PLL_PDIV_SHIFT (8)
71#define S3C6400_PLL_SDIV_SHIFT (0)
72
73static inline unsigned long s3c6400_get_pll(unsigned long baseclk,
74 u32 pllcon)
75{
76 u32 mdiv, pdiv, sdiv;
77 u64 fvco = baseclk;
78
79 mdiv = (pllcon >> S3C6400_PLL_MDIV_SHIFT) & S3C6400_PLL_MDIV_MASK;
80 pdiv = (pllcon >> S3C6400_PLL_PDIV_SHIFT) & S3C6400_PLL_PDIV_MASK;
81 sdiv = (pllcon >> S3C6400_PLL_SDIV_SHIFT) & S3C6400_PLL_SDIV_MASK;
82
83 fvco *= mdiv;
84 do_div(fvco, (pdiv << sdiv));
85
86 return (unsigned long)fvco;
87}
88
89#define PLL6553X_MDIV_MASK (0x7F)
90#define PLL6553X_PDIV_MASK (0x1F)
91#define PLL6553X_SDIV_MASK (0x3)
92#define PLL6553X_KDIV_MASK (0xFFFF)
93#define PLL6553X_MDIV_SHIFT (16)
94#define PLL6553X_PDIV_SHIFT (8)
95#define PLL6553X_SDIV_SHIFT (0)
96
97static inline unsigned long s3c_get_pll6553x(unsigned long baseclk,
98 u32 pll_con0, u32 pll_con1)
99{
100 unsigned long result;
101 u32 mdiv, pdiv, sdiv, kdiv;
102 u64 tmp;
103
104 mdiv = (pll_con0 >> PLL6553X_MDIV_SHIFT) & PLL6553X_MDIV_MASK;
105 pdiv = (pll_con0 >> PLL6553X_PDIV_SHIFT) & PLL6553X_PDIV_MASK;
106 sdiv = (pll_con0 >> PLL6553X_SDIV_SHIFT) & PLL6553X_SDIV_MASK;
107 kdiv = pll_con1 & PLL6553X_KDIV_MASK;
108
109 /*
110 * We need to multiple baseclk by mdiv (the integer part) and kdiv
111 * which is in 2^16ths, so shift mdiv up (does not overflow) and
112 * add kdiv before multiplying. The use of tmp is to avoid any
113 * overflows before shifting bac down into result when multipling
114 * by the mdiv and kdiv pair.
115 */
116
117 tmp = baseclk;
118 tmp *= (mdiv << 16) + kdiv;
119 do_div(tmp, (pdiv << sdiv));
120 result = tmp >> 16;
121
122 return result;
123}
124
125#define PLL35XX_MDIV_MASK (0x3FF)
126#define PLL35XX_PDIV_MASK (0x3F)
127#define PLL35XX_SDIV_MASK (0x7)
128#define PLL35XX_MDIV_SHIFT (16)
129#define PLL35XX_PDIV_SHIFT (8)
130#define PLL35XX_SDIV_SHIFT (0)
131
132static inline unsigned long s5p_get_pll35xx(unsigned long baseclk, u32 pll_con)
133{
134 u32 mdiv, pdiv, sdiv;
135 u64 fvco = baseclk;
136
137 mdiv = (pll_con >> PLL35XX_MDIV_SHIFT) & PLL35XX_MDIV_MASK;
138 pdiv = (pll_con >> PLL35XX_PDIV_SHIFT) & PLL35XX_PDIV_MASK;
139 sdiv = (pll_con >> PLL35XX_SDIV_SHIFT) & PLL35XX_SDIV_MASK;
140
141 fvco *= mdiv;
142 do_div(fvco, (pdiv << sdiv));
143
144 return (unsigned long)fvco;
145}
146
147#define PLL36XX_KDIV_MASK (0xFFFF)
148#define PLL36XX_MDIV_MASK (0x1FF)
149#define PLL36XX_PDIV_MASK (0x3F)
150#define PLL36XX_SDIV_MASK (0x7)
151#define PLL36XX_MDIV_SHIFT (16)
152#define PLL36XX_PDIV_SHIFT (8)
153#define PLL36XX_SDIV_SHIFT (0)
154
155static inline unsigned long s5p_get_pll36xx(unsigned long baseclk,
156 u32 pll_con0, u32 pll_con1)
157{
158 unsigned long result;
159 u32 mdiv, pdiv, sdiv, kdiv;
160 u64 tmp;
161
162 mdiv = (pll_con0 >> PLL36XX_MDIV_SHIFT) & PLL36XX_MDIV_MASK;
163 pdiv = (pll_con0 >> PLL36XX_PDIV_SHIFT) & PLL36XX_PDIV_MASK;
164 sdiv = (pll_con0 >> PLL36XX_SDIV_SHIFT) & PLL36XX_SDIV_MASK;
165 kdiv = pll_con1 & PLL36XX_KDIV_MASK;
166
167 tmp = baseclk;
168
169 tmp *= (mdiv << 16) + kdiv;
170 do_div(tmp, (pdiv << sdiv));
171 result = tmp >> 16;
172
173 return result;
174}
175
176#define PLL45XX_MDIV_MASK (0x3FF)
177#define PLL45XX_PDIV_MASK (0x3F)
178#define PLL45XX_SDIV_MASK (0x7)
179#define PLL45XX_MDIV_SHIFT (16)
180#define PLL45XX_PDIV_SHIFT (8)
181#define PLL45XX_SDIV_SHIFT (0)
182
183enum pll45xx_type_t {
184 pll_4500,
185 pll_4502,
186 pll_4508
187};
188
189static inline unsigned long s5p_get_pll45xx(unsigned long baseclk, u32 pll_con,
190 enum pll45xx_type_t pll_type)
191{
192 u32 mdiv, pdiv, sdiv;
193 u64 fvco = baseclk;
194
195 mdiv = (pll_con >> PLL45XX_MDIV_SHIFT) & PLL45XX_MDIV_MASK;
196 pdiv = (pll_con >> PLL45XX_PDIV_SHIFT) & PLL45XX_PDIV_MASK;
197 sdiv = (pll_con >> PLL45XX_SDIV_SHIFT) & PLL45XX_SDIV_MASK;
198
199 if (pll_type == pll_4508)
200 sdiv = sdiv - 1;
201
202 fvco *= mdiv;
203 do_div(fvco, (pdiv << sdiv));
204
205 return (unsigned long)fvco;
206}
207
208/* CON0 bit-fields */
209#define PLL46XX_MDIV_MASK (0x1FF)
210#define PLL46XX_PDIV_MASK (0x3F)
211#define PLL46XX_SDIV_MASK (0x7)
212#define PLL46XX_LOCKED_SHIFT (29)
213#define PLL46XX_MDIV_SHIFT (16)
214#define PLL46XX_PDIV_SHIFT (8)
215#define PLL46XX_SDIV_SHIFT (0)
216
217/* CON1 bit-fields */
218#define PLL46XX_MRR_MASK (0x1F)
219#define PLL46XX_MFR_MASK (0x3F)
220#define PLL46XX_KDIV_MASK (0xFFFF)
221#define PLL4650C_KDIV_MASK (0xFFF)
222#define PLL46XX_MRR_SHIFT (24)
223#define PLL46XX_MFR_SHIFT (16)
224#define PLL46XX_KDIV_SHIFT (0)
225
226enum pll46xx_type_t {
227 pll_4600,
228 pll_4650,
229 pll_4650c,
230};
231
232static inline unsigned long s5p_get_pll46xx(unsigned long baseclk,
233 u32 pll_con0, u32 pll_con1,
234 enum pll46xx_type_t pll_type)
235{
236 unsigned long result;
237 u32 mdiv, pdiv, sdiv, kdiv;
238 u64 tmp;
239
240 mdiv = (pll_con0 >> PLL46XX_MDIV_SHIFT) & PLL46XX_MDIV_MASK;
241 pdiv = (pll_con0 >> PLL46XX_PDIV_SHIFT) & PLL46XX_PDIV_MASK;
242 sdiv = (pll_con0 >> PLL46XX_SDIV_SHIFT) & PLL46XX_SDIV_MASK;
243 kdiv = pll_con1 & PLL46XX_KDIV_MASK;
244
245 if (pll_type == pll_4650c)
246 kdiv = pll_con1 & PLL4650C_KDIV_MASK;
247 else
248 kdiv = pll_con1 & PLL46XX_KDIV_MASK;
249
250 tmp = baseclk;
251
252 if (pll_type == pll_4600) {
253 tmp *= (mdiv << 16) + kdiv;
254 do_div(tmp, (pdiv << sdiv));
255 result = tmp >> 16;
256 } else {
257 tmp *= (mdiv << 10) + kdiv;
258 do_div(tmp, (pdiv << sdiv));
259 result = tmp >> 10;
260 }
261
262 return result;
263}
264
265#define PLL90XX_MDIV_MASK (0xFF)
266#define PLL90XX_PDIV_MASK (0x3F)
267#define PLL90XX_SDIV_MASK (0x7)
268#define PLL90XX_KDIV_MASK (0xffff)
269#define PLL90XX_LOCKED_SHIFT (29)
270#define PLL90XX_MDIV_SHIFT (16)
271#define PLL90XX_PDIV_SHIFT (8)
272#define PLL90XX_SDIV_SHIFT (0)
273#define PLL90XX_KDIV_SHIFT (0)
274
275static inline unsigned long s5p_get_pll90xx(unsigned long baseclk,
276 u32 pll_con, u32 pll_conk)
277{
278 unsigned long result;
279 u32 mdiv, pdiv, sdiv, kdiv;
280 u64 tmp;
281
282 mdiv = (pll_con >> PLL90XX_MDIV_SHIFT) & PLL90XX_MDIV_MASK;
283 pdiv = (pll_con >> PLL90XX_PDIV_SHIFT) & PLL90XX_PDIV_MASK;
284 sdiv = (pll_con >> PLL90XX_SDIV_SHIFT) & PLL90XX_SDIV_MASK;
285 kdiv = pll_conk & PLL90XX_KDIV_MASK;
286
287 /*
288 * We need to multiple baseclk by mdiv (the integer part) and kdiv
289 * which is in 2^16ths, so shift mdiv up (does not overflow) and
290 * add kdiv before multiplying. The use of tmp is to avoid any
291 * overflows before shifting bac down into result when multipling
292 * by the mdiv and kdiv pair.
293 */
294
295 tmp = baseclk;
296 tmp *= (mdiv << 16) + kdiv;
297 do_div(tmp, (pdiv << sdiv));
298 result = tmp >> 16;
299
300 return result;
301}
302
303#define PLL65XX_MDIV_MASK (0x3FF)
304#define PLL65XX_PDIV_MASK (0x3F)
305#define PLL65XX_SDIV_MASK (0x7)
306#define PLL65XX_MDIV_SHIFT (16)
307#define PLL65XX_PDIV_SHIFT (8)
308#define PLL65XX_SDIV_SHIFT (0)
309
310static inline unsigned long s5p_get_pll65xx(unsigned long baseclk, u32 pll_con)
311{
312 u32 mdiv, pdiv, sdiv;
313 u64 fvco = baseclk;
314
315 mdiv = (pll_con >> PLL65XX_MDIV_SHIFT) & PLL65XX_MDIV_MASK;
316 pdiv = (pll_con >> PLL65XX_PDIV_SHIFT) & PLL65XX_PDIV_MASK;
317 sdiv = (pll_con >> PLL65XX_SDIV_SHIFT) & PLL65XX_SDIV_MASK;
318
319 fvco *= mdiv;
320 do_div(fvco, (pdiv << sdiv));
321
322 return (unsigned long)fvco;
323}
diff --git a/arch/arm/plat-samsung/include/plat/s5p-clock.h b/arch/arm/plat-samsung/include/plat/s5p-clock.h
deleted file mode 100644
index acacc4b88a39..000000000000
--- a/arch/arm/plat-samsung/include/plat/s5p-clock.h
+++ /dev/null
@@ -1,65 +0,0 @@
1/* linux/arch/arm/plat-samsung/include/plat/s5p-clock.h
2 *
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Header file for s5p clock support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_PLAT_S5P_CLOCK_H
14#define __ASM_PLAT_S5P_CLOCK_H __FILE__
15
16#include <linux/clk.h>
17
18#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
19
20#define clk_fin_apll clk_ext_xtal_mux
21#define clk_fin_bpll clk_ext_xtal_mux
22#define clk_fin_cpll clk_ext_xtal_mux
23#define clk_fin_mpll clk_ext_xtal_mux
24#define clk_fin_epll clk_ext_xtal_mux
25#define clk_fin_dpll clk_ext_xtal_mux
26#define clk_fin_vpll clk_ext_xtal_mux
27#define clk_fin_hpll clk_ext_xtal_mux
28
29extern struct clk clk_ext_xtal_mux;
30extern struct clk clk_xusbxti;
31extern struct clk clk_48m;
32extern struct clk s5p_clk_27m;
33extern struct clk clk_fout_apll;
34extern struct clk clk_fout_bpll;
35extern struct clk clk_fout_bpll_div2;
36extern struct clk clk_fout_cpll;
37extern struct clk clk_fout_mpll;
38extern struct clk clk_fout_mpll_div2;
39extern struct clk clk_fout_epll;
40extern struct clk clk_fout_dpll;
41extern struct clk clk_fout_vpll;
42extern struct clk clk_arm;
43extern struct clk clk_vpll;
44
45extern struct clksrc_sources clk_src_apll;
46extern struct clksrc_sources clk_src_bpll;
47extern struct clksrc_sources clk_src_bpll_fout;
48extern struct clksrc_sources clk_src_cpll;
49extern struct clksrc_sources clk_src_mpll;
50extern struct clksrc_sources clk_src_mpll_fout;
51extern struct clksrc_sources clk_src_epll;
52extern struct clksrc_sources clk_src_dpll;
53
54extern int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable);
55
56/* Common EPLL operations for S5P platform */
57extern int s5p_epll_enable(struct clk *clk, int enable);
58extern unsigned long s5p_epll_get_rate(struct clk *clk);
59
60/* SPDIF clk operations common for S5PV210/C110 and Exynos4 */
61extern int s5p_spdif_set_rate(struct clk *clk, unsigned long rate);
62extern unsigned long s5p_spdif_get_rate(struct clk *clk);
63
64extern struct clk_ops s5p_sclk_spdif_ops;
65#endif /* __ASM_PLAT_S5P_CLOCK_H */
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h
index f84b6cbc8745..2787553c3ae2 100644
--- a/arch/arm/plat-samsung/include/plat/sdhci.h
+++ b/arch/arm/plat-samsung/include/plat/sdhci.h
@@ -57,14 +57,6 @@ extern void s3c2416_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
57extern void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *, int w); 57extern void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
58extern void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *, int w); 58extern void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
59extern void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *, int w); 59extern void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
60extern void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
61extern void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
62extern void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
63extern void s5pv210_setup_sdhci3_cfg_gpio(struct platform_device *, int w);
64extern void exynos4_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
65extern void exynos4_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
66extern void exynos4_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
67extern void exynos4_setup_sdhci3_cfg_gpio(struct platform_device *, int w);
68 60
69/* S3C2416 SDHCI setup */ 61/* S3C2416 SDHCI setup */
70 62
@@ -144,45 +136,6 @@ static inline void s3c6400_default_sdhci2(void) { }
144 136
145#endif /* CONFIG_S3C64XX_SETUP_SDHCI */ 137#endif /* CONFIG_S3C64XX_SETUP_SDHCI */
146 138
147/* S5PV210 SDHCI setup */
148
149#ifdef CONFIG_S5PV210_SETUP_SDHCI
150static inline void s5pv210_default_sdhci0(void)
151{
152#ifdef CONFIG_S3C_DEV_HSMMC
153 s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio;
154#endif
155}
156
157static inline void s5pv210_default_sdhci1(void)
158{
159#ifdef CONFIG_S3C_DEV_HSMMC1
160 s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio;
161#endif
162}
163
164static inline void s5pv210_default_sdhci2(void)
165{
166#ifdef CONFIG_S3C_DEV_HSMMC2
167 s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio;
168#endif
169}
170
171static inline void s5pv210_default_sdhci3(void)
172{
173#ifdef CONFIG_S3C_DEV_HSMMC3
174 s3c_hsmmc3_def_platdata.cfg_gpio = s5pv210_setup_sdhci3_cfg_gpio;
175#endif
176}
177
178#else
179static inline void s5pv210_default_sdhci0(void) { }
180static inline void s5pv210_default_sdhci1(void) { }
181static inline void s5pv210_default_sdhci2(void) { }
182static inline void s5pv210_default_sdhci3(void) { }
183
184#endif /* CONFIG_S5PV210_SETUP_SDHCI */
185
186static inline void s3c_sdhci_setname(int id, char *name) 139static inline void s3c_sdhci_setname(int id, char *name)
187{ 140{
188 switch (id) { 141 switch (id) {
diff --git a/arch/arm/plat-samsung/include/plat/tv-core.h b/arch/arm/plat-samsung/include/plat/tv-core.h
deleted file mode 100644
index 3bc34f3ce28f..000000000000
--- a/arch/arm/plat-samsung/include/plat/tv-core.h
+++ /dev/null
@@ -1,44 +0,0 @@
1/*
2 * arch/arm/plat-samsung/include/plat/tv.h
3 *
4 * Copyright 2011 Samsung Electronics Co., Ltd.
5 * Tomasz Stanislawski <t.stanislaws@samsung.com>
6 *
7 * Samsung TV driver core functions
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#ifndef __SAMSUNG_PLAT_TV_H
15#define __SAMSUNG_PLAT_TV_H __FILE__
16
17/*
18 * These functions are only for use with the core support code, such as
19 * the CPU-specific initialization code.
20 */
21
22/* Re-define device name to differentiate the subsystem in various SoCs. */
23static inline void s5p_hdmi_setname(char *name)
24{
25#ifdef CONFIG_S5P_DEV_TV
26 s5p_device_hdmi.name = name;
27#endif
28}
29
30static inline void s5p_mixer_setname(char *name)
31{
32#ifdef CONFIG_S5P_DEV_TV
33 s5p_device_mixer.name = name;
34#endif
35}
36
37static inline void s5p_sdo_setname(char *name)
38{
39#ifdef CONFIG_S5P_DEV_TV
40 s5p_device_sdo.name = name;
41#endif
42}
43
44#endif /* __SAMSUNG_PLAT_TV_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-22 13:48:13 -0500