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Diffstat (limited to 'arch/arm/plat-samsung/include/plat/gpio-cfg.h')
-rw-r--r--arch/arm/plat-samsung/include/plat/gpio-cfg.h64
1 files changed, 0 insertions, 64 deletions
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
index 08740eed050c..b5294eff18b5 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
@@ -27,7 +27,6 @@
27#include <linux/types.h> 27#include <linux/types.h>
28 28
29typedef unsigned int __bitwise__ samsung_gpio_pull_t; 29typedef unsigned int __bitwise__ samsung_gpio_pull_t;
30typedef unsigned int __bitwise__ s5p_gpio_drvstr_t;
31 30
32/* forward declaration if gpio-core.h hasn't been included */ 31/* forward declaration if gpio-core.h hasn't been included */
33struct samsung_gpio_chip; 32struct samsung_gpio_chip;
@@ -180,67 +179,4 @@ static inline int s3c_gpio_cfgrange_nopull(unsigned int pin, unsigned int size,
180 return s3c_gpio_cfgall_range(pin, size, cfg, S3C_GPIO_PULL_NONE); 179 return s3c_gpio_cfgall_range(pin, size, cfg, S3C_GPIO_PULL_NONE);
181} 180}
182 181
183/* Define values for the drvstr available for each gpio pin.
184 *
185 * These values control the value of the output signal driver strength,
186 * configurable on most pins on the S5P series.
187 */
188#define S5P_GPIO_DRVSTR_LV1 ((__force s5p_gpio_drvstr_t)0x0)
189#define S5P_GPIO_DRVSTR_LV2 ((__force s5p_gpio_drvstr_t)0x2)
190#define S5P_GPIO_DRVSTR_LV3 ((__force s5p_gpio_drvstr_t)0x1)
191#define S5P_GPIO_DRVSTR_LV4 ((__force s5p_gpio_drvstr_t)0x3)
192
193/**
194 * s5c_gpio_get_drvstr() - get the driver streght value of a gpio pin
195 * @pin: The pin number to get the settings for
196 *
197 * Read the driver streght value for the specified pin.
198*/
199extern s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin);
200
201/**
202 * s3c_gpio_set_drvstr() - set the driver streght value of a gpio pin
203 * @pin: The pin number to configure the driver streght value
204 * @drvstr: The new value of the driver strength
205 *
206 * This function sets the driver strength value for the specified pin.
207 * It will return 0 if successful, or a negative error code if the pin
208 * cannot support the requested setting.
209*/
210extern int s5p_gpio_set_drvstr(unsigned int pin, s5p_gpio_drvstr_t drvstr);
211
212/**
213 * s5p_register_gpio_interrupt() - register interrupt support for a gpio group
214 * @pin: The pin number from the group to be registered
215 *
216 * This function registers gpio interrupt support for the group that the
217 * specified pin belongs to.
218 *
219 * The total number of gpio pins is quite large ob s5p series. Registering
220 * irq support for all of them would be a resource waste. Because of that the
221 * interrupt support for standard gpio pins is registered dynamically.
222 *
223 * It will return the irq number of the interrupt that has been registered
224 * or -ENOMEM if no more gpio interrupts can be registered. It is allowed
225 * to call this function more than once for the same gpio group (the group
226 * will be registered only once).
227 */
228extern int s5p_register_gpio_interrupt(int pin);
229
230/** s5p_register_gpioint_bank() - add gpio bank for further gpio interrupt
231 * registration (see s5p_register_gpio_interrupt function)
232 * @chain_irq: chained irq number for the gpio int handler for this bank
233 * @start: start gpio group number of this bank
234 * @nr_groups: number of gpio groups handled by this bank
235 *
236 * This functions registers initial information about gpio banks that
237 * can be later used by the s5p_register_gpio_interrupt() function to
238 * enable support for gpio interrupt for particular gpio group.
239 */
240#ifdef CONFIG_S5P_GPIO_INT
241extern int s5p_register_gpioint_bank(int chain_irq, int start, int nr_groups);
242#else
243#define s5p_register_gpioint_bank(chain_irq, start, nr_groups) do { } while (0)
244#endif
245
246#endif /* __PLAT_GPIO_CFG_H */ 182#endif /* __PLAT_GPIO_CFG_H */