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authorLinus Torvalds <torvalds@linux-foundation.org>2013-11-11 02:49:45 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2013-11-11 02:49:45 -0500
commitaac59e3efce3dca787b11e34726001603ce3d161 (patch)
tree855d3f967b102877a179e23382be3c2c7fc8d66c /arch/arm/mach-integrator/include/mach/irqs.h
parent21604cdcdcf9ea8c16b1656f78e2eff097244d66 (diff)
parent005ff5fb077ebf93882bd643932f932a9b402529 (diff)
Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform changes from Olof Johansson: "New and updated SoC support. Among the things new for this release are: - More support for the AM33xx platforms from TI - Tegra 124 support, and some updates to older tegra families as well - imx cleanups and updates across the board - A rename of Broadcom's Mobile platforms which were introduced as ARCH_BCM, and turned out to be too broad a name. New name is ARCH_BCM_MOBILE. - A whole bunch of updates and fixes for integrator, making the platform code more modern and switches over to DT-only booting. - Support for two new Renesas shmobile chipsets. Next up for them is more work on consolidation instead of introduction of new non-multiplatform SoCs, we're all looking forward to that! - Misc cleanups for older Samsung platforms, some Allwinner updates, etc" * tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (159 commits) ARM: bcm281xx: Add ARCH_BCM_MOBILE to bcm config ARM: bcm_defconfig: Run "make savedefconfig" ARM: bcm281xx: Add ARCH Timers to config rename ARCH_BCM to ARCH_BCM_MOBILE (mach-bcm) ARM: vexpress: Enable platform-specific options in defconfig ARM: vexpress: Make defconfig work again ARM: sunxi: remove .init_time hooks ARM: imx: enable suspend for imx6sl ARM: imx: ensure dsm_request signal is not asserted when setting LPM ARM: imx6q: call WB and RBC configuration from imx6q_pm_enter() ARM: imx6q: move low-power code out of clock driver ARM: imx: drop extern with function prototypes in common.h ARM: imx: reset core along with enable/disable operation ARM: imx: do not return from imx_cpu_die() call ARM: imx_v6_v7_defconfig: Select CONFIG_PROVE_LOCKING ARM: imx_v6_v7_defconfig: Enable LEDS_GPIO related options ARM: mxs_defconfig: Turn off CONFIG_DEBUG_GPIO ARM: imx: replace imx6q_restart() with mxc_restart() ARM: mach-imx: mm-imx5: Retrieve iomuxc base address from dt ARM: mach-imx: mm-imx5: Retrieve tzic base address from dt ...
Diffstat (limited to 'arch/arm/mach-integrator/include/mach/irqs.h')
-rw-r--r--arch/arm/mach-integrator/include/mach/irqs.h81
1 files changed, 0 insertions, 81 deletions
diff --git a/arch/arm/mach-integrator/include/mach/irqs.h b/arch/arm/mach-integrator/include/mach/irqs.h
deleted file mode 100644
index eff0adad9ae3..000000000000
--- a/arch/arm/mach-integrator/include/mach/irqs.h
+++ /dev/null
@@ -1,81 +0,0 @@
1/*
2 * arch/arm/mach-integrator/include/mach/irqs.h
3 *
4 * Copyright (C) 1999 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22/*
23 * Interrupt numbers, all of the above are just static reservations
24 * used so they can be encoded into device resources. They will finally
25 * be done away with when switching to device tree.
26 */
27#define IRQ_PIC_START 64
28#define IRQ_SOFTINT (IRQ_PIC_START+0)
29#define IRQ_UARTINT0 (IRQ_PIC_START+1)
30#define IRQ_UARTINT1 (IRQ_PIC_START+2)
31#define IRQ_KMIINT0 (IRQ_PIC_START+3)
32#define IRQ_KMIINT1 (IRQ_PIC_START+4)
33#define IRQ_TIMERINT0 (IRQ_PIC_START+5)
34#define IRQ_TIMERINT1 (IRQ_PIC_START+6)
35#define IRQ_TIMERINT2 (IRQ_PIC_START+7)
36#define IRQ_RTCINT (IRQ_PIC_START+8)
37#define IRQ_AP_EXPINT0 (IRQ_PIC_START+9)
38#define IRQ_AP_EXPINT1 (IRQ_PIC_START+10)
39#define IRQ_AP_EXPINT2 (IRQ_PIC_START+11)
40#define IRQ_AP_EXPINT3 (IRQ_PIC_START+12)
41#define IRQ_AP_PCIINT0 (IRQ_PIC_START+13)
42#define IRQ_AP_PCIINT1 (IRQ_PIC_START+14)
43#define IRQ_AP_PCIINT2 (IRQ_PIC_START+15)
44#define IRQ_AP_PCIINT3 (IRQ_PIC_START+16)
45#define IRQ_AP_V3INT (IRQ_PIC_START+17)
46#define IRQ_AP_CPINT0 (IRQ_PIC_START+18)
47#define IRQ_AP_CPINT1 (IRQ_PIC_START+19)
48#define IRQ_AP_LBUSTIMEOUT (IRQ_PIC_START+20)
49#define IRQ_AP_APCINT (IRQ_PIC_START+21)
50#define IRQ_CP_CLCDCINT (IRQ_PIC_START+22)
51#define IRQ_CP_MMCIINT0 (IRQ_PIC_START+23)
52#define IRQ_CP_MMCIINT1 (IRQ_PIC_START+24)
53#define IRQ_CP_AACIINT (IRQ_PIC_START+25)
54#define IRQ_CP_CPPLDINT (IRQ_PIC_START+26)
55#define IRQ_CP_ETHINT (IRQ_PIC_START+27)
56#define IRQ_CP_TSPENINT (IRQ_PIC_START+28)
57#define IRQ_PIC_END (IRQ_PIC_START+28)
58
59#define IRQ_CIC_START (IRQ_PIC_END+1)
60#define IRQ_CM_SOFTINT (IRQ_CIC_START+0)
61#define IRQ_CM_COMMRX (IRQ_CIC_START+1)
62#define IRQ_CM_COMMTX (IRQ_CIC_START+2)
63#define IRQ_CIC_END (IRQ_CIC_START+2)
64
65/*
66 * IntegratorCP only
67 */
68#define IRQ_SIC_START (IRQ_CIC_END+1)
69#define IRQ_SIC_CP_SOFTINT (IRQ_SIC_START+0)
70#define IRQ_SIC_CP_RI0 (IRQ_SIC_START+1)
71#define IRQ_SIC_CP_RI1 (IRQ_SIC_START+2)
72#define IRQ_SIC_CP_CARDIN (IRQ_SIC_START+3)
73#define IRQ_SIC_CP_LMINT0 (IRQ_SIC_START+4)
74#define IRQ_SIC_CP_LMINT1 (IRQ_SIC_START+5)
75#define IRQ_SIC_CP_LMINT2 (IRQ_SIC_START+6)
76#define IRQ_SIC_CP_LMINT3 (IRQ_SIC_START+7)
77#define IRQ_SIC_CP_LMINT4 (IRQ_SIC_START+8)
78#define IRQ_SIC_CP_LMINT5 (IRQ_SIC_START+9)
79#define IRQ_SIC_CP_LMINT6 (IRQ_SIC_START+10)
80#define IRQ_SIC_CP_LMINT7 (IRQ_SIC_START+11)
81#define IRQ_SIC_END (IRQ_SIC_START+11)