Merge branch 'picoxcell/timer' into next/timer

Imported from mailing list

* picoxcell/timer:
  clocksource: dw_apb_timer: Add common DTS glue for dw_apb_timer

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

1 files changed, 8 insertions, 1 deletions

diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c
index 920a8cc42726..c6422fb10bae 100644
--- a/arch/arm/mach-imx/clk-imx35.c
+++ b/arch/arm/mach-imx/clk-imx35.c
@@ -201,7 +201,6 @@ int __init mx35_clocks_init()
                         pr_err("i.MX35 clk %d: register failed with %ld\n",
                                 i, PTR_ERR(clk[i]));
 
-
         clk_register_clkdev(clk[pata_gate], NULL, "pata_imx");
         clk_register_clkdev(clk[can1_gate], NULL, "flexcan.0");
         clk_register_clkdev(clk[can2_gate], NULL, "flexcan.1");
@@ -264,6 +263,14 @@ int __init mx35_clocks_init()
         clk_prepare_enable(clk[iim_gate]);
         clk_prepare_enable(clk[emi_gate]);
 
+        /*
+         * SCC is needed to boot via mmc after a watchdog reset. The clock code
+         * before conversion to common clk also enabled UART1 (which isn't
+         * handled here and not needed for mmc) and IIM (which is enabled
+         * unconditionally above).
+         */
+        clk_prepare_enable(clk[scc_gate]);
+
         imx_print_silicon_rev("i.MX35", mx35_revision());
 
 #ifdef CONFIG_MXC_USE_EPIT