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authorArnd Bergmann <arnd@arndb.de>2012-07-12 11:27:36 -0400
committerArnd Bergmann <arnd@arndb.de>2012-07-12 11:27:36 -0400
commit35bf8cc74b2b1dfad18df6d330b271e68ab6e3f5 (patch)
treeadf37371beb73adbb0d2414a52d86580dd37d2e0 /arch/arm
parent5351da96bd6662d28c41a3e9e652019a11f3cf7c (diff)
parentcfda590178a16e2b5edb09e131460b3e64819807 (diff)
Merge branch 'picoxcell/timer' into next/timer
Imported from mailing list * picoxcell/timer: clocksource: dw_apb_timer: Add common DTS glue for dw_apb_timer Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Kconfig1
-rw-r--r--arch/arm/include/asm/atomic.h2
-rw-r--r--arch/arm/include/asm/domain.h18
-rw-r--r--arch/arm/include/asm/thread_info.h5
-rw-r--r--arch/arm/kernel/kprobes-test-arm.c4
-rw-r--r--arch/arm/kernel/perf_event.c2
-rw-r--r--arch/arm/kernel/ptrace.c3
-rw-r--r--arch/arm/kernel/signal.c46
-rw-r--r--arch/arm/kernel/signal.h2
-rw-r--r--arch/arm/kernel/traps.c2
-rw-r--r--arch/arm/kernel/vmlinux.lds.S2
-rw-r--r--arch/arm/mach-dove/include/mach/bridge-regs.h1
-rw-r--r--arch/arm/mach-dove/include/mach/dove.h1
-rw-r--r--arch/arm/mach-imx/clk-imx35.c9
-rw-r--r--arch/arm/mach-imx/mach-imx27_visstrim_m10.c2
-rw-r--r--arch/arm/mach-mmp/include/mach/gpio-pxa.h29
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/bridge-regs.h1
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/mv78xx0.h2
-rw-r--r--arch/arm/mach-mxs/mach-apx4devkit.c11
-rw-r--r--arch/arm/mach-omap2/board-overo.c2
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c28
-rw-r--r--arch/arm/mach-omap2/twl-common.c2
-rw-r--r--arch/arm/mach-picoxcell/Makefile1
-rw-r--r--arch/arm/mach-picoxcell/common.c3
-rw-r--r--arch/arm/mach-picoxcell/common.h2
-rw-r--r--arch/arm/mach-picoxcell/time.c121
-rw-r--r--arch/arm/mach-pxa/hx4700.c15
-rw-r--r--arch/arm/mach-versatile/pci.c1
-rw-r--r--arch/arm/mm/mm.h2
-rw-r--r--arch/arm/mm/mmu.c74
30 files changed, 195 insertions, 199 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a91009c61870..57eb6ef7f48d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -658,6 +658,7 @@ config ARCH_PICOXCELL
658 select ARM_VIC 658 select ARM_VIC
659 select CPU_V6K 659 select CPU_V6K
660 select DW_APB_TIMER 660 select DW_APB_TIMER
661 select DW_APB_TIMER_OF
661 select GENERIC_CLOCKEVENTS 662 select GENERIC_CLOCKEVENTS
662 select GENERIC_GPIO 663 select GENERIC_GPIO
663 select HAVE_TCM 664 select HAVE_TCM
diff --git a/arch/arm/include/asm/atomic.h b/arch/arm/include/asm/atomic.h
index 68374ba6a943..c79f61faa3a5 100644
--- a/arch/arm/include/asm/atomic.h
+++ b/arch/arm/include/asm/atomic.h
@@ -243,7 +243,7 @@ typedef struct {
243 243
244#define ATOMIC64_INIT(i) { (i) } 244#define ATOMIC64_INIT(i) { (i) }
245 245
246static inline u64 atomic64_read(atomic64_t *v) 246static inline u64 atomic64_read(const atomic64_t *v)
247{ 247{
248 u64 result; 248 u64 result;
249 249
diff --git a/arch/arm/include/asm/domain.h b/arch/arm/include/asm/domain.h
index 3d2220498abc..6ddbe446425e 100644
--- a/arch/arm/include/asm/domain.h
+++ b/arch/arm/include/asm/domain.h
@@ -60,13 +60,13 @@
60#ifndef __ASSEMBLY__ 60#ifndef __ASSEMBLY__
61 61
62#ifdef CONFIG_CPU_USE_DOMAINS 62#ifdef CONFIG_CPU_USE_DOMAINS
63#define set_domain(x) \ 63static inline void set_domain(unsigned val)
64 do { \ 64{
65 __asm__ __volatile__( \ 65 asm volatile(
66 "mcr p15, 0, %0, c3, c0 @ set domain" \ 66 "mcr p15, 0, %0, c3, c0 @ set domain"
67 : : "r" (x)); \ 67 : : "r" (val));
68 isb(); \ 68 isb();
69 } while (0) 69}
70 70
71#define modify_domain(dom,type) \ 71#define modify_domain(dom,type) \
72 do { \ 72 do { \
@@ -78,8 +78,8 @@
78 } while (0) 78 } while (0)
79 79
80#else 80#else
81#define set_domain(x) do { } while (0) 81static inline void set_domain(unsigned val) { }
82#define modify_domain(dom,type) do { } while (0) 82static inline void modify_domain(unsigned dom, unsigned type) { }
83#endif 83#endif
84 84
85/* 85/*
diff --git a/arch/arm/include/asm/thread_info.h b/arch/arm/include/asm/thread_info.h
index b79f8e97f775..af7b0bda3355 100644
--- a/arch/arm/include/asm/thread_info.h
+++ b/arch/arm/include/asm/thread_info.h
@@ -148,7 +148,6 @@ extern int vfp_restore_user_hwstate(struct user_vfp __user *,
148#define TIF_NOTIFY_RESUME 2 /* callback before returning to user */ 148#define TIF_NOTIFY_RESUME 2 /* callback before returning to user */
149#define TIF_SYSCALL_TRACE 8 149#define TIF_SYSCALL_TRACE 8
150#define TIF_SYSCALL_AUDIT 9 150#define TIF_SYSCALL_AUDIT 9
151#define TIF_SYSCALL_RESTARTSYS 10
152#define TIF_POLLING_NRFLAG 16 151#define TIF_POLLING_NRFLAG 16
153#define TIF_USING_IWMMXT 17 152#define TIF_USING_IWMMXT 17
154#define TIF_MEMDIE 18 /* is terminating due to OOM killer */ 153#define TIF_MEMDIE 18 /* is terminating due to OOM killer */
@@ -164,11 +163,9 @@ extern int vfp_restore_user_hwstate(struct user_vfp __user *,
164#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG) 163#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG)
165#define _TIF_USING_IWMMXT (1 << TIF_USING_IWMMXT) 164#define _TIF_USING_IWMMXT (1 << TIF_USING_IWMMXT)
166#define _TIF_SECCOMP (1 << TIF_SECCOMP) 165#define _TIF_SECCOMP (1 << TIF_SECCOMP)
167#define _TIF_SYSCALL_RESTARTSYS (1 << TIF_SYSCALL_RESTARTSYS)
168 166
169/* Checks for any syscall work in entry-common.S */ 167/* Checks for any syscall work in entry-common.S */
170#define _TIF_SYSCALL_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \ 168#define _TIF_SYSCALL_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT)
171 _TIF_SYSCALL_RESTARTSYS)
172 169
173/* 170/*
174 * Change these and you break ASM code in entry-common.S 171 * Change these and you break ASM code in entry-common.S
diff --git a/arch/arm/kernel/kprobes-test-arm.c b/arch/arm/kernel/kprobes-test-arm.c
index ba32b393b3f0..38c1a3b103a0 100644
--- a/arch/arm/kernel/kprobes-test-arm.c
+++ b/arch/arm/kernel/kprobes-test-arm.c
@@ -187,8 +187,8 @@ void kprobe_arm_test_cases(void)
187 TEST_BF_R ("mov pc, r",0,2f,"") 187 TEST_BF_R ("mov pc, r",0,2f,"")
188 TEST_BF_RR("mov pc, r",0,2f,", asl r",1,0,"") 188 TEST_BF_RR("mov pc, r",0,2f,", asl r",1,0,"")
189 TEST_BB( "sub pc, pc, #1b-2b+8") 189 TEST_BB( "sub pc, pc, #1b-2b+8")
190#if __LINUX_ARM_ARCH__ >= 6 190#if __LINUX_ARM_ARCH__ == 6 && !defined(CONFIG_CPU_V7)
191 TEST_BB( "sub pc, pc, #1b-2b+8-2") /* UNPREDICTABLE before ARMv6 */ 191 TEST_BB( "sub pc, pc, #1b-2b+8-2") /* UNPREDICTABLE before and after ARMv6 */
192#endif 192#endif
193 TEST_BB_R( "sub pc, pc, r",14, 1f-2f+8,"") 193 TEST_BB_R( "sub pc, pc, r",14, 1f-2f+8,"")
194 TEST_BB_R( "rsb pc, r",14,1f-2f+8,", pc") 194 TEST_BB_R( "rsb pc, r",14,1f-2f+8,", pc")
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 186c8cb982c5..a02eada3aa5d 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -503,7 +503,7 @@ __hw_perf_event_init(struct perf_event *event)
503 event_requires_mode_exclusion(&event->attr)) { 503 event_requires_mode_exclusion(&event->attr)) {
504 pr_debug("ARM performance counters do not support " 504 pr_debug("ARM performance counters do not support "
505 "mode exclusion\n"); 505 "mode exclusion\n");
506 return -EPERM; 506 return -EOPNOTSUPP;
507 } 507 }
508 508
509 /* 509 /*
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index 5700a7ae7f0b..14e38261cd31 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -25,7 +25,6 @@
25#include <linux/regset.h> 25#include <linux/regset.h>
26#include <linux/audit.h> 26#include <linux/audit.h>
27#include <linux/tracehook.h> 27#include <linux/tracehook.h>
28#include <linux/unistd.h>
29 28
30#include <asm/pgtable.h> 29#include <asm/pgtable.h>
31#include <asm/traps.h> 30#include <asm/traps.h>
@@ -918,8 +917,6 @@ asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno)
918 audit_syscall_entry(AUDIT_ARCH_ARM, scno, regs->ARM_r0, 917 audit_syscall_entry(AUDIT_ARCH_ARM, scno, regs->ARM_r0,
919 regs->ARM_r1, regs->ARM_r2, regs->ARM_r3); 918 regs->ARM_r1, regs->ARM_r2, regs->ARM_r3);
920 919
921 if (why == 0 && test_and_clear_thread_flag(TIF_SYSCALL_RESTARTSYS))
922 scno = __NR_restart_syscall - __NR_SYSCALL_BASE;
923 if (!test_thread_flag(TIF_SYSCALL_TRACE)) 920 if (!test_thread_flag(TIF_SYSCALL_TRACE))
924 return scno; 921 return scno;
925 922
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c
index fd2392a17ac1..536c5d6b340b 100644
--- a/arch/arm/kernel/signal.c
+++ b/arch/arm/kernel/signal.c
@@ -27,6 +27,7 @@
27 */ 27 */
28#define SWI_SYS_SIGRETURN (0xef000000|(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE)) 28#define SWI_SYS_SIGRETURN (0xef000000|(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE))
29#define SWI_SYS_RT_SIGRETURN (0xef000000|(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE)) 29#define SWI_SYS_RT_SIGRETURN (0xef000000|(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE))
30#define SWI_SYS_RESTART (0xef000000|__NR_restart_syscall|__NR_OABI_SYSCALL_BASE)
30 31
31/* 32/*
32 * With EABI, the syscall number has to be loaded into r7. 33 * With EABI, the syscall number has to be loaded into r7.
@@ -47,6 +48,18 @@ const unsigned long sigreturn_codes[7] = {
47}; 48};
48 49
49/* 50/*
51 * Either we support OABI only, or we have EABI with the OABI
52 * compat layer enabled. In the later case we don't know if
53 * user space is EABI or not, and if not we must not clobber r7.
54 * Always using the OABI syscall solves that issue and works for
55 * all those cases.
56 */
57const unsigned long syscall_restart_code[2] = {
58 SWI_SYS_RESTART, /* swi __NR_restart_syscall */
59 0xe49df004, /* ldr pc, [sp], #4 */
60};
61
62/*
50 * atomically swap in the new signal mask, and wait for a signal. 63 * atomically swap in the new signal mask, and wait for a signal.
51 */ 64 */
52asmlinkage int sys_sigsuspend(int restart, unsigned long oldmask, old_sigset_t mask) 65asmlinkage int sys_sigsuspend(int restart, unsigned long oldmask, old_sigset_t mask)
@@ -592,10 +605,12 @@ static void do_signal(struct pt_regs *regs, int syscall)
592 case -ERESTARTNOHAND: 605 case -ERESTARTNOHAND:
593 case -ERESTARTSYS: 606 case -ERESTARTSYS:
594 case -ERESTARTNOINTR: 607 case -ERESTARTNOINTR:
595 case -ERESTART_RESTARTBLOCK:
596 regs->ARM_r0 = regs->ARM_ORIG_r0; 608 regs->ARM_r0 = regs->ARM_ORIG_r0;
597 regs->ARM_pc = restart_addr; 609 regs->ARM_pc = restart_addr;
598 break; 610 break;
611 case -ERESTART_RESTARTBLOCK:
612 regs->ARM_r0 = -EINTR;
613 break;
599 } 614 }
600 } 615 }
601 616
@@ -611,14 +626,12 @@ static void do_signal(struct pt_regs *regs, int syscall)
611 * debugger has chosen to restart at a different PC. 626 * debugger has chosen to restart at a different PC.
612 */ 627 */
613 if (regs->ARM_pc == restart_addr) { 628 if (regs->ARM_pc == restart_addr) {
614 if (retval == -ERESTARTNOHAND || 629 if (retval == -ERESTARTNOHAND
615 retval == -ERESTART_RESTARTBLOCK
616 || (retval == -ERESTARTSYS 630 || (retval == -ERESTARTSYS
617 && !(ka.sa.sa_flags & SA_RESTART))) { 631 && !(ka.sa.sa_flags & SA_RESTART))) {
618 regs->ARM_r0 = -EINTR; 632 regs->ARM_r0 = -EINTR;
619 regs->ARM_pc = continue_addr; 633 regs->ARM_pc = continue_addr;
620 } 634 }
621 clear_thread_flag(TIF_SYSCALL_RESTARTSYS);
622 } 635 }
623 636
624 handle_signal(signr, &ka, &info, regs); 637 handle_signal(signr, &ka, &info, regs);
@@ -632,8 +645,29 @@ static void do_signal(struct pt_regs *regs, int syscall)
632 * ignore the restart. 645 * ignore the restart.
633 */ 646 */
634 if (retval == -ERESTART_RESTARTBLOCK 647 if (retval == -ERESTART_RESTARTBLOCK
635 && regs->ARM_pc == restart_addr) 648 && regs->ARM_pc == continue_addr) {
636 set_thread_flag(TIF_SYSCALL_RESTARTSYS); 649 if (thumb_mode(regs)) {
650 regs->ARM_r7 = __NR_restart_syscall - __NR_SYSCALL_BASE;
651 regs->ARM_pc -= 2;
652 } else {
653#if defined(CONFIG_AEABI) && !defined(CONFIG_OABI_COMPAT)
654 regs->ARM_r7 = __NR_restart_syscall;
655 regs->ARM_pc -= 4;
656#else
657 u32 __user *usp;
658
659 regs->ARM_sp -= 4;
660 usp = (u32 __user *)regs->ARM_sp;
661
662 if (put_user(regs->ARM_pc, usp) == 0) {
663 regs->ARM_pc = KERN_RESTART_CODE;
664 } else {
665 regs->ARM_sp += 4;
666 force_sigsegv(0, current);
667 }
668#endif
669 }
670 }
637 } 671 }
638 672
639 restore_saved_sigmask(); 673 restore_saved_sigmask();
diff --git a/arch/arm/kernel/signal.h b/arch/arm/kernel/signal.h
index 5ff067b7c752..6fcfe8398aa4 100644
--- a/arch/arm/kernel/signal.h
+++ b/arch/arm/kernel/signal.h
@@ -8,5 +8,7 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10#define KERN_SIGRETURN_CODE (CONFIG_VECTORS_BASE + 0x00000500) 10#define KERN_SIGRETURN_CODE (CONFIG_VECTORS_BASE + 0x00000500)
11#define KERN_RESTART_CODE (KERN_SIGRETURN_CODE + sizeof(sigreturn_codes))
11 12
12extern const unsigned long sigreturn_codes[7]; 13extern const unsigned long sigreturn_codes[7];
14extern const unsigned long syscall_restart_code[2];
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index 4928d89758f4..3647170e9a16 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -820,6 +820,8 @@ void __init early_trap_init(void *vectors_base)
820 */ 820 */
821 memcpy((void *)(vectors + KERN_SIGRETURN_CODE - CONFIG_VECTORS_BASE), 821 memcpy((void *)(vectors + KERN_SIGRETURN_CODE - CONFIG_VECTORS_BASE),
822 sigreturn_codes, sizeof(sigreturn_codes)); 822 sigreturn_codes, sizeof(sigreturn_codes));
823 memcpy((void *)(vectors + KERN_RESTART_CODE - CONFIG_VECTORS_BASE),
824 syscall_restart_code, sizeof(syscall_restart_code));
823 825
824 flush_icache_range(vectors, vectors + PAGE_SIZE); 826 flush_icache_range(vectors, vectors + PAGE_SIZE);
825 modify_domain(DOMAIN_USER, DOMAIN_CLIENT); 827 modify_domain(DOMAIN_USER, DOMAIN_CLIENT);
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index 43a31fb06318..36ff15bbfdd4 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -183,7 +183,9 @@ SECTIONS
183 } 183 }
184#endif 184#endif
185 185
186#ifdef CONFIG_SMP
186 PERCPU_SECTION(L1_CACHE_BYTES) 187 PERCPU_SECTION(L1_CACHE_BYTES)
188#endif
187 189
188#ifdef CONFIG_XIP_KERNEL 190#ifdef CONFIG_XIP_KERNEL
189 __data_loc = ALIGN(4); /* location in binary */ 191 __data_loc = ALIGN(4); /* location in binary */
diff --git a/arch/arm/mach-dove/include/mach/bridge-regs.h b/arch/arm/mach-dove/include/mach/bridge-regs.h
index 226949dc4ac0..f953bb54aa9d 100644
--- a/arch/arm/mach-dove/include/mach/bridge-regs.h
+++ b/arch/arm/mach-dove/include/mach/bridge-regs.h
@@ -50,5 +50,6 @@
50#define POWER_MANAGEMENT (BRIDGE_VIRT_BASE | 0x011c) 50#define POWER_MANAGEMENT (BRIDGE_VIRT_BASE | 0x011c)
51 51
52#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) 52#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)
53#define TIMER_PHYS_BASE (BRIDGE_PHYS_BASE | 0x0300)
53 54
54#endif 55#endif
diff --git a/arch/arm/mach-dove/include/mach/dove.h b/arch/arm/mach-dove/include/mach/dove.h
index ad1165d488c1..d52b0ef313b7 100644
--- a/arch/arm/mach-dove/include/mach/dove.h
+++ b/arch/arm/mach-dove/include/mach/dove.h
@@ -78,6 +78,7 @@
78 78
79/* North-South Bridge */ 79/* North-South Bridge */
80#define BRIDGE_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0x20000) 80#define BRIDGE_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0x20000)
81#define BRIDGE_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0x20000)
81 82
82/* Cryptographic Engine */ 83/* Cryptographic Engine */
83#define DOVE_CRYPT_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0x30000) 84#define DOVE_CRYPT_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0x30000)
diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c
index 920a8cc42726..c6422fb10bae 100644
--- a/arch/arm/mach-imx/clk-imx35.c
+++ b/arch/arm/mach-imx/clk-imx35.c
@@ -201,7 +201,6 @@ int __init mx35_clocks_init()
201 pr_err("i.MX35 clk %d: register failed with %ld\n", 201 pr_err("i.MX35 clk %d: register failed with %ld\n",
202 i, PTR_ERR(clk[i])); 202 i, PTR_ERR(clk[i]));
203 203
204
205 clk_register_clkdev(clk[pata_gate], NULL, "pata_imx"); 204 clk_register_clkdev(clk[pata_gate], NULL, "pata_imx");
206 clk_register_clkdev(clk[can1_gate], NULL, "flexcan.0"); 205 clk_register_clkdev(clk[can1_gate], NULL, "flexcan.0");
207 clk_register_clkdev(clk[can2_gate], NULL, "flexcan.1"); 206 clk_register_clkdev(clk[can2_gate], NULL, "flexcan.1");
@@ -264,6 +263,14 @@ int __init mx35_clocks_init()
264 clk_prepare_enable(clk[iim_gate]); 263 clk_prepare_enable(clk[iim_gate]);
265 clk_prepare_enable(clk[emi_gate]); 264 clk_prepare_enable(clk[emi_gate]);
266 265
266 /*
267 * SCC is needed to boot via mmc after a watchdog reset. The clock code
268 * before conversion to common clk also enabled UART1 (which isn't
269 * handled here and not needed for mmc) and IIM (which is enabled
270 * unconditionally above).
271 */
272 clk_prepare_enable(clk[scc_gate]);
273
267 imx_print_silicon_rev("i.MX35", mx35_revision()); 274 imx_print_silicon_rev("i.MX35", mx35_revision());
268 275
269#ifdef CONFIG_MXC_USE_EPIT 276#ifdef CONFIG_MXC_USE_EPIT
diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
index f76edb96a48a..ba09552fe5fe 100644
--- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
+++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
@@ -38,7 +38,7 @@
38#include <asm/mach-types.h> 38#include <asm/mach-types.h>
39#include <asm/mach/arch.h> 39#include <asm/mach/arch.h>
40#include <asm/mach/time.h> 40#include <asm/mach/time.h>
41#include <asm/system.h> 41#include <asm/system_info.h>
42#include <mach/common.h> 42#include <mach/common.h>
43#include <mach/iomux-mx27.h> 43#include <mach/iomux-mx27.h>
44 44
diff --git a/arch/arm/mach-mmp/include/mach/gpio-pxa.h b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
deleted file mode 100644
index 0e135a599f3e..000000000000
--- a/arch/arm/mach-mmp/include/mach/gpio-pxa.h
+++ /dev/null
@@ -1,29 +0,0 @@
1#ifndef __ASM_MACH_GPIO_PXA_H
2#define __ASM_MACH_GPIO_PXA_H
3
4#include <mach/addr-map.h>
5#include <mach/cputype.h>
6#include <mach/irqs.h>
7
8#define GPIO_REGS_VIRT (APB_VIRT_BASE + 0x19000)
9
10#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
11#define GPIO_REG(x) (*(volatile u32 *)(GPIO_REGS_VIRT + (x)))
12
13#define gpio_to_bank(gpio) ((gpio) >> 5)
14
15/* NOTE: these macros are defined here to make optimization of
16 * gpio_{get,set}_value() to work when 'gpio' is a constant.
17 * Usage of these macros otherwise is no longer recommended,
18 * use generic GPIO API whenever possible.
19 */
20#define GPIO_bit(gpio) (1 << ((gpio) & 0x1f))
21
22#define GPLR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x00)
23#define GPDR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x0c)
24#define GPSR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x18)
25#define GPCR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x24)
26
27#include <plat/gpio-pxa.h>
28
29#endif /* __ASM_MACH_GPIO_PXA_H */
diff --git a/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h b/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
index c64dbb96dbad..eb187e0e059b 100644
--- a/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
+++ b/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
@@ -31,5 +31,6 @@
31#define IRQ_MASK_HIGH_OFF 0x0014 31#define IRQ_MASK_HIGH_OFF 0x0014
32 32
33#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) 33#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)
34#define TIMER_PHYS_BASE (BRIDGE_PHYS_BASE | 0x0300)
34 35
35#endif 36#endif
diff --git a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
index 3674497162e3..e807c4c52a0b 100644
--- a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
+++ b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
@@ -42,6 +42,7 @@
42#define MV78XX0_CORE0_REGS_PHYS_BASE 0xf1020000 42#define MV78XX0_CORE0_REGS_PHYS_BASE 0xf1020000
43#define MV78XX0_CORE1_REGS_PHYS_BASE 0xf1024000 43#define MV78XX0_CORE1_REGS_PHYS_BASE 0xf1024000
44#define MV78XX0_CORE_REGS_VIRT_BASE 0xfe400000 44#define MV78XX0_CORE_REGS_VIRT_BASE 0xfe400000
45#define MV78XX0_CORE_REGS_PHYS_BASE 0xfe400000
45#define MV78XX0_CORE_REGS_SIZE SZ_16K 46#define MV78XX0_CORE_REGS_SIZE SZ_16K
46 47
47#define MV78XX0_PCIE_IO_PHYS_BASE(i) (0xf0800000 + ((i) << 20)) 48#define MV78XX0_PCIE_IO_PHYS_BASE(i) (0xf0800000 + ((i) << 20))
@@ -59,6 +60,7 @@
59 * Core-specific peripheral registers. 60 * Core-specific peripheral registers.
60 */ 61 */
61#define BRIDGE_VIRT_BASE (MV78XX0_CORE_REGS_VIRT_BASE) 62#define BRIDGE_VIRT_BASE (MV78XX0_CORE_REGS_VIRT_BASE)
63#define BRIDGE_PHYS_BASE (MV78XX0_CORE_REGS_PHYS_BASE)
62 64
63/* 65/*
64 * Register Map 66 * Register Map
diff --git a/arch/arm/mach-mxs/mach-apx4devkit.c b/arch/arm/mach-mxs/mach-apx4devkit.c
index 5e90b9dcdef8..f5f061757deb 100644
--- a/arch/arm/mach-mxs/mach-apx4devkit.c
+++ b/arch/arm/mach-mxs/mach-apx4devkit.c
@@ -205,6 +205,16 @@ static int apx4devkit_phy_fixup(struct phy_device *phy)
205 return 0; 205 return 0;
206} 206}
207 207
208static void __init apx4devkit_fec_phy_clk_enable(void)
209{
210 struct clk *clk;
211
212 /* Enable fec phy clock */
213 clk = clk_get_sys("enet_out", NULL);
214 if (!IS_ERR(clk))
215 clk_prepare_enable(clk);
216}
217
208static void __init apx4devkit_init(void) 218static void __init apx4devkit_init(void)
209{ 219{
210 mx28_soc_init(); 220 mx28_soc_init();
@@ -225,6 +235,7 @@ static void __init apx4devkit_init(void)
225 phy_register_fixup_for_uid(PHY_ID_KS8051, MICREL_PHY_ID_MASK, 235 phy_register_fixup_for_uid(PHY_ID_KS8051, MICREL_PHY_ID_MASK,
226 apx4devkit_phy_fixup); 236 apx4devkit_phy_fixup);
227 237
238 apx4devkit_fec_phy_clk_enable();
228 mx28_add_fec(0, &mx28_fec_pdata); 239 mx28_add_fec(0, &mx28_fec_pdata);
229 240
230 mx28_add_mxs_mmc(0, &apx4devkit_mmc_pdata); 241 mx28_add_mxs_mmc(0, &apx4devkit_mmc_pdata);
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 8fa2fc3a4c3c..779734d8ba37 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -494,8 +494,8 @@ static void __init overo_init(void)
494 494
495 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); 495 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
496 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 496 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
497 omap_hsmmc_init(mmc);
498 overo_i2c_init(); 497 overo_i2c_init();
498 omap_hsmmc_init(mmc);
499 omap_display_init(&overo_dss_data); 499 omap_display_init(&overo_dss_data);
500 omap_serial_init(); 500 omap_serial_init();
501 omap_sdrc_init(mt46h32m32lf6_sdrc_params, 501 omap_sdrc_init(mt46h32m32lf6_sdrc_params,
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index afddec835ece..dfe9bc4d7b80 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -1928,7 +1928,7 @@ static struct omap_hwmod_dma_info omap44xx_mcbsp1_sdma_reqs[] = {
1928 1928
1929static struct omap_hwmod_opt_clk mcbsp1_opt_clks[] = { 1929static struct omap_hwmod_opt_clk mcbsp1_opt_clks[] = {
1930 { .role = "pad_fck", .clk = "pad_clks_ck" }, 1930 { .role = "pad_fck", .clk = "pad_clks_ck" },
1931 { .role = "prcm_clk", .clk = "mcbsp1_sync_mux_ck" }, 1931 { .role = "prcm_fck", .clk = "mcbsp1_sync_mux_ck" },
1932}; 1932};
1933 1933
1934static struct omap_hwmod omap44xx_mcbsp1_hwmod = { 1934static struct omap_hwmod omap44xx_mcbsp1_hwmod = {
@@ -1963,7 +1963,7 @@ static struct omap_hwmod_dma_info omap44xx_mcbsp2_sdma_reqs[] = {
1963 1963
1964static struct omap_hwmod_opt_clk mcbsp2_opt_clks[] = { 1964static struct omap_hwmod_opt_clk mcbsp2_opt_clks[] = {
1965 { .role = "pad_fck", .clk = "pad_clks_ck" }, 1965 { .role = "pad_fck", .clk = "pad_clks_ck" },
1966 { .role = "prcm_clk", .clk = "mcbsp2_sync_mux_ck" }, 1966 { .role = "prcm_fck", .clk = "mcbsp2_sync_mux_ck" },
1967}; 1967};
1968 1968
1969static struct omap_hwmod omap44xx_mcbsp2_hwmod = { 1969static struct omap_hwmod omap44xx_mcbsp2_hwmod = {
@@ -1998,7 +1998,7 @@ static struct omap_hwmod_dma_info omap44xx_mcbsp3_sdma_reqs[] = {
1998 1998
1999static struct omap_hwmod_opt_clk mcbsp3_opt_clks[] = { 1999static struct omap_hwmod_opt_clk mcbsp3_opt_clks[] = {
2000 { .role = "pad_fck", .clk = "pad_clks_ck" }, 2000 { .role = "pad_fck", .clk = "pad_clks_ck" },
2001 { .role = "prcm_clk", .clk = "mcbsp3_sync_mux_ck" }, 2001 { .role = "prcm_fck", .clk = "mcbsp3_sync_mux_ck" },
2002}; 2002};
2003 2003
2004static struct omap_hwmod omap44xx_mcbsp3_hwmod = { 2004static struct omap_hwmod omap44xx_mcbsp3_hwmod = {
@@ -2033,7 +2033,7 @@ static struct omap_hwmod_dma_info omap44xx_mcbsp4_sdma_reqs[] = {
2033 2033
2034static struct omap_hwmod_opt_clk mcbsp4_opt_clks[] = { 2034static struct omap_hwmod_opt_clk mcbsp4_opt_clks[] = {
2035 { .role = "pad_fck", .clk = "pad_clks_ck" }, 2035 { .role = "pad_fck", .clk = "pad_clks_ck" },
2036 { .role = "prcm_clk", .clk = "mcbsp4_sync_mux_ck" }, 2036 { .role = "prcm_fck", .clk = "mcbsp4_sync_mux_ck" },
2037}; 2037};
2038 2038
2039static struct omap_hwmod omap44xx_mcbsp4_hwmod = { 2039static struct omap_hwmod omap44xx_mcbsp4_hwmod = {
@@ -3858,7 +3858,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_2 = {
3858}; 3858};
3859 3859
3860/* usb_host_fs -> l3_main_2 */ 3860/* usb_host_fs -> l3_main_2 */
3861static struct omap_hwmod_ocp_if omap44xx_usb_host_fs__l3_main_2 = { 3861static struct omap_hwmod_ocp_if __maybe_unused omap44xx_usb_host_fs__l3_main_2 = {
3862 .master = &omap44xx_usb_host_fs_hwmod, 3862 .master = &omap44xx_usb_host_fs_hwmod,
3863 .slave = &omap44xx_l3_main_2_hwmod, 3863 .slave = &omap44xx_l3_main_2_hwmod,
3864 .clk = "l3_div_ck", 3864 .clk = "l3_div_ck",
@@ -3916,7 +3916,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_3 = {
3916}; 3916};
3917 3917
3918/* aess -> l4_abe */ 3918/* aess -> l4_abe */
3919static struct omap_hwmod_ocp_if omap44xx_aess__l4_abe = { 3919static struct omap_hwmod_ocp_if __maybe_unused omap44xx_aess__l4_abe = {
3920 .master = &omap44xx_aess_hwmod, 3920 .master = &omap44xx_aess_hwmod,
3921 .slave = &omap44xx_l4_abe_hwmod, 3921 .slave = &omap44xx_l4_abe_hwmod,
3922 .clk = "ocp_abe_iclk", 3922 .clk = "ocp_abe_iclk",
@@ -4007,7 +4007,7 @@ static struct omap_hwmod_addr_space omap44xx_aess_addrs[] = {
4007}; 4007};
4008 4008
4009/* l4_abe -> aess */ 4009/* l4_abe -> aess */
4010static struct omap_hwmod_ocp_if omap44xx_l4_abe__aess = { 4010static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l4_abe__aess = {
4011 .master = &omap44xx_l4_abe_hwmod, 4011 .master = &omap44xx_l4_abe_hwmod,
4012 .slave = &omap44xx_aess_hwmod, 4012 .slave = &omap44xx_aess_hwmod,
4013 .clk = "ocp_abe_iclk", 4013 .clk = "ocp_abe_iclk",
@@ -4025,7 +4025,7 @@ static struct omap_hwmod_addr_space omap44xx_aess_dma_addrs[] = {
4025}; 4025};
4026 4026
4027/* l4_abe -> aess (dma) */ 4027/* l4_abe -> aess (dma) */
4028static struct omap_hwmod_ocp_if omap44xx_l4_abe__aess_dma = { 4028static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l4_abe__aess_dma = {
4029 .master = &omap44xx_l4_abe_hwmod, 4029 .master = &omap44xx_l4_abe_hwmod,
4030 .slave = &omap44xx_aess_hwmod, 4030 .slave = &omap44xx_aess_hwmod,
4031 .clk = "ocp_abe_iclk", 4031 .clk = "ocp_abe_iclk",
@@ -5851,7 +5851,7 @@ static struct omap_hwmod_addr_space omap44xx_usb_host_fs_addrs[] = {
5851}; 5851};
5852 5852
5853/* l4_cfg -> usb_host_fs */ 5853/* l4_cfg -> usb_host_fs */
5854static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_host_fs = { 5854static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l4_cfg__usb_host_fs = {
5855 .master = &omap44xx_l4_cfg_hwmod, 5855 .master = &omap44xx_l4_cfg_hwmod,
5856 .slave = &omap44xx_usb_host_fs_hwmod, 5856 .slave = &omap44xx_usb_host_fs_hwmod,
5857 .clk = "l4_div_ck", 5857 .clk = "l4_div_ck",
@@ -6008,13 +6008,13 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
6008 &omap44xx_iva__l3_main_2, 6008 &omap44xx_iva__l3_main_2,
6009 &omap44xx_l3_main_1__l3_main_2, 6009 &omap44xx_l3_main_1__l3_main_2,
6010 &omap44xx_l4_cfg__l3_main_2, 6010 &omap44xx_l4_cfg__l3_main_2,
6011 &omap44xx_usb_host_fs__l3_main_2, 6011 /* &omap44xx_usb_host_fs__l3_main_2, */
6012 &omap44xx_usb_host_hs__l3_main_2, 6012 &omap44xx_usb_host_hs__l3_main_2,
6013 &omap44xx_usb_otg_hs__l3_main_2, 6013 &omap44xx_usb_otg_hs__l3_main_2,
6014 &omap44xx_l3_main_1__l3_main_3, 6014 &omap44xx_l3_main_1__l3_main_3,
6015 &omap44xx_l3_main_2__l3_main_3, 6015 &omap44xx_l3_main_2__l3_main_3,
6016 &omap44xx_l4_cfg__l3_main_3, 6016 &omap44xx_l4_cfg__l3_main_3,
6017 &omap44xx_aess__l4_abe, 6017 /* &omap44xx_aess__l4_abe, */
6018 &omap44xx_dsp__l4_abe, 6018 &omap44xx_dsp__l4_abe,
6019 &omap44xx_l3_main_1__l4_abe, 6019 &omap44xx_l3_main_1__l4_abe,
6020 &omap44xx_mpu__l4_abe, 6020 &omap44xx_mpu__l4_abe,
@@ -6023,8 +6023,8 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
6023 &omap44xx_l4_cfg__l4_wkup, 6023 &omap44xx_l4_cfg__l4_wkup,
6024 &omap44xx_mpu__mpu_private, 6024 &omap44xx_mpu__mpu_private,
6025 &omap44xx_l4_cfg__ocp_wp_noc, 6025 &omap44xx_l4_cfg__ocp_wp_noc,
6026 &omap44xx_l4_abe__aess, 6026 /* &omap44xx_l4_abe__aess, */
6027 &omap44xx_l4_abe__aess_dma, 6027 /* &omap44xx_l4_abe__aess_dma, */
6028 &omap44xx_l3_main_2__c2c, 6028 &omap44xx_l3_main_2__c2c,
6029 &omap44xx_l4_wkup__counter_32k, 6029 &omap44xx_l4_wkup__counter_32k,
6030 &omap44xx_l4_cfg__ctrl_module_core, 6030 &omap44xx_l4_cfg__ctrl_module_core,
@@ -6130,7 +6130,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
6130 &omap44xx_l4_per__uart2, 6130 &omap44xx_l4_per__uart2,
6131 &omap44xx_l4_per__uart3, 6131 &omap44xx_l4_per__uart3,
6132 &omap44xx_l4_per__uart4, 6132 &omap44xx_l4_per__uart4,
6133 &omap44xx_l4_cfg__usb_host_fs, 6133 /* &omap44xx_l4_cfg__usb_host_fs, */
6134 &omap44xx_l4_cfg__usb_host_hs, 6134 &omap44xx_l4_cfg__usb_host_hs,
6135 &omap44xx_l4_cfg__usb_otg_hs, 6135 &omap44xx_l4_cfg__usb_otg_hs,
6136 &omap44xx_l4_cfg__usb_tll_hs, 6136 &omap44xx_l4_cfg__usb_tll_hs,
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 119d5a910f3a..43a979075338 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -32,6 +32,7 @@
32#include "twl-common.h" 32#include "twl-common.h"
33#include "pm.h" 33#include "pm.h"
34#include "voltage.h" 34#include "voltage.h"
35#include "mux.h"
35 36
36static struct i2c_board_info __initdata pmic_i2c_board_info = { 37static struct i2c_board_info __initdata pmic_i2c_board_info = {
37 .addr = 0x48, 38 .addr = 0x48,
@@ -77,6 +78,7 @@ void __init omap4_pmic_init(const char *pmic_type,
77 struct twl6040_platform_data *twl6040_data, int twl6040_irq) 78 struct twl6040_platform_data *twl6040_data, int twl6040_irq)
78{ 79{
79 /* PMIC part*/ 80 /* PMIC part*/
81 omap_mux_init_signal("sys_nirq1", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE);
80 strncpy(omap4_i2c1_board_info[0].type, pmic_type, 82 strncpy(omap4_i2c1_board_info[0].type, pmic_type,
81 sizeof(omap4_i2c1_board_info[0].type)); 83 sizeof(omap4_i2c1_board_info[0].type));
82 omap4_i2c1_board_info[0].irq = OMAP44XX_IRQ_SYS_1N; 84 omap4_i2c1_board_info[0].irq = OMAP44XX_IRQ_SYS_1N;
diff --git a/arch/arm/mach-picoxcell/Makefile b/arch/arm/mach-picoxcell/Makefile
index e5ec4a8d9bcb..8e39f80fce19 100644
--- a/arch/arm/mach-picoxcell/Makefile
+++ b/arch/arm/mach-picoxcell/Makefile
@@ -1,2 +1 @@
1obj-y := common.o obj-y := common.o
2obj-y += time.o
diff --git a/arch/arm/mach-picoxcell/common.c b/arch/arm/mach-picoxcell/common.c
index a2e8ae8b5821..8f9a0b47a7fa 100644
--- a/arch/arm/mach-picoxcell/common.c
+++ b/arch/arm/mach-picoxcell/common.c
@@ -14,6 +14,7 @@
14#include <linux/of_address.h> 14#include <linux/of_address.h>
15#include <linux/of_irq.h> 15#include <linux/of_irq.h>
16#include <linux/of_platform.h> 16#include <linux/of_platform.h>
17#include <linux/dw_apb_timer.h>
17 18
18#include <asm/mach/arch.h> 19#include <asm/mach/arch.h>
19#include <asm/hardware/vic.h> 20#include <asm/hardware/vic.h>
@@ -97,7 +98,7 @@ DT_MACHINE_START(PICOXCELL, "Picochip picoXcell")
97 .nr_irqs = NR_IRQS_LEGACY, 98 .nr_irqs = NR_IRQS_LEGACY,
98 .init_irq = picoxcell_init_irq, 99 .init_irq = picoxcell_init_irq,
99 .handle_irq = vic_handle_irq, 100 .handle_irq = vic_handle_irq,
100 .timer = &picoxcell_timer, 101 .timer = &dw_apb_timer,
101 .init_machine = picoxcell_init_machine, 102 .init_machine = picoxcell_init_machine,
102 .dt_compat = picoxcell_dt_match, 103 .dt_compat = picoxcell_dt_match,
103 .restart = picoxcell_wdt_restart, 104 .restart = picoxcell_wdt_restart,
diff --git a/arch/arm/mach-picoxcell/common.h b/arch/arm/mach-picoxcell/common.h
index 83d55ab956a4..a65cb02f84c8 100644
--- a/arch/arm/mach-picoxcell/common.h
+++ b/arch/arm/mach-picoxcell/common.h
@@ -12,6 +12,6 @@
12 12
13#include <asm/mach/time.h> 13#include <asm/mach/time.h>
14 14
15extern struct sys_timer picoxcell_timer; 15extern struct sys_timer dw_apb_timer;
16 16
17#endif /* __PICOXCELL_COMMON_H__ */ 17#endif /* __PICOXCELL_COMMON_H__ */
diff --git a/arch/arm/mach-picoxcell/time.c b/arch/arm/mach-picoxcell/time.c
deleted file mode 100644
index 2ecba6743b8e..000000000000
--- a/arch/arm/mach-picoxcell/time.c
+++ /dev/null
@@ -1,121 +0,0 @@
1/*
2 * Copyright (c) 2011 Picochip Ltd., Jamie Iles
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * All enquiries to support@picochip.com
9 */
10#include <linux/dw_apb_timer.h>
11#include <linux/of.h>
12#include <linux/of_address.h>
13#include <linux/of_irq.h>
14
15#include <asm/mach/time.h>
16#include <asm/sched_clock.h>
17
18#include "common.h"
19
20static void timer_get_base_and_rate(struct device_node *np,
21 void __iomem **base, u32 *rate)
22{
23 *base = of_iomap(np, 0);
24
25 if (!*base)
26 panic("Unable to map regs for %s", np->name);
27
28 if (of_property_read_u32(np, "clock-freq", rate))
29 panic("No clock-freq property for %s", np->name);
30}
31
32static void picoxcell_add_clockevent(struct device_node *event_timer)
33{
34 void __iomem *iobase;
35 struct dw_apb_clock_event_device *ced;
36 u32 irq, rate;
37
38 irq = irq_of_parse_and_map(event_timer, 0);
39 if (irq == NO_IRQ)
40 panic("No IRQ for clock event timer");
41
42 timer_get_base_and_rate(event_timer, &iobase, &rate);
43
44 ced = dw_apb_clockevent_init(0, event_timer->name, 300, iobase, irq,
45 rate);
46 if (!ced)
47 panic("Unable to initialise clockevent device");
48
49 dw_apb_clockevent_register(ced);
50}
51
52static void picoxcell_add_clocksource(struct device_node *source_timer)
53{
54 void __iomem *iobase;
55 struct dw_apb_clocksource *cs;
56 u32 rate;
57
58 timer_get_base_and_rate(source_timer, &iobase, &rate);
59
60 cs = dw_apb_clocksource_init(300, source_timer->name, iobase, rate);
61 if (!cs)
62 panic("Unable to initialise clocksource device");
63
64 dw_apb_clocksource_start(cs);
65 dw_apb_clocksource_register(cs);
66}
67
68static void __iomem *sched_io_base;
69
70static u32 picoxcell_read_sched_clock(void)
71{
72 return __raw_readl(sched_io_base);
73}
74
75static const struct of_device_id picoxcell_rtc_ids[] __initconst = {
76 { .compatible = "picochip,pc3x2-rtc" },
77 { /* Sentinel */ },
78};
79
80static void picoxcell_init_sched_clock(void)
81{
82 struct device_node *sched_timer;
83 u32 rate;
84
85 sched_timer = of_find_matching_node(NULL, picoxcell_rtc_ids);
86 if (!sched_timer)
87 panic("No RTC for sched clock to use");
88
89 timer_get_base_and_rate(sched_timer, &sched_io_base, &rate);
90 of_node_put(sched_timer);
91
92 setup_sched_clock(picoxcell_read_sched_clock, 32, rate);
93}
94
95static const struct of_device_id picoxcell_timer_ids[] __initconst = {
96 { .compatible = "picochip,pc3x2-timer" },
97 {},
98};
99
100static void __init picoxcell_timer_init(void)
101{
102 struct device_node *event_timer, *source_timer;
103
104 event_timer = of_find_matching_node(NULL, picoxcell_timer_ids);
105 if (!event_timer)
106 panic("No timer for clockevent");
107 picoxcell_add_clockevent(event_timer);
108
109 source_timer = of_find_matching_node(event_timer, picoxcell_timer_ids);
110 if (!source_timer)
111 panic("No timer for clocksource");
112 picoxcell_add_clocksource(source_timer);
113
114 of_node_put(source_timer);
115
116 picoxcell_init_sched_clock();
117}
118
119struct sys_timer picoxcell_timer = {
120 .init = picoxcell_timer_init,
121};
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index d09da6a746b8..d3de84b0dcbe 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -127,7 +127,11 @@ static unsigned long hx4700_pin_config[] __initdata = {
127 GPIO19_SSP2_SCLK, 127 GPIO19_SSP2_SCLK,
128 GPIO86_SSP2_RXD, 128 GPIO86_SSP2_RXD,
129 GPIO87_SSP2_TXD, 129 GPIO87_SSP2_TXD,
130 GPIO88_GPIO, 130 GPIO88_GPIO | MFP_LPM_DRIVE_HIGH, /* TSC2046_CS */
131
132 /* BQ24022 Regulator */
133 GPIO72_GPIO | MFP_LPM_KEEP_OUTPUT, /* BQ24022_nCHARGE_EN */
134 GPIO96_GPIO | MFP_LPM_KEEP_OUTPUT, /* BQ24022_ISET2 */
131 135
132 /* HX4700 specific input GPIOs */ 136 /* HX4700 specific input GPIOs */
133 GPIO12_GPIO | WAKEUP_ON_EDGE_RISE, /* ASIC3_IRQ */ 137 GPIO12_GPIO | WAKEUP_ON_EDGE_RISE, /* ASIC3_IRQ */
@@ -135,6 +139,10 @@ static unsigned long hx4700_pin_config[] __initdata = {
135 GPIO14_GPIO, /* nWLAN_IRQ */ 139 GPIO14_GPIO, /* nWLAN_IRQ */
136 140
137 /* HX4700 specific output GPIOs */ 141 /* HX4700 specific output GPIOs */
142 GPIO61_GPIO | MFP_LPM_DRIVE_HIGH, /* W3220_nRESET */
143 GPIO71_GPIO | MFP_LPM_DRIVE_HIGH, /* ASIC3_nRESET */
144 GPIO81_GPIO | MFP_LPM_DRIVE_HIGH, /* CPU_GP_nRESET */
145 GPIO116_GPIO | MFP_LPM_DRIVE_HIGH, /* CPU_HW_nRESET */
138 GPIO102_GPIO | MFP_LPM_DRIVE_LOW, /* SYNAPTICS_POWER_ON */ 146 GPIO102_GPIO | MFP_LPM_DRIVE_LOW, /* SYNAPTICS_POWER_ON */
139 147
140 GPIO10_GPIO, /* GSM_IRQ */ 148 GPIO10_GPIO, /* GSM_IRQ */
@@ -872,14 +880,19 @@ static struct gpio global_gpios[] = {
872 { GPIO110_HX4700_LCD_LVDD_3V3_ON, GPIOF_OUT_INIT_HIGH, "LCD_LVDD" }, 880 { GPIO110_HX4700_LCD_LVDD_3V3_ON, GPIOF_OUT_INIT_HIGH, "LCD_LVDD" },
873 { GPIO111_HX4700_LCD_AVDD_3V3_ON, GPIOF_OUT_INIT_HIGH, "LCD_AVDD" }, 881 { GPIO111_HX4700_LCD_AVDD_3V3_ON, GPIOF_OUT_INIT_HIGH, "LCD_AVDD" },
874 { GPIO32_HX4700_RS232_ON, GPIOF_OUT_INIT_HIGH, "RS232_ON" }, 882 { GPIO32_HX4700_RS232_ON, GPIOF_OUT_INIT_HIGH, "RS232_ON" },
883 { GPIO61_HX4700_W3220_nRESET, GPIOF_OUT_INIT_HIGH, "W3220_nRESET" },
875 { GPIO71_HX4700_ASIC3_nRESET, GPIOF_OUT_INIT_HIGH, "ASIC3_nRESET" }, 884 { GPIO71_HX4700_ASIC3_nRESET, GPIOF_OUT_INIT_HIGH, "ASIC3_nRESET" },
885 { GPIO81_HX4700_CPU_GP_nRESET, GPIOF_OUT_INIT_HIGH, "CPU_GP_nRESET" },
876 { GPIO82_HX4700_EUART_RESET, GPIOF_OUT_INIT_HIGH, "EUART_RESET" }, 886 { GPIO82_HX4700_EUART_RESET, GPIOF_OUT_INIT_HIGH, "EUART_RESET" },
887 { GPIO116_HX4700_CPU_HW_nRESET, GPIOF_OUT_INIT_HIGH, "CPU_HW_nRESET" },
877}; 888};
878 889
879static void __init hx4700_init(void) 890static void __init hx4700_init(void)
880{ 891{
881 int ret; 892 int ret;
882 893
894 PCFR = PCFR_GPR_EN | PCFR_OPDE;
895
883 pxa2xx_mfp_config(ARRAY_AND_SIZE(hx4700_pin_config)); 896 pxa2xx_mfp_config(ARRAY_AND_SIZE(hx4700_pin_config));
884 gpio_set_wake(GPIO12_HX4700_ASIC3_IRQ, 1); 897 gpio_set_wake(GPIO12_HX4700_ASIC3_IRQ, 1);
885 ret = gpio_request_array(ARRAY_AND_SIZE(global_gpios)); 898 ret = gpio_request_array(ARRAY_AND_SIZE(global_gpios));
diff --git a/arch/arm/mach-versatile/pci.c b/arch/arm/mach-versatile/pci.c
index bec933b04ef0..e95bf84cc837 100644
--- a/arch/arm/mach-versatile/pci.c
+++ b/arch/arm/mach-versatile/pci.c
@@ -339,7 +339,6 @@ void __init pci_versatile_preinit(void)
339static int __init versatile_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) 339static int __init versatile_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
340{ 340{
341 int irq; 341 int irq;
342 int devslot = PCI_SLOT(dev->devfn);
343 342
344 /* slot, pin, irq 343 /* slot, pin, irq
345 * 24 1 27 344 * 24 1 27
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h
index c471436c7952..2e8a1efdf7b8 100644
--- a/arch/arm/mm/mm.h
+++ b/arch/arm/mm/mm.h
@@ -64,7 +64,7 @@ extern void __flush_dcache_page(struct address_space *mapping, struct page *page
64#ifdef CONFIG_ZONE_DMA 64#ifdef CONFIG_ZONE_DMA
65extern phys_addr_t arm_dma_limit; 65extern phys_addr_t arm_dma_limit;
66#else 66#else
67#define arm_dma_limit ((u32)~0) 67#define arm_dma_limit ((phys_addr_t)~0)
68#endif 68#endif
69 69
70extern phys_addr_t arm_lowmem_limit; 70extern phys_addr_t arm_lowmem_limit;
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index e5dad60b558b..cf4528d51774 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -791,6 +791,79 @@ void __init iotable_init(struct map_desc *io_desc, int nr)
791 } 791 }
792} 792}
793 793
794#ifndef CONFIG_ARM_LPAE
795
796/*
797 * The Linux PMD is made of two consecutive section entries covering 2MB
798 * (see definition in include/asm/pgtable-2level.h). However a call to
799 * create_mapping() may optimize static mappings by using individual
800 * 1MB section mappings. This leaves the actual PMD potentially half
801 * initialized if the top or bottom section entry isn't used, leaving it
802 * open to problems if a subsequent ioremap() or vmalloc() tries to use
803 * the virtual space left free by that unused section entry.
804 *
805 * Let's avoid the issue by inserting dummy vm entries covering the unused
806 * PMD halves once the static mappings are in place.
807 */
808
809static void __init pmd_empty_section_gap(unsigned long addr)
810{
811 struct vm_struct *vm;
812
813 vm = early_alloc_aligned(sizeof(*vm), __alignof__(*vm));
814 vm->addr = (void *)addr;
815 vm->size = SECTION_SIZE;
816 vm->flags = VM_IOREMAP | VM_ARM_STATIC_MAPPING;
817 vm->caller = pmd_empty_section_gap;
818 vm_area_add_early(vm);
819}
820
821static void __init fill_pmd_gaps(void)
822{
823 struct vm_struct *vm;
824 unsigned long addr, next = 0;
825 pmd_t *pmd;
826
827 /* we're still single threaded hence no lock needed here */
828 for (vm = vmlist; vm; vm = vm->next) {
829 if (!(vm->flags & VM_ARM_STATIC_MAPPING))
830 continue;
831 addr = (unsigned long)vm->addr;
832 if (addr < next)
833 continue;
834
835 /*
836 * Check if this vm starts on an odd section boundary.
837 * If so and the first section entry for this PMD is free
838 * then we block the corresponding virtual address.
839 */
840 if ((addr & ~PMD_MASK) == SECTION_SIZE) {
841 pmd = pmd_off_k(addr);
842 if (pmd_none(*pmd))
843 pmd_empty_section_gap(addr & PMD_MASK);
844 }
845
846 /*
847 * Then check if this vm ends on an odd section boundary.
848 * If so and the second section entry for this PMD is empty
849 * then we block the corresponding virtual address.
850 */
851 addr += vm->size;
852 if ((addr & ~PMD_MASK) == SECTION_SIZE) {
853 pmd = pmd_off_k(addr) + 1;
854 if (pmd_none(*pmd))
855 pmd_empty_section_gap(addr);
856 }
857
858 /* no need to look at any vm entry until we hit the next PMD */
859 next = (addr + PMD_SIZE - 1) & PMD_MASK;
860 }
861}
862
863#else
864#define fill_pmd_gaps() do { } while (0)
865#endif
866
794static void * __initdata vmalloc_min = 867static void * __initdata vmalloc_min =
795 (void *)(VMALLOC_END - (240 << 20) - VMALLOC_OFFSET); 868 (void *)(VMALLOC_END - (240 << 20) - VMALLOC_OFFSET);
796 869
@@ -1072,6 +1145,7 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
1072 */ 1145 */
1073 if (mdesc->map_io) 1146 if (mdesc->map_io)
1074 mdesc->map_io(); 1147 mdesc->map_io();
1148 fill_pmd_gaps();
1075 1149
1076 /* 1150 /*
1077 * Finally flush the caches and tlb to ensure that we're in a 1151 * Finally flush the caches and tlb to ensure that we're in a