diff options
| author | Ivan T. Ivanov <iivanov@mm-sol.com> | 2014-10-22 05:58:47 -0400 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2014-10-29 04:28:37 -0400 |
| commit | cfb24f6ebd38137ebf072cb5629fdf6df51e49c1 (patch) | |
| tree | 54a7682c93228bba70037b2100322921ef35f39d | |
| parent | eadff3024472f8a7955fae7e5484d235ed407453 (diff) | |
pinctrl: Qualcomm SPMI PMIC MPP pin controller driver
This is the pinctrl, pinmux, pinconf and gpiolib driver for the
Qualcomm MPP sub-function blocks found in the PMIC chips.
Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com>
Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| -rw-r--r-- | drivers/pinctrl/qcom/Makefile | 1 | ||||
| -rw-r--r-- | drivers/pinctrl/qcom/pinctrl-spmi-mpp.c | 949 |
2 files changed, 950 insertions, 0 deletions
diff --git a/drivers/pinctrl/qcom/Makefile b/drivers/pinctrl/qcom/Makefile index 9b49c65a1cab..bfd79af5f982 100644 --- a/drivers/pinctrl/qcom/Makefile +++ b/drivers/pinctrl/qcom/Makefile | |||
| @@ -6,3 +6,4 @@ obj-$(CONFIG_PINCTRL_IPQ8064) += pinctrl-ipq8064.o | |||
| 6 | obj-$(CONFIG_PINCTRL_MSM8960) += pinctrl-msm8960.o | 6 | obj-$(CONFIG_PINCTRL_MSM8960) += pinctrl-msm8960.o |
| 7 | obj-$(CONFIG_PINCTRL_MSM8X74) += pinctrl-msm8x74.o | 7 | obj-$(CONFIG_PINCTRL_MSM8X74) += pinctrl-msm8x74.o |
| 8 | obj-$(CONFIG_PINCTRL_QCOM_SPMI_PMIC) += pinctrl-spmi-gpio.o | 8 | obj-$(CONFIG_PINCTRL_QCOM_SPMI_PMIC) += pinctrl-spmi-gpio.o |
| 9 | obj-$(CONFIG_PINCTRL_QCOM_SPMI_PMIC) += pinctrl-spmi-mpp.o | ||
diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c b/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c new file mode 100644 index 000000000000..a8924dba335e --- /dev/null +++ b/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c | |||
| @@ -0,0 +1,949 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify | ||
| 5 | * it under the terms of the GNU General Public License version 2 and | ||
| 6 | * only version 2 as published by the Free Software Foundation. | ||
| 7 | * | ||
| 8 | * This program is distributed in the hope that it will be useful, | ||
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 11 | * GNU General Public License for more details. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <linux/gpio.h> | ||
| 15 | #include <linux/module.h> | ||
| 16 | #include <linux/of.h> | ||
| 17 | #include <linux/pinctrl/pinconf-generic.h> | ||
| 18 | #include <linux/pinctrl/pinconf.h> | ||
| 19 | #include <linux/pinctrl/pinmux.h> | ||
| 20 | #include <linux/platform_device.h> | ||
| 21 | #include <linux/regmap.h> | ||
| 22 | #include <linux/slab.h> | ||
| 23 | #include <linux/types.h> | ||
| 24 | |||
| 25 | #include <dt-bindings/pinctrl/qcom,pmic-mpp.h> | ||
| 26 | |||
| 27 | #include "../core.h" | ||
| 28 | #include "../pinctrl-utils.h" | ||
| 29 | |||
| 30 | #define PMIC_MPP_ADDRESS_RANGE 0x100 | ||
| 31 | |||
| 32 | /* | ||
| 33 | * Pull Up Values - it indicates whether a pull-up should be | ||
| 34 | * applied for bidirectional mode only. The hardware ignores the | ||
| 35 | * configuration when operating in other modes. | ||
| 36 | */ | ||
| 37 | #define PMIC_MPP_PULL_UP_0P6KOHM 0 | ||
| 38 | #define PMIC_MPP_PULL_UP_10KOHM 1 | ||
| 39 | #define PMIC_MPP_PULL_UP_30KOHM 2 | ||
| 40 | #define PMIC_MPP_PULL_UP_OPEN 3 | ||
| 41 | |||
| 42 | /* type registers base address bases */ | ||
| 43 | #define PMIC_MPP_REG_TYPE 0x4 | ||
| 44 | #define PMIC_MPP_REG_SUBTYPE 0x5 | ||
| 45 | |||
| 46 | /* mpp peripheral type and subtype values */ | ||
| 47 | #define PMIC_MPP_TYPE 0x11 | ||
| 48 | #define PMIC_MPP_SUBTYPE_4CH_NO_ANA_OUT 0x3 | ||
| 49 | #define PMIC_MPP_SUBTYPE_ULT_4CH_NO_ANA_OUT 0x4 | ||
| 50 | #define PMIC_MPP_SUBTYPE_4CH_NO_SINK 0x5 | ||
| 51 | #define PMIC_MPP_SUBTYPE_ULT_4CH_NO_SINK 0x6 | ||
| 52 | #define PMIC_MPP_SUBTYPE_4CH_FULL_FUNC 0x7 | ||
| 53 | #define PMIC_MPP_SUBTYPE_8CH_FULL_FUNC 0xf | ||
| 54 | |||
| 55 | #define PMIC_MPP_REG_RT_STS 0x10 | ||
| 56 | #define PMIC_MPP_REG_RT_STS_VAL_MASK 0x1 | ||
| 57 | |||
| 58 | /* control register base address bases */ | ||
| 59 | #define PMIC_MPP_REG_MODE_CTL 0x40 | ||
| 60 | #define PMIC_MPP_REG_DIG_VIN_CTL 0x41 | ||
| 61 | #define PMIC_MPP_REG_DIG_PULL_CTL 0x42 | ||
| 62 | #define PMIC_MPP_REG_DIG_IN_CTL 0x43 | ||
| 63 | #define PMIC_MPP_REG_EN_CTL 0x46 | ||
| 64 | #define PMIC_MPP_REG_AIN_CTL 0x4a | ||
| 65 | |||
| 66 | /* PMIC_MPP_REG_MODE_CTL */ | ||
| 67 | #define PMIC_MPP_REG_MODE_VALUE_MASK 0x1 | ||
| 68 | #define PMIC_MPP_REG_MODE_FUNCTION_SHIFT 1 | ||
| 69 | #define PMIC_MPP_REG_MODE_FUNCTION_MASK 0x7 | ||
| 70 | #define PMIC_MPP_REG_MODE_DIR_SHIFT 4 | ||
| 71 | #define PMIC_MPP_REG_MODE_DIR_MASK 0x7 | ||
| 72 | |||
| 73 | /* PMIC_MPP_REG_DIG_VIN_CTL */ | ||
| 74 | #define PMIC_MPP_REG_VIN_SHIFT 0 | ||
| 75 | #define PMIC_MPP_REG_VIN_MASK 0x7 | ||
| 76 | |||
| 77 | /* PMIC_MPP_REG_DIG_PULL_CTL */ | ||
| 78 | #define PMIC_MPP_REG_PULL_SHIFT 0 | ||
| 79 | #define PMIC_MPP_REG_PULL_MASK 0x7 | ||
| 80 | |||
| 81 | /* PMIC_MPP_REG_EN_CTL */ | ||
| 82 | #define PMIC_MPP_REG_MASTER_EN_SHIFT 7 | ||
| 83 | |||
| 84 | /* PMIC_MPP_REG_AIN_CTL */ | ||
| 85 | #define PMIC_MPP_REG_AIN_ROUTE_SHIFT 0 | ||
| 86 | #define PMIC_MPP_REG_AIN_ROUTE_MASK 0x7 | ||
| 87 | |||
| 88 | #define PMIC_MPP_PHYSICAL_OFFSET 1 | ||
| 89 | |||
| 90 | /* Qualcomm specific pin configurations */ | ||
| 91 | #define PMIC_MPP_CONF_AMUX_ROUTE (PIN_CONFIG_END + 1) | ||
| 92 | #define PMIC_MPP_CONF_ANALOG_MODE (PIN_CONFIG_END + 2) | ||
| 93 | |||
| 94 | /** | ||
| 95 | * struct pmic_mpp_pad - keep current MPP settings | ||
| 96 | * @base: Address base in SPMI device. | ||
| 97 | * @irq: IRQ number which this MPP generate. | ||
| 98 | * @is_enabled: Set to false when MPP should be put in high Z state. | ||
| 99 | * @out_value: Cached pin output value. | ||
| 100 | * @output_enabled: Set to true if MPP output logic is enabled. | ||
| 101 | * @input_enabled: Set to true if MPP input buffer logic is enabled. | ||
| 102 | * @analog_mode: Set to true when MPP should operate in Analog Input, Analog | ||
| 103 | * Output or Bidirectional Analog mode. | ||
| 104 | * @num_sources: Number of power-sources supported by this MPP. | ||
| 105 | * @power_source: Current power-source used. | ||
| 106 | * @amux_input: Set the source for analog input. | ||
| 107 | * @pullup: Pullup resistor value. Valid in Bidirectional mode only. | ||
| 108 | * @function: See pmic_mpp_functions[]. | ||
| 109 | */ | ||
| 110 | struct pmic_mpp_pad { | ||
| 111 | u16 base; | ||
| 112 | int irq; | ||
| 113 | bool is_enabled; | ||
| 114 | bool out_value; | ||
| 115 | bool output_enabled; | ||
| 116 | bool input_enabled; | ||
| 117 | bool analog_mode; | ||
| 118 | unsigned int num_sources; | ||
| 119 | unsigned int power_source; | ||
| 120 | unsigned int amux_input; | ||
| 121 | unsigned int pullup; | ||
| 122 | unsigned int function; | ||
| 123 | }; | ||
| 124 | |||
| 125 | struct pmic_mpp_state { | ||
| 126 | struct device *dev; | ||
| 127 | struct regmap *map; | ||
| 128 | struct pinctrl_dev *ctrl; | ||
| 129 | struct gpio_chip chip; | ||
| 130 | }; | ||
| 131 | |||
| 132 | struct pmic_mpp_bindings { | ||
| 133 | const char *property; | ||
| 134 | unsigned param; | ||
| 135 | }; | ||
| 136 | |||
| 137 | static struct pmic_mpp_bindings pmic_mpp_bindings[] = { | ||
| 138 | {"qcom,amux-route", PMIC_MPP_CONF_AMUX_ROUTE}, | ||
| 139 | {"qcom,analog-mode", PMIC_MPP_CONF_ANALOG_MODE}, | ||
| 140 | }; | ||
| 141 | |||
| 142 | static const char *const pmic_mpp_groups[] = { | ||
| 143 | "mpp1", "mpp2", "mpp3", "mpp4", "mpp5", "mpp6", "mpp7", "mpp8", | ||
| 144 | }; | ||
| 145 | |||
| 146 | static const char *const pmic_mpp_functions[] = { | ||
| 147 | PMIC_MPP_FUNC_NORMAL, PMIC_MPP_FUNC_PAIRED, | ||
| 148 | "reserved1", "reserved2", | ||
| 149 | PMIC_MPP_FUNC_DTEST1, PMIC_MPP_FUNC_DTEST2, | ||
| 150 | PMIC_MPP_FUNC_DTEST3, PMIC_MPP_FUNC_DTEST4, | ||
| 151 | }; | ||
| 152 | |||
| 153 | static inline struct pmic_mpp_state *to_mpp_state(struct gpio_chip *chip) | ||
| 154 | { | ||
| 155 | return container_of(chip, struct pmic_mpp_state, chip); | ||
| 156 | }; | ||
| 157 | |||
| 158 | static int pmic_mpp_read(struct pmic_mpp_state *state, | ||
| 159 | struct pmic_mpp_pad *pad, unsigned int addr) | ||
| 160 | { | ||
| 161 | unsigned int val; | ||
| 162 | int ret; | ||
| 163 | |||
| 164 | ret = regmap_read(state->map, pad->base + addr, &val); | ||
| 165 | if (ret < 0) | ||
| 166 | dev_err(state->dev, "read 0x%x failed\n", addr); | ||
| 167 | else | ||
| 168 | ret = val; | ||
| 169 | |||
| 170 | return ret; | ||
| 171 | } | ||
| 172 | |||
| 173 | static int pmic_mpp_write(struct pmic_mpp_state *state, | ||
| 174 | struct pmic_mpp_pad *pad, unsigned int addr, | ||
| 175 | unsigned int val) | ||
| 176 | { | ||
| 177 | int ret; | ||
| 178 | |||
