2 files changed, 950 insertions, 0 deletions

diff --git a/drivers/pinctrl/qcom/Makefile b/drivers/pinctrl/qcom/Makefile
index 9b49c65a1cab..bfd79af5f982 100644
--- a/drivers/pinctrl/qcom/Makefile
+++ b/drivers/pinctrl/qcom/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_PINCTRL_IPQ8064)	+= pinctrl-ipq8064.o
 obj-$(CONFIG_PINCTRL_MSM8960)   += pinctrl-msm8960.o
 obj-$(CONFIG_PINCTRL_MSM8X74)   += pinctrl-msm8x74.o
 obj-$(CONFIG_PINCTRL_QCOM_SPMI_PMIC) += pinctrl-spmi-gpio.o
+obj-$(CONFIG_PINCTRL_QCOM_SPMI_PMIC) += pinctrl-spmi-mpp.o
diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c b/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c
new file mode 100644
index 000000000000..a8924dba335e
--- /dev/null
+++ b/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c
@@ -0,0 +1,949 @@
+/*
+ * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/gpio.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/pinctrl/pinconf-generic.h>
+#include <linux/pinctrl/pinconf.h>
+#include <linux/pinctrl/pinmux.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/slab.h>
+#include <linux/types.h>
+
+#include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
+
+#include "../core.h"
+#include "../pinctrl-utils.h"
+
+#define PMIC_MPP_ADDRESS_RANGE                  0x100
+
+/*
+ * Pull Up Values - it indicates whether a pull-up should be
+ * applied for bidirectional mode only. The hardware ignores the
+ * configuration when operating in other modes.
+ */
+#define PMIC_MPP_PULL_UP_0P6KOHM                0
+#define PMIC_MPP_PULL_UP_10KOHM                 1
+#define PMIC_MPP_PULL_UP_30KOHM                 2
+#define PMIC_MPP_PULL_UP_OPEN                   3
+
+/* type registers base address bases */
+#define PMIC_MPP_REG_TYPE                       0x4
+#define PMIC_MPP_REG_SUBTYPE                    0x5
+
+/* mpp peripheral type and subtype values */
+#define PMIC_MPP_TYPE                           0x11
+#define PMIC_MPP_SUBTYPE_4CH_NO_ANA_OUT         0x3
+#define PMIC_MPP_SUBTYPE_ULT_4CH_NO_ANA_OUT     0x4
+#define PMIC_MPP_SUBTYPE_4CH_NO_SINK            0x5
+#define PMIC_MPP_SUBTYPE_ULT_4CH_NO_SINK        0x6
+#define PMIC_MPP_SUBTYPE_4CH_FULL_FUNC          0x7
+#define PMIC_MPP_SUBTYPE_8CH_FULL_FUNC          0xf
+
+#define PMIC_MPP_REG_RT_STS                     0x10
+#define PMIC_MPP_REG_RT_STS_VAL_MASK            0x1
+
+/* control register base address bases */
+#define PMIC_MPP_REG_MODE_CTL                   0x40
+#define PMIC_MPP_REG_DIG_VIN_CTL                0x41
+#define PMIC_MPP_REG_DIG_PULL_CTL               0x42
+#define PMIC_MPP_REG_DIG_IN_CTL                 0x43
+#define PMIC_MPP_REG_EN_CTL                     0x46
+#define PMIC_MPP_REG_AIN_CTL                    0x4a
+
+/* PMIC_MPP_REG_MODE_CTL */
+#define PMIC_MPP_REG_MODE_VALUE_MASK            0x1
+#define PMIC_MPP_REG_MODE_FUNCTION_SHIFT        1
+#define PMIC_MPP_REG_MODE_FUNCTION_MASK         0x7
+#define PMIC_MPP_REG_MODE_DIR_SHIFT             4
+#define PMIC_MPP_REG_MODE_DIR_MASK              0x7
+
+/* PMIC_MPP_REG_DIG_VIN_CTL */
+#define PMIC_MPP_REG_VIN_SHIFT                  0
+#define PMIC_MPP_REG_VIN_MASK                   0x7
+
+/* PMIC_MPP_REG_DIG_PULL_CTL */
+#define PMIC_MPP_REG_PULL_SHIFT                 0
+#define PMIC_MPP_REG_PULL_MASK                  0x7
+
+/* PMIC_MPP_REG_EN_CTL */
+#define PMIC_MPP_REG_MASTER_EN_SHIFT            7
+
+/* PMIC_MPP_REG_AIN_CTL */
+#define PMIC_MPP_REG_AIN_ROUTE_SHIFT            0
+#define PMIC_MPP_REG_AIN_ROUTE_MASK             0x7
+
+#define PMIC_MPP_PHYSICAL_OFFSET                1
+
+/* Qualcomm specific pin configurations */
+#define PMIC_MPP_CONF_AMUX_ROUTE                (PIN_CONFIG_END + 1)
+#define PMIC_MPP_CONF_ANALOG_MODE               (PIN_CONFIG_END + 2)
+
+/**
+ * struct pmic_mpp_pad - keep current MPP settings
+ * @base: Address base in SPMI device.
+ * @irq: IRQ number which this MPP generate.
+ * @is_enabled: Set to false when MPP should be put in high Z state.
+ * @out_value: Cached pin output value.
+ * @output_enabled: Set to true if MPP output logic is enabled.
+ * @input_enabled: Set to true if MPP input buffer logic is enabled.
+ * @analog_mode: Set to true when MPP should operate in Analog Input, Analog
+ *      Output or Bidirectional Analog mode.
+ * @num_sources: Number of power-sources supported by this MPP.
+ * @power_source: Current power-source used.
+ * @amux_input: Set the source for analog input.
+ * @pullup: Pullup resistor value. Valid in Bidirectional mode only.
+ * @function: See pmic_mpp_functions[].
+ */
+struct pmic_mpp_pad {
+        u16             base;
+        int             irq;
+        bool            is_enabled;
+        bool            out_value;
+        bool            output_enabled;
+        bool            input_enabled;
+        bool            analog_mode;
+        unsigned int    num_sources;
+        unsigned int    power_source;
+        unsigned int    amux_input;
+        unsigned int    pullup;
+        unsigned int    function;
+};
+
+struct pmic_mpp_state {
+        struct device   *dev;
+        struct regmap   *map;
+        struct pinctrl_dev *ctrl;
+        struct gpio_chip chip;
+};
+
+struct pmic_mpp_bindings {
+        const char      *property;
+        unsigned        param;
+};
+
+static struct pmic_mpp_bindings pmic_mpp_bindings[] = {
+        {"qcom,amux-route",     PMIC_MPP_CONF_AMUX_ROUTE},
+        {"qcom,analog-mode",    PMIC_MPP_CONF_ANALOG_MODE},
+};
+
+static const char *const pmic_mpp_groups[] = {
+        "mpp1", "mpp2", "mpp3", "mpp4", "mpp5", "mpp6", "mpp7", "mpp8",
+};
+
+static const char *const pmic_mpp_functions[] = {
+        PMIC_MPP_FUNC_NORMAL, PMIC_MPP_FUNC_PAIRED,
+        "reserved1", "reserved2",
+        PMIC_MPP_FUNC_DTEST1, PMIC_MPP_FUNC_DTEST2,
+        PMIC_MPP_FUNC_DTEST3, PMIC_MPP_FUNC_DTEST4,
+};
+
+static inline struct pmic_mpp_state *to_mpp_state(struct gpio_chip *chip)
+{
+        return container_of(chip, struct pmic_mpp_state, chip);
+};
+
+static int pmic_mpp_read(struct pmic_mpp_state *state,
+                         struct pmic_mpp_pad *pad, unsigned int addr)
+{
+        unsigned int val;
+        int ret;
+
+        ret = regmap_read(state->map, pad->base + addr, &val);
+        if (ret < 0)
+                dev_err(state->dev, "read 0x%x failed\n", addr);
+        else
+                ret = val;
+
+        return ret;
+}
+
+static int pmic_mpp_write(struct pmic_mpp_state *state,
+                          struct pmic_mpp_pad *pad, unsigned int addr,
+                          unsigned int val)
+{
+        int ret;
+
+        ret = regmap_write(state->map, pad->base + addr, val);
+        if (ret < 0)
+                dev_err(state->dev, "write 0x%x failed\n", addr);
+
+        return ret;