diff options
Diffstat (limited to 'arch/tile/include/asm/opcode-tile_64.h')
-rw-r--r-- | arch/tile/include/asm/opcode-tile_64.h | 1248 |
1 files changed, 1248 insertions, 0 deletions
diff --git a/arch/tile/include/asm/opcode-tile_64.h b/arch/tile/include/asm/opcode-tile_64.h new file mode 100644 index 00000000000..c0633466cd5 --- /dev/null +++ b/arch/tile/include/asm/opcode-tile_64.h | |||
@@ -0,0 +1,1248 @@ | |||
1 | /* tile.h -- Header file for TILE opcode table | ||
2 | Copyright (C) 2005 Free Software Foundation, Inc. | ||
3 | Contributed by Tilera Corp. */ | ||
4 | |||
5 | #ifndef opcode_tile_h | ||
6 | #define opcode_tile_h | ||
7 | |||
8 | typedef unsigned long long tilegx_bundle_bits; | ||
9 | |||
10 | |||
11 | enum | ||
12 | { | ||
13 | TILEGX_MAX_OPERANDS = 4 /* bfexts */ | ||
14 | }; | ||
15 | |||
16 | typedef enum | ||
17 | { | ||
18 | TILEGX_OPC_BPT, | ||
19 | TILEGX_OPC_INFO, | ||
20 | TILEGX_OPC_INFOL, | ||
21 | TILEGX_OPC_MOVE, | ||
22 | TILEGX_OPC_MOVEI, | ||
23 | TILEGX_OPC_MOVELI, | ||
24 | TILEGX_OPC_PREFETCH, | ||
25 | TILEGX_OPC_PREFETCH_ADD_L1, | ||
26 | TILEGX_OPC_PREFETCH_ADD_L1_FAULT, | ||
27 | TILEGX_OPC_PREFETCH_ADD_L2, | ||
28 | TILEGX_OPC_PREFETCH_ADD_L2_FAULT, | ||
29 | TILEGX_OPC_PREFETCH_ADD_L3, | ||
30 | TILEGX_OPC_PREFETCH_ADD_L3_FAULT, | ||
31 | TILEGX_OPC_PREFETCH_L1, | ||
32 | TILEGX_OPC_PREFETCH_L1_FAULT, | ||
33 | TILEGX_OPC_PREFETCH_L2, | ||
34 | TILEGX_OPC_PREFETCH_L2_FAULT, | ||
35 | TILEGX_OPC_PREFETCH_L3, | ||
36 | TILEGX_OPC_PREFETCH_L3_FAULT, | ||
37 | TILEGX_OPC_RAISE, | ||
38 | TILEGX_OPC_ADD, | ||
39 | TILEGX_OPC_ADDI, | ||
40 | TILEGX_OPC_ADDLI, | ||
41 | TILEGX_OPC_ADDX, | ||
42 | TILEGX_OPC_ADDXI, | ||
43 | TILEGX_OPC_ADDXLI, | ||
44 | TILEGX_OPC_ADDXSC, | ||
45 | TILEGX_OPC_AND, | ||
46 | TILEGX_OPC_ANDI, | ||
47 | TILEGX_OPC_BEQZ, | ||
48 | TILEGX_OPC_BEQZT, | ||
49 | TILEGX_OPC_BFEXTS, | ||
50 | TILEGX_OPC_BFEXTU, | ||
51 | TILEGX_OPC_BFINS, | ||
52 | TILEGX_OPC_BGEZ, | ||
53 | TILEGX_OPC_BGEZT, | ||
54 | TILEGX_OPC_BGTZ, | ||
55 | TILEGX_OPC_BGTZT, | ||
56 | TILEGX_OPC_BLBC, | ||
57 | TILEGX_OPC_BLBCT, | ||
58 | TILEGX_OPC_BLBS, | ||
59 | TILEGX_OPC_BLBST, | ||
60 | TILEGX_OPC_BLEZ, | ||
61 | TILEGX_OPC_BLEZT, | ||
62 | TILEGX_OPC_BLTZ, | ||
63 | TILEGX_OPC_BLTZT, | ||
64 | TILEGX_OPC_BNEZ, | ||
65 | TILEGX_OPC_BNEZT, | ||
66 | TILEGX_OPC_CLZ, | ||
67 | TILEGX_OPC_CMOVEQZ, | ||
68 | TILEGX_OPC_CMOVNEZ, | ||
69 | TILEGX_OPC_CMPEQ, | ||
70 | TILEGX_OPC_CMPEQI, | ||
71 | TILEGX_OPC_CMPEXCH, | ||
72 | TILEGX_OPC_CMPEXCH4, | ||
73 | TILEGX_OPC_CMPLES, | ||
74 | TILEGX_OPC_CMPLEU, | ||
75 | TILEGX_OPC_CMPLTS, | ||
76 | TILEGX_OPC_CMPLTSI, | ||
77 | TILEGX_OPC_CMPLTU, | ||
78 | TILEGX_OPC_CMPLTUI, | ||
79 | TILEGX_OPC_CMPNE, | ||
80 | TILEGX_OPC_CMUL, | ||
81 | TILEGX_OPC_CMULA, | ||
82 | TILEGX_OPC_CMULAF, | ||
83 | TILEGX_OPC_CMULF, | ||
84 | TILEGX_OPC_CMULFR, | ||
85 | TILEGX_OPC_CMULH, | ||
86 | TILEGX_OPC_CMULHR, | ||
87 | TILEGX_OPC_CRC32_32, | ||
88 | TILEGX_OPC_CRC32_8, | ||
89 | TILEGX_OPC_CTZ, | ||
90 | TILEGX_OPC_DBLALIGN, | ||
91 | TILEGX_OPC_DBLALIGN2, | ||
92 | TILEGX_OPC_DBLALIGN4, | ||
93 | TILEGX_OPC_DBLALIGN6, | ||
94 | TILEGX_OPC_DRAIN, | ||
95 | TILEGX_OPC_DTLBPR, | ||
96 | TILEGX_OPC_EXCH, | ||
97 | TILEGX_OPC_EXCH4, | ||
98 | TILEGX_OPC_FDOUBLE_ADD_FLAGS, | ||
99 | TILEGX_OPC_FDOUBLE_ADDSUB, | ||
100 | TILEGX_OPC_FDOUBLE_MUL_FLAGS, | ||
101 | TILEGX_OPC_FDOUBLE_PACK1, | ||
102 | TILEGX_OPC_FDOUBLE_PACK2, | ||
103 | TILEGX_OPC_FDOUBLE_SUB_FLAGS, | ||
104 | TILEGX_OPC_FDOUBLE_UNPACK_MAX, | ||
105 | TILEGX_OPC_FDOUBLE_UNPACK_MIN, | ||
106 | TILEGX_OPC_FETCHADD, | ||
107 | TILEGX_OPC_FETCHADD4, | ||
108 | TILEGX_OPC_FETCHADDGEZ, | ||
109 | TILEGX_OPC_FETCHADDGEZ4, | ||
110 | TILEGX_OPC_FETCHAND, | ||
111 | TILEGX_OPC_FETCHAND4, | ||
112 | TILEGX_OPC_FETCHOR, | ||
113 | TILEGX_OPC_FETCHOR4, | ||
114 | TILEGX_OPC_FINV, | ||
115 | TILEGX_OPC_FLUSH, | ||
116 | TILEGX_OPC_FLUSHWB, | ||
117 | TILEGX_OPC_FNOP, | ||
118 | TILEGX_OPC_FSINGLE_ADD1, | ||
119 | TILEGX_OPC_FSINGLE_ADDSUB2, | ||
120 | TILEGX_OPC_FSINGLE_MUL1, | ||
121 | TILEGX_OPC_FSINGLE_MUL2, | ||
122 | TILEGX_OPC_FSINGLE_PACK1, | ||
123 | TILEGX_OPC_FSINGLE_PACK2, | ||
124 | TILEGX_OPC_FSINGLE_SUB1, | ||
125 | TILEGX_OPC_ICOH, | ||
126 | TILEGX_OPC_ILL, | ||
127 | TILEGX_OPC_INV, | ||
128 | TILEGX_OPC_IRET, | ||
129 | TILEGX_OPC_J, | ||
130 | TILEGX_OPC_JAL, | ||
131 | TILEGX_OPC_JALR, | ||
132 | TILEGX_OPC_JALRP, | ||
133 | TILEGX_OPC_JR, | ||
134 | TILEGX_OPC_JRP, | ||
135 | TILEGX_OPC_LD, | ||
136 | TILEGX_OPC_LD1S, | ||
137 | TILEGX_OPC_LD1S_ADD, | ||
138 | TILEGX_OPC_LD1U, | ||
139 | TILEGX_OPC_LD1U_ADD, | ||
140 | TILEGX_OPC_LD2S, | ||
141 | TILEGX_OPC_LD2S_ADD, | ||
142 | TILEGX_OPC_LD2U, | ||
143 | TILEGX_OPC_LD2U_ADD, | ||
144 | TILEGX_OPC_LD4S, | ||
145 | TILEGX_OPC_LD4S_ADD, | ||
146 | TILEGX_OPC_LD4U, | ||
147 | TILEGX_OPC_LD4U_ADD, | ||
148 | TILEGX_OPC_LD_ADD, | ||
149 | TILEGX_OPC_LDNA, | ||
150 | TILEGX_OPC_LDNA_ADD, | ||
151 | TILEGX_OPC_LDNT, | ||
152 | TILEGX_OPC_LDNT1S, | ||
153 | TILEGX_OPC_LDNT1S_ADD, | ||
154 | TILEGX_OPC_LDNT1U, | ||
155 | TILEGX_OPC_LDNT1U_ADD, | ||
156 | TILEGX_OPC_LDNT2S, | ||
157 | TILEGX_OPC_LDNT2S_ADD, | ||
158 | TILEGX_OPC_LDNT2U, | ||
159 | TILEGX_OPC_LDNT2U_ADD, | ||
160 | TILEGX_OPC_LDNT4S, | ||
161 | TILEGX_OPC_LDNT4S_ADD, | ||
162 | TILEGX_OPC_LDNT4U, | ||
163 | TILEGX_OPC_LDNT4U_ADD, | ||
164 | TILEGX_OPC_LDNT_ADD, | ||
165 | TILEGX_OPC_LNK, | ||
166 | TILEGX_OPC_MF, | ||
167 | TILEGX_OPC_MFSPR, | ||
168 | TILEGX_OPC_MM, | ||
169 | TILEGX_OPC_MNZ, | ||
170 | TILEGX_OPC_MTSPR, | ||
171 | TILEGX_OPC_MUL_HS_HS, | ||
172 | TILEGX_OPC_MUL_HS_HU, | ||
173 | TILEGX_OPC_MUL_HS_LS, | ||
174 | TILEGX_OPC_MUL_HS_LU, | ||
175 | TILEGX_OPC_MUL_HU_HU, | ||
176 | TILEGX_OPC_MUL_HU_LS, | ||
177 | TILEGX_OPC_MUL_HU_LU, | ||
178 | TILEGX_OPC_MUL_LS_LS, | ||
179 | TILEGX_OPC_MUL_LS_LU, | ||
180 | TILEGX_OPC_MUL_LU_LU, | ||
181 | TILEGX_OPC_MULA_HS_HS, | ||
182 | TILEGX_OPC_MULA_HS_HU, | ||
183 | TILEGX_OPC_MULA_HS_LS, | ||
184 | TILEGX_OPC_MULA_HS_LU, | ||
185 | TILEGX_OPC_MULA_HU_HU, | ||
186 | TILEGX_OPC_MULA_HU_LS, | ||
187 | TILEGX_OPC_MULA_HU_LU, | ||
188 | TILEGX_OPC_MULA_LS_LS, | ||
189 | TILEGX_OPC_MULA_LS_LU, | ||
190 | TILEGX_OPC_MULA_LU_LU, | ||
191 | TILEGX_OPC_MULAX, | ||
192 | TILEGX_OPC_MULX, | ||
193 | TILEGX_OPC_MZ, | ||
194 | TILEGX_OPC_NAP, | ||
195 | TILEGX_OPC_NOP, | ||
196 | TILEGX_OPC_NOR, | ||
197 | TILEGX_OPC_OR, | ||
198 | TILEGX_OPC_ORI, | ||
199 | TILEGX_OPC_PCNT, | ||
200 | TILEGX_OPC_REVBITS, | ||
201 | TILEGX_OPC_REVBYTES, | ||
202 | TILEGX_OPC_ROTL, | ||
203 | TILEGX_OPC_ROTLI, | ||
204 | TILEGX_OPC_SHL, | ||
205 | TILEGX_OPC_SHL16INSLI, | ||
206 | TILEGX_OPC_SHL1ADD, | ||
207 | TILEGX_OPC_SHL1ADDX, | ||
208 | TILEGX_OPC_SHL2ADD, | ||
209 | TILEGX_OPC_SHL2ADDX, | ||
210 | TILEGX_OPC_SHL3ADD, | ||
211 | TILEGX_OPC_SHL3ADDX, | ||
212 | TILEGX_OPC_SHLI, | ||
213 | TILEGX_OPC_SHLX, | ||
214 | TILEGX_OPC_SHLXI, | ||
215 | TILEGX_OPC_SHRS, | ||
216 | TILEGX_OPC_SHRSI, | ||
217 | TILEGX_OPC_SHRU, | ||
218 | TILEGX_OPC_SHRUI, | ||
219 | TILEGX_OPC_SHRUX, | ||
220 | TILEGX_OPC_SHRUXI, | ||
221 | TILEGX_OPC_SHUFFLEBYTES, | ||
222 | TILEGX_OPC_ST, | ||
223 | TILEGX_OPC_ST1, | ||
224 | TILEGX_OPC_ST1_ADD, | ||
225 | TILEGX_OPC_ST2, | ||
226 | TILEGX_OPC_ST2_ADD, | ||
227 | TILEGX_OPC_ST4, | ||
228 | TILEGX_OPC_ST4_ADD, | ||
229 | TILEGX_OPC_ST_ADD, | ||
230 | TILEGX_OPC_STNT, | ||
231 | TILEGX_OPC_STNT1, | ||
232 | TILEGX_OPC_STNT1_ADD, | ||
233 | TILEGX_OPC_STNT2, | ||
234 | TILEGX_OPC_STNT2_ADD, | ||
235 | TILEGX_OPC_STNT4, | ||
236 | TILEGX_OPC_STNT4_ADD, | ||
237 | TILEGX_OPC_STNT_ADD, | ||
238 | TILEGX_OPC_SUB, | ||
239 | TILEGX_OPC_SUBX, | ||
240 | TILEGX_OPC_SUBXSC, | ||
241 | TILEGX_OPC_SWINT0, | ||
242 | TILEGX_OPC_SWINT1, | ||
243 | TILEGX_OPC_SWINT2, | ||
244 | TILEGX_OPC_SWINT3, | ||
245 | TILEGX_OPC_TBLIDXB0, | ||
246 | TILEGX_OPC_TBLIDXB1, | ||
247 | TILEGX_OPC_TBLIDXB2, | ||
248 | TILEGX_OPC_TBLIDXB3, | ||
249 | TILEGX_OPC_V1ADD, | ||
250 | TILEGX_OPC_V1ADDI, | ||
251 | TILEGX_OPC_V1ADDUC, | ||
252 | TILEGX_OPC_V1ADIFFU, | ||
253 | TILEGX_OPC_V1AVGU, | ||
254 | TILEGX_OPC_V1CMPEQ, | ||
255 | TILEGX_OPC_V1CMPEQI, | ||
256 | TILEGX_OPC_V1CMPLES, | ||
257 | TILEGX_OPC_V1CMPLEU, | ||
258 | TILEGX_OPC_V1CMPLTS, | ||
259 | TILEGX_OPC_V1CMPLTSI, | ||
260 | TILEGX_OPC_V1CMPLTU, | ||
261 | TILEGX_OPC_V1CMPLTUI, | ||
262 | TILEGX_OPC_V1CMPNE, | ||
263 | TILEGX_OPC_V1DDOTPU, | ||
264 | TILEGX_OPC_V1DDOTPUA, | ||
265 | TILEGX_OPC_V1DDOTPUS, | ||
266 | TILEGX_OPC_V1DDOTPUSA, | ||
267 | TILEGX_OPC_V1DOTP, | ||
268 | TILEGX_OPC_V1DOTPA, | ||
269 | TILEGX_OPC_V1DOTPU, | ||
270 | TILEGX_OPC_V1DOTPUA, | ||
271 | TILEGX_OPC_V1DOTPUS, | ||
272 | TILEGX_OPC_V1DOTPUSA, | ||
273 | TILEGX_OPC_V1INT_H, | ||
274 | TILEGX_OPC_V1INT_L, | ||
275 | TILEGX_OPC_V1MAXU, | ||
276 | TILEGX_OPC_V1MAXUI, | ||
277 | TILEGX_OPC_V1MINU, | ||
278 | TILEGX_OPC_V1MINUI, | ||
279 | TILEGX_OPC_V1MNZ, | ||
280 | TILEGX_OPC_V1MULTU, | ||
281 | TILEGX_OPC_V1MULU, | ||
282 | TILEGX_OPC_V1MULUS, | ||
283 | TILEGX_OPC_V1MZ, | ||
284 | TILEGX_OPC_V1SADAU, | ||
285 | TILEGX_OPC_V1SADU, | ||
286 | TILEGX_OPC_V1SHL, | ||
287 | TILEGX_OPC_V1SHLI, | ||
288 | TILEGX_OPC_V1SHRS, | ||
289 | TILEGX_OPC_V1SHRSI, | ||
290 | TILEGX_OPC_V1SHRU, | ||
291 | TILEGX_OPC_V1SHRUI, | ||
292 | TILEGX_OPC_V1SUB, | ||
293 | TILEGX_OPC_V1SUBUC, | ||
294 | TILEGX_OPC_V2ADD, | ||
295 | TILEGX_OPC_V2ADDI, | ||
296 | TILEGX_OPC_V2ADDSC, | ||
297 | TILEGX_OPC_V2ADIFFS, | ||
298 | TILEGX_OPC_V2AVGS, | ||
299 | TILEGX_OPC_V2CMPEQ, | ||
300 | TILEGX_OPC_V2CMPEQI, | ||
301 | TILEGX_OPC_V2CMPLES, | ||
302 | TILEGX_OPC_V2CMPLEU, | ||
303 | TILEGX_OPC_V2CMPLTS, | ||
304 | TILEGX_OPC_V2CMPLTSI, | ||
305 | TILEGX_OPC_V2CMPLTU, | ||
306 | TILEGX_OPC_V2CMPLTUI, | ||
307 | TILEGX_OPC_V2CMPNE, | ||
308 | TILEGX_OPC_V2DOTP, | ||
309 | TILEGX_OPC_V2DOTPA, | ||
310 | TILEGX_OPC_V2INT_H, | ||
311 | TILEGX_OPC_V2INT_L, | ||
312 | TILEGX_OPC_V2MAXS, | ||
313 | TILEGX_OPC_V2MAXSI, | ||
314 | TILEGX_OPC_V2MINS, | ||
315 | TILEGX_OPC_V2MINSI, | ||
316 | TILEGX_OPC_V2MNZ, | ||
317 | TILEGX_OPC_V2MULFSC, | ||
318 | TILEGX_OPC_V2MULS, | ||
319 | TILEGX_OPC_V2MULTS, | ||
320 | TILEGX_OPC_V2MZ, | ||
321 | TILEGX_OPC_V2PACKH, | ||
322 | TILEGX_OPC_V2PACKL, | ||
323 | TILEGX_OPC_V2PACKUC, | ||
324 | TILEGX_OPC_V2SADAS, | ||
325 | TILEGX_OPC_V2SADAU, | ||
326 | TILEGX_OPC_V2SADS, | ||
327 | TILEGX_OPC_V2SADU, | ||
328 | TILEGX_OPC_V2SHL, | ||
329 | TILEGX_OPC_V2SHLI, | ||
330 | TILEGX_OPC_V2SHLSC, | ||
331 | TILEGX_OPC_V2SHRS, | ||
332 | TILEGX_OPC_V2SHRSI, | ||
333 | TILEGX_OPC_V2SHRU, | ||
334 | TILEGX_OPC_V2SHRUI, | ||
335 | TILEGX_OPC_V2SUB, | ||
336 | TILEGX_OPC_V2SUBSC, | ||
337 | TILEGX_OPC_V4ADD, | ||
338 | TILEGX_OPC_V4ADDSC, | ||
339 | TILEGX_OPC_V4INT_H, | ||
340 | TILEGX_OPC_V4INT_L, | ||
341 | TILEGX_OPC_V4PACKSC, | ||
342 | TILEGX_OPC_V4SHL, | ||
343 | TILEGX_OPC_V4SHLSC, | ||
344 | TILEGX_OPC_V4SHRS, | ||
345 | TILEGX_OPC_V4SHRU, | ||
346 | TILEGX_OPC_V4SUB, | ||
347 | TILEGX_OPC_V4SUBSC, | ||
348 | TILEGX_OPC_WH64, | ||
349 | TILEGX_OPC_XOR, | ||
350 | TILEGX_OPC_XORI, | ||
351 | TILEGX_OPC_NONE | ||
352 | } tilegx_mnemonic; | ||
353 | |||
354 | /* 64-bit pattern for a { bpt ; nop } bundle. */ | ||
355 | #define TILEGX_BPT_BUNDLE 0x286a44ae51485000ULL | ||
356 | |||
357 | |||
358 | #define TILE_ELF_MACHINE_CODE EM_TILE64 | ||
359 | |||
360 | #define TILE_ELF_NAME "elf32-tile64" | ||
361 | |||
362 | |||
363 | static __inline unsigned int | ||
364 | get_BFEnd_X0(tilegx_bundle_bits num) | ||
365 | { | ||
366 | const unsigned int n = (unsigned int)num; | ||
367 | return (((n >> 12)) & 0x3f); | ||
368 | } | ||
369 | |||
370 | static __inline unsigned int | ||
371 | get_BFOpcodeExtension_X0(tilegx_bundle_bits num) | ||
372 | { | ||
373 | const unsigned int n = (unsigned int)num; | ||
374 | return (((n >> 24)) & 0xf); | ||
375 | } | ||
376 | |||
377 | static __inline unsigned int | ||
378 | get_BFStart_X0(tilegx_bundle_bits num) | ||
379 | { | ||
380 | const unsigned int n = (unsigned int)num; | ||
381 | return (((n >> 18)) & 0x3f); | ||
382 | } | ||
383 | |||
384 | static __inline unsigned int | ||
385 | get_BrOff_X1(tilegx_bundle_bits n) | ||
386 | { | ||
387 | return (((unsigned int)(n >> 31)) & 0x0000003f) | | ||
388 | (((unsigned int)(n >> 37)) & 0x0001ffc0); | ||
389 | } | ||
390 | |||
391 | static __inline unsigned int | ||
392 | get_BrType_X1(tilegx_bundle_bits n) | ||
393 | { | ||
394 | return (((unsigned int)(n >> 54)) & 0x1f); | ||
395 | } | ||
396 | |||
397 | static __inline unsigned int | ||
398 | get_Dest_Imm8_X1(tilegx_bundle_bits n) | ||
399 | { | ||
400 | return (((unsigned int)(n >> 31)) & 0x0000003f) | | ||
401 | (((unsigned int)(n >> 43)) & 0x000000c0); | ||
402 | } | ||
403 | |||
404 | static __inline unsigned int | ||
405 | get_Dest_X0(tilegx_bundle_bits num) | ||
406 | { | ||
407 | const unsigned int n = (unsigned int)num; | ||
408 | return (((n >> 0)) & 0x3f); | ||
409 | } | ||
410 | |||
411 | static __inline unsigned int | ||
412 | get_Dest_X1(tilegx_bundle_bits n) | ||
413 | { | ||
414 | return (((unsigned int)(n >> 31)) & 0x3f); | ||
415 | } | ||
416 | |||
417 | static __inline unsigned int | ||
418 | get_Dest_Y0(tilegx_bundle_bits num) | ||
419 | { | ||
420 | const unsigned int n = (unsigned int)num; | ||
421 | return (((n >> 0)) & 0x3f); | ||
422 | } | ||
423 | |||
424 | static __inline unsigned int | ||
425 | get_Dest_Y1(tilegx_bundle_bits n) | ||
426 | { | ||
427 | return (((unsigned int)(n >> 31)) & 0x3f); | ||
428 | } | ||
429 | |||
430 | static __inline unsigned int | ||
431 | get_Imm16_X0(tilegx_bundle_bits num) | ||
432 | { | ||
433 | const unsigned int n = (unsigned int)num; | ||
434 | return (((n >> 12)) & 0xffff); | ||
435 | } | ||
436 | |||
437 | static __inline unsigned int | ||
438 | get_Imm16_X1(tilegx_bundle_bits n) | ||
439 | { | ||
440 | return (((unsigned int)(n >> 43)) & 0xffff); | ||
441 | } | ||
442 | |||
443 | static __inline unsigned int | ||
444 | get_Imm8OpcodeExtension_X0(tilegx_bundle_bits num) | ||
445 | { | ||
446 | const unsigned int n = (unsigned int)num; | ||
447 | return (((n >> 20)) & 0xff); | ||
448 | } | ||
449 | |||
450 | static __inline unsigned int | ||
451 | get_Imm8OpcodeExtension_X1(tilegx_bundle_bits n) | ||
452 | { | ||
453 | return (((unsigned int)(n >> 51)) & 0xff); | ||
454 | } | ||
455 | |||
456 | static __inline unsigned int | ||
457 | get_Imm8_X0(tilegx_bundle_bits num) | ||
458 | { | ||
459 | const unsigned int n = (unsigned int)num; | ||
460 | return (((n >> 12)) & 0xff); | ||
461 | } | ||
462 | |||
463 | static __inline unsigned int | ||
464 | get_Imm8_X1(tilegx_bundle_bits n) | ||
465 | { | ||
466 | return (((unsigned int)(n >> 43)) & 0xff); | ||
467 | } | ||
468 | |||
469 | static __inline unsigned int | ||
470 | get_Imm8_Y0(tilegx_bundle_bits num) | ||
471 | { | ||
472 | const unsigned int n = (unsigned int)num; | ||
473 | return (((n >> 12)) & 0xff); | ||
474 | } | ||
475 | |||
476 | static __inline unsigned int | ||
477 | get_Imm8_Y1(tilegx_bundle_bits n) | ||
478 | { | ||
479 | return (((unsigned int)(n >> 43)) & 0xff); | ||
480 | } | ||
481 | |||
482 | static __inline unsigned int | ||
483 | get_JumpOff_X1(tilegx_bundle_bits n) | ||
484 | { | ||
485 | return (((unsigned int)(n >> 31)) & 0x7ffffff); | ||
486 | } | ||
487 | |||
488 | static __inline unsigned int | ||
489 | get_JumpOpcodeExtension_X1(tilegx_bundle_bits n) | ||
490 | { | ||
491 | return (((unsigned int)(n >> 58)) & 0x1); | ||
492 | } | ||
493 | |||
494 | static __inline unsigned int | ||
495 | get_MF_Imm14_X1(tilegx_bundle_bits n) | ||
496 | { | ||
497 | return (((unsigned int)(n >> 37)) & 0x3fff); | ||
498 | } | ||
499 | |||
500 | static __inline unsigned int | ||
501 | get_MT_Imm14_X1(tilegx_bundle_bits n) | ||
502 | { | ||
503 | return (((unsigned int)(n >> 31)) & 0x0000003f) | | ||
504 | (((unsigned int)(n >> 37)) & 0x00003fc0); | ||
505 | } | ||
506 | |||
507 | static __inline unsigned int | ||
508 | get_Mode(tilegx_bundle_bits n) | ||
509 | { | ||
510 | return (((unsigned int)(n >> 62)) & 0x3); | ||
511 | } | ||
512 | |||
513 | static __inline unsigned int | ||
514 | get_Opcode_X0(tilegx_bundle_bits num) | ||
515 | { | ||
516 | const unsigned int n = (unsigned int)num; | ||
517 | return (((n >> 28)) & 0x7); | ||
518 | } | ||
519 | |||
520 | static __inline unsigned int | ||
521 | get_Opcode_X1(tilegx_bundle_bits n) | ||
522 | { | ||
523 | return (((unsigned int)(n >> 59)) & 0x7); | ||
524 | } | ||
525 | |||
526 | static __inline unsigned int | ||
527 | get_Opcode_Y0(tilegx_bundle_bits num) | ||
528 | { | ||
529 | const unsigned int n = (unsigned int)num; | ||
530 | return (((n >> 27)) & 0xf); | ||
531 | } | ||
532 | |||
533 | static __inline unsigned int | ||
534 | get_Opcode_Y1(tilegx_bundle_bits n) | ||
535 | { | ||
536 | return (((unsigned int)(n >> 58)) & 0xf); | ||
537 | } | ||
538 | |||
539 | static __inline unsigned int | ||
540 | get_Opcode_Y2(tilegx_bundle_bits n) | ||
541 | { | ||
542 | return (((n >> 26)) & 0x00000001) | | ||
543 | (((unsigned int)(n >> 56)) & 0x00000002); | ||
544 | } | ||
545 | |||
546 | static __inline unsigned int | ||
547 | get_RRROpcodeExtension_X0(tilegx_bundle_bits num) | ||
548 | { | ||
549 | const unsigned int n = (unsigned int)num; | ||
550 | return (((n >> 18)) & 0x3ff); | ||
551 | } | ||
552 | |||
553 | static __inline unsigned int | ||
554 | get_RRROpcodeExtension_X1(tilegx_bundle_bits n) | ||
555 | { | ||
556 | return (((unsigned int)(n >> 49)) & 0x3ff); | ||
557 | } | ||
558 | |||
559 | static __inline unsigned int | ||
560 | get_RRROpcodeExtension_Y0(tilegx_bundle_bits num) | ||
561 | { | ||
562 | const unsigned int n = (unsigned int)num; | ||
563 | return (((n >> 18)) & 0x3); | ||
564 | } | ||
565 | |||
566 | static __inline unsigned int | ||
567 | get_RRROpcodeExtension_Y1(tilegx_bundle_bits n) | ||
568 | { | ||
569 | return (((unsigned int)(n >> 49)) & 0x3); | ||
570 | } | ||
571 | |||
572 | static __inline unsigned int | ||
573 | get_ShAmt_X0(tilegx_bundle_bits num) | ||
574 | { | ||
575 | const unsigned int n = (unsigned int)num; | ||
576 | return (((n >> 12)) & 0x3f); | ||
577 | } | ||
578 | |||
579 | static __inline unsigned int | ||
580 | get_ShAmt_X1(tilegx_bundle_bits n) | ||
581 | { | ||
582 | return (((unsigned int)(n >> 43)) & 0x3f); | ||
583 | } | ||
584 | |||
585 | static __inline unsigned int | ||
586 | get_ShAmt_Y0(tilegx_bundle_bits num) | ||
587 | { | ||
588 | const unsigned int n = (unsigned int)num; | ||
589 | return (((n >> 12)) & 0x3f); | ||
590 | } | ||
591 | |||
592 | static __inline unsigned int | ||
593 | get_ShAmt_Y1(tilegx_bundle_bits n) | ||
594 | { | ||
595 | return (((unsigned int)(n >> 43)) & 0x3f); | ||
596 | } | ||
597 | |||
598 | static __inline unsigned int | ||
599 | get_ShiftOpcodeExtension_X0(tilegx_bundle_bits num) | ||
600 | { | ||
601 | const unsigned int n = (unsigned int)num; | ||
602 | return (((n >> 18)) & 0x3ff); | ||
603 | } | ||
604 | |||
605 | static __inline unsigned int | ||
606 | get_ShiftOpcodeExtension_X1(tilegx_bundle_bits n) | ||
607 | { | ||
608 | return (((unsigned int)(n >> 49)) & 0x3ff); | ||
609 | } | ||
610 | |||
611 | static __inline unsigned int | ||
612 | get_ShiftOpcodeExtension_Y0(tilegx_bundle_bits num) | ||
613 | { | ||
614 | const unsigned int n = (unsigned int)num; | ||
615 | return (((n >> 18)) & 0x3); | ||
616 | } | ||
617 | |||
618 | static __inline unsigned int | ||
619 | get_ShiftOpcodeExtension_Y1(tilegx_bundle_bits n) | ||
620 | { | ||
621 | return (((unsigned int)(n >> 49)) & 0x3); | ||
622 | } | ||
623 | |||
624 | static __inline unsigned int | ||
625 | get_SrcA_X0(tilegx_bundle_bits num) | ||
626 | { | ||
627 | const unsigned int n = (unsigned int)num; | ||
628 | return (((n >> 6)) & 0x3f); | ||
629 | } | ||
630 | |||
631 | static __inline unsigned int | ||
632 | get_SrcA_X1(tilegx_bundle_bits n) | ||
633 | { | ||
634 | return (((unsigned int)(n >> 37)) & 0x3f); | ||
635 | } | ||
636 | |||
637 | static __inline unsigned int | ||
638 | get_SrcA_Y0(tilegx_bundle_bits num) | ||
639 | { | ||
640 | const unsigned int n = (unsigned int)num; | ||
641 | return (((n >> 6)) & 0x3f); | ||
642 | } | ||
643 | |||
644 | static __inline unsigned int | ||
645 | get_SrcA_Y1(tilegx_bundle_bits n) | ||
646 | { | ||
647 | return (((unsigned int)(n >> 37)) & 0x3f); | ||
648 | } | ||
649 | |||
650 | static __inline unsigned int | ||
651 | get_SrcA_Y2(tilegx_bundle_bits num) | ||
652 | { | ||
653 | const unsigned int n = (unsigned int)num; | ||
654 | return (((n >> 20)) & 0x3f); | ||
655 | } | ||
656 | |||
657 | static __inline unsigned int | ||
658 | get_SrcBDest_Y2(tilegx_bundle_bits n) | ||
659 | { | ||
660 | return (((unsigned int)(n >> 51)) & 0x3f); | ||
661 | } | ||
662 | |||
663 | static __inline unsigned int | ||
664 | get_SrcB_X0(tilegx_bundle_bits num) | ||
665 | { | ||
666 | const unsigned int n = (unsigned int)num; | ||
667 | return (((n >> 12)) & 0x3f); | ||
668 | } | ||
669 | |||
670 | static __inline unsigned int | ||
671 | get_SrcB_X1(tilegx_bundle_bits n) | ||
672 | { | ||
673 | return (((unsigned int)(n >> 43)) & 0x3f); | ||
674 | } | ||
675 | |||
676 | static __inline unsigned int | ||
677 | get_SrcB_Y0(tilegx_bundle_bits num) | ||
678 | { | ||
679 | const unsigned int n = (unsigned int)num; | ||
680 | return (((n >> 12)) & 0x3f); | ||
681 | } | ||
682 | |||
683 | static __inline unsigned int | ||
684 | get_SrcB_Y1(tilegx_bundle_bits n) | ||
685 | { | ||
686 | return (((unsigned int)(n >> 43)) & 0x3f); | ||
687 | } | ||
688 | |||
689 | static __inline unsigned int | ||
690 | get_UnaryOpcodeExtension_X0(tilegx_bundle_bits num) | ||
691 | { | ||
692 | const unsigned int n = (unsigned int)num; | ||
693 | return (((n >> 12)) & 0x3f); | ||
694 | } | ||
695 | |||
696 | static __inline unsigned int | ||
697 | get_UnaryOpcodeExtension_X1(tilegx_bundle_bits n) | ||
698 | { | ||
699 | return (((unsigned int)(n >> 43)) & 0x3f); | ||
700 | } | ||
701 | |||
702 | static __inline unsigned int | ||
703 | get_UnaryOpcodeExtension_Y0(tilegx_bundle_bits num) | ||
704 | { | ||
705 | const unsigned int n = (unsigned int)num; | ||
706 | return (((n >> 12)) & 0x3f); | ||
707 | } | ||
708 | |||
709 | static __inline unsigned int | ||
710 | get_UnaryOpcodeExtension_Y1(tilegx_bundle_bits n) | ||
711 | { | ||
712 | return (((unsigned int)(n >> 43)) & 0x3f); | ||
713 | } | ||
714 | |||
715 | |||
716 | static __inline int | ||
717 | sign_extend(int n, int num_bits) | ||
718 | { | ||
719 | int shift = (int)(sizeof(int) * 8 - num_bits); | ||
720 | return (n << shift) >> shift; | ||
721 | } | ||
722 | |||
723 | |||
724 | |||
725 | static __inline tilegx_bundle_bits | ||
726 | create_BFEnd_X0(int num) | ||
727 | { | ||
728 | const unsigned int n = (unsigned int)num; | ||
729 | return ((n & 0x3f) << 12); | ||
730 | } | ||
731 | |||
732 | static __inline tilegx_bundle_bits | ||
733 | create_BFOpcodeExtension_X0(int num) | ||
734 | { | ||
735 | const unsigned int n = (unsigned int)num; | ||
736 | return ((n & 0xf) << 24); | ||
737 | } | ||
738 | |||
739 | static __inline tilegx_bundle_bits | ||
740 | create_BFStart_X0(int num) | ||
741 | { | ||
742 | const unsigned int n = (unsigned int)num; | ||
743 | return ((n & 0x3f) << 18); | ||
744 | } | ||
745 | |||
746 | static __inline tilegx_bundle_bits | ||
747 | create_BrOff_X1(int num) | ||
748 | { | ||
749 | const unsigned int n = (unsigned int)num; | ||
750 | return (((tilegx_bundle_bits)(n & 0x0000003f)) << 31) | | ||
751 | (((tilegx_bundle_bits)(n & 0x0001ffc0)) << 37); | ||
752 | } | ||
753 | |||
754 | static __inline tilegx_bundle_bits | ||
755 | create_BrType_X1(int num) | ||
756 | { | ||
757 | const unsigned int n = (unsigned int)num; | ||
758 | return (((tilegx_bundle_bits)(n & 0x1f)) << 54); | ||
759 | } | ||
760 | |||
761 | static __inline tilegx_bundle_bits | ||
762 | create_Dest_Imm8_X1(int num) | ||
763 | { | ||
764 | const unsigned int n = (unsigned int)num; | ||
765 | return (((tilegx_bundle_bits)(n & 0x0000003f)) << 31) | | ||
766 | (((tilegx_bundle_bits)(n & 0x000000c0)) << 43); | ||
767 | } | ||
768 | |||
769 | static __inline tilegx_bundle_bits | ||
770 | create_Dest_X0(int num) | ||
771 | { | ||
772 | const unsigned int n = (unsigned int)num; | ||
773 | return ((n & 0x3f) << 0); | ||
774 | } | ||
775 | |||
776 | static __inline tilegx_bundle_bits | ||
777 | create_Dest_X1(int num) | ||
778 | { | ||
779 | const unsigned int n = (unsigned int)num; | ||
780 | return (((tilegx_bundle_bits)(n & 0x3f)) << 31); | ||
781 | } | ||
782 | |||
783 | static __inline tilegx_bundle_bits | ||
784 | create_Dest_Y0(int num) | ||
785 | { | ||
786 | const unsigned int n = (unsigned int)num; | ||
787 | return ((n & 0x3f) << 0); | ||
788 | } | ||
789 | |||
790 | static __inline tilegx_bundle_bits | ||
791 | create_Dest_Y1(int num) | ||
792 | { | ||
793 | const unsigned int n = (unsigned int)num; | ||
794 | return (((tilegx_bundle_bits)(n & 0x3f)) << 31); | ||
795 | } | ||
796 | |||
797 | static __inline tilegx_bundle_bits | ||
798 | create_Imm16_X0(int num) | ||
799 | { | ||
800 | const unsigned int n = (unsigned int)num; | ||
801 | return ((n & 0xffff) << 12); | ||
802 | } | ||
803 | |||
804 | static __inline tilegx_bundle_bits | ||
805 | create_Imm16_X1(int num) | ||
806 | { | ||
807 | const unsigned int n = (unsigned int)num; | ||
808 | return (((tilegx_bundle_bits)(n & 0xffff)) << 43); | ||
809 | } | ||
810 | |||
811 | static __inline tilegx_bundle_bits | ||
812 | create_Imm8OpcodeExtension_X0(int num) | ||
813 | { | ||
814 | const unsigned int n = (unsigned int)num; | ||
815 | return ((n & 0xff) << 20); | ||
816 | } | ||
817 | |||
818 | static __inline tilegx_bundle_bits | ||
819 | create_Imm8OpcodeExtension_X1(int num) | ||
820 | { | ||
821 | const unsigned int n = (unsigned int)num; | ||
822 | return (((tilegx_bundle_bits)(n & 0xff)) << 51); | ||
823 | } | ||
824 | |||
825 | static __inline tilegx_bundle_bits | ||
826 | create_Imm8_X0(int num) | ||
827 | { | ||
828 | const unsigned int n = (unsigned int)num; | ||
829 | return ((n & 0xff) << 12); | ||
830 | } | ||
831 | |||
832 | static __inline tilegx_bundle_bits | ||
833 | create_Imm8_X1(int num) | ||
834 | { | ||
835 | const unsigned int n = (unsigned int)num; | ||
836 | return (((tilegx_bundle_bits)(n & 0xff)) << 43); | ||
837 | } | ||
838 | |||
839 | static __inline tilegx_bundle_bits | ||
840 | create_Imm8_Y0(int num) | ||
841 | { | ||
842 | const unsigned int n = (unsigned int)num; | ||
843 | return ((n & 0xff) << 12); | ||
844 | } | ||
845 | |||
846 | static __inline tilegx_bundle_bits | ||
847 | create_Imm8_Y1(int num) | ||
848 | { | ||
849 | const unsigned int n = (unsigned int)num; | ||
850 | return (((tilegx_bundle_bits)(n & 0xff)) << 43); | ||
851 | } | ||
852 | |||
853 | static __inline tilegx_bundle_bits | ||
854 | create_JumpOff_X1(int num) | ||
855 | { | ||
856 | const unsigned int n = (unsigned int)num; | ||
857 | return (((tilegx_bundle_bits)(n & 0x7ffffff)) << 31); | ||
858 | } | ||
859 | |||
860 | static __inline tilegx_bundle_bits | ||
861 | create_JumpOpcodeExtension_X1(int num) | ||
862 | { | ||
863 | const unsigned int n = (unsigned int)num; | ||
864 | return (((tilegx_bundle_bits)(n & 0x1)) << 58); | ||
865 | } | ||
866 | |||
867 | static __inline tilegx_bundle_bits | ||
868 | create_MF_Imm14_X1(int num) | ||
869 | { | ||
870 | const unsigned int n = (unsigned int)num; | ||
871 | return (((tilegx_bundle_bits)(n & 0x3fff)) << 37); | ||
872 | } | ||
873 | |||
874 | static __inline tilegx_bundle_bits | ||
875 | create_MT_Imm14_X1(int num) | ||
876 | { | ||
877 | const unsigned int n = (unsigned int)num; | ||
878 | return (((tilegx_bundle_bits)(n & 0x0000003f)) << 31) | | ||
879 | (((tilegx_bundle_bits)(n & 0x00003fc0)) << 37); | ||
880 | } | ||
881 | |||
882 | static __inline tilegx_bundle_bits | ||
883 | create_Mode(int num) | ||
884 | { | ||
885 | const unsigned int n = (unsigned int)num; | ||
886 | return (((tilegx_bundle_bits)(n & 0x3)) << 62); | ||
887 | } | ||
888 | |||
889 | static __inline tilegx_bundle_bits | ||
890 | create_Opcode_X0(int num) | ||
891 | { | ||
892 | const unsigned int n = (unsigned int)num; | ||
893 | return ((n & 0x7) << 28); | ||
894 | } | ||
895 | |||
896 | static __inline tilegx_bundle_bits | ||
897 | create_Opcode_X1(int num) | ||
898 | { | ||
899 | const unsigned int n = (unsigned int)num; | ||
900 | return (((tilegx_bundle_bits)(n & 0x7)) << 59); | ||
901 | } | ||
902 | |||
903 | static __inline tilegx_bundle_bits | ||
904 | create_Opcode_Y0(int num) | ||
905 | { | ||
906 | const unsigned int n = (unsigned int)num; | ||
907 | return ((n & 0xf) << 27); | ||
908 | } | ||
909 | |||
910 | static __inline tilegx_bundle_bits | ||
911 | create_Opcode_Y1(int num) | ||
912 | { | ||
913 | const unsigned int n = (unsigned int)num; | ||
914 | return (((tilegx_bundle_bits)(n & 0xf)) << 58); | ||
915 | } | ||
916 | |||
917 | static __inline tilegx_bundle_bits | ||
918 | create_Opcode_Y2(int num) | ||
919 | { | ||
920 | const unsigned int n = (unsigned int)num; | ||
921 | return ((n & 0x00000001) << 26) | | ||
922 | (((tilegx_bundle_bits)(n & 0x00000002)) << 56); | ||
923 | } | ||
924 | |||
925 | static __inline tilegx_bundle_bits | ||
926 | create_RRROpcodeExtension_X0(int num) | ||
927 | { | ||
928 | const unsigned int n = (unsigned int)num; | ||
929 | return ((n & 0x3ff) << 18); | ||
930 | } | ||
931 | |||
932 | static __inline tilegx_bundle_bits | ||
933 | create_RRROpcodeExtension_X1(int num) | ||
934 | { | ||
935 | const unsigned int n = (unsigned int)num; | ||
936 | return (((tilegx_bundle_bits)(n & 0x3ff)) << 49); | ||
937 | } | ||
938 | |||
939 | static __inline tilegx_bundle_bits | ||
940 | create_RRROpcodeExtension_Y0(int num) | ||
941 | { | ||
942 | const unsigned int n = (unsigned int)num; | ||
943 | return ((n & 0x3) << 18); | ||
944 | } | ||
945 | |||
946 | static __inline tilegx_bundle_bits | ||
947 | create_RRROpcodeExtension_Y1(int num) | ||
948 | { | ||
949 | const unsigned int n = (unsigned int)num; | ||
950 | return (((tilegx_bundle_bits)(n & 0x3)) << 49); | ||
951 | } | ||
952 | |||
953 | static __inline tilegx_bundle_bits | ||
954 | create_ShAmt_X0(int num) | ||
955 | { | ||
956 | const unsigned int n = (unsigned int)num; | ||
957 | return ((n & 0x3f) << 12); | ||
958 | } | ||
959 | |||
960 | static __inline tilegx_bundle_bits | ||
961 | create_ShAmt_X1(int num) | ||
962 | { | ||
963 | const unsigned int n = (unsigned int)num; | ||
964 | return (((tilegx_bundle_bits)(n & 0x3f)) << 43); | ||
965 | } | ||
966 | |||
967 | static __inline tilegx_bundle_bits | ||
968 | create_ShAmt_Y0(int num) | ||
969 | { | ||
970 | const unsigned int n = (unsigned int)num; | ||
971 | return ((n & 0x3f) << 12); | ||
972 | } | ||
973 | |||
974 | static __inline tilegx_bundle_bits | ||
975 | create_ShAmt_Y1(int num) | ||
976 | { | ||
977 | const unsigned int n = (unsigned int)num; | ||
978 | return (((tilegx_bundle_bits)(n & 0x3f)) << 43); | ||
979 | } | ||
980 | |||
981 | static __inline tilegx_bundle_bits | ||
982 | create_ShiftOpcodeExtension_X0(int num) | ||
983 | { | ||
984 | const unsigned int n = (unsigned int)num; | ||
985 | return ((n & 0x3ff) << 18); | ||
986 | } | ||
987 | |||
988 | static __inline tilegx_bundle_bits | ||
989 | create_ShiftOpcodeExtension_X1(int num) | ||
990 | { | ||
991 | const unsigned int n = (unsigned int)num; | ||
992 | return (((tilegx_bundle_bits)(n & 0x3ff)) << 49); | ||
993 | } | ||
994 | |||
995 | static __inline tilegx_bundle_bits | ||
996 | create_ShiftOpcodeExtension_Y0(int num) | ||
997 | { | ||
998 | const unsigned int n = (unsigned int)num; | ||
999 | return ((n & 0x3) << 18); | ||
1000 | } | ||
1001 | |||
1002 | static __inline tilegx_bundle_bits | ||
1003 | create_ShiftOpcodeExtension_Y1(int num) | ||
1004 | { | ||
1005 | const unsigned int n = (unsigned int)num; | ||
1006 | return (((tilegx_bundle_bits)(n & 0x3)) << 49); | ||
1007 | } | ||
1008 | |||
1009 | static __inline tilegx_bundle_bits | ||
1010 | create_SrcA_X0(int num) | ||
1011 | { | ||
1012 | const unsigned int n = (unsigned int)num; | ||
1013 | return ((n & 0x3f) << 6); | ||
1014 | } | ||
1015 | |||
1016 | static __inline tilegx_bundle_bits | ||
1017 | create_SrcA_X1(int num) | ||
1018 | { | ||
1019 | const unsigned int n = (unsigned int)num; | ||
1020 | return (((tilegx_bundle_bits)(n & 0x3f)) << 37); | ||
1021 | } | ||
1022 | |||
1023 | static __inline tilegx_bundle_bits | ||
1024 | create_SrcA_Y0(int num) | ||
1025 | { | ||
1026 | const unsigned int n = (unsigned int)num; | ||
1027 | return ((n & 0x3f) << 6); | ||
1028 | } | ||
1029 | |||
1030 | static __inline tilegx_bundle_bits | ||
1031 | create_SrcA_Y1(int num) | ||
1032 | { | ||
1033 | const unsigned int n = (unsigned int)num; | ||
1034 | return (((tilegx_bundle_bits)(n & 0x3f)) << 37); | ||
1035 | } | ||
1036 | |||
1037 | static __inline tilegx_bundle_bits | ||
1038 | create_SrcA_Y2(int num) | ||
1039 | { | ||
1040 | const unsigned int n = (unsigned int)num; | ||
1041 | return ((n & 0x3f) << 20); | ||
1042 | } | ||
1043 | |||
1044 | static __inline tilegx_bundle_bits | ||
1045 | create_SrcBDest_Y2(int num) | ||
1046 | { | ||
1047 | const unsigned int n = (unsigned int)num; | ||
1048 | return (((tilegx_bundle_bits)(n & 0x3f)) << 51); | ||
1049 | } | ||
1050 | |||
1051 | static __inline tilegx_bundle_bits | ||
1052 | create_SrcB_X0(int num) | ||
1053 | { | ||
1054 | const unsigned int n = (unsigned int)num; | ||
1055 | return ((n & 0x3f) << 12); | ||
1056 | } | ||
1057 | |||
1058 | static __inline tilegx_bundle_bits | ||
1059 | create_SrcB_X1(int num) | ||
1060 | { | ||
1061 | const unsigned int n = (unsigned int)num; | ||
1062 | return (((tilegx_bundle_bits)(n & 0x3f)) << 43); | ||
1063 | } | ||
1064 | |||
1065 | static __inline tilegx_bundle_bits | ||
1066 | create_SrcB_Y0(int num) | ||
1067 | { | ||
1068 | const unsigned int n = (unsigned int)num; | ||
1069 | return ((n & 0x3f) << 12); | ||
1070 | } | ||
1071 | |||
1072 | static __inline tilegx_bundle_bits | ||
1073 | create_SrcB_Y1(int num) | ||
1074 | { | ||
1075 | const unsigned int n = (unsigned int)num; | ||
1076 | return (((tilegx_bundle_bits)(n & 0x3f)) << 43); | ||
1077 | } | ||
1078 | |||
1079 | static __inline tilegx_bundle_bits | ||
1080 | create_UnaryOpcodeExtension_X0(int num) | ||
1081 | { | ||
1082 | const unsigned int n = (unsigned int)num; | ||
1083 | return ((n & 0x3f) << 12); | ||
1084 | } | ||
1085 | |||
1086 | static __inline tilegx_bundle_bits | ||
1087 | create_UnaryOpcodeExtension_X1(int num) | ||
1088 | { | ||
1089 | const unsigned int n = (unsigned int)num; | ||
1090 | return (((tilegx_bundle_bits)(n & 0x3f)) << 43); | ||
1091 | } | ||
1092 | |||
1093 | static __inline tilegx_bundle_bits | ||
1094 | create_UnaryOpcodeExtension_Y0(int num) | ||
1095 | { | ||
1096 | const unsigned int n = (unsigned int)num; | ||
1097 | return ((n & 0x3f) << 12); | ||
1098 | } | ||
1099 | |||
1100 | static __inline tilegx_bundle_bits | ||
1101 | create_UnaryOpcodeExtension_Y1(int num) | ||
1102 | { | ||
1103 | const unsigned int n = (unsigned int)num; | ||
1104 | return (((tilegx_bundle_bits)(n & 0x3f)) << 43); | ||
1105 | } | ||
1106 | |||
1107 | |||
1108 | typedef enum | ||
1109 | { | ||
1110 | TILEGX_PIPELINE_X0, | ||
1111 | TILEGX_PIPELINE_X1, | ||
1112 | TILEGX_PIPELINE_Y0, | ||
1113 | TILEGX_PIPELINE_Y1, | ||
1114 | TILEGX_PIPELINE_Y2, | ||
1115 | } tilegx_pipeline; | ||
1116 | |||
1117 | #define tilegx_is_x_pipeline(p) ((int)(p) <= (int)TILEGX_PIPELINE_X1) | ||
1118 | |||
1119 | typedef enum | ||
1120 | { | ||
1121 | TILEGX_OP_TYPE_REGISTER, | ||
1122 | TILEGX_OP_TYPE_IMMEDIATE, | ||
1123 | TILEGX_OP_TYPE_ADDRESS, | ||
1124 | TILEGX_OP_TYPE_SPR | ||
1125 | } tilegx_operand_type; | ||
1126 | |||
1127 | /* These are the bits that determine if a bundle is in the X encoding. */ | ||
1128 | #define TILEGX_BUNDLE_MODE_MASK ((tilegx_bundle_bits)3 << 62) | ||
1129 | |||
1130 | enum | ||
1131 | { | ||
1132 | /* Maximum number of instructions in a bundle (2 for X, 3 for Y). */ | ||
1133 | TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE = 3, | ||
1134 | |||
1135 | /* How many different pipeline encodings are there? X0, X1, Y0, Y1, Y2. */ | ||
1136 | TILEGX_NUM_PIPELINE_ENCODINGS = 5, | ||
1137 | |||
1138 | /* Log base 2 of TILEGX_BUNDLE_SIZE_IN_BYTES. */ | ||
1139 | TILEGX_LOG2_BUNDLE_SIZE_IN_BYTES = 3, | ||
1140 | |||
1141 | /* Instructions take this many bytes. */ | ||
1142 | TILEGX_BUNDLE_SIZE_IN_BYTES = 1 << TILEGX_LOG2_BUNDLE_SIZE_IN_BYTES, | ||
1143 | |||
1144 | /* Log base 2 of TILEGX_BUNDLE_ALIGNMENT_IN_BYTES. */ | ||
1145 | TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES = 3, | ||
1146 | |||
1147 | /* Bundles should be aligned modulo this number of bytes. */ | ||
1148 | TILEGX_BUNDLE_ALIGNMENT_IN_BYTES = | ||
1149 | (1 << TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES), | ||
1150 | |||
1151 | /* Number of registers (some are magic, such as network I/O). */ | ||
1152 | TILEGX_NUM_REGISTERS = 64, | ||
1153 | }; | ||
1154 | |||
1155 | |||
1156 | struct tilegx_operand | ||
1157 | { | ||
1158 | /* Is this operand a register, immediate or address? */ | ||
1159 | tilegx_operand_type type; | ||
1160 | |||
1161 | /* The default relocation type for this operand. */ | ||
1162 | signed int default_reloc : 16; | ||
1163 | |||
1164 | /* How many bits is this value? (used for range checking) */ | ||
1165 | unsigned int num_bits : 5; | ||
1166 | |||
1167 | /* Is the value signed? (used for range checking) */ | ||
1168 | unsigned int is_signed : 1; | ||
1169 | |||
1170 | /* Is this operand a source register? */ | ||
1171 | unsigned int is_src_reg : 1; | ||
1172 | |||
1173 | /* Is this operand written? (i.e. is it a destination register) */ | ||
1174 | unsigned int is_dest_reg : 1; | ||
1175 | |||
1176 | /* Is this operand PC-relative? */ | ||
1177 | unsigned int is_pc_relative : 1; | ||
1178 | |||
1179 | /* By how many bits do we right shift the value before inserting? */ | ||
1180 | unsigned int rightshift : 2; | ||
1181 | |||
1182 | /* Return the bits for this operand to be ORed into an existing bundle. */ | ||
1183 | tilegx_bundle_bits (*insert) (int op); | ||
1184 | |||
1185 | /* Extract this operand and return it. */ | ||
1186 | unsigned int (*extract) (tilegx_bundle_bits bundle); | ||
1187 | }; | ||
1188 | |||
1189 | |||
1190 | extern const struct tilegx_operand tilegx_operands[]; | ||
1191 | |||
1192 | /* One finite-state machine per pipe for rapid instruction decoding. */ | ||
1193 | extern const unsigned short * const | ||
1194 | tilegx_bundle_decoder_fsms[TILEGX_NUM_PIPELINE_ENCODINGS]; | ||
1195 | |||
1196 | |||
1197 | struct tilegx_opcode | ||
1198 | { | ||
1199 | /* The opcode mnemonic, e.g. "add" */ | ||
1200 | const char *name; | ||
1201 | |||
1202 | /* The enum value for this mnemonic. */ | ||
1203 | tilegx_mnemonic mnemonic; | ||
1204 | |||
1205 | /* A bit mask of which of the five pipes this instruction | ||
1206 | is compatible with: | ||
1207 | X0 0x01 | ||
1208 | X1 0x02 | ||
1209 | Y0 0x04 | ||
1210 | Y1 0x08 | ||
1211 | Y2 0x10 */ | ||
1212 | unsigned char pipes; | ||
1213 | |||
1214 | /* How many operands are there? */ | ||
1215 | unsigned char num_operands; | ||
1216 | |||
1217 | /* Which register does this write implicitly, or TREG_ZERO if none? */ | ||
1218 | unsigned char implicitly_written_register; | ||
1219 | |||
1220 | /* Can this be bundled with other instructions (almost always true). */ | ||
1221 | unsigned char can_bundle; | ||
1222 | |||
1223 | /* The description of the operands. Each of these is an | ||
1224 | * index into the tilegx_operands[] table. */ | ||
1225 | unsigned char operands[TILEGX_NUM_PIPELINE_ENCODINGS][TILEGX_MAX_OPERANDS]; | ||
1226 | |||
1227 | }; | ||
1228 | |||
1229 | extern const struct tilegx_opcode tilegx_opcodes[]; | ||
1230 | |||
1231 | /* Used for non-textual disassembly into structs. */ | ||
1232 | struct tilegx_decoded_instruction | ||
1233 | { | ||
1234 | const struct tilegx_opcode *opcode; | ||
1235 | const struct tilegx_operand *operands[TILEGX_MAX_OPERANDS]; | ||
1236 | long long operand_values[TILEGX_MAX_OPERANDS]; | ||
1237 | }; | ||
1238 | |||
1239 | |||
1240 | /* Disassemble a bundle into a struct for machine processing. */ | ||
1241 | extern int parse_insn_tilegx(tilegx_bundle_bits bits, | ||
1242 | unsigned long long pc, | ||
1243 | struct tilegx_decoded_instruction | ||
1244 | decoded[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE]); | ||
1245 | |||
1246 | |||
1247 | |||
1248 | #endif /* opcode_tilegx_h */ | ||