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authorJonathan Herman <hermanjl@cs.unc.edu>2013-01-17 16:15:55 -0500
committerJonathan Herman <hermanjl@cs.unc.edu>2013-01-17 16:15:55 -0500
commit8dea78da5cee153b8af9c07a2745f6c55057fe12 (patch)
treea8f4d49d63b1ecc92f2fddceba0655b2472c5bd9 /arch/arm/mach-sa1100/include/mach/assabet.h
parent406089d01562f1e2bf9f089fd7637009ebaad589 (diff)
Patched in Tegra support.
Diffstat (limited to 'arch/arm/mach-sa1100/include/mach/assabet.h')
-rw-r--r--arch/arm/mach-sa1100/include/mach/assabet.h15
1 files changed, 9 insertions, 6 deletions
diff --git a/arch/arm/mach-sa1100/include/mach/assabet.h b/arch/arm/mach-sa1100/include/mach/assabet.h
index 307391488c2..28c2cf50c25 100644
--- a/arch/arm/mach-sa1100/include/mach/assabet.h
+++ b/arch/arm/mach-sa1100/include/mach/assabet.h
@@ -85,18 +85,21 @@ extern void ASSABET_BCR_frob(unsigned int mask, unsigned int set);
85#define ASSABET_BSR_RAD_RI (1 << 31) 85#define ASSABET_BSR_RAD_RI (1 << 31)
86 86
87 87
88/* GPIOs (bitmasks) for which the generic definition doesn't say much */ 88/* GPIOs for which the generic definition doesn't say much */
89#define ASSABET_GPIO_RADIO_IRQ GPIO_GPIO (14) /* Radio interrupt request */ 89#define ASSABET_GPIO_RADIO_IRQ GPIO_GPIO (14) /* Radio interrupt request */
90#define ASSABET_GPIO_PS_MODE_SYNC GPIO_GPIO (16) /* Power supply mode/sync */ 90#define ASSABET_GPIO_PS_MODE_SYNC GPIO_GPIO (16) /* Power supply mode/sync */
91#define ASSABET_GPIO_STEREO_64FS_CLK GPIO_GPIO (19) /* SSP UDA1341 clock input */ 91#define ASSABET_GPIO_STEREO_64FS_CLK GPIO_GPIO (19) /* SSP UDA1341 clock input */
92#define ASSABET_GPIO_CF_IRQ GPIO_GPIO (21) /* CF IRQ */
93#define ASSABET_GPIO_CF_CD GPIO_GPIO (22) /* CF CD */
94#define ASSABET_GPIO_CF_BVD2 GPIO_GPIO (24) /* CF BVD */
92#define ASSABET_GPIO_GFX_IRQ GPIO_GPIO (24) /* Graphics IRQ */ 95#define ASSABET_GPIO_GFX_IRQ GPIO_GPIO (24) /* Graphics IRQ */
96#define ASSABET_GPIO_CF_BVD1 GPIO_GPIO (25) /* CF BVD */
93#define ASSABET_GPIO_BATT_LOW GPIO_GPIO (26) /* Low battery */ 97#define ASSABET_GPIO_BATT_LOW GPIO_GPIO (26) /* Low battery */
94#define ASSABET_GPIO_RCLK GPIO_GPIO (26) /* CCLK/2 */ 98#define ASSABET_GPIO_RCLK GPIO_GPIO (26) /* CCLK/2 */
95 99
96/* These are gpiolib GPIO numbers, not bitmasks */ 100#define ASSABET_IRQ_GPIO_CF_IRQ IRQ_GPIO21
97#define ASSABET_GPIO_CF_IRQ 21 /* CF IRQ */ 101#define ASSABET_IRQ_GPIO_CF_CD IRQ_GPIO22
98#define ASSABET_GPIO_CF_CD 22 /* CF CD */ 102#define ASSABET_IRQ_GPIO_CF_BVD2 IRQ_GPIO24
99#define ASSABET_GPIO_CF_BVD2 24 /* CF BVD / IOSPKR */ 103#define ASSABET_IRQ_GPIO_CF_BVD1 IRQ_GPIO25
100#define ASSABET_GPIO_CF_BVD1 25 /* CF BVD / IOSTSCHG */
101 104
102#endif 105#endif