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* ENGR00302472-2 ARM: imx6q: Add imx6sx LDB mux ctrl bit definitionsLiu Ying2014-04-16
| | | | | | | This patch adds LDB mux ctrl bit definitions for imx6sx. The bit DISP_MUX_LDB_MUX_CTRL is defined in the register IOMUXC_GPR5. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00302472-1 ARM: imx6q: Add imx6dl LVDS mux ctrl bit definitionsLiu Ying2014-04-16
| | | | | | | This patch adds LVDS mux ctrl bit definitions for imx6dl. The bits LVDS0/1_MUX_CTL are defined in the register IOMUXC_GPR3. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00302247 usb: charger: use stable plug contact in charger detectionLi Jun2014-04-16
| | | | | | | | | | | | | | | | | | | | | | - Background: When a USB plug is inserted, the pins are staggered such that the ground and VBUS pins make first, followed by the D+/D- pins. The detection of the VBUS eventually results in the usb_charger_detect() being called in order to further identify the type of USB port the product is being tied to. USB 2.0 and the Battery Charging 1.1 specs define how this detection is to be done. The problem with current dirver is that it does not allow the D+/D- detection circuit to settle to a stable state prior to checking to see if there is a valid result. Instead, the for loop breaks on the first iteration due to a false indication of contact. The code then looks to see what kind of device is actually out there, and if the D+/D- pins still have not made contact, it comes to the potentially erroneous conclusion that it is an SDP. - Solution: This patch use a successive check to make sure the contact is reliable. Acked-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com>
* ENGR00302223 usb: charger: increase wait time before check CHRG_DETECTED bitLi Jun2014-04-16
| | | | | | | | | | | | | One customer reported an issue that sometimes SW cannot get right charger detection status on their HW, that is: CHRG_DETECTED bit sometimes is still 0 after 40ms wait time, increase the wait time to be 100ms can resolve the issue with customer's HW and usb charger. Per usb PHY IC owner's comments, the required wait time depends on charger's cap of the charger, bigger cap need more wait time, BC spec only define the min wait time 40mSx, not define max wait time, so it's ok to have 100ms wait time. Acked-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com>
* ENGR00301078-2: ARM: dts: imx6sl-evk: add support for pfuze200 on imx6sl-evkRobin Gong2014-04-16
| | | | | | | | | | move pmic device node from imx6sl-evk.dtsi to upper-level, and add another layer on imx6sl-evk to diff pfuze100 or pfuze200. Meanwhile only works in ldo-enable mode if using pfuze200, since 'SW1C' switch regulator is cut for cost-down which means VDDARM_IN and VDDSOC_IN have to share the same switch regulator Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00301078-1: ARM: dts: imx6dl-sabresd: add support for pfuze200 on ↵Robin Gong2014-04-16
| | | | | | | | | | | | mx6dl-sabresd move pmic device node from imx6qdl-sabresd.dtsi to up-level, and add another layer on imx6dl-sabresd to diff pfuze100 or pfuze200. Meanwhile only work in ldo-enable mode if using pfuze200,since 'SW1C' switch regulator is cut for cost-down which means VDDARM_IN and VDDSOC_IN have to share the same switch regulator Signed-off-by: Robin Gong <b38343@freescale.com>
* pfuze100-regulator: Fix of_node_get() parameterFabio Estevam2014-04-16
| | | | | | | | | | | | | | | | | | Since commit d7857c42 (regulator: pfuze100: Use of_get_child_by_name) we get the following probe failure: pfuze100-regulator 1-0008: Full layer: 1, Metal layer: 0 pfuze100-regulator 1-0008: FAB: 0, FIN: 0 pfuze100-regulator 1-0008: regulators node not found pfuze100-regulator: probe of 1-0008 failed with error -22 Now that of_get_child_by_name() is used we should adjust the device_node pointer 'np' to not get the parent node anymore. Suggested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Mark Brown <broonie@linaro.org>
* regulator: pfuze100: Use of_get_child_by_nameSachin Kamat2014-04-16
| | | | | | | | of_find_node_by_name walks the allnodes list, and can thus walk outside of the parent node. Use of_get_child_by_name instead. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Mark Brown <broonie@linaro.org>
* regulator: pfuze100: Add PFUZE200 support to Kconfig and module descriptionAxel Lin2014-04-16
| | | | | | | | | Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Robin Gong <b38343@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit 2cee2121db44cfeee206d0854bedd52344eea444) Signed-off-by: Robin Gong <b38343@freescale.com>
* regulator: pfuze100: Add terminate entry for [i2c|of]_device_id tablesAxel Lin2014-04-16
| | | | | | | | | | | | | | Also remove PFUZE_NUM to avoid below build warnings: CC [M] drivers/regulator/pfuze100-regulator.o drivers/regulator/pfuze100-regulator.c:86:2: warning: excess elements in array initializer [enabled by default] drivers/regulator/pfuze100-regulator.c:86:2: warning: (near initialization for 'pfuze_device_id') [enabled by default] drivers/regulator/pfuze100-regulator.c:93:2: warning: excess elements in array initializer [enabled by default] drivers/regulator/pfuze100-regulator.c:93:2: warning: (near initialization for 'pfuze_dt_ids') [enabled by default] Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit e6c4c3378d82c5eeb136ed06b1a23651bcdaf739)
* regulator: pfuze100: add pfuze200 supportRobin Gong2014-04-16
| | | | | | | | | | | | support pfuze200 chip which remove SW1C and SW4 based on pfuze100. Signed-off-by: Robin Gong <b38343@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit f2518480c7b744296a5587990a54e3a284d932b8) Conflicts: drivers/regulator/pfuze100-regulator.c
* regulator: pfuze100: Fix address of FABIDAxel Lin2014-04-16
| | | | | | | | | | According to the datasheet, the address of FABID is 0x4. Fix it. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Robin Gong <b38343@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> Cc: stable@vger.kernel.org (cherry picked from commit c07a24939f36fb6de522a9726369ea64eee5d98d)
* ENGR00303122-4 ARM: dtsi: Fix asrc clock providers for i.MX6 seriesNicolin Chen2014-04-16
| | | | | | Assign mem_clk, ipg_clk, and correct asrck_clk for i.MX6 series Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00303122-3 ARM: imx6sx: fix ASRC related clocks in the clock treeNicolin Chen2014-04-16
| | | | | | | | | | | | | | | | | | According to imx6sx RM, there are three clock providers for ASRC: Module clock Clock root Gate asrck_clock_d spdif0_clk_root N/A ipg_clk ahb_clk_root asrc_clk_enable mem_clk ahb_clk_root asrc_clk_enable while the current clock tree describes a clock named 'ASRC' that only describes the asrc_clk_enable function. Thus this patch first adds the other missing clocks to ASRC. [ Since we don't have the gate for asrck_clock_d, we can pass spdif0_clk to ASRC in the devicetree directly. ] Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00303122-2 ARM: imx6q: fix ASRC related clocks in the clock treeNicolin Chen2014-04-16
| | | | | | | | | | | | | | | | | | | | According to imx6q RM, there are three clock providers for ASRC: Module clock Clock root Gate asrck_clock_d spdif1_clk_root N/A ipg_clk ahb_clk_root asrc_clk_enable mem_clk ahb_clk_root asrc_clk_enable while the current clock tree describes a confusing clock named 'asrc' that combines this three clocks by rooting its rate from spdif1_clk_root but set its gate from ipg/mem_clk. Thus this patch first fixes the name asrc to the correct one -- spdif1 and adds the missing clocks to ASRC. [ Since we don't have the gate for asrck_clock_d, we can pass spdif0_clk to ASRC in the devicetree directly. ] Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00303122-1 mxc: asrc: Fix asrc clocks managementNicolin Chen2014-04-16
| | | | | | | | | | | | | ASRC needs three clocks from SoC, they are: mem_clk: Peripheral access clock ipg_clk: Peripheral clock asrck_clk: ASRC module clock while the current driver only maintains two of them and has confusing clock names. Thus fix it. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00302531 Noise come out after change the HDMI resolution when video pauseShengjiu Wang2014-04-16
| | | | | | | | | After change the resolution, the blank state will be changed, the audio will be triggered to start. which didn't care about the audio is running or not before changing the resolution. Add hdmi_abort_state for this special case. Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ENGR00302235-3 pcie: enable pcie on imx6sx sdb boardRichard Zhu2014-04-16
| | | | | | enable pcie on imx6sx sdb board Signed-off-by: Richard Zhu <r65037@freescale.com>
* ENGR00302235-2 arm: enable pcie on imx6sxRichard Zhu2014-04-16
| | | | | | | | | - add mandatory pcie related clks in imx6sx clks tree - add pcie dts in imx6sx dts - add pcie kconfig option in imx6sx soc config - add pcie regulate into dts Signed-off-by: Richard Zhu <r65037@freescale.com>
* ENGR00303325-1 pcie: enable pcie on imx6sxRichard Zhu2014-04-16
| | | | | | | | | | Enable pcie on imx6sx 19x19 socs. - imx6sx pcie has its own power domain, add the standalone power control codes for imx6sx pcie. - the pcie ref (100mhz differential clock) is routed out and used by pcie ep on imx6sx pcie. Signed-off-by: Richard Zhu <r65037@freescale.com>
* ENGR00300188-2 ASoC: imx-hdmi-dma: Clear offset in the trigger initNicolin Chen2014-04-16
| | | | | | | | | | The offset reflects the current position of DMA access in the ALSA ring buffer. So we should clear it before re-start DMA engine becasue the DMA access should re-start its job from the 0 position. If we don't do this, the driver might get a wrong idea about current position of DMA access. Thus fix it. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00300188-1 ASoC: imx-hdmi-dma: Double the buffer and period sizesNicolin Chen2014-04-16
| | | | | | | | | | | | | | | | We found HDMI Audio has a performance issue when playback 8 channels 192KHz files, CPU might lag its interrupt responsing while SDMA continues updating HDMI internal AHB DMA's address and restarting AHB DMA, which resulted the noise when AHB DMA access overlaps with the data copy procedures in this driver. Thus we here double the buffer size and period size of HDMI Audio to chop the CPU interrupt to its half in the same span of time so that we can keep the data copy procedures safe and provent it from overlapping access with AHB DMA. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00302688-2 ARM:dts:imx6sx: Fixed code indentRanjani Vaidyanathan2014-04-16
| | | | | | Fixed code indent. Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
* ENGR00302688-1 ARM:dts:imx6sx: Fixed build breakRanjani Vaidyanathan2014-04-16
| | | | | | Fixed dtb build break. Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
* ENGR00301394 ARM:dts:imx6sx:Add support for imx6sx-19x19-arm2 board supportRanjani Vaidyanathan2014-04-16
| | | | | | Add dts files to support iMX6SX 19x19 ddr3 validation board. Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
* ASoC: fsl-sai: Add SND_SOC_DAIFMT_DSP_A/B support.Xiubo Li2014-04-16
| | | | | | | | | | o Add SND_SOC_DAIFMT_DSP_A support. o Add SND_SOC_DAIFMT_DSP_B support. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit a3f7dcc9cc0392528bff75b17adfcd74fb8a0ecd) Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ASoC: fsl-sai: fix Freescale SAI DAI format setting.Xiubo Li2014-04-16
| | | | | | | | | | | | | o Fix some bugs of fsl_sai_set_dai_fmt_tr(). o Add SND_SOC_DAIFMT_LEFT_J support. o Add SND_SOC_DAIFMT_CBS_CFM support. o Add SND_SOC_DAIFMT_CBM_CFS support. o And SND_SOC_DAIFMT_RIGHT_J need to be done in the future. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit 13cde090030c7d00e991c85b87c12891cc8e4df4) Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00302299 ARM: dts: imx6sx: add adc support on i.MX6SX-17x17-ARM2 platformLuwei Zhou2014-04-16
| | | | | | add adc support for i.MX6SX-17x17-ARM2 platform. Signed-off-by: Luwei Zhou <b45643@freescale.com>
* ENGR00302353 ARM: dts: Add SSI<->WM8962 audio support for imx6sx-sdbNicolin Chen2014-04-16
| | | | | | | | Append audio nodes to the devicetree to add audio support for imx6sx-sdb with Wolfson WM8962 CODEC. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* mtd: gpmi: add subpage read supportHuang Shijie2014-04-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1) Why add the subpage read support? The page size of the nand chip becomes larger and larger, the imx6 has to supports the 16K page or even bigger page. But sometimes, the upper layer only needs a small part of the page, such as 512 bytes or less. For example, ubiattach may only read 64 bytes per page. 2) We only enable the subpage read support when it meets the conditions: <1> the chip is imx6 (or later chips) which can supports large nand page. <2> the size of ECC parity is byte aligned. If the size of ECC parity is not byte aligned, the calling of NAND_CMD_RNDOUT will fail. 3) What does this patch do? This patch will fake a virtual small page for the subpage read, and call the gpmi_ecc_read_page() to do the real work. In order to fake a virtual small page, the patch changes the BCH registers and the bch_geometry{}. After the subpage read finished, we will restore them back. 4) Performace: 4.1) Tested with Toshiba TC58NVG2S0F(4096 + 224) with the following command: #ubiattach /dev/ubi_ctrl -m 4 The detail information of /dev/mtd4 shows below: -------------------------------------------------------------- #mtdinfo /dev/mtd4 mtd4 Name: test Type: nand Eraseblock size: 262144 bytes, 256.0 KiB Amount of eraseblocks: 1856 (486539264 bytes, 464.0 MiB) Minimum input/output unit size: 4096 bytes Sub-page size: 4096 bytes OOB size: 224 bytes Character device major/minor: 90:8 Bad blocks are allowed: true Device is writable: true -------------------------------------------------------------- 4.2) Before this patch: -------------------------------------------------------------- [ 94.530495] UBI: attaching mtd4 to ubi0 [ 98.928850] UBI: scanning is finished [ 98.953594] UBI: attached mtd4 (name "test", size 464 MiB) to ubi0 [ 98.958562] UBI: PEB size: 262144 bytes (256 KiB), LEB size: 253952 bytes [ 98.964076] UBI: min./max. I/O unit sizes: 4096/4096, sub-page size 4096 [ 98.969518] UBI: VID header offset: 4096 (aligned 4096), data offset: 8192 [ 98.975128] UBI: good PEBs: 1856, bad PEBs: 0, corrupted PEBs: 0 [ 98.979843] UBI: user volume: 1, internal volumes: 1, max. volumes count: 128 [ 98.985878] UBI: max/mean erase counter: 2/1, WL threshold: 4096, image sequence number: 2024916145 [ 98.993635] UBI: available PEBs: 0, total reserved PEBs: 1856, PEBs reserved for bad PEB handling: 40 [ 99.001807] UBI: background thread "ubi_bgt0d" started, PID 831 -------------------------------------------------------------- The attach time is about 98.9 - 94.5 = 4.4s 4.3) After this patch: -------------------------------------------------------------- [ 286.464906] UBI: attaching mtd4 to ubi0 [ 289.186129] UBI: scanning is finished [ 289.211416] UBI: attached mtd4 (name "test", size 464 MiB) to ubi0 [ 289.216360] UBI: PEB size: 262144 bytes (256 KiB), LEB size: 253952 bytes [ 289.221858] UBI: min./max. I/O unit sizes: 4096/4096, sub-page size 4096 [ 289.227293] UBI: VID header offset: 4096 (aligned 4096), data offset: 8192 [ 289.232878] UBI: good PEBs: 1856, bad PEBs: 0, corrupted PEBs: 0 [ 289.237628] UBI: user volume: 0, internal volumes: 1, max. volumes count: 128 [ 289.243553] UBI: max/mean erase counter: 1/1, WL threshold: 4096, image sequence number: 2024916145 [ 289.251348] UBI: available PEBs: 1812, total reserved PEBs: 44, PEBs reserved for bad PEB handling: 40 [ 289.259417] UBI: background thread "ubi_bgt0d" started, PID 847 -------------------------------------------------------------- The attach time is about 289.18 - 286.46 = 2.7s 4.4) The conclusion: We achieve (4.4 - 2.7) / 4.4 = 38.6% faster in the ubiattach. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: gpmi: do not use the mtd->writesizeHuang Shijie2014-04-16
| | | | | | | | | | | | The nfc_geo->payload_size is equal to the mtd->writesize now, use the nfc_geo->payload_size to replace the mtd->writesize. This patch makes preparation for the gpmi's subpage read support. In the subpage support, the nfc_geo->payload_size maybe smaller then the mtd->writesize. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: nand: add "page" argument for read_subpage hookHuang Shijie2014-04-16
| | | | | | | | | Add the "page" argument for the read_subpage hook. With this argument, the implementation of this hook could prints out more accurate information for debugging. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: nand: remove unused function input parameterCai Zhiyong2014-04-16
| | | | | | | | | | The nand_get_flash_type parameter "busw" input value is not used by any branch, and it is updated before use it in the function, so remove it, define the "busw" as an internal variable. Signed-off-by: Cai Zhiyong <caizhiyong@huawei.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Huang Shijie <b32955@freescale.com>
* ENGR00302227-8 dts: imx6sx-sdb: add flexcan supportDong Aisheng2014-04-16
| | | | | | Add flexcan support Signed-off-by: Dong Aisheng <b29396@freescale.com>
* ENGR00302227-7 dts: imx6sx-17x17-arm2: do not use sw polling for card detectDong Aisheng2014-04-16
| | | | | | | | | | | The SW polling for card detect will keep sending command repeatly at backgroud which will consume CPU MIPS and aslo affects the normal SD debug when enable CONFIG_MMC_DEBUG. Just as the board design, we simply treat it as no card detect support. Signed-off-by: Dong Aisheng <b29396@freescale.com>
* ENGR00302227-6 mmc: sdhci-esdhc-imx: add imx6sx supportDong Aisheng2014-04-16
| | | | | | | | The imx6sx usdhc is derived from imx6sl, the difference is minor. imx6sx have the errata ESDHC_FLAG_ERR004536 fixed. So introduce a new compatible string for imx6sx to distinguish them. Signed-off-by: Dong Aisheng <b29396@freescale.com>
* ENGR00302227-5 dts: imx6sx-sdb: add SD2 supportDong Aisheng2014-04-16
| | | | | | SD2 has no CD/WP pin and not power cycle and signal voltage switch capability. Signed-off-by: Dong Aisheng <b29396@freescale.com>
* ENGR00302227-4 dts: imx6sx-sdb: SD4 updateDong Aisheng2014-04-16
| | | | | | | Add CD/WP support and fix pinctrl setting that SD4 slot on SDB board is 4 bit, not 8 bit. Signed-off-by: Dong Aisheng <b29396@freescale.com>
* ENGR00302227-3 dts:imx6sx-sdb: add SD3 supportDong Aisheng2014-04-16
| | | | | | Add SD3 support Signed-off-by: Dong Aisheng <b29396@freescale.com>
* ENGR00302227-2 dts: imx6sx-17x17-arm2: fix the pad setting of can gpiosDong Aisheng2014-04-16
| | | | | | | | | | | | | | We use the default GPIO pad ctrl setting for CAN before. However, we found the reset value of CAN gpio pad ctrl setting is 000030c1 which indicates the Drive Strength Field is HIZ. Thus there will be no output and GPIO output function will not work. Altough the board level pull up will make the CAN tranceiver work properly by default, however, we will not be able to shutdown the tranceiver by GPIO. Setting the correct driver strength for GPIO pad ctrl to make the pad out work properly. Signed-off-by: Dong Aisheng <b29396@freescale.com>
* ENGR00302227-1 dts:imx6sx-17x17-arm2: use external regulator for SDBDong Aisheng2014-04-16
| | | | | | | With using external regulator, we will be able to shutdown the power for the card during suspend. Signed-off-by: Dong Aisheng <b29396@freescale.com>
* ENGR00301869-3 ARM: dts: imx6sx: add adc support on i.MX6SX-SDB platformLuwei Zhou2014-04-16
| | | | | | add adc devicetree support for i.MX6SX-SDB platform. Signed-off-by: Luwei Zhou <b45643@freescale.com>
* ENGR00301869-2 ARM: imx_v7_defconfig: enable ADC in default configLuwei Zhou2014-04-16
| | | | | | Enable ADC driver in default config. Signed-off-by: Luwei Zhou <b45643@freescale.com>
* ENGR00301869-1 iio: adc: Enable i.MX6SX adc driver.Luwei Zhou2014-04-16
| | | | | | | | Enable i.MX6SX adc driver. ADC driver will try getting ADC controller channel number via device tree, because i.MX chip enable 4 channels on each controller. Signed-off-by: Luwei Zhou <b45643@freescale.com>
* sched: replace INIT_COMPLETION with reinit_completionWolfram Sang2014-04-16
| | | | | | | | | | | | | | | | | | For the casual device driver writer, it is hard to remember when to use init_completion (to init a completion structure) or INIT_COMPLETION (to *reinit* a completion structure). Furthermore, while all other completion functions exepct a pointer as a parameter, INIT_COMPLETION does not. To make it easier to remember which function to use and to make code more readable, introduce a new inline function with the proper name and consistent argument type. Update the kernel-doc for init_completion while we are here. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Linus Walleij <linus.walleij@linaro.org> (personally at LCE13) Cc: Ingo Molnar <mingo@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Luwei Zhou <b45643@freescale.com>
* iio: core: implement devm_iio_device_alloc/devm_iio_device_freeGrygorii Strashko2014-04-16
| | | | | | | | | | | | | | | | | | Add a resource managed devm_iio_device_alloc()/devm_iio_device_free() to automatically clean up any allocations made by IIO drivers, thus leading to simplified IIO drivers code. In addition, this will allow IIO drivers to use other devm_*() API (like devm_request_irq) and don't care about the race between iio_device_free() and the release of resources by Device core during driver removing. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Oleksandr Kravchenko <o.v.kravchenko@globallogic.com> Tested-by: Oleksandr Kravchenko <o.v.kravchenko@globallogic.com> Reviewed-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Jonathan Cameron <jic23@kernel.org> Signed-off-by: Luwei Zhou <b45643@freescale.com>
* ASoC: sgtl5000: Fix VAG_POWER enabling/disabling orderMarek Vasut2014-04-16
| | | | | | | | | | | | | | | | The VAG_POWER must be enabled after all other bits in CHIP_ANA_POWER and disabled before any other bit in CHIP_ANA_POWER. See the SGTL5000 datasheet (Table 31, BIT 7, page 42-43). Failing to follow this order will result in ugly loud "POP" noise at the end of playback. To achieve such order, use the _PRE and _POST DAPM widgets to trigger the power_vag_event, where the event type check has to be fixed accordingly as well. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit dd4d2d6dfb49e8916064f2cb07f0ad7b32a82fb7) Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00301993 imx6sx: fix kernel can't boot at imx6sx for mfg configFrank Li2014-04-16
| | | | | | Miss imx6sx support. Signed-off-by: Frank Li <Frank.Li@freescale.com>
* ENGR00301115 net: fec_ptp: fix convergence issue to support IXXAT and ↵Fugang Duan2014-04-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | LinuxPTP stack IEEE 1588 module has one hw issue in capturing the ATVR register. According to the user manual it is: ENET0->ATCR |= ENET_ATCR_CAPTURE_MASK; while(ENET0->ATCR & ENET_ATCR_CAPTURE_MASK); ts_counter_ns = ENET0->ATVR; Incorrect behavior for ENET_ATCR[Capture and Restart Bits]. These bits will always read a value zero. According to SPEC, when these bits are set to 1'b1, these should hold value 1'b1 until the counter value is capture in the register clock domain. Unfortunately there is a bug with the way the bit "ENET_ATCR_CAPTURE" clears. So need something like: ENET0->ATCR |= ENET_ATCR_CAPTURE_MASK; wait(); ts_counter_ns = ENET0->ATVR; The wait-time to be at least 6 clock cycle of the slower clock between the register clock and the 1588 clock. The 1588 ts_clk is 25Mhz, register clock is 66Mhz, so the wait-time must be greater than 240ns (40ns * 6). The workaround is that adding 1us delay before read ATVR. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00300156 net: fec: Workaround for imx6sx enet tx hang when enable three ↵Fugang Duan2014-04-16
| | | | | | | | | | | | | | | | | | | | | | | queues When enable three queues on imx6sx enet, and then do tx performance test with iperf tool, after some time running, tx hang. Found that: If uDMA is running, software set TDAR may cause tx hang. If uDMA is in idle, software set TDAR don't cause tx hang. There is a TDAR race condition for mutliQ when the software sets TDAR and the UDMA clears TDAR simultaneously or in a small window (2-4 cycles). This will cause the udma_tx and udma_tx_arbiter state machines to hang. The issue exist at i.MX6SX enet IP. So, the Workaround is checking TDAR status four time, if TDAR cleared by hardware and then write TDAR, otherwise don't set TDAR. The patch is only one Workaround for the issue TKT210582. Signed-off-by: Fugang Duan <B38611@freescale.com>
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