diff options
author | Robin Gong <b38343@freescale.com> | 2014-03-04 04:40:36 -0500 |
---|---|---|
committer | Nitin Garg <nitin.garg@freescale.com> | 2014-04-16 09:57:55 -0400 |
commit | f9e62732cfb59ff68fed303bbbb3913d2f1002bf (patch) | |
tree | 7eb5772219a69ff929c1b58c8caa8f3bccedc3f4 | |
parent | cfec286ff9f375c2c289072d63cedbb0c7917a48 (diff) |
regulator: pfuze100: add pfuze200 support
support pfuze200 chip which remove SW1C and SW4 based on pfuze100.
Signed-off-by: Robin Gong <b38343@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit f2518480c7b744296a5587990a54e3a284d932b8)
Conflicts:
drivers/regulator/pfuze100-regulator.c
-rw-r--r-- | Documentation/devicetree/bindings/regulator/pfuze100.txt | 96 | ||||
-rw-r--r-- | drivers/regulator/pfuze100-regulator.c | 181 | ||||
-rw-r--r-- | include/linux/regulator/pfuze100.h | 14 |
3 files changed, 245 insertions, 46 deletions
diff --git a/Documentation/devicetree/bindings/regulator/pfuze100.txt b/Documentation/devicetree/bindings/regulator/pfuze100.txt index fc989b2e8057..34ef5d16d0f1 100644 --- a/Documentation/devicetree/bindings/regulator/pfuze100.txt +++ b/Documentation/devicetree/bindings/regulator/pfuze100.txt | |||
@@ -1,7 +1,7 @@ | |||
1 | PFUZE100 family of regulators | 1 | PFUZE100 family of regulators |
2 | 2 | ||
3 | Required properties: | 3 | Required properties: |
4 | - compatible: "fsl,pfuze100" | 4 | - compatible: "fsl,pfuze100" or "fsl,pfuze200" |
5 | - reg: I2C slave address | 5 | - reg: I2C slave address |
6 | 6 | ||
7 | Required child node: | 7 | Required child node: |
@@ -10,11 +10,14 @@ Required child node: | |||
10 | Documentation/devicetree/bindings/regulator/regulator.txt. | 10 | Documentation/devicetree/bindings/regulator/regulator.txt. |
11 | 11 | ||
12 | The valid names for regulators are: | 12 | The valid names for regulators are: |
13 | --PFUZE100 | ||
13 | sw1ab,sw1c,sw2,sw3a,sw3b,sw4,swbst,vsnvs,vrefddr,vgen1~vgen6 | 14 | sw1ab,sw1c,sw2,sw3a,sw3b,sw4,swbst,vsnvs,vrefddr,vgen1~vgen6 |
15 | --PFUZE200 | ||
16 | sw1ab,sw2,sw3a,sw3b,swbst,vsnvs,vrefddr,vgen1~vgen6 | ||
14 | 17 | ||
15 | Each regulator is defined using the standard binding for regulators. | 18 | Each regulator is defined using the standard binding for regulators. |
16 | 19 | ||
17 | Example: | 20 | Example 1: PFUZE100 |
18 | 21 | ||
19 | pmic: pfuze100@08 { | 22 | pmic: pfuze100@08 { |
20 | compatible = "fsl,pfuze100"; | 23 | compatible = "fsl,pfuze100"; |
@@ -113,3 +116,92 @@ Example: | |||
113 | }; | 116 | }; |
114 | }; | 117 | }; |
115 | }; | 118 | }; |
119 | |||
120 | |||
121 | Example 2: PFUZE200 | ||
122 | |||
123 | pmic: pfuze200@08 { | ||
124 | compatible = "fsl,pfuze200"; | ||
125 | reg = <0x08>; | ||
126 | |||
127 | regulators { | ||
128 | sw1a_reg: sw1ab { | ||
129 | regulator-min-microvolt = <300000>; | ||
130 | regulator-max-microvolt = <1875000>; | ||
131 | regulator-boot-on; | ||
132 | regulator-always-on; | ||
133 | regulator-ramp-delay = <6250>; | ||
134 | }; | ||
135 | |||
136 | sw2_reg: sw2 { | ||
137 | regulator-min-microvolt = <800000>; | ||
138 | regulator-max-microvolt = <3300000>; | ||
139 | regulator-boot-on; | ||
140 | regulator-always-on; | ||
141 | }; | ||
142 | |||
143 | sw3a_reg: sw3a { | ||
144 | regulator-min-microvolt = <400000>; | ||
145 | regulator-max-microvolt = <1975000>; | ||
146 | regulator-boot-on; | ||
147 | regulator-always-on; | ||
148 | }; | ||
149 | |||
150 | sw3b_reg: sw3b { | ||
151 | regulator-min-microvolt = <400000>; | ||
152 | regulator-max-microvolt = <1975000>; | ||
153 | regulator-boot-on; | ||
154 | regulator-always-on; | ||
155 | }; | ||
156 | |||
157 | swbst_reg: swbst { | ||
158 | regulator-min-microvolt = <5000000>; | ||
159 | regulator-max-microvolt = <5150000>; | ||
160 | }; | ||
161 | |||
162 | snvs_reg: vsnvs { | ||
163 | regulator-min-microvolt = <1000000>; | ||
164 | regulator-max-microvolt = <3000000>; | ||
165 | regulator-boot-on; | ||
166 | regulator-always-on; | ||
167 | }; | ||
168 | |||
169 | vref_reg: vrefddr { | ||
170 | regulator-boot-on; | ||
171 | regulator-always-on; | ||
172 | }; | ||
173 | |||
174 | vgen1_reg: vgen1 { | ||
175 | regulator-min-microvolt = <800000>; | ||
176 | regulator-max-microvolt = <1550000>; | ||
177 | }; | ||
178 | |||
179 | vgen2_reg: vgen2 { | ||
180 | regulator-min-microvolt = <800000>; | ||
181 | regulator-max-microvolt = <1550000>; | ||
182 | }; | ||
183 | |||
184 | vgen3_reg: vgen3 { | ||
185 | regulator-min-microvolt = <1800000>; | ||
186 | regulator-max-microvolt = <3300000>; | ||
187 | }; | ||
188 | |||
189 | vgen4_reg: vgen4 { | ||
190 | regulator-min-microvolt = <1800000>; | ||
191 | regulator-max-microvolt = <3300000>; | ||
192 | regulator-always-on; | ||
193 | }; | ||
194 | |||
195 | vgen5_reg: vgen5 { | ||
196 | regulator-min-microvolt = <1800000>; | ||
197 | regulator-max-microvolt = <3300000>; | ||
198 | regulator-always-on; | ||
199 | }; | ||
200 | |||
201 | vgen6_reg: vgen6 { | ||
202 | regulator-min-microvolt = <1800000>; | ||
203 | regulator-max-microvolt = <3300000>; | ||
204 | regulator-always-on; | ||
205 | }; | ||
206 | }; | ||
207 | }; | ||
diff --git a/drivers/regulator/pfuze100-regulator.c b/drivers/regulator/pfuze100-regulator.c index 565a631fff70..35b1de1c8cc0 100644 --- a/drivers/regulator/pfuze100-regulator.c +++ b/drivers/regulator/pfuze100-regulator.c | |||
@@ -56,6 +56,8 @@ | |||
56 | #define PFUZE100_VGEN5VOL 0x70 | 56 | #define PFUZE100_VGEN5VOL 0x70 |
57 | #define PFUZE100_VGEN6VOL 0x71 | 57 | #define PFUZE100_VGEN6VOL 0x71 |
58 | 58 | ||
59 | enum chips {PFUZE100, PFUZE200, PFUZE_NUM}; | ||
60 | |||
59 | struct pfuze_regulator { | 61 | struct pfuze_regulator { |
60 | struct regulator_desc desc; | 62 | struct regulator_desc desc; |
61 | unsigned char stby_reg; | 63 | unsigned char stby_reg; |
@@ -63,6 +65,7 @@ struct pfuze_regulator { | |||
63 | }; | 65 | }; |
64 | 66 | ||
65 | struct pfuze_chip { | 67 | struct pfuze_chip { |
68 | int chip_id; | ||
66 | struct regmap *regmap; | 69 | struct regmap *regmap; |
67 | struct device *dev; | 70 | struct device *dev; |
68 | struct pfuze_regulator regulator_descs[PFUZE100_MAX_REGULATOR]; | 71 | struct pfuze_regulator regulator_descs[PFUZE100_MAX_REGULATOR]; |
@@ -77,15 +80,15 @@ static const int pfuze100_vsnvs[] = { | |||
77 | 1000000, 1100000, 1200000, 1300000, 1500000, 1800000, 3000000, | 80 | 1000000, 1100000, 1200000, 1300000, 1500000, 1800000, 3000000, |
78 | }; | 81 | }; |
79 | 82 | ||
80 | static const struct i2c_device_id pfuze_device_id[] = { | 83 | static const struct i2c_device_id pfuze_device_id[PFUZE_NUM] = { |
81 | {.name = "pfuze100"}, | 84 | {.name = "pfuze100", .driver_data = PFUZE100}, |
82 | {}, | 85 | {.name = "pfuze200", .driver_data = PFUZE200}, |
83 | }; | 86 | }; |
84 | MODULE_DEVICE_TABLE(i2c, pfuze_device_id); | 87 | MODULE_DEVICE_TABLE(i2c, pfuze_device_id); |
85 | 88 | ||
86 | static const struct of_device_id pfuze_dt_ids[] = { | 89 | static const struct of_device_id pfuze_dt_ids[PFUZE_NUM] = { |
87 | { .compatible = "fsl,pfuze100" }, | 90 | { .compatible = "fsl,pfuze100", .data = (void *)PFUZE100}, |
88 | {}, | 91 | { .compatible = "fsl,pfuze200", .data = (void *)PFUZE200}, |
89 | }; | 92 | }; |
90 | MODULE_DEVICE_TABLE(of, pfuze_dt_ids); | 93 | MODULE_DEVICE_TABLE(of, pfuze_dt_ids); |
91 | 94 | ||
@@ -139,14 +142,14 @@ static struct regulator_ops pfuze100_swb_regulator_ops = { | |||
139 | 142 | ||
140 | }; | 143 | }; |
141 | 144 | ||
142 | #define PFUZE100_FIXED_REG(_name, base, voltage) \ | 145 | #define PFUZE100_FIXED_REG(_chip, _name, base, voltage) \ |
143 | [PFUZE100_ ## _name] = { \ | 146 | [_chip ## _ ## _name] = { \ |
144 | .desc = { \ | 147 | .desc = { \ |
145 | .name = #_name, \ | 148 | .name = #_name, \ |
146 | .n_voltages = 1, \ | 149 | .n_voltages = 1, \ |
147 | .ops = &pfuze100_fixed_regulator_ops, \ | 150 | .ops = &pfuze100_fixed_regulator_ops, \ |
148 | .type = REGULATOR_VOLTAGE, \ | 151 | .type = REGULATOR_VOLTAGE, \ |
149 | .id = PFUZE100_ ## _name, \ | 152 | .id = _chip ## _ ## _name, \ |
150 | .owner = THIS_MODULE, \ | 153 | .owner = THIS_MODULE, \ |
151 | .min_uV = (voltage), \ | 154 | .min_uV = (voltage), \ |
152 | .enable_reg = (base), \ | 155 | .enable_reg = (base), \ |
@@ -154,14 +157,14 @@ static struct regulator_ops pfuze100_swb_regulator_ops = { | |||
154 | }, \ | 157 | }, \ |
155 | } | 158 | } |
156 | 159 | ||
157 | #define PFUZE100_SW_REG(_name, base, min, max, step) \ | 160 | #define PFUZE100_SW_REG(_chip, _name, base, min, max, step) \ |
158 | [PFUZE100_ ## _name] = { \ | 161 | [_chip ## _ ## _name] = { \ |
159 | .desc = { \ | 162 | .desc = { \ |
160 | .name = #_name,\ | 163 | .name = #_name,\ |
161 | .n_voltages = ((max) - (min)) / (step) + 1, \ | 164 | .n_voltages = ((max) - (min)) / (step) + 1, \ |
162 | .ops = &pfuze100_sw_regulator_ops, \ | 165 | .ops = &pfuze100_sw_regulator_ops, \ |
163 | .type = REGULATOR_VOLTAGE, \ | 166 | .type = REGULATOR_VOLTAGE, \ |
164 | .id = PFUZE100_ ## _name, \ | 167 | .id = _chip ## _ ## _name, \ |
165 | .owner = THIS_MODULE, \ | 168 | .owner = THIS_MODULE, \ |
166 | .min_uV = (min), \ | 169 | .min_uV = (min), \ |
167 | .uV_step = (step), \ | 170 | .uV_step = (step), \ |
@@ -172,14 +175,14 @@ static struct regulator_ops pfuze100_swb_regulator_ops = { | |||
172 | .stby_mask = 0x3f, \ | 175 | .stby_mask = 0x3f, \ |
173 | } | 176 | } |
174 | 177 | ||
175 | #define PFUZE100_SWB_REG(_name, base, mask, voltages) \ | 178 | #define PFUZE100_SWB_REG(_chip, _name, base, mask, voltages) \ |
176 | [PFUZE100_ ## _name] = { \ | 179 | [_chip ## _ ## _name] = { \ |
177 | .desc = { \ | 180 | .desc = { \ |
178 | .name = #_name, \ | 181 | .name = #_name, \ |
179 | .n_voltages = ARRAY_SIZE(voltages), \ | 182 | .n_voltages = ARRAY_SIZE(voltages), \ |
180 | .ops = &pfuze100_swb_regulator_ops, \ | 183 | .ops = &pfuze100_swb_regulator_ops, \ |
181 | .type = REGULATOR_VOLTAGE, \ | 184 | .type = REGULATOR_VOLTAGE, \ |
182 | .id = PFUZE100_ ## _name, \ | 185 | .id = _chip ## _ ## _name, \ |
183 | .owner = THIS_MODULE, \ | 186 | .owner = THIS_MODULE, \ |
184 | .volt_table = voltages, \ | 187 | .volt_table = voltages, \ |
185 | .vsel_reg = (base), \ | 188 | .vsel_reg = (base), \ |
@@ -187,14 +190,14 @@ static struct regulator_ops pfuze100_swb_regulator_ops = { | |||
187 | }, \ | 190 | }, \ |
188 | } | 191 | } |
189 | 192 | ||
190 | #define PFUZE100_VGEN_REG(_name, base, min, max, step) \ | 193 | #define PFUZE100_VGEN_REG(_chip, _name, base, min, max, step) \ |
191 | [PFUZE100_ ## _name] = { \ | 194 | [_chip ## _ ## _name] = { \ |
192 | .desc = { \ | 195 | .desc = { \ |
193 | .name = #_name, \ | 196 | .name = #_name, \ |
194 | .n_voltages = ((max) - (min)) / (step) + 1, \ | 197 | .n_voltages = ((max) - (min)) / (step) + 1, \ |
195 | .ops = &pfuze100_ldo_regulator_ops, \ | 198 | .ops = &pfuze100_ldo_regulator_ops, \ |
196 | .type = REGULATOR_VOLTAGE, \ | 199 | .type = REGULATOR_VOLTAGE, \ |
197 | .id = PFUZE100_ ## _name, \ | 200 | .id = _chip ## _ ## _name, \ |
198 | .owner = THIS_MODULE, \ | 201 | .owner = THIS_MODULE, \ |
199 | .min_uV = (min), \ | 202 | .min_uV = (min), \ |
200 | .uV_step = (step), \ | 203 | .uV_step = (step), \ |
@@ -207,25 +210,45 @@ static struct regulator_ops pfuze100_swb_regulator_ops = { | |||
207 | .stby_mask = 0x20, \ | 210 | .stby_mask = 0x20, \ |
208 | } | 211 | } |
209 | 212 | ||
213 | /* PFUZE100 */ | ||
210 | static struct pfuze_regulator pfuze100_regulators[] = { | 214 | static struct pfuze_regulator pfuze100_regulators[] = { |
211 | PFUZE100_SW_REG(SW1AB, PFUZE100_SW1ABVOL, 300000, 1875000, 25000), | 215 | PFUZE100_SW_REG(PFUZE100, SW1AB, PFUZE100_SW1ABVOL, 300000, 1875000, 25000), |
212 | PFUZE100_SW_REG(SW1C, PFUZE100_SW1CVOL, 300000, 1875000, 25000), | 216 | PFUZE100_SW_REG(PFUZE100, SW1C, PFUZE100_SW1CVOL, 300000, 1875000, 25000), |
213 | PFUZE100_SW_REG(SW2, PFUZE100_SW2VOL, 400000, 1975000, 25000), | 217 | PFUZE100_SW_REG(PFUZE100, SW2, PFUZE100_SW2VOL, 400000, 1975000, 25000), |
214 | PFUZE100_SW_REG(SW3A, PFUZE100_SW3AVOL, 400000, 1975000, 25000), | 218 | PFUZE100_SW_REG(PFUZE100, SW3A, PFUZE100_SW3AVOL, 400000, 1975000, 25000), |
215 | PFUZE100_SW_REG(SW3B, PFUZE100_SW3BVOL, 400000, 1975000, 25000), | 219 | PFUZE100_SW_REG(PFUZE100, SW3B, PFUZE100_SW3BVOL, 400000, 1975000, 25000), |
216 | PFUZE100_SW_REG(SW4, PFUZE100_SW4VOL, 400000, 1975000, 25000), | 220 | PFUZE100_SW_REG(PFUZE100, SW4, PFUZE100_SW4VOL, 400000, 1975000, 25000), |
217 | PFUZE100_SWB_REG(SWBST, PFUZE100_SWBSTCON1, 0x3 , pfuze100_swbst), | 221 | PFUZE100_SWB_REG(PFUZE100, SWBST, PFUZE100_SWBSTCON1, 0x3 , pfuze100_swbst), |
218 | PFUZE100_SWB_REG(VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs), | 222 | PFUZE100_SWB_REG(PFUZE100, VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs), |
219 | PFUZE100_FIXED_REG(VREFDDR, PFUZE100_VREFDDRCON, 750000), | 223 | PFUZE100_FIXED_REG(PFUZE100, VREFDDR, PFUZE100_VREFDDRCON, 750000), |
220 | PFUZE100_VGEN_REG(VGEN1, PFUZE100_VGEN1VOL, 800000, 1550000, 50000), | 224 | PFUZE100_VGEN_REG(PFUZE100, VGEN1, PFUZE100_VGEN1VOL, 800000, 1550000, 50000), |
221 | PFUZE100_VGEN_REG(VGEN2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000), | 225 | PFUZE100_VGEN_REG(PFUZE100, VGEN2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000), |
222 | PFUZE100_VGEN_REG(VGEN3, PFUZE100_VGEN3VOL, 1800000, 3300000, 100000), | 226 | PFUZE100_VGEN_REG(PFUZE100, VGEN3, PFUZE100_VGEN3VOL, 1800000, 3300000, 100000), |
223 | PFUZE100_VGEN_REG(VGEN4, PFUZE100_VGEN4VOL, 1800000, 3300000, 100000), | 227 | PFUZE100_VGEN_REG(PFUZE100, VGEN4, PFUZE100_VGEN4VOL, 1800000, 3300000, 100000), |
224 | PFUZE100_VGEN_REG(VGEN5, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000), | 228 | PFUZE100_VGEN_REG(PFUZE100, VGEN5, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000), |
225 | PFUZE100_VGEN_REG(VGEN6, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000), | 229 | PFUZE100_VGEN_REG(PFUZE100, VGEN6, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000), |
230 | }; | ||
231 | |||
232 | static struct pfuze_regulator pfuze200_regulators[] = { | ||
233 | PFUZE100_SW_REG(PFUZE200, SW1AB, PFUZE100_SW1ABVOL, 300000, 1875000, 25000), | ||
234 | PFUZE100_SW_REG(PFUZE200, SW2, PFUZE100_SW2VOL, 400000, 1975000, 25000), | ||
235 | PFUZE100_SW_REG(PFUZE200, SW3A, PFUZE100_SW3AVOL, 400000, 1975000, 25000), | ||
236 | PFUZE100_SW_REG(PFUZE200, SW3B, PFUZE100_SW3BVOL, 400000, 1975000, 25000), | ||
237 | PFUZE100_SWB_REG(PFUZE200, SWBST, PFUZE100_SWBSTCON1, 0x3 , pfuze100_swbst), | ||
238 | PFUZE100_SWB_REG(PFUZE200, VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs), | ||
239 | PFUZE100_FIXED_REG(PFUZE200, VREFDDR, PFUZE100_VREFDDRCON, 750000), | ||
240 | PFUZE100_VGEN_REG(PFUZE200, VGEN1, PFUZE100_VGEN1VOL, 800000, 1550000, 50000), | ||
241 | PFUZE100_VGEN_REG(PFUZE200, VGEN2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000), | ||
242 | PFUZE100_VGEN_REG(PFUZE200, VGEN3, PFUZE100_VGEN3VOL, 1800000, 3300000, 100000), | ||
243 | PFUZE100_VGEN_REG(PFUZE200, VGEN4, PFUZE100_VGEN4VOL, 1800000, 3300000, 100000), | ||
244 | PFUZE100_VGEN_REG(PFUZE200, VGEN5, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000), | ||
245 | PFUZE100_VGEN_REG(PFUZE200, VGEN6, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000), | ||
226 | }; | 246 | }; |
227 | 247 | ||
248 | static struct pfuze_regulator *pfuze_regulators; | ||
249 | |||
228 | #ifdef CONFIG_OF | 250 | #ifdef CONFIG_OF |
251 | /* PFUZE100 */ | ||
229 | static struct of_regulator_match pfuze100_matches[] = { | 252 | static struct of_regulator_match pfuze100_matches[] = { |
230 | { .name = "sw1ab", }, | 253 | { .name = "sw1ab", }, |
231 | { .name = "sw1c", }, | 254 | { .name = "sw1c", }, |
@@ -244,6 +267,26 @@ static struct of_regulator_match pfuze100_matches[] = { | |||
244 | { .name = "vgen6", }, | 267 | { .name = "vgen6", }, |
245 | }; | 268 | }; |
246 | 269 | ||
270 | /* PFUZE200 */ | ||
271 | static struct of_regulator_match pfuze200_matches[] = { | ||
272 | |||
273 | { .name = "sw1ab", }, | ||
274 | { .name = "sw2", }, | ||
275 | { .name = "sw3a", }, | ||
276 | { .name = "sw3b", }, | ||
277 | { .name = "swbst", }, | ||
278 | { .name = "vsnvs", }, | ||
279 | { .name = "vrefddr", }, | ||
280 | { .name = "vgen1", }, | ||
281 | { .name = "vgen2", }, | ||
282 | { .name = "vgen3", }, | ||
283 | { .name = "vgen4", }, | ||
284 | { .name = "vgen5", }, | ||
285 | { .name = "vgen6", }, | ||
286 | }; | ||
287 | |||
288 | static struct of_regulator_match *pfuze_matches; | ||
289 | |||
247 | static int pfuze_parse_regulators_dt(struct pfuze_chip *chip) | 290 | static int pfuze_parse_regulators_dt(struct pfuze_chip *chip) |
248 | { | 291 | { |
249 | struct device *dev = chip->dev; | 292 | struct device *dev = chip->dev; |
@@ -260,8 +303,20 @@ static int pfuze_parse_regulators_dt(struct pfuze_chip *chip) | |||
260 | return -EINVAL; | 303 | return -EINVAL; |
261 | } | 304 | } |
262 | 305 | ||
263 | ret = of_regulator_match(dev, parent, pfuze100_matches, | 306 | switch (chip->chip_id) { |
264 | ARRAY_SIZE(pfuze100_matches)); | 307 | case PFUZE200: |
308 | pfuze_matches = pfuze200_matches; | ||
309 | ret = of_regulator_match(dev, parent, pfuze200_matches, | ||
310 | ARRAY_SIZE(pfuze200_matches)); | ||
311 | break; | ||
312 | |||
313 | case PFUZE100: | ||
314 | default: | ||
315 | pfuze_matches = pfuze100_matches; | ||
316 | ret = of_regulator_match(dev, parent, pfuze100_matches, | ||
317 | ARRAY_SIZE(pfuze100_matches)); | ||
318 | break; | ||
319 | } | ||
265 | 320 | ||
266 | of_node_put(parent); | 321 | of_node_put(parent); |
267 | if (ret < 0) { | 322 | if (ret < 0) { |
@@ -275,12 +330,12 @@ static int pfuze_parse_regulators_dt(struct pfuze_chip *chip) | |||
275 | 330 | ||
276 | static inline struct regulator_init_data *match_init_data(int index) | 331 | static inline struct regulator_init_data *match_init_data(int index) |
277 | { | 332 | { |
278 | return pfuze100_matches[index].init_data; | 333 | return pfuze_matches[index].init_data; |
279 | } | 334 | } |
280 | 335 | ||
281 | static inline struct device_node *match_of_node(int index) | 336 | static inline struct device_node *match_of_node(int index) |
282 | { | 337 | { |
283 | return pfuze100_matches[index].of_node; | 338 | return pfuze_matches[index].of_node; |
284 | } | 339 | } |
285 | #else | 340 | #else |
286 | static int pfuze_parse_regulators_dt(struct pfuze_chip *chip) | 341 | static int pfuze_parse_regulators_dt(struct pfuze_chip *chip) |
@@ -308,7 +363,8 @@ static int pfuze_identify(struct pfuze_chip *pfuze_chip) | |||
308 | if (ret) | 363 | if (ret) |
309 | return ret; | 364 | return ret; |
310 | 365 | ||
311 | if (value & 0x0f) { | 366 | if ((value & 0x0f) != pfuze_chip->chip_id) { |
367 | /* device id NOT match with your setting */ | ||
312 | dev_warn(pfuze_chip->dev, "Illegal ID: %x\n", value); | 368 | dev_warn(pfuze_chip->dev, "Illegal ID: %x\n", value); |
313 | return -ENODEV; | 369 | return -ENODEV; |
314 | } | 370 | } |
@@ -344,17 +400,31 @@ static int pfuze100_regulator_probe(struct i2c_client *client, | |||
344 | dev_get_platdata(&client->dev); | 400 | dev_get_platdata(&client->dev); |
345 | struct regulator_config config = { }; | 401 | struct regulator_config config = { }; |
346 | int i, ret; | 402 | int i, ret; |
403 | const struct of_device_id *match; | ||
404 | u32 regulator_num; | ||
405 | u32 sw_check_start, sw_check_end; | ||
347 | 406 | ||
348 | pfuze_chip = devm_kzalloc(&client->dev, sizeof(*pfuze_chip), | 407 | pfuze_chip = devm_kzalloc(&client->dev, sizeof(*pfuze_chip), |
349 | GFP_KERNEL); | 408 | GFP_KERNEL); |
350 | if (!pfuze_chip) | 409 | if (!pfuze_chip) |
351 | return -ENOMEM; | 410 | return -ENOMEM; |
352 | 411 | ||
353 | i2c_set_clientdata(client, pfuze_chip); | 412 | if (client->dev.of_node) { |
354 | 413 | match = of_match_device(of_match_ptr(pfuze_dt_ids), | |
355 | memcpy(pfuze_chip->regulator_descs, pfuze100_regulators, | 414 | &client->dev); |
356 | sizeof(pfuze_chip->regulator_descs)); | 415 | if (!match) { |
416 | dev_err(&client->dev, "Error: No device match found\n"); | ||
417 | return -ENODEV; | ||
418 | } | ||
419 | pfuze_chip->chip_id = (int)(long)match->data; | ||
420 | } else if (id) { | ||
421 | pfuze_chip->chip_id = id->driver_data; | ||
422 | } else { | ||
423 | dev_err(&client->dev, "No dts match or id table match found\n"); | ||
424 | return -ENODEV; | ||
425 | } | ||
357 | 426 | ||
427 | i2c_set_clientdata(client, pfuze_chip); | ||
358 | pfuze_chip->dev = &client->dev; | 428 | pfuze_chip->dev = &client->dev; |
359 | 429 | ||
360 | pfuze_chip->regmap = devm_regmap_init_i2c(client, &pfuze_regmap_config); | 430 | pfuze_chip->regmap = devm_regmap_init_i2c(client, &pfuze_regmap_config); |
@@ -371,11 +441,34 @@ static int pfuze100_regulator_probe(struct i2c_client *client, | |||
371 | return ret; | 441 | return ret; |
372 | } | 442 | } |
373 | 443 | ||
444 | /* use the right regulators after identify the right device */ | ||
445 | switch (pfuze_chip->chip_id) { | ||
446 | case PFUZE200: | ||
447 | pfuze_regulators = pfuze200_regulators; | ||
448 | regulator_num = ARRAY_SIZE(pfuze200_regulators); | ||
449 | sw_check_start = PFUZE200_SW2; | ||
450 | sw_check_end = PFUZE200_SW3B; | ||
451 | break; | ||
452 | |||
453 | case PFUZE100: | ||
454 | default: | ||
455 | pfuze_regulators = pfuze100_regulators; | ||
456 | regulator_num = ARRAY_SIZE(pfuze100_regulators); | ||
457 | sw_check_start = PFUZE100_SW2; | ||
458 | sw_check_end = PFUZE100_SW4; | ||
459 | break; | ||
460 | } | ||
461 | dev_info(&client->dev, "pfuze%s found.\n", | ||
462 | (pfuze_chip->chip_id == PFUZE100) ? "100" : "200"); | ||
463 | |||
464 | memcpy(pfuze_chip->regulator_descs, pfuze_regulators, | ||
465 | sizeof(pfuze_chip->regulator_descs)); | ||
466 | |||
374 | ret = pfuze_parse_regulators_dt(pfuze_chip); | 467 | ret = pfuze_parse_regulators_dt(pfuze_chip); |
375 | if (ret) | 468 | if (ret) |
376 | return ret; | 469 | return ret; |
377 | 470 | ||
378 | for (i = 0; i < PFUZE100_MAX_REGULATOR; i++) { | 471 | for (i = 0; i < regulator_num; i++) { |
379 | struct regulator_init_data *init_data; | 472 | struct regulator_init_data *init_data; |
380 | struct regulator_desc *desc; | 473 | struct regulator_desc *desc; |
381 | int val; | 474 | int val; |
@@ -388,7 +481,7 @@ static int pfuze100_regulator_probe(struct i2c_client *client, | |||
388 | init_data = match_init_data(i); | 481 | init_data = match_init_data(i); |
389 | 482 | ||
390 | /* SW2~SW4 high bit check and modify the voltage value table */ | 483 | /* SW2~SW4 high bit check and modify the voltage value table */ |
391 | if (i > PFUZE100_SW1C && i < PFUZE100_SWBST) { | 484 | if (i >= sw_check_start && i <= sw_check_end) { |
392 | regmap_read(pfuze_chip->regmap, desc->vsel_reg, &val); | 485 | regmap_read(pfuze_chip->regmap, desc->vsel_reg, &val); |
393 | if (val & 0x40) { | 486 | if (val & 0x40) { |
394 | desc->min_uV = 800000; | 487 | desc->min_uV = 800000; |
diff --git a/include/linux/regulator/pfuze100.h b/include/linux/regulator/pfuze100.h index 65d550bf3954..364f7a7c43db 100644 --- a/include/linux/regulator/pfuze100.h +++ b/include/linux/regulator/pfuze100.h | |||
@@ -35,6 +35,20 @@ | |||
35 | #define PFUZE100_VGEN6 14 | 35 | #define PFUZE100_VGEN6 14 |
36 | #define PFUZE100_MAX_REGULATOR 15 | 36 | #define PFUZE100_MAX_REGULATOR 15 |
37 | 37 | ||
38 | #define PFUZE200_SW1AB 0 | ||
39 | #define PFUZE200_SW2 1 | ||
40 | #define PFUZE200_SW3A 2 | ||
41 | #define PFUZE200_SW3B 3 | ||
42 | #define PFUZE200_SWBST 4 | ||
43 | #define PFUZE200_VSNVS 5 | ||
44 | #define PFUZE200_VREFDDR 6 | ||
45 | #define PFUZE200_VGEN1 7 | ||
46 | #define PFUZE200_VGEN2 8 | ||
47 | #define PFUZE200_VGEN3 9 | ||
48 | #define PFUZE200_VGEN4 10 | ||
49 | #define PFUZE200_VGEN5 11 | ||
50 | #define PFUZE200_VGEN6 12 | ||
51 | |||
38 | struct regulator_init_data; | 52 | struct regulator_init_data; |
39 | 53 | ||
40 | struct pfuze_regulator_platform_data { | 54 | struct pfuze_regulator_platform_data { |