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* ENGR00308478 ARM: dts: imx6sx-sdb: Add camera support via the camera adapterRobby Cai2014-04-16
| | | | | | | | | | | | | | Previously we support camera features via mx51 expansion board due to footprint mirror issue on imx6sx sdb board. Now we switch to the adapter board (sch700-28342) to support same features. And the support via mx51 expansion board is deprecated. The changes include - Change the PINs setting for power and reset signal. - Add status flag to avoid the conflict use of LCD1_RESET pin by LCDIF1/CSI. For LCDIF1, it's used as LCD_PWR_EN, for CSI/camera, as RESET pin. Signed-off-by: Robby Cai <r63905@freescale.com>
* ENGR00308456-1 gpu:viante 5.0.11 kernel part integrationLoren Huang2014-04-16
| | | | | | | Integrated 5.0.11 kernel part change. Signed-off-by: Loren HUANG <b02279@freescale.com> Acked-by: Shawn Guo
* ENGR00308399 mtd: fsl-quadspi: quit if the M4 is using the quadspiHuang Shijie2014-04-16
| | | | | | | Detect if the quadspi is used by the M4. If the M4 does use it, we quit. Signed-off-by: Huang Shijie <b32955@freescale.com>
* ENGR00308394 pwm: i.MX: Avoid sample fifo overflow for i.MX pwm version2Liu Ying2014-04-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The i.MX pwm version2 is embedded in several i.MX SoCs, such as i.MX27, i.MX51 and i.MX6SL. There are four 16bit sample fifos in this IP, each of which determines the duty period of a PWM waveform in one full cycle. The IP spec mentions that we should not write a fourth sample because the fifo will become full and trigger a fifo write error(FWE) which will prevent the PWM from starting once it is enabled. In order to avoid any sample fifo overflow issue, this patch does software reset to clear all the sample fifos in the very beginning of the pwm configuration function. The fifo overflow issue can be reproduced by the following commands on the i.MX6SL evk platform, assuming we use pwm2 for the debug LED which is driven by the pin HSIC_STROBE and the maximal brightness is 255. echo 0 > /sys/class/leds/user/brightness echo 0 > /sys/class/leds/user/brightness echo 0 > /sys/class/leds/user/brightness echo 0 > /sys/class/leds/user/brightness echo 255 > /sys/class/leds/user/brightness Here, FWE happens(PWMSR register reads 0x58) and the LED can not be lighten. Acked-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ASoC: fsl_sai: Use FSL_SAI_xXR() and regmap_update_bits() to simplify codeNicolin Chen2014-04-16
| | | | | | | | By doing this, the driver can drop around 50 lines and become neater. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit 2a266f8b2ae790454edb79cb8c707c9305e0307a)
* ASoC: fsl_sai: Fix incorrect condition check in trigger()Nicolin Chen2014-04-16
| | | | | | | | | | | | | Patch ASoC: fsl_sai: Fix buggy configurations in trigger() doesn't entirely fix the condition: FRDE of the current substream direction is being cleared while the code is still using the non-updated one. Thus this patch fixes this issue by checking the opposite one's FRDE alone since the current one's is absolutely disabled. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit f84526cfae46672308a361333c76b724384b61ee)
* ENGR00308001 dma: imx-sdma: add support for sdma memory copyRobin Gong2014-04-16
| | | | | | | | | | | This patch use more common dma interface , including "device_prep_dma_memcpy" and "device_prep_dma_sg". The way in v3.0.35 reuse "device_prep_slave_sg" and need call twice to tell dest dma address in one memory copy(ENGR00233569). It looks tricky something, so give up the original patch. In this patch,"device_prep_dma_memcpy" support memory copy by buffer and "device_prep_dma_sg" support memory copy by scatter-list. You can get the example code from 'linux-test/module_test/mxc_sdma_memcopy_test.' Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00301095 gpu:gpu hang when dma memory is used upLoren Huang2014-04-16
| | | | | | | | | | | | | | When dma zone memory used up, gckOS_AllocateCMAMemoryFSL() will try to free non paged memory cache and allocate again. Such operation will cause twice memory mutex request and cause gpu driver hang. The solution is free the memory mutex at first before trying to free non paged memory cache. Date: Feb 27, 2014 Signed-off-by: Loren Huang <b02279@freescale.com> Acked-by: Shawn Guo (cherry picked from commit 79ed8edd23f990f6c1429154c2ee773c83bfd72e)
* ENGR00307835-4 ASoC: fsl: implement ASRC P2P xrun handlerShengjiu Wang2014-04-16
| | | | | | | When ASRC P2P is working, it will check the xrun status of cpu dai in the back end bistream. then will do Whole route stop and restart. Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ENGR00307835-3 ASoC: fsl: implement the ESAI xrun handler.Shengjiu Wang2014-04-16
| | | | | | | When esai xrun happened, there is possibility of channel swap. So ESAI need to be reset. Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ENGR00307835-2 ASoC: dmaengine: Add two function for dmaengine_pcmShengjiu Wang2014-04-16
| | | | | | Add check_xrun and device_reset for dmaengine_pcm Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ENGR00307835-1 ASoC: fsl: refine esai driver for sync modeShengjiu Wang2014-04-16
| | | | | | | 1. PCRC and PRRC should be set after the setting of control register according the RM. Then no need init TCCR and RCCR in init function. Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ENGR00308066 [#1091]Use spinlock_irqsave instead of spinlock in gpuLoren Huang2014-04-16
| | | | | | | | | | | Gpu kernel driver used spinlock in inerrupt context for debug purpose. So when enabled debug mode in gpu kernel driver, it may cause gpu kernel driver deadlock. Changed spinlock to spinlock_irqsave to resolve this issue. Patch from vivante. Date: Apr 11, 2014 Signed-off-by: Loren Huang <b02279@freescale.com>
* ENGR00306783 video: mxsfb: Add a new 32bit RGB fb pix fmt for 18bit displayLiu Ying2014-04-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a new 32bit RGB framebuffer pixel format support for 18bit display. The pixel format's components can be described by the following table: ----------------------------- | | length | offset | ----------------------------- | red | 8bit | 16bit | ----------------------------- | green | 8bit | 8bit | ----------------------------- | blue | 8bit | 0 | ----------------------------- | transp | 0 | N/A | ----------------------------- Userland should specify each component's length and offset to use this pixel format, otherwise the default 32bit pixel format which can be described by the following table will be active: ----------------------------- | | length | offset | ----------------------------- | red | 6bit | 16bit | ----------------------------- | green | 6bit | 8bit | ----------------------------- | blue | 6bit | 0 | ----------------------------- | transp | 0 | N/A | ----------------------------- Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00305366-04 net: fec: optimize imx6sx enet performanceFugang Duan2014-04-16
| | | | | | | | | | | | | | | | | | | | The patch do below changes for the enet performance improvement: - Enable GRO in default. The feature can be accessed by ethtool. - In enet napi callback, check interrupt to call tx/rx clean ring function. - For high rate register access, use __raw_writel/__raw_readl instead of writel/readl. When write trigger register for tx/rx, add dmb() to make sure the order. After the optimizition, and below condition: - cpu frequency is 996Mhz, cpufreq goverment is performance. - Connect to FPGA board. The imx6sx enet tcp performance result: TX: 867Mbps, cpu loading near to 100%. RX: 940Mbps, cpu loading near to 92%. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00305366-03 net: fec: remove memory copy for rx pathFugang Duan2014-04-16
| | | | | | | | | | | Re-allocate skb instead of memory copy skb in rx path to improve imx6sx enet rx performance. After the patch, rx performance can reach at 940Mbps (cpu loading is near to 100%) with below interrupt coalescing setting and cpu frequency is 996Mhz. enet reg 0x021880F0=C4000B00 enet reg 0x02188100=C5000900 Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00305366-02 net: fec: disable txf interrupt in napiFugang Duan2014-04-16
| | | | | | | Disable txf interrupt in napi, which can take about 20Mbps improvement for imx6sx enet tx bandwidth. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00305366-01 net: fec: disable netfilter in defaultFugang Duan2014-04-16
| | | | | | | Disable netfilter feature for enet can increase 30Mbps bandwidth for imx6sx enet tx path. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00307848 MXC IPUv3 fb: Fix MXCFB_CSC_UPDATE ioctl()Julien Olivain2014-04-16
| | | | | | | | Add a missing 'break' in the MXCFB_CSC_UPDATE case in mxcfb_ioctl(), to prevent it to always return EINVAL (Invalid argument). Acked-by: Liu Ying <Ying.Liu@freescale.com> Signed-off-by: Julien Olivain <julien.olivain@freescale.com>
* ENGR00307635-8 ARM: imx6sx: Add SAI support to each board level dtsNicolin Chen2014-04-16
| | | | | | | | | | | SAI has pin conflicts with other moudles on all current boards of Solo X and two sdma event conflicts with UART5. Thus this patch adds new dtbs for SAI cases that occupy the pins and the event IDs of SDMA. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00307635-7 ARM: imx6sx: Update SAI DT bindings and its pinctrl groupsNicolin Chen2014-04-16
| | | | | | | | | | Since we adds clock controls to SAI driver, we should also update its DTB to support it. This patch also appends two essential pinctrl groups to the DTB. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00307635-6 ASoC: fsl: Enable SAI for imx-sgtl5000 and imx-wm8962Nicolin Chen2014-04-16
| | | | | | | | Since we are able to link SAI and sgtl5000 and wm8962, we should update the Kconfig to make it build-in if enabling their machine drivers. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00307635-5 ASoC: imx-wm8962: Add non-SSI cpu dai supportNicolin Chen2014-04-16
| | | | | | | | | | | | The current imx-wm8962 machine driver is designed for SSI as CPU DAI only while as its name we should make the driver more generic to any other CPU DAI on i.MX serires -- ESAI, SAI for example. So this patch makes the driver more general so as to support those non-SSI cases. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00307635-4 ARM: imx6sx: Use 24.576MHz for both SSI and SAI clocksNicolin Chen2014-04-16
| | | | | | | SAI derives its mclk from SSI_CLK, so this patch sets a default value for them. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00307635-3 ARM: imx6sx: Update sdma DT bindingNicolin Chen2014-04-16
| | | | | | | | | Since we've created a new compatible for imx6sx-sdma, we here update its dtsi accordingly. Acked-by: Robin Gong <b38343@freescale.com> Acked-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00307635-2 dmaengine: imx-sdma: Add imx6sx platform supportNicolin Chen2014-04-16
| | | | | | | | | | | | | | The new Solo X has more requirements for SDMA events. So it creates a event mux to remap most of event numbers in GPR (General Purpose Register). If we want to use SDMA support for those module who do not get the even number as default, we need to configure GPR first. Thus this patch adds this support of GPR event remapping configuration to the SDMA driver. Acked-by: Robin Gong <b38343@freescale.com> Acked-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00307635-1 ASoC: fsl_sai: Specify buffer size for SAINicolin Chen2014-04-16
| | | | | | | Add a new micro for SAI so as to make further define flexible. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ASoC: fsl_sai: Add clock controls for SAINicolin Chen2014-04-16
| | | | | | | | | | | | | | | | | | | | | | | The SAI mainly has the following clocks: bus clock control and configure registers and to generate synchronous interrupts and DMA requests. mclk1, mclk2, mclk3 to generate the bit clock when the receiver or transmitter is configured for an internally generated bit clock. So this patch adds these clocks and their clock controls to the driver. [ To concern the old DTB cases, I've added a bit of extra code to make the driver compatible with them. And by marking clock NULL if failed to get, the clk_prepare() or clk_get_rate() would easily return 0 so no further path should be broken. -- by Nicolin ] Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Acked-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit 17d1eb6628e70488c44c46003dcfe583696bb7b7)
* pwm-backlight: Fix brightness adjustmentThierry Reding2014-04-16
| | | | | | | | | | | | | | Split adjustment of the brightness (by changing the PWM duty cycle) from the power on sequence. This fixes an issue where the brightness can no longer be updated once the backlight has been enabled. Reported-by: Marc Dietrich <marvin24@gmx.de> Signed-off-by: Thierry Reding <treding@nvidia.com> (cherry picked from commit e4bfeda96872bfe6015cd360008b77cd3b981b2b) Conflicts: drivers/video/backlight/pwm_bl.c
* pwm-backlight: Allow for non-increasing brightness levelsMike Dunn2014-04-16
| | | | | | | | | | | | | | | | | | Currently the driver assumes that the values specified in the brightness-levels device tree property increase as they are parsed from left to right. But boards that invert the signal between the PWM output and the backlight will need to specify decreasing brightness-levels. This patch removes the assumption that the last element of the array is the maximum value, and instead searches the array for the maximum value and uses that in the duty cycle calculation. Signed-off-by: Mike Dunn <mikedunn@newsguy.com> Signed-off-by: Thierry Reding <treding@nvidia.com> (cherry picked from commit 8f43e18e2769b3b28383903d501b4da29e388aad) Conflicts: drivers/video/backlight/pwm_bl.c
* pwm-backlight: Use new enable_gpio fieldThierry Reding2014-04-16
| | | | | | | | | | Make use of the new enable_gpio field and allow it to be set from DT as well. Now that all legacy users of platform data have been converted to initialize this field to an invalid value, it is safe to use the field from the driver. Signed-off-by: Thierry Reding <treding@nvidia.com> (cherry picked from commit 8265b2e4e62632b01f998095d1bbda4d281629fe)
* pwm-backlight: Add optional enable GPIOThierry Reding2014-04-16
| | | | | | | | | | | | | | | To support a wider variety of backlight setups, introduce an optional enable GPIO. Legacy users of the platform data already have a means of supporting GPIOs by using the .init(), .exit() and .notify() hooks. DT users however cannot use those, so an alternative method is required. In order to ease the introduction of the optional enable GPIO, make it available in the platform data first, so that existing users can be converted. Once that has happened a second patch will add code to make use of it in the driver. Signed-off-by: Thierry Reding <treding@nvidia.com> (cherry picked from commit 2b9b1620349e325f184c68cddf3b484499c163c0)
* pwm-backlight: Track enable stateThierry Reding2014-04-16
| | | | | | | | | | Follow up patches will add support for more complex means of powering the backlight on and off such as using a regulator. To prevent calls to the regulator API from becoming unbalanced, keep track of the enabled state internally. Signed-off-by: Thierry Reding <treding@nvidia.com> (cherry picked from commit 97c38437115aa0c3fb2d50c488814b503ba529e0)
* pwm-backlight: Refactor backlight power on/offThierry Reding2014-04-16
| | | | | | | | | In preparation for adding an optional regulator and enable GPIO to the driver, split the power on and power off sequences into separate functions to reduce code duplication at the multiple call sites. Signed-off-by: Thierry Reding <treding@nvidia.com> (cherry picked from commit 62b744a87c1170b339f993aa3cfb22465974816a)
* pwm-backlight: Improve readabilityThierry Reding2014-04-16
| | | | | | | | Add more blank lines to increase readability. While at it, remove a trailing blank line at the end of the file. Signed-off-by: Thierry Reding <treding@nvidia.com> (cherry picked from commit 668e63c6701d486c68b49ffffc0e5b7de1a2e95c)
* ENGR00307592 ASoC: fsl_asrc: Add delay after enabling ASRC p2pNicolin Chen2014-04-16
| | | | | | | | | | | When using ASRC p2p as a for-end with other back-end modules like ESAI, it'd be safer to add 1ms delay, less might be futile for extreme cases, after enabling ASRC so as to keep ASRC output FIFO with enough data to content the DMA burstsize of back-ends and accordingly prevent underrun that might happen to them. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ASoC: fsl_sai: Fix Bit Clock Polarity configurationsNicolin Chen2014-04-16
| | | | | | | | | | | | | | | | | | | | | | The BCP bit in TCR4/RCR4 register rules as followings: 0 Bit clock is active high with drive outputs on rising edge and sample inputs on falling edge. 1 Bit clock is active low with drive outputs on falling edge and sample inputs on rising edge. For all formats currently supported in the fsl_sai driver, they're exactly sending data on the falling edge and sampling on the rising edge. However, the driver clears this BCP bit for all of them which results click noise when working with SGTL5000 and big noise with WM8962. Thus this patch corrects the BCP settings for all the formats here to fix the nosie issue. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Acked-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit ef33bc3217c7aa9868f497c4f797cc50ad3ce357)
* ENGR00306955-2 ARM:dts:im6x: Add device tree for IRAM used by low power code.Ranjani Vaidyanathan2014-04-16
| | | | | | | Ensure that fsl,lpm-sram is only set for the memory that is used by low power code in the dts files. Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
* ENGR00306955-1 ARM:imx6x Ensure that both IRAM and OCRAM_S can be mapped in ↵Ranjani Vaidyanathan2014-04-16
| | | | | | | | | | | | | | | | | | | the IRAM page table To prevent a page table walk in the DDR, its required that the low power code use a minimal set of page tables that are stored in IRAM. This IRAM page table needs to have a known virtual address so the mapping needs to be created at the beginning of boot using iotable_init(). This patch fixes the following issues: 1. Ensure that OCRAM_S, IRAM, AIPS1 and AIPS2 can all be mapped by the IMX_IO_P2V macro. 2. Ensure Section mapping is used for the required addresses in the IRAM page table. 3. Obtain the address of the IRAM/OCRAM_S to be used by low power code from the device tree. Since the device tree is not setup early in the boot, use the flat device tree apis to get the address. Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
* ENGR00306857 pulseaudio5.0 mute Headphone volume when Headphone pluggedShengjiu Wang2014-04-16
| | | | | | | Pulseaudio will detect the Headphone Jack, then swith to Headphone. So register new Jack for Headphone, the iface=CARD. Signed-off-by: Shengjiu Wang <b02247@freescale.com>
* ENGR00307017: input: keyboard: snvs_pwrkey: fix system crash sometimes ↵Robin Gong2014-04-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | during boot If there is one ONOFF power key interrupt pending before RESET key pushed. system will crash as below in the next boot cycle, because the pending interrupt will be serviced after devm_request_irq while the driver probe has not finished and the drvdata is NULL. So clear the meaningless irq status in the probe. ousedev: PS/2 mouse device common for all mice Unable to handle kernel NULL pointer dereference at virtual address 00000000 pgd = 80004000 [00000000] *pgd=00000000 Internal error: Oops: 5 [#1] PREEMPT SMP ARM Modules linked in: CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.10.17-01631-g6b7b681-dirty #343 task: a806c000 ti: a806e000 task.ti: a806e000 PC is at imx_snvs_pwrkey_interrupt+0x10/0x4c LR is at imx_snvs_pwrkey_interrupt+0xc/0x4c pc : [<803f0594>] lr : [<803f0590>] psr: a0000193 sp : a806fd10 ip : fffffffa fp : 00000001 r10: 80cb630e r9 : a8006b40 r8 : 00000024 r7 : 00000000 r6 : 00000000 r5 : a8006b90 r4 : a83b5340 r3 : 803f0584 r2 : a806fd48 r1 : a80ad000 r0 : 00000000 Flags: NzCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment kernel Control: 10c53c7d Table: 8000404a DAC: 00000015 Process swapper/0 (pid: 1, stack limit = 0xa806e238) Stack: (0xa806fd10 to 0xa8070000) fd00: a83b5340 a8006b90 00000000 8007363c fd20: 80cb6000 80090604 00000001 a8006b40 a8006b90 a83b5340 c0802100 60000113 fd40: a8006b70 00000000 00000000 800737a0 a8006b40 a8006b90 00000000 8007646c fd60: 800763e8 00000024 00000024 80072e04 80c5fef0 8000e948 c080210c 80c6a904 fd80: a806fda0 80008558 80074b94 8063c75c 60000113 ffffffff a806fdd4 8000dc80 fda0: a8006b90 60000113 a806fdb8 00000007 a8006b40 a83b5340 a8006b90 00000024 fdc0: 60000113 a8006b70 00000000 00000000 000000ff a806fde8 80074b94 8063c75c fde0: 60000113 ffffffff 00000000 80074b94 80c6f688 020cc000 00000000 00000001 fe00: a83b5340 a8006b40 803f0584 00000004 00000024 a80ad000 00000000 80074f50 fe20: a83b5310 a80ad000 00000024 803f0584 00000000 a80ad010 80c53804 80076a40 fe40: a80ab880 a80ad000 a836e990 a836e990 a80ad010 8152696c a80ad000 80cb6480 fe60: 80c44f90 803f0774 00000004 a80ab880 a80ad000 00000000 80d0ba0c a80ad010 fe80: 00000000 80c9a1f0 80cb6480 803099c0 803099a8 8030876c 00000000 a80ad010 fea0: 80c9a1f0 a80ad044 00000000 80308958 00000000 80c9a1f0 803088cc 80306c88 fec0: a804055c a80ac1b4 80c9a1f0 a836e680 80c89a30 80307f30 80b82af4 80c9a1f0 fee0: 00000006 80c9a1f0 00000006 80cb6480 80cb6480 80308f34 80c5e688 00000006 ff00: 80cb6480 80cb6480 80cb6480 80008704 000000f2 80041d60 80c537dc a806e010 ff20: 80b81e6c 80be5e54 00000006 00000006 800415cc 80041624 00000000 80c5e688 ff40: 00000006 80cb6480 80cb6480 80c194dc 000000f2 80c53804 80c537f8 80c19be0 ff60: 00000006 00000006 80c194dc 900ff07c ab86ff79 08012008 a806ff9c 00000000 ff80: 80631050 00000000 00000000 00000000 00000000 00000000 00000000 80631058 ffa0: 00000000 00000000 80631050 8000e118 00000000 00000000 00000000 00000000 ffc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ffe0: 00000000 00000000 00000000 00000000 00000013 00000000 fdfe5bba dbfe26ba [<803f0594>] (imx_snvs_pwrkey_interrupt+0x10/0x4c) from [<8007363c>] (handle_irq_event_percpu+0x54/0x17c) [<8007363c>] (handle_irq_event_percpu+0x54/0x17c) from [<800737a0>] (handle_irq_event+0x3c/0x5c) [<800737a0>] (handle_irq_event+0x3c/0x5c) from [<8007646c>] (handle_fasteoi_irq+0x84/0x14c) [<8007646c>] (handle_fasteoi_irq+0x84/0x14c) from [<80072e04>] (generic_handle_irq+0x2c/0x3c) [<80072e04>] (generic_handle_irq+0x2c/0x3c) from [<8000e948>] (handle_IRQ+0x40/0x90) [<8000e948>] (handle_IRQ+0x40/0x90) from [<80008558>] (gic_handle_irq+0x2c/0x5c) [<80008558>] (gic_handle_irq+0x2c/0x5c) from [<8000dc80>] (__irq_svc+0x40/0x70) Exception stack(0xa806fda0 to 0xa806fde8) fda0: a8006b90 60000113 a806fdb8 00000007 a8006b40 a83b5340 a8006b90 00000024 fdc0: 60000113 a8006b70 00000000 00000000 000000ff a806fde8 80074b94 8063c75c fde0: 60000113 ffffffff [<8000dc80>] (__irq_svc+0x40/0x70) from [<8063c75c>] (_raw_spin_unlock_irqrestore+0x20/0x48) [<8063c75c>] (_raw_spin_unlock_irqrestore+0x20/0x48) from [<80074b94>] (__setup_irq+0x1b4/0x440) [<80074b94>] (__setup_irq+0x1b4/0x440) from [<80074f50>] (request_threaded_irq+0xa8/0x128) [<80074f50>] (request_threaded_irq+0xa8/0x128) from [<80076a40>] (devm_request_threaded_irq+0x58/0x9c) [<80076a40>] (devm_request_threaded_irq+0x58/0x9c) from [<803f0774>] (imx_snvs_pwrkey_probe+0x118/0x250) [<803f0774>] (imx_snvs_pwrkey_probe+0x118/0x250) from [<803099c0>] (platform_drv_probe+0x18/0x1c) [<803099c0>] (platform_drv_probe+0x18/0x1c) from [<8030876c>] (driver_probe_device+0x10c/0x228) [<8030876c>] (driver_probe_device+0x10c/0x228) from [<80308958>] (__driver_attach+0x8c/0x90) [<80308958>] (__driver_attach+0x8c/0x90) from [<80306c88>] (bus_for_each_dev+0x60/0x94) [<80306c88>] (bus_for_each_dev+0x60/0x94) from [<80307f30>] (bus_add_driver+0x1c0/0x24c) [<80307f30>] (bus_add_driver+0x1c0/0x24c) from [<80308f34>] (driver_register+0x78/0x140) [<80308f34>] (driver_register+0x78/0x140) from [<80008704>] (do_one_initcall+0x108/0x158) [<80008704>] (do_one_initcall+0x108/0x158) from [<80c19be0>] (kernel_init_freeable+0x138/0x1d8) [<80c19be0>] (kernel_init_freeable+0x138/0x1d8) from [<80631058>] (kernel_init+0x8/0x158) [<80631058>] (kernel_init+0x8/0x158) from [<8000e118>] (ret_from_fork+0x14/0x3c) Code: e92d4070 e2810010 ebfc5ebe e1a06000 (e5904000) ---[ end trace bd5e3234432334c1 ]--- Kernel panic - not syncing: Fatal exception in interrupt Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00306832 mxsfb: xres_virtual should not larger than xresSandor Yu2014-04-16
| | | | | | | | eLCDIF did not support stride buffer, check the xres_virtual in function mxfb_check_var, return false if the value larger than xres. Signed-off-by: Sandor Yu <R01008@freescale.com>
* ENGR00306875-2 video: mxc_hdmi: Set hdmi cable state a bit earilierNicolin Chen2014-04-16
| | | | | | | | | | | | | | | | | During hdmi hotplug test, there's a possibility that X-server unblanks the frame buffer while HDMI-audio just gets the signal to start playback. Then audio would get an unblanked state right before the playback and bypassed the DMA enabling code. So this issue is caused by the race between unblank and set_cable_state(). This patch sets the hdmi cable state a bit earilier so as to let audio play first. If unblank happens later, the hdmi core and hdmi audio would be robust enough to handle that case as long as it's not racing with the other parts. Acked-by: Sandor Yu <R01008@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> (cherry picked from commit 2917061c498a97e3c3b99ac616b6f3202f8a0499)
* ENGR00306875-1 Revert "ENGR00305624-2 ASoC: imx-hdmi-dma: Correct the appl ↵Nicolin Chen2014-04-16
| | | | | | | | | | | | | | | | | | | pointer" After change the pointer, ALSA lib would re-copy the initial data to DMA buffer because the pointer is pointing the zero position at the beginning, which results an audiable duplicated playback at the first eight periods. Even though dropping this patch would cause pointer being incorrectly estimated. But to maintain the sanity of basic playback, we revert the previous patch. This reverts commit 5d0d4e1558fa0c235691436e1c5d26d9c8950775. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> (cherry picked from commit cb6cd68b00fbb52852101ca2f3bc93ae45310b66)
* ENGR00306653-3: ARM: imx_v7_defconfig enable snvs_pwrkey driver by defaultRobin Gong2014-04-16
| | | | | | enable snvs_pwrkey driver by default Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00306653-2 input: keyboad: snvs_pwrkey: add snvs power key driverRobin Gong2014-04-16
| | | | | | add snvs power key driver since ic team has fix some issues of SNVS on i.mx6sx Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00306653-1: ARM: dts: imx6sx: add snvs power key nodeRobin Gong2014-04-16
| | | | | | | Put snvs-pwrkey device node in imx6sx.dtsi since all boards with i.mx6sx were designed with ONOFF as power key and it's a function at soc level. Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00304418 [V4l2][PXP] Add some rotation cases support for V4L app.Fancy Fang2014-04-16
| | | | | | | | Some V4L2 apps require that playing rotated fullscreen video on the screen. In recent PXP driver, this is not supported yet. So this patch adds it on through combining rotation and resize together. Signed-off-by: Fancy Fang <chen.fang@freescale.com>
* ENGR00301270 [V4L2 Capture] PXP V4L2 output can't report absolute physical ↵Fancy Fang2014-04-16
| | | | | | | | | | address. Add absolute physical address report by V4L2 driver after this buffer has been mapped, which is requested by some multimedia applications. Signed-off-by: Fancy Fang <chen.fang@freescale.com>
* Input: tsc2007 - add device tree support.Denis Carikli2014-04-16
| | | | | Signed-off-by: Denis Carikli <denis@eukrea.com> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-11 01:23:51 -0400