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authorNicolin Chen <Guangyu.Chen@freescale.com>2014-04-08 07:09:29 -0400
committerNitin Garg <nitin.garg@freescale.com>2014-04-16 09:58:18 -0400
commit2a5ece16f23ecd6da8bf0fc348345c12c4b13c80 (patch)
treea10f0be2db7579e576c5d508abf4ecda2111b5bc
parent5cf1d7bcc43ff45b60b90981845df03f20aede87 (diff)
ENGR00307635-7 ARM: imx6sx: Update SAI DT bindings and its pinctrl groups
Since we adds clock controls to SAI driver, we should also update its DTB to support it. This patch also appends two essential pinctrl groups to the DTB. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
-rw-r--r--arch/arm/boot/dts/imx6sx.dtsi34
1 files changed, 30 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index 708edf7f3042..fc9397df3661 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -716,8 +716,10 @@
716 compatible = "fsl,imx6sx-sai"; 716 compatible = "fsl,imx6sx-sai";
717 reg = <0x021d4000 0x4000>; 717 reg = <0x021d4000 0x4000>;
718 interrupts = <0 97 0x04>; 718 interrupts = <0 97 0x04>;
719 clocks = <&clks IMX6SX_CLK_SAI1_IPG>, <&clks IMX6SX_CLK_SAI1>; 719 clocks = <&clks IMX6SX_CLK_SAI1_IPG>,
720 clock-names = "ipg", "sai"; 720 <&clks IMX6SX_CLK_SAI1>,
721 <&clks 0>, <&clks 0>;
722 clock-names = "bus", "mclk1", "mclk2", "mclk3";
721 dma-names = "rx", "tx"; 723 dma-names = "rx", "tx";
722 dmas = <&sdma 31 23 0>, <&sdma 32 23 0>; 724 dmas = <&sdma 31 23 0>, <&sdma 32 23 0>;
723 dma-source = <&gpr 0 15 0 16>; 725 dma-source = <&gpr 0 15 0 16>;
@@ -728,8 +730,10 @@
728 compatible = "fsl,imx6sx-sai"; 730 compatible = "fsl,imx6sx-sai";
729 reg = <0x021dc000 0x4000>; 731 reg = <0x021dc000 0x4000>;
730 interrupts = <0 98 0x04>; 732 interrupts = <0 98 0x04>;
731 clocks = <&clks IMX6SX_CLK_SAI2_IPG>, <&clks IMX6SX_CLK_SAI2>; 733 clocks = <&clks IMX6SX_CLK_SAI2_IPG>,
732 clock-names = "ipg", "sai"; 734 <&clks IMX6SX_CLK_SAI2>,
735 <&clks 0>, <&clks 0>;
736 clock-names = "bus", "mclk1", "mclk2", "mclk3";
733 dma-names = "rx", "tx"; 737 dma-names = "rx", "tx";
734 dmas = <&sdma 33 23 0>, <&sdma 34 23 0>; 738 dmas = <&sdma 33 23 0>, <&sdma 34 23 0>;
735 dma-source = <&gpr 0 17 0 18>; 739 dma-source = <&gpr 0 17 0 18>;
@@ -1447,8 +1451,30 @@
1447 MX6SX_PAD_CSI_VSYNC__SAI1_RX_DATA_0 0x1b030 1451 MX6SX_PAD_CSI_VSYNC__SAI1_RX_DATA_0 0x1b030
1448 >; 1452 >;
1449 }; 1453 };
1454
1455 pinctrl_sai1_2: sai1grp_2 {
1456 fsl,pins = <
1457 MX6SX_PAD_CSI_DATA00__SAI1_TX_BCLK 0x130B0
1458 MX6SX_PAD_CSI_DATA01__SAI1_TX_SYNC 0x130B0
1459 MX6SX_PAD_CSI_HSYNC__SAI1_TX_DATA_0 0x120B0
1460 MX6SX_PAD_CSI_VSYNC__SAI1_RX_DATA_0 0x130B0
1461 MX6SX_PAD_CSI_PIXCLK__AUDMUX_MCLK 0x130B0
1462 >;
1463 };
1464 };
1465
1466 sai2 {
1467 pinctrl_sai2_1: sai2grp_1 {
1468 fsl,pins = <
1469 MX6SX_PAD_KEY_COL0__SAI2_TX_BCLK 0x1b030
1470 MX6SX_PAD_KEY_COL1__SAI2_TX_SYNC 0x1b030
1471 MX6SX_PAD_KEY_ROW0__SAI2_TX_DATA_0 0x1b030
1472 MX6SX_PAD_KEY_ROW1__SAI2_RX_DATA_0 0x1b030
1473 >;
1474 };
1450 }; 1475 };
1451 1476
1477
1452 spdif { 1478 spdif {
1453 pinctrl_spdif_1: spdifgrp-1 { 1479 pinctrl_spdif_1: spdifgrp-1 {
1454 fsl,pins = < 1480 fsl,pins = <