diff options
Diffstat (limited to 'arch/powerpc')
438 files changed, 7857 insertions, 3818 deletions
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index d111044f41a2..ec4047e170a0 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig | |||
| @@ -127,7 +127,8 @@ config PPC | |||
| 127 | select IRQ_FORCED_THREADING | 127 | select IRQ_FORCED_THREADING |
| 128 | select HAVE_RCU_TABLE_FREE if SMP | 128 | select HAVE_RCU_TABLE_FREE if SMP |
| 129 | select HAVE_SYSCALL_TRACEPOINTS | 129 | select HAVE_SYSCALL_TRACEPOINTS |
| 130 | select HAVE_CBPF_JIT if CPU_BIG_ENDIAN | 130 | select HAVE_CBPF_JIT if !PPC64 |
| 131 | select HAVE_EBPF_JIT if PPC64 | ||
| 131 | select HAVE_ARCH_JUMP_LABEL | 132 | select HAVE_ARCH_JUMP_LABEL |
| 132 | select ARCH_HAVE_NMI_SAFE_CMPXCHG | 133 | select ARCH_HAVE_NMI_SAFE_CMPXCHG |
| 133 | select ARCH_HAS_GCOV_PROFILE_ALL | 134 | select ARCH_HAS_GCOV_PROFILE_ALL |
| @@ -163,6 +164,8 @@ config PPC | |||
| 163 | select ARCH_HAS_UBSAN_SANITIZE_ALL | 164 | select ARCH_HAS_UBSAN_SANITIZE_ALL |
| 164 | select ARCH_SUPPORTS_DEFERRED_STRUCT_PAGE_INIT | 165 | select ARCH_SUPPORTS_DEFERRED_STRUCT_PAGE_INIT |
| 165 | select HAVE_LIVEPATCH if HAVE_DYNAMIC_FTRACE_WITH_REGS | 166 | select HAVE_LIVEPATCH if HAVE_DYNAMIC_FTRACE_WITH_REGS |
| 167 | select GENERIC_CPU_AUTOPROBE | ||
| 168 | select HAVE_VIRT_CPU_ACCOUNTING | ||
| 166 | 169 | ||
| 167 | config GENERIC_CSUM | 170 | config GENERIC_CSUM |
| 168 | def_bool CPU_LITTLE_ENDIAN | 171 | def_bool CPU_LITTLE_ENDIAN |
| @@ -456,6 +459,29 @@ config KEXEC | |||
| 456 | interface is strongly in flux, so no good recommendation can be | 459 | interface is strongly in flux, so no good recommendation can be |
| 457 | made. | 460 | made. |
| 458 | 461 | ||
| 462 | config RELOCATABLE | ||
| 463 | bool "Build a relocatable kernel" | ||
| 464 | depends on (PPC64 && !COMPILE_TEST) || (FLATMEM && (44x || FSL_BOOKE)) | ||
| 465 | select NONSTATIC_KERNEL | ||
| 466 | help | ||
| 467 | This builds a kernel image that is capable of running at the | ||
| 468 | location the kernel is loaded at. For ppc32, there is no any | ||
| 469 | alignment restrictions, and this feature is a superset of | ||
| 470 | DYNAMIC_MEMSTART and hence overrides it. For ppc64, we should use | ||
| 471 | 16k-aligned base address. The kernel is linked as a | ||
| 472 | position-independent executable (PIE) and contains dynamic relocations | ||
| 473 | which are processed early in the bootup process. | ||
| 474 | |||
| 475 | One use is for the kexec on panic case where the recovery kernel | ||
| 476 | must live at a different physical address than the primary | ||
| 477 | kernel. | ||
| 478 | |||
| 479 | Note: If CONFIG_RELOCATABLE=y, then the kernel runs from the address | ||
| 480 | it has been loaded at and the compile time physical addresses | ||
| 481 | CONFIG_PHYSICAL_START is ignored. However CONFIG_PHYSICAL_START | ||
| 482 | setting can still be useful to bootwrappers that need to know the | ||
| 483 | load address of the kernel (eg. u-boot/mkimage). | ||
| 484 | |||
| 459 | config CRASH_DUMP | 485 | config CRASH_DUMP |
| 460 | bool "Build a kdump crash kernel" | 486 | bool "Build a kdump crash kernel" |
| 461 | depends on PPC64 || 6xx || FSL_BOOKE || (44x && !SMP) | 487 | depends on PPC64 || 6xx || FSL_BOOKE || (44x && !SMP) |
| @@ -948,29 +974,6 @@ config DYNAMIC_MEMSTART | |||
| 948 | 974 | ||
| 949 | This option is overridden by CONFIG_RELOCATABLE | 975 | This option is overridden by CONFIG_RELOCATABLE |
| 950 | 976 | ||
| 951 | config RELOCATABLE | ||
| 952 | bool "Build a relocatable kernel" | ||
| 953 | depends on ADVANCED_OPTIONS && FLATMEM && (44x || FSL_BOOKE) | ||
| 954 | select NONSTATIC_KERNEL | ||
| 955 | help | ||
| 956 | This builds a kernel image that is capable of running at the | ||
| 957 | location the kernel is loaded at, without any alignment restrictions. | ||
| 958 | This feature is a superset of DYNAMIC_MEMSTART and hence overrides it. | ||
| 959 | |||
| 960 | One use is for the kexec on panic case where the recovery kernel | ||
| 961 | must live at a different physical address than the primary | ||
| 962 | kernel. | ||
| 963 | |||
| 964 | Note: If CONFIG_RELOCATABLE=y, then the kernel runs from the address | ||
| 965 | it has been loaded at and the compile time physical addresses | ||
| 966 | CONFIG_PHYSICAL_START is ignored. However CONFIG_PHYSICAL_START | ||
| 967 | setting can still be useful to bootwrappers that need to know the | ||
| 968 | load address of the kernel (eg. u-boot/mkimage). | ||
| 969 | |||
| 970 | config RELOCATABLE_PPC32 | ||
| 971 | def_bool y | ||
| 972 | depends on PPC32 && RELOCATABLE | ||
| 973 | |||
| 974 | config PAGE_OFFSET_BOOL | 977 | config PAGE_OFFSET_BOOL |
| 975 | bool "Set custom page offset address" | 978 | bool "Set custom page offset address" |
| 976 | depends on ADVANCED_OPTIONS | 979 | depends on ADVANCED_OPTIONS |
| @@ -1053,24 +1056,14 @@ config CONSISTENT_SIZE | |||
| 1053 | config PIN_TLB | 1056 | config PIN_TLB |
| 1054 | bool "Pinned Kernel TLBs (860 ONLY)" | 1057 | bool "Pinned Kernel TLBs (860 ONLY)" |
| 1055 | depends on ADVANCED_OPTIONS && 8xx | 1058 | depends on ADVANCED_OPTIONS && 8xx |
| 1059 | |||
| 1060 | config PIN_TLB_IMMR | ||
| 1061 | bool "Pinned TLB for IMMR" | ||
| 1062 | depends on PIN_TLB | ||
| 1063 | default y | ||
| 1056 | endmenu | 1064 | endmenu |
| 1057 | 1065 | ||
| 1058 | if PPC64 | 1066 | if PPC64 |
| 1059 | config RELOCATABLE | ||
| 1060 | bool "Build a relocatable kernel" | ||
| 1061 | depends on !COMPILE_TEST | ||
| 1062 | select NONSTATIC_KERNEL | ||
| 1063 | help | ||
| 1064 | This builds a kernel image that is capable of running anywhere | ||
| 1065 | in the RMA (real memory area) at any 16k-aligned base address. | ||
| 1066 | The kernel is linked as a position-independent executable (PIE) | ||
| 1067 | and contains dynamic relocations which are processed early | ||
| 1068 | in the bootup process. | ||
| 1069 | |||
| 1070 | One use is for the kexec on panic case where the recovery kernel | ||
| 1071 | must live at a different physical address than the primary | ||
| 1072 | kernel. | ||
| 1073 | |||
| 1074 | # This value must have zeroes in the bottom 60 bits otherwise lots will break | 1067 | # This value must have zeroes in the bottom 60 bits otherwise lots will break |
| 1075 | config PAGE_OFFSET | 1068 | config PAGE_OFFSET |
| 1076 | hex | 1069 | hex |
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug index d3fcf7e64e3a..171047822b56 100644 --- a/arch/powerpc/Kconfig.debug +++ b/arch/powerpc/Kconfig.debug | |||
| @@ -149,14 +149,14 @@ config PPC_EARLY_DEBUG_BOOTX | |||
| 149 | 149 | ||
| 150 | config PPC_EARLY_DEBUG_LPAR | 150 | config PPC_EARLY_DEBUG_LPAR |
| 151 | bool "LPAR HV Console" | 151 | bool "LPAR HV Console" |
| 152 | depends on PPC_PSERIES | 152 | depends on PPC_PSERIES && HVC_CONSOLE |
| 153 | help | 153 | help |
| 154 | Select this to enable early debugging for a machine with a HVC | 154 | Select this to enable early debugging for a machine with a HVC |
| 155 | console on vterm 0. | 155 | console on vterm 0. |
| 156 | 156 | ||
| 157 | config PPC_EARLY_DEBUG_LPAR_HVSI | 157 | config PPC_EARLY_DEBUG_LPAR_HVSI |
| 158 | bool "LPAR HVSI Console" | 158 | bool "LPAR HVSI Console" |
| 159 | depends on PPC_PSERIES | 159 | depends on PPC_PSERIES && HVC_CONSOLE |
| 160 | help | 160 | help |
| 161 | Select this to enable early debugging for a machine with a HVSI | 161 | Select this to enable early debugging for a machine with a HVSI |
| 162 | console on a specified vterm. | 162 | console on a specified vterm. |
| @@ -212,7 +212,6 @@ config PPC_EARLY_DEBUG_40x | |||
| 212 | config PPC_EARLY_DEBUG_CPM | 212 | config PPC_EARLY_DEBUG_CPM |
| 213 | bool "Early serial debugging for Freescale CPM-based serial ports" | 213 | bool "Early serial debugging for Freescale CPM-based serial ports" |
| 214 | depends on SERIAL_CPM | 214 | depends on SERIAL_CPM |
| 215 | select PIN_TLB if PPC_8xx | ||
| 216 | help | 215 | help |
| 217 | Select this to enable early debugging for Freescale chips | 216 | Select this to enable early debugging for Freescale chips |
| 218 | using a CPM-based serial port. This assumes that the bootwrapper | 217 | using a CPM-based serial port. This assumes that the bootwrapper |
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile index 709a22a3e824..ca254546cd05 100644 --- a/arch/powerpc/Makefile +++ b/arch/powerpc/Makefile | |||
| @@ -181,6 +181,11 @@ KBUILD_CFLAGS += -pipe -Iarch/$(ARCH) $(CFLAGS-y) | |||
| 181 | CPP = $(CC) -E $(KBUILD_CFLAGS) | 181 | CPP = $(CC) -E $(KBUILD_CFLAGS) |
| 182 | 182 | ||
| 183 | CHECKFLAGS += -m$(CONFIG_WORD_SIZE) -D__powerpc__ -D__powerpc$(CONFIG_WORD_SIZE)__ | 183 | CHECKFLAGS += -m$(CONFIG_WORD_SIZE) -D__powerpc__ -D__powerpc$(CONFIG_WORD_SIZE)__ |
| 184 | ifdef CONFIG_CPU_BIG_ENDIAN | ||
| 185 | CHECKFLAGS += -D__BIG_ENDIAN__ | ||
| 186 | else | ||
| 187 | CHECKFLAGS += -D__LITTLE_ENDIAN__ | ||
| 188 | endif | ||
| 184 | 189 | ||
| 185 | KBUILD_LDFLAGS_MODULE += arch/powerpc/lib/crtsavres.o | 190 | KBUILD_LDFLAGS_MODULE += arch/powerpc/lib/crtsavres.o |
| 186 | 191 | ||
| @@ -221,7 +226,7 @@ KBUILD_CFLAGS += -mno-sched-epilog | |||
| 221 | endif | 226 | endif |
| 222 | 227 | ||
| 223 | cpu-as-$(CONFIG_4xx) += -Wa,-m405 | 228 | cpu-as-$(CONFIG_4xx) += -Wa,-m405 |
| 224 | cpu-as-$(CONFIG_ALTIVEC) += -Wa,-maltivec | 229 | cpu-as-$(CONFIG_ALTIVEC) += $(call as-option,-Wa$(comma)-maltivec) |
| 225 | cpu-as-$(CONFIG_E200) += -Wa,-me200 | 230 | cpu-as-$(CONFIG_E200) += -Wa,-me200 |
| 226 | 231 | ||
| 227 | KBUILD_AFLAGS += $(cpu-as-y) | 232 | KBUILD_AFLAGS += $(cpu-as-y) |
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile index 8fe78a3efc92..4cd612a6e272 100644 --- a/arch/powerpc/boot/Makefile +++ b/arch/powerpc/boot/Makefile | |||
| @@ -70,7 +70,7 @@ $(addprefix $(obj)/,$(zlib) cuboot-c2k.o gunzip_util.o main.o): \ | |||
| 70 | libfdt := fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c | 70 | libfdt := fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c |
| 71 | libfdtheader := fdt.h libfdt.h libfdt_internal.h | 71 | libfdtheader := fdt.h libfdt.h libfdt_internal.h |
| 72 | 72 | ||
| 73 | $(addprefix $(obj)/,$(libfdt) libfdt-wrapper.o simpleboot.o epapr.o): \ | 73 | $(addprefix $(obj)/,$(libfdt) libfdt-wrapper.o simpleboot.o epapr.o opal.o): \ |
| 74 | $(addprefix $(obj)/,$(libfdtheader)) | 74 | $(addprefix $(obj)/,$(libfdtheader)) |
| 75 | 75 | ||
| 76 | src-wlib-y := string.S crt0.S crtsavres.S stdio.c main.c \ | 76 | src-wlib-y := string.S crt0.S crtsavres.S stdio.c main.c \ |
| @@ -78,7 +78,7 @@ src-wlib-y := string.S crt0.S crtsavres.S stdio.c main.c \ | |||
| 78 | ns16550.c serial.c simple_alloc.c div64.S util.S \ | 78 | ns16550.c serial.c simple_alloc.c div64.S util.S \ |
| 79 | gunzip_util.c elf_util.c $(zlib) devtree.c stdlib.c \ | 79 | gunzip_util.c elf_util.c $(zlib) devtree.c stdlib.c \ |
| 80 | oflib.c ofconsole.c cuboot.c mpsc.c cpm-serial.c \ | 80 | oflib.c ofconsole.c cuboot.c mpsc.c cpm-serial.c \ |
| 81 | uartlite.c mpc52xx-psc.c | 81 | uartlite.c mpc52xx-psc.c opal.c opal-calls.S |
| 82 | src-wlib-$(CONFIG_40x) += 4xx.c planetcore.c | 82 | src-wlib-$(CONFIG_40x) += 4xx.c planetcore.c |
| 83 | src-wlib-$(CONFIG_44x) += 4xx.c ebony.c bamboo.c | 83 | src-wlib-$(CONFIG_44x) += 4xx.c ebony.c bamboo.c |
| 84 | src-wlib-$(CONFIG_8xx) += mpc8xx.c planetcore.c fsl-soc.c | 84 | src-wlib-$(CONFIG_8xx) += mpc8xx.c planetcore.c fsl-soc.c |
| @@ -113,6 +113,7 @@ src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c epapr-wrapper.c | |||
| 113 | src-plat-$(CONFIG_PPC_PSERIES) += pseries-head.S | 113 | src-plat-$(CONFIG_PPC_PSERIES) += pseries-head.S |
| 114 | src-plat-$(CONFIG_PPC_POWERNV) += pseries-head.S | 114 | src-plat-$(CONFIG_PPC_POWERNV) += pseries-head.S |
| 115 | src-plat-$(CONFIG_PPC_IBM_CELL_BLADE) += pseries-head.S | 115 | src-plat-$(CONFIG_PPC_IBM_CELL_BLADE) += pseries-head.S |
| 116 | src-plat-$(CONFIG_MVME7100) += motload-head.S mvme7100.c | ||
| 116 | 117 | ||
| 117 | src-wlib := $(sort $(src-wlib-y)) | 118 | src-wlib := $(sort $(src-wlib-y)) |
| 118 | src-plat := $(sort $(src-plat-y)) | 119 | src-plat := $(sort $(src-plat-y)) |
| @@ -296,6 +297,9 @@ image-$(CONFIG_TQM8560) += cuImage.tqm8560 | |||
| 296 | image-$(CONFIG_SBC8548) += cuImage.sbc8548 | 297 | image-$(CONFIG_SBC8548) += cuImage.sbc8548 |
| 297 | image-$(CONFIG_KSI8560) += cuImage.ksi8560 | 298 | image-$(CONFIG_KSI8560) += cuImage.ksi8560 |
| 298 | 299 | ||
| 300 | # Board ports in arch/powerpc/platform/86xx/Kconfig | ||
| 301 | image-$(CONFIG_MVME7100) += dtbImage.mvme7100 | ||
| 302 | |||
| 299 | # Board ports in arch/powerpc/platform/embedded6xx/Kconfig | 303 | # Board ports in arch/powerpc/platform/embedded6xx/Kconfig |
| 300 | image-$(CONFIG_STORCENTER) += cuImage.storcenter | 304 | image-$(CONFIG_STORCENTER) += cuImage.storcenter |
| 301 | image-$(CONFIG_MPC7448HPC2) += cuImage.mpc7448hpc2 | 305 | image-$(CONFIG_MPC7448HPC2) += cuImage.mpc7448hpc2 |
diff --git a/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi b/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi index bc3bf9333dde..88d8423f8ac5 100644 --- a/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi +++ b/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi | |||
| @@ -51,6 +51,7 @@ | |||
| 51 | serial2 = &serial2; | 51 | serial2 = &serial2; |
| 52 | serial3 = &serial3; | 52 | serial3 = &serial3; |
| 53 | pci0 = &pci0; | 53 | pci0 = &pci0; |
| 54 | usb0 = &usb0; | ||
| 54 | dma0 = &dma0; | 55 | dma0 = &dma0; |
| 55 | dma1 = &dma1; | 56 | dma1 = &dma1; |
| 56 | sdhc = &sdhc; | 57 | sdhc = &sdhc; |
diff --git a/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi b/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi index 8797ce146512..f3f968c51f4b 100644 --- a/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi +++ b/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi | |||
| @@ -51,6 +51,7 @@ | |||
| 51 | serial2 = &serial2; | 51 | serial2 = &serial2; |
| 52 | serial3 = &serial3; | 52 | serial3 = &serial3; |
| 53 | pci0 = &pci0; | 53 | pci0 = &pci0; |
| 54 | usb0 = &usb0; | ||
| 54 | dma0 = &dma0; | 55 | dma0 = &dma0; |
| 55 | dma1 = &dma1; | 56 | dma1 = &dma1; |
| 56 | sdhc = &sdhc; | 57 | sdhc = &sdhc; |
diff --git a/arch/powerpc/boot/dts/fsl/kmcoge4.dts b/arch/powerpc/boot/dts/fsl/kmcoge4.dts index 2d4b64fcee88..ae70a24094b0 100644 --- a/arch/powerpc/boot/dts/fsl/kmcoge4.dts +++ b/arch/powerpc/boot/dts/fsl/kmcoge4.dts | |||
| @@ -106,6 +106,43 @@ | |||
| 106 | sata@221000 { | 106 | sata@221000 { |
| 107 | status = "disabled"; | 107 | status = "disabled"; |
| 108 | }; | 108 | }; |
| 109 | |||
| 110 | fman0: fman@400000 { | ||
| 111 | enet0: ethernet@e0000 { | ||
| 112 | phy-connection-type = "sgmii"; | ||
| 113 | fixed-link { | ||
| 114 | speed = <1000>; | ||
| 115 | full-duplex; | ||
| 116 | }; | ||
| 117 | }; | ||
| 118 | mdio0: mdio@e1120 { | ||
| 119 | front_phy: ethernet-phy@11 { | ||
| 120 | reg = <0x11>; | ||
| 121 | }; | ||
| 122 | }; | ||
| 123 | |||
| 124 | enet1: ethernet@e2000 { | ||
| 125 | phy-connection-type = "sgmii"; | ||
| 126 | fixed-link { | ||
| 127 | speed = <1000>; | ||
| 128 | full-duplex; | ||
| 129 | }; | ||
| 130 | }; | ||
| 131 | enet2: ethernet@e4000 { | ||
| 132 | status = "disabled"; | ||
| 133 | }; | ||
| 134 | |||
| 135 | enet3: ethernet@e6000 { | ||
| 136 | status = "disabled"; | ||
| 137 | }; | ||
| 138 | enet4: ethernet@e8000 { | ||
| 139 | phy-handle = <&front_phy>; | ||
| 140 | phy-connection-type = "rgmii"; | ||
| 141 | }; | ||
| 142 | enet5: ethernet@f0000 { | ||
| 143 | status = "disabled"; | ||
| 144 | }; | ||
| 145 | }; | ||
| 109 | }; | 146 | }; |
| 110 | 147 | ||
| 111 | rio: rapidio@ffe0c0000 { | 148 | rio: rapidio@ffe0c0000 { |
diff --git a/arch/powerpc/boot/dts/fsl/mvme7100.dts b/arch/powerpc/boot/dts/fsl/mvme7100.dts new file mode 100644 index 000000000000..e2d306ad37a6 --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/mvme7100.dts | |||
| @@ -0,0 +1,153 @@ | |||
| 1 | /* | ||
| 2 | * Device tree source for the Emerson/Artesyn MVME7100 | ||
| 3 | * | ||
| 4 | * Copyright 2016 Elettra-Sincrotrone Trieste S.C.p.A. | ||
| 5 | * | ||
| 6 | * Author: Alessio Igor Bogani <alessio.bogani@elettra.eu> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify it | ||
| 9 | * under the terms of the GNU General Public License as published by the | ||
| 10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 11 | * option) any later version. | ||
| 12 | * | ||
| 13 | */ | ||
| 14 | |||
| 15 | /include/ "mpc8641si-pre.dtsi" | ||
| 16 | |||
| 17 | / { | ||
| 18 | model = "MVME7100"; | ||
| 19 | compatible = "artesyn,MVME7100"; | ||
| 20 | |||
| 21 | memory { | ||
| 22 | device_type = "memory"; | ||
| 23 | reg = <0x00000000 0x80000000>; | ||
| 24 | }; | ||
| 25 | |||
| 26 | soc: soc@f1000000 { | ||
| 27 | ranges = <0x00000000 0xf1000000 0x00100000>; | ||
| 28 | |||
| 29 | i2c@3000 { | ||
| 30 | hwmon@4c { | ||
| 31 | compatible = "dallas,max6649"; | ||
| 32 | reg = <0x4c>; | ||
| 33 | }; | ||
| 34 | |||
| 35 | rtc@68 { | ||
| 36 | status = "disabled"; | ||
| 37 | }; | ||
| 38 | }; | ||
| 39 | |||
| 40 | |||
| 41 | enet0: ethernet@24000 { | ||
| 42 | phy-handle = <&phy0>; | ||
| 43 | phy-connection-type = "rgmii-id"; | ||
| 44 | }; | ||
| 45 | |||
| 46 | mdio@24520 { | ||
| 47 | phy0: ethernet-phy@1 { | ||
| 48 | reg = <1>; | ||
| 49 | }; | ||
| 50 | phy1: ethernet-phy@2 { | ||
| 51 | reg = <2>; | ||
| 52 | }; | ||
| 53 | phy2: ethernet-phy@3 { | ||
| 54 | reg = <3>; | ||
| 55 | }; | ||
| 56 | phy3: ethernet-phy@4 { | ||
| 57 | reg = <4>; | ||
| 58 | }; | ||
| 59 | }; | ||
| 60 | |||
| 61 | enet1: ethernet@25000 { | ||
| 62 | phy-handle = <&phy1>; | ||
| 63 | phy-connection-type = "rgmii-id"; | ||
| 64 | }; | ||
| 65 | |||
| 66 | mdio@25520 { | ||
| 67 | status = "disabled"; | ||
| 68 | }; | ||
| 69 | |||
| 70 | enet2: ethernet@26000 { | ||
| 71 | phy-handle = <&phy2>; | ||
| 72 | phy-connection-type = "rgmii-id"; | ||
| 73 | }; | ||
| 74 | |||
| 75 | mdio@26520 { | ||
| 76 | status = "disabled"; | ||
| 77 | }; | ||
| 78 | |||
| 79 | enet3: ethernet@27000 { | ||
| 80 | phy-handle = <&phy3>; | ||
| 81 | phy-connection-type = "rgmii-id"; | ||
| 82 | }; | ||
| 83 | |||
| 84 | mdio@27520 { | ||
| 85 | status = "disabled"; | ||
| 86 | }; | ||
| 87 | |||
| 88 | serial1: serial@4600 { | ||
| 89 | status = "disabled"; | ||
| 90 | }; | ||
| 91 | }; | ||
| 92 | |||
| 93 | lbc: localbus@f1005000 { | ||
| 94 | reg = <0xf1005000 0x1000>; | ||
| 95 | |||
| 96 | ranges = <0 0 0xf8000000 0x08000000 // NOR Flash (128MB) | ||
| 97 | 2 0 0xf2030000 0x00010000 // NAND Flash (8GB) | ||
| 98 | 3 0 0xf2400000 0x00080000 // MRAM (512KB) | ||
| 99 | 4 0 0xf2000000 0x00010000 // BCSR | ||
| 100 | 5 0 0xf2010000 0x00010000>; // QUART | ||
| 101 | |||
| 102 | bcsr@4,0 { | ||
| 103 | compatible = "artesyn,mvme7100-bcsr"; | ||
| 104 | reg = <4 0 0x10000>; | ||
| 105 | }; | ||
| 106 | |||
| 107 | serial@5,1000 { | ||
| 108 | device_type = "serial"; | ||
| 109 | compatible = "ns16550"; | ||
| 110 | reg = <5 0x1000 0x100>; | ||
| 111 | clock-frequency = <1843200>; | ||
| 112 | interrupts = <11 1 0 0>; | ||
| 113 | }; | ||
| 114 | |||
| 115 | serial@5,2000 { | ||
| 116 | device_type = "serial"; | ||
| 117 | compatible = "ns16550"; | ||
| 118 | reg = <5 0x2000 0x100>; | ||
| 119 | clock-frequency = <1843200>; | ||
| 120 | interrupts = <11 1 0 0>; | ||
| 121 | }; | ||
| 122 | |||
| 123 | serial@5,3000 { | ||
| 124 | device_type = "serial"; | ||
| 125 | compatible = "ns16550"; | ||
| 126 | reg = <5 0x3000 0x100>; | ||
| 127 | clock-frequency = <1843200>; | ||
| 128 | interrupts = <11 1 0 0>; | ||
| 129 | }; | ||
| 130 | |||
| 131 | serial@5,4000 { | ||
| 132 | device_type = "serial"; | ||
| 133 | compatible = "ns16550"; | ||
| 134 | reg = <5 0x4000 0x100>; | ||
| 135 | clock-frequency = <1843200>; | ||
| 136 | interrupts = <11 1 0 0>; | ||
| 137 | }; | ||
| 138 | }; | ||
| 139 | |||
| 140 | pci0: pcie@f1008000 { | ||
| 141 | status = "disabled"; | ||
| 142 | }; | ||
| 143 | |||
| 144 | pci1: pcie@f1009000 { | ||
| 145 | status = "disabled"; | ||
| 146 | }; | ||
| 147 | |||
| 148 | chosen { | ||
| 149 | linux,stdout-path = &serial0; | ||
| 150 | }; | ||
| 151 | }; | ||
| 152 | |||
| 153 | /include/ "mpc8641si-post.dtsi" | ||
diff --git a/arch/powerpc/boot/dts/fsl/qonverge-usb2-dr-0.dtsi b/arch/powerpc/boot/dts/fsl/qonverge-usb2-dr-0.dtsi index 29dad723091e..fcc7e5b7fd47 100644 --- a/arch/powerpc/boot/dts/fsl/qonverge-usb2-dr-0.dtsi +++ b/arch/powerpc/boot/dts/fsl/qonverge-usb2-dr-0.dtsi | |||
| @@ -32,7 +32,7 @@ | |||
| 32 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | 32 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 33 | */ | 33 | */ |
| 34 | 34 | ||
| 35 | usb@210000 { | 35 | usb0: usb@210000 { |
| 36 | compatible = "fsl-usb2-dr"; | 36 | compatible = "fsl-usb2-dr"; |
| 37 | reg = <0x210000 0x1000>; | 37 | reg = <0x210000 0x1000>; |
| 38 | #address-cells = <1>; | 38 | #address-cells = <1>; |
diff --git a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi index 507649ece0a1..44e399b17f6f 100644 --- a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi +++ b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi | |||
| @@ -607,7 +607,7 @@ | |||
| 607 | /include/ "qoriq-gpio-3.dtsi" | 607 | /include/ "qoriq-gpio-3.dtsi" |
| 608 | /include/ "qoriq-usb2-mph-0.dtsi" | 608 | /include/ "qoriq-usb2-mph-0.dtsi" |
| 609 | usb0: usb@210000 { | 609 | usb0: usb@210000 { |
| 610 | compatible = "fsl-usb2-mph-v2.4", "fsl-usb2-mph"; | 610 | compatible = "fsl-usb2-mph-v2.5", "fsl-usb2-mph"; |
| 611 | fsl,iommu-parent = <&pamu0>; | 611 | fsl,iommu-parent = <&pamu0>; |
| 612 | fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */ | 612 | fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */ |
| 613 | phy_type = "utmi"; | 613 | phy_type = "utmi"; |
| @@ -615,7 +615,7 @@ | |||
| 615 | }; | 615 | }; |
| 616 | /include/ "qoriq-usb2-dr-0.dtsi" | 616 | /include/ "qoriq-usb2-dr-0.dtsi" |
| 617 | usb1: usb@211000 { | 617 | usb1: usb@211000 { |
| 618 | compatible = "fsl-usb2-dr-v2.4", "fsl-usb2-dr"; | 618 | compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr"; |
| 619 | fsl,iommu-parent = <&pamu0>; | 619 | fsl,iommu-parent = <&pamu0>; |
| 620 | fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */ | 620 | fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */ |
| 621 | dr_mode = "host"; | 621 | dr_mode = "host"; |
| @@ -673,3 +673,48 @@ | |||
| 673 | }; | 673 | }; |
| 674 | }; | 674 | }; |
| 675 | }; | 675 | }; |
| 676 | |||
| 677 | &qe { | ||
| 678 | #address-cells = <1>; | ||
| 679 | #size-cells = <1>; | ||
| 680 | device_type = "qe"; | ||
| 681 | compatible = "fsl,qe"; | ||
| 682 | fsl,qe-num-riscs = <1>; | ||
| 683 | fsl,qe-num-snums = <28>; | ||
| 684 | |||
| 685 | qeic: interrupt-controller@80 { | ||
| 686 | interrupt-controller; | ||
| 687 | compatible = "fsl,qe-ic"; | ||
| 688 | #address-cells = <0>; | ||
| 689 | #interrupt-cells = <1>; | ||
| 690 | reg = <0x80 0x80>; | ||
| 691 | interrupts = <95 2 0 0 94 2 0 0>; //high:79 low:78 | ||
| 692 | }; | ||
| 693 | |||
| 694 | ucc@2000 { | ||
| 695 | cell-index = <1>; | ||
| 696 | reg = <0x2000 0x200>; | ||
| 697 | interrupts = <32>; | ||
| 698 | interrupt-parent = <&qeic>; | ||
| 699 | }; | ||
| 700 | |||
| 701 | ucc@2200 { | ||
| 702 | cell-index = <3>; | ||
| 703 | reg = <0x2200 0x200>; | ||
| 704 | interrupts = <34>; | ||
| 705 | interrupt-parent = <&qeic>; | ||
| 706 | }; | ||
| 707 | |||
| 708 | muram@10000 { | ||
| 709 | #address-cells = <1>; | ||
| 710 | #size-cells = <1>; | ||
| 711 | compatible = "fsl,qe-muram", "fsl,cpm-muram"; | ||
| 712 | ranges = <0x0 0x10000 0x6000>; | ||
| 713 | |||
| 714 | data-only@0 { | ||
| 715 | compatible = "fsl,qe-muram-data", | ||
| 716 | "fsl,cpm-muram-data"; | ||
| 717 | reg = <0x0 0x6000>; | ||
| 718 | }; | ||
| 719 | }; | ||
| 720 | }; | ||
diff --git a/arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi b/arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi index 8c7ea6c05de9..863f9431285f 100644 --- a/arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi +++ b/arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi | |||
| @@ -212,4 +212,42 @@ | |||
| 212 | 0 0x00010000>; | 212 | 0 0x00010000>; |
| 213 | }; | 213 | }; |
| 214 | }; | 214 | }; |
| 215 | |||
| 216 | qe: qe@ffe140000 { | ||
| 217 | ranges = <0x0 0xf 0xfe140000 0x40000>; | ||
| 218 | reg = <0xf 0xfe140000 0 0x480>; | ||
| 219 | brg-frequency = <0>; | ||
| 220 | bus-frequency = <0>; | ||
| 221 | |||
| 222 | si1: si@700 { | ||
| 223 | compatible = "fsl,t1040-qe-si"; | ||
| 224 | reg = <0x700 0x80>; | ||
| 225 | }; | ||
| 226 | |||
| 227 | siram1: siram@1000 { | ||
| 228 | compatible = "fsl,t1040-qe-siram"; | ||
| 229 | reg = <0x1000 0x800>; | ||
| 230 | }; | ||
| 231 | |||
| 232 | ucc_hdlc: ucc@2000 { | ||
| 233 | compatible = "fsl,ucc-hdlc"; | ||
| 234 | rx-clock-name = "clk8"; | ||
| 235 | tx-clock-name = "clk9"; | ||
| 236 | fsl,rx-sync-clock = "rsync_pin"; | ||
| 237 | fsl,tx-sync-clock = "tsync_pin"; | ||
| 238 | fsl,tx-timeslot-mask = <0xfffffffe>; | ||
| 239 | fsl,rx-timeslot-mask = <0xfffffffe>; | ||
| 240 | fsl,tdm-framer-type = "e1"; | ||
| 241 | fsl,tdm-id = <0>; | ||
| 242 | fsl,siram-entry-id = <0>; | ||
| 243 | fsl,tdm-interface; | ||
| 244 | }; | ||
| 245 | |||
| 246 | ucc_serial: ucc@2200 { | ||
| 247 | compatible = "fsl,t1040-ucc-uart"; | ||
| 248 | port-number = <0>; | ||
| 249 | rx-clock-name = "brg2"; | ||
| 250 | tx-clock-name = "brg2"; | ||
| 251 | }; | ||
| 252 | }; | ||
| 215 | }; | 253 | }; |
diff --git a/arch/powerpc/boot/dts/fsl/t104xqds.dtsi b/arch/powerpc/boot/dts/fsl/t104xqds.dtsi index 977af355b388..2fd4cbe7098f 100644 --- a/arch/powerpc/boot/dts/fsl/t104xqds.dtsi +++ b/arch/powerpc/boot/dts/fsl/t104xqds.dtsi | |||
| @@ -366,4 +366,42 @@ | |||
| 366 | 0 0x00010000>; | 366 | 0 0x00010000>; |
| 367 | }; | 367 | }; |
| 368 | }; | 368 | }; |
| 369 | |||
| 370 | qe: qe@ffe140000 { | ||
| 371 | ranges = <0x0 0xf 0xfe140000 0x40000>; | ||
| 372 | reg = <0xf 0xfe140000 0 0x480>; | ||
| 373 | brg-frequency = <0>; | ||
| 374 | bus-frequency = <0>; | ||
| 375 | |||
| 376 | si1: si@700 { | ||
| 377 | compatible = "fsl,t1040-qe-si"; | ||
| 378 | reg = <0x700 0x80>; | ||
| 379 | }; | ||
| 380 | |||
| 381 | siram1: siram@1000 { | ||
| 382 | compatible = "fsl,t1040-qe-siram"; | ||
| 383 | reg = <0x1000 0x800>; | ||
| 384 | }; | ||
| 385 | |||
| 386 | ucc_hdlc: ucc@2000 { | ||
| 387 | compatible = "fsl,ucc-hdlc"; | ||
| 388 | rx-clock-name = "clk8"; | ||
| 389 | tx-clock-name = "clk9"; | ||
| 390 | fsl,rx-sync-clock = "rsync_pin"; | ||
| 391 | fsl,tx-sync-clock = "tsync_pin"; | ||
| 392 | fsl,tx-timeslot-mask = <0xfffffffe>; | ||
| 393 | fsl,rx-timeslot-mask = <0xfffffffe>; | ||
| 394 | fsl,tdm-framer-type = "e1"; | ||
| 395 | fsl,tdm-id = <0>; | ||
| 396 | fsl,siram-entry-id = <0>; | ||
| 397 | fsl,tdm-interface; | ||
| 398 | }; | ||
| 399 | |||
| 400 | ucc_serial: ucc@2200 { | ||
| 401 | compatible = "fsl,t1040-ucc-uart"; | ||
| 402 | port-number = <0>; | ||
| 403 | rx-clock-name = "brg2"; | ||
| 404 | tx-clock-name = "brg2"; | ||
| 405 | }; | ||
| 406 | }; | ||
| 369 | }; | 407 | }; |
diff --git a/arch/powerpc/boot/dts/fsl/t104xrdb.dtsi b/arch/powerpc/boot/dts/fsl/t104xrdb.dtsi index 7c4afdb44b46..5fdddbd2a62b 100644 --- a/arch/powerpc/boot/dts/fsl/t104xrdb.dtsi +++ b/arch/powerpc/boot/dts/fsl/t104xrdb.dtsi | |||
| @@ -222,4 +222,42 @@ | |||
| 222 | 0 0x00010000>; | 222 | 0 0x00010000>; |
| 223 | }; | 223 | }; |
| 224 | }; | 224 | }; |
| 225 | |||
| 226 | qe: qe@ffe140000 { | ||
| 227 | ranges = <0x0 0xf 0xfe140000 0x40000>; | ||
| 228 | reg = <0xf 0xfe140000 0 0x480>; | ||
| 229 | brg-frequency = <0>; | ||
| 230 | bus-frequency = <0>; | ||
| 231 | |||
| 232 | si1: si@700 { | ||
| 233 | compatible = "fsl,t1040-qe-si"; | ||
| 234 | reg = <0x700 0x80>; | ||
| 235 | }; | ||
| 236 | |||
| 237 | siram1: siram@1000 { | ||
| 238 | compatible = "fsl,t1040-qe-siram"; | ||
| 239 | reg = <0x1000 0x800>; | ||
| 240 | }; | ||
| 241 | |||
| 242 | ucc_hdlc: ucc@2000 { | ||
| 243 | compatible = "fsl,ucc-hdlc"; | ||
| 244 | rx-clock-name = "clk8"; | ||
| 245 | tx-clock-name = "clk9"; | ||
| 246 | fsl,rx-sync-clock = "rsync_pin"; | ||
| 247 | fsl,tx-sync-clock = "tsync_pin"; | ||
| 248 | fsl,tx-timeslot-mask = <0xfffffffe>; | ||
| 249 | fsl,rx-timeslot-mask = <0xfffffffe>; | ||
| 250 | fsl,tdm-framer-type = "e1"; | ||
| 251 | fsl,tdm-id = <0>; | ||
| 252 | fsl,siram-entry-id = <0>; | ||
| 253 | fsl,tdm-interface; | ||
| 254 | }; | ||
| 255 | |||
| 256 | ucc_serial: ucc@2200 { | ||
| 257 | compatible = "fsl,t1040-ucc-uart"; | ||
| 258 | port-number = <0>; | ||
| 259 | rx-clock-name = "brg2"; | ||
| 260 | tx-clock-name = "brg2"; | ||
| 261 | }; | ||
| 262 | }; | ||
| 225 | }; | 263 | }; |
diff --git a/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi index 1184a746fcb1..038cf8fadee4 100644 --- a/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi +++ b/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi | |||
| @@ -56,6 +56,8 @@ | |||
| 56 | pci1 = &pci1; | 56 | pci1 = &pci1; |
| 57 | pci2 = &pci2; | 57 | pci2 = &pci2; |
| 58 | pci3 = &pci3; | 58 | pci3 = &pci3; |
| 59 | usb0 = &usb0; | ||
| 60 | usb1 = &usb1; | ||
| 59 | dma0 = &dma0; | 61 | dma0 = &dma0; |
| 60 | dma1 = &dma1; | 62 | dma1 = &dma1; |
| 61 | dma2 = &dma2; | 63 | dma2 = &dma2; |
diff --git a/arch/powerpc/boot/motload-head.S b/arch/powerpc/boot/motload-head.S new file mode 100644 index 000000000000..41cabb4b63fa --- /dev/null +++ b/arch/powerpc/boot/motload-head.S | |||
| @@ -0,0 +1,11 @@ | |||
| 1 | #include "ppc_asm.h" | ||
| 2 | |||
| 3 | .text | ||
| 4 | .globl _zimage_start | ||
| 5 | _zimage_start: | ||
| 6 | mfmsr r10 | ||
| 7 | rlwinm r10,r10,0,~(1<<15) /* Clear MSR_EE */ | ||
| 8 | sync | ||
| 9 | mtmsr r10 | ||
| 10 | isync | ||
| 11 | b _zimage_start_lib | ||
diff --git a/arch/powerpc/boot/mvme7100.c b/arch/powerpc/boot/mvme7100.c new file mode 100644 index 000000000000..8b0a932311af --- /dev/null +++ b/arch/powerpc/boot/mvme7100.c | |||
| @@ -0,0 +1,59 @@ | |||
| 1 | /* | ||
| 2 | * Motload compatibility for the Emerson/Artesyn MVME7100 | ||
| 3 | * | ||
| 4 | * Copyright 2016 Elettra-Sincrotrone Trieste S.C.p.A. | ||
| 5 | * | ||
| 6 | * Author: Alessio Igor Bogani <alessio.bogani@elettra.eu> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify it | ||
| 9 | * under the terms of the GNU General Public License as published by the | ||
| 10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 11 | * option) any later version. | ||
| 12 | * | ||
| 13 | */ | ||
| 14 | |||
| 15 | #include "ops.h" | ||
| 16 | #include "stdio.h" | ||
| 17 | #include "cuboot.h" | ||
| 18 | |||
| 19 | #define TARGET_86xx | ||
| 20 | #define TARGET_HAS_ETH1 | ||
| 21 | #define TARGET_HAS_ETH2 | ||
| 22 | #define TARGET_HAS_ETH3 | ||
| 23 | #include "ppcboot.h" | ||
| 24 | |||
| 25 | static bd_t bd; | ||
| 26 | |||
| 27 | BSS_STACK(16384); | ||
| 28 | |||
| 29 | static void mvme7100_fixups(void) | ||
| 30 | { | ||
| 31 | void *devp; | ||
| 32 | unsigned long busfreq = bd.bi_busfreq * 1000000; | ||
| 33 | |||
| 34 | dt_fixup_cpu_clocks(bd.bi_intfreq * 1000000, busfreq / 4, busfreq); | ||
| 35 | |||
| 36 | devp = finddevice("/soc@f1000000"); | ||
| 37 | if (devp) | ||
| 38 | setprop(devp, "bus-frequency", &busfreq, sizeof(busfreq)); | ||
| 39 | |||
| 40 | devp = finddevice("/soc/serial@4500"); | ||
| 41 | if (devp) | ||
| 42 | setprop(devp, "clock-frequency", &busfreq, sizeof(busfreq)); | ||
| 43 | |||
| 44 | dt_fixup_memory(bd.bi_memstart, bd.bi_memsize); | ||
| 45 | |||
| 46 | dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr); | ||
| 47 | dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr); | ||
| 48 | dt_fixup_mac_address_by_alias("ethernet2", bd.bi_enet2addr); | ||
| 49 | dt_fixup_mac_address_by_alias("ethernet3", bd.bi_enet3addr); | ||
| 50 | } | ||
| 51 | |||
| 52 | void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, | ||
| 53 | unsigned long r6, unsigned long r7) | ||
| 54 | { | ||
| 55 | CUBOOT_INIT(); | ||
| 56 | fdt_init(_dtb_start); | ||
| 57 | serial_console_init(); | ||
| 58 | platform_ops.fixups = mvme7100_fixups; | ||
| 59 | } | ||
diff --git a/arch/powerpc/boot/opal-calls.S b/arch/powerpc/boot/opal-calls.S new file mode 100644 index 000000000000..ff2f1b97bc53 --- /dev/null +++ b/arch/powerpc/boot/opal-calls.S | |||
| @@ -0,0 +1,58 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (c) 2016 IBM Corporation. | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or | ||
| 5 | * modify it under the terms of the GNU General Public License | ||
| 6 | * as published by the Free Software Foundation; either version | ||
| 7 | * 2 of the License, or (at your option) any later version. | ||
| 8 | */ | ||
| 9 | |||
| 10 | #include "ppc_asm.h" | ||
| 11 | #include "../include/asm/opal-api.h" | ||
| 12 | |||
| 13 | .text | ||
| 14 | |||
| 15 | #define OPAL_CALL(name, token) \ | ||
| 16 | .globl name; \ | ||
| 17 | name: \ | ||
| 18 | li r0, token; \ | ||
| 19 | b opal_call; | ||
| 20 | |||
| 21 | opal_call: | ||
| 22 | mflr r11 | ||
| 23 | std r11,16(r1) | ||
| 24 | mfcr r12 | ||
| 25 | stw r12,8(r1) | ||
| 26 | mr r13,r2 | ||
| 27 | |||
| 28 | /* Set opal return address */ | ||
| 29 | ld r11,opal_return@got(r2) | ||
| 30 | mtlr r11 | ||
| 31 | mfmsr r12 | ||
| 32 | |||
| 33 | /* switch to BE when we enter OPAL */ | ||
| 34 | li r11,MSR_LE | ||
| 35 | andc r12,r12,r11 | ||
| 36 | mtspr SPRN_HSRR1,r12 | ||
| 37 | |||
| 38 | /* load the opal call entry point and base */ | ||
| 39 | ld r11,opal@got(r2) | ||
| 40 | ld r12,8(r11) | ||
| 41 | ld r2,0(r11) | ||
| 42 | mtspr SPRN_HSRR0,r12 | ||
| 43 | hrfid | ||
| 44 | |||
| 45 | opal_return: | ||
| 46 | FIXUP_ENDIAN | ||
| 47 | mr r2,r13; | ||
| 48 | lwz r11,8(r1); | ||
| 49 | ld r12,16(r1) | ||
| 50 | mtcr r11; | ||
| 51 | mtlr r12 | ||
| 52 | blr | ||
| 53 | |||
| 54 | OPAL_CALL(opal_console_write, OPAL_CONSOLE_WRITE); | ||
| 55 | OPAL_CALL(opal_console_read, OPAL_CONSOLE_READ); | ||
| 56 | OPAL_CALL(opal_console_write_buffer_space, OPAL_CONSOLE_WRITE_BUFFER_SPACE); | ||
| 57 | OPAL_CALL(opal_poll_events, OPAL_POLL_EVENTS); | ||
| 58 | OPAL_CALL(opal_console_flush, OPAL_CONSOLE_FLUSH); | ||
diff --git a/arch/powerpc/boot/opal.c b/arch/powerpc/boot/opal.c new file mode 100644 index 000000000000..1f37e1c1d6d8 --- /dev/null +++ b/arch/powerpc/boot/opal.c | |||
| @@ -0,0 +1,98 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (c) 2016 IBM Corporation. | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or | ||
| 5 | * modify it under the terms of the GNU General Public License | ||
| 6 | * as published by the Free Software Foundation; either version | ||
| 7 | * 2 of the License, or (at your option) any later version. | ||
| 8 | */ | ||
| 9 | |||
| 10 | #include "ops.h" | ||
| 11 | #include "stdio.h" | ||
| 12 | #include "io.h" | ||
| 13 | #include <libfdt.h> | ||
| 14 | #include "../include/asm/opal-api.h" | ||
| 15 | |||
| 16 | #ifdef __powerpc64__ | ||
| 17 | |||
| 18 | /* Global OPAL struct used by opal-call.S */ | ||
| 19 | struct opal { | ||
| 20 | u64 base; | ||
| 21 | u64 entry; | ||
| 22 | } opal; | ||
| 23 | |||
| 24 | static u32 opal_con_id; | ||
| 25 | |||
| 26 | int64_t opal_console_write(int64_t term_number, u64 *length, const u8 *buffer); | ||
| 27 | int64_t opal_console_read(int64_t term_number, uint64_t *length, u8 *buffer); | ||
| 28 | int64_t opal_console_write_buffer_space(uint64_t term_number, uint64_t *length); | ||
| 29 | int64_t opal_console_flush(uint64_t term_number); | ||
| 30 | int64_t opal_poll_events(uint64_t *outstanding_event_mask); | ||
| 31 | |||
| 32 | static int opal_con_open(void) | ||
| 33 | { | ||
| 34 | return 0; | ||
| 35 | } | ||
| 36 | |||
| 37 | static void opal_con_putc(unsigned char c) | ||
| 38 | { | ||
| 39 | int64_t rc; | ||
| 40 | uint64_t olen, len; | ||
| 41 | |||
| 42 | do { | ||
| 43 | rc = opal_console_write_buffer_space(opal_con_id, &olen); | ||
| 44 | len = be64_to_cpu(olen); | ||
| 45 | if (rc) | ||
| 46 | return; | ||
| 47 | opal_poll_events(NULL); | ||
| 48 | } while (len < 1); | ||
| 49 | |||
| 50 | |||
| 51 | olen = cpu_to_be64(1); | ||
| 52 | opal_console_write(opal_con_id, &olen, &c); | ||
| 53 | } | ||
| 54 | |||
| 55 | static void opal_con_close(void) | ||
| 56 | { | ||
| 57 | opal_console_flush(opal_con_id); | ||
| 58 | } | ||
| 59 | |||
| 60 | static void opal_init(void) | ||
| 61 | { | ||
| 62 | void *opal_node; | ||
| 63 | |||
| 64 | opal_node = finddevice("/ibm,opal"); | ||
| 65 | if (!opal_node) | ||
| 66 | return; | ||
| 67 | if (getprop(opal_node, "opal-base-address", &opal.base, sizeof(u64)) < 0) | ||
| 68 | return; | ||
| 69 | opal.base = be64_to_cpu(opal.base); | ||
| 70 | if (getprop(opal_node, "opal-entry-address", &opal.entry, sizeof(u64)) < 0) | ||
| 71 | return; | ||
| 72 | opal.entry = be64_to_cpu(opal.entry); | ||
| 73 | } | ||
| 74 | |||
| 75 | int opal_console_init(void *devp, struct serial_console_data *scdp) | ||
| 76 | { | ||
| 77 | opal_init(); | ||
| 78 | |||
| 79 | if (devp) { | ||
| 80 | int n = getprop(devp, "reg", &opal_con_id, sizeof(u32)); | ||
| 81 | if (n != sizeof(u32)) | ||
| 82 | return -1; | ||
| 83 | opal_con_id = be32_to_cpu(opal_con_id); | ||
| 84 | } else | ||
| 85 | opal_con_id = 0; | ||
| 86 | |||
| 87 | scdp->open = opal_con_open; | ||
| 88 | scdp->putc = opal_con_putc; | ||
| 89 | scdp->close = opal_con_close; | ||
| 90 | |||
| 91 | return 0; | ||
| 92 | } | ||
| 93 | #else | ||
| 94 | int opal_console_init(void *devp, struct serial_console_data *scdp) | ||
| 95 | { | ||
| 96 | return -1; | ||
| 97 | } | ||
| 98 | #endif /* __powerpc64__ */ | ||
diff --git a/arch/powerpc/boot/ops.h b/arch/powerpc/boot/ops.h index 5e75e1c5518e..e19b64ef977a 100644 --- a/arch/powerpc/boot/ops.h +++ b/arch/powerpc/boot/ops.h | |||
| @@ -89,6 +89,7 @@ int mpsc_console_init(void *devp, struct serial_console_data *scdp); | |||
| 89 | int cpm_console_init(void *devp, struct serial_console_data *scdp); | 89 | int cpm_console_init(void *devp, struct serial_console_data *scdp); |
| 90 | int mpc5200_psc_console_init(void *devp, struct serial_console_data *scdp); | 90 | int mpc5200_psc_console_init(void *devp, struct serial_console_data *scdp); |
| 91 | int uartlite_console_init(void *devp, struct serial_console_data *scdp); | 91 | int uartlite_console_init(void *devp, struct serial_console_data *scdp); |
| 92 | int opal_console_init(void *devp, struct serial_console_data *scdp); | ||
| 92 | void *simple_alloc_init(char *base, unsigned long heap_size, | 93 | void *simple_alloc_init(char *base, unsigned long heap_size, |
| 93 | unsigned long granularity, unsigned long max_allocs); | 94 | unsigned long granularity, unsigned long max_allocs); |
| 94 | extern void flush_cache(void *, unsigned long); | 95 | extern void flush_cache(void *, unsigned long); |
diff --git a/arch/powerpc/boot/ppc_asm.h b/arch/powerpc/boot/ppc_asm.h index 35ea60c1f070..b03373d8b386 100644 --- a/arch/powerpc/boot/ppc_asm.h +++ b/arch/powerpc/boot/ppc_asm.h | |||
| @@ -61,6 +61,10 @@ | |||
| 61 | 61 | ||
| 62 | #define SPRN_TBRL 268 | 62 | #define SPRN_TBRL 268 |
| 63 | #define SPRN_TBRU 269 | 63 | #define SPRN_TBRU 269 |
| 64 | #define SPRN_HSRR0 0x13A /* Hypervisor Save/Restore 0 */ | ||
| 65 | #define SPRN_HSRR1 0x13B /* Hypervisor Save/Restore 1 */ | ||
| 66 | |||
| 67 | #define MSR_LE 0x0000000000000001 | ||
| 64 | 68 | ||
| 65 | #define FIXUP_ENDIAN \ | 69 | #define FIXUP_ENDIAN \ |
| 66 | tdi 0, 0, 0x48; /* Reverse endian of b . + 8 */ \ | 70 | tdi 0, 0, 0x48; /* Reverse endian of b . + 8 */ \ |
diff --git a/arch/powerpc/boot/ppcboot.h b/arch/powerpc/boot/ppcboot.h index 6ae6f9063952..453df429d5d0 100644 --- a/arch/powerpc/boot/ppcboot.h +++ b/arch/powerpc/boot/ppcboot.h | |||
| @@ -43,7 +43,7 @@ typedef struct bd_info { | |||
| 43 | unsigned long bi_sramstart; /* start of SRAM memory */ | 43 | unsigned long bi_sramstart; /* start of SRAM memory */ |
| 44 | unsigned long bi_sramsize; /* size of SRAM memory */ | 44 | unsigned long bi_sramsize; /* size of SRAM memory */ |
| 45 | #if defined(TARGET_8xx) || defined(TARGET_CPM2) || defined(TARGET_85xx) ||\ | 45 | #if defined(TARGET_8xx) || defined(TARGET_CPM2) || defined(TARGET_85xx) ||\ |
| 46 | defined(TARGET_83xx) | 46 | defined(TARGET_83xx) || defined(TARGET_86xx) |
| 47 | unsigned long bi_immr_base; /* base of IMMR register */ | 47 | unsigned long bi_immr_base; /* base of IMMR register */ |
| 48 | #endif | 48 | #endif |
| 49 | #if defined(TARGET_PPC_MPC52xx) | 49 | #if defined(TARGET_PPC_MPC52xx) |
diff --git a/arch/powerpc/boot/serial.c b/arch/powerpc/boot/serial.c index 167ee9433de6..e04c1e4063ae 100644 --- a/arch/powerpc/boot/serial.c +++ b/arch/powerpc/boot/serial.c | |||
| @@ -132,6 +132,8 @@ int serial_console_init(void) | |||
| 132 | else if (dt_is_compatible(devp, "xlnx,opb-uartlite-1.00.b") || | 132 | else if (dt_is_compatible(devp, "xlnx,opb-uartlite-1.00.b") || |
| 133 | dt_is_compatible(devp, "xlnx,xps-uartlite-1.00.a")) | 133 | dt_is_compatible(devp, "xlnx,xps-uartlite-1.00.a")) |
| 134 | rc = uartlite_console_init(devp, &serial_cd); | 134 | rc = uartlite_console_init(devp, &serial_cd); |
| 135 | else if (dt_is_compatible(devp, "ibm,opal-console-raw")) | ||
| 136 | rc = opal_console_init(devp, &serial_cd); | ||
| 135 | 137 | ||
| 136 | /* Add other serial console driver calls here */ | 138 | /* Add other serial console driver calls here */ |
| 137 | 139 | ||
diff --git a/arch/powerpc/boot/types.h b/arch/powerpc/boot/types.h index 31393d17a9c1..85565a89bcc2 100644 --- a/arch/powerpc/boot/types.h +++ b/arch/powerpc/boot/types.h | |||
| @@ -12,6 +12,16 @@ typedef short s16; | |||
| 12 | typedef int s32; | 12 | typedef int s32; |
| 13 | typedef long long s64; | 13 | typedef long long s64; |
| 14 | 14 | ||
| 15 | /* required for opal-api.h */ | ||
| 16 | typedef u8 uint8_t; | ||
| 17 | typedef u16 uint16_t; | ||
| 18 | typedef u32 uint32_t; | ||
| 19 | typedef u64 uint64_t; | ||
| 20 | typedef s8 int8_t; | ||
| 21 | typedef s16 int16_t; | ||
| 22 | typedef s32 int32_t; | ||
| 23 | typedef s64 int64_t; | ||
| 24 | |||
| 15 | #define min(x,y) ({ \ | 25 | #define min(x,y) ({ \ |
| 16 | typeof(x) _x = (x); \ | 26 | typeof(x) _x = (x); \ |
| 17 | typeof(y) _y = (y); \ | 27 | typeof(y) _y = (y); \ |
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper index 6a19fcef5596..6681ec3625c9 100755 --- a/arch/powerpc/boot/wrapper +++ b/arch/powerpc/boot/wrapper | |||
| @@ -302,6 +302,11 @@ mvme5100) | |||
| 302 | platformo="$object/fixed-head.o $object/mvme5100.o" | 302 | platformo="$object/fixed-head.o $object/mvme5100.o" |
| 303 | binary=y | 303 | binary=y |
| 304 | ;; | 304 | ;; |
| 305 | mvme7100) | ||
| 306 | platformo="$object/motload-head.o $object/mvme7100.o" | ||
| 307 | link_address='0x4000000' | ||
| 308 | binary=y | ||
| 309 | ;; | ||
| 305 | esac | 310 | esac |
| 306 | 311 | ||
| 307 | vmz="$tmpdir/`basename \"$kernel\"`.$ext" | 312 | vmz="$tmpdir/`basename \"$kernel\"`.$ext" |
diff --git a/arch/powerpc/configs/40x/acadia_defconfig b/arch/powerpc/configs/40x/acadia_defconfig index 9110a5cb1bb7..3438ed99c088 100644 --- a/arch/powerpc/configs/40x/acadia_defconfig +++ b/arch/powerpc/configs/40x/acadia_defconfig | |||
| @@ -21,7 +21,6 @@ CONFIG_IP_PNP_BOOTP=y | |||
| 21 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 21 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 22 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 22 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 23 | # CONFIG_INET_XFRM_MODE_BEET is not set | 23 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 24 | # CONFIG_INET_LRO is not set | ||
| 25 | # CONFIG_IPV6 is not set | 24 | # CONFIG_IPV6 is not set |
| 26 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 25 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 27 | CONFIG_CONNECTOR=y | 26 | CONFIG_CONNECTOR=y |
diff --git a/arch/powerpc/configs/40x/ep405_defconfig b/arch/powerpc/configs/40x/ep405_defconfig index 790366652ba3..36c44c0b560c 100644 --- a/arch/powerpc/configs/40x/ep405_defconfig +++ b/arch/powerpc/configs/40x/ep405_defconfig | |||
| @@ -20,7 +20,6 @@ CONFIG_IP_PNP_BOOTP=y | |||
| 20 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 20 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 21 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 21 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 22 | # CONFIG_INET_XFRM_MODE_BEET is not set | 22 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 23 | # CONFIG_INET_LRO is not set | ||
| 24 | # CONFIG_IPV6 is not set | 23 | # CONFIG_IPV6 is not set |
| 25 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 24 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 26 | CONFIG_CONNECTOR=y | 25 | CONFIG_CONNECTOR=y |
diff --git a/arch/powerpc/configs/40x/kilauea_defconfig b/arch/powerpc/configs/40x/kilauea_defconfig index 01bd71bac027..ad2156c6e2fc 100644 --- a/arch/powerpc/configs/40x/kilauea_defconfig +++ b/arch/powerpc/configs/40x/kilauea_defconfig | |||
| @@ -23,7 +23,6 @@ CONFIG_IP_PNP_BOOTP=y | |||
| 23 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 23 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 24 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 24 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 25 | # CONFIG_INET_XFRM_MODE_BEET is not set | 25 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 26 | # CONFIG_INET_LRO is not set | ||
| 27 | # CONFIG_IPV6 is not set | 26 | # CONFIG_IPV6 is not set |
| 28 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 27 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 29 | CONFIG_CONNECTOR=y | 28 | CONFIG_CONNECTOR=y |
diff --git a/arch/powerpc/configs/40x/klondike_defconfig b/arch/powerpc/configs/40x/klondike_defconfig index e2036b7c7edb..28adb782ec51 100644 --- a/arch/powerpc/configs/40x/klondike_defconfig +++ b/arch/powerpc/configs/40x/klondike_defconfig | |||
| @@ -32,8 +32,6 @@ CONFIG_SCSI_SAS_ATTRS=y | |||
| 32 | # CONFIG_USB_SUPPORT is not set | 32 | # CONFIG_USB_SUPPORT is not set |
| 33 | # CONFIG_IOMMU_SUPPORT is not set | 33 | # CONFIG_IOMMU_SUPPORT is not set |
| 34 | CONFIG_EXT2_FS=y | 34 | CONFIG_EXT2_FS=y |
| 35 | CONFIG_EXT3_FS=y | ||
| 36 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 37 | CONFIG_EXT4_FS=y | 35 | CONFIG_EXT4_FS=y |
| 38 | CONFIG_MSDOS_FS=y | 36 | CONFIG_MSDOS_FS=y |
| 39 | CONFIG_VFAT_FS=y | 37 | CONFIG_VFAT_FS=y |
| @@ -44,7 +42,6 @@ CONFIG_NLS_CODEPAGE_437=y | |||
| 44 | CONFIG_NLS_ASCII=y | 42 | CONFIG_NLS_ASCII=y |
| 45 | CONFIG_NLS_ISO8859_1=y | 43 | CONFIG_NLS_ISO8859_1=y |
| 46 | CONFIG_NLS_UTF8=y | 44 | CONFIG_NLS_UTF8=y |
| 47 | CONFIG_AVERAGE=y | ||
| 48 | CONFIG_MAGIC_SYSRQ=y | 45 | CONFIG_MAGIC_SYSRQ=y |
| 49 | # CONFIG_SCHED_DEBUG is not set | 46 | # CONFIG_SCHED_DEBUG is not set |
| 50 | # CONFIG_DEBUG_BUGVERBOSE is not set | 47 | # CONFIG_DEBUG_BUGVERBOSE is not set |
diff --git a/arch/powerpc/configs/40x/makalu_defconfig b/arch/powerpc/configs/40x/makalu_defconfig index efd51701fb4d..a00f434c4d47 100644 --- a/arch/powerpc/configs/40x/makalu_defconfig +++ b/arch/powerpc/configs/40x/makalu_defconfig | |||
| @@ -20,7 +20,6 @@ CONFIG_IP_PNP_BOOTP=y | |||
| 20 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 20 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 21 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 21 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 22 | # CONFIG_INET_XFRM_MODE_BEET is not set | 22 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 23 | # CONFIG_INET_LRO is not set | ||
| 24 | # CONFIG_IPV6 is not set | 23 | # CONFIG_IPV6 is not set |
| 25 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 24 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 26 | CONFIG_CONNECTOR=y | 25 | CONFIG_CONNECTOR=y |
diff --git a/arch/powerpc/configs/40x/obs600_defconfig b/arch/powerpc/configs/40x/obs600_defconfig index 5ded3dcdf60a..e500e6a12b3e 100644 --- a/arch/powerpc/configs/40x/obs600_defconfig +++ b/arch/powerpc/configs/40x/obs600_defconfig | |||
| @@ -23,7 +23,6 @@ CONFIG_IP_PNP_BOOTP=y | |||
| 23 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 23 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 24 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 24 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 25 | # CONFIG_INET_XFRM_MODE_BEET is not set | 25 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 26 | # CONFIG_INET_LRO is not set | ||
| 27 | # CONFIG_IPV6 is not set | 26 | # CONFIG_IPV6 is not set |
| 28 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 27 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 29 | CONFIG_CONNECTOR=y | 28 | CONFIG_CONNECTOR=y |
diff --git a/arch/powerpc/configs/40x/virtex_defconfig b/arch/powerpc/configs/40x/virtex_defconfig index bcb0c4d854db..65dc084a154c 100644 --- a/arch/powerpc/configs/40x/virtex_defconfig +++ b/arch/powerpc/configs/40x/virtex_defconfig | |||
| @@ -27,7 +27,6 @@ CONFIG_IP_MULTICAST=y | |||
| 27 | CONFIG_IP_PNP=y | 27 | CONFIG_IP_PNP=y |
| 28 | CONFIG_IP_PNP_DHCP=y | 28 | CONFIG_IP_PNP_DHCP=y |
| 29 | CONFIG_IP_PNP_BOOTP=y | 29 | CONFIG_IP_PNP_BOOTP=y |
| 30 | # CONFIG_INET_LRO is not set | ||
| 31 | CONFIG_NETFILTER=y | 30 | CONFIG_NETFILTER=y |
| 32 | CONFIG_IP_NF_IPTABLES=m | 31 | CONFIG_IP_NF_IPTABLES=m |
| 33 | CONFIG_IP_NF_FILTER=m | 32 | CONFIG_IP_NF_FILTER=m |
diff --git a/arch/powerpc/configs/40x/walnut_defconfig b/arch/powerpc/configs/40x/walnut_defconfig index 37c838f26e53..567f99bd64a3 100644 --- a/arch/powerpc/configs/40x/walnut_defconfig +++ b/arch/powerpc/configs/40x/walnut_defconfig | |||
| @@ -18,7 +18,6 @@ CONFIG_IP_PNP_BOOTP=y | |||
| 18 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 18 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 19 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 19 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 20 | # CONFIG_INET_XFRM_MODE_BEET is not set | 20 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 21 | # CONFIG_INET_LRO is not set | ||
| 22 | # CONFIG_IPV6 is not set | 21 | # CONFIG_IPV6 is not set |
| 23 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 22 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 24 | CONFIG_CONNECTOR=y | 23 | CONFIG_CONNECTOR=y |
diff --git a/arch/powerpc/configs/44x/akebono_defconfig b/arch/powerpc/configs/44x/akebono_defconfig index ea4ef02a0578..143b2fbddb46 100644 --- a/arch/powerpc/configs/44x/akebono_defconfig +++ b/arch/powerpc/configs/44x/akebono_defconfig | |||
| @@ -32,7 +32,6 @@ CONFIG_IP_PNP_BOOTP=y | |||
| 32 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 32 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 33 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 33 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 34 | # CONFIG_INET_XFRM_MODE_BEET is not set | 34 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 35 | # CONFIG_INET_LRO is not set | ||
| 36 | # CONFIG_IPV6 is not set | 35 | # CONFIG_IPV6 is not set |
| 37 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 36 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 38 | CONFIG_DEVTMPFS=y | 37 | CONFIG_DEVTMPFS=y |
| @@ -110,10 +109,9 @@ CONFIG_MMC=y | |||
| 110 | CONFIG_RTC_CLASS=y | 109 | CONFIG_RTC_CLASS=y |
| 111 | CONFIG_RTC_DRV_M41T80=y | 110 | CONFIG_RTC_DRV_M41T80=y |
| 112 | CONFIG_EXT2_FS=y | 111 | CONFIG_EXT2_FS=y |
| 113 | CONFIG_EXT3_FS=y | 112 | CONFIG_EXT4_FS=y |
| 114 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | 113 | CONFIG_EXT4_FS_POSIX_ACL=y |
| 115 | CONFIG_EXT3_FS_POSIX_ACL=y | 114 | CONFIG_EXT4_FS_SECURITY=y |
| 116 | CONFIG_EXT3_FS_SECURITY=y | ||
| 117 | # CONFIG_DNOTIFY is not set | 115 | # CONFIG_DNOTIFY is not set |
| 118 | # CONFIG_INOTIFY_USER is not set | 116 | # CONFIG_INOTIFY_USER is not set |
| 119 | CONFIG_VFAT_FS=y | 117 | CONFIG_VFAT_FS=y |
diff --git a/arch/powerpc/configs/44x/arches_defconfig b/arch/powerpc/configs/44x/arches_defconfig index 95494209c124..6bba1a55b827 100644 --- a/arch/powerpc/configs/44x/arches_defconfig +++ b/arch/powerpc/configs/44x/arches_defconfig | |||
| @@ -23,7 +23,6 @@ CONFIG_IP_PNP_BOOTP=y | |||
| 23 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 23 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 24 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 24 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 25 | # CONFIG_INET_XFRM_MODE_BEET is not set | 25 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 26 | # CONFIG_INET_LRO is not set | ||
| 27 | # CONFIG_IPV6 is not set | 26 | # CONFIG_IPV6 is not set |
| 28 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 27 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 29 | CONFIG_CONNECTOR=y | 28 | CONFIG_CONNECTOR=y |
diff --git a/arch/powerpc/configs/44x/bamboo_defconfig b/arch/powerpc/configs/44x/bamboo_defconfig index a046f08413fd..477d99fefd9a 100644 --- a/arch/powerpc/configs/44x/bamboo_defconfig +++ b/arch/powerpc/configs/44x/bamboo_defconfig | |||
| @@ -21,7 +21,6 @@ CONFIG_IP_PNP_BOOTP=y | |||
| 21 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 21 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 22 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 22 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 23 | # CONFIG_INET_XFRM_MODE_BEET is not set | 23 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 24 | # CONFIG_INET_LRO is not set | ||
| 25 | # CONFIG_IPV6 is not set | 24 | # CONFIG_IPV6 is not set |
| 26 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 25 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 27 | CONFIG_CONNECTOR=y | 26 | CONFIG_CONNECTOR=y |
diff --git a/arch/powerpc/configs/44x/bluestone_defconfig b/arch/powerpc/configs/44x/bluestone_defconfig index a326b773ac05..6b77aea79b6c 100644 --- a/arch/powerpc/configs/44x/bluestone_defconfig +++ b/arch/powerpc/configs/44x/bluestone_defconfig | |||
| @@ -49,7 +49,7 @@ CONFIG_SENSORS_AD7414=y | |||
| 49 | CONFIG_RTC_CLASS=y | 49 | CONFIG_RTC_CLASS=y |
| 50 | CONFIG_RTC_DRV_M41T80=y | 50 | CONFIG_RTC_DRV_M41T80=y |
| 51 | CONFIG_EXT2_FS=y | 51 | CONFIG_EXT2_FS=y |
| 52 | CONFIG_EXT3_FS=y | 52 | CONFIG_EXT4_FS=y |
| 53 | CONFIG_PROC_KCORE=y | 53 | CONFIG_PROC_KCORE=y |
| 54 | CONFIG_TMPFS=y | 54 | CONFIG_TMPFS=y |
| 55 | CONFIG_CRAMFS=y | 55 | CONFIG_CRAMFS=y |
diff --git a/arch/powerpc/configs/44x/canyonlands_defconfig b/arch/powerpc/configs/44x/canyonlands_defconfig index d939e71fff7d..c8e6f048a122 100644 --- a/arch/powerpc/configs/44x/canyonlands_defconfig +++ b/arch/powerpc/configs/44x/canyonlands_defconfig | |||
| @@ -23,7 +23,6 @@ CONFIG_IP_PNP_BOOTP=y | |||
| 23 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 23 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 24 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 24 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 25 | # CONFIG_INET_XFRM_MODE_BEET is not set | 25 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 26 | # CONFIG_INET_LRO is not set | ||
| 27 | # CONFIG_IPV6 is not set | 26 | # CONFIG_IPV6 is not set |
| 28 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 27 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 29 | CONFIG_CONNECTOR=y | 28 | CONFIG_CONNECTOR=y |
diff --git a/arch/powerpc/configs/44x/currituck_defconfig b/arch/powerpc/configs/44x/currituck_defconfig index 5aa312a158dd..3799a26de6f4 100644 --- a/arch/powerpc/configs/44x/currituck_defconfig +++ b/arch/powerpc/configs/44x/currituck_defconfig | |||
| @@ -30,7 +30,6 @@ CONFIG_IP_PNP_BOOTP=y | |||
| 30 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 30 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 31 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 31 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 32 | # CONFIG_INET_XFRM_MODE_BEET is not set | 32 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 33 | # CONFIG_INET_LRO is not set | ||
| 34 | # CONFIG_IPV6 is not set | 33 | # CONFIG_IPV6 is not set |
| 35 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 34 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 36 | CONFIG_DEVTMPFS=y | 35 | CONFIG_DEVTMPFS=y |
| @@ -71,10 +70,9 @@ CONFIG_USB_OHCI_HCD=y | |||
| 71 | CONFIG_RTC_CLASS=y | 70 | CONFIG_RTC_CLASS=y |
| 72 | CONFIG_RTC_DRV_M41T80=y | 71 | CONFIG_RTC_DRV_M41T80=y |
| 73 | CONFIG_EXT2_FS=y | 72 | CONFIG_EXT2_FS=y |
| 74 | CONFIG_EXT3_FS=y | 73 | CONFIG_EXT4_FS=y |
| 75 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | 74 | CONFIG_EXT4_FS_POSIX_ACL=y |
| 76 | CONFIG_EXT3_FS_POSIX_ACL=y | 75 | CONFIG_EXT4_FS_SECURITY=y |
| 77 | CONFIG_EXT3_FS_SECURITY=y | ||
| 78 | CONFIG_PROC_KCORE=y | 76 | CONFIG_PROC_KCORE=y |
| 79 | CONFIG_TMPFS=y | 77 | CONFIG_TMPFS=y |
| 80 | CONFIG_CRAMFS=y | 78 | CONFIG_CRAMFS=y |
diff --git a/arch/powerpc/configs/44x/ebony_defconfig b/arch/powerpc/configs/44x/ebony_defconfig index 5909e016c37d..c265f54ab9e5 100644 --- a/arch/powerpc/configs/44x/ebony_defconfig +++ b/arch/powerpc/configs/44x/ebony_defconfig | |||
| @@ -19,7 +19,6 @@ CONFIG_IP_PNP_BOOTP=y | |||
| 19 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 19 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 20 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 20 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 21 | # CONFIG_INET_XFRM_MODE_BEET is not set | 21 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 22 | # CONFIG_INET_LRO is not set | ||
| 23 | # CONFIG_IPV6 is not set | 22 | # CONFIG_IPV6 is not set |
| 24 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 23 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 25 | CONFIG_CONNECTOR=y | 24 | CONFIG_CONNECTOR=y |
diff --git a/arch/powerpc/configs/44x/eiger_defconfig b/arch/powerpc/configs/44x/eiger_defconfig index 57499d25c877..bb6bd6d90821 100644 --- a/arch/powerpc/configs/44x/eiger_defconfig +++ b/arch/powerpc/configs/44x/eiger_defconfig | |||
| @@ -24,7 +24,6 @@ CONFIG_IP_PNP_BOOTP=y | |||
| 24 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 24 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 25 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 25 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 26 | # CONFIG_INET_XFRM_MODE_BEET is not set | 26 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 27 | # CONFIG_INET_LRO is not set | ||
| 28 | # CONFIG_IPV6 is not set | 27 | # CONFIG_IPV6 is not set |
| 29 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 28 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 30 | CONFIG_CONNECTOR=y | 29 | CONFIG_CONNECTOR=y |
| @@ -43,7 +42,6 @@ CONFIG_BLK_DEV_SD=y | |||
| 43 | CONFIG_CHR_DEV_SG=y | 42 | CONFIG_CHR_DEV_SG=y |
| 44 | CONFIG_FUSION=y | 43 | CONFIG_FUSION=y |
| 45 | CONFIG_FUSION_SAS=y | 44 | CONFIG_FUSION_SAS=y |
| 46 | CONFIG_I2O=y | ||
| 47 | CONFIG_NETDEVICES=y | 45 | CONFIG_NETDEVICES=y |
| 48 | CONFIG_IBM_EMAC=y | 46 | CONFIG_IBM_EMAC=y |
| 49 | CONFIG_IBM_EMAC_RXB=256 | 47 | CONFIG_IBM_EMAC_RXB=256 |
diff --git a/arch/powerpc/configs/44x/icon_defconfig b/arch/powerpc/configs/44x/icon_defconfig index 5d52185d8f5a..060f2edddb71 100644 --- a/arch/powerpc/configs/44x/icon_defconfig +++ b/arch/powerpc/configs/44x/icon_defconfig | |||
| @@ -23,7 +23,6 @@ CONFIG_IP_PNP_BOOTP=y | |||
| 23 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 23 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 24 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 24 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 25 | # CONFIG_INET_XFRM_MODE_BEET is not set | 25 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 26 | # CONFIG_INET_LRO is not set | ||
| 27 | # CONFIG_IPV6 is not set | 26 | # CONFIG_IPV6 is not set |
| 28 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 27 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 29 | CONFIG_CONNECTOR=y | 28 | CONFIG_CONNECTOR=y |
| @@ -76,8 +75,7 @@ CONFIG_LOGO=y | |||
| 76 | CONFIG_RTC_CLASS=y | 75 | CONFIG_RTC_CLASS=y |
| 77 | CONFIG_RTC_DRV_DS1307=y | 76 | CONFIG_RTC_DRV_DS1307=y |
| 78 | CONFIG_EXT2_FS=y | 77 | CONFIG_EXT2_FS=y |
| 79 | CONFIG_EXT3_FS=y | 78 | CONFIG_EXT4_FS=y |
| 80 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 81 | CONFIG_VFAT_FS=y | 79 | CONFIG_VFAT_FS=y |
| 82 | CONFIG_PROC_KCORE=y | 80 | CONFIG_PROC_KCORE=y |
| 83 | CONFIG_TMPFS=y | 81 | CONFIG_TMPFS=y |
diff --git a/arch/powerpc/configs/44x/iss476-smp_defconfig b/arch/powerpc/configs/44x/iss476-smp_defconfig index 0ad3e449526e..115a6b2be18b 100644 --- a/arch/powerpc/configs/44x/iss476-smp_defconfig +++ b/arch/powerpc/configs/44x/iss476-smp_defconfig | |||
| @@ -32,7 +32,6 @@ CONFIG_IP_PNP_BOOTP=y | |||
| 32 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 32 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 33 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 33 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 34 | # CONFIG_INET_XFRM_MODE_BEET is not set | 34 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 35 | # CONFIG_INET_LRO is not set | ||
| 36 | # CONFIG_IPV6 is not set | 35 | # CONFIG_IPV6 is not set |
| 37 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 36 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 38 | CONFIG_CONNECTOR=y | 37 | CONFIG_CONNECTOR=y |
| @@ -56,10 +55,9 @@ CONFIG_SERIAL_OF_PLATFORM=y | |||
| 56 | CONFIG_THERMAL=y | 55 | CONFIG_THERMAL=y |
| 57 | # CONFIG_USB_SUPPORT is not set | 56 | # CONFIG_USB_SUPPORT is not set |
| 58 | CONFIG_EXT2_FS=y | 57 | CONFIG_EXT2_FS=y |
| 59 | CONFIG_EXT3_FS=y | 58 | CONFIG_EXT4_FS=y |
| 60 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | 59 | CONFIG_EXT4_FS_POSIX_ACL=y |
| 61 | CONFIG_EXT3_FS_POSIX_ACL=y | 60 | CONFIG_EXT4_FS_SECURITY=y |
| 62 | CONFIG_EXT3_FS_SECURITY=y | ||
| 63 | CONFIG_PROC_KCORE=y | 61 | CONFIG_PROC_KCORE=y |
| 64 | CONFIG_TMPFS=y | 62 | CONFIG_TMPFS=y |
| 65 | CONFIG_CRAMFS=y | 63 | CONFIG_CRAMFS=y |
diff --git a/arch/powerpc/configs/44x/katmai_defconfig b/arch/powerpc/configs/44x/katmai_defconfig index a042335971da..b999048c4ae6 100644 --- a/arch/powerpc/configs/44x/katmai_defconfig +++ b/arch/powerpc/configs/44x/katmai_defconfig | |||
| @@ -21,7 +21,6 @@ CONFIG_IP_PNP_BOOTP=y | |||
| 21 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 21 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 22 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 22 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 23 | # CONFIG_INET_XFRM_MODE_BEET is not set | 23 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 24 | # CONFIG_INET_LRO is not set | ||
| 25 | # CONFIG_IPV6 is not set | 24 | # CONFIG_IPV6 is not set |
| 26 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 25 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 27 | CONFIG_CONNECTOR=y | 26 | CONFIG_CONNECTOR=y |
diff --git a/arch/powerpc/configs/44x/rainier_defconfig b/arch/powerpc/configs/44x/rainier_defconfig index 91c2aff9bd55..b8c9ee45d0a2 100644 --- a/arch/powerpc/configs/44x/rainier_defconfig +++ b/arch/powerpc/configs/44x/rainier_defconfig | |||
| @@ -22,7 +22,6 @@ CONFIG_IP_PNP_BOOTP=y | |||
| 22 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 22 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 23 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 23 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 24 | # CONFIG_INET_XFRM_MODE_BEET is not set | 24 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 25 | # CONFIG_INET_LRO is not set | ||
| 26 | # CONFIG_IPV6 is not set | 25 | # CONFIG_IPV6 is not set |
| 27 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 26 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 28 | CONFIG_CONNECTOR=y | 27 | CONFIG_CONNECTOR=y |
diff --git a/arch/powerpc/configs/44x/redwood_defconfig b/arch/powerpc/configs/44x/redwood_defconfig index 7fddf3fe275c..a4bb048448da 100644 --- a/arch/powerpc/configs/44x/redwood_defconfig +++ b/arch/powerpc/configs/44x/redwood_defconfig | |||
| @@ -24,7 +24,6 @@ CONFIG_IP_PNP_BOOTP=y | |||
| 24 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 24 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 25 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 25 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 26 | # CONFIG_INET_XFRM_MODE_BEET is not set | 26 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 27 | # CONFIG_INET_LRO is not set | ||
| 28 | # CONFIG_IPV6 is not set | 27 | # CONFIG_IPV6 is not set |
| 29 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 28 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 30 | CONFIG_CONNECTOR=y | 29 | CONFIG_CONNECTOR=y |
| @@ -41,7 +40,6 @@ CONFIG_BLK_DEV_SD=y | |||
| 41 | CONFIG_CHR_DEV_SG=y | 40 | CONFIG_CHR_DEV_SG=y |
| 42 | CONFIG_FUSION=y | 41 | CONFIG_FUSION=y |
| 43 | CONFIG_FUSION_SAS=y | 42 | CONFIG_FUSION_SAS=y |
| 44 | CONFIG_I2O=y | ||
| 45 | CONFIG_NETDEVICES=y | 43 | CONFIG_NETDEVICES=y |
| 46 | CONFIG_IBM_EMAC=y | 44 | CONFIG_IBM_EMAC=y |
| 47 | CONFIG_IBM_EMAC_RXB=256 | 45 | CONFIG_IBM_EMAC_RXB=256 |
diff --git a/arch/powerpc/configs/44x/sam440ep_defconfig b/arch/powerpc/configs/44x/sam440ep_defconfig index 6928012f3813..63302fbd184d 100644 --- a/arch/powerpc/configs/44x/sam440ep_defconfig +++ b/arch/powerpc/configs/44x/sam440ep_defconfig | |||
| @@ -26,7 +26,6 @@ CONFIG_IP_PNP_BOOTP=y | |||
| 26 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 26 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 27 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 27 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 28 | # CONFIG_INET_XFRM_MODE_BEET is not set | 28 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 29 | # CONFIG_INET_LRO is not set | ||
| 30 | # CONFIG_IPV6 is not set | 29 | # CONFIG_IPV6 is not set |
| 31 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 30 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 32 | CONFIG_CONNECTOR=y | 31 | CONFIG_CONNECTOR=y |
| @@ -85,9 +84,8 @@ CONFIG_RTC_DRV_M41T80_WDT=y | |||
| 85 | CONFIG_EXT2_FS=y | 84 | CONFIG_EXT2_FS=y |
| 86 | CONFIG_EXT2_FS_XATTR=y | 85 | CONFIG_EXT2_FS_XATTR=y |
| 87 | CONFIG_EXT2_FS_POSIX_ACL=y | 86 | CONFIG_EXT2_FS_POSIX_ACL=y |
| 88 | CONFIG_EXT3_FS=y | 87 | CONFIG_EXT4_FS=y |
| 89 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | 88 | CONFIG_EXT4_FS_POSIX_ACL=y |
| 90 | CONFIG_EXT3_FS_POSIX_ACL=y | ||
| 91 | CONFIG_REISERFS_FS=y | 89 | CONFIG_REISERFS_FS=y |
| 92 | CONFIG_AUTOFS4_FS=y | 90 | CONFIG_AUTOFS4_FS=y |
| 93 | CONFIG_ISO9660_FS=y | 91 | CONFIG_ISO9660_FS=y |
diff --git a/arch/powerpc/configs/44x/sequoia_defconfig b/arch/powerpc/configs/44x/sequoia_defconfig index c294369cc39f..b3792fd8111d 100644 --- a/arch/powerpc/configs/44x/sequoia_defconfig +++ b/arch/powerpc/configs/44x/sequoia_defconfig | |||
| @@ -23,7 +23,6 @@ CONFIG_IP_PNP_BOOTP=y | |||
| 23 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 23 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 24 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 24 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 25 | # CONFIG_INET_XFRM_MODE_BEET is not set | 25 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 26 | # CONFIG_INET_LRO is not set | ||
| 27 | # CONFIG_IPV6 is not set | 26 | # CONFIG_IPV6 is not set |
| 28 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 27 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 29 | CONFIG_CONNECTOR=y | 28 | CONFIG_CONNECTOR=y |
diff --git a/arch/powerpc/configs/44x/taishan_defconfig b/arch/powerpc/configs/44x/taishan_defconfig index e779228d6cd6..ff6f86241418 100644 --- a/arch/powerpc/configs/44x/taishan_defconfig +++ b/arch/powerpc/configs/44x/taishan_defconfig | |||
| @@ -21,7 +21,6 @@ CONFIG_IP_PNP_BOOTP=y | |||
| 21 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 21 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 22 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 22 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 23 | # CONFIG_INET_XFRM_MODE_BEET is not set | 23 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 24 | # CONFIG_INET_LRO is not set | ||
| 25 | # CONFIG_IPV6 is not set | 24 | # CONFIG_IPV6 is not set |
| 26 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 25 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 27 | CONFIG_CONNECTOR=y | 26 | CONFIG_CONNECTOR=y |
diff --git a/arch/powerpc/configs/44x/virtex5_defconfig b/arch/powerpc/configs/44x/virtex5_defconfig index 53d0300b3390..ce052064bcbb 100644 --- a/arch/powerpc/configs/44x/virtex5_defconfig +++ b/arch/powerpc/configs/44x/virtex5_defconfig | |||
| @@ -26,7 +26,6 @@ CONFIG_IP_MULTICAST=y | |||
| 26 | CONFIG_IP_PNP=y | 26 | CONFIG_IP_PNP=y |
| 27 | CONFIG_IP_PNP_DHCP=y | 27 | CONFIG_IP_PNP_DHCP=y |
| 28 | CONFIG_IP_PNP_BOOTP=y | 28 | CONFIG_IP_PNP_BOOTP=y |
| 29 | # CONFIG_INET_LRO is not set | ||
| 30 | CONFIG_NETFILTER=y | 29 | CONFIG_NETFILTER=y |
| 31 | CONFIG_IP_NF_IPTABLES=m | 30 | CONFIG_IP_NF_IPTABLES=m |
| 32 | CONFIG_IP_NF_FILTER=m | 31 | CONFIG_IP_NF_FILTER=m |
diff --git a/arch/powerpc/configs/44x/warp_defconfig b/arch/powerpc/configs/44x/warp_defconfig index ee434375fc24..ab932488e68b 100644 --- a/arch/powerpc/configs/44x/warp_defconfig +++ b/arch/powerpc/configs/44x/warp_defconfig | |||
| @@ -23,7 +23,6 @@ CONFIG_UNIX=y | |||
| 23 | CONFIG_INET=y | 23 | CONFIG_INET=y |
| 24 | CONFIG_IP_PNP=y | 24 | CONFIG_IP_PNP=y |
| 25 | CONFIG_IP_PNP_DHCP=y | 25 | CONFIG_IP_PNP_DHCP=y |
| 26 | # CONFIG_INET_LRO is not set | ||
| 27 | # CONFIG_IPV6 is not set | 26 | # CONFIG_IPV6 is not set |
| 28 | CONFIG_NETFILTER=y | 27 | CONFIG_NETFILTER=y |
| 29 | CONFIG_VLAN_8021Q=y | 28 | CONFIG_VLAN_8021Q=y |
| @@ -73,9 +72,7 @@ CONFIG_LEDS_GPIO=y | |||
| 73 | CONFIG_LEDS_TRIGGERS=y | 72 | CONFIG_LEDS_TRIGGERS=y |
| 74 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=y | 73 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=y |
| 75 | CONFIG_EXT2_FS=y | 74 | CONFIG_EXT2_FS=y |
| 76 | CONFIG_EXT3_FS=y | 75 | CONFIG_EXT4_FS=y |
| 77 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 78 | # CONFIG_EXT3_FS_XATTR is not set | ||
| 79 | CONFIG_MSDOS_FS=y | 76 | CONFIG_MSDOS_FS=y |
| 80 | CONFIG_VFAT_FS=y | 77 | CONFIG_VFAT_FS=y |
| 81 | CONFIG_PROC_KCORE=y | 78 | CONFIG_PROC_KCORE=y |
diff --git a/arch/powerpc/configs/52xx/cm5200_defconfig b/arch/powerpc/configs/52xx/cm5200_defconfig index 19fad0e0016e..c1faac800806 100644 --- a/arch/powerpc/configs/52xx/cm5200_defconfig +++ b/arch/powerpc/configs/52xx/cm5200_defconfig | |||
| @@ -22,7 +22,6 @@ CONFIG_IP_PNP=y | |||
| 22 | CONFIG_IP_PNP_DHCP=y | 22 | CONFIG_IP_PNP_DHCP=y |
| 23 | CONFIG_IP_PNP_BOOTP=y | 23 | CONFIG_IP_PNP_BOOTP=y |
| 24 | CONFIG_SYN_COOKIES=y | 24 | CONFIG_SYN_COOKIES=y |
| 25 | # CONFIG_INET_LRO is not set | ||
| 26 | # CONFIG_IPV6 is not set | 25 | # CONFIG_IPV6 is not set |
| 27 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 26 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 28 | # CONFIG_FW_LOADER is not set | 27 | # CONFIG_FW_LOADER is not set |
| @@ -61,8 +60,7 @@ CONFIG_USB_STORAGE=y | |||
| 61 | CONFIG_DMADEVICES=y | 60 | CONFIG_DMADEVICES=y |
| 62 | CONFIG_PPC_BESTCOMM=y | 61 | CONFIG_PPC_BESTCOMM=y |
| 63 | CONFIG_EXT2_FS=y | 62 | CONFIG_EXT2_FS=y |
| 64 | CONFIG_EXT3_FS=y | 63 | CONFIG_EXT4_FS=y |
| 65 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 66 | CONFIG_MSDOS_FS=y | 64 | CONFIG_MSDOS_FS=y |
| 67 | CONFIG_VFAT_FS=y | 65 | CONFIG_VFAT_FS=y |
| 68 | CONFIG_PROC_KCORE=y | 66 | CONFIG_PROC_KCORE=y |
diff --git a/arch/powerpc/configs/52xx/lite5200b_defconfig b/arch/powerpc/configs/52xx/lite5200b_defconfig index 5f40ba92a39a..9493b02ac660 100644 --- a/arch/powerpc/configs/52xx/lite5200b_defconfig +++ b/arch/powerpc/configs/52xx/lite5200b_defconfig | |||
| @@ -24,7 +24,6 @@ CONFIG_IP_PNP=y | |||
| 24 | CONFIG_IP_PNP_DHCP=y | 24 | CONFIG_IP_PNP_DHCP=y |
| 25 | CONFIG_IP_PNP_BOOTP=y | 25 | CONFIG_IP_PNP_BOOTP=y |
| 26 | CONFIG_SYN_COOKIES=y | 26 | CONFIG_SYN_COOKIES=y |
| 27 | # CONFIG_INET_LRO is not set | ||
| 28 | # CONFIG_IPV6 is not set | 27 | # CONFIG_IPV6 is not set |
| 29 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 28 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 30 | # CONFIG_FW_LOADER is not set | 29 | # CONFIG_FW_LOADER is not set |
| @@ -53,8 +52,7 @@ CONFIG_I2C_MPC=y | |||
| 53 | CONFIG_DMADEVICES=y | 52 | CONFIG_DMADEVICES=y |
| 54 | CONFIG_PPC_BESTCOMM=y | 53 | CONFIG_PPC_BESTCOMM=y |
| 55 | CONFIG_EXT2_FS=y | 54 | CONFIG_EXT2_FS=y |
| 56 | CONFIG_EXT3_FS=y | 55 | CONFIG_EXT4_FS=y |
| 57 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 58 | CONFIG_PROC_KCORE=y | 56 | CONFIG_PROC_KCORE=y |
| 59 | CONFIG_TMPFS=y | 57 | CONFIG_TMPFS=y |
| 60 | CONFIG_NFS_FS=y | 58 | CONFIG_NFS_FS=y |
diff --git a/arch/powerpc/configs/52xx/motionpro_defconfig b/arch/powerpc/configs/52xx/motionpro_defconfig index 909e185a88d1..fe8126bc1655 100644 --- a/arch/powerpc/configs/52xx/motionpro_defconfig +++ b/arch/powerpc/configs/52xx/motionpro_defconfig | |||
| @@ -22,7 +22,6 @@ CONFIG_IP_PNP=y | |||
| 22 | CONFIG_IP_PNP_DHCP=y | 22 | CONFIG_IP_PNP_DHCP=y |
| 23 | CONFIG_IP_PNP_BOOTP=y | 23 | CONFIG_IP_PNP_BOOTP=y |
| 24 | CONFIG_SYN_COOKIES=y | 24 | CONFIG_SYN_COOKIES=y |
| 25 | # CONFIG_INET_LRO is not set | ||
| 26 | # CONFIG_IPV6 is not set | 25 | # CONFIG_IPV6 is not set |
| 27 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 26 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 28 | # CONFIG_FW_LOADER is not set | 27 | # CONFIG_FW_LOADER is not set |
| @@ -73,8 +72,7 @@ CONFIG_RTC_DRV_DS1307=y | |||
| 73 | CONFIG_DMADEVICES=y | 72 | CONFIG_DMADEVICES=y |
| 74 | CONFIG_PPC_BESTCOMM=y | 73 | CONFIG_PPC_BESTCOMM=y |
| 75 | CONFIG_EXT2_FS=y | 74 | CONFIG_EXT2_FS=y |
| 76 | CONFIG_EXT3_FS=y | 75 | CONFIG_EXT4_FS=y |
| 77 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 78 | CONFIG_MSDOS_FS=y | 76 | CONFIG_MSDOS_FS=y |
| 79 | CONFIG_VFAT_FS=y | 77 | CONFIG_VFAT_FS=y |
| 80 | CONFIG_PROC_KCORE=y | 78 | CONFIG_PROC_KCORE=y |
diff --git a/arch/powerpc/configs/52xx/pcm030_defconfig b/arch/powerpc/configs/52xx/pcm030_defconfig index 649a01a0044d..1554de6968ca 100644 --- a/arch/powerpc/configs/52xx/pcm030_defconfig +++ b/arch/powerpc/configs/52xx/pcm030_defconfig | |||
| @@ -34,7 +34,6 @@ CONFIG_IP_PNP_BOOTP=y | |||
| 34 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 34 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 35 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 35 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 36 | # CONFIG_INET_XFRM_MODE_BEET is not set | 36 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 37 | # CONFIG_INET_LRO is not set | ||
| 38 | # CONFIG_INET_DIAG is not set | 37 | # CONFIG_INET_DIAG is not set |
| 39 | # CONFIG_IPV6 is not set | 38 | # CONFIG_IPV6 is not set |
| 40 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 39 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| @@ -74,8 +73,7 @@ CONFIG_RTC_DRV_PCF8563=m | |||
| 74 | CONFIG_DMADEVICES=y | 73 | CONFIG_DMADEVICES=y |
| 75 | CONFIG_PPC_BESTCOMM=y | 74 | CONFIG_PPC_BESTCOMM=y |
| 76 | CONFIG_EXT2_FS=m | 75 | CONFIG_EXT2_FS=m |
| 77 | CONFIG_EXT3_FS=m | 76 | CONFIG_EXT4_FS=m |
| 78 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 79 | # CONFIG_DNOTIFY is not set | 77 | # CONFIG_DNOTIFY is not set |
| 80 | CONFIG_VFAT_FS=m | 78 | CONFIG_VFAT_FS=m |
| 81 | CONFIG_FAT_DEFAULT_CODEPAGE=850 | 79 | CONFIG_FAT_DEFAULT_CODEPAGE=850 |
diff --git a/arch/powerpc/configs/52xx/tqm5200_defconfig b/arch/powerpc/configs/52xx/tqm5200_defconfig index efab8388ea92..b8b316b884aa 100644 --- a/arch/powerpc/configs/52xx/tqm5200_defconfig +++ b/arch/powerpc/configs/52xx/tqm5200_defconfig | |||
| @@ -26,7 +26,6 @@ CONFIG_IP_PNP=y | |||
| 26 | CONFIG_IP_PNP_DHCP=y | 26 | CONFIG_IP_PNP_DHCP=y |
| 27 | CONFIG_IP_PNP_BOOTP=y | 27 | CONFIG_IP_PNP_BOOTP=y |
| 28 | CONFIG_SYN_COOKIES=y | 28 | CONFIG_SYN_COOKIES=y |
| 29 | # CONFIG_INET_LRO is not set | ||
| 30 | # CONFIG_IPV6 is not set | 29 | # CONFIG_IPV6 is not set |
| 31 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 30 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 32 | # CONFIG_FW_LOADER is not set | 31 | # CONFIG_FW_LOADER is not set |
| @@ -75,8 +74,7 @@ CONFIG_RTC_DRV_DS1374=y | |||
| 75 | CONFIG_DMADEVICES=y | 74 | CONFIG_DMADEVICES=y |
| 76 | CONFIG_PPC_BESTCOMM=y | 75 | CONFIG_PPC_BESTCOMM=y |
| 77 | CONFIG_EXT2_FS=y | 76 | CONFIG_EXT2_FS=y |
| 78 | CONFIG_EXT3_FS=y | 77 | CONFIG_EXT4_FS=y |
| 79 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 80 | CONFIG_MSDOS_FS=y | 78 | CONFIG_MSDOS_FS=y |
| 81 | CONFIG_VFAT_FS=y | 79 | CONFIG_VFAT_FS=y |
| 82 | CONFIG_PROC_KCORE=y | 80 | CONFIG_PROC_KCORE=y |
diff --git a/arch/powerpc/configs/83xx/asp8347_defconfig b/arch/powerpc/configs/83xx/asp8347_defconfig index bcdfb07921fc..b60cac088a7b 100644 --- a/arch/powerpc/configs/83xx/asp8347_defconfig +++ b/arch/powerpc/configs/83xx/asp8347_defconfig | |||
| @@ -26,7 +26,6 @@ CONFIG_IP_PNP=y | |||
| 26 | CONFIG_IP_PNP_DHCP=y | 26 | CONFIG_IP_PNP_DHCP=y |
| 27 | CONFIG_IP_PNP_BOOTP=y | 27 | CONFIG_IP_PNP_BOOTP=y |
| 28 | CONFIG_SYN_COOKIES=y | 28 | CONFIG_SYN_COOKIES=y |
| 29 | # CONFIG_INET_LRO is not set | ||
| 30 | # CONFIG_IPV6 is not set | 29 | # CONFIG_IPV6 is not set |
| 31 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 30 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 32 | # CONFIG_FW_LOADER is not set | 31 | # CONFIG_FW_LOADER is not set |
| @@ -63,8 +62,7 @@ CONFIG_USB_EHCI_FSL=y | |||
| 63 | CONFIG_RTC_CLASS=y | 62 | CONFIG_RTC_CLASS=y |
| 64 | CONFIG_RTC_DRV_DS1374=y | 63 | CONFIG_RTC_DRV_DS1374=y |
| 65 | CONFIG_EXT2_FS=y | 64 | CONFIG_EXT2_FS=y |
| 66 | CONFIG_EXT3_FS=y | 65 | CONFIG_EXT4_FS=y |
| 67 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 68 | CONFIG_PROC_KCORE=y | 66 | CONFIG_PROC_KCORE=y |
| 69 | CONFIG_TMPFS=y | 67 | CONFIG_TMPFS=y |
| 70 | CONFIG_JFFS2_FS=y | 68 | CONFIG_JFFS2_FS=y |
diff --git a/arch/powerpc/configs/83xx/kmeter1_defconfig b/arch/powerpc/configs/83xx/kmeter1_defconfig index 11a959283149..9547dcdd6489 100644 --- a/arch/powerpc/configs/83xx/kmeter1_defconfig +++ b/arch/powerpc/configs/83xx/kmeter1_defconfig | |||
| @@ -28,7 +28,6 @@ CONFIG_IP_PNP=y | |||
| 28 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 28 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 29 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 29 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 30 | # CONFIG_INET_XFRM_MODE_BEET is not set | 30 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 31 | # CONFIG_INET_LRO is not set | ||
| 32 | # CONFIG_IPV6 is not set | 31 | # CONFIG_IPV6 is not set |
| 33 | CONFIG_TIPC=y | 32 | CONFIG_TIPC=y |
| 34 | CONFIG_BRIDGE=m | 33 | CONFIG_BRIDGE=m |
diff --git a/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig b/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig index b47a41f77836..80aa844c1428 100644 --- a/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig +++ b/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig | |||
| @@ -23,7 +23,6 @@ CONFIG_IP_PNP=y | |||
| 23 | CONFIG_IP_PNP_DHCP=y | 23 | CONFIG_IP_PNP_DHCP=y |
| 24 | CONFIG_IP_PNP_BOOTP=y | 24 | CONFIG_IP_PNP_BOOTP=y |
| 25 | CONFIG_SYN_COOKIES=y | 25 | CONFIG_SYN_COOKIES=y |
| 26 | # CONFIG_INET_LRO is not set | ||
| 27 | # CONFIG_IPV6 is not set | 26 | # CONFIG_IPV6 is not set |
| 28 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 27 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 29 | # CONFIG_FW_LOADER is not set | 28 | # CONFIG_FW_LOADER is not set |
| @@ -79,8 +78,7 @@ CONFIG_RTC_CLASS=y | |||
| 79 | CONFIG_RTC_INTF_DEV_UIE_EMUL=y | 78 | CONFIG_RTC_INTF_DEV_UIE_EMUL=y |
| 80 | CONFIG_RTC_DRV_DS1307=y | 79 | CONFIG_RTC_DRV_DS1307=y |
| 81 | CONFIG_EXT2_FS=y | 80 | CONFIG_EXT2_FS=y |
| 82 | CONFIG_EXT3_FS=y | 81 | CONFIG_EXT4_FS=y |
| 83 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 84 | CONFIG_PROC_KCORE=y | 82 | CONFIG_PROC_KCORE=y |
| 85 | CONFIG_TMPFS=y | 83 | CONFIG_TMPFS=y |
| 86 | CONFIG_JFFS2_FS=y | 84 | CONFIG_JFFS2_FS=y |
diff --git a/arch/powerpc/configs/83xx/mpc8315_rdb_defconfig b/arch/powerpc/configs/83xx/mpc8315_rdb_defconfig index e28c83f320c1..d89d13bc6901 100644 --- a/arch/powerpc/configs/83xx/mpc8315_rdb_defconfig +++ b/arch/powerpc/configs/83xx/mpc8315_rdb_defconfig | |||
| @@ -23,7 +23,6 @@ CONFIG_IP_PNP=y | |||
| 23 | CONFIG_IP_PNP_DHCP=y | 23 | CONFIG_IP_PNP_DHCP=y |
| 24 | CONFIG_IP_PNP_BOOTP=y | 24 | CONFIG_IP_PNP_BOOTP=y |
| 25 | CONFIG_SYN_COOKIES=y | 25 | CONFIG_SYN_COOKIES=y |
| 26 | # CONFIG_INET_LRO is not set | ||
| 27 | # CONFIG_IPV6 is not set | 26 | # CONFIG_IPV6 is not set |
| 28 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 27 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 29 | # CONFIG_FW_LOADER is not set | 28 | # CONFIG_FW_LOADER is not set |
| @@ -77,8 +76,7 @@ CONFIG_RTC_CLASS=y | |||
| 77 | CONFIG_RTC_INTF_DEV_UIE_EMUL=y | 76 | CONFIG_RTC_INTF_DEV_UIE_EMUL=y |
| 78 | CONFIG_RTC_DRV_DS1307=y | 77 | CONFIG_RTC_DRV_DS1307=y |
| 79 | CONFIG_EXT2_FS=y | 78 | CONFIG_EXT2_FS=y |
| 80 | CONFIG_EXT3_FS=y | 79 | CONFIG_EXT4_FS=y |
| 81 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 82 | CONFIG_PROC_KCORE=y | 80 | CONFIG_PROC_KCORE=y |
| 83 | CONFIG_TMPFS=y | 81 | CONFIG_TMPFS=y |
| 84 | CONFIG_JFFS2_FS=y | 82 | CONFIG_JFFS2_FS=y |
diff --git a/arch/powerpc/configs/83xx/mpc832x_mds_defconfig b/arch/powerpc/configs/83xx/mpc832x_mds_defconfig index e84d35b848c0..e789518a2881 100644 --- a/arch/powerpc/configs/83xx/mpc832x_mds_defconfig +++ b/arch/powerpc/configs/83xx/mpc832x_mds_defconfig | |||
| @@ -26,7 +26,6 @@ CONFIG_IP_PNP=y | |||
| 26 | CONFIG_IP_PNP_DHCP=y | 26 | CONFIG_IP_PNP_DHCP=y |
| 27 | CONFIG_IP_PNP_BOOTP=y | 27 | CONFIG_IP_PNP_BOOTP=y |
| 28 | CONFIG_SYN_COOKIES=y | 28 | CONFIG_SYN_COOKIES=y |
| 29 | # CONFIG_INET_LRO is not set | ||
| 30 | # CONFIG_IPV6 is not set | 29 | # CONFIG_IPV6 is not set |
| 31 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 30 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 32 | # CONFIG_FW_LOADER is not set | 31 | # CONFIG_FW_LOADER is not set |
| @@ -52,8 +51,7 @@ CONFIG_WATCHDOG=y | |||
| 52 | CONFIG_RTC_CLASS=y | 51 | CONFIG_RTC_CLASS=y |
| 53 | CONFIG_RTC_DRV_DS1374=y | 52 | CONFIG_RTC_DRV_DS1374=y |
| 54 | CONFIG_EXT2_FS=y | 53 | CONFIG_EXT2_FS=y |
| 55 | CONFIG_EXT3_FS=y | 54 | CONFIG_EXT4_FS=y |
| 56 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 57 | CONFIG_PROC_KCORE=y | 55 | CONFIG_PROC_KCORE=y |
| 58 | CONFIG_TMPFS=y | 56 | CONFIG_TMPFS=y |
| 59 | CONFIG_NFS_FS=y | 57 | CONFIG_NFS_FS=y |
diff --git a/arch/powerpc/configs/83xx/mpc832x_rdb_defconfig b/arch/powerpc/configs/83xx/mpc832x_rdb_defconfig index ae145f410590..917a49ca2bd1 100644 --- a/arch/powerpc/configs/83xx/mpc832x_rdb_defconfig +++ b/arch/powerpc/configs/83xx/mpc832x_rdb_defconfig | |||
| @@ -26,7 +26,6 @@ CONFIG_IP_PNP=y | |||
| 26 | CONFIG_IP_PNP_DHCP=y | 26 | CONFIG_IP_PNP_DHCP=y |
| 27 | CONFIG_IP_PNP_BOOTP=y | 27 | CONFIG_IP_PNP_BOOTP=y |
| 28 | CONFIG_SYN_COOKIES=y | 28 | CONFIG_SYN_COOKIES=y |
| 29 | # CONFIG_INET_LRO is not set | ||
| 30 | # CONFIG_IPV6 is not set | 29 | # CONFIG_IPV6 is not set |
| 31 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 30 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 32 | # CONFIG_FW_LOADER is not set | 31 | # CONFIG_FW_LOADER is not set |
| @@ -64,8 +63,7 @@ CONFIG_USB_STORAGE=y | |||
| 64 | CONFIG_MMC=y | 63 | CONFIG_MMC=y |
| 65 | CONFIG_MMC_SPI=y | 64 | CONFIG_MMC_SPI=y |
| 66 | CONFIG_EXT2_FS=y | 65 | CONFIG_EXT2_FS=y |
| 67 | CONFIG_EXT3_FS=y | 66 | CONFIG_EXT4_FS=y |
| 68 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 69 | CONFIG_MSDOS_FS=y | 67 | CONFIG_MSDOS_FS=y |
| 70 | CONFIG_VFAT_FS=y | 68 | CONFIG_VFAT_FS=y |
| 71 | CONFIG_PROC_KCORE=y | 69 | CONFIG_PROC_KCORE=y |
diff --git a/arch/powerpc/configs/83xx/mpc834x_itx_defconfig b/arch/powerpc/configs/83xx/mpc834x_itx_defconfig index 87fc15bce407..00f636e95cc8 100644 --- a/arch/powerpc/configs/83xx/mpc834x_itx_defconfig +++ b/arch/powerpc/configs/83xx/mpc834x_itx_defconfig | |||
| @@ -24,7 +24,6 @@ CONFIG_IP_PNP=y | |||
| 24 | CONFIG_IP_PNP_DHCP=y | 24 | CONFIG_IP_PNP_DHCP=y |
| 25 | CONFIG_IP_PNP_BOOTP=y | 25 | CONFIG_IP_PNP_BOOTP=y |
| 26 | CONFIG_SYN_COOKIES=y | 26 | CONFIG_SYN_COOKIES=y |
| 27 | # CONFIG_INET_LRO is not set | ||
| 28 | # CONFIG_IPV6 is not set | 27 | # CONFIG_IPV6 is not set |
| 29 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 28 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 30 | # CONFIG_FW_LOADER is not set | 29 | # CONFIG_FW_LOADER is not set |
| @@ -75,8 +74,7 @@ CONFIG_RTC_CLASS=y | |||
| 75 | CONFIG_RTC_INTF_DEV_UIE_EMUL=y | 74 | CONFIG_RTC_INTF_DEV_UIE_EMUL=y |
| 76 | CONFIG_RTC_DRV_DS1307=y | 75 | CONFIG_RTC_DRV_DS1307=y |
| 77 | CONFIG_EXT2_FS=y | 76 | CONFIG_EXT2_FS=y |
| 78 | CONFIG_EXT3_FS=y | 77 | CONFIG_EXT4_FS=y |
| 79 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 80 | CONFIG_MSDOS_FS=y | 78 | CONFIG_MSDOS_FS=y |
| 81 | CONFIG_VFAT_FS=y | 79 | CONFIG_VFAT_FS=y |
| 82 | CONFIG_PROC_KCORE=y | 80 | CONFIG_PROC_KCORE=y |
diff --git a/arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig b/arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig index 9a2ff25a2e98..a539d44d1dba 100644 --- a/arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig +++ b/arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig | |||
| @@ -24,7 +24,6 @@ CONFIG_IP_PNP=y | |||
| 24 | CONFIG_IP_PNP_DHCP=y | 24 | CONFIG_IP_PNP_DHCP=y |
| 25 | CONFIG_IP_PNP_BOOTP=y | 25 | CONFIG_IP_PNP_BOOTP=y |
| 26 | CONFIG_SYN_COOKIES=y | 26 | CONFIG_SYN_COOKIES=y |
| 27 | # CONFIG_INET_LRO is not set | ||
| 28 | # CONFIG_IPV6 is not set | 27 | # CONFIG_IPV6 is not set |
| 29 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 28 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 30 | # CONFIG_FW_LOADER is not set | 29 | # CONFIG_FW_LOADER is not set |
| @@ -66,8 +65,7 @@ CONFIG_RTC_CLASS=y | |||
| 66 | CONFIG_RTC_INTF_DEV_UIE_EMUL=y | 65 | CONFIG_RTC_INTF_DEV_UIE_EMUL=y |
| 67 | CONFIG_RTC_DRV_DS1307=y | 66 | CONFIG_RTC_DRV_DS1307=y |
| 68 | CONFIG_EXT2_FS=y | 67 | CONFIG_EXT2_FS=y |
| 69 | CONFIG_EXT3_FS=y | 68 | CONFIG_EXT4_FS=y |
| 70 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 71 | CONFIG_MSDOS_FS=y | 69 | CONFIG_MSDOS_FS=y |
| 72 | CONFIG_VFAT_FS=y | 70 | CONFIG_VFAT_FS=y |
| 73 | CONFIG_PROC_KCORE=y | 71 | CONFIG_PROC_KCORE=y |
diff --git a/arch/powerpc/configs/83xx/mpc834x_mds_defconfig b/arch/powerpc/configs/83xx/mpc834x_mds_defconfig index e44edc575549..9f0ddc830c82 100644 --- a/arch/powerpc/configs/83xx/mpc834x_mds_defconfig +++ b/arch/powerpc/configs/83xx/mpc834x_mds_defconfig | |||
| @@ -25,7 +25,6 @@ CONFIG_IP_PNP=y | |||
| 25 | CONFIG_IP_PNP_DHCP=y | 25 | CONFIG_IP_PNP_DHCP=y |
| 26 | CONFIG_IP_PNP_BOOTP=y | 26 | CONFIG_IP_PNP_BOOTP=y |
| 27 | CONFIG_SYN_COOKIES=y | 27 | CONFIG_SYN_COOKIES=y |
| 28 | # CONFIG_INET_LRO is not set | ||
| 29 | # CONFIG_IPV6 is not set | 28 | # CONFIG_IPV6 is not set |
| 30 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 29 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 31 | # CONFIG_FW_LOADER is not set | 30 | # CONFIG_FW_LOADER is not set |
| @@ -51,8 +50,7 @@ CONFIG_WATCHDOG=y | |||
| 51 | CONFIG_RTC_CLASS=y | 50 | CONFIG_RTC_CLASS=y |
| 52 | CONFIG_RTC_DRV_DS1374=y | 51 | CONFIG_RTC_DRV_DS1374=y |
| 53 | CONFIG_EXT2_FS=y | 52 | CONFIG_EXT2_FS=y |
| 54 | CONFIG_EXT3_FS=y | 53 | CONFIG_EXT4_FS=y |
| 55 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 56 | CONFIG_PROC_KCORE=y | 54 | CONFIG_PROC_KCORE=y |
| 57 | CONFIG_TMPFS=y | 55 | CONFIG_TMPFS=y |
| 58 | CONFIG_NFS_FS=y | 56 | CONFIG_NFS_FS=y |
diff --git a/arch/powerpc/configs/83xx/mpc836x_mds_defconfig b/arch/powerpc/configs/83xx/mpc836x_mds_defconfig index 94a7d85f1603..ceed4c1f0ab5 100644 --- a/arch/powerpc/configs/83xx/mpc836x_mds_defconfig +++ b/arch/powerpc/configs/83xx/mpc836x_mds_defconfig | |||
| @@ -25,7 +25,6 @@ CONFIG_IP_PNP=y | |||
| 25 | CONFIG_IP_PNP_DHCP=y | 25 | CONFIG_IP_PNP_DHCP=y |
| 26 | CONFIG_IP_PNP_BOOTP=y | 26 | CONFIG_IP_PNP_BOOTP=y |
| 27 | CONFIG_SYN_COOKIES=y | 27 | CONFIG_SYN_COOKIES=y |
| 28 | # CONFIG_INET_LRO is not set | ||
| 29 | # CONFIG_IPV6 is not set | 28 | # CONFIG_IPV6 is not set |
| 30 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 29 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 31 | # CONFIG_FW_LOADER is not set | 30 | # CONFIG_FW_LOADER is not set |
| @@ -57,8 +56,7 @@ CONFIG_WATCHDOG=y | |||
| 57 | CONFIG_RTC_CLASS=y | 56 | CONFIG_RTC_CLASS=y |
| 58 | CONFIG_RTC_DRV_DS1374=y | 57 | CONFIG_RTC_DRV_DS1374=y |
| 59 | CONFIG_EXT2_FS=y | 58 | CONFIG_EXT2_FS=y |
| 60 | CONFIG_EXT3_FS=y | 59 | CONFIG_EXT4_FS=y |
| 61 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 62 | CONFIG_PROC_KCORE=y | 60 | CONFIG_PROC_KCORE=y |
| 63 | CONFIG_TMPFS=y | 61 | CONFIG_TMPFS=y |
| 64 | CONFIG_NFS_FS=y | 62 | CONFIG_NFS_FS=y |
diff --git a/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig b/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig index 761ed8ea0729..a6819bf3ef5e 100644 --- a/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig +++ b/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig | |||
| @@ -24,7 +24,6 @@ CONFIG_IP_PNP=y | |||
| 24 | CONFIG_IP_PNP_DHCP=y | 24 | CONFIG_IP_PNP_DHCP=y |
| 25 | CONFIG_IP_PNP_BOOTP=y | 25 | CONFIG_IP_PNP_BOOTP=y |
| 26 | CONFIG_SYN_COOKIES=y | 26 | CONFIG_SYN_COOKIES=y |
| 27 | # CONFIG_INET_LRO is not set | ||
| 28 | # CONFIG_IPV6 is not set | 27 | # CONFIG_IPV6 is not set |
| 29 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 28 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 30 | CONFIG_MTD=y | 29 | CONFIG_MTD=y |
| @@ -65,8 +64,7 @@ CONFIG_LOGO=y | |||
| 65 | # CONFIG_LOGO_LINUX_MONO is not set | 64 | # CONFIG_LOGO_LINUX_MONO is not set |
| 66 | # CONFIG_USB_SUPPORT is not set | 65 | # CONFIG_USB_SUPPORT is not set |
| 67 | CONFIG_EXT2_FS=y | 66 | CONFIG_EXT2_FS=y |
| 68 | CONFIG_EXT3_FS=y | 67 | CONFIG_EXT4_FS=y |
| 69 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 70 | CONFIG_PROC_KCORE=y | 68 | CONFIG_PROC_KCORE=y |
| 71 | CONFIG_TMPFS=y | 69 | CONFIG_TMPFS=y |
| 72 | CONFIG_JFFS2_FS=y | 70 | CONFIG_JFFS2_FS=y |
diff --git a/arch/powerpc/configs/83xx/mpc837x_mds_defconfig b/arch/powerpc/configs/83xx/mpc837x_mds_defconfig index bcf1b48cc9e6..4bd1992e4d98 100644 --- a/arch/powerpc/configs/83xx/mpc837x_mds_defconfig +++ b/arch/powerpc/configs/83xx/mpc837x_mds_defconfig | |||
| @@ -22,7 +22,6 @@ CONFIG_IP_PNP=y | |||
| 22 | CONFIG_IP_PNP_DHCP=y | 22 | CONFIG_IP_PNP_DHCP=y |
| 23 | CONFIG_IP_PNP_BOOTP=y | 23 | CONFIG_IP_PNP_BOOTP=y |
| 24 | CONFIG_SYN_COOKIES=y | 24 | CONFIG_SYN_COOKIES=y |
| 25 | # CONFIG_INET_LRO is not set | ||
| 26 | # CONFIG_IPV6 is not set | 25 | # CONFIG_IPV6 is not set |
| 27 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 26 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 28 | # CONFIG_FW_LOADER is not set | 27 | # CONFIG_FW_LOADER is not set |
| @@ -50,8 +49,7 @@ CONFIG_I2C_CHARDEV=y | |||
| 50 | CONFIG_I2C_MPC=y | 49 | CONFIG_I2C_MPC=y |
| 51 | CONFIG_WATCHDOG=y | 50 | CONFIG_WATCHDOG=y |
| 52 | CONFIG_EXT2_FS=y | 51 | CONFIG_EXT2_FS=y |
| 53 | CONFIG_EXT3_FS=y | 52 | CONFIG_EXT4_FS=y |
| 54 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 55 | CONFIG_PROC_KCORE=y | 53 | CONFIG_PROC_KCORE=y |
| 56 | CONFIG_TMPFS=y | 54 | CONFIG_TMPFS=y |
| 57 | CONFIG_NFS_FS=y | 55 | CONFIG_NFS_FS=y |
diff --git a/arch/powerpc/configs/83xx/mpc837x_rdb_defconfig b/arch/powerpc/configs/83xx/mpc837x_rdb_defconfig index f0f0ebf75125..2d4bb63882b8 100644 --- a/arch/powerpc/configs/83xx/mpc837x_rdb_defconfig +++ b/arch/powerpc/configs/83xx/mpc837x_rdb_defconfig | |||
| @@ -24,7 +24,6 @@ CONFIG_SYN_COOKIES=y | |||
| 24 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 24 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 25 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 25 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 26 | # CONFIG_INET_XFRM_MODE_BEET is not set | 26 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 27 | # CONFIG_INET_LRO is not set | ||
| 28 | # CONFIG_IPV6 is not set | 27 | # CONFIG_IPV6 is not set |
| 29 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 28 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 30 | # CONFIG_FW_LOADER is not set | 29 | # CONFIG_FW_LOADER is not set |
| @@ -77,8 +76,7 @@ CONFIG_USB_MON=y | |||
| 77 | CONFIG_USB_EHCI_HCD=y | 76 | CONFIG_USB_EHCI_HCD=y |
| 78 | CONFIG_USB_EHCI_FSL=y | 77 | CONFIG_USB_EHCI_FSL=y |
| 79 | CONFIG_EXT2_FS=y | 78 | CONFIG_EXT2_FS=y |
| 80 | CONFIG_EXT3_FS=y | 79 | CONFIG_EXT4_FS=y |
| 81 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 82 | CONFIG_PROC_KCORE=y | 80 | CONFIG_PROC_KCORE=y |
| 83 | CONFIG_TMPFS=y | 81 | CONFIG_TMPFS=y |
| 84 | CONFIG_NFS_FS=y | 82 | CONFIG_NFS_FS=y |
diff --git a/arch/powerpc/configs/83xx/sbc834x_defconfig b/arch/powerpc/configs/83xx/sbc834x_defconfig index d2e4d82de14d..b3380dbd1925 100644 --- a/arch/powerpc/configs/83xx/sbc834x_defconfig +++ b/arch/powerpc/configs/83xx/sbc834x_defconfig | |||
| @@ -22,7 +22,6 @@ CONFIG_IP_PNP=y | |||
| 22 | CONFIG_IP_PNP_DHCP=y | 22 | CONFIG_IP_PNP_DHCP=y |
| 23 | CONFIG_IP_PNP_BOOTP=y | 23 | CONFIG_IP_PNP_BOOTP=y |
| 24 | CONFIG_SYN_COOKIES=y | 24 | CONFIG_SYN_COOKIES=y |
| 25 | # CONFIG_INET_LRO is not set | ||
| 26 | # CONFIG_IPV6 is not set | 25 | # CONFIG_IPV6 is not set |
| 27 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 26 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 28 | # CONFIG_FW_LOADER is not set | 27 | # CONFIG_FW_LOADER is not set |
| @@ -65,9 +64,7 @@ CONFIG_USB_EHCI_HCD=y | |||
| 65 | CONFIG_USB_EHCI_FSL=y | 64 | CONFIG_USB_EHCI_FSL=y |
| 66 | CONFIG_USB_STORAGE=y | 65 | CONFIG_USB_STORAGE=y |
| 67 | CONFIG_EXT2_FS=y | 66 | CONFIG_EXT2_FS=y |
| 68 | CONFIG_EXT3_FS=y | 67 | CONFIG_EXT4_FS=y |
| 69 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 70 | # CONFIG_EXT3_FS_XATTR is not set | ||
| 71 | CONFIG_PROC_KCORE=y | 68 | CONFIG_PROC_KCORE=y |
| 72 | CONFIG_TMPFS=y | 69 | CONFIG_TMPFS=y |
| 73 | CONFIG_NFS_FS=y | 70 | CONFIG_NFS_FS=y |
diff --git a/arch/powerpc/configs/85xx/ge_imp3a_defconfig b/arch/powerpc/configs/85xx/ge_imp3a_defconfig index b0939dd9ad6f..c79283be5680 100644 --- a/arch/powerpc/configs/85xx/ge_imp3a_defconfig +++ b/arch/powerpc/configs/85xx/ge_imp3a_defconfig | |||
| @@ -165,10 +165,8 @@ CONFIG_FSL_DMA=y | |||
| 165 | CONFIG_EXT2_FS=y | 165 | CONFIG_EXT2_FS=y |
| 166 | CONFIG_EXT2_FS_XATTR=y | 166 | CONFIG_EXT2_FS_XATTR=y |
| 167 | CONFIG_EXT2_FS_POSIX_ACL=y | 167 | CONFIG_EXT2_FS_POSIX_ACL=y |
| 168 | CONFIG_EXT3_FS=y | ||
| 169 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 170 | CONFIG_EXT3_FS_POSIX_ACL=y | ||
| 171 | CONFIG_EXT4_FS=y | 168 | CONFIG_EXT4_FS=y |
| 169 | CONFIG_EXT4_FS_POSIX_ACL=y | ||
| 172 | CONFIG_FUSE_FS=y | 170 | CONFIG_FUSE_FS=y |
| 173 | CONFIG_ISO9660_FS=y | 171 | CONFIG_ISO9660_FS=y |
| 174 | CONFIG_JOLIET=y | 172 | CONFIG_JOLIET=y |
diff --git a/arch/powerpc/configs/85xx/kmp204x_defconfig b/arch/powerpc/configs/85xx/kmp204x_defconfig index e94d3eb4a8c1..aaaaa609cd24 100644 --- a/arch/powerpc/configs/85xx/kmp204x_defconfig +++ b/arch/powerpc/configs/85xx/kmp204x_defconfig | |||
| @@ -64,7 +64,6 @@ CONFIG_IP_PIMSM_V2=y | |||
| 64 | CONFIG_INET_AH=y | 64 | CONFIG_INET_AH=y |
| 65 | CONFIG_INET_ESP=y | 65 | CONFIG_INET_ESP=y |
| 66 | CONFIG_INET_IPCOMP=y | 66 | CONFIG_INET_IPCOMP=y |
| 67 | # CONFIG_INET_LRO is not set | ||
| 68 | CONFIG_IPV6=y | 67 | CONFIG_IPV6=y |
| 69 | CONFIG_IP_SCTP=m | 68 | CONFIG_IP_SCTP=m |
| 70 | CONFIG_TIPC=y | 69 | CONFIG_TIPC=y |
| @@ -189,7 +188,7 @@ CONFIG_RTC_DRV_DS3232=y | |||
| 189 | CONFIG_RTC_DRV_CMOS=y | 188 | CONFIG_RTC_DRV_CMOS=y |
| 190 | CONFIG_UIO=y | 189 | CONFIG_UIO=y |
| 191 | CONFIG_STAGING=y | 190 | CONFIG_STAGING=y |
| 192 | CONFIG_CLK_PPC_CORENET=y | 191 | CONFIG_CLK_QORIQ=y |
| 193 | CONFIG_EXT2_FS=y | 192 | CONFIG_EXT2_FS=y |
| 194 | CONFIG_NTFS_FS=y | 193 | CONFIG_NTFS_FS=y |
| 195 | CONFIG_PROC_KCORE=y | 194 | CONFIG_PROC_KCORE=y |
diff --git a/arch/powerpc/configs/85xx/ksi8560_defconfig b/arch/powerpc/configs/85xx/ksi8560_defconfig index 6f753a71fe5d..bd814dfb0bbd 100644 --- a/arch/powerpc/configs/85xx/ksi8560_defconfig +++ b/arch/powerpc/configs/85xx/ksi8560_defconfig | |||
| @@ -21,7 +21,6 @@ CONFIG_IP_PNP=y | |||
| 21 | CONFIG_IP_PNP_DHCP=y | 21 | CONFIG_IP_PNP_DHCP=y |
| 22 | CONFIG_IP_PNP_BOOTP=y | 22 | CONFIG_IP_PNP_BOOTP=y |
| 23 | CONFIG_SYN_COOKIES=y | 23 | CONFIG_SYN_COOKIES=y |
| 24 | # CONFIG_INET_LRO is not set | ||
| 25 | # CONFIG_IPV6 is not set | 24 | # CONFIG_IPV6 is not set |
| 26 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 25 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 27 | # CONFIG_FW_LOADER is not set | 26 | # CONFIG_FW_LOADER is not set |
| @@ -49,8 +48,7 @@ CONFIG_SERIAL_CPM=y | |||
| 49 | CONFIG_SERIAL_CPM_CONSOLE=y | 48 | CONFIG_SERIAL_CPM_CONSOLE=y |
| 50 | CONFIG_GEN_RTC=y | 49 | CONFIG_GEN_RTC=y |
| 51 | CONFIG_EXT2_FS=y | 50 | CONFIG_EXT2_FS=y |
| 52 | CONFIG_EXT3_FS=y | 51 | CONFIG_EXT4_FS=y |
| 53 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 54 | CONFIG_PROC_KCORE=y | 52 | CONFIG_PROC_KCORE=y |
| 55 | CONFIG_TMPFS=y | 53 | CONFIG_TMPFS=y |
| 56 | CONFIG_NFS_FS=y | 54 | CONFIG_NFS_FS=y |
diff --git a/arch/powerpc/configs/85xx/mpc8540_ads_defconfig b/arch/powerpc/configs/85xx/mpc8540_ads_defconfig index e38c373f2edf..32af10def641 100644 --- a/arch/powerpc/configs/85xx/mpc8540_ads_defconfig +++ b/arch/powerpc/configs/85xx/mpc8540_ads_defconfig | |||
| @@ -22,7 +22,6 @@ CONFIG_IP_PNP=y | |||
| 22 | CONFIG_IP_PNP_DHCP=y | 22 | CONFIG_IP_PNP_DHCP=y |
| 23 | CONFIG_IP_PNP_BOOTP=y | 23 | CONFIG_IP_PNP_BOOTP=y |
| 24 | CONFIG_SYN_COOKIES=y | 24 | CONFIG_SYN_COOKIES=y |
| 25 | # CONFIG_INET_LRO is not set | ||
| 26 | # CONFIG_IPV6 is not set | 25 | # CONFIG_IPV6 is not set |
| 27 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 26 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 28 | # CONFIG_FW_LOADER is not set | 27 | # CONFIG_FW_LOADER is not set |
| @@ -41,8 +40,7 @@ CONFIG_SERIAL_8250_CONSOLE=y | |||
| 41 | # CONFIG_HW_RANDOM is not set | 40 | # CONFIG_HW_RANDOM is not set |
| 42 | CONFIG_GEN_RTC=y | 41 | CONFIG_GEN_RTC=y |
| 43 | CONFIG_EXT2_FS=y | 42 | CONFIG_EXT2_FS=y |
| 44 | CONFIG_EXT3_FS=y | 43 | CONFIG_EXT4_FS=y |
| 45 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 46 | CONFIG_PROC_KCORE=y | 44 | CONFIG_PROC_KCORE=y |
| 47 | CONFIG_TMPFS=y | 45 | CONFIG_TMPFS=y |
| 48 | CONFIG_NFS_FS=y | 46 | CONFIG_NFS_FS=y |
diff --git a/arch/powerpc/configs/85xx/mpc8560_ads_defconfig b/arch/powerpc/configs/85xx/mpc8560_ads_defconfig index 48fc8e3a7be0..a52b2170ee33 100644 --- a/arch/powerpc/configs/85xx/mpc8560_ads_defconfig +++ b/arch/powerpc/configs/85xx/mpc8560_ads_defconfig | |||
| @@ -21,7 +21,6 @@ CONFIG_IP_PNP=y | |||
| 21 | CONFIG_IP_PNP_DHCP=y | 21 | CONFIG_IP_PNP_DHCP=y |
| 22 | CONFIG_IP_PNP_BOOTP=y | 22 | CONFIG_IP_PNP_BOOTP=y |
| 23 | CONFIG_SYN_COOKIES=y | 23 | CONFIG_SYN_COOKIES=y |
| 24 | # CONFIG_INET_LRO is not set | ||
| 25 | # CONFIG_IPV6 is not set | 24 | # CONFIG_IPV6 is not set |
| 26 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 25 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 27 | # CONFIG_FW_LOADER is not set | 26 | # CONFIG_FW_LOADER is not set |
| @@ -44,8 +43,7 @@ CONFIG_SERIAL_CPM=y | |||
| 44 | CONFIG_SERIAL_CPM_CONSOLE=y | 43 | CONFIG_SERIAL_CPM_CONSOLE=y |
| 45 | CONFIG_GEN_RTC=y | 44 | CONFIG_GEN_RTC=y |
| 46 | CONFIG_EXT2_FS=y | 45 | CONFIG_EXT2_FS=y |
| 47 | CONFIG_EXT3_FS=y | 46 | CONFIG_EXT4_FS=y |
| 48 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 49 | CONFIG_PROC_KCORE=y | 47 | CONFIG_PROC_KCORE=y |
| 50 | CONFIG_TMPFS=y | 48 | CONFIG_TMPFS=y |
| 51 | CONFIG_NFS_FS=y | 49 | CONFIG_NFS_FS=y |
diff --git a/arch/powerpc/configs/85xx/mpc85xx_cds_defconfig b/arch/powerpc/configs/85xx/mpc85xx_cds_defconfig index ecb0c3bf8796..002bb48abaa3 100644 --- a/arch/powerpc/configs/85xx/mpc85xx_cds_defconfig +++ b/arch/powerpc/configs/85xx/mpc85xx_cds_defconfig | |||
| @@ -23,7 +23,6 @@ CONFIG_IP_PNP=y | |||
| 23 | CONFIG_IP_PNP_DHCP=y | 23 | CONFIG_IP_PNP_DHCP=y |
| 24 | CONFIG_IP_PNP_BOOTP=y | 24 | CONFIG_IP_PNP_BOOTP=y |
| 25 | CONFIG_SYN_COOKIES=y | 25 | CONFIG_SYN_COOKIES=y |
| 26 | # CONFIG_INET_LRO is not set | ||
| 27 | # CONFIG_IPV6 is not set | 26 | # CONFIG_IPV6 is not set |
| 28 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 27 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 29 | # CONFIG_FW_LOADER is not set | 28 | # CONFIG_FW_LOADER is not set |
| @@ -46,8 +45,7 @@ CONFIG_SERIAL_8250_CONSOLE=y | |||
| 46 | # CONFIG_HW_RANDOM is not set | 45 | # CONFIG_HW_RANDOM is not set |
| 47 | CONFIG_GEN_RTC=y | 46 | CONFIG_GEN_RTC=y |
| 48 | CONFIG_EXT2_FS=y | 47 | CONFIG_EXT2_FS=y |
| 49 | CONFIG_EXT3_FS=y | 48 | CONFIG_EXT4_FS=y |
| 50 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 51 | CONFIG_PROC_KCORE=y | 49 | CONFIG_PROC_KCORE=y |
| 52 | CONFIG_TMPFS=y | 50 | CONFIG_TMPFS=y |
| 53 | CONFIG_NFS_FS=y | 51 | CONFIG_NFS_FS=y |
diff --git a/arch/powerpc/configs/85xx/sbc8548_defconfig b/arch/powerpc/configs/85xx/sbc8548_defconfig index 72b7ccfbe2c2..97ae02377cf3 100644 --- a/arch/powerpc/configs/85xx/sbc8548_defconfig +++ b/arch/powerpc/configs/85xx/sbc8548_defconfig | |||
| @@ -20,7 +20,6 @@ CONFIG_IP_PNP=y | |||
| 20 | CONFIG_IP_PNP_DHCP=y | 20 | CONFIG_IP_PNP_DHCP=y |
| 21 | CONFIG_IP_PNP_BOOTP=y | 21 | CONFIG_IP_PNP_BOOTP=y |
| 22 | CONFIG_SYN_COOKIES=y | 22 | CONFIG_SYN_COOKIES=y |
| 23 | # CONFIG_INET_LRO is not set | ||
| 24 | # CONFIG_IPV6 is not set | 23 | # CONFIG_IPV6 is not set |
| 25 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 24 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 26 | # CONFIG_FW_LOADER is not set | 25 | # CONFIG_FW_LOADER is not set |
diff --git a/arch/powerpc/configs/85xx/socrates_defconfig b/arch/powerpc/configs/85xx/socrates_defconfig index 0ad7bd5ee6b6..13579cb30539 100644 --- a/arch/powerpc/configs/85xx/socrates_defconfig +++ b/arch/powerpc/configs/85xx/socrates_defconfig | |||
| @@ -22,7 +22,6 @@ CONFIG_IP_PNP=y | |||
| 22 | CONFIG_IP_PNP_DHCP=y | 22 | CONFIG_IP_PNP_DHCP=y |
| 23 | CONFIG_IP_PNP_BOOTP=y | 23 | CONFIG_IP_PNP_BOOTP=y |
| 24 | CONFIG_SYN_COOKIES=y | 24 | CONFIG_SYN_COOKIES=y |
| 25 | # CONFIG_INET_LRO is not set | ||
| 26 | # CONFIG_IPV6 is not set | 25 | # CONFIG_IPV6 is not set |
| 27 | CONFIG_CAN=y | 26 | CONFIG_CAN=y |
| 28 | CONFIG_MTD=y | 27 | CONFIG_MTD=y |
| @@ -79,8 +78,7 @@ CONFIG_USB_OHCI_HCD_PPC_OF_BE=y | |||
| 79 | CONFIG_USB_STORAGE=y | 78 | CONFIG_USB_STORAGE=y |
| 80 | CONFIG_RTC_CLASS=y | 79 | CONFIG_RTC_CLASS=y |
| 81 | CONFIG_EXT2_FS=y | 80 | CONFIG_EXT2_FS=y |
| 82 | CONFIG_EXT3_FS=y | 81 | CONFIG_EXT4_FS=y |
| 83 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 84 | CONFIG_PROC_KCORE=y | 82 | CONFIG_PROC_KCORE=y |
| 85 | CONFIG_TMPFS=y | 83 | CONFIG_TMPFS=y |
| 86 | CONFIG_JFFS2_FS=y | 84 | CONFIG_JFFS2_FS=y |
diff --git a/arch/powerpc/configs/85xx/stx_gp3_defconfig b/arch/powerpc/configs/85xx/stx_gp3_defconfig index b45190556c0c..384926f3ce1d 100644 --- a/arch/powerpc/configs/85xx/stx_gp3_defconfig +++ b/arch/powerpc/configs/85xx/stx_gp3_defconfig | |||
| @@ -17,7 +17,6 @@ CONFIG_UNIX=y | |||
| 17 | CONFIG_INET=y | 17 | CONFIG_INET=y |
| 18 | CONFIG_IP_PNP=y | 18 | CONFIG_IP_PNP=y |
| 19 | CONFIG_IP_PNP_BOOTP=y | 19 | CONFIG_IP_PNP_BOOTP=y |
| 20 | # CONFIG_INET_LRO is not set | ||
| 21 | # CONFIG_IPV6 is not set | 20 | # CONFIG_IPV6 is not set |
| 22 | CONFIG_NETFILTER=y | 21 | CONFIG_NETFILTER=y |
| 23 | CONFIG_IP_NF_IPTABLES=m | 22 | CONFIG_IP_NF_IPTABLES=m |
| @@ -53,8 +52,7 @@ CONFIG_AGP=m | |||
| 53 | CONFIG_DRM=m | 52 | CONFIG_DRM=m |
| 54 | CONFIG_SOUND=m | 53 | CONFIG_SOUND=m |
| 55 | CONFIG_EXT2_FS=y | 54 | CONFIG_EXT2_FS=y |
| 56 | CONFIG_EXT3_FS=y | 55 | CONFIG_EXT4_FS=y |
| 57 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 58 | CONFIG_AUTOFS4_FS=y | 56 | CONFIG_AUTOFS4_FS=y |
| 59 | CONFIG_ISO9660_FS=m | 57 | CONFIG_ISO9660_FS=m |
| 60 | CONFIG_UDF_FS=m | 58 | CONFIG_UDF_FS=m |
diff --git a/arch/powerpc/configs/85xx/tqm8540_defconfig b/arch/powerpc/configs/85xx/tqm8540_defconfig index 4daaf2943b44..908f3885f4a5 100644 --- a/arch/powerpc/configs/85xx/tqm8540_defconfig +++ b/arch/powerpc/configs/85xx/tqm8540_defconfig | |||
| @@ -20,7 +20,6 @@ CONFIG_IP_PNP=y | |||
| 20 | CONFIG_IP_PNP_DHCP=y | 20 | CONFIG_IP_PNP_DHCP=y |
| 21 | CONFIG_IP_PNP_BOOTP=y | 21 | CONFIG_IP_PNP_BOOTP=y |
| 22 | CONFIG_SYN_COOKIES=y | 22 | CONFIG_SYN_COOKIES=y |
| 23 | # CONFIG_INET_LRO is not set | ||
| 24 | # CONFIG_IPV6 is not set | 23 | # CONFIG_IPV6 is not set |
| 25 | CONFIG_MTD=y | 24 | CONFIG_MTD=y |
| 26 | CONFIG_MTD_CMDLINE_PARTS=y | 25 | CONFIG_MTD_CMDLINE_PARTS=y |
| @@ -50,8 +49,7 @@ CONFIG_I2C_MPC=y | |||
| 50 | CONFIG_HWMON_DEBUG_CHIP=y | 49 | CONFIG_HWMON_DEBUG_CHIP=y |
| 51 | CONFIG_SENSORS_LM75=y | 50 | CONFIG_SENSORS_LM75=y |
| 52 | CONFIG_EXT2_FS=y | 51 | CONFIG_EXT2_FS=y |
| 53 | CONFIG_EXT3_FS=y | 52 | CONFIG_EXT4_FS=y |
| 54 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 55 | CONFIG_PROC_KCORE=y | 53 | CONFIG_PROC_KCORE=y |
| 56 | CONFIG_TMPFS=y | 54 | CONFIG_TMPFS=y |
| 57 | CONFIG_JFFS2_FS=y | 55 | CONFIG_JFFS2_FS=y |
diff --git a/arch/powerpc/configs/85xx/tqm8541_defconfig b/arch/powerpc/configs/85xx/tqm8541_defconfig index bb402b3cf786..f47e57610b7c 100644 --- a/arch/powerpc/configs/85xx/tqm8541_defconfig +++ b/arch/powerpc/configs/85xx/tqm8541_defconfig | |||
| @@ -20,7 +20,6 @@ CONFIG_IP_PNP=y | |||
| 20 | CONFIG_IP_PNP_DHCP=y | 20 | CONFIG_IP_PNP_DHCP=y |
| 21 | CONFIG_IP_PNP_BOOTP=y | 21 | CONFIG_IP_PNP_BOOTP=y |
| 22 | CONFIG_SYN_COOKIES=y | 22 | CONFIG_SYN_COOKIES=y |
| 23 | # CONFIG_INET_LRO is not set | ||
| 24 | # CONFIG_IPV6 is not set | 23 | # CONFIG_IPV6 is not set |
| 25 | CONFIG_MTD=y | 24 | CONFIG_MTD=y |
| 26 | CONFIG_MTD_CMDLINE_PARTS=y | 25 | CONFIG_MTD_CMDLINE_PARTS=y |
| @@ -52,8 +51,7 @@ CONFIG_I2C_MPC=y | |||
| 52 | CONFIG_HWMON_DEBUG_CHIP=y | 51 | CONFIG_HWMON_DEBUG_CHIP=y |
| 53 | CONFIG_SENSORS_LM75=y | 52 | CONFIG_SENSORS_LM75=y |
| 54 | CONFIG_EXT2_FS=y | 53 | CONFIG_EXT2_FS=y |
| 55 | CONFIG_EXT3_FS=y | 54 | CONFIG_EXT4_FS=y |
| 56 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 57 | CONFIG_PROC_KCORE=y | 55 | CONFIG_PROC_KCORE=y |
| 58 | CONFIG_TMPFS=y | 56 | CONFIG_TMPFS=y |
| 59 | CONFIG_JFFS2_FS=y | 57 | CONFIG_JFFS2_FS=y |
diff --git a/arch/powerpc/configs/85xx/tqm8548_defconfig b/arch/powerpc/configs/85xx/tqm8548_defconfig index 685d0fb132d6..42f5d0a7698e 100644 --- a/arch/powerpc/configs/85xx/tqm8548_defconfig +++ b/arch/powerpc/configs/85xx/tqm8548_defconfig | |||
| @@ -28,7 +28,6 @@ CONFIG_IP_PNP=y | |||
| 28 | CONFIG_IP_PNP_DHCP=y | 28 | CONFIG_IP_PNP_DHCP=y |
| 29 | CONFIG_IP_PNP_BOOTP=y | 29 | CONFIG_IP_PNP_BOOTP=y |
| 30 | CONFIG_SYN_COOKIES=y | 30 | CONFIG_SYN_COOKIES=y |
| 31 | # CONFIG_INET_LRO is not set | ||
| 32 | # CONFIG_IPV6 is not set | 31 | # CONFIG_IPV6 is not set |
| 33 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 32 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 34 | # CONFIG_FW_LOADER is not set | 33 | # CONFIG_FW_LOADER is not set |
diff --git a/arch/powerpc/configs/85xx/tqm8555_defconfig b/arch/powerpc/configs/85xx/tqm8555_defconfig index 02a931d4e954..71552b7929cd 100644 --- a/arch/powerpc/configs/85xx/tqm8555_defconfig +++ b/arch/powerpc/configs/85xx/tqm8555_defconfig | |||
| @@ -20,7 +20,6 @@ CONFIG_IP_PNP=y | |||
| 20 | CONFIG_IP_PNP_DHCP=y | 20 | CONFIG_IP_PNP_DHCP=y |
| 21 | CONFIG_IP_PNP_BOOTP=y | 21 | CONFIG_IP_PNP_BOOTP=y |
| 22 | CONFIG_SYN_COOKIES=y | 22 | CONFIG_SYN_COOKIES=y |
| 23 | # CONFIG_INET_LRO is not set | ||
| 24 | # CONFIG_IPV6 is not set | 23 | # CONFIG_IPV6 is not set |
| 25 | CONFIG_MTD=y | 24 | CONFIG_MTD=y |
| 26 | CONFIG_MTD_CMDLINE_PARTS=y | 25 | CONFIG_MTD_CMDLINE_PARTS=y |
| @@ -52,8 +51,7 @@ CONFIG_I2C_MPC=y | |||
| 52 | CONFIG_HWMON_DEBUG_CHIP=y | 51 | CONFIG_HWMON_DEBUG_CHIP=y |
| 53 | CONFIG_SENSORS_LM75=y | 52 | CONFIG_SENSORS_LM75=y |
| 54 | CONFIG_EXT2_FS=y | 53 | CONFIG_EXT2_FS=y |
| 55 | CONFIG_EXT3_FS=y | 54 | CONFIG_EXT4_FS=y |
| 56 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 57 | CONFIG_PROC_KCORE=y | 55 | CONFIG_PROC_KCORE=y |
| 58 | CONFIG_TMPFS=y | 56 | CONFIG_TMPFS=y |
| 59 | CONFIG_JFFS2_FS=y | 57 | CONFIG_JFFS2_FS=y |
diff --git a/arch/powerpc/configs/85xx/tqm8560_defconfig b/arch/powerpc/configs/85xx/tqm8560_defconfig index 633d5b759a36..25aac973d6d7 100644 --- a/arch/powerpc/configs/85xx/tqm8560_defconfig +++ b/arch/powerpc/configs/85xx/tqm8560_defconfig | |||
| @@ -20,7 +20,6 @@ CONFIG_IP_PNP=y | |||
| 20 | CONFIG_IP_PNP_DHCP=y | 20 | CONFIG_IP_PNP_DHCP=y |
| 21 | CONFIG_IP_PNP_BOOTP=y | 21 | CONFIG_IP_PNP_BOOTP=y |
| 22 | CONFIG_SYN_COOKIES=y | 22 | CONFIG_SYN_COOKIES=y |
| 23 | # CONFIG_INET_LRO is not set | ||
| 24 | # CONFIG_IPV6 is not set | 23 | # CONFIG_IPV6 is not set |
| 25 | CONFIG_MTD=y | 24 | CONFIG_MTD=y |
| 26 | CONFIG_MTD_CMDLINE_PARTS=y | 25 | CONFIG_MTD_CMDLINE_PARTS=y |
| @@ -52,8 +51,7 @@ CONFIG_I2C_MPC=y | |||
| 52 | CONFIG_HWMON_DEBUG_CHIP=y | 51 | CONFIG_HWMON_DEBUG_CHIP=y |
| 53 | CONFIG_SENSORS_LM75=y | 52 | CONFIG_SENSORS_LM75=y |
| 54 | CONFIG_EXT2_FS=y | 53 | CONFIG_EXT2_FS=y |
| 55 | CONFIG_EXT3_FS=y | 54 | CONFIG_EXT4_FS=y |
| 56 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 57 | CONFIG_PROC_KCORE=y | 55 | CONFIG_PROC_KCORE=y |
| 58 | CONFIG_TMPFS=y | 56 | CONFIG_TMPFS=y |
| 59 | CONFIG_JFFS2_FS=y | 57 | CONFIG_JFFS2_FS=y |
diff --git a/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig b/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig index 858b539d004b..dbd961de251e 100644 --- a/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig +++ b/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig | |||
| @@ -54,7 +54,6 @@ CONFIG_IP_PIMSM_V2=y | |||
| 54 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 54 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 55 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 55 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 56 | # CONFIG_INET_XFRM_MODE_BEET is not set | 56 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 57 | # CONFIG_INET_LRO is not set | ||
| 58 | CONFIG_IPV6=y | 57 | CONFIG_IPV6=y |
| 59 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 58 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 60 | CONFIG_MTD=y | 59 | CONFIG_MTD=y |
| @@ -124,8 +123,7 @@ CONFIG_RTC_DRV_CMOS=y | |||
| 124 | CONFIG_DMADEVICES=y | 123 | CONFIG_DMADEVICES=y |
| 125 | CONFIG_FSL_DMA=y | 124 | CONFIG_FSL_DMA=y |
| 126 | CONFIG_EXT2_FS=y | 125 | CONFIG_EXT2_FS=y |
| 127 | CONFIG_EXT3_FS=y | 126 | CONFIG_EXT4_FS=y |
| 128 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 129 | CONFIG_ISO9660_FS=y | 127 | CONFIG_ISO9660_FS=y |
| 130 | CONFIG_JOLIET=y | 128 | CONFIG_JOLIET=y |
| 131 | CONFIG_ZISOFS=y | 129 | CONFIG_ZISOFS=y |
diff --git a/arch/powerpc/configs/86xx-hw.config b/arch/powerpc/configs/86xx-hw.config index f91f8895fc93..d3dd6b8865c0 100644 --- a/arch/powerpc/configs/86xx-hw.config +++ b/arch/powerpc/configs/86xx-hw.config | |||
| @@ -74,9 +74,9 @@ CONFIG_SERIAL_8250_CONSOLE=y | |||
| 74 | CONFIG_SERIAL_8250_DETECT_IRQ=y | 74 | CONFIG_SERIAL_8250_DETECT_IRQ=y |
| 75 | CONFIG_SERIAL_8250_EXTENDED=y | 75 | CONFIG_SERIAL_8250_EXTENDED=y |
| 76 | CONFIG_SERIAL_8250_MANY_PORTS=y | 76 | CONFIG_SERIAL_8250_MANY_PORTS=y |
| 77 | CONFIG_SERIAL_8250_NR_UARTS=2 | 77 | CONFIG_SERIAL_8250_NR_UARTS=5 |
| 78 | CONFIG_SERIAL_8250_RSA=y | 78 | CONFIG_SERIAL_8250_RSA=y |
| 79 | CONFIG_SERIAL_8250_RUNTIME_UARTS=2 | 79 | CONFIG_SERIAL_8250_RUNTIME_UARTS=5 |
| 80 | CONFIG_SERIAL_8250_SHARE_IRQ=y | 80 | CONFIG_SERIAL_8250_SHARE_IRQ=y |
| 81 | CONFIG_SERIAL_8250=y | 81 | CONFIG_SERIAL_8250=y |
| 82 | CONFIG_SERIO_LIBPS2=y | 82 | CONFIG_SERIO_LIBPS2=y |
diff --git a/arch/powerpc/configs/adder875_defconfig b/arch/powerpc/configs/adder875_defconfig index d89ff40d39b7..6a3f825452e9 100644 --- a/arch/powerpc/configs/adder875_defconfig +++ b/arch/powerpc/configs/adder875_defconfig | |||
| @@ -24,7 +24,6 @@ CONFIG_SYN_COOKIES=y | |||
| 24 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 24 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 25 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 25 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 26 | # CONFIG_INET_XFRM_MODE_BEET is not set | 26 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 27 | # CONFIG_INET_LRO is not set | ||
| 28 | # CONFIG_IPV6 is not set | 27 | # CONFIG_IPV6 is not set |
| 29 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 28 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 30 | # CONFIG_FW_LOADER is not set | 29 | # CONFIG_FW_LOADER is not set |
diff --git a/arch/powerpc/configs/amigaone_defconfig b/arch/powerpc/configs/amigaone_defconfig index 84f1b4140579..8b83ce8a01e7 100644 --- a/arch/powerpc/configs/amigaone_defconfig +++ b/arch/powerpc/configs/amigaone_defconfig | |||
| @@ -29,7 +29,6 @@ CONFIG_SYN_COOKIES=y | |||
| 29 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 29 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 30 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 30 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 31 | # CONFIG_INET_XFRM_MODE_BEET is not set | 31 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 32 | # CONFIG_INET_LRO is not set | ||
| 33 | # CONFIG_IPV6 is not set | 32 | # CONFIG_IPV6 is not set |
| 34 | CONFIG_NETFILTER=y | 33 | CONFIG_NETFILTER=y |
| 35 | # CONFIG_NETFILTER_ADVANCED is not set | 34 | # CONFIG_NETFILTER_ADVANCED is not set |
| @@ -106,7 +105,6 @@ CONFIG_USB_STORAGE=m | |||
| 106 | CONFIG_RTC_CLASS=y | 105 | CONFIG_RTC_CLASS=y |
| 107 | CONFIG_RTC_DRV_CMOS=y | 106 | CONFIG_RTC_DRV_CMOS=y |
| 108 | CONFIG_EXT2_FS=y | 107 | CONFIG_EXT2_FS=y |
| 109 | CONFIG_EXT3_FS=y | ||
| 110 | CONFIG_EXT4_FS=y | 108 | CONFIG_EXT4_FS=y |
| 111 | CONFIG_ISO9660_FS=y | 109 | CONFIG_ISO9660_FS=y |
| 112 | CONFIG_MSDOS_FS=m | 110 | CONFIG_MSDOS_FS=m |
diff --git a/arch/powerpc/configs/c2k_defconfig b/arch/powerpc/configs/c2k_defconfig index 340685caa7b8..7c9d95370150 100644 --- a/arch/powerpc/configs/c2k_defconfig +++ b/arch/powerpc/configs/c2k_defconfig | |||
| @@ -306,15 +306,13 @@ CONFIG_INFINIBAND=m | |||
| 306 | CONFIG_INFINIBAND_USER_MAD=m | 306 | CONFIG_INFINIBAND_USER_MAD=m |
| 307 | CONFIG_INFINIBAND_USER_ACCESS=m | 307 | CONFIG_INFINIBAND_USER_ACCESS=m |
| 308 | CONFIG_INFINIBAND_MTHCA=m | 308 | CONFIG_INFINIBAND_MTHCA=m |
| 309 | CONFIG_INFINIBAND_AMSO1100=m | ||
| 310 | CONFIG_INFINIBAND_IPOIB=m | 309 | CONFIG_INFINIBAND_IPOIB=m |
| 311 | CONFIG_INFINIBAND_IPOIB_CM=y | 310 | CONFIG_INFINIBAND_IPOIB_CM=y |
| 312 | CONFIG_INFINIBAND_SRP=m | 311 | CONFIG_INFINIBAND_SRP=m |
| 313 | CONFIG_DMADEVICES=y | 312 | CONFIG_DMADEVICES=y |
| 314 | CONFIG_EXT3_FS=m | 313 | CONFIG_EXT4_FS=m |
| 315 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | 314 | CONFIG_EXT4_FS_POSIX_ACL=y |
| 316 | CONFIG_EXT3_FS_POSIX_ACL=y | 315 | CONFIG_EXT4_FS_SECURITY=y |
| 317 | CONFIG_EXT3_FS_SECURITY=y | ||
| 318 | CONFIG_QUOTA=y | 316 | CONFIG_QUOTA=y |
| 319 | CONFIG_QFMT_V2=y | 317 | CONFIG_QFMT_V2=y |
| 320 | CONFIG_AUTOFS4_FS=m | 318 | CONFIG_AUTOFS4_FS=m |
diff --git a/arch/powerpc/configs/cell_defconfig b/arch/powerpc/configs/cell_defconfig index db328e618bb9..7b6f30dece34 100644 --- a/arch/powerpc/configs/cell_defconfig +++ b/arch/powerpc/configs/cell_defconfig | |||
| @@ -184,7 +184,7 @@ CONFIG_EDAC_MM_EDAC=y | |||
| 184 | CONFIG_EDAC_CELL=y | 184 | CONFIG_EDAC_CELL=y |
| 185 | CONFIG_UIO=m | 185 | CONFIG_UIO=m |
| 186 | CONFIG_EXT2_FS=y | 186 | CONFIG_EXT2_FS=y |
| 187 | CONFIG_EXT3_FS=y | 187 | CONFIG_EXT4_FS=y |
| 188 | CONFIG_AUTOFS4_FS=m | 188 | CONFIG_AUTOFS4_FS=m |
| 189 | CONFIG_ISO9660_FS=m | 189 | CONFIG_ISO9660_FS=m |
| 190 | CONFIG_JOLIET=y | 190 | CONFIG_JOLIET=y |
diff --git a/arch/powerpc/configs/chrp32_defconfig b/arch/powerpc/configs/chrp32_defconfig index 253a9f200097..ac9a50da2dc6 100644 --- a/arch/powerpc/configs/chrp32_defconfig +++ b/arch/powerpc/configs/chrp32_defconfig | |||
| @@ -110,7 +110,6 @@ CONFIG_USB_OHCI_HCD=y | |||
| 110 | CONFIG_USB_UHCI_HCD=y | 110 | CONFIG_USB_UHCI_HCD=y |
| 111 | CONFIG_USB_STORAGE=m | 111 | CONFIG_USB_STORAGE=m |
| 112 | CONFIG_EXT2_FS=y | 112 | CONFIG_EXT2_FS=y |
| 113 | CONFIG_EXT3_FS=y | ||
| 114 | CONFIG_EXT4_FS=y | 113 | CONFIG_EXT4_FS=y |
| 115 | CONFIG_ISO9660_FS=y | 114 | CONFIG_ISO9660_FS=y |
| 116 | CONFIG_MSDOS_FS=m | 115 | CONFIG_MSDOS_FS=m |
diff --git a/arch/powerpc/configs/ep8248e_defconfig b/arch/powerpc/configs/ep8248e_defconfig index 7c137041f1d6..3403b85f9d81 100644 --- a/arch/powerpc/configs/ep8248e_defconfig +++ b/arch/powerpc/configs/ep8248e_defconfig | |||
| @@ -23,7 +23,6 @@ CONFIG_IP_PNP=y | |||
| 23 | CONFIG_IP_PNP_DHCP=y | 23 | CONFIG_IP_PNP_DHCP=y |
| 24 | CONFIG_IP_PNP_BOOTP=y | 24 | CONFIG_IP_PNP_BOOTP=y |
| 25 | CONFIG_SYN_COOKIES=y | 25 | CONFIG_SYN_COOKIES=y |
| 26 | # CONFIG_INET_LRO is not set | ||
| 27 | CONFIG_NETFILTER=y | 26 | CONFIG_NETFILTER=y |
| 28 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 27 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 29 | # CONFIG_FW_LOADER is not set | 28 | # CONFIG_FW_LOADER is not set |
| @@ -50,9 +49,7 @@ CONFIG_SERIAL_CPM_CONSOLE=y | |||
| 50 | # CONFIG_HWMON is not set | 49 | # CONFIG_HWMON is not set |
| 51 | # CONFIG_USB_SUPPORT is not set | 50 | # CONFIG_USB_SUPPORT is not set |
| 52 | CONFIG_EXT2_FS=y | 51 | CONFIG_EXT2_FS=y |
| 53 | CONFIG_EXT3_FS=y | 52 | CONFIG_EXT4_FS=y |
| 54 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 55 | # CONFIG_EXT3_FS_XATTR is not set | ||
| 56 | CONFIG_AUTOFS4_FS=y | 53 | CONFIG_AUTOFS4_FS=y |
| 57 | CONFIG_PROC_KCORE=y | 54 | CONFIG_PROC_KCORE=y |
| 58 | CONFIG_TMPFS=y | 55 | CONFIG_TMPFS=y |
diff --git a/arch/powerpc/configs/ep88xc_defconfig b/arch/powerpc/configs/ep88xc_defconfig index ee96be889dac..95411aeeeb8d 100644 --- a/arch/powerpc/configs/ep88xc_defconfig +++ b/arch/powerpc/configs/ep88xc_defconfig | |||
| @@ -26,7 +26,6 @@ CONFIG_SYN_COOKIES=y | |||
| 26 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 26 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 27 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 27 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 28 | # CONFIG_INET_XFRM_MODE_BEET is not set | 28 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 29 | # CONFIG_INET_LRO is not set | ||
| 30 | # CONFIG_IPV6 is not set | 29 | # CONFIG_IPV6 is not set |
| 31 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 30 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 32 | # CONFIG_FW_LOADER is not set | 31 | # CONFIG_FW_LOADER is not set |
diff --git a/arch/powerpc/configs/fsl-emb-nonhw.config b/arch/powerpc/configs/fsl-emb-nonhw.config index 41e4d359524d..1a61e81ab0cd 100644 --- a/arch/powerpc/configs/fsl-emb-nonhw.config +++ b/arch/powerpc/configs/fsl-emb-nonhw.config | |||
| @@ -33,8 +33,7 @@ CONFIG_DUMMY=y | |||
| 33 | CONFIG_EFS_FS=m | 33 | CONFIG_EFS_FS=m |
| 34 | CONFIG_EXPERT=y | 34 | CONFIG_EXPERT=y |
| 35 | CONFIG_EXT2_FS=y | 35 | CONFIG_EXT2_FS=y |
| 36 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | 36 | CONFIG_EXT4_FS=y |
| 37 | CONFIG_EXT3_FS=y | ||
| 38 | CONFIG_FB=y | 37 | CONFIG_FB=y |
| 39 | CONFIG_FHANDLE=y | 38 | CONFIG_FHANDLE=y |
| 40 | CONFIG_FIXED_PHY=y | 39 | CONFIG_FIXED_PHY=y |
| @@ -55,7 +54,6 @@ CONFIG_IKCONFIG=y | |||
| 55 | CONFIG_INET_AH=y | 54 | CONFIG_INET_AH=y |
| 56 | CONFIG_INET_ESP=y | 55 | CONFIG_INET_ESP=y |
| 57 | CONFIG_INET_IPCOMP=y | 56 | CONFIG_INET_IPCOMP=y |
| 58 | # CONFIG_INET_LRO is not set | ||
| 59 | # CONFIG_INET_XFRM_MODE_BEET is not set | 57 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 60 | CONFIG_INET=y | 58 | CONFIG_INET=y |
| 61 | CONFIG_IP_ADVANCED_ROUTER=y | 59 | CONFIG_IP_ADVANCED_ROUTER=y |
diff --git a/arch/powerpc/configs/g5_defconfig b/arch/powerpc/configs/g5_defconfig index 1d9ad8500909..3b2511c090d8 100644 --- a/arch/powerpc/configs/g5_defconfig +++ b/arch/powerpc/configs/g5_defconfig | |||
| @@ -216,14 +216,13 @@ CONFIG_USB_SERIAL_CYBERJACK=m | |||
| 216 | CONFIG_USB_SERIAL_XIRCOM=m | 216 | CONFIG_USB_SERIAL_XIRCOM=m |
| 217 | CONFIG_USB_SERIAL_OMNINET=m | 217 | CONFIG_USB_SERIAL_OMNINET=m |
| 218 | CONFIG_USB_APPLEDISPLAY=m | 218 | CONFIG_USB_APPLEDISPLAY=m |
| 219 | CONFIG_FS_DAX=y | ||
| 219 | CONFIG_EXT2_FS=y | 220 | CONFIG_EXT2_FS=y |
| 220 | CONFIG_EXT2_FS_XATTR=y | 221 | CONFIG_EXT2_FS_XATTR=y |
| 221 | CONFIG_EXT2_FS_POSIX_ACL=y | 222 | CONFIG_EXT2_FS_POSIX_ACL=y |
| 222 | CONFIG_EXT2_FS_SECURITY=y | 223 | CONFIG_EXT2_FS_SECURITY=y |
| 223 | CONFIG_EXT2_FS_XIP=y | 224 | CONFIG_EXT4_FS_POSIX_ACL=y |
| 224 | CONFIG_EXT3_FS=y | 225 | CONFIG_EXT4_FS_SECURITY=y |
| 225 | CONFIG_EXT3_FS_POSIX_ACL=y | ||
| 226 | CONFIG_EXT3_FS_SECURITY=y | ||
| 227 | CONFIG_EXT4_FS=y | 226 | CONFIG_EXT4_FS=y |
| 228 | CONFIG_REISERFS_FS=y | 227 | CONFIG_REISERFS_FS=y |
| 229 | CONFIG_REISERFS_FS_XATTR=y | 228 | CONFIG_REISERFS_FS_XATTR=y |
diff --git a/arch/powerpc/configs/gamecube_defconfig b/arch/powerpc/configs/gamecube_defconfig index 6c6c60f1aba4..c0eec4a5df4e 100644 --- a/arch/powerpc/configs/gamecube_defconfig +++ b/arch/powerpc/configs/gamecube_defconfig | |||
| @@ -32,7 +32,6 @@ CONFIG_IP_PNP_RARP=y | |||
| 32 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 32 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 33 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 33 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 34 | # CONFIG_INET_XFRM_MODE_BEET is not set | 34 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 35 | # CONFIG_INET_LRO is not set | ||
| 36 | # CONFIG_INET_DIAG is not set | 35 | # CONFIG_INET_DIAG is not set |
| 37 | # CONFIG_IPV6 is not set | 36 | # CONFIG_IPV6 is not set |
| 38 | # CONFIG_WIRELESS is not set | 37 | # CONFIG_WIRELESS is not set |
| @@ -76,9 +75,7 @@ CONFIG_SND_SEQUENCER_OSS=y | |||
| 76 | CONFIG_RTC_CLASS=y | 75 | CONFIG_RTC_CLASS=y |
| 77 | CONFIG_RTC_DRV_GENERIC=y | 76 | CONFIG_RTC_DRV_GENERIC=y |
| 78 | CONFIG_EXT2_FS=y | 77 | CONFIG_EXT2_FS=y |
| 79 | CONFIG_EXT3_FS=y | 78 | CONFIG_EXT4_FS=y |
| 80 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 81 | # CONFIG_EXT3_FS_XATTR is not set | ||
| 82 | CONFIG_ISO9660_FS=y | 79 | CONFIG_ISO9660_FS=y |
| 83 | CONFIG_JOLIET=y | 80 | CONFIG_JOLIET=y |
| 84 | CONFIG_MSDOS_FS=y | 81 | CONFIG_MSDOS_FS=y |
diff --git a/arch/powerpc/configs/holly_defconfig b/arch/powerpc/configs/holly_defconfig index 5e0f2551e5c7..e56e80090529 100644 --- a/arch/powerpc/configs/holly_defconfig +++ b/arch/powerpc/configs/holly_defconfig | |||
| @@ -25,7 +25,6 @@ CONFIG_IP_PNP=y | |||
| 25 | CONFIG_IP_PNP_DHCP=y | 25 | CONFIG_IP_PNP_DHCP=y |
| 26 | CONFIG_IP_PNP_BOOTP=y | 26 | CONFIG_IP_PNP_BOOTP=y |
| 27 | CONFIG_SYN_COOKIES=y | 27 | CONFIG_SYN_COOKIES=y |
| 28 | # CONFIG_INET_LRO is not set | ||
| 29 | # CONFIG_IPV6 is not set | 28 | # CONFIG_IPV6 is not set |
| 30 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 29 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 31 | # CONFIG_FW_LOADER is not set | 30 | # CONFIG_FW_LOADER is not set |
| @@ -52,7 +51,7 @@ CONFIG_SERIAL_OF_PLATFORM=y | |||
| 52 | # CONFIG_HW_RANDOM is not set | 51 | # CONFIG_HW_RANDOM is not set |
| 53 | CONFIG_GEN_RTC=y | 52 | CONFIG_GEN_RTC=y |
| 54 | CONFIG_EXT2_FS=y | 53 | CONFIG_EXT2_FS=y |
| 55 | CONFIG_EXT3_FS=y | 54 | CONFIG_EXT4_FS=y |
| 56 | CONFIG_PROC_KCORE=y | 55 | CONFIG_PROC_KCORE=y |
| 57 | CONFIG_TMPFS=y | 56 | CONFIG_TMPFS=y |
| 58 | CONFIG_NFS_FS=y | 57 | CONFIG_NFS_FS=y |
diff --git a/arch/powerpc/configs/linkstation_defconfig b/arch/powerpc/configs/linkstation_defconfig index 62ae92956d05..b413c19d7031 100644 --- a/arch/powerpc/configs/linkstation_defconfig +++ b/arch/powerpc/configs/linkstation_defconfig | |||
| @@ -23,7 +23,6 @@ CONFIG_IP_MULTICAST=y | |||
| 23 | CONFIG_IP_PNP=y | 23 | CONFIG_IP_PNP=y |
| 24 | CONFIG_IP_PNP_DHCP=y | 24 | CONFIG_IP_PNP_DHCP=y |
| 25 | CONFIG_IP_PNP_BOOTP=y | 25 | CONFIG_IP_PNP_BOOTP=y |
| 26 | # CONFIG_INET_LRO is not set | ||
| 27 | # CONFIG_IPV6 is not set | 26 | # CONFIG_IPV6 is not set |
| 28 | CONFIG_NETFILTER=y | 27 | CONFIG_NETFILTER=y |
| 29 | CONFIG_NF_CONNTRACK=m | 28 | CONFIG_NF_CONNTRACK=m |
| @@ -109,8 +108,7 @@ CONFIG_USB_SERIAL_FTDI_SIO=y | |||
| 109 | CONFIG_RTC_CLASS=y | 108 | CONFIG_RTC_CLASS=y |
| 110 | CONFIG_RTC_DRV_RS5C372=y | 109 | CONFIG_RTC_DRV_RS5C372=y |
| 111 | CONFIG_EXT2_FS=y | 110 | CONFIG_EXT2_FS=y |
| 112 | CONFIG_EXT3_FS=y | 111 | CONFIG_EXT4_FS=y |
| 113 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 114 | CONFIG_XFS_FS=m | 112 | CONFIG_XFS_FS=m |
| 115 | CONFIG_ISO9660_FS=m | 113 | CONFIG_ISO9660_FS=m |
| 116 | CONFIG_JOLIET=y | 114 | CONFIG_JOLIET=y |
diff --git a/arch/powerpc/configs/maple_defconfig b/arch/powerpc/configs/maple_defconfig index ac9666f8abf1..27abfab31219 100644 --- a/arch/powerpc/configs/maple_defconfig +++ b/arch/powerpc/configs/maple_defconfig | |||
| @@ -35,7 +35,6 @@ CONFIG_INET=y | |||
| 35 | CONFIG_IP_MULTICAST=y | 35 | CONFIG_IP_MULTICAST=y |
| 36 | CONFIG_IP_PNP=y | 36 | CONFIG_IP_PNP=y |
| 37 | CONFIG_IP_PNP_DHCP=y | 37 | CONFIG_IP_PNP_DHCP=y |
| 38 | # CONFIG_INET_LRO is not set | ||
| 39 | # CONFIG_IPV6 is not set | 38 | # CONFIG_IPV6 is not set |
| 40 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 39 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 41 | CONFIG_BLK_DEV_RAM=y | 40 | CONFIG_BLK_DEV_RAM=y |
| @@ -102,9 +101,7 @@ CONFIG_USB_SERIAL_KEYSPAN_USA49W=y | |||
| 102 | CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y | 101 | CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y |
| 103 | CONFIG_USB_SERIAL_TI=m | 102 | CONFIG_USB_SERIAL_TI=m |
| 104 | CONFIG_EXT2_FS=y | 103 | CONFIG_EXT2_FS=y |
| 105 | CONFIG_EXT2_FS_XIP=y | 104 | CONFIG_FS_DAX=y |
| 106 | CONFIG_EXT3_FS=y | ||
| 107 | # CONFIG_EXT3_FS_XATTR is not set | ||
| 108 | CONFIG_EXT4_FS=y | 105 | CONFIG_EXT4_FS=y |
| 109 | CONFIG_MSDOS_FS=y | 106 | CONFIG_MSDOS_FS=y |
| 110 | CONFIG_VFAT_FS=y | 107 | CONFIG_VFAT_FS=y |
diff --git a/arch/powerpc/configs/mgcoge_defconfig b/arch/powerpc/configs/mgcoge_defconfig index 666922c5b572..197acaa026eb 100644 --- a/arch/powerpc/configs/mgcoge_defconfig +++ b/arch/powerpc/configs/mgcoge_defconfig | |||
| @@ -27,7 +27,6 @@ CONFIG_IP_PNP=y | |||
| 27 | CONFIG_IP_PNP_DHCP=y | 27 | CONFIG_IP_PNP_DHCP=y |
| 28 | CONFIG_IP_PNP_BOOTP=y | 28 | CONFIG_IP_PNP_BOOTP=y |
| 29 | CONFIG_SYN_COOKIES=y | 29 | CONFIG_SYN_COOKIES=y |
| 30 | # CONFIG_INET_LRO is not set | ||
| 31 | # CONFIG_IPV6 is not set | 30 | # CONFIG_IPV6 is not set |
| 32 | CONFIG_NETFILTER=y | 31 | CONFIG_NETFILTER=y |
| 33 | CONFIG_TIPC=y | 32 | CONFIG_TIPC=y |
diff --git a/arch/powerpc/configs/mpc512x_defconfig b/arch/powerpc/configs/mpc512x_defconfig index d16d6c5cb282..0b4854cf26cb 100644 --- a/arch/powerpc/configs/mpc512x_defconfig +++ b/arch/powerpc/configs/mpc512x_defconfig | |||
| @@ -27,7 +27,6 @@ CONFIG_IP_PNP=y | |||
| 27 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 27 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 28 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 28 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 29 | # CONFIG_INET_XFRM_MODE_BEET is not set | 29 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 30 | # CONFIG_INET_LRO is not set | ||
| 31 | # CONFIG_INET_DIAG is not set | 30 | # CONFIG_INET_DIAG is not set |
| 32 | # CONFIG_IPV6 is not set | 31 | # CONFIG_IPV6 is not set |
| 33 | CONFIG_CAN=y | 32 | CONFIG_CAN=y |
| @@ -53,7 +52,7 @@ CONFIG_MTD_UBI=y | |||
| 53 | CONFIG_BLK_DEV_RAM=y | 52 | CONFIG_BLK_DEV_RAM=y |
| 54 | CONFIG_BLK_DEV_RAM_COUNT=1 | 53 | CONFIG_BLK_DEV_RAM_COUNT=1 |
| 55 | CONFIG_BLK_DEV_RAM_SIZE=8192 | 54 | CONFIG_BLK_DEV_RAM_SIZE=8192 |
| 56 | CONFIG_BLK_DEV_XIP=y | 55 | CONFIG_BLK_DEV_RAM_DAX=y |
| 57 | CONFIG_EEPROM_AT24=y | 56 | CONFIG_EEPROM_AT24=y |
| 58 | CONFIG_EEPROM_AT25=y | 57 | CONFIG_EEPROM_AT25=y |
| 59 | CONFIG_SCSI=y | 58 | CONFIG_SCSI=y |
| @@ -113,10 +112,9 @@ CONFIG_RTC_DRV_MPC5121=y | |||
| 113 | CONFIG_DMADEVICES=y | 112 | CONFIG_DMADEVICES=y |
| 114 | CONFIG_MPC512X_DMA=y | 113 | CONFIG_MPC512X_DMA=y |
| 115 | CONFIG_MPC512x_LPBFIFO=y | 114 | CONFIG_MPC512x_LPBFIFO=y |
| 115 | CONFIG_FS_DAX=y | ||
| 116 | CONFIG_EXT2_FS=y | 116 | CONFIG_EXT2_FS=y |
| 117 | CONFIG_EXT2_FS_XIP=y | 117 | CONFIG_EXT4_FS=y |
| 118 | CONFIG_EXT3_FS=y | ||
| 119 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 120 | # CONFIG_DNOTIFY is not set | 118 | # CONFIG_DNOTIFY is not set |
| 121 | CONFIG_VFAT_FS=y | 119 | CONFIG_VFAT_FS=y |
| 122 | CONFIG_TMPFS=y | 120 | CONFIG_TMPFS=y |
diff --git a/arch/powerpc/configs/mpc5200_defconfig b/arch/powerpc/configs/mpc5200_defconfig index 9fd041bfd778..88336d0df0d6 100644 --- a/arch/powerpc/configs/mpc5200_defconfig +++ b/arch/powerpc/configs/mpc5200_defconfig | |||
| @@ -26,7 +26,6 @@ CONFIG_IP_PNP=y | |||
| 26 | CONFIG_IP_PNP_DHCP=y | 26 | CONFIG_IP_PNP_DHCP=y |
| 27 | CONFIG_IP_PNP_BOOTP=y | 27 | CONFIG_IP_PNP_BOOTP=y |
| 28 | CONFIG_SYN_COOKIES=y | 28 | CONFIG_SYN_COOKIES=y |
| 29 | # CONFIG_INET_LRO is not set | ||
| 30 | # CONFIG_IPV6 is not set | 29 | # CONFIG_IPV6 is not set |
| 31 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 30 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 32 | CONFIG_MTD=y | 31 | CONFIG_MTD=y |
| @@ -114,8 +113,7 @@ CONFIG_RTC_DRV_PCF8563=m | |||
| 114 | CONFIG_DMADEVICES=y | 113 | CONFIG_DMADEVICES=y |
| 115 | CONFIG_PPC_BESTCOMM=y | 114 | CONFIG_PPC_BESTCOMM=y |
| 116 | CONFIG_EXT2_FS=y | 115 | CONFIG_EXT2_FS=y |
| 117 | CONFIG_EXT3_FS=y | 116 | CONFIG_EXT4_FS=y |
| 118 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 119 | CONFIG_MSDOS_FS=y | 117 | CONFIG_MSDOS_FS=y |
| 120 | CONFIG_VFAT_FS=y | 118 | CONFIG_VFAT_FS=y |
| 121 | CONFIG_PROC_KCORE=y | 119 | CONFIG_PROC_KCORE=y |
diff --git a/arch/powerpc/configs/mpc7448_hpc2_defconfig b/arch/powerpc/configs/mpc7448_hpc2_defconfig index e2647d5bb605..d933326b4cf9 100644 --- a/arch/powerpc/configs/mpc7448_hpc2_defconfig +++ b/arch/powerpc/configs/mpc7448_hpc2_defconfig | |||
| @@ -23,7 +23,6 @@ CONFIG_IP_PNP=y | |||
| 23 | CONFIG_IP_PNP_DHCP=y | 23 | CONFIG_IP_PNP_DHCP=y |
| 24 | CONFIG_IP_PNP_BOOTP=y | 24 | CONFIG_IP_PNP_BOOTP=y |
| 25 | CONFIG_SYN_COOKIES=y | 25 | CONFIG_SYN_COOKIES=y |
| 26 | # CONFIG_INET_LRO is not set | ||
| 27 | # CONFIG_IPV6 is not set | 26 | # CONFIG_IPV6 is not set |
| 28 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 27 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 29 | # CONFIG_FW_LOADER is not set | 28 | # CONFIG_FW_LOADER is not set |
| @@ -49,8 +48,7 @@ CONFIG_SERIAL_8250_CONSOLE=y | |||
| 49 | # CONFIG_HW_RANDOM is not set | 48 | # CONFIG_HW_RANDOM is not set |
| 50 | CONFIG_GEN_RTC=y | 49 | CONFIG_GEN_RTC=y |
| 51 | CONFIG_EXT2_FS=y | 50 | CONFIG_EXT2_FS=y |
| 52 | CONFIG_EXT3_FS=y | 51 | CONFIG_EXT4_FS=y |
| 53 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 54 | CONFIG_PROC_KCORE=y | 52 | CONFIG_PROC_KCORE=y |
| 55 | CONFIG_TMPFS=y | 53 | CONFIG_TMPFS=y |
| 56 | CONFIG_NFS_FS=y | 54 | CONFIG_NFS_FS=y |
diff --git a/arch/powerpc/configs/mpc8272_ads_defconfig b/arch/powerpc/configs/mpc8272_ads_defconfig index 825b052176af..4cb0f617c0d6 100644 --- a/arch/powerpc/configs/mpc8272_ads_defconfig +++ b/arch/powerpc/configs/mpc8272_ads_defconfig | |||
| @@ -22,7 +22,6 @@ CONFIG_IP_PNP=y | |||
| 22 | CONFIG_IP_PNP_DHCP=y | 22 | CONFIG_IP_PNP_DHCP=y |
| 23 | CONFIG_IP_PNP_BOOTP=y | 23 | CONFIG_IP_PNP_BOOTP=y |
| 24 | CONFIG_SYN_COOKIES=y | 24 | CONFIG_SYN_COOKIES=y |
| 25 | # CONFIG_INET_LRO is not set | ||
| 26 | CONFIG_NETFILTER=y | 25 | CONFIG_NETFILTER=y |
| 27 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 26 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 28 | # CONFIG_FW_LOADER is not set | 27 | # CONFIG_FW_LOADER is not set |
| @@ -56,8 +55,7 @@ CONFIG_SERIAL_CPM_CONSOLE=y | |||
| 56 | # CONFIG_HWMON is not set | 55 | # CONFIG_HWMON is not set |
| 57 | # CONFIG_USB_SUPPORT is not set | 56 | # CONFIG_USB_SUPPORT is not set |
| 58 | CONFIG_EXT2_FS=y | 57 | CONFIG_EXT2_FS=y |
| 59 | CONFIG_EXT3_FS=y | 58 | CONFIG_EXT4_FS=y |
| 60 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 61 | CONFIG_AUTOFS4_FS=y | 59 | CONFIG_AUTOFS4_FS=y |
| 62 | CONFIG_PROC_KCORE=y | 60 | CONFIG_PROC_KCORE=y |
| 63 | CONFIG_TMPFS=y | 61 | CONFIG_TMPFS=y |
diff --git a/arch/powerpc/configs/mpc83xx_defconfig b/arch/powerpc/configs/mpc83xx_defconfig index 671e220a9a98..6574477fd726 100644 --- a/arch/powerpc/configs/mpc83xx_defconfig +++ b/arch/powerpc/configs/mpc83xx_defconfig | |||
| @@ -37,7 +37,6 @@ CONFIG_IP_PNP_DHCP=y | |||
| 37 | CONFIG_IP_PNP_BOOTP=y | 37 | CONFIG_IP_PNP_BOOTP=y |
| 38 | CONFIG_SYN_COOKIES=y | 38 | CONFIG_SYN_COOKIES=y |
| 39 | CONFIG_INET_ESP=y | 39 | CONFIG_INET_ESP=y |
| 40 | # CONFIG_INET_LRO is not set | ||
| 41 | # CONFIG_IPV6 is not set | 40 | # CONFIG_IPV6 is not set |
| 42 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 41 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 43 | CONFIG_DEVTMPFS=y | 42 | CONFIG_DEVTMPFS=y |
| @@ -101,8 +100,7 @@ CONFIG_RTC_CLASS=y | |||
| 101 | CONFIG_RTC_DRV_DS1307=y | 100 | CONFIG_RTC_DRV_DS1307=y |
| 102 | CONFIG_RTC_DRV_DS1374=y | 101 | CONFIG_RTC_DRV_DS1374=y |
| 103 | CONFIG_EXT2_FS=y | 102 | CONFIG_EXT2_FS=y |
| 104 | CONFIG_EXT3_FS=y | 103 | CONFIG_EXT4_FS=y |
| 105 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 106 | CONFIG_PROC_KCORE=y | 104 | CONFIG_PROC_KCORE=y |
| 107 | CONFIG_TMPFS=y | 105 | CONFIG_TMPFS=y |
| 108 | CONFIG_NFS_FS=y | 106 | CONFIG_NFS_FS=y |
diff --git a/arch/powerpc/configs/mpc866_ads_defconfig b/arch/powerpc/configs/mpc866_ads_defconfig index 321412c5dae4..998454471a48 100644 --- a/arch/powerpc/configs/mpc866_ads_defconfig +++ b/arch/powerpc/configs/mpc866_ads_defconfig | |||
| @@ -24,7 +24,6 @@ CONFIG_INET=y | |||
| 24 | CONFIG_IP_MULTICAST=y | 24 | CONFIG_IP_MULTICAST=y |
| 25 | CONFIG_IP_PNP=y | 25 | CONFIG_IP_PNP=y |
| 26 | CONFIG_SYN_COOKIES=y | 26 | CONFIG_SYN_COOKIES=y |
| 27 | # CONFIG_INET_LRO is not set | ||
| 28 | # CONFIG_IPV6 is not set | 27 | # CONFIG_IPV6 is not set |
| 29 | CONFIG_BLK_DEV_LOOP=y | 28 | CONFIG_BLK_DEV_LOOP=y |
| 30 | CONFIG_NETDEVICES=y | 29 | CONFIG_NETDEVICES=y |
| @@ -37,8 +36,7 @@ CONFIG_SERIAL_CPM_CONSOLE=y | |||
| 37 | CONFIG_GEN_RTC=y | 36 | CONFIG_GEN_RTC=y |
| 38 | CONFIG_EXT2_FS=y | 37 | CONFIG_EXT2_FS=y |
| 39 | CONFIG_EXT2_FS_XATTR=y | 38 | CONFIG_EXT2_FS_XATTR=y |
| 40 | CONFIG_EXT3_FS=y | 39 | CONFIG_EXT4_FS=y |
| 41 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 42 | CONFIG_TMPFS=y | 40 | CONFIG_TMPFS=y |
| 43 | CONFIG_CRAMFS=y | 41 | CONFIG_CRAMFS=y |
| 44 | CONFIG_NFS_FS=y | 42 | CONFIG_NFS_FS=y |
diff --git a/arch/powerpc/configs/mpc86xx_basic_defconfig b/arch/powerpc/configs/mpc86xx_basic_defconfig index 33af5c5de105..3283f0586e11 100644 --- a/arch/powerpc/configs/mpc86xx_basic_defconfig +++ b/arch/powerpc/configs/mpc86xx_basic_defconfig | |||
| @@ -8,3 +8,4 @@ CONFIG_GEF_SBC610=y | |||
| 8 | CONFIG_MPC8610_HPCD=y | 8 | CONFIG_MPC8610_HPCD=y |
| 9 | CONFIG_MPC8641_HPCN=y | 9 | CONFIG_MPC8641_HPCN=y |
| 10 | CONFIG_SBC8641D=y | 10 | CONFIG_SBC8641D=y |
| 11 | CONFIG_MVME7100=y | ||
diff --git a/arch/powerpc/configs/mpc885_ads_defconfig b/arch/powerpc/configs/mpc885_ads_defconfig index 2a10f98d4ee5..91f53f1bec5d 100644 --- a/arch/powerpc/configs/mpc885_ads_defconfig +++ b/arch/powerpc/configs/mpc885_ads_defconfig | |||
| @@ -25,7 +25,6 @@ CONFIG_SYN_COOKIES=y | |||
| 25 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 25 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 26 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 26 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 27 | # CONFIG_INET_XFRM_MODE_BEET is not set | 27 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 28 | # CONFIG_INET_LRO is not set | ||
| 29 | # CONFIG_IPV6 is not set | 28 | # CONFIG_IPV6 is not set |
| 30 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 29 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 31 | # CONFIG_FW_LOADER is not set | 30 | # CONFIG_FW_LOADER is not set |
diff --git a/arch/powerpc/configs/mvme5100_defconfig b/arch/powerpc/configs/mvme5100_defconfig index 525a2cb500a7..139add95a16a 100644 --- a/arch/powerpc/configs/mvme5100_defconfig +++ b/arch/powerpc/configs/mvme5100_defconfig | |||
| @@ -32,7 +32,6 @@ CONFIG_IP_MULTICAST=y | |||
| 32 | CONFIG_IP_PNP=y | 32 | CONFIG_IP_PNP=y |
| 33 | CONFIG_IP_PNP_DHCP=y | 33 | CONFIG_IP_PNP_DHCP=y |
| 34 | CONFIG_IP_PNP_BOOTP=y | 34 | CONFIG_IP_PNP_BOOTP=y |
| 35 | # CONFIG_INET_LRO is not set | ||
| 36 | # CONFIG_IPV6 is not set | 35 | # CONFIG_IPV6 is not set |
| 37 | CONFIG_NETFILTER=y | 36 | CONFIG_NETFILTER=y |
| 38 | CONFIG_NF_CONNTRACK=m | 37 | CONFIG_NF_CONNTRACK=m |
| @@ -92,8 +91,7 @@ CONFIG_I2C_MPC=y | |||
| 92 | # CONFIG_USB_SUPPORT is not set | 91 | # CONFIG_USB_SUPPORT is not set |
| 93 | # CONFIG_IOMMU_SUPPORT is not set | 92 | # CONFIG_IOMMU_SUPPORT is not set |
| 94 | CONFIG_EXT2_FS=m | 93 | CONFIG_EXT2_FS=m |
| 95 | CONFIG_EXT3_FS=m | 94 | CONFIG_EXT4_FS=m |
| 96 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 97 | CONFIG_XFS_FS=m | 95 | CONFIG_XFS_FS=m |
| 98 | CONFIG_ISO9660_FS=m | 96 | CONFIG_ISO9660_FS=m |
| 99 | CONFIG_JOLIET=y | 97 | CONFIG_JOLIET=y |
diff --git a/arch/powerpc/configs/pasemi_defconfig b/arch/powerpc/configs/pasemi_defconfig index 8f94782eb907..76f4edd441d3 100644 --- a/arch/powerpc/configs/pasemi_defconfig +++ b/arch/powerpc/configs/pasemi_defconfig | |||
| @@ -152,8 +152,7 @@ CONFIG_RTC_DRV_DS1307=y | |||
| 152 | CONFIG_EXT2_FS=y | 152 | CONFIG_EXT2_FS=y |
| 153 | CONFIG_EXT2_FS_XATTR=y | 153 | CONFIG_EXT2_FS_XATTR=y |
| 154 | CONFIG_EXT2_FS_POSIX_ACL=y | 154 | CONFIG_EXT2_FS_POSIX_ACL=y |
| 155 | CONFIG_EXT3_FS=y | 155 | CONFIG_EXT4_FS=y |
| 156 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 157 | CONFIG_AUTOFS4_FS=y | 156 | CONFIG_AUTOFS4_FS=y |
| 158 | CONFIG_ISO9660_FS=y | 157 | CONFIG_ISO9660_FS=y |
| 159 | CONFIG_UDF_FS=y | 158 | CONFIG_UDF_FS=y |
diff --git a/arch/powerpc/configs/pmac32_defconfig b/arch/powerpc/configs/pmac32_defconfig index 3f6c9a6c815c..e5a674d4a716 100644 --- a/arch/powerpc/configs/pmac32_defconfig +++ b/arch/powerpc/configs/pmac32_defconfig | |||
| @@ -40,7 +40,6 @@ CONFIG_INET_AH=y | |||
| 40 | CONFIG_INET_ESP=y | 40 | CONFIG_INET_ESP=y |
| 41 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 41 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 42 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 42 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 43 | # CONFIG_INET_LRO is not set | ||
| 44 | # CONFIG_IPV6 is not set | 43 | # CONFIG_IPV6 is not set |
| 45 | CONFIG_NETFILTER=y | 44 | CONFIG_NETFILTER=y |
| 46 | CONFIG_NF_CONNTRACK=m | 45 | CONFIG_NF_CONNTRACK=m |
| @@ -281,10 +280,8 @@ CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y | |||
| 281 | CONFIG_USB_APPLEDISPLAY=m | 280 | CONFIG_USB_APPLEDISPLAY=m |
| 282 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=y | 281 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=y |
| 283 | CONFIG_EXT2_FS=y | 282 | CONFIG_EXT2_FS=y |
| 284 | CONFIG_EXT3_FS=y | ||
| 285 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 286 | CONFIG_EXT3_FS_POSIX_ACL=y | ||
| 287 | CONFIG_EXT4_FS=y | 283 | CONFIG_EXT4_FS=y |
| 284 | CONFIG_EXT4_FS_POSIX_ACL=y | ||
| 288 | CONFIG_AUTOFS4_FS=m | 285 | CONFIG_AUTOFS4_FS=m |
| 289 | CONFIG_FUSE_FS=m | 286 | CONFIG_FUSE_FS=m |
| 290 | CONFIG_ISO9660_FS=y | 287 | CONFIG_ISO9660_FS=y |
diff --git a/arch/powerpc/configs/powernv_defconfig b/arch/powerpc/configs/powernv_defconfig index 045031048f8d..dce352e9153b 100644 --- a/arch/powerpc/configs/powernv_defconfig +++ b/arch/powerpc/configs/powernv_defconfig | |||
| @@ -80,6 +80,7 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | |||
| 80 | CONFIG_DEVTMPFS=y | 80 | CONFIG_DEVTMPFS=y |
| 81 | CONFIG_DEVTMPFS_MOUNT=y | 81 | CONFIG_DEVTMPFS_MOUNT=y |
| 82 | CONFIG_MTD=y | 82 | CONFIG_MTD=y |
| 83 | CONFIG_MTD_BLOCK=y | ||
| 83 | CONFIG_MTD_POWERNV_FLASH=y | 84 | CONFIG_MTD_POWERNV_FLASH=y |
| 84 | CONFIG_PARPORT=m | 85 | CONFIG_PARPORT=m |
| 85 | CONFIG_PARPORT_PC=m | 86 | CONFIG_PARPORT_PC=m |
| @@ -181,6 +182,7 @@ CONFIG_SERIAL_8250=y | |||
| 181 | CONFIG_SERIAL_8250_CONSOLE=y | 182 | CONFIG_SERIAL_8250_CONSOLE=y |
| 182 | CONFIG_SERIAL_JSM=m | 183 | CONFIG_SERIAL_JSM=m |
| 183 | CONFIG_VIRTIO_CONSOLE=m | 184 | CONFIG_VIRTIO_CONSOLE=m |
| 185 | CONFIG_POWERNV_OP_PANEL=m | ||
| 184 | CONFIG_IPMI_HANDLER=y | 186 | CONFIG_IPMI_HANDLER=y |
| 185 | CONFIG_IPMI_DEVICE_INTERFACE=y | 187 | CONFIG_IPMI_DEVICE_INTERFACE=y |
| 186 | CONFIG_IPMI_POWERNV=y | 188 | CONFIG_IPMI_POWERNV=y |
| @@ -233,9 +235,9 @@ CONFIG_EXT2_FS=y | |||
| 233 | CONFIG_EXT2_FS_XATTR=y | 235 | CONFIG_EXT2_FS_XATTR=y |
| 234 | CONFIG_EXT2_FS_POSIX_ACL=y | 236 | CONFIG_EXT2_FS_POSIX_ACL=y |
| 235 | CONFIG_EXT2_FS_SECURITY=y | 237 | CONFIG_EXT2_FS_SECURITY=y |
| 236 | CONFIG_EXT3_FS=y | 238 | CONFIG_EXT4_FS=y |
| 237 | CONFIG_EXT3_FS_POSIX_ACL=y | 239 | CONFIG_EXT4_FS_POSIX_ACL=y |
| 238 | CONFIG_EXT3_FS_SECURITY=y | 240 | CONFIG_EXT4_FS_SECURITY=y |
| 239 | CONFIG_REISERFS_FS=y | 241 | CONFIG_REISERFS_FS=y |
| 240 | CONFIG_REISERFS_FS_XATTR=y | 242 | CONFIG_REISERFS_FS_XATTR=y |
| 241 | CONFIG_REISERFS_FS_POSIX_ACL=y | 243 | CONFIG_REISERFS_FS_POSIX_ACL=y |
diff --git a/arch/powerpc/configs/ppc40x_defconfig b/arch/powerpc/configs/ppc40x_defconfig index a43bf6ea10fb..370c0bbcff71 100644 --- a/arch/powerpc/configs/ppc40x_defconfig +++ b/arch/powerpc/configs/ppc40x_defconfig | |||
| @@ -25,7 +25,6 @@ CONFIG_IP_PNP_BOOTP=y | |||
| 25 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 25 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 26 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 26 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 27 | # CONFIG_INET_XFRM_MODE_BEET is not set | 27 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 28 | # CONFIG_INET_LRO is not set | ||
| 29 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 28 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 30 | CONFIG_CONNECTOR=y | 29 | CONFIG_CONNECTOR=y |
| 31 | CONFIG_MTD=y | 30 | CONFIG_MTD=y |
| @@ -67,8 +66,7 @@ CONFIG_THERMAL=y | |||
| 67 | CONFIG_FB=m | 66 | CONFIG_FB=m |
| 68 | CONFIG_FB_XILINX=m | 67 | CONFIG_FB_XILINX=m |
| 69 | CONFIG_EXT2_FS=y | 68 | CONFIG_EXT2_FS=y |
| 70 | CONFIG_EXT3_FS=m | 69 | CONFIG_EXT4_FS=m |
| 71 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 72 | CONFIG_VFAT_FS=m | 70 | CONFIG_VFAT_FS=m |
| 73 | CONFIG_PROC_KCORE=y | 71 | CONFIG_PROC_KCORE=y |
| 74 | CONFIG_TMPFS=y | 72 | CONFIG_TMPFS=y |
diff --git a/arch/powerpc/configs/ppc44x_defconfig b/arch/powerpc/configs/ppc44x_defconfig index bbc7f76d52c8..2766e8f590bc 100644 --- a/arch/powerpc/configs/ppc44x_defconfig +++ b/arch/powerpc/configs/ppc44x_defconfig | |||
| @@ -35,7 +35,6 @@ CONFIG_IP_PNP_BOOTP=y | |||
| 35 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 35 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 36 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 36 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 37 | # CONFIG_INET_XFRM_MODE_BEET is not set | 37 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 38 | # CONFIG_INET_LRO is not set | ||
| 39 | CONFIG_BRIDGE=m | 38 | CONFIG_BRIDGE=m |
| 40 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 39 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 41 | CONFIG_CONNECTOR=y | 40 | CONFIG_CONNECTOR=y |
| @@ -89,8 +88,7 @@ CONFIG_USB_OHCI_HCD_PPC_OF_BE=y | |||
| 89 | # CONFIG_USB_OHCI_HCD_PCI is not set | 88 | # CONFIG_USB_OHCI_HCD_PCI is not set |
| 90 | CONFIG_USB_STORAGE=m | 89 | CONFIG_USB_STORAGE=m |
| 91 | CONFIG_EXT2_FS=y | 90 | CONFIG_EXT2_FS=y |
| 92 | CONFIG_EXT3_FS=m | 91 | CONFIG_EXT4_FS=m |
| 93 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 94 | CONFIG_VFAT_FS=m | 92 | CONFIG_VFAT_FS=m |
| 95 | CONFIG_PROC_KCORE=y | 93 | CONFIG_PROC_KCORE=y |
| 96 | CONFIG_TMPFS=y | 94 | CONFIG_TMPFS=y |
diff --git a/arch/powerpc/configs/ppc64_defconfig b/arch/powerpc/configs/ppc64_defconfig index b041fb607376..0a8d250cb97e 100644 --- a/arch/powerpc/configs/ppc64_defconfig +++ b/arch/powerpc/configs/ppc64_defconfig | |||
| @@ -247,7 +247,6 @@ CONFIG_INFINIBAND=m | |||
| 247 | CONFIG_INFINIBAND_USER_MAD=m | 247 | CONFIG_INFINIBAND_USER_MAD=m |
| 248 | CONFIG_INFINIBAND_USER_ACCESS=m | 248 | CONFIG_INFINIBAND_USER_ACCESS=m |
| 249 | CONFIG_INFINIBAND_MTHCA=m | 249 | CONFIG_INFINIBAND_MTHCA=m |
| 250 | CONFIG_INFINIBAND_EHCA=m | ||
| 251 | CONFIG_INFINIBAND_CXGB3=m | 250 | CONFIG_INFINIBAND_CXGB3=m |
| 252 | CONFIG_INFINIBAND_CXGB4=m | 251 | CONFIG_INFINIBAND_CXGB4=m |
| 253 | CONFIG_MLX4_INFINIBAND=m | 252 | CONFIG_MLX4_INFINIBAND=m |
| @@ -262,14 +261,11 @@ CONFIG_RTC_CLASS=y | |||
| 262 | CONFIG_RTC_DRV_DS1307=y | 261 | CONFIG_RTC_DRV_DS1307=y |
| 263 | CONFIG_VIRTIO_PCI=m | 262 | CONFIG_VIRTIO_PCI=m |
| 264 | CONFIG_VIRTIO_BALLOON=m | 263 | CONFIG_VIRTIO_BALLOON=m |
| 264 | CONFIG_FS_DAX=y | ||
| 265 | CONFIG_EXT2_FS=y | 265 | CONFIG_EXT2_FS=y |
| 266 | CONFIG_EXT2_FS_XATTR=y | 266 | CONFIG_EXT2_FS_XATTR=y |
| 267 | CONFIG_EXT2_FS_POSIX_ACL=y | 267 | CONFIG_EXT2_FS_POSIX_ACL=y |
| 268 | CONFIG_EXT2_FS_SECURITY=y | 268 | CONFIG_EXT2_FS_SECURITY=y |
| 269 | CONFIG_EXT2_FS_XIP=y | ||
| 270 | CONFIG_EXT3_FS=y | ||
| 271 | CONFIG_EXT3_FS_POSIX_ACL=y | ||
| 272 | CONFIG_EXT3_FS_SECURITY=y | ||
| 273 | CONFIG_EXT4_FS=y | 269 | CONFIG_EXT4_FS=y |
| 274 | CONFIG_EXT4_FS_POSIX_ACL=y | 270 | CONFIG_EXT4_FS_POSIX_ACL=y |
| 275 | CONFIG_EXT4_FS_SECURITY=y | 271 | CONFIG_EXT4_FS_SECURITY=y |
diff --git a/arch/powerpc/configs/ppc64e_defconfig b/arch/powerpc/configs/ppc64e_defconfig index ddf9773458cf..fd2edd650c20 100644 --- a/arch/powerpc/configs/ppc64e_defconfig +++ b/arch/powerpc/configs/ppc64e_defconfig | |||
| @@ -178,15 +178,11 @@ CONFIG_EDAC=y | |||
| 178 | CONFIG_EDAC_MM_EDAC=y | 178 | CONFIG_EDAC_MM_EDAC=y |
| 179 | CONFIG_RTC_CLASS=y | 179 | CONFIG_RTC_CLASS=y |
| 180 | CONFIG_RTC_DRV_DS1307=y | 180 | CONFIG_RTC_DRV_DS1307=y |
| 181 | CONFIG_FS_DAX=y | ||
| 181 | CONFIG_EXT2_FS=y | 182 | CONFIG_EXT2_FS=y |
| 182 | CONFIG_EXT2_FS_XATTR=y | 183 | CONFIG_EXT2_FS_XATTR=y |
| 183 | CONFIG_EXT2_FS_POSIX_ACL=y | 184 | CONFIG_EXT2_FS_POSIX_ACL=y |
| 184 | CONFIG_EXT2_FS_SECURITY=y | 185 | CONFIG_EXT2_FS_SECURITY=y |
| 185 | CONFIG_EXT2_FS_XIP=y | ||
| 186 | CONFIG_EXT3_FS=y | ||
| 187 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 188 | CONFIG_EXT3_FS_POSIX_ACL=y | ||
| 189 | CONFIG_EXT3_FS_SECURITY=y | ||
| 190 | CONFIG_EXT4_FS=y | 186 | CONFIG_EXT4_FS=y |
| 191 | CONFIG_EXT4_FS_POSIX_ACL=y | 187 | CONFIG_EXT4_FS_POSIX_ACL=y |
| 192 | CONFIG_EXT4_FS_SECURITY=y | 188 | CONFIG_EXT4_FS_SECURITY=y |
diff --git a/arch/powerpc/configs/ppc6xx_defconfig b/arch/powerpc/configs/ppc6xx_defconfig index 1dde0be2be30..8fbf49801233 100644 --- a/arch/powerpc/configs/ppc6xx_defconfig +++ b/arch/powerpc/configs/ppc6xx_defconfig | |||
| @@ -512,7 +512,6 @@ CONFIG_E1000E=m | |||
| 512 | CONFIG_IGB=m | 512 | CONFIG_IGB=m |
| 513 | CONFIG_IXGB=m | 513 | CONFIG_IXGB=m |
| 514 | CONFIG_IXGBE=m | 514 | CONFIG_IXGBE=m |
| 515 | CONFIG_IP1000=m | ||
| 516 | CONFIG_MV643XX_ETH=m | 515 | CONFIG_MV643XX_ETH=m |
| 517 | CONFIG_SKGE=m | 516 | CONFIG_SKGE=m |
| 518 | CONFIG_SKY2=m | 517 | CONFIG_SKY2=m |
| @@ -1029,14 +1028,14 @@ CONFIG_UIO_CIF=m | |||
| 1029 | CONFIG_UIO_PDRV_GENIRQ=m | 1028 | CONFIG_UIO_PDRV_GENIRQ=m |
| 1030 | CONFIG_VIRTIO_PCI=m | 1029 | CONFIG_VIRTIO_PCI=m |
| 1031 | CONFIG_VIRTIO_BALLOON=m | 1030 | CONFIG_VIRTIO_BALLOON=m |
| 1031 | CONFIG_FS_DAX=y | ||
| 1032 | CONFIG_EXT2_FS=m | 1032 | CONFIG_EXT2_FS=m |
| 1033 | CONFIG_EXT2_FS_XATTR=y | 1033 | CONFIG_EXT2_FS_XATTR=y |
| 1034 | CONFIG_EXT2_FS_POSIX_ACL=y | 1034 | CONFIG_EXT2_FS_POSIX_ACL=y |
| 1035 | CONFIG_EXT2_FS_SECURITY=y | 1035 | CONFIG_EXT2_FS_SECURITY=y |
| 1036 | CONFIG_EXT2_FS_XIP=y | 1036 | CONFIG_EXT4_FS=m |
| 1037 | CONFIG_EXT3_FS=m | 1037 | CONFIG_EXT4_FS_POSIX_ACL=y |
| 1038 | CONFIG_EXT3_FS_POSIX_ACL=y | 1038 | CONFIG_EXT4_FS_SECURITY=y |
| 1039 | CONFIG_EXT3_FS_SECURITY=y | ||
| 1040 | CONFIG_EXT4_FS=y | 1039 | CONFIG_EXT4_FS=y |
| 1041 | CONFIG_JBD2_DEBUG=y | 1040 | CONFIG_JBD2_DEBUG=y |
| 1042 | CONFIG_REISERFS_FS=m | 1041 | CONFIG_REISERFS_FS=m |
diff --git a/arch/powerpc/configs/pq2fads_defconfig b/arch/powerpc/configs/pq2fads_defconfig index 3e336ee8bb4a..50b2bad51d0a 100644 --- a/arch/powerpc/configs/pq2fads_defconfig +++ b/arch/powerpc/configs/pq2fads_defconfig | |||
| @@ -23,7 +23,6 @@ CONFIG_IP_PNP=y | |||
| 23 | CONFIG_IP_PNP_DHCP=y | 23 | CONFIG_IP_PNP_DHCP=y |
| 24 | CONFIG_IP_PNP_BOOTP=y | 24 | CONFIG_IP_PNP_BOOTP=y |
| 25 | CONFIG_SYN_COOKIES=y | 25 | CONFIG_SYN_COOKIES=y |
| 26 | # CONFIG_INET_LRO is not set | ||
| 27 | CONFIG_NETFILTER=y | 26 | CONFIG_NETFILTER=y |
| 28 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 27 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 29 | # CONFIG_FW_LOADER is not set | 28 | # CONFIG_FW_LOADER is not set |
| @@ -40,7 +39,6 @@ CONFIG_MTD_CFI_I4=y | |||
| 40 | CONFIG_MTD_CFI_INTELEXT=y | 39 | CONFIG_MTD_CFI_INTELEXT=y |
| 41 | CONFIG_MTD_PHYSMAP_OF=y | 40 | CONFIG_MTD_PHYSMAP_OF=y |
| 42 | CONFIG_BLK_DEV_LOOP=y | 41 | CONFIG_BLK_DEV_LOOP=y |
| 43 | CONFIG_IDE=y | ||
| 44 | CONFIG_NETDEVICES=y | 42 | CONFIG_NETDEVICES=y |
| 45 | CONFIG_TUN=y | 43 | CONFIG_TUN=y |
| 46 | CONFIG_FS_ENET=y | 44 | CONFIG_FS_ENET=y |
| @@ -59,8 +57,7 @@ CONFIG_SERIAL_CPM_CONSOLE=y | |||
| 59 | CONFIG_USB_GADGET=y | 57 | CONFIG_USB_GADGET=y |
| 60 | CONFIG_USB_ETH=y | 58 | CONFIG_USB_ETH=y |
| 61 | CONFIG_EXT2_FS=y | 59 | CONFIG_EXT2_FS=y |
| 62 | CONFIG_EXT3_FS=y | 60 | CONFIG_EXT4_FS=y |
| 63 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 64 | CONFIG_AUTOFS4_FS=y | 61 | CONFIG_AUTOFS4_FS=y |
| 65 | CONFIG_PROC_KCORE=y | 62 | CONFIG_PROC_KCORE=y |
| 66 | CONFIG_TMPFS=y | 63 | CONFIG_TMPFS=y |
diff --git a/arch/powerpc/configs/ps3_defconfig b/arch/powerpc/configs/ps3_defconfig index c40046074f8b..ee0ec5a682fc 100644 --- a/arch/powerpc/configs/ps3_defconfig +++ b/arch/powerpc/configs/ps3_defconfig | |||
| @@ -51,7 +51,6 @@ CONFIG_IP_PNP_DHCP=y | |||
| 51 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 51 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 52 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 52 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 53 | # CONFIG_INET_XFRM_MODE_BEET is not set | 53 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 54 | # CONFIG_INET_LRO is not set | ||
| 55 | # CONFIG_INET_DIAG is not set | 54 | # CONFIG_INET_DIAG is not set |
| 56 | CONFIG_BT=m | 55 | CONFIG_BT=m |
| 57 | CONFIG_BT_RFCOMM=m | 56 | CONFIG_BT_RFCOMM=m |
diff --git a/arch/powerpc/configs/pseries_defconfig b/arch/powerpc/configs/pseries_defconfig index 36871a4bfa54..654aeffc57ef 100644 --- a/arch/powerpc/configs/pseries_defconfig +++ b/arch/powerpc/configs/pseries_defconfig | |||
| @@ -53,6 +53,7 @@ CONFIG_KEXEC=y | |||
| 53 | CONFIG_IRQ_ALL_CPUS=y | 53 | CONFIG_IRQ_ALL_CPUS=y |
| 54 | CONFIG_MEMORY_HOTPLUG=y | 54 | CONFIG_MEMORY_HOTPLUG=y |
| 55 | CONFIG_MEMORY_HOTREMOVE=y | 55 | CONFIG_MEMORY_HOTREMOVE=y |
| 56 | CONFIG_MEMORY_HOTPLUG_DEFAULT_ONLINE=y | ||
| 56 | CONFIG_KSM=y | 57 | CONFIG_KSM=y |
| 57 | CONFIG_TRANSPARENT_HUGEPAGE=y | 58 | CONFIG_TRANSPARENT_HUGEPAGE=y |
| 58 | CONFIG_PPC_64K_PAGES=y | 59 | CONFIG_PPC_64K_PAGES=y |
| @@ -223,7 +224,6 @@ CONFIG_INFINIBAND=m | |||
| 223 | CONFIG_INFINIBAND_USER_MAD=m | 224 | CONFIG_INFINIBAND_USER_MAD=m |
| 224 | CONFIG_INFINIBAND_USER_ACCESS=m | 225 | CONFIG_INFINIBAND_USER_ACCESS=m |
| 225 | CONFIG_INFINIBAND_MTHCA=m | 226 | CONFIG_INFINIBAND_MTHCA=m |
| 226 | CONFIG_INFINIBAND_EHCA=m | ||
| 227 | CONFIG_INFINIBAND_CXGB3=m | 227 | CONFIG_INFINIBAND_CXGB3=m |
| 228 | CONFIG_INFINIBAND_CXGB4=m | 228 | CONFIG_INFINIBAND_CXGB4=m |
| 229 | CONFIG_MLX4_INFINIBAND=m | 229 | CONFIG_MLX4_INFINIBAND=m |
| @@ -233,14 +233,11 @@ CONFIG_INFINIBAND_SRP=m | |||
| 233 | CONFIG_INFINIBAND_ISER=m | 233 | CONFIG_INFINIBAND_ISER=m |
| 234 | CONFIG_VIRTIO_PCI=m | 234 | CONFIG_VIRTIO_PCI=m |
| 235 | CONFIG_VIRTIO_BALLOON=m | 235 | CONFIG_VIRTIO_BALLOON=m |
| 236 | CONFIG_FS_DAX=y | ||
| 236 | CONFIG_EXT2_FS=y | 237 | CONFIG_EXT2_FS=y |
| 237 | CONFIG_EXT2_FS_XATTR=y | 238 | CONFIG_EXT2_FS_XATTR=y |
| 238 | CONFIG_EXT2_FS_POSIX_ACL=y | 239 | CONFIG_EXT2_FS_POSIX_ACL=y |
| 239 | CONFIG_EXT2_FS_SECURITY=y | 240 | CONFIG_EXT2_FS_SECURITY=y |
| 240 | CONFIG_EXT2_FS_XIP=y | ||
| 241 | CONFIG_EXT3_FS=y | ||
| 242 | CONFIG_EXT3_FS_POSIX_ACL=y | ||
| 243 | CONFIG_EXT3_FS_SECURITY=y | ||
| 244 | CONFIG_EXT4_FS=y | 241 | CONFIG_EXT4_FS=y |
| 245 | CONFIG_EXT4_FS_POSIX_ACL=y | 242 | CONFIG_EXT4_FS_POSIX_ACL=y |
| 246 | CONFIG_EXT4_FS_SECURITY=y | 243 | CONFIG_EXT4_FS_SECURITY=y |
diff --git a/arch/powerpc/configs/storcenter_defconfig b/arch/powerpc/configs/storcenter_defconfig index b5db7dffe86d..e9122b15e5fd 100644 --- a/arch/powerpc/configs/storcenter_defconfig +++ b/arch/powerpc/configs/storcenter_defconfig | |||
| @@ -25,7 +25,6 @@ CONFIG_IP_PNP_DHCP=y | |||
| 25 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 25 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 26 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 26 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 27 | # CONFIG_INET_XFRM_MODE_BEET is not set | 27 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 28 | # CONFIG_INET_LRO is not set | ||
| 29 | # CONFIG_IPV6 is not set | 28 | # CONFIG_IPV6 is not set |
| 30 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 29 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 31 | CONFIG_MTD=y | 30 | CONFIG_MTD=y |
| @@ -72,8 +71,7 @@ CONFIG_USB_STORAGE=y | |||
| 72 | CONFIG_RTC_CLASS=y | 71 | CONFIG_RTC_CLASS=y |
| 73 | CONFIG_RTC_DRV_DS1307=y | 72 | CONFIG_RTC_DRV_DS1307=y |
| 74 | CONFIG_EXT2_FS=y | 73 | CONFIG_EXT2_FS=y |
| 75 | CONFIG_EXT3_FS=y | 74 | CONFIG_EXT4_FS=y |
| 76 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 77 | CONFIG_XFS_FS=m | 75 | CONFIG_XFS_FS=m |
| 78 | CONFIG_PROC_KCORE=y | 76 | CONFIG_PROC_KCORE=y |
| 79 | CONFIG_TMPFS=y | 77 | CONFIG_TMPFS=y |
diff --git a/arch/powerpc/configs/tqm8xx_defconfig b/arch/powerpc/configs/tqm8xx_defconfig index 4c973c5321c6..78fddf24b5d3 100644 --- a/arch/powerpc/configs/tqm8xx_defconfig +++ b/arch/powerpc/configs/tqm8xx_defconfig | |||
| @@ -29,7 +29,6 @@ CONFIG_SYN_COOKIES=y | |||
| 29 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 29 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 30 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 30 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 31 | # CONFIG_INET_XFRM_MODE_BEET is not set | 31 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 32 | # CONFIG_INET_LRO is not set | ||
| 33 | # CONFIG_IPV6 is not set | 32 | # CONFIG_IPV6 is not set |
| 34 | # CONFIG_WIRELESS is not set | 33 | # CONFIG_WIRELESS is not set |
| 35 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 34 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
diff --git a/arch/powerpc/configs/wii_defconfig b/arch/powerpc/configs/wii_defconfig index 34eaf528fa87..dcdd51b57783 100644 --- a/arch/powerpc/configs/wii_defconfig +++ b/arch/powerpc/configs/wii_defconfig | |||
| @@ -32,7 +32,6 @@ CONFIG_IP_PNP_RARP=y | |||
| 32 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 32 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 33 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 33 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 34 | # CONFIG_INET_XFRM_MODE_BEET is not set | 34 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 35 | # CONFIG_INET_LRO is not set | ||
| 36 | # CONFIG_INET_DIAG is not set | 35 | # CONFIG_INET_DIAG is not set |
| 37 | # CONFIG_IPV6 is not set | 36 | # CONFIG_IPV6 is not set |
| 38 | CONFIG_BT=y | 37 | CONFIG_BT=y |
| @@ -96,9 +95,7 @@ CONFIG_MMC_SDHCI=y | |||
| 96 | CONFIG_RTC_CLASS=y | 95 | CONFIG_RTC_CLASS=y |
| 97 | CONFIG_RTC_DRV_GENERIC=y | 96 | CONFIG_RTC_DRV_GENERIC=y |
| 98 | CONFIG_EXT2_FS=y | 97 | CONFIG_EXT2_FS=y |
| 99 | CONFIG_EXT3_FS=y | 98 | CONFIG_EXT4_FS=y |
| 100 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 101 | # CONFIG_EXT3_FS_XATTR is not set | ||
| 102 | CONFIG_FUSE_FS=m | 99 | CONFIG_FUSE_FS=m |
| 103 | CONFIG_ISO9660_FS=y | 100 | CONFIG_ISO9660_FS=y |
| 104 | CONFIG_JOLIET=y | 101 | CONFIG_JOLIET=y |
diff --git a/arch/powerpc/include/asm/accounting.h b/arch/powerpc/include/asm/accounting.h new file mode 100644 index 000000000000..c133246df467 --- /dev/null +++ b/arch/powerpc/include/asm/accounting.h | |||
| @@ -0,0 +1,24 @@ | |||
| 1 | /* | ||
| 2 | * Common time accounting prototypes and such for all ppc machines. | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or | ||
| 5 | * modify it under the terms of the GNU General Public License | ||
| 6 | * as published by the Free Software Foundation; either version | ||
| 7 | * 2 of the License, or (at your option) any later version. | ||
| 8 | */ | ||
| 9 | |||
| 10 | #ifndef __POWERPC_ACCOUNTING_H | ||
| 11 | #define __POWERPC_ACCOUNTING_H | ||
| 12 | |||
| 13 | /* Stuff for accurate time accounting */ | ||
| 14 | struct cpu_accounting_data { | ||
| 15 | unsigned long user_time; /* accumulated usermode TB ticks */ | ||
| 16 | unsigned long system_time; /* accumulated system TB ticks */ | ||
| 17 | unsigned long user_time_scaled; /* accumulated usermode SPURR ticks */ | ||
| 18 | unsigned long starttime; /* TB value snapshot */ | ||
| 19 | unsigned long starttime_user; /* TB value on exit to usermode */ | ||
| 20 | unsigned long startspurr; /* SPURR value snapshot */ | ||
| 21 | unsigned long utime_sspurr; /* ->user_time when ->startspurr set */ | ||
| 22 | }; | ||
| 23 | |||
| 24 | #endif | ||
diff --git a/arch/powerpc/include/asm/asm-compat.h b/arch/powerpc/include/asm/asm-compat.h index dc85dcb891cf..cee3aa087653 100644 --- a/arch/powerpc/include/asm/asm-compat.h +++ b/arch/powerpc/include/asm/asm-compat.h | |||
| @@ -36,11 +36,13 @@ | |||
| 36 | #define PPC_MIN_STKFRM 112 | 36 | #define PPC_MIN_STKFRM 112 |
| 37 | 37 | ||
| 38 | #ifdef __BIG_ENDIAN__ | 38 | #ifdef __BIG_ENDIAN__ |
| 39 | #define LHZX_BE stringify_in_c(lhzx) | ||
| 39 | #define LWZX_BE stringify_in_c(lwzx) | 40 | #define LWZX_BE stringify_in_c(lwzx) |
| 40 | #define LDX_BE stringify_in_c(ldx) | 41 | #define LDX_BE stringify_in_c(ldx) |
| 41 | #define STWX_BE stringify_in_c(stwx) | 42 | #define STWX_BE stringify_in_c(stwx) |
| 42 | #define STDX_BE stringify_in_c(stdx) | 43 | #define STDX_BE stringify_in_c(stdx) |
| 43 | #else | 44 | #else |
| 45 | #define LHZX_BE stringify_in_c(lhbrx) | ||
| 44 | #define LWZX_BE stringify_in_c(lwbrx) | 46 | #define LWZX_BE stringify_in_c(lwbrx) |
| 45 | #define LDX_BE stringify_in_c(ldbrx) | 47 | #define LDX_BE stringify_in_c(ldbrx) |
| 46 | #define STWX_BE stringify_in_c(stwbrx) | 48 | #define STWX_BE stringify_in_c(stwbrx) |
diff --git a/arch/powerpc/include/asm/asm-prototypes.h b/arch/powerpc/include/asm/asm-prototypes.h new file mode 100644 index 000000000000..e71b9097594c --- /dev/null +++ b/arch/powerpc/include/asm/asm-prototypes.h | |||
| @@ -0,0 +1,75 @@ | |||
| 1 | #ifndef _ASM_POWERPC_ASM_PROTOTYPES_H | ||
| 2 | #define _ASM_POWERPC_ASM_PROTOTYPES_H | ||
| 3 | /* | ||
| 4 | * This file is for prototypes of C functions that are only called | ||
| 5 | * from asm, and any associated variables. | ||
| 6 | * | ||
| 7 | * Copyright 2016, Daniel Axtens, IBM Corporation. | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or | ||
| 10 | * modify it under the terms of the GNU General Public License | ||
| 11 | * as published by the Free Software Foundation; either version 2 | ||
| 12 | * of the License, or (at your option) any later version. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #include <linux/threads.h> | ||
| 16 | #include <linux/kprobes.h> | ||
| 17 | |||
| 18 | /* SMP */ | ||
| 19 | extern struct thread_info *current_set[NR_CPUS]; | ||
| 20 | extern struct thread_info *secondary_ti; | ||
| 21 | void start_secondary(void *unused); | ||
| 22 | |||
| 23 | /* kexec */ | ||
| 24 | struct paca_struct; | ||
| 25 | struct kimage; | ||
| 26 | extern struct paca_struct kexec_paca; | ||
| 27 | void kexec_copy_flush(struct kimage *image); | ||
| 28 | |||
| 29 | /* pseries hcall tracing */ | ||
| 30 | extern struct static_key hcall_tracepoint_key; | ||
| 31 | void __trace_hcall_entry(unsigned long opcode, unsigned long *args); | ||
| 32 | void __trace_hcall_exit(long opcode, unsigned long retval, | ||
| 33 | unsigned long *retbuf); | ||
| 34 | /* OPAL tracing */ | ||
| 35 | #ifdef HAVE_JUMP_LABEL | ||
| 36 | extern struct static_key opal_tracepoint_key; | ||
| 37 | #endif | ||
| 38 | |||
| 39 | void __trace_opal_entry(unsigned long opcode, unsigned long *args); | ||
| 40 | void __trace_opal_exit(long opcode, unsigned long retval); | ||
| 41 | |||
| 42 | /* VMX copying */ | ||
| 43 | int enter_vmx_usercopy(void); | ||
| 44 | int exit_vmx_usercopy(void); | ||
| 45 | int enter_vmx_copy(void); | ||
| 46 | void * exit_vmx_copy(void *dest); | ||
| 47 | |||
| 48 | /* Traps */ | ||
| 49 | long machine_check_early(struct pt_regs *regs); | ||
| 50 | long hmi_exception_realmode(struct pt_regs *regs); | ||
| 51 | void SMIException(struct pt_regs *regs); | ||
| 52 | void handle_hmi_exception(struct pt_regs *regs); | ||
| 53 | void instruction_breakpoint_exception(struct pt_regs *regs); | ||
| 54 | void RunModeException(struct pt_regs *regs); | ||
| 55 | void __kprobes single_step_exception(struct pt_regs *regs); | ||
| 56 | void __kprobes program_check_exception(struct pt_regs *regs); | ||
| 57 | void alignment_exception(struct pt_regs *regs); | ||
| 58 | void StackOverflow(struct pt_regs *regs); | ||
| 59 | void nonrecoverable_exception(struct pt_regs *regs); | ||
| 60 | void kernel_fp_unavailable_exception(struct pt_regs *regs); | ||
| 61 | void altivec_unavailable_exception(struct pt_regs *regs); | ||
| 62 | void vsx_unavailable_exception(struct pt_regs *regs); | ||
| 63 | void fp_unavailable_tm(struct pt_regs *regs); | ||
| 64 | void altivec_unavailable_tm(struct pt_regs *regs); | ||
| 65 | void vsx_unavailable_tm(struct pt_regs *regs); | ||
| 66 | void facility_unavailable_exception(struct pt_regs *regs); | ||
| 67 | void TAUException(struct pt_regs *regs); | ||
| 68 | void altivec_assist_exception(struct pt_regs *regs); | ||
| 69 | void unrecoverable_exception(struct pt_regs *regs); | ||
| 70 | void kernel_bad_stack(struct pt_regs *regs); | ||
| 71 | void system_reset_exception(struct pt_regs *regs); | ||
| 72 | void machine_check_exception(struct pt_regs *regs); | ||
| 73 | void __kprobes emulation_assist_interrupt(struct pt_regs *regs); | ||
| 74 | |||
| 75 | #endif /* _ASM_POWERPC_ASM_PROTOTYPES_H */ | ||
diff --git a/arch/powerpc/include/asm/book3s/64/mmu-hash.h b/arch/powerpc/include/asm/book3s/64/mmu-hash.h index 74839f24f412..5eaf86ac143d 100644 --- a/arch/powerpc/include/asm/book3s/64/mmu-hash.h +++ b/arch/powerpc/include/asm/book3s/64/mmu-hash.h | |||
| @@ -124,6 +124,45 @@ | |||
| 124 | 124 | ||
| 125 | #ifndef __ASSEMBLY__ | 125 | #ifndef __ASSEMBLY__ |
| 126 | 126 | ||
| 127 | struct mmu_hash_ops { | ||
| 128 | void (*hpte_invalidate)(unsigned long slot, | ||
| 129 | unsigned long vpn, | ||
| 130 | int bpsize, int apsize, | ||
| 131 | int ssize, int local); | ||
| 132 | long (*hpte_updatepp)(unsigned long slot, | ||
| 133 | unsigned long newpp, | ||
| 134 | unsigned long vpn, | ||
| 135 | int bpsize, int apsize, | ||
| 136 | int ssize, unsigned long flags); | ||
| 137 | void (*hpte_updateboltedpp)(unsigned long newpp, | ||
| 138 | unsigned long ea, | ||
| 139 | int psize, int ssize); | ||
| 140 | long (*hpte_insert)(unsigned long hpte_group, | ||
| 141 | unsigned long vpn, | ||
| 142 | unsigned long prpn, | ||
| 143 | unsigned long rflags, | ||
| 144 | unsigned long vflags, | ||
| 145 | int psize, int apsize, | ||
| 146 | int ssize); | ||
| 147 | long (*hpte_remove)(unsigned long hpte_group); | ||
| 148 | int (*hpte_removebolted)(unsigned long ea, | ||
| 149 | int psize, int ssize); | ||
| 150 | void (*flush_hash_range)(unsigned long number, int local); | ||
| 151 | void (*hugepage_invalidate)(unsigned long vsid, | ||
| 152 | unsigned long addr, | ||
| 153 | unsigned char *hpte_slot_array, | ||
| 154 | int psize, int ssize, int local); | ||
| 155 | /* | ||
| 156 | * Special for kexec. | ||
| 157 | * To be called in real mode with interrupts disabled. No locks are | ||
| 158 | * taken as such, concurrent access on pre POWER5 hardware could result | ||
| 159 | * in a deadlock. | ||
| 160 | * The linear mapping is destroyed as well. | ||
| 161 | */ | ||
| 162 | void (*hpte_clear_all)(void); | ||
| 163 | }; | ||
| 164 | extern struct mmu_hash_ops mmu_hash_ops; | ||
| 165 | |||
| 127 | struct hash_pte { | 166 | struct hash_pte { |
| 128 | __be64 v; | 167 | __be64 v; |
| 129 | __be64 r; | 168 | __be64 r; |
| @@ -352,10 +391,13 @@ int htab_remove_mapping(unsigned long vstart, unsigned long vend, | |||
| 352 | extern void add_gpage(u64 addr, u64 page_size, unsigned long number_of_pages); | 391 | extern void add_gpage(u64 addr, u64 page_size, unsigned long number_of_pages); |
| 353 | extern void demote_segment_4k(struct mm_struct *mm, unsigned long addr); | 392 | extern void demote_segment_4k(struct mm_struct *mm, unsigned long addr); |
| 354 | 393 | ||
| 394 | #ifdef CONFIG_PPC_PSERIES | ||
| 395 | void hpte_init_pseries(void); | ||
| 396 | #else | ||
| 397 | static inline void hpte_init_pseries(void) { } | ||
| 398 | #endif | ||
| 399 | |||
| 355 | extern void hpte_init_native(void); | 400 | extern void hpte_init_native(void); |
| 356 | extern void hpte_init_lpar(void); | ||
| 357 | extern void hpte_init_beat(void); | ||
| 358 | extern void hpte_init_beat_v3(void); | ||
| 359 | 401 | ||
| 360 | extern void slb_initialize(void); | 402 | extern void slb_initialize(void); |
| 361 | extern void slb_flush_and_rebolt(void); | 403 | extern void slb_flush_and_rebolt(void); |
| @@ -435,7 +477,7 @@ extern void slb_set_size(u16 size); | |||
| 435 | * function. Used in slb_allocate() and do_stab_bolted. The function | 477 | * function. Used in slb_allocate() and do_stab_bolted. The function |
| 436 | * computed is: (protovsid*VSID_MULTIPLIER) % VSID_MODULUS | 478 | * computed is: (protovsid*VSID_MULTIPLIER) % VSID_MODULUS |
| 437 | * | 479 | * |
| 438 | * rt = register continaing the proto-VSID and into which the | 480 | * rt = register containing the proto-VSID and into which the |
| 439 | * VSID will be stored | 481 | * VSID will be stored |
| 440 | * rx = scratch register (clobbered) | 482 | * rx = scratch register (clobbered) |
| 441 | * | 483 | * |
diff --git a/arch/powerpc/include/asm/book3s/64/mmu.h b/arch/powerpc/include/asm/book3s/64/mmu.h index 5854263d4d6e..d4eda6420523 100644 --- a/arch/powerpc/include/asm/book3s/64/mmu.h +++ b/arch/powerpc/include/asm/book3s/64/mmu.h | |||
| @@ -23,7 +23,12 @@ struct mmu_psize_def { | |||
| 23 | }; | 23 | }; |
| 24 | extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT]; | 24 | extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT]; |
| 25 | 25 | ||
| 26 | #ifdef CONFIG_PPC_RADIX_MMU | ||
| 26 | #define radix_enabled() mmu_has_feature(MMU_FTR_RADIX) | 27 | #define radix_enabled() mmu_has_feature(MMU_FTR_RADIX) |
| 28 | #else | ||
| 29 | #define radix_enabled() (0) | ||
| 30 | #endif | ||
| 31 | |||
| 27 | 32 | ||
| 28 | #endif /* __ASSEMBLY__ */ | 33 | #endif /* __ASSEMBLY__ */ |
| 29 | 34 | ||
diff --git a/arch/powerpc/include/asm/book3s/64/pgtable-4k.h b/arch/powerpc/include/asm/book3s/64/pgtable-4k.h index 71e9abced493..9db83b4e017d 100644 --- a/arch/powerpc/include/asm/book3s/64/pgtable-4k.h +++ b/arch/powerpc/include/asm/book3s/64/pgtable-4k.h | |||
| @@ -11,7 +11,7 @@ static inline int pmd_huge(pmd_t pmd) | |||
| 11 | * leaf pte for huge page | 11 | * leaf pte for huge page |
| 12 | */ | 12 | */ |
| 13 | if (radix_enabled()) | 13 | if (radix_enabled()) |
| 14 | return !!(pmd_val(pmd) & _PAGE_PTE); | 14 | return !!(pmd_raw(pmd) & cpu_to_be64(_PAGE_PTE)); |
| 15 | return 0; | 15 | return 0; |
| 16 | } | 16 | } |
| 17 | 17 | ||
| @@ -21,7 +21,7 @@ static inline int pud_huge(pud_t pud) | |||
| 21 | * leaf pte for huge page | 21 | * leaf pte for huge page |
| 22 | */ | 22 | */ |
| 23 | if (radix_enabled()) | 23 | if (radix_enabled()) |
| 24 | return !!(pud_val(pud) & _PAGE_PTE); | 24 | return !!(pud_raw(pud) & cpu_to_be64(_PAGE_PTE)); |
| 25 | return 0; | 25 | return 0; |
| 26 | } | 26 | } |
| 27 | 27 | ||
| @@ -31,7 +31,7 @@ static inline int pgd_huge(pgd_t pgd) | |||
| 31 | * leaf pte for huge page | 31 | * leaf pte for huge page |
| 32 | */ | 32 | */ |
| 33 | if (radix_enabled()) | 33 | if (radix_enabled()) |
| 34 | return !!(pgd_val(pgd) & _PAGE_PTE); | 34 | return !!(pgd_raw(pgd) & cpu_to_be64(_PAGE_PTE)); |
| 35 | return 0; | 35 | return 0; |
| 36 | } | 36 | } |
| 37 | #define pgd_huge pgd_huge | 37 | #define pgd_huge pgd_huge |
diff --git a/arch/powerpc/include/asm/book3s/64/pgtable-64k.h b/arch/powerpc/include/asm/book3s/64/pgtable-64k.h index cb2d0a5fa3f8..0d2845b44763 100644 --- a/arch/powerpc/include/asm/book3s/64/pgtable-64k.h +++ b/arch/powerpc/include/asm/book3s/64/pgtable-64k.h | |||
| @@ -15,7 +15,7 @@ static inline int pmd_huge(pmd_t pmd) | |||
| 15 | /* | 15 | /* |
| 16 | * leaf pte for huge page | 16 | * leaf pte for huge page |
| 17 | */ | 17 | */ |
| 18 | return !!(pmd_val(pmd) & _PAGE_PTE); | 18 | return !!(pmd_raw(pmd) & cpu_to_be64(_PAGE_PTE)); |
| 19 | } | 19 | } |
| 20 | 20 | ||
| 21 | static inline int pud_huge(pud_t pud) | 21 | static inline int pud_huge(pud_t pud) |
| @@ -23,7 +23,7 @@ static inline int pud_huge(pud_t pud) | |||
| 23 | /* | 23 | /* |
| 24 | * leaf pte for huge page | 24 | * leaf pte for huge page |
| 25 | */ | 25 | */ |
| 26 | return !!(pud_val(pud) & _PAGE_PTE); | 26 | return !!(pud_raw(pud) & cpu_to_be64(_PAGE_PTE)); |
| 27 | } | 27 | } |
| 28 | 28 | ||
| 29 | static inline int pgd_huge(pgd_t pgd) | 29 | static inline int pgd_huge(pgd_t pgd) |
| @@ -31,7 +31,7 @@ static inline int pgd_huge(pgd_t pgd) | |||
| 31 | /* | 31 | /* |
| 32 | * leaf pte for huge page | 32 | * leaf pte for huge page |
| 33 | */ | 33 | */ |
| 34 | return !!(pgd_val(pgd) & _PAGE_PTE); | 34 | return !!(pgd_raw(pgd) & cpu_to_be64(_PAGE_PTE)); |
| 35 | } | 35 | } |
| 36 | #define pgd_huge pgd_huge | 36 | #define pgd_huge pgd_huge |
| 37 | 37 | ||
diff --git a/arch/powerpc/include/asm/book3s/64/pgtable.h b/arch/powerpc/include/asm/book3s/64/pgtable.h index ab84c89c9e98..263bf39ced40 100644 --- a/arch/powerpc/include/asm/book3s/64/pgtable.h +++ b/arch/powerpc/include/asm/book3s/64/pgtable.h | |||
| @@ -318,7 +318,7 @@ static inline int __ptep_test_and_clear_young(struct mm_struct *mm, | |||
| 318 | { | 318 | { |
| 319 | unsigned long old; | 319 | unsigned long old; |
| 320 | 320 | ||
| 321 | if ((pte_val(*ptep) & (_PAGE_ACCESSED | H_PAGE_HASHPTE)) == 0) | 321 | if ((pte_raw(*ptep) & cpu_to_be64(_PAGE_ACCESSED | H_PAGE_HASHPTE)) == 0) |
| 322 | return 0; | 322 | return 0; |
| 323 | old = pte_update(mm, addr, ptep, _PAGE_ACCESSED, 0, 0); | 323 | old = pte_update(mm, addr, ptep, _PAGE_ACCESSED, 0, 0); |
| 324 | return (old & _PAGE_ACCESSED) != 0; | 324 | return (old & _PAGE_ACCESSED) != 0; |
| @@ -336,8 +336,7 @@ static inline int __ptep_test_and_clear_young(struct mm_struct *mm, | |||
| 336 | static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, | 336 | static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, |
| 337 | pte_t *ptep) | 337 | pte_t *ptep) |
| 338 | { | 338 | { |
| 339 | 339 | if ((pte_raw(*ptep) & cpu_to_be64(_PAGE_WRITE)) == 0) | |
| 340 | if ((pte_val(*ptep) & _PAGE_WRITE) == 0) | ||
| 341 | return; | 340 | return; |
| 342 | 341 | ||
| 343 | pte_update(mm, addr, ptep, _PAGE_WRITE, 0, 0); | 342 | pte_update(mm, addr, ptep, _PAGE_WRITE, 0, 0); |
| @@ -346,7 +345,7 @@ static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, | |||
| 346 | static inline void huge_ptep_set_wrprotect(struct mm_struct *mm, | 345 | static inline void huge_ptep_set_wrprotect(struct mm_struct *mm, |
| 347 | unsigned long addr, pte_t *ptep) | 346 | unsigned long addr, pte_t *ptep) |
| 348 | { | 347 | { |
| 349 | if ((pte_val(*ptep) & _PAGE_WRITE) == 0) | 348 | if ((pte_raw(*ptep) & cpu_to_be64(_PAGE_WRITE)) == 0) |
| 350 | return; | 349 | return; |
| 351 | 350 | ||
| 352 | pte_update(mm, addr, ptep, _PAGE_WRITE, 0, 1); | 351 | pte_update(mm, addr, ptep, _PAGE_WRITE, 0, 1); |
| @@ -365,17 +364,35 @@ static inline void pte_clear(struct mm_struct *mm, unsigned long addr, | |||
| 365 | { | 364 | { |
| 366 | pte_update(mm, addr, ptep, ~0UL, 0, 0); | 365 | pte_update(mm, addr, ptep, ~0UL, 0, 0); |
| 367 | } | 366 | } |
| 368 | static inline int pte_write(pte_t pte) { return !!(pte_val(pte) & _PAGE_WRITE);} | 367 | |
| 369 | static inline int pte_dirty(pte_t pte) { return !!(pte_val(pte) & _PAGE_DIRTY); } | 368 | static inline int pte_write(pte_t pte) |
| 370 | static inline int pte_young(pte_t pte) { return !!(pte_val(pte) & _PAGE_ACCESSED); } | 369 | { |
| 371 | static inline int pte_special(pte_t pte) { return !!(pte_val(pte) & _PAGE_SPECIAL); } | 370 | return !!(pte_raw(pte) & cpu_to_be64(_PAGE_WRITE)); |
| 371 | } | ||
| 372 | |||
| 373 | static inline int pte_dirty(pte_t pte) | ||
| 374 | { | ||
| 375 | return !!(pte_raw(pte) & cpu_to_be64(_PAGE_DIRTY)); | ||
| 376 | } | ||
| 377 | |||
| 378 | static inline int pte_young(pte_t pte) | ||
| 379 | { | ||
| 380 | return !!(pte_raw(pte) & cpu_to_be64(_PAGE_ACCESSED)); | ||
| 381 | } | ||
| 382 | |||
| 383 | static inline int pte_special(pte_t pte) | ||
| 384 | { | ||
| 385 | return !!(pte_raw(pte) & cpu_to_be64(_PAGE_SPECIAL)); | ||
| 386 | } | ||
| 387 | |||
| 372 | static inline pgprot_t pte_pgprot(pte_t pte) { return __pgprot(pte_val(pte) & PAGE_PROT_BITS); } | 388 | static inline pgprot_t pte_pgprot(pte_t pte) { return __pgprot(pte_val(pte) & PAGE_PROT_BITS); } |
| 373 | 389 | ||
| 374 | #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY | 390 | #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY |
| 375 | static inline bool pte_soft_dirty(pte_t pte) | 391 | static inline bool pte_soft_dirty(pte_t pte) |
| 376 | { | 392 | { |
| 377 | return !!(pte_val(pte) & _PAGE_SOFT_DIRTY); | 393 | return !!(pte_raw(pte) & cpu_to_be64(_PAGE_SOFT_DIRTY)); |
| 378 | } | 394 | } |
| 395 | |||
| 379 | static inline pte_t pte_mksoft_dirty(pte_t pte) | 396 | static inline pte_t pte_mksoft_dirty(pte_t pte) |
| 380 | { | 397 | { |
| 381 | return __pte(pte_val(pte) | _PAGE_SOFT_DIRTY); | 398 | return __pte(pte_val(pte) | _PAGE_SOFT_DIRTY); |
| @@ -395,14 +412,14 @@ static inline pte_t pte_clear_soft_dirty(pte_t pte) | |||
| 395 | */ | 412 | */ |
| 396 | static inline int pte_protnone(pte_t pte) | 413 | static inline int pte_protnone(pte_t pte) |
| 397 | { | 414 | { |
| 398 | return (pte_val(pte) & (_PAGE_PRESENT | _PAGE_PRIVILEGED)) == | 415 | return (pte_raw(pte) & cpu_to_be64(_PAGE_PRESENT | _PAGE_PRIVILEGED)) == |
| 399 | (_PAGE_PRESENT | _PAGE_PRIVILEGED); | 416 | cpu_to_be64(_PAGE_PRESENT | _PAGE_PRIVILEGED); |
| 400 | } | 417 | } |
| 401 | #endif /* CONFIG_NUMA_BALANCING */ | 418 | #endif /* CONFIG_NUMA_BALANCING */ |
| 402 | 419 | ||
| 403 | static inline int pte_present(pte_t pte) | 420 | static inline int pte_present(pte_t pte) |
| 404 | { | 421 | { |
| 405 | return !!(pte_val(pte) & _PAGE_PRESENT); | 422 | return !!(pte_raw(pte) & cpu_to_be64(_PAGE_PRESENT)); |
| 406 | } | 423 | } |
| 407 | /* | 424 | /* |
| 408 | * Conversion functions: convert a page and protection to a page entry, | 425 | * Conversion functions: convert a page and protection to a page entry, |
| @@ -474,7 +491,7 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) | |||
| 474 | 491 | ||
| 475 | static inline bool pte_user(pte_t pte) | 492 | static inline bool pte_user(pte_t pte) |
| 476 | { | 493 | { |
| 477 | return !(pte_val(pte) & _PAGE_PRIVILEGED); | 494 | return !(pte_raw(pte) & cpu_to_be64(_PAGE_PRIVILEGED)); |
| 478 | } | 495 | } |
| 479 | 496 | ||
| 480 | /* Encode and de-code a swap entry */ | 497 | /* Encode and de-code a swap entry */ |
| @@ -517,10 +534,12 @@ static inline pte_t pte_swp_mksoft_dirty(pte_t pte) | |||
| 517 | { | 534 | { |
| 518 | return __pte(pte_val(pte) | _PAGE_SWP_SOFT_DIRTY); | 535 | return __pte(pte_val(pte) | _PAGE_SWP_SOFT_DIRTY); |
| 519 | } | 536 | } |
| 537 | |||
| 520 | static inline bool pte_swp_soft_dirty(pte_t pte) | 538 | static inline bool pte_swp_soft_dirty(pte_t pte) |
| 521 | { | 539 | { |
| 522 | return !!(pte_val(pte) & _PAGE_SWP_SOFT_DIRTY); | 540 | return !!(pte_raw(pte) & cpu_to_be64(_PAGE_SWP_SOFT_DIRTY)); |
| 523 | } | 541 | } |
| 542 | |||
| 524 | static inline pte_t pte_swp_clear_soft_dirty(pte_t pte) | 543 | static inline pte_t pte_swp_clear_soft_dirty(pte_t pte) |
| 525 | { | 544 | { |
| 526 | return __pte(pte_val(pte) & ~_PAGE_SWP_SOFT_DIRTY); | 545 | return __pte(pte_val(pte) & ~_PAGE_SWP_SOFT_DIRTY); |
| @@ -626,8 +645,16 @@ static inline void pmd_clear(pmd_t *pmdp) | |||
| 626 | *pmdp = __pmd(0); | 645 | *pmdp = __pmd(0); |
| 627 | } | 646 | } |
| 628 | 647 | ||
| 629 | #define pmd_none(pmd) (!pmd_val(pmd)) | 648 | static inline int pmd_none(pmd_t pmd) |
| 630 | #define pmd_present(pmd) (!pmd_none(pmd)) | 649 | { |
| 650 | return !pmd_raw(pmd); | ||
| 651 | } | ||
| 652 | |||
| 653 | static inline int pmd_present(pmd_t pmd) | ||
| 654 | { | ||
| 655 | |||
| 656 | return !pmd_none(pmd); | ||
| 657 | } | ||
| 631 | 658 | ||
| 632 | static inline int pmd_bad(pmd_t pmd) | 659 | static inline int pmd_bad(pmd_t pmd) |
| 633 | { | 660 | { |
| @@ -646,19 +673,26 @@ static inline void pud_clear(pud_t *pudp) | |||
| 646 | *pudp = __pud(0); | 673 | *pudp = __pud(0); |
| 647 | } | 674 | } |
| 648 | 675 | ||
| 649 | #define pud_none(pud) (!pud_val(pud)) | 676 | static inline int pud_none(pud_t pud) |
| 650 | #define pud_present(pud) (pud_val(pud) != 0) | 677 | { |
| 678 | return !pud_raw(pud); | ||
| 679 | } | ||
| 680 | |||
| 681 | static inline int pud_present(pud_t pud) | ||
| 682 | { | ||
| 683 | return !pud_none(pud); | ||
| 684 | } | ||
| 651 | 685 | ||
| 652 | extern struct page *pud_page(pud_t pud); | 686 | extern struct page *pud_page(pud_t pud); |
| 653 | extern struct page *pmd_page(pmd_t pmd); | 687 | extern struct page *pmd_page(pmd_t pmd); |
| 654 | static inline pte_t pud_pte(pud_t pud) | 688 | static inline pte_t pud_pte(pud_t pud) |
| 655 | { | 689 | { |
| 656 | return __pte(pud_val(pud)); | 690 | return __pte_raw(pud_raw(pud)); |
| 657 | } | 691 | } |
| 658 | 692 | ||
| 659 | static inline pud_t pte_pud(pte_t pte) | 693 | static inline pud_t pte_pud(pte_t pte) |
| 660 | { | 694 | { |
| 661 | return __pud(pte_val(pte)); | 695 | return __pud_raw(pte_raw(pte)); |
| 662 | } | 696 | } |
| 663 | #define pud_write(pud) pte_write(pud_pte(pud)) | 697 | #define pud_write(pud) pte_write(pud_pte(pud)) |
| 664 | 698 | ||
| @@ -681,17 +715,24 @@ static inline void pgd_clear(pgd_t *pgdp) | |||
| 681 | *pgdp = __pgd(0); | 715 | *pgdp = __pgd(0); |
| 682 | } | 716 | } |
| 683 | 717 | ||
| 684 | #define pgd_none(pgd) (!pgd_val(pgd)) | 718 | static inline int pgd_none(pgd_t pgd) |
| 685 | #define pgd_present(pgd) (!pgd_none(pgd)) | 719 | { |
| 720 | return !pgd_raw(pgd); | ||
| 721 | } | ||
| 722 | |||
| 723 | static inline int pgd_present(pgd_t pgd) | ||
| 724 | { | ||
| 725 | return !pgd_none(pgd); | ||
| 726 | } | ||
| 686 | 727 | ||
| 687 | static inline pte_t pgd_pte(pgd_t pgd) | 728 | static inline pte_t pgd_pte(pgd_t pgd) |
| 688 | { | 729 | { |
| 689 | return __pte(pgd_val(pgd)); | 730 | return __pte_raw(pgd_raw(pgd)); |
| 690 | } | 731 | } |
| 691 | 732 | ||
| 692 | static inline pgd_t pte_pgd(pte_t pte) | 733 | static inline pgd_t pte_pgd(pte_t pte) |
| 693 | { | 734 | { |
| 694 | return __pgd(pte_val(pte)); | 735 | return __pgd_raw(pte_raw(pte)); |
| 695 | } | 736 | } |
| 696 | 737 | ||
| 697 | static inline int pgd_bad(pgd_t pgd) | 738 | static inline int pgd_bad(pgd_t pgd) |
| @@ -783,12 +824,12 @@ struct page *realmode_pfn_to_page(unsigned long pfn); | |||
| 783 | 824 | ||
| 784 | static inline pte_t pmd_pte(pmd_t pmd) | 825 | static inline pte_t pmd_pte(pmd_t pmd) |
| 785 | { | 826 | { |
| 786 | return __pte(pmd_val(pmd)); | 827 | return __pte_raw(pmd_raw(pmd)); |
| 787 | } | 828 | } |
| 788 | 829 | ||
| 789 | static inline pmd_t pte_pmd(pte_t pte) | 830 | static inline pmd_t pte_pmd(pte_t pte) |
| 790 | { | 831 | { |
| 791 | return __pmd(pte_val(pte)); | 832 | return __pmd_raw(pte_raw(pte)); |
| 792 | } | 833 | } |
| 793 | 834 | ||
| 794 | static inline pte_t *pmdp_ptep(pmd_t *pmd) | 835 | static inline pte_t *pmdp_ptep(pmd_t *pmd) |
| @@ -849,7 +890,7 @@ pmd_hugepage_update(struct mm_struct *mm, unsigned long addr, pmd_t *pmdp, | |||
| 849 | 890 | ||
| 850 | static inline int pmd_large(pmd_t pmd) | 891 | static inline int pmd_large(pmd_t pmd) |
| 851 | { | 892 | { |
| 852 | return !!(pmd_val(pmd) & _PAGE_PTE); | 893 | return !!(pmd_raw(pmd) & cpu_to_be64(_PAGE_PTE)); |
| 853 | } | 894 | } |
| 854 | 895 | ||
| 855 | static inline pmd_t pmd_mknotpresent(pmd_t pmd) | 896 | static inline pmd_t pmd_mknotpresent(pmd_t pmd) |
| @@ -865,7 +906,7 @@ static inline int __pmdp_test_and_clear_young(struct mm_struct *mm, | |||
| 865 | { | 906 | { |
| 866 | unsigned long old; | 907 | unsigned long old; |
| 867 | 908 | ||
| 868 | if ((pmd_val(*pmdp) & (_PAGE_ACCESSED | H_PAGE_HASHPTE)) == 0) | 909 | if ((pmd_raw(*pmdp) & cpu_to_be64(_PAGE_ACCESSED | H_PAGE_HASHPTE)) == 0) |
| 869 | return 0; | 910 | return 0; |
| 870 | old = pmd_hugepage_update(mm, addr, pmdp, _PAGE_ACCESSED, 0); | 911 | old = pmd_hugepage_update(mm, addr, pmdp, _PAGE_ACCESSED, 0); |
| 871 | return ((old & _PAGE_ACCESSED) != 0); | 912 | return ((old & _PAGE_ACCESSED) != 0); |
| @@ -876,7 +917,7 @@ static inline void pmdp_set_wrprotect(struct mm_struct *mm, unsigned long addr, | |||
| 876 | pmd_t *pmdp) | 917 | pmd_t *pmdp) |
| 877 | { | 918 | { |
| 878 | 919 | ||
| 879 | if ((pmd_val(*pmdp) & _PAGE_WRITE) == 0) | 920 | if ((pmd_raw(*pmdp) & cpu_to_be64(_PAGE_WRITE)) == 0) |
| 880 | return; | 921 | return; |
| 881 | 922 | ||
| 882 | pmd_hugepage_update(mm, addr, pmdp, _PAGE_WRITE, 0); | 923 | pmd_hugepage_update(mm, addr, pmdp, _PAGE_WRITE, 0); |
diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h b/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h index 3fa94fcac628..00703e7e4c94 100644 --- a/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h +++ b/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h | |||
| @@ -32,5 +32,7 @@ extern void radix__flush_tlb_pwc(struct mmu_gather *tlb, unsigned long addr); | |||
| 32 | #define radix___flush_tlb_page(mm,addr,p,i) radix___local_flush_tlb_page(mm,addr,p,i) | 32 | #define radix___flush_tlb_page(mm,addr,p,i) radix___local_flush_tlb_page(mm,addr,p,i) |
| 33 | #define radix__flush_tlb_pwc(tlb, addr) radix__local_flush_tlb_pwc(tlb, addr) | 33 | #define radix__flush_tlb_pwc(tlb, addr) radix__local_flush_tlb_pwc(tlb, addr) |
| 34 | #endif | 34 | #endif |
| 35 | 35 | extern void radix__flush_tlb_lpid_va(unsigned long lpid, unsigned long gpa, | |
| 36 | unsigned long page_size); | ||
| 37 | extern void radix__flush_tlb_lpid(unsigned long lpid); | ||
| 36 | #endif | 38 | #endif |
diff --git a/arch/powerpc/include/asm/code-patching.h b/arch/powerpc/include/asm/code-patching.h index 994c60a857ce..2015b072422c 100644 --- a/arch/powerpc/include/asm/code-patching.h +++ b/arch/powerpc/include/asm/code-patching.h | |||
| @@ -49,8 +49,7 @@ void __patch_exception(int exc, unsigned long addr); | |||
| 49 | 49 | ||
| 50 | static inline unsigned long ppc_function_entry(void *func) | 50 | static inline unsigned long ppc_function_entry(void *func) |
| 51 | { | 51 | { |
| 52 | #if defined(CONFIG_PPC64) | 52 | #ifdef PPC64_ELF_ABI_v2 |
| 53 | #if defined(_CALL_ELF) && _CALL_ELF == 2 | ||
| 54 | u32 *insn = func; | 53 | u32 *insn = func; |
| 55 | 54 | ||
| 56 | /* | 55 | /* |
| @@ -75,14 +74,13 @@ static inline unsigned long ppc_function_entry(void *func) | |||
| 75 | return (unsigned long)(insn + 2); | 74 | return (unsigned long)(insn + 2); |
| 76 | else | 75 | else |
| 77 | return (unsigned long)func; | 76 | return (unsigned long)func; |
| 78 | #else | 77 | #elif defined(PPC64_ELF_ABI_v1) |
| 79 | /* | 78 | /* |
| 80 | * On PPC64 ABIv1 the function pointer actually points to the | 79 | * On PPC64 ABIv1 the function pointer actually points to the |
| 81 | * function's descriptor. The first entry in the descriptor is the | 80 | * function's descriptor. The first entry in the descriptor is the |
| 82 | * address of the function text. | 81 | * address of the function text. |
| 83 | */ | 82 | */ |
| 84 | return ((func_descr_t *)func)->entry; | 83 | return ((func_descr_t *)func)->entry; |
| 85 | #endif | ||
| 86 | #else | 84 | #else |
| 87 | return (unsigned long)func; | 85 | return (unsigned long)func; |
| 88 | #endif | 86 | #endif |
| @@ -90,7 +88,7 @@ static inline unsigned long ppc_function_entry(void *func) | |||
| 90 | 88 | ||
| 91 | static inline unsigned long ppc_global_function_entry(void *func) | 89 | static inline unsigned long ppc_global_function_entry(void *func) |
| 92 | { | 90 | { |
| 93 | #if defined(CONFIG_PPC64) && defined(_CALL_ELF) && _CALL_ELF == 2 | 91 | #ifdef PPC64_ELF_ABI_v2 |
| 94 | /* PPC64 ABIv2 the global entry point is at the address */ | 92 | /* PPC64 ABIv2 the global entry point is at the address */ |
| 95 | return (unsigned long)func; | 93 | return (unsigned long)func; |
| 96 | #else | 94 | #else |
| @@ -106,7 +104,7 @@ static inline unsigned long ppc_global_function_entry(void *func) | |||
| 106 | */ | 104 | */ |
| 107 | 105 | ||
| 108 | /* This must match the definition of STK_GOT in <asm/ppc_asm.h> */ | 106 | /* This must match the definition of STK_GOT in <asm/ppc_asm.h> */ |
| 109 | #if defined(_CALL_ELF) && _CALL_ELF == 2 | 107 | #ifdef PPC64_ELF_ABI_v2 |
| 110 | #define R2_STACK_OFFSET 24 | 108 | #define R2_STACK_OFFSET 24 |
| 111 | #else | 109 | #else |
| 112 | #define R2_STACK_OFFSET 40 | 110 | #define R2_STACK_OFFSET 40 |
diff --git a/arch/powerpc/include/asm/cpufeature.h b/arch/powerpc/include/asm/cpufeature.h new file mode 100644 index 000000000000..19e6290699ea --- /dev/null +++ b/arch/powerpc/include/asm/cpufeature.h | |||
| @@ -0,0 +1,40 @@ | |||
| 1 | /* | ||
| 2 | * CPU feature definitions for module loading, used by | ||
| 3 | * module_cpu_feature_match(), see asm/cputable.h for powerpc CPU features. | ||
| 4 | * | ||
| 5 | * Copyright 2016 Alastair D'Silva, IBM Corporation. | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or | ||
| 8 | * modify it under the terms of the GNU General Public License | ||
| 9 | * as published by the Free Software Foundation; either version | ||
| 10 | * 2 of the License, or (at your option) any later version. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #ifndef __ASM_POWERPC_CPUFEATURE_H | ||
| 14 | #define __ASM_POWERPC_CPUFEATURE_H | ||
| 15 | |||
| 16 | #include <asm/cputable.h> | ||
| 17 | |||
| 18 | /* Keep these in step with powerpc/include/asm/cputable.h */ | ||
| 19 | #define MAX_CPU_FEATURES (2 * 32) | ||
| 20 | |||
| 21 | /* | ||
| 22 | * Currently we don't have a need for any of the feature bits defined in | ||
| 23 | * cpu_user_features. When we do, they should be defined such as: | ||
| 24 | * | ||
| 25 | * #define PPC_MODULE_FEATURE_32 (ilog2(PPC_FEATURE_32)) | ||
| 26 | */ | ||
| 27 | |||
| 28 | #define PPC_MODULE_FEATURE_VEC_CRYPTO (32 + ilog2(PPC_FEATURE2_VEC_CRYPTO)) | ||
| 29 | |||
| 30 | #define cpu_feature(x) (x) | ||
| 31 | |||
| 32 | static inline bool cpu_have_feature(unsigned int num) | ||
| 33 | { | ||
| 34 | if (num < 32) | ||
| 35 | return !!(cur_cpu_spec->cpu_user_features & 1UL << num); | ||
| 36 | else | ||
| 37 | return !!(cur_cpu_spec->cpu_user_features2 & 1UL << (num - 32)); | ||
| 38 | } | ||
| 39 | |||
| 40 | #endif /* __ASM_POWERPC_CPUFEATURE_H */ | ||
diff --git a/arch/powerpc/include/asm/cpuidle.h b/arch/powerpc/include/asm/cpuidle.h index d2f99ca1e3a6..3d7fc06532a1 100644 --- a/arch/powerpc/include/asm/cpuidle.h +++ b/arch/powerpc/include/asm/cpuidle.h | |||
| @@ -13,6 +13,8 @@ | |||
| 13 | #ifndef __ASSEMBLY__ | 13 | #ifndef __ASSEMBLY__ |
| 14 | extern u32 pnv_fastsleep_workaround_at_entry[]; | 14 | extern u32 pnv_fastsleep_workaround_at_entry[]; |
| 15 | extern u32 pnv_fastsleep_workaround_at_exit[]; | 15 | extern u32 pnv_fastsleep_workaround_at_exit[]; |
| 16 | |||
| 17 | extern u64 pnv_first_deep_stop_state; | ||
| 16 | #endif | 18 | #endif |
| 17 | 19 | ||
| 18 | #endif | 20 | #endif |
diff --git a/arch/powerpc/include/asm/cputime.h b/arch/powerpc/include/asm/cputime.h index e2452550bcb1..2dfd4fc41f3e 100644 --- a/arch/powerpc/include/asm/cputime.h +++ b/arch/powerpc/include/asm/cputime.h | |||
| @@ -90,11 +90,10 @@ static inline void setup_cputime_one_jiffy(void) | |||
| 90 | static inline cputime64_t jiffies64_to_cputime64(const u64 jif) | 90 | static inline cputime64_t jiffies64_to_cputime64(const u64 jif) |
| 91 | { | 91 | { |
| 92 | u64 ct; | 92 | u64 ct; |
| 93 | u64 sec; | 93 | u64 sec = jif; |
| 94 | 94 | ||
| 95 | /* have to be a little careful about overflow */ | 95 | /* have to be a little careful about overflow */ |
| 96 | ct = jif % HZ; | 96 | ct = do_div(sec, HZ); |
| 97 | sec = jif / HZ; | ||
| 98 | if (ct) { | 97 | if (ct) { |
| 99 | ct *= tb_ticks_per_sec; | 98 | ct *= tb_ticks_per_sec; |
| 100 | do_div(ct, HZ); | 99 | do_div(ct, HZ); |
| @@ -230,7 +229,16 @@ static inline cputime_t clock_t_to_cputime(const unsigned long clk) | |||
| 230 | 229 | ||
| 231 | #define cputime64_to_clock_t(ct) cputime_to_clock_t((cputime_t)(ct)) | 230 | #define cputime64_to_clock_t(ct) cputime_to_clock_t((cputime_t)(ct)) |
| 232 | 231 | ||
| 232 | /* | ||
| 233 | * PPC64 uses PACA which is task independent for storing accounting data while | ||
| 234 | * PPC32 uses struct thread_info, therefore at task switch the accounting data | ||
| 235 | * has to be populated in the new task | ||
| 236 | */ | ||
| 237 | #ifdef CONFIG_PPC64 | ||
| 233 | static inline void arch_vtime_task_switch(struct task_struct *tsk) { } | 238 | static inline void arch_vtime_task_switch(struct task_struct *tsk) { } |
| 239 | #else | ||
| 240 | void arch_vtime_task_switch(struct task_struct *tsk); | ||
| 241 | #endif | ||
| 234 | 242 | ||
| 235 | #endif /* __KERNEL__ */ | 243 | #endif /* __KERNEL__ */ |
| 236 | #endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ | 244 | #endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ |
diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h index fb9f376ae27b..8e37b71674f4 100644 --- a/arch/powerpc/include/asm/eeh.h +++ b/arch/powerpc/include/asm/eeh.h | |||
| @@ -57,7 +57,7 @@ struct pci_dn; | |||
| 57 | /* | 57 | /* |
| 58 | * The struct is used to trace PE related EEH functionality. | 58 | * The struct is used to trace PE related EEH functionality. |
| 59 | * In theory, there will have one instance of the struct to | 59 | * In theory, there will have one instance of the struct to |
| 60 | * be created against particular PE. In nature, PEs corelate | 60 | * be created against particular PE. In nature, PEs correlate |
| 61 | * to each other. the struct has to reflect that hierarchy in | 61 | * to each other. the struct has to reflect that hierarchy in |
| 62 | * order to easily pick up those affected PEs when one particular | 62 | * order to easily pick up those affected PEs when one particular |
| 63 | * PE has EEH errors. | 63 | * PE has EEH errors. |
| @@ -274,7 +274,7 @@ void eeh_pe_restore_bars(struct eeh_pe *pe); | |||
| 274 | const char *eeh_pe_loc_get(struct eeh_pe *pe); | 274 | const char *eeh_pe_loc_get(struct eeh_pe *pe); |
| 275 | struct pci_bus *eeh_pe_bus_get(struct eeh_pe *pe); | 275 | struct pci_bus *eeh_pe_bus_get(struct eeh_pe *pe); |
| 276 | 276 | ||
| 277 | void *eeh_dev_init(struct pci_dn *pdn, void *data); | 277 | struct eeh_dev *eeh_dev_init(struct pci_dn *pdn); |
| 278 | void eeh_dev_phb_init_dynamic(struct pci_controller *phb); | 278 | void eeh_dev_phb_init_dynamic(struct pci_controller *phb); |
| 279 | int eeh_init(void); | 279 | int eeh_init(void); |
| 280 | int __init eeh_ops_register(struct eeh_ops *ops); | 280 | int __init eeh_ops_register(struct eeh_ops *ops); |
diff --git a/arch/powerpc/include/asm/exception-64s.h b/arch/powerpc/include/asm/exception-64s.h index 93ae809fe5ea..bed66e5743b3 100644 --- a/arch/powerpc/include/asm/exception-64s.h +++ b/arch/powerpc/include/asm/exception-64s.h | |||
| @@ -287,7 +287,7 @@ do_kvm_##n: \ | |||
| 287 | std r0,GPR0(r1); /* save r0 in stackframe */ \ | 287 | std r0,GPR0(r1); /* save r0 in stackframe */ \ |
| 288 | std r10,GPR1(r1); /* save r1 in stackframe */ \ | 288 | std r10,GPR1(r1); /* save r1 in stackframe */ \ |
| 289 | beq 4f; /* if from kernel mode */ \ | 289 | beq 4f; /* if from kernel mode */ \ |
| 290 | ACCOUNT_CPU_USER_ENTRY(r9, r10); \ | 290 | ACCOUNT_CPU_USER_ENTRY(r13, r9, r10); \ |
| 291 | SAVE_PPR(area, r9, r10); \ | 291 | SAVE_PPR(area, r9, r10); \ |
| 292 | 4: EXCEPTION_PROLOG_COMMON_2(area) \ | 292 | 4: EXCEPTION_PROLOG_COMMON_2(area) \ |
| 293 | EXCEPTION_PROLOG_COMMON_3(n) \ | 293 | EXCEPTION_PROLOG_COMMON_3(n) \ |
| @@ -403,6 +403,8 @@ label##_relon_hv: \ | |||
| 403 | #define SOFTEN_VALUE_0xe82 PACA_IRQ_DBELL | 403 | #define SOFTEN_VALUE_0xe82 PACA_IRQ_DBELL |
| 404 | #define SOFTEN_VALUE_0xe60 PACA_IRQ_HMI | 404 | #define SOFTEN_VALUE_0xe60 PACA_IRQ_HMI |
| 405 | #define SOFTEN_VALUE_0xe62 PACA_IRQ_HMI | 405 | #define SOFTEN_VALUE_0xe62 PACA_IRQ_HMI |
| 406 | #define SOFTEN_VALUE_0xea0 PACA_IRQ_EE | ||
| 407 | #define SOFTEN_VALUE_0xea2 PACA_IRQ_EE | ||
| 406 | 408 | ||
| 407 | #define __SOFTEN_TEST(h, vec) \ | 409 | #define __SOFTEN_TEST(h, vec) \ |
| 408 | lbz r10,PACASOFTIRQEN(r13); \ | 410 | lbz r10,PACASOFTIRQEN(r13); \ |
diff --git a/arch/powerpc/include/asm/feature-fixups.h b/arch/powerpc/include/asm/feature-fixups.h index 9a67a38bf7b9..57fec8ac7b92 100644 --- a/arch/powerpc/include/asm/feature-fixups.h +++ b/arch/powerpc/include/asm/feature-fixups.h | |||
| @@ -184,4 +184,8 @@ label##3: \ | |||
| 184 | FTR_ENTRY_OFFSET label##1b-label##3b; \ | 184 | FTR_ENTRY_OFFSET label##1b-label##3b; \ |
| 185 | .popsection; | 185 | .popsection; |
| 186 | 186 | ||
| 187 | #ifndef __ASSEMBLY__ | ||
| 188 | void apply_feature_fixups(void); | ||
| 189 | #endif | ||
| 190 | |||
| 187 | #endif /* __ASM_POWERPC_FEATURE_FIXUPS_H */ | 191 | #endif /* __ASM_POWERPC_FEATURE_FIXUPS_H */ |
diff --git a/arch/powerpc/include/asm/firmware.h b/arch/powerpc/include/asm/firmware.h index b0629249778b..1e0b5a5d660a 100644 --- a/arch/powerpc/include/asm/firmware.h +++ b/arch/powerpc/include/asm/firmware.h | |||
| @@ -126,6 +126,12 @@ extern int fwnmi_active; | |||
| 126 | 126 | ||
| 127 | extern unsigned int __start___fw_ftr_fixup, __stop___fw_ftr_fixup; | 127 | extern unsigned int __start___fw_ftr_fixup, __stop___fw_ftr_fixup; |
| 128 | 128 | ||
| 129 | #ifdef CONFIG_PPC_PSERIES | ||
| 130 | void pseries_probe_fw_features(void); | ||
| 131 | #else | ||
| 132 | static inline void pseries_probe_fw_features(void) { }; | ||
| 133 | #endif | ||
| 134 | |||
| 129 | #endif /* __ASSEMBLY__ */ | 135 | #endif /* __ASSEMBLY__ */ |
| 130 | #endif /* __KERNEL__ */ | 136 | #endif /* __KERNEL__ */ |
| 131 | #endif /* __ASM_POWERPC_FIRMWARE_H */ | 137 | #endif /* __ASM_POWERPC_FIRMWARE_H */ |
diff --git a/arch/powerpc/include/asm/fixmap.h b/arch/powerpc/include/asm/fixmap.h index 90f604bbcd19..4508b322f2cd 100644 --- a/arch/powerpc/include/asm/fixmap.h +++ b/arch/powerpc/include/asm/fixmap.h | |||
| @@ -51,6 +51,13 @@ enum fixed_addresses { | |||
| 51 | FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */ | 51 | FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */ |
| 52 | FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1, | 52 | FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1, |
| 53 | #endif | 53 | #endif |
| 54 | #ifdef CONFIG_PPC_8xx | ||
| 55 | /* For IMMR we need an aligned 512K area */ | ||
| 56 | #define FIX_IMMR_SIZE (512 * 1024 / PAGE_SIZE) | ||
| 57 | FIX_IMMR_START, | ||
| 58 | FIX_IMMR_BASE = __ALIGN_MASK(FIX_IMMR_START, FIX_IMMR_SIZE - 1) - 1 + | ||
| 59 | FIX_IMMR_SIZE, | ||
| 60 | #endif | ||
| 54 | /* FIX_PCIE_MCFG, */ | 61 | /* FIX_PCIE_MCFG, */ |
| 55 | __end_of_fixed_addresses | 62 | __end_of_fixed_addresses |
| 56 | }; | 63 | }; |
diff --git a/arch/powerpc/include/asm/ftrace.h b/arch/powerpc/include/asm/ftrace.h index 50ca7585abe2..686c5f70eb84 100644 --- a/arch/powerpc/include/asm/ftrace.h +++ b/arch/powerpc/include/asm/ftrace.h | |||
| @@ -1,6 +1,8 @@ | |||
| 1 | #ifndef _ASM_POWERPC_FTRACE | 1 | #ifndef _ASM_POWERPC_FTRACE |
| 2 | #define _ASM_POWERPC_FTRACE | 2 | #define _ASM_POWERPC_FTRACE |
| 3 | 3 | ||
| 4 | #include <asm/types.h> | ||
| 5 | |||
| 4 | #ifdef CONFIG_FUNCTION_TRACER | 6 | #ifdef CONFIG_FUNCTION_TRACER |
| 5 | #define MCOUNT_ADDR ((unsigned long)(_mcount)) | 7 | #define MCOUNT_ADDR ((unsigned long)(_mcount)) |
| 6 | #define MCOUNT_INSN_SIZE 4 /* sizeof mcount call */ | 8 | #define MCOUNT_INSN_SIZE 4 /* sizeof mcount call */ |
| @@ -65,8 +67,8 @@ struct dyn_arch_ftrace { | |||
| 65 | #endif | 67 | #endif |
| 66 | #endif | 68 | #endif |
| 67 | 69 | ||
| 68 | #if defined(CONFIG_FTRACE_SYSCALLS) && defined(CONFIG_PPC64) && !defined(__ASSEMBLY__) | 70 | #if defined(CONFIG_FTRACE_SYSCALLS) && !defined(__ASSEMBLY__) |
| 69 | #if !defined(_CALL_ELF) || _CALL_ELF != 2 | 71 | #ifdef PPC64_ELF_ABI_v1 |
| 70 | #define ARCH_HAS_SYSCALL_MATCH_SYM_NAME | 72 | #define ARCH_HAS_SYSCALL_MATCH_SYM_NAME |
| 71 | static inline bool arch_syscall_match_sym_name(const char *sym, const char *name) | 73 | static inline bool arch_syscall_match_sym_name(const char *sym, const char *name) |
| 72 | { | 74 | { |
| @@ -79,6 +81,6 @@ static inline bool arch_syscall_match_sym_name(const char *sym, const char *name | |||
| 79 | return !strcmp(sym + 4, name + 3); | 81 | return !strcmp(sym + 4, name + 3); |
| 80 | } | 82 | } |
| 81 | #endif | 83 | #endif |
| 82 | #endif /* CONFIG_FTRACE_SYSCALLS && CONFIG_PPC64 && !__ASSEMBLY__ */ | 84 | #endif /* CONFIG_FTRACE_SYSCALLS && !__ASSEMBLY__ */ |
| 83 | 85 | ||
| 84 | #endif /* _ASM_POWERPC_FTRACE */ | 86 | #endif /* _ASM_POWERPC_FTRACE */ |
diff --git a/arch/powerpc/include/asm/hvcall.h b/arch/powerpc/include/asm/hvcall.h index 0bc9c284aa10..708edebcf147 100644 --- a/arch/powerpc/include/asm/hvcall.h +++ b/arch/powerpc/include/asm/hvcall.h | |||
| @@ -431,17 +431,6 @@ static inline unsigned long cmo_get_page_size(void) | |||
| 431 | { | 431 | { |
| 432 | return CMO_PageSize; | 432 | return CMO_PageSize; |
| 433 | } | 433 | } |
| 434 | |||
| 435 | extern long pSeries_enable_reloc_on_exc(void); | ||
| 436 | extern long pSeries_disable_reloc_on_exc(void); | ||
| 437 | |||
| 438 | extern long pseries_big_endian_exceptions(void); | ||
| 439 | |||
| 440 | #else | ||
| 441 | |||
| 442 | #define pSeries_enable_reloc_on_exc() do {} while (0) | ||
| 443 | #define pSeries_disable_reloc_on_exc() do {} while (0) | ||
| 444 | |||
| 445 | #endif /* CONFIG_PPC_PSERIES */ | 434 | #endif /* CONFIG_PPC_PSERIES */ |
| 446 | 435 | ||
| 447 | #endif /* __ASSEMBLY__ */ | 436 | #endif /* __ASSEMBLY__ */ |
diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc/include/asm/hw_irq.h index b59ac27a6b7d..c7d82ff62a33 100644 --- a/arch/powerpc/include/asm/hw_irq.h +++ b/arch/powerpc/include/asm/hw_irq.h | |||
| @@ -130,6 +130,8 @@ static inline bool arch_irq_disabled_regs(struct pt_regs *regs) | |||
| 130 | 130 | ||
| 131 | extern bool prep_irq_for_idle(void); | 131 | extern bool prep_irq_for_idle(void); |
| 132 | 132 | ||
| 133 | extern void force_external_irq_replay(void); | ||
| 134 | |||
| 133 | #else /* CONFIG_PPC64 */ | 135 | #else /* CONFIG_PPC64 */ |
| 134 | 136 | ||
| 135 | #define SET_MSR_EE(x) mtmsr(x) | 137 | #define SET_MSR_EE(x) mtmsr(x) |
diff --git a/arch/powerpc/include/asm/iommu.h b/arch/powerpc/include/asm/iommu.h index 7b87bab09564..f49a72a9062d 100644 --- a/arch/powerpc/include/asm/iommu.h +++ b/arch/powerpc/include/asm/iommu.h | |||
| @@ -273,7 +273,6 @@ extern void iommu_init_early_pSeries(void); | |||
| 273 | extern void iommu_init_early_dart(struct pci_controller_ops *controller_ops); | 273 | extern void iommu_init_early_dart(struct pci_controller_ops *controller_ops); |
| 274 | extern void iommu_init_early_pasemi(void); | 274 | extern void iommu_init_early_pasemi(void); |
| 275 | 275 | ||
| 276 | extern void alloc_dart_table(void); | ||
| 277 | #if defined(CONFIG_PPC64) && defined(CONFIG_PM) | 276 | #if defined(CONFIG_PPC64) && defined(CONFIG_PM) |
| 278 | static inline void iommu_save(void) | 277 | static inline void iommu_save(void) |
| 279 | { | 278 | { |
diff --git a/arch/powerpc/include/asm/kprobes.h b/arch/powerpc/include/asm/kprobes.h index 039b583db029..2c9759bdb63b 100644 --- a/arch/powerpc/include/asm/kprobes.h +++ b/arch/powerpc/include/asm/kprobes.h | |||
| @@ -40,8 +40,7 @@ struct kprobe; | |||
| 40 | typedef ppc_opcode_t kprobe_opcode_t; | 40 | typedef ppc_opcode_t kprobe_opcode_t; |
| 41 | #define MAX_INSN_SIZE 1 | 41 | #define MAX_INSN_SIZE 1 |
| 42 | 42 | ||
| 43 | #ifdef CONFIG_PPC64 | 43 | #ifdef PPC64_ELF_ABI_v2 |
| 44 | #if defined(_CALL_ELF) && _CALL_ELF == 2 | ||
| 45 | /* PPC64 ABIv2 needs local entry point */ | 44 | /* PPC64 ABIv2 needs local entry point */ |
| 46 | #define kprobe_lookup_name(name, addr) \ | 45 | #define kprobe_lookup_name(name, addr) \ |
| 47 | { \ | 46 | { \ |
| @@ -49,7 +48,7 @@ typedef ppc_opcode_t kprobe_opcode_t; | |||
| 49 | if (addr) \ | 48 | if (addr) \ |
| 50 | addr = (kprobe_opcode_t *)ppc_function_entry(addr); \ | 49 | addr = (kprobe_opcode_t *)ppc_function_entry(addr); \ |
| 51 | } | 50 | } |
| 52 | #else | 51 | #elif defined(PPC64_ELF_ABI_v1) |
| 53 | /* | 52 | /* |
| 54 | * 64bit powerpc ABIv1 uses function descriptors: | 53 | * 64bit powerpc ABIv1 uses function descriptors: |
| 55 | * - Check for the dot variant of the symbol first. | 54 | * - Check for the dot variant of the symbol first. |
| @@ -92,8 +91,7 @@ typedef ppc_opcode_t kprobe_opcode_t; | |||
| 92 | addr = (kprobe_opcode_t *)kallsyms_lookup_name(name); \ | 91 | addr = (kprobe_opcode_t *)kallsyms_lookup_name(name); \ |
| 93 | } \ | 92 | } \ |
| 94 | } | 93 | } |
| 95 | #endif /* defined(_CALL_ELF) && _CALL_ELF == 2 */ | 94 | #endif |
| 96 | #endif /* CONFIG_PPC64 */ | ||
| 97 | 95 | ||
| 98 | #define flush_insn_slot(p) do { } while (0) | 96 | #define flush_insn_slot(p) do { } while (0) |
| 99 | #define kretprobe_blacklist_size 0 | 97 | #define kretprobe_blacklist_size 0 |
diff --git a/arch/powerpc/include/asm/kvm_book3s_asm.h b/arch/powerpc/include/asm/kvm_book3s_asm.h index 72b6225aca73..d318d432caa9 100644 --- a/arch/powerpc/include/asm/kvm_book3s_asm.h +++ b/arch/powerpc/include/asm/kvm_book3s_asm.h | |||
| @@ -162,7 +162,7 @@ struct kvmppc_book3s_shadow_vcpu { | |||
| 162 | 162 | ||
| 163 | /* Values for kvm_state */ | 163 | /* Values for kvm_state */ |
| 164 | #define KVM_HWTHREAD_IN_KERNEL 0 | 164 | #define KVM_HWTHREAD_IN_KERNEL 0 |
| 165 | #define KVM_HWTHREAD_IN_NAP 1 | 165 | #define KVM_HWTHREAD_IN_IDLE 1 |
| 166 | #define KVM_HWTHREAD_IN_KVM 2 | 166 | #define KVM_HWTHREAD_IN_KVM 2 |
| 167 | 167 | ||
| 168 | #endif /* __ASM_KVM_BOOK3S_ASM_H__ */ | 168 | #endif /* __ASM_KVM_BOOK3S_ASM_H__ */ |
diff --git a/arch/powerpc/include/asm/linkage.h b/arch/powerpc/include/asm/linkage.h index e3ad5c72724a..0cf5e21179fc 100644 --- a/arch/powerpc/include/asm/linkage.h +++ b/arch/powerpc/include/asm/linkage.h | |||
| @@ -1,8 +1,9 @@ | |||
| 1 | #ifndef _ASM_POWERPC_LINKAGE_H | 1 | #ifndef _ASM_POWERPC_LINKAGE_H |
| 2 | #define _ASM_POWERPC_LINKAGE_H | 2 | #define _ASM_POWERPC_LINKAGE_H |
| 3 | 3 | ||
| 4 | #ifdef CONFIG_PPC64 | 4 | #include <asm/types.h> |
| 5 | #if !defined(_CALL_ELF) || _CALL_ELF != 2 | 5 | |
| 6 | #ifdef PPC64_ELF_ABI_v1 | ||
| 6 | #define cond_syscall(x) \ | 7 | #define cond_syscall(x) \ |
| 7 | asm ("\t.weak " #x "\n\t.set " #x ", sys_ni_syscall\n" \ | 8 | asm ("\t.weak " #x "\n\t.set " #x ", sys_ni_syscall\n" \ |
| 8 | "\t.weak ." #x "\n\t.set ." #x ", .sys_ni_syscall\n") | 9 | "\t.weak ." #x "\n\t.set ." #x ", .sys_ni_syscall\n") |
| @@ -10,6 +11,5 @@ | |||
| 10 | asm ("\t.globl " #alias "\n\t.set " #alias ", " #name "\n" \ | 11 | asm ("\t.globl " #alias "\n\t.set " #alias ", " #name "\n" \ |
| 11 | "\t.globl ." #alias "\n\t.set ." #alias ", ." #name) | 12 | "\t.globl ." #alias "\n\t.set ." #alias ", ." #name) |
| 12 | #endif | 13 | #endif |
| 13 | #endif | ||
| 14 | 14 | ||
| 15 | #endif /* _ASM_POWERPC_LINKAGE_H */ | 15 | #endif /* _ASM_POWERPC_LINKAGE_H */ |
diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h index 6bdcd0da9e21..76f5398e7152 100644 --- a/arch/powerpc/include/asm/machdep.h +++ b/arch/powerpc/include/asm/machdep.h | |||
| @@ -34,42 +34,6 @@ struct pci_host_bridge; | |||
| 34 | struct machdep_calls { | 34 | struct machdep_calls { |
| 35 | char *name; | 35 | char *name; |
| 36 | #ifdef CONFIG_PPC64 | 36 | #ifdef CONFIG_PPC64 |
| 37 | void (*hpte_invalidate)(unsigned long slot, | ||
| 38 | unsigned long vpn, | ||
| 39 | int bpsize, int apsize, | ||
| 40 | int ssize, int local); | ||
| 41 | long (*hpte_updatepp)(unsigned long slot, | ||
| 42 | unsigned long newpp, | ||
| 43 | unsigned long vpn, | ||
| 44 | int bpsize, int apsize, | ||
| 45 | int ssize, unsigned long flags); | ||
| 46 | void (*hpte_updateboltedpp)(unsigned long newpp, | ||
| 47 | unsigned long ea, | ||
| 48 | int psize, int ssize); | ||
| 49 | long (*hpte_insert)(unsigned long hpte_group, | ||
| 50 | unsigned long vpn, | ||
| 51 | unsigned long prpn, | ||
| 52 | unsigned long rflags, | ||
| 53 | unsigned long vflags, | ||
| 54 | int psize, int apsize, | ||
| 55 | int ssize); | ||
| 56 | long (*hpte_remove)(unsigned long hpte_group); | ||
| 57 | int (*hpte_removebolted)(unsigned long ea, | ||
| 58 | int psize, int ssize); | ||
| 59 | void (*flush_hash_range)(unsigned long number, int local); | ||
| 60 | void (*hugepage_invalidate)(unsigned long vsid, | ||
| 61 | unsigned long addr, | ||
| 62 | unsigned char *hpte_slot_array, | ||
| 63 | int psize, int ssize, int local); | ||
| 64 | /* | ||
| 65 | * Special for kexec. | ||
| 66 | * To be called in real mode with interrupts disabled. No locks are | ||
| 67 | * taken as such, concurrent access on pre POWER5 hardware could result | ||
| 68 | * in a deadlock. | ||
| 69 | * The linear mapping is destroyed as well. | ||
| 70 | */ | ||
| 71 | void (*hpte_clear_all)(void); | ||
| 72 | |||
| 73 | void __iomem * (*ioremap)(phys_addr_t addr, unsigned long size, | 37 | void __iomem * (*ioremap)(phys_addr_t addr, unsigned long size, |
| 74 | unsigned long flags, void *caller); | 38 | unsigned long flags, void *caller); |
| 75 | void (*iounmap)(volatile void __iomem *token); | 39 | void (*iounmap)(volatile void __iomem *token); |
| @@ -89,7 +53,6 @@ struct machdep_calls { | |||
| 89 | 53 | ||
| 90 | int (*probe)(void); | 54 | int (*probe)(void); |
| 91 | void (*setup_arch)(void); /* Optional, may be NULL */ | 55 | void (*setup_arch)(void); /* Optional, may be NULL */ |
| 92 | void (*init_early)(void); | ||
| 93 | /* Optional, may be NULL. */ | 56 | /* Optional, may be NULL. */ |
| 94 | void (*show_cpuinfo)(struct seq_file *m); | 57 | void (*show_cpuinfo)(struct seq_file *m); |
| 95 | void (*show_percpuinfo)(struct seq_file *m, int i); | 58 | void (*show_percpuinfo)(struct seq_file *m, int i); |
| @@ -111,8 +74,8 @@ struct machdep_calls { | |||
| 111 | /* To setup PHBs when using automatic OF platform driver for PCI */ | 74 | /* To setup PHBs when using automatic OF platform driver for PCI */ |
| 112 | int (*pci_setup_phb)(struct pci_controller *host); | 75 | int (*pci_setup_phb)(struct pci_controller *host); |
| 113 | 76 | ||
| 114 | void (*restart)(char *cmd); | 77 | void __noreturn (*restart)(char *cmd); |
| 115 | void (*halt)(void); | 78 | void __noreturn (*halt)(void); |
| 116 | void (*panic)(char *str); | 79 | void (*panic)(char *str); |
| 117 | void (*cpu_die)(void); | 80 | void (*cpu_die)(void); |
| 118 | 81 | ||
| @@ -256,7 +219,8 @@ struct machdep_calls { | |||
| 256 | #ifdef CONFIG_ARCH_RANDOM | 219 | #ifdef CONFIG_ARCH_RANDOM |
| 257 | int (*get_random_seed)(unsigned long *v); | 220 | int (*get_random_seed)(unsigned long *v); |
| 258 | #endif | 221 | #endif |
| 259 | int (*update_partition_table)(u64); | 222 | int (*register_process_table)(unsigned long base, unsigned long page_size, |
| 223 | unsigned long tbl_size); | ||
| 260 | }; | 224 | }; |
| 261 | 225 | ||
| 262 | extern void e500_idle(void); | 226 | extern void e500_idle(void); |
diff --git a/arch/powerpc/include/asm/mmu-8xx.h b/arch/powerpc/include/asm/mmu-8xx.h index 0a566f15f985..3e0e4927811c 100644 --- a/arch/powerpc/include/asm/mmu-8xx.h +++ b/arch/powerpc/include/asm/mmu-8xx.h | |||
| @@ -169,6 +169,9 @@ typedef struct { | |||
| 169 | unsigned int active; | 169 | unsigned int active; |
| 170 | unsigned long vdso_base; | 170 | unsigned long vdso_base; |
| 171 | } mm_context_t; | 171 | } mm_context_t; |
| 172 | |||
| 173 | #define PHYS_IMMR_BASE (mfspr(SPRN_IMMR) & 0xfff80000) | ||
| 174 | #define VIRT_IMMR_BASE (__fix_to_virt(FIX_IMMR_BASE)) | ||
| 172 | #endif /* !__ASSEMBLY__ */ | 175 | #endif /* !__ASSEMBLY__ */ |
| 173 | 176 | ||
| 174 | #if defined(CONFIG_PPC_4K_PAGES) | 177 | #if defined(CONFIG_PPC_4K_PAGES) |
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h index e53ebebff474..54471228f7b8 100644 --- a/arch/powerpc/include/asm/mmu.h +++ b/arch/powerpc/include/asm/mmu.h | |||
| @@ -24,6 +24,11 @@ | |||
| 24 | /* | 24 | /* |
| 25 | * This is individual features | 25 | * This is individual features |
| 26 | */ | 26 | */ |
| 27 | /* | ||
| 28 | * We need to clear top 16bits of va (from the remaining 64 bits )in | ||
| 29 | * tlbie* instructions | ||
| 30 | */ | ||
| 31 | #define MMU_FTR_TLBIE_CROP_VA ASM_CONST(0x00008000) | ||
| 27 | 32 | ||
| 28 | /* Enable use of high BAT registers */ | 33 | /* Enable use of high BAT registers */ |
| 29 | #define MMU_FTR_USE_HIGH_BATS ASM_CONST(0x00010000) | 34 | #define MMU_FTR_USE_HIGH_BATS ASM_CONST(0x00010000) |
| @@ -97,7 +102,7 @@ | |||
| 97 | #define MMU_FTRS_DEFAULT_HPTE_ARCH_V2 \ | 102 | #define MMU_FTRS_DEFAULT_HPTE_ARCH_V2 \ |
| 98 | MMU_FTR_HPTE_TABLE | MMU_FTR_PPCAS_ARCH_V2 | 103 | MMU_FTR_HPTE_TABLE | MMU_FTR_PPCAS_ARCH_V2 |
| 99 | #define MMU_FTRS_POWER4 MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | 104 | #define MMU_FTRS_POWER4 MMU_FTRS_DEFAULT_HPTE_ARCH_V2 |
| 100 | #define MMU_FTRS_PPC970 MMU_FTRS_POWER4 | 105 | #define MMU_FTRS_PPC970 MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA |
| 101 | #define MMU_FTRS_POWER5 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE | 106 | #define MMU_FTRS_POWER5 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE |
| 102 | #define MMU_FTRS_POWER6 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE | 107 | #define MMU_FTRS_POWER6 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE |
| 103 | #define MMU_FTRS_POWER7 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE | 108 | #define MMU_FTRS_POWER7 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE |
| @@ -124,7 +129,7 @@ enum { | |||
| 124 | MMU_FTR_USE_TLBRSRV | MMU_FTR_USE_PAIRED_MAS | | 129 | MMU_FTR_USE_TLBRSRV | MMU_FTR_USE_PAIRED_MAS | |
| 125 | MMU_FTR_NO_SLBIE_B | MMU_FTR_16M_PAGE | MMU_FTR_TLBIEL | | 130 | MMU_FTR_NO_SLBIE_B | MMU_FTR_16M_PAGE | MMU_FTR_TLBIEL | |
| 126 | MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_CI_LARGE_PAGE | | 131 | MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_CI_LARGE_PAGE | |
| 127 | MMU_FTR_1T_SEGMENT | | 132 | MMU_FTR_1T_SEGMENT | MMU_FTR_TLBIE_CROP_VA | |
| 128 | #ifdef CONFIG_PPC_RADIX_MMU | 133 | #ifdef CONFIG_PPC_RADIX_MMU |
| 129 | MMU_FTR_RADIX | | 134 | MMU_FTR_RADIX | |
| 130 | #endif | 135 | #endif |
diff --git a/arch/powerpc/include/asm/mpc52xx.h b/arch/powerpc/include/asm/mpc52xx.h index 0acc7c7c28d1..e94cede14522 100644 --- a/arch/powerpc/include/asm/mpc52xx.h +++ b/arch/powerpc/include/asm/mpc52xx.h | |||
| @@ -275,7 +275,7 @@ extern int mpc5200_psc_ac97_gpio_reset(int psc_number); | |||
| 275 | extern void mpc52xx_map_common_devices(void); | 275 | extern void mpc52xx_map_common_devices(void); |
| 276 | extern int mpc52xx_set_psc_clkdiv(int psc_id, int clkdiv); | 276 | extern int mpc52xx_set_psc_clkdiv(int psc_id, int clkdiv); |
| 277 | extern unsigned int mpc52xx_get_xtal_freq(struct device_node *node); | 277 | extern unsigned int mpc52xx_get_xtal_freq(struct device_node *node); |
| 278 | extern void mpc52xx_restart(char *cmd); | 278 | extern void __noreturn mpc52xx_restart(char *cmd); |
| 279 | 279 | ||
| 280 | /* mpc52xx_gpt.c */ | 280 | /* mpc52xx_gpt.c */ |
| 281 | struct mpc52xx_gpt_priv; | 281 | struct mpc52xx_gpt_priv; |
diff --git a/arch/powerpc/include/asm/nohash/32/pte-44x.h b/arch/powerpc/include/asm/nohash/32/pte-44x.h index fdab41c654ef..0656ff81e5b0 100644 --- a/arch/powerpc/include/asm/nohash/32/pte-44x.h +++ b/arch/powerpc/include/asm/nohash/32/pte-44x.h | |||
| @@ -32,7 +32,7 @@ | |||
| 32 | * - - - - - - U0 U1 U2 U3 W I M G E - UX UW UR SX SW SR | 32 | * - - - - - - U0 U1 U2 U3 W I M G E - UX UW UR SX SW SR |
| 33 | * | 33 | * |
| 34 | * Newer 440 cores (440x6 as used on AMCC 460EX/460GT) have additional | 34 | * Newer 440 cores (440x6 as used on AMCC 460EX/460GT) have additional |
| 35 | * TLB2 storage attibute fields. Those are: | 35 | * TLB2 storage attribute fields. Those are: |
| 36 | * | 36 | * |
| 37 | * TLB2: | 37 | * TLB2: |
| 38 | * 0...10 11 12 13 14 15 16...31 | 38 | * 0...10 11 12 13 14 15 16...31 |
diff --git a/arch/powerpc/include/asm/nohash/64/pgtable-64k.h b/arch/powerpc/include/asm/nohash/64/pgtable-64k.h index 570fb30be21c..908324574f77 100644 --- a/arch/powerpc/include/asm/nohash/64/pgtable-64k.h +++ b/arch/powerpc/include/asm/nohash/64/pgtable-64k.h | |||
| @@ -23,6 +23,7 @@ | |||
| 23 | #ifndef __ASSEMBLY__ | 23 | #ifndef __ASSEMBLY__ |
| 24 | #define PTE_TABLE_SIZE PTE_FRAG_SIZE | 24 | #define PTE_TABLE_SIZE PTE_FRAG_SIZE |
| 25 | #define PMD_TABLE_SIZE (sizeof(pmd_t) << PMD_INDEX_SIZE) | 25 | #define PMD_TABLE_SIZE (sizeof(pmd_t) << PMD_INDEX_SIZE) |
| 26 | #define PUD_TABLE_SIZE (0) | ||
| 26 | #define PGD_TABLE_SIZE (sizeof(pgd_t) << PGD_INDEX_SIZE) | 27 | #define PGD_TABLE_SIZE (sizeof(pgd_t) << PGD_INDEX_SIZE) |
| 27 | #endif /* __ASSEMBLY__ */ | 28 | #endif /* __ASSEMBLY__ */ |
| 28 | 29 | ||
diff --git a/arch/powerpc/include/asm/opal-api.h b/arch/powerpc/include/asm/opal-api.h index 9bb8ddf0be37..0e2e57bcab50 100644 --- a/arch/powerpc/include/asm/opal-api.h +++ b/arch/powerpc/include/asm/opal-api.h | |||
| @@ -158,17 +158,33 @@ | |||
| 158 | #define OPAL_LEDS_SET_INDICATOR 115 | 158 | #define OPAL_LEDS_SET_INDICATOR 115 |
| 159 | #define OPAL_CEC_REBOOT2 116 | 159 | #define OPAL_CEC_REBOOT2 116 |
| 160 | #define OPAL_CONSOLE_FLUSH 117 | 160 | #define OPAL_CONSOLE_FLUSH 117 |
| 161 | #define OPAL_LAST 117 | 161 | #define OPAL_GET_DEVICE_TREE 118 |
| 162 | #define OPAL_PCI_GET_PRESENCE_STATE 119 | ||
| 163 | #define OPAL_PCI_GET_POWER_STATE 120 | ||
| 164 | #define OPAL_PCI_SET_POWER_STATE 121 | ||
| 165 | #define OPAL_INT_GET_XIRR 122 | ||
| 166 | #define OPAL_INT_SET_CPPR 123 | ||
| 167 | #define OPAL_INT_EOI 124 | ||
| 168 | #define OPAL_INT_SET_MFRR 125 | ||
| 169 | #define OPAL_PCI_TCE_KILL 126 | ||
| 170 | #define OPAL_LAST 126 | ||
| 162 | 171 | ||
| 163 | /* Device tree flags */ | 172 | /* Device tree flags */ |
| 164 | 173 | ||
| 165 | /* Flags set in power-mgmt nodes in device tree if | 174 | /* |
| 166 | * respective idle states are supported in the platform. | 175 | * Flags set in power-mgmt nodes in device tree describing |
| 176 | * idle states that are supported in the platform. | ||
| 167 | */ | 177 | */ |
| 178 | |||
| 179 | #define OPAL_PM_TIMEBASE_STOP 0x00000002 | ||
| 180 | #define OPAL_PM_LOSE_HYP_CONTEXT 0x00002000 | ||
| 181 | #define OPAL_PM_LOSE_FULL_CONTEXT 0x00004000 | ||
| 168 | #define OPAL_PM_NAP_ENABLED 0x00010000 | 182 | #define OPAL_PM_NAP_ENABLED 0x00010000 |
| 169 | #define OPAL_PM_SLEEP_ENABLED 0x00020000 | 183 | #define OPAL_PM_SLEEP_ENABLED 0x00020000 |
| 170 | #define OPAL_PM_WINKLE_ENABLED 0x00040000 | 184 | #define OPAL_PM_WINKLE_ENABLED 0x00040000 |
| 171 | #define OPAL_PM_SLEEP_ENABLED_ER1 0x00080000 /* with workaround */ | 185 | #define OPAL_PM_SLEEP_ENABLED_ER1 0x00080000 /* with workaround */ |
| 186 | #define OPAL_PM_STOP_INST_FAST 0x00100000 | ||
| 187 | #define OPAL_PM_STOP_INST_DEEP 0x00200000 | ||
| 172 | 188 | ||
| 173 | /* | 189 | /* |
| 174 | * OPAL_CONFIG_CPU_IDLE_STATE parameters | 190 | * OPAL_CONFIG_CPU_IDLE_STATE parameters |
| @@ -344,6 +360,18 @@ enum OpalPciResetState { | |||
| 344 | OPAL_ASSERT_RESET = 1 | 360 | OPAL_ASSERT_RESET = 1 |
| 345 | }; | 361 | }; |
| 346 | 362 | ||
| 363 | enum OpalPciSlotPresence { | ||
| 364 | OPAL_PCI_SLOT_EMPTY = 0, | ||
| 365 | OPAL_PCI_SLOT_PRESENT = 1 | ||
| 366 | }; | ||
| 367 | |||
| 368 | enum OpalPciSlotPower { | ||
| 369 | OPAL_PCI_SLOT_POWER_OFF = 0, | ||
| 370 | OPAL_PCI_SLOT_POWER_ON = 1, | ||
| 371 | OPAL_PCI_SLOT_OFFLINE = 2, | ||
| 372 | OPAL_PCI_SLOT_ONLINE = 3 | ||
| 373 | }; | ||
| 374 | |||
| 347 | enum OpalSlotLedType { | 375 | enum OpalSlotLedType { |
| 348 | OPAL_SLOT_LED_TYPE_ID = 0, /* IDENTIFY LED */ | 376 | OPAL_SLOT_LED_TYPE_ID = 0, /* IDENTIFY LED */ |
| 349 | OPAL_SLOT_LED_TYPE_FAULT = 1, /* FAULT LED */ | 377 | OPAL_SLOT_LED_TYPE_FAULT = 1, /* FAULT LED */ |
| @@ -802,7 +830,7 @@ struct opal_sg_entry { | |||
| 802 | }; | 830 | }; |
| 803 | 831 | ||
| 804 | /* | 832 | /* |
| 805 | * Candiate image SG list. | 833 | * Candidate image SG list. |
| 806 | * | 834 | * |
| 807 | * length = VER | length | 835 | * length = VER | length |
| 808 | */ | 836 | */ |
| @@ -825,6 +853,7 @@ enum { | |||
| 825 | OPAL_PHB_CAPI_MODE_CAPI = 1, | 853 | OPAL_PHB_CAPI_MODE_CAPI = 1, |
| 826 | OPAL_PHB_CAPI_MODE_SNOOP_OFF = 2, | 854 | OPAL_PHB_CAPI_MODE_SNOOP_OFF = 2, |
| 827 | OPAL_PHB_CAPI_MODE_SNOOP_ON = 3, | 855 | OPAL_PHB_CAPI_MODE_SNOOP_ON = 3, |
| 856 | OPAL_PHB_CAPI_MODE_DMA = 4, | ||
| 828 | }; | 857 | }; |
| 829 | 858 | ||
| 830 | /* OPAL I2C request */ | 859 | /* OPAL I2C request */ |
| @@ -852,7 +881,7 @@ struct opal_i2c_request { | |||
| 852 | * with individual elements being 16 bits wide to fetch the system | 881 | * with individual elements being 16 bits wide to fetch the system |
| 853 | * wide EPOW status. Each element in the buffer will contain the | 882 | * wide EPOW status. Each element in the buffer will contain the |
| 854 | * EPOW status in it's bit representation for a particular EPOW sub | 883 | * EPOW status in it's bit representation for a particular EPOW sub |
| 855 | * class as defiend here. So multiple detailed EPOW status bits | 884 | * class as defined here. So multiple detailed EPOW status bits |
| 856 | * specific for any sub class can be represented in a single buffer | 885 | * specific for any sub class can be represented in a single buffer |
| 857 | * element as it's bit representation. | 886 | * element as it's bit representation. |
| 858 | */ | 887 | */ |
| @@ -891,6 +920,13 @@ enum { | |||
| 891 | OPAL_REBOOT_PLATFORM_ERROR = 1, | 920 | OPAL_REBOOT_PLATFORM_ERROR = 1, |
| 892 | }; | 921 | }; |
| 893 | 922 | ||
| 923 | /* Argument to OPAL_PCI_TCE_KILL */ | ||
| 924 | enum { | ||
| 925 | OPAL_PCI_TCE_KILL_PAGES, | ||
| 926 | OPAL_PCI_TCE_KILL_PE, | ||
| 927 | OPAL_PCI_TCE_KILL_ALL, | ||
| 928 | }; | ||
| 929 | |||
| 894 | #endif /* __ASSEMBLY__ */ | 930 | #endif /* __ASSEMBLY__ */ |
| 895 | 931 | ||
| 896 | #endif /* __OPAL_API_H */ | 932 | #endif /* __OPAL_API_H */ |
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h index 9d86c6651716..ee05bd203630 100644 --- a/arch/powerpc/include/asm/opal.h +++ b/arch/powerpc/include/asm/opal.h | |||
| @@ -131,7 +131,7 @@ int64_t opal_pci_map_pe_dma_window(uint64_t phb_id, uint16_t pe_number, uint16_t | |||
| 131 | int64_t opal_pci_map_pe_dma_window_real(uint64_t phb_id, uint16_t pe_number, | 131 | int64_t opal_pci_map_pe_dma_window_real(uint64_t phb_id, uint16_t pe_number, |
| 132 | uint16_t dma_window_number, uint64_t pci_start_addr, | 132 | uint16_t dma_window_number, uint64_t pci_start_addr, |
| 133 | uint64_t pci_mem_size); | 133 | uint64_t pci_mem_size); |
| 134 | int64_t opal_pci_reset(uint64_t phb_id, uint8_t reset_scope, uint8_t assert_state); | 134 | int64_t opal_pci_reset(uint64_t id, uint8_t reset_scope, uint8_t assert_state); |
| 135 | 135 | ||
| 136 | int64_t opal_pci_get_hub_diag_data(uint64_t hub_id, void *diag_buffer, | 136 | int64_t opal_pci_get_hub_diag_data(uint64_t hub_id, void *diag_buffer, |
| 137 | uint64_t diag_buffer_len); | 137 | uint64_t diag_buffer_len); |
| @@ -148,7 +148,7 @@ int64_t opal_get_dpo_status(__be64 *dpo_timeout); | |||
| 148 | int64_t opal_set_system_attention_led(uint8_t led_action); | 148 | int64_t opal_set_system_attention_led(uint8_t led_action); |
| 149 | int64_t opal_pci_next_error(uint64_t phb_id, __be64 *first_frozen_pe, | 149 | int64_t opal_pci_next_error(uint64_t phb_id, __be64 *first_frozen_pe, |
| 150 | __be16 *pci_error_type, __be16 *severity); | 150 | __be16 *pci_error_type, __be16 *severity); |
| 151 | int64_t opal_pci_poll(uint64_t phb_id); | 151 | int64_t opal_pci_poll(uint64_t id); |
| 152 | int64_t opal_return_cpu(void); | 152 | int64_t opal_return_cpu(void); |
| 153 | int64_t opal_check_token(uint64_t token); | 153 | int64_t opal_check_token(uint64_t token); |
| 154 | int64_t opal_reinit_cpus(uint64_t flags); | 154 | int64_t opal_reinit_cpus(uint64_t flags); |
| @@ -178,6 +178,8 @@ int64_t opal_dump_ack(uint32_t dump_id); | |||
| 178 | int64_t opal_dump_resend_notification(void); | 178 | int64_t opal_dump_resend_notification(void); |
| 179 | 179 | ||
| 180 | int64_t opal_get_msg(uint64_t buffer, uint64_t size); | 180 | int64_t opal_get_msg(uint64_t buffer, uint64_t size); |
| 181 | int64_t opal_write_oppanel_async(uint64_t token, oppanel_line_t *lines, | ||
| 182 | uint64_t num_lines); | ||
| 181 | int64_t opal_check_completion(uint64_t buffer, uint64_t size, uint64_t token); | 183 | int64_t opal_check_completion(uint64_t buffer, uint64_t size, uint64_t token); |
| 182 | int64_t opal_sync_host_reboot(void); | 184 | int64_t opal_sync_host_reboot(void); |
| 183 | int64_t opal_get_param(uint64_t token, uint32_t param_id, uint64_t buffer, | 185 | int64_t opal_get_param(uint64_t token, uint32_t param_id, uint64_t buffer, |
| @@ -209,12 +211,30 @@ int64_t opal_flash_write(uint64_t id, uint64_t offset, uint64_t buf, | |||
| 209 | uint64_t size, uint64_t token); | 211 | uint64_t size, uint64_t token); |
| 210 | int64_t opal_flash_erase(uint64_t id, uint64_t offset, uint64_t size, | 212 | int64_t opal_flash_erase(uint64_t id, uint64_t offset, uint64_t size, |
| 211 | uint64_t token); | 213 | uint64_t token); |
| 214 | int64_t opal_get_device_tree(uint32_t phandle, uint64_t buf, uint64_t len); | ||
| 215 | int64_t opal_pci_get_presence_state(uint64_t id, uint64_t data); | ||
| 216 | int64_t opal_pci_get_power_state(uint64_t id, uint64_t data); | ||
| 217 | int64_t opal_pci_set_power_state(uint64_t async_token, uint64_t id, | ||
| 218 | uint64_t data); | ||
| 219 | int64_t opal_pci_poll2(uint64_t id, uint64_t data); | ||
| 220 | |||
| 221 | int64_t opal_int_get_xirr(uint32_t *out_xirr, bool just_poll); | ||
| 222 | int64_t opal_int_set_cppr(uint8_t cppr); | ||
| 223 | int64_t opal_int_eoi(uint32_t xirr); | ||
| 224 | int64_t opal_int_set_mfrr(uint32_t cpu, uint8_t mfrr); | ||
| 225 | int64_t opal_pci_tce_kill(uint64_t phb_id, uint32_t kill_type, | ||
| 226 | uint32_t pe_num, uint32_t tce_size, | ||
| 227 | uint64_t dma_addr, uint32_t npages); | ||
| 228 | int64_t opal_rm_pci_tce_kill(uint64_t phb_id, uint32_t kill_type, | ||
| 229 | uint32_t pe_num, uint32_t tce_size, | ||
| 230 | uint64_t dma_addr, uint32_t npages); | ||
| 212 | 231 | ||
| 213 | /* Internal functions */ | 232 | /* Internal functions */ |
| 214 | extern int early_init_dt_scan_opal(unsigned long node, const char *uname, | 233 | extern int early_init_dt_scan_opal(unsigned long node, const char *uname, |
| 215 | int depth, void *data); | 234 | int depth, void *data); |
| 216 | extern int early_init_dt_scan_recoverable_ranges(unsigned long node, | 235 | extern int early_init_dt_scan_recoverable_ranges(unsigned long node, |
| 217 | const char *uname, int depth, void *data); | 236 | const char *uname, int depth, void *data); |
| 237 | extern void opal_configure_cores(void); | ||
| 218 | 238 | ||
| 219 | extern int opal_get_chars(uint32_t vtermno, char *buf, int count); | 239 | extern int opal_get_chars(uint32_t vtermno, char *buf, int count); |
| 220 | extern int opal_put_chars(uint32_t vtermno, const char *buf, int total_len); | 240 | extern int opal_put_chars(uint32_t vtermno, const char *buf, int total_len); |
| @@ -276,6 +296,16 @@ extern int opal_error_code(int rc); | |||
| 276 | 296 | ||
| 277 | ssize_t opal_msglog_copy(char *to, loff_t pos, size_t count); | 297 | ssize_t opal_msglog_copy(char *to, loff_t pos, size_t count); |
| 278 | 298 | ||
| 299 | static inline int opal_get_async_rc(struct opal_msg msg) | ||
| 300 | { | ||
| 301 | if (msg.msg_type != OPAL_MSG_ASYNC_COMP) | ||
| 302 | return OPAL_PARAMETER; | ||
| 303 | else | ||
| 304 | return be64_to_cpu(msg.params[1]); | ||
| 305 | } | ||
| 306 | |||
| 307 | void opal_wake_poller(void); | ||
| 308 | |||
| 279 | #endif /* __ASSEMBLY__ */ | 309 | #endif /* __ASSEMBLY__ */ |
| 280 | 310 | ||
| 281 | #endif /* _ASM_POWERPC_OPAL_H */ | 311 | #endif /* _ASM_POWERPC_OPAL_H */ |
diff --git a/arch/powerpc/include/asm/paca.h b/arch/powerpc/include/asm/paca.h index 546540b91095..ad171e979ab0 100644 --- a/arch/powerpc/include/asm/paca.h +++ b/arch/powerpc/include/asm/paca.h | |||
| @@ -25,6 +25,7 @@ | |||
| 25 | #ifdef CONFIG_KVM_BOOK3S_64_HANDLER | 25 | #ifdef CONFIG_KVM_BOOK3S_64_HANDLER |
| 26 | #include <asm/kvm_book3s_asm.h> | 26 | #include <asm/kvm_book3s_asm.h> |
| 27 | #endif | 27 | #endif |
| 28 | #include <asm/accounting.h> | ||
| 28 | 29 | ||
| 29 | register struct paca_struct *local_paca asm("r13"); | 30 | register struct paca_struct *local_paca asm("r13"); |
| 30 | 31 | ||
| @@ -184,13 +185,7 @@ struct paca_struct { | |||
| 184 | #endif | 185 | #endif |
| 185 | 186 | ||
| 186 | /* Stuff for accurate time accounting */ | 187 | /* Stuff for accurate time accounting */ |
| 187 | u64 user_time; /* accumulated usermode TB ticks */ | 188 | struct cpu_accounting_data accounting; |
| 188 | u64 system_time; /* accumulated system TB ticks */ | ||
| 189 | u64 user_time_scaled; /* accumulated usermode SPURR ticks */ | ||
| 190 | u64 starttime; /* TB value snapshot */ | ||
| 191 | u64 starttime_user; /* TB value on exit to usermode */ | ||
| 192 | u64 startspurr; /* SPURR value snapshot */ | ||
| 193 | u64 utime_sspurr; /* ->user_time when ->startspurr set */ | ||
| 194 | u64 stolen_time; /* TB ticks taken by hypervisor */ | 189 | u64 stolen_time; /* TB ticks taken by hypervisor */ |
| 195 | u64 dtl_ridx; /* read index in dispatch log */ | 190 | u64 dtl_ridx; /* read index in dispatch log */ |
| 196 | struct dtl_entry *dtl_curr; /* pointer corresponding to dtl_ridx */ | 191 | struct dtl_entry *dtl_curr; /* pointer corresponding to dtl_ridx */ |
diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h index 51db3a37bced..56398e7e6100 100644 --- a/arch/powerpc/include/asm/page.h +++ b/arch/powerpc/include/asm/page.h | |||
| @@ -96,7 +96,7 @@ extern unsigned int HPAGE_SHIFT; | |||
| 96 | extern phys_addr_t memstart_addr; | 96 | extern phys_addr_t memstart_addr; |
| 97 | extern phys_addr_t kernstart_addr; | 97 | extern phys_addr_t kernstart_addr; |
| 98 | 98 | ||
| 99 | #ifdef CONFIG_RELOCATABLE_PPC32 | 99 | #if defined(CONFIG_RELOCATABLE) && defined(CONFIG_PPC32) |
| 100 | extern long long virt_phys_offset; | 100 | extern long long virt_phys_offset; |
| 101 | #endif | 101 | #endif |
| 102 | 102 | ||
| @@ -139,9 +139,9 @@ extern long long virt_phys_offset; | |||
| 139 | * determine MEMORY_START until then. However we can determine PHYSICAL_START | 139 | * determine MEMORY_START until then. However we can determine PHYSICAL_START |
| 140 | * from information at hand (program counter, TLB lookup). | 140 | * from information at hand (program counter, TLB lookup). |
| 141 | * | 141 | * |
| 142 | * On BookE with RELOCATABLE (RELOCATABLE_PPC32) | 142 | * On BookE with RELOCATABLE && PPC32 |
| 143 | * | 143 | * |
| 144 | * With RELOCATABLE_PPC32, we support loading the kernel at any physical | 144 | * With RELOCATABLE && PPC32, we support loading the kernel at any physical |
| 145 | * address without any restriction on the page alignment. | 145 | * address without any restriction on the page alignment. |
| 146 | * | 146 | * |
| 147 | * We find the runtime address of _stext and relocate ourselves based on | 147 | * We find the runtime address of _stext and relocate ourselves based on |
diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h index 467c0b05b6fb..b5e88e4a171a 100644 --- a/arch/powerpc/include/asm/pci-bridge.h +++ b/arch/powerpc/include/asm/pci-bridge.h | |||
| @@ -33,6 +33,8 @@ struct pci_controller_ops { | |||
| 33 | /* Called during PCI resource reassignment */ | 33 | /* Called during PCI resource reassignment */ |
| 34 | resource_size_t (*window_alignment)(struct pci_bus *bus, | 34 | resource_size_t (*window_alignment)(struct pci_bus *bus, |
| 35 | unsigned long type); | 35 | unsigned long type); |
| 36 | void (*setup_bridge)(struct pci_bus *bus, | ||
| 37 | unsigned long type); | ||
| 36 | void (*reset_secondary_bus)(struct pci_dev *pdev); | 38 | void (*reset_secondary_bus)(struct pci_dev *pdev); |
| 37 | 39 | ||
| 38 | #ifdef CONFIG_PCI_MSI | 40 | #ifdef CONFIG_PCI_MSI |
diff --git a/arch/powerpc/include/asm/pgtable-be-types.h b/arch/powerpc/include/asm/pgtable-be-types.h index e2bf208605b1..49c0a5a80efa 100644 --- a/arch/powerpc/include/asm/pgtable-be-types.h +++ b/arch/powerpc/include/asm/pgtable-be-types.h | |||
| @@ -6,6 +6,7 @@ | |||
| 6 | /* PTE level */ | 6 | /* PTE level */ |
| 7 | typedef struct { __be64 pte; } pte_t; | 7 | typedef struct { __be64 pte; } pte_t; |
| 8 | #define __pte(x) ((pte_t) { cpu_to_be64(x) }) | 8 | #define __pte(x) ((pte_t) { cpu_to_be64(x) }) |
| 9 | #define __pte_raw(x) ((pte_t) { (x) }) | ||
| 9 | static inline unsigned long pte_val(pte_t x) | 10 | static inline unsigned long pte_val(pte_t x) |
| 10 | { | 11 | { |
| 11 | return be64_to_cpu(x.pte); | 12 | return be64_to_cpu(x.pte); |
| @@ -20,6 +21,7 @@ static inline __be64 pte_raw(pte_t x) | |||
| 20 | #ifdef CONFIG_PPC64 | 21 | #ifdef CONFIG_PPC64 |
| 21 | typedef struct { __be64 pmd; } pmd_t; | 22 | typedef struct { __be64 pmd; } pmd_t; |
| 22 | #define __pmd(x) ((pmd_t) { cpu_to_be64(x) }) | 23 | #define __pmd(x) ((pmd_t) { cpu_to_be64(x) }) |
| 24 | #define __pmd_raw(x) ((pmd_t) { (x) }) | ||
| 23 | static inline unsigned long pmd_val(pmd_t x) | 25 | static inline unsigned long pmd_val(pmd_t x) |
| 24 | { | 26 | { |
| 25 | return be64_to_cpu(x.pmd); | 27 | return be64_to_cpu(x.pmd); |
| @@ -37,21 +39,34 @@ static inline __be64 pmd_raw(pmd_t x) | |||
| 37 | #if defined(CONFIG_PPC_BOOK3S_64) || !defined(CONFIG_PPC_64K_PAGES) | 39 | #if defined(CONFIG_PPC_BOOK3S_64) || !defined(CONFIG_PPC_64K_PAGES) |
| 38 | typedef struct { __be64 pud; } pud_t; | 40 | typedef struct { __be64 pud; } pud_t; |
| 39 | #define __pud(x) ((pud_t) { cpu_to_be64(x) }) | 41 | #define __pud(x) ((pud_t) { cpu_to_be64(x) }) |
| 42 | #define __pud_raw(x) ((pud_t) { (x) }) | ||
| 40 | static inline unsigned long pud_val(pud_t x) | 43 | static inline unsigned long pud_val(pud_t x) |
| 41 | { | 44 | { |
| 42 | return be64_to_cpu(x.pud); | 45 | return be64_to_cpu(x.pud); |
| 43 | } | 46 | } |
| 47 | |||
| 48 | static inline __be64 pud_raw(pud_t x) | ||
| 49 | { | ||
| 50 | return x.pud; | ||
| 51 | } | ||
| 52 | |||
| 44 | #endif /* CONFIG_PPC_BOOK3S_64 || !CONFIG_PPC_64K_PAGES */ | 53 | #endif /* CONFIG_PPC_BOOK3S_64 || !CONFIG_PPC_64K_PAGES */ |
| 45 | #endif /* CONFIG_PPC64 */ | 54 | #endif /* CONFIG_PPC64 */ |
| 46 | 55 | ||
| 47 | /* PGD level */ | 56 | /* PGD level */ |
| 48 | typedef struct { __be64 pgd; } pgd_t; | 57 | typedef struct { __be64 pgd; } pgd_t; |
| 49 | #define __pgd(x) ((pgd_t) { cpu_to_be64(x) }) | 58 | #define __pgd(x) ((pgd_t) { cpu_to_be64(x) }) |
| 59 | #define __pgd_raw(x) ((pgd_t) { (x) }) | ||
| 50 | static inline unsigned long pgd_val(pgd_t x) | 60 | static inline unsigned long pgd_val(pgd_t x) |
| 51 | { | 61 | { |
| 52 | return be64_to_cpu(x.pgd); | 62 | return be64_to_cpu(x.pgd); |
| 53 | } | 63 | } |
| 54 | 64 | ||
| 65 | static inline __be64 pgd_raw(pgd_t x) | ||
| 66 | { | ||
| 67 | return x.pgd; | ||
| 68 | } | ||
| 69 | |||
| 55 | /* Page protection bits */ | 70 | /* Page protection bits */ |
| 56 | typedef struct { unsigned long pgprot; } pgprot_t; | 71 | typedef struct { unsigned long pgprot; } pgprot_t; |
| 57 | #define pgprot_val(x) ((x).pgprot) | 72 | #define pgprot_val(x) ((x).pgprot) |
diff --git a/arch/powerpc/include/asm/pmac_feature.h b/arch/powerpc/include/asm/pmac_feature.h index 925697968946..e08e829261b6 100644 --- a/arch/powerpc/include/asm/pmac_feature.h +++ b/arch/powerpc/include/asm/pmac_feature.h | |||
| @@ -210,7 +210,7 @@ static inline long pmac_call_feature(int selector, struct device_node* node, | |||
| 210 | 210 | ||
| 211 | /* PMAC_FTR_SOUND_CHIP_ENABLE (struct device_node* node, 0, int value) | 211 | /* PMAC_FTR_SOUND_CHIP_ENABLE (struct device_node* node, 0, int value) |
| 212 | * enable/disable the sound chip, whatever it is and provided it can | 212 | * enable/disable the sound chip, whatever it is and provided it can |
| 213 | * acually be controlled | 213 | * actually be controlled |
| 214 | */ | 214 | */ |
| 215 | #define PMAC_FTR_SOUND_CHIP_ENABLE PMAC_FTR_DEF(9) | 215 | #define PMAC_FTR_SOUND_CHIP_ENABLE PMAC_FTR_DEF(9) |
| 216 | 216 | ||
diff --git a/arch/powerpc/include/asm/pnv-pci.h b/arch/powerpc/include/asm/pnv-pci.h index 6f77f71ee964..0cbd8134ce81 100644 --- a/arch/powerpc/include/asm/pnv-pci.h +++ b/arch/powerpc/include/asm/pnv-pci.h | |||
| @@ -11,7 +11,20 @@ | |||
| 11 | #define _ASM_PNV_PCI_H | 11 | #define _ASM_PNV_PCI_H |
| 12 | 12 | ||
| 13 | #include <linux/pci.h> | 13 | #include <linux/pci.h> |
| 14 | #include <linux/pci_hotplug.h> | ||
| 14 | #include <misc/cxl-base.h> | 15 | #include <misc/cxl-base.h> |
| 16 | #include <asm/opal-api.h> | ||
| 17 | |||
| 18 | #define PCI_SLOT_ID_PREFIX 0x8000000000000000 | ||
| 19 | #define PCI_SLOT_ID(phb_id, bdfn) \ | ||
| 20 | (PCI_SLOT_ID_PREFIX | ((uint64_t)(bdfn) << 16) | (phb_id)) | ||
| 21 | |||
| 22 | extern int pnv_pci_get_slot_id(struct device_node *np, uint64_t *id); | ||
| 23 | extern int pnv_pci_get_device_tree(uint32_t phandle, void *buf, uint64_t len); | ||
| 24 | extern int pnv_pci_get_presence_state(uint64_t id, uint8_t *state); | ||
| 25 | extern int pnv_pci_get_power_state(uint64_t id, uint8_t *state); | ||
| 26 | extern int pnv_pci_set_power_state(uint64_t id, uint8_t state, | ||
| 27 | struct opal_msg *msg); | ||
| 15 | 28 | ||
| 16 | int pnv_phb_to_cxl_mode(struct pci_dev *dev, uint64_t mode); | 29 | int pnv_phb_to_cxl_mode(struct pci_dev *dev, uint64_t mode); |
| 17 | int pnv_cxl_ioda_msi_setup(struct pci_dev *dev, unsigned int hwirq, | 30 | int pnv_cxl_ioda_msi_setup(struct pci_dev *dev, unsigned int hwirq, |
| @@ -26,6 +39,40 @@ int pnv_cxl_alloc_hwirq_ranges(struct cxl_irq_ranges *irqs, | |||
| 26 | struct pci_dev *dev, int num); | 39 | struct pci_dev *dev, int num); |
| 27 | void pnv_cxl_release_hwirq_ranges(struct cxl_irq_ranges *irqs, | 40 | void pnv_cxl_release_hwirq_ranges(struct cxl_irq_ranges *irqs, |
| 28 | struct pci_dev *dev); | 41 | struct pci_dev *dev); |
| 42 | |||
| 43 | /* Support for the cxl kernel api on the real PHB (instead of vPHB) */ | ||
| 44 | int pnv_cxl_enable_phb_kernel_api(struct pci_controller *hose, bool enable); | ||
| 45 | bool pnv_pci_on_cxl_phb(struct pci_dev *dev); | ||
| 46 | struct cxl_afu *pnv_cxl_phb_to_afu(struct pci_controller *hose); | ||
| 47 | void pnv_cxl_phb_set_peer_afu(struct pci_dev *dev, struct cxl_afu *afu); | ||
| 48 | |||
| 29 | #endif | 49 | #endif |
| 30 | 50 | ||
| 51 | struct pnv_php_slot { | ||
| 52 | struct hotplug_slot slot; | ||
| 53 | struct hotplug_slot_info slot_info; | ||
| 54 | uint64_t id; | ||
| 55 | char *name; | ||
| 56 | int slot_no; | ||
| 57 | struct kref kref; | ||
| 58 | #define PNV_PHP_STATE_INITIALIZED 0 | ||
| 59 | #define PNV_PHP_STATE_REGISTERED 1 | ||
| 60 | #define PNV_PHP_STATE_POPULATED 2 | ||
| 61 | #define PNV_PHP_STATE_OFFLINE 3 | ||
| 62 | int state; | ||
| 63 | struct device_node *dn; | ||
| 64 | struct pci_dev *pdev; | ||
| 65 | struct pci_bus *bus; | ||
| 66 | bool power_state_check; | ||
| 67 | void *fdt; | ||
| 68 | void *dt; | ||
| 69 | struct of_changeset ocs; | ||
| 70 | struct pnv_php_slot *parent; | ||
| 71 | struct list_head children; | ||
| 72 | struct list_head link; | ||
| 73 | }; | ||
| 74 | extern struct pnv_php_slot *pnv_php_find_slot(struct device_node *dn); | ||
| 75 | extern int pnv_php_set_slot_power_state(struct hotplug_slot *slot, | ||
| 76 | uint8_t state); | ||
| 77 | |||
| 31 | #endif | 78 | #endif |
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h index 49cd8760aa7c..127ebf5862b4 100644 --- a/arch/powerpc/include/asm/ppc-opcode.h +++ b/arch/powerpc/include/asm/ppc-opcode.h | |||
| @@ -131,6 +131,8 @@ | |||
| 131 | /* sorted alphabetically */ | 131 | /* sorted alphabetically */ |
| 132 | #define PPC_INST_BHRBE 0x7c00025c | 132 | #define PPC_INST_BHRBE 0x7c00025c |
| 133 | #define PPC_INST_CLRBHRB 0x7c00035c | 133 | #define PPC_INST_CLRBHRB 0x7c00035c |
| 134 | #define PPC_INST_COPY 0x7c00060c | ||
| 135 | #define PPC_INST_COPY_FIRST 0x7c20060c | ||
| 134 | #define PPC_INST_CP_ABORT 0x7c00068c | 136 | #define PPC_INST_CP_ABORT 0x7c00068c |
| 135 | #define PPC_INST_DCBA 0x7c0005ec | 137 | #define PPC_INST_DCBA 0x7c0005ec |
| 136 | #define PPC_INST_DCBA_MASK 0xfc0007fe | 138 | #define PPC_INST_DCBA_MASK 0xfc0007fe |
| @@ -142,9 +144,11 @@ | |||
| 142 | #define PPC_INST_ISEL 0x7c00001e | 144 | #define PPC_INST_ISEL 0x7c00001e |
| 143 | #define PPC_INST_ISEL_MASK 0xfc00003e | 145 | #define PPC_INST_ISEL_MASK 0xfc00003e |
| 144 | #define PPC_INST_LDARX 0x7c0000a8 | 146 | #define PPC_INST_LDARX 0x7c0000a8 |
| 147 | #define PPC_INST_STDCX 0x7c0001ad | ||
| 145 | #define PPC_INST_LSWI 0x7c0004aa | 148 | #define PPC_INST_LSWI 0x7c0004aa |
| 146 | #define PPC_INST_LSWX 0x7c00042a | 149 | #define PPC_INST_LSWX 0x7c00042a |
| 147 | #define PPC_INST_LWARX 0x7c000028 | 150 | #define PPC_INST_LWARX 0x7c000028 |
| 151 | #define PPC_INST_STWCX 0x7c00012d | ||
| 148 | #define PPC_INST_LWSYNC 0x7c2004ac | 152 | #define PPC_INST_LWSYNC 0x7c2004ac |
| 149 | #define PPC_INST_SYNC 0x7c0004ac | 153 | #define PPC_INST_SYNC 0x7c0004ac |
| 150 | #define PPC_INST_SYNC_MASK 0xfc0007fe | 154 | #define PPC_INST_SYNC_MASK 0xfc0007fe |
| @@ -159,6 +163,8 @@ | |||
| 159 | #define PPC_INST_MSGSNDP 0x7c00011c | 163 | #define PPC_INST_MSGSNDP 0x7c00011c |
| 160 | #define PPC_INST_MTTMR 0x7c0003dc | 164 | #define PPC_INST_MTTMR 0x7c0003dc |
| 161 | #define PPC_INST_NOP 0x60000000 | 165 | #define PPC_INST_NOP 0x60000000 |
| 166 | #define PPC_INST_PASTE 0x7c00070c | ||
| 167 | #define PPC_INST_PASTE_LAST 0x7c20070d | ||
| 162 | #define PPC_INST_POPCNTB 0x7c0000f4 | 168 | #define PPC_INST_POPCNTB 0x7c0000f4 |
| 163 | #define PPC_INST_POPCNTB_MASK 0xfc0007fe | 169 | #define PPC_INST_POPCNTB_MASK 0xfc0007fe |
| 164 | #define PPC_INST_POPCNTD 0x7c0003f4 | 170 | #define PPC_INST_POPCNTD 0x7c0003f4 |
| @@ -177,6 +183,7 @@ | |||
| 177 | #define PPC_INST_MFVSRD 0x7c000066 | 183 | #define PPC_INST_MFVSRD 0x7c000066 |
| 178 | #define PPC_INST_MTVSRD 0x7c000166 | 184 | #define PPC_INST_MTVSRD 0x7c000166 |
| 179 | #define PPC_INST_SLBFEE 0x7c0007a7 | 185 | #define PPC_INST_SLBFEE 0x7c0007a7 |
| 186 | #define PPC_INST_SLBIA 0x7c0003e4 | ||
| 180 | 187 | ||
| 181 | #define PPC_INST_STRING 0x7c00042a | 188 | #define PPC_INST_STRING 0x7c00042a |
| 182 | #define PPC_INST_STRING_MASK 0xfc0007fe | 189 | #define PPC_INST_STRING_MASK 0xfc0007fe |
| @@ -186,6 +193,7 @@ | |||
| 186 | #define PPC_INST_STSWX 0x7c00052a | 193 | #define PPC_INST_STSWX 0x7c00052a |
| 187 | #define PPC_INST_STXVD2X 0x7c000798 | 194 | #define PPC_INST_STXVD2X 0x7c000798 |
| 188 | #define PPC_INST_TLBIE 0x7c000264 | 195 | #define PPC_INST_TLBIE 0x7c000264 |
| 196 | #define PPC_INST_TLBIEL 0x7c000224 | ||
| 189 | #define PPC_INST_TLBILX 0x7c000024 | 197 | #define PPC_INST_TLBILX 0x7c000024 |
| 190 | #define PPC_INST_WAIT 0x7c00007c | 198 | #define PPC_INST_WAIT 0x7c00007c |
| 191 | #define PPC_INST_TLBIVAX 0x7c000624 | 199 | #define PPC_INST_TLBIVAX 0x7c000624 |
| @@ -203,6 +211,8 @@ | |||
| 203 | #define PPC_INST_SLEEP 0x4c0003a4 | 211 | #define PPC_INST_SLEEP 0x4c0003a4 |
| 204 | #define PPC_INST_WINKLE 0x4c0003e4 | 212 | #define PPC_INST_WINKLE 0x4c0003e4 |
| 205 | 213 | ||
| 214 | #define PPC_INST_STOP 0x4c0002e4 | ||
| 215 | |||
| 206 | /* A2 specific instructions */ | 216 | /* A2 specific instructions */ |
| 207 | #define PPC_INST_ERATWE 0x7c0001a6 | 217 | #define PPC_INST_ERATWE 0x7c0001a6 |
| 208 | #define PPC_INST_ERATRE 0x7c000166 | 218 | #define PPC_INST_ERATRE 0x7c000166 |
| @@ -215,8 +225,11 @@ | |||
| 215 | #define PPC_INST_LBZ 0x88000000 | 225 | #define PPC_INST_LBZ 0x88000000 |
| 216 | #define PPC_INST_LD 0xe8000000 | 226 | #define PPC_INST_LD 0xe8000000 |
| 217 | #define PPC_INST_LHZ 0xa0000000 | 227 | #define PPC_INST_LHZ 0xa0000000 |
| 218 | #define PPC_INST_LHBRX 0x7c00062c | ||
| 219 | #define PPC_INST_LWZ 0x80000000 | 228 | #define PPC_INST_LWZ 0x80000000 |
| 229 | #define PPC_INST_LHBRX 0x7c00062c | ||
| 230 | #define PPC_INST_LDBRX 0x7c000428 | ||
| 231 | #define PPC_INST_STB 0x98000000 | ||
| 232 | #define PPC_INST_STH 0xb0000000 | ||
| 220 | #define PPC_INST_STD 0xf8000000 | 233 | #define PPC_INST_STD 0xf8000000 |
| 221 | #define PPC_INST_STDU 0xf8000001 | 234 | #define PPC_INST_STDU 0xf8000001 |
| 222 | #define PPC_INST_STW 0x90000000 | 235 | #define PPC_INST_STW 0x90000000 |
| @@ -225,22 +238,34 @@ | |||
| 225 | #define PPC_INST_MTLR 0x7c0803a6 | 238 | #define PPC_INST_MTLR 0x7c0803a6 |
| 226 | #define PPC_INST_CMPWI 0x2c000000 | 239 | #define PPC_INST_CMPWI 0x2c000000 |
| 227 | #define PPC_INST_CMPDI 0x2c200000 | 240 | #define PPC_INST_CMPDI 0x2c200000 |
| 241 | #define PPC_INST_CMPW 0x7c000000 | ||
| 242 | #define PPC_INST_CMPD 0x7c200000 | ||
| 228 | #define PPC_INST_CMPLW 0x7c000040 | 243 | #define PPC_INST_CMPLW 0x7c000040 |
| 244 | #define PPC_INST_CMPLD 0x7c200040 | ||
| 229 | #define PPC_INST_CMPLWI 0x28000000 | 245 | #define PPC_INST_CMPLWI 0x28000000 |
| 246 | #define PPC_INST_CMPLDI 0x28200000 | ||
| 230 | #define PPC_INST_ADDI 0x38000000 | 247 | #define PPC_INST_ADDI 0x38000000 |
| 231 | #define PPC_INST_ADDIS 0x3c000000 | 248 | #define PPC_INST_ADDIS 0x3c000000 |
| 232 | #define PPC_INST_ADD 0x7c000214 | 249 | #define PPC_INST_ADD 0x7c000214 |
| 233 | #define PPC_INST_SUB 0x7c000050 | 250 | #define PPC_INST_SUB 0x7c000050 |
| 234 | #define PPC_INST_BLR 0x4e800020 | 251 | #define PPC_INST_BLR 0x4e800020 |
| 235 | #define PPC_INST_BLRL 0x4e800021 | 252 | #define PPC_INST_BLRL 0x4e800021 |
| 253 | #define PPC_INST_MULLD 0x7c0001d2 | ||
| 236 | #define PPC_INST_MULLW 0x7c0001d6 | 254 | #define PPC_INST_MULLW 0x7c0001d6 |
| 237 | #define PPC_INST_MULHWU 0x7c000016 | 255 | #define PPC_INST_MULHWU 0x7c000016 |
| 238 | #define PPC_INST_MULLI 0x1c000000 | 256 | #define PPC_INST_MULLI 0x1c000000 |
| 239 | #define PPC_INST_DIVWU 0x7c000396 | 257 | #define PPC_INST_DIVWU 0x7c000396 |
| 258 | #define PPC_INST_DIVD 0x7c0003d2 | ||
| 240 | #define PPC_INST_RLWINM 0x54000000 | 259 | #define PPC_INST_RLWINM 0x54000000 |
| 260 | #define PPC_INST_RLWIMI 0x50000000 | ||
| 261 | #define PPC_INST_RLDICL 0x78000000 | ||
| 241 | #define PPC_INST_RLDICR 0x78000004 | 262 | #define PPC_INST_RLDICR 0x78000004 |
| 242 | #define PPC_INST_SLW 0x7c000030 | 263 | #define PPC_INST_SLW 0x7c000030 |
| 264 | #define PPC_INST_SLD 0x7c000036 | ||
| 243 | #define PPC_INST_SRW 0x7c000430 | 265 | #define PPC_INST_SRW 0x7c000430 |
| 266 | #define PPC_INST_SRD 0x7c000436 | ||
| 267 | #define PPC_INST_SRAD 0x7c000634 | ||
| 268 | #define PPC_INST_SRADI 0x7c000674 | ||
| 244 | #define PPC_INST_AND 0x7c000038 | 269 | #define PPC_INST_AND 0x7c000038 |
| 245 | #define PPC_INST_ANDDOT 0x7c000039 | 270 | #define PPC_INST_ANDDOT 0x7c000039 |
| 246 | #define PPC_INST_OR 0x7c000378 | 271 | #define PPC_INST_OR 0x7c000378 |
| @@ -251,6 +276,7 @@ | |||
| 251 | #define PPC_INST_XORI 0x68000000 | 276 | #define PPC_INST_XORI 0x68000000 |
| 252 | #define PPC_INST_XORIS 0x6c000000 | 277 | #define PPC_INST_XORIS 0x6c000000 |
| 253 | #define PPC_INST_NEG 0x7c0000d0 | 278 | #define PPC_INST_NEG 0x7c0000d0 |
| 279 | #define PPC_INST_EXTSW 0x7c0007b4 | ||
| 254 | #define PPC_INST_BRANCH 0x48000000 | 280 | #define PPC_INST_BRANCH 0x48000000 |
| 255 | #define PPC_INST_BRANCH_COND 0x40800000 | 281 | #define PPC_INST_BRANCH_COND 0x40800000 |
| 256 | #define PPC_INST_LBZCIX 0x7c0006aa | 282 | #define PPC_INST_LBZCIX 0x7c0006aa |
| @@ -261,6 +287,9 @@ | |||
| 261 | #define ___PPC_RB(b) (((b) & 0x1f) << 11) | 287 | #define ___PPC_RB(b) (((b) & 0x1f) << 11) |
| 262 | #define ___PPC_RS(s) (((s) & 0x1f) << 21) | 288 | #define ___PPC_RS(s) (((s) & 0x1f) << 21) |
| 263 | #define ___PPC_RT(t) ___PPC_RS(t) | 289 | #define ___PPC_RT(t) ___PPC_RS(t) |
| 290 | #define ___PPC_R(r) (((r) & 0x1) << 16) | ||
| 291 | #define ___PPC_PRS(prs) (((prs) & 0x1) << 17) | ||
| 292 | #define ___PPC_RIC(ric) (((ric) & 0x3) << 18) | ||
| 264 | #define __PPC_RA(a) ___PPC_RA(__REG_##a) | 293 | #define __PPC_RA(a) ___PPC_RA(__REG_##a) |
| 265 | #define __PPC_RA0(a) ___PPC_RA(__REGA0_##a) | 294 | #define __PPC_RA0(a) ___PPC_RA(__REGA0_##a) |
| 266 | #define __PPC_RB(b) ___PPC_RB(__REG_##b) | 295 | #define __PPC_RB(b) ___PPC_RB(__REG_##b) |
| @@ -276,6 +305,8 @@ | |||
| 276 | #define __PPC_SH(s) __PPC_WS(s) | 305 | #define __PPC_SH(s) __PPC_WS(s) |
| 277 | #define __PPC_MB(s) (((s) & 0x1f) << 6) | 306 | #define __PPC_MB(s) (((s) & 0x1f) << 6) |
| 278 | #define __PPC_ME(s) (((s) & 0x1f) << 1) | 307 | #define __PPC_ME(s) (((s) & 0x1f) << 1) |
| 308 | #define __PPC_MB64(s) (__PPC_MB(s) | ((s) & 0x20)) | ||
| 309 | #define __PPC_ME64(s) __PPC_MB64(s) | ||
| 279 | #define __PPC_BI(s) (((s) & 0x1f) << 16) | 310 | #define __PPC_BI(s) (((s) & 0x1f) << 16) |
| 280 | #define __PPC_CT(t) (((t) & 0x0f) << 21) | 311 | #define __PPC_CT(t) (((t) & 0x0f) << 21) |
| 281 | 312 | ||
| @@ -325,6 +356,16 @@ | |||
| 325 | __PPC_WC(w)) | 356 | __PPC_WC(w)) |
| 326 | #define PPC_TLBIE(lp,a) stringify_in_c(.long PPC_INST_TLBIE | \ | 357 | #define PPC_TLBIE(lp,a) stringify_in_c(.long PPC_INST_TLBIE | \ |
| 327 | ___PPC_RB(a) | ___PPC_RS(lp)) | 358 | ___PPC_RB(a) | ___PPC_RS(lp)) |
| 359 | #define PPC_TLBIE_5(rb,rs,ric,prs,r) \ | ||
| 360 | stringify_in_c(.long PPC_INST_TLBIE | \ | ||
| 361 | ___PPC_RB(rb) | ___PPC_RS(rs) | \ | ||
| 362 | ___PPC_RIC(ric) | ___PPC_PRS(prs) | \ | ||
| 363 | ___PPC_R(r)) | ||
| 364 | #define PPC_TLBIEL(rb,rs,ric,prs,r) \ | ||
| 365 | stringify_in_c(.long PPC_INST_TLBIEL | \ | ||
| 366 | ___PPC_RB(rb) | ___PPC_RS(rs) | \ | ||
| 367 | ___PPC_RIC(ric) | ___PPC_PRS(prs) | \ | ||
| 368 | ___PPC_R(r)) | ||
| 328 | #define PPC_TLBSRX_DOT(a,b) stringify_in_c(.long PPC_INST_TLBSRX_DOT | \ | 369 | #define PPC_TLBSRX_DOT(a,b) stringify_in_c(.long PPC_INST_TLBSRX_DOT | \ |
| 329 | __PPC_RA0(a) | __PPC_RB(b)) | 370 | __PPC_RA0(a) | __PPC_RB(b)) |
| 330 | #define PPC_TLBIVAX(a,b) stringify_in_c(.long PPC_INST_TLBIVAX | \ | 371 | #define PPC_TLBIVAX(a,b) stringify_in_c(.long PPC_INST_TLBIVAX | \ |
| @@ -382,6 +423,8 @@ | |||
| 382 | #define PPC_SLEEP stringify_in_c(.long PPC_INST_SLEEP) | 423 | #define PPC_SLEEP stringify_in_c(.long PPC_INST_SLEEP) |
| 383 | #define PPC_WINKLE stringify_in_c(.long PPC_INST_WINKLE) | 424 | #define PPC_WINKLE stringify_in_c(.long PPC_INST_WINKLE) |
| 384 | 425 | ||
| 426 | #define PPC_STOP stringify_in_c(.long PPC_INST_STOP) | ||
| 427 | |||
| 385 | /* BHRB instructions */ | 428 | /* BHRB instructions */ |
| 386 | #define PPC_CLRBHRB stringify_in_c(.long PPC_INST_CLRBHRB) | 429 | #define PPC_CLRBHRB stringify_in_c(.long PPC_INST_CLRBHRB) |
| 387 | #define PPC_MFBHRBE(r, n) stringify_in_c(.long PPC_INST_BHRBE | \ | 430 | #define PPC_MFBHRBE(r, n) stringify_in_c(.long PPC_INST_BHRBE | \ |
| @@ -412,5 +455,7 @@ | |||
| 412 | ___PPC_RA(a) | \ | 455 | ___PPC_RA(a) | \ |
| 413 | ___PPC_RB(b)) | 456 | ___PPC_RB(b)) |
| 414 | 457 | ||
| 458 | #define PPC_SLBIA(IH) stringify_in_c(.long PPC_INST_SLBIA | \ | ||
| 459 | ((IH & 0x7) << 21)) | ||
| 415 | 460 | ||
| 416 | #endif /* _ASM_POWERPC_PPC_OPCODE_H */ | 461 | #endif /* _ASM_POWERPC_PPC_OPCODE_H */ |
diff --git a/arch/powerpc/include/asm/ppc-pci.h b/arch/powerpc/include/asm/ppc-pci.h index 8753e4eb9ab5..0f73de069f19 100644 --- a/arch/powerpc/include/asm/ppc-pci.h +++ b/arch/powerpc/include/asm/ppc-pci.h | |||
| @@ -39,8 +39,6 @@ void *pci_traverse_device_nodes(struct device_node *start, | |||
| 39 | void *traverse_pci_dn(struct pci_dn *root, | 39 | void *traverse_pci_dn(struct pci_dn *root, |
| 40 | void *(*fn)(struct pci_dn *, void *), | 40 | void *(*fn)(struct pci_dn *, void *), |
| 41 | void *data); | 41 | void *data); |
| 42 | |||
| 43 | extern void pci_devs_phb_init(void); | ||
| 44 | extern void pci_devs_phb_init_dynamic(struct pci_controller *phb); | 42 | extern void pci_devs_phb_init_dynamic(struct pci_controller *phb); |
| 45 | 43 | ||
| 46 | /* From rtas_pci.h */ | 44 | /* From rtas_pci.h */ |
diff --git a/arch/powerpc/include/asm/ppc4xx.h b/arch/powerpc/include/asm/ppc4xx.h index 033039a80c42..610a5119ad8c 100644 --- a/arch/powerpc/include/asm/ppc4xx.h +++ b/arch/powerpc/include/asm/ppc4xx.h | |||
| @@ -13,6 +13,6 @@ | |||
| 13 | #ifndef __ASM_POWERPC_PPC4xx_H__ | 13 | #ifndef __ASM_POWERPC_PPC4xx_H__ |
| 14 | #define __ASM_POWERPC_PPC4xx_H__ | 14 | #define __ASM_POWERPC_PPC4xx_H__ |
| 15 | 15 | ||
| 16 | extern void ppc4xx_reset_system(char *cmd); | 16 | extern void __noreturn ppc4xx_reset_system(char *cmd); |
| 17 | 17 | ||
| 18 | #endif /* __ASM_POWERPC_PPC4xx_H__ */ | 18 | #endif /* __ASM_POWERPC_PPC4xx_H__ */ |
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h index 051af612a7e1..d5d5b5e348f2 100644 --- a/arch/powerpc/include/asm/ppc_asm.h +++ b/arch/powerpc/include/asm/ppc_asm.h | |||
| @@ -24,27 +24,27 @@ | |||
| 24 | */ | 24 | */ |
| 25 | 25 | ||
| 26 | #ifndef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE | 26 | #ifndef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE |
| 27 | #define ACCOUNT_CPU_USER_ENTRY(ra, rb) | 27 | #define ACCOUNT_CPU_USER_ENTRY(ptr, ra, rb) |
| 28 | #define ACCOUNT_CPU_USER_EXIT(ra, rb) | 28 | #define ACCOUNT_CPU_USER_EXIT(ptr, ra, rb) |
| 29 | #define ACCOUNT_STOLEN_TIME | 29 | #define ACCOUNT_STOLEN_TIME |
| 30 | #else | 30 | #else |
| 31 | #define ACCOUNT_CPU_USER_ENTRY(ra, rb) \ | 31 | #define ACCOUNT_CPU_USER_ENTRY(ptr, ra, rb) \ |
| 32 | MFTB(ra); /* get timebase */ \ | 32 | MFTB(ra); /* get timebase */ \ |
| 33 | ld rb,PACA_STARTTIME_USER(r13); \ | 33 | PPC_LL rb, ACCOUNT_STARTTIME_USER(ptr); \ |
| 34 | std ra,PACA_STARTTIME(r13); \ | 34 | PPC_STL ra, ACCOUNT_STARTTIME(ptr); \ |
| 35 | subf rb,rb,ra; /* subtract start value */ \ | 35 | subf rb,rb,ra; /* subtract start value */ \ |
| 36 | ld ra,PACA_USER_TIME(r13); \ | 36 | PPC_LL ra, ACCOUNT_USER_TIME(ptr); \ |
| 37 | add ra,ra,rb; /* add on to user time */ \ | 37 | add ra,ra,rb; /* add on to user time */ \ |
| 38 | std ra,PACA_USER_TIME(r13); \ | 38 | PPC_STL ra, ACCOUNT_USER_TIME(ptr); \ |
| 39 | 39 | ||
| 40 | #define ACCOUNT_CPU_USER_EXIT(ra, rb) \ | 40 | #define ACCOUNT_CPU_USER_EXIT(ptr, ra, rb) \ |
| 41 | MFTB(ra); /* get timebase */ \ | 41 | MFTB(ra); /* get timebase */ \ |
| 42 | ld rb,PACA_STARTTIME(r13); \ | 42 | PPC_LL rb, ACCOUNT_STARTTIME(ptr); \ |
| 43 | std ra,PACA_STARTTIME_USER(r13); \ | 43 | PPC_STL ra, ACCOUNT_STARTTIME_USER(ptr); \ |
| 44 | subf rb,rb,ra; /* subtract start value */ \ | 44 | subf rb,rb,ra; /* subtract start value */ \ |
| 45 | ld ra,PACA_SYSTEM_TIME(r13); \ | 45 | PPC_LL ra, ACCOUNT_SYSTEM_TIME(ptr); \ |
| 46 | add ra,ra,rb; /* add on to system time */ \ | 46 | add ra,ra,rb; /* add on to system time */ \ |
| 47 | std ra,PACA_SYSTEM_TIME(r13) | 47 | PPC_STL ra, ACCOUNT_SYSTEM_TIME(ptr) |
| 48 | 48 | ||
| 49 | #ifdef CONFIG_PPC_SPLPAR | 49 | #ifdef CONFIG_PPC_SPLPAR |
| 50 | #define ACCOUNT_STOLEN_TIME \ | 50 | #define ACCOUNT_STOLEN_TIME \ |
| @@ -189,7 +189,7 @@ END_FW_FTR_SECTION_IFSET(FW_FEATURE_SPLPAR) | |||
| 189 | #define __STK_REG(i) (112 + ((i)-14)*8) | 189 | #define __STK_REG(i) (112 + ((i)-14)*8) |
| 190 | #define STK_REG(i) __STK_REG(__REG_##i) | 190 | #define STK_REG(i) __STK_REG(__REG_##i) |
| 191 | 191 | ||
| 192 | #if defined(_CALL_ELF) && _CALL_ELF == 2 | 192 | #ifdef PPC64_ELF_ABI_v2 |
| 193 | #define STK_GOT 24 | 193 | #define STK_GOT 24 |
| 194 | #define __STK_PARAM(i) (32 + ((i)-3)*8) | 194 | #define __STK_PARAM(i) (32 + ((i)-3)*8) |
| 195 | #else | 195 | #else |
| @@ -198,7 +198,7 @@ END_FW_FTR_SECTION_IFSET(FW_FEATURE_SPLPAR) | |||
| 198 | #endif | 198 | #endif |
| 199 | #define STK_PARAM(i) __STK_PARAM(__REG_##i) | 199 | #define STK_PARAM(i) __STK_PARAM(__REG_##i) |
| 200 | 200 | ||
| 201 | #if defined(_CALL_ELF) && _CALL_ELF == 2 | 201 | #ifdef PPC64_ELF_ABI_v2 |
| 202 | 202 | ||
| 203 | #define _GLOBAL(name) \ | 203 | #define _GLOBAL(name) \ |
| 204 | .section ".text"; \ | 204 | .section ".text"; \ |
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h index 009fab130cd8..68e3bf57b027 100644 --- a/arch/powerpc/include/asm/processor.h +++ b/arch/powerpc/include/asm/processor.h | |||
| @@ -224,7 +224,7 @@ struct thread_struct { | |||
| 224 | unsigned int align_ctl; /* alignment handling control */ | 224 | unsigned int align_ctl; /* alignment handling control */ |
| 225 | #ifdef CONFIG_PPC64 | 225 | #ifdef CONFIG_PPC64 |
| 226 | unsigned long start_tb; /* Start purr when proc switched in */ | 226 | unsigned long start_tb; /* Start purr when proc switched in */ |
| 227 | unsigned long accum_tb; /* Total accumilated purr for process */ | 227 | unsigned long accum_tb; /* Total accumulated purr for process */ |
| 228 | #ifdef CONFIG_HAVE_HW_BREAKPOINT | 228 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
| 229 | struct perf_event *ptrace_bps[HBP_NUM]; | 229 | struct perf_event *ptrace_bps[HBP_NUM]; |
| 230 | /* | 230 | /* |
| @@ -314,6 +314,8 @@ struct thread_struct { | |||
| 314 | unsigned long mmcr2; | 314 | unsigned long mmcr2; |
| 315 | unsigned mmcr0; | 315 | unsigned mmcr0; |
| 316 | unsigned used_ebb; | 316 | unsigned used_ebb; |
| 317 | unsigned long lmrr; | ||
| 318 | unsigned long lmser; | ||
| 317 | #endif | 319 | #endif |
| 318 | }; | 320 | }; |
| 319 | 321 | ||
| @@ -347,6 +349,7 @@ struct thread_struct { | |||
| 347 | .fs = KERNEL_DS, \ | 349 | .fs = KERNEL_DS, \ |
| 348 | .fpexc_mode = 0, \ | 350 | .fpexc_mode = 0, \ |
| 349 | .ppr = INIT_PPR, \ | 351 | .ppr = INIT_PPR, \ |
| 352 | .fscr = FSCR_TAR | FSCR_EBB \ | ||
| 350 | } | 353 | } |
| 351 | #endif | 354 | #endif |
| 352 | 355 | ||
| @@ -457,6 +460,8 @@ extern int powersave_nap; /* set if nap mode can be used in idle loop */ | |||
| 457 | extern unsigned long power7_nap(int check_irq); | 460 | extern unsigned long power7_nap(int check_irq); |
| 458 | extern unsigned long power7_sleep(void); | 461 | extern unsigned long power7_sleep(void); |
| 459 | extern unsigned long power7_winkle(void); | 462 | extern unsigned long power7_winkle(void); |
| 463 | extern unsigned long power9_idle_stop(unsigned long stop_level); | ||
| 464 | |||
| 460 | extern void flush_instruction_cache(void); | 465 | extern void flush_instruction_cache(void); |
| 461 | extern void hard_reset_now(void); | 466 | extern void hard_reset_now(void); |
| 462 | extern void poweroff_now(void); | 467 | extern void poweroff_now(void); |
diff --git a/arch/powerpc/include/asm/ps3.h b/arch/powerpc/include/asm/ps3.h index a1bc7e758422..a19f831a4cc9 100644 --- a/arch/powerpc/include/asm/ps3.h +++ b/arch/powerpc/include/asm/ps3.h | |||
| @@ -526,4 +526,6 @@ void ps3_sync_irq(int node); | |||
| 526 | u32 ps3_get_hw_thread_id(int cpu); | 526 | u32 ps3_get_hw_thread_id(int cpu); |
| 527 | u64 ps3_get_spe_id(void *arg); | 527 | u64 ps3_get_spe_id(void *arg); |
| 528 | 528 | ||
| 529 | void ps3_early_mm_init(void); | ||
| 530 | |||
| 529 | #endif | 531 | #endif |
diff --git a/arch/powerpc/include/asm/ps3av.h b/arch/powerpc/include/asm/ps3av.h index 0427b0b53d2d..a1dc784d70e8 100644 --- a/arch/powerpc/include/asm/ps3av.h +++ b/arch/powerpc/include/asm/ps3av.h | |||
| @@ -104,7 +104,7 @@ | |||
| 104 | #define PS3AV_CMD_AV_INPUTLEN_16 0x02 | 104 | #define PS3AV_CMD_AV_INPUTLEN_16 0x02 |
| 105 | #define PS3AV_CMD_AV_INPUTLEN_20 0x0a | 105 | #define PS3AV_CMD_AV_INPUTLEN_20 0x0a |
| 106 | #define PS3AV_CMD_AV_INPUTLEN_24 0x0b | 106 | #define PS3AV_CMD_AV_INPUTLEN_24 0x0b |
| 107 | /* alayout */ | 107 | /* av_layout */ |
| 108 | #define PS3AV_CMD_AV_LAYOUT_32 (1 << 0) | 108 | #define PS3AV_CMD_AV_LAYOUT_32 (1 << 0) |
| 109 | #define PS3AV_CMD_AV_LAYOUT_44 (1 << 1) | 109 | #define PS3AV_CMD_AV_LAYOUT_44 (1 << 1) |
| 110 | #define PS3AV_CMD_AV_LAYOUT_48 (1 << 2) | 110 | #define PS3AV_CMD_AV_LAYOUT_48 (1 << 2) |
diff --git a/arch/powerpc/include/asm/pte-common.h b/arch/powerpc/include/asm/pte-common.h index 2eeaf80d41b7..4ba26dd259fd 100644 --- a/arch/powerpc/include/asm/pte-common.h +++ b/arch/powerpc/include/asm/pte-common.h | |||
| @@ -96,7 +96,7 @@ static inline bool pte_user(pte_t pte) | |||
| 96 | #define PTE_RPN_SHIFT (PAGE_SHIFT) | 96 | #define PTE_RPN_SHIFT (PAGE_SHIFT) |
| 97 | #endif | 97 | #endif |
| 98 | 98 | ||
| 99 | /* The mask convered by the RPN must be a ULL on 32-bit platforms with | 99 | /* The mask covered by the RPN must be a ULL on 32-bit platforms with |
| 100 | * 64-bit PTEs | 100 | * 64-bit PTEs |
| 101 | */ | 101 | */ |
| 102 | #if defined(CONFIG_PPC32) && defined(CONFIG_PTE_64BIT) | 102 | #if defined(CONFIG_PPC32) && defined(CONFIG_PTE_64BIT) |
diff --git a/arch/powerpc/include/asm/ptrace.h b/arch/powerpc/include/asm/ptrace.h index c0c61fa9cd9e..e4923686e43a 100644 --- a/arch/powerpc/include/asm/ptrace.h +++ b/arch/powerpc/include/asm/ptrace.h | |||
| @@ -47,7 +47,7 @@ | |||
| 47 | STACK_FRAME_OVERHEAD + KERNEL_REDZONE_SIZE) | 47 | STACK_FRAME_OVERHEAD + KERNEL_REDZONE_SIZE) |
| 48 | #define STACK_FRAME_MARKER 12 | 48 | #define STACK_FRAME_MARKER 12 |
| 49 | 49 | ||
| 50 | #if defined(_CALL_ELF) && _CALL_ELF == 2 | 50 | #ifdef PPC64_ELF_ABI_v2 |
| 51 | #define STACK_FRAME_MIN_SIZE 32 | 51 | #define STACK_FRAME_MIN_SIZE 32 |
| 52 | #else | 52 | #else |
| 53 | #define STACK_FRAME_MIN_SIZE STACK_FRAME_OVERHEAD | 53 | #define STACK_FRAME_MIN_SIZE STACK_FRAME_OVERHEAD |
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index a0948f40bc7b..40f3615bf940 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h | |||
| @@ -145,6 +145,15 @@ | |||
| 145 | #define MSR_64BIT 0 | 145 | #define MSR_64BIT 0 |
| 146 | #endif | 146 | #endif |
| 147 | 147 | ||
| 148 | /* Power Management - Processor Stop Status and Control Register Fields */ | ||
| 149 | #define PSSCR_RL_MASK 0x0000000F /* Requested Level */ | ||
| 150 | #define PSSCR_MTL_MASK 0x000000F0 /* Maximum Transition Level */ | ||
| 151 | #define PSSCR_TR_MASK 0x00000300 /* Transition State */ | ||
| 152 | #define PSSCR_PSLL_MASK 0x000F0000 /* Power-Saving Level Limit */ | ||
| 153 | #define PSSCR_EC 0x00100000 /* Exit Criterion */ | ||
| 154 | #define PSSCR_ESL 0x00200000 /* Enable State Loss */ | ||
| 155 | #define PSSCR_SD 0x00400000 /* Status Disable */ | ||
| 156 | |||
| 148 | /* Floating Point Status and Control Register (FPSCR) Fields */ | 157 | /* Floating Point Status and Control Register (FPSCR) Fields */ |
| 149 | #define FPSCR_FX 0x80000000 /* FPU exception summary */ | 158 | #define FPSCR_FX 0x80000000 /* FPU exception summary */ |
| 150 | #define FPSCR_FEX 0x40000000 /* FPU enabled exception summary */ | 159 | #define FPSCR_FEX 0x40000000 /* FPU enabled exception summary */ |
| @@ -268,6 +277,7 @@ | |||
| 268 | #define DSISR_KEYFAULT 0x00200000 /* Key fault */ | 277 | #define DSISR_KEYFAULT 0x00200000 /* Key fault */ |
| 269 | #define SPRN_TBRL 0x10C /* Time Base Read Lower Register (user, R/O) */ | 278 | #define SPRN_TBRL 0x10C /* Time Base Read Lower Register (user, R/O) */ |
| 270 | #define SPRN_TBRU 0x10D /* Time Base Read Upper Register (user, R/O) */ | 279 | #define SPRN_TBRU 0x10D /* Time Base Read Upper Register (user, R/O) */ |
| 280 | #define SPRN_CIR 0x11B /* Chip Information Register (hyper, R/0) */ | ||
| 271 | #define SPRN_TBWL 0x11C /* Time Base Lower Register (super, R/W) */ | 281 | #define SPRN_TBWL 0x11C /* Time Base Lower Register (super, R/W) */ |
| 272 | #define SPRN_TBWU 0x11D /* Time Base Upper Register (super, R/W) */ | 282 | #define SPRN_TBWU 0x11D /* Time Base Upper Register (super, R/W) */ |
| 273 | #define SPRN_TBU40 0x11E /* Timebase upper 40 bits (hyper, R/W) */ | 283 | #define SPRN_TBU40 0x11E /* Timebase upper 40 bits (hyper, R/W) */ |
| @@ -282,15 +292,19 @@ | |||
| 282 | #define SPRN_HRMOR 0x139 /* Real mode offset register */ | 292 | #define SPRN_HRMOR 0x139 /* Real mode offset register */ |
| 283 | #define SPRN_HSRR0 0x13A /* Hypervisor Save/Restore 0 */ | 293 | #define SPRN_HSRR0 0x13A /* Hypervisor Save/Restore 0 */ |
| 284 | #define SPRN_HSRR1 0x13B /* Hypervisor Save/Restore 1 */ | 294 | #define SPRN_HSRR1 0x13B /* Hypervisor Save/Restore 1 */ |
| 295 | #define SPRN_LMRR 0x32D /* Load Monitor Region Register */ | ||
| 296 | #define SPRN_LMSER 0x32E /* Load Monitor Section Enable Register */ | ||
| 285 | #define SPRN_IC 0x350 /* Virtual Instruction Count */ | 297 | #define SPRN_IC 0x350 /* Virtual Instruction Count */ |
| 286 | #define SPRN_VTB 0x351 /* Virtual Time Base */ | 298 | #define SPRN_VTB 0x351 /* Virtual Time Base */ |
| 287 | #define SPRN_LDBAR 0x352 /* LD Base Address Register */ | 299 | #define SPRN_LDBAR 0x352 /* LD Base Address Register */ |
| 288 | #define SPRN_PMICR 0x354 /* Power Management Idle Control Reg */ | 300 | #define SPRN_PMICR 0x354 /* Power Management Idle Control Reg */ |
| 289 | #define SPRN_PMSR 0x355 /* Power Management Status Reg */ | 301 | #define SPRN_PMSR 0x355 /* Power Management Status Reg */ |
| 290 | #define SPRN_PMMAR 0x356 /* Power Management Memory Activity Register */ | 302 | #define SPRN_PMMAR 0x356 /* Power Management Memory Activity Register */ |
| 303 | #define SPRN_PSSCR 0x357 /* Processor Stop Status and Control Register (ISA 3.0) */ | ||
| 291 | #define SPRN_PMCR 0x374 /* Power Management Control Register */ | 304 | #define SPRN_PMCR 0x374 /* Power Management Control Register */ |
| 292 | 305 | ||
| 293 | /* HFSCR and FSCR bit numbers are the same */ | 306 | /* HFSCR and FSCR bit numbers are the same */ |
| 307 | #define FSCR_LM_LG 11 /* Enable Load Monitor Registers */ | ||
| 294 | #define FSCR_TAR_LG 8 /* Enable Target Address Register */ | 308 | #define FSCR_TAR_LG 8 /* Enable Target Address Register */ |
| 295 | #define FSCR_EBB_LG 7 /* Enable Event Based Branching */ | 309 | #define FSCR_EBB_LG 7 /* Enable Event Based Branching */ |
| 296 | #define FSCR_TM_LG 5 /* Enable Transactional Memory */ | 310 | #define FSCR_TM_LG 5 /* Enable Transactional Memory */ |
| @@ -300,10 +314,12 @@ | |||
| 300 | #define FSCR_VECVSX_LG 1 /* Enable VMX/VSX */ | 314 | #define FSCR_VECVSX_LG 1 /* Enable VMX/VSX */ |
| 301 | #define FSCR_FP_LG 0 /* Enable Floating Point */ | 315 | #define FSCR_FP_LG 0 /* Enable Floating Point */ |
| 302 | #define SPRN_FSCR 0x099 /* Facility Status & Control Register */ | 316 | #define SPRN_FSCR 0x099 /* Facility Status & Control Register */ |
| 317 | #define FSCR_LM __MASK(FSCR_LM_LG) | ||
| 303 | #define FSCR_TAR __MASK(FSCR_TAR_LG) | 318 | #define FSCR_TAR __MASK(FSCR_TAR_LG) |
| 304 | #define FSCR_EBB __MASK(FSCR_EBB_LG) | 319 | #define FSCR_EBB __MASK(FSCR_EBB_LG) |
| 305 | #define FSCR_DSCR __MASK(FSCR_DSCR_LG) | 320 | #define FSCR_DSCR __MASK(FSCR_DSCR_LG) |
| 306 | #define SPRN_HFSCR 0xbe /* HV=1 Facility Status & Control Register */ | 321 | #define SPRN_HFSCR 0xbe /* HV=1 Facility Status & Control Register */ |
| 322 | #define HFSCR_LM __MASK(FSCR_LM_LG) | ||
| 307 | #define HFSCR_TAR __MASK(FSCR_TAR_LG) | 323 | #define HFSCR_TAR __MASK(FSCR_TAR_LG) |
| 308 | #define HFSCR_EBB __MASK(FSCR_EBB_LG) | 324 | #define HFSCR_EBB __MASK(FSCR_EBB_LG) |
| 309 | #define HFSCR_TM __MASK(FSCR_TM_LG) | 325 | #define HFSCR_TM __MASK(FSCR_TM_LG) |
| @@ -314,40 +330,43 @@ | |||
| 314 | #define HFSCR_FP __MASK(FSCR_FP_LG) | 330 | #define HFSCR_FP __MASK(FSCR_FP_LG) |
| 315 | #define SPRN_TAR 0x32f /* Target Address Register */ | 331 | #define SPRN_TAR 0x32f /* Target Address Register */ |
| 316 | #define SPRN_LPCR 0x13E /* LPAR Control Register */ | 332 | #define SPRN_LPCR 0x13E /* LPAR Control Register */ |
| 317 | #define LPCR_VPM0 (1ul << (63-0)) | 333 | #define LPCR_VPM0 ASM_CONST(0x8000000000000000) |
| 318 | #define LPCR_VPM1 (1ul << (63-1)) | 334 | #define LPCR_VPM1 ASM_CONST(0x4000000000000000) |
| 319 | #define LPCR_ISL (1ul << (63-2)) | 335 | #define LPCR_ISL ASM_CONST(0x2000000000000000) |
| 320 | #define LPCR_VC_SH (63-2) | 336 | #define LPCR_VC_SH 61 |
| 321 | #define LPCR_DPFD_SH (63-11) | 337 | #define LPCR_DPFD_SH 52 |
| 322 | #define LPCR_DPFD (7ul << LPCR_DPFD_SH) | 338 | #define LPCR_DPFD (ASM_CONST(7) << LPCR_DPFD_SH) |
| 323 | #define LPCR_VRMASD (0x1ful << (63-16)) | 339 | #define LPCR_VRMASD_SH 47 |
| 324 | #define LPCR_VRMA_L (1ul << (63-12)) | 340 | #define LPCR_VRMASD (ASM_CONST(1) << LPCR_VRMASD_SH) |
| 325 | #define LPCR_VRMA_LP0 (1ul << (63-15)) | 341 | #define LPCR_VRMA_L ASM_CONST(0x0008000000000000) |
| 326 | #define LPCR_VRMA_LP1 (1ul << (63-16)) | 342 | #define LPCR_VRMA_LP0 ASM_CONST(0x0001000000000000) |
| 327 | #define LPCR_VRMASD_SH (63-16) | 343 | #define LPCR_VRMA_LP1 ASM_CONST(0x0000800000000000) |
| 328 | #define LPCR_RMLS 0x1C000000 /* impl dependent rmo limit sel */ | 344 | #define LPCR_RMLS 0x1C000000 /* Implementation dependent RMO limit sel */ |
| 329 | #define LPCR_RMLS_SH (63-37) | 345 | #define LPCR_RMLS_SH 26 |
| 330 | #define LPCR_ILE 0x02000000 /* !HV irqs set MSR:LE */ | 346 | #define LPCR_ILE ASM_CONST(0x0000000002000000) /* !HV irqs set MSR:LE */ |
| 331 | #define LPCR_AIL 0x01800000 /* Alternate interrupt location */ | 347 | #define LPCR_AIL ASM_CONST(0x0000000001800000) /* Alternate interrupt location */ |
| 332 | #define LPCR_AIL_0 0x00000000 /* MMU off exception offset 0x0 */ | 348 | #define LPCR_AIL_0 ASM_CONST(0x0000000000000000) /* MMU off exception offset 0x0 */ |
| 333 | #define LPCR_AIL_3 0x01800000 /* MMU on exception offset 0xc00...4xxx */ | 349 | #define LPCR_AIL_3 ASM_CONST(0x0000000001800000) /* MMU on exception offset 0xc00...4xxx */ |
| 334 | #define LPCR_ONL 0x00040000 /* online - PURR/SPURR count */ | 350 | #define LPCR_ONL ASM_CONST(0x0000000000040000) /* online - PURR/SPURR count */ |
| 335 | #define LPCR_PECE 0x0001f000 /* powersave exit cause enable */ | 351 | #define LPCR_LD ASM_CONST(0x0000000000020000) /* large decremeter */ |
| 336 | #define LPCR_PECEDP 0x00010000 /* directed priv dbells cause exit */ | 352 | #define LPCR_PECE ASM_CONST(0x000000000001f000) /* powersave exit cause enable */ |
| 337 | #define LPCR_PECEDH 0x00008000 /* directed hyp dbells cause exit */ | 353 | #define LPCR_PECEDP ASM_CONST(0x0000000000010000) /* directed priv dbells cause exit */ |
| 338 | #define LPCR_PECE0 0x00004000 /* ext. exceptions can cause exit */ | 354 | #define LPCR_PECEDH ASM_CONST(0x0000000000008000) /* directed hyp dbells cause exit */ |
| 339 | #define LPCR_PECE1 0x00002000 /* decrementer can cause exit */ | 355 | #define LPCR_PECE0 ASM_CONST(0x0000000000004000) /* ext. exceptions can cause exit */ |
| 340 | #define LPCR_PECE2 0x00001000 /* machine check etc can cause exit */ | 356 | #define LPCR_PECE1 ASM_CONST(0x0000000000002000) /* decrementer can cause exit */ |
| 341 | #define LPCR_MER 0x00000800 /* Mediated External Exception */ | 357 | #define LPCR_PECE2 ASM_CONST(0x0000000000001000) /* machine check etc can cause exit */ |
| 342 | #define LPCR_MER_SH 11 | 358 | #define LPCR_MER ASM_CONST(0x0000000000000800) /* Mediated External Exception */ |
| 343 | #define LPCR_TC 0x00000200 /* Translation control */ | 359 | #define LPCR_MER_SH 11 |
| 344 | #define LPCR_LPES 0x0000000c | 360 | #define LPCR_TC ASM_CONST(0x0000000000000200) /* Translation control */ |
| 345 | #define LPCR_LPES0 0x00000008 /* LPAR Env selector 0 */ | 361 | #define LPCR_LPES 0x0000000c |
| 346 | #define LPCR_LPES1 0x00000004 /* LPAR Env selector 1 */ | 362 | #define LPCR_LPES0 ASM_CONST(0x0000000000000008) /* LPAR Env selector 0 */ |
| 347 | #define LPCR_LPES_SH 2 | 363 | #define LPCR_LPES1 ASM_CONST(0x0000000000000004) /* LPAR Env selector 1 */ |
| 348 | #define LPCR_RMI 0x00000002 /* real mode is cache inhibit */ | 364 | #define LPCR_LPES_SH 2 |
| 349 | #define LPCR_HDICE 0x00000001 /* Hyp Decr enable (HV,PR,EE) */ | 365 | #define LPCR_RMI ASM_CONST(0x0000000000000002) /* real mode is cache inhibit */ |
| 350 | #define LPCR_UPRT 0x00400000 /* Use Process Table (ISA 3) */ | 366 | #define LPCR_HVICE ASM_CONST(0x0000000000000002) /* P9: HV interrupt enable */ |
| 367 | #define LPCR_HDICE ASM_CONST(0x0000000000000001) /* Hyp Decr enable (HV,PR,EE) */ | ||
| 368 | #define LPCR_UPRT ASM_CONST(0x0000000000400000) /* Use Process Table (ISA 3) */ | ||
| 369 | #define LPCR_HR ASM_CONST(0x0000000000100000) | ||
| 351 | #ifndef SPRN_LPID | 370 | #ifndef SPRN_LPID |
| 352 | #define SPRN_LPID 0x13F /* Logical Partition Identifier */ | 371 | #define SPRN_LPID 0x13F /* Logical Partition Identifier */ |
| 353 | #endif | 372 | #endif |
| @@ -1288,6 +1307,7 @@ static inline unsigned long mfvtb (void) | |||
| 1288 | asm volatile("mfspr %0, %1" : "=r" (rval) : \ | 1307 | asm volatile("mfspr %0, %1" : "=r" (rval) : \ |
| 1289 | "i" (SPRN_TBRU)); rval;}) | 1308 | "i" (SPRN_TBRU)); rval;}) |
| 1290 | #endif | 1309 | #endif |
| 1310 | #define mftb() mftbl() | ||
| 1291 | #endif /* !__powerpc64__ */ | 1311 | #endif /* !__powerpc64__ */ |
| 1292 | 1312 | ||
| 1293 | #define mttbl(v) asm volatile("mttbl %0":: "r"(v)) | 1313 | #define mttbl(v) asm volatile("mttbl %0":: "r"(v)) |
diff --git a/arch/powerpc/include/asm/rtas.h b/arch/powerpc/include/asm/rtas.h index 51400baa8d48..9c23baa10b81 100644 --- a/arch/powerpc/include/asm/rtas.h +++ b/arch/powerpc/include/asm/rtas.h | |||
| @@ -339,9 +339,9 @@ extern int rtas_service_present(const char *service); | |||
| 339 | extern int rtas_call(int token, int, int, int *, ...); | 339 | extern int rtas_call(int token, int, int, int *, ...); |
| 340 | void rtas_call_unlocked(struct rtas_args *args, int token, int nargs, | 340 | void rtas_call_unlocked(struct rtas_args *args, int token, int nargs, |
| 341 | int nret, ...); | 341 | int nret, ...); |
| 342 | extern void rtas_restart(char *cmd); | 342 | extern void __noreturn rtas_restart(char *cmd); |
| 343 | extern void rtas_power_off(void); | 343 | extern void rtas_power_off(void); |
| 344 | extern void rtas_halt(void); | 344 | extern void __noreturn rtas_halt(void); |
| 345 | extern void rtas_os_term(char *str); | 345 | extern void rtas_os_term(char *str); |
| 346 | extern int rtas_get_sensor(int sensor, int index, int *state); | 346 | extern int rtas_get_sensor(int sensor, int index, int *state); |
| 347 | extern int rtas_get_sensor_fast(int sensor, int index, int *state); | 347 | extern int rtas_get_sensor_fast(int sensor, int index, int *state); |
| @@ -351,7 +351,6 @@ extern bool rtas_indicator_present(int token, int *maxindex); | |||
| 351 | extern int rtas_set_indicator(int indicator, int index, int new_value); | 351 | extern int rtas_set_indicator(int indicator, int index, int new_value); |
| 352 | extern int rtas_set_indicator_fast(int indicator, int index, int new_value); | 352 | extern int rtas_set_indicator_fast(int indicator, int index, int new_value); |
| 353 | extern void rtas_progress(char *s, unsigned short hex); | 353 | extern void rtas_progress(char *s, unsigned short hex); |
| 354 | extern void rtas_initialize(void); | ||
| 355 | extern int rtas_suspend_cpu(struct rtas_suspend_me_data *data); | 354 | extern int rtas_suspend_cpu(struct rtas_suspend_me_data *data); |
| 356 | extern int rtas_suspend_last_cpu(struct rtas_suspend_me_data *data); | 355 | extern int rtas_suspend_last_cpu(struct rtas_suspend_me_data *data); |
| 357 | extern int rtas_online_cpus_mask(cpumask_var_t cpus); | 356 | extern int rtas_online_cpus_mask(cpumask_var_t cpus); |
| @@ -460,9 +459,11 @@ static inline int page_is_rtas_user_buf(unsigned long pfn) | |||
| 460 | /* Not the best place to put pSeries_coalesce_init, will be fixed when we | 459 | /* Not the best place to put pSeries_coalesce_init, will be fixed when we |
| 461 | * move some of the rtas suspend-me stuff to pseries */ | 460 | * move some of the rtas suspend-me stuff to pseries */ |
| 462 | extern void pSeries_coalesce_init(void); | 461 | extern void pSeries_coalesce_init(void); |
| 462 | void rtas_initialize(void); | ||
| 463 | #else | 463 | #else |
| 464 | static inline int page_is_rtas_user_buf(unsigned long pfn) { return 0;} | 464 | static inline int page_is_rtas_user_buf(unsigned long pfn) { return 0;} |
| 465 | static inline void pSeries_coalesce_init(void) { } | 465 | static inline void pSeries_coalesce_init(void) { } |
| 466 | static inline void rtas_initialize(void) { }; | ||
| 466 | #endif | 467 | #endif |
| 467 | 468 | ||
| 468 | extern int call_rtas(const char *, int, int, unsigned long *, ...); | 469 | extern int call_rtas(const char *, int, int, unsigned long *, ...); |
diff --git a/arch/powerpc/include/asm/sections.h b/arch/powerpc/include/asm/sections.h index abf5866e08c6..7dc006b58369 100644 --- a/arch/powerpc/include/asm/sections.h +++ b/arch/powerpc/include/asm/sections.h | |||
| @@ -62,7 +62,7 @@ static inline int overlaps_kvm_tmp(unsigned long start, unsigned long end) | |||
| 62 | #endif | 62 | #endif |
| 63 | } | 63 | } |
| 64 | 64 | ||
| 65 | #if !defined(_CALL_ELF) || _CALL_ELF != 2 | 65 | #ifdef PPC64_ELF_ABI_v1 |
| 66 | #undef dereference_function_descriptor | 66 | #undef dereference_function_descriptor |
| 67 | static inline void *dereference_function_descriptor(void *ptr) | 67 | static inline void *dereference_function_descriptor(void *ptr) |
| 68 | { | 68 | { |
| @@ -73,7 +73,7 @@ static inline void *dereference_function_descriptor(void *ptr) | |||
| 73 | ptr = p; | 73 | ptr = p; |
| 74 | return ptr; | 74 | return ptr; |
| 75 | } | 75 | } |
| 76 | #endif | 76 | #endif /* PPC64_ELF_ABI_v1 */ |
| 77 | 77 | ||
| 78 | #endif | 78 | #endif |
| 79 | 79 | ||
diff --git a/arch/powerpc/include/asm/setup.h b/arch/powerpc/include/asm/setup.h index e9d384cbd021..654d64c9f3ac 100644 --- a/arch/powerpc/include/asm/setup.h +++ b/arch/powerpc/include/asm/setup.h | |||
| @@ -26,6 +26,18 @@ void initmem_init(void); | |||
| 26 | void setup_panic(void); | 26 | void setup_panic(void); |
| 27 | #define ARCH_PANIC_TIMEOUT 180 | 27 | #define ARCH_PANIC_TIMEOUT 180 |
| 28 | 28 | ||
| 29 | #ifdef CONFIG_PPC_PSERIES | ||
| 30 | extern void pseries_enable_reloc_on_exc(void); | ||
| 31 | extern void pseries_disable_reloc_on_exc(void); | ||
| 32 | extern void pseries_big_endian_exceptions(void); | ||
| 33 | extern void pseries_little_endian_exceptions(void); | ||
| 34 | #else | ||
| 35 | static inline void pseries_enable_reloc_on_exc(void) {} | ||
| 36 | static inline void pseries_disable_reloc_on_exc(void) {} | ||
| 37 | static inline void pseries_big_endian_exceptions(void) {} | ||
| 38 | static inline void pseries_little_endian_exceptions(void) {} | ||
| 39 | #endif /* CONFIG_PPC_PSERIES */ | ||
| 40 | |||
| 29 | #endif /* !__ASSEMBLY__ */ | 41 | #endif /* !__ASSEMBLY__ */ |
| 30 | 42 | ||
| 31 | #endif /* _ASM_POWERPC_SETUP_H */ | 43 | #endif /* _ASM_POWERPC_SETUP_H */ |
diff --git a/arch/powerpc/include/asm/smp.h b/arch/powerpc/include/asm/smp.h index e1afd4c4f695..0d02c11dc331 100644 --- a/arch/powerpc/include/asm/smp.h +++ b/arch/powerpc/include/asm/smp.h | |||
| @@ -160,9 +160,6 @@ static inline void set_hard_smp_processor_id(int cpu, int phys) | |||
| 160 | { | 160 | { |
| 161 | paca[cpu].hw_cpu_id = phys; | 161 | paca[cpu].hw_cpu_id = phys; |
| 162 | } | 162 | } |
| 163 | |||
| 164 | extern void smp_release_cpus(void); | ||
| 165 | |||
| 166 | #else | 163 | #else |
| 167 | /* 32-bit */ | 164 | /* 32-bit */ |
| 168 | #ifndef CONFIG_SMP | 165 | #ifndef CONFIG_SMP |
| @@ -179,6 +176,12 @@ static inline void set_hard_smp_processor_id(int cpu, int phys) | |||
| 179 | #endif /* !CONFIG_SMP */ | 176 | #endif /* !CONFIG_SMP */ |
| 180 | #endif /* !CONFIG_PPC64 */ | 177 | #endif /* !CONFIG_PPC64 */ |
| 181 | 178 | ||
| 179 | #if defined(CONFIG_PPC64) && (defined(CONFIG_SMP) || defined(CONFIG_KEXEC)) | ||
| 180 | extern void smp_release_cpus(void); | ||
| 181 | #else | ||
| 182 | static inline void smp_release_cpus(void) { }; | ||
| 183 | #endif | ||
| 184 | |||
| 182 | extern int smt_enabled_at_boot; | 185 | extern int smt_enabled_at_boot; |
| 183 | 186 | ||
| 184 | extern void smp_mpic_probe(void); | 187 | extern void smp_mpic_probe(void); |
diff --git a/arch/powerpc/include/asm/smu.h b/arch/powerpc/include/asm/smu.h index f280dd11243f..09f98e861869 100644 --- a/arch/powerpc/include/asm/smu.h +++ b/arch/powerpc/include/asm/smu.h | |||
| @@ -185,7 +185,7 @@ | |||
| 185 | * x = processor mask | 185 | * x = processor mask |
| 186 | * y = op. point index | 186 | * y = op. point index |
| 187 | * z = processor freq. step index | 187 | * z = processor freq. step index |
| 188 | * I haven't yet decyphered result codes | 188 | * I haven't yet deciphered result codes |
| 189 | * | 189 | * |
| 190 | */ | 190 | */ |
| 191 | #define SMU_CMD_POWER_COMMAND 0xaa | 191 | #define SMU_CMD_POWER_COMMAND 0xaa |
| @@ -471,13 +471,6 @@ extern int smu_get_rtc_time(struct rtc_time *time, int spinwait); | |||
| 471 | extern int smu_set_rtc_time(struct rtc_time *time, int spinwait); | 471 | extern int smu_set_rtc_time(struct rtc_time *time, int spinwait); |
| 472 | 472 | ||
| 473 | /* | 473 | /* |
| 474 | * SMU command buffer absolute address, exported by pmac_setup, | ||
| 475 | * this is allocated very early during boot. | ||
| 476 | */ | ||
| 477 | extern unsigned long smu_cmdbuf_abs; | ||
| 478 | |||
| 479 | |||
| 480 | /* | ||
| 481 | * Kernel asynchronous i2c interface | 474 | * Kernel asynchronous i2c interface |
| 482 | */ | 475 | */ |
| 483 | 476 | ||
diff --git a/arch/powerpc/include/asm/spinlock.h b/arch/powerpc/include/asm/spinlock.h index 523673d7583c..fa37fe93bc02 100644 --- a/arch/powerpc/include/asm/spinlock.h +++ b/arch/powerpc/include/asm/spinlock.h | |||
| @@ -162,12 +162,38 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock) | |||
| 162 | lock->slock = 0; | 162 | lock->slock = 0; |
| 163 | } | 163 | } |
| 164 | 164 | ||
| 165 | #ifdef CONFIG_PPC64 | 165 | static inline void arch_spin_unlock_wait(arch_spinlock_t *lock) |
| 166 | extern void arch_spin_unlock_wait(arch_spinlock_t *lock); | 166 | { |
| 167 | #else | 167 | arch_spinlock_t lock_val; |
| 168 | #define arch_spin_unlock_wait(lock) \ | 168 | |
| 169 | do { while (arch_spin_is_locked(lock)) cpu_relax(); } while (0) | 169 | smp_mb(); |
| 170 | #endif | 170 | |
| 171 | /* | ||
| 172 | * Atomically load and store back the lock value (unchanged). This | ||
| 173 | * ensures that our observation of the lock value is ordered with | ||
| 174 | * respect to other lock operations. | ||
| 175 | */ | ||
| 176 | __asm__ __volatile__( | ||
| 177 | "1: " PPC_LWARX(%0, 0, %2, 0) "\n" | ||
| 178 | " stwcx. %0, 0, %2\n" | ||
| 179 | " bne- 1b\n" | ||
| 180 | : "=&r" (lock_val), "+m" (*lock) | ||
| 181 | : "r" (lock) | ||
| 182 | : "cr0", "xer"); | ||
| 183 | |||
| 184 | if (arch_spin_value_unlocked(lock_val)) | ||
| 185 | goto out; | ||
| 186 | |||
| 187 | while (lock->slock) { | ||
| 188 | HMT_low(); | ||
| 189 | if (SHARED_PROCESSOR) | ||
| 190 | __spin_yield(lock); | ||
| 191 | } | ||
| 192 | HMT_medium(); | ||
| 193 | |||
| 194 | out: | ||
| 195 | smp_mb(); | ||
| 196 | } | ||
| 171 | 197 | ||
| 172 | /* | 198 | /* |
| 173 | * Read-write spinlocks, allowing multiple readers | 199 | * Read-write spinlocks, allowing multiple readers |
diff --git a/arch/powerpc/include/asm/string.h b/arch/powerpc/include/asm/string.h index e40010abcaf1..da3cdffca440 100644 --- a/arch/powerpc/include/asm/string.h +++ b/arch/powerpc/include/asm/string.h | |||
| @@ -3,12 +3,8 @@ | |||
| 3 | 3 | ||
| 4 | #ifdef __KERNEL__ | 4 | #ifdef __KERNEL__ |
| 5 | 5 | ||
| 6 | #define __HAVE_ARCH_STRCPY | ||
| 7 | #define __HAVE_ARCH_STRNCPY | 6 | #define __HAVE_ARCH_STRNCPY |
| 8 | #define __HAVE_ARCH_STRLEN | ||
| 9 | #define __HAVE_ARCH_STRCMP | ||
| 10 | #define __HAVE_ARCH_STRNCMP | 7 | #define __HAVE_ARCH_STRNCMP |
| 11 | #define __HAVE_ARCH_STRCAT | ||
| 12 | #define __HAVE_ARCH_MEMSET | 8 | #define __HAVE_ARCH_MEMSET |
| 13 | #define __HAVE_ARCH_MEMCPY | 9 | #define __HAVE_ARCH_MEMCPY |
| 14 | #define __HAVE_ARCH_MEMMOVE | 10 | #define __HAVE_ARCH_MEMMOVE |
diff --git a/arch/powerpc/include/asm/synch.h b/arch/powerpc/include/asm/synch.h index c50868681f9e..78efe8d5d775 100644 --- a/arch/powerpc/include/asm/synch.h +++ b/arch/powerpc/include/asm/synch.h | |||
| @@ -13,7 +13,6 @@ | |||
| 13 | extern unsigned int __start___lwsync_fixup, __stop___lwsync_fixup; | 13 | extern unsigned int __start___lwsync_fixup, __stop___lwsync_fixup; |
| 14 | extern void do_lwsync_fixups(unsigned long value, void *fixup_start, | 14 | extern void do_lwsync_fixups(unsigned long value, void *fixup_start, |
| 15 | void *fixup_end); | 15 | void *fixup_end); |
| 16 | extern void do_final_fixups(void); | ||
| 17 | 16 | ||
| 18 | static inline void eieio(void) | 17 | static inline void eieio(void) |
| 19 | { | 18 | { |
diff --git a/arch/powerpc/include/asm/tce.h b/arch/powerpc/include/asm/tce.h index 743f36b38e5d..12e362935160 100644 --- a/arch/powerpc/include/asm/tce.h +++ b/arch/powerpc/include/asm/tce.h | |||
| @@ -31,9 +31,6 @@ | |||
| 31 | */ | 31 | */ |
| 32 | #define TCE_VB 0 | 32 | #define TCE_VB 0 |
| 33 | #define TCE_PCI 1 | 33 | #define TCE_PCI 1 |
| 34 | #define TCE_PCI_SWINV_CREATE 2 | ||
| 35 | #define TCE_PCI_SWINV_FREE 4 | ||
| 36 | #define TCE_PCI_SWINV_PAIR 8 | ||
| 37 | 34 | ||
| 38 | /* TCE page size is 4096 bytes (1 << 12) */ | 35 | /* TCE page size is 4096 bytes (1 << 12) */ |
| 39 | 36 | ||
diff --git a/arch/powerpc/include/asm/thread_info.h b/arch/powerpc/include/asm/thread_info.h index 8febc3f66d53..b21bb1f72314 100644 --- a/arch/powerpc/include/asm/thread_info.h +++ b/arch/powerpc/include/asm/thread_info.h | |||
| @@ -33,6 +33,7 @@ | |||
| 33 | #include <asm/processor.h> | 33 | #include <asm/processor.h> |
| 34 | #include <asm/page.h> | 34 | #include <asm/page.h> |
| 35 | #include <linux/stringify.h> | 35 | #include <linux/stringify.h> |
| 36 | #include <asm/accounting.h> | ||
| 36 | 37 | ||
| 37 | /* | 38 | /* |
| 38 | * low level task data. | 39 | * low level task data. |
| @@ -46,6 +47,9 @@ struct thread_info { | |||
| 46 | #ifdef CONFIG_LIVEPATCH | 47 | #ifdef CONFIG_LIVEPATCH |
| 47 | unsigned long *livepatch_sp; | 48 | unsigned long *livepatch_sp; |
| 48 | #endif | 49 | #endif |
| 50 | #if defined(CONFIG_VIRT_CPU_ACCOUNTING_NATIVE) && defined(CONFIG_PPC32) | ||
| 51 | struct cpu_accounting_data accounting; | ||
| 52 | #endif | ||
| 49 | /* low level flags - has atomic operations done on it */ | 53 | /* low level flags - has atomic operations done on it */ |
| 50 | unsigned long flags ____cacheline_aligned_in_smp; | 54 | unsigned long flags ____cacheline_aligned_in_smp; |
| 51 | }; | 55 | }; |
diff --git a/arch/powerpc/include/asm/time.h b/arch/powerpc/include/asm/time.h index 1092fdd7e737..09211640a0e0 100644 --- a/arch/powerpc/include/asm/time.h +++ b/arch/powerpc/include/asm/time.h | |||
| @@ -146,7 +146,7 @@ static inline void set_tb(unsigned int upper, unsigned int lower) | |||
| 146 | * in auto-reload mode. The problem is PIT stops counting when it | 146 | * in auto-reload mode. The problem is PIT stops counting when it |
| 147 | * hits zero. If it would wrap, we could use it just like a decrementer. | 147 | * hits zero. If it would wrap, we could use it just like a decrementer. |
| 148 | */ | 148 | */ |
| 149 | static inline unsigned int get_dec(void) | 149 | static inline u64 get_dec(void) |
| 150 | { | 150 | { |
| 151 | #if defined(CONFIG_40x) | 151 | #if defined(CONFIG_40x) |
| 152 | return (mfspr(SPRN_PIT)); | 152 | return (mfspr(SPRN_PIT)); |
| @@ -160,10 +160,10 @@ static inline unsigned int get_dec(void) | |||
| 160 | * in when the decrementer generates its interrupt: on the 1 to 0 | 160 | * in when the decrementer generates its interrupt: on the 1 to 0 |
| 161 | * transition for Book E/4xx, but on the 0 to -1 transition for others. | 161 | * transition for Book E/4xx, but on the 0 to -1 transition for others. |
| 162 | */ | 162 | */ |
| 163 | static inline void set_dec(int val) | 163 | static inline void set_dec(u64 val) |
| 164 | { | 164 | { |
| 165 | #if defined(CONFIG_40x) | 165 | #if defined(CONFIG_40x) |
| 166 | mtspr(SPRN_PIT, val); | 166 | mtspr(SPRN_PIT, (u32) val); |
| 167 | #else | 167 | #else |
| 168 | #ifndef CONFIG_BOOKE | 168 | #ifndef CONFIG_BOOKE |
| 169 | --val; | 169 | --val; |
diff --git a/arch/powerpc/include/asm/tsi108.h b/arch/powerpc/include/asm/tsi108.h index d531d9e173ef..c2a955bb0daa 100644 --- a/arch/powerpc/include/asm/tsi108.h +++ b/arch/powerpc/include/asm/tsi108.h | |||
| @@ -77,7 +77,7 @@ | |||
| 77 | * nodes if your board uses the Broadcom PHYs | 77 | * nodes if your board uses the Broadcom PHYs |
| 78 | */ | 78 | */ |
| 79 | #define TSI108_PHY_MV88E 0 /* Marvel 88Exxxx PHY */ | 79 | #define TSI108_PHY_MV88E 0 /* Marvel 88Exxxx PHY */ |
| 80 | #define TSI108_PHY_BCM54XX 1 /* Broardcom BCM54xx PHY */ | 80 | #define TSI108_PHY_BCM54XX 1 /* Broadcom BCM54xx PHY */ |
| 81 | 81 | ||
| 82 | /* Global variables */ | 82 | /* Global variables */ |
| 83 | 83 | ||
diff --git a/arch/powerpc/include/asm/types.h b/arch/powerpc/include/asm/types.h index bfb6ded38ffa..49a0678a53fa 100644 --- a/arch/powerpc/include/asm/types.h +++ b/arch/powerpc/include/asm/types.h | |||
| @@ -15,6 +15,14 @@ | |||
| 15 | 15 | ||
| 16 | #include <uapi/asm/types.h> | 16 | #include <uapi/asm/types.h> |
| 17 | 17 | ||
| 18 | #ifdef __powerpc64__ | ||
| 19 | #if defined(_CALL_ELF) && _CALL_ELF == 2 | ||
| 20 | #define PPC64_ELF_ABI_v2 | ||
| 21 | #else | ||
| 22 | #define PPC64_ELF_ABI_v1 | ||
| 23 | #endif | ||
| 24 | #endif /* __powerpc64__ */ | ||
| 25 | |||
| 18 | #ifndef __ASSEMBLY__ | 26 | #ifndef __ASSEMBLY__ |
| 19 | 27 | ||
| 20 | typedef __vector128 vector128; | 28 | typedef __vector128 vector128; |
diff --git a/arch/powerpc/include/asm/xics.h b/arch/powerpc/include/asm/xics.h index 04ef3ae511da..f5f729c11578 100644 --- a/arch/powerpc/include/asm/xics.h +++ b/arch/powerpc/include/asm/xics.h | |||
| @@ -42,6 +42,12 @@ extern int icp_hv_init(void); | |||
| 42 | static inline int icp_hv_init(void) { return -ENODEV; } | 42 | static inline int icp_hv_init(void) { return -ENODEV; } |
| 43 | #endif | 43 | #endif |
| 44 | 44 | ||
| 45 | #ifdef CONFIG_PPC_POWERNV | ||
| 46 | extern int icp_opal_init(void); | ||
| 47 | #else | ||
| 48 | static inline int icp_opal_init(void) { return -ENODEV; } | ||
| 49 | #endif | ||
| 50 | |||
| 45 | /* ICP ops */ | 51 | /* ICP ops */ |
| 46 | struct icp_ops { | 52 | struct icp_ops { |
| 47 | unsigned int (*get_irq)(void); | 53 | unsigned int (*get_irq)(void); |
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile index 2da380fcc34c..fe4c075bcf50 100644 --- a/arch/powerpc/kernel/Makefile +++ b/arch/powerpc/kernel/Makefile | |||
| @@ -42,12 +42,11 @@ obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o | |||
| 42 | obj-$(CONFIG_PPC_BOOK3S_64) += cpu_setup_ppc970.o cpu_setup_pa6t.o | 42 | obj-$(CONFIG_PPC_BOOK3S_64) += cpu_setup_ppc970.o cpu_setup_pa6t.o |
| 43 | obj-$(CONFIG_PPC_BOOK3S_64) += cpu_setup_power.o | 43 | obj-$(CONFIG_PPC_BOOK3S_64) += cpu_setup_power.o |
| 44 | obj-$(CONFIG_PPC_BOOK3S_64) += mce.o mce_power.o | 44 | obj-$(CONFIG_PPC_BOOK3S_64) += mce.o mce_power.o |
| 45 | obj64-$(CONFIG_RELOCATABLE) += reloc_64.o | ||
| 46 | obj-$(CONFIG_PPC_BOOK3E_64) += exceptions-64e.o idle_book3e.o | 45 | obj-$(CONFIG_PPC_BOOK3E_64) += exceptions-64e.o idle_book3e.o |
| 47 | obj-$(CONFIG_PPC64) += vdso64/ | 46 | obj-$(CONFIG_PPC64) += vdso64/ |
| 48 | obj-$(CONFIG_ALTIVEC) += vecemu.o | 47 | obj-$(CONFIG_ALTIVEC) += vecemu.o |
| 49 | obj-$(CONFIG_PPC_970_NAP) += idle_power4.o | 48 | obj-$(CONFIG_PPC_970_NAP) += idle_power4.o |
| 50 | obj-$(CONFIG_PPC_P7_NAP) += idle_power7.o | 49 | obj-$(CONFIG_PPC_P7_NAP) += idle_book3s.o |
| 51 | procfs-y := proc_powerpc.o | 50 | procfs-y := proc_powerpc.o |
| 52 | obj-$(CONFIG_PROC_FS) += $(procfs-y) | 51 | obj-$(CONFIG_PROC_FS) += $(procfs-y) |
| 53 | rtaspci-$(CONFIG_PPC64)-$(CONFIG_PCI) := rtas_pci.o | 52 | rtaspci-$(CONFIG_PPC64)-$(CONFIG_PCI) := rtas_pci.o |
| @@ -87,7 +86,7 @@ extra-$(CONFIG_FSL_BOOKE) := head_fsl_booke.o | |||
| 87 | extra-$(CONFIG_8xx) := head_8xx.o | 86 | extra-$(CONFIG_8xx) := head_8xx.o |
| 88 | extra-y += vmlinux.lds | 87 | extra-y += vmlinux.lds |
| 89 | 88 | ||
| 90 | obj-$(CONFIG_RELOCATABLE_PPC32) += reloc_32.o | 89 | obj-$(CONFIG_RELOCATABLE) += reloc_$(CONFIG_WORD_SIZE).o |
| 91 | 90 | ||
| 92 | obj-$(CONFIG_PPC32) += entry_32.o setup_32.o | 91 | obj-$(CONFIG_PPC32) += entry_32.o setup_32.o |
| 93 | obj-$(CONFIG_PPC64) += dma-iommu.o iommu.o | 92 | obj-$(CONFIG_PPC64) += dma-iommu.o iommu.o |
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c index 8e7cb8e2b21a..c7097f933114 100644 --- a/arch/powerpc/kernel/align.c +++ b/arch/powerpc/kernel/align.c | |||
| @@ -228,9 +228,7 @@ static int emulate_dcbz(struct pt_regs *regs, unsigned char __user *addr) | |||
| 228 | #else | 228 | #else |
| 229 | #define REG_BYTE(rp, i) *((u8 *)(rp) + (i)) | 229 | #define REG_BYTE(rp, i) *((u8 *)(rp) + (i)) |
| 230 | #endif | 230 | #endif |
| 231 | #endif | 231 | #else |
| 232 | |||
| 233 | #ifdef __LITTLE_ENDIAN__ | ||
| 234 | #define REG_BYTE(rp, i) (*(((u8 *)((rp) + ((i)>>2)) + ((i)&3)))) | 232 | #define REG_BYTE(rp, i) (*(((u8 *)((rp) + ((i)>>2)) + ((i)&3)))) |
| 235 | #endif | 233 | #endif |
| 236 | 234 | ||
| @@ -875,6 +873,20 @@ int fix_alignment(struct pt_regs *regs) | |||
| 875 | return emulate_vsx(addr, reg, areg, regs, flags, nb, elsize); | 873 | return emulate_vsx(addr, reg, areg, regs, flags, nb, elsize); |
| 876 | } | 874 | } |
| 877 | #endif | 875 | #endif |
| 876 | |||
| 877 | /* | ||
| 878 | * ISA 3.0 (such as P9) copy, copy_first, paste and paste_last alignment | ||
| 879 | * check. | ||
| 880 | * | ||
| 881 | * Send a SIGBUS to the process that caused the fault. | ||
| 882 | * | ||
| 883 | * We do not emulate these because paste may contain additional metadata | ||
| 884 | * when pasting to a co-processor. Furthermore, paste_last is the | ||
| 885 | * synchronisation point for preceding copy/paste sequences. | ||
| 886 | */ | ||
| 887 | if ((instruction & 0xfc0006fe) == PPC_INST_COPY) | ||
| 888 | return -EIO; | ||
| 889 | |||
| 878 | /* A size of 0 indicates an instruction we don't support, with | 890 | /* A size of 0 indicates an instruction we don't support, with |
| 879 | * the exception of DCBZ which is handled as a special case here | 891 | * the exception of DCBZ which is handled as a special case here |
| 880 | */ | 892 | */ |
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c index 9ea09551a2cd..b89d14c0352c 100644 --- a/arch/powerpc/kernel/asm-offsets.c +++ b/arch/powerpc/kernel/asm-offsets.c | |||
| @@ -68,17 +68,18 @@ | |||
| 68 | #include "../mm/mmu_decl.h" | 68 | #include "../mm/mmu_decl.h" |
| 69 | #endif | 69 | #endif |
| 70 | 70 | ||
| 71 | #ifdef CONFIG_PPC_8xx | ||
| 72 | #include <asm/fixmap.h> | ||
| 73 | #endif | ||
| 74 | |||
| 71 | int main(void) | 75 | int main(void) |
| 72 | { | 76 | { |
| 73 | DEFINE(THREAD, offsetof(struct task_struct, thread)); | 77 | DEFINE(THREAD, offsetof(struct task_struct, thread)); |
| 74 | DEFINE(MM, offsetof(struct task_struct, mm)); | 78 | DEFINE(MM, offsetof(struct task_struct, mm)); |
| 75 | DEFINE(MMCONTEXTID, offsetof(struct mm_struct, context.id)); | 79 | DEFINE(MMCONTEXTID, offsetof(struct mm_struct, context.id)); |
| 76 | #ifdef CONFIG_PPC64 | 80 | #ifdef CONFIG_PPC64 |
| 77 | DEFINE(AUDITCONTEXT, offsetof(struct task_struct, audit_context)); | ||
| 78 | DEFINE(SIGSEGV, SIGSEGV); | 81 | DEFINE(SIGSEGV, SIGSEGV); |
| 79 | DEFINE(NMI_MASK, NMI_MASK); | 82 | DEFINE(NMI_MASK, NMI_MASK); |
| 80 | DEFINE(THREAD_DSCR, offsetof(struct thread_struct, dscr)); | ||
| 81 | DEFINE(THREAD_DSCR_INHERIT, offsetof(struct thread_struct, dscr_inherit)); | ||
| 82 | DEFINE(TASKTHREADPPR, offsetof(struct task_struct, thread.ppr)); | 83 | DEFINE(TASKTHREADPPR, offsetof(struct task_struct, thread.ppr)); |
| 83 | #else | 84 | #else |
| 84 | DEFINE(THREAD_INFO, offsetof(struct task_struct, stack)); | 85 | DEFINE(THREAD_INFO, offsetof(struct task_struct, stack)); |
| @@ -132,17 +133,6 @@ int main(void) | |||
| 132 | DEFINE(THREAD_KVM_VCPU, offsetof(struct thread_struct, kvm_vcpu)); | 133 | DEFINE(THREAD_KVM_VCPU, offsetof(struct thread_struct, kvm_vcpu)); |
| 133 | #endif | 134 | #endif |
| 134 | 135 | ||
| 135 | #ifdef CONFIG_PPC_BOOK3S_64 | ||
| 136 | DEFINE(THREAD_TAR, offsetof(struct thread_struct, tar)); | ||
| 137 | DEFINE(THREAD_BESCR, offsetof(struct thread_struct, bescr)); | ||
| 138 | DEFINE(THREAD_EBBHR, offsetof(struct thread_struct, ebbhr)); | ||
| 139 | DEFINE(THREAD_EBBRR, offsetof(struct thread_struct, ebbrr)); | ||
| 140 | DEFINE(THREAD_SIAR, offsetof(struct thread_struct, siar)); | ||
| 141 | DEFINE(THREAD_SDAR, offsetof(struct thread_struct, sdar)); | ||
| 142 | DEFINE(THREAD_SIER, offsetof(struct thread_struct, sier)); | ||
| 143 | DEFINE(THREAD_MMCR0, offsetof(struct thread_struct, mmcr0)); | ||
| 144 | DEFINE(THREAD_MMCR2, offsetof(struct thread_struct, mmcr2)); | ||
| 145 | #endif | ||
| 146 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM | 136 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 147 | DEFINE(PACATMSCRATCH, offsetof(struct paca_struct, tm_scratch)); | 137 | DEFINE(PACATMSCRATCH, offsetof(struct paca_struct, tm_scratch)); |
| 148 | DEFINE(THREAD_TM_TFHAR, offsetof(struct thread_struct, tm_tfhar)); | 138 | DEFINE(THREAD_TM_TFHAR, offsetof(struct thread_struct, tm_tfhar)); |
| @@ -178,7 +168,6 @@ int main(void) | |||
| 178 | DEFINE(ICACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, ilines_per_page)); | 168 | DEFINE(ICACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, ilines_per_page)); |
| 179 | /* paca */ | 169 | /* paca */ |
| 180 | DEFINE(PACA_SIZE, sizeof(struct paca_struct)); | 170 | DEFINE(PACA_SIZE, sizeof(struct paca_struct)); |
| 181 | DEFINE(PACA_LOCK_TOKEN, offsetof(struct paca_struct, lock_token)); | ||
| 182 | DEFINE(PACAPACAINDEX, offsetof(struct paca_struct, paca_index)); | 171 | DEFINE(PACAPACAINDEX, offsetof(struct paca_struct, paca_index)); |
| 183 | DEFINE(PACAPROCSTART, offsetof(struct paca_struct, cpu_start)); | 172 | DEFINE(PACAPROCSTART, offsetof(struct paca_struct, cpu_start)); |
| 184 | DEFINE(PACAKSAVE, offsetof(struct paca_struct, kstack)); | 173 | DEFINE(PACAKSAVE, offsetof(struct paca_struct, kstack)); |
| @@ -255,13 +244,28 @@ int main(void) | |||
| 255 | DEFINE(PACAHWCPUID, offsetof(struct paca_struct, hw_cpu_id)); | 244 | DEFINE(PACAHWCPUID, offsetof(struct paca_struct, hw_cpu_id)); |
| 256 | DEFINE(PACAKEXECSTATE, offsetof(struct paca_struct, kexec_state)); | 245 | DEFINE(PACAKEXECSTATE, offsetof(struct paca_struct, kexec_state)); |
| 257 | DEFINE(PACA_DSCR_DEFAULT, offsetof(struct paca_struct, dscr_default)); | 246 | DEFINE(PACA_DSCR_DEFAULT, offsetof(struct paca_struct, dscr_default)); |
| 258 | DEFINE(PACA_STARTTIME, offsetof(struct paca_struct, starttime)); | 247 | DEFINE(ACCOUNT_STARTTIME, |
| 259 | DEFINE(PACA_STARTTIME_USER, offsetof(struct paca_struct, starttime_user)); | 248 | offsetof(struct paca_struct, accounting.starttime)); |
| 260 | DEFINE(PACA_USER_TIME, offsetof(struct paca_struct, user_time)); | 249 | DEFINE(ACCOUNT_STARTTIME_USER, |
| 261 | DEFINE(PACA_SYSTEM_TIME, offsetof(struct paca_struct, system_time)); | 250 | offsetof(struct paca_struct, accounting.starttime_user)); |
| 251 | DEFINE(ACCOUNT_USER_TIME, | ||
| 252 | offsetof(struct paca_struct, accounting.user_time)); | ||
| 253 | DEFINE(ACCOUNT_SYSTEM_TIME, | ||
| 254 | offsetof(struct paca_struct, accounting.system_time)); | ||
| 262 | DEFINE(PACA_TRAP_SAVE, offsetof(struct paca_struct, trap_save)); | 255 | DEFINE(PACA_TRAP_SAVE, offsetof(struct paca_struct, trap_save)); |
| 263 | DEFINE(PACA_NAPSTATELOST, offsetof(struct paca_struct, nap_state_lost)); | 256 | DEFINE(PACA_NAPSTATELOST, offsetof(struct paca_struct, nap_state_lost)); |
| 264 | DEFINE(PACA_SPRG_VDSO, offsetof(struct paca_struct, sprg_vdso)); | 257 | DEFINE(PACA_SPRG_VDSO, offsetof(struct paca_struct, sprg_vdso)); |
| 258 | #else /* CONFIG_PPC64 */ | ||
| 259 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE | ||
| 260 | DEFINE(ACCOUNT_STARTTIME, | ||
| 261 | offsetof(struct thread_info, accounting.starttime)); | ||
| 262 | DEFINE(ACCOUNT_STARTTIME_USER, | ||
| 263 | offsetof(struct thread_info, accounting.starttime_user)); | ||
| 264 | DEFINE(ACCOUNT_USER_TIME, | ||
| 265 | offsetof(struct thread_info, accounting.user_time)); | ||
| 266 | DEFINE(ACCOUNT_SYSTEM_TIME, | ||
| 267 | offsetof(struct thread_info, accounting.system_time)); | ||
| 268 | #endif | ||
| 265 | #endif /* CONFIG_PPC64 */ | 269 | #endif /* CONFIG_PPC64 */ |
| 266 | 270 | ||
| 267 | /* RTAS */ | 271 | /* RTAS */ |
| @@ -275,12 +279,6 @@ int main(void) | |||
| 275 | /* Create extra stack space for SRR0 and SRR1 when calling prom/rtas. */ | 279 | /* Create extra stack space for SRR0 and SRR1 when calling prom/rtas. */ |
| 276 | DEFINE(PROM_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16); | 280 | DEFINE(PROM_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16); |
| 277 | DEFINE(RTAS_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16); | 281 | DEFINE(RTAS_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16); |
| 278 | |||
| 279 | /* hcall statistics */ | ||
| 280 | DEFINE(HCALL_STAT_SIZE, sizeof(struct hcall_stats)); | ||
| 281 | DEFINE(HCALL_STAT_CALLS, offsetof(struct hcall_stats, num_calls)); | ||
| 282 | DEFINE(HCALL_STAT_TB, offsetof(struct hcall_stats, tb_total)); | ||
| 283 | DEFINE(HCALL_STAT_PURR, offsetof(struct hcall_stats, purr_total)); | ||
| 284 | #endif /* CONFIG_PPC64 */ | 282 | #endif /* CONFIG_PPC64 */ |
| 285 | DEFINE(GPR0, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[0])); | 283 | DEFINE(GPR0, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[0])); |
| 286 | DEFINE(GPR1, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[1])); | 284 | DEFINE(GPR1, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[1])); |
| @@ -298,23 +296,6 @@ int main(void) | |||
| 298 | DEFINE(GPR13, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[13])); | 296 | DEFINE(GPR13, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[13])); |
| 299 | #ifndef CONFIG_PPC64 | 297 | #ifndef CONFIG_PPC64 |
| 300 | DEFINE(GPR14, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[14])); | 298 | DEFINE(GPR14, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[14])); |
| 301 | DEFINE(GPR15, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[15])); | ||
| 302 | DEFINE(GPR16, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[16])); | ||
| 303 | DEFINE(GPR17, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[17])); | ||
| 304 | DEFINE(GPR18, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[18])); | ||
| 305 | DEFINE(GPR19, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[19])); | ||
| 306 | DEFINE(GPR20, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[20])); | ||
| 307 | DEFINE(GPR21, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[21])); | ||
| 308 | DEFINE(GPR22, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[22])); | ||
| 309 | DEFINE(GPR23, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[23])); | ||
| 310 | DEFINE(GPR24, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[24])); | ||
| 311 | DEFINE(GPR25, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[25])); | ||
| 312 | DEFINE(GPR26, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[26])); | ||
| 313 | DEFINE(GPR27, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[27])); | ||
| 314 | DEFINE(GPR28, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[28])); | ||
| 315 | DEFINE(GPR29, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[29])); | ||
| 316 | DEFINE(GPR30, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[30])); | ||
| 317 | DEFINE(GPR31, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[31])); | ||
| 318 | #endif /* CONFIG_PPC64 */ | 299 | #endif /* CONFIG_PPC64 */ |
| 319 | /* | 300 | /* |
| 320 | * Note: these symbols include _ because they overlap with special | 301 | * Note: these symbols include _ because they overlap with special |
| @@ -332,7 +313,6 @@ int main(void) | |||
| 332 | DEFINE(RESULT, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, result)); | 313 | DEFINE(RESULT, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, result)); |
| 333 | DEFINE(_TRAP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, trap)); | 314 | DEFINE(_TRAP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, trap)); |
| 334 | #ifndef CONFIG_PPC64 | 315 | #ifndef CONFIG_PPC64 |
| 335 | DEFINE(_MQ, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, mq)); | ||
| 336 | /* | 316 | /* |
| 337 | * The PowerPC 400-class & Book-E processors have neither the DAR | 317 | * The PowerPC 400-class & Book-E processors have neither the DAR |
| 338 | * nor the DSISR SPRs. Hence, we overload them to hold the similar | 318 | * nor the DSISR SPRs. Hence, we overload them to hold the similar |
| @@ -369,8 +349,6 @@ int main(void) | |||
| 369 | DEFINE(SAVED_KSP_LIMIT, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, saved_ksp_limit)); | 349 | DEFINE(SAVED_KSP_LIMIT, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, saved_ksp_limit)); |
| 370 | #endif | 350 | #endif |
| 371 | #endif | 351 | #endif |
| 372 | DEFINE(CLONE_VM, CLONE_VM); | ||
| 373 | DEFINE(CLONE_UNTRACED, CLONE_UNTRACED); | ||
| 374 | 352 | ||
| 375 | #ifndef CONFIG_PPC64 | 353 | #ifndef CONFIG_PPC64 |
| 376 | DEFINE(MM_PGD, offsetof(struct mm_struct, pgd)); | 354 | DEFINE(MM_PGD, offsetof(struct mm_struct, pgd)); |
| @@ -380,7 +358,6 @@ int main(void) | |||
| 380 | DEFINE(CPU_SPEC_FEATURES, offsetof(struct cpu_spec, cpu_features)); | 358 | DEFINE(CPU_SPEC_FEATURES, offsetof(struct cpu_spec, cpu_features)); |
| 381 | DEFINE(CPU_SPEC_SETUP, offsetof(struct cpu_spec, cpu_setup)); | 359 | DEFINE(CPU_SPEC_SETUP, offsetof(struct cpu_spec, cpu_setup)); |
| 382 | DEFINE(CPU_SPEC_RESTORE, offsetof(struct cpu_spec, cpu_restore)); | 360 | DEFINE(CPU_SPEC_RESTORE, offsetof(struct cpu_spec, cpu_restore)); |
| 383 | DEFINE(CPU_DOWN_FLUSH, offsetof(struct cpu_spec, cpu_down_flush)); | ||
| 384 | 361 | ||
| 385 | DEFINE(pbe_address, offsetof(struct pbe, address)); | 362 | DEFINE(pbe_address, offsetof(struct pbe, address)); |
| 386 | DEFINE(pbe_orig_address, offsetof(struct pbe, orig_address)); | 363 | DEFINE(pbe_orig_address, offsetof(struct pbe, orig_address)); |
| @@ -395,7 +372,6 @@ int main(void) | |||
| 395 | DEFINE(CFG_TB_ORIG_STAMP, offsetof(struct vdso_data, tb_orig_stamp)); | 372 | DEFINE(CFG_TB_ORIG_STAMP, offsetof(struct vdso_data, tb_orig_stamp)); |
| 396 | DEFINE(CFG_TB_TICKS_PER_SEC, offsetof(struct vdso_data, tb_ticks_per_sec)); | 373 | DEFINE(CFG_TB_TICKS_PER_SEC, offsetof(struct vdso_data, tb_ticks_per_sec)); |
| 397 | DEFINE(CFG_TB_TO_XS, offsetof(struct vdso_data, tb_to_xs)); | 374 | DEFINE(CFG_TB_TO_XS, offsetof(struct vdso_data, tb_to_xs)); |
| 398 | DEFINE(CFG_STAMP_XSEC, offsetof(struct vdso_data, stamp_xsec)); | ||
| 399 | DEFINE(CFG_TB_UPDATE_COUNT, offsetof(struct vdso_data, tb_update_count)); | 375 | DEFINE(CFG_TB_UPDATE_COUNT, offsetof(struct vdso_data, tb_update_count)); |
| 400 | DEFINE(CFG_TZ_MINUTEWEST, offsetof(struct vdso_data, tz_minuteswest)); | 376 | DEFINE(CFG_TZ_MINUTEWEST, offsetof(struct vdso_data, tz_minuteswest)); |
| 401 | DEFINE(CFG_TZ_DSTTIME, offsetof(struct vdso_data, tz_dsttime)); | 377 | DEFINE(CFG_TZ_DSTTIME, offsetof(struct vdso_data, tz_dsttime)); |
| @@ -517,7 +493,6 @@ int main(void) | |||
| 517 | DEFINE(KVM_HOST_SDR1, offsetof(struct kvm, arch.host_sdr1)); | 493 | DEFINE(KVM_HOST_SDR1, offsetof(struct kvm, arch.host_sdr1)); |
| 518 | DEFINE(KVM_NEED_FLUSH, offsetof(struct kvm, arch.need_tlb_flush.bits)); | 494 | DEFINE(KVM_NEED_FLUSH, offsetof(struct kvm, arch.need_tlb_flush.bits)); |
| 519 | DEFINE(KVM_ENABLED_HCALLS, offsetof(struct kvm, arch.enabled_hcalls)); | 495 | DEFINE(KVM_ENABLED_HCALLS, offsetof(struct kvm, arch.enabled_hcalls)); |
| 520 | DEFINE(KVM_LPCR, offsetof(struct kvm, arch.lpcr)); | ||
| 521 | DEFINE(KVM_VRMA_SLB_V, offsetof(struct kvm, arch.vrma_slb_v)); | 496 | DEFINE(KVM_VRMA_SLB_V, offsetof(struct kvm, arch.vrma_slb_v)); |
| 522 | DEFINE(VCPU_DSISR, offsetof(struct kvm_vcpu, arch.shregs.dsisr)); | 497 | DEFINE(VCPU_DSISR, offsetof(struct kvm_vcpu, arch.shregs.dsisr)); |
| 523 | DEFINE(VCPU_DAR, offsetof(struct kvm_vcpu, arch.shregs.dar)); | 498 | DEFINE(VCPU_DAR, offsetof(struct kvm_vcpu, arch.shregs.dar)); |
| @@ -528,7 +503,6 @@ int main(void) | |||
| 528 | DEFINE(VCPU_THREAD_CPU, offsetof(struct kvm_vcpu, arch.thread_cpu)); | 503 | DEFINE(VCPU_THREAD_CPU, offsetof(struct kvm_vcpu, arch.thread_cpu)); |
| 529 | #endif | 504 | #endif |
| 530 | #ifdef CONFIG_PPC_BOOK3S | 505 | #ifdef CONFIG_PPC_BOOK3S |
| 531 | DEFINE(VCPU_VCPUID, offsetof(struct kvm_vcpu, vcpu_id)); | ||
| 532 | DEFINE(VCPU_PURR, offsetof(struct kvm_vcpu, arch.purr)); | 506 | DEFINE(VCPU_PURR, offsetof(struct kvm_vcpu, arch.purr)); |
| 533 | DEFINE(VCPU_SPURR, offsetof(struct kvm_vcpu, arch.spurr)); | 507 | DEFINE(VCPU_SPURR, offsetof(struct kvm_vcpu, arch.spurr)); |
| 534 | DEFINE(VCPU_IC, offsetof(struct kvm_vcpu, arch.ic)); | 508 | DEFINE(VCPU_IC, offsetof(struct kvm_vcpu, arch.ic)); |
| @@ -566,7 +540,6 @@ int main(void) | |||
| 566 | DEFINE(VCPU_CFAR, offsetof(struct kvm_vcpu, arch.cfar)); | 540 | DEFINE(VCPU_CFAR, offsetof(struct kvm_vcpu, arch.cfar)); |
| 567 | DEFINE(VCPU_PPR, offsetof(struct kvm_vcpu, arch.ppr)); | 541 | DEFINE(VCPU_PPR, offsetof(struct kvm_vcpu, arch.ppr)); |
| 568 | DEFINE(VCPU_FSCR, offsetof(struct kvm_vcpu, arch.fscr)); | 542 | DEFINE(VCPU_FSCR, offsetof(struct kvm_vcpu, arch.fscr)); |
| 569 | DEFINE(VCPU_SHADOW_FSCR, offsetof(struct kvm_vcpu, arch.shadow_fscr)); | ||
| 570 | DEFINE(VCPU_PSPB, offsetof(struct kvm_vcpu, arch.pspb)); | 543 | DEFINE(VCPU_PSPB, offsetof(struct kvm_vcpu, arch.pspb)); |
| 571 | DEFINE(VCPU_EBBHR, offsetof(struct kvm_vcpu, arch.ebbhr)); | 544 | DEFINE(VCPU_EBBHR, offsetof(struct kvm_vcpu, arch.ebbhr)); |
| 572 | DEFINE(VCPU_EBBRR, offsetof(struct kvm_vcpu, arch.ebbrr)); | 545 | DEFINE(VCPU_EBBRR, offsetof(struct kvm_vcpu, arch.ebbrr)); |
| @@ -576,7 +549,6 @@ int main(void) | |||
| 576 | DEFINE(VCPU_TCSCR, offsetof(struct kvm_vcpu, arch.tcscr)); | 549 | DEFINE(VCPU_TCSCR, offsetof(struct kvm_vcpu, arch.tcscr)); |
| 577 | DEFINE(VCPU_ACOP, offsetof(struct kvm_vcpu, arch.acop)); | 550 | DEFINE(VCPU_ACOP, offsetof(struct kvm_vcpu, arch.acop)); |
| 578 | DEFINE(VCPU_WORT, offsetof(struct kvm_vcpu, arch.wort)); | 551 | DEFINE(VCPU_WORT, offsetof(struct kvm_vcpu, arch.wort)); |
| 579 | DEFINE(VCPU_SHADOW_SRR1, offsetof(struct kvm_vcpu, arch.shadow_srr1)); | ||
| 580 | DEFINE(VCORE_ENTRY_EXIT, offsetof(struct kvmppc_vcore, entry_exit_map)); | 552 | DEFINE(VCORE_ENTRY_EXIT, offsetof(struct kvmppc_vcore, entry_exit_map)); |
| 581 | DEFINE(VCORE_IN_GUEST, offsetof(struct kvmppc_vcore, in_guest)); | 553 | DEFINE(VCORE_IN_GUEST, offsetof(struct kvmppc_vcore, in_guest)); |
| 582 | DEFINE(VCORE_NAPPING_THREADS, offsetof(struct kvmppc_vcore, napping_threads)); | 554 | DEFINE(VCORE_NAPPING_THREADS, offsetof(struct kvmppc_vcore, napping_threads)); |
| @@ -693,7 +665,6 @@ int main(void) | |||
| 693 | DEFINE(KVM_SPLIT_RPR, offsetof(struct kvm_split_mode, rpr)); | 665 | DEFINE(KVM_SPLIT_RPR, offsetof(struct kvm_split_mode, rpr)); |
| 694 | DEFINE(KVM_SPLIT_PMMAR, offsetof(struct kvm_split_mode, pmmar)); | 666 | DEFINE(KVM_SPLIT_PMMAR, offsetof(struct kvm_split_mode, pmmar)); |
| 695 | DEFINE(KVM_SPLIT_LDBAR, offsetof(struct kvm_split_mode, ldbar)); | 667 | DEFINE(KVM_SPLIT_LDBAR, offsetof(struct kvm_split_mode, ldbar)); |
| 696 | DEFINE(KVM_SPLIT_SIZE, offsetof(struct kvm_split_mode, subcore_size)); | ||
| 697 | DEFINE(KVM_SPLIT_DO_NAP, offsetof(struct kvm_split_mode, do_nap)); | 668 | DEFINE(KVM_SPLIT_DO_NAP, offsetof(struct kvm_split_mode, do_nap)); |
| 698 | DEFINE(KVM_SPLIT_NAPPED, offsetof(struct kvm_split_mode, napped)); | 669 | DEFINE(KVM_SPLIT_NAPPED, offsetof(struct kvm_split_mode, napped)); |
| 699 | #endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */ | 670 | #endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */ |
| @@ -756,7 +727,6 @@ int main(void) | |||
| 756 | #ifdef CONFIG_KVM_BOOKE_HV | 727 | #ifdef CONFIG_KVM_BOOKE_HV |
| 757 | DEFINE(VCPU_HOST_MAS4, offsetof(struct kvm_vcpu, arch.host_mas4)); | 728 | DEFINE(VCPU_HOST_MAS4, offsetof(struct kvm_vcpu, arch.host_mas4)); |
| 758 | DEFINE(VCPU_HOST_MAS6, offsetof(struct kvm_vcpu, arch.host_mas6)); | 729 | DEFINE(VCPU_HOST_MAS6, offsetof(struct kvm_vcpu, arch.host_mas6)); |
| 759 | DEFINE(VCPU_EPLC, offsetof(struct kvm_vcpu, arch.eplc)); | ||
| 760 | #endif | 730 | #endif |
| 761 | 731 | ||
| 762 | #ifdef CONFIG_KVM_EXIT_TIMING | 732 | #ifdef CONFIG_KVM_EXIT_TIMING |
| @@ -783,5 +753,9 @@ int main(void) | |||
| 783 | 753 | ||
| 784 | DEFINE(PPC_DBELL_SERVER, PPC_DBELL_SERVER); | 754 | DEFINE(PPC_DBELL_SERVER, PPC_DBELL_SERVER); |
| 785 | 755 | ||
| 756 | #ifdef CONFIG_PPC_8xx | ||
| 757 | DEFINE(VIRT_IMMR_BASE, (u64)__fix_to_virt(FIX_IMMR_BASE)); | ||
| 758 | #endif | ||
| 759 | |||
| 786 | return 0; | 760 | return 0; |
| 787 | } | 761 | } |
diff --git a/arch/powerpc/kernel/cpu_setup_6xx.S b/arch/powerpc/kernel/cpu_setup_6xx.S index f8cd9fba4d35..c5e5a94d9892 100644 --- a/arch/powerpc/kernel/cpu_setup_6xx.S +++ b/arch/powerpc/kernel/cpu_setup_6xx.S | |||
| @@ -156,7 +156,7 @@ setup_7410_workarounds: | |||
| 156 | blr | 156 | blr |
| 157 | 157 | ||
| 158 | /* 740/750/7400/7410 | 158 | /* 740/750/7400/7410 |
| 159 | * Enable Store Gathering (SGE), Address Brodcast (ABE), | 159 | * Enable Store Gathering (SGE), Address Broadcast (ABE), |
| 160 | * Branch History Table (BHTE), Branch Target ICache (BTIC) | 160 | * Branch History Table (BHTE), Branch Target ICache (BTIC) |
| 161 | * Dynamic Power Management (DPM), Speculative (SPD) | 161 | * Dynamic Power Management (DPM), Speculative (SPD) |
| 162 | * Clear Instruction cache throttling (ICTC) | 162 | * Clear Instruction cache throttling (ICTC) |
diff --git a/arch/powerpc/kernel/cpu_setup_power.S b/arch/powerpc/kernel/cpu_setup_power.S index 584e119fa8b0..52ff3f025437 100644 --- a/arch/powerpc/kernel/cpu_setup_power.S +++ b/arch/powerpc/kernel/cpu_setup_power.S | |||
| @@ -51,6 +51,7 @@ _GLOBAL(__setup_cpu_power8) | |||
| 51 | mflr r11 | 51 | mflr r11 |
| 52 | bl __init_FSCR | 52 | bl __init_FSCR |
| 53 | bl __init_PMU | 53 | bl __init_PMU |
| 54 | bl __init_PMU_ISA207 | ||
| 54 | bl __init_hvmode_206 | 55 | bl __init_hvmode_206 |
| 55 | mtlr r11 | 56 | mtlr r11 |
| 56 | beqlr | 57 | beqlr |
| @@ -62,6 +63,7 @@ _GLOBAL(__setup_cpu_power8) | |||
| 62 | bl __init_HFSCR | 63 | bl __init_HFSCR |
| 63 | bl __init_tlb_power8 | 64 | bl __init_tlb_power8 |
| 64 | bl __init_PMU_HV | 65 | bl __init_PMU_HV |
| 66 | bl __init_PMU_HV_ISA207 | ||
| 65 | mtlr r11 | 67 | mtlr r11 |
| 66 | blr | 68 | blr |
| 67 | 69 | ||
| @@ -69,6 +71,7 @@ _GLOBAL(__restore_cpu_power8) | |||
| 69 | mflr r11 | 71 | mflr r11 |
| 70 | bl __init_FSCR | 72 | bl __init_FSCR |
| 71 | bl __init_PMU | 73 | bl __init_PMU |
| 74 | bl __init_PMU_ISA207 | ||
| 72 | mfmsr r3 | 75 | mfmsr r3 |
| 73 | rldicl. r0,r3,4,63 | 76 | rldicl. r0,r3,4,63 |
| 74 | mtlr r11 | 77 | mtlr r11 |
| @@ -81,12 +84,14 @@ _GLOBAL(__restore_cpu_power8) | |||
| 81 | bl __init_HFSCR | 84 | bl __init_HFSCR |
| 82 | bl __init_tlb_power8 | 85 | bl __init_tlb_power8 |
| 83 | bl __init_PMU_HV | 86 | bl __init_PMU_HV |
| 87 | bl __init_PMU_HV_ISA207 | ||
| 84 | mtlr r11 | 88 | mtlr r11 |
| 85 | blr | 89 | blr |
| 86 | 90 | ||
| 87 | _GLOBAL(__setup_cpu_power9) | 91 | _GLOBAL(__setup_cpu_power9) |
| 88 | mflr r11 | 92 | mflr r11 |
| 89 | bl __init_FSCR | 93 | bl __init_FSCR |
| 94 | bl __init_PMU | ||
| 90 | bl __init_hvmode_206 | 95 | bl __init_hvmode_206 |
| 91 | mtlr r11 | 96 | mtlr r11 |
| 92 | beqlr | 97 | beqlr |
| @@ -94,15 +99,18 @@ _GLOBAL(__setup_cpu_power9) | |||
| 94 | mtspr SPRN_LPID,r0 | 99 | mtspr SPRN_LPID,r0 |
| 95 | mfspr r3,SPRN_LPCR | 100 | mfspr r3,SPRN_LPCR |
| 96 | ori r3, r3, LPCR_PECEDH | 101 | ori r3, r3, LPCR_PECEDH |
| 102 | ori r3, r3, LPCR_HVICE | ||
| 97 | bl __init_LPCR | 103 | bl __init_LPCR |
| 98 | bl __init_HFSCR | 104 | bl __init_HFSCR |
| 99 | bl __init_tlb_power9 | 105 | bl __init_tlb_power9 |
| 106 | bl __init_PMU_HV | ||
| 100 | mtlr r11 | 107 | mtlr r11 |
| 101 | blr | 108 | blr |
| 102 | 109 | ||
| 103 | _GLOBAL(__restore_cpu_power9) | 110 | _GLOBAL(__restore_cpu_power9) |
| 104 | mflr r11 | 111 | mflr r11 |
| 105 | bl __init_FSCR | 112 | bl __init_FSCR |
| 113 | bl __init_PMU | ||
| 106 | mfmsr r3 | 114 | mfmsr r3 |
| 107 | rldicl. r0,r3,4,63 | 115 | rldicl. r0,r3,4,63 |
| 108 | mtlr r11 | 116 | mtlr r11 |
| @@ -111,9 +119,11 @@ _GLOBAL(__restore_cpu_power9) | |||
| 111 | mtspr SPRN_LPID,r0 | 119 | mtspr SPRN_LPID,r0 |
| 112 | mfspr r3,SPRN_LPCR | 120 | mfspr r3,SPRN_LPCR |
| 113 | ori r3, r3, LPCR_PECEDH | 121 | ori r3, r3, LPCR_PECEDH |
| 122 | ori r3, r3, LPCR_HVICE | ||
| 114 | bl __init_LPCR | 123 | bl __init_LPCR |
| 115 | bl __init_HFSCR | 124 | bl __init_HFSCR |
| 116 | bl __init_tlb_power9 | 125 | bl __init_tlb_power9 |
| 126 | bl __init_PMU_HV | ||
| 117 | mtlr r11 | 127 | mtlr r11 |
| 118 | blr | 128 | blr |
| 119 | 129 | ||
| @@ -208,14 +218,22 @@ __init_tlb_power9: | |||
| 208 | __init_PMU_HV: | 218 | __init_PMU_HV: |
| 209 | li r5,0 | 219 | li r5,0 |
| 210 | mtspr SPRN_MMCRC,r5 | 220 | mtspr SPRN_MMCRC,r5 |
| 221 | blr | ||
| 222 | |||
| 223 | __init_PMU_HV_ISA207: | ||
| 224 | li r5,0 | ||
| 211 | mtspr SPRN_MMCRH,r5 | 225 | mtspr SPRN_MMCRH,r5 |
| 212 | blr | 226 | blr |
| 213 | 227 | ||
| 214 | __init_PMU: | 228 | __init_PMU: |
| 215 | li r5,0 | 229 | li r5,0 |
| 216 | mtspr SPRN_MMCRS,r5 | ||
| 217 | mtspr SPRN_MMCRA,r5 | 230 | mtspr SPRN_MMCRA,r5 |
| 218 | mtspr SPRN_MMCR0,r5 | 231 | mtspr SPRN_MMCR0,r5 |
| 219 | mtspr SPRN_MMCR1,r5 | 232 | mtspr SPRN_MMCR1,r5 |
| 220 | mtspr SPRN_MMCR2,r5 | 233 | mtspr SPRN_MMCR2,r5 |
| 221 | blr | 234 | blr |
| 235 | |||
| 236 | __init_PMU_ISA207: | ||
| 237 | li r5,0 | ||
| 238 | mtspr SPRN_MMCRS,r5 | ||
| 239 | blr | ||
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index eeeacf6235a3..d81f826d1029 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c | |||
| @@ -137,7 +137,7 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
| 137 | .cpu_name = "POWER4 (gp)", | 137 | .cpu_name = "POWER4 (gp)", |
| 138 | .cpu_features = CPU_FTRS_POWER4, | 138 | .cpu_features = CPU_FTRS_POWER4, |
| 139 | .cpu_user_features = COMMON_USER_POWER4, | 139 | .cpu_user_features = COMMON_USER_POWER4, |
| 140 | .mmu_features = MMU_FTRS_POWER4, | 140 | .mmu_features = MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA, |
| 141 | .icache_bsize = 128, | 141 | .icache_bsize = 128, |
| 142 | .dcache_bsize = 128, | 142 | .dcache_bsize = 128, |
| 143 | .num_pmcs = 8, | 143 | .num_pmcs = 8, |
| @@ -152,7 +152,7 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
| 152 | .cpu_name = "POWER4+ (gq)", | 152 | .cpu_name = "POWER4+ (gq)", |
| 153 | .cpu_features = CPU_FTRS_POWER4, | 153 | .cpu_features = CPU_FTRS_POWER4, |
| 154 | .cpu_user_features = COMMON_USER_POWER4, | 154 | .cpu_user_features = COMMON_USER_POWER4, |
| 155 | .mmu_features = MMU_FTRS_POWER4, | 155 | .mmu_features = MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA, |
| 156 | .icache_bsize = 128, | 156 | .icache_bsize = 128, |
| 157 | .dcache_bsize = 128, | 157 | .dcache_bsize = 128, |
| 158 | .num_pmcs = 8, | 158 | .num_pmcs = 8, |
diff --git a/arch/powerpc/kernel/crash.c b/arch/powerpc/kernel/crash.c index 2bb252c01f07..47b63de81f9b 100644 --- a/arch/powerpc/kernel/crash.c +++ b/arch/powerpc/kernel/crash.c | |||
| @@ -48,8 +48,8 @@ int crashing_cpu = -1; | |||
| 48 | static int time_to_dump; | 48 | static int time_to_dump; |
| 49 | 49 | ||
| 50 | #define CRASH_HANDLER_MAX 3 | 50 | #define CRASH_HANDLER_MAX 3 |
| 51 | /* NULL terminated list of shutdown handles */ | 51 | /* List of shutdown handles */ |
| 52 | static crash_shutdown_t crash_shutdown_handles[CRASH_HANDLER_MAX+1]; | 52 | static crash_shutdown_t crash_shutdown_handles[CRASH_HANDLER_MAX]; |
| 53 | static DEFINE_SPINLOCK(crash_handlers_lock); | 53 | static DEFINE_SPINLOCK(crash_handlers_lock); |
| 54 | 54 | ||
| 55 | static unsigned long crash_shutdown_buf[JMP_BUF_LEN]; | 55 | static unsigned long crash_shutdown_buf[JMP_BUF_LEN]; |
| @@ -65,7 +65,7 @@ static int handle_fault(struct pt_regs *regs) | |||
| 65 | #ifdef CONFIG_SMP | 65 | #ifdef CONFIG_SMP |
| 66 | 66 | ||
| 67 | static atomic_t cpus_in_crash; | 67 | static atomic_t cpus_in_crash; |
| 68 | void crash_ipi_callback(struct pt_regs *regs) | 68 | static void crash_ipi_callback(struct pt_regs *regs) |
| 69 | { | 69 | { |
| 70 | static cpumask_t cpus_state_saved = CPU_MASK_NONE; | 70 | static cpumask_t cpus_state_saved = CPU_MASK_NONE; |
| 71 | 71 | ||
| @@ -288,9 +288,14 @@ int crash_shutdown_unregister(crash_shutdown_t handler) | |||
| 288 | rc = 1; | 288 | rc = 1; |
| 289 | } else { | 289 | } else { |
| 290 | /* Shift handles down */ | 290 | /* Shift handles down */ |
| 291 | for (; crash_shutdown_handles[i]; i++) | 291 | for (; i < (CRASH_HANDLER_MAX - 1); i++) |
| 292 | crash_shutdown_handles[i] = | 292 | crash_shutdown_handles[i] = |
| 293 | crash_shutdown_handles[i+1]; | 293 | crash_shutdown_handles[i+1]; |
| 294 | /* | ||
| 295 | * Reset last entry to NULL now that it has been shifted down, | ||
| 296 | * this will allow new handles to be added here. | ||
| 297 | */ | ||
| 298 | crash_shutdown_handles[i] = NULL; | ||
| 294 | rc = 0; | 299 | rc = 0; |
| 295 | } | 300 | } |
| 296 | 301 | ||
| @@ -346,7 +351,7 @@ void default_machine_crash_shutdown(struct pt_regs *regs) | |||
| 346 | old_handler = __debugger_fault_handler; | 351 | old_handler = __debugger_fault_handler; |
| 347 | __debugger_fault_handler = handle_fault; | 352 | __debugger_fault_handler = handle_fault; |
| 348 | crash_shutdown_cpu = smp_processor_id(); | 353 | crash_shutdown_cpu = smp_processor_id(); |
| 349 | for (i = 0; crash_shutdown_handles[i]; i++) { | 354 | for (i = 0; i < CRASH_HANDLER_MAX && crash_shutdown_handles[i]; i++) { |
| 350 | if (setjmp(crash_shutdown_buf) == 0) { | 355 | if (setjmp(crash_shutdown_buf) == 0) { |
| 351 | /* | 356 | /* |
| 352 | * Insert syncs and delay to ensure | 357 | * Insert syncs and delay to ensure |
diff --git a/arch/powerpc/kernel/eeh_cache.c b/arch/powerpc/kernel/eeh_cache.c index ddbcfab7efdf..d4cc26618809 100644 --- a/arch/powerpc/kernel/eeh_cache.c +++ b/arch/powerpc/kernel/eeh_cache.c | |||
| @@ -114,9 +114,9 @@ static void eeh_addr_cache_print(struct pci_io_addr_cache *cache) | |||
| 114 | while (n) { | 114 | while (n) { |
| 115 | struct pci_io_addr_range *piar; | 115 | struct pci_io_addr_range *piar; |
| 116 | piar = rb_entry(n, struct pci_io_addr_range, rb_node); | 116 | piar = rb_entry(n, struct pci_io_addr_range, rb_node); |
| 117 | pr_debug("PCI: %s addr range %d [%lx-%lx]: %s\n", | 117 | pr_debug("PCI: %s addr range %d [%pap-%pap]: %s\n", |
| 118 | (piar->flags & IORESOURCE_IO) ? "i/o" : "mem", cnt, | 118 | (piar->flags & IORESOURCE_IO) ? "i/o" : "mem", cnt, |
| 119 | piar->addr_lo, piar->addr_hi, pci_name(piar->pcidev)); | 119 | &piar->addr_lo, &piar->addr_hi, pci_name(piar->pcidev)); |
| 120 | cnt++; | 120 | cnt++; |
| 121 | n = rb_next(n); | 121 | n = rb_next(n); |
| 122 | } | 122 | } |
| @@ -159,8 +159,8 @@ eeh_addr_cache_insert(struct pci_dev *dev, resource_size_t alo, | |||
| 159 | piar->flags = flags; | 159 | piar->flags = flags; |
| 160 | 160 | ||
| 161 | #ifdef DEBUG | 161 | #ifdef DEBUG |
| 162 | pr_debug("PIAR: insert range=[%lx:%lx] dev=%s\n", | 162 | pr_debug("PIAR: insert range=[%pap:%pap] dev=%s\n", |
| 163 | alo, ahi, pci_name(dev)); | 163 | &alo, &ahi, pci_name(dev)); |
| 164 | #endif | 164 | #endif |
| 165 | 165 | ||
| 166 | rb_link_node(&piar->rb_node, parent, p); | 166 | rb_link_node(&piar->rb_node, parent, p); |
diff --git a/arch/powerpc/kernel/eeh_dev.c b/arch/powerpc/kernel/eeh_dev.c index 7815095fe3d8..d6b2ca70d14d 100644 --- a/arch/powerpc/kernel/eeh_dev.c +++ b/arch/powerpc/kernel/eeh_dev.c | |||
| @@ -44,14 +44,13 @@ | |||
| 44 | /** | 44 | /** |
| 45 | * eeh_dev_init - Create EEH device according to OF node | 45 | * eeh_dev_init - Create EEH device according to OF node |
| 46 | * @pdn: PCI device node | 46 | * @pdn: PCI device node |
| 47 | * @data: PHB | ||
| 48 | * | 47 | * |
| 49 | * It will create EEH device according to the given OF node. The function | 48 | * It will create EEH device according to the given OF node. The function |
| 50 | * might be called by PCI emunation, DR, PHB hotplug. | 49 | * might be called by PCI emunation, DR, PHB hotplug. |
| 51 | */ | 50 | */ |
| 52 | void *eeh_dev_init(struct pci_dn *pdn, void *data) | 51 | struct eeh_dev *eeh_dev_init(struct pci_dn *pdn) |
| 53 | { | 52 | { |
| 54 | struct pci_controller *phb = data; | 53 | struct pci_controller *phb = pdn->phb; |
| 55 | struct eeh_dev *edev; | 54 | struct eeh_dev *edev; |
| 56 | 55 | ||
| 57 | /* Allocate EEH device */ | 56 | /* Allocate EEH device */ |
| @@ -69,7 +68,7 @@ void *eeh_dev_init(struct pci_dn *pdn, void *data) | |||
| 69 | INIT_LIST_HEAD(&edev->list); | 68 | INIT_LIST_HEAD(&edev->list); |
| 70 | INIT_LIST_HEAD(&edev->rmv_list); | 69 | INIT_LIST_HEAD(&edev->rmv_list); |
| 71 | 70 | ||
| 72 | return NULL; | 71 | return edev; |
| 73 | } | 72 | } |
| 74 | 73 | ||
| 75 | /** | 74 | /** |
| @@ -81,16 +80,8 @@ void *eeh_dev_init(struct pci_dn *pdn, void *data) | |||
| 81 | */ | 80 | */ |
| 82 | void eeh_dev_phb_init_dynamic(struct pci_controller *phb) | 81 | void eeh_dev_phb_init_dynamic(struct pci_controller *phb) |
| 83 | { | 82 | { |
| 84 | struct pci_dn *root = phb->pci_data; | ||
| 85 | |||
| 86 | /* EEH PE for PHB */ | 83 | /* EEH PE for PHB */ |
| 87 | eeh_phb_pe_create(phb); | 84 | eeh_phb_pe_create(phb); |
| 88 | |||
| 89 | /* EEH device for PHB */ | ||
| 90 | eeh_dev_init(root, phb); | ||
| 91 | |||
| 92 | /* EEH devices for children OF nodes */ | ||
| 93 | traverse_pci_dn(root, eeh_dev_init, phb); | ||
| 94 | } | 85 | } |
| 95 | 86 | ||
| 96 | /** | 87 | /** |
| @@ -106,8 +97,6 @@ static int __init eeh_dev_phb_init(void) | |||
| 106 | list_for_each_entry_safe(phb, tmp, &hose_list, list_node) | 97 | list_for_each_entry_safe(phb, tmp, &hose_list, list_node) |
| 107 | eeh_dev_phb_init_dynamic(phb); | 98 | eeh_dev_phb_init_dynamic(phb); |
| 108 | 99 | ||
| 109 | pr_info("EEH: devices created\n"); | ||
| 110 | |||
| 111 | return 0; | 100 | return 0; |
| 112 | } | 101 | } |
| 113 | 102 | ||
diff --git a/arch/powerpc/kernel/eeh_driver.c b/arch/powerpc/kernel/eeh_driver.c index d70101e1e25c..5f36e8a70daa 100644 --- a/arch/powerpc/kernel/eeh_driver.c +++ b/arch/powerpc/kernel/eeh_driver.c | |||
| @@ -139,7 +139,7 @@ static void eeh_enable_irq(struct pci_dev *dev) | |||
| 139 | * into it. | 139 | * into it. |
| 140 | * | 140 | * |
| 141 | * That's just wrong.The warning in the core code is | 141 | * That's just wrong.The warning in the core code is |
| 142 | * there to tell people to fix their assymetries in | 142 | * there to tell people to fix their asymmetries in |
| 143 | * their own code, not by abusing the core information | 143 | * their own code, not by abusing the core information |
| 144 | * to avoid it. | 144 | * to avoid it. |
| 145 | * | 145 | * |
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S index 2405631e91a2..9899032230b4 100644 --- a/arch/powerpc/kernel/entry_32.S +++ b/arch/powerpc/kernel/entry_32.S | |||
| @@ -175,6 +175,12 @@ transfer_to_handler: | |||
| 175 | addi r12,r12,-1 | 175 | addi r12,r12,-1 |
| 176 | stw r12,4(r11) | 176 | stw r12,4(r11) |
| 177 | #endif | 177 | #endif |
| 178 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE | ||
| 179 | CURRENT_THREAD_INFO(r9, r1) | ||
| 180 | tophys(r9, r9) | ||
| 181 | ACCOUNT_CPU_USER_ENTRY(r9, r11, r12) | ||
| 182 | #endif | ||
| 183 | |||
| 178 | b 3f | 184 | b 3f |
| 179 | 185 | ||
| 180 | 2: /* if from kernel, check interrupted DOZE/NAP mode and | 186 | 2: /* if from kernel, check interrupted DOZE/NAP mode and |
| @@ -398,6 +404,13 @@ BEGIN_FTR_SECTION | |||
| 398 | lwarx r7,0,r1 | 404 | lwarx r7,0,r1 |
| 399 | END_FTR_SECTION_IFSET(CPU_FTR_NEED_PAIRED_STWCX) | 405 | END_FTR_SECTION_IFSET(CPU_FTR_NEED_PAIRED_STWCX) |
| 400 | stwcx. r0,0,r1 /* to clear the reservation */ | 406 | stwcx. r0,0,r1 /* to clear the reservation */ |
| 407 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE | ||
| 408 | andi. r4,r8,MSR_PR | ||
| 409 | beq 3f | ||
| 410 | CURRENT_THREAD_INFO(r4, r1) | ||
| 411 | ACCOUNT_CPU_USER_EXIT(r4, r5, r7) | ||
| 412 | 3: | ||
| 413 | #endif | ||
| 401 | lwz r4,_LINK(r1) | 414 | lwz r4,_LINK(r1) |
| 402 | lwz r5,_CCR(r1) | 415 | lwz r5,_CCR(r1) |
| 403 | mtlr r4 | 416 | mtlr r4 |
| @@ -769,6 +782,10 @@ restore_user: | |||
| 769 | andis. r10,r0,DBCR0_IDM@h | 782 | andis. r10,r0,DBCR0_IDM@h |
| 770 | bnel- load_dbcr0 | 783 | bnel- load_dbcr0 |
| 771 | #endif | 784 | #endif |
| 785 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE | ||
| 786 | CURRENT_THREAD_INFO(r9, r1) | ||
| 787 | ACCOUNT_CPU_USER_EXIT(r9, r10, r11) | ||
| 788 | #endif | ||
| 772 | 789 | ||
| 773 | b restore | 790 | b restore |
| 774 | 791 | ||
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S index 73e461a3dfbb..fcb2887f5a33 100644 --- a/arch/powerpc/kernel/entry_64.S +++ b/arch/powerpc/kernel/entry_64.S | |||
| @@ -72,7 +72,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_TM) | |||
| 72 | std r0,GPR0(r1) | 72 | std r0,GPR0(r1) |
| 73 | std r10,GPR1(r1) | 73 | std r10,GPR1(r1) |
| 74 | beq 2f /* if from kernel mode */ | 74 | beq 2f /* if from kernel mode */ |
| 75 | ACCOUNT_CPU_USER_ENTRY(r10, r11) | 75 | ACCOUNT_CPU_USER_ENTRY(r13, r10, r11) |
| 76 | 2: std r2,GPR2(r1) | 76 | 2: std r2,GPR2(r1) |
| 77 | std r3,GPR3(r1) | 77 | std r3,GPR3(r1) |
| 78 | mfcr r2 | 78 | mfcr r2 |
| @@ -246,7 +246,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_STCX_CHECKS_ADDRESS) | |||
| 246 | ld r4,_LINK(r1) | 246 | ld r4,_LINK(r1) |
| 247 | 247 | ||
| 248 | beq- 1f | 248 | beq- 1f |
| 249 | ACCOUNT_CPU_USER_EXIT(r11, r12) | 249 | ACCOUNT_CPU_USER_EXIT(r13, r11, r12) |
| 250 | 250 | ||
| 251 | BEGIN_FTR_SECTION | 251 | BEGIN_FTR_SECTION |
| 252 | HMT_MEDIUM_LOW | 252 | HMT_MEDIUM_LOW |
| @@ -453,7 +453,7 @@ _GLOBAL(ret_from_kernel_thread) | |||
| 453 | REST_NVGPRS(r1) | 453 | REST_NVGPRS(r1) |
| 454 | mtlr r14 | 454 | mtlr r14 |
| 455 | mr r3,r15 | 455 | mr r3,r15 |
| 456 | #if defined(_CALL_ELF) && _CALL_ELF == 2 | 456 | #ifdef PPC64_ELF_ABI_v2 |
| 457 | mr r12,r14 | 457 | mr r12,r14 |
| 458 | #endif | 458 | #endif |
| 459 | blrl | 459 | blrl |
| @@ -859,7 +859,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR) | |||
| 859 | BEGIN_FTR_SECTION | 859 | BEGIN_FTR_SECTION |
| 860 | mtspr SPRN_PPR,r2 /* Restore PPR */ | 860 | mtspr SPRN_PPR,r2 /* Restore PPR */ |
| 861 | END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR) | 861 | END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR) |
| 862 | ACCOUNT_CPU_USER_EXIT(r2, r4) | 862 | ACCOUNT_CPU_USER_EXIT(r13, r2, r4) |
| 863 | REST_GPR(13, r1) | 863 | REST_GPR(13, r1) |
| 864 | 1: | 864 | 1: |
| 865 | mtspr SPRN_SRR1,r3 | 865 | mtspr SPRN_SRR1,r3 |
diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S index 488e6314f993..38a1f96430e1 100644 --- a/arch/powerpc/kernel/exceptions-64e.S +++ b/arch/powerpc/kernel/exceptions-64e.S | |||
| @@ -386,7 +386,7 @@ exc_##n##_common: \ | |||
| 386 | std r10,_NIP(r1); /* save SRR0 to stackframe */ \ | 386 | std r10,_NIP(r1); /* save SRR0 to stackframe */ \ |
| 387 | std r11,_MSR(r1); /* save SRR1 to stackframe */ \ | 387 | std r11,_MSR(r1); /* save SRR1 to stackframe */ \ |
| 388 | beq 2f; /* if from kernel mode */ \ | 388 | beq 2f; /* if from kernel mode */ \ |
| 389 | ACCOUNT_CPU_USER_ENTRY(r10,r11);/* accounting (uses cr0+eq) */ \ | 389 | ACCOUNT_CPU_USER_ENTRY(r13,r10,r11);/* accounting (uses cr0+eq) */ \ |
| 390 | 2: ld r3,excf+EX_R10(r13); /* get back r10 */ \ | 390 | 2: ld r3,excf+EX_R10(r13); /* get back r10 */ \ |
| 391 | ld r4,excf+EX_R11(r13); /* get back r11 */ \ | 391 | ld r4,excf+EX_R11(r13); /* get back r11 */ \ |
| 392 | mfspr r5,scratch; /* get back r13 */ \ | 392 | mfspr r5,scratch; /* get back r13 */ \ |
| @@ -453,7 +453,7 @@ exc_##n##_bad_stack: \ | |||
| 453 | sth r1,PACA_TRAP_SAVE(r13); /* store trap */ \ | 453 | sth r1,PACA_TRAP_SAVE(r13); /* store trap */ \ |
| 454 | b bad_stack_book3e; /* bad stack error */ | 454 | b bad_stack_book3e; /* bad stack error */ |
| 455 | 455 | ||
| 456 | /* WARNING: If you change the layout of this stub, make sure you chcek | 456 | /* WARNING: If you change the layout of this stub, make sure you check |
| 457 | * the debug exception handler which handles single stepping | 457 | * the debug exception handler which handles single stepping |
| 458 | * into exceptions from userspace, and the MM code in | 458 | * into exceptions from userspace, and the MM code in |
| 459 | * arch/powerpc/mm/tlb_nohash.c which patches the branch here | 459 | * arch/powerpc/mm/tlb_nohash.c which patches the branch here |
| @@ -1059,7 +1059,7 @@ fast_exception_return: | |||
| 1059 | andi. r6,r10,MSR_PR | 1059 | andi. r6,r10,MSR_PR |
| 1060 | REST_2GPRS(6, r1) | 1060 | REST_2GPRS(6, r1) |
| 1061 | beq 1f | 1061 | beq 1f |
| 1062 | ACCOUNT_CPU_USER_EXIT(r10, r11) | 1062 | ACCOUNT_CPU_USER_EXIT(r13, r10, r11) |
| 1063 | ld r0,GPR13(r1) | 1063 | ld r0,GPR13(r1) |
| 1064 | 1064 | ||
| 1065 | 1: stdcx. r0,0,r1 /* to clear the reservation */ | 1065 | 1: stdcx. r0,0,r1 /* to clear the reservation */ |
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S index 8bcc1b457115..6200e4925d26 100644 --- a/arch/powerpc/kernel/exceptions-64s.S +++ b/arch/powerpc/kernel/exceptions-64s.S | |||
| @@ -107,25 +107,9 @@ BEGIN_FTR_SECTION | |||
| 107 | beq 9f | 107 | beq 9f |
| 108 | 108 | ||
| 109 | cmpwi cr3,r13,2 | 109 | cmpwi cr3,r13,2 |
| 110 | |||
| 111 | /* | ||
| 112 | * Check if last bit of HSPGR0 is set. This indicates whether we are | ||
| 113 | * waking up from winkle. | ||
| 114 | */ | ||
| 115 | GET_PACA(r13) | 110 | GET_PACA(r13) |
| 116 | clrldi r5,r13,63 | 111 | bl pnv_restore_hyp_resource |
| 117 | clrrdi r13,r13,1 | ||
| 118 | cmpwi cr4,r5,1 | ||
| 119 | mtspr SPRN_HSPRG0,r13 | ||
| 120 | |||
| 121 | lbz r0,PACA_THREAD_IDLE_STATE(r13) | ||
| 122 | cmpwi cr2,r0,PNV_THREAD_NAP | ||
| 123 | bgt cr2,8f /* Either sleep or Winkle */ | ||
| 124 | 112 | ||
| 125 | /* Waking up from nap should not cause hypervisor state loss */ | ||
| 126 | bgt cr3,. | ||
| 127 | |||
| 128 | /* Waking up from nap */ | ||
| 129 | li r0,PNV_THREAD_RUNNING | 113 | li r0,PNV_THREAD_RUNNING |
| 130 | stb r0,PACA_THREAD_IDLE_STATE(r13) /* Clear thread state */ | 114 | stb r0,PACA_THREAD_IDLE_STATE(r13) /* Clear thread state */ |
| 131 | 115 | ||
| @@ -143,13 +127,9 @@ BEGIN_FTR_SECTION | |||
| 143 | 127 | ||
| 144 | /* Return SRR1 from power7_nap() */ | 128 | /* Return SRR1 from power7_nap() */ |
| 145 | mfspr r3,SPRN_SRR1 | 129 | mfspr r3,SPRN_SRR1 |
| 146 | beq cr3,2f | 130 | blt cr3,2f |
| 147 | b power7_wakeup_noloss | 131 | b pnv_wakeup_loss |
| 148 | 2: b power7_wakeup_loss | 132 | 2: b pnv_wakeup_noloss |
| 149 | |||
| 150 | /* Fast Sleep wakeup on PowerNV */ | ||
| 151 | 8: GET_PACA(r13) | ||
| 152 | b power7_wakeup_tb_loss | ||
| 153 | 133 | ||
| 154 | 9: | 134 | 9: |
| 155 | END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) | 135 | END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) |
| @@ -351,6 +331,12 @@ hv_doorbell_trampoline: | |||
| 351 | EXCEPTION_PROLOG_0(PACA_EXGEN) | 331 | EXCEPTION_PROLOG_0(PACA_EXGEN) |
| 352 | b h_doorbell_hv | 332 | b h_doorbell_hv |
| 353 | 333 | ||
| 334 | . = 0xea0 | ||
| 335 | hv_virt_irq_trampoline: | ||
| 336 | SET_SCRATCH0(r13) | ||
| 337 | EXCEPTION_PROLOG_0(PACA_EXGEN) | ||
| 338 | b h_virt_irq_hv | ||
| 339 | |||
| 354 | /* We need to deal with the Altivec unavailable exception | 340 | /* We need to deal with the Altivec unavailable exception |
| 355 | * here which is at 0xf20, thus in the middle of the | 341 | * here which is at 0xf20, thus in the middle of the |
| 356 | * prolog code of the PerformanceMonitor one. A little | 342 | * prolog code of the PerformanceMonitor one. A little |
| @@ -601,6 +587,9 @@ END_FTR_SECTION_IFSET(CPU_FTR_CFAR) | |||
| 601 | MASKABLE_EXCEPTION_HV_OOL(0xe82, h_doorbell) | 587 | MASKABLE_EXCEPTION_HV_OOL(0xe82, h_doorbell) |
| 602 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe82) | 588 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe82) |
| 603 | 589 | ||
| 590 | MASKABLE_EXCEPTION_HV_OOL(0xea2, h_virt_irq) | ||
| 591 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xea2) | ||
| 592 | |||
| 604 | /* moved from 0xf00 */ | 593 | /* moved from 0xf00 */ |
| 605 | STD_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor) | 594 | STD_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor) |
| 606 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf00) | 595 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf00) |
| @@ -680,6 +669,8 @@ _GLOBAL(__replay_interrupt) | |||
| 680 | BEGIN_FTR_SECTION | 669 | BEGIN_FTR_SECTION |
| 681 | cmpwi r3,0xe80 | 670 | cmpwi r3,0xe80 |
| 682 | beq h_doorbell_common | 671 | beq h_doorbell_common |
| 672 | cmpwi r3,0xea0 | ||
| 673 | beq h_virt_irq_common | ||
| 683 | FTR_SECTION_ELSE | 674 | FTR_SECTION_ELSE |
| 684 | cmpwi r3,0xa00 | 675 | cmpwi r3,0xa00 |
| 685 | beq doorbell_super_common | 676 | beq doorbell_super_common |
| @@ -754,6 +745,7 @@ kvmppc_skip_Hinterrupt: | |||
| 754 | #else | 745 | #else |
| 755 | STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, unknown_exception) | 746 | STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, unknown_exception) |
| 756 | #endif | 747 | #endif |
| 748 | STD_EXCEPTION_COMMON_ASYNC(0xea0, h_virt_irq, do_IRQ) | ||
| 757 | STD_EXCEPTION_COMMON_ASYNC(0xf00, performance_monitor, performance_monitor_exception) | 749 | STD_EXCEPTION_COMMON_ASYNC(0xf00, performance_monitor, performance_monitor_exception) |
| 758 | STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, instruction_breakpoint_exception) | 750 | STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, instruction_breakpoint_exception) |
| 759 | STD_EXCEPTION_COMMON(0x1502, denorm, unknown_exception) | 751 | STD_EXCEPTION_COMMON(0x1502, denorm, unknown_exception) |
| @@ -762,11 +754,6 @@ kvmppc_skip_Hinterrupt: | |||
| 762 | #else | 754 | #else |
| 763 | STD_EXCEPTION_COMMON(0x1700, altivec_assist, unknown_exception) | 755 | STD_EXCEPTION_COMMON(0x1700, altivec_assist, unknown_exception) |
| 764 | #endif | 756 | #endif |
| 765 | #ifdef CONFIG_CBE_RAS | ||
| 766 | STD_EXCEPTION_COMMON(0x1200, cbe_system_error, cbe_system_error_exception) | ||
| 767 | STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, cbe_maintenance_exception) | ||
| 768 | STD_EXCEPTION_COMMON(0x1800, cbe_thermal, cbe_thermal_exception) | ||
| 769 | #endif /* CONFIG_CBE_RAS */ | ||
| 770 | 757 | ||
| 771 | /* | 758 | /* |
| 772 | * Relocation-on interrupts: A subset of the interrupts can be delivered | 759 | * Relocation-on interrupts: A subset of the interrupts can be delivered |
| @@ -877,6 +864,12 @@ h_doorbell_relon_trampoline: | |||
| 877 | EXCEPTION_PROLOG_0(PACA_EXGEN) | 864 | EXCEPTION_PROLOG_0(PACA_EXGEN) |
| 878 | b h_doorbell_relon_hv | 865 | b h_doorbell_relon_hv |
| 879 | 866 | ||
| 867 | . = 0x4ea0 | ||
| 868 | h_virt_irq_relon_trampoline: | ||
| 869 | SET_SCRATCH0(r13) | ||
| 870 | EXCEPTION_PROLOG_0(PACA_EXGEN) | ||
| 871 | b h_virt_irq_relon_hv | ||
| 872 | |||
| 880 | . = 0x4f00 | 873 | . = 0x4f00 |
| 881 | performance_monitor_relon_pseries_trampoline: | 874 | performance_monitor_relon_pseries_trampoline: |
| 882 | SET_SCRATCH0(r13) | 875 | SET_SCRATCH0(r13) |
| @@ -1131,12 +1124,10 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX) | |||
| 1131 | bl vsx_unavailable_exception | 1124 | bl vsx_unavailable_exception |
| 1132 | b ret_from_except | 1125 | b ret_from_except |
| 1133 | 1126 | ||
| 1134 | STD_EXCEPTION_COMMON(0xf60, facility_unavailable, facility_unavailable_exception) | ||
| 1135 | STD_EXCEPTION_COMMON(0xf80, hv_facility_unavailable, facility_unavailable_exception) | ||
| 1136 | |||
| 1137 | /* Equivalents to the above handlers for relocation-on interrupt vectors */ | 1127 | /* Equivalents to the above handlers for relocation-on interrupt vectors */ |
| 1138 | STD_RELON_EXCEPTION_HV_OOL(0xe40, emulation_assist) | 1128 | STD_RELON_EXCEPTION_HV_OOL(0xe40, emulation_assist) |
| 1139 | MASKABLE_RELON_EXCEPTION_HV_OOL(0xe80, h_doorbell) | 1129 | MASKABLE_RELON_EXCEPTION_HV_OOL(0xe80, h_doorbell) |
| 1130 | MASKABLE_RELON_EXCEPTION_HV_OOL(0xea0, h_virt_irq) | ||
| 1140 | 1131 | ||
| 1141 | STD_RELON_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor) | 1132 | STD_RELON_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor) |
| 1142 | STD_RELON_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable) | 1133 | STD_RELON_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable) |
| @@ -1170,6 +1161,15 @@ fwnmi_data_area: | |||
| 1170 | . = 0x8000 | 1161 | . = 0x8000 |
| 1171 | #endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */ | 1162 | #endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */ |
| 1172 | 1163 | ||
| 1164 | STD_EXCEPTION_COMMON(0xf60, facility_unavailable, facility_unavailable_exception) | ||
| 1165 | STD_EXCEPTION_COMMON(0xf80, hv_facility_unavailable, facility_unavailable_exception) | ||
| 1166 | |||
| 1167 | #ifdef CONFIG_CBE_RAS | ||
| 1168 | STD_EXCEPTION_COMMON(0x1200, cbe_system_error, cbe_system_error_exception) | ||
| 1169 | STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, cbe_maintenance_exception) | ||
| 1170 | STD_EXCEPTION_COMMON(0x1800, cbe_thermal, cbe_thermal_exception) | ||
| 1171 | #endif /* CONFIG_CBE_RAS */ | ||
| 1172 | |||
| 1173 | .globl hmi_exception_early | 1173 | .globl hmi_exception_early |
| 1174 | hmi_exception_early: | 1174 | hmi_exception_early: |
| 1175 | EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0xe60) | 1175 | EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0xe60) |
| @@ -1289,7 +1289,7 @@ machine_check_handle_early: | |||
| 1289 | GET_PACA(r13) | 1289 | GET_PACA(r13) |
| 1290 | ld r1,PACAR1(r13) | 1290 | ld r1,PACAR1(r13) |
| 1291 | li r3,PNV_THREAD_NAP | 1291 | li r3,PNV_THREAD_NAP |
| 1292 | b power7_enter_nap_mode | 1292 | b pnv_enter_arch207_idle_mode |
| 1293 | 4: | 1293 | 4: |
| 1294 | #endif | 1294 | #endif |
| 1295 | /* | 1295 | /* |
diff --git a/arch/powerpc/kernel/fadump.c b/arch/powerpc/kernel/fadump.c index 3cb3b02a13dd..b3a663333d36 100644 --- a/arch/powerpc/kernel/fadump.c +++ b/arch/powerpc/kernel/fadump.c | |||
| @@ -1009,8 +1009,7 @@ static int fadump_invalidate_dump(struct fadump_mem_struct *fdm) | |||
| 1009 | } while (wait_time); | 1009 | } while (wait_time); |
| 1010 | 1010 | ||
| 1011 | if (rc) { | 1011 | if (rc) { |
| 1012 | printk(KERN_ERR "Failed to invalidate firmware-assisted dump " | 1012 | pr_err("Failed to invalidate firmware-assisted dump registration. Unexpected error (%d).\n", rc); |
| 1013 | "rgistration. unexpected error(%d).\n", rc); | ||
| 1014 | return rc; | 1013 | return rc; |
| 1015 | } | 1014 | } |
| 1016 | fw_dump.dump_active = 0; | 1015 | fw_dump.dump_active = 0; |
diff --git a/arch/powerpc/kernel/ftrace.c b/arch/powerpc/kernel/ftrace.c index 1123a4d8d8dd..cc52d9795f88 100644 --- a/arch/powerpc/kernel/ftrace.c +++ b/arch/powerpc/kernel/ftrace.c | |||
| @@ -144,6 +144,21 @@ __ftrace_make_nop(struct module *mod, | |||
| 144 | return -EINVAL; | 144 | return -EINVAL; |
| 145 | } | 145 | } |
| 146 | 146 | ||
| 147 | #ifdef CC_USING_MPROFILE_KERNEL | ||
| 148 | /* When using -mkernel_profile there is no load to jump over */ | ||
| 149 | pop = PPC_INST_NOP; | ||
| 150 | |||
| 151 | if (probe_kernel_read(&op, (void *)(ip - 4), 4)) { | ||
| 152 | pr_err("Fetching instruction at %lx failed.\n", ip - 4); | ||
| 153 | return -EFAULT; | ||
| 154 | } | ||
| 155 | |||
| 156 | /* We expect either a mflr r0, or a std r0, LRSAVE(r1) */ | ||
| 157 | if (op != PPC_INST_MFLR && op != PPC_INST_STD_LR) { | ||
| 158 | pr_err("Unexpected instruction %08x around bl _mcount\n", op); | ||
| 159 | return -EINVAL; | ||
| 160 | } | ||
| 161 | #else | ||
| 147 | /* | 162 | /* |
| 148 | * Our original call site looks like: | 163 | * Our original call site looks like: |
| 149 | * | 164 | * |
| @@ -170,24 +185,10 @@ __ftrace_make_nop(struct module *mod, | |||
| 170 | } | 185 | } |
| 171 | 186 | ||
| 172 | if (op != PPC_INST_LD_TOC) { | 187 | if (op != PPC_INST_LD_TOC) { |
| 173 | unsigned int inst; | 188 | pr_err("Expected %08x found %08x\n", PPC_INST_LD_TOC, op); |
| 174 | 189 | return -EINVAL; | |
| 175 | if (probe_kernel_read(&inst, (void *)(ip - 4), 4)) { | ||
| 176 | pr_err("Fetching instruction at %lx failed.\n", ip - 4); | ||
| 177 | return -EFAULT; | ||
| 178 | } | ||
| 179 | |||
| 180 | /* We expect either a mlfr r0, or a std r0, LRSAVE(r1) */ | ||
| 181 | if (inst != PPC_INST_MFLR && inst != PPC_INST_STD_LR) { | ||
| 182 | pr_err("Unexpected instructions around bl _mcount\n" | ||
| 183 | "when enabling dynamic ftrace!\t" | ||
| 184 | "(%08x,bl,%08x)\n", inst, op); | ||
| 185 | return -EINVAL; | ||
| 186 | } | ||
| 187 | |||
| 188 | /* When using -mkernel_profile there is no load to jump over */ | ||
| 189 | pop = PPC_INST_NOP; | ||
| 190 | } | 190 | } |
| 191 | #endif /* CC_USING_MPROFILE_KERNEL */ | ||
| 191 | 192 | ||
| 192 | if (patch_instruction((unsigned int *)ip, pop)) { | 193 | if (patch_instruction((unsigned int *)ip, pop)) { |
| 193 | pr_err("Patching NOP failed.\n"); | 194 | pr_err("Patching NOP failed.\n"); |
| @@ -608,7 +609,7 @@ unsigned long __init arch_syscall_addr(int nr) | |||
| 608 | } | 609 | } |
| 609 | #endif /* CONFIG_FTRACE_SYSCALLS && CONFIG_PPC64 */ | 610 | #endif /* CONFIG_FTRACE_SYSCALLS && CONFIG_PPC64 */ |
| 610 | 611 | ||
| 611 | #if defined(CONFIG_PPC64) && (!defined(_CALL_ELF) || _CALL_ELF != 2) | 612 | #ifdef PPC64_ELF_ABI_v1 |
| 612 | char *arch_ftrace_match_adjust(char *str, const char *search) | 613 | char *arch_ftrace_match_adjust(char *str, const char *search) |
| 613 | { | 614 | { |
| 614 | if (str[0] == '.' && search[0] != '.') | 615 | if (str[0] == '.' && search[0] != '.') |
| @@ -616,4 +617,4 @@ char *arch_ftrace_match_adjust(char *str, const char *search) | |||
| 616 | else | 617 | else |
| 617 | return str; | 618 | return str; |
| 618 | } | 619 | } |
| 619 | #endif /* defined(CONFIG_PPC64) && (!defined(_CALL_ELF) || _CALL_ELF != 2) */ | 620 | #endif /* PPC64_ELF_ABI_v1 */ |
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S index 2d14774af6b4..f765b0434731 100644 --- a/arch/powerpc/kernel/head_64.S +++ b/arch/powerpc/kernel/head_64.S | |||
| @@ -401,7 +401,7 @@ generic_secondary_common_init: | |||
| 401 | ld r12,CPU_SPEC_RESTORE(r23) | 401 | ld r12,CPU_SPEC_RESTORE(r23) |
| 402 | cmpdi 0,r12,0 | 402 | cmpdi 0,r12,0 |
| 403 | beq 3f | 403 | beq 3f |
| 404 | #if !defined(_CALL_ELF) || _CALL_ELF != 2 | 404 | #ifdef PPC64_ELF_ABI_v1 |
| 405 | ld r12,0(r12) | 405 | ld r12,0(r12) |
| 406 | #endif | 406 | #endif |
| 407 | mtctr r12 | 407 | mtctr r12 |
| @@ -941,7 +941,7 @@ start_here_multiplatform: | |||
| 941 | mtspr SPRN_SRR1,r4 | 941 | mtspr SPRN_SRR1,r4 |
| 942 | RFI | 942 | RFI |
| 943 | b . /* prevent speculative execution */ | 943 | b . /* prevent speculative execution */ |
| 944 | 944 | ||
| 945 | /* This is where all platforms converge execution */ | 945 | /* This is where all platforms converge execution */ |
| 946 | 946 | ||
| 947 | start_here_common: | 947 | start_here_common: |
| @@ -951,9 +951,6 @@ start_here_common: | |||
| 951 | /* Load the TOC (virtual address) */ | 951 | /* Load the TOC (virtual address) */ |
| 952 | ld r2,PACATOC(r13) | 952 | ld r2,PACATOC(r13) |
| 953 | 953 | ||
| 954 | /* Do more system initializations in virtual mode */ | ||
| 955 | bl setup_system | ||
| 956 | |||
| 957 | /* Mark interrupts soft and hard disabled (they might be enabled | 954 | /* Mark interrupts soft and hard disabled (they might be enabled |
| 958 | * in the PACA when doing hotplug) | 955 | * in the PACA when doing hotplug) |
| 959 | */ | 956 | */ |
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S index 80c69472314e..43ddaae42baf 100644 --- a/arch/powerpc/kernel/head_8xx.S +++ b/arch/powerpc/kernel/head_8xx.S | |||
| @@ -30,6 +30,7 @@ | |||
| 30 | #include <asm/ppc_asm.h> | 30 | #include <asm/ppc_asm.h> |
| 31 | #include <asm/asm-offsets.h> | 31 | #include <asm/asm-offsets.h> |
| 32 | #include <asm/ptrace.h> | 32 | #include <asm/ptrace.h> |
| 33 | #include <asm/fixmap.h> | ||
| 33 | 34 | ||
| 34 | /* Macro to make the code more readable. */ | 35 | /* Macro to make the code more readable. */ |
| 35 | #ifdef CONFIG_8xx_CPU6 | 36 | #ifdef CONFIG_8xx_CPU6 |
| @@ -383,28 +384,57 @@ InstructionTLBMiss: | |||
| 383 | EXCEPTION_EPILOG_0 | 384 | EXCEPTION_EPILOG_0 |
| 384 | rfi | 385 | rfi |
| 385 | 386 | ||
| 387 | /* | ||
| 388 | * Bottom part of DataStoreTLBMiss handler for IMMR area | ||
| 389 | * not enough space in the DataStoreTLBMiss area | ||
| 390 | */ | ||
| 391 | DTLBMissIMMR: | ||
| 392 | mtcr r10 | ||
| 393 | /* Set 512k byte guarded page and mark it valid */ | ||
| 394 | li r10, MD_PS512K | MD_GUARDED | MD_SVALID | ||
| 395 | MTSPR_CPU6(SPRN_MD_TWC, r10, r11) | ||
| 396 | mfspr r10, SPRN_IMMR /* Get current IMMR */ | ||
| 397 | rlwinm r10, r10, 0, 0xfff80000 /* Get 512 kbytes boundary */ | ||
| 398 | ori r10, r10, 0xf0 | MD_SPS16K | _PAGE_SHARED | _PAGE_DIRTY | \ | ||
| 399 | _PAGE_PRESENT | _PAGE_NO_CACHE | ||
| 400 | MTSPR_CPU6(SPRN_MD_RPN, r10, r11) /* Update TLB entry */ | ||
| 401 | |||
| 402 | li r11, RPN_PATTERN | ||
| 403 | mtspr SPRN_DAR, r11 /* Tag DAR */ | ||
| 404 | EXCEPTION_EPILOG_0 | ||
| 405 | rfi | ||
| 406 | |||
| 386 | . = 0x1200 | 407 | . = 0x1200 |
| 387 | DataStoreTLBMiss: | 408 | DataStoreTLBMiss: |
| 388 | mtspr SPRN_SPRG_SCRATCH2, r3 | ||
| 389 | EXCEPTION_PROLOG_0 | 409 | EXCEPTION_PROLOG_0 |
| 390 | mfcr r3 | 410 | mfcr r10 |
| 391 | 411 | ||
| 392 | /* If we are faulting a kernel address, we have to use the | 412 | /* If we are faulting a kernel address, we have to use the |
| 393 | * kernel page tables. | 413 | * kernel page tables. |
| 394 | */ | 414 | */ |
| 395 | mfspr r10, SPRN_MD_EPN | 415 | mfspr r11, SPRN_MD_EPN |
| 396 | IS_KERNEL(r11, r10) | 416 | rlwinm r11, r11, 16, 0xfff8 |
| 417 | #ifndef CONFIG_PIN_TLB_IMMR | ||
| 418 | cmpli cr0, r11, VIRT_IMMR_BASE@h | ||
| 419 | #endif | ||
| 420 | cmpli cr7, r11, PAGE_OFFSET@h | ||
| 421 | #ifndef CONFIG_PIN_TLB_IMMR | ||
| 422 | _ENTRY(DTLBMiss_jmp) | ||
| 423 | beq- DTLBMissIMMR | ||
| 424 | #endif | ||
| 425 | bge- cr7, 4f | ||
| 426 | |||
| 397 | mfspr r11, SPRN_M_TW /* Get level 1 table */ | 427 | mfspr r11, SPRN_M_TW /* Get level 1 table */ |
| 398 | BRANCH_UNLESS_KERNEL(3f) | ||
| 399 | lis r11, (swapper_pg_dir-PAGE_OFFSET)@ha | ||
| 400 | 3: | 428 | 3: |
| 429 | mtcr r10 | ||
| 430 | #ifdef CONFIG_8xx_CPU6 | ||
| 431 | mtspr SPRN_SPRG_SCRATCH2, r3 | ||
| 432 | #endif | ||
| 433 | mfspr r10, SPRN_MD_EPN | ||
| 401 | 434 | ||
| 402 | /* Insert level 1 index */ | 435 | /* Insert level 1 index */ |
| 403 | rlwimi r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29 | 436 | rlwimi r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29 |
| 404 | lwz r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11) /* Get the level 1 entry */ | 437 | lwz r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11) /* Get the level 1 entry */ |
| 405 | mtcr r11 | ||
| 406 | bt- 28,DTLBMiss8M /* bit 28 = Large page (8M) */ | ||
| 407 | mtcr r3 | ||
| 408 | 438 | ||
| 409 | /* We have a pte table, so load fetch the pte from the table. | 439 | /* We have a pte table, so load fetch the pte from the table. |
| 410 | */ | 440 | */ |
| @@ -452,29 +482,30 @@ DataStoreTLBMiss: | |||
| 452 | MTSPR_CPU6(SPRN_MD_RPN, r10, r3) /* Update TLB entry */ | 482 | MTSPR_CPU6(SPRN_MD_RPN, r10, r3) /* Update TLB entry */ |
| 453 | 483 | ||
| 454 | /* Restore registers */ | 484 | /* Restore registers */ |
| 485 | #ifdef CONFIG_8xx_CPU6 | ||
| 455 | mfspr r3, SPRN_SPRG_SCRATCH2 | 486 | mfspr r3, SPRN_SPRG_SCRATCH2 |
| 487 | #endif | ||
| 456 | mtspr SPRN_DAR, r11 /* Tag DAR */ | 488 | mtspr SPRN_DAR, r11 /* Tag DAR */ |
| 457 | EXCEPTION_EPILOG_0 | 489 | EXCEPTION_EPILOG_0 |
| 458 | rfi | 490 | rfi |
| 459 | 491 | ||
| 460 | DTLBMiss8M: | 492 | 4: |
| 461 | mtcr r3 | 493 | _ENTRY(DTLBMiss_cmp) |
| 462 | ori r11, r11, MD_SVALID | 494 | cmpli cr0, r11, (PAGE_OFFSET + 0x1800000)@h |
| 463 | MTSPR_CPU6(SPRN_MD_TWC, r11, r3) | 495 | lis r11, (swapper_pg_dir-PAGE_OFFSET)@ha |
| 464 | #ifdef CONFIG_PPC_16K_PAGES | 496 | bge- 3b |
| 465 | /* | 497 | |
| 466 | * In 16k pages mode, each PGD entry defines a 64M block. | 498 | mtcr r10 |
| 467 | * Here we select the 8M page within the block. | 499 | /* Set 8M byte page and mark it valid */ |
| 468 | */ | 500 | li r10, MD_PS8MEG | MD_SVALID |
| 469 | rlwimi r11, r10, 0, 0x03800000 | 501 | MTSPR_CPU6(SPRN_MD_TWC, r10, r11) |
| 470 | #endif | 502 | mfspr r10, SPRN_MD_EPN |
| 471 | rlwinm r10, r11, 0, 0xff800000 | 503 | rlwinm r10, r10, 0, 0x0f800000 /* 8xx supports max 256Mb RAM */ |
| 472 | ori r10, r10, 0xf0 | MD_SPS16K | _PAGE_SHARED | _PAGE_DIRTY | \ | 504 | ori r10, r10, 0xf0 | MD_SPS16K | _PAGE_SHARED | _PAGE_DIRTY | \ |
| 473 | _PAGE_PRESENT | 505 | _PAGE_PRESENT |
| 474 | MTSPR_CPU6(SPRN_MD_RPN, r10, r3) /* Update TLB entry */ | 506 | MTSPR_CPU6(SPRN_MD_RPN, r10, r11) /* Update TLB entry */ |
| 475 | 507 | ||
| 476 | li r11, RPN_PATTERN | 508 | li r11, RPN_PATTERN |
| 477 | mfspr r3, SPRN_SPRG_SCRATCH2 | ||
| 478 | mtspr SPRN_DAR, r11 /* Tag DAR */ | 509 | mtspr SPRN_DAR, r11 /* Tag DAR */ |
| 479 | EXCEPTION_EPILOG_0 | 510 | EXCEPTION_EPILOG_0 |
| 480 | rfi | 511 | rfi |
| @@ -553,12 +584,14 @@ FixupDAR:/* Entry point for dcbx workaround. */ | |||
| 553 | IS_KERNEL(r11, r10) | 584 | IS_KERNEL(r11, r10) |
| 554 | mfspr r11, SPRN_M_TW /* Get level 1 table */ | 585 | mfspr r11, SPRN_M_TW /* Get level 1 table */ |
| 555 | BRANCH_UNLESS_KERNEL(3f) | 586 | BRANCH_UNLESS_KERNEL(3f) |
| 587 | rlwinm r11, r10, 16, 0xfff8 | ||
| 588 | _ENTRY(FixupDAR_cmp) | ||
| 589 | cmpli cr7, r11, (PAGE_OFFSET + 0x1800000)@h | ||
| 590 | blt- cr7, 200f | ||
| 556 | lis r11, (swapper_pg_dir-PAGE_OFFSET)@ha | 591 | lis r11, (swapper_pg_dir-PAGE_OFFSET)@ha |
| 557 | /* Insert level 1 index */ | 592 | /* Insert level 1 index */ |
| 558 | 3: rlwimi r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29 | 593 | 3: rlwimi r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29 |
| 559 | lwz r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11) /* Get the level 1 entry */ | 594 | lwz r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11) /* Get the level 1 entry */ |
| 560 | mtcr r11 | ||
| 561 | bt 28,200f /* bit 28 = Large page (8M) */ | ||
| 562 | rlwinm r11, r11,0,0,19 /* Extract page descriptor page address */ | 595 | rlwinm r11, r11,0,0,19 /* Extract page descriptor page address */ |
| 563 | /* Insert level 2 index */ | 596 | /* Insert level 2 index */ |
| 564 | rlwimi r11, r10, 32 - (PAGE_SHIFT - 2), 32 - PAGE_SHIFT, 29 | 597 | rlwimi r11, r10, 32 - (PAGE_SHIFT - 2), 32 - PAGE_SHIFT, 29 |
| @@ -584,8 +617,8 @@ FixupDAR:/* Entry point for dcbx workaround. */ | |||
| 584 | 141: mfspr r10,SPRN_SPRG_SCRATCH2 | 617 | 141: mfspr r10,SPRN_SPRG_SCRATCH2 |
| 585 | b DARFixed /* Nope, go back to normal TLB processing */ | 618 | b DARFixed /* Nope, go back to normal TLB processing */ |
| 586 | 619 | ||
| 587 | /* concat physical page address(r11) and page offset(r10) */ | 620 | /* create physical page address from effective address */ |
| 588 | 200: rlwimi r11, r10, 0, 32 - (PAGE_SHIFT << 1), 31 | 621 | 200: tophys(r11, r10) |
| 589 | b 201b | 622 | b 201b |
| 590 | 623 | ||
| 591 | 144: mfspr r10, SPRN_DSISR | 624 | 144: mfspr r10, SPRN_DSISR |
| @@ -763,10 +796,18 @@ start_here: | |||
| 763 | * virtual to physical. Also, set the cache mode since that is defined | 796 | * virtual to physical. Also, set the cache mode since that is defined |
| 764 | * by TLB entries and perform any additional mapping (like of the IMMR). | 797 | * by TLB entries and perform any additional mapping (like of the IMMR). |
| 765 | * If configured to pin some TLBs, we pin the first 8 Mbytes of kernel, | 798 | * If configured to pin some TLBs, we pin the first 8 Mbytes of kernel, |
| 766 | * 24 Mbytes of data, and the 8M IMMR space. Anything not covered by | 799 | * 24 Mbytes of data, and the 512k IMMR space. Anything not covered by |
| 767 | * these mappings is mapped by page tables. | 800 | * these mappings is mapped by page tables. |
| 768 | */ | 801 | */ |
| 769 | initial_mmu: | 802 | initial_mmu: |
| 803 | li r8, 0 | ||
| 804 | mtspr SPRN_MI_CTR, r8 /* remove PINNED ITLB entries */ | ||
| 805 | lis r10, MD_RESETVAL@h | ||
| 806 | #ifndef CONFIG_8xx_COPYBACK | ||
| 807 | oris r10, r10, MD_WTDEF@h | ||
| 808 | #endif | ||
| 809 | mtspr SPRN_MD_CTR, r10 /* remove PINNED DTLB entries */ | ||
| 810 | |||
| 770 | tlbia /* Invalidate all TLB entries */ | 811 | tlbia /* Invalidate all TLB entries */ |
| 771 | /* Always pin the first 8 MB ITLB to prevent ITLB | 812 | /* Always pin the first 8 MB ITLB to prevent ITLB |
| 772 | misses while mucking around with SRR0/SRR1 in asm | 813 | misses while mucking around with SRR0/SRR1 in asm |
| @@ -777,34 +818,20 @@ initial_mmu: | |||
| 777 | mtspr SPRN_MI_CTR, r8 /* Set instruction MMU control */ | 818 | mtspr SPRN_MI_CTR, r8 /* Set instruction MMU control */ |
| 778 | 819 | ||
| 779 | #ifdef CONFIG_PIN_TLB | 820 | #ifdef CONFIG_PIN_TLB |
| 780 | lis r10, (MD_RSV4I | MD_RESETVAL)@h | 821 | oris r10, r10, MD_RSV4I@h |
| 781 | ori r10, r10, 0x1c00 | ||
| 782 | mr r8, r10 | ||
| 783 | #else | ||
| 784 | lis r10, MD_RESETVAL@h | ||
| 785 | #endif | ||
| 786 | #ifndef CONFIG_8xx_COPYBACK | ||
| 787 | oris r10, r10, MD_WTDEF@h | ||
| 788 | #endif | ||
| 789 | mtspr SPRN_MD_CTR, r10 /* Set data TLB control */ | 822 | mtspr SPRN_MD_CTR, r10 /* Set data TLB control */ |
| 823 | #endif | ||
| 790 | 824 | ||
| 791 | /* Now map the lower 8 Meg into the TLBs. For this quick hack, | 825 | /* Now map the lower 8 Meg into the ITLB. */ |
| 792 | * we can load the instruction and data TLB registers with the | ||
| 793 | * same values. | ||
| 794 | */ | ||
| 795 | lis r8, KERNELBASE@h /* Create vaddr for TLB */ | 826 | lis r8, KERNELBASE@h /* Create vaddr for TLB */ |
| 796 | ori r8, r8, MI_EVALID /* Mark it valid */ | 827 | ori r8, r8, MI_EVALID /* Mark it valid */ |
| 797 | mtspr SPRN_MI_EPN, r8 | 828 | mtspr SPRN_MI_EPN, r8 |
| 798 | mtspr SPRN_MD_EPN, r8 | ||
| 799 | li r8, MI_PS8MEG | (2 << 5) /* Set 8M byte page, APG 2 */ | 829 | li r8, MI_PS8MEG | (2 << 5) /* Set 8M byte page, APG 2 */ |
| 800 | ori r8, r8, MI_SVALID /* Make it valid */ | 830 | ori r8, r8, MI_SVALID /* Make it valid */ |
| 801 | mtspr SPRN_MI_TWC, r8 | 831 | mtspr SPRN_MI_TWC, r8 |
| 802 | li r8, MI_PS8MEG /* Set 8M byte page, APG 0 */ | ||
| 803 | ori r8, r8, MI_SVALID /* Make it valid */ | ||
| 804 | mtspr SPRN_MD_TWC, r8 | ||
| 805 | li r8, MI_BOOTINIT /* Create RPN for address 0 */ | 832 | li r8, MI_BOOTINIT /* Create RPN for address 0 */ |
| 806 | mtspr SPRN_MI_RPN, r8 /* Store TLB entry */ | 833 | mtspr SPRN_MI_RPN, r8 /* Store TLB entry */ |
| 807 | mtspr SPRN_MD_RPN, r8 | 834 | |
| 808 | lis r8, MI_APG_INIT@h /* Set protection modes */ | 835 | lis r8, MI_APG_INIT@h /* Set protection modes */ |
| 809 | ori r8, r8, MI_APG_INIT@l | 836 | ori r8, r8, MI_APG_INIT@l |
| 810 | mtspr SPRN_MI_AP, r8 | 837 | mtspr SPRN_MI_AP, r8 |
| @@ -812,51 +839,25 @@ initial_mmu: | |||
| 812 | ori r8, r8, MD_APG_INIT@l | 839 | ori r8, r8, MD_APG_INIT@l |
| 813 | mtspr SPRN_MD_AP, r8 | 840 | mtspr SPRN_MD_AP, r8 |
| 814 | 841 | ||
| 815 | /* Map another 8 MByte at the IMMR to get the processor | 842 | /* Map a 512k page for the IMMR to get the processor |
| 816 | * internal registers (among other things). | 843 | * internal registers (among other things). |
| 817 | */ | 844 | */ |
| 818 | #ifdef CONFIG_PIN_TLB | 845 | #ifdef CONFIG_PIN_TLB_IMMR |
| 819 | addi r10, r10, 0x0100 | 846 | ori r10, r10, 0x1c00 |
| 820 | mtspr SPRN_MD_CTR, r10 | 847 | mtspr SPRN_MD_CTR, r10 |
| 821 | #endif | 848 | |
| 822 | mfspr r9, 638 /* Get current IMMR */ | 849 | mfspr r9, 638 /* Get current IMMR */ |
| 823 | andis. r9, r9, 0xff80 /* Get 8Mbyte boundary */ | 850 | andis. r9, r9, 0xfff8 /* Get 512 kbytes boundary */ |
| 824 | 851 | ||
| 825 | mr r8, r9 /* Create vaddr for TLB */ | 852 | lis r8, VIRT_IMMR_BASE@h /* Create vaddr for TLB */ |
| 826 | ori r8, r8, MD_EVALID /* Mark it valid */ | 853 | ori r8, r8, MD_EVALID /* Mark it valid */ |
| 827 | mtspr SPRN_MD_EPN, r8 | 854 | mtspr SPRN_MD_EPN, r8 |
| 828 | li r8, MD_PS8MEG /* Set 8M byte page */ | 855 | li r8, MD_PS512K | MD_GUARDED /* Set 512k byte page */ |
| 829 | ori r8, r8, MD_SVALID /* Make it valid */ | 856 | ori r8, r8, MD_SVALID /* Make it valid */ |
| 830 | mtspr SPRN_MD_TWC, r8 | 857 | mtspr SPRN_MD_TWC, r8 |
| 831 | mr r8, r9 /* Create paddr for TLB */ | 858 | mr r8, r9 /* Create paddr for TLB */ |
| 832 | ori r8, r8, MI_BOOTINIT|0x2 /* Inhibit cache -- Cort */ | 859 | ori r8, r8, MI_BOOTINIT|0x2 /* Inhibit cache -- Cort */ |
| 833 | mtspr SPRN_MD_RPN, r8 | 860 | mtspr SPRN_MD_RPN, r8 |
| 834 | |||
| 835 | #ifdef CONFIG_PIN_TLB | ||
| 836 | /* Map two more 8M kernel data pages. | ||
| 837 | */ | ||
| 838 | addi r10, r10, 0x0100 | ||
| 839 | mtspr SPRN_MD_CTR, r10 | ||
| 840 | |||
| 841 | lis r8, KERNELBASE@h /* Create vaddr for TLB */ | ||
| 842 | addis r8, r8, 0x0080 /* Add 8M */ | ||
| 843 | ori r8, r8, MI_EVALID /* Mark it valid */ | ||
| 844 | mtspr SPRN_MD_EPN, r8 | ||
| 845 | li r9, MI_PS8MEG /* Set 8M byte page */ | ||
| 846 | ori r9, r9, MI_SVALID /* Make it valid */ | ||
| 847 | mtspr SPRN_MD_TWC, r9 | ||
| 848 | li r11, MI_BOOTINIT /* Create RPN for address 0 */ | ||
| 849 | addis r11, r11, 0x0080 /* Add 8M */ | ||
| 850 | mtspr SPRN_MD_RPN, r11 | ||
| 851 | |||
| 852 | addi r10, r10, 0x0100 | ||
| 853 | mtspr SPRN_MD_CTR, r10 | ||
| 854 | |||
| 855 | addis r8, r8, 0x0080 /* Add 8M */ | ||
| 856 | mtspr SPRN_MD_EPN, r8 | ||
| 857 | mtspr SPRN_MD_TWC, r9 | ||
| 858 | addis r11, r11, 0x0080 /* Add 8M */ | ||
| 859 | mtspr SPRN_MD_RPN, r11 | ||
| 860 | #endif | 861 | #endif |
| 861 | 862 | ||
| 862 | /* Since the cache is enabled according to the information we | 863 | /* Since the cache is enabled according to the information we |
diff --git a/arch/powerpc/kernel/idle_power7.S b/arch/powerpc/kernel/idle_book3s.S index 470ceebd2d23..335eb6cedae5 100644 --- a/arch/powerpc/kernel/idle_power7.S +++ b/arch/powerpc/kernel/idle_book3s.S | |||
| @@ -1,5 +1,6 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * This file contains the power_save function for Power7 CPUs. | 2 | * This file contains idle entry/exit functions for POWER7, |
| 3 | * POWER8 and POWER9 CPUs. | ||
| 3 | * | 4 | * |
| 4 | * This program is free software; you can redistribute it and/or | 5 | * This program is free software; you can redistribute it and/or |
| 5 | * modify it under the terms of the GNU General Public License | 6 | * modify it under the terms of the GNU General Public License |
| @@ -20,6 +21,7 @@ | |||
| 20 | #include <asm/opal.h> | 21 | #include <asm/opal.h> |
| 21 | #include <asm/cpuidle.h> | 22 | #include <asm/cpuidle.h> |
| 22 | #include <asm/book3s/64/mmu-hash.h> | 23 | #include <asm/book3s/64/mmu-hash.h> |
| 24 | #include <asm/mmu.h> | ||
| 23 | 25 | ||
| 24 | #undef DEBUG | 26 | #undef DEBUG |
| 25 | 27 | ||
| @@ -36,6 +38,11 @@ | |||
| 36 | #define _AMOR GPR9 | 38 | #define _AMOR GPR9 |
| 37 | #define _WORT GPR10 | 39 | #define _WORT GPR10 |
| 38 | #define _WORC GPR11 | 40 | #define _WORC GPR11 |
| 41 | #define _PTCR GPR12 | ||
| 42 | |||
| 43 | #define PSSCR_HV_TEMPLATE PSSCR_ESL | PSSCR_EC | \ | ||
| 44 | PSSCR_PSLL_MASK | PSSCR_TR_MASK | \ | ||
| 45 | PSSCR_MTL_MASK | ||
| 39 | 46 | ||
| 40 | /* Idle state entry routines */ | 47 | /* Idle state entry routines */ |
| 41 | 48 | ||
| @@ -52,6 +59,45 @@ | |||
| 52 | .text | 59 | .text |
| 53 | 60 | ||
| 54 | /* | 61 | /* |
| 62 | * Used by threads before entering deep idle states. Saves SPRs | ||
| 63 | * in interrupt stack frame | ||
| 64 | */ | ||
| 65 | save_sprs_to_stack: | ||
| 66 | /* | ||
| 67 | * Note all register i.e per-core, per-subcore or per-thread is saved | ||
| 68 | * here since any thread in the core might wake up first | ||
| 69 | */ | ||
| 70 | BEGIN_FTR_SECTION | ||
| 71 | mfspr r3,SPRN_PTCR | ||
| 72 | std r3,_PTCR(r1) | ||
| 73 | /* | ||
| 74 | * Note - SDR1 is dropped in Power ISA v3. Hence not restoring | ||
| 75 | * SDR1 here | ||
| 76 | */ | ||
| 77 | FTR_SECTION_ELSE | ||
| 78 | mfspr r3,SPRN_SDR1 | ||
| 79 | std r3,_SDR1(r1) | ||
| 80 | ALT_FTR_SECTION_END_IFSET(CPU_FTR_ARCH_300) | ||
| 81 | mfspr r3,SPRN_RPR | ||
| 82 | std r3,_RPR(r1) | ||
| 83 | mfspr r3,SPRN_SPURR | ||
| 84 | std r3,_SPURR(r1) | ||
| 85 | mfspr r3,SPRN_PURR | ||
| 86 | std r3,_PURR(r1) | ||
| 87 | mfspr r3,SPRN_TSCR | ||
| 88 | std r3,_TSCR(r1) | ||
| 89 | mfspr r3,SPRN_DSCR | ||
| 90 | std r3,_DSCR(r1) | ||
| 91 | mfspr r3,SPRN_AMOR | ||
| 92 | std r3,_AMOR(r1) | ||
| 93 | mfspr r3,SPRN_WORT | ||
| 94 | std r3,_WORT(r1) | ||
| 95 | mfspr r3,SPRN_WORC | ||
| 96 | std r3,_WORC(r1) | ||
| 97 | |||
| 98 | blr | ||
| 99 | |||
| 100 | /* | ||
| 55 | * Used by threads when the lock bit of core_idle_state is set. | 101 | * Used by threads when the lock bit of core_idle_state is set. |
| 56 | * Threads will spin in HMT_LOW until the lock bit is cleared. | 102 | * Threads will spin in HMT_LOW until the lock bit is cleared. |
| 57 | * r14 - pointer to core_idle_state | 103 | * r14 - pointer to core_idle_state |
| @@ -69,13 +115,16 @@ core_idle_lock_held: | |||
| 69 | 115 | ||
| 70 | /* | 116 | /* |
| 71 | * Pass requested state in r3: | 117 | * Pass requested state in r3: |
| 72 | * r3 - PNV_THREAD_NAP/SLEEP/WINKLE | 118 | * r3 - PNV_THREAD_NAP/SLEEP/WINKLE in POWER8 |
| 119 | * - Requested STOP state in POWER9 | ||
| 73 | * | 120 | * |
| 74 | * To check IRQ_HAPPENED in r4 | 121 | * To check IRQ_HAPPENED in r4 |
| 75 | * 0 - don't check | 122 | * 0 - don't check |
| 76 | * 1 - check | 123 | * 1 - check |
| 124 | * | ||
| 125 | * Address to 'rfid' to in r5 | ||
| 77 | */ | 126 | */ |
| 78 | _GLOBAL(power7_powersave_common) | 127 | _GLOBAL(pnv_powersave_common) |
| 79 | /* Use r3 to pass state nap/sleep/winkle */ | 128 | /* Use r3 to pass state nap/sleep/winkle */ |
| 80 | /* NAP is a state loss, we create a regs frame on the | 129 | /* NAP is a state loss, we create a regs frame on the |
| 81 | * stack, fill it up with the state we care about and | 130 | * stack, fill it up with the state we care about and |
| @@ -126,28 +175,28 @@ _GLOBAL(power7_powersave_common) | |||
| 126 | std r9,_MSR(r1) | 175 | std r9,_MSR(r1) |
| 127 | std r1,PACAR1(r13) | 176 | std r1,PACAR1(r13) |
| 128 | 177 | ||
| 178 | #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE | ||
| 179 | /* Tell KVM we're entering idle */ | ||
| 180 | li r4,KVM_HWTHREAD_IN_IDLE | ||
| 181 | stb r4,HSTATE_HWTHREAD_STATE(r13) | ||
| 182 | #endif | ||
| 183 | |||
| 129 | /* | 184 | /* |
| 130 | * Go to real mode to do the nap, as required by the architecture. | 185 | * Go to real mode to do the nap, as required by the architecture. |
| 131 | * Also, we need to be in real mode before setting hwthread_state, | 186 | * Also, we need to be in real mode before setting hwthread_state, |
| 132 | * because as soon as we do that, another thread can switch | 187 | * because as soon as we do that, another thread can switch |
| 133 | * the MMU context to the guest. | 188 | * the MMU context to the guest. |
| 134 | */ | 189 | */ |
| 135 | LOAD_REG_IMMEDIATE(r5, MSR_IDLE) | 190 | LOAD_REG_IMMEDIATE(r7, MSR_IDLE) |
| 136 | li r6, MSR_RI | 191 | li r6, MSR_RI |
| 137 | andc r6, r9, r6 | 192 | andc r6, r9, r6 |
| 138 | LOAD_REG_ADDR(r7, power7_enter_nap_mode) | ||
| 139 | mtmsrd r6, 1 /* clear RI before setting SRR0/1 */ | 193 | mtmsrd r6, 1 /* clear RI before setting SRR0/1 */ |
| 140 | mtspr SPRN_SRR0, r7 | 194 | mtspr SPRN_SRR0, r5 |
| 141 | mtspr SPRN_SRR1, r5 | 195 | mtspr SPRN_SRR1, r7 |
| 142 | rfid | 196 | rfid |
| 143 | 197 | ||
| 144 | .globl power7_enter_nap_mode | 198 | .globl pnv_enter_arch207_idle_mode |
| 145 | power7_enter_nap_mode: | 199 | pnv_enter_arch207_idle_mode: |
| 146 | #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE | ||
| 147 | /* Tell KVM we're napping */ | ||
| 148 | li r4,KVM_HWTHREAD_IN_NAP | ||
| 149 | stb r4,HSTATE_HWTHREAD_STATE(r13) | ||
| 150 | #endif | ||
| 151 | stb r3,PACA_THREAD_IDLE_STATE(r13) | 200 | stb r3,PACA_THREAD_IDLE_STATE(r13) |
| 152 | cmpwi cr3,r3,PNV_THREAD_SLEEP | 201 | cmpwi cr3,r3,PNV_THREAD_SLEEP |
| 153 | bge cr3,2f | 202 | bge cr3,2f |
| @@ -196,8 +245,7 @@ fastsleep_workaround_at_entry: | |||
| 196 | /* Fast sleep workaround */ | 245 | /* Fast sleep workaround */ |
| 197 | li r3,1 | 246 | li r3,1 |
| 198 | li r4,1 | 247 | li r4,1 |
| 199 | li r0,OPAL_CONFIG_CPU_IDLE_STATE | 248 | bl opal_rm_config_cpu_idle_state |
| 200 | bl opal_call_realmode | ||
| 201 | 249 | ||
| 202 | /* Clear Lock bit */ | 250 | /* Clear Lock bit */ |
| 203 | li r0,0 | 251 | li r0,0 |
| @@ -206,30 +254,45 @@ fastsleep_workaround_at_entry: | |||
| 206 | b common_enter | 254 | b common_enter |
| 207 | 255 | ||
| 208 | enter_winkle: | 256 | enter_winkle: |
| 209 | /* | 257 | bl save_sprs_to_stack |
| 210 | * Note all register i.e per-core, per-subcore or per-thread is saved | 258 | |
| 211 | * here since any thread in the core might wake up first | ||
| 212 | */ | ||
| 213 | mfspr r3,SPRN_SDR1 | ||
| 214 | std r3,_SDR1(r1) | ||
| 215 | mfspr r3,SPRN_RPR | ||
| 216 | std r3,_RPR(r1) | ||
| 217 | mfspr r3,SPRN_SPURR | ||
| 218 | std r3,_SPURR(r1) | ||
| 219 | mfspr r3,SPRN_PURR | ||
| 220 | std r3,_PURR(r1) | ||
| 221 | mfspr r3,SPRN_TSCR | ||
| 222 | std r3,_TSCR(r1) | ||
| 223 | mfspr r3,SPRN_DSCR | ||
| 224 | std r3,_DSCR(r1) | ||
| 225 | mfspr r3,SPRN_AMOR | ||
| 226 | std r3,_AMOR(r1) | ||
| 227 | mfspr r3,SPRN_WORT | ||
| 228 | std r3,_WORT(r1) | ||
| 229 | mfspr r3,SPRN_WORC | ||
| 230 | std r3,_WORC(r1) | ||
| 231 | IDLE_STATE_ENTER_SEQ(PPC_WINKLE) | 259 | IDLE_STATE_ENTER_SEQ(PPC_WINKLE) |
| 232 | 260 | ||
| 261 | /* | ||
| 262 | * r3 - requested stop state | ||
| 263 | */ | ||
| 264 | power_enter_stop: | ||
| 265 | /* | ||
| 266 | * Check if the requested state is a deep idle state. | ||
| 267 | */ | ||
| 268 | LOAD_REG_ADDRBASE(r5,pnv_first_deep_stop_state) | ||
| 269 | ld r4,ADDROFF(pnv_first_deep_stop_state)(r5) | ||
| 270 | cmpd r3,r4 | ||
| 271 | bge 2f | ||
| 272 | IDLE_STATE_ENTER_SEQ(PPC_STOP) | ||
| 273 | 2: | ||
| 274 | /* | ||
| 275 | * Entering deep idle state. | ||
| 276 | * Clear thread bit in PACA_CORE_IDLE_STATE, save SPRs to | ||
| 277 | * stack and enter stop | ||
| 278 | */ | ||
| 279 | lbz r7,PACA_THREAD_MASK(r13) | ||
| 280 | ld r14,PACA_CORE_IDLE_STATE_PTR(r13) | ||
| 281 | |||
| 282 | lwarx_loop_stop: | ||
| 283 | lwarx r15,0,r14 | ||
| 284 | andi. r9,r15,PNV_CORE_IDLE_LOCK_BIT | ||
| 285 | bnel core_idle_lock_held | ||
| 286 | andc r15,r15,r7 /* Clear thread bit */ | ||
| 287 | |||
| 288 | stwcx. r15,0,r14 | ||
| 289 | bne- lwarx_loop_stop | ||
| 290 | isync | ||
| 291 | |||
| 292 | bl save_sprs_to_stack | ||
| 293 | |||
| 294 | IDLE_STATE_ENTER_SEQ(PPC_STOP) | ||
| 295 | |||
| 233 | _GLOBAL(power7_idle) | 296 | _GLOBAL(power7_idle) |
| 234 | /* Now check if user or arch enabled NAP mode */ | 297 | /* Now check if user or arch enabled NAP mode */ |
| 235 | LOAD_REG_ADDRBASE(r3,powersave_nap) | 298 | LOAD_REG_ADDRBASE(r3,powersave_nap) |
| @@ -242,19 +305,22 @@ _GLOBAL(power7_idle) | |||
| 242 | _GLOBAL(power7_nap) | 305 | _GLOBAL(power7_nap) |
| 243 | mr r4,r3 | 306 | mr r4,r3 |
| 244 | li r3,PNV_THREAD_NAP | 307 | li r3,PNV_THREAD_NAP |
| 245 | b power7_powersave_common | 308 | LOAD_REG_ADDR(r5, pnv_enter_arch207_idle_mode) |
| 309 | b pnv_powersave_common | ||
| 246 | /* No return */ | 310 | /* No return */ |
| 247 | 311 | ||
| 248 | _GLOBAL(power7_sleep) | 312 | _GLOBAL(power7_sleep) |
| 249 | li r3,PNV_THREAD_SLEEP | 313 | li r3,PNV_THREAD_SLEEP |
| 250 | li r4,1 | 314 | li r4,1 |
| 251 | b power7_powersave_common | 315 | LOAD_REG_ADDR(r5, pnv_enter_arch207_idle_mode) |
| 316 | b pnv_powersave_common | ||
| 252 | /* No return */ | 317 | /* No return */ |
| 253 | 318 | ||
| 254 | _GLOBAL(power7_winkle) | 319 | _GLOBAL(power7_winkle) |
| 255 | li r3,3 | 320 | li r3,PNV_THREAD_WINKLE |
| 256 | li r4,1 | 321 | li r4,1 |
| 257 | b power7_powersave_common | 322 | LOAD_REG_ADDR(r5, pnv_enter_arch207_idle_mode) |
| 323 | b pnv_powersave_common | ||
| 258 | /* No return */ | 324 | /* No return */ |
| 259 | 325 | ||
| 260 | #define CHECK_HMI_INTERRUPT \ | 326 | #define CHECK_HMI_INTERRUPT \ |
| @@ -270,25 +336,104 @@ ALT_FTR_SECTION_END_NESTED_IFSET(CPU_FTR_ARCH_207S, 66); \ | |||
| 270 | ld r2,PACATOC(r13); \ | 336 | ld r2,PACATOC(r13); \ |
| 271 | ld r1,PACAR1(r13); \ | 337 | ld r1,PACAR1(r13); \ |
| 272 | std r3,ORIG_GPR3(r1); /* Save original r3 */ \ | 338 | std r3,ORIG_GPR3(r1); /* Save original r3 */ \ |
| 273 | li r0,OPAL_HANDLE_HMI; /* Pass opal token argument*/ \ | 339 | bl opal_rm_handle_hmi; \ |
| 274 | bl opal_call_realmode; \ | ||
| 275 | ld r3,ORIG_GPR3(r1); /* Restore original r3 */ \ | 340 | ld r3,ORIG_GPR3(r1); /* Restore original r3 */ \ |
| 276 | 20: nop; | 341 | 20: nop; |
| 277 | 342 | ||
| 278 | 343 | ||
| 279 | _GLOBAL(power7_wakeup_tb_loss) | 344 | /* |
| 345 | * r3 - requested stop state | ||
| 346 | */ | ||
| 347 | _GLOBAL(power9_idle_stop) | ||
| 348 | LOAD_REG_IMMEDIATE(r4, PSSCR_HV_TEMPLATE) | ||
| 349 | or r4,r4,r3 | ||
| 350 | mtspr SPRN_PSSCR, r4 | ||
| 351 | li r4, 1 | ||
| 352 | LOAD_REG_ADDR(r5,power_enter_stop) | ||
| 353 | b pnv_powersave_common | ||
| 354 | /* No return */ | ||
| 355 | /* | ||
| 356 | * Called from reset vector. Check whether we have woken up with | ||
| 357 | * hypervisor state loss. If yes, restore hypervisor state and return | ||
| 358 | * back to reset vector. | ||
| 359 | * | ||
| 360 | * r13 - Contents of HSPRG0 | ||
| 361 | * cr3 - set to gt if waking up with partial/complete hypervisor state loss | ||
| 362 | */ | ||
| 363 | _GLOBAL(pnv_restore_hyp_resource) | ||
| 280 | ld r2,PACATOC(r13); | 364 | ld r2,PACATOC(r13); |
| 365 | BEGIN_FTR_SECTION | ||
| 366 | /* | ||
| 367 | * POWER ISA 3. Use PSSCR to determine if we | ||
| 368 | * are waking up from deep idle state | ||
| 369 | */ | ||
| 370 | LOAD_REG_ADDRBASE(r5,pnv_first_deep_stop_state) | ||
| 371 | ld r4,ADDROFF(pnv_first_deep_stop_state)(r5) | ||
| 372 | |||
| 373 | mfspr r5,SPRN_PSSCR | ||
| 374 | /* | ||
| 375 | * 0-3 bits correspond to Power-Saving Level Status | ||
| 376 | * which indicates the idle state we are waking up from | ||
| 377 | */ | ||
| 378 | rldicl r5,r5,4,60 | ||
| 379 | cmpd cr4,r5,r4 | ||
| 380 | bge cr4,pnv_wakeup_tb_loss | ||
| 381 | /* | ||
| 382 | * Waking up without hypervisor state loss. Return to | ||
| 383 | * reset vector | ||
| 384 | */ | ||
| 385 | blr | ||
| 386 | |||
| 387 | END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300) | ||
| 388 | |||
| 389 | /* | ||
| 390 | * POWER ISA 2.07 or less. | ||
| 391 | * Check if last bit of HSPGR0 is set. This indicates whether we are | ||
| 392 | * waking up from winkle. | ||
| 393 | */ | ||
| 394 | clrldi r5,r13,63 | ||
| 395 | clrrdi r13,r13,1 | ||
| 396 | cmpwi cr4,r5,1 | ||
| 397 | mtspr SPRN_HSPRG0,r13 | ||
| 398 | |||
| 399 | lbz r0,PACA_THREAD_IDLE_STATE(r13) | ||
| 400 | cmpwi cr2,r0,PNV_THREAD_NAP | ||
| 401 | bgt cr2,pnv_wakeup_tb_loss /* Either sleep or Winkle */ | ||
| 402 | |||
| 403 | /* | ||
| 404 | * We fall through here if PACA_THREAD_IDLE_STATE shows we are waking | ||
| 405 | * up from nap. At this stage CR3 shouldn't contains 'gt' since that | ||
| 406 | * indicates we are waking with hypervisor state loss from nap. | ||
| 407 | */ | ||
| 408 | bgt cr3,. | ||
| 409 | |||
| 410 | blr /* Return back to System Reset vector from where | ||
| 411 | pnv_restore_hyp_resource was invoked */ | ||
| 412 | |||
| 413 | /* | ||
| 414 | * Called if waking up from idle state which can cause either partial or | ||
| 415 | * complete hyp state loss. | ||
| 416 | * In POWER8, called if waking up from fastsleep or winkle | ||
| 417 | * In POWER9, called if waking up from stop state >= pnv_first_deep_stop_state | ||
| 418 | * | ||
| 419 | * r13 - PACA | ||
| 420 | * cr3 - gt if waking up with partial/complete hypervisor state loss | ||
| 421 | * cr4 - eq if waking up from complete hypervisor state loss. | ||
| 422 | */ | ||
| 423 | _GLOBAL(pnv_wakeup_tb_loss) | ||
| 281 | ld r1,PACAR1(r13) | 424 | ld r1,PACAR1(r13) |
| 282 | /* | 425 | /* |
| 283 | * Before entering any idle state, the NVGPRs are saved in the stack | 426 | * Before entering any idle state, the NVGPRs are saved in the stack |
| 284 | * and they are restored before switching to the process context. Hence | 427 | * and they are restored before switching to the process context. Hence |
| 285 | * until they are restored, they are free to be used. | 428 | * until they are restored, they are free to be used. |
| 286 | * | 429 | * |
| 287 | * Save SRR1 in a NVGPR as it might be clobbered in opal_call_realmode | 430 | * Save SRR1 and LR in NVGPRs as they might be clobbered in |
| 288 | * (called in CHECK_HMI_INTERRUPT). SRR1 is required to determine the | 431 | * opal_call() (called in CHECK_HMI_INTERRUPT). SRR1 is required |
| 289 | * wakeup reason if we branch to kvm_start_guest. | 432 | * to determine the wakeup reason if we branch to kvm_start_guest. LR |
| 433 | * is required to return back to reset vector after hypervisor state | ||
| 434 | * restore is complete. | ||
| 290 | */ | 435 | */ |
| 291 | 436 | mflr r17 | |
| 292 | mfspr r16,SPRN_SRR1 | 437 | mfspr r16,SPRN_SRR1 |
| 293 | BEGIN_FTR_SECTION | 438 | BEGIN_FTR_SECTION |
| 294 | CHECK_HMI_INTERRUPT | 439 | CHECK_HMI_INTERRUPT |
| @@ -310,35 +455,35 @@ lwarx_loop2: | |||
| 310 | bnel core_idle_lock_held | 455 | bnel core_idle_lock_held |
| 311 | 456 | ||
| 312 | cmpwi cr2,r15,0 | 457 | cmpwi cr2,r15,0 |
| 313 | lbz r4,PACA_SUBCORE_SIBLING_MASK(r13) | ||
| 314 | and r4,r4,r15 | ||
| 315 | cmpwi cr1,r4,0 /* Check if first in subcore */ | ||
| 316 | 458 | ||
| 317 | /* | 459 | /* |
| 318 | * At this stage | 460 | * At this stage |
| 319 | * cr1 - 0b0100 if first thread to wakeup in subcore | 461 | * cr2 - eq if first thread to wakeup in core |
| 320 | * cr2 - 0b0100 if first thread to wakeup in core | 462 | * cr3- gt if waking up with partial/complete hypervisor state loss |
| 321 | * cr3- 0b0010 if waking up from sleep or winkle | 463 | * cr4 - eq if waking up from complete hypervisor state loss. |
| 322 | * cr4 - 0b0100 if waking up from winkle | ||
| 323 | */ | 464 | */ |
| 324 | 465 | ||
| 325 | or r15,r15,r7 /* Set thread bit */ | ||
| 326 | |||
| 327 | beq cr1,first_thread_in_subcore | ||
| 328 | |||
| 329 | /* Not first thread in subcore to wake up */ | ||
| 330 | stwcx. r15,0,r14 | ||
| 331 | bne- lwarx_loop2 | ||
| 332 | isync | ||
| 333 | b common_exit | ||
| 334 | |||
| 335 | first_thread_in_subcore: | ||
| 336 | /* First thread in subcore to wakeup */ | ||
| 337 | ori r15,r15,PNV_CORE_IDLE_LOCK_BIT | 466 | ori r15,r15,PNV_CORE_IDLE_LOCK_BIT |
| 338 | stwcx. r15,0,r14 | 467 | stwcx. r15,0,r14 |
| 339 | bne- lwarx_loop2 | 468 | bne- lwarx_loop2 |
| 340 | isync | 469 | isync |
| 341 | 470 | ||
| 471 | BEGIN_FTR_SECTION | ||
| 472 | lbz r4,PACA_SUBCORE_SIBLING_MASK(r13) | ||
| 473 | and r4,r4,r15 | ||
| 474 | cmpwi r4,0 /* Check if first in subcore */ | ||
| 475 | |||
| 476 | or r15,r15,r7 /* Set thread bit */ | ||
| 477 | beq first_thread_in_subcore | ||
| 478 | END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_300) | ||
| 479 | |||
| 480 | or r15,r15,r7 /* Set thread bit */ | ||
| 481 | beq cr2,first_thread_in_core | ||
| 482 | |||
| 483 | /* Not first thread in core or subcore to wake up */ | ||
| 484 | b clear_lock | ||
| 485 | |||
| 486 | first_thread_in_subcore: | ||
| 342 | /* | 487 | /* |
| 343 | * If waking up from sleep, subcore state is not lost. Hence | 488 | * If waking up from sleep, subcore state is not lost. Hence |
| 344 | * skip subcore state restore | 489 | * skip subcore state restore |
| @@ -348,6 +493,7 @@ first_thread_in_subcore: | |||
| 348 | /* Restore per-subcore state */ | 493 | /* Restore per-subcore state */ |
| 349 | ld r4,_SDR1(r1) | 494 | ld r4,_SDR1(r1) |
| 350 | mtspr SPRN_SDR1,r4 | 495 | mtspr SPRN_SDR1,r4 |
| 496 | |||
| 351 | ld r4,_RPR(r1) | 497 | ld r4,_RPR(r1) |
| 352 | mtspr SPRN_RPR,r4 | 498 | mtspr SPRN_RPR,r4 |
| 353 | ld r4,_AMOR(r1) | 499 | ld r4,_AMOR(r1) |
| @@ -363,32 +509,44 @@ subcore_state_restored: | |||
| 363 | first_thread_in_core: | 509 | first_thread_in_core: |
| 364 | 510 | ||
| 365 | /* | 511 | /* |
| 366 | * First thread in the core waking up from fastsleep. It needs to | 512 | * First thread in the core waking up from any state which can cause |
| 513 | * partial or complete hypervisor state loss. It needs to | ||
| 367 | * call the fastsleep workaround code if the platform requires it. | 514 | * call the fastsleep workaround code if the platform requires it. |
| 368 | * Call it unconditionally here. The below branch instruction will | 515 | * Call it unconditionally here. The below branch instruction will |
| 369 | * be patched out when the idle states are discovered if platform | 516 | * be patched out if the platform does not have fastsleep or does not |
| 370 | * does not require workaround. | 517 | * require the workaround. Patching will be performed during the |
| 518 | * discovery of idle-states. | ||
| 371 | */ | 519 | */ |
| 372 | .global pnv_fastsleep_workaround_at_exit | 520 | .global pnv_fastsleep_workaround_at_exit |
| 373 | pnv_fastsleep_workaround_at_exit: | 521 | pnv_fastsleep_workaround_at_exit: |
| 374 | b fastsleep_workaround_at_exit | 522 | b fastsleep_workaround_at_exit |
| 375 | 523 | ||
| 376 | timebase_resync: | 524 | timebase_resync: |
| 377 | /* Do timebase resync if we are waking up from sleep. Use cr3 value | 525 | /* |
| 378 | * set in exceptions-64s.S */ | 526 | * Use cr3 which indicates that we are waking up with atleast partial |
| 527 | * hypervisor state loss to determine if TIMEBASE RESYNC is needed. | ||
| 528 | */ | ||
| 379 | ble cr3,clear_lock | 529 | ble cr3,clear_lock |
| 380 | /* Time base re-sync */ | 530 | /* Time base re-sync */ |
| 381 | li r0,OPAL_RESYNC_TIMEBASE | 531 | bl opal_rm_resync_timebase; |
| 382 | bl opal_call_realmode; | ||
| 383 | /* TODO: Check r3 for failure */ | ||
| 384 | |||
| 385 | /* | 532 | /* |
| 386 | * If waking up from sleep, per core state is not lost, skip to | 533 | * If waking up from sleep, per core state is not lost, skip to |
| 387 | * clear_lock. | 534 | * clear_lock. |
| 388 | */ | 535 | */ |
| 389 | bne cr4,clear_lock | 536 | bne cr4,clear_lock |
| 390 | 537 | ||
| 391 | /* Restore per core state */ | 538 | /* |
| 539 | * First thread in the core to wake up and its waking up with | ||
| 540 | * complete hypervisor state loss. Restore per core hypervisor | ||
| 541 | * state. | ||
| 542 | */ | ||
| 543 | BEGIN_FTR_SECTION | ||
| 544 | ld r4,_PTCR(r1) | ||
| 545 | mtspr SPRN_PTCR,r4 | ||
| 546 | ld r4,_RPR(r1) | ||
| 547 | mtspr SPRN_RPR,r4 | ||
| 548 | END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300) | ||
| 549 | |||
| 392 | ld r4,_TSCR(r1) | 550 | ld r4,_TSCR(r1) |
| 393 | mtspr SPRN_TSCR,r4 | 551 | mtspr SPRN_TSCR,r4 |
| 394 | ld r4,_WORC(r1) | 552 | ld r4,_WORC(r1) |
| @@ -410,9 +568,9 @@ common_exit: | |||
| 410 | 568 | ||
| 411 | /* Waking up from winkle */ | 569 | /* Waking up from winkle */ |
| 412 | 570 | ||
| 413 | /* Restore per thread state */ | 571 | BEGIN_MMU_FTR_SECTION |
| 414 | bl __restore_cpu_power8 | 572 | b no_segments |
| 415 | 573 | END_MMU_FTR_SECTION_IFSET(MMU_FTR_RADIX) | |
| 416 | /* Restore SLB from PACA */ | 574 | /* Restore SLB from PACA */ |
| 417 | ld r8,PACA_SLBSHADOWPTR(r13) | 575 | ld r8,PACA_SLBSHADOWPTR(r13) |
| 418 | 576 | ||
| @@ -426,6 +584,9 @@ common_exit: | |||
| 426 | slbmte r6,r5 | 584 | slbmte r6,r5 |
| 427 | 1: addi r8,r8,16 | 585 | 1: addi r8,r8,16 |
| 428 | .endr | 586 | .endr |
| 587 | no_segments: | ||
| 588 | |||
| 589 | /* Restore per thread state */ | ||
| 429 | 590 | ||
| 430 | ld r4,_SPURR(r1) | 591 | ld r4,_SPURR(r1) |
| 431 | mtspr SPRN_SPURR,r4 | 592 | mtspr SPRN_SPURR,r4 |
| @@ -436,48 +597,34 @@ common_exit: | |||
| 436 | ld r4,_WORT(r1) | 597 | ld r4,_WORT(r1) |
| 437 | mtspr SPRN_WORT,r4 | 598 | mtspr SPRN_WORT,r4 |
| 438 | 599 | ||
| 439 | hypervisor_state_restored: | 600 | /* Call cur_cpu_spec->cpu_restore() */ |
| 601 | LOAD_REG_ADDR(r4, cur_cpu_spec) | ||
| 602 | ld r4,0(r4) | ||
| 603 | ld r12,CPU_SPEC_RESTORE(r4) | ||
| 604 | #ifdef PPC64_ELF_ABI_v1 | ||
| 605 | ld r12,0(r12) | ||
| 606 | #endif | ||
| 607 | mtctr r12 | ||
| 608 | bctrl | ||
| 440 | 609 | ||
| 441 | li r5,PNV_THREAD_RUNNING | 610 | hypervisor_state_restored: |
| 442 | stb r5,PACA_THREAD_IDLE_STATE(r13) | ||
| 443 | 611 | ||
| 444 | mtspr SPRN_SRR1,r16 | 612 | mtspr SPRN_SRR1,r16 |
| 445 | #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE | 613 | mtlr r17 |
| 446 | li r0,KVM_HWTHREAD_IN_KERNEL | 614 | blr /* Return back to System Reset vector from where |
| 447 | stb r0,HSTATE_HWTHREAD_STATE(r13) | 615 | pnv_restore_hyp_resource was invoked */ |
| 448 | /* Order setting hwthread_state vs. testing hwthread_req */ | ||
| 449 | sync | ||
| 450 | lbz r0,HSTATE_HWTHREAD_REQ(r13) | ||
| 451 | cmpwi r0,0 | ||
| 452 | beq 6f | ||
| 453 | b kvm_start_guest | ||
| 454 | 6: | ||
| 455 | #endif | ||
| 456 | |||
| 457 | REST_NVGPRS(r1) | ||
| 458 | REST_GPR(2, r1) | ||
| 459 | ld r3,_CCR(r1) | ||
| 460 | ld r4,_MSR(r1) | ||
| 461 | ld r5,_NIP(r1) | ||
| 462 | addi r1,r1,INT_FRAME_SIZE | ||
| 463 | mtcr r3 | ||
| 464 | mfspr r3,SPRN_SRR1 /* Return SRR1 */ | ||
| 465 | mtspr SPRN_SRR1,r4 | ||
| 466 | mtspr SPRN_SRR0,r5 | ||
| 467 | rfid | ||
| 468 | 616 | ||
| 469 | fastsleep_workaround_at_exit: | 617 | fastsleep_workaround_at_exit: |
| 470 | li r3,1 | 618 | li r3,1 |
| 471 | li r4,0 | 619 | li r4,0 |
| 472 | li r0,OPAL_CONFIG_CPU_IDLE_STATE | 620 | bl opal_rm_config_cpu_idle_state |
| 473 | bl opal_call_realmode | ||
| 474 | b timebase_resync | 621 | b timebase_resync |
| 475 | 622 | ||
| 476 | /* | 623 | /* |
| 477 | * R3 here contains the value that will be returned to the caller | 624 | * R3 here contains the value that will be returned to the caller |
| 478 | * of power7_nap. | 625 | * of power7_nap. |
| 479 | */ | 626 | */ |
| 480 | _GLOBAL(power7_wakeup_loss) | 627 | _GLOBAL(pnv_wakeup_loss) |
| 481 | ld r1,PACAR1(r13) | 628 | ld r1,PACAR1(r13) |
| 482 | BEGIN_FTR_SECTION | 629 | BEGIN_FTR_SECTION |
| 483 | CHECK_HMI_INTERRUPT | 630 | CHECK_HMI_INTERRUPT |
| @@ -497,10 +644,10 @@ END_FTR_SECTION_IFSET(CPU_FTR_HVMODE) | |||
| 497 | * R3 here contains the value that will be returned to the caller | 644 | * R3 here contains the value that will be returned to the caller |
| 498 | * of power7_nap. | 645 | * of power7_nap. |
| 499 | */ | 646 | */ |
| 500 | _GLOBAL(power7_wakeup_noloss) | 647 | _GLOBAL(pnv_wakeup_noloss) |
| 501 | lbz r0,PACA_NAPSTATELOST(r13) | 648 | lbz r0,PACA_NAPSTATELOST(r13) |
| 502 | cmpwi r0,0 | 649 | cmpwi r0,0 |
| 503 | bne power7_wakeup_loss | 650 | bne pnv_wakeup_loss |
| 504 | BEGIN_FTR_SECTION | 651 | BEGIN_FTR_SECTION |
| 505 | CHECK_HMI_INTERRUPT | 652 | CHECK_HMI_INTERRUPT |
| 506 | END_FTR_SECTION_IFSET(CPU_FTR_HVMODE) | 653 | END_FTR_SECTION_IFSET(CPU_FTR_HVMODE) |
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c index 3cb46a3b1de7..ac910d9982df 100644 --- a/arch/powerpc/kernel/irq.c +++ b/arch/powerpc/kernel/irq.c | |||
| @@ -250,7 +250,7 @@ notrace void arch_local_irq_restore(unsigned long en) | |||
| 250 | if (WARN_ON(mfmsr() & MSR_EE)) | 250 | if (WARN_ON(mfmsr() & MSR_EE)) |
| 251 | __hard_irq_disable(); | 251 | __hard_irq_disable(); |
| 252 | } | 252 | } |
| 253 | #endif /* CONFIG_TRACE_IRQFLAG */ | 253 | #endif /* CONFIG_TRACE_IRQFLAGS */ |
| 254 | 254 | ||
| 255 | set_soft_enabled(0); | 255 | set_soft_enabled(0); |
| 256 | 256 | ||
| @@ -342,6 +342,21 @@ bool prep_irq_for_idle(void) | |||
| 342 | return true; | 342 | return true; |
| 343 | } | 343 | } |
| 344 | 344 | ||
| 345 | /* | ||
| 346 | * Force a replay of the external interrupt handler on this CPU. | ||
| 347 | */ | ||
| 348 | void force_external_irq_replay(void) | ||
| 349 | { | ||
| 350 | /* | ||
| 351 | * This must only be called with interrupts soft-disabled, | ||
| 352 | * the replay will happen when re-enabling. | ||
| 353 | */ | ||
| 354 | WARN_ON(!arch_irqs_disabled()); | ||
| 355 | |||
| 356 | /* Indicate in the PACA that we have an interrupt to replay */ | ||
| 357 | local_paca->irq_happened |= PACA_IRQ_EE; | ||
| 358 | } | ||
| 359 | |||
| 345 | #endif /* CONFIG_PPC64 */ | 360 | #endif /* CONFIG_PPC64 */ |
| 346 | 361 | ||
| 347 | int arch_show_interrupts(struct seq_file *p, int prec) | 362 | int arch_show_interrupts(struct seq_file *p, int prec) |
diff --git a/arch/powerpc/kernel/kprobes.c b/arch/powerpc/kernel/kprobes.c index 7c053f281406..3ed8ec09b5c9 100644 --- a/arch/powerpc/kernel/kprobes.c +++ b/arch/powerpc/kernel/kprobes.c | |||
| @@ -278,12 +278,11 @@ no_kprobe: | |||
| 278 | * - When the probed function returns, this probe | 278 | * - When the probed function returns, this probe |
| 279 | * causes the handlers to fire | 279 | * causes the handlers to fire |
| 280 | */ | 280 | */ |
| 281 | static void __used kretprobe_trampoline_holder(void) | 281 | asm(".global kretprobe_trampoline\n" |
| 282 | { | 282 | ".type kretprobe_trampoline, @function\n" |
| 283 | asm volatile(".global kretprobe_trampoline\n" | 283 | "kretprobe_trampoline:\n" |
| 284 | "kretprobe_trampoline:\n" | 284 | "nop\n" |
| 285 | "nop\n"); | 285 | ".size kretprobe_trampoline, .-kretprobe_trampoline\n"); |
| 286 | } | ||
| 287 | 286 | ||
| 288 | /* | 287 | /* |
| 289 | * Called when the probe at kretprobe trampoline is hit | 288 | * Called when the probe at kretprobe trampoline is hit |
| @@ -506,13 +505,11 @@ int __kprobes setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs) | |||
| 506 | 505 | ||
| 507 | /* setup return addr to the jprobe handler routine */ | 506 | /* setup return addr to the jprobe handler routine */ |
| 508 | regs->nip = arch_deref_entry_point(jp->entry); | 507 | regs->nip = arch_deref_entry_point(jp->entry); |
| 509 | #ifdef CONFIG_PPC64 | 508 | #ifdef PPC64_ELF_ABI_v2 |
| 510 | #if defined(_CALL_ELF) && _CALL_ELF == 2 | ||
| 511 | regs->gpr[12] = (unsigned long)jp->entry; | 509 | regs->gpr[12] = (unsigned long)jp->entry; |
| 512 | #else | 510 | #elif defined(PPC64_ELF_ABI_v1) |
| 513 | regs->gpr[2] = (unsigned long)(((func_descr_t *)jp->entry)->toc); | 511 | regs->gpr[2] = (unsigned long)(((func_descr_t *)jp->entry)->toc); |
| 514 | #endif | 512 | #endif |
| 515 | #endif | ||
| 516 | 513 | ||
| 517 | return 1; | 514 | return 1; |
| 518 | } | 515 | } |
diff --git a/arch/powerpc/kernel/machine_kexec_64.c b/arch/powerpc/kernel/machine_kexec_64.c index b8c202d63ecb..4c780a342282 100644 --- a/arch/powerpc/kernel/machine_kexec_64.c +++ b/arch/powerpc/kernel/machine_kexec_64.c | |||
| @@ -29,6 +29,7 @@ | |||
| 29 | #include <asm/prom.h> | 29 | #include <asm/prom.h> |
| 30 | #include <asm/smp.h> | 30 | #include <asm/smp.h> |
| 31 | #include <asm/hw_breakpoint.h> | 31 | #include <asm/hw_breakpoint.h> |
| 32 | #include <asm/asm-prototypes.h> | ||
| 32 | 33 | ||
| 33 | #ifdef CONFIG_PPC_BOOK3E | 34 | #ifdef CONFIG_PPC_BOOK3E |
| 34 | int default_machine_kexec_prepare(struct kimage *image) | 35 | int default_machine_kexec_prepare(struct kimage *image) |
| @@ -54,7 +55,7 @@ int default_machine_kexec_prepare(struct kimage *image) | |||
| 54 | const unsigned long *basep; | 55 | const unsigned long *basep; |
| 55 | const unsigned int *sizep; | 56 | const unsigned int *sizep; |
| 56 | 57 | ||
| 57 | if (!ppc_md.hpte_clear_all) | 58 | if (!mmu_hash_ops.hpte_clear_all) |
| 58 | return -ENOENT; | 59 | return -ENOENT; |
| 59 | 60 | ||
| 60 | /* | 61 | /* |
| @@ -379,7 +380,12 @@ void default_machine_kexec(struct kimage *image) | |||
| 379 | */ | 380 | */ |
| 380 | kexec_sequence(&kexec_stack, image->start, image, | 381 | kexec_sequence(&kexec_stack, image->start, image, |
| 381 | page_address(image->control_code_page), | 382 | page_address(image->control_code_page), |
| 382 | ppc_md.hpte_clear_all); | 383 | #ifdef CONFIG_PPC_STD_MMU |
| 384 | mmu_hash_ops.hpte_clear_all | ||
| 385 | #else | ||
| 386 | NULL | ||
| 387 | #endif | ||
| 388 | ); | ||
| 383 | /* NOTREACHED */ | 389 | /* NOTREACHED */ |
| 384 | } | 390 | } |
| 385 | 391 | ||
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S index 285ca8c6cc2e..d9c912b6e632 100644 --- a/arch/powerpc/kernel/misc_32.S +++ b/arch/powerpc/kernel/misc_32.S | |||
| @@ -104,20 +104,6 @@ _GLOBAL(mulhdu) | |||
| 104 | blr | 104 | blr |
| 105 | 105 | ||
| 106 | /* | 106 | /* |
| 107 | * sub_reloc_offset(x) returns x - reloc_offset(). | ||
| 108 | */ | ||
| 109 | _GLOBAL(sub_reloc_offset) | ||
| 110 | mflr r0 | ||
| 111 | bl 1f | ||
| 112 | 1: mflr r5 | ||
| 113 | lis r4,1b@ha | ||
| 114 | addi r4,r4,1b@l | ||
| 115 | subf r5,r4,r5 | ||
| 116 | subf r3,r5,r3 | ||
| 117 | mtlr r0 | ||
| 118 | blr | ||
| 119 | |||
| 120 | /* | ||
| 121 | * reloc_got2 runs through the .got2 section adding an offset | 107 | * reloc_got2 runs through the .got2 section adding an offset |
| 122 | * to each entry. | 108 | * to each entry. |
| 123 | */ | 109 | */ |
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S index f28754c497e5..cb195157b318 100644 --- a/arch/powerpc/kernel/misc_64.S +++ b/arch/powerpc/kernel/misc_64.S | |||
| @@ -661,13 +661,13 @@ _GLOBAL(kexec_sequence) | |||
| 661 | 661 | ||
| 662 | #ifndef CONFIG_PPC_BOOK3E | 662 | #ifndef CONFIG_PPC_BOOK3E |
| 663 | /* clear out hardware hash page table and tlb */ | 663 | /* clear out hardware hash page table and tlb */ |
| 664 | #if !defined(_CALL_ELF) || _CALL_ELF != 2 | 664 | #ifdef PPC64_ELF_ABI_v1 |
| 665 | ld r12,0(r27) /* deref function descriptor */ | 665 | ld r12,0(r27) /* deref function descriptor */ |
| 666 | #else | 666 | #else |
| 667 | mr r12,r27 | 667 | mr r12,r27 |
| 668 | #endif | 668 | #endif |
| 669 | mtctr r12 | 669 | mtctr r12 |
| 670 | bctrl /* ppc_md.hpte_clear_all(void); */ | 670 | bctrl /* mmu_hash_ops.hpte_clear_all(void); */ |
| 671 | #endif /* !CONFIG_PPC_BOOK3E */ | 671 | #endif /* !CONFIG_PPC_BOOK3E */ |
| 672 | 672 | ||
| 673 | /* | 673 | /* |
diff --git a/arch/powerpc/kernel/module_64.c b/arch/powerpc/kernel/module_64.c index 9ce9a25f58b5..183368e008cf 100644 --- a/arch/powerpc/kernel/module_64.c +++ b/arch/powerpc/kernel/module_64.c | |||
| @@ -41,7 +41,7 @@ | |||
| 41 | this, and makes other things simpler. Anton? | 41 | this, and makes other things simpler. Anton? |
| 42 | --RR. */ | 42 | --RR. */ |
| 43 | 43 | ||
| 44 | #if defined(_CALL_ELF) && _CALL_ELF == 2 | 44 | #ifdef PPC64_ELF_ABI_v2 |
| 45 | 45 | ||
| 46 | /* An address is simply the address of the function. */ | 46 | /* An address is simply the address of the function. */ |
| 47 | typedef unsigned long func_desc_t; | 47 | typedef unsigned long func_desc_t; |
| @@ -132,7 +132,7 @@ static u32 ppc64_stub_insns[] = { | |||
| 132 | /* Save current r2 value in magic place on the stack. */ | 132 | /* Save current r2 value in magic place on the stack. */ |
| 133 | 0xf8410000|R2_STACK_OFFSET, /* std r2,R2_STACK_OFFSET(r1) */ | 133 | 0xf8410000|R2_STACK_OFFSET, /* std r2,R2_STACK_OFFSET(r1) */ |
| 134 | 0xe98b0020, /* ld r12,32(r11) */ | 134 | 0xe98b0020, /* ld r12,32(r11) */ |
| 135 | #if !defined(_CALL_ELF) || _CALL_ELF != 2 | 135 | #ifdef PPC64_ELF_ABI_v1 |
| 136 | /* Set up new r2 from function descriptor */ | 136 | /* Set up new r2 from function descriptor */ |
| 137 | 0xe84b0028, /* ld r2,40(r11) */ | 137 | 0xe84b0028, /* ld r2,40(r11) */ |
| 138 | #endif | 138 | #endif |
| @@ -494,9 +494,10 @@ static bool is_early_mcount_callsite(u32 *instruction) | |||
| 494 | restore r2. */ | 494 | restore r2. */ |
| 495 | static int restore_r2(u32 *instruction, struct module *me) | 495 | static int restore_r2(u32 *instruction, struct module *me) |
| 496 | { | 496 | { |
| 497 | if (is_early_mcount_callsite(instruction - 1)) | ||
| 498 | return 1; | ||
| 499 | |||
| 497 | if (*instruction != PPC_INST_NOP) { | 500 | if (*instruction != PPC_INST_NOP) { |
| 498 | if (is_early_mcount_callsite(instruction - 1)) | ||
| 499 | return 1; | ||
| 500 | pr_err("%s: Expect noop after relocate, got %08x\n", | 501 | pr_err("%s: Expect noop after relocate, got %08x\n", |
| 501 | me->name, *instruction); | 502 | me->name, *instruction); |
| 502 | return 0; | 503 | return 0; |
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c index 0f7a60f1e9f6..f93942b4b6a6 100644 --- a/arch/powerpc/kernel/pci-common.c +++ b/arch/powerpc/kernel/pci-common.c | |||
| @@ -41,11 +41,18 @@ | |||
| 41 | #include <asm/ppc-pci.h> | 41 | #include <asm/ppc-pci.h> |
| 42 | #include <asm/eeh.h> | 42 | #include <asm/eeh.h> |
| 43 | 43 | ||
| 44 | /* hose_spinlock protects accesses to the the phb_bitmap. */ | ||
| 44 | static DEFINE_SPINLOCK(hose_spinlock); | 45 | static DEFINE_SPINLOCK(hose_spinlock); |
| 45 | LIST_HEAD(hose_list); | 46 | LIST_HEAD(hose_list); |
| 46 | 47 | ||
| 47 | /* XXX kill that some day ... */ | 48 | /* For dynamic PHB numbering on get_phb_number(): max number of PHBs. */ |
| 48 | static int global_phb_number; /* Global phb counter */ | 49 | #define MAX_PHBS 0x10000 |
| 50 | |||
| 51 | /* | ||
| 52 | * For dynamic PHB numbering: used/free PHBs tracking bitmap. | ||
| 53 | * Accesses to this bitmap should be protected by hose_spinlock. | ||
| 54 | */ | ||
| 55 | static DECLARE_BITMAP(phb_bitmap, MAX_PHBS); | ||
| 49 | 56 | ||
| 50 | /* ISA Memory physical address */ | 57 | /* ISA Memory physical address */ |
| 51 | resource_size_t isa_mem_base; | 58 | resource_size_t isa_mem_base; |
| @@ -64,6 +71,42 @@ struct dma_map_ops *get_pci_dma_ops(void) | |||
| 64 | } | 71 | } |
| 65 | EXPORT_SYMBOL(get_pci_dma_ops); | 72 | EXPORT_SYMBOL(get_pci_dma_ops); |
| 66 | 73 | ||
| 74 | /* | ||
| 75 | * This function should run under locking protection, specifically | ||
| 76 | * hose_spinlock. | ||
| 77 | */ | ||
| 78 | static int get_phb_number(struct device_node *dn) | ||
| 79 | { | ||
| 80 | int ret, phb_id = -1; | ||
| 81 | u64 prop; | ||
| 82 | |||
| 83 | /* | ||
| 84 | * Try fixed PHB numbering first, by checking archs and reading | ||
| 85 | * the respective device-tree properties. Firstly, try powernv by | ||
| 86 | * reading "ibm,opal-phbid", only present in OPAL environment. | ||
| 87 | */ | ||
| 88 | ret = of_property_read_u64(dn, "ibm,opal-phbid", &prop); | ||
| 89 | if (ret) | ||
| 90 | ret = of_property_read_u32_index(dn, "reg", 1, (u32 *)&prop); | ||
| 91 | |||
| 92 | if (!ret) | ||
| 93 | phb_id = (int)(prop & (MAX_PHBS - 1)); | ||
| 94 | |||
| 95 | /* We need to be sure to not use the same PHB number twice. */ | ||
| 96 | if ((phb_id >= 0) && !test_and_set_bit(phb_id, phb_bitmap)) | ||
| 97 | return phb_id; | ||
| 98 | |||
| 99 | /* | ||
| 100 | * If not pseries nor powernv, or if fixed PHB numbering tried to add | ||
| 101 | * the same PHB number twice, then fallback to dynamic PHB numbering. | ||
| 102 | */ | ||
| 103 | phb_id = find_first_zero_bit(phb_bitmap, MAX_PHBS); | ||
| 104 | BUG_ON(phb_id >= MAX_PHBS); | ||
| 105 | set_bit(phb_id, phb_bitmap); | ||
| 106 | |||
| 107 | return phb_id; | ||
| 108 | } | ||
| 109 | |||
| 67 | struct pci_controller *pcibios_alloc_controller(struct device_node *dev) | 110 | struct pci_controller *pcibios_alloc_controller(struct device_node *dev) |
| 68 | { | 111 | { |
| 69 | struct pci_controller *phb; | 112 | struct pci_controller *phb; |
| @@ -72,7 +115,7 @@ struct pci_controller *pcibios_alloc_controller(struct device_node *dev) | |||
| 72 | if (phb == NULL) | 115 | if (phb == NULL) |
| 73 | return NULL; | 116 | return NULL; |
| 74 | spin_lock(&hose_spinlock); | 117 | spin_lock(&hose_spinlock); |
| 75 | phb->global_number = global_phb_number++; | 118 | phb->global_number = get_phb_number(dev); |
| 76 | list_add_tail(&phb->list_node, &hose_list); | 119 | list_add_tail(&phb->list_node, &hose_list); |
| 77 | spin_unlock(&hose_spinlock); | 120 | spin_unlock(&hose_spinlock); |
| 78 | phb->dn = dev; | 121 | phb->dn = dev; |
| @@ -94,6 +137,11 @@ EXPORT_SYMBOL_GPL(pcibios_alloc_controller); | |||
| 94 | void pcibios_free_controller(struct pci_controller *phb) | 137 | void pcibios_free_controller(struct pci_controller *phb) |
| 95 | { | 138 | { |
| 96 | spin_lock(&hose_spinlock); | 139 | spin_lock(&hose_spinlock); |
| 140 | |||
| 141 | /* Clear bit of phb_bitmap to allow reuse of this PHB number. */ | ||
| 142 | if (phb->global_number < MAX_PHBS) | ||
| 143 | clear_bit(phb->global_number, phb_bitmap); | ||
| 144 | |||
| 97 | list_del(&phb->list_node); | 145 | list_del(&phb->list_node); |
| 98 | spin_unlock(&hose_spinlock); | 146 | spin_unlock(&hose_spinlock); |
| 99 | 147 | ||
| @@ -124,6 +172,14 @@ resource_size_t pcibios_window_alignment(struct pci_bus *bus, | |||
| 124 | return 1; | 172 | return 1; |
| 125 | } | 173 | } |
| 126 | 174 | ||
| 175 | void pcibios_setup_bridge(struct pci_bus *bus, unsigned long type) | ||
| 176 | { | ||
| 177 | struct pci_controller *hose = pci_bus_to_host(bus); | ||
| 178 | |||
| 179 | if (hose->controller_ops.setup_bridge) | ||
| 180 | hose->controller_ops.setup_bridge(bus, type); | ||
| 181 | } | ||
| 182 | |||
| 127 | void pcibios_reset_secondary_bus(struct pci_dev *dev) | 183 | void pcibios_reset_secondary_bus(struct pci_dev *dev) |
| 128 | { | 184 | { |
| 129 | struct pci_controller *phb = pci_bus_to_host(dev->bus); | 185 | struct pci_controller *phb = pci_bus_to_host(dev->bus); |
| @@ -1362,8 +1418,10 @@ void __init pcibios_resource_survey(void) | |||
| 1362 | /* Allocate and assign resources */ | 1418 | /* Allocate and assign resources */ |
| 1363 | list_for_each_entry(b, &pci_root_buses, node) | 1419 | list_for_each_entry(b, &pci_root_buses, node) |
| 1364 | pcibios_allocate_bus_resources(b); | 1420 | pcibios_allocate_bus_resources(b); |
| 1365 | pcibios_allocate_resources(0); | 1421 | if (!pci_has_flag(PCI_REASSIGN_ALL_RSRC)) { |
| 1366 | pcibios_allocate_resources(1); | 1422 | pcibios_allocate_resources(0); |
| 1423 | pcibios_allocate_resources(1); | ||
| 1424 | } | ||
| 1367 | 1425 | ||
| 1368 | /* Before we start assigning unassigned resource, we try to reserve | 1426 | /* Before we start assigning unassigned resource, we try to reserve |
| 1369 | * the low IO area and the VGA memory area if they intersect the | 1427 | * the low IO area and the VGA memory area if they intersect the |
| @@ -1436,8 +1494,12 @@ void pcibios_finish_adding_to_bus(struct pci_bus *bus) | |||
| 1436 | /* Allocate bus and devices resources */ | 1494 | /* Allocate bus and devices resources */ |
| 1437 | pcibios_allocate_bus_resources(bus); | 1495 | pcibios_allocate_bus_resources(bus); |
| 1438 | pcibios_claim_one_bus(bus); | 1496 | pcibios_claim_one_bus(bus); |
| 1439 | if (!pci_has_flag(PCI_PROBE_ONLY)) | 1497 | if (!pci_has_flag(PCI_PROBE_ONLY)) { |
| 1440 | pci_assign_unassigned_bus_resources(bus); | 1498 | if (bus->self) |
| 1499 | pci_assign_unassigned_bridge_resources(bus->self); | ||
| 1500 | else | ||
| 1501 | pci_assign_unassigned_bus_resources(bus); | ||
| 1502 | } | ||
| 1441 | 1503 | ||
| 1442 | /* Fixup EEH */ | 1504 | /* Fixup EEH */ |
| 1443 | eeh_add_device_tree_late(bus); | 1505 | eeh_add_device_tree_late(bus); |
| @@ -1485,9 +1547,9 @@ static void pcibios_setup_phb_resources(struct pci_controller *hose, | |||
| 1485 | res = &hose->io_resource; | 1547 | res = &hose->io_resource; |
| 1486 | 1548 | ||
| 1487 | if (!res->flags) { | 1549 | if (!res->flags) { |
| 1488 | pr_info("PCI: I/O resource not set for host" | 1550 | pr_debug("PCI: I/O resource not set for host" |
| 1489 | " bridge %s (domain %d)\n", | 1551 | " bridge %s (domain %d)\n", |
| 1490 | hose->dn->full_name, hose->global_number); | 1552 | hose->dn->full_name, hose->global_number); |
| 1491 | } else { | 1553 | } else { |
| 1492 | offset = pcibios_io_space_offset(hose); | 1554 | offset = pcibios_io_space_offset(hose); |
| 1493 | 1555 | ||
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c index a5ae49a2dcc4..ed5e9ff61a68 100644 --- a/arch/powerpc/kernel/pci_64.c +++ b/arch/powerpc/kernel/pci_64.c | |||
| @@ -81,7 +81,7 @@ int pcibios_unmap_io_space(struct pci_bus *bus) | |||
| 81 | 81 | ||
| 82 | /* If this is not a PHB, we only flush the hash table over | 82 | /* If this is not a PHB, we only flush the hash table over |
| 83 | * the area mapped by this bridge. We don't play with the PTE | 83 | * the area mapped by this bridge. We don't play with the PTE |
| 84 | * mappings since we might have to deal with sub-page alignemnts | 84 | * mappings since we might have to deal with sub-page alignments |
| 85 | * so flushing the hash table is the only sane way to make sure | 85 | * so flushing the hash table is the only sane way to make sure |
| 86 | * that no hash entries are covering that removed bridge area | 86 | * that no hash entries are covering that removed bridge area |
| 87 | * while still allowing other busses overlapping those pages | 87 | * while still allowing other busses overlapping those pages |
diff --git a/arch/powerpc/kernel/pci_dn.c b/arch/powerpc/kernel/pci_dn.c index ecdccce78719..592693437070 100644 --- a/arch/powerpc/kernel/pci_dn.c +++ b/arch/powerpc/kernel/pci_dn.c | |||
| @@ -31,6 +31,7 @@ | |||
| 31 | #include <asm/pci-bridge.h> | 31 | #include <asm/pci-bridge.h> |
| 32 | #include <asm/ppc-pci.h> | 32 | #include <asm/ppc-pci.h> |
| 33 | #include <asm/firmware.h> | 33 | #include <asm/firmware.h> |
| 34 | #include <asm/eeh.h> | ||
| 34 | 35 | ||
| 35 | /* | 36 | /* |
| 36 | * The function is used to find the firmware data of one | 37 | * The function is used to find the firmware data of one |
| @@ -181,7 +182,6 @@ struct pci_dn *add_dev_pci_data(struct pci_dev *pdev) | |||
| 181 | { | 182 | { |
| 182 | #ifdef CONFIG_PCI_IOV | 183 | #ifdef CONFIG_PCI_IOV |
| 183 | struct pci_dn *parent, *pdn; | 184 | struct pci_dn *parent, *pdn; |
| 184 | struct eeh_dev *edev; | ||
| 185 | int i; | 185 | int i; |
| 186 | 186 | ||
| 187 | /* Only support IOV for now */ | 187 | /* Only support IOV for now */ |
| @@ -199,6 +199,8 @@ struct pci_dn *add_dev_pci_data(struct pci_dev *pdev) | |||
| 199 | return NULL; | 199 | return NULL; |
| 200 | 200 | ||
| 201 | for (i = 0; i < pci_sriov_get_totalvfs(pdev); i++) { | 201 | for (i = 0; i < pci_sriov_get_totalvfs(pdev); i++) { |
| 202 | struct eeh_dev *edev __maybe_unused; | ||
| 203 | |||
| 202 | pdn = add_one_dev_pci_data(parent, NULL, i, | 204 | pdn = add_one_dev_pci_data(parent, NULL, i, |
| 203 | pci_iov_virtfn_bus(pdev, i), | 205 | pci_iov_virtfn_bus(pdev, i), |
| 204 | pci_iov_virtfn_devfn(pdev, i)); | 206 | pci_iov_virtfn_devfn(pdev, i)); |
| @@ -208,11 +210,12 @@ struct pci_dn *add_dev_pci_data(struct pci_dev *pdev) | |||
| 208 | return NULL; | 210 | return NULL; |
| 209 | } | 211 | } |
| 210 | 212 | ||
| 213 | #ifdef CONFIG_EEH | ||
| 211 | /* Create the EEH device for the VF */ | 214 | /* Create the EEH device for the VF */ |
| 212 | eeh_dev_init(pdn, pci_bus_to_host(pdev->bus)); | 215 | edev = eeh_dev_init(pdn); |
| 213 | edev = pdn_to_eeh_dev(pdn); | ||
| 214 | BUG_ON(!edev); | 216 | BUG_ON(!edev); |
| 215 | edev->physfn = pdev; | 217 | edev->physfn = pdev; |
| 218 | #endif /* CONFIG_EEH */ | ||
| 216 | } | 219 | } |
| 217 | #endif /* CONFIG_PCI_IOV */ | 220 | #endif /* CONFIG_PCI_IOV */ |
| 218 | 221 | ||
| @@ -224,7 +227,6 @@ void remove_dev_pci_data(struct pci_dev *pdev) | |||
| 224 | #ifdef CONFIG_PCI_IOV | 227 | #ifdef CONFIG_PCI_IOV |
| 225 | struct pci_dn *parent; | 228 | struct pci_dn *parent; |
| 226 | struct pci_dn *pdn, *tmp; | 229 | struct pci_dn *pdn, *tmp; |
| 227 | struct eeh_dev *edev; | ||
| 228 | int i; | 230 | int i; |
| 229 | 231 | ||
| 230 | /* | 232 | /* |
| @@ -260,18 +262,22 @@ void remove_dev_pci_data(struct pci_dev *pdev) | |||
| 260 | * a batch mode. | 262 | * a batch mode. |
| 261 | */ | 263 | */ |
| 262 | for (i = 0; i < pci_sriov_get_totalvfs(pdev); i++) { | 264 | for (i = 0; i < pci_sriov_get_totalvfs(pdev); i++) { |
| 265 | struct eeh_dev *edev __maybe_unused; | ||
| 266 | |||
| 263 | list_for_each_entry_safe(pdn, tmp, | 267 | list_for_each_entry_safe(pdn, tmp, |
| 264 | &parent->child_list, list) { | 268 | &parent->child_list, list) { |
| 265 | if (pdn->busno != pci_iov_virtfn_bus(pdev, i) || | 269 | if (pdn->busno != pci_iov_virtfn_bus(pdev, i) || |
| 266 | pdn->devfn != pci_iov_virtfn_devfn(pdev, i)) | 270 | pdn->devfn != pci_iov_virtfn_devfn(pdev, i)) |
| 267 | continue; | 271 | continue; |
| 268 | 272 | ||
| 273 | #ifdef CONFIG_EEH | ||
| 269 | /* Release EEH device for the VF */ | 274 | /* Release EEH device for the VF */ |
| 270 | edev = pdn_to_eeh_dev(pdn); | 275 | edev = pdn_to_eeh_dev(pdn); |
| 271 | if (edev) { | 276 | if (edev) { |
| 272 | pdn->edev = NULL; | 277 | pdn->edev = NULL; |
| 273 | kfree(edev); | 278 | kfree(edev); |
| 274 | } | 279 | } |
| 280 | #endif /* CONFIG_EEH */ | ||
| 275 | 281 | ||
| 276 | if (!list_empty(&pdn->list)) | 282 | if (!list_empty(&pdn->list)) |
| 277 | list_del(&pdn->list); | 283 | list_del(&pdn->list); |
| @@ -289,8 +295,11 @@ struct pci_dn *pci_add_device_node_info(struct pci_controller *hose, | |||
| 289 | const __be32 *regs; | 295 | const __be32 *regs; |
| 290 | struct device_node *parent; | 296 | struct device_node *parent; |
| 291 | struct pci_dn *pdn; | 297 | struct pci_dn *pdn; |
| 298 | #ifdef CONFIG_EEH | ||
| 299 | struct eeh_dev *edev; | ||
| 300 | #endif | ||
| 292 | 301 | ||
| 293 | pdn = zalloc_maybe_bootmem(sizeof(*pdn), GFP_KERNEL); | 302 | pdn = kzalloc(sizeof(*pdn), GFP_KERNEL); |
| 294 | if (pdn == NULL) | 303 | if (pdn == NULL) |
| 295 | return NULL; | 304 | return NULL; |
| 296 | dn->data = pdn; | 305 | dn->data = pdn; |
| @@ -319,6 +328,15 @@ struct pci_dn *pci_add_device_node_info(struct pci_controller *hose, | |||
| 319 | /* Extended config space */ | 328 | /* Extended config space */ |
| 320 | pdn->pci_ext_config_space = (type && of_read_number(type, 1) == 1); | 329 | pdn->pci_ext_config_space = (type && of_read_number(type, 1) == 1); |
| 321 | 330 | ||
| 331 | /* Create EEH device */ | ||
| 332 | #ifdef CONFIG_EEH | ||
| 333 | edev = eeh_dev_init(pdn); | ||
| 334 | if (!edev) { | ||
| 335 | kfree(pdn); | ||
| 336 | return NULL; | ||
| 337 | } | ||
| 338 | #endif | ||
| 339 | |||
| 322 | /* Attach to parent node */ | 340 | /* Attach to parent node */ |
| 323 | INIT_LIST_HEAD(&pdn->child_list); | 341 | INIT_LIST_HEAD(&pdn->child_list); |
| 324 | INIT_LIST_HEAD(&pdn->list); | 342 | INIT_LIST_HEAD(&pdn->list); |
| @@ -504,15 +522,19 @@ void pci_devs_phb_init_dynamic(struct pci_controller *phb) | |||
| 504 | * pci device found underneath. This routine runs once, | 522 | * pci device found underneath. This routine runs once, |
| 505 | * early in the boot sequence. | 523 | * early in the boot sequence. |
| 506 | */ | 524 | */ |
| 507 | void __init pci_devs_phb_init(void) | 525 | static int __init pci_devs_phb_init(void) |
| 508 | { | 526 | { |
| 509 | struct pci_controller *phb, *tmp; | 527 | struct pci_controller *phb, *tmp; |
| 510 | 528 | ||
| 511 | /* This must be done first so the device nodes have valid pci info! */ | 529 | /* This must be done first so the device nodes have valid pci info! */ |
| 512 | list_for_each_entry_safe(phb, tmp, &hose_list, list_node) | 530 | list_for_each_entry_safe(phb, tmp, &hose_list, list_node) |
| 513 | pci_devs_phb_init_dynamic(phb); | 531 | pci_devs_phb_init_dynamic(phb); |
| 532 | |||
| 533 | return 0; | ||
| 514 | } | 534 | } |
| 515 | 535 | ||
| 536 | core_initcall(pci_devs_phb_init); | ||
| 537 | |||
| 516 | static void pci_dev_pdn_setup(struct pci_dev *pdev) | 538 | static void pci_dev_pdn_setup(struct pci_dev *pdev) |
| 517 | { | 539 | { |
| 518 | struct pci_dn *pdn; | 540 | struct pci_dn *pdn; |
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c index 0b93893424f5..a8cca88e972f 100644 --- a/arch/powerpc/kernel/process.c +++ b/arch/powerpc/kernel/process.c | |||
| @@ -139,12 +139,16 @@ EXPORT_SYMBOL(__msr_check_and_clear); | |||
| 139 | #ifdef CONFIG_PPC_FPU | 139 | #ifdef CONFIG_PPC_FPU |
| 140 | void __giveup_fpu(struct task_struct *tsk) | 140 | void __giveup_fpu(struct task_struct *tsk) |
| 141 | { | 141 | { |
| 142 | unsigned long msr; | ||
| 143 | |||
| 142 | save_fpu(tsk); | 144 | save_fpu(tsk); |
| 143 | tsk->thread.regs->msr &= ~MSR_FP; | 145 | msr = tsk->thread.regs->msr; |
| 146 | msr &= ~MSR_FP; | ||
| 144 | #ifdef CONFIG_VSX | 147 | #ifdef CONFIG_VSX |
| 145 | if (cpu_has_feature(CPU_FTR_VSX)) | 148 | if (cpu_has_feature(CPU_FTR_VSX)) |
| 146 | tsk->thread.regs->msr &= ~MSR_VSX; | 149 | msr &= ~MSR_VSX; |
| 147 | #endif | 150 | #endif |
| 151 | tsk->thread.regs->msr = msr; | ||
| 148 | } | 152 | } |
| 149 | 153 | ||
| 150 | void giveup_fpu(struct task_struct *tsk) | 154 | void giveup_fpu(struct task_struct *tsk) |
| @@ -219,12 +223,16 @@ static int restore_fp(struct task_struct *tsk) { return 0; } | |||
| 219 | 223 | ||
| 220 | static void __giveup_altivec(struct task_struct *tsk) | 224 | static void __giveup_altivec(struct task_struct *tsk) |
| 221 | { | 225 | { |
| 226 | unsigned long msr; | ||
| 227 | |||
| 222 | save_altivec(tsk); | 228 | save_altivec(tsk); |
| 223 | tsk->thread.regs->msr &= ~MSR_VEC; | 229 | msr = tsk->thread.regs->msr; |
| 230 | msr &= ~MSR_VEC; | ||
| 224 | #ifdef CONFIG_VSX | 231 | #ifdef CONFIG_VSX |
| 225 | if (cpu_has_feature(CPU_FTR_VSX)) | 232 | if (cpu_has_feature(CPU_FTR_VSX)) |
| 226 | tsk->thread.regs->msr &= ~MSR_VSX; | 233 | msr &= ~MSR_VSX; |
| 227 | #endif | 234 | #endif |
| 235 | tsk->thread.regs->msr = msr; | ||
| 228 | } | 236 | } |
| 229 | 237 | ||
| 230 | void giveup_altivec(struct task_struct *tsk) | 238 | void giveup_altivec(struct task_struct *tsk) |
| @@ -794,7 +802,7 @@ static void tm_reclaim_thread(struct thread_struct *thr, | |||
| 794 | * this state. | 802 | * this state. |
| 795 | * We do this using the current MSR, rather tracking it in | 803 | * We do this using the current MSR, rather tracking it in |
| 796 | * some specific thread_struct bit, as it has the additional | 804 | * some specific thread_struct bit, as it has the additional |
| 797 | * benifit of checking for a potential TM bad thing exception. | 805 | * benefit of checking for a potential TM bad thing exception. |
| 798 | */ | 806 | */ |
| 799 | if (!MSR_TM_SUSPENDED(mfmsr())) | 807 | if (!MSR_TM_SUSPENDED(mfmsr())) |
| 800 | return; | 808 | return; |
| @@ -1009,6 +1017,14 @@ static inline void save_sprs(struct thread_struct *t) | |||
| 1009 | */ | 1017 | */ |
| 1010 | t->tar = mfspr(SPRN_TAR); | 1018 | t->tar = mfspr(SPRN_TAR); |
| 1011 | } | 1019 | } |
| 1020 | |||
| 1021 | if (cpu_has_feature(CPU_FTR_ARCH_300)) { | ||
| 1022 | /* Conditionally save Load Monitor registers, if enabled */ | ||
| 1023 | if (t->fscr & FSCR_LM) { | ||
| 1024 | t->lmrr = mfspr(SPRN_LMRR); | ||
| 1025 | t->lmser = mfspr(SPRN_LMSER); | ||
| 1026 | } | ||
| 1027 | } | ||
| 1012 | #endif | 1028 | #endif |
| 1013 | } | 1029 | } |
| 1014 | 1030 | ||
| @@ -1023,18 +1039,11 @@ static inline void restore_sprs(struct thread_struct *old_thread, | |||
| 1023 | #ifdef CONFIG_PPC_BOOK3S_64 | 1039 | #ifdef CONFIG_PPC_BOOK3S_64 |
| 1024 | if (cpu_has_feature(CPU_FTR_DSCR)) { | 1040 | if (cpu_has_feature(CPU_FTR_DSCR)) { |
| 1025 | u64 dscr = get_paca()->dscr_default; | 1041 | u64 dscr = get_paca()->dscr_default; |
| 1026 | u64 fscr = old_thread->fscr & ~FSCR_DSCR; | 1042 | if (new_thread->dscr_inherit) |
| 1027 | |||
| 1028 | if (new_thread->dscr_inherit) { | ||
| 1029 | dscr = new_thread->dscr; | 1043 | dscr = new_thread->dscr; |
| 1030 | fscr |= FSCR_DSCR; | ||
| 1031 | } | ||
| 1032 | 1044 | ||
| 1033 | if (old_thread->dscr != dscr) | 1045 | if (old_thread->dscr != dscr) |
| 1034 | mtspr(SPRN_DSCR, dscr); | 1046 | mtspr(SPRN_DSCR, dscr); |
| 1035 | |||
| 1036 | if (old_thread->fscr != fscr) | ||
| 1037 | mtspr(SPRN_FSCR, fscr); | ||
| 1038 | } | 1047 | } |
| 1039 | 1048 | ||
| 1040 | if (cpu_has_feature(CPU_FTR_ARCH_207S)) { | 1049 | if (cpu_has_feature(CPU_FTR_ARCH_207S)) { |
| @@ -1045,9 +1054,22 @@ static inline void restore_sprs(struct thread_struct *old_thread, | |||
| 1045 | if (old_thread->ebbrr != new_thread->ebbrr) | 1054 | if (old_thread->ebbrr != new_thread->ebbrr) |
| 1046 | mtspr(SPRN_EBBRR, new_thread->ebbrr); | 1055 | mtspr(SPRN_EBBRR, new_thread->ebbrr); |
| 1047 | 1056 | ||
| 1057 | if (old_thread->fscr != new_thread->fscr) | ||
| 1058 | mtspr(SPRN_FSCR, new_thread->fscr); | ||
| 1059 | |||
| 1048 | if (old_thread->tar != new_thread->tar) | 1060 | if (old_thread->tar != new_thread->tar) |
| 1049 | mtspr(SPRN_TAR, new_thread->tar); | 1061 | mtspr(SPRN_TAR, new_thread->tar); |
| 1050 | } | 1062 | } |
| 1063 | |||
| 1064 | if (cpu_has_feature(CPU_FTR_ARCH_300)) { | ||
| 1065 | /* Conditionally restore Load Monitor registers, if enabled */ | ||
| 1066 | if (new_thread->fscr & FSCR_LM) { | ||
| 1067 | if (old_thread->lmrr != new_thread->lmrr) | ||
| 1068 | mtspr(SPRN_LMRR, new_thread->lmrr); | ||
| 1069 | if (old_thread->lmser != new_thread->lmser) | ||
| 1070 | mtspr(SPRN_LMSER, new_thread->lmser); | ||
| 1071 | } | ||
| 1072 | } | ||
| 1051 | #endif | 1073 | #endif |
| 1052 | } | 1074 | } |
| 1053 | 1075 | ||
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c index 946e34ffeae9..bae3db791150 100644 --- a/arch/powerpc/kernel/prom.c +++ b/arch/powerpc/kernel/prom.c | |||
| @@ -56,6 +56,8 @@ | |||
| 56 | #include <asm/opal.h> | 56 | #include <asm/opal.h> |
| 57 | #include <asm/fadump.h> | 57 | #include <asm/fadump.h> |
| 58 | #include <asm/debug.h> | 58 | #include <asm/debug.h> |
| 59 | #include <asm/epapr_hcalls.h> | ||
| 60 | #include <asm/firmware.h> | ||
| 59 | 61 | ||
| 60 | #include <mm/mmu_decl.h> | 62 | #include <mm/mmu_decl.h> |
| 61 | 63 | ||
| @@ -645,6 +647,14 @@ static void __init early_reserve_mem(void) | |||
| 645 | #endif | 647 | #endif |
| 646 | } | 648 | } |
| 647 | 649 | ||
| 650 | static bool disable_radix; | ||
| 651 | static int __init parse_disable_radix(char *p) | ||
| 652 | { | ||
| 653 | disable_radix = true; | ||
| 654 | return 0; | ||
| 655 | } | ||
| 656 | early_param("disable_radix", parse_disable_radix); | ||
| 657 | |||
| 648 | void __init early_init_devtree(void *params) | 658 | void __init early_init_devtree(void *params) |
| 649 | { | 659 | { |
| 650 | phys_addr_t limit; | 660 | phys_addr_t limit; |
| @@ -734,11 +744,26 @@ void __init early_init_devtree(void *params) | |||
| 734 | */ | 744 | */ |
| 735 | spinning_secondaries = boot_cpu_count - 1; | 745 | spinning_secondaries = boot_cpu_count - 1; |
| 736 | #endif | 746 | #endif |
| 747 | /* | ||
| 748 | * now fixup radix MMU mode based on kernel command line | ||
| 749 | */ | ||
| 750 | if (disable_radix) | ||
| 751 | cur_cpu_spec->mmu_features &= ~MMU_FTR_RADIX; | ||
| 737 | 752 | ||
| 738 | #ifdef CONFIG_PPC_POWERNV | 753 | #ifdef CONFIG_PPC_POWERNV |
| 739 | /* Scan and build the list of machine check recoverable ranges */ | 754 | /* Scan and build the list of machine check recoverable ranges */ |
| 740 | of_scan_flat_dt(early_init_dt_scan_recoverable_ranges, NULL); | 755 | of_scan_flat_dt(early_init_dt_scan_recoverable_ranges, NULL); |
| 741 | #endif | 756 | #endif |
| 757 | epapr_paravirt_early_init(); | ||
| 758 | |||
| 759 | /* Now try to figure out if we are running on LPAR and so on */ | ||
| 760 | pseries_probe_fw_features(); | ||
| 761 | |||
| 762 | #ifdef CONFIG_PPC_PS3 | ||
| 763 | /* Identify PS3 firmware */ | ||
| 764 | if (of_flat_dt_is_compatible(of_get_flat_dt_root(), "sony,ps3")) | ||
| 765 | powerpc_firmware_features |= FW_FEATURE_PS3_POSSIBLE; | ||
| 766 | #endif | ||
| 742 | 767 | ||
| 743 | DBG(" <- early_init_devtree()\n"); | 768 | DBG(" <- early_init_devtree()\n"); |
| 744 | } | 769 | } |
diff --git a/arch/powerpc/kernel/rtas-proc.c b/arch/powerpc/kernel/rtas-proc.c index fb2fb3ea85e5..c82eed97bd22 100644 --- a/arch/powerpc/kernel/rtas-proc.c +++ b/arch/powerpc/kernel/rtas-proc.c | |||
| @@ -698,7 +698,7 @@ static void check_location(struct seq_file *m, const char *c) | |||
| 698 | /* | 698 | /* |
| 699 | * Format: | 699 | * Format: |
| 700 | * ${LETTER}${NUMBER}[[-/]${LETTER}${NUMBER} [ ... ] ] | 700 | * ${LETTER}${NUMBER}[[-/]${LETTER}${NUMBER} [ ... ] ] |
| 701 | * the '.' may be an abbrevation | 701 | * the '.' may be an abbreviation |
| 702 | */ | 702 | */ |
| 703 | static void check_location_string(struct seq_file *m, const char *c) | 703 | static void check_location_string(struct seq_file *m, const char *c) |
| 704 | { | 704 | { |
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c index 28736ff27fea..6a3e5de544ce 100644 --- a/arch/powerpc/kernel/rtas.c +++ b/arch/powerpc/kernel/rtas.c | |||
| @@ -685,7 +685,7 @@ int rtas_set_indicator_fast(int indicator, int index, int new_value) | |||
| 685 | return rc; | 685 | return rc; |
| 686 | } | 686 | } |
| 687 | 687 | ||
| 688 | void rtas_restart(char *cmd) | 688 | void __noreturn rtas_restart(char *cmd) |
| 689 | { | 689 | { |
| 690 | if (rtas_flash_term_hook) | 690 | if (rtas_flash_term_hook) |
| 691 | rtas_flash_term_hook(SYS_RESTART); | 691 | rtas_flash_term_hook(SYS_RESTART); |
| @@ -704,7 +704,7 @@ void rtas_power_off(void) | |||
| 704 | for (;;); | 704 | for (;;); |
| 705 | } | 705 | } |
| 706 | 706 | ||
| 707 | void rtas_halt(void) | 707 | void __noreturn rtas_halt(void) |
| 708 | { | 708 | { |
| 709 | if (rtas_flash_term_hook) | 709 | if (rtas_flash_term_hook) |
| 710 | rtas_flash_term_hook(SYS_HALT); | 710 | rtas_flash_term_hook(SYS_HALT); |
| @@ -1070,7 +1070,7 @@ asmlinkage int ppc_rtas(struct rtas_args __user *uargs) | |||
| 1070 | nret = be32_to_cpu(args.nret); | 1070 | nret = be32_to_cpu(args.nret); |
| 1071 | token = be32_to_cpu(args.token); | 1071 | token = be32_to_cpu(args.token); |
| 1072 | 1072 | ||
| 1073 | if (nargs > ARRAY_SIZE(args.args) | 1073 | if (nargs >= ARRAY_SIZE(args.args) |
| 1074 | || nret > ARRAY_SIZE(args.args) | 1074 | || nret > ARRAY_SIZE(args.args) |
| 1075 | || nargs + nret > ARRAY_SIZE(args.args)) | 1075 | || nargs + nret > ARRAY_SIZE(args.args)) |
| 1076 | return -EINVAL; | 1076 | return -EINVAL; |
| @@ -1174,7 +1174,7 @@ void __init rtas_initialize(void) | |||
| 1174 | * the stop-self token if any | 1174 | * the stop-self token if any |
| 1175 | */ | 1175 | */ |
| 1176 | #ifdef CONFIG_PPC64 | 1176 | #ifdef CONFIG_PPC64 |
| 1177 | if (machine_is(pseries) && firmware_has_feature(FW_FEATURE_LPAR)) { | 1177 | if (firmware_has_feature(FW_FEATURE_LPAR)) { |
| 1178 | rtas_region = min(ppc64_rma_size, RTAS_INSTANTIATE_MAX); | 1178 | rtas_region = min(ppc64_rma_size, RTAS_INSTANTIATE_MAX); |
| 1179 | ibm_suspend_me_token = rtas_token("ibm,suspend-me"); | 1179 | ibm_suspend_me_token = rtas_token("ibm,suspend-me"); |
| 1180 | } | 1180 | } |
diff --git a/arch/powerpc/kernel/rtasd.c b/arch/powerpc/kernel/rtasd.c index c638e2487a9c..a26a02006576 100644 --- a/arch/powerpc/kernel/rtasd.c +++ b/arch/powerpc/kernel/rtasd.c | |||
| @@ -483,7 +483,7 @@ static void rtas_event_scan(struct work_struct *w) | |||
| 483 | } | 483 | } |
| 484 | 484 | ||
| 485 | #ifdef CONFIG_PPC64 | 485 | #ifdef CONFIG_PPC64 |
| 486 | static void retreive_nvram_error_log(void) | 486 | static void retrieve_nvram_error_log(void) |
| 487 | { | 487 | { |
| 488 | unsigned int err_type ; | 488 | unsigned int err_type ; |
| 489 | int rc ; | 489 | int rc ; |
| @@ -501,7 +501,7 @@ static void retreive_nvram_error_log(void) | |||
| 501 | } | 501 | } |
| 502 | } | 502 | } |
| 503 | #else /* CONFIG_PPC64 */ | 503 | #else /* CONFIG_PPC64 */ |
| 504 | static void retreive_nvram_error_log(void) | 504 | static void retrieve_nvram_error_log(void) |
| 505 | { | 505 | { |
| 506 | } | 506 | } |
| 507 | #endif /* CONFIG_PPC64 */ | 507 | #endif /* CONFIG_PPC64 */ |
| @@ -513,7 +513,7 @@ static void start_event_scan(void) | |||
| 513 | (30000 / rtas_event_scan_rate)); | 513 | (30000 / rtas_event_scan_rate)); |
| 514 | 514 | ||
| 515 | /* Retrieve errors from nvram if any */ | 515 | /* Retrieve errors from nvram if any */ |
| 516 | retreive_nvram_error_log(); | 516 | retrieve_nvram_error_log(); |
| 517 | 517 | ||
| 518 | schedule_delayed_work_on(cpumask_first(cpu_online_mask), | 518 | schedule_delayed_work_on(cpumask_first(cpu_online_mask), |
| 519 | &event_scan_work, event_scan_delay); | 519 | &event_scan_work, event_scan_delay); |
| @@ -526,10 +526,8 @@ void rtas_cancel_event_scan(void) | |||
| 526 | } | 526 | } |
| 527 | EXPORT_SYMBOL_GPL(rtas_cancel_event_scan); | 527 | EXPORT_SYMBOL_GPL(rtas_cancel_event_scan); |
| 528 | 528 | ||
| 529 | static int __init rtas_init(void) | 529 | static int __init rtas_event_scan_init(void) |
| 530 | { | 530 | { |
| 531 | struct proc_dir_entry *entry; | ||
| 532 | |||
| 533 | if (!machine_is(pseries) && !machine_is(chrp)) | 531 | if (!machine_is(pseries) && !machine_is(chrp)) |
| 534 | return 0; | 532 | return 0; |
| 535 | 533 | ||
| @@ -562,13 +560,27 @@ static int __init rtas_init(void) | |||
| 562 | return -ENOMEM; | 560 | return -ENOMEM; |
| 563 | } | 561 | } |
| 564 | 562 | ||
| 563 | start_event_scan(); | ||
| 564 | |||
| 565 | return 0; | ||
| 566 | } | ||
| 567 | arch_initcall(rtas_event_scan_init); | ||
| 568 | |||
| 569 | static int __init rtas_init(void) | ||
| 570 | { | ||
| 571 | struct proc_dir_entry *entry; | ||
| 572 | |||
| 573 | if (!machine_is(pseries) && !machine_is(chrp)) | ||
| 574 | return 0; | ||
| 575 | |||
| 576 | if (!rtas_log_buf) | ||
| 577 | return -ENODEV; | ||
| 578 | |||
| 565 | entry = proc_create("powerpc/rtas/error_log", S_IRUSR, NULL, | 579 | entry = proc_create("powerpc/rtas/error_log", S_IRUSR, NULL, |
| 566 | &proc_rtas_log_operations); | 580 | &proc_rtas_log_operations); |
| 567 | if (!entry) | 581 | if (!entry) |
| 568 | printk(KERN_ERR "Failed to create error_log proc entry\n"); | 582 | printk(KERN_ERR "Failed to create error_log proc entry\n"); |
| 569 | 583 | ||
| 570 | start_event_scan(); | ||
| 571 | |||
| 572 | return 0; | 584 | return 0; |
| 573 | } | 585 | } |
| 574 | __initcall(rtas_init); | 586 | __initcall(rtas_init); |
diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c index 8ca79b7503d8..714b4ba7ab86 100644 --- a/arch/powerpc/kernel/setup-common.c +++ b/arch/powerpc/kernel/setup-common.c | |||
| @@ -35,6 +35,7 @@ | |||
| 35 | #include <linux/percpu.h> | 35 | #include <linux/percpu.h> |
| 36 | #include <linux/memblock.h> | 36 | #include <linux/memblock.h> |
| 37 | #include <linux/of_platform.h> | 37 | #include <linux/of_platform.h> |
| 38 | #include <linux/hugetlb.h> | ||
| 38 | #include <asm/io.h> | 39 | #include <asm/io.h> |
| 39 | #include <asm/paca.h> | 40 | #include <asm/paca.h> |
| 40 | #include <asm/prom.h> | 41 | #include <asm/prom.h> |
| @@ -61,6 +62,12 @@ | |||
| 61 | #include <asm/cputhreads.h> | 62 | #include <asm/cputhreads.h> |
| 62 | #include <mm/mmu_decl.h> | 63 | #include <mm/mmu_decl.h> |
| 63 | #include <asm/fadump.h> | 64 | #include <asm/fadump.h> |
| 65 | #include <asm/udbg.h> | ||
| 66 | #include <asm/hugetlb.h> | ||
| 67 | #include <asm/livepatch.h> | ||
| 68 | #include <asm/mmu_context.h> | ||
| 69 | |||
| 70 | #include "setup.h" | ||
| 64 | 71 | ||
| 65 | #ifdef DEBUG | 72 | #ifdef DEBUG |
| 66 | #include <asm/udbg.h> | 73 | #include <asm/udbg.h> |
| @@ -494,7 +501,7 @@ void __init smp_setup_cpu_maps(void) | |||
| 494 | * On pSeries LPAR, we need to know how many cpus | 501 | * On pSeries LPAR, we need to know how many cpus |
| 495 | * could possibly be added to this partition. | 502 | * could possibly be added to this partition. |
| 496 | */ | 503 | */ |
| 497 | if (machine_is(pseries) && firmware_has_feature(FW_FEATURE_LPAR) && | 504 | if (firmware_has_feature(FW_FEATURE_LPAR) && |
| 498 | (dn = of_find_node_by_path("/rtas"))) { | 505 | (dn = of_find_node_by_path("/rtas"))) { |
| 499 | int num_addr_cell, num_size_cell, maxcpus; | 506 | int num_addr_cell, num_size_cell, maxcpus; |
| 500 | const __be32 *ireg; | 507 | const __be32 *ireg; |
| @@ -575,6 +582,7 @@ void probe_machine(void) | |||
| 575 | { | 582 | { |
| 576 | extern struct machdep_calls __machine_desc_start; | 583 | extern struct machdep_calls __machine_desc_start; |
| 577 | extern struct machdep_calls __machine_desc_end; | 584 | extern struct machdep_calls __machine_desc_end; |
| 585 | unsigned int i; | ||
| 578 | 586 | ||
| 579 | /* | 587 | /* |
| 580 | * Iterate all ppc_md structures until we find the proper | 588 | * Iterate all ppc_md structures until we find the proper |
| @@ -582,6 +590,17 @@ void probe_machine(void) | |||
| 582 | */ | 590 | */ |
| 583 | DBG("Probing machine type ...\n"); | 591 | DBG("Probing machine type ...\n"); |
| 584 | 592 | ||
| 593 | /* | ||
| 594 | * Check ppc_md is empty, if not we have a bug, ie, we setup an | ||
| 595 | * entry before probe_machine() which will be overwritten | ||
| 596 | */ | ||
| 597 | for (i = 0; i < (sizeof(ppc_md) / sizeof(void *)); i++) { | ||
| 598 | if (((void **)&ppc_md)[i]) { | ||
| 599 | printk(KERN_ERR "Entry %d in ppc_md non empty before" | ||
| 600 | " machine probe !\n", i); | ||
| 601 | } | ||
| 602 | } | ||
| 603 | |||
| 585 | for (machine_id = &__machine_desc_start; | 604 | for (machine_id = &__machine_desc_start; |
| 586 | machine_id < &__machine_desc_end; | 605 | machine_id < &__machine_desc_end; |
| 587 | machine_id++) { | 606 | machine_id++) { |
| @@ -676,6 +695,8 @@ static struct notifier_block ppc_panic_block = { | |||
| 676 | 695 | ||
| 677 | void __init setup_panic(void) | 696 | void __init setup_panic(void) |
| 678 | { | 697 | { |
| 698 | if (!ppc_md.panic) | ||
| 699 | return; | ||
| 679 | atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block); | 700 | atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block); |
| 680 | } | 701 | } |
| 681 | 702 | ||
| @@ -744,3 +765,169 @@ void arch_setup_pdev_archdata(struct platform_device *pdev) | |||
| 744 | pdev->dev.dma_mask = &pdev->archdata.dma_mask; | 765 | pdev->dev.dma_mask = &pdev->archdata.dma_mask; |
| 745 | set_dma_ops(&pdev->dev, &dma_direct_ops); | 766 | set_dma_ops(&pdev->dev, &dma_direct_ops); |
| 746 | } | 767 | } |
| 768 | |||
| 769 | static __init void print_system_info(void) | ||
| 770 | { | ||
| 771 | pr_info("-----------------------------------------------------\n"); | ||
| 772 | #ifdef CONFIG_PPC_STD_MMU_64 | ||
| 773 | pr_info("ppc64_pft_size = 0x%llx\n", ppc64_pft_size); | ||
| 774 | #endif | ||
| 775 | #ifdef CONFIG_PPC_STD_MMU_32 | ||
| 776 | pr_info("Hash_size = 0x%lx\n", Hash_size); | ||
| 777 | #endif | ||
| 778 | pr_info("phys_mem_size = 0x%llx\n", | ||
| 779 | (unsigned long long)memblock_phys_mem_size()); | ||
| 780 | |||
| 781 | pr_info("dcache_bsize = 0x%x\n", dcache_bsize); | ||
| 782 | pr_info("icache_bsize = 0x%x\n", icache_bsize); | ||
| 783 | if (ucache_bsize != 0) | ||
| 784 | pr_info("ucache_bsize = 0x%x\n", ucache_bsize); | ||
| 785 | |||
| 786 | pr_info("cpu_features = 0x%016lx\n", cur_cpu_spec->cpu_features); | ||
| 787 | pr_info(" possible = 0x%016lx\n", | ||
| 788 | (unsigned long)CPU_FTRS_POSSIBLE); | ||
| 789 | pr_info(" always = 0x%016lx\n", | ||
| 790 | (unsigned long)CPU_FTRS_ALWAYS); | ||
| 791 | pr_info("cpu_user_features = 0x%08x 0x%08x\n", | ||
| 792 | cur_cpu_spec->cpu_user_features, | ||
| 793 | cur_cpu_spec->cpu_user_features2); | ||
| 794 | pr_info("mmu_features = 0x%08x\n", cur_cpu_spec->mmu_features); | ||
| 795 | #ifdef CONFIG_PPC64 | ||
| 796 | pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features); | ||
| 797 | #endif | ||
| 798 | |||
| 799 | #ifdef CONFIG_PPC_STD_MMU_64 | ||
| 800 | if (htab_address) | ||
| 801 | pr_info("htab_address = 0x%p\n", htab_address); | ||
| 802 | if (htab_hash_mask) | ||
| 803 | pr_info("htab_hash_mask = 0x%lx\n", htab_hash_mask); | ||
| 804 | #endif | ||
| 805 | #ifdef CONFIG_PPC_STD_MMU_32 | ||
| 806 | if (Hash) | ||
| 807 | pr_info("Hash = 0x%p\n", Hash); | ||
| 808 | if (Hash_mask) | ||
| 809 | pr_info("Hash_mask = 0x%lx\n", Hash_mask); | ||
| 810 | #endif | ||
| 811 | |||
| 812 | if (PHYSICAL_START > 0) | ||
| 813 | pr_info("physical_start = 0x%llx\n", | ||
| 814 | (unsigned long long)PHYSICAL_START); | ||
| 815 | pr_info("-----------------------------------------------------\n"); | ||
| 816 | } | ||
| 817 | |||
| 818 | /* | ||
| 819 | * Called into from start_kernel this initializes memblock, which is used | ||
| 820 | * to manage page allocation until mem_init is called. | ||
| 821 | */ | ||
| 822 | void __init setup_arch(char **cmdline_p) | ||
| 823 | { | ||
| 824 | *cmdline_p = boot_command_line; | ||
| 825 | |||
| 826 | /* Set a half-reasonable default so udelay does something sensible */ | ||
| 827 | loops_per_jiffy = 500000000 / HZ; | ||
| 828 | |||
| 829 | /* Unflatten the device-tree passed by prom_init or kexec */ | ||
| 830 | unflatten_device_tree(); | ||
| 831 | |||
| 832 | /* | ||
| 833 | * Initialize cache line/block info from device-tree (on ppc64) or | ||
| 834 | * just cputable (on ppc32). | ||
| 835 | */ | ||
| 836 | initialize_cache_info(); | ||
| 837 | |||
| 838 | /* Initialize RTAS if available. */ | ||
| 839 | rtas_initialize(); | ||
| 840 | |||
| 841 | /* Check if we have an initrd provided via the device-tree. */ | ||
| 842 | check_for_initrd(); | ||
| 843 | |||
| 844 | /* Probe the machine type, establish ppc_md. */ | ||
| 845 | probe_machine(); | ||
| 846 | |||
| 847 | /* Setup panic notifier if requested by the platform. */ | ||
| 848 | setup_panic(); | ||
| 849 | |||
| 850 | /* | ||
| 851 | * Configure ppc_md.power_save (ppc32 only, 64-bit machines do | ||
| 852 | * it from their respective probe() function. | ||
| 853 | */ | ||
| 854 | setup_power_save(); | ||
| 855 | |||
| 856 | /* Discover standard serial ports. */ | ||
| 857 | find_legacy_serial_ports(); | ||
| 858 | |||
| 859 | /* Register early console with the printk subsystem. */ | ||
| 860 | register_early_udbg_console(); | ||
| 861 | |||
| 862 | /* Setup the various CPU maps based on the device-tree. */ | ||
| 863 | smp_setup_cpu_maps(); | ||
| 864 | |||
| 865 | /* Initialize xmon. */ | ||
| 866 | xmon_setup(); | ||
| 867 | |||
| 868 | /* Check the SMT related command line arguments (ppc64). */ | ||
| 869 | check_smt_enabled(); | ||
| 870 | |||
| 871 | /* On BookE, setup per-core TLB data structures. */ | ||
| 872 | setup_tlb_core_data(); | ||
| 873 | |||
| 874 | /* | ||
| 875 | * Release secondary cpus out of their spinloops at 0x60 now that | ||
| 876 | * we can map physical -> logical CPU ids. | ||
| 877 | * | ||
| 878 | * Freescale Book3e parts spin in a loop provided by firmware, | ||
| 879 | * so smp_release_cpus() does nothing for them. | ||
| 880 | */ | ||
| 881 | #ifdef CONFIG_SMP | ||
| 882 | smp_release_cpus(); | ||
| 883 | #endif | ||
| 884 | |||
| 885 | /* Print various info about the machine that has been gathered so far. */ | ||
| 886 | print_system_info(); | ||
| 887 | |||
| 888 | /* Reserve large chunks of memory for use by CMA for KVM. */ | ||
| 889 | kvm_cma_reserve(); | ||
| 890 | |||
| 891 | /* | ||
| 892 | * Reserve any gigantic pages requested on the command line. | ||
| 893 | * memblock needs to have been initialized by the time this is | ||
| 894 | * called since this will reserve memory. | ||
| 895 | */ | ||
| 896 | reserve_hugetlb_gpages(); | ||
| 897 | |||
| 898 | klp_init_thread_info(&init_thread_info); | ||
| 899 | |||
| 900 | init_mm.start_code = (unsigned long)_stext; | ||
| 901 | init_mm.end_code = (unsigned long) _etext; | ||
| 902 | init_mm.end_data = (unsigned long) _edata; | ||
| 903 | init_mm.brk = klimit; | ||
| 904 | #ifdef CONFIG_PPC_64K_PAGES | ||
| 905 | init_mm.context.pte_frag = NULL; | ||
| 906 | #endif | ||
| 907 | #ifdef CONFIG_SPAPR_TCE_IOMMU | ||
| 908 | mm_iommu_init(&init_mm.context); | ||
| 909 | #endif | ||
| 910 | irqstack_early_init(); | ||
| 911 | exc_lvl_early_init(); | ||
| 912 | emergency_stack_init(); | ||
| 913 | |||
| 914 | initmem_init(); | ||
| 915 | |||
| 916 | #ifdef CONFIG_DUMMY_CONSOLE | ||
| 917 | conswitchp = &dummy_con; | ||
| 918 | #endif | ||
| 919 | if (ppc_md.setup_arch) | ||
| 920 | ppc_md.setup_arch(); | ||
| 921 | |||
| 922 | paging_init(); | ||
| 923 | |||
| 924 | /* Initialize the MMU context management stuff. */ | ||
| 925 | mmu_context_init(); | ||
| 926 | |||
| 927 | #ifdef CONFIG_PPC64 | ||
| 928 | /* Interrupt code needs to be 64K-aligned. */ | ||
| 929 | if ((unsigned long)_stext & 0xffff) | ||
| 930 | panic("Kernelbase not 64K-aligned (0x%lx)!\n", | ||
| 931 | (unsigned long)_stext); | ||
| 932 | #endif | ||
| 933 | } | ||
diff --git a/arch/powerpc/kernel/setup.h b/arch/powerpc/kernel/setup.h new file mode 100644 index 000000000000..cfba134b3024 --- /dev/null +++ b/arch/powerpc/kernel/setup.h | |||
| @@ -0,0 +1,58 @@ | |||
| 1 | /* | ||
| 2 | * Prototypes for functions that are shared between setup_(32|64|common).c | ||
| 3 | * | ||
| 4 | * Copyright 2016 Michael Ellerman, IBM Corporation. | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or | ||
| 7 | * modify it under the terms of the GNU General Public License | ||
| 8 | * as published by the Free Software Foundation; either version | ||
| 9 | * 2 of the License, or (at your option) any later version. | ||
| 10 | */ | ||
| 11 | |||
| 12 | #ifndef __ARCH_POWERPC_KERNEL_SETUP_H | ||
| 13 | #define __ARCH_POWERPC_KERNEL_SETUP_H | ||
| 14 | |||
| 15 | void initialize_cache_info(void); | ||
| 16 | void irqstack_early_init(void); | ||
| 17 | |||
| 18 | #ifdef CONFIG_PPC32 | ||
| 19 | void setup_power_save(void); | ||
| 20 | #else | ||
| 21 | static inline void setup_power_save(void) { }; | ||
| 22 | #endif | ||
| 23 | |||
| 24 | #if defined(CONFIG_PPC64) && defined(CONFIG_SMP) | ||
| 25 | void check_smt_enabled(void); | ||
| 26 | #else | ||
| 27 | static inline void check_smt_enabled(void) { }; | ||
| 28 | #endif | ||
| 29 | |||
| 30 | #if defined(CONFIG_PPC_BOOK3E) && defined(CONFIG_SMP) | ||
| 31 | void setup_tlb_core_data(void); | ||
| 32 | #else | ||
| 33 | static inline void setup_tlb_core_data(void) { }; | ||
| 34 | #endif | ||
| 35 | |||
| 36 | #if defined(CONFIG_PPC_BOOK3E) || defined(CONFIG_BOOKE) || defined(CONFIG_40x) | ||
| 37 | void exc_lvl_early_init(void); | ||
| 38 | #else | ||
| 39 | static inline void exc_lvl_early_init(void) { }; | ||
| 40 | #endif | ||
| 41 | |||
| 42 | #ifdef CONFIG_PPC64 | ||
| 43 | void emergency_stack_init(void); | ||
| 44 | #else | ||
| 45 | static inline void emergency_stack_init(void) { }; | ||
| 46 | #endif | ||
| 47 | |||
| 48 | /* | ||
| 49 | * Having this in kvm_ppc.h makes include dependencies too | ||
| 50 | * tricky to solve for setup-common.c so have it here. | ||
| 51 | */ | ||
| 52 | #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE | ||
| 53 | void kvm_cma_reserve(void); | ||
| 54 | #else | ||
| 55 | static inline void kvm_cma_reserve(void) { }; | ||
| 56 | #endif | ||
| 57 | |||
| 58 | #endif /* __ARCH_POWERPC_KERNEL_SETUP_H */ | ||
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c index d544fa311757..00f57754407e 100644 --- a/arch/powerpc/kernel/setup_32.c +++ b/arch/powerpc/kernel/setup_32.c | |||
| @@ -36,8 +36,6 @@ | |||
| 36 | #include <asm/time.h> | 36 | #include <asm/time.h> |
| 37 | #include <asm/serial.h> | 37 | #include <asm/serial.h> |
| 38 | #include <asm/udbg.h> | 38 | #include <asm/udbg.h> |
| 39 | #include <asm/mmu_context.h> | ||
| 40 | #include <asm/epapr_hcalls.h> | ||
| 41 | #include <asm/code-patching.h> | 39 | #include <asm/code-patching.h> |
| 42 | 40 | ||
| 43 | #define DBG(fmt...) | 41 | #define DBG(fmt...) |
| @@ -62,9 +60,7 @@ int icache_bsize; | |||
| 62 | int ucache_bsize; | 60 | int ucache_bsize; |
| 63 | 61 | ||
| 64 | /* | 62 | /* |
| 65 | * We're called here very early in the boot. We determine the machine | 63 | * We're called here very early in the boot. |
| 66 | * type and call the appropriate low-level setup functions. | ||
| 67 | * -- Cort <cort@fsmlabs.com> | ||
| 68 | * | 64 | * |
| 69 | * Note that the kernel may be running at an address which is different | 65 | * Note that the kernel may be running at an address which is different |
| 70 | * from the address that it was linked at, so we must use RELOC/PTRRELOC | 66 | * from the address that it was linked at, so we must use RELOC/PTRRELOC |
| @@ -73,7 +69,6 @@ int ucache_bsize; | |||
| 73 | notrace unsigned long __init early_init(unsigned long dt_ptr) | 69 | notrace unsigned long __init early_init(unsigned long dt_ptr) |
| 74 | { | 70 | { |
| 75 | unsigned long offset = reloc_offset(); | 71 | unsigned long offset = reloc_offset(); |
| 76 | struct cpu_spec *spec; | ||
| 77 | 72 | ||
| 78 | /* First zero the BSS -- use memset_io, some platforms don't have | 73 | /* First zero the BSS -- use memset_io, some platforms don't have |
| 79 | * caches on yet */ | 74 | * caches on yet */ |
| @@ -84,27 +79,19 @@ notrace unsigned long __init early_init(unsigned long dt_ptr) | |||
| 84 | * Identify the CPU type and fix up code sections | 79 | * Identify the CPU type and fix up code sections |
| 85 | * that depend on which cpu we have. | 80 | * that depend on which cpu we have. |
| 86 | */ | 81 | */ |
| 87 | spec = identify_cpu(offset, mfspr(SPRN_PVR)); | 82 | identify_cpu(offset, mfspr(SPRN_PVR)); |
| 88 | 83 | ||
| 89 | do_feature_fixups(spec->cpu_features, | 84 | apply_feature_fixups(); |
| 90 | PTRRELOC(&__start___ftr_fixup), | ||
| 91 | PTRRELOC(&__stop___ftr_fixup)); | ||
| 92 | |||
| 93 | do_feature_fixups(spec->mmu_features, | ||
| 94 | PTRRELOC(&__start___mmu_ftr_fixup), | ||
| 95 | PTRRELOC(&__stop___mmu_ftr_fixup)); | ||
| 96 | |||
| 97 | do_lwsync_fixups(spec->cpu_features, | ||
| 98 | PTRRELOC(&__start___lwsync_fixup), | ||
| 99 | PTRRELOC(&__stop___lwsync_fixup)); | ||
| 100 | |||
| 101 | do_final_fixups(); | ||
| 102 | 85 | ||
| 103 | return KERNELBASE + offset; | 86 | return KERNELBASE + offset; |
| 104 | } | 87 | } |
| 105 | 88 | ||
| 106 | 89 | ||
| 107 | /* | 90 | /* |
| 91 | * This is run before start_kernel(), the kernel has been relocated | ||
| 92 | * and we are running with enough of the MMU enabled to have our | ||
| 93 | * proper kernel virtual addresses | ||
| 94 | * | ||
| 108 | * Find out what kind of machine we're on and save any data we need | 95 | * Find out what kind of machine we're on and save any data we need |
| 109 | * from the early boot process (devtree is copied on pmac by prom_init()). | 96 | * from the early boot process (devtree is copied on pmac by prom_init()). |
| 110 | * This is called very early on the boot process, after a minimal | 97 | * This is called very early on the boot process, after a minimal |
| @@ -123,27 +110,9 @@ notrace void __init machine_init(u64 dt_ptr) | |||
| 123 | /* Do some early initialization based on the flat device tree */ | 110 | /* Do some early initialization based on the flat device tree */ |
| 124 | early_init_devtree(__va(dt_ptr)); | 111 | early_init_devtree(__va(dt_ptr)); |
| 125 | 112 | ||
| 126 | epapr_paravirt_early_init(); | ||
| 127 | |||
| 128 | early_init_mmu(); | 113 | early_init_mmu(); |
| 129 | 114 | ||
| 130 | probe_machine(); | ||
| 131 | |||
| 132 | setup_kdump_trampoline(); | 115 | setup_kdump_trampoline(); |
| 133 | |||
| 134 | #ifdef CONFIG_6xx | ||
| 135 | if (cpu_has_feature(CPU_FTR_CAN_DOZE) || | ||
| 136 | cpu_has_feature(CPU_FTR_CAN_NAP)) | ||
| 137 | ppc_md.power_save = ppc6xx_idle; | ||
| 138 | #endif | ||
| 139 | |||
| 140 | #ifdef CONFIG_E500 | ||
| 141 | if (cpu_has_feature(CPU_FTR_CAN_DOZE) || | ||
| 142 | cpu_has_feature(CPU_FTR_CAN_NAP)) | ||
| 143 | ppc_md.power_save = e500_idle; | ||
| 144 | #endif | ||
| 145 | if (ppc_md.progress) | ||
| 146 | ppc_md.progress("id mach(): done", 0x200); | ||
| 147 | } | 116 | } |
| 148 | 117 | ||
| 149 | /* Checks "l2cr=xxxx" command-line option */ | 118 | /* Checks "l2cr=xxxx" command-line option */ |
| @@ -221,7 +190,7 @@ int __init ppc_init(void) | |||
| 221 | 190 | ||
| 222 | arch_initcall(ppc_init); | 191 | arch_initcall(ppc_init); |
| 223 | 192 | ||
| 224 | static void __init irqstack_early_init(void) | 193 | void __init irqstack_early_init(void) |
| 225 | { | 194 | { |
| 226 | unsigned int i; | 195 | unsigned int i; |
| 227 | 196 | ||
| @@ -236,7 +205,7 @@ static void __init irqstack_early_init(void) | |||
| 236 | } | 205 | } |
| 237 | 206 | ||
| 238 | #if defined(CONFIG_BOOKE) || defined(CONFIG_40x) | 207 | #if defined(CONFIG_BOOKE) || defined(CONFIG_40x) |
| 239 | static void __init exc_lvl_early_init(void) | 208 | void __init exc_lvl_early_init(void) |
| 240 | { | 209 | { |
| 241 | unsigned int i, hw_cpu; | 210 | unsigned int i, hw_cpu; |
| 242 | 211 | ||
| @@ -259,33 +228,25 @@ static void __init exc_lvl_early_init(void) | |||
| 259 | #endif | 228 | #endif |
| 260 | } | 229 | } |
| 261 | } | 230 | } |
| 262 | #else | ||
| 263 | #define exc_lvl_early_init() | ||
| 264 | #endif | 231 | #endif |
| 265 | 232 | ||
| 266 | /* Warning, IO base is not yet inited */ | 233 | void __init setup_power_save(void) |
| 267 | void __init setup_arch(char **cmdline_p) | ||
| 268 | { | 234 | { |
| 269 | *cmdline_p = boot_command_line; | 235 | #ifdef CONFIG_6xx |
| 270 | 236 | if (cpu_has_feature(CPU_FTR_CAN_DOZE) || | |
| 271 | /* so udelay does something sensible, assume <= 1000 bogomips */ | 237 | cpu_has_feature(CPU_FTR_CAN_NAP)) |
| 272 | loops_per_jiffy = 500000000 / HZ; | 238 | ppc_md.power_save = ppc6xx_idle; |
| 273 | 239 | #endif | |
| 274 | unflatten_device_tree(); | ||
| 275 | check_for_initrd(); | ||
| 276 | |||
| 277 | if (ppc_md.init_early) | ||
| 278 | ppc_md.init_early(); | ||
| 279 | |||
| 280 | find_legacy_serial_ports(); | ||
| 281 | |||
| 282 | smp_setup_cpu_maps(); | ||
| 283 | |||
| 284 | /* Register early console */ | ||
| 285 | register_early_udbg_console(); | ||
| 286 | 240 | ||
| 287 | xmon_setup(); | 241 | #ifdef CONFIG_E500 |
| 242 | if (cpu_has_feature(CPU_FTR_CAN_DOZE) || | ||
| 243 | cpu_has_feature(CPU_FTR_CAN_NAP)) | ||
| 244 | ppc_md.power_save = e500_idle; | ||
| 245 | #endif | ||
| 246 | } | ||
| 288 | 247 | ||
| 248 | __init void initialize_cache_info(void) | ||
| 249 | { | ||
| 289 | /* | 250 | /* |
| 290 | * Set cache line size based on type of cpu as a default. | 251 | * Set cache line size based on type of cpu as a default. |
| 291 | * Systems with OF can look in the properties on the cpu node(s) | 252 | * Systems with OF can look in the properties on the cpu node(s) |
| @@ -296,32 +257,4 @@ void __init setup_arch(char **cmdline_p) | |||
| 296 | ucache_bsize = 0; | 257 | ucache_bsize = 0; |
| 297 | if (cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE)) | 258 | if (cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE)) |
| 298 | ucache_bsize = icache_bsize = dcache_bsize; | 259 | ucache_bsize = icache_bsize = dcache_bsize; |
| 299 | |||
| 300 | if (ppc_md.panic) | ||
| 301 | setup_panic(); | ||
| 302 | |||
| 303 | init_mm.start_code = (unsigned long)_stext; | ||
| 304 | init_mm.end_code = (unsigned long) _etext; | ||
| 305 | init_mm.end_data = (unsigned long) _edata; | ||
| 306 | init_mm.brk = klimit; | ||
| 307 | |||
| 308 | exc_lvl_early_init(); | ||
| 309 | |||
| 310 | irqstack_early_init(); | ||
| 311 | |||
| 312 | initmem_init(); | ||
| 313 | if ( ppc_md.progress ) ppc_md.progress("setup_arch: initmem", 0x3eab); | ||
| 314 | |||
| 315 | #ifdef CONFIG_DUMMY_CONSOLE | ||
| 316 | conswitchp = &dummy_con; | ||
| 317 | #endif | ||
| 318 | |||
| 319 | if (ppc_md.setup_arch) | ||
| 320 | ppc_md.setup_arch(); | ||
| 321 | if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab); | ||
| 322 | |||
| 323 | paging_init(); | ||
| 324 | |||
| 325 | /* Initialize the MMU context management stuff */ | ||
| 326 | mmu_context_init(); | ||
| 327 | } | 260 | } |
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c index 96d4a2b23d0f..d8216aed22b7 100644 --- a/arch/powerpc/kernel/setup_64.c +++ b/arch/powerpc/kernel/setup_64.c | |||
| @@ -35,7 +35,6 @@ | |||
| 35 | #include <linux/pci.h> | 35 | #include <linux/pci.h> |
| 36 | #include <linux/lockdep.h> | 36 | #include <linux/lockdep.h> |
| 37 | #include <linux/memblock.h> | 37 | #include <linux/memblock.h> |
| 38 | #include <linux/hugetlb.h> | ||
| 39 | #include <linux/memory.h> | 38 | #include <linux/memory.h> |
| 40 | #include <linux/nmi.h> | 39 | #include <linux/nmi.h> |
| 41 | 40 | ||
| @@ -64,12 +63,10 @@ | |||
| 64 | #include <asm/xmon.h> | 63 | #include <asm/xmon.h> |
| 65 | #include <asm/udbg.h> | 64 | #include <asm/udbg.h> |
| 66 | #include <asm/kexec.h> | 65 | #include <asm/kexec.h> |
| 67 | #include <asm/mmu_context.h> | ||
| 68 | #include <asm/code-patching.h> | 66 | #include <asm/code-patching.h> |
| 69 | #include <asm/kvm_ppc.h> | ||
| 70 | #include <asm/hugetlb.h> | ||
| 71 | #include <asm/epapr_hcalls.h> | ||
| 72 | #include <asm/livepatch.h> | 67 | #include <asm/livepatch.h> |
| 68 | #include <asm/opal.h> | ||
| 69 | #include <asm/cputhreads.h> | ||
| 73 | 70 | ||
| 74 | #ifdef DEBUG | 71 | #ifdef DEBUG |
| 75 | #define DBG(fmt...) udbg_printf(fmt) | 72 | #define DBG(fmt...) udbg_printf(fmt) |
| @@ -100,7 +97,7 @@ int icache_bsize; | |||
| 100 | int ucache_bsize; | 97 | int ucache_bsize; |
| 101 | 98 | ||
| 102 | #if defined(CONFIG_PPC_BOOK3E) && defined(CONFIG_SMP) | 99 | #if defined(CONFIG_PPC_BOOK3E) && defined(CONFIG_SMP) |
| 103 | static void setup_tlb_core_data(void) | 100 | void __init setup_tlb_core_data(void) |
| 104 | { | 101 | { |
| 105 | int cpu; | 102 | int cpu; |
| 106 | 103 | ||
| @@ -133,10 +130,6 @@ static void setup_tlb_core_data(void) | |||
| 133 | } | 130 | } |
| 134 | } | 131 | } |
| 135 | } | 132 | } |
| 136 | #else | ||
| 137 | static void setup_tlb_core_data(void) | ||
| 138 | { | ||
| 139 | } | ||
| 140 | #endif | 133 | #endif |
| 141 | 134 | ||
| 142 | #ifdef CONFIG_SMP | 135 | #ifdef CONFIG_SMP |
| @@ -144,7 +137,7 @@ static void setup_tlb_core_data(void) | |||
| 144 | static char *smt_enabled_cmdline; | 137 | static char *smt_enabled_cmdline; |
| 145 | 138 | ||
| 146 | /* Look for ibm,smt-enabled OF option */ | 139 | /* Look for ibm,smt-enabled OF option */ |
| 147 | static void check_smt_enabled(void) | 140 | void __init check_smt_enabled(void) |
| 148 | { | 141 | { |
| 149 | struct device_node *dn; | 142 | struct device_node *dn; |
| 150 | const char *smt_option; | 143 | const char *smt_option; |
| @@ -193,12 +186,10 @@ static int __init early_smt_enabled(char *p) | |||
| 193 | } | 186 | } |
| 194 | early_param("smt-enabled", early_smt_enabled); | 187 | early_param("smt-enabled", early_smt_enabled); |
| 195 | 188 | ||
| 196 | #else | ||
| 197 | #define check_smt_enabled() | ||
| 198 | #endif /* CONFIG_SMP */ | 189 | #endif /* CONFIG_SMP */ |
| 199 | 190 | ||
| 200 | /** Fix up paca fields required for the boot cpu */ | 191 | /** Fix up paca fields required for the boot cpu */ |
| 201 | static void fixup_boot_paca(void) | 192 | static void __init fixup_boot_paca(void) |
| 202 | { | 193 | { |
| 203 | /* The boot cpu is started */ | 194 | /* The boot cpu is started */ |
| 204 | get_paca()->cpu_start = 1; | 195 | get_paca()->cpu_start = 1; |
| @@ -206,23 +197,50 @@ static void fixup_boot_paca(void) | |||
| 206 | get_paca()->data_offset = 0; | 197 | get_paca()->data_offset = 0; |
| 207 | } | 198 | } |
| 208 | 199 | ||
| 209 | static void cpu_ready_for_interrupts(void) | 200 | static void __init configure_exceptions(void) |
| 210 | { | 201 | { |
| 211 | /* Set IR and DR in PACA MSR */ | ||
| 212 | get_paca()->kernel_msr = MSR_KERNEL; | ||
| 213 | |||
| 214 | /* | 202 | /* |
| 215 | * Enable AIL if supported, and we are in hypervisor mode. If we are | 203 | * Setup the trampolines from the lowmem exception vectors |
| 216 | * not in hypervisor mode, we enable relocation-on interrupts later | 204 | * to the kdump kernel when not using a relocatable kernel. |
| 217 | * in pSeries_setup_arch() using the H_SET_MODE hcall. | ||
| 218 | */ | 205 | */ |
| 219 | if (cpu_has_feature(CPU_FTR_HVMODE) && | 206 | setup_kdump_trampoline(); |
| 220 | cpu_has_feature(CPU_FTR_ARCH_207S)) { | 207 | |
| 221 | unsigned long lpcr = mfspr(SPRN_LPCR); | 208 | /* Under a PAPR hypervisor, we need hypercalls */ |
| 222 | mtspr(SPRN_LPCR, lpcr | LPCR_AIL_3); | 209 | if (firmware_has_feature(FW_FEATURE_SET_MODE)) { |
| 210 | /* Enable AIL if possible */ | ||
| 211 | pseries_enable_reloc_on_exc(); | ||
| 212 | |||
| 213 | /* | ||
| 214 | * Tell the hypervisor that we want our exceptions to | ||
| 215 | * be taken in little endian mode. | ||
| 216 | * | ||
| 217 | * We don't call this for big endian as our calling convention | ||
| 218 | * makes us always enter in BE, and the call may fail under | ||
| 219 | * some circumstances with kdump. | ||
| 220 | */ | ||
| 221 | #ifdef __LITTLE_ENDIAN__ | ||
| 222 | pseries_little_endian_exceptions(); | ||
| 223 | #endif | ||
| 224 | } else { | ||
| 225 | /* Set endian mode using OPAL */ | ||
| 226 | if (firmware_has_feature(FW_FEATURE_OPAL)) | ||
| 227 | opal_configure_cores(); | ||
| 228 | |||
| 229 | /* Enable AIL if supported, and we are in hypervisor mode */ | ||
| 230 | if (cpu_has_feature(CPU_FTR_HVMODE) && | ||
| 231 | cpu_has_feature(CPU_FTR_ARCH_207S)) { | ||
| 232 | unsigned long lpcr = mfspr(SPRN_LPCR); | ||
| 233 | mtspr(SPRN_LPCR, lpcr | LPCR_AIL_3); | ||
| 234 | } | ||
| 223 | } | 235 | } |
| 224 | } | 236 | } |
| 225 | 237 | ||
| 238 | static void cpu_ready_for_interrupts(void) | ||
| 239 | { | ||
| 240 | /* Set IR and DR in PACA MSR */ | ||
| 241 | get_paca()->kernel_msr = MSR_KERNEL; | ||
| 242 | } | ||
| 243 | |||
| 226 | /* | 244 | /* |
| 227 | * Early initialization entry point. This is called by head.S | 245 | * Early initialization entry point. This is called by head.S |
| 228 | * with MMU translation disabled. We rely on the "feature" of | 246 | * with MMU translation disabled. We rely on the "feature" of |
| @@ -270,22 +288,22 @@ void __init early_setup(unsigned long dt_ptr) | |||
| 270 | */ | 288 | */ |
| 271 | early_init_devtree(__va(dt_ptr)); | 289 | early_init_devtree(__va(dt_ptr)); |
| 272 | 290 | ||
| 273 | epapr_paravirt_early_init(); | ||
| 274 | |||
| 275 | /* Now we know the logical id of our boot cpu, setup the paca. */ | 291 | /* Now we know the logical id of our boot cpu, setup the paca. */ |
| 276 | setup_paca(&paca[boot_cpuid]); | 292 | setup_paca(&paca[boot_cpuid]); |
| 277 | fixup_boot_paca(); | 293 | fixup_boot_paca(); |
| 278 | 294 | ||
| 279 | /* Probe the machine type */ | 295 | /* |
| 280 | probe_machine(); | 296 | * Configure exception handlers. This include setting up trampolines |
| 281 | 297 | * if needed, setting exception endian mode, etc... | |
| 282 | setup_kdump_trampoline(); | 298 | */ |
| 283 | 299 | configure_exceptions(); | |
| 284 | DBG("Found, Initializing memory management...\n"); | ||
| 285 | 300 | ||
| 286 | /* Initialize the hash table or TLB handling */ | 301 | /* Initialize the hash table or TLB handling */ |
| 287 | early_init_mmu(); | 302 | early_init_mmu(); |
| 288 | 303 | ||
| 304 | /* Apply all the dynamic patching */ | ||
| 305 | apply_feature_fixups(); | ||
| 306 | |||
| 289 | /* | 307 | /* |
| 290 | * At this point, we can let interrupts switch to virtual mode | 308 | * At this point, we can let interrupts switch to virtual mode |
| 291 | * (the MMU has been setup), so adjust the MSR in the PACA to | 309 | * (the MMU has been setup), so adjust the MSR in the PACA to |
| @@ -293,16 +311,6 @@ void __init early_setup(unsigned long dt_ptr) | |||
| 293 | */ | 311 | */ |
| 294 | cpu_ready_for_interrupts(); | 312 | cpu_ready_for_interrupts(); |
| 295 | 313 | ||
| 296 | /* Reserve large chunks of memory for use by CMA for KVM */ | ||
| 297 | kvm_cma_reserve(); | ||
| 298 | |||
| 299 | /* | ||
| 300 | * Reserve any gigantic pages requested on the command line. | ||
| 301 | * memblock needs to have been initialized by the time this is | ||
| 302 | * called since this will reserve memory. | ||
| 303 | */ | ||
| 304 | reserve_hugetlb_gpages(); | ||
| 305 | |||
| 306 | DBG(" <- early_setup()\n"); | 314 | DBG(" <- early_setup()\n"); |
| 307 | 315 | ||
| 308 | #ifdef CONFIG_PPC_EARLY_DEBUG_BOOTX | 316 | #ifdef CONFIG_PPC_EARLY_DEBUG_BOOTX |
| @@ -321,7 +329,7 @@ void __init early_setup(unsigned long dt_ptr) | |||
| 321 | #ifdef CONFIG_SMP | 329 | #ifdef CONFIG_SMP |
| 322 | void early_setup_secondary(void) | 330 | void early_setup_secondary(void) |
| 323 | { | 331 | { |
| 324 | /* Mark interrupts enabled in PACA */ | 332 | /* Mark interrupts disabled in PACA */ |
| 325 | get_paca()->soft_enabled = 0; | 333 | get_paca()->soft_enabled = 0; |
| 326 | 334 | ||
| 327 | /* Initialize the hash table or TLB handling */ | 335 | /* Initialize the hash table or TLB handling */ |
| @@ -391,7 +399,7 @@ void smp_release_cpus(void) | |||
| 391 | * cache informations about the CPU that will be used by cache flush | 399 | * cache informations about the CPU that will be used by cache flush |
| 392 | * routines and/or provided to userland | 400 | * routines and/or provided to userland |
| 393 | */ | 401 | */ |
| 394 | static void __init initialize_cache_info(void) | 402 | void __init initialize_cache_info(void) |
| 395 | { | 403 | { |
| 396 | struct device_node *np; | 404 | struct device_node *np; |
| 397 | unsigned long num_cpus = 0; | 405 | unsigned long num_cpus = 0; |
| @@ -456,127 +464,11 @@ static void __init initialize_cache_info(void) | |||
| 456 | } | 464 | } |
| 457 | } | 465 | } |
| 458 | 466 | ||
| 459 | DBG(" <- initialize_cache_info()\n"); | 467 | /* For use by binfmt_elf */ |
| 460 | } | 468 | dcache_bsize = ppc64_caches.dline_size; |
| 461 | 469 | icache_bsize = ppc64_caches.iline_size; | |
| 462 | |||
| 463 | /* | ||
| 464 | * Do some initial setup of the system. The parameters are those which | ||
| 465 | * were passed in from the bootloader. | ||
| 466 | */ | ||
| 467 | void __init setup_system(void) | ||
| 468 | { | ||
| 469 | DBG(" -> setup_system()\n"); | ||
| 470 | |||
| 471 | /* Apply the CPUs-specific and firmware specific fixups to kernel | ||
| 472 | * text (nop out sections not relevant to this CPU or this firmware) | ||
| 473 | */ | ||
| 474 | do_feature_fixups(cur_cpu_spec->cpu_features, | ||
| 475 | &__start___ftr_fixup, &__stop___ftr_fixup); | ||
| 476 | do_feature_fixups(cur_cpu_spec->mmu_features, | ||
| 477 | &__start___mmu_ftr_fixup, &__stop___mmu_ftr_fixup); | ||
| 478 | do_feature_fixups(powerpc_firmware_features, | ||
| 479 | &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup); | ||
| 480 | do_lwsync_fixups(cur_cpu_spec->cpu_features, | ||
| 481 | &__start___lwsync_fixup, &__stop___lwsync_fixup); | ||
| 482 | do_final_fixups(); | ||
| 483 | |||
| 484 | /* | ||
| 485 | * Unflatten the device-tree passed by prom_init or kexec | ||
| 486 | */ | ||
| 487 | unflatten_device_tree(); | ||
| 488 | |||
| 489 | /* | ||
| 490 | * Fill the ppc64_caches & systemcfg structures with informations | ||
| 491 | * retrieved from the device-tree. | ||
| 492 | */ | ||
| 493 | initialize_cache_info(); | ||
| 494 | |||
| 495 | #ifdef CONFIG_PPC_RTAS | ||
| 496 | /* | ||
| 497 | * Initialize RTAS if available | ||
| 498 | */ | ||
| 499 | rtas_initialize(); | ||
| 500 | #endif /* CONFIG_PPC_RTAS */ | ||
| 501 | |||
| 502 | /* | ||
| 503 | * Check if we have an initrd provided via the device-tree | ||
| 504 | */ | ||
| 505 | check_for_initrd(); | ||
| 506 | |||
| 507 | /* | ||
| 508 | * Do some platform specific early initializations, that includes | ||
| 509 | * setting up the hash table pointers. It also sets up some interrupt-mapping | ||
| 510 | * related options that will be used by finish_device_tree() | ||
| 511 | */ | ||
| 512 | if (ppc_md.init_early) | ||
| 513 | ppc_md.init_early(); | ||
| 514 | |||
| 515 | /* | ||
| 516 | * We can discover serial ports now since the above did setup the | ||
| 517 | * hash table management for us, thus ioremap works. We do that early | ||
| 518 | * so that further code can be debugged | ||
| 519 | */ | ||
| 520 | find_legacy_serial_ports(); | ||
| 521 | |||
| 522 | /* | ||
| 523 | * Register early console | ||
| 524 | */ | ||
| 525 | register_early_udbg_console(); | ||
| 526 | |||
| 527 | /* | ||
| 528 | * Initialize xmon | ||
| 529 | */ | ||
| 530 | xmon_setup(); | ||
| 531 | |||
| 532 | smp_setup_cpu_maps(); | ||
| 533 | check_smt_enabled(); | ||
| 534 | setup_tlb_core_data(); | ||
| 535 | |||
| 536 | /* | ||
| 537 | * Freescale Book3e parts spin in a loop provided by firmware, | ||
| 538 | * so smp_release_cpus() does nothing for them | ||
| 539 | */ | ||
| 540 | #if defined(CONFIG_SMP) | ||
| 541 | /* Release secondary cpus out of their spinloops at 0x60 now that | ||
| 542 | * we can map physical -> logical CPU ids | ||
| 543 | */ | ||
| 544 | smp_release_cpus(); | ||
| 545 | #endif | ||
| 546 | |||
| 547 | pr_info("Starting Linux %s %s\n", init_utsname()->machine, | ||
| 548 | init_utsname()->version); | ||
| 549 | |||
| 550 | pr_info("-----------------------------------------------------\n"); | ||
| 551 | pr_info("ppc64_pft_size = 0x%llx\n", ppc64_pft_size); | ||
| 552 | pr_info("phys_mem_size = 0x%llx\n", memblock_phys_mem_size()); | ||
| 553 | |||
| 554 | if (ppc64_caches.dline_size != 0x80) | ||
| 555 | pr_info("dcache_line_size = 0x%x\n", ppc64_caches.dline_size); | ||
| 556 | if (ppc64_caches.iline_size != 0x80) | ||
| 557 | pr_info("icache_line_size = 0x%x\n", ppc64_caches.iline_size); | ||
| 558 | |||
| 559 | pr_info("cpu_features = 0x%016lx\n", cur_cpu_spec->cpu_features); | ||
| 560 | pr_info(" possible = 0x%016lx\n", CPU_FTRS_POSSIBLE); | ||
| 561 | pr_info(" always = 0x%016lx\n", CPU_FTRS_ALWAYS); | ||
| 562 | pr_info("cpu_user_features = 0x%08x 0x%08x\n", cur_cpu_spec->cpu_user_features, | ||
| 563 | cur_cpu_spec->cpu_user_features2); | ||
| 564 | pr_info("mmu_features = 0x%08x\n", cur_cpu_spec->mmu_features); | ||
| 565 | pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features); | ||
| 566 | |||
| 567 | #ifdef CONFIG_PPC_STD_MMU_64 | ||
| 568 | if (htab_address) | ||
| 569 | pr_info("htab_address = 0x%p\n", htab_address); | ||
| 570 | |||
| 571 | pr_info("htab_hash_mask = 0x%lx\n", htab_hash_mask); | ||
| 572 | #endif | ||
| 573 | |||
| 574 | if (PHYSICAL_START > 0) | ||
| 575 | pr_info("physical_start = 0x%llx\n", | ||
| 576 | (unsigned long long)PHYSICAL_START); | ||
| 577 | pr_info("-----------------------------------------------------\n"); | ||
| 578 | 470 | ||
| 579 | DBG(" <- setup_system()\n"); | 471 | DBG(" <- initialize_cache_info()\n"); |
| 580 | } | 472 | } |
| 581 | 473 | ||
| 582 | /* This returns the limit below which memory accesses to the linear | 474 | /* This returns the limit below which memory accesses to the linear |
| @@ -584,7 +476,7 @@ void __init setup_system(void) | |||
| 584 | * used to allocate interrupt or emergency stacks for which our | 476 | * used to allocate interrupt or emergency stacks for which our |
| 585 | * exception entry path doesn't deal with being interrupted. | 477 | * exception entry path doesn't deal with being interrupted. |
| 586 | */ | 478 | */ |
| 587 | static u64 safe_stack_limit(void) | 479 | static __init u64 safe_stack_limit(void) |
| 588 | { | 480 | { |
| 589 | #ifdef CONFIG_PPC_BOOK3E | 481 | #ifdef CONFIG_PPC_BOOK3E |
| 590 | /* Freescale BookE bolts the entire linear mapping */ | 482 | /* Freescale BookE bolts the entire linear mapping */ |
| @@ -600,7 +492,7 @@ static u64 safe_stack_limit(void) | |||
| 600 | #endif | 492 | #endif |
| 601 | } | 493 | } |
| 602 | 494 | ||
| 603 | static void __init irqstack_early_init(void) | 495 | void __init irqstack_early_init(void) |
| 604 | { | 496 | { |
| 605 | u64 limit = safe_stack_limit(); | 497 | u64 limit = safe_stack_limit(); |
| 606 | unsigned int i; | 498 | unsigned int i; |
| @@ -620,7 +512,7 @@ static void __init irqstack_early_init(void) | |||
| 620 | } | 512 | } |
| 621 | 513 | ||
| 622 | #ifdef CONFIG_PPC_BOOK3E | 514 | #ifdef CONFIG_PPC_BOOK3E |
| 623 | static void __init exc_lvl_early_init(void) | 515 | void __init exc_lvl_early_init(void) |
| 624 | { | 516 | { |
| 625 | unsigned int i; | 517 | unsigned int i; |
| 626 | unsigned long sp; | 518 | unsigned long sp; |
| @@ -642,8 +534,6 @@ static void __init exc_lvl_early_init(void) | |||
| 642 | if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) | 534 | if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) |
| 643 | patch_exception(0x040, exc_debug_debug_book3e); | 535 | patch_exception(0x040, exc_debug_debug_book3e); |
| 644 | } | 536 | } |
| 645 | #else | ||
| 646 | #define exc_lvl_early_init() | ||
| 647 | #endif | 537 | #endif |
| 648 | 538 | ||
| 649 | /* | 539 | /* |
| @@ -651,7 +541,7 @@ static void __init exc_lvl_early_init(void) | |||
| 651 | * early in SMP boots before relocation is enabled. Exclusive emergency | 541 | * early in SMP boots before relocation is enabled. Exclusive emergency |
| 652 | * stack for machine checks. | 542 | * stack for machine checks. |
| 653 | */ | 543 | */ |
| 654 | static void __init emergency_stack_init(void) | 544 | void __init emergency_stack_init(void) |
| 655 | { | 545 | { |
| 656 | u64 limit; | 546 | u64 limit; |
| 657 | unsigned int i; | 547 | unsigned int i; |
| @@ -682,61 +572,6 @@ static void __init emergency_stack_init(void) | |||
| 682 | } | 572 | } |
| 683 | } | 573 | } |
| 684 | 574 | ||
| 685 | /* | ||
| 686 | * Called into from start_kernel this initializes memblock, which is used | ||
| 687 | * to manage page allocation until mem_init is called. | ||
| 688 | */ | ||
| 689 | void __init setup_arch(char **cmdline_p) | ||
| 690 | { | ||
| 691 | *cmdline_p = boot_command_line; | ||
| 692 | |||
| 693 | /* | ||
| 694 | * Set cache line size based on type of cpu as a default. | ||
| 695 | * Systems with OF can look in the properties on the cpu node(s) | ||
| 696 | * for a possibly more accurate value. | ||
| 697 | */ | ||
| 698 | dcache_bsize = ppc64_caches.dline_size; | ||
| 699 | icache_bsize = ppc64_caches.iline_size; | ||
| 700 | |||
| 701 | if (ppc_md.panic) | ||
| 702 | setup_panic(); | ||
| 703 | |||
| 704 | klp_init_thread_info(&init_thread_info); | ||
| 705 | |||
| 706 | init_mm.start_code = (unsigned long)_stext; | ||
| 707 | init_mm.end_code = (unsigned long) _etext; | ||
| 708 | init_mm.end_data = (unsigned long) _edata; | ||
| 709 | init_mm.brk = klimit; | ||
| 710 | #ifdef CONFIG_PPC_64K_PAGES | ||
| 711 | init_mm.context.pte_frag = NULL; | ||
| 712 | #endif | ||
| 713 | #ifdef CONFIG_SPAPR_TCE_IOMMU | ||
| 714 | mm_iommu_init(&init_mm.context); | ||
| 715 | #endif | ||
| 716 | irqstack_early_init(); | ||
| 717 | exc_lvl_early_init(); | ||
| 718 | emergency_stack_init(); | ||
| 719 | |||
| 720 | initmem_init(); | ||
| 721 | |||
| 722 | #ifdef CONFIG_DUMMY_CONSOLE | ||
| 723 | conswitchp = &dummy_con; | ||
| 724 | #endif | ||
| 725 | |||
| 726 | if (ppc_md.setup_arch) | ||
| 727 | ppc_md.setup_arch(); | ||
| 728 | |||
| 729 | paging_init(); | ||
| 730 | |||
| 731 | /* Initialize the MMU context management stuff */ | ||
| 732 | mmu_context_init(); | ||
| 733 | |||
| 734 | /* Interrupt code needs to be 64K-aligned */ | ||
| 735 | if ((unsigned long)_stext & 0xffff) | ||
| 736 | panic("Kernelbase not 64K-aligned (0x%lx)!\n", | ||
| 737 | (unsigned long)_stext); | ||
| 738 | } | ||
| 739 | |||
| 740 | #ifdef CONFIG_SMP | 575 | #ifdef CONFIG_SMP |
| 741 | #define PCPU_DYN_SIZE () | 576 | #define PCPU_DYN_SIZE () |
| 742 | 577 | ||
diff --git a/arch/powerpc/kernel/signal_64.c b/arch/powerpc/kernel/signal_64.c index 25520794aa37..7e49984d4331 100644 --- a/arch/powerpc/kernel/signal_64.c +++ b/arch/powerpc/kernel/signal_64.c | |||
| @@ -104,6 +104,7 @@ static long setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs, | |||
| 104 | */ | 104 | */ |
| 105 | #ifdef CONFIG_ALTIVEC | 105 | #ifdef CONFIG_ALTIVEC |
| 106 | elf_vrreg_t __user *v_regs = sigcontext_vmx_regs(sc); | 106 | elf_vrreg_t __user *v_regs = sigcontext_vmx_regs(sc); |
| 107 | unsigned long vrsave; | ||
| 107 | #endif | 108 | #endif |
| 108 | unsigned long msr = regs->msr; | 109 | unsigned long msr = regs->msr; |
| 109 | long err = 0; | 110 | long err = 0; |
| @@ -125,9 +126,13 @@ static long setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs, | |||
| 125 | /* We always copy to/from vrsave, it's 0 if we don't have or don't | 126 | /* We always copy to/from vrsave, it's 0 if we don't have or don't |
| 126 | * use altivec. | 127 | * use altivec. |
| 127 | */ | 128 | */ |
| 128 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) | 129 | vrsave = 0; |
| 129 | current->thread.vrsave = mfspr(SPRN_VRSAVE); | 130 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) { |
| 130 | err |= __put_user(current->thread.vrsave, (u32 __user *)&v_regs[33]); | 131 | vrsave = mfspr(SPRN_VRSAVE); |
| 132 | current->thread.vrsave = vrsave; | ||
| 133 | } | ||
| 134 | |||
| 135 | err |= __put_user(vrsave, (u32 __user *)&v_regs[33]); | ||
| 131 | #else /* CONFIG_ALTIVEC */ | 136 | #else /* CONFIG_ALTIVEC */ |
| 132 | err |= __put_user(0, &sc->v_regs); | 137 | err |= __put_user(0, &sc->v_regs); |
| 133 | #endif /* CONFIG_ALTIVEC */ | 138 | #endif /* CONFIG_ALTIVEC */ |
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c index 55c924b65f71..5a1f015ea9f3 100644 --- a/arch/powerpc/kernel/smp.c +++ b/arch/powerpc/kernel/smp.c | |||
| @@ -31,6 +31,7 @@ | |||
| 31 | #include <linux/cpu.h> | 31 | #include <linux/cpu.h> |
| 32 | #include <linux/notifier.h> | 32 | #include <linux/notifier.h> |
| 33 | #include <linux/topology.h> | 33 | #include <linux/topology.h> |
| 34 | #include <linux/profile.h> | ||
| 34 | 35 | ||
| 35 | #include <asm/ptrace.h> | 36 | #include <asm/ptrace.h> |
| 36 | #include <linux/atomic.h> | 37 | #include <linux/atomic.h> |
| @@ -53,6 +54,7 @@ | |||
| 53 | #include <asm/vdso.h> | 54 | #include <asm/vdso.h> |
| 54 | #include <asm/debug.h> | 55 | #include <asm/debug.h> |
| 55 | #include <asm/kexec.h> | 56 | #include <asm/kexec.h> |
| 57 | #include <asm/asm-prototypes.h> | ||
| 56 | 58 | ||
| 57 | #ifdef DEBUG | 59 | #ifdef DEBUG |
| 58 | #include <asm/udbg.h> | 60 | #include <asm/udbg.h> |
| @@ -593,6 +595,7 @@ out: | |||
| 593 | of_node_put(np); | 595 | of_node_put(np); |
| 594 | return id; | 596 | return id; |
| 595 | } | 597 | } |
| 598 | EXPORT_SYMBOL_GPL(cpu_to_core_id); | ||
| 596 | 599 | ||
| 597 | /* Helper routines for cpu to core mapping */ | 600 | /* Helper routines for cpu to core mapping */ |
| 598 | int cpu_core_index_of_thread(int cpu) | 601 | int cpu_core_index_of_thread(int cpu) |
diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c index 692873bff334..c4f1d1f7bae0 100644 --- a/arch/powerpc/kernel/sysfs.c +++ b/arch/powerpc/kernel/sysfs.c | |||
| @@ -35,7 +35,7 @@ static DEFINE_PER_CPU(struct cpu, cpu_devices); | |||
| 35 | #ifdef CONFIG_PPC64 | 35 | #ifdef CONFIG_PPC64 |
| 36 | 36 | ||
| 37 | /* Time in microseconds we delay before sleeping in the idle loop */ | 37 | /* Time in microseconds we delay before sleeping in the idle loop */ |
| 38 | DEFINE_PER_CPU(long, smt_snooze_delay) = { 100 }; | 38 | static DEFINE_PER_CPU(long, smt_snooze_delay) = { 100 }; |
| 39 | 39 | ||
| 40 | static ssize_t store_smt_snooze_delay(struct device *dev, | 40 | static ssize_t store_smt_snooze_delay(struct device *dev, |
| 41 | struct device_attribute *attr, | 41 | struct device_attribute *attr, |
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c index 3ed9a5a21d77..4e7759c8ca30 100644 --- a/arch/powerpc/kernel/time.c +++ b/arch/powerpc/kernel/time.c | |||
| @@ -96,7 +96,8 @@ static struct clocksource clocksource_timebase = { | |||
| 96 | .read = timebase_read, | 96 | .read = timebase_read, |
| 97 | }; | 97 | }; |
| 98 | 98 | ||
| 99 | #define DECREMENTER_MAX 0x7fffffff | 99 | #define DECREMENTER_DEFAULT_MAX 0x7FFFFFFF |
| 100 | u64 decrementer_max = DECREMENTER_DEFAULT_MAX; | ||
| 100 | 101 | ||
| 101 | static int decrementer_set_next_event(unsigned long evt, | 102 | static int decrementer_set_next_event(unsigned long evt, |
| 102 | struct clock_event_device *dev); | 103 | struct clock_event_device *dev); |
| @@ -166,7 +167,15 @@ DEFINE_PER_CPU(unsigned long, cputime_scaled_last_delta); | |||
| 166 | 167 | ||
| 167 | cputime_t cputime_one_jiffy; | 168 | cputime_t cputime_one_jiffy; |
| 168 | 169 | ||
| 170 | #ifdef CONFIG_PPC_SPLPAR | ||
| 169 | void (*dtl_consumer)(struct dtl_entry *, u64); | 171 | void (*dtl_consumer)(struct dtl_entry *, u64); |
| 172 | #endif | ||
| 173 | |||
| 174 | #ifdef CONFIG_PPC64 | ||
| 175 | #define get_accounting(tsk) (&get_paca()->accounting) | ||
| 176 | #else | ||
| 177 | #define get_accounting(tsk) (&task_thread_info(tsk)->accounting) | ||
| 178 | #endif | ||
| 170 | 179 | ||
| 171 | static void calc_cputime_factors(void) | 180 | static void calc_cputime_factors(void) |
| 172 | { | 181 | { |
| @@ -186,7 +195,7 @@ static void calc_cputime_factors(void) | |||
| 186 | * Read the SPURR on systems that have it, otherwise the PURR, | 195 | * Read the SPURR on systems that have it, otherwise the PURR, |
| 187 | * or if that doesn't exist return the timebase value passed in. | 196 | * or if that doesn't exist return the timebase value passed in. |
| 188 | */ | 197 | */ |
| 189 | static u64 read_spurr(u64 tb) | 198 | static unsigned long read_spurr(unsigned long tb) |
| 190 | { | 199 | { |
| 191 | if (cpu_has_feature(CPU_FTR_SPURR)) | 200 | if (cpu_has_feature(CPU_FTR_SPURR)) |
| 192 | return mfspr(SPRN_SPURR); | 201 | return mfspr(SPRN_SPURR); |
| @@ -249,8 +258,8 @@ static u64 scan_dispatch_log(u64 stop_tb) | |||
| 249 | void accumulate_stolen_time(void) | 258 | void accumulate_stolen_time(void) |
| 250 | { | 259 | { |
| 251 | u64 sst, ust; | 260 | u64 sst, ust; |
| 252 | |||
| 253 | u8 save_soft_enabled = local_paca->soft_enabled; | 261 | u8 save_soft_enabled = local_paca->soft_enabled; |
| 262 | struct cpu_accounting_data *acct = &local_paca->accounting; | ||
| 254 | 263 | ||
| 255 | /* We are called early in the exception entry, before | 264 | /* We are called early in the exception entry, before |
| 256 | * soft/hard_enabled are sync'ed to the expected state | 265 | * soft/hard_enabled are sync'ed to the expected state |
| @@ -260,10 +269,10 @@ void accumulate_stolen_time(void) | |||
| 260 | */ | 269 | */ |
| 261 | local_paca->soft_enabled = 0; | 270 | local_paca->soft_enabled = 0; |
| 262 | 271 | ||
| 263 | sst = scan_dispatch_log(local_paca->starttime_user); | 272 | sst = scan_dispatch_log(acct->starttime_user); |
| 264 | ust = scan_dispatch_log(local_paca->starttime); | 273 | ust = scan_dispatch_log(acct->starttime); |
| 265 | local_paca->system_time -= sst; | 274 | acct->system_time -= sst; |
| 266 | local_paca->user_time -= ust; | 275 | acct->user_time -= ust; |
| 267 | local_paca->stolen_time += ust + sst; | 276 | local_paca->stolen_time += ust + sst; |
| 268 | 277 | ||
| 269 | local_paca->soft_enabled = save_soft_enabled; | 278 | local_paca->soft_enabled = save_soft_enabled; |
| @@ -275,7 +284,7 @@ static inline u64 calculate_stolen_time(u64 stop_tb) | |||
| 275 | 284 | ||
| 276 | if (get_paca()->dtl_ridx != be64_to_cpu(get_lppaca()->dtl_idx)) { | 285 | if (get_paca()->dtl_ridx != be64_to_cpu(get_lppaca()->dtl_idx)) { |
| 277 | stolen = scan_dispatch_log(stop_tb); | 286 | stolen = scan_dispatch_log(stop_tb); |
| 278 | get_paca()->system_time -= stolen; | 287 | get_paca()->accounting.system_time -= stolen; |
| 279 | } | 288 | } |
| 280 | 289 | ||
| 281 | stolen += get_paca()->stolen_time; | 290 | stolen += get_paca()->stolen_time; |
| @@ -295,27 +304,29 @@ static inline u64 calculate_stolen_time(u64 stop_tb) | |||
| 295 | * Account time for a transition between system, hard irq | 304 | * Account time for a transition between system, hard irq |
| 296 | * or soft irq state. | 305 | * or soft irq state. |
| 297 | */ | 306 | */ |
| 298 | static u64 vtime_delta(struct task_struct *tsk, | 307 | static unsigned long vtime_delta(struct task_struct *tsk, |
| 299 | u64 *sys_scaled, u64 *stolen) | 308 | unsigned long *sys_scaled, |
| 309 | unsigned long *stolen) | ||
| 300 | { | 310 | { |
| 301 | u64 now, nowscaled, deltascaled; | 311 | unsigned long now, nowscaled, deltascaled; |
| 302 | u64 udelta, delta, user_scaled; | 312 | unsigned long udelta, delta, user_scaled; |
| 313 | struct cpu_accounting_data *acct = get_accounting(tsk); | ||
| 303 | 314 | ||
| 304 | WARN_ON_ONCE(!irqs_disabled()); | 315 | WARN_ON_ONCE(!irqs_disabled()); |
| 305 | 316 | ||
| 306 | now = mftb(); | 317 | now = mftb(); |
| 307 | nowscaled = read_spurr(now); | 318 | nowscaled = read_spurr(now); |
| 308 | get_paca()->system_time += now - get_paca()->starttime; | 319 | acct->system_time += now - acct->starttime; |
| 309 | get_paca()->starttime = now; | 320 | acct->starttime = now; |
| 310 | deltascaled = nowscaled - get_paca()->startspurr; | 321 | deltascaled = nowscaled - acct->startspurr; |
| 311 | get_paca()->startspurr = nowscaled; | 322 | acct->startspurr = nowscaled; |
| 312 | 323 | ||
| 313 | *stolen = calculate_stolen_time(now); | 324 | *stolen = calculate_stolen_time(now); |
| 314 | 325 | ||
| 315 | delta = get_paca()->system_time; | 326 | delta = acct->system_time; |
| 316 | get_paca()->system_time = 0; | 327 | acct->system_time = 0; |
| 317 | udelta = get_paca()->user_time - get_paca()->utime_sspurr; | 328 | udelta = acct->user_time - acct->utime_sspurr; |
| 318 | get_paca()->utime_sspurr = get_paca()->user_time; | 329 | acct->utime_sspurr = acct->user_time; |
| 319 | 330 | ||
| 320 | /* | 331 | /* |
| 321 | * Because we don't read the SPURR on every kernel entry/exit, | 332 | * Because we don't read the SPURR on every kernel entry/exit, |
| @@ -337,14 +348,14 @@ static u64 vtime_delta(struct task_struct *tsk, | |||
| 337 | *sys_scaled = deltascaled; | 348 | *sys_scaled = deltascaled; |
| 338 | } | 349 | } |
| 339 | } | 350 | } |
| 340 | get_paca()->user_time_scaled += user_scaled; | 351 | acct->user_time_scaled += user_scaled; |
| 341 | 352 | ||
| 342 | return delta; | 353 | return delta; |
| 343 | } | 354 | } |
| 344 | 355 | ||
| 345 | void vtime_account_system(struct task_struct *tsk) | 356 | void vtime_account_system(struct task_struct *tsk) |
| 346 | { | 357 | { |
| 347 | u64 delta, sys_scaled, stolen; | 358 | unsigned long delta, sys_scaled, stolen; |
| 348 | 359 | ||
| 349 | delta = vtime_delta(tsk, &sys_scaled, &stolen); | 360 | delta = vtime_delta(tsk, &sys_scaled, &stolen); |
| 350 | account_system_time(tsk, 0, delta, sys_scaled); | 361 | account_system_time(tsk, 0, delta, sys_scaled); |
| @@ -355,7 +366,7 @@ EXPORT_SYMBOL_GPL(vtime_account_system); | |||
| 355 | 366 | ||
| 356 | void vtime_account_idle(struct task_struct *tsk) | 367 | void vtime_account_idle(struct task_struct *tsk) |
| 357 | { | 368 | { |
| 358 | u64 delta, sys_scaled, stolen; | 369 | unsigned long delta, sys_scaled, stolen; |
| 359 | 370 | ||
| 360 | delta = vtime_delta(tsk, &sys_scaled, &stolen); | 371 | delta = vtime_delta(tsk, &sys_scaled, &stolen); |
| 361 | account_idle_time(delta + stolen); | 372 | account_idle_time(delta + stolen); |
| @@ -373,15 +384,32 @@ void vtime_account_idle(struct task_struct *tsk) | |||
| 373 | void vtime_account_user(struct task_struct *tsk) | 384 | void vtime_account_user(struct task_struct *tsk) |
| 374 | { | 385 | { |
| 375 | cputime_t utime, utimescaled; | 386 | cputime_t utime, utimescaled; |
| 387 | struct cpu_accounting_data *acct = get_accounting(tsk); | ||
| 376 | 388 | ||
| 377 | utime = get_paca()->user_time; | 389 | utime = acct->user_time; |
| 378 | utimescaled = get_paca()->user_time_scaled; | 390 | utimescaled = acct->user_time_scaled; |
| 379 | get_paca()->user_time = 0; | 391 | acct->user_time = 0; |
| 380 | get_paca()->user_time_scaled = 0; | 392 | acct->user_time_scaled = 0; |
| 381 | get_paca()->utime_sspurr = 0; | 393 | acct->utime_sspurr = 0; |
| 382 | account_user_time(tsk, utime, utimescaled); | 394 | account_user_time(tsk, utime, utimescaled); |
| 383 | } | 395 | } |
| 384 | 396 | ||
| 397 | #ifdef CONFIG_PPC32 | ||
| 398 | /* | ||
| 399 | * Called from the context switch with interrupts disabled, to charge all | ||
| 400 | * accumulated times to the current process, and to prepare accounting on | ||
| 401 | * the next process. | ||
| 402 | */ | ||
| 403 | void arch_vtime_task_switch(struct task_struct *prev) | ||
| 404 | { | ||
| 405 | struct cpu_accounting_data *acct = get_accounting(current); | ||
| 406 | |||
| 407 | acct->starttime = get_accounting(prev)->starttime; | ||
| 408 | acct->system_time = 0; | ||
| 409 | acct->user_time = 0; | ||
| 410 | } | ||
| 411 | #endif /* CONFIG_PPC32 */ | ||
| 412 | |||
| 385 | #else /* ! CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ | 413 | #else /* ! CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ |
| 386 | #define calc_cputime_factors() | 414 | #define calc_cputime_factors() |
| 387 | #endif | 415 | #endif |
| @@ -504,8 +532,8 @@ static void __timer_interrupt(void) | |||
| 504 | __this_cpu_inc(irq_stat.timer_irqs_event); | 532 | __this_cpu_inc(irq_stat.timer_irqs_event); |
| 505 | } else { | 533 | } else { |
| 506 | now = *next_tb - now; | 534 | now = *next_tb - now; |
| 507 | if (now <= DECREMENTER_MAX) | 535 | if (now <= decrementer_max) |
| 508 | set_dec((int)now); | 536 | set_dec(now); |
| 509 | /* We may have raced with new irq work */ | 537 | /* We may have raced with new irq work */ |
| 510 | if (test_irq_work_pending()) | 538 | if (test_irq_work_pending()) |
| 511 | set_dec(1); | 539 | set_dec(1); |
| @@ -535,7 +563,7 @@ void timer_interrupt(struct pt_regs * regs) | |||
| 535 | /* Ensure a positive value is written to the decrementer, or else | 563 | /* Ensure a positive value is written to the decrementer, or else |
| 536 | * some CPUs will continue to take decrementer exceptions. | 564 | * some CPUs will continue to take decrementer exceptions. |
| 537 | */ | 565 | */ |
| 538 | set_dec(DECREMENTER_MAX); | 566 | set_dec(decrementer_max); |
| 539 | 567 | ||
| 540 | /* Some implementations of hotplug will get timer interrupts while | 568 | /* Some implementations of hotplug will get timer interrupts while |
| 541 | * offline, just ignore these and we also need to set | 569 | * offline, just ignore these and we also need to set |
| @@ -583,9 +611,9 @@ static void generic_suspend_disable_irqs(void) | |||
| 583 | * with suspending. | 611 | * with suspending. |
| 584 | */ | 612 | */ |
| 585 | 613 | ||
| 586 | set_dec(DECREMENTER_MAX); | 614 | set_dec(decrementer_max); |
| 587 | local_irq_disable(); | 615 | local_irq_disable(); |
| 588 | set_dec(DECREMENTER_MAX); | 616 | set_dec(decrementer_max); |
| 589 | } | 617 | } |
| 590 | 618 | ||
| 591 | static void generic_suspend_enable_irqs(void) | 619 | static void generic_suspend_enable_irqs(void) |
| @@ -866,7 +894,7 @@ static int decrementer_set_next_event(unsigned long evt, | |||
| 866 | 894 | ||
| 867 | static int decrementer_shutdown(struct clock_event_device *dev) | 895 | static int decrementer_shutdown(struct clock_event_device *dev) |
| 868 | { | 896 | { |
| 869 | decrementer_set_next_event(DECREMENTER_MAX, dev); | 897 | decrementer_set_next_event(decrementer_max, dev); |
| 870 | return 0; | 898 | return 0; |
| 871 | } | 899 | } |
| 872 | 900 | ||
| @@ -892,6 +920,49 @@ static void register_decrementer_clockevent(int cpu) | |||
| 892 | clockevents_register_device(dec); | 920 | clockevents_register_device(dec); |
| 893 | } | 921 | } |
| 894 | 922 | ||
| 923 | static void enable_large_decrementer(void) | ||
| 924 | { | ||
| 925 | if (!cpu_has_feature(CPU_FTR_ARCH_300)) | ||
| 926 | return; | ||
| 927 | |||
| 928 | if (decrementer_max <= DECREMENTER_DEFAULT_MAX) | ||
| 929 | return; | ||
| 930 | |||
| 931 | /* | ||
| 932 | * If we're running as the hypervisor we need to enable the LD manually | ||
| 933 | * otherwise firmware should have done it for us. | ||
| 934 | */ | ||
| 935 | if (cpu_has_feature(CPU_FTR_HVMODE)) | ||
| 936 | mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) | LPCR_LD); | ||
| 937 | } | ||
| 938 | |||
| 939 | static void __init set_decrementer_max(void) | ||
| 940 | { | ||
| 941 | struct device_node *cpu; | ||
| 942 | u32 bits = 32; | ||
| 943 | |||
| 944 | /* Prior to ISAv3 the decrementer is always 32 bit */ | ||
| 945 | if (!cpu_has_feature(CPU_FTR_ARCH_300)) | ||
| 946 | return; | ||
| 947 | |||
| 948 | cpu = of_find_node_by_type(NULL, "cpu"); | ||
| 949 | |||
| 950 | if (of_property_read_u32(cpu, "ibm,dec-bits", &bits) == 0) { | ||
| 951 | if (bits > 64 || bits < 32) { | ||
| 952 | pr_warn("time_init: firmware supplied invalid ibm,dec-bits"); | ||
| 953 | bits = 32; | ||
| 954 | } | ||
| 955 | |||
| 956 | /* calculate the signed maximum given this many bits */ | ||
| 957 | decrementer_max = (1ul << (bits - 1)) - 1; | ||
| 958 | } | ||
| 959 | |||
| 960 | of_node_put(cpu); | ||
| 961 | |||
| 962 | pr_info("time_init: %u bit decrementer (max: %llx)\n", | ||
| 963 | bits, decrementer_max); | ||
| 964 | } | ||
| 965 | |||
| 895 | static void __init init_decrementer_clockevent(void) | 966 | static void __init init_decrementer_clockevent(void) |
| 896 | { | 967 | { |
| 897 | int cpu = smp_processor_id(); | 968 | int cpu = smp_processor_id(); |
| @@ -899,7 +970,7 @@ static void __init init_decrementer_clockevent(void) | |||
| 899 | clockevents_calc_mult_shift(&decrementer_clockevent, ppc_tb_freq, 4); | 970 | clockevents_calc_mult_shift(&decrementer_clockevent, ppc_tb_freq, 4); |
| 900 | 971 | ||
| 901 | decrementer_clockevent.max_delta_ns = | 972 | decrementer_clockevent.max_delta_ns = |
| 902 | clockevent_delta2ns(DECREMENTER_MAX, &decrementer_clockevent); | 973 | clockevent_delta2ns(decrementer_max, &decrementer_clockevent); |
| 903 | decrementer_clockevent.min_delta_ns = | 974 | decrementer_clockevent.min_delta_ns = |
| 904 | clockevent_delta2ns(2, &decrementer_clockevent); | 975 | clockevent_delta2ns(2, &decrementer_clockevent); |
| 905 | 976 | ||
| @@ -908,6 +979,9 @@ static void __init init_decrementer_clockevent(void) | |||
| 908 | 979 | ||
| 909 | void secondary_cpu_time_init(void) | 980 | void secondary_cpu_time_init(void) |
| 910 | { | 981 | { |
| 982 | /* Enable and test the large decrementer for this cpu */ | ||
| 983 | enable_large_decrementer(); | ||
| 984 | |||
| 911 | /* Start the decrementer on CPUs that have manual control | 985 | /* Start the decrementer on CPUs that have manual control |
| 912 | * such as BookE | 986 | * such as BookE |
| 913 | */ | 987 | */ |
| @@ -973,6 +1047,10 @@ void __init time_init(void) | |||
| 973 | vdso_data->tb_update_count = 0; | 1047 | vdso_data->tb_update_count = 0; |
| 974 | vdso_data->tb_ticks_per_sec = tb_ticks_per_sec; | 1048 | vdso_data->tb_ticks_per_sec = tb_ticks_per_sec; |
| 975 | 1049 | ||
| 1050 | /* initialise and enable the large decrementer (if we have one) */ | ||
| 1051 | set_decrementer_max(); | ||
| 1052 | enable_large_decrementer(); | ||
| 1053 | |||
| 976 | /* Start the decrementer on CPUs that have manual control | 1054 | /* Start the decrementer on CPUs that have manual control |
| 977 | * such as BookE | 1055 | * such as BookE |
| 978 | */ | 1056 | */ |
diff --git a/arch/powerpc/kernel/tm.S b/arch/powerpc/kernel/tm.S index b7019b559ddb..298afcf3bf2a 100644 --- a/arch/powerpc/kernel/tm.S +++ b/arch/powerpc/kernel/tm.S | |||
| @@ -338,8 +338,6 @@ _GLOBAL(__tm_recheckpoint) | |||
| 338 | */ | 338 | */ |
| 339 | subi r7, r7, STACK_FRAME_OVERHEAD | 339 | subi r7, r7, STACK_FRAME_OVERHEAD |
| 340 | 340 | ||
| 341 | SET_SCRATCH0(r1) | ||
| 342 | |||
| 343 | mfmsr r6 | 341 | mfmsr r6 |
| 344 | /* R4 = original MSR to indicate whether thread used FP/Vector etc. */ | 342 | /* R4 = original MSR to indicate whether thread used FP/Vector etc. */ |
| 345 | 343 | ||
| @@ -468,6 +466,7 @@ restore_gprs: | |||
| 468 | * until we turn MSR RI back on. | 466 | * until we turn MSR RI back on. |
| 469 | */ | 467 | */ |
| 470 | 468 | ||
| 469 | SET_SCRATCH0(r1) | ||
| 471 | ld r5, -8(r1) | 470 | ld r5, -8(r1) |
| 472 | ld r1, -16(r1) | 471 | ld r1, -16(r1) |
| 473 | 472 | ||
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c index 9229ba63c370..f7e2f2e318bd 100644 --- a/arch/powerpc/kernel/traps.c +++ b/arch/powerpc/kernel/traps.c | |||
| @@ -60,6 +60,7 @@ | |||
| 60 | #include <asm/switch_to.h> | 60 | #include <asm/switch_to.h> |
| 61 | #include <asm/tm.h> | 61 | #include <asm/tm.h> |
| 62 | #include <asm/debug.h> | 62 | #include <asm/debug.h> |
| 63 | #include <asm/asm-prototypes.h> | ||
| 63 | #include <sysdev/fsl_pci.h> | 64 | #include <sysdev/fsl_pci.h> |
| 64 | 65 | ||
| 65 | #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC) | 66 | #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC) |
| @@ -1376,6 +1377,7 @@ void facility_unavailable_exception(struct pt_regs *regs) | |||
| 1376 | [FSCR_TM_LG] = "TM", | 1377 | [FSCR_TM_LG] = "TM", |
| 1377 | [FSCR_EBB_LG] = "EBB", | 1378 | [FSCR_EBB_LG] = "EBB", |
| 1378 | [FSCR_TAR_LG] = "TAR", | 1379 | [FSCR_TAR_LG] = "TAR", |
| 1380 | [FSCR_LM_LG] = "LM", | ||
| 1379 | }; | 1381 | }; |
| 1380 | char *facility = "unknown"; | 1382 | char *facility = "unknown"; |
| 1381 | u64 value; | 1383 | u64 value; |
| @@ -1418,7 +1420,8 @@ void facility_unavailable_exception(struct pt_regs *regs) | |||
| 1418 | rd = (instword >> 21) & 0x1f; | 1420 | rd = (instword >> 21) & 0x1f; |
| 1419 | current->thread.dscr = regs->gpr[rd]; | 1421 | current->thread.dscr = regs->gpr[rd]; |
| 1420 | current->thread.dscr_inherit = 1; | 1422 | current->thread.dscr_inherit = 1; |
| 1421 | mtspr(SPRN_FSCR, value | FSCR_DSCR); | 1423 | current->thread.fscr |= FSCR_DSCR; |
| 1424 | mtspr(SPRN_FSCR, current->thread.fscr); | ||
| 1422 | } | 1425 | } |
| 1423 | 1426 | ||
| 1424 | /* Read from DSCR (mfspr RT, 0x03) */ | 1427 | /* Read from DSCR (mfspr RT, 0x03) */ |
| @@ -1432,6 +1435,14 @@ void facility_unavailable_exception(struct pt_regs *regs) | |||
| 1432 | emulate_single_step(regs); | 1435 | emulate_single_step(regs); |
| 1433 | } | 1436 | } |
| 1434 | return; | 1437 | return; |
| 1438 | } else if ((status == FSCR_LM_LG) && cpu_has_feature(CPU_FTR_ARCH_300)) { | ||
| 1439 | /* | ||
| 1440 | * This process has touched LM, so turn it on forever | ||
| 1441 | * for this process | ||
| 1442 | */ | ||
| 1443 | current->thread.fscr |= FSCR_LM; | ||
| 1444 | mtspr(SPRN_FSCR, current->thread.fscr); | ||
| 1445 | return; | ||
| 1435 | } | 1446 | } |
| 1436 | 1447 | ||
| 1437 | if ((status < ARRAY_SIZE(facility_strings)) && | 1448 | if ((status < ARRAY_SIZE(facility_strings)) && |
diff --git a/arch/powerpc/kernel/vector.S b/arch/powerpc/kernel/vector.S index 1c2e7a343bf5..616a6d854638 100644 --- a/arch/powerpc/kernel/vector.S +++ b/arch/powerpc/kernel/vector.S | |||
| @@ -70,10 +70,11 @@ _GLOBAL(load_up_altivec) | |||
| 70 | MTMSRD(r5) /* enable use of AltiVec now */ | 70 | MTMSRD(r5) /* enable use of AltiVec now */ |
| 71 | isync | 71 | isync |
| 72 | 72 | ||
| 73 | /* Hack: if we get an altivec unavailable trap with VRSAVE | 73 | /* |
| 74 | * set to all zeros, we assume this is a broken application | 74 | * While userspace in general ignores VRSAVE, glibc uses it as a boolean |
| 75 | * that fails to set it properly, and thus we switch it to | 75 | * to optimise userspace context save/restore. Whenever we take an |
| 76 | * all 1's | 76 | * altivec unavailable exception we must set VRSAVE to something non |
| 77 | * zero. Set it to all 1s. See also the programming note in the ISA. | ||
| 77 | */ | 78 | */ |
| 78 | mfspr r4,SPRN_VRSAVE | 79 | mfspr r4,SPRN_VRSAVE |
| 79 | cmpwi 0,r4,0 | 80 | cmpwi 0,r4,0 |
diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S index 2dd91f79de05..b5fba689fca6 100644 --- a/arch/powerpc/kernel/vmlinux.lds.S +++ b/arch/powerpc/kernel/vmlinux.lds.S | |||
| @@ -165,7 +165,7 @@ SECTIONS | |||
| 165 | . = ALIGN(8); | 165 | . = ALIGN(8); |
| 166 | .dynsym : AT(ADDR(.dynsym) - LOAD_OFFSET) | 166 | .dynsym : AT(ADDR(.dynsym) - LOAD_OFFSET) |
| 167 | { | 167 | { |
| 168 | #ifdef CONFIG_RELOCATABLE_PPC32 | 168 | #ifdef CONFIG_PPC32 |
| 169 | __dynamic_symtab = .; | 169 | __dynamic_symtab = .; |
| 170 | #endif | 170 | #endif |
| 171 | *(.dynsym) | 171 | *(.dynsym) |
diff --git a/arch/powerpc/kvm/book3s_64_mmu_host.c b/arch/powerpc/kvm/book3s_64_mmu_host.c index 114edace6cdd..a587e8f4fd26 100644 --- a/arch/powerpc/kvm/book3s_64_mmu_host.c +++ b/arch/powerpc/kvm/book3s_64_mmu_host.c | |||
| @@ -34,9 +34,9 @@ | |||
| 34 | 34 | ||
| 35 | void kvmppc_mmu_invalidate_pte(struct kvm_vcpu *vcpu, struct hpte_cache *pte) | 35 | void kvmppc_mmu_invalidate_pte(struct kvm_vcpu *vcpu, struct hpte_cache *pte) |
| 36 | { | 36 | { |
| 37 | ppc_md.hpte_invalidate(pte->slot, pte->host_vpn, | 37 | mmu_hash_ops.hpte_invalidate(pte->slot, pte->host_vpn, |
| 38 | pte->pagesize, pte->pagesize, MMU_SEGSIZE_256M, | 38 | pte->pagesize, pte->pagesize, |
| 39 | false); | 39 | MMU_SEGSIZE_256M, false); |
| 40 | } | 40 | } |
| 41 | 41 | ||
| 42 | /* We keep 512 gvsid->hvsid entries, mapping the guest ones to the array using | 42 | /* We keep 512 gvsid->hvsid entries, mapping the guest ones to the array using |
| @@ -169,13 +169,13 @@ map_again: | |||
| 169 | 169 | ||
| 170 | /* In case we tried normal mapping already, let's nuke old entries */ | 170 | /* In case we tried normal mapping already, let's nuke old entries */ |
| 171 | if (attempt > 1) | 171 | if (attempt > 1) |
| 172 | if (ppc_md.hpte_remove(hpteg) < 0) { | 172 | if (mmu_hash_ops.hpte_remove(hpteg) < 0) { |
| 173 | r = -1; | 173 | r = -1; |
| 174 | goto out_unlock; | 174 | goto out_unlock; |
| 175 | } | 175 | } |
| 176 | 176 | ||
| 177 | ret = ppc_md.hpte_insert(hpteg, vpn, hpaddr, rflags, vflags, | 177 | ret = mmu_hash_ops.hpte_insert(hpteg, vpn, hpaddr, rflags, vflags, |
| 178 | hpsize, hpsize, MMU_SEGSIZE_256M); | 178 | hpsize, hpsize, MMU_SEGSIZE_256M); |
| 179 | 179 | ||
| 180 | if (ret < 0) { | 180 | if (ret < 0) { |
| 181 | /* If we couldn't map a primary PTE, try a secondary */ | 181 | /* If we couldn't map a primary PTE, try a secondary */ |
| @@ -187,8 +187,10 @@ map_again: | |||
| 187 | trace_kvm_book3s_64_mmu_map(rflags, hpteg, | 187 | trace_kvm_book3s_64_mmu_map(rflags, hpteg, |
| 188 | vpn, hpaddr, orig_pte); | 188 | vpn, hpaddr, orig_pte); |
| 189 | 189 | ||
| 190 | /* The ppc_md code may give us a secondary entry even though we | 190 | /* |
| 191 | asked for a primary. Fix up. */ | 191 | * The mmu_hash_ops code may give us a secondary entry even |
| 192 | * though we asked for a primary. Fix up. | ||
| 193 | */ | ||
| 192 | if ((ret & _PTEIDX_SECONDARY) && !(vflags & HPTE_V_SECONDARY)) { | 194 | if ((ret & _PTEIDX_SECONDARY) && !(vflags & HPTE_V_SECONDARY)) { |
| 193 | hash = ~hash; | 195 | hash = ~hash; |
| 194 | hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP); | 196 | hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP); |
diff --git a/arch/powerpc/kvm/book3s_64_vio.c b/arch/powerpc/kvm/book3s_64_vio.c index 18cf6d1f8174..c379ff5a4438 100644 --- a/arch/powerpc/kvm/book3s_64_vio.c +++ b/arch/powerpc/kvm/book3s_64_vio.c | |||
| @@ -242,7 +242,8 @@ long kvmppc_h_put_tce_indirect(struct kvm_vcpu *vcpu, | |||
| 242 | struct kvmppc_spapr_tce_table *stt; | 242 | struct kvmppc_spapr_tce_table *stt; |
| 243 | long i, ret = H_SUCCESS, idx; | 243 | long i, ret = H_SUCCESS, idx; |
| 244 | unsigned long entry, ua = 0; | 244 | unsigned long entry, ua = 0; |
| 245 | u64 __user *tces, tce; | 245 | u64 __user *tces; |
| 246 | u64 tce; | ||
| 246 | 247 | ||
| 247 | stt = kvmppc_find_table(vcpu, liobn); | 248 | stt = kvmppc_find_table(vcpu, liobn); |
| 248 | if (!stt) | 249 | if (!stt) |
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S index e571ad277398..86f0cae37a85 100644 --- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S +++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S | |||
| @@ -392,7 +392,7 @@ kvm_no_guest: | |||
| 392 | cmpwi r3, 0 | 392 | cmpwi r3, 0 |
| 393 | bne 54f | 393 | bne 54f |
| 394 | /* | 394 | /* |
| 395 | * We jump to power7_wakeup_loss, which will return to the caller | 395 | * We jump to pnv_wakeup_loss, which will return to the caller |
| 396 | * of power7_nap in the powernv cpu offline loop. The value we | 396 | * of power7_nap in the powernv cpu offline loop. The value we |
| 397 | * put in r3 becomes the return value for power7_nap. | 397 | * put in r3 becomes the return value for power7_nap. |
| 398 | */ | 398 | */ |
| @@ -401,7 +401,7 @@ kvm_no_guest: | |||
| 401 | rlwimi r4, r3, 0, LPCR_PECE0 | LPCR_PECE1 | 401 | rlwimi r4, r3, 0, LPCR_PECE0 | LPCR_PECE1 |
| 402 | mtspr SPRN_LPCR, r4 | 402 | mtspr SPRN_LPCR, r4 |
| 403 | li r3, 0 | 403 | li r3, 0 |
| 404 | b power7_wakeup_loss | 404 | b pnv_wakeup_loss |
| 405 | 405 | ||
| 406 | 53: HMT_LOW | 406 | 53: HMT_LOW |
| 407 | ld r5, HSTATE_KVM_VCORE(r13) | 407 | ld r5, HSTATE_KVM_VCORE(r13) |
diff --git a/arch/powerpc/kvm/book3s_interrupts.S b/arch/powerpc/kvm/book3s_interrupts.S index d044b8b7c69d..901e6fe00c39 100644 --- a/arch/powerpc/kvm/book3s_interrupts.S +++ b/arch/powerpc/kvm/book3s_interrupts.S | |||
| @@ -25,7 +25,7 @@ | |||
| 25 | #include <asm/exception-64s.h> | 25 | #include <asm/exception-64s.h> |
| 26 | 26 | ||
| 27 | #if defined(CONFIG_PPC_BOOK3S_64) | 27 | #if defined(CONFIG_PPC_BOOK3S_64) |
| 28 | #if defined(_CALL_ELF) && _CALL_ELF == 2 | 28 | #ifdef PPC64_ELF_ABI_v2 |
| 29 | #define FUNC(name) name | 29 | #define FUNC(name) name |
| 30 | #else | 30 | #else |
| 31 | #define FUNC(name) GLUE(.,name) | 31 | #define FUNC(name) GLUE(.,name) |
diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c index 8e4f64f0b774..c4f7d6b86b9e 100644 --- a/arch/powerpc/kvm/book3s_pr.c +++ b/arch/powerpc/kvm/book3s_pr.c | |||
| @@ -35,7 +35,7 @@ | |||
| 35 | #include <asm/mmu_context.h> | 35 | #include <asm/mmu_context.h> |
| 36 | #include <asm/switch_to.h> | 36 | #include <asm/switch_to.h> |
| 37 | #include <asm/firmware.h> | 37 | #include <asm/firmware.h> |
| 38 | #include <asm/hvcall.h> | 38 | #include <asm/setup.h> |
| 39 | #include <linux/gfp.h> | 39 | #include <linux/gfp.h> |
| 40 | #include <linux/sched.h> | 40 | #include <linux/sched.h> |
| 41 | #include <linux/vmalloc.h> | 41 | #include <linux/vmalloc.h> |
| @@ -1690,7 +1690,7 @@ static int kvmppc_core_init_vm_pr(struct kvm *kvm) | |||
| 1690 | if (firmware_has_feature(FW_FEATURE_SET_MODE)) { | 1690 | if (firmware_has_feature(FW_FEATURE_SET_MODE)) { |
| 1691 | spin_lock(&kvm_global_user_count_lock); | 1691 | spin_lock(&kvm_global_user_count_lock); |
| 1692 | if (++kvm_global_user_count == 1) | 1692 | if (++kvm_global_user_count == 1) |
| 1693 | pSeries_disable_reloc_on_exc(); | 1693 | pseries_disable_reloc_on_exc(); |
| 1694 | spin_unlock(&kvm_global_user_count_lock); | 1694 | spin_unlock(&kvm_global_user_count_lock); |
| 1695 | } | 1695 | } |
| 1696 | return 0; | 1696 | return 0; |
| @@ -1706,7 +1706,7 @@ static void kvmppc_core_destroy_vm_pr(struct kvm *kvm) | |||
| 1706 | spin_lock(&kvm_global_user_count_lock); | 1706 | spin_lock(&kvm_global_user_count_lock); |
| 1707 | BUG_ON(kvm_global_user_count == 0); | 1707 | BUG_ON(kvm_global_user_count == 0); |
| 1708 | if (--kvm_global_user_count == 0) | 1708 | if (--kvm_global_user_count == 0) |
| 1709 | pSeries_enable_reloc_on_exc(); | 1709 | pseries_enable_reloc_on_exc(); |
| 1710 | spin_unlock(&kvm_global_user_count_lock); | 1710 | spin_unlock(&kvm_global_user_count_lock); |
| 1711 | } | 1711 | } |
| 1712 | } | 1712 | } |
diff --git a/arch/powerpc/kvm/book3s_rmhandlers.S b/arch/powerpc/kvm/book3s_rmhandlers.S index 16c4d88ba27d..42a4b237df5f 100644 --- a/arch/powerpc/kvm/book3s_rmhandlers.S +++ b/arch/powerpc/kvm/book3s_rmhandlers.S | |||
| @@ -36,7 +36,7 @@ | |||
| 36 | 36 | ||
| 37 | #if defined(CONFIG_PPC_BOOK3S_64) | 37 | #if defined(CONFIG_PPC_BOOK3S_64) |
| 38 | 38 | ||
| 39 | #if defined(_CALL_ELF) && _CALL_ELF == 2 | 39 | #ifdef PPC64_ELF_ABI_v2 |
| 40 | #define FUNC(name) name | 40 | #define FUNC(name) name |
| 41 | #else | 41 | #else |
| 42 | #define FUNC(name) GLUE(.,name) | 42 | #define FUNC(name) GLUE(.,name) |
diff --git a/arch/powerpc/lib/checksum_64.S b/arch/powerpc/lib/checksum_64.S index 8e6e51016cc5..fdec6e613e95 100644 --- a/arch/powerpc/lib/checksum_64.S +++ b/arch/powerpc/lib/checksum_64.S | |||
| @@ -74,9 +74,9 @@ _GLOBAL(__csum_partial) | |||
| 74 | ld r11,24(r3) | 74 | ld r11,24(r3) |
| 75 | 75 | ||
| 76 | /* | 76 | /* |
| 77 | * On POWER6 and POWER7 back to back addes take 2 cycles because of | 77 | * On POWER6 and POWER7 back to back adde instructions take 2 cycles |
| 78 | * the XER dependency. This means the fastest this loop can go is | 78 | * because of the XER dependency. This means the fastest this loop can |
| 79 | * 16 cycles per iteration. The scheduling of the loop below has | 79 | * go is 16 cycles per iteration. The scheduling of the loop below has |
| 80 | * been shown to hit this on both POWER6 and POWER7. | 80 | * been shown to hit this on both POWER6 and POWER7. |
| 81 | */ | 81 | */ |
| 82 | .align 5 | 82 | .align 5 |
| @@ -275,9 +275,9 @@ source; ld r10,16(r3) | |||
| 275 | source; ld r11,24(r3) | 275 | source; ld r11,24(r3) |
| 276 | 276 | ||
| 277 | /* | 277 | /* |
| 278 | * On POWER6 and POWER7 back to back addes take 2 cycles because of | 278 | * On POWER6 and POWER7 back to back adde instructions take 2 cycles |
| 279 | * the XER dependency. This means the fastest this loop can go is | 279 | * because of the XER dependency. This means the fastest this loop can |
| 280 | * 16 cycles per iteration. The scheduling of the loop below has | 280 | * go is 16 cycles per iteration. The scheduling of the loop below has |
| 281 | * been shown to hit this on both POWER6 and POWER7. | 281 | * been shown to hit this on both POWER6 and POWER7. |
| 282 | */ | 282 | */ |
| 283 | .align 5 | 283 | .align 5 |
diff --git a/arch/powerpc/lib/feature-fixups.c b/arch/powerpc/lib/feature-fixups.c index 7ce3870d7ddd..defb2998b818 100644 --- a/arch/powerpc/lib/feature-fixups.c +++ b/arch/powerpc/lib/feature-fixups.c | |||
| @@ -20,7 +20,8 @@ | |||
| 20 | #include <asm/code-patching.h> | 20 | #include <asm/code-patching.h> |
| 21 | #include <asm/page.h> | 21 | #include <asm/page.h> |
| 22 | #include <asm/sections.h> | 22 | #include <asm/sections.h> |
| 23 | 23 | #include <asm/setup.h> | |
| 24 | #include <asm/firmware.h> | ||
| 24 | 25 | ||
| 25 | struct fixup_entry { | 26 | struct fixup_entry { |
| 26 | unsigned long mask; | 27 | unsigned long mask; |
| @@ -130,7 +131,7 @@ void do_lwsync_fixups(unsigned long value, void *fixup_start, void *fixup_end) | |||
| 130 | } | 131 | } |
| 131 | } | 132 | } |
| 132 | 133 | ||
| 133 | void do_final_fixups(void) | 134 | static void do_final_fixups(void) |
| 134 | { | 135 | { |
| 135 | #if defined(CONFIG_PPC64) && defined(CONFIG_RELOCATABLE) | 136 | #if defined(CONFIG_PPC64) && defined(CONFIG_RELOCATABLE) |
| 136 | int *src, *dest; | 137 | int *src, *dest; |
| @@ -151,6 +152,33 @@ void do_final_fixups(void) | |||
| 151 | #endif | 152 | #endif |
| 152 | } | 153 | } |
| 153 | 154 | ||
| 155 | void apply_feature_fixups(void) | ||
| 156 | { | ||
| 157 | struct cpu_spec *spec = *PTRRELOC(&cur_cpu_spec); | ||
| 158 | |||
| 159 | /* | ||
| 160 | * Apply the CPU-specific and firmware specific fixups to kernel text | ||
| 161 | * (nop out sections not relevant to this CPU or this firmware). | ||
| 162 | */ | ||
| 163 | do_feature_fixups(spec->cpu_features, | ||
| 164 | PTRRELOC(&__start___ftr_fixup), | ||
| 165 | PTRRELOC(&__stop___ftr_fixup)); | ||
| 166 | |||
| 167 | do_feature_fixups(spec->mmu_features, | ||
| 168 | PTRRELOC(&__start___mmu_ftr_fixup), | ||
| 169 | PTRRELOC(&__stop___mmu_ftr_fixup)); | ||
| 170 | |||
| 171 | do_lwsync_fixups(spec->cpu_features, | ||
| 172 | PTRRELOC(&__start___lwsync_fixup), | ||
| 173 | PTRRELOC(&__stop___lwsync_fixup)); | ||
| 174 | |||
| 175 | #ifdef CONFIG_PPC64 | ||
| 176 | do_feature_fixups(powerpc_firmware_features, | ||
| 177 | &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup); | ||
| 178 | #endif | ||
| 179 | do_final_fixups(); | ||
| 180 | } | ||
| 181 | |||
| 154 | #ifdef CONFIG_FTR_FIXUP_SELFTEST | 182 | #ifdef CONFIG_FTR_FIXUP_SELFTEST |
| 155 | 183 | ||
| 156 | #define check(x) \ | 184 | #define check(x) \ |
diff --git a/arch/powerpc/lib/locks.c b/arch/powerpc/lib/locks.c index f7deebdf3365..b7b1237d4aa6 100644 --- a/arch/powerpc/lib/locks.c +++ b/arch/powerpc/lib/locks.c | |||
| @@ -68,19 +68,3 @@ void __rw_yield(arch_rwlock_t *rw) | |||
| 68 | get_hard_smp_processor_id(holder_cpu), yield_count); | 68 | get_hard_smp_processor_id(holder_cpu), yield_count); |
| 69 | } | 69 | } |
| 70 | #endif | 70 | #endif |
| 71 | |||
| 72 | void arch_spin_unlock_wait(arch_spinlock_t *lock) | ||
| 73 | { | ||
| 74 | smp_mb(); | ||
| 75 | |||
| 76 | while (lock->slock) { | ||
| 77 | HMT_low(); | ||
| 78 | if (SHARED_PROCESSOR) | ||
| 79 | __spin_yield(lock); | ||
| 80 | } | ||
| 81 | HMT_medium(); | ||
| 82 | |||
| 83 | smp_mb(); | ||
| 84 | } | ||
| 85 | |||
| 86 | EXPORT_SYMBOL(arch_spin_unlock_wait); | ||
diff --git a/arch/powerpc/lib/ppc_ksyms.c b/arch/powerpc/lib/ppc_ksyms.c index c422812f7405..ae69d846a841 100644 --- a/arch/powerpc/lib/ppc_ksyms.c +++ b/arch/powerpc/lib/ppc_ksyms.c | |||
| @@ -9,11 +9,7 @@ EXPORT_SYMBOL(memmove); | |||
| 9 | EXPORT_SYMBOL(memcmp); | 9 | EXPORT_SYMBOL(memcmp); |
| 10 | EXPORT_SYMBOL(memchr); | 10 | EXPORT_SYMBOL(memchr); |
| 11 | 11 | ||
| 12 | EXPORT_SYMBOL(strcpy); | ||
| 13 | EXPORT_SYMBOL(strncpy); | 12 | EXPORT_SYMBOL(strncpy); |
| 14 | EXPORT_SYMBOL(strcat); | ||
| 15 | EXPORT_SYMBOL(strlen); | ||
| 16 | EXPORT_SYMBOL(strcmp); | ||
| 17 | EXPORT_SYMBOL(strncmp); | 13 | EXPORT_SYMBOL(strncmp); |
| 18 | 14 | ||
| 19 | #ifndef CONFIG_GENERIC_CSUM | 15 | #ifndef CONFIG_GENERIC_CSUM |
diff --git a/arch/powerpc/lib/rheap.c b/arch/powerpc/lib/rheap.c index 69abf844c2c3..94058c21a482 100644 --- a/arch/powerpc/lib/rheap.c +++ b/arch/powerpc/lib/rheap.c | |||
| @@ -325,7 +325,7 @@ void rh_init(rh_info_t * info, unsigned int alignment, int max_blocks, | |||
| 325 | } | 325 | } |
| 326 | EXPORT_SYMBOL_GPL(rh_init); | 326 | EXPORT_SYMBOL_GPL(rh_init); |
| 327 | 327 | ||
| 328 | /* Attach a free memory region, coalesces regions if adjuscent */ | 328 | /* Attach a free memory region, coalesces regions if adjacent */ |
| 329 | int rh_attach_region(rh_info_t * info, unsigned long start, int size) | 329 | int rh_attach_region(rh_info_t * info, unsigned long start, int size) |
| 330 | { | 330 | { |
| 331 | rh_block_t *blk; | 331 | rh_block_t *blk; |
diff --git a/arch/powerpc/lib/string.S b/arch/powerpc/lib/string.S index c80fb49ce607..beabc68d9a1e 100644 --- a/arch/powerpc/lib/string.S +++ b/arch/powerpc/lib/string.S | |||
| @@ -16,15 +16,6 @@ | |||
| 16 | PPC_LONG_ALIGN | 16 | PPC_LONG_ALIGN |
| 17 | .text | 17 | .text |
| 18 | 18 | ||
| 19 | _GLOBAL(strcpy) | ||
| 20 | addi r5,r3,-1 | ||
| 21 | addi r4,r4,-1 | ||
| 22 | 1: lbzu r0,1(r4) | ||
| 23 | cmpwi 0,r0,0 | ||
| 24 | stbu r0,1(r5) | ||
| 25 | bne 1b | ||
| 26 | blr | ||
| 27 | |||
| 28 | /* This clears out any unused part of the destination buffer, | 19 | /* This clears out any unused part of the destination buffer, |
| 29 | just as the libc version does. -- paulus */ | 20 | just as the libc version does. -- paulus */ |
| 30 | _GLOBAL(strncpy) | 21 | _GLOBAL(strncpy) |
| @@ -33,6 +24,7 @@ _GLOBAL(strncpy) | |||
| 33 | mtctr r5 | 24 | mtctr r5 |
| 34 | addi r6,r3,-1 | 25 | addi r6,r3,-1 |
| 35 | addi r4,r4,-1 | 26 | addi r4,r4,-1 |
| 27 | .balign 16 | ||
| 36 | 1: lbzu r0,1(r4) | 28 | 1: lbzu r0,1(r4) |
| 37 | cmpwi 0,r0,0 | 29 | cmpwi 0,r0,0 |
| 38 | stbu r0,1(r6) | 30 | stbu r0,1(r6) |
| @@ -45,36 +37,13 @@ _GLOBAL(strncpy) | |||
| 45 | bdnz 2b | 37 | bdnz 2b |
| 46 | blr | 38 | blr |
| 47 | 39 | ||
| 48 | _GLOBAL(strcat) | ||
| 49 | addi r5,r3,-1 | ||
| 50 | addi r4,r4,-1 | ||
| 51 | 1: lbzu r0,1(r5) | ||
| 52 | cmpwi 0,r0,0 | ||
| 53 | bne 1b | ||
| 54 | addi r5,r5,-1 | ||
| 55 | 1: lbzu r0,1(r4) | ||
| 56 | cmpwi 0,r0,0 | ||
| 57 | stbu r0,1(r5) | ||
| 58 | bne 1b | ||
| 59 | blr | ||
| 60 | |||
| 61 | _GLOBAL(strcmp) | ||
| 62 | addi r5,r3,-1 | ||
| 63 | addi r4,r4,-1 | ||
| 64 | 1: lbzu r3,1(r5) | ||
| 65 | cmpwi 1,r3,0 | ||
| 66 | lbzu r0,1(r4) | ||
| 67 | subf. r3,r0,r3 | ||
| 68 | beqlr 1 | ||
| 69 | beq 1b | ||
| 70 | blr | ||
| 71 | |||
| 72 | _GLOBAL(strncmp) | 40 | _GLOBAL(strncmp) |
| 73 | PPC_LCMPI 0,r5,0 | 41 | PPC_LCMPI 0,r5,0 |
| 74 | beq- 2f | 42 | beq- 2f |
| 75 | mtctr r5 | 43 | mtctr r5 |
| 76 | addi r5,r3,-1 | 44 | addi r5,r3,-1 |
| 77 | addi r4,r4,-1 | 45 | addi r4,r4,-1 |
| 46 | .balign 16 | ||
| 78 | 1: lbzu r3,1(r5) | 47 | 1: lbzu r3,1(r5) |
| 79 | cmpwi 1,r3,0 | 48 | cmpwi 1,r3,0 |
| 80 | lbzu r0,1(r4) | 49 | lbzu r0,1(r4) |
| @@ -85,14 +54,6 @@ _GLOBAL(strncmp) | |||
| 85 | 2: li r3,0 | 54 | 2: li r3,0 |
| 86 | blr | 55 | blr |
| 87 | 56 | ||
| 88 | _GLOBAL(strlen) | ||
| 89 | addi r4,r3,-1 | ||
| 90 | 1: lbzu r0,1(r4) | ||
| 91 | cmpwi 0,r0,0 | ||
| 92 | bne 1b | ||
| 93 | subf r3,r3,r4 | ||
| 94 | blr | ||
| 95 | |||
| 96 | #ifdef CONFIG_PPC32 | 57 | #ifdef CONFIG_PPC32 |
| 97 | _GLOBAL(memcmp) | 58 | _GLOBAL(memcmp) |
| 98 | PPC_LCMPI 0,r5,0 | 59 | PPC_LCMPI 0,r5,0 |
| @@ -114,6 +75,7 @@ _GLOBAL(memchr) | |||
| 114 | beq- 2f | 75 | beq- 2f |
| 115 | mtctr r5 | 76 | mtctr r5 |
| 116 | addi r3,r3,-1 | 77 | addi r3,r3,-1 |
| 78 | .balign 16 | ||
| 117 | 1: lbzu r0,1(r3) | 79 | 1: lbzu r0,1(r3) |
| 118 | cmpw 0,r0,r4 | 80 | cmpw 0,r0,r4 |
| 119 | bdnzf 2,1b | 81 | bdnzf 2,1b |
diff --git a/arch/powerpc/lib/vmx-helper.c b/arch/powerpc/lib/vmx-helper.c index b27e030fc9f8..bf925cdcaca9 100644 --- a/arch/powerpc/lib/vmx-helper.c +++ b/arch/powerpc/lib/vmx-helper.c | |||
| @@ -21,6 +21,7 @@ | |||
| 21 | #include <linux/uaccess.h> | 21 | #include <linux/uaccess.h> |
| 22 | #include <linux/hardirq.h> | 22 | #include <linux/hardirq.h> |
| 23 | #include <asm/switch_to.h> | 23 | #include <asm/switch_to.h> |
| 24 | #include <asm/asm-prototypes.h> | ||
| 24 | 25 | ||
| 25 | int enter_vmx_usercopy(void) | 26 | int enter_vmx_usercopy(void) |
| 26 | { | 27 | { |
diff --git a/arch/powerpc/mm/8xx_mmu.c b/arch/powerpc/mm/8xx_mmu.c index 949100577db5..6c5025e81236 100644 --- a/arch/powerpc/mm/8xx_mmu.c +++ b/arch/powerpc/mm/8xx_mmu.c | |||
| @@ -13,62 +13,115 @@ | |||
| 13 | */ | 13 | */ |
| 14 | 14 | ||
| 15 | #include <linux/memblock.h> | 15 | #include <linux/memblock.h> |
| 16 | #include <asm/fixmap.h> | ||
| 17 | #include <asm/code-patching.h> | ||
| 16 | 18 | ||
| 17 | #include "mmu_decl.h" | 19 | #include "mmu_decl.h" |
| 18 | 20 | ||
| 21 | #define IMMR_SIZE (FIX_IMMR_SIZE << PAGE_SHIFT) | ||
| 22 | |||
| 19 | extern int __map_without_ltlbs; | 23 | extern int __map_without_ltlbs; |
| 24 | |||
| 20 | /* | 25 | /* |
| 21 | * MMU_init_hw does the chip-specific initialization of the MMU hardware. | 26 | * Return PA for this VA if it is in IMMR area, or 0 |
| 22 | */ | 27 | */ |
| 23 | void __init MMU_init_hw(void) | 28 | phys_addr_t v_block_mapped(unsigned long va) |
| 24 | { | 29 | { |
| 25 | /* Nothing to do for the time being but keep it similar to other PPC */ | 30 | unsigned long p = PHYS_IMMR_BASE; |
| 31 | |||
| 32 | if (__map_without_ltlbs) | ||
| 33 | return 0; | ||
| 34 | if (va >= VIRT_IMMR_BASE && va < VIRT_IMMR_BASE + IMMR_SIZE) | ||
| 35 | return p + va - VIRT_IMMR_BASE; | ||
| 36 | return 0; | ||
| 37 | } | ||
| 38 | |||
| 39 | /* | ||
| 40 | * Return VA for a given PA or 0 if not mapped | ||
| 41 | */ | ||
| 42 | unsigned long p_block_mapped(phys_addr_t pa) | ||
| 43 | { | ||
| 44 | unsigned long p = PHYS_IMMR_BASE; | ||
| 45 | |||
| 46 | if (__map_without_ltlbs) | ||
| 47 | return 0; | ||
| 48 | if (pa >= p && pa < p + IMMR_SIZE) | ||
| 49 | return VIRT_IMMR_BASE + pa - p; | ||
| 50 | return 0; | ||
| 26 | } | 51 | } |
| 27 | 52 | ||
| 28 | #define LARGE_PAGE_SIZE_4M (1<<22) | ||
| 29 | #define LARGE_PAGE_SIZE_8M (1<<23) | 53 | #define LARGE_PAGE_SIZE_8M (1<<23) |
| 30 | #define LARGE_PAGE_SIZE_64M (1<<26) | ||
| 31 | 54 | ||
| 32 | unsigned long __init mmu_mapin_ram(unsigned long top) | 55 | /* |
| 56 | * MMU_init_hw does the chip-specific initialization of the MMU hardware. | ||
| 57 | */ | ||
| 58 | void __init MMU_init_hw(void) | ||
| 33 | { | 59 | { |
| 34 | unsigned long v, s, mapped; | 60 | /* PIN up to the 3 first 8Mb after IMMR in DTLB table */ |
| 35 | phys_addr_t p; | 61 | #ifdef CONFIG_PIN_TLB |
| 62 | unsigned long ctr = mfspr(SPRN_MD_CTR) & 0xfe000000; | ||
| 63 | unsigned long flags = 0xf0 | MD_SPS16K | _PAGE_SHARED | _PAGE_DIRTY; | ||
| 64 | #ifdef CONFIG_PIN_TLB_IMMR | ||
| 65 | int i = 29; | ||
| 66 | #else | ||
| 67 | int i = 28; | ||
| 68 | #endif | ||
| 69 | unsigned long addr = 0; | ||
| 70 | unsigned long mem = total_lowmem; | ||
| 71 | |||
| 72 | for (; i < 32 && mem >= LARGE_PAGE_SIZE_8M; i++) { | ||
| 73 | mtspr(SPRN_MD_CTR, ctr | (i << 8)); | ||
| 74 | mtspr(SPRN_MD_EPN, (unsigned long)__va(addr) | MD_EVALID); | ||
| 75 | mtspr(SPRN_MD_TWC, MD_PS8MEG | MD_SVALID); | ||
| 76 | mtspr(SPRN_MD_RPN, addr | flags | _PAGE_PRESENT); | ||
| 77 | addr += LARGE_PAGE_SIZE_8M; | ||
| 78 | mem -= LARGE_PAGE_SIZE_8M; | ||
| 79 | } | ||
| 80 | #endif | ||
| 81 | } | ||
| 36 | 82 | ||
| 37 | v = KERNELBASE; | 83 | static void mmu_mapin_immr(void) |
| 38 | p = 0; | 84 | { |
| 39 | s = top; | 85 | unsigned long p = PHYS_IMMR_BASE; |
| 86 | unsigned long v = VIRT_IMMR_BASE; | ||
| 87 | unsigned long f = pgprot_val(PAGE_KERNEL_NCG); | ||
| 88 | int offset; | ||
| 40 | 89 | ||
| 41 | if (__map_without_ltlbs) | 90 | for (offset = 0; offset < IMMR_SIZE; offset += PAGE_SIZE) |
| 42 | return 0; | 91 | map_page(v + offset, p + offset, f); |
| 92 | } | ||
| 43 | 93 | ||
| 44 | #ifdef CONFIG_PPC_4K_PAGES | 94 | /* Address of instructions to patch */ |
| 45 | while (s >= LARGE_PAGE_SIZE_8M) { | 95 | #ifndef CONFIG_PIN_TLB_IMMR |
| 46 | pmd_t *pmdp; | 96 | extern unsigned int DTLBMiss_jmp; |
| 47 | unsigned long val = p | MD_PS8MEG; | 97 | #endif |
| 98 | extern unsigned int DTLBMiss_cmp, FixupDAR_cmp; | ||
| 48 | 99 | ||
| 49 | pmdp = pmd_offset(pud_offset(pgd_offset_k(v), v), v); | 100 | void mmu_patch_cmp_limit(unsigned int *addr, unsigned long mapped) |
| 50 | *pmdp++ = __pmd(val); | 101 | { |
| 51 | *pmdp++ = __pmd(val + LARGE_PAGE_SIZE_4M); | 102 | unsigned int instr = *addr; |
| 52 | 103 | ||
| 53 | v += LARGE_PAGE_SIZE_8M; | 104 | instr &= 0xffff0000; |
| 54 | p += LARGE_PAGE_SIZE_8M; | 105 | instr |= (unsigned long)__va(mapped) >> 16; |
| 55 | s -= LARGE_PAGE_SIZE_8M; | 106 | patch_instruction(addr, instr); |
| 56 | } | 107 | } |
| 57 | #else /* CONFIG_PPC_16K_PAGES */ | ||
| 58 | while (s >= LARGE_PAGE_SIZE_64M) { | ||
| 59 | pmd_t *pmdp; | ||
| 60 | unsigned long val = p | MD_PS8MEG; | ||
| 61 | 108 | ||
| 62 | pmdp = pmd_offset(pud_offset(pgd_offset_k(v), v), v); | 109 | unsigned long __init mmu_mapin_ram(unsigned long top) |
| 63 | *pmdp++ = __pmd(val); | 110 | { |
| 111 | unsigned long mapped; | ||
| 64 | 112 | ||
| 65 | v += LARGE_PAGE_SIZE_64M; | 113 | if (__map_without_ltlbs) { |
| 66 | p += LARGE_PAGE_SIZE_64M; | 114 | mapped = 0; |
| 67 | s -= LARGE_PAGE_SIZE_64M; | 115 | mmu_mapin_immr(); |
| 68 | } | 116 | #ifndef CONFIG_PIN_TLB_IMMR |
| 117 | patch_instruction(&DTLBMiss_jmp, PPC_INST_NOP); | ||
| 69 | #endif | 118 | #endif |
| 119 | } else { | ||
| 120 | mapped = top & ~(LARGE_PAGE_SIZE_8M - 1); | ||
| 121 | } | ||
| 70 | 122 | ||
| 71 | mapped = top - s; | 123 | mmu_patch_cmp_limit(&DTLBMiss_cmp, mapped); |
| 124 | mmu_patch_cmp_limit(&FixupDAR_cmp, mapped); | ||
| 72 | 125 | ||
| 73 | /* If the size of RAM is not an exact power of two, we may not | 126 | /* If the size of RAM is not an exact power of two, we may not |
| 74 | * have covered RAM in its entirety with 8 MiB | 127 | * have covered RAM in its entirety with 8 MiB |
| @@ -77,7 +130,8 @@ unsigned long __init mmu_mapin_ram(unsigned long top) | |||
| 77 | * coverage with normal-sized pages (or other reasons) do not | 130 | * coverage with normal-sized pages (or other reasons) do not |
| 78 | * attempt to allocate outside the allowed range. | 131 | * attempt to allocate outside the allowed range. |
| 79 | */ | 132 | */ |
| 80 | memblock_set_current_limit(mapped); | 133 | if (mapped) |
| 134 | memblock_set_current_limit(mapped); | ||
| 81 | 135 | ||
| 82 | return mapped; | 136 | return mapped; |
| 83 | } | 137 | } |
| @@ -90,13 +144,8 @@ void setup_initial_memory_limit(phys_addr_t first_memblock_base, | |||
| 90 | */ | 144 | */ |
| 91 | BUG_ON(first_memblock_base != 0); | 145 | BUG_ON(first_memblock_base != 0); |
| 92 | 146 | ||
| 93 | #ifdef CONFIG_PIN_TLB | ||
| 94 | /* 8xx can only access 24MB at the moment */ | 147 | /* 8xx can only access 24MB at the moment */ |
| 95 | memblock_set_current_limit(min_t(u64, first_memblock_size, 0x01800000)); | 148 | memblock_set_current_limit(min_t(u64, first_memblock_size, 0x01800000)); |
| 96 | #else | ||
| 97 | /* 8xx can only access 8MB at the moment */ | ||
| 98 | memblock_set_current_limit(min_t(u64, first_memblock_size, 0x00800000)); | ||
| 99 | #endif | ||
| 100 | } | 149 | } |
| 101 | 150 | ||
| 102 | /* | 151 | /* |
diff --git a/arch/powerpc/mm/hash64_4k.c b/arch/powerpc/mm/hash64_4k.c index 6333b273d2d5..42c702b3be1f 100644 --- a/arch/powerpc/mm/hash64_4k.c +++ b/arch/powerpc/mm/hash64_4k.c | |||
| @@ -70,8 +70,8 @@ int __hash_page_4K(unsigned long ea, unsigned long access, unsigned long vsid, | |||
| 70 | slot = (hash & htab_hash_mask) * HPTES_PER_GROUP; | 70 | slot = (hash & htab_hash_mask) * HPTES_PER_GROUP; |
| 71 | slot += (old_pte & H_PAGE_F_GIX) >> H_PAGE_F_GIX_SHIFT; | 71 | slot += (old_pte & H_PAGE_F_GIX) >> H_PAGE_F_GIX_SHIFT; |
| 72 | 72 | ||
| 73 | if (ppc_md.hpte_updatepp(slot, rflags, vpn, MMU_PAGE_4K, | 73 | if (mmu_hash_ops.hpte_updatepp(slot, rflags, vpn, MMU_PAGE_4K, |
| 74 | MMU_PAGE_4K, ssize, flags) == -1) | 74 | MMU_PAGE_4K, ssize, flags) == -1) |
| 75 | old_pte &= ~_PAGE_HPTEFLAGS; | 75 | old_pte &= ~_PAGE_HPTEFLAGS; |
| 76 | } | 76 | } |
| 77 | 77 | ||
| @@ -84,21 +84,23 @@ repeat: | |||
| 84 | hpte_group = ((hash & htab_hash_mask) * HPTES_PER_GROUP) & ~0x7UL; | 84 | hpte_group = ((hash & htab_hash_mask) * HPTES_PER_GROUP) & ~0x7UL; |
| 85 | 85 | ||
| 86 | /* Insert into the hash table, primary slot */ | 86 | /* Insert into the hash table, primary slot */ |
| 87 | slot = ppc_md.hpte_insert(hpte_group, vpn, pa, rflags, 0, | 87 | slot = mmu_hash_ops.hpte_insert(hpte_group, vpn, pa, rflags, 0, |
| 88 | MMU_PAGE_4K, MMU_PAGE_4K, ssize); | 88 | MMU_PAGE_4K, MMU_PAGE_4K, ssize); |
| 89 | /* | 89 | /* |
| 90 | * Primary is full, try the secondary | 90 | * Primary is full, try the secondary |
| 91 | */ | 91 | */ |
| 92 | if (unlikely(slot == -1)) { | 92 | if (unlikely(slot == -1)) { |
| 93 | hpte_group = ((~hash & htab_hash_mask) * HPTES_PER_GROUP) & ~0x7UL; | 93 | hpte_group = ((~hash & htab_hash_mask) * HPTES_PER_GROUP) & ~0x7UL; |
| 94 | slot = ppc_md.hpte_insert(hpte_group, vpn, pa, | 94 | slot = mmu_hash_ops.hpte_insert(hpte_group, vpn, pa, |
| 95 | rflags, HPTE_V_SECONDARY, | 95 | rflags, |
| 96 | MMU_PAGE_4K, MMU_PAGE_4K, ssize); | 96 | HPTE_V_SECONDARY, |
| 97 | MMU_PAGE_4K, | ||
| 98 | MMU_PAGE_4K, ssize); | ||
| 97 | if (slot == -1) { | 99 | if (slot == -1) { |
| 98 | if (mftb() & 0x1) | 100 | if (mftb() & 0x1) |
| 99 | hpte_group = ((hash & htab_hash_mask) * | 101 | hpte_group = ((hash & htab_hash_mask) * |
| 100 | HPTES_PER_GROUP) & ~0x7UL; | 102 | HPTES_PER_GROUP) & ~0x7UL; |
| 101 | ppc_md.hpte_remove(hpte_group); | 103 | mmu_hash_ops.hpte_remove(hpte_group); |
| 102 | /* | 104 | /* |
| 103 | * FIXME!! Should be try the group from which we removed ? | 105 | * FIXME!! Should be try the group from which we removed ? |
| 104 | */ | 106 | */ |
diff --git a/arch/powerpc/mm/hash64_64k.c b/arch/powerpc/mm/hash64_64k.c index 16644e1f4e6b..3bbbea07378c 100644 --- a/arch/powerpc/mm/hash64_64k.c +++ b/arch/powerpc/mm/hash64_64k.c | |||
| @@ -133,9 +133,9 @@ int __hash_page_4K(unsigned long ea, unsigned long access, unsigned long vsid, | |||
| 133 | slot = (hash & htab_hash_mask) * HPTES_PER_GROUP; | 133 | slot = (hash & htab_hash_mask) * HPTES_PER_GROUP; |
| 134 | slot += hidx & _PTEIDX_GROUP_IX; | 134 | slot += hidx & _PTEIDX_GROUP_IX; |
| 135 | 135 | ||
| 136 | ret = ppc_md.hpte_updatepp(slot, rflags, vpn, | 136 | ret = mmu_hash_ops.hpte_updatepp(slot, rflags, vpn, |
| 137 | MMU_PAGE_4K, MMU_PAGE_4K, | 137 | MMU_PAGE_4K, MMU_PAGE_4K, |
| 138 | ssize, flags); | 138 | ssize, flags); |
| 139 | /* | 139 | /* |
| 140 | *if we failed because typically the HPTE wasn't really here | 140 | *if we failed because typically the HPTE wasn't really here |
| 141 | * we try an insertion. | 141 | * we try an insertion. |
| @@ -166,21 +166,22 @@ repeat: | |||
| 166 | hpte_group = ((hash & htab_hash_mask) * HPTES_PER_GROUP) & ~0x7UL; | 166 | hpte_group = ((hash & htab_hash_mask) * HPTES_PER_GROUP) & ~0x7UL; |
| 167 | 167 | ||
| 168 | /* Insert into the hash table, primary slot */ | 168 | /* Insert into the hash table, primary slot */ |
| 169 | slot = ppc_md.hpte_insert(hpte_group, vpn, pa, rflags, 0, | 169 | slot = mmu_hash_ops.hpte_insert(hpte_group, vpn, pa, rflags, 0, |
| 170 | MMU_PAGE_4K, MMU_PAGE_4K, ssize); | 170 | MMU_PAGE_4K, MMU_PAGE_4K, ssize); |
| 171 | /* | 171 | /* |
| 172 | * Primary is full, try the secondary | 172 | * Primary is full, try the secondary |
| 173 | */ | 173 | */ |
| 174 | if (unlikely(slot == -1)) { | 174 | if (unlikely(slot == -1)) { |
| 175 | hpte_group = ((~hash & htab_hash_mask) * HPTES_PER_GROUP) & ~0x7UL; | 175 | hpte_group = ((~hash & htab_hash_mask) * HPTES_PER_GROUP) & ~0x7UL; |
| 176 | slot = ppc_md.hpte_insert(hpte_group, vpn, pa, | 176 | slot = mmu_hash_ops.hpte_insert(hpte_group, vpn, pa, |
| 177 | rflags, HPTE_V_SECONDARY, | 177 | rflags, HPTE_V_SECONDARY, |
| 178 | MMU_PAGE_4K, MMU_PAGE_4K, ssize); | 178 | MMU_PAGE_4K, MMU_PAGE_4K, |
| 179 | ssize); | ||
| 179 | if (slot == -1) { | 180 | if (slot == -1) { |
| 180 | if (mftb() & 0x1) | 181 | if (mftb() & 0x1) |
| 181 | hpte_group = ((hash & htab_hash_mask) * | 182 | hpte_group = ((hash & htab_hash_mask) * |
| 182 | HPTES_PER_GROUP) & ~0x7UL; | 183 | HPTES_PER_GROUP) & ~0x7UL; |
| 183 | ppc_md.hpte_remove(hpte_group); | 184 | mmu_hash_ops.hpte_remove(hpte_group); |
| 184 | /* | 185 | /* |
| 185 | * FIXME!! Should be try the group from which we removed ? | 186 | * FIXME!! Should be try the group from which we removed ? |
| 186 | */ | 187 | */ |
| @@ -272,8 +273,9 @@ int __hash_page_64K(unsigned long ea, unsigned long access, | |||
| 272 | slot = (hash & htab_hash_mask) * HPTES_PER_GROUP; | 273 | slot = (hash & htab_hash_mask) * HPTES_PER_GROUP; |
| 273 | slot += (old_pte & H_PAGE_F_GIX) >> H_PAGE_F_GIX_SHIFT; | 274 | slot += (old_pte & H_PAGE_F_GIX) >> H_PAGE_F_GIX_SHIFT; |
| 274 | 275 | ||
| 275 | if (ppc_md.hpte_updatepp(slot, rflags, vpn, MMU_PAGE_64K, | 276 | if (mmu_hash_ops.hpte_updatepp(slot, rflags, vpn, MMU_PAGE_64K, |
| 276 | MMU_PAGE_64K, ssize, flags) == -1) | 277 | MMU_PAGE_64K, ssize, |
| 278 | flags) == -1) | ||
| 277 | old_pte &= ~_PAGE_HPTEFLAGS; | 279 | old_pte &= ~_PAGE_HPTEFLAGS; |
| 278 | } | 280 | } |
| 279 | 281 | ||
| @@ -286,21 +288,24 @@ repeat: | |||
| 286 | hpte_group = ((hash & htab_hash_mask) * HPTES_PER_GROUP) & ~0x7UL; | 288 | hpte_group = ((hash & htab_hash_mask) * HPTES_PER_GROUP) & ~0x7UL; |
| 287 | 289 | ||
| 288 | /* Insert into the hash table, primary slot */ | 290 | /* Insert into the hash table, primary slot */ |
| 289 | slot = ppc_md.hpte_insert(hpte_group, vpn, pa, rflags, 0, | 291 | slot = mmu_hash_ops.hpte_insert(hpte_group, vpn, pa, rflags, 0, |
| 290 | MMU_PAGE_64K, MMU_PAGE_64K, ssize); | 292 | MMU_PAGE_64K, MMU_PAGE_64K, |
| 293 | ssize); | ||
| 291 | /* | 294 | /* |
| 292 | * Primary is full, try the secondary | 295 | * Primary is full, try the secondary |
| 293 | */ | 296 | */ |
| 294 | if (unlikely(slot == -1)) { | 297 | if (unlikely(slot == -1)) { |
| 295 | hpte_group = ((~hash & htab_hash_mask) * HPTES_PER_GROUP) & ~0x7UL; | 298 | hpte_group = ((~hash & htab_hash_mask) * HPTES_PER_GROUP) & ~0x7UL; |
| 296 | slot = ppc_md.hpte_insert(hpte_group, vpn, pa, | 299 | slot = mmu_hash_ops.hpte_insert(hpte_group, vpn, pa, |
| 297 | rflags, HPTE_V_SECONDARY, | 300 | rflags, |
| 298 | MMU_PAGE_64K, MMU_PAGE_64K, ssize); | 301 | HPTE_V_SECONDARY, |
| 302 | MMU_PAGE_64K, | ||
| 303 | MMU_PAGE_64K, ssize); | ||
| 299 | if (slot == -1) { | 304 | if (slot == -1) { |
| 300 | if (mftb() & 0x1) | 305 | if (mftb() & 0x1) |
| 301 | hpte_group = ((hash & htab_hash_mask) * | 306 | hpte_group = ((hash & htab_hash_mask) * |
| 302 | HPTES_PER_GROUP) & ~0x7UL; | 307 | HPTES_PER_GROUP) & ~0x7UL; |
| 303 | ppc_md.hpte_remove(hpte_group); | 308 | mmu_hash_ops.hpte_remove(hpte_group); |
| 304 | /* | 309 | /* |
| 305 | * FIXME!! Should be try the group from which we removed ? | 310 | * FIXME!! Should be try the group from which we removed ? |
| 306 | */ | 311 | */ |
diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c index f8a871a72985..88ce7d212320 100644 --- a/arch/powerpc/mm/hash_native_64.c +++ b/arch/powerpc/mm/hash_native_64.c | |||
| @@ -55,7 +55,7 @@ static inline void __tlbie(unsigned long vpn, int psize, int apsize, int ssize) | |||
| 55 | * We need 14 to 65 bits of va for a tlibe of 4K page | 55 | * We need 14 to 65 bits of va for a tlibe of 4K page |
| 56 | * With vpn we ignore the lower VPN_SHIFT bits already. | 56 | * With vpn we ignore the lower VPN_SHIFT bits already. |
| 57 | * And top two bits are already ignored because we can | 57 | * And top two bits are already ignored because we can |
| 58 | * only accomadate 76 bits in a 64 bit vpn with a VPN_SHIFT | 58 | * only accomodate 76 bits in a 64 bit vpn with a VPN_SHIFT |
| 59 | * of 12. | 59 | * of 12. |
| 60 | */ | 60 | */ |
| 61 | va = vpn << VPN_SHIFT; | 61 | va = vpn << VPN_SHIFT; |
| @@ -64,7 +64,8 @@ static inline void __tlbie(unsigned long vpn, int psize, int apsize, int ssize) | |||
| 64 | * Older versions of the architecture (2.02 and earler) require the | 64 | * Older versions of the architecture (2.02 and earler) require the |
| 65 | * masking of the top 16 bits. | 65 | * masking of the top 16 bits. |
| 66 | */ | 66 | */ |
| 67 | va &= ~(0xffffULL << 48); | 67 | if (mmu_has_feature(MMU_FTR_TLBIE_CROP_VA)) |
| 68 | va &= ~(0xffffULL << 48); | ||
| 68 | 69 | ||
| 69 | switch (psize) { | 70 | switch (psize) { |
| 70 | case MMU_PAGE_4K: | 71 | case MMU_PAGE_4K: |
| @@ -113,7 +114,8 @@ static inline void __tlbiel(unsigned long vpn, int psize, int apsize, int ssize) | |||
| 113 | * Older versions of the architecture (2.02 and earler) require the | 114 | * Older versions of the architecture (2.02 and earler) require the |
| 114 | * masking of the top 16 bits. | 115 | * masking of the top 16 bits. |
| 115 | */ | 116 | */ |
| 116 | va &= ~(0xffffULL << 48); | 117 | if (mmu_has_feature(MMU_FTR_TLBIE_CROP_VA)) |
| 118 | va &= ~(0xffffULL << 48); | ||
| 117 | 119 | ||
| 118 | switch (psize) { | 120 | switch (psize) { |
| 119 | case MMU_PAGE_4K: | 121 | case MMU_PAGE_4K: |
| @@ -605,7 +607,7 @@ static void hpte_decode(struct hash_pte *hpte, unsigned long slot, | |||
| 605 | * crashdump and all bets are off anyway. | 607 | * crashdump and all bets are off anyway. |
| 606 | * | 608 | * |
| 607 | * TODO: add batching support when enabled. remember, no dynamic memory here, | 609 | * TODO: add batching support when enabled. remember, no dynamic memory here, |
| 608 | * athough there is the control page available... | 610 | * although there is the control page available... |
| 609 | */ | 611 | */ |
| 610 | static void native_hpte_clear(void) | 612 | static void native_hpte_clear(void) |
| 611 | { | 613 | { |
| @@ -723,23 +725,29 @@ static void native_flush_hash_range(unsigned long number, int local) | |||
| 723 | local_irq_restore(flags); | 725 | local_irq_restore(flags); |
| 724 | } | 726 | } |
| 725 | 727 | ||
| 726 | static int native_update_partition_table(u64 patb1) | 728 | static int native_register_proc_table(unsigned long base, unsigned long page_size, |
| 729 | unsigned long table_size) | ||
| 727 | { | 730 | { |
| 731 | unsigned long patb1 = base << 25; /* VSID */ | ||
| 732 | |||
| 733 | patb1 |= (page_size << 5); /* sllp */ | ||
| 734 | patb1 |= table_size; | ||
| 735 | |||
| 728 | partition_tb->patb1 = cpu_to_be64(patb1); | 736 | partition_tb->patb1 = cpu_to_be64(patb1); |
| 729 | return 0; | 737 | return 0; |
| 730 | } | 738 | } |
| 731 | 739 | ||
| 732 | void __init hpte_init_native(void) | 740 | void __init hpte_init_native(void) |
| 733 | { | 741 | { |
| 734 | ppc_md.hpte_invalidate = native_hpte_invalidate; | 742 | mmu_hash_ops.hpte_invalidate = native_hpte_invalidate; |
| 735 | ppc_md.hpte_updatepp = native_hpte_updatepp; | 743 | mmu_hash_ops.hpte_updatepp = native_hpte_updatepp; |
| 736 | ppc_md.hpte_updateboltedpp = native_hpte_updateboltedpp; | 744 | mmu_hash_ops.hpte_updateboltedpp = native_hpte_updateboltedpp; |
| 737 | ppc_md.hpte_insert = native_hpte_insert; | 745 | mmu_hash_ops.hpte_insert = native_hpte_insert; |
| 738 | ppc_md.hpte_remove = native_hpte_remove; | 746 | mmu_hash_ops.hpte_remove = native_hpte_remove; |
| 739 | ppc_md.hpte_clear_all = native_hpte_clear; | 747 | mmu_hash_ops.hpte_clear_all = native_hpte_clear; |
| 740 | ppc_md.flush_hash_range = native_flush_hash_range; | 748 | mmu_hash_ops.flush_hash_range = native_flush_hash_range; |
| 741 | ppc_md.hugepage_invalidate = native_hugepage_invalidate; | 749 | mmu_hash_ops.hugepage_invalidate = native_hugepage_invalidate; |
| 742 | 750 | ||
| 743 | if (cpu_has_feature(CPU_FTR_ARCH_300)) | 751 | if (cpu_has_feature(CPU_FTR_ARCH_300)) |
| 744 | ppc_md.update_partition_table = native_update_partition_table; | 752 | ppc_md.register_process_table = native_register_proc_table; |
| 745 | } | 753 | } |
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c index 2971ea18c768..b78b5d211278 100644 --- a/arch/powerpc/mm/hash_utils_64.c +++ b/arch/powerpc/mm/hash_utils_64.c | |||
| @@ -34,6 +34,7 @@ | |||
| 34 | #include <linux/signal.h> | 34 | #include <linux/signal.h> |
| 35 | #include <linux/memblock.h> | 35 | #include <linux/memblock.h> |
| 36 | #include <linux/context_tracking.h> | 36 | #include <linux/context_tracking.h> |
| 37 | #include <linux/libfdt.h> | ||
| 37 | 38 | ||
| 38 | #include <asm/processor.h> | 39 | #include <asm/processor.h> |
| 39 | #include <asm/pgtable.h> | 40 | #include <asm/pgtable.h> |
| @@ -58,6 +59,7 @@ | |||
| 58 | #include <asm/firmware.h> | 59 | #include <asm/firmware.h> |
| 59 | #include <asm/tm.h> | 60 | #include <asm/tm.h> |
| 60 | #include <asm/trace.h> | 61 | #include <asm/trace.h> |
| 62 | #include <asm/ps3.h> | ||
| 61 | 63 | ||
| 62 | #ifdef DEBUG | 64 | #ifdef DEBUG |
| 63 | #define DBG(fmt...) udbg_printf(fmt) | 65 | #define DBG(fmt...) udbg_printf(fmt) |
| @@ -87,10 +89,6 @@ | |||
| 87 | * | 89 | * |
| 88 | */ | 90 | */ |
| 89 | 91 | ||
| 90 | #ifdef CONFIG_U3_DART | ||
| 91 | extern unsigned long dart_tablebase; | ||
| 92 | #endif /* CONFIG_U3_DART */ | ||
| 93 | |||
| 94 | static unsigned long _SDR1; | 92 | static unsigned long _SDR1; |
| 95 | struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT]; | 93 | struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT]; |
| 96 | EXPORT_SYMBOL_GPL(mmu_psize_defs); | 94 | EXPORT_SYMBOL_GPL(mmu_psize_defs); |
| @@ -120,6 +118,8 @@ static u8 *linear_map_hash_slots; | |||
| 120 | static unsigned long linear_map_hash_count; | 118 | static unsigned long linear_map_hash_count; |
| 121 | static DEFINE_SPINLOCK(linear_map_hash_lock); | 119 | static DEFINE_SPINLOCK(linear_map_hash_lock); |
| 122 | #endif /* CONFIG_DEBUG_PAGEALLOC */ | 120 | #endif /* CONFIG_DEBUG_PAGEALLOC */ |
| 121 | struct mmu_hash_ops mmu_hash_ops; | ||
| 122 | EXPORT_SYMBOL(mmu_hash_ops); | ||
| 123 | 123 | ||
| 124 | /* There are definitions of page sizes arrays to be used when none | 124 | /* There are definitions of page sizes arrays to be used when none |
| 125 | * is provided by the firmware. | 125 | * is provided by the firmware. |
| @@ -278,9 +278,10 @@ int htab_bolt_mapping(unsigned long vstart, unsigned long vend, | |||
| 278 | hash = hpt_hash(vpn, shift, ssize); | 278 | hash = hpt_hash(vpn, shift, ssize); |
| 279 | hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP); | 279 | hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP); |
| 280 | 280 | ||
| 281 | BUG_ON(!ppc_md.hpte_insert); | 281 | BUG_ON(!mmu_hash_ops.hpte_insert); |
| 282 | ret = ppc_md.hpte_insert(hpteg, vpn, paddr, tprot, | 282 | ret = mmu_hash_ops.hpte_insert(hpteg, vpn, paddr, tprot, |
| 283 | HPTE_V_BOLTED, psize, psize, ssize); | 283 | HPTE_V_BOLTED, psize, psize, |
| 284 | ssize); | ||
| 284 | 285 | ||
| 285 | if (ret < 0) | 286 | if (ret < 0) |
| 286 | break; | 287 | break; |
| @@ -305,11 +306,11 @@ int htab_remove_mapping(unsigned long vstart, unsigned long vend, | |||
| 305 | shift = mmu_psize_defs[psize].shift; | 306 | shift = mmu_psize_defs[psize].shift; |
| 306 | step = 1 << shift; | 307 | step = 1 << shift; |
| 307 | 308 | ||
| 308 | if (!ppc_md.hpte_removebolted) | 309 | if (!mmu_hash_ops.hpte_removebolted) |
| 309 | return -ENODEV; | 310 | return -ENODEV; |
| 310 | 311 | ||
| 311 | for (vaddr = vstart; vaddr < vend; vaddr += step) { | 312 | for (vaddr = vstart; vaddr < vend; vaddr += step) { |
| 312 | rc = ppc_md.hpte_removebolted(vaddr, psize, ssize); | 313 | rc = mmu_hash_ops.hpte_removebolted(vaddr, psize, ssize); |
| 313 | if (rc == -ENOENT) { | 314 | if (rc == -ENOENT) { |
| 314 | ret = -ENOENT; | 315 | ret = -ENOENT; |
| 315 | continue; | 316 | continue; |
| @@ -321,6 +322,15 @@ int htab_remove_mapping(unsigned long vstart, unsigned long vend, | |||
| 321 | return ret; | 322 | return ret; |
| 322 | } | 323 | } |
| 323 | 324 | ||
| 325 | static bool disable_1tb_segments = false; | ||
| 326 | |||
| 327 | static int __init parse_disable_1tb_segments(char *p) | ||
| 328 | { | ||
| 329 | disable_1tb_segments = true; | ||
| 330 | return 0; | ||
| 331 | } | ||
| 332 | early_param("disable_1tb_segments", parse_disable_1tb_segments); | ||
| 333 | |||
| 324 | static int __init htab_dt_scan_seg_sizes(unsigned long node, | 334 | static int __init htab_dt_scan_seg_sizes(unsigned long node, |
| 325 | const char *uname, int depth, | 335 | const char *uname, int depth, |
| 326 | void *data) | 336 | void *data) |
| @@ -339,6 +349,12 @@ static int __init htab_dt_scan_seg_sizes(unsigned long node, | |||
| 339 | for (; size >= 4; size -= 4, ++prop) { | 349 | for (; size >= 4; size -= 4, ++prop) { |
| 340 | if (be32_to_cpu(prop[0]) == 40) { | 350 | if (be32_to_cpu(prop[0]) == 40) { |
| 341 | DBG("1T segment support detected\n"); | 351 | DBG("1T segment support detected\n"); |
| 352 | |||
| 353 | if (disable_1tb_segments) { | ||
| 354 | DBG("1T segments disabled by command line\n"); | ||
| 355 | break; | ||
| 356 | } | ||
| 357 | |||
| 342 | cur_cpu_spec->mmu_features |= MMU_FTR_1T_SEGMENT; | 358 | cur_cpu_spec->mmu_features |= MMU_FTR_1T_SEGMENT; |
| 343 | return 1; | 359 | return 1; |
| 344 | } | 360 | } |
| @@ -514,7 +530,8 @@ static bool might_have_hea(void) | |||
| 514 | * we will never see an HEA ethernet device. | 530 | * we will never see an HEA ethernet device. |
| 515 | */ | 531 | */ |
| 516 | #ifdef CONFIG_IBMEBUS | 532 | #ifdef CONFIG_IBMEBUS |
| 517 | return !cpu_has_feature(CPU_FTR_ARCH_207S); | 533 | return !cpu_has_feature(CPU_FTR_ARCH_207S) && |
| 534 | !firmware_has_feature(FW_FEATURE_SPLPAR); | ||
| 518 | #else | 535 | #else |
| 519 | return false; | 536 | return false; |
| 520 | #endif | 537 | #endif |
| @@ -580,7 +597,7 @@ found: | |||
| 580 | * would stop us accessing the HEA ethernet. So if we | 597 | * would stop us accessing the HEA ethernet. So if we |
| 581 | * have the chance of ever seeing one, stay at 4k. | 598 | * have the chance of ever seeing one, stay at 4k. |
| 582 | */ | 599 | */ |
| 583 | if (!might_have_hea() || !machine_is(pseries)) | 600 | if (!might_have_hea()) |
| 584 | mmu_io_psize = MMU_PAGE_64K; | 601 | mmu_io_psize = MMU_PAGE_64K; |
| 585 | } else | 602 | } else |
| 586 | mmu_ci_restrictions = 1; | 603 | mmu_ci_restrictions = 1; |
| @@ -699,10 +716,9 @@ int remove_section_mapping(unsigned long start, unsigned long end) | |||
| 699 | #endif /* CONFIG_MEMORY_HOTPLUG */ | 716 | #endif /* CONFIG_MEMORY_HOTPLUG */ |
| 700 | 717 | ||
| 701 | static void __init hash_init_partition_table(phys_addr_t hash_table, | 718 | static void __init hash_init_partition_table(phys_addr_t hash_table, |
| 702 | unsigned long pteg_count) | 719 | unsigned long htab_size) |
| 703 | { | 720 | { |
| 704 | unsigned long ps_field; | 721 | unsigned long ps_field; |
| 705 | unsigned long htab_size; | ||
| 706 | unsigned long patb_size = 1UL << PATB_SIZE_SHIFT; | 722 | unsigned long patb_size = 1UL << PATB_SIZE_SHIFT; |
| 707 | 723 | ||
| 708 | /* | 724 | /* |
| @@ -710,7 +726,7 @@ static void __init hash_init_partition_table(phys_addr_t hash_table, | |||
| 710 | * We can ignore that for lpid 0 | 726 | * We can ignore that for lpid 0 |
| 711 | */ | 727 | */ |
| 712 | ps_field = 0; | 728 | ps_field = 0; |
| 713 | htab_size = __ilog2(pteg_count) - 11; | 729 | htab_size = __ilog2(htab_size) - 18; |
| 714 | 730 | ||
| 715 | BUILD_BUG_ON_MSG((PATB_SIZE_SHIFT > 24), "Partition table size too large."); | 731 | BUILD_BUG_ON_MSG((PATB_SIZE_SHIFT > 24), "Partition table size too large."); |
| 716 | partition_tb = __va(memblock_alloc_base(patb_size, patb_size, | 732 | partition_tb = __va(memblock_alloc_base(patb_size, patb_size, |
| @@ -724,7 +740,7 @@ static void __init hash_init_partition_table(phys_addr_t hash_table, | |||
| 724 | * For now UPRT is 0 for us. | 740 | * For now UPRT is 0 for us. |
| 725 | */ | 741 | */ |
| 726 | partition_tb->patb1 = 0; | 742 | partition_tb->patb1 = 0; |
| 727 | DBG("Partition table %p\n", partition_tb); | 743 | pr_info("Partition table %p\n", partition_tb); |
| 728 | /* | 744 | /* |
| 729 | * update partition table control register, | 745 | * update partition table control register, |
| 730 | * 64 K size. | 746 | * 64 K size. |
| @@ -738,7 +754,7 @@ static void __init htab_initialize(void) | |||
| 738 | unsigned long table; | 754 | unsigned long table; |
| 739 | unsigned long pteg_count; | 755 | unsigned long pteg_count; |
| 740 | unsigned long prot; | 756 | unsigned long prot; |
| 741 | unsigned long base = 0, size = 0, limit; | 757 | unsigned long base = 0, size = 0; |
| 742 | struct memblock_region *reg; | 758 | struct memblock_region *reg; |
| 743 | 759 | ||
| 744 | DBG(" -> htab_initialize()\n"); | 760 | DBG(" -> htab_initialize()\n"); |
| @@ -764,7 +780,8 @@ static void __init htab_initialize(void) | |||
| 764 | 780 | ||
| 765 | htab_hash_mask = pteg_count - 1; | 781 | htab_hash_mask = pteg_count - 1; |
| 766 | 782 | ||
| 767 | if (firmware_has_feature(FW_FEATURE_LPAR)) { | 783 | if (firmware_has_feature(FW_FEATURE_LPAR) || |
| 784 | firmware_has_feature(FW_FEATURE_PS3_LV1)) { | ||
| 768 | /* Using a hypervisor which owns the htab */ | 785 | /* Using a hypervisor which owns the htab */ |
| 769 | htab_address = NULL; | 786 | htab_address = NULL; |
| 770 | _SDR1 = 0; | 787 | _SDR1 = 0; |
| @@ -775,20 +792,26 @@ static void __init htab_initialize(void) | |||
| 775 | * Clear the htab if firmware assisted dump is active so | 792 | * Clear the htab if firmware assisted dump is active so |
| 776 | * that we dont end up using old mappings. | 793 | * that we dont end up using old mappings. |
| 777 | */ | 794 | */ |
| 778 | if (is_fadump_active() && ppc_md.hpte_clear_all) | 795 | if (is_fadump_active() && mmu_hash_ops.hpte_clear_all) |
| 779 | ppc_md.hpte_clear_all(); | 796 | mmu_hash_ops.hpte_clear_all(); |
| 780 | #endif | 797 | #endif |
| 781 | } else { | 798 | } else { |
| 782 | /* Find storage for the HPT. Must be contiguous in | 799 | unsigned long limit = MEMBLOCK_ALLOC_ANYWHERE; |
| 783 | * the absolute address space. On cell we want it to be | 800 | |
| 784 | * in the first 2 Gig so we can use it for IOMMU hacks. | 801 | #ifdef CONFIG_PPC_CELL |
| 802 | /* | ||
| 803 | * Cell may require the hash table down low when using the | ||
| 804 | * Axon IOMMU in order to fit the dynamic region over it, see | ||
| 805 | * comments in cell/iommu.c | ||
| 785 | */ | 806 | */ |
| 786 | if (machine_is(cell)) | 807 | if (fdt_subnode_offset(initial_boot_params, 0, "axon") > 0) { |
| 787 | limit = 0x80000000; | 808 | limit = 0x80000000; |
| 788 | else | 809 | pr_info("Hash table forced below 2G for Axon IOMMU\n"); |
| 789 | limit = MEMBLOCK_ALLOC_ANYWHERE; | 810 | } |
| 811 | #endif /* CONFIG_PPC_CELL */ | ||
| 790 | 812 | ||
| 791 | table = memblock_alloc_base(htab_size_bytes, htab_size_bytes, limit); | 813 | table = memblock_alloc_base(htab_size_bytes, htab_size_bytes, |
| 814 | limit); | ||
| 792 | 815 | ||
| 793 | DBG("Hash table allocated at %lx, size: %lx\n", table, | 816 | DBG("Hash table allocated at %lx, size: %lx\n", table, |
| 794 | htab_size_bytes); | 817 | htab_size_bytes); |
| @@ -796,7 +819,7 @@ static void __init htab_initialize(void) | |||
| 796 | htab_address = __va(table); | 819 | htab_address = __va(table); |
| 797 | 820 | ||
| 798 | /* htab absolute addr + encoded htabsize */ | 821 | /* htab absolute addr + encoded htabsize */ |
| 799 | _SDR1 = table + __ilog2(pteg_count) - 11; | 822 | _SDR1 = table + __ilog2(htab_size_bytes) - 18; |
| 800 | 823 | ||
| 801 | /* Initialize the HPT with no entries */ | 824 | /* Initialize the HPT with no entries */ |
| 802 | memset((void *)table, 0, htab_size_bytes); | 825 | memset((void *)table, 0, htab_size_bytes); |
| @@ -805,7 +828,7 @@ static void __init htab_initialize(void) | |||
| 805 | /* Set SDR1 */ | 828 | /* Set SDR1 */ |
| 806 | mtspr(SPRN_SDR1, _SDR1); | 829 | mtspr(SPRN_SDR1, _SDR1); |
| 807 | else | 830 | else |
| 808 | hash_init_partition_table(table, pteg_count); | 831 | hash_init_partition_table(table, htab_size_bytes); |
| 809 | } | 832 | } |
| 810 | 833 | ||
| 811 | prot = pgprot_val(PAGE_KERNEL); | 834 | prot = pgprot_val(PAGE_KERNEL); |
| @@ -832,34 +855,6 @@ static void __init htab_initialize(void) | |||
| 832 | DBG("creating mapping for region: %lx..%lx (prot: %lx)\n", | 855 | DBG("creating mapping for region: %lx..%lx (prot: %lx)\n", |
| 833 | base, size, prot); | 856 | base, size, prot); |
| 834 | 857 | ||
| 835 | #ifdef CONFIG_U3_DART | ||
| 836 | /* Do not map the DART space. Fortunately, it will be aligned | ||
| 837 | * in such a way that it will not cross two memblock regions and | ||
| 838 | * will fit within a single 16Mb page. | ||
| 839 | * The DART space is assumed to be a full 16Mb region even if | ||
| 840 | * we only use 2Mb of that space. We will use more of it later | ||
| 841 | * for AGP GART. We have to use a full 16Mb large page. | ||
| 842 | */ | ||
| 843 | DBG("DART base: %lx\n", dart_tablebase); | ||
| 844 | |||
| 845 | if (dart_tablebase != 0 && dart_tablebase >= base | ||
| 846 | && dart_tablebase < (base + size)) { | ||
| 847 | unsigned long dart_table_end = dart_tablebase + 16 * MB; | ||
| 848 | if (base != dart_tablebase) | ||
| 849 | BUG_ON(htab_bolt_mapping(base, dart_tablebase, | ||
| 850 | __pa(base), prot, | ||
| 851 | mmu_linear_psize, | ||
| 852 | mmu_kernel_ssize)); | ||
| 853 | if ((base + size) > dart_table_end) | ||
| 854 | BUG_ON(htab_bolt_mapping(dart_tablebase+16*MB, | ||
| 855 | base + size, | ||
| 856 | __pa(dart_table_end), | ||
| 857 | prot, | ||
| 858 | mmu_linear_psize, | ||
| 859 | mmu_kernel_ssize)); | ||
| 860 | continue; | ||
| 861 | } | ||
| 862 | #endif /* CONFIG_U3_DART */ | ||
| 863 | BUG_ON(htab_bolt_mapping(base, base + size, __pa(base), | 858 | BUG_ON(htab_bolt_mapping(base, base + size, __pa(base), |
| 864 | prot, mmu_linear_psize, mmu_kernel_ssize)); | 859 | prot, mmu_linear_psize, mmu_kernel_ssize)); |
| 865 | } | 860 | } |
| @@ -926,12 +921,24 @@ void __init hash__early_init_mmu(void) | |||
| 926 | pci_io_base = ISA_IO_BASE; | 921 | pci_io_base = ISA_IO_BASE; |
| 927 | #endif | 922 | #endif |
| 928 | 923 | ||
| 924 | /* Select appropriate backend */ | ||
| 925 | if (firmware_has_feature(FW_FEATURE_PS3_LV1)) | ||
| 926 | ps3_early_mm_init(); | ||
| 927 | else if (firmware_has_feature(FW_FEATURE_LPAR)) | ||
| 928 | hpte_init_pseries(); | ||
| 929 | else if (IS_ENABLED(CONFIG_PPC_NATIVE)) | ||
| 930 | hpte_init_native(); | ||
| 931 | |||
| 932 | if (!mmu_hash_ops.hpte_insert) | ||
| 933 | panic("hash__early_init_mmu: No MMU hash ops defined!\n"); | ||
| 934 | |||
| 929 | /* Initialize the MMU Hash table and create the linear mapping | 935 | /* Initialize the MMU Hash table and create the linear mapping |
| 930 | * of memory. Has to be done before SLB initialization as this is | 936 | * of memory. Has to be done before SLB initialization as this is |
| 931 | * currently where the page size encoding is obtained. | 937 | * currently where the page size encoding is obtained. |
| 932 | */ | 938 | */ |
| 933 | htab_initialize(); | 939 | htab_initialize(); |
| 934 | 940 | ||
| 941 | pr_info("Initializing hash mmu with SLB\n"); | ||
| 935 | /* Initialize SLB management */ | 942 | /* Initialize SLB management */ |
| 936 | slb_initialize(); | 943 | slb_initialize(); |
| 937 | } | 944 | } |
| @@ -1474,7 +1481,8 @@ void flush_hash_page(unsigned long vpn, real_pte_t pte, int psize, int ssize, | |||
| 1474 | * We use same base page size and actual psize, because we don't | 1481 | * We use same base page size and actual psize, because we don't |
| 1475 | * use these functions for hugepage | 1482 | * use these functions for hugepage |
| 1476 | */ | 1483 | */ |
| 1477 | ppc_md.hpte_invalidate(slot, vpn, psize, psize, ssize, local); | 1484 | mmu_hash_ops.hpte_invalidate(slot, vpn, psize, psize, |
| 1485 | ssize, local); | ||
| 1478 | } pte_iterate_hashed_end(); | 1486 | } pte_iterate_hashed_end(); |
| 1479 | 1487 | ||
| 1480 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM | 1488 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| @@ -1515,9 +1523,9 @@ void flush_hash_hugepage(unsigned long vsid, unsigned long addr, | |||
| 1515 | if (!hpte_slot_array) | 1523 | if (!hpte_slot_array) |
| 1516 | return; | 1524 | return; |
| 1517 | 1525 | ||
| 1518 | if (ppc_md.hugepage_invalidate) { | 1526 | if (mmu_hash_ops.hugepage_invalidate) { |
| 1519 | ppc_md.hugepage_invalidate(vsid, s_addr, hpte_slot_array, | 1527 | mmu_hash_ops.hugepage_invalidate(vsid, s_addr, hpte_slot_array, |
| 1520 | psize, ssize, local); | 1528 | psize, ssize, local); |
| 1521 | goto tm_abort; | 1529 | goto tm_abort; |
| 1522 | } | 1530 | } |
| 1523 | /* | 1531 | /* |
| @@ -1544,8 +1552,8 @@ void flush_hash_hugepage(unsigned long vsid, unsigned long addr, | |||
| 1544 | 1552 | ||
| 1545 | slot = (hash & htab_hash_mask) * HPTES_PER_GROUP; | 1553 | slot = (hash & htab_hash_mask) * HPTES_PER_GROUP; |
| 1546 | slot += hidx & _PTEIDX_GROUP_IX; | 1554 | slot += hidx & _PTEIDX_GROUP_IX; |
| 1547 | ppc_md.hpte_invalidate(slot, vpn, psize, | 1555 | mmu_hash_ops.hpte_invalidate(slot, vpn, psize, |
| 1548 | MMU_PAGE_16M, ssize, local); | 1556 | MMU_PAGE_16M, ssize, local); |
| 1549 | } | 1557 | } |
| 1550 | tm_abort: | 1558 | tm_abort: |
| 1551 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM | 1559 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| @@ -1569,8 +1577,8 @@ tm_abort: | |||
| 1569 | 1577 | ||
| 1570 | void flush_hash_range(unsigned long number, int local) | 1578 | void flush_hash_range(unsigned long number, int local) |
| 1571 | { | 1579 | { |
| 1572 | if (ppc_md.flush_hash_range) | 1580 | if (mmu_hash_ops.flush_hash_range) |
| 1573 | ppc_md.flush_hash_range(number, local); | 1581 | mmu_hash_ops.flush_hash_range(number, local); |
| 1574 | else { | 1582 | else { |
| 1575 | int i; | 1583 | int i; |
| 1576 | struct ppc64_tlb_batch *batch = | 1584 | struct ppc64_tlb_batch *batch = |
| @@ -1615,22 +1623,22 @@ repeat: | |||
| 1615 | HPTES_PER_GROUP) & ~0x7UL; | 1623 | HPTES_PER_GROUP) & ~0x7UL; |
| 1616 | 1624 | ||
| 1617 | /* Insert into the hash table, primary slot */ | 1625 | /* Insert into the hash table, primary slot */ |
| 1618 | slot = ppc_md.hpte_insert(hpte_group, vpn, pa, rflags, vflags, | 1626 | slot = mmu_hash_ops.hpte_insert(hpte_group, vpn, pa, rflags, vflags, |
| 1619 | psize, psize, ssize); | 1627 | psize, psize, ssize); |
| 1620 | 1628 | ||
| 1621 | /* Primary is full, try the secondary */ | 1629 | /* Primary is full, try the secondary */ |
| 1622 | if (unlikely(slot == -1)) { | 1630 | if (unlikely(slot == -1)) { |
| 1623 | hpte_group = ((~hash & htab_hash_mask) * | 1631 | hpte_group = ((~hash & htab_hash_mask) * |
| 1624 | HPTES_PER_GROUP) & ~0x7UL; | 1632 | HPTES_PER_GROUP) & ~0x7UL; |
| 1625 | slot = ppc_md.hpte_insert(hpte_group, vpn, pa, rflags, | 1633 | slot = mmu_hash_ops.hpte_insert(hpte_group, vpn, pa, rflags, |
| 1626 | vflags | HPTE_V_SECONDARY, | 1634 | vflags | HPTE_V_SECONDARY, |
| 1627 | psize, psize, ssize); | 1635 | psize, psize, ssize); |
| 1628 | if (slot == -1) { | 1636 | if (slot == -1) { |
| 1629 | if (mftb() & 0x1) | 1637 | if (mftb() & 0x1) |
| 1630 | hpte_group = ((hash & htab_hash_mask) * | 1638 | hpte_group = ((hash & htab_hash_mask) * |
| 1631 | HPTES_PER_GROUP)&~0x7UL; | 1639 | HPTES_PER_GROUP)&~0x7UL; |
| 1632 | 1640 | ||
| 1633 | ppc_md.hpte_remove(hpte_group); | 1641 | mmu_hash_ops.hpte_remove(hpte_group); |
| 1634 | goto repeat; | 1642 | goto repeat; |
| 1635 | } | 1643 | } |
| 1636 | } | 1644 | } |
| @@ -1680,8 +1688,9 @@ static void kernel_unmap_linear_page(unsigned long vaddr, unsigned long lmi) | |||
| 1680 | hash = ~hash; | 1688 | hash = ~hash; |
| 1681 | slot = (hash & htab_hash_mask) * HPTES_PER_GROUP; | 1689 | slot = (hash & htab_hash_mask) * HPTES_PER_GROUP; |
| 1682 | slot += hidx & _PTEIDX_GROUP_IX; | 1690 | slot += hidx & _PTEIDX_GROUP_IX; |
| 1683 | ppc_md.hpte_invalidate(slot, vpn, mmu_linear_psize, mmu_linear_psize, | 1691 | mmu_hash_ops.hpte_invalidate(slot, vpn, mmu_linear_psize, |
| 1684 | mmu_kernel_ssize, 0); | 1692 | mmu_linear_psize, |
| 1693 | mmu_kernel_ssize, 0); | ||
| 1685 | } | 1694 | } |
| 1686 | 1695 | ||
| 1687 | void __kernel_map_pages(struct page *page, int numpages, int enable) | 1696 | void __kernel_map_pages(struct page *page, int numpages, int enable) |
diff --git a/arch/powerpc/mm/hugepage-hash64.c b/arch/powerpc/mm/hugepage-hash64.c index ba3fc229468a..f20d16f849c5 100644 --- a/arch/powerpc/mm/hugepage-hash64.c +++ b/arch/powerpc/mm/hugepage-hash64.c | |||
| @@ -103,8 +103,8 @@ int __hash_page_thp(unsigned long ea, unsigned long access, unsigned long vsid, | |||
| 103 | slot = (hash & htab_hash_mask) * HPTES_PER_GROUP; | 103 | slot = (hash & htab_hash_mask) * HPTES_PER_GROUP; |
| 104 | slot += hidx & _PTEIDX_GROUP_IX; | 104 | slot += hidx & _PTEIDX_GROUP_IX; |
| 105 | 105 | ||
| 106 | ret = ppc_md.hpte_updatepp(slot, rflags, vpn, | 106 | ret = mmu_hash_ops.hpte_updatepp(slot, rflags, vpn, |
| 107 | psize, lpsize, ssize, flags); | 107 | psize, lpsize, ssize, flags); |
| 108 | /* | 108 | /* |
| 109 | * We failed to update, try to insert a new entry. | 109 | * We failed to update, try to insert a new entry. |
| 110 | */ | 110 | */ |
| @@ -131,23 +131,24 @@ repeat: | |||
| 131 | hpte_group = ((hash & htab_hash_mask) * HPTES_PER_GROUP) & ~0x7UL; | 131 | hpte_group = ((hash & htab_hash_mask) * HPTES_PER_GROUP) & ~0x7UL; |
| 132 | 132 | ||
| 133 | /* Insert into the hash table, primary slot */ | 133 | /* Insert into the hash table, primary slot */ |
| 134 | slot = ppc_md.hpte_insert(hpte_group, vpn, pa, rflags, 0, | 134 | slot = mmu_hash_ops.hpte_insert(hpte_group, vpn, pa, rflags, 0, |
| 135 | psize, lpsize, ssize); | 135 | psize, lpsize, ssize); |
| 136 | /* | 136 | /* |
| 137 | * Primary is full, try the secondary | 137 | * Primary is full, try the secondary |
| 138 | */ | 138 | */ |
| 139 | if (unlikely(slot == -1)) { | 139 | if (unlikely(slot == -1)) { |
| 140 | hpte_group = ((~hash & htab_hash_mask) * | 140 | hpte_group = ((~hash & htab_hash_mask) * |
| 141 | HPTES_PER_GROUP) & ~0x7UL; | 141 | HPTES_PER_GROUP) & ~0x7UL; |
| 142 | slot = ppc_md.hpte_insert(hpte_group, vpn, pa, | 142 | slot = mmu_hash_ops.hpte_insert(hpte_group, vpn, pa, |
| 143 | rflags, HPTE_V_SECONDARY, | 143 | rflags, |
| 144 | psize, lpsize, ssize); | 144 | HPTE_V_SECONDARY, |
| 145 | psize, lpsize, ssize); | ||
| 145 | if (slot == -1) { | 146 | if (slot == -1) { |
| 146 | if (mftb() & 0x1) | 147 | if (mftb() & 0x1) |
| 147 | hpte_group = ((hash & htab_hash_mask) * | 148 | hpte_group = ((hash & htab_hash_mask) * |
| 148 | HPTES_PER_GROUP) & ~0x7UL; | 149 | HPTES_PER_GROUP) & ~0x7UL; |
| 149 | 150 | ||
| 150 | ppc_md.hpte_remove(hpte_group); | 151 | mmu_hash_ops.hpte_remove(hpte_group); |
| 151 | goto repeat; | 152 | goto repeat; |
| 152 | } | 153 | } |
| 153 | } | 154 | } |
diff --git a/arch/powerpc/mm/hugetlbpage-hash64.c b/arch/powerpc/mm/hugetlbpage-hash64.c index 3058560b6121..d5026f3800b6 100644 --- a/arch/powerpc/mm/hugetlbpage-hash64.c +++ b/arch/powerpc/mm/hugetlbpage-hash64.c | |||
| @@ -79,8 +79,8 @@ int __hash_page_huge(unsigned long ea, unsigned long access, unsigned long vsid, | |||
| 79 | slot = (hash & htab_hash_mask) * HPTES_PER_GROUP; | 79 | slot = (hash & htab_hash_mask) * HPTES_PER_GROUP; |
| 80 | slot += (old_pte & H_PAGE_F_GIX) >> H_PAGE_F_GIX_SHIFT; | 80 | slot += (old_pte & H_PAGE_F_GIX) >> H_PAGE_F_GIX_SHIFT; |
| 81 | 81 | ||
| 82 | if (ppc_md.hpte_updatepp(slot, rflags, vpn, mmu_psize, | 82 | if (mmu_hash_ops.hpte_updatepp(slot, rflags, vpn, mmu_psize, |
| 83 | mmu_psize, ssize, flags) == -1) | 83 | mmu_psize, ssize, flags) == -1) |
| 84 | old_pte &= ~_PAGE_HPTEFLAGS; | 84 | old_pte &= ~_PAGE_HPTEFLAGS; |
| 85 | } | 85 | } |
| 86 | 86 | ||
diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c index 119d18611500..7372ee13eb1e 100644 --- a/arch/powerpc/mm/hugetlbpage.c +++ b/arch/powerpc/mm/hugetlbpage.c | |||
| @@ -81,6 +81,13 @@ static int __hugepte_alloc(struct mm_struct *mm, hugepd_t *hpdp, | |||
| 81 | if (! new) | 81 | if (! new) |
| 82 | return -ENOMEM; | 82 | return -ENOMEM; |
| 83 | 83 | ||
| 84 | /* | ||
| 85 | * Make sure other cpus find the hugepd set only after a | ||
| 86 | * properly initialized page table is visible to them. | ||
| 87 | * For more details look for comment in __pte_alloc(). | ||
| 88 | */ | ||
| 89 | smp_wmb(); | ||
| 90 | |||
| 84 | spin_lock(&mm->page_table_lock); | 91 | spin_lock(&mm->page_table_lock); |
| 85 | #ifdef CONFIG_PPC_FSL_BOOK3E | 92 | #ifdef CONFIG_PPC_FSL_BOOK3E |
| 86 | /* | 93 | /* |
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c index c899fe340bbd..448685fbf27c 100644 --- a/arch/powerpc/mm/init_32.c +++ b/arch/powerpc/mm/init_32.c | |||
| @@ -64,7 +64,7 @@ EXPORT_SYMBOL(memstart_addr); | |||
| 64 | phys_addr_t kernstart_addr; | 64 | phys_addr_t kernstart_addr; |
| 65 | EXPORT_SYMBOL(kernstart_addr); | 65 | EXPORT_SYMBOL(kernstart_addr); |
| 66 | 66 | ||
| 67 | #ifdef CONFIG_RELOCATABLE_PPC32 | 67 | #ifdef CONFIG_RELOCATABLE |
| 68 | /* Used in __va()/__pa() */ | 68 | /* Used in __va()/__pa() */ |
| 69 | long long virt_phys_offset; | 69 | long long virt_phys_offset; |
| 70 | EXPORT_SYMBOL(virt_phys_offset); | 70 | EXPORT_SYMBOL(virt_phys_offset); |
| @@ -80,9 +80,6 @@ EXPORT_SYMBOL(agp_special_page); | |||
| 80 | 80 | ||
| 81 | void MMU_init(void); | 81 | void MMU_init(void); |
| 82 | 82 | ||
| 83 | /* XXX should be in current.h -- paulus */ | ||
| 84 | extern struct task_struct *current_set[NR_CPUS]; | ||
| 85 | |||
| 86 | /* | 83 | /* |
| 87 | * this tells the system to map all of ram with the segregs | 84 | * this tells the system to map all of ram with the segregs |
| 88 | * (i.e. page tables) instead of the bats. | 85 | * (i.e. page tables) instead of the bats. |
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c index 2fd57fa48429..5f844337de21 100644 --- a/arch/powerpc/mm/mem.c +++ b/arch/powerpc/mm/mem.c | |||
| @@ -116,6 +116,16 @@ int memory_add_physaddr_to_nid(u64 start) | |||
| 116 | } | 116 | } |
| 117 | #endif | 117 | #endif |
| 118 | 118 | ||
| 119 | int __weak create_section_mapping(unsigned long start, unsigned long end) | ||
| 120 | { | ||
| 121 | return -ENODEV; | ||
| 122 | } | ||
| 123 | |||
| 124 | int __weak remove_section_mapping(unsigned long start, unsigned long end) | ||
| 125 | { | ||
| 126 | return -ENODEV; | ||
| 127 | } | ||
| 128 | |||
| 119 | int arch_add_memory(int nid, u64 start, u64 size, bool for_device) | 129 | int arch_add_memory(int nid, u64 start, u64 size, bool for_device) |
| 120 | { | 130 | { |
| 121 | struct pglist_data *pgdata; | 131 | struct pglist_data *pgdata; |
| @@ -239,8 +249,14 @@ static int __init mark_nonram_nosave(void) | |||
| 239 | 249 | ||
| 240 | static bool zone_limits_final; | 250 | static bool zone_limits_final; |
| 241 | 251 | ||
| 252 | /* | ||
| 253 | * The memory zones past TOP_ZONE are managed by generic mm code. | ||
| 254 | * These should be set to zero since that's what every other | ||
| 255 | * architecture does. | ||
| 256 | */ | ||
| 242 | static unsigned long max_zone_pfns[MAX_NR_ZONES] = { | 257 | static unsigned long max_zone_pfns[MAX_NR_ZONES] = { |
| 243 | [0 ... MAX_NR_ZONES - 1] = ~0UL | 258 | [0 ... TOP_ZONE ] = ~0UL, |
| 259 | [TOP_ZONE + 1 ... MAX_NR_ZONES - 1] = 0 | ||
| 244 | }; | 260 | }; |
| 245 | 261 | ||
| 246 | /* | 262 | /* |
diff --git a/arch/powerpc/mm/mmu_context_book3s64.c b/arch/powerpc/mm/mmu_context_book3s64.c index 196222227e82..b114f8b93ec9 100644 --- a/arch/powerpc/mm/mmu_context_book3s64.c +++ b/arch/powerpc/mm/mmu_context_book3s64.c | |||
| @@ -181,7 +181,10 @@ void destroy_context(struct mm_struct *mm) | |||
| 181 | #ifdef CONFIG_PPC_RADIX_MMU | 181 | #ifdef CONFIG_PPC_RADIX_MMU |
| 182 | void radix__switch_mmu_context(struct mm_struct *prev, struct mm_struct *next) | 182 | void radix__switch_mmu_context(struct mm_struct *prev, struct mm_struct *next) |
| 183 | { | 183 | { |
| 184 | mtspr(SPRN_PID, next->context.id); | ||
| 185 | asm volatile("isync": : :"memory"); | 184 | asm volatile("isync": : :"memory"); |
| 185 | mtspr(SPRN_PID, next->context.id); | ||
| 186 | asm volatile("isync \n" | ||
| 187 | PPC_SLBIA(0x7) | ||
| 188 | : : :"memory"); | ||
| 186 | } | 189 | } |
| 187 | #endif | 190 | #endif |
diff --git a/arch/powerpc/mm/mmu_decl.h b/arch/powerpc/mm/mmu_decl.h index 6af65327c993..f988db655e5b 100644 --- a/arch/powerpc/mm/mmu_decl.h +++ b/arch/powerpc/mm/mmu_decl.h | |||
| @@ -154,9 +154,10 @@ struct tlbcam { | |||
| 154 | }; | 154 | }; |
| 155 | #endif | 155 | #endif |
| 156 | 156 | ||
| 157 | #if defined(CONFIG_6xx) || defined(CONFIG_FSL_BOOKE) | 157 | #if defined(CONFIG_6xx) || defined(CONFIG_FSL_BOOKE) || defined(CONFIG_PPC_8xx) |
| 158 | /* 6xx have BATS */ | 158 | /* 6xx have BATS */ |
| 159 | /* FSL_BOOKE have TLBCAM */ | 159 | /* FSL_BOOKE have TLBCAM */ |
| 160 | /* 8xx have LTLB */ | ||
| 160 | phys_addr_t v_block_mapped(unsigned long va); | 161 | phys_addr_t v_block_mapped(unsigned long va); |
| 161 | unsigned long p_block_mapped(phys_addr_t pa); | 162 | unsigned long p_block_mapped(phys_addr_t pa); |
| 162 | #else | 163 | #else |
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c index 6dc07ddbfd04..75b9cd6150cc 100644 --- a/arch/powerpc/mm/numa.c +++ b/arch/powerpc/mm/numa.c | |||
| @@ -1153,18 +1153,34 @@ int hot_add_scn_to_nid(unsigned long scn_addr) | |||
| 1153 | 1153 | ||
| 1154 | static u64 hot_add_drconf_memory_max(void) | 1154 | static u64 hot_add_drconf_memory_max(void) |
| 1155 | { | 1155 | { |
| 1156 | struct device_node *memory = NULL; | 1156 | struct device_node *memory = NULL; |
| 1157 | unsigned int drconf_cell_cnt = 0; | 1157 | struct device_node *dn = NULL; |
| 1158 | u64 lmb_size = 0; | 1158 | unsigned int drconf_cell_cnt = 0; |
| 1159 | u64 lmb_size = 0; | ||
| 1159 | const __be32 *dm = NULL; | 1160 | const __be32 *dm = NULL; |
| 1161 | const __be64 *lrdr = NULL; | ||
| 1162 | struct of_drconf_cell drmem; | ||
| 1163 | |||
| 1164 | dn = of_find_node_by_path("/rtas"); | ||
| 1165 | if (dn) { | ||
| 1166 | lrdr = of_get_property(dn, "ibm,lrdr-capacity", NULL); | ||
| 1167 | of_node_put(dn); | ||
| 1168 | if (lrdr) | ||
| 1169 | return be64_to_cpup(lrdr); | ||
| 1170 | } | ||
| 1171 | |||
| 1172 | memory = of_find_node_by_path("/ibm,dynamic-reconfiguration-memory"); | ||
| 1173 | if (memory) { | ||
| 1174 | drconf_cell_cnt = of_get_drconf_memory(memory, &dm); | ||
| 1175 | lmb_size = of_get_lmb_size(memory); | ||
| 1160 | 1176 | ||
| 1161 | memory = of_find_node_by_path("/ibm,dynamic-reconfiguration-memory"); | 1177 | /* Advance to the last cell, each cell has 6 32 bit integers */ |
| 1162 | if (memory) { | 1178 | dm += (drconf_cell_cnt - 1) * 6; |
| 1163 | drconf_cell_cnt = of_get_drconf_memory(memory, &dm); | 1179 | read_drconf_cell(&drmem, &dm); |
| 1164 | lmb_size = of_get_lmb_size(memory); | 1180 | of_node_put(memory); |
| 1165 | of_node_put(memory); | 1181 | return drmem.base_addr + lmb_size; |
| 1166 | } | 1182 | } |
| 1167 | return lmb_size * drconf_cell_cnt; | 1183 | return 0; |
| 1168 | } | 1184 | } |
| 1169 | 1185 | ||
| 1170 | /* | 1186 | /* |
diff --git a/arch/powerpc/mm/pgtable-radix.c b/arch/powerpc/mm/pgtable-radix.c index 7931e1496f0d..003ff48a11b6 100644 --- a/arch/powerpc/mm/pgtable-radix.c +++ b/arch/powerpc/mm/pgtable-radix.c | |||
| @@ -21,8 +21,11 @@ | |||
| 21 | 21 | ||
| 22 | #include <trace/events/thp.h> | 22 | #include <trace/events/thp.h> |
| 23 | 23 | ||
| 24 | static int native_update_partition_table(u64 patb1) | 24 | static int native_register_process_table(unsigned long base, unsigned long pg_sz, |
| 25 | unsigned long table_size) | ||
| 25 | { | 26 | { |
| 27 | unsigned long patb1 = base | table_size | PATB_GR; | ||
| 28 | |||
| 26 | partition_tb->patb1 = cpu_to_be64(patb1); | 29 | partition_tb->patb1 = cpu_to_be64(patb1); |
| 27 | return 0; | 30 | return 0; |
| 28 | } | 31 | } |
| @@ -168,7 +171,7 @@ redo: | |||
| 168 | * of process table here. But our linear mapping also enable us to use | 171 | * of process table here. But our linear mapping also enable us to use |
| 169 | * physical address here. | 172 | * physical address here. |
| 170 | */ | 173 | */ |
| 171 | ppc_md.update_partition_table(__pa(process_tb) | (PRTB_SIZE_SHIFT - 12) | PATB_GR); | 174 | ppc_md.register_process_table(__pa(process_tb), 0, PRTB_SIZE_SHIFT - 12); |
| 172 | pr_info("Process table %p and radix root for kernel: %p\n", process_tb, init_mm.pgd); | 175 | pr_info("Process table %p and radix root for kernel: %p\n", process_tb, init_mm.pgd); |
| 173 | } | 176 | } |
| 174 | 177 | ||
| @@ -182,7 +185,8 @@ static void __init radix_init_partition_table(void) | |||
| 182 | partition_tb = early_alloc_pgtable(1UL << PATB_SIZE_SHIFT); | 185 | partition_tb = early_alloc_pgtable(1UL << PATB_SIZE_SHIFT); |
| 183 | partition_tb->patb0 = cpu_to_be64(rts_field | __pa(init_mm.pgd) | | 186 | partition_tb->patb0 = cpu_to_be64(rts_field | __pa(init_mm.pgd) | |
| 184 | RADIX_PGD_INDEX_SIZE | PATB_HR); | 187 | RADIX_PGD_INDEX_SIZE | PATB_HR); |
| 185 | printk("Partition table %p\n", partition_tb); | 188 | pr_info("Initializing Radix MMU\n"); |
| 189 | pr_info("Partition table %p\n", partition_tb); | ||
| 186 | 190 | ||
| 187 | memblock_set_current_limit(MEMBLOCK_ALLOC_ANYWHERE); | 191 | memblock_set_current_limit(MEMBLOCK_ALLOC_ANYWHERE); |
| 188 | /* | 192 | /* |
| @@ -194,7 +198,7 @@ static void __init radix_init_partition_table(void) | |||
| 194 | 198 | ||
| 195 | void __init radix_init_native(void) | 199 | void __init radix_init_native(void) |
| 196 | { | 200 | { |
| 197 | ppc_md.update_partition_table = native_update_partition_table; | 201 | ppc_md.register_process_table = native_register_process_table; |
| 198 | } | 202 | } |
| 199 | 203 | ||
| 200 | static int __init get_idx_from_shift(unsigned int shift) | 204 | static int __init get_idx_from_shift(unsigned int shift) |
| @@ -341,8 +345,9 @@ void __init radix__early_init_mmu(void) | |||
| 341 | 345 | ||
| 342 | radix_init_page_sizes(); | 346 | radix_init_page_sizes(); |
| 343 | if (!firmware_has_feature(FW_FEATURE_LPAR)) { | 347 | if (!firmware_has_feature(FW_FEATURE_LPAR)) { |
| 348 | radix_init_native(); | ||
| 344 | lpcr = mfspr(SPRN_LPCR); | 349 | lpcr = mfspr(SPRN_LPCR); |
| 345 | mtspr(SPRN_LPCR, lpcr | LPCR_UPRT); | 350 | mtspr(SPRN_LPCR, lpcr | LPCR_UPRT | LPCR_HR); |
| 346 | radix_init_partition_table(); | 351 | radix_init_partition_table(); |
| 347 | } | 352 | } |
| 348 | 353 | ||
| @@ -357,7 +362,7 @@ void radix__early_init_mmu_secondary(void) | |||
| 357 | */ | 362 | */ |
| 358 | if (!firmware_has_feature(FW_FEATURE_LPAR)) { | 363 | if (!firmware_has_feature(FW_FEATURE_LPAR)) { |
| 359 | lpcr = mfspr(SPRN_LPCR); | 364 | lpcr = mfspr(SPRN_LPCR); |
| 360 | mtspr(SPRN_LPCR, lpcr | LPCR_UPRT); | 365 | mtspr(SPRN_LPCR, lpcr | LPCR_UPRT | LPCR_HR); |
| 361 | 366 | ||
| 362 | mtspr(SPRN_PTCR, | 367 | mtspr(SPRN_PTCR, |
| 363 | __pa(partition_tb) | (PATB_SIZE_SHIFT - 12)); | 368 | __pa(partition_tb) | (PATB_SIZE_SHIFT - 12)); |
diff --git a/arch/powerpc/mm/tlb-radix.c b/arch/powerpc/mm/tlb-radix.c index ab2f60e812e2..e1f22700fb16 100644 --- a/arch/powerpc/mm/tlb-radix.c +++ b/arch/powerpc/mm/tlb-radix.c | |||
| @@ -12,6 +12,7 @@ | |||
| 12 | #include <linux/mm.h> | 12 | #include <linux/mm.h> |
| 13 | #include <linux/hugetlb.h> | 13 | #include <linux/hugetlb.h> |
| 14 | #include <linux/memblock.h> | 14 | #include <linux/memblock.h> |
| 15 | #include <asm/ppc-opcode.h> | ||
| 15 | 16 | ||
| 16 | #include <asm/tlb.h> | 17 | #include <asm/tlb.h> |
| 17 | #include <asm/tlbflush.h> | 18 | #include <asm/tlbflush.h> |
| @@ -34,8 +35,7 @@ static inline void __tlbiel_pid(unsigned long pid, int set, | |||
| 34 | r = 1; /* raidx format */ | 35 | r = 1; /* raidx format */ |
| 35 | 36 | ||
| 36 | asm volatile("ptesync": : :"memory"); | 37 | asm volatile("ptesync": : :"memory"); |
| 37 | asm volatile(".long 0x7c000224 | (%0 << 11) | (%1 << 16) |" | 38 | asm volatile(PPC_TLBIEL(%0, %4, %3, %2, %1) |
| 38 | "(%2 << 17) | (%3 << 18) | (%4 << 21)" | ||
| 39 | : : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory"); | 39 | : : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory"); |
| 40 | asm volatile("ptesync": : :"memory"); | 40 | asm volatile("ptesync": : :"memory"); |
| 41 | } | 41 | } |
| @@ -63,8 +63,7 @@ static inline void _tlbie_pid(unsigned long pid, unsigned long ric) | |||
| 63 | r = 1; /* raidx format */ | 63 | r = 1; /* raidx format */ |
| 64 | 64 | ||
| 65 | asm volatile("ptesync": : :"memory"); | 65 | asm volatile("ptesync": : :"memory"); |
| 66 | asm volatile(".long 0x7c000264 | (%0 << 11) | (%1 << 16) |" | 66 | asm volatile(PPC_TLBIE_5(%0, %4, %3, %2, %1) |
| 67 | "(%2 << 17) | (%3 << 18) | (%4 << 21)" | ||
| 68 | : : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory"); | 67 | : : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory"); |
| 69 | asm volatile("eieio; tlbsync; ptesync": : :"memory"); | 68 | asm volatile("eieio; tlbsync; ptesync": : :"memory"); |
| 70 | } | 69 | } |
| @@ -81,8 +80,7 @@ static inline void _tlbiel_va(unsigned long va, unsigned long pid, | |||
| 81 | r = 1; /* raidx format */ | 80 | r = 1; /* raidx format */ |
| 82 | 81 | ||
| 83 | asm volatile("ptesync": : :"memory"); | 82 | asm volatile("ptesync": : :"memory"); |
| 84 | asm volatile(".long 0x7c000224 | (%0 << 11) | (%1 << 16) |" | 83 | asm volatile(PPC_TLBIEL(%0, %4, %3, %2, %1) |
| 85 | "(%2 << 17) | (%3 << 18) | (%4 << 21)" | ||
| 86 | : : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory"); | 84 | : : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory"); |
| 87 | asm volatile("ptesync": : :"memory"); | 85 | asm volatile("ptesync": : :"memory"); |
| 88 | } | 86 | } |
| @@ -99,8 +97,7 @@ static inline void _tlbie_va(unsigned long va, unsigned long pid, | |||
| 99 | r = 1; /* raidx format */ | 97 | r = 1; /* raidx format */ |
| 100 | 98 | ||
| 101 | asm volatile("ptesync": : :"memory"); | 99 | asm volatile("ptesync": : :"memory"); |
| 102 | asm volatile(".long 0x7c000264 | (%0 << 11) | (%1 << 16) |" | 100 | asm volatile(PPC_TLBIE_5(%0, %4, %3, %2, %1) |
| 103 | "(%2 << 17) | (%3 << 18) | (%4 << 21)" | ||
| 104 | : : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory"); | 101 | : : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory"); |
| 105 | asm volatile("eieio; tlbsync; ptesync": : :"memory"); | 102 | asm volatile("eieio; tlbsync; ptesync": : :"memory"); |
| 106 | } | 103 | } |
| @@ -285,9 +282,61 @@ void radix__flush_tlb_range(struct vm_area_struct *vma, unsigned long start, | |||
| 285 | } | 282 | } |
| 286 | EXPORT_SYMBOL(radix__flush_tlb_range); | 283 | EXPORT_SYMBOL(radix__flush_tlb_range); |
| 287 | 284 | ||
| 285 | static int radix_get_mmu_psize(int page_size) | ||
| 286 | { | ||
| 287 | int psize; | ||
| 288 | |||
| 289 | if (page_size == (1UL << mmu_psize_defs[mmu_virtual_psize].shift)) | ||
| 290 | psize = mmu_virtual_psize; | ||
| 291 | else if (page_size == (1UL << mmu_psize_defs[MMU_PAGE_2M].shift)) | ||
| 292 | psize = MMU_PAGE_2M; | ||
| 293 | else if (page_size == (1UL << mmu_psize_defs[MMU_PAGE_1G].shift)) | ||
| 294 | psize = MMU_PAGE_1G; | ||
| 295 | else | ||
| 296 | return -1; | ||
| 297 | return psize; | ||
| 298 | } | ||
| 288 | 299 | ||
| 289 | void radix__tlb_flush(struct mmu_gather *tlb) | 300 | void radix__tlb_flush(struct mmu_gather *tlb) |
| 290 | { | 301 | { |
| 291 | struct mm_struct *mm = tlb->mm; | 302 | struct mm_struct *mm = tlb->mm; |
| 292 | radix__flush_tlb_mm(mm); | 303 | radix__flush_tlb_mm(mm); |
| 293 | } | 304 | } |
| 305 | |||
| 306 | void radix__flush_tlb_lpid_va(unsigned long lpid, unsigned long gpa, | ||
| 307 | unsigned long page_size) | ||
| 308 | { | ||
| 309 | unsigned long rb,rs,prs,r; | ||
| 310 | unsigned long ap; | ||
| 311 | unsigned long ric = RIC_FLUSH_TLB; | ||
| 312 | |||
| 313 | ap = mmu_get_ap(radix_get_mmu_psize(page_size)); | ||
| 314 | rb = gpa & ~(PPC_BITMASK(52, 63)); | ||
| 315 | rb |= ap << PPC_BITLSHIFT(58); | ||
| 316 | rs = lpid & ((1UL << 32) - 1); | ||
| 317 | prs = 0; /* process scoped */ | ||
| 318 | r = 1; /* raidx format */ | ||
| 319 | |||
| 320 | asm volatile("ptesync": : :"memory"); | ||
| 321 | asm volatile(PPC_TLBIE_5(%0, %4, %3, %2, %1) | ||
| 322 | : : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory"); | ||
| 323 | asm volatile("eieio; tlbsync; ptesync": : :"memory"); | ||
| 324 | } | ||
| 325 | EXPORT_SYMBOL(radix__flush_tlb_lpid_va); | ||
| 326 | |||
| 327 | void radix__flush_tlb_lpid(unsigned long lpid) | ||
| 328 | { | ||
| 329 | unsigned long rb,rs,prs,r; | ||
| 330 | unsigned long ric = RIC_FLUSH_ALL; | ||
| 331 | |||
| 332 | rb = 0x2 << PPC_BITLSHIFT(53); /* IS = 2 */ | ||
| 333 | rs = lpid & ((1UL << 32) - 1); | ||
| 334 | prs = 0; /* partition scoped */ | ||
| 335 | r = 1; /* raidx format */ | ||
| 336 | |||
| 337 | asm volatile("ptesync": : :"memory"); | ||
| 338 | asm volatile(PPC_TLBIE_5(%0, %4, %3, %2, %1) | ||
| 339 | : : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory"); | ||
| 340 | asm volatile("eieio; tlbsync; ptesync": : :"memory"); | ||
| 341 | } | ||
| 342 | EXPORT_SYMBOL(radix__flush_tlb_lpid); | ||
diff --git a/arch/powerpc/net/Makefile b/arch/powerpc/net/Makefile index 1306a58ac541..c1ff16a6eb51 100644 --- a/arch/powerpc/net/Makefile +++ b/arch/powerpc/net/Makefile | |||
| @@ -1,4 +1,8 @@ | |||
| 1 | # | 1 | # |
| 2 | # Arch-specific network modules | 2 | # Arch-specific network modules |
| 3 | # | 3 | # |
| 4 | ifeq ($(CONFIG_PPC64),y) | ||
| 5 | obj-$(CONFIG_BPF_JIT) += bpf_jit_asm64.o bpf_jit_comp64.o | ||
| 6 | else | ||
| 4 | obj-$(CONFIG_BPF_JIT) += bpf_jit_asm.o bpf_jit_comp.o | 7 | obj-$(CONFIG_BPF_JIT) += bpf_jit_asm.o bpf_jit_comp.o |
| 8 | endif | ||
diff --git a/arch/powerpc/net/bpf_jit.h b/arch/powerpc/net/bpf_jit.h index 889fd199a821..d5301b6f20d0 100644 --- a/arch/powerpc/net/bpf_jit.h +++ b/arch/powerpc/net/bpf_jit.h | |||
| @@ -1,6 +1,8 @@ | |||
| 1 | /* bpf_jit.h: BPF JIT compiler for PPC64 | 1 | /* |
| 2 | * bpf_jit.h: BPF JIT compiler for PPC | ||
| 2 | * | 3 | * |
| 3 | * Copyright 2011 Matt Evans <matt@ozlabs.org>, IBM Corporation | 4 | * Copyright 2011 Matt Evans <matt@ozlabs.org>, IBM Corporation |
| 5 | * 2016 Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> | ||
| 4 | * | 6 | * |
| 5 | * This program is free software; you can redistribute it and/or | 7 | * This program is free software; you can redistribute it and/or |
| 6 | * modify it under the terms of the GNU General Public License | 8 | * modify it under the terms of the GNU General Public License |
| @@ -10,67 +12,11 @@ | |||
| 10 | #ifndef _BPF_JIT_H | 12 | #ifndef _BPF_JIT_H |
| 11 | #define _BPF_JIT_H | 13 | #define _BPF_JIT_H |
| 12 | 14 | ||
| 13 | #ifdef CONFIG_PPC64 | ||
| 14 | #define BPF_PPC_STACK_R3_OFF 48 | ||
| 15 | #define BPF_PPC_STACK_LOCALS 32 | ||
| 16 | #define BPF_PPC_STACK_BASIC (48+64) | ||
| 17 | #define BPF_PPC_STACK_SAVE (18*8) | ||
| 18 | #define BPF_PPC_STACKFRAME (BPF_PPC_STACK_BASIC+BPF_PPC_STACK_LOCALS+ \ | ||
| 19 | BPF_PPC_STACK_SAVE) | ||
| 20 | #define BPF_PPC_SLOWPATH_FRAME (48+64) | ||
| 21 | #else | ||
| 22 | #define BPF_PPC_STACK_R3_OFF 24 | ||
| 23 | #define BPF_PPC_STACK_LOCALS 16 | ||
| 24 | #define BPF_PPC_STACK_BASIC (24+32) | ||
| 25 | #define BPF_PPC_STACK_SAVE (18*4) | ||
| 26 | #define BPF_PPC_STACKFRAME (BPF_PPC_STACK_BASIC+BPF_PPC_STACK_LOCALS+ \ | ||
| 27 | BPF_PPC_STACK_SAVE) | ||
| 28 | #define BPF_PPC_SLOWPATH_FRAME (24+32) | ||
| 29 | #endif | ||
| 30 | |||
| 31 | #define REG_SZ (BITS_PER_LONG/8) | ||
| 32 | |||
| 33 | /* | ||
| 34 | * Generated code register usage: | ||
| 35 | * | ||
| 36 | * As normal PPC C ABI (e.g. r1=sp, r2=TOC), with: | ||
| 37 | * | ||
| 38 | * skb r3 (Entry parameter) | ||
| 39 | * A register r4 | ||
| 40 | * X register r5 | ||
| 41 | * addr param r6 | ||
| 42 | * r7-r10 scratch | ||
| 43 | * skb->data r14 | ||
| 44 | * skb headlen r15 (skb->len - skb->data_len) | ||
| 45 | * m[0] r16 | ||
| 46 | * m[...] ... | ||
| 47 | * m[15] r31 | ||
| 48 | */ | ||
| 49 | #define r_skb 3 | ||
| 50 | #define r_ret 3 | ||
| 51 | #define r_A 4 | ||
| 52 | #define r_X 5 | ||
| 53 | #define r_addr 6 | ||
| 54 | #define r_scratch1 7 | ||
| 55 | #define r_scratch2 8 | ||
| 56 | #define r_D 14 | ||
| 57 | #define r_HL 15 | ||
| 58 | #define r_M 16 | ||
| 59 | |||
| 60 | #ifndef __ASSEMBLY__ | 15 | #ifndef __ASSEMBLY__ |
| 61 | 16 | ||
| 62 | /* | 17 | #include <asm/types.h> |
| 63 | * Assembly helpers from arch/powerpc/net/bpf_jit.S: | ||
| 64 | */ | ||
| 65 | #define DECLARE_LOAD_FUNC(func) \ | ||
| 66 | extern u8 func[], func##_negative_offset[], func##_positive_offset[] | ||
| 67 | |||
| 68 | DECLARE_LOAD_FUNC(sk_load_word); | ||
| 69 | DECLARE_LOAD_FUNC(sk_load_half); | ||
| 70 | DECLARE_LOAD_FUNC(sk_load_byte); | ||
| 71 | DECLARE_LOAD_FUNC(sk_load_byte_msh); | ||
| 72 | 18 | ||
| 73 | #ifdef CONFIG_PPC64 | 19 | #ifdef PPC64_ELF_ABI_v1 |
| 74 | #define FUNCTION_DESCR_SIZE 24 | 20 | #define FUNCTION_DESCR_SIZE 24 |
| 75 | #else | 21 | #else |
| 76 | #define FUNCTION_DESCR_SIZE 0 | 22 | #define FUNCTION_DESCR_SIZE 0 |
| @@ -83,7 +29,7 @@ DECLARE_LOAD_FUNC(sk_load_byte_msh); | |||
| 83 | */ | 29 | */ |
| 84 | #define IMM_H(i) ((uintptr_t)(i)>>16) | 30 | #define IMM_H(i) ((uintptr_t)(i)>>16) |
| 85 | #define IMM_HA(i) (((uintptr_t)(i)>>16) + \ | 31 | #define IMM_HA(i) (((uintptr_t)(i)>>16) + \ |
| 86 | (((uintptr_t)(i) & 0x8000) >> 15)) | 32 | (((uintptr_t)(i) & 0x8000) >> 15)) |
| 87 | #define IMM_L(i) ((uintptr_t)(i) & 0xffff) | 33 | #define IMM_L(i) ((uintptr_t)(i) & 0xffff) |
| 88 | 34 | ||
| 89 | #define PLANT_INSTR(d, idx, instr) \ | 35 | #define PLANT_INSTR(d, idx, instr) \ |
| @@ -99,16 +45,20 @@ DECLARE_LOAD_FUNC(sk_load_byte_msh); | |||
| 99 | #define PPC_MR(d, a) PPC_OR(d, a, a) | 45 | #define PPC_MR(d, a) PPC_OR(d, a, a) |
| 100 | #define PPC_LI(r, i) PPC_ADDI(r, 0, i) | 46 | #define PPC_LI(r, i) PPC_ADDI(r, 0, i) |
| 101 | #define PPC_ADDIS(d, a, i) EMIT(PPC_INST_ADDIS | \ | 47 | #define PPC_ADDIS(d, a, i) EMIT(PPC_INST_ADDIS | \ |
| 102 | ___PPC_RS(d) | ___PPC_RA(a) | IMM_L(i)) | 48 | ___PPC_RT(d) | ___PPC_RA(a) | IMM_L(i)) |
| 103 | #define PPC_LIS(r, i) PPC_ADDIS(r, 0, i) | 49 | #define PPC_LIS(r, i) PPC_ADDIS(r, 0, i) |
| 104 | #define PPC_STD(r, base, i) EMIT(PPC_INST_STD | ___PPC_RS(r) | \ | 50 | #define PPC_STD(r, base, i) EMIT(PPC_INST_STD | ___PPC_RS(r) | \ |
| 105 | ___PPC_RA(base) | ((i) & 0xfffc)) | 51 | ___PPC_RA(base) | ((i) & 0xfffc)) |
| 106 | #define PPC_STDU(r, base, i) EMIT(PPC_INST_STDU | ___PPC_RS(r) | \ | 52 | #define PPC_STDU(r, base, i) EMIT(PPC_INST_STDU | ___PPC_RS(r) | \ |
| 107 | ___PPC_RA(base) | ((i) & 0xfffc)) | 53 | ___PPC_RA(base) | ((i) & 0xfffc)) |
| 108 | #define PPC_STW(r, base, i) EMIT(PPC_INST_STW | ___PPC_RS(r) | \ | 54 | #define PPC_STW(r, base, i) EMIT(PPC_INST_STW | ___PPC_RS(r) | \ |
| 109 | ___PPC_RA(base) | ((i) & 0xfffc)) | 55 | ___PPC_RA(base) | IMM_L(i)) |
| 110 | #define PPC_STWU(r, base, i) EMIT(PPC_INST_STWU | ___PPC_RS(r) | \ | 56 | #define PPC_STWU(r, base, i) EMIT(PPC_INST_STWU | ___PPC_RS(r) | \ |
| 111 | ___PPC_RA(base) | ((i) & 0xfffc)) | 57 | ___PPC_RA(base) | IMM_L(i)) |
| 58 | #define PPC_STH(r, base, i) EMIT(PPC_INST_STH | ___PPC_RS(r) | \ | ||
| 59 | ___PPC_RA(base) | IMM_L(i)) | ||
| 60 | #define PPC_STB(r, base, i) EMIT(PPC_INST_STB | ___PPC_RS(r) | \ | ||
| 61 | ___PPC_RA(base) | IMM_L(i)) | ||
| 112 | 62 | ||
| 113 | #define PPC_LBZ(r, base, i) EMIT(PPC_INST_LBZ | ___PPC_RT(r) | \ | 63 | #define PPC_LBZ(r, base, i) EMIT(PPC_INST_LBZ | ___PPC_RT(r) | \ |
| 114 | ___PPC_RA(base) | IMM_L(i)) | 64 | ___PPC_RA(base) | IMM_L(i)) |
| @@ -120,6 +70,19 @@ DECLARE_LOAD_FUNC(sk_load_byte_msh); | |||
| 120 | ___PPC_RA(base) | IMM_L(i)) | 70 | ___PPC_RA(base) | IMM_L(i)) |
| 121 | #define PPC_LHBRX(r, base, b) EMIT(PPC_INST_LHBRX | ___PPC_RT(r) | \ | 71 | #define PPC_LHBRX(r, base, b) EMIT(PPC_INST_LHBRX | ___PPC_RT(r) | \ |
| 122 | ___PPC_RA(base) | ___PPC_RB(b)) | 72 | ___PPC_RA(base) | ___PPC_RB(b)) |
| 73 | #define PPC_LDBRX(r, base, b) EMIT(PPC_INST_LDBRX | ___PPC_RT(r) | \ | ||
| 74 | ___PPC_RA(base) | ___PPC_RB(b)) | ||
| 75 | |||
| 76 | #define PPC_BPF_LDARX(t, a, b, eh) EMIT(PPC_INST_LDARX | ___PPC_RT(t) | \ | ||
| 77 | ___PPC_RA(a) | ___PPC_RB(b) | \ | ||
| 78 | __PPC_EH(eh)) | ||
| 79 | #define PPC_BPF_LWARX(t, a, b, eh) EMIT(PPC_INST_LWARX | ___PPC_RT(t) | \ | ||
| 80 | ___PPC_RA(a) | ___PPC_RB(b) | \ | ||
| 81 | __PPC_EH(eh)) | ||
| 82 | #define PPC_BPF_STWCX(s, a, b) EMIT(PPC_INST_STWCX | ___PPC_RS(s) | \ | ||
| 83 | ___PPC_RA(a) | ___PPC_RB(b)) | ||
| 84 | #define PPC_BPF_STDCX(s, a, b) EMIT(PPC_INST_STDCX | ___PPC_RS(s) | \ | ||
| 85 | ___PPC_RA(a) | ___PPC_RB(b)) | ||
| 123 | 86 | ||
| 124 | #ifdef CONFIG_PPC64 | 87 | #ifdef CONFIG_PPC64 |
| 125 | #define PPC_BPF_LL(r, base, i) do { PPC_LD(r, base, i); } while(0) | 88 | #define PPC_BPF_LL(r, base, i) do { PPC_LD(r, base, i); } while(0) |
| @@ -131,56 +94,26 @@ DECLARE_LOAD_FUNC(sk_load_byte_msh); | |||
| 131 | #define PPC_BPF_STLU(r, base, i) do { PPC_STWU(r, base, i); } while(0) | 94 | #define PPC_BPF_STLU(r, base, i) do { PPC_STWU(r, base, i); } while(0) |
| 132 | #endif | 95 | #endif |
| 133 | 96 | ||
| 134 | /* Convenience helpers for the above with 'far' offsets: */ | ||
| 135 | #define PPC_LBZ_OFFS(r, base, i) do { if ((i) < 32768) PPC_LBZ(r, base, i); \ | ||
| 136 | else { PPC_ADDIS(r, base, IMM_HA(i)); \ | ||
| 137 | PPC_LBZ(r, r, IMM_L(i)); } } while(0) | ||
| 138 | |||
| 139 | #define PPC_LD_OFFS(r, base, i) do { if ((i) < 32768) PPC_LD(r, base, i); \ | ||
| 140 | else { PPC_ADDIS(r, base, IMM_HA(i)); \ | ||
| 141 | PPC_LD(r, r, IMM_L(i)); } } while(0) | ||
| 142 | |||
| 143 | #define PPC_LWZ_OFFS(r, base, i) do { if ((i) < 32768) PPC_LWZ(r, base, i); \ | ||
| 144 | else { PPC_ADDIS(r, base, IMM_HA(i)); \ | ||
| 145 | PPC_LWZ(r, r, IMM_L(i)); } } while(0) | ||
| 146 | |||
| 147 | #define PPC_LHZ_OFFS(r, base, i) do { if ((i) < 32768) PPC_LHZ(r, base, i); \ | ||
| 148 | else { PPC_ADDIS(r, base, IMM_HA(i)); \ | ||
| 149 | PPC_LHZ(r, r, IMM_L(i)); } } while(0) | ||
| 150 | |||
| 151 | #ifdef CONFIG_PPC64 | ||
| 152 | #define PPC_LL_OFFS(r, base, i) do { PPC_LD_OFFS(r, base, i); } while(0) | ||
| 153 | #else | ||
| 154 | #define PPC_LL_OFFS(r, base, i) do { PPC_LWZ_OFFS(r, base, i); } while(0) | ||
| 155 | #endif | ||
| 156 | |||
| 157 | #ifdef CONFIG_SMP | ||
| 158 | #ifdef CONFIG_PPC64 | ||
| 159 | #define PPC_BPF_LOAD_CPU(r) \ | ||
| 160 | do { BUILD_BUG_ON(FIELD_SIZEOF(struct paca_struct, paca_index) != 2); \ | ||
| 161 | PPC_LHZ_OFFS(r, 13, offsetof(struct paca_struct, paca_index)); \ | ||
| 162 | } while (0) | ||
| 163 | #else | ||
| 164 | #define PPC_BPF_LOAD_CPU(r) \ | ||
| 165 | do { BUILD_BUG_ON(FIELD_SIZEOF(struct thread_info, cpu) != 4); \ | ||
| 166 | PPC_LHZ_OFFS(r, (1 & ~(THREAD_SIZE - 1)), \ | ||
| 167 | offsetof(struct thread_info, cpu)); \ | ||
| 168 | } while(0) | ||
| 169 | #endif | ||
| 170 | #else | ||
| 171 | #define PPC_BPF_LOAD_CPU(r) do { PPC_LI(r, 0); } while(0) | ||
| 172 | #endif | ||
| 173 | |||
| 174 | #define PPC_CMPWI(a, i) EMIT(PPC_INST_CMPWI | ___PPC_RA(a) | IMM_L(i)) | 97 | #define PPC_CMPWI(a, i) EMIT(PPC_INST_CMPWI | ___PPC_RA(a) | IMM_L(i)) |
| 175 | #define PPC_CMPDI(a, i) EMIT(PPC_INST_CMPDI | ___PPC_RA(a) | IMM_L(i)) | 98 | #define PPC_CMPDI(a, i) EMIT(PPC_INST_CMPDI | ___PPC_RA(a) | IMM_L(i)) |
| 99 | #define PPC_CMPW(a, b) EMIT(PPC_INST_CMPW | ___PPC_RA(a) | \ | ||
| 100 | ___PPC_RB(b)) | ||
| 101 | #define PPC_CMPD(a, b) EMIT(PPC_INST_CMPD | ___PPC_RA(a) | \ | ||
| 102 | ___PPC_RB(b)) | ||
| 176 | #define PPC_CMPLWI(a, i) EMIT(PPC_INST_CMPLWI | ___PPC_RA(a) | IMM_L(i)) | 103 | #define PPC_CMPLWI(a, i) EMIT(PPC_INST_CMPLWI | ___PPC_RA(a) | IMM_L(i)) |
| 177 | #define PPC_CMPLW(a, b) EMIT(PPC_INST_CMPLW | ___PPC_RA(a) | ___PPC_RB(b)) | 104 | #define PPC_CMPLDI(a, i) EMIT(PPC_INST_CMPLDI | ___PPC_RA(a) | IMM_L(i)) |
| 105 | #define PPC_CMPLW(a, b) EMIT(PPC_INST_CMPLW | ___PPC_RA(a) | \ | ||
| 106 | ___PPC_RB(b)) | ||
| 107 | #define PPC_CMPLD(a, b) EMIT(PPC_INST_CMPLD | ___PPC_RA(a) | \ | ||
| 108 | ___PPC_RB(b)) | ||
| 178 | 109 | ||
| 179 | #define PPC_SUB(d, a, b) EMIT(PPC_INST_SUB | ___PPC_RT(d) | \ | 110 | #define PPC_SUB(d, a, b) EMIT(PPC_INST_SUB | ___PPC_RT(d) | \ |
| 180 | ___PPC_RB(a) | ___PPC_RA(b)) | 111 | ___PPC_RB(a) | ___PPC_RA(b)) |
| 181 | #define PPC_ADD(d, a, b) EMIT(PPC_INST_ADD | ___PPC_RT(d) | \ | 112 | #define PPC_ADD(d, a, b) EMIT(PPC_INST_ADD | ___PPC_RT(d) | \ |
| 182 | ___PPC_RA(a) | ___PPC_RB(b)) | 113 | ___PPC_RA(a) | ___PPC_RB(b)) |
| 183 | #define PPC_MUL(d, a, b) EMIT(PPC_INST_MULLW | ___PPC_RT(d) | \ | 114 | #define PPC_MULD(d, a, b) EMIT(PPC_INST_MULLD | ___PPC_RT(d) | \ |
| 115 | ___PPC_RA(a) | ___PPC_RB(b)) | ||
| 116 | #define PPC_MULW(d, a, b) EMIT(PPC_INST_MULLW | ___PPC_RT(d) | \ | ||
| 184 | ___PPC_RA(a) | ___PPC_RB(b)) | 117 | ___PPC_RA(a) | ___PPC_RB(b)) |
| 185 | #define PPC_MULHWU(d, a, b) EMIT(PPC_INST_MULHWU | ___PPC_RT(d) | \ | 118 | #define PPC_MULHWU(d, a, b) EMIT(PPC_INST_MULHWU | ___PPC_RT(d) | \ |
| 186 | ___PPC_RA(a) | ___PPC_RB(b)) | 119 | ___PPC_RA(a) | ___PPC_RB(b)) |
| @@ -188,6 +121,8 @@ DECLARE_LOAD_FUNC(sk_load_byte_msh); | |||
| 188 | ___PPC_RA(a) | IMM_L(i)) | 121 | ___PPC_RA(a) | IMM_L(i)) |
| 189 | #define PPC_DIVWU(d, a, b) EMIT(PPC_INST_DIVWU | ___PPC_RT(d) | \ | 122 | #define PPC_DIVWU(d, a, b) EMIT(PPC_INST_DIVWU | ___PPC_RT(d) | \ |
| 190 | ___PPC_RA(a) | ___PPC_RB(b)) | 123 | ___PPC_RA(a) | ___PPC_RB(b)) |
| 124 | #define PPC_DIVD(d, a, b) EMIT(PPC_INST_DIVD | ___PPC_RT(d) | \ | ||
| 125 | ___PPC_RA(a) | ___PPC_RB(b)) | ||
| 191 | #define PPC_AND(d, a, b) EMIT(PPC_INST_AND | ___PPC_RA(d) | \ | 126 | #define PPC_AND(d, a, b) EMIT(PPC_INST_AND | ___PPC_RA(d) | \ |
| 192 | ___PPC_RS(a) | ___PPC_RB(b)) | 127 | ___PPC_RS(a) | ___PPC_RB(b)) |
| 193 | #define PPC_ANDI(d, a, i) EMIT(PPC_INST_ANDI | ___PPC_RA(d) | \ | 128 | #define PPC_ANDI(d, a, i) EMIT(PPC_INST_ANDI | ___PPC_RA(d) | \ |
| @@ -196,6 +131,7 @@ DECLARE_LOAD_FUNC(sk_load_byte_msh); | |||
| 196 | ___PPC_RS(a) | ___PPC_RB(b)) | 131 | ___PPC_RS(a) | ___PPC_RB(b)) |
| 197 | #define PPC_OR(d, a, b) EMIT(PPC_INST_OR | ___PPC_RA(d) | \ | 132 | #define PPC_OR(d, a, b) EMIT(PPC_INST_OR | ___PPC_RA(d) | \ |
| 198 | ___PPC_RS(a) | ___PPC_RB(b)) | 133 | ___PPC_RS(a) | ___PPC_RB(b)) |
| 134 | #define PPC_MR(d, a) PPC_OR(d, a, a) | ||
| 199 | #define PPC_ORI(d, a, i) EMIT(PPC_INST_ORI | ___PPC_RA(d) | \ | 135 | #define PPC_ORI(d, a, i) EMIT(PPC_INST_ORI | ___PPC_RA(d) | \ |
| 200 | ___PPC_RS(a) | IMM_L(i)) | 136 | ___PPC_RS(a) | IMM_L(i)) |
| 201 | #define PPC_ORIS(d, a, i) EMIT(PPC_INST_ORIS | ___PPC_RA(d) | \ | 137 | #define PPC_ORIS(d, a, i) EMIT(PPC_INST_ORIS | ___PPC_RA(d) | \ |
| @@ -206,22 +142,43 @@ DECLARE_LOAD_FUNC(sk_load_byte_msh); | |||
| 206 | ___PPC_RS(a) | IMM_L(i)) | 142 | ___PPC_RS(a) | IMM_L(i)) |
| 207 | #define PPC_XORIS(d, a, i) EMIT(PPC_INST_XORIS | ___PPC_RA(d) | \ | 143 | #define PPC_XORIS(d, a, i) EMIT(PPC_INST_XORIS | ___PPC_RA(d) | \ |
| 208 | ___PPC_RS(a) | IMM_L(i)) | 144 | ___PPC_RS(a) | IMM_L(i)) |
| 145 | #define PPC_EXTSW(d, a) EMIT(PPC_INST_EXTSW | ___PPC_RA(d) | \ | ||
| 146 | ___PPC_RS(a)) | ||
| 209 | #define PPC_SLW(d, a, s) EMIT(PPC_INST_SLW | ___PPC_RA(d) | \ | 147 | #define PPC_SLW(d, a, s) EMIT(PPC_INST_SLW | ___PPC_RA(d) | \ |
| 210 | ___PPC_RS(a) | ___PPC_RB(s)) | 148 | ___PPC_RS(a) | ___PPC_RB(s)) |
| 149 | #define PPC_SLD(d, a, s) EMIT(PPC_INST_SLD | ___PPC_RA(d) | \ | ||
| 150 | ___PPC_RS(a) | ___PPC_RB(s)) | ||
| 211 | #define PPC_SRW(d, a, s) EMIT(PPC_INST_SRW | ___PPC_RA(d) | \ | 151 | #define PPC_SRW(d, a, s) EMIT(PPC_INST_SRW | ___PPC_RA(d) | \ |
| 212 | ___PPC_RS(a) | ___PPC_RB(s)) | 152 | ___PPC_RS(a) | ___PPC_RB(s)) |
| 153 | #define PPC_SRD(d, a, s) EMIT(PPC_INST_SRD | ___PPC_RA(d) | \ | ||
| 154 | ___PPC_RS(a) | ___PPC_RB(s)) | ||
| 155 | #define PPC_SRAD(d, a, s) EMIT(PPC_INST_SRAD | ___PPC_RA(d) | \ | ||
| 156 | ___PPC_RS(a) | ___PPC_RB(s)) | ||
| 157 | #define PPC_SRADI(d, a, i) EMIT(PPC_INST_SRADI | ___PPC_RA(d) | \ | ||
| 158 | ___PPC_RS(a) | __PPC_SH(i) | \ | ||
| 159 | (((i) & 0x20) >> 4)) | ||
| 160 | #define PPC_RLWINM(d, a, i, mb, me) EMIT(PPC_INST_RLWINM | ___PPC_RA(d) | \ | ||
| 161 | ___PPC_RS(a) | __PPC_SH(i) | \ | ||
| 162 | __PPC_MB(mb) | __PPC_ME(me)) | ||
| 163 | #define PPC_RLWIMI(d, a, i, mb, me) EMIT(PPC_INST_RLWIMI | ___PPC_RA(d) | \ | ||
| 164 | ___PPC_RS(a) | __PPC_SH(i) | \ | ||
| 165 | __PPC_MB(mb) | __PPC_ME(me)) | ||
| 166 | #define PPC_RLDICL(d, a, i, mb) EMIT(PPC_INST_RLDICL | ___PPC_RA(d) | \ | ||
| 167 | ___PPC_RS(a) | __PPC_SH(i) | \ | ||
| 168 | __PPC_MB64(mb) | (((i) & 0x20) >> 4)) | ||
| 169 | #define PPC_RLDICR(d, a, i, me) EMIT(PPC_INST_RLDICR | ___PPC_RA(d) | \ | ||
| 170 | ___PPC_RS(a) | __PPC_SH(i) | \ | ||
| 171 | __PPC_ME64(me) | (((i) & 0x20) >> 4)) | ||
| 172 | |||
| 213 | /* slwi = rlwinm Rx, Ry, n, 0, 31-n */ | 173 | /* slwi = rlwinm Rx, Ry, n, 0, 31-n */ |
| 214 | #define PPC_SLWI(d, a, i) EMIT(PPC_INST_RLWINM | ___PPC_RA(d) | \ | 174 | #define PPC_SLWI(d, a, i) PPC_RLWINM(d, a, i, 0, 31-(i)) |
| 215 | ___PPC_RS(a) | __PPC_SH(i) | \ | ||
| 216 | __PPC_MB(0) | __PPC_ME(31-(i))) | ||
| 217 | /* srwi = rlwinm Rx, Ry, 32-n, n, 31 */ | 175 | /* srwi = rlwinm Rx, Ry, 32-n, n, 31 */ |
| 218 | #define PPC_SRWI(d, a, i) EMIT(PPC_INST_RLWINM | ___PPC_RA(d) | \ | 176 | #define PPC_SRWI(d, a, i) PPC_RLWINM(d, a, 32-(i), i, 31) |
| 219 | ___PPC_RS(a) | __PPC_SH(32-(i)) | \ | ||
| 220 | __PPC_MB(i) | __PPC_ME(31)) | ||
| 221 | /* sldi = rldicr Rx, Ry, n, 63-n */ | 177 | /* sldi = rldicr Rx, Ry, n, 63-n */ |
| 222 | #define PPC_SLDI(d, a, i) EMIT(PPC_INST_RLDICR | ___PPC_RA(d) | \ | 178 | #define PPC_SLDI(d, a, i) PPC_RLDICR(d, a, i, 63-(i)) |
| 223 | ___PPC_RS(a) | __PPC_SH(i) | \ | 179 | /* sldi = rldicl Rx, Ry, 64-n, n */ |
| 224 | __PPC_MB(63-(i)) | (((i) & 0x20) >> 4)) | 180 | #define PPC_SRDI(d, a, i) PPC_RLDICL(d, a, 64-(i), i) |
| 181 | |||
| 225 | #define PPC_NEG(d, a) EMIT(PPC_INST_NEG | ___PPC_RT(d) | ___PPC_RA(a)) | 182 | #define PPC_NEG(d, a) EMIT(PPC_INST_NEG | ___PPC_RT(d) | ___PPC_RA(a)) |
| 226 | 183 | ||
| 227 | /* Long jump; (unconditional 'branch') */ | 184 | /* Long jump; (unconditional 'branch') */ |
| @@ -232,25 +189,37 @@ DECLARE_LOAD_FUNC(sk_load_byte_msh); | |||
| 232 | (((cond) & 0x3ff) << 16) | \ | 189 | (((cond) & 0x3ff) << 16) | \ |
| 233 | (((dest) - (ctx->idx * 4)) & \ | 190 | (((dest) - (ctx->idx * 4)) & \ |
| 234 | 0xfffc)) | 191 | 0xfffc)) |
| 235 | #define PPC_LI32(d, i) do { PPC_LI(d, IMM_L(i)); \ | 192 | /* Sign-extended 32-bit immediate load */ |
| 236 | if ((u32)(uintptr_t)(i) >= 32768) { \ | 193 | #define PPC_LI32(d, i) do { \ |
| 237 | PPC_ADDIS(d, d, IMM_HA(i)); \ | 194 | if ((int)(uintptr_t)(i) >= -32768 && \ |
| 195 | (int)(uintptr_t)(i) < 32768) \ | ||
| 196 | PPC_LI(d, i); \ | ||
| 197 | else { \ | ||
| 198 | PPC_LIS(d, IMM_H(i)); \ | ||
| 199 | if (IMM_L(i)) \ | ||
| 200 | PPC_ORI(d, d, IMM_L(i)); \ | ||
| 238 | } } while(0) | 201 | } } while(0) |
| 202 | |||
| 239 | #define PPC_LI64(d, i) do { \ | 203 | #define PPC_LI64(d, i) do { \ |
| 240 | if (!((uintptr_t)(i) & 0xffffffff00000000ULL)) \ | 204 | if ((long)(i) >= -2147483648 && \ |
| 205 | (long)(i) < 2147483648) \ | ||
| 241 | PPC_LI32(d, i); \ | 206 | PPC_LI32(d, i); \ |
| 242 | else { \ | 207 | else { \ |
| 243 | PPC_LIS(d, ((uintptr_t)(i) >> 48)); \ | 208 | if (!((uintptr_t)(i) & 0xffff800000000000ULL)) \ |
| 244 | if ((uintptr_t)(i) & 0x0000ffff00000000ULL) \ | 209 | PPC_LI(d, ((uintptr_t)(i) >> 32) & 0xffff); \ |
| 245 | PPC_ORI(d, d, \ | 210 | else { \ |
| 246 | ((uintptr_t)(i) >> 32) & 0xffff); \ | 211 | PPC_LIS(d, ((uintptr_t)(i) >> 48)); \ |
| 212 | if ((uintptr_t)(i) & 0x0000ffff00000000ULL) \ | ||
| 213 | PPC_ORI(d, d, \ | ||
| 214 | ((uintptr_t)(i) >> 32) & 0xffff); \ | ||
| 215 | } \ | ||
| 247 | PPC_SLDI(d, d, 32); \ | 216 | PPC_SLDI(d, d, 32); \ |
| 248 | if ((uintptr_t)(i) & 0x00000000ffff0000ULL) \ | 217 | if ((uintptr_t)(i) & 0x00000000ffff0000ULL) \ |
| 249 | PPC_ORIS(d, d, \ | 218 | PPC_ORIS(d, d, \ |
| 250 | ((uintptr_t)(i) >> 16) & 0xffff); \ | 219 | ((uintptr_t)(i) >> 16) & 0xffff); \ |
| 251 | if ((uintptr_t)(i) & 0x000000000000ffffULL) \ | 220 | if ((uintptr_t)(i) & 0x000000000000ffffULL) \ |
| 252 | PPC_ORI(d, d, (uintptr_t)(i) & 0xffff); \ | 221 | PPC_ORI(d, d, (uintptr_t)(i) & 0xffff); \ |
| 253 | } } while (0); | 222 | } } while (0) |
| 254 | 223 | ||
| 255 | #ifdef CONFIG_PPC64 | 224 | #ifdef CONFIG_PPC64 |
| 256 | #define PPC_FUNC_ADDR(d,i) do { PPC_LI64(d, i); } while(0) | 225 | #define PPC_FUNC_ADDR(d,i) do { PPC_LI64(d, i); } while(0) |
| @@ -258,14 +227,6 @@ DECLARE_LOAD_FUNC(sk_load_byte_msh); | |||
| 258 | #define PPC_FUNC_ADDR(d,i) do { PPC_LI32(d, i); } while(0) | 227 | #define PPC_FUNC_ADDR(d,i) do { PPC_LI32(d, i); } while(0) |
| 259 | #endif | 228 | #endif |
| 260 | 229 | ||
| 261 | #define PPC_LHBRX_OFFS(r, base, i) \ | ||
| 262 | do { PPC_LI32(r, i); PPC_LHBRX(r, r, base); } while(0) | ||
| 263 | #ifdef __LITTLE_ENDIAN__ | ||
| 264 | #define PPC_NTOHS_OFFS(r, base, i) PPC_LHBRX_OFFS(r, base, i) | ||
| 265 | #else | ||
| 266 | #define PPC_NTOHS_OFFS(r, base, i) PPC_LHZ_OFFS(r, base, i) | ||
| 267 | #endif | ||
| 268 | |||
| 269 | static inline bool is_nearbranch(int offset) | 230 | static inline bool is_nearbranch(int offset) |
| 270 | { | 231 | { |
| 271 | return (offset < 32768) && (offset >= -32768); | 232 | return (offset < 32768) && (offset >= -32768); |
| @@ -302,18 +263,6 @@ static inline bool is_nearbranch(int offset) | |||
| 302 | #define COND_NE (CR0_EQ | COND_CMP_FALSE) | 263 | #define COND_NE (CR0_EQ | COND_CMP_FALSE) |
| 303 | #define COND_LT (CR0_LT | COND_CMP_TRUE) | 264 | #define COND_LT (CR0_LT | COND_CMP_TRUE) |
| 304 | 265 | ||
| 305 | #define SEEN_DATAREF 0x10000 /* might call external helpers */ | ||
| 306 | #define SEEN_XREG 0x20000 /* X reg is used */ | ||
| 307 | #define SEEN_MEM 0x40000 /* SEEN_MEM+(1<<n) = use mem[n] for temporary | ||
| 308 | * storage */ | ||
| 309 | #define SEEN_MEM_MSK 0x0ffff | ||
| 310 | |||
| 311 | struct codegen_context { | ||
| 312 | unsigned int seen; | ||
| 313 | unsigned int idx; | ||
| 314 | int pc_ret0; /* bpf index of first RET #0 instruction (if any) */ | ||
| 315 | }; | ||
| 316 | |||
| 317 | #endif | 266 | #endif |
| 318 | 267 | ||
| 319 | #endif | 268 | #endif |
diff --git a/arch/powerpc/net/bpf_jit32.h b/arch/powerpc/net/bpf_jit32.h new file mode 100644 index 000000000000..a8cd7e289ecd --- /dev/null +++ b/arch/powerpc/net/bpf_jit32.h | |||
| @@ -0,0 +1,139 @@ | |||
| 1 | /* | ||
| 2 | * bpf_jit32.h: BPF JIT compiler for PPC | ||
| 3 | * | ||
| 4 | * Copyright 2011 Matt Evans <matt@ozlabs.org>, IBM Corporation | ||
| 5 | * | ||
| 6 | * Split from bpf_jit.h | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or | ||
| 9 | * modify it under the terms of the GNU General Public License | ||
| 10 | * as published by the Free Software Foundation; version 2 | ||
| 11 | * of the License. | ||
| 12 | */ | ||
| 13 | #ifndef _BPF_JIT32_H | ||
| 14 | #define _BPF_JIT32_H | ||
| 15 | |||
| 16 | #include "bpf_jit.h" | ||
| 17 | |||
| 18 | #ifdef CONFIG_PPC64 | ||
| 19 | #define BPF_PPC_STACK_R3_OFF 48 | ||
| 20 | #define BPF_PPC_STACK_LOCALS 32 | ||
| 21 | #define BPF_PPC_STACK_BASIC (48+64) | ||
| 22 | #define BPF_PPC_STACK_SAVE (18*8) | ||
| 23 | #define BPF_PPC_STACKFRAME (BPF_PPC_STACK_BASIC+BPF_PPC_STACK_LOCALS+ \ | ||
| 24 | BPF_PPC_STACK_SAVE) | ||
| 25 | #define BPF_PPC_SLOWPATH_FRAME (48+64) | ||
| 26 | #else | ||
| 27 | #define BPF_PPC_STACK_R3_OFF 24 | ||
| 28 | #define BPF_PPC_STACK_LOCALS 16 | ||
| 29 | #define BPF_PPC_STACK_BASIC (24+32) | ||
| 30 | #define BPF_PPC_STACK_SAVE (18*4) | ||
| 31 | #define BPF_PPC_STACKFRAME (BPF_PPC_STACK_BASIC+BPF_PPC_STACK_LOCALS+ \ | ||
| 32 | BPF_PPC_STACK_SAVE) | ||
| 33 | #define BPF_PPC_SLOWPATH_FRAME (24+32) | ||
| 34 | #endif | ||
| 35 | |||
| 36 | #define REG_SZ (BITS_PER_LONG/8) | ||
| 37 | |||
| 38 | /* | ||
| 39 | * Generated code register usage: | ||
| 40 | * | ||
| 41 | * As normal PPC C ABI (e.g. r1=sp, r2=TOC), with: | ||
| 42 | * | ||
| 43 | * skb r3 (Entry parameter) | ||
| 44 | * A register r4 | ||
| 45 | * X register r5 | ||
| 46 | * addr param r6 | ||
| 47 | * r7-r10 scratch | ||
| 48 | * skb->data r14 | ||
| 49 | * skb headlen r15 (skb->len - skb->data_len) | ||
| 50 | * m[0] r16 | ||
| 51 | * m[...] ... | ||
| 52 | * m[15] r31 | ||
| 53 | */ | ||
| 54 | #define r_skb 3 | ||
| 55 | #define r_ret 3 | ||
| 56 | #define r_A 4 | ||
| 57 | #define r_X 5 | ||
| 58 | #define r_addr 6 | ||
| 59 | #define r_scratch1 7 | ||
| 60 | #define r_scratch2 8 | ||
| 61 | #define r_D 14 | ||
| 62 | #define r_HL 15 | ||
| 63 | #define r_M 16 | ||
| 64 | |||
| 65 | #ifndef __ASSEMBLY__ | ||
| 66 | |||
| 67 | /* | ||
| 68 | * Assembly helpers from arch/powerpc/net/bpf_jit.S: | ||
| 69 | */ | ||
| 70 | #define DECLARE_LOAD_FUNC(func) \ | ||
| 71 | extern u8 func[], func##_negative_offset[], func##_positive_offset[] | ||
| 72 | |||
| 73 | DECLARE_LOAD_FUNC(sk_load_word); | ||
| 74 | DECLARE_LOAD_FUNC(sk_load_half); | ||
| 75 | DECLARE_LOAD_FUNC(sk_load_byte); | ||
| 76 | DECLARE_LOAD_FUNC(sk_load_byte_msh); | ||
| 77 | |||
| 78 | #define PPC_LBZ_OFFS(r, base, i) do { if ((i) < 32768) PPC_LBZ(r, base, i); \ | ||
| 79 | else { PPC_ADDIS(r, base, IMM_HA(i)); \ | ||
| 80 | PPC_LBZ(r, r, IMM_L(i)); } } while(0) | ||
| 81 | |||
| 82 | #define PPC_LD_OFFS(r, base, i) do { if ((i) < 32768) PPC_LD(r, base, i); \ | ||
| 83 | else { PPC_ADDIS(r, base, IMM_HA(i)); \ | ||
| 84 | PPC_LD(r, r, IMM_L(i)); } } while(0) | ||
| 85 | |||
| 86 | #define PPC_LWZ_OFFS(r, base, i) do { if ((i) < 32768) PPC_LWZ(r, base, i); \ | ||
| 87 | else { PPC_ADDIS(r, base, IMM_HA(i)); \ | ||
| 88 | PPC_LWZ(r, r, IMM_L(i)); } } while(0) | ||
| 89 | |||
| 90 | #define PPC_LHZ_OFFS(r, base, i) do { if ((i) < 32768) PPC_LHZ(r, base, i); \ | ||
| 91 | else { PPC_ADDIS(r, base, IMM_HA(i)); \ | ||
| 92 | PPC_LHZ(r, r, IMM_L(i)); } } while(0) | ||
| 93 | |||
| 94 | #ifdef CONFIG_PPC64 | ||
| 95 | #define PPC_LL_OFFS(r, base, i) do { PPC_LD_OFFS(r, base, i); } while(0) | ||
| 96 | #else | ||
| 97 | #define PPC_LL_OFFS(r, base, i) do { PPC_LWZ_OFFS(r, base, i); } while(0) | ||
| 98 | #endif | ||
| 99 | |||
| 100 | #ifdef CONFIG_SMP | ||
| 101 | #ifdef CONFIG_PPC64 | ||
| 102 | #define PPC_BPF_LOAD_CPU(r) \ | ||
| 103 | do { BUILD_BUG_ON(FIELD_SIZEOF(struct paca_struct, paca_index) != 2); \ | ||
| 104 | PPC_LHZ_OFFS(r, 13, offsetof(struct paca_struct, paca_index)); \ | ||
| 105 | } while (0) | ||
| 106 | #else | ||
| 107 | #define PPC_BPF_LOAD_CPU(r) \ | ||
| 108 | do { BUILD_BUG_ON(FIELD_SIZEOF(struct thread_info, cpu) != 4); \ | ||
| 109 | PPC_LHZ_OFFS(r, (1 & ~(THREAD_SIZE - 1)), \ | ||
| 110 | offsetof(struct thread_info, cpu)); \ | ||
| 111 | } while(0) | ||
| 112 | #endif | ||
| 113 | #else | ||
| 114 | #define PPC_BPF_LOAD_CPU(r) do { PPC_LI(r, 0); } while(0) | ||
| 115 | #endif | ||
| 116 | |||
| 117 | #define PPC_LHBRX_OFFS(r, base, i) \ | ||
| 118 | do { PPC_LI32(r, i); PPC_LHBRX(r, r, base); } while(0) | ||
| 119 | #ifdef __LITTLE_ENDIAN__ | ||
| 120 | #define PPC_NTOHS_OFFS(r, base, i) PPC_LHBRX_OFFS(r, base, i) | ||
| 121 | #else | ||
| 122 | #define PPC_NTOHS_OFFS(r, base, i) PPC_LHZ_OFFS(r, base, i) | ||
| 123 | #endif | ||
| 124 | |||
| 125 | #define SEEN_DATAREF 0x10000 /* might call external helpers */ | ||
| 126 | #define SEEN_XREG 0x20000 /* X reg is used */ | ||
| 127 | #define SEEN_MEM 0x40000 /* SEEN_MEM+(1<<n) = use mem[n] for temporary | ||
| 128 | * storage */ | ||
| 129 | #define SEEN_MEM_MSK 0x0ffff | ||
| 130 | |||
| 131 | struct codegen_context { | ||
| 132 | unsigned int seen; | ||
| 133 | unsigned int idx; | ||
| 134 | int pc_ret0; /* bpf index of first RET #0 instruction (if any) */ | ||
| 135 | }; | ||
| 136 | |||
| 137 | #endif | ||
| 138 | |||
| 139 | #endif | ||
diff --git a/arch/powerpc/net/bpf_jit64.h b/arch/powerpc/net/bpf_jit64.h new file mode 100644 index 000000000000..5046d6f65c02 --- /dev/null +++ b/arch/powerpc/net/bpf_jit64.h | |||
| @@ -0,0 +1,102 @@ | |||
| 1 | /* | ||
| 2 | * bpf_jit64.h: BPF JIT compiler for PPC64 | ||
| 3 | * | ||
| 4 | * Copyright 2016 Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> | ||
| 5 | * IBM Corporation | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or | ||
| 8 | * modify it under the terms of the GNU General Public License | ||
| 9 | * as published by the Free Software Foundation; version 2 | ||
| 10 | * of the License. | ||
| 11 | */ | ||
| 12 | #ifndef _BPF_JIT64_H | ||
| 13 | #define _BPF_JIT64_H | ||
| 14 | |||
| 15 | #include "bpf_jit.h" | ||
| 16 | |||
| 17 | /* | ||
| 18 | * Stack layout: | ||
| 19 | * | ||
| 20 | * [ prev sp ] <------------- | ||
| 21 | * [ nv gpr save area ] 8*8 | | ||
| 22 | * fp (r31) --> [ ebpf stack space ] 512 | | ||
| 23 | * [ local/tmp var space ] 16 | | ||
| 24 | * [ frame header ] 32/112 | | ||
| 25 | * sp (r1) ---> [ stack pointer ] -------------- | ||
| 26 | */ | ||
| 27 | |||
| 28 | /* for bpf JIT code internal usage */ | ||
| 29 | #define BPF_PPC_STACK_LOCALS 16 | ||
| 30 | /* for gpr non volatile registers BPG_REG_6 to 10, plus skb cache registers */ | ||
| 31 | #define BPF_PPC_STACK_SAVE (8*8) | ||
| 32 | /* Ensure this is quadword aligned */ | ||
| 33 | #define BPF_PPC_STACKFRAME (STACK_FRAME_MIN_SIZE + BPF_PPC_STACK_LOCALS + \ | ||
| 34 | MAX_BPF_STACK + BPF_PPC_STACK_SAVE) | ||
| 35 | |||
| 36 | #ifndef __ASSEMBLY__ | ||
| 37 | |||
| 38 | /* BPF register usage */ | ||
| 39 | #define SKB_HLEN_REG (MAX_BPF_REG + 0) | ||
| 40 | #define SKB_DATA_REG (MAX_BPF_REG + 1) | ||
| 41 | #define TMP_REG_1 (MAX_BPF_REG + 2) | ||
| 42 | #define TMP_REG_2 (MAX_BPF_REG + 3) | ||
| 43 | |||
| 44 | /* BPF to ppc register mappings */ | ||
| 45 | static const int b2p[] = { | ||
| 46 | /* function return value */ | ||
| 47 | [BPF_REG_0] = 8, | ||
| 48 | /* function arguments */ | ||
| 49 | [BPF_REG_1] = 3, | ||
| 50 | [BPF_REG_2] = 4, | ||
| 51 | [BPF_REG_3] = 5, | ||
| 52 | [BPF_REG_4] = 6, | ||
| 53 | [BPF_REG_5] = 7, | ||
| 54 | /* non volatile registers */ | ||
| 55 | [BPF_REG_6] = 27, | ||
| 56 | [BPF_REG_7] = 28, | ||
| 57 | [BPF_REG_8] = 29, | ||
| 58 | [BPF_REG_9] = 30, | ||
| 59 | /* frame pointer aka BPF_REG_10 */ | ||
| 60 | [BPF_REG_FP] = 31, | ||
| 61 | /* eBPF jit internal registers */ | ||
| 62 | [SKB_HLEN_REG] = 25, | ||
| 63 | [SKB_DATA_REG] = 26, | ||
| 64 | [TMP_REG_1] = 9, | ||
| 65 | [TMP_REG_2] = 10 | ||
| 66 | }; | ||
| 67 | |||
| 68 | /* Assembly helpers */ | ||
| 69 | #define DECLARE_LOAD_FUNC(func) u64 func(u64 r3, u64 r4); \ | ||
| 70 | u64 func##_negative_offset(u64 r3, u64 r4); \ | ||
| 71 | u64 func##_positive_offset(u64 r3, u64 r4); | ||
| 72 | |||
| 73 | DECLARE_LOAD_FUNC(sk_load_word); | ||
| 74 | DECLARE_LOAD_FUNC(sk_load_half); | ||
| 75 | DECLARE_LOAD_FUNC(sk_load_byte); | ||
| 76 | |||
| 77 | #define CHOOSE_LOAD_FUNC(imm, func) \ | ||
| 78 | (imm < 0 ? \ | ||
| 79 | (imm >= SKF_LL_OFF ? func##_negative_offset : func) : \ | ||
| 80 | func##_positive_offset) | ||
| 81 | |||
| 82 | #define SEEN_FUNC 0x1000 /* might call external helpers */ | ||
| 83 | #define SEEN_STACK 0x2000 /* uses BPF stack */ | ||
| 84 | #define SEEN_SKB 0x4000 /* uses sk_buff */ | ||
| 85 | |||
| 86 | struct codegen_context { | ||
| 87 | /* | ||
| 88 | * This is used to track register usage as well | ||
| 89 | * as calls to external helpers. | ||
| 90 | * - register usage is tracked with corresponding | ||
| 91 | * bits (r3-r10 and r25-r31) | ||
| 92 | * - rest of the bits can be used to track other | ||
| 93 | * things -- for now, we use bits 16 to 23 | ||
| 94 | * encoded in SEEN_* macros above | ||
| 95 | */ | ||
| 96 | unsigned int seen; | ||
| 97 | unsigned int idx; | ||
| 98 | }; | ||
| 99 | |||
| 100 | #endif /* !__ASSEMBLY__ */ | ||
| 101 | |||
| 102 | #endif | ||
diff --git a/arch/powerpc/net/bpf_jit_asm.S b/arch/powerpc/net/bpf_jit_asm.S index 8ff5a3b5d1c3..3dd9c43d40c9 100644 --- a/arch/powerpc/net/bpf_jit_asm.S +++ b/arch/powerpc/net/bpf_jit_asm.S | |||
| @@ -10,7 +10,7 @@ | |||
| 10 | */ | 10 | */ |
| 11 | 11 | ||
| 12 | #include <asm/ppc_asm.h> | 12 | #include <asm/ppc_asm.h> |
| 13 | #include "bpf_jit.h" | 13 | #include "bpf_jit32.h" |
| 14 | 14 | ||
| 15 | /* | 15 | /* |
| 16 | * All of these routines are called directly from generated code, | 16 | * All of these routines are called directly from generated code, |
diff --git a/arch/powerpc/net/bpf_jit_asm64.S b/arch/powerpc/net/bpf_jit_asm64.S new file mode 100644 index 000000000000..7e4c51430b84 --- /dev/null +++ b/arch/powerpc/net/bpf_jit_asm64.S | |||
| @@ -0,0 +1,180 @@ | |||
| 1 | /* | ||
| 2 | * bpf_jit_asm64.S: Packet/header access helper functions | ||
| 3 | * for PPC64 BPF compiler. | ||
| 4 | * | ||
| 5 | * Copyright 2016, Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> | ||
| 6 | * IBM Corporation | ||
| 7 | * | ||
| 8 | * Based on bpf_jit_asm.S by Matt Evans | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or | ||
| 11 | * modify it under the terms of the GNU General Public License | ||
| 12 | * as published by the Free Software Foundation; version 2 | ||
| 13 | * of the License. | ||
| 14 | */ | ||
| 15 | |||
| 16 | #include <asm/ppc_asm.h> | ||
| 17 | #include <asm/ptrace.h> | ||
| 18 | #include "bpf_jit64.h" | ||
| 19 | |||
| 20 | /* | ||
| 21 | * All of these routines are called directly from generated code, | ||
| 22 | * with the below register usage: | ||
| 23 | * r27 skb pointer (ctx) | ||
| 24 | * r25 skb header length | ||
| 25 | * r26 skb->data pointer | ||
| 26 | * r4 offset | ||
| 27 | * | ||
| 28 | * Result is passed back in: | ||
| 29 | * r8 data read in host endian format (accumulator) | ||
| 30 | * | ||
| 31 | * r9 is used as a temporary register | ||
| 32 | */ | ||
| 33 | |||
| 34 | #define r_skb r27 | ||
| 35 | #define r_hlen r25 | ||
| 36 | #define r_data r26 | ||
| 37 | #define r_off r4 | ||
| 38 | #define r_val r8 | ||
| 39 | #define r_tmp r9 | ||
| 40 | |||
| 41 | _GLOBAL_TOC(sk_load_word) | ||
| 42 | cmpdi r_off, 0 | ||
| 43 | blt bpf_slow_path_word_neg | ||
| 44 | b sk_load_word_positive_offset | ||
| 45 | |||
| 46 | _GLOBAL_TOC(sk_load_word_positive_offset) | ||
| 47 | /* Are we accessing past headlen? */ | ||
| 48 | subi r_tmp, r_hlen, 4 | ||
| 49 | cmpd r_tmp, r_off | ||
| 50 | blt bpf_slow_path_word | ||
| 51 | /* Nope, just hitting the header. cr0 here is eq or gt! */ | ||
| 52 | LWZX_BE r_val, r_data, r_off | ||
| 53 | blr /* Return success, cr0 != LT */ | ||
| 54 | |||
| 55 | _GLOBAL_TOC(sk_load_half) | ||
| 56 | cmpdi r_off, 0 | ||
| 57 | blt bpf_slow_path_half_neg | ||
| 58 | b sk_load_half_positive_offset | ||
| 59 | |||
| 60 | _GLOBAL_TOC(sk_load_half_positive_offset) | ||
| 61 | subi r_tmp, r_hlen, 2 | ||
| 62 | cmpd r_tmp, r_off | ||
| 63 | blt bpf_slow_path_half | ||
| 64 | LHZX_BE r_val, r_data, r_off | ||
| 65 | blr | ||
| 66 | |||
| 67 | _GLOBAL_TOC(sk_load_byte) | ||
| 68 | cmpdi r_off, 0 | ||
| 69 | blt bpf_slow_path_byte_neg | ||
| 70 | b sk_load_byte_positive_offset | ||
| 71 | |||
| 72 | _GLOBAL_TOC(sk_load_byte_positive_offset) | ||
| 73 | cmpd r_hlen, r_off | ||
| 74 | ble bpf_slow_path_byte | ||
| 75 | lbzx r_val, r_data, r_off | ||
| 76 | blr | ||
| 77 | |||
| 78 | /* | ||
| 79 | * Call out to skb_copy_bits: | ||
| 80 | * Allocate a new stack frame here to remain ABI-compliant in | ||
| 81 | * stashing LR. | ||
| 82 | */ | ||
| 83 | #define bpf_slow_path_common(SIZE) \ | ||
| 84 | mflr r0; \ | ||
| 85 | std r0, PPC_LR_STKOFF(r1); \ | ||
| 86 | stdu r1, -(STACK_FRAME_MIN_SIZE + BPF_PPC_STACK_LOCALS)(r1); \ | ||
| 87 | mr r3, r_skb; \ | ||
| 88 | /* r4 = r_off as passed */ \ | ||
| 89 | addi r5, r1, STACK_FRAME_MIN_SIZE; \ | ||
| 90 | li r6, SIZE; \ | ||
| 91 | bl skb_copy_bits; \ | ||
| 92 | nop; \ | ||
| 93 | /* save r5 */ \ | ||
| 94 | addi r5, r1, STACK_FRAME_MIN_SIZE; \ | ||
| 95 | /* r3 = 0 on success */ \ | ||
| 96 | addi r1, r1, STACK_FRAME_MIN_SIZE + BPF_PPC_STACK_LOCALS; \ | ||
| 97 | ld r0, PPC_LR_STKOFF(r1); \ | ||
| 98 | mtlr r0; \ | ||
| 99 | cmpdi r3, 0; \ | ||
| 100 | blt bpf_error; /* cr0 = LT */ | ||
| 101 | |||
| 102 | bpf_slow_path_word: | ||
| 103 | bpf_slow_path_common(4) | ||
| 104 | /* Data value is on stack, and cr0 != LT */ | ||
| 105 | LWZX_BE r_val, 0, r5 | ||
| 106 | blr | ||
| 107 | |||
| 108 | bpf_slow_path_half: | ||
| 109 | bpf_slow_path_common(2) | ||
| 110 | LHZX_BE r_val, 0, r5 | ||
| 111 | blr | ||
| 112 | |||
| 113 | bpf_slow_path_byte: | ||
| 114 | bpf_slow_path_common(1) | ||
| 115 | lbzx r_val, 0, r5 | ||
| 116 | blr | ||
| 117 | |||
| 118 | /* | ||
| 119 | * Call out to bpf_internal_load_pointer_neg_helper | ||
| 120 | */ | ||
| 121 | #define sk_negative_common(SIZE) \ | ||
| 122 | mflr r0; \ | ||
| 123 | std r0, PPC_LR_STKOFF(r1); \ | ||
| 124 | stdu r1, -STACK_FRAME_MIN_SIZE(r1); \ | ||
| 125 | mr r3, r_skb; \ | ||
| 126 | /* r4 = r_off, as passed */ \ | ||
| 127 | li r5, SIZE; \ | ||
| 128 | bl bpf_internal_load_pointer_neg_helper; \ | ||
| 129 | nop; \ | ||
| 130 | addi r1, r1, STACK_FRAME_MIN_SIZE; \ | ||
| 131 | ld r0, PPC_LR_STKOFF(r1); \ | ||
| 132 | mtlr r0; \ | ||
| 133 | /* R3 != 0 on success */ \ | ||
| 134 | cmpldi r3, 0; \ | ||
| 135 | beq bpf_error_slow; /* cr0 = EQ */ | ||
| 136 | |||
| 137 | bpf_slow_path_word_neg: | ||
| 138 | lis r_tmp, -32 /* SKF_LL_OFF */ | ||
| 139 | cmpd r_off, r_tmp /* addr < SKF_* */ | ||
| 140 | blt bpf_error /* cr0 = LT */ | ||
| 141 | b sk_load_word_negative_offset | ||
| 142 | |||
| 143 | _GLOBAL_TOC(sk_load_word_negative_offset) | ||
| 144 | sk_negative_common(4) | ||
| 145 | LWZX_BE r_val, 0, r3 | ||
| 146 | blr | ||
| 147 | |||
| 148 | bpf_slow_path_half_neg: | ||
| 149 | lis r_tmp, -32 /* SKF_LL_OFF */ | ||
| 150 | cmpd r_off, r_tmp /* addr < SKF_* */ | ||
| 151 | blt bpf_error /* cr0 = LT */ | ||
| 152 | b sk_load_half_negative_offset | ||
| 153 | |||
| 154 | _GLOBAL_TOC(sk_load_half_negative_offset) | ||
| 155 | sk_negative_common(2) | ||
| 156 | LHZX_BE r_val, 0, r3 | ||
| 157 | blr | ||
| 158 | |||
| 159 | bpf_slow_path_byte_neg: | ||
| 160 | lis r_tmp, -32 /* SKF_LL_OFF */ | ||
| 161 | cmpd r_off, r_tmp /* addr < SKF_* */ | ||
| 162 | blt bpf_error /* cr0 = LT */ | ||
| 163 | b sk_load_byte_negative_offset | ||
| 164 | |||
| 165 | _GLOBAL_TOC(sk_load_byte_negative_offset) | ||
| 166 | sk_negative_common(1) | ||
| 167 | lbzx r_val, 0, r3 | ||
| 168 | blr | ||
| 169 | |||
| 170 | bpf_error_slow: | ||
| 171 | /* fabricate a cr0 = lt */ | ||
| 172 | li r_tmp, -1 | ||
| 173 | cmpdi r_tmp, 0 | ||
| 174 | bpf_error: | ||
| 175 | /* | ||
| 176 | * Entered with cr0 = lt | ||
| 177 | * Generated code will 'blt epilogue', returning 0. | ||
| 178 | */ | ||
| 179 | li r_val, 0 | ||
| 180 | blr | ||
diff --git a/arch/powerpc/net/bpf_jit_comp.c b/arch/powerpc/net/bpf_jit_comp.c index 2d66a8446198..7e706f36e364 100644 --- a/arch/powerpc/net/bpf_jit_comp.c +++ b/arch/powerpc/net/bpf_jit_comp.c | |||
| @@ -16,7 +16,7 @@ | |||
| 16 | #include <linux/filter.h> | 16 | #include <linux/filter.h> |
| 17 | #include <linux/if_vlan.h> | 17 | #include <linux/if_vlan.h> |
| 18 | 18 | ||
| 19 | #include "bpf_jit.h" | 19 | #include "bpf_jit32.h" |
| 20 | 20 | ||
| 21 | int bpf_jit_enable __read_mostly; | 21 | int bpf_jit_enable __read_mostly; |
| 22 | 22 | ||
| @@ -161,14 +161,14 @@ static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, | |||
| 161 | break; | 161 | break; |
| 162 | case BPF_ALU | BPF_MUL | BPF_X: /* A *= X; */ | 162 | case BPF_ALU | BPF_MUL | BPF_X: /* A *= X; */ |
| 163 | ctx->seen |= SEEN_XREG; | 163 | ctx->seen |= SEEN_XREG; |
| 164 | PPC_MUL(r_A, r_A, r_X); | 164 | PPC_MULW(r_A, r_A, r_X); |
| 165 | break; | 165 | break; |
| 166 | case BPF_ALU | BPF_MUL | BPF_K: /* A *= K */ | 166 | case BPF_ALU | BPF_MUL | BPF_K: /* A *= K */ |
| 167 | if (K < 32768) | 167 | if (K < 32768) |
| 168 | PPC_MULI(r_A, r_A, K); | 168 | PPC_MULI(r_A, r_A, K); |
| 169 | else { | 169 | else { |
| 170 | PPC_LI32(r_scratch1, K); | 170 | PPC_LI32(r_scratch1, K); |
| 171 | PPC_MUL(r_A, r_A, r_scratch1); | 171 | PPC_MULW(r_A, r_A, r_scratch1); |
| 172 | } | 172 | } |
| 173 | break; | 173 | break; |
| 174 | case BPF_ALU | BPF_MOD | BPF_X: /* A %= X; */ | 174 | case BPF_ALU | BPF_MOD | BPF_X: /* A %= X; */ |
| @@ -184,7 +184,7 @@ static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, | |||
| 184 | } | 184 | } |
| 185 | if (code == (BPF_ALU | BPF_MOD | BPF_X)) { | 185 | if (code == (BPF_ALU | BPF_MOD | BPF_X)) { |
| 186 | PPC_DIVWU(r_scratch1, r_A, r_X); | 186 | PPC_DIVWU(r_scratch1, r_A, r_X); |
| 187 | PPC_MUL(r_scratch1, r_X, r_scratch1); | 187 | PPC_MULW(r_scratch1, r_X, r_scratch1); |
| 188 | PPC_SUB(r_A, r_A, r_scratch1); | 188 | PPC_SUB(r_A, r_A, r_scratch1); |
| 189 | } else { | 189 | } else { |
| 190 | PPC_DIVWU(r_A, r_A, r_X); | 190 | PPC_DIVWU(r_A, r_A, r_X); |
| @@ -193,7 +193,7 @@ static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, | |||
| 193 | case BPF_ALU | BPF_MOD | BPF_K: /* A %= K; */ | 193 | case BPF_ALU | BPF_MOD | BPF_K: /* A %= K; */ |
| 194 | PPC_LI32(r_scratch2, K); | 194 | PPC_LI32(r_scratch2, K); |
| 195 | PPC_DIVWU(r_scratch1, r_A, r_scratch2); | 195 | PPC_DIVWU(r_scratch1, r_A, r_scratch2); |
| 196 | PPC_MUL(r_scratch1, r_scratch2, r_scratch1); | 196 | PPC_MULW(r_scratch1, r_scratch2, r_scratch1); |
| 197 | PPC_SUB(r_A, r_A, r_scratch1); | 197 | PPC_SUB(r_A, r_A, r_scratch1); |
| 198 | break; | 198 | break; |
| 199 | case BPF_ALU | BPF_DIV | BPF_K: /* A /= K */ | 199 | case BPF_ALU | BPF_DIV | BPF_K: /* A /= K */ |
diff --git a/arch/powerpc/net/bpf_jit_comp64.c b/arch/powerpc/net/bpf_jit_comp64.c new file mode 100644 index 000000000000..6073b78516f6 --- /dev/null +++ b/arch/powerpc/net/bpf_jit_comp64.c | |||
| @@ -0,0 +1,954 @@ | |||
| 1 | /* | ||
| 2 | * bpf_jit_comp64.c: eBPF JIT compiler | ||
| 3 | * | ||
| 4 | * Copyright 2016 Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> | ||
| 5 | * IBM Corporation | ||
| 6 | * | ||
| 7 | * Based on the powerpc classic BPF JIT compiler by Matt Evans | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or | ||
| 10 | * modify it under the terms of the GNU General Public License | ||
| 11 | * as published by the Free Software Foundation; version 2 | ||
| 12 | * of the License. | ||
| 13 | */ | ||
| 14 | #include <linux/moduleloader.h> | ||
| 15 | #include <asm/cacheflush.h> | ||
| 16 | #include <linux/netdevice.h> | ||
| 17 | #include <linux/filter.h> | ||
| 18 | #include <linux/if_vlan.h> | ||
| 19 | #include <asm/kprobes.h> | ||
| 20 | |||
| 21 | #include "bpf_jit64.h" | ||
| 22 | |||
| 23 | int bpf_jit_enable __read_mostly; | ||
| 24 | |||
| 25 | static void bpf_jit_fill_ill_insns(void *area, unsigned int size) | ||
| 26 | { | ||
| 27 | int *p = area; | ||
| 28 | |||
| 29 | /* Fill whole space with trap instructions */ | ||
| 30 | while (p < (int *)((char *)area + size)) | ||
| 31 | *p++ = BREAKPOINT_INSTRUCTION; | ||
| 32 | } | ||
| 33 | |||
| 34 | static inline void bpf_flush_icache(void *start, void *end) | ||
| 35 | { | ||
| 36 | smp_wmb(); | ||
| 37 | flush_icache_range((unsigned long)start, (unsigned long)end); | ||
| 38 | } | ||
| 39 | |||
| 40 | static inline bool bpf_is_seen_register(struct codegen_context *ctx, int i) | ||
| 41 | { | ||
| 42 | return (ctx->seen & (1 << (31 - b2p[i]))); | ||
| 43 | } | ||
| 44 | |||
| 45 | static inline void bpf_set_seen_register(struct codegen_context *ctx, int i) | ||
| 46 | { | ||
| 47 | ctx->seen |= (1 << (31 - b2p[i])); | ||
| 48 | } | ||
| 49 | |||
| 50 | static inline bool bpf_has_stack_frame(struct codegen_context *ctx) | ||
| 51 | { | ||
| 52 | /* | ||
| 53 | * We only need a stack frame if: | ||
| 54 | * - we call other functions (kernel helpers), or | ||
| 55 | * - the bpf program uses its stack area | ||
| 56 | * The latter condition is deduced from the usage of BPF_REG_FP | ||
| 57 | */ | ||
| 58 | return ctx->seen & SEEN_FUNC || bpf_is_seen_register(ctx, BPF_REG_FP); | ||
| 59 | } | ||
| 60 | |||
| 61 | static void bpf_jit_emit_skb_loads(u32 *image, struct codegen_context *ctx) | ||
| 62 | { | ||
| 63 | /* | ||
| 64 | * Load skb->len and skb->data_len | ||
| 65 | * r3 points to skb | ||
| 66 | */ | ||
| 67 | PPC_LWZ(b2p[SKB_HLEN_REG], 3, offsetof(struct sk_buff, len)); | ||
| 68 | PPC_LWZ(b2p[TMP_REG_1], 3, offsetof(struct sk_buff, data_len)); | ||
| 69 | /* header_len = len - data_len */ | ||
| 70 | PPC_SUB(b2p[SKB_HLEN_REG], b2p[SKB_HLEN_REG], b2p[TMP_REG_1]); | ||
| 71 | |||
| 72 | /* skb->data pointer */ | ||
| 73 | PPC_BPF_LL(b2p[SKB_DATA_REG], 3, offsetof(struct sk_buff, data)); | ||
| 74 | } | ||
| 75 | |||
| 76 | static void bpf_jit_emit_func_call(u32 *image, struct codegen_context *ctx, u64 func) | ||
| 77 | { | ||
| 78 | #ifdef PPC64_ELF_ABI_v1 | ||
| 79 | /* func points to the function descriptor */ | ||
| 80 | PPC_LI64(b2p[TMP_REG_2], func); | ||
| 81 | /* Load actual entry point from function descriptor */ | ||
| 82 | PPC_BPF_LL(b2p[TMP_REG_1], b2p[TMP_REG_2], 0); | ||
| 83 | /* ... and move it to LR */ | ||
| 84 | PPC_MTLR(b2p[TMP_REG_1]); | ||
| 85 | /* | ||
| 86 | * Load TOC from function descriptor at offset 8. | ||
| 87 | * We can clobber r2 since we get called through a | ||
| 88 | * function pointer (so caller will save/restore r2) | ||
| 89 | * and since we don't use a TOC ourself. | ||
| 90 | */ | ||
| 91 | PPC_BPF_LL(2, b2p[TMP_REG_2], 8); | ||
| 92 | #else | ||
| 93 | /* We can clobber r12 */ | ||
| 94 | PPC_FUNC_ADDR(12, func); | ||
| 95 | PPC_MTLR(12); | ||
| 96 | #endif | ||
| 97 | PPC_BLRL(); | ||
| 98 | } | ||
| 99 | |||
| 100 | static void bpf_jit_build_prologue(u32 *image, struct codegen_context *ctx) | ||
| 101 | { | ||
| 102 | int i; | ||
| 103 | bool new_stack_frame = bpf_has_stack_frame(ctx); | ||
| 104 | |||
| 105 | if (new_stack_frame) { | ||
| 106 | /* | ||
| 107 | * We need a stack frame, but we don't necessarily need to | ||
| 108 | * save/restore LR unless we call other functions | ||
| 109 | */ | ||
| 110 | if (ctx->seen & SEEN_FUNC) { | ||
| 111 | EMIT(PPC_INST_MFLR | __PPC_RT(R0)); | ||
| 112 | PPC_BPF_STL(0, 1, PPC_LR_STKOFF); | ||
| 113 | } | ||
| 114 | |||
| 115 | PPC_BPF_STLU(1, 1, -BPF_PPC_STACKFRAME); | ||
| 116 | } | ||
| 117 | |||
| 118 | /* | ||
| 119 | * Back up non-volatile regs -- BPF registers 6-10 | ||
| 120 | * If we haven't created our own stack frame, we save these | ||
| 121 | * in the protected zone below the previous stack frame | ||
| 122 | */ | ||
| 123 | for (i = BPF_REG_6; i <= BPF_REG_10; i++) | ||
| 124 | if (bpf_is_seen_register(ctx, i)) | ||
| 125 | PPC_BPF_STL(b2p[i], 1, | ||
| 126 | (new_stack_frame ? BPF_PPC_STACKFRAME : 0) - | ||
| 127 | (8 * (32 - b2p[i]))); | ||
| 128 | |||
| 129 | /* | ||
| 130 | * Save additional non-volatile regs if we cache skb | ||
| 131 | * Also, setup skb data | ||
| 132 | */ | ||
| 133 | if (ctx->seen & SEEN_SKB) { | ||
| 134 | PPC_BPF_STL(b2p[SKB_HLEN_REG], 1, | ||
| 135 | BPF_PPC_STACKFRAME - (8 * (32 - b2p[SKB_HLEN_REG]))); | ||
| 136 | PPC_BPF_STL(b2p[SKB_DATA_REG], 1, | ||
| 137 | BPF_PPC_STACKFRAME - (8 * (32 - b2p[SKB_DATA_REG]))); | ||
| 138 | bpf_jit_emit_skb_loads(image, ctx); | ||
| 139 | } | ||
| 140 | |||
| 141 | /* Setup frame pointer to point to the bpf stack area */ | ||
| 142 | if (bpf_is_seen_register(ctx, BPF_REG_FP)) | ||
| 143 | PPC_ADDI(b2p[BPF_REG_FP], 1, | ||
| 144 | BPF_PPC_STACKFRAME - BPF_PPC_STACK_SAVE); | ||
| 145 | } | ||
| 146 | |||
| 147 | static void bpf_jit_build_epilogue(u32 *image, struct codegen_context *ctx) | ||
| 148 | { | ||
| 149 | int i; | ||
| 150 | bool new_stack_frame = bpf_has_stack_frame(ctx); | ||
| 151 | |||
| 152 | /* Move result to r3 */ | ||
| 153 | PPC_MR(3, b2p[BPF_REG_0]); | ||
| 154 | |||
| 155 | /* Restore NVRs */ | ||
| 156 | for (i = BPF_REG_6; i <= BPF_REG_10; i++) | ||
| 157 | if (bpf_is_seen_register(ctx, i)) | ||
| 158 | PPC_BPF_LL(b2p[i], 1, | ||
| 159 | (new_stack_frame ? BPF_PPC_STACKFRAME : 0) - | ||
| 160 | (8 * (32 - b2p[i]))); | ||
| 161 | |||
| 162 | /* Restore non-volatile registers used for skb cache */ | ||
| 163 | if (ctx->seen & SEEN_SKB) { | ||
| 164 | PPC_BPF_LL(b2p[SKB_HLEN_REG], 1, | ||
| 165 | BPF_PPC_STACKFRAME - (8 * (32 - b2p[SKB_HLEN_REG]))); | ||
| 166 | PPC_BPF_LL(b2p[SKB_DATA_REG], 1, | ||
| 167 | BPF_PPC_STACKFRAME - (8 * (32 - b2p[SKB_DATA_REG]))); | ||
| 168 | } | ||
| 169 | |||
| 170 | /* Tear down our stack frame */ | ||
| 171 | if (new_stack_frame) { | ||
| 172 | PPC_ADDI(1, 1, BPF_PPC_STACKFRAME); | ||
| 173 | if (ctx->seen & SEEN_FUNC) { | ||
| 174 | PPC_BPF_LL(0, 1, PPC_LR_STKOFF); | ||
| 175 | PPC_MTLR(0); | ||
| 176 | } | ||
| 177 | } | ||
| 178 | |||
| 179 | PPC_BLR(); | ||
| 180 | } | ||
| 181 | |||
| 182 | /* Assemble the body code between the prologue & epilogue */ | ||
| 183 | static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, | ||
| 184 | struct codegen_context *ctx, | ||
| 185 | u32 *addrs) | ||
| 186 | { | ||
| 187 | const struct bpf_insn *insn = fp->insnsi; | ||
| 188 | int flen = fp->len; | ||
| 189 | int i; | ||
| 190 | |||
| 191 | /* Start of epilogue code - will only be valid 2nd pass onwards */ | ||
| 192 | u32 exit_addr = addrs[flen]; | ||
| 193 | |||
| 194 | for (i = 0; i < flen; i++) { | ||
| 195 | u32 code = insn[i].code; | ||
| 196 | u32 dst_reg = b2p[insn[i].dst_reg]; | ||
| 197 | u32 src_reg = b2p[insn[i].src_reg]; | ||
| 198 | s16 off = insn[i].off; | ||
| 199 | s32 imm = insn[i].imm; | ||
| 200 | u64 imm64; | ||
| 201 | u8 *func; | ||
| 202 | u32 true_cond; | ||
| 203 | int stack_local_off; | ||
| 204 | |||
| 205 | /* | ||
| 206 | * addrs[] maps a BPF bytecode address into a real offset from | ||
| 207 | * the start of the body code. | ||
| 208 | */ | ||
| 209 | addrs[i] = ctx->idx * 4; | ||
| 210 | |||
| 211 | /* | ||
| 212 | * As an optimization, we note down which non-volatile registers | ||
| 213 | * are used so that we can only save/restore those in our | ||
| 214 | * prologue and epilogue. We do this here regardless of whether | ||
| 215 | * the actual BPF instruction uses src/dst registers or not | ||
| 216 | * (for instance, BPF_CALL does not use them). The expectation | ||
| 217 | * is that those instructions will have src_reg/dst_reg set to | ||
| 218 | * 0. Even otherwise, we just lose some prologue/epilogue | ||
| 219 | * optimization but everything else should work without | ||
| 220 | * any issues. | ||
| 221 | */ | ||
| 222 | if (dst_reg >= 24 && dst_reg <= 31) | ||
| 223 | bpf_set_seen_register(ctx, insn[i].dst_reg); | ||
| 224 | if (src_reg >= 24 && src_reg <= 31) | ||
| 225 | bpf_set_seen_register(ctx, insn[i].src_reg); | ||
| 226 | |||
| 227 | switch (code) { | ||
| 228 | /* | ||
| 229 | * Arithmetic operations: ADD/SUB/MUL/DIV/MOD/NEG | ||
| 230 | */ | ||
| 231 | case BPF_ALU | BPF_ADD | BPF_X: /* (u32) dst += (u32) src */ | ||
| 232 | case BPF_ALU64 | BPF_ADD | BPF_X: /* dst += src */ | ||
| 233 | PPC_ADD(dst_reg, dst_reg, src_reg); | ||
| 234 | goto bpf_alu32_trunc; | ||
| 235 | case BPF_ALU | BPF_SUB | BPF_X: /* (u32) dst -= (u32) src */ | ||
| 236 | case BPF_ALU64 | BPF_SUB | BPF_X: /* dst -= src */ | ||
| 237 | PPC_SUB(dst_reg, dst_reg, src_reg); | ||
| 238 | goto bpf_alu32_trunc; | ||
| 239 | case BPF_ALU | BPF_ADD | BPF_K: /* (u32) dst += (u32) imm */ | ||
| 240 | case BPF_ALU | BPF_SUB | BPF_K: /* (u32) dst -= (u32) imm */ | ||
| 241 | case BPF_ALU64 | BPF_ADD | BPF_K: /* dst += imm */ | ||
| 242 | case BPF_ALU64 | BPF_SUB | BPF_K: /* dst -= imm */ | ||
| 243 | if (BPF_OP(code) == BPF_SUB) | ||
| 244 | imm = -imm; | ||
| 245 | if (imm) { | ||
| 246 | if (imm >= -32768 && imm < 32768) | ||
| 247 | PPC_ADDI(dst_reg, dst_reg, IMM_L(imm)); | ||
| 248 | else { | ||
| 249 | PPC_LI32(b2p[TMP_REG_1], imm); | ||
| 250 | PPC_ADD(dst_reg, dst_reg, b2p[TMP_REG_1]); | ||
| 251 | } | ||
| 252 | } | ||
| 253 | goto bpf_alu32_trunc; | ||
| 254 | case BPF_ALU | BPF_MUL | BPF_X: /* (u32) dst *= (u32) src */ | ||
| 255 | case BPF_ALU64 | BPF_MUL | BPF_X: /* dst *= src */ | ||
| 256 | if (BPF_CLASS(code) == BPF_ALU) | ||
| 257 | PPC_MULW(dst_reg, dst_reg, src_reg); | ||
| 258 | else | ||
| 259 | PPC_MULD(dst_reg, dst_reg, src_reg); | ||
| 260 | goto bpf_alu32_trunc; | ||
| 261 | case BPF_ALU | BPF_MUL | BPF_K: /* (u32) dst *= (u32) imm */ | ||
| 262 | case BPF_ALU64 | BPF_MUL | BPF_K: /* dst *= imm */ | ||
| 263 | if (imm >= -32768 && imm < 32768) | ||
| 264 | PPC_MULI(dst_reg, dst_reg, IMM_L(imm)); | ||
| 265 | else { | ||
| 266 | PPC_LI32(b2p[TMP_REG_1], imm); | ||
| 267 | if (BPF_CLASS(code) == BPF_ALU) | ||
| 268 | PPC_MULW(dst_reg, dst_reg, | ||
| 269 | b2p[TMP_REG_1]); | ||
| 270 | else | ||
| 271 | PPC_MULD(dst_reg, dst_reg, | ||
| 272 | b2p[TMP_REG_1]); | ||
| 273 | } | ||
| 274 | goto bpf_alu32_trunc; | ||
| 275 | case BPF_ALU | BPF_DIV | BPF_X: /* (u32) dst /= (u32) src */ | ||
| 276 | case BPF_ALU | BPF_MOD | BPF_X: /* (u32) dst %= (u32) src */ | ||
| 277 | PPC_CMPWI(src_reg, 0); | ||
| 278 | PPC_BCC_SHORT(COND_NE, (ctx->idx * 4) + 12); | ||
| 279 | PPC_LI(b2p[BPF_REG_0], 0); | ||
| 280 | PPC_JMP(exit_addr); | ||
| 281 | if (BPF_OP(code) == BPF_MOD) { | ||
| 282 | PPC_DIVWU(b2p[TMP_REG_1], dst_reg, src_reg); | ||
| 283 | PPC_MULW(b2p[TMP_REG_1], src_reg, | ||
| 284 | b2p[TMP_REG_1]); | ||
| 285 | PPC_SUB(dst_reg, dst_reg, b2p[TMP_REG_1]); | ||
| 286 | } else | ||
| 287 | PPC_DIVWU(dst_reg, dst_reg, src_reg); | ||
| 288 | goto bpf_alu32_trunc; | ||
| 289 | case BPF_ALU64 | BPF_DIV | BPF_X: /* dst /= src */ | ||
| 290 | case BPF_ALU64 | BPF_MOD | BPF_X: /* dst %= src */ | ||
| 291 | PPC_CMPDI(src_reg, 0); | ||
| 292 | PPC_BCC_SHORT(COND_NE, (ctx->idx * 4) + 12); | ||
| 293 | PPC_LI(b2p[BPF_REG_0], 0); | ||
| 294 | PPC_JMP(exit_addr); | ||
| 295 | if (BPF_OP(code) == BPF_MOD) { | ||
| 296 | PPC_DIVD(b2p[TMP_REG_1], dst_reg, src_reg); | ||
| 297 | PPC_MULD(b2p[TMP_REG_1], src_reg, | ||
| 298 | b2p[TMP_REG_1]); | ||
| 299 | PPC_SUB(dst_reg, dst_reg, b2p[TMP_REG_1]); | ||
| 300 | } else | ||
| 301 | PPC_DIVD(dst_reg, dst_reg, src_reg); | ||
| 302 | break; | ||
| 303 | case BPF_ALU | BPF_MOD | BPF_K: /* (u32) dst %= (u32) imm */ | ||
| 304 | case BPF_ALU | BPF_DIV | BPF_K: /* (u32) dst /= (u32) imm */ | ||
| 305 | case BPF_ALU64 | BPF_MOD | BPF_K: /* dst %= imm */ | ||
| 306 | case BPF_ALU64 | BPF_DIV | BPF_K: /* dst /= imm */ | ||
| 307 | if (imm == 0) | ||
| 308 | return -EINVAL; | ||
| 309 | else if (imm == 1) | ||
| 310 | goto bpf_alu32_trunc; | ||
| 311 | |||
| 312 | PPC_LI32(b2p[TMP_REG_1], imm); | ||
| 313 | switch (BPF_CLASS(code)) { | ||
| 314 | case BPF_ALU: | ||
| 315 | if (BPF_OP(code) == BPF_MOD) { | ||
| 316 | PPC_DIVWU(b2p[TMP_REG_2], dst_reg, | ||
| 317 | b2p[TMP_REG_1]); | ||
| 318 | PPC_MULW(b2p[TMP_REG_1], | ||
| 319 | b2p[TMP_REG_1], | ||
| 320 | b2p[TMP_REG_2]); | ||
| 321 | PPC_SUB(dst_reg, dst_reg, | ||
| 322 | b2p[TMP_REG_1]); | ||
| 323 | } else | ||
| 324 | PPC_DIVWU(dst_reg, dst_reg, | ||
| 325 | b2p[TMP_REG_1]); | ||
| 326 | break; | ||
| 327 | case BPF_ALU64: | ||
| 328 | if (BPF_OP(code) == BPF_MOD) { | ||
| 329 | PPC_DIVD(b2p[TMP_REG_2], dst_reg, | ||
| 330 | b2p[TMP_REG_1]); | ||
| 331 | PPC_MULD(b2p[TMP_REG_1], | ||
| 332 | b2p[TMP_REG_1], | ||
| 333 | b2p[TMP_REG_2]); | ||
| 334 | PPC_SUB(dst_reg, dst_reg, | ||
| 335 | b2p[TMP_REG_1]); | ||
| 336 | } else | ||
| 337 | PPC_DIVD(dst_reg, dst_reg, | ||
| 338 | b2p[TMP_REG_1]); | ||
| 339 | break; | ||
| 340 | } | ||
| 341 | goto bpf_alu32_trunc; | ||
| 342 | case BPF_ALU | BPF_NEG: /* (u32) dst = -dst */ | ||
| 343 | case BPF_ALU64 | BPF_NEG: /* dst = -dst */ | ||
| 344 | PPC_NEG(dst_reg, dst_reg); | ||
| 345 | goto bpf_alu32_trunc; | ||
| 346 | |||
| 347 | /* | ||
| 348 | * Logical operations: AND/OR/XOR/[A]LSH/[A]RSH | ||
| 349 | */ | ||
| 350 | case BPF_ALU | BPF_AND | BPF_X: /* (u32) dst = dst & src */ | ||
| 351 | case BPF_ALU64 | BPF_AND | BPF_X: /* dst = dst & src */ | ||
| 352 | PPC_AND(dst_reg, dst_reg, src_reg); | ||
| 353 | goto bpf_alu32_trunc; | ||
| 354 | case BPF_ALU | BPF_AND | BPF_K: /* (u32) dst = dst & imm */ | ||
| 355 | case BPF_ALU64 | BPF_AND | BPF_K: /* dst = dst & imm */ | ||
| 356 | if (!IMM_H(imm)) | ||
| 357 | PPC_ANDI(dst_reg, dst_reg, IMM_L(imm)); | ||
| 358 | else { | ||
| 359 | /* Sign-extended */ | ||
| 360 | PPC_LI32(b2p[TMP_REG_1], imm); | ||
| 361 | PPC_AND(dst_reg, dst_reg, b2p[TMP_REG_1]); | ||
| 362 | } | ||
| 363 | goto bpf_alu32_trunc; | ||
| 364 | case BPF_ALU | BPF_OR | BPF_X: /* dst = (u32) dst | (u32) src */ | ||
| 365 | case BPF_ALU64 | BPF_OR | BPF_X: /* dst = dst | src */ | ||
| 366 | PPC_OR(dst_reg, dst_reg, src_reg); | ||
| 367 | goto bpf_alu32_trunc; | ||
| 368 | case BPF_ALU | BPF_OR | BPF_K:/* dst = (u32) dst | (u32) imm */ | ||
| 369 | case BPF_ALU64 | BPF_OR | BPF_K:/* dst = dst | imm */ | ||
| 370 | if (imm < 0 && BPF_CLASS(code) == BPF_ALU64) { | ||
| 371 | /* Sign-extended */ | ||
| 372 | PPC_LI32(b2p[TMP_REG_1], imm); | ||
| 373 | PPC_OR(dst_reg, dst_reg, b2p[TMP_REG_1]); | ||
| 374 | } else { | ||
| 375 | if (IMM_L(imm)) | ||
| 376 | PPC_ORI(dst_reg, dst_reg, IMM_L(imm)); | ||
| 377 | if (IMM_H(imm)) | ||
| 378 | PPC_ORIS(dst_reg, dst_reg, IMM_H(imm)); | ||
| 379 | } | ||
| 380 | goto bpf_alu32_trunc; | ||
| 381 | case BPF_ALU | BPF_XOR | BPF_X: /* (u32) dst ^= src */ | ||
| 382 | case BPF_ALU64 | BPF_XOR | BPF_X: /* dst ^= src */ | ||
| 383 | PPC_XOR(dst_reg, dst_reg, src_reg); | ||
| 384 | goto bpf_alu32_trunc; | ||
| 385 | case BPF_ALU | BPF_XOR | BPF_K: /* (u32) dst ^= (u32) imm */ | ||
| 386 | case BPF_ALU64 | BPF_XOR | BPF_K: /* dst ^= imm */ | ||
| 387 | if (imm < 0 && BPF_CLASS(code) == BPF_ALU64) { | ||
| 388 | /* Sign-extended */ | ||
| 389 | PPC_LI32(b2p[TMP_REG_1], imm); | ||
| 390 | PPC_XOR(dst_reg, dst_reg, b2p[TMP_REG_1]); | ||
| 391 | } else { | ||
| 392 | if (IMM_L(imm)) | ||
| 393 | PPC_XORI(dst_reg, dst_reg, IMM_L(imm)); | ||
| 394 | if (IMM_H(imm)) | ||
| 395 | PPC_XORIS(dst_reg, dst_reg, IMM_H(imm)); | ||
| 396 | } | ||
| 397 | goto bpf_alu32_trunc; | ||
| 398 | case BPF_ALU | BPF_LSH | BPF_X: /* (u32) dst <<= (u32) src */ | ||
| 399 | /* slw clears top 32 bits */ | ||
| 400 | PPC_SLW(dst_reg, dst_reg, src_reg); | ||
| 401 | break; | ||
| 402 | case BPF_ALU64 | BPF_LSH | BPF_X: /* dst <<= src; */ | ||
| 403 | PPC_SLD(dst_reg, dst_reg, src_reg); | ||
| 404 | break; | ||
| 405 | case BPF_ALU | BPF_LSH | BPF_K: /* (u32) dst <<== (u32) imm */ | ||
| 406 | /* with imm 0, we still need to clear top 32 bits */ | ||
| 407 | PPC_SLWI(dst_reg, dst_reg, imm); | ||
| 408 | break; | ||
| 409 | case BPF_ALU64 | BPF_LSH | BPF_K: /* dst <<== imm */ | ||
| 410 | if (imm != 0) | ||
| 411 | PPC_SLDI(dst_reg, dst_reg, imm); | ||
| 412 | break; | ||
| 413 | case BPF_ALU | BPF_RSH | BPF_X: /* (u32) dst >>= (u32) src */ | ||
| 414 | PPC_SRW(dst_reg, dst_reg, src_reg); | ||
| 415 | break; | ||
| 416 | case BPF_ALU64 | BPF_RSH | BPF_X: /* dst >>= src */ | ||
| 417 | PPC_SRD(dst_reg, dst_reg, src_reg); | ||
| 418 | break; | ||
| 419 | case BPF_ALU | BPF_RSH | BPF_K: /* (u32) dst >>= (u32) imm */ | ||
| 420 | PPC_SRWI(dst_reg, dst_reg, imm); | ||
| 421 | break; | ||
| 422 | case BPF_ALU64 | BPF_RSH | BPF_K: /* dst >>= imm */ | ||
| 423 | if (imm != 0) | ||
| 424 | PPC_SRDI(dst_reg, dst_reg, imm); | ||
| 425 | break; | ||
| 426 | case BPF_ALU64 | BPF_ARSH | BPF_X: /* (s64) dst >>= src */ | ||
| 427 | PPC_SRAD(dst_reg, dst_reg, src_reg); | ||
| 428 | break; | ||
| 429 | case BPF_ALU64 | BPF_ARSH | BPF_K: /* (s64) dst >>= imm */ | ||
| 430 | if (imm != 0) | ||
| 431 | PPC_SRADI(dst_reg, dst_reg, imm); | ||
| 432 | break; | ||
| 433 | |||
| 434 | /* | ||
| 435 | * MOV | ||
| 436 | */ | ||
| 437 | case BPF_ALU | BPF_MOV | BPF_X: /* (u32) dst = src */ | ||
| 438 | case BPF_ALU64 | BPF_MOV | BPF_X: /* dst = src */ | ||
| 439 | PPC_MR(dst_reg, src_reg); | ||
| 440 | goto bpf_alu32_trunc; | ||
| 441 | case BPF_ALU | BPF_MOV | BPF_K: /* (u32) dst = imm */ | ||
| 442 | case BPF_ALU64 | BPF_MOV | BPF_K: /* dst = (s64) imm */ | ||
| 443 | PPC_LI32(dst_reg, imm); | ||
| 444 | if (imm < 0) | ||
| 445 | goto bpf_alu32_trunc; | ||
| 446 | break; | ||
| 447 | |||
| 448 | bpf_alu32_trunc: | ||
| 449 | /* Truncate to 32-bits */ | ||
| 450 | if (BPF_CLASS(code) == BPF_ALU) | ||
| 451 | PPC_RLWINM(dst_reg, dst_reg, 0, 0, 31); | ||
| 452 | break; | ||
| 453 | |||
| 454 | /* | ||
| 455 | * BPF_FROM_BE/LE | ||
| 456 | */ | ||
| 457 | case BPF_ALU | BPF_END | BPF_FROM_LE: | ||
| 458 | case BPF_ALU | BPF_END | BPF_FROM_BE: | ||
| 459 | #ifdef __BIG_ENDIAN__ | ||
| 460 | if (BPF_SRC(code) == BPF_FROM_BE) | ||
| 461 | goto emit_clear; | ||
| 462 | #else /* !__BIG_ENDIAN__ */ | ||
| 463 | if (BPF_SRC(code) == BPF_FROM_LE) | ||
| 464 | goto emit_clear; | ||
| 465 | #endif | ||
| 466 | switch (imm) { | ||
| 467 | case 16: | ||
| 468 | /* Rotate 8 bits left & mask with 0x0000ff00 */ | ||
| 469 | PPC_RLWINM(b2p[TMP_REG_1], dst_reg, 8, 16, 23); | ||
| 470 | /* Rotate 8 bits right & insert LSB to reg */ | ||
| 471 | PPC_RLWIMI(b2p[TMP_REG_1], dst_reg, 24, 24, 31); | ||
| 472 | /* Move result back to dst_reg */ | ||
| 473 | PPC_MR(dst_reg, b2p[TMP_REG_1]); | ||
| 474 | break; | ||
| 475 | case 32: | ||
| 476 | /* | ||
| 477 | * Rotate word left by 8 bits: | ||
| 478 | * 2 bytes are already in their final position | ||
| 479 | * -- byte 2 and 4 (of bytes 1, 2, 3 and 4) | ||
| 480 | */ | ||
| 481 | PPC_RLWINM(b2p[TMP_REG_1], dst_reg, 8, 0, 31); | ||
| 482 | /* Rotate 24 bits and insert byte 1 */ | ||
| 483 | PPC_RLWIMI(b2p[TMP_REG_1], dst_reg, 24, 0, 7); | ||
| 484 | /* Rotate 24 bits and insert byte 3 */ | ||
| 485 | PPC_RLWIMI(b2p[TMP_REG_1], dst_reg, 24, 16, 23); | ||
| 486 | PPC_MR(dst_reg, b2p[TMP_REG_1]); | ||
| 487 | break; | ||
| 488 | case 64: | ||
| 489 | /* | ||
| 490 | * Way easier and faster(?) to store the value | ||
| 491 | * into stack and then use ldbrx | ||
| 492 | * | ||
| 493 | * First, determine where in stack we can store | ||
| 494 | * this: | ||
| 495 | * - if we have allotted a stack frame, then we | ||
| 496 | * will utilize the area set aside by | ||
| 497 | * BPF_PPC_STACK_LOCALS | ||
| 498 | * - else, we use the area beneath the NV GPR | ||
| 499 | * save area | ||
| 500 | * | ||
| 501 | * ctx->seen will be reliable in pass2, but | ||
| 502 | * the instructions generated will remain the | ||
| 503 | * same across all passes | ||
| 504 | */ | ||
| 505 | if (bpf_has_stack_frame(ctx)) | ||
| 506 | stack_local_off = STACK_FRAME_MIN_SIZE; | ||
| 507 | else | ||
| 508 | stack_local_off = -(BPF_PPC_STACK_SAVE + 8); | ||
| 509 | |||
| 510 | PPC_STD(dst_reg, 1, stack_local_off); | ||
| 511 | PPC_ADDI(b2p[TMP_REG_1], 1, stack_local_off); | ||
| 512 | PPC_LDBRX(dst_reg, 0, b2p[TMP_REG_1]); | ||
| 513 | break; | ||
| 514 | } | ||
| 515 | break; | ||
| 516 | |||
| 517 | emit_clear: | ||
| 518 | switch (imm) { | ||
| 519 | case 16: | ||
| 520 | /* zero-extend 16 bits into 64 bits */ | ||
| 521 | PPC_RLDICL(dst_reg, dst_reg, 0, 48); | ||
| 522 | break; | ||
| 523 | case 32: | ||
| 524 | /* zero-extend 32 bits into 64 bits */ | ||
| 525 | PPC_RLDICL(dst_reg, dst_reg, 0, 32); | ||
| 526 | break; | ||
| 527 | case 64: | ||
| 528 | /* nop */ | ||
| 529 | break; | ||
| 530 | } | ||
| 531 | break; | ||
| 532 | |||
| 533 | /* | ||
| 534 | * BPF_ST(X) | ||
| 535 | */ | ||
| 536 | case BPF_STX | BPF_MEM | BPF_B: /* *(u8 *)(dst + off) = src */ | ||
| 537 | case BPF_ST | BPF_MEM | BPF_B: /* *(u8 *)(dst + off) = imm */ | ||
| 538 | if (BPF_CLASS(code) == BPF_ST) { | ||
| 539 | PPC_LI(b2p[TMP_REG_1], imm); | ||
| 540 | src_reg = b2p[TMP_REG_1]; | ||
| 541 | } | ||
| 542 | PPC_STB(src_reg, dst_reg, off); | ||
| 543 | break; | ||
| 544 | case BPF_STX | BPF_MEM | BPF_H: /* (u16 *)(dst + off) = src */ | ||
| 545 | case BPF_ST | BPF_MEM | BPF_H: /* (u16 *)(dst + off) = imm */ | ||
| 546 | if (BPF_CLASS(code) == BPF_ST) { | ||
| 547 | PPC_LI(b2p[TMP_REG_1], imm); | ||
| 548 | src_reg = b2p[TMP_REG_1]; | ||
| 549 | } | ||
| 550 | PPC_STH(src_reg, dst_reg, off); | ||
| 551 | break; | ||
| 552 | case BPF_STX | BPF_MEM | BPF_W: /* *(u32 *)(dst + off) = src */ | ||
| 553 | case BPF_ST | BPF_MEM | BPF_W: /* *(u32 *)(dst + off) = imm */ | ||
| 554 | if (BPF_CLASS(code) == BPF_ST) { | ||
| 555 | PPC_LI32(b2p[TMP_REG_1], imm); | ||
| 556 | src_reg = b2p[TMP_REG_1]; | ||
| 557 | } | ||
| 558 | PPC_STW(src_reg, dst_reg, off); | ||
| 559 | break; | ||
| 560 | case BPF_STX | BPF_MEM | BPF_DW: /* (u64 *)(dst + off) = src */ | ||
| 561 | case BPF_ST | BPF_MEM | BPF_DW: /* *(u64 *)(dst + off) = imm */ | ||
| 562 | if (BPF_CLASS(code) == BPF_ST) { | ||
| 563 | PPC_LI32(b2p[TMP_REG_1], imm); | ||
| 564 | src_reg = b2p[TMP_REG_1]; | ||
| 565 | } | ||
| 566 | PPC_STD(src_reg, dst_reg, off); | ||
| 567 | break; | ||
| 568 | |||
| 569 | /* | ||
| 570 | * BPF_STX XADD (atomic_add) | ||
| 571 | */ | ||
| 572 | /* *(u32 *)(dst + off) += src */ | ||
| 573 | case BPF_STX | BPF_XADD | BPF_W: | ||
| 574 | /* Get EA into TMP_REG_1 */ | ||
| 575 | PPC_ADDI(b2p[TMP_REG_1], dst_reg, off); | ||
| 576 | /* error if EA is not word-aligned */ | ||
| 577 | PPC_ANDI(b2p[TMP_REG_2], b2p[TMP_REG_1], 0x03); | ||
| 578 | PPC_BCC_SHORT(COND_EQ, (ctx->idx * 4) + 12); | ||
| 579 | PPC_LI(b2p[BPF_REG_0], 0); | ||
| 580 | PPC_JMP(exit_addr); | ||
| 581 | /* load value from memory into TMP_REG_2 */ | ||
| 582 | PPC_BPF_LWARX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1], 0); | ||
| 583 | /* add value from src_reg into this */ | ||
| 584 | PPC_ADD(b2p[TMP_REG_2], b2p[TMP_REG_2], src_reg); | ||
| 585 | /* store result back */ | ||
| 586 | PPC_BPF_STWCX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1]); | ||
| 587 | /* we're done if this succeeded */ | ||
| 588 | PPC_BCC_SHORT(COND_EQ, (ctx->idx * 4) + (7*4)); | ||
| 589 | /* otherwise, let's try once more */ | ||
| 590 | PPC_BPF_LWARX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1], 0); | ||
| 591 | PPC_ADD(b2p[TMP_REG_2], b2p[TMP_REG_2], src_reg); | ||
| 592 | PPC_BPF_STWCX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1]); | ||
| 593 | /* exit if the store was not successful */ | ||
| 594 | PPC_LI(b2p[BPF_REG_0], 0); | ||
| 595 | PPC_BCC(COND_NE, exit_addr); | ||
| 596 | break; | ||
| 597 | /* *(u64 *)(dst + off) += src */ | ||
| 598 | case BPF_STX | BPF_XADD | BPF_DW: | ||
| 599 | PPC_ADDI(b2p[TMP_REG_1], dst_reg, off); | ||
| 600 | /* error if EA is not doubleword-aligned */ | ||
| 601 | PPC_ANDI(b2p[TMP_REG_2], b2p[TMP_REG_1], 0x07); | ||
| 602 | PPC_BCC_SHORT(COND_EQ, (ctx->idx * 4) + (3*4)); | ||
| 603 | PPC_LI(b2p[BPF_REG_0], 0); | ||
| 604 | PPC_JMP(exit_addr); | ||
| 605 | PPC_BPF_LDARX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1], 0); | ||
| 606 | PPC_ADD(b2p[TMP_REG_2], b2p[TMP_REG_2], src_reg); | ||
| 607 | PPC_BPF_STDCX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1]); | ||
| 608 | PPC_BCC_SHORT(COND_EQ, (ctx->idx * 4) + (7*4)); | ||
| 609 | PPC_BPF_LDARX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1], 0); | ||
| 610 | PPC_ADD(b2p[TMP_REG_2], b2p[TMP_REG_2], src_reg); | ||
| 611 | PPC_BPF_STDCX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1]); | ||
| 612 | PPC_LI(b2p[BPF_REG_0], 0); | ||
| 613 | PPC_BCC(COND_NE, exit_addr); | ||
| 614 | break; | ||
| 615 | |||
| 616 | /* | ||
| 617 | * BPF_LDX | ||
| 618 | */ | ||
| 619 | /* dst = *(u8 *)(ul) (src + off) */ | ||
| 620 | case BPF_LDX | BPF_MEM | BPF_B: | ||
| 621 | PPC_LBZ(dst_reg, src_reg, off); | ||
| 622 | break; | ||
| 623 | /* dst = *(u16 *)(ul) (src + off) */ | ||
| 624 | case BPF_LDX | BPF_MEM | BPF_H: | ||
| 625 | PPC_LHZ(dst_reg, src_reg, off); | ||
| 626 | break; | ||
| 627 | /* dst = *(u32 *)(ul) (src + off) */ | ||
| 628 | case BPF_LDX | BPF_MEM | BPF_W: | ||
| 629 | PPC_LWZ(dst_reg, src_reg, off); | ||
| 630 | break; | ||
| 631 | /* dst = *(u64 *)(ul) (src + off) */ | ||
| 632 | case BPF_LDX | BPF_MEM | BPF_DW: | ||
| 633 | PPC_LD(dst_reg, src_reg, off); | ||
| 634 | break; | ||
| 635 | |||
| 636 | /* | ||
| 637 | * Doubleword load | ||
| 638 | * 16 byte instruction that uses two 'struct bpf_insn' | ||
| 639 | */ | ||
| 640 | case BPF_LD | BPF_IMM | BPF_DW: /* dst = (u64) imm */ | ||
| 641 | imm64 = ((u64)(u32) insn[i].imm) | | ||
| 642 | (((u64)(u32) insn[i+1].imm) << 32); | ||
| 643 | /* Adjust for two bpf instructions */ | ||
| 644 | addrs[++i] = ctx->idx * 4; | ||
| 645 | PPC_LI64(dst_reg, imm64); | ||
| 646 | break; | ||
| 647 | |||
| 648 | /* | ||
| 649 | * Return/Exit | ||
| 650 | */ | ||
| 651 | case BPF_JMP | BPF_EXIT: | ||
| 652 | /* | ||
| 653 | * If this isn't the very last instruction, branch to | ||
| 654 | * the epilogue. If we _are_ the last instruction, | ||
| 655 | * we'll just fall through to the epilogue. | ||
| 656 | */ | ||
| 657 | if (i != flen - 1) | ||
| 658 | PPC_JMP(exit_addr); | ||
| 659 | /* else fall through to the epilogue */ | ||
| 660 | break; | ||
| 661 | |||
| 662 | /* | ||
| 663 | * Call kernel helper | ||
| 664 | */ | ||
| 665 | case BPF_JMP | BPF_CALL: | ||
| 666 | ctx->seen |= SEEN_FUNC; | ||
| 667 | func = (u8 *) __bpf_call_base + imm; | ||
| 668 | |||
| 669 | /* Save skb pointer if we need to re-cache skb data */ | ||
| 670 | if (bpf_helper_changes_skb_data(func)) | ||
| 671 | PPC_BPF_STL(3, 1, STACK_FRAME_MIN_SIZE); | ||
| 672 | |||
| 673 | bpf_jit_emit_func_call(image, ctx, (u64)func); | ||
| 674 | |||
| 675 | /* move return value from r3 to BPF_REG_0 */ | ||
| 676 | PPC_MR(b2p[BPF_REG_0], 3); | ||
| 677 | |||
| 678 | /* refresh skb cache */ | ||
| 679 | if (bpf_helper_changes_skb_data(func)) { | ||
| 680 | /* reload skb pointer to r3 */ | ||
| 681 | PPC_BPF_LL(3, 1, STACK_FRAME_MIN_SIZE); | ||
| 682 | bpf_jit_emit_skb_loads(image, ctx); | ||
| 683 | } | ||
| 684 | break; | ||
| 685 | |||
| 686 | /* | ||
| 687 | * Jumps and branches | ||
| 688 | */ | ||
| 689 | case BPF_JMP | BPF_JA: | ||
| 690 | PPC_JMP(addrs[i + 1 + off]); | ||
| 691 | break; | ||
| 692 | |||
| 693 | case BPF_JMP | BPF_JGT | BPF_K: | ||
| 694 | case BPF_JMP | BPF_JGT | BPF_X: | ||
| 695 | case BPF_JMP | BPF_JSGT | BPF_K: | ||
| 696 | case BPF_JMP | BPF_JSGT | BPF_X: | ||
| 697 | true_cond = COND_GT; | ||
| 698 | goto cond_branch; | ||
| 699 | case BPF_JMP | BPF_JGE | BPF_K: | ||
| 700 | case BPF_JMP | BPF_JGE | BPF_X: | ||
| 701 | case BPF_JMP | BPF_JSGE | BPF_K: | ||
| 702 | case BPF_JMP | BPF_JSGE | BPF_X: | ||
| 703 | true_cond = COND_GE; | ||
| 704 | goto cond_branch; | ||
| 705 | case BPF_JMP | BPF_JEQ | BPF_K: | ||
| 706 | case BPF_JMP | BPF_JEQ | BPF_X: | ||
| 707 | true_cond = COND_EQ; | ||
| 708 | goto cond_branch; | ||
| 709 | case BPF_JMP | BPF_JNE | BPF_K: | ||
| 710 | case BPF_JMP | BPF_JNE | BPF_X: | ||
| 711 | true_cond = COND_NE; | ||
| 712 | goto cond_branch; | ||
| 713 | case BPF_JMP | BPF_JSET | BPF_K: | ||
| 714 | case BPF_JMP | BPF_JSET | BPF_X: | ||
| 715 | true_cond = COND_NE; | ||
| 716 | /* Fall through */ | ||
| 717 | |||
| 718 | cond_branch: | ||
| 719 | switch (code) { | ||
| 720 | case BPF_JMP | BPF_JGT | BPF_X: | ||
| 721 | case BPF_JMP | BPF_JGE | BPF_X: | ||
| 722 | case BPF_JMP | BPF_JEQ | BPF_X: | ||
| 723 | case BPF_JMP | BPF_JNE | BPF_X: | ||
| 724 | /* unsigned comparison */ | ||
| 725 | PPC_CMPLD(dst_reg, src_reg); | ||
| 726 | break; | ||
| 727 | case BPF_JMP | BPF_JSGT | BPF_X: | ||
| 728 | case BPF_JMP | BPF_JSGE | BPF_X: | ||
| 729 | /* signed comparison */ | ||
| 730 | PPC_CMPD(dst_reg, src_reg); | ||
| 731 | break; | ||
| 732 | case BPF_JMP | BPF_JSET | BPF_X: | ||
| 733 | PPC_AND_DOT(b2p[TMP_REG_1], dst_reg, src_reg); | ||
| 734 | break; | ||
| 735 | case BPF_JMP | BPF_JNE | BPF_K: | ||
| 736 | case BPF_JMP | BPF_JEQ | BPF_K: | ||
| 737 | case BPF_JMP | BPF_JGT | BPF_K: | ||
| 738 | case BPF_JMP | BPF_JGE | BPF_K: | ||
| 739 | /* | ||
| 740 | * Need sign-extended load, so only positive | ||
| 741 | * values can be used as imm in cmpldi | ||
| 742 | */ | ||
| 743 | if (imm >= 0 && imm < 32768) | ||
| 744 | PPC_CMPLDI(dst_reg, imm); | ||
| 745 | else { | ||
| 746 | /* sign-extending load */ | ||
| 747 | PPC_LI32(b2p[TMP_REG_1], imm); | ||
| 748 | /* ... but unsigned comparison */ | ||
| 749 | PPC_CMPLD(dst_reg, b2p[TMP_REG_1]); | ||
| 750 | } | ||
| 751 | break; | ||
| 752 | case BPF_JMP | BPF_JSGT | BPF_K: | ||
| 753 | case BPF_JMP | BPF_JSGE | BPF_K: | ||
| 754 | /* | ||
| 755 | * signed comparison, so any 16-bit value | ||
| 756 | * can be used in cmpdi | ||
| 757 | */ | ||
| 758 | if (imm >= -32768 && imm < 32768) | ||
| 759 | PPC_CMPDI(dst_reg, imm); | ||
| 760 | else { | ||
| 761 | PPC_LI32(b2p[TMP_REG_1], imm); | ||
| 762 | PPC_CMPD(dst_reg, b2p[TMP_REG_1]); | ||
| 763 | } | ||
| 764 | break; | ||
| 765 | case BPF_JMP | BPF_JSET | BPF_K: | ||
| 766 | /* andi does not sign-extend the immediate */ | ||
| 767 | if (imm >= 0 && imm < 32768) | ||
| 768 | /* PPC_ANDI is _only/always_ dot-form */ | ||
| 769 | PPC_ANDI(b2p[TMP_REG_1], dst_reg, imm); | ||
| 770 | else { | ||
| 771 | PPC_LI32(b2p[TMP_REG_1], imm); | ||
| 772 | PPC_AND_DOT(b2p[TMP_REG_1], dst_reg, | ||
| 773 | b2p[TMP_REG_1]); | ||
| 774 | } | ||
| 775 | break; | ||
| 776 | } | ||
| 777 | PPC_BCC(true_cond, addrs[i + 1 + off]); | ||
| 778 | break; | ||
| 779 | |||
| 780 | /* | ||
| 781 | * Loads from packet header/data | ||
| 782 | * Assume 32-bit input value in imm and X (src_reg) | ||
| 783 | */ | ||
| 784 | |||
| 785 | /* Absolute loads */ | ||
| 786 | case BPF_LD | BPF_W | BPF_ABS: | ||
| 787 | func = (u8 *)CHOOSE_LOAD_FUNC(imm, sk_load_word); | ||
| 788 | goto common_load_abs; | ||
| 789 | case BPF_LD | BPF_H | BPF_ABS: | ||
| 790 | func = (u8 *)CHOOSE_LOAD_FUNC(imm, sk_load_half); | ||
| 791 | goto common_load_abs; | ||
| 792 | case BPF_LD | BPF_B | BPF_ABS: | ||
| 793 | func = (u8 *)CHOOSE_LOAD_FUNC(imm, sk_load_byte); | ||
| 794 | common_load_abs: | ||
| 795 | /* | ||
| 796 | * Load from [imm] | ||
| 797 | * Load into r4, which can just be passed onto | ||
| 798 | * skb load helpers as the second parameter | ||
| 799 | */ | ||
| 800 | PPC_LI32(4, imm); | ||
| 801 | goto common_load; | ||
| 802 | |||
| 803 | /* Indirect loads */ | ||
| 804 | case BPF_LD | BPF_W | BPF_IND: | ||
| 805 | func = (u8 *)sk_load_word; | ||
| 806 | goto common_load_ind; | ||
| 807 | case BPF_LD | BPF_H | BPF_IND: | ||
| 808 | func = (u8 *)sk_load_half; | ||
| 809 | goto common_load_ind; | ||
| 810 | case BPF_LD | BPF_B | BPF_IND: | ||
| 811 | func = (u8 *)sk_load_byte; | ||
| 812 | common_load_ind: | ||
| 813 | /* | ||
| 814 | * Load from [src_reg + imm] | ||
| 815 | * Treat src_reg as a 32-bit value | ||
| 816 | */ | ||
| 817 | PPC_EXTSW(4, src_reg); | ||
| 818 | if (imm) { | ||
| 819 | if (imm >= -32768 && imm < 32768) | ||
| 820 | PPC_ADDI(4, 4, IMM_L(imm)); | ||
| 821 | else { | ||
| 822 | PPC_LI32(b2p[TMP_REG_1], imm); | ||
| 823 | PPC_ADD(4, 4, b2p[TMP_REG_1]); | ||
| 824 | } | ||
| 825 | } | ||
| 826 | |||
| 827 | common_load: | ||
| 828 | ctx->seen |= SEEN_SKB; | ||
| 829 | ctx->seen |= SEEN_FUNC; | ||
| 830 | bpf_jit_emit_func_call(image, ctx, (u64)func); | ||
| 831 | |||
| 832 | /* | ||
| 833 | * Helper returns 'lt' condition on error, and an | ||
| 834 | * appropriate return value in BPF_REG_0 | ||
| 835 | */ | ||
| 836 | PPC_BCC(COND_LT, exit_addr); | ||
| 837 | break; | ||
| 838 | |||
| 839 | /* | ||
| 840 | * TODO: Tail call | ||
| 841 | */ | ||
| 842 | case BPF_JMP | BPF_CALL | BPF_X: | ||
| 843 | |||
| 844 | default: | ||
| 845 | /* | ||
| 846 | * The filter contains something cruel & unusual. | ||
| 847 | * We don't handle it, but also there shouldn't be | ||
| 848 | * anything missing from our list. | ||
| 849 | */ | ||
| 850 | pr_err_ratelimited("eBPF filter opcode %04x (@%d) unsupported\n", | ||
| 851 | code, i); | ||
| 852 | return -ENOTSUPP; | ||
| 853 | } | ||
| 854 | } | ||
| 855 | |||
| 856 | /* Set end-of-body-code address for exit. */ | ||
| 857 | addrs[i] = ctx->idx * 4; | ||
| 858 | |||
| 859 | return 0; | ||
| 860 | } | ||
| 861 | |||
| 862 | void bpf_jit_compile(struct bpf_prog *fp) { } | ||
| 863 | |||
| 864 | struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *fp) | ||
| 865 | { | ||
| 866 | u32 proglen; | ||
| 867 | u32 alloclen; | ||
| 868 | u8 *image = NULL; | ||
| 869 | u32 *code_base; | ||
| 870 | u32 *addrs; | ||
| 871 | struct codegen_context cgctx; | ||
| 872 | int pass; | ||
| 873 | int flen; | ||
| 874 | struct bpf_binary_header *bpf_hdr; | ||
| 875 | |||
| 876 | if (!bpf_jit_enable) | ||
| 877 | return fp; | ||
| 878 | |||
| 879 | flen = fp->len; | ||
| 880 | addrs = kzalloc((flen+1) * sizeof(*addrs), GFP_KERNEL); | ||
| 881 | if (addrs == NULL) | ||
| 882 | return fp; | ||
| 883 | |||
| 884 | cgctx.idx = 0; | ||
| 885 | cgctx.seen = 0; | ||
| 886 | /* Scouting faux-generate pass 0 */ | ||
| 887 | if (bpf_jit_build_body(fp, 0, &cgctx, addrs)) | ||
| 888 | /* We hit something illegal or unsupported. */ | ||
| 889 | goto out; | ||
| 890 | |||
| 891 | /* | ||
| 892 | * Pretend to build prologue, given the features we've seen. This will | ||
| 893 | * update ctgtx.idx as it pretends to output instructions, then we can | ||
| 894 | * calculate total size from idx. | ||
| 895 | */ | ||
| 896 | bpf_jit_build_prologue(0, &cgctx); | ||
| 897 | bpf_jit_build_epilogue(0, &cgctx); | ||
| 898 | |||
| 899 | proglen = cgctx.idx * 4; | ||
| 900 | alloclen = proglen + FUNCTION_DESCR_SIZE; | ||
| 901 | |||
| 902 | bpf_hdr = bpf_jit_binary_alloc(alloclen, &image, 4, | ||
| 903 | bpf_jit_fill_ill_insns); | ||
| 904 | if (!bpf_hdr) | ||
| 905 | goto out; | ||
| 906 | |||
| 907 | code_base = (u32 *)(image + FUNCTION_DESCR_SIZE); | ||
| 908 | |||
| 909 | /* Code generation passes 1-2 */ | ||
| 910 | for (pass = 1; pass < 3; pass++) { | ||
| 911 | /* Now build the prologue, body code & epilogue for real. */ | ||
| 912 | cgctx.idx = 0; | ||
| 913 | bpf_jit_build_prologue(code_base, &cgctx); | ||
| 914 | bpf_jit_build_body(fp, code_base, &cgctx, addrs); | ||
| 915 | bpf_jit_build_epilogue(code_base, &cgctx); | ||
| 916 | |||
| 917 | if (bpf_jit_enable > 1) | ||
| 918 | pr_info("Pass %d: shrink = %d, seen = 0x%x\n", pass, | ||
| 919 | proglen - (cgctx.idx * 4), cgctx.seen); | ||
| 920 | } | ||
| 921 | |||
| 922 | if (bpf_jit_enable > 1) | ||
| 923 | /* | ||
| 924 | * Note that we output the base address of the code_base | ||
| 925 | * rather than image, since opcodes are in code_base. | ||
| 926 | */ | ||
| 927 | bpf_jit_dump(flen, proglen, pass, code_base); | ||
| 928 | |||
| 929 | if (image) { | ||
| 930 | bpf_flush_icache(bpf_hdr, image + alloclen); | ||
| 931 | #ifdef PPC64_ELF_ABI_v1 | ||
| 932 | /* Function descriptor nastiness: Address + TOC */ | ||
| 933 | ((u64 *)image)[0] = (u64)code_base; | ||
| 934 | ((u64 *)image)[1] = local_paca->kernel_toc; | ||
| 935 | #endif | ||
| 936 | fp->bpf_func = (void *)image; | ||
| 937 | fp->jited = 1; | ||
| 938 | } | ||
| 939 | |||
| 940 | out: | ||
| 941 | kfree(addrs); | ||
| 942 | return fp; | ||
| 943 | } | ||
| 944 | |||
| 945 | void bpf_jit_free(struct bpf_prog *fp) | ||
| 946 | { | ||
| 947 | unsigned long addr = (unsigned long)fp->bpf_func & PAGE_MASK; | ||
| 948 | struct bpf_binary_header *bpf_hdr = (void *)addr; | ||
| 949 | |||
| 950 | if (fp->jited) | ||
| 951 | bpf_jit_binary_free(bpf_hdr); | ||
| 952 | |||
| 953 | bpf_prog_unlock_free(fp); | ||
| 954 | } | ||
diff --git a/arch/powerpc/oprofile/cell/spu_task_sync.c b/arch/powerpc/oprofile/cell/spu_task_sync.c index ed7b0977072a..ef2142ff7dbd 100644 --- a/arch/powerpc/oprofile/cell/spu_task_sync.c +++ b/arch/powerpc/oprofile/cell/spu_task_sync.c | |||
| @@ -51,7 +51,7 @@ static void spu_buff_add(unsigned long int value, int spu) | |||
| 51 | * That way we can tell the difference between the | 51 | * That way we can tell the difference between the |
| 52 | * buffer being full versus empty. | 52 | * buffer being full versus empty. |
| 53 | * | 53 | * |
| 54 | * ASSUPTION: the buffer_lock is held when this function | 54 | * ASSUMPTION: the buffer_lock is held when this function |
| 55 | * is called to lock the buffer, head and tail. | 55 | * is called to lock the buffer, head and tail. |
| 56 | */ | 56 | */ |
| 57 | int full = 1; | 57 | int full = 1; |
diff --git a/arch/powerpc/perf/Makefile b/arch/powerpc/perf/Makefile index 77b6394a7c50..f102d5370101 100644 --- a/arch/powerpc/perf/Makefile +++ b/arch/powerpc/perf/Makefile | |||
| @@ -5,7 +5,7 @@ obj-$(CONFIG_PERF_EVENTS) += callchain.o perf_regs.o | |||
| 5 | obj-$(CONFIG_PPC_PERF_CTRS) += core-book3s.o bhrb.o | 5 | obj-$(CONFIG_PPC_PERF_CTRS) += core-book3s.o bhrb.o |
| 6 | obj64-$(CONFIG_PPC_PERF_CTRS) += power4-pmu.o ppc970-pmu.o power5-pmu.o \ | 6 | obj64-$(CONFIG_PPC_PERF_CTRS) += power4-pmu.o ppc970-pmu.o power5-pmu.o \ |
| 7 | power5+-pmu.o power6-pmu.o power7-pmu.o \ | 7 | power5+-pmu.o power6-pmu.o power7-pmu.o \ |
| 8 | power8-pmu.o | 8 | isa207-common.o power8-pmu.o power9-pmu.o |
| 9 | obj32-$(CONFIG_PPC_PERF_CTRS) += mpc7450-pmu.o | 9 | obj32-$(CONFIG_PPC_PERF_CTRS) += mpc7450-pmu.o |
| 10 | 10 | ||
| 11 | obj-$(CONFIG_FSL_EMB_PERF_EVENT) += core-fsl-emb.o | 11 | obj-$(CONFIG_FSL_EMB_PERF_EVENT) += core-fsl-emb.o |
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c index ffd61d55fb25..4ed377f0f7b2 100644 --- a/arch/powerpc/perf/core-book3s.c +++ b/arch/powerpc/perf/core-book3s.c | |||
| @@ -992,7 +992,7 @@ static u64 check_and_compute_delta(u64 prev, u64 val) | |||
| 992 | * than the previous value it will cause the delta and the counter to | 992 | * than the previous value it will cause the delta and the counter to |
| 993 | * have bogus values unless we rolled a counter over. If a coutner is | 993 | * have bogus values unless we rolled a counter over. If a coutner is |
| 994 | * rolled back, it will be smaller, but within 256, which is the maximum | 994 | * rolled back, it will be smaller, but within 256, which is the maximum |
| 995 | * number of events to rollback at once. If we dectect a rollback | 995 | * number of events to rollback at once. If we detect a rollback |
| 996 | * return 0. This can lead to a small lack of precision in the | 996 | * return 0. This can lead to a small lack of precision in the |
| 997 | * counters. | 997 | * counters. |
| 998 | */ | 998 | */ |
diff --git a/arch/powerpc/perf/hv-24x7.c b/arch/powerpc/perf/hv-24x7.c index 2da41b78cb6d..7b2ca16b1eb4 100644 --- a/arch/powerpc/perf/hv-24x7.c +++ b/arch/powerpc/perf/hv-24x7.c | |||
| @@ -1298,7 +1298,7 @@ static void h_24x7_event_read(struct perf_event *event) | |||
| 1298 | __this_cpu_write(hv_24x7_txn_err, ret); | 1298 | __this_cpu_write(hv_24x7_txn_err, ret); |
| 1299 | } else { | 1299 | } else { |
| 1300 | /* | 1300 | /* |
| 1301 | * Assoicate the event with the HCALL request index, | 1301 | * Associate the event with the HCALL request index, |
| 1302 | * so ->commit_txn() can quickly find/update count. | 1302 | * so ->commit_txn() can quickly find/update count. |
| 1303 | */ | 1303 | */ |
| 1304 | i = request_buffer->num_requests - 1; | 1304 | i = request_buffer->num_requests - 1; |
diff --git a/arch/powerpc/perf/hv-24x7.h b/arch/powerpc/perf/hv-24x7.h index 791455e7f5cf..634ef4082cdc 100644 --- a/arch/powerpc/perf/hv-24x7.h +++ b/arch/powerpc/perf/hv-24x7.h | |||
| @@ -66,7 +66,7 @@ struct hv_24x7_result_element { | |||
| 66 | /* -1 if @performance_domain does not refer to a virtual processor */ | 66 | /* -1 if @performance_domain does not refer to a virtual processor */ |
| 67 | __be32 lpar_cfg_instance_id; | 67 | __be32 lpar_cfg_instance_id; |
| 68 | 68 | ||
| 69 | /* size = @result_element_data_size of cointaining result. */ | 69 | /* size = @result_element_data_size of containing result. */ |
| 70 | __u64 element_data[1]; | 70 | __u64 element_data[1]; |
| 71 | } __packed; | 71 | } __packed; |
| 72 | 72 | ||
diff --git a/arch/powerpc/perf/isa207-common.c b/arch/powerpc/perf/isa207-common.c new file mode 100644 index 000000000000..6143c99f3ec5 --- /dev/null +++ b/arch/powerpc/perf/isa207-common.c | |||
| @@ -0,0 +1,263 @@ | |||
| 1 | /* | ||
| 2 | * Common Performance counter support functions for PowerISA v2.07 processors. | ||
| 3 | * | ||
| 4 | * Copyright 2009 Paul Mackerras, IBM Corporation. | ||
| 5 | * Copyright 2013 Michael Ellerman, IBM Corporation. | ||
| 6 | * Copyright 2016 Madhavan Srinivasan, IBM Corporation. | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or | ||
| 9 | * modify it under the terms of the GNU General Public License | ||
| 10 | * as published by the Free Software Foundation; either version | ||
| 11 | * 2 of the License, or (at your option) any later version. | ||
| 12 | */ | ||
| 13 | #include "isa207-common.h" | ||
| 14 | |||
| 15 | static inline bool event_is_fab_match(u64 event) | ||
| 16 | { | ||
| 17 | /* Only check pmc, unit and pmcxsel, ignore the edge bit (0) */ | ||
| 18 | event &= 0xff0fe; | ||
| 19 | |||
| 20 | /* PM_MRK_FAB_RSP_MATCH & PM_MRK_FAB_RSP_MATCH_CYC */ | ||
| 21 | return (event == 0x30056 || event == 0x4f052); | ||
| 22 | } | ||
| 23 | |||
| 24 | int isa207_get_constraint(u64 event, unsigned long *maskp, unsigned long *valp) | ||
| 25 | { | ||
| 26 | unsigned int unit, pmc, cache, ebb; | ||
| 27 | unsigned long mask, value; | ||
| 28 | |||
| 29 | mask = value = 0; | ||
| 30 | |||
| 31 | if (event & ~EVENT_VALID_MASK) | ||
| 32 | return -1; | ||
| 33 | |||
| 34 | pmc = (event >> EVENT_PMC_SHIFT) & EVENT_PMC_MASK; | ||
| 35 | unit = (event >> EVENT_UNIT_SHIFT) & EVENT_UNIT_MASK; | ||
| 36 | cache = (event >> EVENT_CACHE_SEL_SHIFT) & EVENT_CACHE_SEL_MASK; | ||
| 37 | ebb = (event >> EVENT_EBB_SHIFT) & EVENT_EBB_MASK; | ||
| 38 | |||
| 39 | if (pmc) { | ||
| 40 | u64 base_event; | ||
| 41 | |||
| 42 | if (pmc > 6) | ||
| 43 | return -1; | ||
| 44 | |||
| 45 | /* Ignore Linux defined bits when checking event below */ | ||
| 46 | base_event = event & ~EVENT_LINUX_MASK; | ||
| 47 | |||
| 48 | if (pmc >= 5 && base_event != 0x500fa && | ||
| 49 | base_event != 0x600f4) | ||
| 50 | return -1; | ||
| 51 | |||
| 52 | mask |= CNST_PMC_MASK(pmc); | ||
| 53 | value |= CNST_PMC_VAL(pmc); | ||
| 54 | } | ||
| 55 | |||
| 56 | if (pmc <= 4) { | ||
| 57 | /* | ||
| 58 | * Add to number of counters in use. Note this includes events with | ||
| 59 | * a PMC of 0 - they still need a PMC, it's just assigned later. | ||
| 60 | * Don't count events on PMC 5 & 6, there is only one valid event | ||
| 61 | * on each of those counters, and they are handled above. | ||
| 62 | */ | ||
| 63 | mask |= CNST_NC_MASK; | ||
| 64 | value |= CNST_NC_VAL; | ||
| 65 | } | ||
| 66 | |||
| 67 | if (unit >= 6 && unit <= 9) { | ||
| 68 | /* | ||
| 69 | * L2/L3 events contain a cache selector field, which is | ||
| 70 | * supposed to be programmed into MMCRC. However MMCRC is only | ||
| 71 | * HV writable, and there is no API for guest kernels to modify | ||
| 72 | * it. The solution is for the hypervisor to initialise the | ||
| 73 | * field to zeroes, and for us to only ever allow events that | ||
| 74 | * have a cache selector of zero. The bank selector (bit 3) is | ||
| 75 | * irrelevant, as long as the rest of the value is 0. | ||
| 76 | */ | ||
| 77 | if (cache & 0x7) | ||
| 78 | return -1; | ||
| 79 | |||
| 80 | } else if (event & EVENT_IS_L1) { | ||
| 81 | mask |= CNST_L1_QUAL_MASK; | ||
| 82 | value |= CNST_L1_QUAL_VAL(cache); | ||
| 83 | } | ||
| 84 | |||
| 85 | if (event & EVENT_IS_MARKED) { | ||
| 86 | mask |= CNST_SAMPLE_MASK; | ||
| 87 | value |= CNST_SAMPLE_VAL(event >> EVENT_SAMPLE_SHIFT); | ||
| 88 | } | ||
| 89 | |||
| 90 | /* | ||
| 91 | * Special case for PM_MRK_FAB_RSP_MATCH and PM_MRK_FAB_RSP_MATCH_CYC, | ||
| 92 | * the threshold control bits are used for the match value. | ||
| 93 | */ | ||
| 94 | if (event_is_fab_match(event)) { | ||
| 95 | mask |= CNST_FAB_MATCH_MASK; | ||
| 96 | value |= CNST_FAB_MATCH_VAL(event >> EVENT_THR_CTL_SHIFT); | ||
| 97 | } else { | ||
| 98 | /* | ||
| 99 | * Check the mantissa upper two bits are not zero, unless the | ||
| 100 | * exponent is also zero. See the THRESH_CMP_MANTISSA doc. | ||
| 101 | */ | ||
| 102 | unsigned int cmp, exp; | ||
| 103 | |||
| 104 | cmp = (event >> EVENT_THR_CMP_SHIFT) & EVENT_THR_CMP_MASK; | ||
| 105 | exp = cmp >> 7; | ||
| 106 | |||
| 107 | if (exp && (cmp & 0x60) == 0) | ||
| 108 | return -1; | ||
| 109 | |||
| 110 | mask |= CNST_THRESH_MASK; | ||
| 111 | value |= CNST_THRESH_VAL(event >> EVENT_THRESH_SHIFT); | ||
| 112 | } | ||
| 113 | |||
| 114 | if (!pmc && ebb) | ||
| 115 | /* EBB events must specify the PMC */ | ||
| 116 | return -1; | ||
| 117 | |||
| 118 | if (event & EVENT_WANTS_BHRB) { | ||
| 119 | if (!ebb) | ||
| 120 | /* Only EBB events can request BHRB */ | ||
| 121 | return -1; | ||
| 122 | |||
| 123 | mask |= CNST_IFM_MASK; | ||
| 124 | value |= CNST_IFM_VAL(event >> EVENT_IFM_SHIFT); | ||
| 125 | } | ||
| 126 | |||
| 127 | /* | ||
| 128 | * All events must agree on EBB, either all request it or none. | ||
| 129 | * EBB events are pinned & exclusive, so this should never actually | ||
| 130 | * hit, but we leave it as a fallback in case. | ||
| 131 | */ | ||
| 132 | mask |= CNST_EBB_VAL(ebb); | ||
| 133 | value |= CNST_EBB_MASK; | ||
| 134 | |||
| 135 | *maskp = mask; | ||
| 136 | *valp = value; | ||
| 137 | |||
| 138 | return 0; | ||
| 139 | } | ||
| 140 | |||
| 141 | int isa207_compute_mmcr(u64 event[], int n_ev, | ||
| 142 | unsigned int hwc[], unsigned long mmcr[], | ||
| 143 | struct perf_event *pevents[]) | ||
| 144 | { | ||
| 145 | unsigned long mmcra, mmcr1, mmcr2, unit, combine, psel, cache, val; | ||
| 146 | unsigned int pmc, pmc_inuse; | ||
| 147 | int i; | ||
| 148 | |||
| 149 | pmc_inuse = 0; | ||
| 150 | |||
| 151 | /* First pass to count resource use */ | ||
| 152 | for (i = 0; i < n_ev; ++i) { | ||
| 153 | pmc = (event[i] >> EVENT_PMC_SHIFT) & EVENT_PMC_MASK; | ||
| 154 | if (pmc) | ||
| 155 | pmc_inuse |= 1 << pmc; | ||
| 156 | } | ||
| 157 | |||
| 158 | /* In continuous sampling mode, update SDAR on TLB miss */ | ||
| 159 | mmcra = MMCRA_SDAR_MODE_TLB; | ||
| 160 | mmcr1 = mmcr2 = 0; | ||
| 161 | |||
| 162 | /* Second pass: assign PMCs, set all MMCR1 fields */ | ||
| 163 | for (i = 0; i < n_ev; ++i) { | ||
| 164 | pmc = (event[i] >> EVENT_PMC_SHIFT) & EVENT_PMC_MASK; | ||
| 165 | unit = (event[i] >> EVENT_UNIT_SHIFT) & EVENT_UNIT_MASK; | ||
| 166 | combine = (event[i] >> EVENT_COMBINE_SHIFT) & EVENT_COMBINE_MASK; | ||
| 167 | psel = event[i] & EVENT_PSEL_MASK; | ||
| 168 | |||
| 169 | if (!pmc) { | ||
| 170 | for (pmc = 1; pmc <= 4; ++pmc) { | ||
| 171 | if (!(pmc_inuse & (1 << pmc))) | ||
| 172 | break; | ||
| 173 | } | ||
| 174 | |||
| 175 | pmc_inuse |= 1 << pmc; | ||
| 176 | } | ||
| 177 | |||
| 178 | if (pmc <= 4) { | ||
| 179 | mmcr1 |= unit << MMCR1_UNIT_SHIFT(pmc); | ||
| 180 | mmcr1 |= combine << MMCR1_COMBINE_SHIFT(pmc); | ||
| 181 | mmcr1 |= psel << MMCR1_PMCSEL_SHIFT(pmc); | ||
| 182 | } | ||
| 183 | |||
| 184 | if (event[i] & EVENT_IS_L1) { | ||
| 185 | cache = event[i] >> EVENT_CACHE_SEL_SHIFT; | ||
| 186 | mmcr1 |= (cache & 1) << MMCR1_IC_QUAL_SHIFT; | ||
| 187 | cache >>= 1; | ||
| 188 | mmcr1 |= (cache & 1) << MMCR1_DC_QUAL_SHIFT; | ||
| 189 | } | ||
| 190 | |||
| 191 | if (event[i] & EVENT_IS_MARKED) { | ||
| 192 | mmcra |= MMCRA_SAMPLE_ENABLE; | ||
| 193 | |||
| 194 | val = (event[i] >> EVENT_SAMPLE_SHIFT) & EVENT_SAMPLE_MASK; | ||
| 195 | if (val) { | ||
| 196 | mmcra |= (val & 3) << MMCRA_SAMP_MODE_SHIFT; | ||
| 197 | mmcra |= (val >> 2) << MMCRA_SAMP_ELIG_SHIFT; | ||
| 198 | } | ||
| 199 | } | ||
| 200 | |||
| 201 | /* | ||
| 202 | * PM_MRK_FAB_RSP_MATCH and PM_MRK_FAB_RSP_MATCH_CYC, | ||
| 203 | * the threshold bits are used for the match value. | ||
| 204 | */ | ||
| 205 | if (event_is_fab_match(event[i])) { | ||
| 206 | mmcr1 |= ((event[i] >> EVENT_THR_CTL_SHIFT) & | ||
| 207 | EVENT_THR_CTL_MASK) << MMCR1_FAB_SHIFT; | ||
| 208 | } else { | ||
| 209 | val = (event[i] >> EVENT_THR_CTL_SHIFT) & EVENT_THR_CTL_MASK; | ||
| 210 | mmcra |= val << MMCRA_THR_CTL_SHIFT; | ||
| 211 | val = (event[i] >> EVENT_THR_SEL_SHIFT) & EVENT_THR_SEL_MASK; | ||
| 212 | mmcra |= val << MMCRA_THR_SEL_SHIFT; | ||
| 213 | val = (event[i] >> EVENT_THR_CMP_SHIFT) & EVENT_THR_CMP_MASK; | ||
| 214 | mmcra |= val << MMCRA_THR_CMP_SHIFT; | ||
| 215 | } | ||
| 216 | |||
| 217 | if (event[i] & EVENT_WANTS_BHRB) { | ||
| 218 | val = (event[i] >> EVENT_IFM_SHIFT) & EVENT_IFM_MASK; | ||
| 219 | mmcra |= val << MMCRA_IFM_SHIFT; | ||
| 220 | } | ||
| 221 | |||
| 222 | if (pevents[i]->attr.exclude_user) | ||
| 223 | mmcr2 |= MMCR2_FCP(pmc); | ||
| 224 | |||
| 225 | if (pevents[i]->attr.exclude_hv) | ||
| 226 | mmcr2 |= MMCR2_FCH(pmc); | ||
| 227 | |||
| 228 | if (pevents[i]->attr.exclude_kernel) { | ||
| 229 | if (cpu_has_feature(CPU_FTR_HVMODE)) | ||
| 230 | mmcr2 |= MMCR2_FCH(pmc); | ||
| 231 | else | ||
| 232 | mmcr2 |= MMCR2_FCS(pmc); | ||
| 233 | } | ||
| 234 | |||
| 235 | hwc[i] = pmc - 1; | ||
| 236 | } | ||
| 237 | |||
| 238 | /* Return MMCRx values */ | ||
| 239 | mmcr[0] = 0; | ||
| 240 | |||
| 241 | /* pmc_inuse is 1-based */ | ||
| 242 | if (pmc_inuse & 2) | ||
| 243 | mmcr[0] = MMCR0_PMC1CE; | ||
| 244 | |||
| 245 | if (pmc_inuse & 0x7c) | ||
| 246 | mmcr[0] |= MMCR0_PMCjCE; | ||
| 247 | |||
| 248 | /* If we're not using PMC 5 or 6, freeze them */ | ||
| 249 | if (!(pmc_inuse & 0x60)) | ||
| 250 | mmcr[0] |= MMCR0_FC56; | ||
| 251 | |||
| 252 | mmcr[1] = mmcr1; | ||
| 253 | mmcr[2] = mmcra; | ||
| 254 | mmcr[3] = mmcr2; | ||
| 255 | |||
| 256 | return 0; | ||
| 257 | } | ||
| 258 | |||
| 259 | void isa207_disable_pmc(unsigned int pmc, unsigned long mmcr[]) | ||
| 260 | { | ||
| 261 | if (pmc <= 3) | ||
| 262 | mmcr[1] &= ~(0xffUL << MMCR1_PMCSEL_SHIFT(pmc + 1)); | ||
| 263 | } | ||
diff --git a/arch/powerpc/perf/isa207-common.h b/arch/powerpc/perf/isa207-common.h new file mode 100644 index 000000000000..4d0a4e5017c2 --- /dev/null +++ b/arch/powerpc/perf/isa207-common.h | |||
| @@ -0,0 +1,236 @@ | |||
| 1 | /* | ||
| 2 | * Copyright 2009 Paul Mackerras, IBM Corporation. | ||
| 3 | * Copyright 2013 Michael Ellerman, IBM Corporation. | ||
| 4 | * Copyright 2016 Madhavan Srinivasan, IBM Corporation. | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or | ||
| 7 | * modify it under the terms of the GNU General Public License | ||
| 8 | * as published by the Free Software Foundation; either version | ||
| 9 | * 2 of the License, or any later version. | ||
| 10 | */ | ||
| 11 | |||
| 12 | #ifndef _LINUX_POWERPC_PERF_ISA207_COMMON_H_ | ||
| 13 | #define _LINUX_POWERPC_PERF_ISA207_COMMON_H_ | ||
| 14 | |||
| 15 | #include <linux/kernel.h> | ||
| 16 | #include <linux/perf_event.h> | ||
| 17 | #include <asm/firmware.h> | ||
| 18 | #include <asm/cputable.h> | ||
| 19 | |||
| 20 | /* | ||
| 21 | * Raw event encoding for PowerISA v2.07: | ||
| 22 | * | ||
| 23 | * 60 56 52 48 44 40 36 32 | ||
| 24 | * | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | | ||
| 25 | * | | [ ] [ thresh_cmp ] [ thresh_ctl ] | ||
| 26 | * | | | | | ||
| 27 | * | | *- IFM (Linux) thresh start/stop OR FAB match -* | ||
| 28 | * | *- BHRB (Linux) | ||
| 29 | * *- EBB (Linux) | ||
| 30 | * | ||
| 31 | * 28 24 20 16 12 8 4 0 | ||
| 32 | * | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | | ||
| 33 | * [ ] [ sample ] [cache] [ pmc ] [unit ] c m [ pmcxsel ] | ||
| 34 | * | | | | | | ||
| 35 | * | | | | *- mark | ||
| 36 | * | | *- L1/L2/L3 cache_sel | | ||
| 37 | * | | | | ||
| 38 | * | *- sampling mode for marked events *- combine | ||
| 39 | * | | ||
| 40 | * *- thresh_sel | ||
| 41 | * | ||
| 42 | * Below uses IBM bit numbering. | ||
| 43 | * | ||
| 44 | * MMCR1[x:y] = unit (PMCxUNIT) | ||
| 45 | * MMCR1[x] = combine (PMCxCOMB) | ||
| 46 | * | ||
| 47 | * if pmc == 3 and unit == 0 and pmcxsel[0:6] == 0b0101011 | ||
| 48 | * # PM_MRK_FAB_RSP_MATCH | ||
| 49 | * MMCR1[20:27] = thresh_ctl (FAB_CRESP_MATCH / FAB_TYPE_MATCH) | ||
| 50 | * else if pmc == 4 and unit == 0xf and pmcxsel[0:6] == 0b0101001 | ||
| 51 | * # PM_MRK_FAB_RSP_MATCH_CYC | ||
| 52 | * MMCR1[20:27] = thresh_ctl (FAB_CRESP_MATCH / FAB_TYPE_MATCH) | ||
| 53 | * else | ||
| 54 | * MMCRA[48:55] = thresh_ctl (THRESH START/END) | ||
| 55 | * | ||
| 56 | * if thresh_sel: | ||
| 57 | * MMCRA[45:47] = thresh_sel | ||
| 58 | * | ||
| 59 | * if thresh_cmp: | ||
| 60 | * MMCRA[22:24] = thresh_cmp[0:2] | ||
| 61 | * MMCRA[25:31] = thresh_cmp[3:9] | ||
| 62 | * | ||
| 63 | * if unit == 6 or unit == 7 | ||
| 64 | * MMCRC[53:55] = cache_sel[1:3] (L2EVENT_SEL) | ||
| 65 | * else if unit == 8 or unit == 9: | ||
| 66 | * if cache_sel[0] == 0: # L3 bank | ||
| 67 | * MMCRC[47:49] = cache_sel[1:3] (L3EVENT_SEL0) | ||
| 68 | * else if cache_sel[0] == 1: | ||
| 69 | * MMCRC[50:51] = cache_sel[2:3] (L3EVENT_SEL1) | ||
| 70 | * else if cache_sel[1]: # L1 event | ||
| 71 | * MMCR1[16] = cache_sel[2] | ||
| 72 | Â * MMCR1[17] = cache_sel[3] | ||
| 73 | * | ||
| 74 | * if mark: | ||
| 75 | * MMCRA[63] = 1 (SAMPLE_ENABLE) | ||
| 76 | * MMCRA[57:59] = sample[0:2] (RAND_SAMP_ELIG) | ||
| 77 | Â * MMCRA[61:62] = sample[3:4] (RAND_SAMP_MODE) | ||
| 78 | * | ||
| 79 | * if EBB and BHRB: | ||
| 80 | * MMCRA[32:33] = IFM | ||
| 81 | * | ||
| 82 | */ | ||
| 83 | |||
| 84 | #define EVENT_EBB_MASK 1ull | ||
| 85 | #define EVENT_EBB_SHIFT PERF_EVENT_CONFIG_EBB_SHIFT | ||
| 86 | #define EVENT_BHRB_MASK 1ull | ||
| 87 | #define EVENT_BHRB_SHIFT 62 | ||
| 88 | #define EVENT_WANTS_BHRB (EVENT_BHRB_MASK << EVENT_BHRB_SHIFT) | ||
| 89 | #define EVENT_IFM_MASK 3ull | ||
| 90 | #define EVENT_IFM_SHIFT 60 | ||
| 91 | #define EVENT_THR_CMP_SHIFT 40 /* Threshold CMP value */ | ||
| 92 | #define EVENT_THR_CMP_MASK 0x3ff | ||
| 93 | #define EVENT_THR_CTL_SHIFT 32 /* Threshold control value (start/stop) */ | ||
| 94 | #define EVENT_THR_CTL_MASK 0xffull | ||
| 95 | #define EVENT_THR_SEL_SHIFT 29 /* Threshold select value */ | ||
| 96 | #define EVENT_THR_SEL_MASK 0x7 | ||
| 97 | #define EVENT_THRESH_SHIFT 29 /* All threshold bits */ | ||
| 98 | #define EVENT_THRESH_MASK 0x1fffffull | ||
| 99 | #define EVENT_SAMPLE_SHIFT 24 /* Sampling mode & eligibility */ | ||
| 100 | #define EVENT_SAMPLE_MASK 0x1f | ||
| 101 | #define EVENT_CACHE_SEL_SHIFT 20 /* L2/L3 cache select */ | ||
| 102 | #define EVENT_CACHE_SEL_MASK 0xf | ||
| 103 | #define EVENT_IS_L1 (4 << EVENT_CACHE_SEL_SHIFT) | ||
| 104 | #define EVENT_PMC_SHIFT 16 /* PMC number (1-based) */ | ||
| 105 | #define EVENT_PMC_MASK 0xf | ||
| 106 | #define EVENT_UNIT_SHIFT 12 /* Unit */ | ||
| 107 | #define EVENT_UNIT_MASK 0xf | ||
| 108 | #define EVENT_COMBINE_SHIFT 11 /* Combine bit */ | ||
| 109 | #define EVENT_COMBINE_MASK 0x1 | ||
| 110 | #define EVENT_MARKED_SHIFT 8 /* Marked bit */ | ||
| 111 | #define EVENT_MARKED_MASK 0x1 | ||
| 112 | #define EVENT_IS_MARKED (EVENT_MARKED_MASK << EVENT_MARKED_SHIFT) | ||
| 113 | #define EVENT_PSEL_MASK 0xff /* PMCxSEL value */ | ||
| 114 | |||
| 115 | /* Bits defined by Linux */ | ||
| 116 | #define EVENT_LINUX_MASK \ | ||
| 117 | ((EVENT_EBB_MASK << EVENT_EBB_SHIFT) | \ | ||
| 118 | (EVENT_BHRB_MASK << EVENT_BHRB_SHIFT) | \ | ||
| 119 | (EVENT_IFM_MASK << EVENT_IFM_SHIFT)) | ||
| 120 | |||
| 121 | #define EVENT_VALID_MASK \ | ||
| 122 | ((EVENT_THRESH_MASK << EVENT_THRESH_SHIFT) | \ | ||
| 123 | (EVENT_SAMPLE_MASK << EVENT_SAMPLE_SHIFT) | \ | ||
| 124 | (EVENT_CACHE_SEL_MASK << EVENT_CACHE_SEL_SHIFT) | \ | ||
| 125 | (EVENT_PMC_MASK << EVENT_PMC_SHIFT) | \ | ||
| 126 | (EVENT_UNIT_MASK << EVENT_UNIT_SHIFT) | \ | ||
| 127 | (EVENT_COMBINE_MASK << EVENT_COMBINE_SHIFT) | \ | ||
| 128 | (EVENT_MARKED_MASK << EVENT_MARKED_SHIFT) | \ | ||
| 129 | EVENT_LINUX_MASK | \ | ||
| 130 | EVENT_PSEL_MASK) | ||
| 131 | |||
| 132 | #define ONLY_PLM \ | ||
| 133 | (PERF_SAMPLE_BRANCH_USER |\ | ||
| 134 | PERF_SAMPLE_BRANCH_KERNEL |\ | ||
| 135 | PERF_SAMPLE_BRANCH_HV) | ||
| 136 | |||
| 137 | /* | ||
| 138 | * Layout of constraint bits: | ||
| 139 | * | ||
| 140 | * 60 56 52 48 44 40 36 32 | ||
| 141 | * | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | | ||
| 142 | * [ fab_match ] [ thresh_cmp ] [ thresh_ctl ] [ ] | ||
| 143 | * | | ||
| 144 | * thresh_sel -* | ||
| 145 | * | ||
| 146 | * 28 24 20 16 12 8 4 0 | ||
| 147 | * | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | | ||
| 148 | * [ ] | [ ] [ sample ] [ ] [6] [5] [4] [3] [2] [1] | ||
| 149 | * | | | | | ||
| 150 | * BHRB IFM -* | | | Count of events for each PMC. | ||
| 151 | * EBB -* | | p1, p2, p3, p4, p5, p6. | ||
| 152 | * L1 I/D qualifier -* | | ||
| 153 | * nc - number of counters -* | ||
| 154 | * | ||
| 155 | * The PMC fields P1..P6, and NC, are adder fields. As we accumulate constraints | ||
| 156 | * we want the low bit of each field to be added to any existing value. | ||
| 157 | * | ||
| 158 | * Everything else is a value field. | ||
| 159 | */ | ||
| 160 | |||
| 161 | #define CNST_FAB_MATCH_VAL(v) (((v) & EVENT_THR_CTL_MASK) << 56) | ||
| 162 | #define CNST_FAB_MATCH_MASK CNST_FAB_MATCH_VAL(EVENT_THR_CTL_MASK) | ||
| 163 | |||
| 164 | /* We just throw all the threshold bits into the constraint */ | ||
| 165 | #define CNST_THRESH_VAL(v) (((v) & EVENT_THRESH_MASK) << 32) | ||
| 166 | #define CNST_THRESH_MASK CNST_THRESH_VAL(EVENT_THRESH_MASK) | ||
| 167 | |||
| 168 | #define CNST_EBB_VAL(v) (((v) & EVENT_EBB_MASK) << 24) | ||
| 169 | #define CNST_EBB_MASK CNST_EBB_VAL(EVENT_EBB_MASK) | ||
| 170 | |||
| 171 | #define CNST_IFM_VAL(v) (((v) & EVENT_IFM_MASK) << 25) | ||
| 172 | #define CNST_IFM_MASK CNST_IFM_VAL(EVENT_IFM_MASK) | ||
| 173 | |||
| 174 | #define CNST_L1_QUAL_VAL(v) (((v) & 3) << 22) | ||
| 175 | #define CNST_L1_QUAL_MASK CNST_L1_QUAL_VAL(3) | ||
| 176 | |||
| 177 | #define CNST_SAMPLE_VAL(v) (((v) & EVENT_SAMPLE_MASK) << 16) | ||
| 178 | #define CNST_SAMPLE_MASK CNST_SAMPLE_VAL(EVENT_SAMPLE_MASK) | ||
| 179 | |||
| 180 | /* | ||
| 181 | * For NC we are counting up to 4 events. This requires three bits, and we need | ||
| 182 | * the fifth event to overflow and set the 4th bit. To achieve that we bias the | ||
| 183 | * fields by 3 in test_adder. | ||
| 184 | */ | ||
| 185 | #define CNST_NC_SHIFT 12 | ||
| 186 | #define CNST_NC_VAL (1 << CNST_NC_SHIFT) | ||
| 187 | #define CNST_NC_MASK (8 << CNST_NC_SHIFT) | ||
| 188 | #define ISA207_TEST_ADDER (3 << CNST_NC_SHIFT) | ||
| 189 | |||
| 190 | /* | ||
| 191 | * For the per-PMC fields we have two bits. The low bit is added, so if two | ||
| 192 | * events ask for the same PMC the sum will overflow, setting the high bit, | ||
| 193 | * indicating an error. So our mask sets the high bit. | ||
| 194 | */ | ||
| 195 | #define CNST_PMC_SHIFT(pmc) ((pmc - 1) * 2) | ||
| 196 | #define CNST_PMC_VAL(pmc) (1 << CNST_PMC_SHIFT(pmc)) | ||
| 197 | #define CNST_PMC_MASK(pmc) (2 << CNST_PMC_SHIFT(pmc)) | ||
| 198 | |||
| 199 | /* Our add_fields is defined as: */ | ||
| 200 | #define ISA207_ADD_FIELDS \ | ||
| 201 | CNST_PMC_VAL(1) | CNST_PMC_VAL(2) | CNST_PMC_VAL(3) | \ | ||
| 202 | CNST_PMC_VAL(4) | CNST_PMC_VAL(5) | CNST_PMC_VAL(6) | CNST_NC_VAL | ||
| 203 | |||
| 204 | |||
| 205 | /* Bits in MMCR1 for PowerISA v2.07 */ | ||
| 206 | #define MMCR1_UNIT_SHIFT(pmc) (60 - (4 * ((pmc) - 1))) | ||
| 207 | #define MMCR1_COMBINE_SHIFT(pmc) (35 - ((pmc) - 1)) | ||
| 208 | #define MMCR1_PMCSEL_SHIFT(pmc) (24 - (((pmc) - 1)) * 8) | ||
| 209 | #define MMCR1_FAB_SHIFT 36 | ||
| 210 | #define MMCR1_DC_QUAL_SHIFT 47 | ||
| 211 | #define MMCR1_IC_QUAL_SHIFT 46 | ||
| 212 | |||
| 213 | /* Bits in MMCRA for PowerISA v2.07 */ | ||
| 214 | #define MMCRA_SAMP_MODE_SHIFT 1 | ||
| 215 | #define MMCRA_SAMP_ELIG_SHIFT 4 | ||
| 216 | #define MMCRA_THR_CTL_SHIFT 8 | ||
| 217 | #define MMCRA_THR_SEL_SHIFT 16 | ||
| 218 | #define MMCRA_THR_CMP_SHIFT 32 | ||
| 219 | #define MMCRA_SDAR_MODE_TLB (1ull << 42) | ||
| 220 | #define MMCRA_IFM_SHIFT 30 | ||
| 221 | |||
| 222 | /* Bits in MMCR2 for PowerISA v2.07 */ | ||
| 223 | #define MMCR2_FCS(pmc) (1ull << (63 - (((pmc) - 1) * 9))) | ||
| 224 | #define MMCR2_FCP(pmc) (1ull << (62 - (((pmc) - 1) * 9))) | ||
| 225 | #define MMCR2_FCH(pmc) (1ull << (57 - (((pmc) - 1) * 9))) | ||
| 226 | |||
| 227 | #define MAX_ALT 2 | ||
| 228 | #define MAX_PMU_COUNTERS 6 | ||
| 229 | |||
| 230 | int isa207_get_constraint(u64 event, unsigned long *maskp, unsigned long *valp); | ||
| 231 | int isa207_compute_mmcr(u64 event[], int n_ev, | ||
| 232 | unsigned int hwc[], unsigned long mmcr[], | ||
| 233 | struct perf_event *pevents[]); | ||
| 234 | void isa207_disable_pmc(unsigned int pmc, unsigned long mmcr[]); | ||
| 235 | |||
| 236 | #endif | ||
diff --git a/arch/powerpc/perf/power8-pmu.c b/arch/powerpc/perf/power8-pmu.c index 7cf3b4378192..5fde2b192fec 100644 --- a/arch/powerpc/perf/power8-pmu.c +++ b/arch/powerpc/perf/power8-pmu.c | |||
| @@ -12,10 +12,7 @@ | |||
| 12 | 12 | ||
| 13 | #define pr_fmt(fmt) "power8-pmu: " fmt | 13 | #define pr_fmt(fmt) "power8-pmu: " fmt |
| 14 | 14 | ||
| 15 | #include <linux/kernel.h> | 15 | #include "isa207-common.h" |
| 16 | #include <linux/perf_event.h> | ||
| 17 | #include <asm/firmware.h> | ||
| 18 | #include <asm/cputable.h> | ||
| 19 | 16 | ||
| 20 | /* | 17 | /* |
| 21 | * Some power8 event codes. | 18 | * Some power8 event codes. |
| @@ -28,465 +25,11 @@ enum { | |||
| 28 | 25 | ||
| 29 | #undef EVENT | 26 | #undef EVENT |
| 30 | 27 | ||
| 31 | /* | ||
| 32 | * Raw event encoding for POWER8: | ||
| 33 | * | ||
| 34 | * 60 56 52 48 44 40 36 32 | ||
| 35 | * | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | | ||
| 36 | * | | [ ] [ thresh_cmp ] [ thresh_ctl ] | ||
| 37 | * | | | | | ||
| 38 | * | | *- IFM (Linux) thresh start/stop OR FAB match -* | ||
| 39 | * | *- BHRB (Linux) | ||
| 40 | * *- EBB (Linux) | ||
| 41 | * | ||
| 42 | * 28 24 20 16 12 8 4 0 | ||
| 43 | * | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | | ||
| 44 | * [ ] [ sample ] [cache] [ pmc ] [unit ] c m [ pmcxsel ] | ||
| 45 | * | | | | | | ||
| 46 | * | | | | *- mark | ||
| 47 | * | | *- L1/L2/L3 cache_sel | | ||
| 48 | * | | | | ||
| 49 | * | *- sampling mode for marked events *- combine | ||
| 50 | * | | ||
| 51 | * *- thresh_sel | ||
| 52 | * | ||
| 53 | * Below uses IBM bit numbering. | ||
| 54 | * | ||
| 55 | * MMCR1[x:y] = unit (PMCxUNIT) | ||
| 56 | * MMCR1[x] = combine (PMCxCOMB) | ||
| 57 | * | ||
| 58 | * if pmc == 3 and unit == 0 and pmcxsel[0:6] == 0b0101011 | ||
| 59 | * # PM_MRK_FAB_RSP_MATCH | ||
| 60 | * MMCR1[20:27] = thresh_ctl (FAB_CRESP_MATCH / FAB_TYPE_MATCH) | ||
| 61 | * else if pmc == 4 and unit == 0xf and pmcxsel[0:6] == 0b0101001 | ||
| 62 | * # PM_MRK_FAB_RSP_MATCH_CYC | ||
| 63 | * MMCR1[20:27] = thresh_ctl (FAB_CRESP_MATCH / FAB_TYPE_MATCH) | ||
| 64 | * else | ||
| 65 | * MMCRA[48:55] = thresh_ctl (THRESH START/END) | ||
| 66 | * | ||
| 67 | * if thresh_sel: | ||
| 68 | * MMCRA[45:47] = thresh_sel | ||
| 69 | * | ||
| 70 | * if thresh_cmp: | ||
| 71 | * MMCRA[22:24] = thresh_cmp[0:2] | ||
| 72 | * MMCRA[25:31] = thresh_cmp[3:9] | ||
| 73 | * | ||
| 74 | * if unit == 6 or unit == 7 | ||
| 75 | * MMCRC[53:55] = cache_sel[1:3] (L2EVENT_SEL) | ||
| 76 | * else if unit == 8 or unit == 9: | ||
| 77 | * if cache_sel[0] == 0: # L3 bank | ||
| 78 | * MMCRC[47:49] = cache_sel[1:3] (L3EVENT_SEL0) | ||
| 79 | * else if cache_sel[0] == 1: | ||
| 80 | * MMCRC[50:51] = cache_sel[2:3] (L3EVENT_SEL1) | ||
| 81 | * else if cache_sel[1]: # L1 event | ||
| 82 | * MMCR1[16] = cache_sel[2] | ||
| 83 | Â * MMCR1[17] = cache_sel[3] | ||
| 84 | * | ||
| 85 | * if mark: | ||
| 86 | * MMCRA[63] = 1 (SAMPLE_ENABLE) | ||
| 87 | * MMCRA[57:59] = sample[0:2] (RAND_SAMP_ELIG) | ||
| 88 | Â * MMCRA[61:62] = sample[3:4] (RAND_SAMP_MODE) | ||
| 89 | * | ||
| 90 | * if EBB and BHRB: | ||
| 91 | * MMCRA[32:33] = IFM | ||
| 92 | * | ||
| 93 | */ | ||
| 94 | |||
| 95 | #define EVENT_EBB_MASK 1ull | ||
| 96 | #define EVENT_EBB_SHIFT PERF_EVENT_CONFIG_EBB_SHIFT | ||
| 97 | #define EVENT_BHRB_MASK 1ull | ||
| 98 | #define EVENT_BHRB_SHIFT 62 | ||
| 99 | #define EVENT_WANTS_BHRB (EVENT_BHRB_MASK << EVENT_BHRB_SHIFT) | ||
| 100 | #define EVENT_IFM_MASK 3ull | ||
| 101 | #define EVENT_IFM_SHIFT 60 | ||
| 102 | #define EVENT_THR_CMP_SHIFT 40 /* Threshold CMP value */ | ||
| 103 | #define EVENT_THR_CMP_MASK 0x3ff | ||
| 104 | #define EVENT_THR_CTL_SHIFT 32 /* Threshold control value (start/stop) */ | ||
| 105 | #define EVENT_THR_CTL_MASK 0xffull | ||
| 106 | #define EVENT_THR_SEL_SHIFT 29 /* Threshold select value */ | ||
| 107 | #define EVENT_THR_SEL_MASK 0x7 | ||
| 108 | #define EVENT_THRESH_SHIFT 29 /* All threshold bits */ | ||
| 109 | #define EVENT_THRESH_MASK 0x1fffffull | ||
| 110 | #define EVENT_SAMPLE_SHIFT 24 /* Sampling mode & eligibility */ | ||
| 111 | #define EVENT_SAMPLE_MASK 0x1f | ||
| 112 | #define EVENT_CACHE_SEL_SHIFT 20 /* L2/L3 cache select */ | ||
| 113 | #define EVENT_CACHE_SEL_MASK 0xf | ||
| 114 | #define EVENT_IS_L1 (4 << EVENT_CACHE_SEL_SHIFT) | ||
| 115 | #define EVENT_PMC_SHIFT 16 /* PMC number (1-based) */ | ||
| 116 | #define EVENT_PMC_MASK 0xf | ||
| 117 | #define EVENT_UNIT_SHIFT 12 /* Unit */ | ||
| 118 | #define EVENT_UNIT_MASK 0xf | ||
| 119 | #define EVENT_COMBINE_SHIFT 11 /* Combine bit */ | ||
| 120 | #define EVENT_COMBINE_MASK 0x1 | ||
| 121 | #define EVENT_MARKED_SHIFT 8 /* Marked bit */ | ||
| 122 | #define EVENT_MARKED_MASK 0x1 | ||
| 123 | #define EVENT_IS_MARKED (EVENT_MARKED_MASK << EVENT_MARKED_SHIFT) | ||
| 124 | #define EVENT_PSEL_MASK 0xff /* PMCxSEL value */ | ||
| 125 | |||
| 126 | /* Bits defined by Linux */ | ||
| 127 | #define EVENT_LINUX_MASK \ | ||
| 128 | ((EVENT_EBB_MASK << EVENT_EBB_SHIFT) | \ | ||
| 129 | (EVENT_BHRB_MASK << EVENT_BHRB_SHIFT) | \ | ||
| 130 | (EVENT_IFM_MASK << EVENT_IFM_SHIFT)) | ||
| 131 | |||
| 132 | #define EVENT_VALID_MASK \ | ||
| 133 | ((EVENT_THRESH_MASK << EVENT_THRESH_SHIFT) | \ | ||
| 134 | (EVENT_SAMPLE_MASK << EVENT_SAMPLE_SHIFT) | \ | ||
| 135 | (EVENT_CACHE_SEL_MASK << EVENT_CACHE_SEL_SHIFT) | \ | ||
| 136 | (EVENT_PMC_MASK << EVENT_PMC_SHIFT) | \ | ||
| 137 | (EVENT_UNIT_MASK << EVENT_UNIT_SHIFT) | \ | ||
| 138 | (EVENT_COMBINE_MASK << EVENT_COMBINE_SHIFT) | \ | ||
| 139 | (EVENT_MARKED_MASK << EVENT_MARKED_SHIFT) | \ | ||
| 140 | EVENT_LINUX_MASK | \ | ||
| 141 | EVENT_PSEL_MASK) | ||
| 142 | |||
| 143 | /* MMCRA IFM bits - POWER8 */ | 28 | /* MMCRA IFM bits - POWER8 */ |
| 144 | #define POWER8_MMCRA_IFM1 0x0000000040000000UL | 29 | #define POWER8_MMCRA_IFM1 0x0000000040000000UL |
| 145 | #define POWER8_MMCRA_IFM2 0x0000000080000000UL | 30 | #define POWER8_MMCRA_IFM2 0x0000000080000000UL |
| 146 | #define POWER8_MMCRA_IFM3 0x00000000C0000000UL | 31 | #define POWER8_MMCRA_IFM3 0x00000000C0000000UL |
| 147 | 32 | ||
| 148 | #define ONLY_PLM \ | ||
| 149 | (PERF_SAMPLE_BRANCH_USER |\ | ||
| 150 | PERF_SAMPLE_BRANCH_KERNEL |\ | ||
| 151 | PERF_SAMPLE_BRANCH_HV) | ||
| 152 | |||
| 153 | /* | ||
| 154 | * Layout of constraint bits: | ||
| 155 | * | ||
| 156 | * 60 56 52 48 44 40 36 32 | ||
| 157 | * | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | | ||
| 158 | * [ fab_match ] [ thresh_cmp ] [ thresh_ctl ] [ ] | ||
| 159 | * | | ||
| 160 | * thresh_sel -* | ||
| 161 | * | ||
| 162 | * 28 24 20 16 12 8 4 0 | ||
| 163 | * | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | | ||
| 164 | * [ ] | [ ] [ sample ] [ ] [6] [5] [4] [3] [2] [1] | ||
| 165 | * | | | | | ||
| 166 | * BHRB IFM -* | | | Count of events for each PMC. | ||
| 167 | * EBB -* | | p1, p2, p3, p4, p5, p6. | ||
| 168 | * L1 I/D qualifier -* | | ||
| 169 | * nc - number of counters -* | ||
| 170 | * | ||
| 171 | * The PMC fields P1..P6, and NC, are adder fields. As we accumulate constraints | ||
| 172 | * we want the low bit of each field to be added to any existing value. | ||
| 173 | * | ||
| 174 | * Everything else is a value field. | ||
| 175 | */ | ||
| 176 | |||
| 177 | #define CNST_FAB_MATCH_VAL(v) (((v) & EVENT_THR_CTL_MASK) << 56) | ||
| 178 | #define CNST_FAB_MATCH_MASK CNST_FAB_MATCH_VAL(EVENT_THR_CTL_MASK) | ||
| 179 | |||
| 180 | /* We just throw all the threshold bits into the constraint */ | ||
| 181 | #define CNST_THRESH_VAL(v) (((v) & EVENT_THRESH_MASK) << 32) | ||
| 182 | #define CNST_THRESH_MASK CNST_THRESH_VAL(EVENT_THRESH_MASK) | ||
| 183 | |||
| 184 | #define CNST_EBB_VAL(v) (((v) & EVENT_EBB_MASK) << 24) | ||
| 185 | #define CNST_EBB_MASK CNST_EBB_VAL(EVENT_EBB_MASK) | ||
| 186 | |||
| 187 | #define CNST_IFM_VAL(v) (((v) & EVENT_IFM_MASK) << 25) | ||
| 188 | #define CNST_IFM_MASK CNST_IFM_VAL(EVENT_IFM_MASK) | ||
| 189 | |||
| 190 | #define CNST_L1_QUAL_VAL(v) (((v) & 3) << 22) | ||
| 191 | #define CNST_L1_QUAL_MASK CNST_L1_QUAL_VAL(3) | ||
| 192 | |||
| 193 | #define CNST_SAMPLE_VAL(v) (((v) & EVENT_SAMPLE_MASK) << 16) | ||
| 194 | #define CNST_SAMPLE_MASK CNST_SAMPLE_VAL(EVENT_SAMPLE_MASK) | ||
| 195 | |||
| 196 | /* | ||
| 197 | * For NC we are counting up to 4 events. This requires three bits, and we need | ||
| 198 | * the fifth event to overflow and set the 4th bit. To achieve that we bias the | ||
| 199 | * fields by 3 in test_adder. | ||
| 200 | */ | ||
| 201 | #define CNST_NC_SHIFT 12 | ||
| 202 | #define CNST_NC_VAL (1 << CNST_NC_SHIFT) | ||
| 203 | #define CNST_NC_MASK (8 << CNST_NC_SHIFT) | ||
| 204 | #define POWER8_TEST_ADDER (3 << CNST_NC_SHIFT) | ||
| 205 | |||
| 206 | /* | ||
| 207 | * For the per-PMC fields we have two bits. The low bit is added, so if two | ||
| 208 | * events ask for the same PMC the sum will overflow, setting the high bit, | ||
| 209 | * indicating an error. So our mask sets the high bit. | ||
| 210 | */ | ||
| 211 | #define CNST_PMC_SHIFT(pmc) ((pmc - 1) * 2) | ||
| 212 | #define CNST_PMC_VAL(pmc) (1 << CNST_PMC_SHIFT(pmc)) | ||
| 213 | #define CNST_PMC_MASK(pmc) (2 << CNST_PMC_SHIFT(pmc)) | ||
| 214 | |||
| 215 | /* Our add_fields is defined as: */ | ||
| 216 | #define POWER8_ADD_FIELDS \ | ||
| 217 | CNST_PMC_VAL(1) | CNST_PMC_VAL(2) | CNST_PMC_VAL(3) | \ | ||
| 218 | CNST_PMC_VAL(4) | CNST_PMC_VAL(5) | CNST_PMC_VAL(6) | CNST_NC_VAL | ||
| 219 | |||
| 220 | |||
| 221 | /* Bits in MMCR1 for POWER8 */ | ||
| 222 | #define MMCR1_UNIT_SHIFT(pmc) (60 - (4 * ((pmc) - 1))) | ||
| 223 | #define MMCR1_COMBINE_SHIFT(pmc) (35 - ((pmc) - 1)) | ||
| 224 | #define MMCR1_PMCSEL_SHIFT(pmc) (24 - (((pmc) - 1)) * 8) | ||
| 225 | #define MMCR1_FAB_SHIFT 36 | ||
| 226 | #define MMCR1_DC_QUAL_SHIFT 47 | ||
| 227 | #define MMCR1_IC_QUAL_SHIFT 46 | ||
| 228 | |||
| 229 | /* Bits in MMCRA for POWER8 */ | ||
| 230 | #define MMCRA_SAMP_MODE_SHIFT 1 | ||
| 231 | #define MMCRA_SAMP_ELIG_SHIFT 4 | ||
| 232 | #define MMCRA_THR_CTL_SHIFT 8 | ||
| 233 | #define MMCRA_THR_SEL_SHIFT 16 | ||
| 234 | #define MMCRA_THR_CMP_SHIFT 32 | ||
| 235 | #define MMCRA_SDAR_MODE_TLB (1ull << 42) | ||
| 236 | #define MMCRA_IFM_SHIFT 30 | ||
| 237 | |||
| 238 | /* Bits in MMCR2 for POWER8 */ | ||
| 239 | #define MMCR2_FCS(pmc) (1ull << (63 - (((pmc) - 1) * 9))) | ||
| 240 | #define MMCR2_FCP(pmc) (1ull << (62 - (((pmc) - 1) * 9))) | ||
| 241 | #define MMCR2_FCH(pmc) (1ull << (57 - (((pmc) - 1) * 9))) | ||
| 242 | |||
| 243 | |||
| 244 | static inline bool event_is_fab_match(u64 event) | ||
| 245 | { | ||
| 246 | /* Only check pmc, unit and pmcxsel, ignore the edge bit (0) */ | ||
| 247 | event &= 0xff0fe; | ||
| 248 | |||
| 249 | /* PM_MRK_FAB_RSP_MATCH & PM_MRK_FAB_RSP_MATCH_CYC */ | ||
| 250 | return (event == 0x30056 || event == 0x4f052); | ||
| 251 | } | ||
| 252 | |||
| 253 | static int power8_get_constraint(u64 event, unsigned long *maskp, unsigned long *valp) | ||
| 254 | { | ||
| 255 | unsigned int unit, pmc, cache, ebb; | ||
| 256 | unsigned long mask, value; | ||
| 257 | |||
| 258 | mask = value = 0; | ||
| 259 | |||
| 260 | if (event & ~EVENT_VALID_MASK) | ||
| 261 | return -1; | ||
| 262 | |||
| 263 | pmc = (event >> EVENT_PMC_SHIFT) & EVENT_PMC_MASK; | ||
| 264 | unit = (event >> EVENT_UNIT_SHIFT) & EVENT_UNIT_MASK; | ||
| 265 | cache = (event >> EVENT_CACHE_SEL_SHIFT) & EVENT_CACHE_SEL_MASK; | ||
| 266 | ebb = (event >> EVENT_EBB_SHIFT) & EVENT_EBB_MASK; | ||
| 267 | |||
| 268 | if (pmc) { | ||
| 269 | u64 base_event; | ||
| 270 | |||
| 271 | if (pmc > 6) | ||
| 272 | return -1; | ||
| 273 | |||
| 274 | /* Ignore Linux defined bits when checking event below */ | ||
| 275 | base_event = event & ~EVENT_LINUX_MASK; | ||
| 276 | |||
| 277 | if (pmc >= 5 && base_event != PM_RUN_INST_CMPL && | ||
| 278 | base_event != PM_RUN_CYC) | ||
| 279 | return -1; | ||
| 280 | |||
| 281 | mask |= CNST_PMC_MASK(pmc); | ||
| 282 | value |= CNST_PMC_VAL(pmc); | ||
| 283 | } | ||
| 284 | |||
| 285 | if (pmc <= 4) { | ||
| 286 | /* | ||
| 287 | * Add to number of counters in use. Note this includes events with | ||
| 288 | * a PMC of 0 - they still need a PMC, it's just assigned later. | ||
| 289 | * Don't count events on PMC 5 & 6, there is only one valid event | ||
| 290 | * on each of those counters, and they are handled above. | ||
| 291 | */ | ||
| 292 | mask |= CNST_NC_MASK; | ||
| 293 | value |= CNST_NC_VAL; | ||
| 294 | } | ||
| 295 | |||
| 296 | if (unit >= 6 && unit <= 9) { | ||
| 297 | /* | ||
| 298 | * L2/L3 events contain a cache selector field, which is | ||
| 299 | * supposed to be programmed into MMCRC. However MMCRC is only | ||
| 300 | * HV writable, and there is no API for guest kernels to modify | ||
| 301 | * it. The solution is for the hypervisor to initialise the | ||
| 302 | * field to zeroes, and for us to only ever allow events that | ||
| 303 | * have a cache selector of zero. The bank selector (bit 3) is | ||
| 304 | * irrelevant, as long as the rest of the value is 0. | ||
| 305 | */ | ||
| 306 | if (cache & 0x7) | ||
| 307 | return -1; | ||
| 308 | |||
| 309 | } else if (event & EVENT_IS_L1) { | ||
| 310 | mask |= CNST_L1_QUAL_MASK; | ||
| 311 | value |= CNST_L1_QUAL_VAL(cache); | ||
| 312 | } | ||
| 313 | |||
| 314 | if (event & EVENT_IS_MARKED) { | ||
| 315 | mask |= CNST_SAMPLE_MASK; | ||
| 316 | value |= CNST_SAMPLE_VAL(event >> EVENT_SAMPLE_SHIFT); | ||
| 317 | } | ||
| 318 | |||
| 319 | /* | ||
| 320 | * Special case for PM_MRK_FAB_RSP_MATCH and PM_MRK_FAB_RSP_MATCH_CYC, | ||
| 321 | * the threshold control bits are used for the match value. | ||
| 322 | */ | ||
| 323 | if (event_is_fab_match(event)) { | ||
| 324 | mask |= CNST_FAB_MATCH_MASK; | ||
| 325 | value |= CNST_FAB_MATCH_VAL(event >> EVENT_THR_CTL_SHIFT); | ||
| 326 | } else { | ||
| 327 | /* | ||
| 328 | * Check the mantissa upper two bits are not zero, unless the | ||
| 329 | * exponent is also zero. See the THRESH_CMP_MANTISSA doc. | ||
| 330 | */ | ||
| 331 | unsigned int cmp, exp; | ||
| 332 | |||
| 333 | cmp = (event >> EVENT_THR_CMP_SHIFT) & EVENT_THR_CMP_MASK; | ||
| 334 | exp = cmp >> 7; | ||
| 335 | |||
| 336 | if (exp && (cmp & 0x60) == 0) | ||
| 337 | return -1; | ||
| 338 | |||
| 339 | mask |= CNST_THRESH_MASK; | ||
| 340 | value |= CNST_THRESH_VAL(event >> EVENT_THRESH_SHIFT); | ||
| 341 | } | ||
| 342 | |||
| 343 | if (!pmc && ebb) | ||
| 344 | /* EBB events must specify the PMC */ | ||
| 345 | return -1; | ||
| 346 | |||
| 347 | if (event & EVENT_WANTS_BHRB) { | ||
| 348 | if (!ebb) | ||
| 349 | /* Only EBB events can request BHRB */ | ||
| 350 | return -1; | ||
| 351 | |||
| 352 | mask |= CNST_IFM_MASK; | ||
| 353 | value |= CNST_IFM_VAL(event >> EVENT_IFM_SHIFT); | ||
| 354 | } | ||
| 355 | |||
| 356 | /* | ||
| 357 | * All events must agree on EBB, either all request it or none. | ||
| 358 | * EBB events are pinned & exclusive, so this should never actually | ||
| 359 | * hit, but we leave it as a fallback in case. | ||
| 360 | */ | ||
| 361 | mask |= CNST_EBB_VAL(ebb); | ||
| 362 | value |= CNST_EBB_MASK; | ||
| 363 | |||
| 364 | *maskp = mask; | ||
| 365 | *valp = value; | ||
| 366 | |||
| 367 | return 0; | ||
| 368 | } | ||
| 369 | |||
| 370 | static int power8_compute_mmcr(u64 event[], int n_ev, | ||
| 371 | unsigned int hwc[], unsigned long mmcr[], | ||
| 372 | struct perf_event *pevents[]) | ||
| 373 | { | ||
| 374 | unsigned long mmcra, mmcr1, mmcr2, unit, combine, psel, cache, val; | ||
| 375 | unsigned int pmc, pmc_inuse; | ||
| 376 | int i; | ||
| 377 | |||
| 378 | pmc_inuse = 0; | ||
| 379 | |||
| 380 | /* First pass to count resource use */ | ||
| 381 | for (i = 0; i < n_ev; ++i) { | ||
| 382 | pmc = (event[i] >> EVENT_PMC_SHIFT) & EVENT_PMC_MASK; | ||
| 383 | if (pmc) | ||
| 384 | pmc_inuse |= 1 << pmc; | ||
| 385 | } | ||
| 386 | |||
| 387 | /* In continuous sampling mode, update SDAR on TLB miss */ | ||
| 388 | mmcra = MMCRA_SDAR_MODE_TLB; | ||
| 389 | mmcr1 = mmcr2 = 0; | ||
| 390 | |||
| 391 | /* Second pass: assign PMCs, set all MMCR1 fields */ | ||
| 392 | for (i = 0; i < n_ev; ++i) { | ||
| 393 | pmc = (event[i] >> EVENT_PMC_SHIFT) & EVENT_PMC_MASK; | ||
| 394 | unit = (event[i] >> EVENT_UNIT_SHIFT) & EVENT_UNIT_MASK; | ||
| 395 | combine = (event[i] >> EVENT_COMBINE_SHIFT) & EVENT_COMBINE_MASK; | ||
| 396 | psel = event[i] & EVENT_PSEL_MASK; | ||
| 397 | |||
| 398 | if (!pmc) { | ||
| 399 | for (pmc = 1; pmc <= 4; ++pmc) { | ||
| 400 | if (!(pmc_inuse & (1 << pmc))) | ||
| 401 | break; | ||
| 402 | } | ||
| 403 | |||
| 404 | pmc_inuse |= 1 << pmc; | ||
| 405 | } | ||
| 406 | |||
| 407 | if (pmc <= 4) { | ||
| 408 | mmcr1 |= unit << MMCR1_UNIT_SHIFT(pmc); | ||
| 409 | mmcr1 |= combine << MMCR1_COMBINE_SHIFT(pmc); | ||
| 410 | mmcr1 |= psel << MMCR1_PMCSEL_SHIFT(pmc); | ||
| 411 | } | ||
| 412 | |||
| 413 | if (event[i] & EVENT_IS_L1) { | ||
| 414 | cache = event[i] >> EVENT_CACHE_SEL_SHIFT; | ||
| 415 | mmcr1 |= (cache & 1) << MMCR1_IC_QUAL_SHIFT; | ||
| 416 | cache >>= 1; | ||
| 417 | mmcr1 |= (cache & 1) << MMCR1_DC_QUAL_SHIFT; | ||
| 418 | } | ||
| 419 | |||
| 420 | if (event[i] & EVENT_IS_MARKED) { | ||
| 421 | mmcra |= MMCRA_SAMPLE_ENABLE; | ||
| 422 | |||
| 423 | val = (event[i] >> EVENT_SAMPLE_SHIFT) & EVENT_SAMPLE_MASK; | ||
| 424 | if (val) { | ||
| 425 | mmcra |= (val & 3) << MMCRA_SAMP_MODE_SHIFT; | ||
| 426 | mmcra |= (val >> 2) << MMCRA_SAMP_ELIG_SHIFT; | ||
| 427 | } | ||
| 428 | } | ||
| 429 | |||
| 430 | /* | ||
| 431 | * PM_MRK_FAB_RSP_MATCH and PM_MRK_FAB_RSP_MATCH_CYC, | ||
| 432 | * the threshold bits are used for the match value. | ||
| 433 | */ | ||
| 434 | if (event_is_fab_match(event[i])) { | ||
| 435 | mmcr1 |= ((event[i] >> EVENT_THR_CTL_SHIFT) & | ||
| 436 | EVENT_THR_CTL_MASK) << MMCR1_FAB_SHIFT; | ||
| 437 | } else { | ||
| 438 | val = (event[i] >> EVENT_THR_CTL_SHIFT) & EVENT_THR_CTL_MASK; | ||
| 439 | mmcra |= val << MMCRA_THR_CTL_SHIFT; | ||
| 440 | val = (event[i] >> EVENT_THR_SEL_SHIFT) & EVENT_THR_SEL_MASK; | ||
| 441 | mmcra |= val << MMCRA_THR_SEL_SHIFT; | ||
| 442 | val = (event[i] >> EVENT_THR_CMP_SHIFT) & EVENT_THR_CMP_MASK; | ||
| 443 | mmcra |= val << MMCRA_THR_CMP_SHIFT; | ||
| 444 | } | ||
| 445 | |||
| 446 | if (event[i] & EVENT_WANTS_BHRB) { | ||
| 447 | val = (event[i] >> EVENT_IFM_SHIFT) & EVENT_IFM_MASK; | ||
| 448 | mmcra |= val << MMCRA_IFM_SHIFT; | ||
| 449 | } | ||
| 450 | |||
| 451 | if (pevents[i]->attr.exclude_user) | ||
| 452 | mmcr2 |= MMCR2_FCP(pmc); | ||
| 453 | |||
| 454 | if (pevents[i]->attr.exclude_hv) | ||
| 455 | mmcr2 |= MMCR2_FCH(pmc); | ||
| 456 | |||
| 457 | if (pevents[i]->attr.exclude_kernel) { | ||
| 458 | if (cpu_has_feature(CPU_FTR_HVMODE)) | ||
| 459 | mmcr2 |= MMCR2_FCH(pmc); | ||
| 460 | else | ||
| 461 | mmcr2 |= MMCR2_FCS(pmc); | ||
| 462 | } | ||
| 463 | |||
| 464 | hwc[i] = pmc - 1; | ||
| 465 | } | ||
| 466 | |||
| 467 | /* Return MMCRx values */ | ||
| 468 | mmcr[0] = 0; | ||
| 469 | |||
| 470 | /* pmc_inuse is 1-based */ | ||
| 471 | if (pmc_inuse & 2) | ||
| 472 | mmcr[0] = MMCR0_PMC1CE; | ||
| 473 | |||
| 474 | if (pmc_inuse & 0x7c) | ||
| 475 | mmcr[0] |= MMCR0_PMCjCE; | ||
| 476 | |||
| 477 | /* If we're not using PMC 5 or 6, freeze them */ | ||
| 478 | if (!(pmc_inuse & 0x60)) | ||
| 479 | mmcr[0] |= MMCR0_FC56; | ||
| 480 | |||
| 481 | mmcr[1] = mmcr1; | ||
| 482 | mmcr[2] = mmcra; | ||
| 483 | mmcr[3] = mmcr2; | ||
| 484 | |||
| 485 | return 0; | ||
| 486 | } | ||
| 487 | |||
| 488 | #define MAX_ALT 2 | ||
| 489 | |||
| 490 | /* Table of alternatives, sorted by column 0 */ | 33 | /* Table of alternatives, sorted by column 0 */ |
| 491 | static const unsigned int event_alternatives[][MAX_ALT] = { | 34 | static const unsigned int event_alternatives[][MAX_ALT] = { |
| 492 | { PM_MRK_ST_CMPL, PM_MRK_ST_CMPL_ALT }, | 35 | { PM_MRK_ST_CMPL, PM_MRK_ST_CMPL_ALT }, |
| @@ -567,12 +110,6 @@ static int power8_get_alternatives(u64 event, unsigned int flags, u64 alt[]) | |||
| 567 | return num_alt; | 110 | return num_alt; |
| 568 | } | 111 | } |
| 569 | 112 | ||
| 570 | static void power8_disable_pmc(unsigned int pmc, unsigned long mmcr[]) | ||
| 571 | { | ||
| 572 | if (pmc <= 3) | ||
| 573 | mmcr[1] &= ~(0xffUL << MMCR1_PMCSEL_SHIFT(pmc + 1)); | ||
| 574 | } | ||
| 575 | |||
| 576 | GENERIC_EVENT_ATTR(cpu-cycles, PM_CYC); | 113 | GENERIC_EVENT_ATTR(cpu-cycles, PM_CYC); |
| 577 | GENERIC_EVENT_ATTR(stalled-cycles-frontend, PM_GCT_NOSLOT_CYC); | 114 | GENERIC_EVENT_ATTR(stalled-cycles-frontend, PM_GCT_NOSLOT_CYC); |
| 578 | GENERIC_EVENT_ATTR(stalled-cycles-backend, PM_CMPLU_STALL); | 115 | GENERIC_EVENT_ATTR(stalled-cycles-backend, PM_CMPLU_STALL); |
| @@ -841,16 +378,16 @@ static int power8_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = { | |||
| 841 | 378 | ||
| 842 | static struct power_pmu power8_pmu = { | 379 | static struct power_pmu power8_pmu = { |
| 843 | .name = "POWER8", | 380 | .name = "POWER8", |
| 844 | .n_counter = 6, | 381 | .n_counter = MAX_PMU_COUNTERS, |
| 845 | .max_alternatives = MAX_ALT + 1, | 382 | .max_alternatives = MAX_ALT + 1, |
| 846 | .add_fields = POWER8_ADD_FIELDS, | 383 | .add_fields = ISA207_ADD_FIELDS, |
| 847 | .test_adder = POWER8_TEST_ADDER, | 384 | .test_adder = ISA207_TEST_ADDER, |
| 848 | .compute_mmcr = power8_compute_mmcr, | 385 | .compute_mmcr = isa207_compute_mmcr, |
| 849 | .config_bhrb = power8_config_bhrb, | 386 | .config_bhrb = power8_config_bhrb, |
| 850 | .bhrb_filter_map = power8_bhrb_filter_map, | 387 | .bhrb_filter_map = power8_bhrb_filter_map, |
| 851 | .get_constraint = power8_get_constraint, | 388 | .get_constraint = isa207_get_constraint, |
| 852 | .get_alternatives = power8_get_alternatives, | 389 | .get_alternatives = power8_get_alternatives, |
| 853 | .disable_pmc = power8_disable_pmc, | 390 | .disable_pmc = isa207_disable_pmc, |
| 854 | .flags = PPMU_HAS_SIER | PPMU_ARCH_207S, | 391 | .flags = PPMU_HAS_SIER | PPMU_ARCH_207S, |
| 855 | .n_generic = ARRAY_SIZE(power8_generic_events), | 392 | .n_generic = ARRAY_SIZE(power8_generic_events), |
| 856 | .generic_events = power8_generic_events, | 393 | .generic_events = power8_generic_events, |
diff --git a/arch/powerpc/perf/power9-events-list.h b/arch/powerpc/perf/power9-events-list.h new file mode 100644 index 000000000000..cda6fcb809ca --- /dev/null +++ b/arch/powerpc/perf/power9-events-list.h | |||
| @@ -0,0 +1,55 @@ | |||
| 1 | /* | ||
| 2 | * Performance counter support for POWER9 processors. | ||
| 3 | * | ||
| 4 | * Copyright 2016 Madhavan Srinivasan, IBM Corporation. | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or | ||
| 7 | * modify it under the terms of the GNU General Public License | ||
| 8 | * as published by the Free Software Foundation; either version | ||
| 9 | * 2 of the License, or (at your option) any later version. | ||
| 10 | */ | ||
| 11 | |||
| 12 | /* | ||
| 13 | * Power9 event codes. | ||
| 14 | */ | ||
| 15 | EVENT(PM_CYC, 0x0001e) | ||
| 16 | EVENT(PM_ICT_NOSLOT_CYC, 0x100f8) | ||
| 17 | EVENT(PM_CMPLU_STALL, 0x1e054) | ||
| 18 | EVENT(PM_INST_CMPL, 0x00002) | ||
| 19 | EVENT(PM_BRU_CMPL, 0x40060) | ||
| 20 | EVENT(PM_BR_MPRED_CMPL, 0x400f6) | ||
| 21 | |||
| 22 | /* All L1 D cache load references counted at finish, gated by reject */ | ||
| 23 | EVENT(PM_LD_REF_L1, 0x100fc) | ||
| 24 | /* Load Missed L1 */ | ||
| 25 | EVENT(PM_LD_MISS_L1_FIN, 0x2c04e) | ||
| 26 | /* Store Missed L1 */ | ||
| 27 | EVENT(PM_ST_MISS_L1, 0x300f0) | ||
| 28 | /* L1 cache data prefetches */ | ||
| 29 | EVENT(PM_L1_PREF, 0x20054) | ||
| 30 | /* Instruction fetches from L1 */ | ||
| 31 | EVENT(PM_INST_FROM_L1, 0x04080) | ||
| 32 | /* Demand iCache Miss */ | ||
| 33 | EVENT(PM_L1_ICACHE_MISS, 0x200fd) | ||
| 34 | /* Instruction Demand sectors wriittent into IL1 */ | ||
| 35 | EVENT(PM_L1_DEMAND_WRITE, 0x0408c) | ||
| 36 | /* Instruction prefetch written into IL1 */ | ||
| 37 | EVENT(PM_IC_PREF_WRITE, 0x0408e) | ||
| 38 | /* The data cache was reloaded from local core's L3 due to a demand load */ | ||
| 39 | EVENT(PM_DATA_FROM_L3, 0x4c042) | ||
| 40 | /* Demand LD - L3 Miss (not L2 hit and not L3 hit) */ | ||
| 41 | EVENT(PM_DATA_FROM_L3MISS, 0x300fe) | ||
| 42 | /* All successful D-side store dispatches for this thread */ | ||
| 43 | EVENT(PM_L2_ST, 0x16081) | ||
| 44 | /* All successful D-side store dispatches for this thread that were L2 Miss */ | ||
| 45 | EVENT(PM_L2_ST_MISS, 0x26081) | ||
| 46 | /* Total HW L3 prefetches(Load+store) */ | ||
| 47 | EVENT(PM_L3_PREF_ALL, 0x4e052) | ||
| 48 | /* Data PTEG reload */ | ||
| 49 | EVENT(PM_DTLB_MISS, 0x300fc) | ||
| 50 | /* ITLB Reloaded */ | ||
| 51 | EVENT(PM_ITLB_MISS, 0x400fc) | ||
| 52 | /* Run_Instructions */ | ||
| 53 | EVENT(PM_RUN_INST_CMPL, 0x500fa) | ||
| 54 | /* Run_cycles */ | ||
| 55 | EVENT(PM_RUN_CYC, 0x600f4) | ||
diff --git a/arch/powerpc/perf/power9-pmu.c b/arch/powerpc/perf/power9-pmu.c new file mode 100644 index 000000000000..788346303852 --- /dev/null +++ b/arch/powerpc/perf/power9-pmu.c | |||
| @@ -0,0 +1,330 @@ | |||
| 1 | /* | ||
| 2 | * Performance counter support for POWER9 processors. | ||
| 3 | * | ||
| 4 | * Copyright 2009 Paul Mackerras, IBM Corporation. | ||
| 5 | * Copyright 2013 Michael Ellerman, IBM Corporation. | ||
| 6 | * Copyright 2016 Madhavan Srinivasan, IBM Corporation. | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or | ||
| 9 | * modify it under the terms of the GNU General Public License | ||
| 10 | * as published by the Free Software Foundation; either version | ||
| 11 | * 2 of the License, or later version. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #define pr_fmt(fmt) "power9-pmu: " fmt | ||
| 15 | |||
| 16 | #include "isa207-common.h" | ||
| 17 | |||
| 18 | /* | ||
| 19 | * Some power9 event codes. | ||
| 20 | */ | ||
| 21 | #define EVENT(_name, _code) _name = _code, | ||
| 22 | |||
| 23 | enum { | ||
| 24 | #include "power9-events-list.h" | ||
| 25 | }; | ||
| 26 | |||
| 27 | #undef EVENT | ||
| 28 | |||
| 29 | /* MMCRA IFM bits - POWER9 */ | ||
| 30 | #define POWER9_MMCRA_IFM1 0x0000000040000000UL | ||
| 31 | #define POWER9_MMCRA_IFM2 0x0000000080000000UL | ||
| 32 | #define POWER9_MMCRA_IFM3 0x00000000C0000000UL | ||
| 33 | |||
| 34 | GENERIC_EVENT_ATTR(cpu-cycles, PM_CYC); | ||
| 35 | GENERIC_EVENT_ATTR(stalled-cycles-frontend, PM_ICT_NOSLOT_CYC); | ||
| 36 | GENERIC_EVENT_ATTR(stalled-cycles-backend, PM_CMPLU_STALL); | ||
| 37 | GENERIC_EVENT_ATTR(instructions, PM_INST_CMPL); | ||
| 38 | GENERIC_EVENT_ATTR(branch-instructions, PM_BRU_CMPL); | ||
| 39 | GENERIC_EVENT_ATTR(branch-misses, PM_BR_MPRED_CMPL); | ||
| 40 | GENERIC_EVENT_ATTR(cache-references, PM_LD_REF_L1); | ||
| 41 | GENERIC_EVENT_ATTR(cache-misses, PM_LD_MISS_L1_FIN); | ||
| 42 | |||
| 43 | CACHE_EVENT_ATTR(L1-dcache-load-misses, PM_LD_MISS_L1_FIN); | ||
| 44 | CACHE_EVENT_ATTR(L1-dcache-loads, PM_LD_REF_L1); | ||
| 45 | CACHE_EVENT_ATTR(L1-dcache-prefetches, PM_L1_PREF); | ||
| 46 | CACHE_EVENT_ATTR(L1-dcache-store-misses, PM_ST_MISS_L1); | ||
| 47 | CACHE_EVENT_ATTR(L1-icache-load-misses, PM_L1_ICACHE_MISS); | ||
| 48 | CACHE_EVENT_ATTR(L1-icache-loads, PM_INST_FROM_L1); | ||
| 49 | CACHE_EVENT_ATTR(L1-icache-prefetches, PM_IC_PREF_WRITE); | ||
| 50 | CACHE_EVENT_ATTR(LLC-load-misses, PM_DATA_FROM_L3MISS); | ||
| 51 | CACHE_EVENT_ATTR(LLC-loads, PM_DATA_FROM_L3); | ||
| 52 | CACHE_EVENT_ATTR(LLC-prefetches, PM_L3_PREF_ALL); | ||
| 53 | CACHE_EVENT_ATTR(LLC-store-misses, PM_L2_ST_MISS); | ||
| 54 | CACHE_EVENT_ATTR(LLC-stores, PM_L2_ST); | ||
| 55 | CACHE_EVENT_ATTR(branch-load-misses, PM_BR_MPRED_CMPL); | ||
| 56 | CACHE_EVENT_ATTR(branch-loads, PM_BRU_CMPL); | ||
| 57 | CACHE_EVENT_ATTR(dTLB-load-misses, PM_DTLB_MISS); | ||
| 58 | CACHE_EVENT_ATTR(iTLB-load-misses, PM_ITLB_MISS); | ||
| 59 | |||
| 60 | static struct attribute *power9_events_attr[] = { | ||
| 61 | GENERIC_EVENT_PTR(PM_CYC), | ||
| 62 | GENERIC_EVENT_PTR(PM_ICT_NOSLOT_CYC), | ||
| 63 | GENERIC_EVENT_PTR(PM_CMPLU_STALL), | ||
| 64 | GENERIC_EVENT_PTR(PM_INST_CMPL), | ||
| 65 | GENERIC_EVENT_PTR(PM_BRU_CMPL), | ||
| 66 | GENERIC_EVENT_PTR(PM_BR_MPRED_CMPL), | ||
| 67 | GENERIC_EVENT_PTR(PM_LD_REF_L1), | ||
| 68 | GENERIC_EVENT_PTR(PM_LD_MISS_L1_FIN), | ||
| 69 | CACHE_EVENT_PTR(PM_LD_MISS_L1_FIN), | ||
| 70 | CACHE_EVENT_PTR(PM_LD_REF_L1), | ||
| 71 | CACHE_EVENT_PTR(PM_L1_PREF), | ||
| 72 | CACHE_EVENT_PTR(PM_ST_MISS_L1), | ||
| 73 | CACHE_EVENT_PTR(PM_L1_ICACHE_MISS), | ||
| 74 | CACHE_EVENT_PTR(PM_INST_FROM_L1), | ||
| 75 | CACHE_EVENT_PTR(PM_IC_PREF_WRITE), | ||
| 76 | CACHE_EVENT_PTR(PM_DATA_FROM_L3MISS), | ||
| 77 | CACHE_EVENT_PTR(PM_DATA_FROM_L3), | ||
| 78 | CACHE_EVENT_PTR(PM_L3_PREF_ALL), | ||
| 79 | CACHE_EVENT_PTR(PM_L2_ST_MISS), | ||
| 80 | CACHE_EVENT_PTR(PM_L2_ST), | ||
| 81 | CACHE_EVENT_PTR(PM_BR_MPRED_CMPL), | ||
| 82 | CACHE_EVENT_PTR(PM_BRU_CMPL), | ||
| 83 | CACHE_EVENT_PTR(PM_DTLB_MISS), | ||
| 84 | CACHE_EVENT_PTR(PM_ITLB_MISS), | ||
| 85 | NULL | ||
| 86 | }; | ||
| 87 | |||
| 88 | static struct attribute_group power9_pmu_events_group = { | ||
| 89 | .name = "events", | ||
| 90 | .attrs = power9_events_attr, | ||
| 91 | }; | ||
| 92 | |||
| 93 | PMU_FORMAT_ATTR(event, "config:0-49"); | ||
| 94 | PMU_FORMAT_ATTR(pmcxsel, "config:0-7"); | ||
| 95 | PMU_FORMAT_ATTR(mark, "config:8"); | ||
| 96 | PMU_FORMAT_ATTR(combine, "config:11"); | ||
| 97 | PMU_FORMAT_ATTR(unit, "config:12-15"); | ||
| 98 | PMU_FORMAT_ATTR(pmc, "config:16-19"); | ||
| 99 | PMU_FORMAT_ATTR(cache_sel, "config:20-23"); | ||
| 100 | PMU_FORMAT_ATTR(sample_mode, "config:24-28"); | ||
| 101 | PMU_FORMAT_ATTR(thresh_sel, "config:29-31"); | ||
| 102 | PMU_FORMAT_ATTR(thresh_stop, "config:32-35"); | ||
| 103 | PMU_FORMAT_ATTR(thresh_start, "config:36-39"); | ||
| 104 | PMU_FORMAT_ATTR(thresh_cmp, "config:40-49"); | ||
| 105 | |||
| 106 | static struct attribute *power9_pmu_format_attr[] = { | ||
| 107 | &format_attr_event.attr, | ||
| 108 | &format_attr_pmcxsel.attr, | ||
| 109 | &format_attr_mark.attr, | ||
| 110 | &format_attr_combine.attr, | ||
| 111 | &format_attr_unit.attr, | ||
| 112 | &format_attr_pmc.attr, | ||
| 113 | &format_attr_cache_sel.attr, | ||
| 114 | &format_attr_sample_mode.attr, | ||
| 115 | &format_attr_thresh_sel.attr, | ||
| 116 | &format_attr_thresh_stop.attr, | ||
| 117 | &format_attr_thresh_start.attr, | ||
| 118 | &format_attr_thresh_cmp.attr, | ||
| 119 | NULL, | ||
| 120 | }; | ||
| 121 | |||
| 122 | struct attribute_group power9_pmu_format_group = { | ||
| 123 | .name = "format", | ||
| 124 | .attrs = power9_pmu_format_attr, | ||
| 125 | }; | ||
| 126 | |||
| 127 | static const struct attribute_group *power9_pmu_attr_groups[] = { | ||
| 128 | &power9_pmu_format_group, | ||
| 129 | &power9_pmu_events_group, | ||
| 130 | NULL, | ||
| 131 | }; | ||
| 132 | |||
| 133 | static int power9_generic_events[] = { | ||
| 134 | [PERF_COUNT_HW_CPU_CYCLES] = PM_CYC, | ||
| 135 | [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = PM_ICT_NOSLOT_CYC, | ||
| 136 | [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = PM_CMPLU_STALL, | ||
| 137 | [PERF_COUNT_HW_INSTRUCTIONS] = PM_INST_CMPL, | ||
| 138 | [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = PM_BRU_CMPL, | ||
| 139 | [PERF_COUNT_HW_BRANCH_MISSES] = PM_BR_MPRED_CMPL, | ||
| 140 | [PERF_COUNT_HW_CACHE_REFERENCES] = PM_LD_REF_L1, | ||
| 141 | [PERF_COUNT_HW_CACHE_MISSES] = PM_LD_MISS_L1_FIN, | ||
| 142 | }; | ||
| 143 | |||
| 144 | static u64 power9_bhrb_filter_map(u64 branch_sample_type) | ||
| 145 | { | ||
| 146 | u64 pmu_bhrb_filter = 0; | ||
| 147 | |||
| 148 | /* BHRB and regular PMU events share the same privilege state | ||
| 149 | * filter configuration. BHRB is always recorded along with a | ||
| 150 | * regular PMU event. As the privilege state filter is handled | ||
| 151 | * in the basic PMC configuration of the accompanying regular | ||
| 152 | * PMU event, we ignore any separate BHRB specific request. | ||
| 153 | */ | ||
| 154 | |||
| 155 | /* No branch filter requested */ | ||
| 156 | if (branch_sample_type & PERF_SAMPLE_BRANCH_ANY) | ||
| 157 | return pmu_bhrb_filter; | ||
| 158 | |||
| 159 | /* Invalid branch filter options - HW does not support */ | ||
| 160 | if (branch_sample_type & PERF_SAMPLE_BRANCH_ANY_RETURN) | ||
| 161 | return -1; | ||
| 162 | |||
| 163 | if (branch_sample_type & PERF_SAMPLE_BRANCH_IND_CALL) | ||
| 164 | return -1; | ||
| 165 | |||
| 166 | if (branch_sample_type & PERF_SAMPLE_BRANCH_CALL) | ||
| 167 | return -1; | ||
| 168 | |||
| 169 | if (branch_sample_type & PERF_SAMPLE_BRANCH_ANY_CALL) { | ||
| 170 | pmu_bhrb_filter |= POWER9_MMCRA_IFM1; | ||
| 171 | return pmu_bhrb_filter; | ||
| 172 | } | ||
| 173 | |||
| 174 | /* Every thing else is unsupported */ | ||
| 175 | return -1; | ||
| 176 | } | ||
| 177 | |||
| 178 | static void power9_config_bhrb(u64 pmu_bhrb_filter) | ||
| 179 | { | ||
| 180 | /* Enable BHRB filter in PMU */ | ||
| 181 | mtspr(SPRN_MMCRA, (mfspr(SPRN_MMCRA) | pmu_bhrb_filter)); | ||
| 182 | } | ||
| 183 | |||
| 184 | #define C(x) PERF_COUNT_HW_CACHE_##x | ||
| 185 | |||
| 186 | /* | ||
| 187 | * Table of generalized cache-related events. | ||
| 188 | * 0 means not supported, -1 means nonsensical, other values | ||
| 189 | * are event codes. | ||
| 190 | */ | ||
| 191 | static int power9_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = { | ||
| 192 | [ C(L1D) ] = { | ||
| 193 | [ C(OP_READ) ] = { | ||
| 194 | [ C(RESULT_ACCESS) ] = PM_LD_REF_L1, | ||
| 195 | [ C(RESULT_MISS) ] = PM_LD_MISS_L1_FIN, | ||
| 196 | }, | ||
| 197 | [ C(OP_WRITE) ] = { | ||
| 198 | [ C(RESULT_ACCESS) ] = 0, | ||
| 199 | [ C(RESULT_MISS) ] = PM_ST_MISS_L1, | ||
| 200 | }, | ||
| 201 | [ C(OP_PREFETCH) ] = { | ||
| 202 | [ C(RESULT_ACCESS) ] = PM_L1_PREF, | ||
| 203 | [ C(RESULT_MISS) ] = 0, | ||
| 204 | }, | ||
| 205 | }, | ||
| 206 | [ C(L1I) ] = { | ||
| 207 | [ C(OP_READ) ] = { | ||
| 208 | [ C(RESULT_ACCESS) ] = PM_INST_FROM_L1, | ||
| 209 | [ C(RESULT_MISS) ] = PM_L1_ICACHE_MISS, | ||
| 210 | }, | ||
| 211 | [ C(OP_WRITE) ] = { | ||
| 212 | [ C(RESULT_ACCESS) ] = PM_L1_DEMAND_WRITE, | ||
| 213 | [ C(RESULT_MISS) ] = -1, | ||
| 214 | }, | ||
| 215 | [ C(OP_PREFETCH) ] = { | ||
| 216 | [ C(RESULT_ACCESS) ] = PM_IC_PREF_WRITE, | ||
| 217 | [ C(RESULT_MISS) ] = 0, | ||
| 218 | }, | ||
| 219 | }, | ||
| 220 | [ C(LL) ] = { | ||
| 221 | [ C(OP_READ) ] = { | ||
| 222 | [ C(RESULT_ACCESS) ] = PM_DATA_FROM_L3, | ||
| 223 | [ C(RESULT_MISS) ] = PM_DATA_FROM_L3MISS, | ||
| 224 | }, | ||
| 225 | [ C(OP_WRITE) ] = { | ||
| 226 | [ C(RESULT_ACCESS) ] = PM_L2_ST, | ||
| 227 | [ C(RESULT_MISS) ] = PM_L2_ST_MISS, | ||
| 228 | }, | ||
| 229 | [ C(OP_PREFETCH) ] = { | ||
| 230 | [ C(RESULT_ACCESS) ] = PM_L3_PREF_ALL, | ||
| 231 | [ C(RESULT_MISS) ] = 0, | ||
| 232 | }, | ||
| 233 | }, | ||
| 234 | [ C(DTLB) ] = { | ||
| 235 | [ C(OP_READ) ] = { | ||
| 236 | [ C(RESULT_ACCESS) ] = 0, | ||
| 237 | [ C(RESULT_MISS) ] = PM_DTLB_MISS, | ||
| 238 | }, | ||
| 239 | [ C(OP_WRITE) ] = { | ||
| 240 | [ C(RESULT_ACCESS) ] = -1, | ||
| 241 | [ C(RESULT_MISS) ] = -1, | ||
| 242 | }, | ||
| 243 | [ C(OP_PREFETCH) ] = { | ||
| 244 | [ C(RESULT_ACCESS) ] = -1, | ||
| 245 | [ C(RESULT_MISS) ] = -1, | ||
| 246 | }, | ||
| 247 | }, | ||
| 248 | [ C(ITLB) ] = { | ||
| 249 | [ C(OP_READ) ] = { | ||
| 250 | [ C(RESULT_ACCESS) ] = 0, | ||
| 251 | [ C(RESULT_MISS) ] = PM_ITLB_MISS, | ||
| 252 | }, | ||
| 253 | [ C(OP_WRITE) ] = { | ||
| 254 | [ C(RESULT_ACCESS) ] = -1, | ||
| 255 | [ C(RESULT_MISS) ] = -1, | ||
| 256 | }, | ||
| 257 | [ C(OP_PREFETCH) ] = { | ||
| 258 | [ C(RESULT_ACCESS) ] = -1, | ||
| 259 | [ C(RESULT_MISS) ] = -1, | ||
| 260 | }, | ||
| 261 | }, | ||
| 262 | [ C(BPU) ] = { | ||
| 263 | [ C(OP_READ) ] = { | ||
| 264 | [ C(RESULT_ACCESS) ] = PM_BRU_CMPL, | ||
| 265 | [ C(RESULT_MISS) ] = PM_BR_MPRED_CMPL, | ||
| 266 | }, | ||
| 267 | [ C(OP_WRITE) ] = { | ||
| 268 | [ C(RESULT_ACCESS) ] = -1, | ||
| 269 | [ C(RESULT_MISS) ] = -1, | ||
| 270 | }, | ||
| 271 | [ C(OP_PREFETCH) ] = { | ||
| 272 | [ C(RESULT_ACCESS) ] = -1, | ||
| 273 | [ C(RESULT_MISS) ] = -1, | ||
| 274 | }, | ||
| 275 | }, | ||
| 276 | [ C(NODE) ] = { | ||
| 277 | [ C(OP_READ) ] = { | ||
| 278 | [ C(RESULT_ACCESS) ] = -1, | ||
| 279 | [ C(RESULT_MISS) ] = -1, | ||
| 280 | }, | ||
| 281 | [ C(OP_WRITE) ] = { | ||
| 282 | [ C(RESULT_ACCESS) ] = -1, | ||
| 283 | [ C(RESULT_MISS) ] = -1, | ||
| 284 | }, | ||
| 285 | [ C(OP_PREFETCH) ] = { | ||
| 286 | [ C(RESULT_ACCESS) ] = -1, | ||
| 287 | [ C(RESULT_MISS) ] = -1, | ||
| 288 | }, | ||
| 289 | }, | ||
| 290 | }; | ||
| 291 | |||
| 292 | #undef C | ||
| 293 | |||
| 294 | static struct power_pmu power9_pmu = { | ||
| 295 | .name = "POWER9", | ||
| 296 | .n_counter = MAX_PMU_COUNTERS, | ||
| 297 | .add_fields = ISA207_ADD_FIELDS, | ||
| 298 | .test_adder = ISA207_TEST_ADDER, | ||
| 299 | .compute_mmcr = isa207_compute_mmcr, | ||
| 300 | .config_bhrb = power9_config_bhrb, | ||
| 301 | .bhrb_filter_map = power9_bhrb_filter_map, | ||
| 302 | .get_constraint = isa207_get_constraint, | ||
| 303 | .disable_pmc = isa207_disable_pmc, | ||
| 304 | .flags = PPMU_HAS_SIER | PPMU_ARCH_207S, | ||
| 305 | .n_generic = ARRAY_SIZE(power9_generic_events), | ||
| 306 | .generic_events = power9_generic_events, | ||
| 307 | .cache_events = &power9_cache_events, | ||
| 308 | .attr_groups = power9_pmu_attr_groups, | ||
| 309 | .bhrb_nr = 32, | ||
| 310 | }; | ||
| 311 | |||
| 312 | static int __init init_power9_pmu(void) | ||
| 313 | { | ||
| 314 | int rc; | ||
| 315 | |||
| 316 | /* Comes from cpu_specs[] */ | ||
| 317 | if (!cur_cpu_spec->oprofile_cpu_type || | ||
| 318 | strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/power9")) | ||
| 319 | return -ENODEV; | ||
| 320 | |||
| 321 | rc = register_power_pmu(&power9_pmu); | ||
| 322 | if (rc) | ||
| 323 | return rc; | ||
| 324 | |||
| 325 | /* Tell userspace that EBB is supported */ | ||
| 326 | cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_EBB; | ||
| 327 | |||
| 328 | return 0; | ||
| 329 | } | ||
| 330 | early_initcall(init_power9_pmu); | ||
diff --git a/arch/powerpc/platforms/40x/ep405.c b/arch/powerpc/platforms/40x/ep405.c index ddc12a1926ef..1c8aec6e9bb7 100644 --- a/arch/powerpc/platforms/40x/ep405.c +++ b/arch/powerpc/platforms/40x/ep405.c | |||
| @@ -105,9 +105,7 @@ static void __init ep405_setup_arch(void) | |||
| 105 | 105 | ||
| 106 | static int __init ep405_probe(void) | 106 | static int __init ep405_probe(void) |
| 107 | { | 107 | { |
| 108 | unsigned long root = of_get_flat_dt_root(); | 108 | if (!of_machine_is_compatible("ep405")) |
| 109 | |||
| 110 | if (!of_flat_dt_is_compatible(root, "ep405")) | ||
| 111 | return 0; | 109 | return 0; |
| 112 | 110 | ||
| 113 | return 1; | 111 | return 1; |
diff --git a/arch/powerpc/platforms/40x/ppc40x_simple.c b/arch/powerpc/platforms/40x/ppc40x_simple.c index b0c46375dd95..2a050007bbae 100644 --- a/arch/powerpc/platforms/40x/ppc40x_simple.c +++ b/arch/powerpc/platforms/40x/ppc40x_simple.c | |||
| @@ -63,7 +63,7 @@ static const char * const board[] __initconst = { | |||
| 63 | 63 | ||
| 64 | static int __init ppc40x_probe(void) | 64 | static int __init ppc40x_probe(void) |
| 65 | { | 65 | { |
| 66 | if (of_flat_dt_match(of_get_flat_dt_root(), board)) { | 66 | if (of_device_compatible_match(of_root, board)) { |
| 67 | pci_set_flags(PCI_REASSIGN_ALL_RSRC); | 67 | pci_set_flags(PCI_REASSIGN_ALL_RSRC); |
| 68 | return 1; | 68 | return 1; |
| 69 | } | 69 | } |
diff --git a/arch/powerpc/platforms/40x/virtex.c b/arch/powerpc/platforms/40x/virtex.c index 9aa7ae2f4164..91a08ea758a8 100644 --- a/arch/powerpc/platforms/40x/virtex.c +++ b/arch/powerpc/platforms/40x/virtex.c | |||
| @@ -37,9 +37,7 @@ machine_device_initcall(virtex, virtex_device_probe); | |||
| 37 | 37 | ||
| 38 | static int __init virtex_probe(void) | 38 | static int __init virtex_probe(void) |
| 39 | { | 39 | { |
| 40 | unsigned long root = of_get_flat_dt_root(); | 40 | if (!of_machine_is_compatible("xlnx,virtex")) |
| 41 | |||
| 42 | if (!of_flat_dt_is_compatible(root, "xlnx,virtex")) | ||
| 43 | return 0; | 41 | return 0; |
| 44 | 42 | ||
| 45 | return 1; | 43 | return 1; |
diff --git a/arch/powerpc/platforms/40x/walnut.c b/arch/powerpc/platforms/40x/walnut.c index f7ac2d0fcb44..e5797815e2f1 100644 --- a/arch/powerpc/platforms/40x/walnut.c +++ b/arch/powerpc/platforms/40x/walnut.c | |||
| @@ -46,9 +46,7 @@ machine_device_initcall(walnut, walnut_device_probe); | |||
| 46 | 46 | ||
| 47 | static int __init walnut_probe(void) | 47 | static int __init walnut_probe(void) |
| 48 | { | 48 | { |
| 49 | unsigned long root = of_get_flat_dt_root(); | 49 | if (!of_machine_is_compatible("ibm,walnut")) |
| 50 | |||
| 51 | if (!of_flat_dt_is_compatible(root, "ibm,walnut")) | ||
| 52 | return 0; | 50 | return 0; |
| 53 | 51 | ||
| 54 | pci_set_flags(PCI_REASSIGN_ALL_RSRC); | 52 | pci_set_flags(PCI_REASSIGN_ALL_RSRC); |
diff --git a/arch/powerpc/platforms/44x/canyonlands.c b/arch/powerpc/platforms/44x/canyonlands.c index 22ca5430c9cb..157f4ce46386 100644 --- a/arch/powerpc/platforms/44x/canyonlands.c +++ b/arch/powerpc/platforms/44x/canyonlands.c | |||
| @@ -53,11 +53,10 @@ machine_device_initcall(canyonlands, ppc460ex_device_probe); | |||
| 53 | 53 | ||
| 54 | static int __init ppc460ex_probe(void) | 54 | static int __init ppc460ex_probe(void) |
| 55 | { | 55 | { |
| 56 | unsigned long root = of_get_flat_dt_root(); | 56 | if (of_machine_is_compatible("amcc,canyonlands")) { |
| 57 | if (of_flat_dt_is_compatible(root, "amcc,canyonlands")) { | ||
| 58 | pci_set_flags(PCI_REASSIGN_ALL_RSRC); | 57 | pci_set_flags(PCI_REASSIGN_ALL_RSRC); |
| 59 | return 1; | 58 | return 1; |
| 60 | } | 59 | } |
| 61 | return 0; | 60 | return 0; |
| 62 | } | 61 | } |
| 63 | 62 | ||
diff --git a/arch/powerpc/platforms/44x/ebony.c b/arch/powerpc/platforms/44x/ebony.c index ae893226392d..1070225f5f9b 100644 --- a/arch/powerpc/platforms/44x/ebony.c +++ b/arch/powerpc/platforms/44x/ebony.c | |||
| @@ -49,9 +49,7 @@ machine_device_initcall(ebony, ebony_device_probe); | |||
| 49 | */ | 49 | */ |
| 50 | static int __init ebony_probe(void) | 50 | static int __init ebony_probe(void) |
| 51 | { | 51 | { |
| 52 | unsigned long root = of_get_flat_dt_root(); | 52 | if (!of_machine_is_compatible("ibm,ebony")) |
| 53 | |||
| 54 | if (!of_flat_dt_is_compatible(root, "ibm,ebony")) | ||
| 55 | return 0; | 53 | return 0; |
| 56 | 54 | ||
| 57 | pci_set_flags(PCI_REASSIGN_ALL_RSRC); | 55 | pci_set_flags(PCI_REASSIGN_ALL_RSRC); |
diff --git a/arch/powerpc/platforms/44x/iss4xx.c b/arch/powerpc/platforms/44x/iss4xx.c index c7c6758b3cfe..5f296dd6b1c0 100644 --- a/arch/powerpc/platforms/44x/iss4xx.c +++ b/arch/powerpc/platforms/44x/iss4xx.c | |||
| @@ -149,9 +149,7 @@ static void __init iss4xx_setup_arch(void) | |||
| 149 | */ | 149 | */ |
| 150 | static int __init iss4xx_probe(void) | 150 | static int __init iss4xx_probe(void) |
| 151 | { | 151 | { |
| 152 | unsigned long root = of_get_flat_dt_root(); | 152 | if (!of_machine_is_compatible("ibm,iss-4xx")) |
| 153 | |||
| 154 | if (!of_flat_dt_is_compatible(root, "ibm,iss-4xx")) | ||
| 155 | return 0; | 153 | return 0; |
| 156 | 154 | ||
| 157 | return 1; | 155 | return 1; |
diff --git a/arch/powerpc/platforms/44x/ppc44x_simple.c b/arch/powerpc/platforms/44x/ppc44x_simple.c index 573c3d2689c6..8d6e4da9dfbe 100644 --- a/arch/powerpc/platforms/44x/ppc44x_simple.c +++ b/arch/powerpc/platforms/44x/ppc44x_simple.c | |||
| @@ -67,11 +67,10 @@ static char *board[] __initdata = { | |||
| 67 | 67 | ||
| 68 | static int __init ppc44x_probe(void) | 68 | static int __init ppc44x_probe(void) |
| 69 | { | 69 | { |
| 70 | unsigned long root = of_get_flat_dt_root(); | ||
| 71 | int i = 0; | 70 | int i = 0; |
| 72 | 71 | ||
| 73 | for (i = 0; i < ARRAY_SIZE(board); i++) { | 72 | for (i = 0; i < ARRAY_SIZE(board); i++) { |
| 74 | if (of_flat_dt_is_compatible(root, board[i])) { | 73 | if (of_machine_is_compatible(board[i])) { |
| 75 | pci_set_flags(PCI_REASSIGN_ALL_RSRC); | 74 | pci_set_flags(PCI_REASSIGN_ALL_RSRC); |
| 76 | return 1; | 75 | return 1; |
| 77 | } | 76 | } |
diff --git a/arch/powerpc/platforms/44x/ppc476.c b/arch/powerpc/platforms/44x/ppc476.c index c11ce6516c8f..e55933f9cd55 100644 --- a/arch/powerpc/platforms/44x/ppc476.c +++ b/arch/powerpc/platforms/44x/ppc476.c | |||
| @@ -68,7 +68,7 @@ DECLARE_PCI_FIXUP_HEADER(0x1033, 0x0035, quirk_ppc_currituck_usb_fixup); | |||
| 68 | #define AVR_PWRCTL_RESET (0x02) | 68 | #define AVR_PWRCTL_RESET (0x02) |
| 69 | 69 | ||
| 70 | static struct i2c_client *avr_i2c_client; | 70 | static struct i2c_client *avr_i2c_client; |
| 71 | static void avr_halt_system(int pwrctl_flags) | 71 | static void __noreturn avr_halt_system(int pwrctl_flags) |
| 72 | { | 72 | { |
| 73 | /* Request the AVR to reset the system */ | 73 | /* Request the AVR to reset the system */ |
| 74 | i2c_smbus_write_byte_data(avr_i2c_client, | 74 | i2c_smbus_write_byte_data(avr_i2c_client, |
| @@ -84,7 +84,7 @@ static void avr_power_off_system(void) | |||
| 84 | avr_halt_system(AVR_PWRCTL_PWROFF); | 84 | avr_halt_system(AVR_PWRCTL_PWROFF); |
| 85 | } | 85 | } |
| 86 | 86 | ||
| 87 | static void avr_reset_system(char *cmd) | 87 | static void __noreturn avr_reset_system(char *cmd) |
| 88 | { | 88 | { |
| 89 | avr_halt_system(AVR_PWRCTL_RESET); | 89 | avr_halt_system(AVR_PWRCTL_RESET); |
| 90 | } | 90 | } |
| @@ -275,12 +275,10 @@ static void ppc47x_pci_irq_fixup(struct pci_dev *dev) | |||
| 275 | */ | 275 | */ |
| 276 | static int __init ppc47x_probe(void) | 276 | static int __init ppc47x_probe(void) |
| 277 | { | 277 | { |
| 278 | unsigned long root = of_get_flat_dt_root(); | 278 | if (of_machine_is_compatible("ibm,akebono")) |
| 279 | |||
| 280 | if (of_flat_dt_is_compatible(root, "ibm,akebono")) | ||
| 281 | return 1; | 279 | return 1; |
| 282 | 280 | ||
| 283 | if (of_flat_dt_is_compatible(root, "ibm,currituck")) { | 281 | if (of_machine_is_compatible("ibm,currituck")) { |
| 284 | ppc_md.pci_irq_fixup = ppc47x_pci_irq_fixup; | 282 | ppc_md.pci_irq_fixup = ppc47x_pci_irq_fixup; |
| 285 | return 1; | 283 | return 1; |
| 286 | } | 284 | } |
diff --git a/arch/powerpc/platforms/44x/sam440ep.c b/arch/powerpc/platforms/44x/sam440ep.c index 3ee4a03c1496..688ffeab0699 100644 --- a/arch/powerpc/platforms/44x/sam440ep.c +++ b/arch/powerpc/platforms/44x/sam440ep.c | |||
| @@ -46,9 +46,7 @@ machine_device_initcall(sam440ep, sam440ep_device_probe); | |||
| 46 | 46 | ||
| 47 | static int __init sam440ep_probe(void) | 47 | static int __init sam440ep_probe(void) |
| 48 | { | 48 | { |
| 49 | unsigned long root = of_get_flat_dt_root(); | 49 | if (!of_machine_is_compatible("acube,sam440ep")) |
| 50 | |||
| 51 | if (!of_flat_dt_is_compatible(root, "acube,sam440ep")) | ||
| 52 | return 0; | 50 | return 0; |
| 53 | 51 | ||
| 54 | pci_set_flags(PCI_REASSIGN_ALL_RSRC); | 52 | pci_set_flags(PCI_REASSIGN_ALL_RSRC); |
diff --git a/arch/powerpc/platforms/44x/virtex.c b/arch/powerpc/platforms/44x/virtex.c index ad272c17c640..a7e08026097a 100644 --- a/arch/powerpc/platforms/44x/virtex.c +++ b/arch/powerpc/platforms/44x/virtex.c | |||
| @@ -43,9 +43,7 @@ machine_device_initcall(virtex, virtex_device_probe); | |||
| 43 | 43 | ||
| 44 | static int __init virtex_probe(void) | 44 | static int __init virtex_probe(void) |
| 45 | { | 45 | { |
| 46 | unsigned long root = of_get_flat_dt_root(); | 46 | if (!of_machine_is_compatible("xlnx,virtex440")) |
| 47 | |||
| 48 | if (!of_flat_dt_is_compatible(root, "xlnx,virtex440")) | ||
| 49 | return 0; | 47 | return 0; |
| 50 | 48 | ||
| 51 | return 1; | 49 | return 1; |
diff --git a/arch/powerpc/platforms/44x/warp.c b/arch/powerpc/platforms/44x/warp.c index 501333cf42cf..5ecce543103e 100644 --- a/arch/powerpc/platforms/44x/warp.c +++ b/arch/powerpc/platforms/44x/warp.c | |||
| @@ -44,9 +44,7 @@ machine_device_initcall(warp, warp_device_probe); | |||
| 44 | 44 | ||
| 45 | static int __init warp_probe(void) | 45 | static int __init warp_probe(void) |
| 46 | { | 46 | { |
| 47 | unsigned long root = of_get_flat_dt_root(); | 47 | if (!of_machine_is_compatible("pika,warp")) |
| 48 | |||
| 49 | if (!of_flat_dt_is_compatible(root, "pika,warp")) | ||
| 50 | return 0; | 48 | return 0; |
| 51 | 49 | ||
| 52 | /* For __dma_alloc_coherent */ | 50 | /* For __dma_alloc_coherent */ |
diff --git a/arch/powerpc/platforms/512x/clock-commonclk.c b/arch/powerpc/platforms/512x/clock-commonclk.c index 6081fbd75330..add5a5374fa0 100644 --- a/arch/powerpc/platforms/512x/clock-commonclk.c +++ b/arch/powerpc/platforms/512x/clock-commonclk.c | |||
| @@ -719,7 +719,7 @@ static void mpc512x_clk_setup_clock_tree(struct device_node *np, int busfreq) | |||
| 719 | * most one of a mux, div, and gate each into one 'struct clk' | 719 | * most one of a mux, div, and gate each into one 'struct clk' |
| 720 | * item | 720 | * item |
| 721 | * - PSC/MSCAN/SPDIF clock generation OTOH already is very | 721 | * - PSC/MSCAN/SPDIF clock generation OTOH already is very |
| 722 | * specific and cannot get mapped to componsites (at least not | 722 | * specific and cannot get mapped to composites (at least not |
| 723 | * a single one, maybe two of them, but then some of these | 723 | * a single one, maybe two of them, but then some of these |
| 724 | * intermediate clock signals get referenced elsewhere (e.g. | 724 | * intermediate clock signals get referenced elsewhere (e.g. |
| 725 | * in the clock frequency measurement, CFM) and thus need | 725 | * in the clock frequency measurement, CFM) and thus need |
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads.c b/arch/powerpc/platforms/512x/mpc5121_ads.c index 3e90ece10ae9..f65d5033cdb0 100644 --- a/arch/powerpc/platforms/512x/mpc5121_ads.c +++ b/arch/powerpc/platforms/512x/mpc5121_ads.c | |||
| @@ -57,9 +57,12 @@ static void __init mpc5121_ads_init_IRQ(void) | |||
| 57 | */ | 57 | */ |
| 58 | static int __init mpc5121_ads_probe(void) | 58 | static int __init mpc5121_ads_probe(void) |
| 59 | { | 59 | { |
| 60 | unsigned long root = of_get_flat_dt_root(); | 60 | if (!of_machine_is_compatible("fsl,mpc5121ads")) |
| 61 | return 0; | ||
| 61 | 62 | ||
| 62 | return of_flat_dt_is_compatible(root, "fsl,mpc5121ads"); | 63 | mpc512x_init_early(); |
| 64 | |||
| 65 | return 1; | ||
| 63 | } | 66 | } |
| 64 | 67 | ||
| 65 | define_machine(mpc5121_ads) { | 68 | define_machine(mpc5121_ads) { |
| @@ -67,7 +70,6 @@ define_machine(mpc5121_ads) { | |||
| 67 | .probe = mpc5121_ads_probe, | 70 | .probe = mpc5121_ads_probe, |
| 68 | .setup_arch = mpc5121_ads_setup_arch, | 71 | .setup_arch = mpc5121_ads_setup_arch, |
| 69 | .init = mpc512x_init, | 72 | .init = mpc512x_init, |
| 70 | .init_early = mpc512x_init_early, | ||
| 71 | .init_IRQ = mpc5121_ads_init_IRQ, | 73 | .init_IRQ = mpc5121_ads_init_IRQ, |
| 72 | .get_irq = ipic_get_irq, | 74 | .get_irq = ipic_get_irq, |
| 73 | .calibrate_decr = generic_calibrate_decr, | 75 | .calibrate_decr = generic_calibrate_decr, |
diff --git a/arch/powerpc/platforms/512x/mpc512x.h b/arch/powerpc/platforms/512x/mpc512x.h index cc97f022d028..14ba49fd7938 100644 --- a/arch/powerpc/platforms/512x/mpc512x.h +++ b/arch/powerpc/platforms/512x/mpc512x.h | |||
| @@ -18,6 +18,6 @@ extern void __init mpc512x_setup_arch(void); | |||
| 18 | extern int __init mpc5121_clk_init(void); | 18 | extern int __init mpc5121_clk_init(void); |
| 19 | extern const char *mpc512x_select_psc_compat(void); | 19 | extern const char *mpc512x_select_psc_compat(void); |
| 20 | extern const char *mpc512x_select_reset_compat(void); | 20 | extern const char *mpc512x_select_reset_compat(void); |
| 21 | extern void mpc512x_restart(char *cmd); | 21 | extern void __noreturn mpc512x_restart(char *cmd); |
| 22 | 22 | ||
| 23 | #endif /* __MPC512X_H__ */ | 23 | #endif /* __MPC512X_H__ */ |
diff --git a/arch/powerpc/platforms/512x/mpc512x_generic.c b/arch/powerpc/platforms/512x/mpc512x_generic.c index ce71408781a0..bf884d3075e4 100644 --- a/arch/powerpc/platforms/512x/mpc512x_generic.c +++ b/arch/powerpc/platforms/512x/mpc512x_generic.c | |||
| @@ -38,14 +38,18 @@ static const char * const board[] __initconst = { | |||
| 38 | */ | 38 | */ |
| 39 | static int __init mpc512x_generic_probe(void) | 39 | static int __init mpc512x_generic_probe(void) |
| 40 | { | 40 | { |
| 41 | return of_flat_dt_match(of_get_flat_dt_root(), board); | 41 | if (!of_device_compatible_match(of_root, board)) |
| 42 | return 0; | ||
| 43 | |||
| 44 | mpc512x_init_early(); | ||
| 45 | |||
| 46 | return 1; | ||
| 42 | } | 47 | } |
| 43 | 48 | ||
| 44 | define_machine(mpc512x_generic) { | 49 | define_machine(mpc512x_generic) { |
| 45 | .name = "MPC512x generic", | 50 | .name = "MPC512x generic", |
| 46 | .probe = mpc512x_generic_probe, | 51 | .probe = mpc512x_generic_probe, |
| 47 | .init = mpc512x_init, | 52 | .init = mpc512x_init, |
| 48 | .init_early = mpc512x_init_early, | ||
| 49 | .setup_arch = mpc512x_setup_arch, | 53 | .setup_arch = mpc512x_setup_arch, |
| 50 | .init_IRQ = mpc512x_init_IRQ, | 54 | .init_IRQ = mpc512x_init_IRQ, |
| 51 | .get_irq = ipic_get_irq, | 55 | .get_irq = ipic_get_irq, |
diff --git a/arch/powerpc/platforms/512x/mpc512x_shared.c b/arch/powerpc/platforms/512x/mpc512x_shared.c index 452da2391153..6b4f4cb7009a 100644 --- a/arch/powerpc/platforms/512x/mpc512x_shared.c +++ b/arch/powerpc/platforms/512x/mpc512x_shared.c | |||
| @@ -47,7 +47,7 @@ static void __init mpc512x_restart_init(void) | |||
| 47 | of_node_put(np); | 47 | of_node_put(np); |
| 48 | } | 48 | } |
| 49 | 49 | ||
| 50 | void mpc512x_restart(char *cmd) | 50 | void __noreturn mpc512x_restart(char *cmd) |
| 51 | { | 51 | { |
| 52 | if (reset_module_base) { | 52 | if (reset_module_base) { |
| 53 | /* Enable software reset "RSTE" */ | 53 | /* Enable software reset "RSTE" */ |
diff --git a/arch/powerpc/platforms/512x/pdm360ng.c b/arch/powerpc/platforms/512x/pdm360ng.c index 116f2325b20b..dc81f05e0bce 100644 --- a/arch/powerpc/platforms/512x/pdm360ng.c +++ b/arch/powerpc/platforms/512x/pdm360ng.c | |||
| @@ -113,9 +113,12 @@ void __init pdm360ng_init(void) | |||
| 113 | 113 | ||
| 114 | static int __init pdm360ng_probe(void) | 114 | static int __init pdm360ng_probe(void) |
| 115 | { | 115 | { |
| 116 | unsigned long root = of_get_flat_dt_root(); | 116 | if (!of_machine_is_compatible("ifm,pdm360ng")) |
| 117 | return 0; | ||
| 117 | 118 | ||
| 118 | return of_flat_dt_is_compatible(root, "ifm,pdm360ng"); | 119 | mpc512x_init_early(); |
| 120 | |||
| 121 | return 1; | ||
| 119 | } | 122 | } |
| 120 | 123 | ||
| 121 | define_machine(pdm360ng) { | 124 | define_machine(pdm360ng) { |
| @@ -123,7 +126,6 @@ define_machine(pdm360ng) { | |||
| 123 | .probe = pdm360ng_probe, | 126 | .probe = pdm360ng_probe, |
| 124 | .setup_arch = mpc512x_setup_arch, | 127 | .setup_arch = mpc512x_setup_arch, |
| 125 | .init = pdm360ng_init, | 128 | .init = pdm360ng_init, |
| 126 | .init_early = mpc512x_init_early, | ||
| 127 | .init_IRQ = mpc512x_init_IRQ, | 129 | .init_IRQ = mpc512x_init_IRQ, |
| 128 | .get_irq = ipic_get_irq, | 130 | .get_irq = ipic_get_irq, |
| 129 | .calibrate_decr = generic_calibrate_decr, | 131 | .calibrate_decr = generic_calibrate_decr, |
diff --git a/arch/powerpc/platforms/52xx/efika.c b/arch/powerpc/platforms/52xx/efika.c index 6af651e69129..39b49822ace1 100644 --- a/arch/powerpc/platforms/52xx/efika.c +++ b/arch/powerpc/platforms/52xx/efika.c | |||
| @@ -200,8 +200,7 @@ static void __init efika_setup_arch(void) | |||
| 200 | 200 | ||
| 201 | static int __init efika_probe(void) | 201 | static int __init efika_probe(void) |
| 202 | { | 202 | { |
| 203 | const char *model = of_get_flat_dt_prop(of_get_flat_dt_root(), | 203 | const char *model = of_get_property(of_root, "model", NULL); |
| 204 | "model", NULL); | ||
| 205 | 204 | ||
| 206 | if (model == NULL) | 205 | if (model == NULL) |
| 207 | return 0; | 206 | return 0; |
diff --git a/arch/powerpc/platforms/52xx/lite5200.c b/arch/powerpc/platforms/52xx/lite5200.c index 7492de3cf6d0..c94c385cc919 100644 --- a/arch/powerpc/platforms/52xx/lite5200.c +++ b/arch/powerpc/platforms/52xx/lite5200.c | |||
| @@ -183,7 +183,7 @@ static const char * const board[] __initconst = { | |||
| 183 | */ | 183 | */ |
| 184 | static int __init lite5200_probe(void) | 184 | static int __init lite5200_probe(void) |
| 185 | { | 185 | { |
| 186 | return of_flat_dt_match(of_get_flat_dt_root(), board); | 186 | return of_device_compatible_match(of_root, board); |
| 187 | } | 187 | } |
| 188 | 188 | ||
| 189 | define_machine(lite5200) { | 189 | define_machine(lite5200) { |
diff --git a/arch/powerpc/platforms/52xx/media5200.c b/arch/powerpc/platforms/52xx/media5200.c index 8fb95480fd73..a3227040cc86 100644 --- a/arch/powerpc/platforms/52xx/media5200.c +++ b/arch/powerpc/platforms/52xx/media5200.c | |||
| @@ -242,7 +242,7 @@ static const char * const board[] __initconst = { | |||
| 242 | */ | 242 | */ |
| 243 | static int __init media5200_probe(void) | 243 | static int __init media5200_probe(void) |
| 244 | { | 244 | { |
| 245 | return of_flat_dt_match(of_get_flat_dt_root(), board); | 245 | return of_device_compatible_match(of_root, board); |
| 246 | } | 246 | } |
| 247 | 247 | ||
| 248 | define_machine(media5200_platform) { | 248 | define_machine(media5200_platform) { |
diff --git a/arch/powerpc/platforms/52xx/mpc5200_simple.c b/arch/powerpc/platforms/52xx/mpc5200_simple.c index 792a301a0bf0..a80c6278d515 100644 --- a/arch/powerpc/platforms/52xx/mpc5200_simple.c +++ b/arch/powerpc/platforms/52xx/mpc5200_simple.c | |||
| @@ -70,7 +70,7 @@ static const char *board[] __initdata = { | |||
| 70 | */ | 70 | */ |
| 71 | static int __init mpc5200_simple_probe(void) | 71 | static int __init mpc5200_simple_probe(void) |
| 72 | { | 72 | { |
| 73 | return of_flat_dt_match(of_get_flat_dt_root(), board); | 73 | return of_device_compatible_match(of_root, board); |
| 74 | } | 74 | } |
| 75 | 75 | ||
| 76 | define_machine(mpc5200_simple_platform) { | 76 | define_machine(mpc5200_simple_platform) { |
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_common.c b/arch/powerpc/platforms/52xx/mpc52xx_common.c index 26993826a797..565e3a83dc9e 100644 --- a/arch/powerpc/platforms/52xx/mpc52xx_common.c +++ b/arch/powerpc/platforms/52xx/mpc52xx_common.c | |||
| @@ -243,8 +243,7 @@ EXPORT_SYMBOL(mpc52xx_get_xtal_freq); | |||
| 243 | /** | 243 | /** |
| 244 | * mpc52xx_restart: ppc_md->restart hook for mpc5200 using the watchdog timer | 244 | * mpc52xx_restart: ppc_md->restart hook for mpc5200 using the watchdog timer |
| 245 | */ | 245 | */ |
| 246 | void | 246 | void __noreturn mpc52xx_restart(char *cmd) |
| 247 | mpc52xx_restart(char *cmd) | ||
| 248 | { | 247 | { |
| 249 | local_irq_disable(); | 248 | local_irq_disable(); |
| 250 | 249 | ||
diff --git a/arch/powerpc/platforms/82xx/ep8248e.c b/arch/powerpc/platforms/82xx/ep8248e.c index 6781bda117be..cdab847749e6 100644 --- a/arch/powerpc/platforms/82xx/ep8248e.c +++ b/arch/powerpc/platforms/82xx/ep8248e.c | |||
| @@ -309,8 +309,7 @@ machine_device_initcall(ep8248e, declare_of_platform_devices); | |||
| 309 | */ | 309 | */ |
| 310 | static int __init ep8248e_probe(void) | 310 | static int __init ep8248e_probe(void) |
| 311 | { | 311 | { |
| 312 | unsigned long root = of_get_flat_dt_root(); | 312 | return of_machine_is_compatible("fsl,ep8248e"); |
| 313 | return of_flat_dt_is_compatible(root, "fsl,ep8248e"); | ||
| 314 | } | 313 | } |
| 315 | 314 | ||
| 316 | define_machine(ep8248e) | 315 | define_machine(ep8248e) |
diff --git a/arch/powerpc/platforms/82xx/km82xx.c b/arch/powerpc/platforms/82xx/km82xx.c index 387b446f4161..28860e40b5db 100644 --- a/arch/powerpc/platforms/82xx/km82xx.c +++ b/arch/powerpc/platforms/82xx/km82xx.c | |||
| @@ -198,8 +198,7 @@ machine_device_initcall(km82xx, declare_of_platform_devices); | |||
| 198 | */ | 198 | */ |
| 199 | static int __init km82xx_probe(void) | 199 | static int __init km82xx_probe(void) |
| 200 | { | 200 | { |
| 201 | unsigned long root = of_get_flat_dt_root(); | 201 | return of_machine_is_compatible("keymile,km82xx"); |
| 202 | return of_flat_dt_is_compatible(root, "keymile,km82xx"); | ||
| 203 | } | 202 | } |
| 204 | 203 | ||
| 205 | define_machine(km82xx) | 204 | define_machine(km82xx) |
diff --git a/arch/powerpc/platforms/82xx/mpc8272_ads.c b/arch/powerpc/platforms/82xx/mpc8272_ads.c index d24deacf07d0..d23c10a96bde 100644 --- a/arch/powerpc/platforms/82xx/mpc8272_ads.c +++ b/arch/powerpc/platforms/82xx/mpc8272_ads.c | |||
| @@ -201,8 +201,7 @@ machine_device_initcall(mpc8272_ads, declare_of_platform_devices); | |||
| 201 | */ | 201 | */ |
| 202 | static int __init mpc8272_ads_probe(void) | 202 | static int __init mpc8272_ads_probe(void) |
| 203 | { | 203 | { |
| 204 | unsigned long root = of_get_flat_dt_root(); | 204 | return of_machine_is_compatible("fsl,mpc8272ads"); |
| 205 | return of_flat_dt_is_compatible(root, "fsl,mpc8272ads"); | ||
| 206 | } | 205 | } |
| 207 | 206 | ||
| 208 | define_machine(mpc8272_ads) | 207 | define_machine(mpc8272_ads) |
diff --git a/arch/powerpc/platforms/82xx/pq2.c b/arch/powerpc/platforms/82xx/pq2.c index fc8b2d6a7d8d..c4f7029fc9ae 100644 --- a/arch/powerpc/platforms/82xx/pq2.c +++ b/arch/powerpc/platforms/82xx/pq2.c | |||
| @@ -22,7 +22,7 @@ | |||
| 22 | 22 | ||
| 23 | #define RMR_CSRE 0x00000001 | 23 | #define RMR_CSRE 0x00000001 |
| 24 | 24 | ||
| 25 | void pq2_restart(char *cmd) | 25 | void __noreturn pq2_restart(char *cmd) |
| 26 | { | 26 | { |
| 27 | local_irq_disable(); | 27 | local_irq_disable(); |
| 28 | setbits32(&cpm2_immr->im_clkrst.car_rmr, RMR_CSRE); | 28 | setbits32(&cpm2_immr->im_clkrst.car_rmr, RMR_CSRE); |
diff --git a/arch/powerpc/platforms/82xx/pq2.h b/arch/powerpc/platforms/82xx/pq2.h index a41f84ae2325..3080ce3441c1 100644 --- a/arch/powerpc/platforms/82xx/pq2.h +++ b/arch/powerpc/platforms/82xx/pq2.h | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | #ifndef _PQ2_H | 1 | #ifndef _PQ2_H |
| 2 | #define _PQ2_H | 2 | #define _PQ2_H |
| 3 | 3 | ||
| 4 | void pq2_restart(char *cmd); | 4 | void __noreturn pq2_restart(char *cmd); |
| 5 | 5 | ||
| 6 | #ifdef CONFIG_PCI | 6 | #ifdef CONFIG_PCI |
| 7 | int pq2ads_pci_init_irq(void); | 7 | int pq2ads_pci_init_irq(void); |
diff --git a/arch/powerpc/platforms/82xx/pq2fads.c b/arch/powerpc/platforms/82xx/pq2fads.c index 3a5164ad10ad..6c654dc74a4b 100644 --- a/arch/powerpc/platforms/82xx/pq2fads.c +++ b/arch/powerpc/platforms/82xx/pq2fads.c | |||
| @@ -164,8 +164,7 @@ static void __init pq2fads_setup_arch(void) | |||
| 164 | */ | 164 | */ |
| 165 | static int __init pq2fads_probe(void) | 165 | static int __init pq2fads_probe(void) |
| 166 | { | 166 | { |
| 167 | unsigned long root = of_get_flat_dt_root(); | 167 | return of_machine_is_compatible("fsl,pq2fads"); |
| 168 | return of_flat_dt_is_compatible(root, "fsl,pq2fads"); | ||
| 169 | } | 168 | } |
| 170 | 169 | ||
| 171 | static const struct of_device_id of_bus_ids[] __initconst = { | 170 | static const struct of_device_id of_bus_ids[] __initconst = { |
diff --git a/arch/powerpc/platforms/83xx/asp834x.c b/arch/powerpc/platforms/83xx/asp834x.c index 464ea8e0292d..17e54339f8d9 100644 --- a/arch/powerpc/platforms/83xx/asp834x.c +++ b/arch/powerpc/platforms/83xx/asp834x.c | |||
| @@ -43,8 +43,7 @@ machine_device_initcall(asp834x, mpc83xx_declare_of_platform_devices); | |||
| 43 | */ | 43 | */ |
| 44 | static int __init asp834x_probe(void) | 44 | static int __init asp834x_probe(void) |
| 45 | { | 45 | { |
| 46 | unsigned long root = of_get_flat_dt_root(); | 46 | return of_machine_is_compatible("analogue-and-micro,asp8347e"); |
| 47 | return of_flat_dt_is_compatible(root, "analogue-and-micro,asp8347e"); | ||
| 48 | } | 47 | } |
| 49 | 48 | ||
| 50 | define_machine(asp834x) { | 49 | define_machine(asp834x) { |
diff --git a/arch/powerpc/platforms/83xx/km83xx.c b/arch/powerpc/platforms/83xx/km83xx.c index 4bc6bbbe9ada..e7fbd6366abb 100644 --- a/arch/powerpc/platforms/83xx/km83xx.c +++ b/arch/powerpc/platforms/83xx/km83xx.c | |||
| @@ -171,11 +171,10 @@ static char *board[] __initdata = { | |||
| 171 | */ | 171 | */ |
| 172 | static int __init mpc83xx_km_probe(void) | 172 | static int __init mpc83xx_km_probe(void) |
| 173 | { | 173 | { |
| 174 | unsigned long node = of_get_flat_dt_root(); | ||
| 175 | int i = 0; | 174 | int i = 0; |
| 176 | 175 | ||
| 177 | while (board[i]) { | 176 | while (board[i]) { |
| 178 | if (of_flat_dt_is_compatible(node, board[i])) | 177 | if (of_machine_is_compatible(board[i])) |
| 179 | break; | 178 | break; |
| 180 | i++; | 179 | i++; |
| 181 | } | 180 | } |
diff --git a/arch/powerpc/platforms/83xx/misc.c b/arch/powerpc/platforms/83xx/misc.c index 7e923cad56cf..8899aa9d11f5 100644 --- a/arch/powerpc/platforms/83xx/misc.c +++ b/arch/powerpc/platforms/83xx/misc.c | |||
| @@ -35,7 +35,7 @@ static int __init mpc83xx_restart_init(void) | |||
| 35 | 35 | ||
| 36 | arch_initcall(mpc83xx_restart_init); | 36 | arch_initcall(mpc83xx_restart_init); |
| 37 | 37 | ||
| 38 | void mpc83xx_restart(char *cmd) | 38 | void __noreturn mpc83xx_restart(char *cmd) |
| 39 | { | 39 | { |
| 40 | #define RST_OFFSET 0x00000900 | 40 | #define RST_OFFSET 0x00000900 |
| 41 | #define RST_PROT_REG 0x00000018 | 41 | #define RST_PROT_REG 0x00000018 |
diff --git a/arch/powerpc/platforms/83xx/mpc830x_rdb.c b/arch/powerpc/platforms/83xx/mpc830x_rdb.c index 4f2d9fea77b7..040d5d085467 100644 --- a/arch/powerpc/platforms/83xx/mpc830x_rdb.c +++ b/arch/powerpc/platforms/83xx/mpc830x_rdb.c | |||
| @@ -46,7 +46,7 @@ static const char *board[] __initdata = { | |||
| 46 | */ | 46 | */ |
| 47 | static int __init mpc830x_rdb_probe(void) | 47 | static int __init mpc830x_rdb_probe(void) |
| 48 | { | 48 | { |
| 49 | return of_flat_dt_match(of_get_flat_dt_root(), board); | 49 | return of_device_compatible_match(of_root, board); |
| 50 | } | 50 | } |
| 51 | 51 | ||
| 52 | machine_device_initcall(mpc830x_rdb, mpc83xx_declare_of_platform_devices); | 52 | machine_device_initcall(mpc830x_rdb, mpc83xx_declare_of_platform_devices); |
diff --git a/arch/powerpc/platforms/83xx/mpc831x_rdb.c b/arch/powerpc/platforms/83xx/mpc831x_rdb.c index fa25977c52de..40e0d8307b59 100644 --- a/arch/powerpc/platforms/83xx/mpc831x_rdb.c +++ b/arch/powerpc/platforms/83xx/mpc831x_rdb.c | |||
| @@ -46,7 +46,7 @@ static const char *board[] __initdata = { | |||
| 46 | */ | 46 | */ |
| 47 | static int __init mpc831x_rdb_probe(void) | 47 | static int __init mpc831x_rdb_probe(void) |
| 48 | { | 48 | { |
| 49 | return of_flat_dt_match(of_get_flat_dt_root(), board); | 49 | return of_device_compatible_match(of_root, board); |
| 50 | } | 50 | } |
| 51 | 51 | ||
| 52 | machine_device_initcall(mpc831x_rdb, mpc83xx_declare_of_platform_devices); | 52 | machine_device_initcall(mpc831x_rdb, mpc83xx_declare_of_platform_devices); |
diff --git a/arch/powerpc/platforms/83xx/mpc832x_mds.c b/arch/powerpc/platforms/83xx/mpc832x_mds.c index a973b2ae5df6..cdfa47c4d394 100644 --- a/arch/powerpc/platforms/83xx/mpc832x_mds.c +++ b/arch/powerpc/platforms/83xx/mpc832x_mds.c | |||
| @@ -102,9 +102,7 @@ machine_device_initcall(mpc832x_mds, mpc83xx_declare_of_platform_devices); | |||
| 102 | */ | 102 | */ |
| 103 | static int __init mpc832x_sys_probe(void) | 103 | static int __init mpc832x_sys_probe(void) |
| 104 | { | 104 | { |
| 105 | unsigned long root = of_get_flat_dt_root(); | 105 | return of_machine_is_compatible("MPC832xMDS"); |
| 106 | |||
| 107 | return of_flat_dt_is_compatible(root, "MPC832xMDS"); | ||
| 108 | } | 106 | } |
| 109 | 107 | ||
| 110 | define_machine(mpc832x_mds) { | 108 | define_machine(mpc832x_mds) { |
diff --git a/arch/powerpc/platforms/83xx/mpc832x_rdb.c b/arch/powerpc/platforms/83xx/mpc832x_rdb.c index ea2b87d202ca..2ef03e7d248c 100644 --- a/arch/powerpc/platforms/83xx/mpc832x_rdb.c +++ b/arch/powerpc/platforms/83xx/mpc832x_rdb.c | |||
| @@ -220,9 +220,7 @@ machine_device_initcall(mpc832x_rdb, mpc83xx_declare_of_platform_devices); | |||
| 220 | */ | 220 | */ |
| 221 | static int __init mpc832x_rdb_probe(void) | 221 | static int __init mpc832x_rdb_probe(void) |
| 222 | { | 222 | { |
| 223 | unsigned long root = of_get_flat_dt_root(); | 223 | return of_machine_is_compatible("MPC832xRDB"); |
| 224 | |||
| 225 | return of_flat_dt_is_compatible(root, "MPC832xRDB"); | ||
| 226 | } | 224 | } |
| 227 | 225 | ||
| 228 | define_machine(mpc832x_rdb) { | 226 | define_machine(mpc832x_rdb) { |
diff --git a/arch/powerpc/platforms/83xx/mpc834x_itx.c b/arch/powerpc/platforms/83xx/mpc834x_itx.c index 80aea8c4b5a3..8fd0c1e8b182 100644 --- a/arch/powerpc/platforms/83xx/mpc834x_itx.c +++ b/arch/powerpc/platforms/83xx/mpc834x_itx.c | |||
| @@ -70,9 +70,7 @@ static void __init mpc834x_itx_setup_arch(void) | |||
| 70 | */ | 70 | */ |
| 71 | static int __init mpc834x_itx_probe(void) | 71 | static int __init mpc834x_itx_probe(void) |
| 72 | { | 72 | { |
| 73 | unsigned long root = of_get_flat_dt_root(); | 73 | return of_machine_is_compatible("MPC834xMITX"); |
| 74 | |||
| 75 | return of_flat_dt_is_compatible(root, "MPC834xMITX"); | ||
| 76 | } | 74 | } |
| 77 | 75 | ||
| 78 | define_machine(mpc834x_itx) { | 76 | define_machine(mpc834x_itx) { |
diff --git a/arch/powerpc/platforms/83xx/mpc834x_mds.c b/arch/powerpc/platforms/83xx/mpc834x_mds.c index 553e793a4a93..eeaee6123bb3 100644 --- a/arch/powerpc/platforms/83xx/mpc834x_mds.c +++ b/arch/powerpc/platforms/83xx/mpc834x_mds.c | |||
| @@ -91,9 +91,7 @@ machine_device_initcall(mpc834x_mds, mpc83xx_declare_of_platform_devices); | |||
| 91 | */ | 91 | */ |
| 92 | static int __init mpc834x_mds_probe(void) | 92 | static int __init mpc834x_mds_probe(void) |
| 93 | { | 93 | { |
| 94 | unsigned long root = of_get_flat_dt_root(); | 94 | return of_machine_is_compatible("MPC834xMDS"); |
| 95 | |||
| 96 | return of_flat_dt_is_compatible(root, "MPC834xMDS"); | ||
| 97 | } | 95 | } |
| 98 | 96 | ||
| 99 | define_machine(mpc834x_mds) { | 97 | define_machine(mpc834x_mds) { |
diff --git a/arch/powerpc/platforms/83xx/mpc836x_mds.c b/arch/powerpc/platforms/83xx/mpc836x_mds.c index dd70b85f56d4..dacf4c2df069 100644 --- a/arch/powerpc/platforms/83xx/mpc836x_mds.c +++ b/arch/powerpc/platforms/83xx/mpc836x_mds.c | |||
| @@ -209,9 +209,7 @@ machine_arch_initcall(mpc836x_mds, mpc836x_usb_cfg); | |||
| 209 | */ | 209 | */ |
| 210 | static int __init mpc836x_mds_probe(void) | 210 | static int __init mpc836x_mds_probe(void) |
| 211 | { | 211 | { |
| 212 | unsigned long root = of_get_flat_dt_root(); | 212 | return of_machine_is_compatible("MPC836xMDS"); |
| 213 | |||
| 214 | return of_flat_dt_is_compatible(root, "MPC836xMDS"); | ||
| 215 | } | 213 | } |
| 216 | 214 | ||
| 217 | define_machine(mpc836x_mds) { | 215 | define_machine(mpc836x_mds) { |
diff --git a/arch/powerpc/platforms/83xx/mpc836x_rdk.c b/arch/powerpc/platforms/83xx/mpc836x_rdk.c index 4cd7153a6c88..cf67ac93ddcb 100644 --- a/arch/powerpc/platforms/83xx/mpc836x_rdk.c +++ b/arch/powerpc/platforms/83xx/mpc836x_rdk.c | |||
| @@ -42,9 +42,7 @@ static void __init mpc836x_rdk_setup_arch(void) | |||
| 42 | */ | 42 | */ |
| 43 | static int __init mpc836x_rdk_probe(void) | 43 | static int __init mpc836x_rdk_probe(void) |
| 44 | { | 44 | { |
| 45 | unsigned long root = of_get_flat_dt_root(); | 45 | return of_machine_is_compatible("fsl,mpc8360rdk"); |
| 46 | |||
| 47 | return of_flat_dt_is_compatible(root, "fsl,mpc8360rdk"); | ||
| 48 | } | 46 | } |
| 49 | 47 | ||
| 50 | define_machine(mpc836x_rdk) { | 48 | define_machine(mpc836x_rdk) { |
diff --git a/arch/powerpc/platforms/83xx/mpc837x_mds.c b/arch/powerpc/platforms/83xx/mpc837x_mds.c index e53a60b6c863..652b97d699c9 100644 --- a/arch/powerpc/platforms/83xx/mpc837x_mds.c +++ b/arch/powerpc/platforms/83xx/mpc837x_mds.c | |||
| @@ -93,9 +93,7 @@ machine_device_initcall(mpc837x_mds, mpc83xx_declare_of_platform_devices); | |||
| 93 | */ | 93 | */ |
| 94 | static int __init mpc837x_mds_probe(void) | 94 | static int __init mpc837x_mds_probe(void) |
| 95 | { | 95 | { |
| 96 | unsigned long root = of_get_flat_dt_root(); | 96 | return of_machine_is_compatible("fsl,mpc837xmds"); |
| 97 | |||
| 98 | return of_flat_dt_is_compatible(root, "fsl,mpc837xmds"); | ||
| 99 | } | 97 | } |
| 100 | 98 | ||
| 101 | define_machine(mpc837x_mds) { | 99 | define_machine(mpc837x_mds) { |
diff --git a/arch/powerpc/platforms/83xx/mpc837x_rdb.c b/arch/powerpc/platforms/83xx/mpc837x_rdb.c index 9813c81e8e5b..667731d81676 100644 --- a/arch/powerpc/platforms/83xx/mpc837x_rdb.c +++ b/arch/powerpc/platforms/83xx/mpc837x_rdb.c | |||
| @@ -73,7 +73,7 @@ static const char * const board[] __initconst = { | |||
| 73 | */ | 73 | */ |
| 74 | static int __init mpc837x_rdb_probe(void) | 74 | static int __init mpc837x_rdb_probe(void) |
| 75 | { | 75 | { |
| 76 | return of_flat_dt_match(of_get_flat_dt_root(), board); | 76 | return of_device_compatible_match(of_root, board); |
| 77 | } | 77 | } |
| 78 | 78 | ||
| 79 | define_machine(mpc837x_rdb) { | 79 | define_machine(mpc837x_rdb) { |
diff --git a/arch/powerpc/platforms/83xx/mpc83xx.h b/arch/powerpc/platforms/83xx/mpc83xx.h index 0cf74d7ea1c5..ad484199eff7 100644 --- a/arch/powerpc/platforms/83xx/mpc83xx.h +++ b/arch/powerpc/platforms/83xx/mpc83xx.h | |||
| @@ -65,7 +65,7 @@ | |||
| 65 | * mpc83xx_* files. Mostly for use by mpc83xx_setup | 65 | * mpc83xx_* files. Mostly for use by mpc83xx_setup |
| 66 | */ | 66 | */ |
| 67 | 67 | ||
| 68 | extern void mpc83xx_restart(char *cmd); | 68 | extern void __noreturn mpc83xx_restart(char *cmd); |
| 69 | extern long mpc83xx_time_init(void); | 69 | extern long mpc83xx_time_init(void); |
| 70 | extern int mpc837x_usb_cfg(void); | 70 | extern int mpc837x_usb_cfg(void); |
| 71 | extern int mpc834x_usb_cfg(void); | 71 | extern int mpc834x_usb_cfg(void); |
diff --git a/arch/powerpc/platforms/83xx/sbc834x.c b/arch/powerpc/platforms/83xx/sbc834x.c index 26cb3e934722..b867e88dfb0d 100644 --- a/arch/powerpc/platforms/83xx/sbc834x.c +++ b/arch/powerpc/platforms/83xx/sbc834x.c | |||
| @@ -60,9 +60,7 @@ machine_device_initcall(sbc834x, mpc83xx_declare_of_platform_devices); | |||
| 60 | */ | 60 | */ |
| 61 | static int __init sbc834x_probe(void) | 61 | static int __init sbc834x_probe(void) |
| 62 | { | 62 | { |
| 63 | unsigned long root = of_get_flat_dt_root(); | 63 | return of_machine_is_compatible("SBC834xE"); |
| 64 | |||
| 65 | return of_flat_dt_is_compatible(root, "SBC834xE"); | ||
| 66 | } | 64 | } |
| 67 | 65 | ||
| 68 | define_machine(sbc834x) { | 66 | define_machine(sbc834x) { |
diff --git a/arch/powerpc/platforms/85xx/bsc913x_qds.c b/arch/powerpc/platforms/85xx/bsc913x_qds.c index dcfafd6b91ee..07dd6ae3ec52 100644 --- a/arch/powerpc/platforms/85xx/bsc913x_qds.c +++ b/arch/powerpc/platforms/85xx/bsc913x_qds.c | |||
| @@ -60,9 +60,7 @@ machine_arch_initcall(bsc9132_qds, mpc85xx_common_publish_devices); | |||
| 60 | 60 | ||
| 61 | static int __init bsc9132_qds_probe(void) | 61 | static int __init bsc9132_qds_probe(void) |
| 62 | { | 62 | { |
| 63 | unsigned long root = of_get_flat_dt_root(); | 63 | return of_machine_is_compatible("fsl,bsc9132qds"); |
| 64 | |||
| 65 | return of_flat_dt_is_compatible(root, "fsl,bsc9132qds"); | ||
| 66 | } | 64 | } |
| 67 | 65 | ||
| 68 | define_machine(bsc9132_qds) { | 66 | define_machine(bsc9132_qds) { |
diff --git a/arch/powerpc/platforms/85xx/bsc913x_rdb.c b/arch/powerpc/platforms/85xx/bsc913x_rdb.c index 9d57bedb940c..e48f6710e6d5 100644 --- a/arch/powerpc/platforms/85xx/bsc913x_rdb.c +++ b/arch/powerpc/platforms/85xx/bsc913x_rdb.c | |||
| @@ -50,9 +50,7 @@ machine_device_initcall(bsc9131_rdb, mpc85xx_common_publish_devices); | |||
| 50 | 50 | ||
| 51 | static int __init bsc9131_rdb_probe(void) | 51 | static int __init bsc9131_rdb_probe(void) |
| 52 | { | 52 | { |
| 53 | unsigned long root = of_get_flat_dt_root(); | 53 | return of_machine_is_compatible("fsl,bsc9131rdb"); |
| 54 | |||
| 55 | return of_flat_dt_is_compatible(root, "fsl,bsc9131rdb"); | ||
| 56 | } | 54 | } |
| 57 | 55 | ||
| 58 | define_machine(bsc9131_rdb) { | 56 | define_machine(bsc9131_rdb) { |
diff --git a/arch/powerpc/platforms/85xx/c293pcie.c b/arch/powerpc/platforms/85xx/c293pcie.c index 61bc851e9a8e..3b9e3f0f9aec 100644 --- a/arch/powerpc/platforms/85xx/c293pcie.c +++ b/arch/powerpc/platforms/85xx/c293pcie.c | |||
| @@ -54,9 +54,7 @@ machine_arch_initcall(c293_pcie, mpc85xx_common_publish_devices); | |||
| 54 | */ | 54 | */ |
| 55 | static int __init c293_pcie_probe(void) | 55 | static int __init c293_pcie_probe(void) |
| 56 | { | 56 | { |
| 57 | unsigned long root = of_get_flat_dt_root(); | 57 | if (of_machine_is_compatible("fsl,C293PCIE")) |
| 58 | |||
| 59 | if (of_flat_dt_is_compatible(root, "fsl,C293PCIE")) | ||
| 60 | return 1; | 58 | return 1; |
| 61 | return 0; | 59 | return 0; |
| 62 | } | 60 | } |
diff --git a/arch/powerpc/platforms/85xx/corenet_generic.c b/arch/powerpc/platforms/85xx/corenet_generic.c index a2b0bc859de0..3a6a84f07f43 100644 --- a/arch/powerpc/platforms/85xx/corenet_generic.c +++ b/arch/powerpc/platforms/85xx/corenet_generic.c | |||
| @@ -170,20 +170,19 @@ static const char * const boards[] __initconst = { | |||
| 170 | */ | 170 | */ |
| 171 | static int __init corenet_generic_probe(void) | 171 | static int __init corenet_generic_probe(void) |
| 172 | { | 172 | { |
| 173 | unsigned long root = of_get_flat_dt_root(); | ||
| 174 | char hv_compat[24]; | 173 | char hv_compat[24]; |
| 175 | int i; | 174 | int i; |
| 176 | #ifdef CONFIG_SMP | 175 | #ifdef CONFIG_SMP |
| 177 | extern struct smp_ops_t smp_85xx_ops; | 176 | extern struct smp_ops_t smp_85xx_ops; |
| 178 | #endif | 177 | #endif |
| 179 | 178 | ||
| 180 | if (of_flat_dt_match(root, boards)) | 179 | if (of_device_compatible_match(of_root, boards)) |
| 181 | return 1; | 180 | return 1; |
| 182 | 181 | ||
| 183 | /* Check if we're running under the Freescale hypervisor */ | 182 | /* Check if we're running under the Freescale hypervisor */ |
| 184 | for (i = 0; boards[i]; i++) { | 183 | for (i = 0; boards[i]; i++) { |
| 185 | snprintf(hv_compat, sizeof(hv_compat), "%s-hv", boards[i]); | 184 | snprintf(hv_compat, sizeof(hv_compat), "%s-hv", boards[i]); |
| 186 | if (of_flat_dt_is_compatible(root, hv_compat)) { | 185 | if (of_machine_is_compatible(hv_compat)) { |
| 187 | ppc_md.init_IRQ = ehv_pic_init; | 186 | ppc_md.init_IRQ = ehv_pic_init; |
| 188 | 187 | ||
| 189 | ppc_md.get_irq = ehv_pic_get_irq; | 188 | ppc_md.get_irq = ehv_pic_get_irq; |
diff --git a/arch/powerpc/platforms/85xx/ge_imp3a.c b/arch/powerpc/platforms/85xx/ge_imp3a.c index 11790e074c8a..14af36a7fa9c 100644 --- a/arch/powerpc/platforms/85xx/ge_imp3a.c +++ b/arch/powerpc/platforms/85xx/ge_imp3a.c | |||
| @@ -47,9 +47,8 @@ void __init ge_imp3a_pic_init(void) | |||
| 47 | struct mpic *mpic; | 47 | struct mpic *mpic; |
| 48 | struct device_node *np; | 48 | struct device_node *np; |
| 49 | struct device_node *cascade_node = NULL; | 49 | struct device_node *cascade_node = NULL; |
| 50 | unsigned long root = of_get_flat_dt_root(); | ||
| 51 | 50 | ||
| 52 | if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS-CAMP")) { | 51 | if (of_machine_is_compatible("fsl,MPC8572DS-CAMP")) { |
| 53 | mpic = mpic_alloc(NULL, 0, | 52 | mpic = mpic_alloc(NULL, 0, |
| 54 | MPIC_NO_RESET | | 53 | MPIC_NO_RESET | |
| 55 | MPIC_BIG_ENDIAN | | 54 | MPIC_BIG_ENDIAN | |
| @@ -198,9 +197,7 @@ static void ge_imp3a_show_cpuinfo(struct seq_file *m) | |||
| 198 | */ | 197 | */ |
| 199 | static int __init ge_imp3a_probe(void) | 198 | static int __init ge_imp3a_probe(void) |
| 200 | { | 199 | { |
| 201 | unsigned long root = of_get_flat_dt_root(); | 200 | return of_machine_is_compatible("ge,IMP3A"); |
| 202 | |||
| 203 | return of_flat_dt_is_compatible(root, "ge,IMP3A"); | ||
| 204 | } | 201 | } |
| 205 | 202 | ||
| 206 | machine_arch_initcall(ge_imp3a, mpc85xx_common_publish_devices); | 203 | machine_arch_initcall(ge_imp3a, mpc85xx_common_publish_devices); |
diff --git a/arch/powerpc/platforms/85xx/ksi8560.c b/arch/powerpc/platforms/85xx/ksi8560.c index 3dc1bda3ddc3..6ef8580fdc0e 100644 --- a/arch/powerpc/platforms/85xx/ksi8560.c +++ b/arch/powerpc/platforms/85xx/ksi8560.c | |||
| @@ -44,7 +44,7 @@ | |||
| 44 | 44 | ||
| 45 | static void __iomem *cpld_base = NULL; | 45 | static void __iomem *cpld_base = NULL; |
| 46 | 46 | ||
| 47 | static void machine_restart(char *cmd) | 47 | static void __noreturn machine_restart(char *cmd) |
| 48 | { | 48 | { |
| 49 | if (cpld_base) | 49 | if (cpld_base) |
| 50 | out_8(cpld_base + KSI8560_CPLD_RCR1, KSI8560_CPLD_RCR1_CPUHR); | 50 | out_8(cpld_base + KSI8560_CPLD_RCR1, KSI8560_CPLD_RCR1_CPUHR); |
| @@ -176,9 +176,7 @@ machine_device_initcall(ksi8560, mpc85xx_common_publish_devices); | |||
| 176 | */ | 176 | */ |
| 177 | static int __init ksi8560_probe(void) | 177 | static int __init ksi8560_probe(void) |
| 178 | { | 178 | { |
| 179 | unsigned long root = of_get_flat_dt_root(); | 179 | return of_machine_is_compatible("emerson,KSI8560"); |
| 180 | |||
| 181 | return of_flat_dt_is_compatible(root, "emerson,KSI8560"); | ||
| 182 | } | 180 | } |
| 183 | 181 | ||
| 184 | define_machine(ksi8560) { | 182 | define_machine(ksi8560) { |
diff --git a/arch/powerpc/platforms/85xx/mpc8536_ds.c b/arch/powerpc/platforms/85xx/mpc8536_ds.c index a378ba3519e9..6ba687f19e45 100644 --- a/arch/powerpc/platforms/85xx/mpc8536_ds.c +++ b/arch/powerpc/platforms/85xx/mpc8536_ds.c | |||
| @@ -64,9 +64,7 @@ machine_arch_initcall(mpc8536_ds, swiotlb_setup_bus_notifier); | |||
| 64 | */ | 64 | */ |
| 65 | static int __init mpc8536_ds_probe(void) | 65 | static int __init mpc8536_ds_probe(void) |
| 66 | { | 66 | { |
| 67 | unsigned long root = of_get_flat_dt_root(); | 67 | return of_machine_is_compatible("fsl,mpc8536ds"); |
| 68 | |||
| 69 | return of_flat_dt_is_compatible(root, "fsl,mpc8536ds"); | ||
| 70 | } | 68 | } |
| 71 | 69 | ||
| 72 | define_machine(mpc8536_ds) { | 70 | define_machine(mpc8536_ds) { |
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c index de72a5f464b1..8756715c7a47 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c | |||
| @@ -160,9 +160,7 @@ machine_arch_initcall(mpc85xx_ads, mpc85xx_common_publish_devices); | |||
| 160 | */ | 160 | */ |
| 161 | static int __init mpc85xx_ads_probe(void) | 161 | static int __init mpc85xx_ads_probe(void) |
| 162 | { | 162 | { |
| 163 | unsigned long root = of_get_flat_dt_root(); | 163 | return of_machine_is_compatible("MPC85xxADS"); |
| 164 | |||
| 165 | return of_flat_dt_is_compatible(root, "MPC85xxADS"); | ||
| 166 | } | 164 | } |
| 167 | 165 | ||
| 168 | define_machine(mpc85xx_ads) { | 166 | define_machine(mpc85xx_ads) { |
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c index d7e87ff912d7..62f171c71c4c 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c | |||
| @@ -83,7 +83,7 @@ static int mpc85xx_exclude_device(struct pci_controller *hose, | |||
| 83 | return PCIBIOS_SUCCESSFUL; | 83 | return PCIBIOS_SUCCESSFUL; |
| 84 | } | 84 | } |
| 85 | 85 | ||
| 86 | static void mpc85xx_cds_restart(char *cmd) | 86 | static void __noreturn mpc85xx_cds_restart(char *cmd) |
| 87 | { | 87 | { |
| 88 | struct pci_dev *dev; | 88 | struct pci_dev *dev; |
| 89 | u_char tmp; | 89 | u_char tmp; |
| @@ -367,9 +367,7 @@ static void mpc85xx_cds_show_cpuinfo(struct seq_file *m) | |||
| 367 | */ | 367 | */ |
| 368 | static int __init mpc85xx_cds_probe(void) | 368 | static int __init mpc85xx_cds_probe(void) |
| 369 | { | 369 | { |
| 370 | unsigned long root = of_get_flat_dt_root(); | 370 | return of_machine_is_compatible("MPC85xxCDS"); |
| 371 | |||
| 372 | return of_flat_dt_is_compatible(root, "MPC85xxCDS"); | ||
| 373 | } | 371 | } |
| 374 | 372 | ||
| 375 | machine_arch_initcall(mpc85xx_cds, mpc85xx_common_publish_devices); | 373 | machine_arch_initcall(mpc85xx_cds, mpc85xx_common_publish_devices); |
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c index f858306dba6a..6bc07d837b1c 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c | |||
| @@ -66,9 +66,7 @@ void __init mpc85xx_ds_pic_init(void) | |||
| 66 | struct device_node *cascade_node = NULL; | 66 | struct device_node *cascade_node = NULL; |
| 67 | int cascade_irq; | 67 | int cascade_irq; |
| 68 | #endif | 68 | #endif |
| 69 | unsigned long root = of_get_flat_dt_root(); | 69 | if (of_machine_is_compatible("fsl,MPC8572DS-CAMP")) { |
| 70 | |||
| 71 | if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS-CAMP")) { | ||
| 72 | mpic = mpic_alloc(NULL, 0, | 70 | mpic = mpic_alloc(NULL, 0, |
| 73 | MPIC_NO_RESET | | 71 | MPIC_NO_RESET | |
| 74 | MPIC_BIG_ENDIAN | | 72 | MPIC_BIG_ENDIAN | |
| @@ -169,9 +167,7 @@ static void __init mpc85xx_ds_setup_arch(void) | |||
| 169 | */ | 167 | */ |
| 170 | static int __init mpc8544_ds_probe(void) | 168 | static int __init mpc8544_ds_probe(void) |
| 171 | { | 169 | { |
| 172 | unsigned long root = of_get_flat_dt_root(); | 170 | return !!of_machine_is_compatible("MPC8544DS"); |
| 173 | |||
| 174 | return !!of_flat_dt_is_compatible(root, "MPC8544DS"); | ||
| 175 | } | 171 | } |
| 176 | 172 | ||
| 177 | machine_arch_initcall(mpc8544_ds, mpc85xx_common_publish_devices); | 173 | machine_arch_initcall(mpc8544_ds, mpc85xx_common_publish_devices); |
| @@ -187,9 +183,7 @@ machine_arch_initcall(p2020_ds, swiotlb_setup_bus_notifier); | |||
| 187 | */ | 183 | */ |
| 188 | static int __init mpc8572_ds_probe(void) | 184 | static int __init mpc8572_ds_probe(void) |
| 189 | { | 185 | { |
| 190 | unsigned long root = of_get_flat_dt_root(); | 186 | return !!of_machine_is_compatible("fsl,MPC8572DS"); |
| 191 | |||
| 192 | return !!of_flat_dt_is_compatible(root, "fsl,MPC8572DS"); | ||
| 193 | } | 187 | } |
| 194 | 188 | ||
| 195 | /* | 189 | /* |
| @@ -197,9 +191,7 @@ static int __init mpc8572_ds_probe(void) | |||
| 197 | */ | 191 | */ |
| 198 | static int __init p2020_ds_probe(void) | 192 | static int __init p2020_ds_probe(void) |
| 199 | { | 193 | { |
| 200 | unsigned long root = of_get_flat_dt_root(); | 194 | return !!of_machine_is_compatible("fsl,P2020DS"); |
| 201 | |||
| 202 | return !!of_flat_dt_is_compatible(root, "fsl,P2020DS"); | ||
| 203 | } | 195 | } |
| 204 | 196 | ||
| 205 | define_machine(mpc8544_ds) { | 197 | define_machine(mpc8544_ds) { |
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c index f61cbe235581..fa9cd710d2ae 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c | |||
| @@ -376,9 +376,7 @@ static void __init mpc85xx_mds_pic_init(void) | |||
| 376 | 376 | ||
| 377 | static int __init mpc85xx_mds_probe(void) | 377 | static int __init mpc85xx_mds_probe(void) |
| 378 | { | 378 | { |
| 379 | unsigned long root = of_get_flat_dt_root(); | 379 | return of_machine_is_compatible("MPC85xxMDS"); |
| 380 | |||
| 381 | return of_flat_dt_is_compatible(root, "MPC85xxMDS"); | ||
| 382 | } | 380 | } |
| 383 | 381 | ||
| 384 | define_machine(mpc8568_mds) { | 382 | define_machine(mpc8568_mds) { |
| @@ -398,9 +396,7 @@ define_machine(mpc8568_mds) { | |||
| 398 | 396 | ||
| 399 | static int __init mpc8569_mds_probe(void) | 397 | static int __init mpc8569_mds_probe(void) |
| 400 | { | 398 | { |
| 401 | unsigned long root = of_get_flat_dt_root(); | 399 | return of_machine_is_compatible("fsl,MPC8569EMDS"); |
| 402 | |||
| 403 | return of_flat_dt_is_compatible(root, "fsl,MPC8569EMDS"); | ||
| 404 | } | 400 | } |
| 405 | 401 | ||
| 406 | define_machine(mpc8569_mds) { | 402 | define_machine(mpc8569_mds) { |
| @@ -420,9 +416,7 @@ define_machine(mpc8569_mds) { | |||
| 420 | 416 | ||
| 421 | static int __init p1021_mds_probe(void) | 417 | static int __init p1021_mds_probe(void) |
| 422 | { | 418 | { |
| 423 | unsigned long root = of_get_flat_dt_root(); | 419 | return of_machine_is_compatible("fsl,P1021MDS"); |
| 424 | |||
| 425 | return of_flat_dt_is_compatible(root, "fsl,P1021MDS"); | ||
| 426 | 420 | ||
| 427 | } | 421 | } |
| 428 | 422 | ||
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c index 3f4dad133338..c1499cbf3786 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c | |||
| @@ -47,13 +47,12 @@ | |||
| 47 | void __init mpc85xx_rdb_pic_init(void) | 47 | void __init mpc85xx_rdb_pic_init(void) |
| 48 | { | 48 | { |
| 49 | struct mpic *mpic; | 49 | struct mpic *mpic; |
| 50 | unsigned long root = of_get_flat_dt_root(); | ||
| 51 | 50 | ||
| 52 | #ifdef CONFIG_QUICC_ENGINE | 51 | #ifdef CONFIG_QUICC_ENGINE |
| 53 | struct device_node *np; | 52 | struct device_node *np; |
| 54 | #endif | 53 | #endif |
| 55 | 54 | ||
| 56 | if (of_flat_dt_is_compatible(root, "fsl,MPC85XXRDB-CAMP")) { | 55 | if (of_machine_is_compatible("fsl,MPC85XXRDB-CAMP")) { |
| 57 | mpic = mpic_alloc(NULL, 0, MPIC_NO_RESET | | 56 | mpic = mpic_alloc(NULL, 0, MPIC_NO_RESET | |
| 58 | MPIC_BIG_ENDIAN | | 57 | MPIC_BIG_ENDIAN | |
| 59 | MPIC_SINGLE_DEST_CPU, | 58 | MPIC_SINGLE_DEST_CPU, |
| @@ -148,80 +147,60 @@ machine_arch_initcall(p1024_rdb, mpc85xx_common_publish_devices); | |||
| 148 | */ | 147 | */ |
| 149 | static int __init p2020_rdb_probe(void) | 148 | static int __init p2020_rdb_probe(void) |
| 150 | { | 149 | { |
| 151 | unsigned long root = of_get_flat_dt_root(); | 150 | if (of_machine_is_compatible("fsl,P2020RDB")) |
| 152 | |||
| 153 | if (of_flat_dt_is_compatible(root, "fsl,P2020RDB")) | ||
| 154 | return 1; | 151 | return 1; |
| 155 | return 0; | 152 | return 0; |
| 156 | } | 153 | } |
| 157 | 154 | ||
| 158 | static int __init p1020_rdb_probe(void) | 155 | static int __init p1020_rdb_probe(void) |
| 159 | { | 156 | { |
| 160 | unsigned long root = of_get_flat_dt_root(); | 157 | if (of_machine_is_compatible("fsl,P1020RDB")) |
| 161 | |||
| 162 | if (of_flat_dt_is_compatible(root, "fsl,P1020RDB")) | ||
| 163 | return 1; | 158 | return 1; |
| 164 | return 0; | 159 | return 0; |
| 165 | } | 160 | } |
| 166 | 161 | ||
| 167 | static int __init p1020_rdb_pc_probe(void) | 162 | static int __init p1020_rdb_pc_probe(void) |
| 168 | { | 163 | { |
| 169 | unsigned long root = of_get_flat_dt_root(); | 164 | return of_machine_is_compatible("fsl,P1020RDB-PC"); |
| 170 | |||
| 171 | return of_flat_dt_is_compatible(root, "fsl,P1020RDB-PC"); | ||
| 172 | } | 165 | } |
| 173 | 166 | ||
| 174 | static int __init p1020_rdb_pd_probe(void) | 167 | static int __init p1020_rdb_pd_probe(void) |
| 175 | { | 168 | { |
| 176 | unsigned long root = of_get_flat_dt_root(); | 169 | return of_machine_is_compatible("fsl,P1020RDB-PD"); |
| 177 | |||
| 178 | return of_flat_dt_is_compatible(root, "fsl,P1020RDB-PD"); | ||
| 179 | } | 170 | } |
| 180 | 171 | ||
| 181 | static int __init p1021_rdb_pc_probe(void) | 172 | static int __init p1021_rdb_pc_probe(void) |
| 182 | { | 173 | { |
| 183 | unsigned long root = of_get_flat_dt_root(); | 174 | if (of_machine_is_compatible("fsl,P1021RDB-PC")) |
| 184 | |||
| 185 | if (of_flat_dt_is_compatible(root, "fsl,P1021RDB-PC")) | ||
| 186 | return 1; | 175 | return 1; |
| 187 | return 0; | 176 | return 0; |
| 188 | } | 177 | } |
| 189 | 178 | ||
| 190 | static int __init p2020_rdb_pc_probe(void) | 179 | static int __init p2020_rdb_pc_probe(void) |
| 191 | { | 180 | { |
| 192 | unsigned long root = of_get_flat_dt_root(); | 181 | if (of_machine_is_compatible("fsl,P2020RDB-PC")) |
| 193 | |||
| 194 | if (of_flat_dt_is_compatible(root, "fsl,P2020RDB-PC")) | ||
| 195 | return 1; | 182 | return 1; |
| 196 | return 0; | 183 | return 0; |
| 197 | } | 184 | } |
| 198 | 185 | ||
| 199 | static int __init p1025_rdb_probe(void) | 186 | static int __init p1025_rdb_probe(void) |
| 200 | { | 187 | { |
| 201 | unsigned long root = of_get_flat_dt_root(); | 188 | return of_machine_is_compatible("fsl,P1025RDB"); |
| 202 | |||
| 203 | return of_flat_dt_is_compatible(root, "fsl,P1025RDB"); | ||
| 204 | } | 189 | } |
| 205 | 190 | ||
| 206 | static int __init p1020_mbg_pc_probe(void) | 191 | static int __init p1020_mbg_pc_probe(void) |
| 207 | { | 192 | { |
| 208 | unsigned long root = of_get_flat_dt_root(); | 193 | return of_machine_is_compatible("fsl,P1020MBG-PC"); |
| 209 | |||
| 210 | return of_flat_dt_is_compatible(root, "fsl,P1020MBG-PC"); | ||
| 211 | } | 194 | } |
| 212 | 195 | ||
| 213 | static int __init p1020_utm_pc_probe(void) | 196 | static int __init p1020_utm_pc_probe(void) |
| 214 | { | 197 | { |
| 215 | unsigned long root = of_get_flat_dt_root(); | 198 | return of_machine_is_compatible("fsl,P1020UTM-PC"); |
| 216 | |||
| 217 | return of_flat_dt_is_compatible(root, "fsl,P1020UTM-PC"); | ||
| 218 | } | 199 | } |
| 219 | 200 | ||
| 220 | static int __init p1024_rdb_probe(void) | 201 | static int __init p1024_rdb_probe(void) |
| 221 | { | 202 | { |
| 222 | unsigned long root = of_get_flat_dt_root(); | 203 | return of_machine_is_compatible("fsl,P1024RDB"); |
| 223 | |||
| 224 | return of_flat_dt_is_compatible(root, "fsl,P1024RDB"); | ||
| 225 | } | 204 | } |
| 226 | 205 | ||
| 227 | define_machine(p2020_rdb) { | 206 | define_machine(p2020_rdb) { |
diff --git a/arch/powerpc/platforms/85xx/mvme2500.c b/arch/powerpc/platforms/85xx/mvme2500.c index 1233050560ae..acc3d0d6049d 100644 --- a/arch/powerpc/platforms/85xx/mvme2500.c +++ b/arch/powerpc/platforms/85xx/mvme2500.c | |||
| @@ -53,9 +53,7 @@ machine_arch_initcall(mvme2500, mpc85xx_common_publish_devices); | |||
| 53 | */ | 53 | */ |
| 54 | static int __init mvme2500_probe(void) | 54 | static int __init mvme2500_probe(void) |
| 55 | { | 55 | { |
| 56 | unsigned long root = of_get_flat_dt_root(); | 56 | return of_machine_is_compatible("artesyn,MVME2500"); |
| 57 | |||
| 58 | return of_flat_dt_is_compatible(root, "artesyn,MVME2500"); | ||
| 59 | } | 57 | } |
| 60 | 58 | ||
| 61 | define_machine(mvme2500) { | 59 | define_machine(mvme2500) { |
diff --git a/arch/powerpc/platforms/85xx/p1010rdb.c b/arch/powerpc/platforms/85xx/p1010rdb.c index ad1a3d438a9e..661d7b59e413 100644 --- a/arch/powerpc/platforms/85xx/p1010rdb.c +++ b/arch/powerpc/platforms/85xx/p1010rdb.c | |||
| @@ -62,11 +62,9 @@ machine_arch_initcall(p1010_rdb, swiotlb_setup_bus_notifier); | |||
| 62 | */ | 62 | */ |
| 63 | static int __init p1010_rdb_probe(void) | 63 | static int __init p1010_rdb_probe(void) |
| 64 | { | 64 | { |
| 65 | unsigned long root = of_get_flat_dt_root(); | 65 | if (of_machine_is_compatible("fsl,P1010RDB")) |
| 66 | |||
| 67 | if (of_flat_dt_is_compatible(root, "fsl,P1010RDB")) | ||
| 68 | return 1; | 66 | return 1; |
| 69 | if (of_flat_dt_is_compatible(root, "fsl,P1010RDB-PB")) | 67 | if (of_machine_is_compatible("fsl,P1010RDB-PB")) |
| 70 | return 1; | 68 | return 1; |
| 71 | return 0; | 69 | return 0; |
| 72 | } | 70 | } |
diff --git a/arch/powerpc/platforms/85xx/p1022_ds.c b/arch/powerpc/platforms/85xx/p1022_ds.c index 371df822e88e..63568d68c76f 100644 --- a/arch/powerpc/platforms/85xx/p1022_ds.c +++ b/arch/powerpc/platforms/85xx/p1022_ds.c | |||
| @@ -555,9 +555,7 @@ machine_arch_initcall(p1022_ds, swiotlb_setup_bus_notifier); | |||
| 555 | */ | 555 | */ |
| 556 | static int __init p1022_ds_probe(void) | 556 | static int __init p1022_ds_probe(void) |
| 557 | { | 557 | { |
| 558 | unsigned long root = of_get_flat_dt_root(); | 558 | return of_machine_is_compatible("fsl,p1022ds"); |
| 559 | |||
| 560 | return of_flat_dt_is_compatible(root, "fsl,p1022ds"); | ||
| 561 | } | 559 | } |
| 562 | 560 | ||
| 563 | define_machine(p1022_ds) { | 561 | define_machine(p1022_ds) { |
diff --git a/arch/powerpc/platforms/85xx/p1022_rdk.c b/arch/powerpc/platforms/85xx/p1022_rdk.c index 5087becaa8bc..2f2943600301 100644 --- a/arch/powerpc/platforms/85xx/p1022_rdk.c +++ b/arch/powerpc/platforms/85xx/p1022_rdk.c | |||
| @@ -135,9 +135,7 @@ machine_arch_initcall(p1022_rdk, swiotlb_setup_bus_notifier); | |||
| 135 | */ | 135 | */ |
| 136 | static int __init p1022_rdk_probe(void) | 136 | static int __init p1022_rdk_probe(void) |
| 137 | { | 137 | { |
| 138 | unsigned long root = of_get_flat_dt_root(); | 138 | return of_machine_is_compatible("fsl,p1022rdk"); |
| 139 | |||
| 140 | return of_flat_dt_is_compatible(root, "fsl,p1022rdk"); | ||
| 141 | } | 139 | } |
| 142 | 140 | ||
| 143 | define_machine(p1022_rdk) { | 141 | define_machine(p1022_rdk) { |
diff --git a/arch/powerpc/platforms/85xx/p1023_rdb.c b/arch/powerpc/platforms/85xx/p1023_rdb.c index d5b7509825de..40d8de57c341 100644 --- a/arch/powerpc/platforms/85xx/p1023_rdb.c +++ b/arch/powerpc/platforms/85xx/p1023_rdb.c | |||
| @@ -100,9 +100,7 @@ static void __init mpc85xx_rdb_pic_init(void) | |||
| 100 | 100 | ||
| 101 | static int __init p1023_rdb_probe(void) | 101 | static int __init p1023_rdb_probe(void) |
| 102 | { | 102 | { |
| 103 | unsigned long root = of_get_flat_dt_root(); | 103 | return of_machine_is_compatible("fsl,P1023RDB"); |
| 104 | |||
| 105 | return of_flat_dt_is_compatible(root, "fsl,P1023RDB"); | ||
| 106 | 104 | ||
| 107 | } | 105 | } |
| 108 | 106 | ||
diff --git a/arch/powerpc/platforms/85xx/ppa8548.c b/arch/powerpc/platforms/85xx/ppa8548.c index 12019f17f297..2410167b290a 100644 --- a/arch/powerpc/platforms/85xx/ppa8548.c +++ b/arch/powerpc/platforms/85xx/ppa8548.c | |||
| @@ -81,9 +81,7 @@ machine_device_initcall(ppa8548, declare_of_platform_devices); | |||
| 81 | */ | 81 | */ |
| 82 | static int __init ppa8548_probe(void) | 82 | static int __init ppa8548_probe(void) |
| 83 | { | 83 | { |
| 84 | unsigned long root = of_get_flat_dt_root(); | 84 | return of_machine_is_compatible("ppa8548"); |
| 85 | |||
| 86 | return of_flat_dt_is_compatible(root, "ppa8548"); | ||
| 87 | } | 85 | } |
| 88 | 86 | ||
| 89 | define_machine(ppa8548) { | 87 | define_machine(ppa8548) { |
diff --git a/arch/powerpc/platforms/85xx/qemu_e500.c b/arch/powerpc/platforms/85xx/qemu_e500.c index 8ad2fe6f200a..50d745809809 100644 --- a/arch/powerpc/platforms/85xx/qemu_e500.c +++ b/arch/powerpc/platforms/85xx/qemu_e500.c | |||
| @@ -62,9 +62,7 @@ static void __init qemu_e500_setup_arch(void) | |||
| 62 | */ | 62 | */ |
| 63 | static int __init qemu_e500_probe(void) | 63 | static int __init qemu_e500_probe(void) |
| 64 | { | 64 | { |
| 65 | unsigned long root = of_get_flat_dt_root(); | 65 | return !!of_machine_is_compatible("fsl,qemu-e500"); |
| 66 | |||
| 67 | return !!of_flat_dt_is_compatible(root, "fsl,qemu-e500"); | ||
| 68 | } | 66 | } |
| 69 | 67 | ||
| 70 | machine_arch_initcall(qemu_e500, mpc85xx_common_publish_devices); | 68 | machine_arch_initcall(qemu_e500, mpc85xx_common_publish_devices); |
diff --git a/arch/powerpc/platforms/85xx/sbc8548.c b/arch/powerpc/platforms/85xx/sbc8548.c index b07214666d65..62b6c45a5a9b 100644 --- a/arch/powerpc/platforms/85xx/sbc8548.c +++ b/arch/powerpc/platforms/85xx/sbc8548.c | |||
| @@ -120,9 +120,7 @@ machine_arch_initcall(sbc8548, mpc85xx_common_publish_devices); | |||
| 120 | */ | 120 | */ |
| 121 | static int __init sbc8548_probe(void) | 121 | static int __init sbc8548_probe(void) |
| 122 | { | 122 | { |
| 123 | unsigned long root = of_get_flat_dt_root(); | 123 | return of_machine_is_compatible("SBC8548"); |
| 124 | |||
| 125 | return of_flat_dt_is_compatible(root, "SBC8548"); | ||
| 126 | } | 124 | } |
| 127 | 125 | ||
| 128 | define_machine(sbc8548) { | 126 | define_machine(sbc8548) { |
diff --git a/arch/powerpc/platforms/85xx/socrates.c b/arch/powerpc/platforms/85xx/socrates.c index ae368e0e1076..cd255acde2e2 100644 --- a/arch/powerpc/platforms/85xx/socrates.c +++ b/arch/powerpc/platforms/85xx/socrates.c | |||
| @@ -79,9 +79,7 @@ machine_arch_initcall(socrates, mpc85xx_common_publish_devices); | |||
| 79 | */ | 79 | */ |
| 80 | static int __init socrates_probe(void) | 80 | static int __init socrates_probe(void) |
| 81 | { | 81 | { |
| 82 | unsigned long root = of_get_flat_dt_root(); | 82 | if (of_machine_is_compatible("abb,socrates")) |
| 83 | |||
| 84 | if (of_flat_dt_is_compatible(root, "abb,socrates")) | ||
| 85 | return 1; | 83 | return 1; |
| 86 | 84 | ||
| 87 | return 0; | 85 | return 0; |
diff --git a/arch/powerpc/platforms/85xx/stx_gp3.c b/arch/powerpc/platforms/85xx/stx_gp3.c index 6f4939b6309e..91b824c4dc08 100644 --- a/arch/powerpc/platforms/85xx/stx_gp3.c +++ b/arch/powerpc/platforms/85xx/stx_gp3.c | |||
| @@ -93,9 +93,7 @@ machine_arch_initcall(stx_gp3, mpc85xx_common_publish_devices); | |||
| 93 | */ | 93 | */ |
| 94 | static int __init stx_gp3_probe(void) | 94 | static int __init stx_gp3_probe(void) |
| 95 | { | 95 | { |
| 96 | unsigned long root = of_get_flat_dt_root(); | 96 | return of_machine_is_compatible("stx,gp3-8560"); |
| 97 | |||
| 98 | return of_flat_dt_is_compatible(root, "stx,gp3-8560"); | ||
| 99 | } | 97 | } |
| 100 | 98 | ||
| 101 | define_machine(stx_gp3) { | 99 | define_machine(stx_gp3) { |
diff --git a/arch/powerpc/platforms/85xx/tqm85xx.c b/arch/powerpc/platforms/85xx/tqm85xx.c index ec0b7272fae2..b7c54454d611 100644 --- a/arch/powerpc/platforms/85xx/tqm85xx.c +++ b/arch/powerpc/platforms/85xx/tqm85xx.c | |||
| @@ -122,7 +122,7 @@ static const char * const board[] __initconst = { | |||
| 122 | */ | 122 | */ |
| 123 | static int __init tqm85xx_probe(void) | 123 | static int __init tqm85xx_probe(void) |
| 124 | { | 124 | { |
| 125 | return of_flat_dt_match(of_get_flat_dt_root(), board); | 125 | return of_device_compatible_match(of_root, board); |
| 126 | } | 126 | } |
| 127 | 127 | ||
| 128 | define_machine(tqm85xx) { | 128 | define_machine(tqm85xx) { |
diff --git a/arch/powerpc/platforms/85xx/twr_p102x.c b/arch/powerpc/platforms/85xx/twr_p102x.c index 71bc255b4324..1bc02a87f597 100644 --- a/arch/powerpc/platforms/85xx/twr_p102x.c +++ b/arch/powerpc/platforms/85xx/twr_p102x.c | |||
| @@ -128,9 +128,7 @@ machine_arch_initcall(twr_p1025, mpc85xx_common_publish_devices); | |||
| 128 | 128 | ||
| 129 | static int __init twr_p1025_probe(void) | 129 | static int __init twr_p1025_probe(void) |
| 130 | { | 130 | { |
| 131 | unsigned long root = of_get_flat_dt_root(); | 131 | return of_machine_is_compatible("fsl,TWR-P1025"); |
| 132 | |||
| 133 | return of_flat_dt_is_compatible(root, "fsl,TWR-P1025"); | ||
| 134 | } | 132 | } |
| 135 | 133 | ||
| 136 | define_machine(twr_p1025) { | 134 | define_machine(twr_p1025) { |
diff --git a/arch/powerpc/platforms/85xx/xes_mpc85xx.c b/arch/powerpc/platforms/85xx/xes_mpc85xx.c index 1a9c1085855f..cf0c70ff026e 100644 --- a/arch/powerpc/platforms/85xx/xes_mpc85xx.c +++ b/arch/powerpc/platforms/85xx/xes_mpc85xx.c | |||
| @@ -144,23 +144,17 @@ machine_arch_initcall(xes_mpc8540, mpc85xx_common_publish_devices); | |||
| 144 | */ | 144 | */ |
| 145 | static int __init xes_mpc8572_probe(void) | 145 | static int __init xes_mpc8572_probe(void) |
| 146 | { | 146 | { |
| 147 | unsigned long root = of_get_flat_dt_root(); | 147 | return of_machine_is_compatible("xes,MPC8572"); |
| 148 | |||
| 149 | return of_flat_dt_is_compatible(root, "xes,MPC8572"); | ||
| 150 | } | 148 | } |
| 151 | 149 | ||
| 152 | static int __init xes_mpc8548_probe(void) | 150 | static int __init xes_mpc8548_probe(void) |
| 153 | { | 151 | { |
| 154 | unsigned long root = of_get_flat_dt_root(); | 152 | return of_machine_is_compatible("xes,MPC8548"); |
| 155 | |||
| 156 | return of_flat_dt_is_compatible(root, "xes,MPC8548"); | ||
| 157 | } | 153 | } |
| 158 | 154 | ||
| 159 | static int __init xes_mpc8540_probe(void) | 155 | static int __init xes_mpc8540_probe(void) |
| 160 | { | 156 | { |
| 161 | unsigned long root = of_get_flat_dt_root(); | 157 | return of_machine_is_compatible("xes,MPC8540"); |
| 162 | |||
| 163 | return of_flat_dt_is_compatible(root, "xes,MPC8540"); | ||
| 164 | } | 158 | } |
| 165 | 159 | ||
| 166 | define_machine(xes_mpc8572) { | 160 | define_machine(xes_mpc8572) { |
diff --git a/arch/powerpc/platforms/86xx/Kconfig b/arch/powerpc/platforms/86xx/Kconfig index 3988f16e46c1..ce619bd1f82d 100644 --- a/arch/powerpc/platforms/86xx/Kconfig +++ b/arch/powerpc/platforms/86xx/Kconfig | |||
| @@ -60,6 +60,11 @@ config GEF_SBC610 | |||
| 60 | help | 60 | help |
| 61 | This option enables support for the GE SBC610. | 61 | This option enables support for the GE SBC610. |
| 62 | 62 | ||
| 63 | config MVME7100 | ||
| 64 | bool "Artesyn MVME7100" | ||
| 65 | help | ||
| 66 | This option enables support for the Emerson/Artesyn MVME7100 board. | ||
| 67 | |||
| 63 | endif | 68 | endif |
| 64 | 69 | ||
| 65 | config MPC8641 | 70 | config MPC8641 |
| @@ -68,7 +73,8 @@ config MPC8641 | |||
| 68 | select FSL_PCI if PCI | 73 | select FSL_PCI if PCI |
| 69 | select PPC_UDBG_16550 | 74 | select PPC_UDBG_16550 |
| 70 | select MPIC | 75 | select MPIC |
| 71 | default y if MPC8641_HPCN || SBC8641D || GEF_SBC610 || GEF_SBC310 || GEF_PPC9A | 76 | default y if MPC8641_HPCN || SBC8641D || GEF_SBC610 || GEF_SBC310 || GEF_PPC9A \ |
| 77 | || MVME7100 | ||
| 72 | 78 | ||
| 73 | config MPC8610 | 79 | config MPC8610 |
| 74 | bool | 80 | bool |
diff --git a/arch/powerpc/platforms/86xx/Makefile b/arch/powerpc/platforms/86xx/Makefile index 2d889ad7dc89..01958fedc3f2 100644 --- a/arch/powerpc/platforms/86xx/Makefile +++ b/arch/powerpc/platforms/86xx/Makefile | |||
| @@ -10,3 +10,4 @@ obj-$(CONFIG_MPC8610_HPCD) += mpc8610_hpcd.o | |||
| 10 | obj-$(CONFIG_GEF_SBC610) += gef_sbc610.o | 10 | obj-$(CONFIG_GEF_SBC610) += gef_sbc610.o |
| 11 | obj-$(CONFIG_GEF_SBC310) += gef_sbc310.o | 11 | obj-$(CONFIG_GEF_SBC310) += gef_sbc310.o |
| 12 | obj-$(CONFIG_GEF_PPC9A) += gef_ppc9a.o | 12 | obj-$(CONFIG_GEF_PPC9A) += gef_ppc9a.o |
| 13 | obj-$(CONFIG_MVME7100) += mvme7100.o | ||
diff --git a/arch/powerpc/platforms/86xx/gef_ppc9a.c b/arch/powerpc/platforms/86xx/gef_ppc9a.c index 8e63b752712c..ef684afb63c6 100644 --- a/arch/powerpc/platforms/86xx/gef_ppc9a.c +++ b/arch/powerpc/platforms/86xx/gef_ppc9a.c | |||
| @@ -189,9 +189,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB, | |||
| 189 | */ | 189 | */ |
| 190 | static int __init gef_ppc9a_probe(void) | 190 | static int __init gef_ppc9a_probe(void) |
| 191 | { | 191 | { |
| 192 | unsigned long root = of_get_flat_dt_root(); | 192 | if (of_machine_is_compatible("gef,ppc9a")) |
| 193 | |||
| 194 | if (of_flat_dt_is_compatible(root, "gef,ppc9a")) | ||
| 195 | return 1; | 193 | return 1; |
| 196 | 194 | ||
| 197 | return 0; | 195 | return 0; |
diff --git a/arch/powerpc/platforms/86xx/gef_sbc310.c b/arch/powerpc/platforms/86xx/gef_sbc310.c index 0e0be94f551f..67dd0c231646 100644 --- a/arch/powerpc/platforms/86xx/gef_sbc310.c +++ b/arch/powerpc/platforms/86xx/gef_sbc310.c | |||
| @@ -176,9 +176,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB, | |||
| 176 | */ | 176 | */ |
| 177 | static int __init gef_sbc310_probe(void) | 177 | static int __init gef_sbc310_probe(void) |
| 178 | { | 178 | { |
| 179 | unsigned long root = of_get_flat_dt_root(); | 179 | if (of_machine_is_compatible("gef,sbc310")) |
| 180 | |||
| 181 | if (of_flat_dt_is_compatible(root, "gef,sbc310")) | ||
| 182 | return 1; | 180 | return 1; |
| 183 | 181 | ||
| 184 | return 0; | 182 | return 0; |
diff --git a/arch/powerpc/platforms/86xx/gef_sbc610.c b/arch/powerpc/platforms/86xx/gef_sbc610.c index e8292b492d7e..805026976cac 100644 --- a/arch/powerpc/platforms/86xx/gef_sbc610.c +++ b/arch/powerpc/platforms/86xx/gef_sbc610.c | |||
| @@ -166,9 +166,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB, | |||
| 166 | */ | 166 | */ |
| 167 | static int __init gef_sbc610_probe(void) | 167 | static int __init gef_sbc610_probe(void) |
| 168 | { | 168 | { |
| 169 | unsigned long root = of_get_flat_dt_root(); | 169 | if (of_machine_is_compatible("gef,sbc610")) |
| 170 | |||
| 171 | if (of_flat_dt_is_compatible(root, "gef,sbc610")) | ||
| 172 | return 1; | 170 | return 1; |
| 173 | 171 | ||
| 174 | return 0; | 172 | return 0; |
diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c index 957473e5c8e5..fef0582eddf1 100644 --- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c +++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c | |||
| @@ -319,9 +319,7 @@ static void __init mpc86xx_hpcd_setup_arch(void) | |||
| 319 | */ | 319 | */ |
| 320 | static int __init mpc86xx_hpcd_probe(void) | 320 | static int __init mpc86xx_hpcd_probe(void) |
| 321 | { | 321 | { |
| 322 | unsigned long root = of_get_flat_dt_root(); | 322 | if (of_machine_is_compatible("fsl,MPC8610HPCD")) |
| 323 | |||
| 324 | if (of_flat_dt_is_compatible(root, "fsl,MPC8610HPCD")) | ||
| 325 | return 1; /* Looks good */ | 323 | return 1; /* Looks good */ |
| 326 | 324 | ||
| 327 | return 0; | 325 | return 0; |
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c index e5084811b9c6..5ae42a037065 100644 --- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c +++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | |||
| @@ -96,13 +96,11 @@ mpc86xx_hpcn_show_cpuinfo(struct seq_file *m) | |||
| 96 | */ | 96 | */ |
| 97 | static int __init mpc86xx_hpcn_probe(void) | 97 | static int __init mpc86xx_hpcn_probe(void) |
| 98 | { | 98 | { |
| 99 | unsigned long root = of_get_flat_dt_root(); | 99 | if (of_machine_is_compatible("fsl,mpc8641hpcn")) |
| 100 | |||
| 101 | if (of_flat_dt_is_compatible(root, "fsl,mpc8641hpcn")) | ||
| 102 | return 1; /* Looks good */ | 100 | return 1; /* Looks good */ |
| 103 | 101 | ||
| 104 | /* Be nice and don't give silent boot death. Delete this in 2.6.27 */ | 102 | /* Be nice and don't give silent boot death. Delete this in 2.6.27 */ |
| 105 | if (of_flat_dt_is_compatible(root, "mpc86xx")) { | 103 | if (of_machine_is_compatible("mpc86xx")) { |
| 106 | pr_warning("WARNING: your dts/dtb is old. You must update before the next kernel release\n"); | 104 | pr_warning("WARNING: your dts/dtb is old. You must update before the next kernel release\n"); |
| 107 | return 1; | 105 | return 1; |
| 108 | } | 106 | } |
diff --git a/arch/powerpc/platforms/86xx/mvme7100.c b/arch/powerpc/platforms/86xx/mvme7100.c new file mode 100644 index 000000000000..addb41e7cd14 --- /dev/null +++ b/arch/powerpc/platforms/86xx/mvme7100.c | |||
| @@ -0,0 +1,121 @@ | |||
| 1 | /* | ||
| 2 | * Board setup routines for the Emerson/Artesyn MVME7100 | ||
| 3 | * | ||
| 4 | * Copyright 2016 Elettra-Sincrotrone Trieste S.C.p.A. | ||
| 5 | * | ||
| 6 | * Author: Alessio Igor Bogani <alessio.bogani@elettra.eu> | ||
| 7 | * | ||
| 8 | * Based on earlier code by: | ||
| 9 | * | ||
| 10 | * Ajit Prem <ajit.prem@emerson.com> | ||
| 11 | * Copyright 2008 Emerson | ||
| 12 | * | ||
| 13 | * USB host fixup is borrowed by: | ||
| 14 | * | ||
| 15 | * Martyn Welch <martyn.welch@ge.com> | ||
| 16 | * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc. | ||
| 17 | * | ||
| 18 | * This program is free software; you can redistribute it and/or modify it | ||
| 19 | * under the terms of the GNU General Public License as published by the | ||
| 20 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 21 | * option) any later version. | ||
| 22 | * | ||
| 23 | */ | ||
| 24 | |||
| 25 | #include <linux/pci.h> | ||
| 26 | #include <linux/of.h> | ||
| 27 | #include <linux/of_platform.h> | ||
| 28 | #include <linux/of_address.h> | ||
| 29 | #include <asm/udbg.h> | ||
| 30 | #include <asm/mpic.h> | ||
| 31 | #include <sysdev/fsl_soc.h> | ||
| 32 | #include <sysdev/fsl_pci.h> | ||
| 33 | |||
| 34 | #include "mpc86xx.h" | ||
| 35 | |||
| 36 | #define MVME7100_INTERRUPT_REG_2_OFFSET 0x05 | ||
| 37 | #define MVME7100_DS1375_MASK 0x40 | ||
| 38 | #define MVME7100_MAX6649_MASK 0x20 | ||
| 39 | #define MVME7100_ABORT_MASK 0x10 | ||
| 40 | |||
| 41 | /* | ||
| 42 | * Setup the architecture | ||
| 43 | */ | ||
| 44 | static void __init mvme7100_setup_arch(void) | ||
| 45 | { | ||
| 46 | struct device_node *bcsr_node; | ||
| 47 | void __iomem *mvme7100_regs = NULL; | ||
| 48 | u8 reg; | ||
| 49 | |||
| 50 | if (ppc_md.progress) | ||
| 51 | ppc_md.progress("mvme7100_setup_arch()", 0); | ||
| 52 | |||
| 53 | #ifdef CONFIG_SMP | ||
| 54 | mpc86xx_smp_init(); | ||
| 55 | #endif | ||
| 56 | |||
| 57 | fsl_pci_assign_primary(); | ||
| 58 | |||
| 59 | /* Remap BCSR registers */ | ||
| 60 | bcsr_node = of_find_compatible_node(NULL, NULL, | ||
| 61 | "artesyn,mvme7100-bcsr"); | ||
| 62 | if (bcsr_node) { | ||
| 63 | mvme7100_regs = of_iomap(bcsr_node, 0); | ||
| 64 | of_node_put(bcsr_node); | ||
| 65 | } | ||
| 66 | |||
| 67 | if (mvme7100_regs) { | ||
| 68 | /* Disable ds1375, max6649, and abort interrupts */ | ||
| 69 | reg = readb(mvme7100_regs + MVME7100_INTERRUPT_REG_2_OFFSET); | ||
| 70 | reg |= MVME7100_DS1375_MASK | MVME7100_MAX6649_MASK | ||
| 71 | | MVME7100_ABORT_MASK; | ||
| 72 | writeb(reg, mvme7100_regs + MVME7100_INTERRUPT_REG_2_OFFSET); | ||
| 73 | } else | ||
| 74 | pr_warn("Unable to map board registers\n"); | ||
| 75 | |||
| 76 | pr_info("MVME7100 board from Artesyn\n"); | ||
| 77 | } | ||
| 78 | |||
| 79 | /* | ||
| 80 | * Called very early, device-tree isn't unflattened | ||
| 81 | */ | ||
| 82 | static int __init mvme7100_probe(void) | ||
| 83 | { | ||
| 84 | unsigned long root = of_get_flat_dt_root(); | ||
| 85 | |||
| 86 | return of_flat_dt_is_compatible(root, "artesyn,MVME7100"); | ||
| 87 | } | ||
| 88 | |||
| 89 | static void mvme7100_usb_host_fixup(struct pci_dev *pdev) | ||
| 90 | { | ||
| 91 | unsigned int val; | ||
| 92 | |||
| 93 | if (!machine_is(mvme7100)) | ||
| 94 | return; | ||
| 95 | |||
| 96 | /* Ensure only ports 1 & 2 are enabled */ | ||
| 97 | pci_read_config_dword(pdev, 0xe0, &val); | ||
| 98 | pci_write_config_dword(pdev, 0xe0, (val & ~7) | 0x2); | ||
| 99 | |||
| 100 | /* System clock is 48-MHz Oscillator and EHCI Enabled. */ | ||
| 101 | pci_write_config_dword(pdev, 0xe4, 1 << 5); | ||
| 102 | } | ||
| 103 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB, | ||
| 104 | mvme7100_usb_host_fixup); | ||
| 105 | |||
| 106 | machine_arch_initcall(mvme7100, mpc86xx_common_publish_devices); | ||
| 107 | |||
| 108 | define_machine(mvme7100) { | ||
| 109 | .name = "MVME7100", | ||
| 110 | .probe = mvme7100_probe, | ||
| 111 | .setup_arch = mvme7100_setup_arch, | ||
| 112 | .init_IRQ = mpc86xx_init_irq, | ||
| 113 | .get_irq = mpic_get_irq, | ||
| 114 | .restart = fsl_rstcr_restart, | ||
| 115 | .time_init = mpc86xx_time_init, | ||
| 116 | .calibrate_decr = generic_calibrate_decr, | ||
| 117 | .progress = udbg_progress, | ||
| 118 | #ifdef CONFIG_PCI | ||
| 119 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | ||
| 120 | #endif | ||
| 121 | }; | ||
diff --git a/arch/powerpc/platforms/86xx/sbc8641d.c b/arch/powerpc/platforms/86xx/sbc8641d.c index 2a9cf278c12a..52af5735742e 100644 --- a/arch/powerpc/platforms/86xx/sbc8641d.c +++ b/arch/powerpc/platforms/86xx/sbc8641d.c | |||
| @@ -67,9 +67,7 @@ sbc8641_show_cpuinfo(struct seq_file *m) | |||
| 67 | */ | 67 | */ |
| 68 | static int __init sbc8641_probe(void) | 68 | static int __init sbc8641_probe(void) |
| 69 | { | 69 | { |
| 70 | unsigned long root = of_get_flat_dt_root(); | 70 | if (of_machine_is_compatible("wind,sbc8641")) |
| 71 | |||
| 72 | if (of_flat_dt_is_compatible(root, "wind,sbc8641")) | ||
| 73 | return 1; /* Looks good */ | 71 | return 1; /* Looks good */ |
| 74 | 72 | ||
| 75 | return 0; | 73 | return 0; |
diff --git a/arch/powerpc/platforms/8xx/adder875.c b/arch/powerpc/platforms/8xx/adder875.c index 61cae4c1edb8..333dece79394 100644 --- a/arch/powerpc/platforms/8xx/adder875.c +++ b/arch/powerpc/platforms/8xx/adder875.c | |||
| @@ -88,8 +88,7 @@ static void __init adder875_setup(void) | |||
| 88 | 88 | ||
| 89 | static int __init adder875_probe(void) | 89 | static int __init adder875_probe(void) |
| 90 | { | 90 | { |
| 91 | unsigned long root = of_get_flat_dt_root(); | 91 | return of_machine_is_compatible("analogue-and-micro,adder875"); |
| 92 | return of_flat_dt_is_compatible(root, "analogue-and-micro,adder875"); | ||
| 93 | } | 92 | } |
| 94 | 93 | ||
| 95 | static const struct of_device_id of_bus_ids[] __initconst = { | 94 | static const struct of_device_id of_bus_ids[] __initconst = { |
diff --git a/arch/powerpc/platforms/8xx/ep88xc.c b/arch/powerpc/platforms/8xx/ep88xc.c index 2bedeb7d5f8f..cd0d90f1fb1c 100644 --- a/arch/powerpc/platforms/8xx/ep88xc.c +++ b/arch/powerpc/platforms/8xx/ep88xc.c | |||
| @@ -143,8 +143,7 @@ static void __init ep88xc_setup_arch(void) | |||
| 143 | 143 | ||
| 144 | static int __init ep88xc_probe(void) | 144 | static int __init ep88xc_probe(void) |
| 145 | { | 145 | { |
| 146 | unsigned long root = of_get_flat_dt_root(); | 146 | return of_machine_is_compatible("fsl,ep88xc"); |
| 147 | return of_flat_dt_is_compatible(root, "fsl,ep88xc"); | ||
| 148 | } | 147 | } |
| 149 | 148 | ||
| 150 | static const struct of_device_id of_bus_ids[] __initconst = { | 149 | static const struct of_device_id of_bus_ids[] __initconst = { |
diff --git a/arch/powerpc/platforms/8xx/m8xx_setup.c b/arch/powerpc/platforms/8xx/m8xx_setup.c index c289fc77b4ba..b1ab6e96cb31 100644 --- a/arch/powerpc/platforms/8xx/m8xx_setup.c +++ b/arch/powerpc/platforms/8xx/m8xx_setup.c | |||
| @@ -198,7 +198,7 @@ void mpc8xx_get_rtc_time(struct rtc_time *tm) | |||
| 198 | return; | 198 | return; |
| 199 | } | 199 | } |
| 200 | 200 | ||
| 201 | void mpc8xx_restart(char *cmd) | 201 | void __noreturn mpc8xx_restart(char *cmd) |
| 202 | { | 202 | { |
| 203 | car8xx_t __iomem *clk_r = immr_map(im_clkrst); | 203 | car8xx_t __iomem *clk_r = immr_map(im_clkrst); |
| 204 | 204 | ||
diff --git a/arch/powerpc/platforms/8xx/mpc86xads_setup.c b/arch/powerpc/platforms/8xx/mpc86xads_setup.c index 78180c5e73ff..8d02f5ff4481 100644 --- a/arch/powerpc/platforms/8xx/mpc86xads_setup.c +++ b/arch/powerpc/platforms/8xx/mpc86xads_setup.c | |||
| @@ -118,8 +118,7 @@ static void __init mpc86xads_setup_arch(void) | |||
| 118 | 118 | ||
| 119 | static int __init mpc86xads_probe(void) | 119 | static int __init mpc86xads_probe(void) |
| 120 | { | 120 | { |
| 121 | unsigned long root = of_get_flat_dt_root(); | 121 | return of_machine_is_compatible("fsl,mpc866ads"); |
| 122 | return of_flat_dt_is_compatible(root, "fsl,mpc866ads"); | ||
| 123 | } | 122 | } |
| 124 | 123 | ||
| 125 | static const struct of_device_id of_bus_ids[] __initconst = { | 124 | static const struct of_device_id of_bus_ids[] __initconst = { |
diff --git a/arch/powerpc/platforms/8xx/mpc885ads_setup.c b/arch/powerpc/platforms/8xx/mpc885ads_setup.c index 4d62bf9dc789..e821a42d5816 100644 --- a/arch/powerpc/platforms/8xx/mpc885ads_setup.c +++ b/arch/powerpc/platforms/8xx/mpc885ads_setup.c | |||
| @@ -193,8 +193,7 @@ static void __init mpc885ads_setup_arch(void) | |||
| 193 | 193 | ||
| 194 | static int __init mpc885ads_probe(void) | 194 | static int __init mpc885ads_probe(void) |
| 195 | { | 195 | { |
| 196 | unsigned long root = of_get_flat_dt_root(); | 196 | return of_machine_is_compatible("fsl,mpc885ads"); |
| 197 | return of_flat_dt_is_compatible(root, "fsl,mpc885ads"); | ||
| 198 | } | 197 | } |
| 199 | 198 | ||
| 200 | static const struct of_device_id of_bus_ids[] __initconst = { | 199 | static const struct of_device_id of_bus_ids[] __initconst = { |
diff --git a/arch/powerpc/platforms/8xx/mpc8xx.h b/arch/powerpc/platforms/8xx/mpc8xx.h index 239a243a6161..31cc2ecace42 100644 --- a/arch/powerpc/platforms/8xx/mpc8xx.h +++ b/arch/powerpc/platforms/8xx/mpc8xx.h | |||
| @@ -11,7 +11,7 @@ | |||
| 11 | #ifndef __MPC8xx_H | 11 | #ifndef __MPC8xx_H |
| 12 | #define __MPC8xx_H | 12 | #define __MPC8xx_H |
| 13 | 13 | ||
| 14 | extern void mpc8xx_restart(char *cmd); | 14 | extern void __noreturn mpc8xx_restart(char *cmd); |
| 15 | extern void mpc8xx_calibrate_decr(void); | 15 | extern void mpc8xx_calibrate_decr(void); |
| 16 | extern int mpc8xx_set_rtc_time(struct rtc_time *tm); | 16 | extern int mpc8xx_set_rtc_time(struct rtc_time *tm); |
| 17 | extern void mpc8xx_get_rtc_time(struct rtc_time *tm); | 17 | extern void mpc8xx_get_rtc_time(struct rtc_time *tm); |
diff --git a/arch/powerpc/platforms/8xx/tqm8xx_setup.c b/arch/powerpc/platforms/8xx/tqm8xx_setup.c index bee47a2b23e6..4cea8b1afa44 100644 --- a/arch/powerpc/platforms/8xx/tqm8xx_setup.c +++ b/arch/powerpc/platforms/8xx/tqm8xx_setup.c | |||
| @@ -119,9 +119,7 @@ static void __init tqm8xx_setup_arch(void) | |||
| 119 | 119 | ||
| 120 | static int __init tqm8xx_probe(void) | 120 | static int __init tqm8xx_probe(void) |
| 121 | { | 121 | { |
| 122 | unsigned long node = of_get_flat_dt_root(); | 122 | return of_machine_is_compatible("tqc,tqm8xx"); |
| 123 | |||
| 124 | return of_flat_dt_is_compatible(node, "tqc,tqm8xx"); | ||
| 125 | } | 123 | } |
| 126 | 124 | ||
| 127 | static const struct of_device_id of_bus_ids[] __initconst = { | 125 | static const struct of_device_id of_bus_ids[] __initconst = { |
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype index 77e9b8d591fb..f32edec13fd1 100644 --- a/arch/powerpc/platforms/Kconfig.cputype +++ b/arch/powerpc/platforms/Kconfig.cputype | |||
| @@ -1,7 +1,6 @@ | |||
| 1 | config PPC64 | 1 | config PPC64 |
| 2 | bool "64-bit kernel" | 2 | bool "64-bit kernel" |
| 3 | default n | 3 | default n |
| 4 | select HAVE_VIRT_CPU_ACCOUNTING | ||
| 5 | select ZLIB_DEFLATE | 4 | select ZLIB_DEFLATE |
| 6 | help | 5 | help |
| 7 | This option selects whether a 32-bit or a 64-bit kernel | 6 | This option selects whether a 32-bit or a 64-bit kernel |
diff --git a/arch/powerpc/platforms/amigaone/setup.c b/arch/powerpc/platforms/amigaone/setup.c index 2fe12046279e..45cb9821173c 100644 --- a/arch/powerpc/platforms/amigaone/setup.c +++ b/arch/powerpc/platforms/amigaone/setup.c | |||
| @@ -123,7 +123,7 @@ static int __init request_isa_regions(void) | |||
| 123 | } | 123 | } |
| 124 | machine_device_initcall(amigaone, request_isa_regions); | 124 | machine_device_initcall(amigaone, request_isa_regions); |
| 125 | 125 | ||
| 126 | void amigaone_restart(char *cmd) | 126 | void __noreturn amigaone_restart(char *cmd) |
| 127 | { | 127 | { |
| 128 | local_irq_disable(); | 128 | local_irq_disable(); |
| 129 | 129 | ||
| @@ -143,9 +143,7 @@ void amigaone_restart(char *cmd) | |||
| 143 | 143 | ||
| 144 | static int __init amigaone_probe(void) | 144 | static int __init amigaone_probe(void) |
| 145 | { | 145 | { |
| 146 | unsigned long root = of_get_flat_dt_root(); | 146 | if (of_machine_is_compatible("eyetech,amigaone")) { |
| 147 | |||
| 148 | if (of_flat_dt_is_compatible(root, "eyetech,amigaone")) { | ||
| 149 | /* | 147 | /* |
| 150 | * Coherent memory access cause complete system lockup! Thus | 148 | * Coherent memory access cause complete system lockup! Thus |
| 151 | * disable this CPU feature, even if the CPU needs it. | 149 | * disable this CPU feature, even if the CPU needs it. |
diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c index 14a582b21274..9027d7c48507 100644 --- a/arch/powerpc/platforms/cell/iommu.c +++ b/arch/powerpc/platforms/cell/iommu.c | |||
| @@ -178,7 +178,7 @@ static int tce_build_cell(struct iommu_table *tbl, long index, long npages, | |||
| 178 | * default for now.*/ | 178 | * default for now.*/ |
| 179 | #ifdef CELL_IOMMU_STRICT_PROTECTION | 179 | #ifdef CELL_IOMMU_STRICT_PROTECTION |
| 180 | /* to avoid referencing a global, we use a trick here to setup the | 180 | /* to avoid referencing a global, we use a trick here to setup the |
| 181 | * protection bit. "prot" is setup to be 3 fields of 4 bits apprended | 181 | * protection bit. "prot" is setup to be 3 fields of 4 bits appended |
| 182 | * together for each of the 3 supported direction values. It is then | 182 | * together for each of the 3 supported direction values. It is then |
| 183 | * shifted left so that the fields matching the desired direction | 183 | * shifted left so that the fields matching the desired direction |
| 184 | * lands on the appropriate bits, and other bits are masked out. | 184 | * lands on the appropriate bits, and other bits are masked out. |
| @@ -338,7 +338,7 @@ static unsigned long *cell_iommu_alloc_ptab(struct cbe_iommu *iommu, | |||
| 338 | start_seg = base >> IO_SEGMENT_SHIFT; | 338 | start_seg = base >> IO_SEGMENT_SHIFT; |
| 339 | segments = size >> IO_SEGMENT_SHIFT; | 339 | segments = size >> IO_SEGMENT_SHIFT; |
| 340 | pages_per_segment = 1ull << IO_PAGENO_BITS(page_shift); | 340 | pages_per_segment = 1ull << IO_PAGENO_BITS(page_shift); |
| 341 | /* PTEs for each segment must start on a 4K bounday */ | 341 | /* PTEs for each segment must start on a 4K boundary */ |
| 342 | pages_per_segment = max(pages_per_segment, | 342 | pages_per_segment = max(pages_per_segment, |
| 343 | (1 << 12) / sizeof(unsigned long)); | 343 | (1 << 12) / sizeof(unsigned long)); |
| 344 | 344 | ||
diff --git a/arch/powerpc/platforms/cell/setup.c b/arch/powerpc/platforms/cell/setup.c index 36cff28d0293..d3543e68efe8 100644 --- a/arch/powerpc/platforms/cell/setup.c +++ b/arch/powerpc/platforms/cell/setup.c | |||
| @@ -255,13 +255,10 @@ static void __init cell_setup_arch(void) | |||
| 255 | 255 | ||
| 256 | static int __init cell_probe(void) | 256 | static int __init cell_probe(void) |
| 257 | { | 257 | { |
| 258 | unsigned long root = of_get_flat_dt_root(); | 258 | if (!of_machine_is_compatible("IBM,CBEA") && |
| 259 | 259 | !of_machine_is_compatible("IBM,CPBW-1.0")) | |
| 260 | if (!of_flat_dt_is_compatible(root, "IBM,CBEA") && | ||
| 261 | !of_flat_dt_is_compatible(root, "IBM,CPBW-1.0")) | ||
| 262 | return 0; | 260 | return 0; |
| 263 | 261 | ||
| 264 | hpte_init_native(); | ||
| 265 | pm_power_off = rtas_power_off; | 262 | pm_power_off = rtas_power_off; |
| 266 | 263 | ||
| 267 | return 1; | 264 | return 1; |
diff --git a/arch/powerpc/platforms/cell/spider-pic.c b/arch/powerpc/platforms/cell/spider-pic.c index 54ee5743cb72..d06dcac66fcb 100644 --- a/arch/powerpc/platforms/cell/spider-pic.c +++ b/arch/powerpc/platforms/cell/spider-pic.c | |||
| @@ -217,7 +217,7 @@ static void spider_irq_cascade(struct irq_desc *desc) | |||
| 217 | chip->irq_eoi(&desc->irq_data); | 217 | chip->irq_eoi(&desc->irq_data); |
| 218 | } | 218 | } |
| 219 | 219 | ||
| 220 | /* For hooking up the cascace we have a problem. Our device-tree is | 220 | /* For hooking up the cascade we have a problem. Our device-tree is |
| 221 | * crap and we don't know on which BE iic interrupt we are hooked on at | 221 | * crap and we don't know on which BE iic interrupt we are hooked on at |
| 222 | * least not the "standard" way. We can reconstitute it based on two | 222 | * least not the "standard" way. We can reconstitute it based on two |
| 223 | * informations though: which BE node we are connected to and whether | 223 | * informations though: which BE node we are connected to and whether |
diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c index 3cbe38fad609..bb4a8e07c229 100644 --- a/arch/powerpc/platforms/cell/spu_base.c +++ b/arch/powerpc/platforms/cell/spu_base.c | |||
| @@ -69,7 +69,7 @@ static DEFINE_SPINLOCK(spu_lock); | |||
| 69 | * spu_full_list_lock and spu_full_list_mutex held, while iterating | 69 | * spu_full_list_lock and spu_full_list_mutex held, while iterating |
| 70 | * through it requires either of these locks. | 70 | * through it requires either of these locks. |
| 71 | * | 71 | * |
| 72 | * In addition spu_full_list_lock protects all assignmens to | 72 | * In addition spu_full_list_lock protects all assignments to |
| 73 | * spu->mm. | 73 | * spu->mm. |
| 74 | */ | 74 | */ |
| 75 | static LIST_HEAD(spu_full_list); | 75 | static LIST_HEAD(spu_full_list); |
| @@ -253,7 +253,7 @@ static inline int __slb_present(struct copro_slb *slbs, int nr_slbs, | |||
| 253 | * Setup the SPU kernel SLBs, in preparation for a context save/restore. We | 253 | * Setup the SPU kernel SLBs, in preparation for a context save/restore. We |
| 254 | * need to map both the context save area, and the save/restore code. | 254 | * need to map both the context save area, and the save/restore code. |
| 255 | * | 255 | * |
| 256 | * Because the lscsa and code may cross segment boundaires, we check to see | 256 | * Because the lscsa and code may cross segment boundaries, we check to see |
| 257 | * if mappings are required for the start and end of each range. We currently | 257 | * if mappings are required for the start and end of each range. We currently |
| 258 | * assume that the mappings are smaller that one segment - if not, something | 258 | * assume that the mappings are smaller that one segment - if not, something |
| 259 | * is seriously wrong. | 259 | * is seriously wrong. |
diff --git a/arch/powerpc/platforms/cell/spu_manage.c b/arch/powerpc/platforms/cell/spu_manage.c index c3327f3d8cf7..21b4bfb97200 100644 --- a/arch/powerpc/platforms/cell/spu_manage.c +++ b/arch/powerpc/platforms/cell/spu_manage.c | |||
| @@ -535,8 +535,7 @@ static int __init init_affinity(void) | |||
| 535 | if (of_has_vicinity()) { | 535 | if (of_has_vicinity()) { |
| 536 | init_affinity_fw(); | 536 | init_affinity_fw(); |
| 537 | } else { | 537 | } else { |
| 538 | long root = of_get_flat_dt_root(); | 538 | if (of_machine_is_compatible("IBM,CPBW-1.0")) |
| 539 | if (of_flat_dt_is_compatible(root, "IBM,CPBW-1.0")) | ||
| 540 | init_affinity_qs20_harcoded(); | 539 | init_affinity_qs20_harcoded(); |
| 541 | else | 540 | else |
| 542 | printk("No affinity configuration found\n"); | 541 | printk("No affinity configuration found\n"); |
diff --git a/arch/powerpc/platforms/cell/spufs/file.c b/arch/powerpc/platforms/cell/spufs/file.c index 2936a0044c04..06254467e4dd 100644 --- a/arch/powerpc/platforms/cell/spufs/file.c +++ b/arch/powerpc/platforms/cell/spufs/file.c | |||
| @@ -866,7 +866,7 @@ void spufs_wbox_callback(struct spu *spu) | |||
| 866 | * - end of the mapped area | 866 | * - end of the mapped area |
| 867 | * | 867 | * |
| 868 | * If the file is opened without O_NONBLOCK, we wait here until | 868 | * If the file is opened without O_NONBLOCK, we wait here until |
| 869 | * space is availabyl, but return when we have been able to | 869 | * space is available, but return when we have been able to |
| 870 | * write something. | 870 | * write something. |
| 871 | */ | 871 | */ |
| 872 | static ssize_t spufs_wbox_write(struct file *file, const char __user *buf, | 872 | static ssize_t spufs_wbox_write(struct file *file, const char __user *buf, |
diff --git a/arch/powerpc/platforms/cell/spufs/run.c b/arch/powerpc/platforms/cell/spufs/run.c index 9f79004e6d6f..cfacbee24d7b 100644 --- a/arch/powerpc/platforms/cell/spufs/run.c +++ b/arch/powerpc/platforms/cell/spufs/run.c | |||
| @@ -435,7 +435,7 @@ long spufs_run_spu(struct spu_context *ctx, u32 *npc, u32 *event) | |||
| 435 | 435 | ||
| 436 | /* Note: we don't need to force_sig SIGTRAP on single-step | 436 | /* Note: we don't need to force_sig SIGTRAP on single-step |
| 437 | * since we have TIF_SINGLESTEP set, thus the kernel will do | 437 | * since we have TIF_SINGLESTEP set, thus the kernel will do |
| 438 | * it upon return from the syscall anyawy | 438 | * it upon return from the syscall anyway. |
| 439 | */ | 439 | */ |
| 440 | if (unlikely(status & SPU_STATUS_SINGLE_STEP)) | 440 | if (unlikely(status & SPU_STATUS_SINGLE_STEP)) |
| 441 | ret = -ERESTARTSYS; | 441 | ret = -ERESTARTSYS; |
diff --git a/arch/powerpc/platforms/cell/spufs/sched.c b/arch/powerpc/platforms/cell/spufs/sched.c index 998f632e7cce..460f5f31d5cb 100644 --- a/arch/powerpc/platforms/cell/spufs/sched.c +++ b/arch/powerpc/platforms/cell/spufs/sched.c | |||
| @@ -622,7 +622,7 @@ static struct spu *spu_get_idle(struct spu_context *ctx) | |||
| 622 | 622 | ||
| 623 | /** | 623 | /** |
| 624 | * find_victim - find a lower priority context to preempt | 624 | * find_victim - find a lower priority context to preempt |
| 625 | * @ctx: canidate context for running | 625 | * @ctx: candidate context for running |
| 626 | * | 626 | * |
| 627 | * Returns the freed physical spu to run the new context on. | 627 | * Returns the freed physical spu to run the new context on. |
| 628 | */ | 628 | */ |
diff --git a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c index 987d1b8d68e3..bfb300633dfe 100644 --- a/arch/powerpc/platforms/chrp/setup.c +++ b/arch/powerpc/platforms/chrp/setup.c | |||
| @@ -239,7 +239,7 @@ out: | |||
| 239 | of_node_put(np); | 239 | of_node_put(np); |
| 240 | } | 240 | } |
| 241 | 241 | ||
| 242 | static void briq_restart(char *cmd) | 242 | static void __noreturn briq_restart(char *cmd) |
| 243 | { | 243 | { |
| 244 | local_irq_disable(); | 244 | local_irq_disable(); |
| 245 | if (briq_SPOR) | 245 | if (briq_SPOR) |
| @@ -253,7 +253,7 @@ static void briq_restart(char *cmd) | |||
| 253 | * But unfortunately, the firmware does not connect /chosen/{stdin,stdout} | 253 | * But unfortunately, the firmware does not connect /chosen/{stdin,stdout} |
| 254 | * the the built-in serial node. Instead, a /failsafe node is created. | 254 | * the the built-in serial node. Instead, a /failsafe node is created. |
| 255 | */ | 255 | */ |
| 256 | static __init void chrp_init_early(void) | 256 | static __init void chrp_init(void) |
| 257 | { | 257 | { |
| 258 | struct device_node *node; | 258 | struct device_node *node; |
| 259 | const char *property; | 259 | const char *property; |
| @@ -587,6 +587,8 @@ static int __init chrp_probe(void) | |||
| 587 | 587 | ||
| 588 | pm_power_off = rtas_power_off; | 588 | pm_power_off = rtas_power_off; |
| 589 | 589 | ||
| 590 | chrp_init(); | ||
| 591 | |||
| 590 | return 1; | 592 | return 1; |
| 591 | } | 593 | } |
| 592 | 594 | ||
| @@ -595,7 +597,6 @@ define_machine(chrp) { | |||
| 595 | .probe = chrp_probe, | 597 | .probe = chrp_probe, |
| 596 | .setup_arch = chrp_setup_arch, | 598 | .setup_arch = chrp_setup_arch, |
| 597 | .init = chrp_init2, | 599 | .init = chrp_init2, |
| 598 | .init_early = chrp_init_early, | ||
| 599 | .show_cpuinfo = chrp_show_cpuinfo, | 600 | .show_cpuinfo = chrp_show_cpuinfo, |
| 600 | .init_IRQ = chrp_init_IRQ, | 601 | .init_IRQ = chrp_init_IRQ, |
| 601 | .restart = rtas_restart, | 602 | .restart = rtas_restart, |
diff --git a/arch/powerpc/platforms/embedded6xx/c2k.c b/arch/powerpc/platforms/embedded6xx/c2k.c index ebd3963fdf91..d19e4e759597 100644 --- a/arch/powerpc/platforms/embedded6xx/c2k.c +++ b/arch/powerpc/platforms/embedded6xx/c2k.c | |||
| @@ -99,7 +99,7 @@ static void c2k_reset_board(void) | |||
| 99 | out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_VALUE_SET, 0x00080004); | 99 | out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_VALUE_SET, 0x00080004); |
| 100 | } | 100 | } |
| 101 | 101 | ||
| 102 | static void c2k_restart(char *cmd) | 102 | static void __noreturn c2k_restart(char *cmd) |
| 103 | { | 103 | { |
| 104 | c2k_reset_board(); | 104 | c2k_reset_board(); |
| 105 | msleep(100); | 105 | msleep(100); |
| @@ -123,15 +123,16 @@ void c2k_show_cpuinfo(struct seq_file *m) | |||
| 123 | */ | 123 | */ |
| 124 | static int __init c2k_probe(void) | 124 | static int __init c2k_probe(void) |
| 125 | { | 125 | { |
| 126 | unsigned long root = of_get_flat_dt_root(); | 126 | if (!of_machine_is_compatible("GEFanuc,C2K")) |
| 127 | |||
| 128 | if (!of_flat_dt_is_compatible(root, "GEFanuc,C2K")) | ||
| 129 | return 0; | 127 | return 0; |
| 130 | 128 | ||
| 131 | printk(KERN_INFO "Detected a GEFanuc C2K board\n"); | 129 | printk(KERN_INFO "Detected a GEFanuc C2K board\n"); |
| 132 | 130 | ||
| 133 | _set_L2CR(0); | 131 | _set_L2CR(0); |
| 134 | _set_L2CR(L2CR_L2E | L2CR_L2PE | L2CR_L2I); | 132 | _set_L2CR(L2CR_L2E | L2CR_L2PE | L2CR_L2I); |
| 133 | |||
| 134 | mv64x60_init_early(); | ||
| 135 | |||
| 135 | return 1; | 136 | return 1; |
| 136 | } | 137 | } |
| 137 | 138 | ||
| @@ -139,7 +140,6 @@ define_machine(c2k) { | |||
| 139 | .name = "C2K", | 140 | .name = "C2K", |
| 140 | .probe = c2k_probe, | 141 | .probe = c2k_probe, |
| 141 | .setup_arch = c2k_setup_arch, | 142 | .setup_arch = c2k_setup_arch, |
| 142 | .init_early = mv64x60_init_early, | ||
| 143 | .show_cpuinfo = c2k_show_cpuinfo, | 143 | .show_cpuinfo = c2k_show_cpuinfo, |
| 144 | .init_IRQ = mv64x60_init_irq, | 144 | .init_IRQ = mv64x60_init_irq, |
| 145 | .get_irq = mv64x60_get_irq, | 145 | .get_irq = mv64x60_get_irq, |
diff --git a/arch/powerpc/platforms/embedded6xx/gamecube.c b/arch/powerpc/platforms/embedded6xx/gamecube.c index fe0ed6ee285e..36789cec957c 100644 --- a/arch/powerpc/platforms/embedded6xx/gamecube.c +++ b/arch/powerpc/platforms/embedded6xx/gamecube.c | |||
| @@ -29,14 +29,14 @@ | |||
| 29 | #include "usbgecko_udbg.h" | 29 | #include "usbgecko_udbg.h" |
| 30 | 30 | ||
| 31 | 31 | ||
| 32 | static void gamecube_spin(void) | 32 | static void __noreturn gamecube_spin(void) |
| 33 | { | 33 | { |
| 34 | /* spin until power button pressed */ | 34 | /* spin until power button pressed */ |
| 35 | for (;;) | 35 | for (;;) |
| 36 | cpu_relax(); | 36 | cpu_relax(); |
| 37 | } | 37 | } |
| 38 | 38 | ||
| 39 | static void gamecube_restart(char *cmd) | 39 | static void __noreturn gamecube_restart(char *cmd) |
| 40 | { | 40 | { |
| 41 | local_irq_disable(); | 41 | local_irq_disable(); |
| 42 | flipper_platform_reset(); | 42 | flipper_platform_reset(); |
| @@ -49,26 +49,20 @@ static void gamecube_power_off(void) | |||
| 49 | gamecube_spin(); | 49 | gamecube_spin(); |
| 50 | } | 50 | } |
| 51 | 51 | ||
| 52 | static void gamecube_halt(void) | 52 | static void __noreturn gamecube_halt(void) |
| 53 | { | 53 | { |
| 54 | gamecube_restart(NULL); | 54 | gamecube_restart(NULL); |
| 55 | } | 55 | } |
| 56 | 56 | ||
| 57 | static void __init gamecube_init_early(void) | ||
| 58 | { | ||
| 59 | ug_udbg_init(); | ||
| 60 | } | ||
| 61 | |||
| 62 | static int __init gamecube_probe(void) | 57 | static int __init gamecube_probe(void) |
| 63 | { | 58 | { |
| 64 | unsigned long dt_root; | 59 | if (!of_machine_is_compatible("nintendo,gamecube")) |
| 65 | |||
| 66 | dt_root = of_get_flat_dt_root(); | ||
| 67 | if (!of_flat_dt_is_compatible(dt_root, "nintendo,gamecube")) | ||
| 68 | return 0; | 60 | return 0; |
| 69 | 61 | ||
| 70 | pm_power_off = gamecube_power_off; | 62 | pm_power_off = gamecube_power_off; |
| 71 | 63 | ||
| 64 | ug_udbg_init(); | ||
| 65 | |||
| 72 | return 1; | 66 | return 1; |
| 73 | } | 67 | } |
| 74 | 68 | ||
| @@ -80,7 +74,6 @@ static void gamecube_shutdown(void) | |||
| 80 | define_machine(gamecube) { | 74 | define_machine(gamecube) { |
| 81 | .name = "gamecube", | 75 | .name = "gamecube", |
| 82 | .probe = gamecube_probe, | 76 | .probe = gamecube_probe, |
| 83 | .init_early = gamecube_init_early, | ||
| 84 | .restart = gamecube_restart, | 77 | .restart = gamecube_restart, |
| 85 | .halt = gamecube_halt, | 78 | .halt = gamecube_halt, |
| 86 | .init_IRQ = flipper_pic_probe, | 79 | .init_IRQ = flipper_pic_probe, |
diff --git a/arch/powerpc/platforms/embedded6xx/holly.c b/arch/powerpc/platforms/embedded6xx/holly.c index 8c305c7c8977..dafba1057a47 100644 --- a/arch/powerpc/platforms/embedded6xx/holly.c +++ b/arch/powerpc/platforms/embedded6xx/holly.c | |||
| @@ -193,7 +193,7 @@ void holly_show_cpuinfo(struct seq_file *m) | |||
| 193 | seq_printf(m, "machine\t\t: PPC750 GX/CL\n"); | 193 | seq_printf(m, "machine\t\t: PPC750 GX/CL\n"); |
| 194 | } | 194 | } |
| 195 | 195 | ||
| 196 | void holly_restart(char *cmd) | 196 | void __noreturn holly_restart(char *cmd) |
| 197 | { | 197 | { |
| 198 | __be32 __iomem *ocn_bar1 = NULL; | 198 | __be32 __iomem *ocn_bar1 = NULL; |
| 199 | unsigned long bar; | 199 | unsigned long bar; |
| @@ -250,9 +250,7 @@ void holly_halt(void) | |||
| 250 | */ | 250 | */ |
| 251 | static int __init holly_probe(void) | 251 | static int __init holly_probe(void) |
| 252 | { | 252 | { |
| 253 | unsigned long root = of_get_flat_dt_root(); | 253 | if (!of_machine_is_compatible("ibm,holly")) |
| 254 | |||
| 255 | if (!of_flat_dt_is_compatible(root, "ibm,holly")) | ||
| 256 | return 0; | 254 | return 0; |
| 257 | return 1; | 255 | return 1; |
| 258 | } | 256 | } |
diff --git a/arch/powerpc/platforms/embedded6xx/linkstation.c b/arch/powerpc/platforms/embedded6xx/linkstation.c index 540eeb58d3f0..f29cf29b11f8 100644 --- a/arch/powerpc/platforms/embedded6xx/linkstation.c +++ b/arch/powerpc/platforms/embedded6xx/linkstation.c | |||
| @@ -100,7 +100,7 @@ static void __init linkstation_init_IRQ(void) | |||
| 100 | extern void avr_uart_configure(void); | 100 | extern void avr_uart_configure(void); |
| 101 | extern void avr_uart_send(const char); | 101 | extern void avr_uart_send(const char); |
| 102 | 102 | ||
| 103 | static void linkstation_restart(char *cmd) | 103 | static void __noreturn linkstation_restart(char *cmd) |
| 104 | { | 104 | { |
| 105 | local_irq_disable(); | 105 | local_irq_disable(); |
| 106 | 106 | ||
| @@ -113,7 +113,7 @@ static void linkstation_restart(char *cmd) | |||
| 113 | avr_uart_send('G'); /* "kick" */ | 113 | avr_uart_send('G'); /* "kick" */ |
| 114 | } | 114 | } |
| 115 | 115 | ||
| 116 | static void linkstation_power_off(void) | 116 | static void __noreturn linkstation_power_off(void) |
| 117 | { | 117 | { |
| 118 | local_irq_disable(); | 118 | local_irq_disable(); |
| 119 | 119 | ||
| @@ -127,7 +127,7 @@ static void linkstation_power_off(void) | |||
| 127 | /* NOTREACHED */ | 127 | /* NOTREACHED */ |
| 128 | } | 128 | } |
| 129 | 129 | ||
| 130 | static void linkstation_halt(void) | 130 | static void __noreturn linkstation_halt(void) |
| 131 | { | 131 | { |
| 132 | linkstation_power_off(); | 132 | linkstation_power_off(); |
| 133 | /* NOTREACHED */ | 133 | /* NOTREACHED */ |
| @@ -141,11 +141,7 @@ static void linkstation_show_cpuinfo(struct seq_file *m) | |||
| 141 | 141 | ||
| 142 | static int __init linkstation_probe(void) | 142 | static int __init linkstation_probe(void) |
| 143 | { | 143 | { |
| 144 | unsigned long root; | 144 | if (!of_machine_is_compatible("linkstation")) |
| 145 | |||
| 146 | root = of_get_flat_dt_root(); | ||
| 147 | |||
| 148 | if (!of_flat_dt_is_compatible(root, "linkstation")) | ||
| 149 | return 0; | 145 | return 0; |
| 150 | 146 | ||
| 151 | pm_power_off = linkstation_power_off; | 147 | pm_power_off = linkstation_power_off; |
diff --git a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c index df4ad95f183e..80804f9916ee 100644 --- a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c +++ b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c | |||
| @@ -146,7 +146,7 @@ void mpc7448_hpc2_show_cpuinfo(struct seq_file *m) | |||
| 146 | seq_printf(m, "vendor\t\t: Freescale Semiconductor\n"); | 146 | seq_printf(m, "vendor\t\t: Freescale Semiconductor\n"); |
| 147 | } | 147 | } |
| 148 | 148 | ||
| 149 | void mpc7448_hpc2_restart(char *cmd) | 149 | static void __noreturn mpc7448_hpc2_restart(char *cmd) |
| 150 | { | 150 | { |
| 151 | local_irq_disable(); | 151 | local_irq_disable(); |
| 152 | 152 | ||
| @@ -161,9 +161,7 @@ void mpc7448_hpc2_restart(char *cmd) | |||
| 161 | */ | 161 | */ |
| 162 | static int __init mpc7448_hpc2_probe(void) | 162 | static int __init mpc7448_hpc2_probe(void) |
| 163 | { | 163 | { |
| 164 | unsigned long root = of_get_flat_dt_root(); | 164 | if (!of_machine_is_compatible("mpc74xx")) |
| 165 | |||
| 166 | if (!of_flat_dt_is_compatible(root, "mpc74xx")) | ||
| 167 | return 0; | 165 | return 0; |
| 168 | return 1; | 166 | return 1; |
| 169 | } | 167 | } |
diff --git a/arch/powerpc/platforms/embedded6xx/mvme5100.c b/arch/powerpc/platforms/embedded6xx/mvme5100.c index 8f65aa3747f5..ed7321d6772e 100644 --- a/arch/powerpc/platforms/embedded6xx/mvme5100.c +++ b/arch/powerpc/platforms/embedded6xx/mvme5100.c | |||
| @@ -177,7 +177,7 @@ static void mvme5100_show_cpuinfo(struct seq_file *m) | |||
| 177 | seq_puts(m, "Machine\t\t: MVME5100\n"); | 177 | seq_puts(m, "Machine\t\t: MVME5100\n"); |
| 178 | } | 178 | } |
| 179 | 179 | ||
| 180 | static void mvme5100_restart(char *cmd) | 180 | static void __noreturn mvme5100_restart(char *cmd) |
| 181 | { | 181 | { |
| 182 | 182 | ||
| 183 | local_irq_disable(); | 183 | local_irq_disable(); |
| @@ -194,9 +194,7 @@ static void mvme5100_restart(char *cmd) | |||
| 194 | */ | 194 | */ |
| 195 | static int __init mvme5100_probe(void) | 195 | static int __init mvme5100_probe(void) |
| 196 | { | 196 | { |
| 197 | unsigned long root = of_get_flat_dt_root(); | 197 | return of_machine_is_compatible("MVME5100"); |
| 198 | |||
| 199 | return of_flat_dt_is_compatible(root, "MVME5100"); | ||
| 200 | } | 198 | } |
| 201 | 199 | ||
| 202 | static int __init probe_of_platform_devices(void) | 200 | static int __init probe_of_platform_devices(void) |
diff --git a/arch/powerpc/platforms/embedded6xx/storcenter.c b/arch/powerpc/platforms/embedded6xx/storcenter.c index d572833ebd00..471a50bcd074 100644 --- a/arch/powerpc/platforms/embedded6xx/storcenter.c +++ b/arch/powerpc/platforms/embedded6xx/storcenter.c | |||
| @@ -96,7 +96,7 @@ static void __init storcenter_init_IRQ(void) | |||
| 96 | mpic_init(mpic); | 96 | mpic_init(mpic); |
| 97 | } | 97 | } |
| 98 | 98 | ||
| 99 | static void storcenter_restart(char *cmd) | 99 | static void __noreturn storcenter_restart(char *cmd) |
| 100 | { | 100 | { |
| 101 | local_irq_disable(); | 101 | local_irq_disable(); |
| 102 | 102 | ||
| @@ -109,9 +109,7 @@ static void storcenter_restart(char *cmd) | |||
| 109 | 109 | ||
| 110 | static int __init storcenter_probe(void) | 110 | static int __init storcenter_probe(void) |
| 111 | { | 111 | { |
| 112 | unsigned long root = of_get_flat_dt_root(); | 112 | return of_machine_is_compatible("iomega,storcenter"); |
| 113 | |||
| 114 | return of_flat_dt_is_compatible(root, "iomega,storcenter"); | ||
| 115 | } | 113 | } |
| 116 | 114 | ||
| 117 | define_machine(storcenter){ | 115 | define_machine(storcenter){ |
diff --git a/arch/powerpc/platforms/embedded6xx/wii.c b/arch/powerpc/platforms/embedded6xx/wii.c index 352592d3e44e..3fd683e40bc9 100644 --- a/arch/powerpc/platforms/embedded6xx/wii.c +++ b/arch/powerpc/platforms/embedded6xx/wii.c | |||
| @@ -112,7 +112,7 @@ unsigned long __init wii_mmu_mapin_mem2(unsigned long top) | |||
| 112 | return delta + bl; | 112 | return delta + bl; |
| 113 | } | 113 | } |
| 114 | 114 | ||
| 115 | static void wii_spin(void) | 115 | static void __noreturn wii_spin(void) |
| 116 | { | 116 | { |
| 117 | local_irq_disable(); | 117 | local_irq_disable(); |
| 118 | for (;;) | 118 | for (;;) |
| @@ -160,7 +160,7 @@ static void __init wii_setup_arch(void) | |||
| 160 | } | 160 | } |
| 161 | } | 161 | } |
| 162 | 162 | ||
| 163 | static void wii_restart(char *cmd) | 163 | static void __noreturn wii_restart(char *cmd) |
| 164 | { | 164 | { |
| 165 | local_irq_disable(); | 165 | local_irq_disable(); |
| 166 | 166 | ||
| @@ -185,18 +185,13 @@ static void wii_power_off(void) | |||
| 185 | wii_spin(); | 185 | wii_spin(); |
| 186 | } | 186 | } |
| 187 | 187 | ||
| 188 | static void wii_halt(void) | 188 | static void __noreturn wii_halt(void) |
| 189 | { | 189 | { |
| 190 | if (ppc_md.restart) | 190 | if (ppc_md.restart) |
| 191 | ppc_md.restart(NULL); | 191 | ppc_md.restart(NULL); |
| 192 | wii_spin(); | 192 | wii_spin(); |
| 193 | } | 193 | } |
| 194 | 194 | ||
| 195 | static void __init wii_init_early(void) | ||
| 196 | { | ||
| 197 | ug_udbg_init(); | ||
| 198 | } | ||
| 199 | |||
| 200 | static void __init wii_pic_probe(void) | 195 | static void __init wii_pic_probe(void) |
| 201 | { | 196 | { |
| 202 | flipper_pic_probe(); | 197 | flipper_pic_probe(); |
| @@ -205,14 +200,13 @@ static void __init wii_pic_probe(void) | |||
| 205 | 200 | ||
| 206 | static int __init wii_probe(void) | 201 | static int __init wii_probe(void) |
| 207 | { | 202 | { |
| 208 | unsigned long dt_root; | 203 | if (!of_machine_is_compatible("nintendo,wii")) |
| 209 | |||
| 210 | dt_root = of_get_flat_dt_root(); | ||
| 211 | if (!of_flat_dt_is_compatible(dt_root, "nintendo,wii")) | ||
| 212 | return 0; | 204 | return 0; |
| 213 | 205 | ||
| 214 | pm_power_off = wii_power_off; | 206 | pm_power_off = wii_power_off; |
| 215 | 207 | ||
| 208 | ug_udbg_init(); | ||
| 209 | |||
| 216 | return 1; | 210 | return 1; |
| 217 | } | 211 | } |
| 218 | 212 | ||
| @@ -225,7 +219,6 @@ static void wii_shutdown(void) | |||
| 225 | define_machine(wii) { | 219 | define_machine(wii) { |
| 226 | .name = "wii", | 220 | .name = "wii", |
| 227 | .probe = wii_probe, | 221 | .probe = wii_probe, |
| 228 | .init_early = wii_init_early, | ||
| 229 | .setup_arch = wii_setup_arch, | 222 | .setup_arch = wii_setup_arch, |
| 230 | .restart = wii_restart, | 223 | .restart = wii_restart, |
| 231 | .halt = wii_halt, | 224 | .halt = wii_halt, |
diff --git a/arch/powerpc/platforms/maple/pci.c b/arch/powerpc/platforms/maple/pci.c index a923230e575b..a2f89e6326ce 100644 --- a/arch/powerpc/platforms/maple/pci.c +++ b/arch/powerpc/platforms/maple/pci.c | |||
| @@ -568,6 +568,26 @@ void maple_pci_irq_fixup(struct pci_dev *dev) | |||
| 568 | DBG(" <- maple_pci_irq_fixup\n"); | 568 | DBG(" <- maple_pci_irq_fixup\n"); |
| 569 | } | 569 | } |
| 570 | 570 | ||
| 571 | static int maple_pci_root_bridge_prepare(struct pci_host_bridge *bridge) | ||
| 572 | { | ||
| 573 | struct pci_controller *hose = pci_bus_to_host(bridge->bus); | ||
| 574 | struct device_node *np, *child; | ||
| 575 | |||
| 576 | if (hose != u3_agp) | ||
| 577 | return 0; | ||
| 578 | |||
| 579 | /* Fixup the PCI<->OF mapping for U3 AGP due to bus renumbering. We | ||
| 580 | * assume there is no P2P bridge on the AGP bus, which should be a | ||
| 581 | * safe assumptions hopefully. | ||
| 582 | */ | ||
| 583 | np = hose->dn; | ||
| 584 | PCI_DN(np)->busno = 0xf0; | ||
| 585 | for_each_child_of_node(np, child) | ||
| 586 | PCI_DN(child)->busno = 0xf0; | ||
| 587 | |||
| 588 | return 0; | ||
| 589 | } | ||
| 590 | |||
| 571 | void __init maple_pci_init(void) | 591 | void __init maple_pci_init(void) |
| 572 | { | 592 | { |
| 573 | struct device_node *np, *root; | 593 | struct device_node *np, *root; |
| @@ -605,19 +625,7 @@ void __init maple_pci_init(void) | |||
| 605 | if (ht && maple_add_bridge(ht) != 0) | 625 | if (ht && maple_add_bridge(ht) != 0) |
| 606 | of_node_put(ht); | 626 | of_node_put(ht); |
| 607 | 627 | ||
| 608 | /* Setup the linkage between OF nodes and PHBs */ | 628 | ppc_md.pcibios_root_bridge_prepare = maple_pci_root_bridge_prepare; |
| 609 | pci_devs_phb_init(); | ||
| 610 | |||
| 611 | /* Fixup the PCI<->OF mapping for U3 AGP due to bus renumbering. We | ||
| 612 | * assume there is no P2P bridge on the AGP bus, which should be a | ||
| 613 | * safe assumptions hopefully. | ||
| 614 | */ | ||
| 615 | if (u3_agp) { | ||
| 616 | struct device_node *np = u3_agp->dn; | ||
| 617 | PCI_DN(np)->busno = 0xf0; | ||
| 618 | for (np = np->child; np; np = np->sibling) | ||
| 619 | PCI_DN(np)->busno = 0xf0; | ||
| 620 | } | ||
| 621 | 629 | ||
| 622 | /* Tell pci.c to not change any resource allocations. */ | 630 | /* Tell pci.c to not change any resource allocations. */ |
| 623 | pci_add_flags(PCI_PROBE_ONLY); | 631 | pci_add_flags(PCI_PROBE_ONLY); |
diff --git a/arch/powerpc/platforms/maple/setup.c b/arch/powerpc/platforms/maple/setup.c index a837188544c8..3c30c7a4534d 100644 --- a/arch/powerpc/platforms/maple/setup.c +++ b/arch/powerpc/platforms/maple/setup.c | |||
| @@ -94,7 +94,7 @@ static unsigned long maple_find_nvram_base(void) | |||
| 94 | return result; | 94 | return result; |
| 95 | } | 95 | } |
| 96 | 96 | ||
| 97 | static void maple_restart(char *cmd) | 97 | static void __noreturn maple_restart(char *cmd) |
| 98 | { | 98 | { |
| 99 | unsigned int maple_nvram_base; | 99 | unsigned int maple_nvram_base; |
| 100 | const unsigned int *maple_nvram_offset, *maple_nvram_command; | 100 | const unsigned int *maple_nvram_offset, *maple_nvram_command; |
| @@ -119,9 +119,10 @@ static void maple_restart(char *cmd) | |||
| 119 | for (;;) ; | 119 | for (;;) ; |
| 120 | fail: | 120 | fail: |
| 121 | printk(KERN_EMERG "Maple: Manual Restart Required\n"); | 121 | printk(KERN_EMERG "Maple: Manual Restart Required\n"); |
| 122 | for (;;) ; | ||
| 122 | } | 123 | } |
| 123 | 124 | ||
| 124 | static void maple_power_off(void) | 125 | static void __noreturn maple_power_off(void) |
| 125 | { | 126 | { |
| 126 | unsigned int maple_nvram_base; | 127 | unsigned int maple_nvram_base; |
| 127 | const unsigned int *maple_nvram_offset, *maple_nvram_command; | 128 | const unsigned int *maple_nvram_offset, *maple_nvram_command; |
| @@ -146,9 +147,10 @@ static void maple_power_off(void) | |||
| 146 | for (;;) ; | 147 | for (;;) ; |
| 147 | fail: | 148 | fail: |
| 148 | printk(KERN_EMERG "Maple: Manual Power-Down Required\n"); | 149 | printk(KERN_EMERG "Maple: Manual Power-Down Required\n"); |
| 150 | for (;;) ; | ||
| 149 | } | 151 | } |
| 150 | 152 | ||
| 151 | static void maple_halt(void) | 153 | static void __noreturn maple_halt(void) |
| 152 | { | 154 | { |
| 153 | maple_power_off(); | 155 | maple_power_off(); |
| 154 | } | 156 | } |
| @@ -196,18 +198,6 @@ void __init maple_setup_arch(void) | |||
| 196 | mmio_nvram_init(); | 198 | mmio_nvram_init(); |
| 197 | } | 199 | } |
| 198 | 200 | ||
| 199 | /* | ||
| 200 | * Early initialization. | ||
| 201 | */ | ||
| 202 | static void __init maple_init_early(void) | ||
| 203 | { | ||
| 204 | DBG(" -> maple_init_early\n"); | ||
| 205 | |||
| 206 | iommu_init_early_dart(&maple_pci_controller_ops); | ||
| 207 | |||
| 208 | DBG(" <- maple_init_early\n"); | ||
| 209 | } | ||
| 210 | |||
| 211 | /* | 201 | /* |
| 212 | * This is almost identical to pSeries and CHRP. We need to make that | 202 | * This is almost identical to pSeries and CHRP. We need to make that |
| 213 | * code generic at one point, with appropriate bits in the device-tree to | 203 | * code generic at one point, with appropriate bits in the device-tree to |
| @@ -298,22 +288,14 @@ static void __init maple_progress(char *s, unsigned short hex) | |||
| 298 | */ | 288 | */ |
| 299 | static int __init maple_probe(void) | 289 | static int __init maple_probe(void) |
| 300 | { | 290 | { |
| 301 | unsigned long root = of_get_flat_dt_root(); | 291 | if (!of_machine_is_compatible("Momentum,Maple") && |
| 302 | 292 | !of_machine_is_compatible("Momentum,Apache")) | |
| 303 | if (!of_flat_dt_is_compatible(root, "Momentum,Maple") && | ||
| 304 | !of_flat_dt_is_compatible(root, "Momentum,Apache")) | ||
| 305 | return 0; | 293 | return 0; |
| 306 | /* | ||
| 307 | * On U3, the DART (iommu) must be allocated now since it | ||
| 308 | * has an impact on htab_initialize (due to the large page it | ||
| 309 | * occupies having to be broken up so the DART itself is not | ||
| 310 | * part of the cacheable linar mapping | ||
| 311 | */ | ||
| 312 | alloc_dart_table(); | ||
| 313 | 294 | ||
| 314 | hpte_init_native(); | ||
| 315 | pm_power_off = maple_power_off; | 295 | pm_power_off = maple_power_off; |
| 316 | 296 | ||
| 297 | iommu_init_early_dart(&maple_pci_controller_ops); | ||
| 298 | |||
| 317 | return 1; | 299 | return 1; |
| 318 | } | 300 | } |
| 319 | 301 | ||
| @@ -321,7 +303,6 @@ define_machine(maple) { | |||
| 321 | .name = "Maple", | 303 | .name = "Maple", |
| 322 | .probe = maple_probe, | 304 | .probe = maple_probe, |
| 323 | .setup_arch = maple_setup_arch, | 305 | .setup_arch = maple_setup_arch, |
| 324 | .init_early = maple_init_early, | ||
| 325 | .init_IRQ = maple_init_IRQ, | 306 | .init_IRQ = maple_init_IRQ, |
| 326 | .pci_irq_fixup = maple_pci_irq_fixup, | 307 | .pci_irq_fixup = maple_pci_irq_fixup, |
| 327 | .pci_get_legacy_ide_irq = maple_pci_get_legacy_ide_irq, | 308 | .pci_get_legacy_ide_irq = maple_pci_get_legacy_ide_irq, |
diff --git a/arch/powerpc/platforms/pasemi/iommu.c b/arch/powerpc/platforms/pasemi/iommu.c index c929644e74a6..43dd3fb514e0 100644 --- a/arch/powerpc/platforms/pasemi/iommu.c +++ b/arch/powerpc/platforms/pasemi/iommu.c | |||
| @@ -202,6 +202,11 @@ int __init iob_init(struct device_node *dn) | |||
| 202 | 202 | ||
| 203 | pr_debug(" -> %s\n", __func__); | 203 | pr_debug(" -> %s\n", __func__); |
| 204 | 204 | ||
| 205 | /* For 2G space, 8x64 pages (2^21 bytes) is max total l2 size */ | ||
| 206 | iob_l2_base = (u32 *)__va(memblock_alloc_base(1UL<<21, 1UL<<21, 0x80000000)); | ||
| 207 | |||
| 208 | printk(KERN_INFO "IOBMAP L2 allocated at: %p\n", iob_l2_base); | ||
| 209 | |||
| 205 | /* Allocate a spare page to map all invalid IOTLB pages. */ | 210 | /* Allocate a spare page to map all invalid IOTLB pages. */ |
| 206 | tmp = memblock_alloc(IOBMAP_PAGE_SIZE, IOBMAP_PAGE_SIZE); | 211 | tmp = memblock_alloc(IOBMAP_PAGE_SIZE, IOBMAP_PAGE_SIZE); |
| 207 | if (!tmp) | 212 | if (!tmp) |
| @@ -260,13 +265,3 @@ void __init iommu_init_early_pasemi(void) | |||
| 260 | set_pci_dma_ops(&dma_iommu_ops); | 265 | set_pci_dma_ops(&dma_iommu_ops); |
| 261 | } | 266 | } |
| 262 | 267 | ||
| 263 | void __init alloc_iobmap_l2(void) | ||
| 264 | { | ||
| 265 | #ifndef CONFIG_PPC_PASEMI_IOMMU | ||
| 266 | return; | ||
| 267 | #endif | ||
| 268 | /* For 2G space, 8x64 pages (2^21 bytes) is max total l2 size */ | ||
| 269 | iob_l2_base = (u32 *)__va(memblock_alloc_base(1UL<<21, 1UL<<21, 0x80000000)); | ||
| 270 | |||
| 271 | printk(KERN_INFO "IOBMAP L2 allocated at: %p\n", iob_l2_base); | ||
| 272 | } | ||
diff --git a/arch/powerpc/platforms/pasemi/pasemi.h b/arch/powerpc/platforms/pasemi/pasemi.h index 11f230a48227..74cbcb357612 100644 --- a/arch/powerpc/platforms/pasemi/pasemi.h +++ b/arch/powerpc/platforms/pasemi/pasemi.h | |||
| @@ -8,7 +8,6 @@ extern void pas_pci_dma_dev_setup(struct pci_dev *dev); | |||
| 8 | 8 | ||
| 9 | extern void __iomem *pasemi_pci_getcfgaddr(struct pci_dev *dev, int offset); | 9 | extern void __iomem *pasemi_pci_getcfgaddr(struct pci_dev *dev, int offset); |
| 10 | 10 | ||
| 11 | extern void __init alloc_iobmap_l2(void); | ||
| 12 | extern void __init pasemi_map_registers(void); | 11 | extern void __init pasemi_map_registers(void); |
| 13 | 12 | ||
| 14 | /* Power savings modes, implemented in asm */ | 13 | /* Power savings modes, implemented in asm */ |
diff --git a/arch/powerpc/platforms/pasemi/pci.c b/arch/powerpc/platforms/pasemi/pci.c index f3a68a0fef23..10c4e8fc6ea9 100644 --- a/arch/powerpc/platforms/pasemi/pci.c +++ b/arch/powerpc/platforms/pasemi/pci.c | |||
| @@ -229,9 +229,6 @@ void __init pas_pci_init(void) | |||
| 229 | of_node_get(np); | 229 | of_node_get(np); |
| 230 | 230 | ||
| 231 | of_node_put(root); | 231 | of_node_put(root); |
| 232 | |||
| 233 | /* Setup the linkage between OF nodes and PHBs */ | ||
| 234 | pci_devs_phb_init(); | ||
| 235 | } | 232 | } |
| 236 | 233 | ||
| 237 | void __iomem *pasemi_pci_getcfgaddr(struct pci_dev *dev, int offset) | 234 | void __iomem *pasemi_pci_getcfgaddr(struct pci_dev *dev, int offset) |
diff --git a/arch/powerpc/platforms/pasemi/setup.c b/arch/powerpc/platforms/pasemi/setup.c index d71b2c7e8403..e86c1bd08f1f 100644 --- a/arch/powerpc/platforms/pasemi/setup.c +++ b/arch/powerpc/platforms/pasemi/setup.c | |||
| @@ -62,7 +62,7 @@ static int num_mce_regs; | |||
| 62 | static int nmi_virq = NO_IRQ; | 62 | static int nmi_virq = NO_IRQ; |
| 63 | 63 | ||
| 64 | 64 | ||
| 65 | static void pas_restart(char *cmd) | 65 | static void __noreturn pas_restart(char *cmd) |
| 66 | { | 66 | { |
| 67 | /* Need to put others cpu in hold loop so they're not sleeping */ | 67 | /* Need to put others cpu in hold loop so they're not sleeping */ |
| 68 | smp_send_stop(); | 68 | smp_send_stop(); |
| @@ -339,11 +339,6 @@ out: | |||
| 339 | return !!(srr1 & 0x2); | 339 | return !!(srr1 & 0x2); |
| 340 | } | 340 | } |
| 341 | 341 | ||
| 342 | static void __init pas_init_early(void) | ||
| 343 | { | ||
| 344 | iommu_init_early_pasemi(); | ||
| 345 | } | ||
| 346 | |||
| 347 | #ifdef CONFIG_PCMCIA | 342 | #ifdef CONFIG_PCMCIA |
| 348 | static int pcmcia_notify(struct notifier_block *nb, unsigned long action, | 343 | static int pcmcia_notify(struct notifier_block *nb, unsigned long action, |
| 349 | void *data) | 344 | void *data) |
| @@ -420,15 +415,11 @@ machine_device_initcall(pasemi, pasemi_publish_devices); | |||
| 420 | */ | 415 | */ |
| 421 | static int __init pas_probe(void) | 416 | static int __init pas_probe(void) |
| 422 | { | 417 | { |
| 423 | unsigned long root = of_get_flat_dt_root(); | 418 | if (!of_machine_is_compatible("PA6T-1682M") && |
| 424 | 419 | !of_machine_is_compatible("pasemi,pwrficient")) | |
| 425 | if (!of_flat_dt_is_compatible(root, "PA6T-1682M") && | ||
| 426 | !of_flat_dt_is_compatible(root, "pasemi,pwrficient")) | ||
| 427 | return 0; | 420 | return 0; |
| 428 | 421 | ||
| 429 | hpte_init_native(); | 422 | iommu_init_early_pasemi(); |
| 430 | |||
| 431 | alloc_iobmap_l2(); | ||
| 432 | 423 | ||
| 433 | return 1; | 424 | return 1; |
| 434 | } | 425 | } |
| @@ -437,7 +428,6 @@ define_machine(pasemi) { | |||
| 437 | .name = "PA Semi PWRficient", | 428 | .name = "PA Semi PWRficient", |
| 438 | .probe = pas_probe, | 429 | .probe = pas_probe, |
| 439 | .setup_arch = pas_setup_arch, | 430 | .setup_arch = pas_setup_arch, |
| 440 | .init_early = pas_init_early, | ||
| 441 | .init_IRQ = pas_init_IRQ, | 431 | .init_IRQ = pas_init_IRQ, |
| 442 | .get_irq = mpic_get_irq, | 432 | .get_irq = mpic_get_irq, |
| 443 | .restart = pas_restart, | 433 | .restart = pas_restart, |
diff --git a/arch/powerpc/platforms/powermac/low_i2c.c b/arch/powerpc/platforms/powermac/low_i2c.c index 7553b6a77c64..6d6f277477aa 100644 --- a/arch/powerpc/platforms/powermac/low_i2c.c +++ b/arch/powerpc/platforms/powermac/low_i2c.c | |||
| @@ -15,7 +15,7 @@ | |||
| 15 | * This file thus provides a simple low level unified i2c interface for | 15 | * This file thus provides a simple low level unified i2c interface for |
| 16 | * powermac that covers the various types of i2c busses used in Apple machines. | 16 | * powermac that covers the various types of i2c busses used in Apple machines. |
| 17 | * For now, keywest, PMU and SMU, though we could add Cuda, or other bit | 17 | * For now, keywest, PMU and SMU, though we could add Cuda, or other bit |
| 18 | * banging busses found on older chipstes in earlier machines if we ever need | 18 | * banging busses found on older chipsets in earlier machines if we ever need |
| 19 | * one of them. | 19 | * one of them. |
| 20 | * | 20 | * |
| 21 | * The drivers in this file are synchronous/blocking. In addition, the | 21 | * The drivers in this file are synchronous/blocking. In addition, the |
diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c index 59ab16fa600f..6e06c3be2e9a 100644 --- a/arch/powerpc/platforms/powermac/pci.c +++ b/arch/powerpc/platforms/powermac/pci.c | |||
| @@ -878,6 +878,29 @@ void pmac_pci_irq_fixup(struct pci_dev *dev) | |||
| 878 | #endif /* CONFIG_PPC32 */ | 878 | #endif /* CONFIG_PPC32 */ |
| 879 | } | 879 | } |
| 880 | 880 | ||
| 881 | #ifdef CONFIG_PPC64 | ||
| 882 | static int pmac_pci_root_bridge_prepare(struct pci_host_bridge *bridge) | ||
| 883 | { | ||
| 884 | struct pci_controller *hose = pci_bus_to_host(bridge->bus); | ||
| 885 | struct device_node *np, *child; | ||
| 886 | |||
| 887 | if (hose != u3_agp) | ||
| 888 | return 0; | ||
| 889 | |||
| 890 | /* Fixup the PCI<->OF mapping for U3 AGP due to bus renumbering. We | ||
| 891 | * assume there is no P2P bridge on the AGP bus, which should be a | ||
| 892 | * safe assumptions for now. We should do something better in the | ||
| 893 | * future though | ||
| 894 | */ | ||
| 895 | np = hose->dn; | ||
| 896 | PCI_DN(np)->busno = 0xf0; | ||
| 897 | for_each_child_of_node(np, child) | ||
| 898 | PCI_DN(child)->busno = 0xf0; | ||
| 899 | |||
| 900 | return 0; | ||
| 901 | } | ||
| 902 | #endif /* CONFIG_PPC64 */ | ||
| 903 | |||
| 881 | void __init pmac_pci_init(void) | 904 | void __init pmac_pci_init(void) |
| 882 | { | 905 | { |
| 883 | struct device_node *np, *root; | 906 | struct device_node *np, *root; |
| @@ -914,20 +937,7 @@ void __init pmac_pci_init(void) | |||
| 914 | if (ht && pmac_add_bridge(ht) != 0) | 937 | if (ht && pmac_add_bridge(ht) != 0) |
| 915 | of_node_put(ht); | 938 | of_node_put(ht); |
| 916 | 939 | ||
| 917 | /* Setup the linkage between OF nodes and PHBs */ | 940 | ppc_md.pcibios_root_bridge_prepare = pmac_pci_root_bridge_prepare; |
| 918 | pci_devs_phb_init(); | ||
| 919 | |||
| 920 | /* Fixup the PCI<->OF mapping for U3 AGP due to bus renumbering. We | ||
| 921 | * assume there is no P2P bridge on the AGP bus, which should be a | ||
| 922 | * safe assumptions for now. We should do something better in the | ||
| 923 | * future though | ||
| 924 | */ | ||
| 925 | if (u3_agp) { | ||
| 926 | struct device_node *np = u3_agp->dn; | ||
| 927 | PCI_DN(np)->busno = 0xf0; | ||
| 928 | for (np = np->child; np; np = np->sibling) | ||
| 929 | PCI_DN(np)->busno = 0xf0; | ||
| 930 | } | ||
| 931 | /* pmac_check_ht_link(); */ | 941 | /* pmac_check_ht_link(); */ |
| 932 | 942 | ||
| 933 | #else /* CONFIG_PPC64 */ | 943 | #else /* CONFIG_PPC64 */ |
diff --git a/arch/powerpc/platforms/powermac/setup.c b/arch/powerpc/platforms/powermac/setup.c index 8dd78f4e1af4..3de4a7c85140 100644 --- a/arch/powerpc/platforms/powermac/setup.c +++ b/arch/powerpc/platforms/powermac/setup.c | |||
| @@ -52,7 +52,6 @@ | |||
| 52 | #include <linux/suspend.h> | 52 | #include <linux/suspend.h> |
| 53 | #include <linux/of_device.h> | 53 | #include <linux/of_device.h> |
| 54 | #include <linux/of_platform.h> | 54 | #include <linux/of_platform.h> |
| 55 | #include <linux/memblock.h> | ||
| 56 | 55 | ||
| 57 | #include <asm/reg.h> | 56 | #include <asm/reg.h> |
| 58 | #include <asm/sections.h> | 57 | #include <asm/sections.h> |
| @@ -97,11 +96,6 @@ int sccdbg; | |||
| 97 | sys_ctrler_t sys_ctrler = SYS_CTRLER_UNKNOWN; | 96 | sys_ctrler_t sys_ctrler = SYS_CTRLER_UNKNOWN; |
| 98 | EXPORT_SYMBOL(sys_ctrler); | 97 | EXPORT_SYMBOL(sys_ctrler); |
| 99 | 98 | ||
| 100 | #ifdef CONFIG_PMAC_SMU | ||
| 101 | unsigned long smu_cmdbuf_abs; | ||
| 102 | EXPORT_SYMBOL(smu_cmdbuf_abs); | ||
| 103 | #endif | ||
| 104 | |||
| 105 | static void pmac_show_cpuinfo(struct seq_file *m) | 99 | static void pmac_show_cpuinfo(struct seq_file *m) |
| 106 | { | 100 | { |
| 107 | struct device_node *np; | 101 | struct device_node *np; |
| @@ -325,7 +319,6 @@ static void __init pmac_setup_arch(void) | |||
| 325 | defined(CONFIG_PPC64) | 319 | defined(CONFIG_PPC64) |
| 326 | pmac_nvram_init(); | 320 | pmac_nvram_init(); |
| 327 | #endif | 321 | #endif |
| 328 | |||
| 329 | #ifdef CONFIG_PPC32 | 322 | #ifdef CONFIG_PPC32 |
| 330 | #ifdef CONFIG_BLK_DEV_INITRD | 323 | #ifdef CONFIG_BLK_DEV_INITRD |
| 331 | if (initrd_start) | 324 | if (initrd_start) |
| @@ -383,7 +376,7 @@ void __init_refok note_bootable_part(dev_t dev, int part, int goodness) | |||
| 383 | } | 376 | } |
| 384 | 377 | ||
| 385 | #ifdef CONFIG_ADB_CUDA | 378 | #ifdef CONFIG_ADB_CUDA |
| 386 | static void cuda_restart(void) | 379 | static void __noreturn cuda_restart(void) |
| 387 | { | 380 | { |
| 388 | struct adb_request req; | 381 | struct adb_request req; |
| 389 | 382 | ||
| @@ -392,7 +385,7 @@ static void cuda_restart(void) | |||
| 392 | cuda_poll(); | 385 | cuda_poll(); |
| 393 | } | 386 | } |
| 394 | 387 | ||
| 395 | static void cuda_shutdown(void) | 388 | static void __noreturn cuda_shutdown(void) |
| 396 | { | 389 | { |
| 397 | struct adb_request req; | 390 | struct adb_request req; |
| 398 | 391 | ||
| @@ -416,7 +409,7 @@ static void cuda_shutdown(void) | |||
| 416 | #define smu_shutdown() | 409 | #define smu_shutdown() |
| 417 | #endif | 410 | #endif |
| 418 | 411 | ||
| 419 | static void pmac_restart(char *cmd) | 412 | static void __noreturn pmac_restart(char *cmd) |
| 420 | { | 413 | { |
| 421 | switch (sys_ctrler) { | 414 | switch (sys_ctrler) { |
| 422 | case SYS_CTRLER_CUDA: | 415 | case SYS_CTRLER_CUDA: |
| @@ -430,9 +423,10 @@ static void pmac_restart(char *cmd) | |||
| 430 | break; | 423 | break; |
| 431 | default: ; | 424 | default: ; |
| 432 | } | 425 | } |
| 426 | while (1) ; | ||
| 433 | } | 427 | } |
| 434 | 428 | ||
| 435 | static void pmac_power_off(void) | 429 | static void __noreturn pmac_power_off(void) |
| 436 | { | 430 | { |
| 437 | switch (sys_ctrler) { | 431 | switch (sys_ctrler) { |
| 438 | case SYS_CTRLER_CUDA: | 432 | case SYS_CTRLER_CUDA: |
| @@ -446,9 +440,10 @@ static void pmac_power_off(void) | |||
| 446 | break; | 440 | break; |
| 447 | default: ; | 441 | default: ; |
| 448 | } | 442 | } |
| 443 | while (1) ; | ||
| 449 | } | 444 | } |
| 450 | 445 | ||
| 451 | static void | 446 | static void __noreturn |
| 452 | pmac_halt(void) | 447 | pmac_halt(void) |
| 453 | { | 448 | { |
| 454 | pmac_power_off(); | 449 | pmac_power_off(); |
| @@ -457,7 +452,7 @@ pmac_halt(void) | |||
| 457 | /* | 452 | /* |
| 458 | * Early initialization. | 453 | * Early initialization. |
| 459 | */ | 454 | */ |
| 460 | static void __init pmac_init_early(void) | 455 | static void __init pmac_init(void) |
| 461 | { | 456 | { |
| 462 | /* Enable early btext debug if requested */ | 457 | /* Enable early btext debug if requested */ |
| 463 | if (strstr(boot_command_line, "btextdbg")) { | 458 | if (strstr(boot_command_line, "btextdbg")) { |
| @@ -489,9 +484,6 @@ static int __init pmac_declare_of_platform_devices(void) | |||
| 489 | { | 484 | { |
| 490 | struct device_node *np; | 485 | struct device_node *np; |
| 491 | 486 | ||
| 492 | if (machine_is(chrp)) | ||
| 493 | return -1; | ||
| 494 | |||
| 495 | np = of_find_node_by_name(NULL, "valkyrie"); | 487 | np = of_find_node_by_name(NULL, "valkyrie"); |
| 496 | if (np) { | 488 | if (np) { |
| 497 | of_platform_device_create(np, "valkyrie", NULL); | 489 | of_platform_device_create(np, "valkyrie", NULL); |
| @@ -598,24 +590,10 @@ console_initcall(check_pmac_serial_console); | |||
| 598 | */ | 590 | */ |
| 599 | static int __init pmac_probe(void) | 591 | static int __init pmac_probe(void) |
| 600 | { | 592 | { |
| 601 | unsigned long root = of_get_flat_dt_root(); | 593 | if (!of_machine_is_compatible("Power Macintosh") && |
| 602 | 594 | !of_machine_is_compatible("MacRISC")) | |
| 603 | if (!of_flat_dt_is_compatible(root, "Power Macintosh") && | ||
| 604 | !of_flat_dt_is_compatible(root, "MacRISC")) | ||
| 605 | return 0; | 595 | return 0; |
| 606 | 596 | ||
| 607 | #ifdef CONFIG_PPC64 | ||
| 608 | /* | ||
| 609 | * On U3, the DART (iommu) must be allocated now since it | ||
| 610 | * has an impact on htab_initialize (due to the large page it | ||
| 611 | * occupies having to be broken up so the DART itself is not | ||
| 612 | * part of the cacheable linar mapping | ||
| 613 | */ | ||
| 614 | alloc_dart_table(); | ||
| 615 | |||
| 616 | hpte_init_native(); | ||
| 617 | #endif | ||
| 618 | |||
| 619 | #ifdef CONFIG_PPC32 | 597 | #ifdef CONFIG_PPC32 |
| 620 | /* isa_io_base gets set in pmac_pci_init */ | 598 | /* isa_io_base gets set in pmac_pci_init */ |
| 621 | ISA_DMA_THRESHOLD = ~0L; | 599 | ISA_DMA_THRESHOLD = ~0L; |
| @@ -623,17 +601,10 @@ static int __init pmac_probe(void) | |||
| 623 | DMA_MODE_WRITE = 2; | 601 | DMA_MODE_WRITE = 2; |
| 624 | #endif /* CONFIG_PPC32 */ | 602 | #endif /* CONFIG_PPC32 */ |
| 625 | 603 | ||
| 626 | #ifdef CONFIG_PMAC_SMU | ||
| 627 | /* | ||
| 628 | * SMU based G5s need some memory below 2Gb, at least the current | ||
| 629 | * driver needs that. We have to allocate it now. We allocate 4k | ||
| 630 | * (1 small page) for now. | ||
| 631 | */ | ||
| 632 | smu_cmdbuf_abs = memblock_alloc_base(4096, 4096, 0x80000000UL); | ||
| 633 | #endif /* CONFIG_PMAC_SMU */ | ||
| 634 | |||
| 635 | pm_power_off = pmac_power_off; | 604 | pm_power_off = pmac_power_off; |
| 636 | 605 | ||
| 606 | pmac_init(); | ||
| 607 | |||
| 637 | return 1; | 608 | return 1; |
| 638 | } | 609 | } |
| 639 | 610 | ||
| @@ -641,7 +612,6 @@ define_machine(powermac) { | |||
| 641 | .name = "PowerMac", | 612 | .name = "PowerMac", |
| 642 | .probe = pmac_probe, | 613 | .probe = pmac_probe, |
| 643 | .setup_arch = pmac_setup_arch, | 614 | .setup_arch = pmac_setup_arch, |
| 644 | .init_early = pmac_init_early, | ||
| 645 | .show_cpuinfo = pmac_show_cpuinfo, | 615 | .show_cpuinfo = pmac_show_cpuinfo, |
| 646 | .init_IRQ = pmac_pic_init, | 616 | .init_IRQ = pmac_pic_init, |
| 647 | .get_irq = NULL, /* changed later */ | 617 | .get_irq = NULL, /* changed later */ |
diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c index 28a147ca32ba..834868b9fdc9 100644 --- a/arch/powerpc/platforms/powermac/smp.c +++ b/arch/powerpc/platforms/powermac/smp.c | |||
| @@ -857,9 +857,8 @@ static int smp_core99_cpu_notify(struct notifier_block *self, | |||
| 857 | { | 857 | { |
| 858 | int rc; | 858 | int rc; |
| 859 | 859 | ||
| 860 | switch(action) { | 860 | switch(action & ~CPU_TASKS_FROZEN) { |
| 861 | case CPU_UP_PREPARE: | 861 | case CPU_UP_PREPARE: |
| 862 | case CPU_UP_PREPARE_FROZEN: | ||
| 863 | /* Open i2c bus if it was used for tb sync */ | 862 | /* Open i2c bus if it was used for tb sync */ |
| 864 | if (pmac_tb_clock_chip_host) { | 863 | if (pmac_tb_clock_chip_host) { |
| 865 | rc = pmac_i2c_open(pmac_tb_clock_chip_host, 1); | 864 | rc = pmac_i2c_open(pmac_tb_clock_chip_host, 1); |
diff --git a/arch/powerpc/platforms/powernv/Makefile b/arch/powerpc/platforms/powernv/Makefile index cd9711e72df6..b5d98cb3f482 100644 --- a/arch/powerpc/platforms/powernv/Makefile +++ b/arch/powerpc/platforms/powernv/Makefile | |||
| @@ -6,6 +6,7 @@ obj-y += opal-kmsg.o | |||
| 6 | 6 | ||
| 7 | obj-$(CONFIG_SMP) += smp.o subcore.o subcore-asm.o | 7 | obj-$(CONFIG_SMP) += smp.o subcore.o subcore-asm.o |
| 8 | obj-$(CONFIG_PCI) += pci.o pci-ioda.o npu-dma.o | 8 | obj-$(CONFIG_PCI) += pci.o pci-ioda.o npu-dma.o |
| 9 | obj-$(CONFIG_CXL_BASE) += pci-cxl.o | ||
| 9 | obj-$(CONFIG_EEH) += eeh-powernv.o | 10 | obj-$(CONFIG_EEH) += eeh-powernv.o |
| 10 | obj-$(CONFIG_PPC_SCOM) += opal-xscom.o | 11 | obj-$(CONFIG_PPC_SCOM) += opal-xscom.o |
| 11 | obj-$(CONFIG_MEMORY_FAILURE) += opal-memory-errors.o | 12 | obj-$(CONFIG_MEMORY_FAILURE) += opal-memory-errors.o |
diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c b/arch/powerpc/platforms/powernv/eeh-powernv.c index 9226df11bf39..86544ea85dc3 100644 --- a/arch/powerpc/platforms/powernv/eeh-powernv.c +++ b/arch/powerpc/platforms/powernv/eeh-powernv.c | |||
| @@ -36,6 +36,7 @@ | |||
| 36 | #include <asm/msi_bitmap.h> | 36 | #include <asm/msi_bitmap.h> |
| 37 | #include <asm/opal.h> | 37 | #include <asm/opal.h> |
| 38 | #include <asm/ppc-pci.h> | 38 | #include <asm/ppc-pci.h> |
| 39 | #include <asm/pnv-pci.h> | ||
| 39 | 40 | ||
| 40 | #include "powernv.h" | 41 | #include "powernv.h" |
| 41 | #include "pci.h" | 42 | #include "pci.h" |
| @@ -717,12 +718,12 @@ static int pnv_eeh_get_state(struct eeh_pe *pe, int *delay) | |||
| 717 | return ret; | 718 | return ret; |
| 718 | } | 719 | } |
| 719 | 720 | ||
| 720 | static s64 pnv_eeh_phb_poll(struct pnv_phb *phb) | 721 | static s64 pnv_eeh_poll(unsigned long id) |
| 721 | { | 722 | { |
| 722 | s64 rc = OPAL_HARDWARE; | 723 | s64 rc = OPAL_HARDWARE; |
| 723 | 724 | ||
| 724 | while (1) { | 725 | while (1) { |
| 725 | rc = opal_pci_poll(phb->opal_id); | 726 | rc = opal_pci_poll(id); |
| 726 | if (rc <= 0) | 727 | if (rc <= 0) |
| 727 | break; | 728 | break; |
| 728 | 729 | ||
| @@ -762,7 +763,7 @@ int pnv_eeh_phb_reset(struct pci_controller *hose, int option) | |||
| 762 | * reset followed by hot reset on root bus. So we also | 763 | * reset followed by hot reset on root bus. So we also |
| 763 | * need the PCI bus settlement delay. | 764 | * need the PCI bus settlement delay. |
| 764 | */ | 765 | */ |
| 765 | rc = pnv_eeh_phb_poll(phb); | 766 | rc = pnv_eeh_poll(phb->opal_id); |
| 766 | if (option == EEH_RESET_DEACTIVATE) { | 767 | if (option == EEH_RESET_DEACTIVATE) { |
| 767 | if (system_state < SYSTEM_RUNNING) | 768 | if (system_state < SYSTEM_RUNNING) |
| 768 | udelay(1000 * EEH_PE_RST_SETTLE_TIME); | 769 | udelay(1000 * EEH_PE_RST_SETTLE_TIME); |
| @@ -805,7 +806,7 @@ static int pnv_eeh_root_reset(struct pci_controller *hose, int option) | |||
| 805 | goto out; | 806 | goto out; |
| 806 | 807 | ||
| 807 | /* Poll state of the PHB until the request is done */ | 808 | /* Poll state of the PHB until the request is done */ |
| 808 | rc = pnv_eeh_phb_poll(phb); | 809 | rc = pnv_eeh_poll(phb->opal_id); |
| 809 | if (option == EEH_RESET_DEACTIVATE) | 810 | if (option == EEH_RESET_DEACTIVATE) |
| 810 | msleep(EEH_PE_RST_SETTLE_TIME); | 811 | msleep(EEH_PE_RST_SETTLE_TIME); |
| 811 | out: | 812 | out: |
| @@ -815,7 +816,7 @@ out: | |||
| 815 | return 0; | 816 | return 0; |
| 816 | } | 817 | } |
| 817 | 818 | ||
| 818 | static int pnv_eeh_bridge_reset(struct pci_dev *dev, int option) | 819 | static int __pnv_eeh_bridge_reset(struct pci_dev *dev, int option) |
| 819 | { | 820 | { |
| 820 | struct pci_dn *pdn = pci_get_pdn_by_devfn(dev->bus, dev->devfn); | 821 | struct pci_dn *pdn = pci_get_pdn_by_devfn(dev->bus, dev->devfn); |
| 821 | struct eeh_dev *edev = pdn_to_eeh_dev(pdn); | 822 | struct eeh_dev *edev = pdn_to_eeh_dev(pdn); |
| @@ -866,6 +867,44 @@ static int pnv_eeh_bridge_reset(struct pci_dev *dev, int option) | |||
| 866 | return 0; | 867 | return 0; |
| 867 | } | 868 | } |
| 868 | 869 | ||
| 870 | static int pnv_eeh_bridge_reset(struct pci_dev *pdev, int option) | ||
| 871 | { | ||
| 872 | struct pci_controller *hose = pci_bus_to_host(pdev->bus); | ||
| 873 | struct pnv_phb *phb = hose->private_data; | ||
| 874 | struct device_node *dn = pci_device_to_OF_node(pdev); | ||
| 875 | uint64_t id = PCI_SLOT_ID(phb->opal_id, | ||
| 876 | (pdev->bus->number << 8) | pdev->devfn); | ||
| 877 | uint8_t scope; | ||
| 878 | int64_t rc; | ||
| 879 | |||
| 880 | /* Hot reset to the bus if firmware cannot handle */ | ||
| 881 | if (!dn || !of_get_property(dn, "ibm,reset-by-firmware", NULL)) | ||
| 882 | return __pnv_eeh_bridge_reset(pdev, option); | ||
| 883 | |||
| 884 | switch (option) { | ||
| 885 | case EEH_RESET_FUNDAMENTAL: | ||
| 886 | scope = OPAL_RESET_PCI_FUNDAMENTAL; | ||
| 887 | break; | ||
| 888 | case EEH_RESET_HOT: | ||
| 889 | scope = OPAL_RESET_PCI_HOT; | ||
| 890 | break; | ||
| 891 | case EEH_RESET_DEACTIVATE: | ||
| 892 | return 0; | ||
| 893 | default: | ||
| 894 | dev_dbg(&pdev->dev, "%s: Unsupported reset %d\n", | ||
| 895 | __func__, option); | ||
| 896 | return -EINVAL; | ||
| 897 | } | ||
| 898 | |||
| 899 | rc = opal_pci_reset(id, scope, OPAL_ASSERT_RESET); | ||
| 900 | if (rc <= OPAL_SUCCESS) | ||
| 901 | goto out; | ||
| 902 | |||
| 903 | rc = pnv_eeh_poll(id); | ||
| 904 | out: | ||
| 905 | return (rc == OPAL_SUCCESS) ? 0 : -EIO; | ||
| 906 | } | ||
| 907 | |||
| 869 | void pnv_pci_reset_secondary_bus(struct pci_dev *dev) | 908 | void pnv_pci_reset_secondary_bus(struct pci_dev *dev) |
| 870 | { | 909 | { |
| 871 | struct pci_controller *hose; | 910 | struct pci_controller *hose; |
diff --git a/arch/powerpc/platforms/powernv/idle.c b/arch/powerpc/platforms/powernv/idle.c index fcc8b6861b63..479c25601612 100644 --- a/arch/powerpc/platforms/powernv/idle.c +++ b/arch/powerpc/platforms/powernv/idle.c | |||
| @@ -27,9 +27,12 @@ | |||
| 27 | #include "powernv.h" | 27 | #include "powernv.h" |
| 28 | #include "subcore.h" | 28 | #include "subcore.h" |
| 29 | 29 | ||
| 30 | /* Power ISA 3.0 allows for stop states 0x0 - 0xF */ | ||
| 31 | #define MAX_STOP_STATE 0xF | ||
| 32 | |||
| 30 | static u32 supported_cpuidle_states; | 33 | static u32 supported_cpuidle_states; |
| 31 | 34 | ||
| 32 | int pnv_save_sprs_for_winkle(void) | 35 | static int pnv_save_sprs_for_deep_states(void) |
| 33 | { | 36 | { |
| 34 | int cpu; | 37 | int cpu; |
| 35 | int rc; | 38 | int rc; |
| @@ -50,15 +53,19 @@ int pnv_save_sprs_for_winkle(void) | |||
| 50 | uint64_t pir = get_hard_smp_processor_id(cpu); | 53 | uint64_t pir = get_hard_smp_processor_id(cpu); |
| 51 | uint64_t hsprg0_val = (uint64_t)&paca[cpu]; | 54 | uint64_t hsprg0_val = (uint64_t)&paca[cpu]; |
| 52 | 55 | ||
| 53 | /* | 56 | if (!cpu_has_feature(CPU_FTR_ARCH_300)) { |
| 54 | * HSPRG0 is used to store the cpu's pointer to paca. Hence last | 57 | /* |
| 55 | * 3 bits are guaranteed to be 0. Program slw to restore HSPRG0 | 58 | * HSPRG0 is used to store the cpu's pointer to paca. |
| 56 | * with 63rd bit set, so that when a thread wakes up at 0x100 we | 59 | * Hence last 3 bits are guaranteed to be 0. Program |
| 57 | * can use this bit to distinguish between fastsleep and | 60 | * slw to restore HSPRG0 with 63rd bit set, so that |
| 58 | * deep winkle. | 61 | * when a thread wakes up at 0x100 we can use this bit |
| 59 | */ | 62 | * to distinguish between fastsleep and deep winkle. |
| 60 | hsprg0_val |= 1; | 63 | * This is not necessary with stop/psscr since PLS |
| 61 | 64 | * field of psscr indicates which state we are waking | |
| 65 | * up from. | ||
| 66 | */ | ||
| 67 | hsprg0_val |= 1; | ||
| 68 | } | ||
| 62 | rc = opal_slw_set_reg(pir, SPRN_HSPRG0, hsprg0_val); | 69 | rc = opal_slw_set_reg(pir, SPRN_HSPRG0, hsprg0_val); |
| 63 | if (rc != 0) | 70 | if (rc != 0) |
| 64 | return rc; | 71 | return rc; |
| @@ -130,8 +137,8 @@ static void pnv_alloc_idle_core_states(void) | |||
| 130 | 137 | ||
| 131 | update_subcore_sibling_mask(); | 138 | update_subcore_sibling_mask(); |
| 132 | 139 | ||
| 133 | if (supported_cpuidle_states & OPAL_PM_WINKLE_ENABLED) | 140 | if (supported_cpuidle_states & OPAL_PM_LOSE_FULL_CONTEXT) |
| 134 | pnv_save_sprs_for_winkle(); | 141 | pnv_save_sprs_for_deep_states(); |
| 135 | } | 142 | } |
| 136 | 143 | ||
| 137 | u32 pnv_get_supported_cpuidle_states(void) | 144 | u32 pnv_get_supported_cpuidle_states(void) |
| @@ -230,43 +237,162 @@ static DEVICE_ATTR(fastsleep_workaround_applyonce, 0600, | |||
| 230 | show_fastsleep_workaround_applyonce, | 237 | show_fastsleep_workaround_applyonce, |
| 231 | store_fastsleep_workaround_applyonce); | 238 | store_fastsleep_workaround_applyonce); |
| 232 | 239 | ||
| 233 | static int __init pnv_init_idle_states(void) | 240 | |
| 241 | /* | ||
| 242 | * Used for ppc_md.power_save which needs a function with no parameters | ||
| 243 | */ | ||
| 244 | static void power9_idle(void) | ||
| 234 | { | 245 | { |
| 235 | struct device_node *power_mgt; | 246 | /* Requesting stop state 0 */ |
| 236 | int dt_idle_states; | 247 | power9_idle_stop(0); |
| 237 | u32 *flags; | 248 | } |
| 238 | int i; | 249 | /* |
| 250 | * First deep stop state. Used to figure out when to save/restore | ||
| 251 | * hypervisor context. | ||
| 252 | */ | ||
| 253 | u64 pnv_first_deep_stop_state = MAX_STOP_STATE; | ||
| 239 | 254 | ||
| 240 | supported_cpuidle_states = 0; | 255 | /* |
| 256 | * Deepest stop idle state. Used when a cpu is offlined | ||
| 257 | */ | ||
| 258 | u64 pnv_deepest_stop_state; | ||
| 241 | 259 | ||
| 242 | if (cpuidle_disable != IDLE_NO_OVERRIDE) | 260 | /* |
| 243 | goto out; | 261 | * Power ISA 3.0 idle initialization. |
| 262 | * | ||
| 263 | * POWER ISA 3.0 defines a new SPR Processor stop Status and Control | ||
| 264 | * Register (PSSCR) to control idle behavior. | ||
| 265 | * | ||
| 266 | * PSSCR layout: | ||
| 267 | * ---------------------------------------------------------- | ||
| 268 | * | PLS | /// | SD | ESL | EC | PSLL | /// | TR | MTL | RL | | ||
| 269 | * ---------------------------------------------------------- | ||
| 270 | * 0 4 41 42 43 44 48 54 56 60 | ||
| 271 | * | ||
| 272 | * PSSCR key fields: | ||
| 273 | * Bits 0:3 - Power-Saving Level Status (PLS). This field indicates the | ||
| 274 | * lowest power-saving state the thread entered since stop instruction was | ||
| 275 | * last executed. | ||
| 276 | * | ||
| 277 | * Bit 41 - Status Disable(SD) | ||
| 278 | * 0 - Shows PLS entries | ||
| 279 | * 1 - PLS entries are all 0 | ||
| 280 | * | ||
| 281 | * Bit 42 - Enable State Loss | ||
| 282 | * 0 - No state is lost irrespective of other fields | ||
| 283 | * 1 - Allows state loss | ||
| 284 | * | ||
| 285 | * Bit 43 - Exit Criterion | ||
| 286 | * 0 - Exit from power-save mode on any interrupt | ||
| 287 | * 1 - Exit from power-save mode controlled by LPCR's PECE bits | ||
| 288 | * | ||
| 289 | * Bits 44:47 - Power-Saving Level Limit | ||
| 290 | * This limits the power-saving level that can be entered into. | ||
| 291 | * | ||
| 292 | * Bits 60:63 - Requested Level | ||
| 293 | * Used to specify which power-saving level must be entered on executing | ||
| 294 | * stop instruction | ||
| 295 | * | ||
| 296 | * @np: /ibm,opal/power-mgt device node | ||
| 297 | * @flags: cpu-idle-state-flags array | ||
| 298 | * @dt_idle_states: Number of idle state entries | ||
| 299 | * Returns 0 on success | ||
| 300 | */ | ||
| 301 | static int __init pnv_arch300_idle_init(struct device_node *np, u32 *flags, | ||
| 302 | int dt_idle_states) | ||
| 303 | { | ||
| 304 | u64 *psscr_val = NULL; | ||
| 305 | int rc = 0, i; | ||
| 244 | 306 | ||
| 245 | if (!firmware_has_feature(FW_FEATURE_OPAL)) | 307 | psscr_val = kcalloc(dt_idle_states, sizeof(*psscr_val), |
| 308 | GFP_KERNEL); | ||
| 309 | if (!psscr_val) { | ||
| 310 | rc = -1; | ||
| 311 | goto out; | ||
| 312 | } | ||
| 313 | if (of_property_read_u64_array(np, | ||
| 314 | "ibm,cpu-idle-state-psscr", | ||
| 315 | psscr_val, dt_idle_states)) { | ||
| 316 | pr_warn("cpuidle-powernv: missing ibm,cpu-idle-states-psscr in DT\n"); | ||
| 317 | rc = -1; | ||
| 246 | goto out; | 318 | goto out; |
| 319 | } | ||
| 247 | 320 | ||
| 248 | power_mgt = of_find_node_by_path("/ibm,opal/power-mgt"); | 321 | /* |
| 249 | if (!power_mgt) { | 322 | * Set pnv_first_deep_stop_state and pnv_deepest_stop_state. |
| 323 | * pnv_first_deep_stop_state should be set to the first stop | ||
| 324 | * level to cause hypervisor state loss. | ||
| 325 | * pnv_deepest_stop_state should be set to the deepest stop | ||
| 326 | * stop state. | ||
| 327 | */ | ||
| 328 | pnv_first_deep_stop_state = MAX_STOP_STATE; | ||
| 329 | for (i = 0; i < dt_idle_states; i++) { | ||
| 330 | u64 psscr_rl = psscr_val[i] & PSSCR_RL_MASK; | ||
| 331 | |||
| 332 | if ((flags[i] & OPAL_PM_LOSE_FULL_CONTEXT) && | ||
| 333 | (pnv_first_deep_stop_state > psscr_rl)) | ||
| 334 | pnv_first_deep_stop_state = psscr_rl; | ||
| 335 | |||
| 336 | if (pnv_deepest_stop_state < psscr_rl) | ||
| 337 | pnv_deepest_stop_state = psscr_rl; | ||
| 338 | } | ||
| 339 | |||
| 340 | out: | ||
| 341 | kfree(psscr_val); | ||
| 342 | return rc; | ||
| 343 | } | ||
| 344 | |||
| 345 | /* | ||
| 346 | * Probe device tree for supported idle states | ||
| 347 | */ | ||
| 348 | static void __init pnv_probe_idle_states(void) | ||
| 349 | { | ||
| 350 | struct device_node *np; | ||
| 351 | int dt_idle_states; | ||
| 352 | u32 *flags = NULL; | ||
| 353 | int i; | ||
| 354 | |||
| 355 | np = of_find_node_by_path("/ibm,opal/power-mgt"); | ||
| 356 | if (!np) { | ||
| 250 | pr_warn("opal: PowerMgmt Node not found\n"); | 357 | pr_warn("opal: PowerMgmt Node not found\n"); |
| 251 | goto out; | 358 | goto out; |
| 252 | } | 359 | } |
| 253 | dt_idle_states = of_property_count_u32_elems(power_mgt, | 360 | dt_idle_states = of_property_count_u32_elems(np, |
| 254 | "ibm,cpu-idle-state-flags"); | 361 | "ibm,cpu-idle-state-flags"); |
| 255 | if (dt_idle_states < 0) { | 362 | if (dt_idle_states < 0) { |
| 256 | pr_warn("cpuidle-powernv: no idle states found in the DT\n"); | 363 | pr_warn("cpuidle-powernv: no idle states found in the DT\n"); |
| 257 | goto out; | 364 | goto out; |
| 258 | } | 365 | } |
| 259 | 366 | ||
| 260 | flags = kzalloc(sizeof(*flags) * dt_idle_states, GFP_KERNEL); | 367 | flags = kcalloc(dt_idle_states, sizeof(*flags), GFP_KERNEL); |
| 261 | if (of_property_read_u32_array(power_mgt, | 368 | |
| 369 | if (of_property_read_u32_array(np, | ||
| 262 | "ibm,cpu-idle-state-flags", flags, dt_idle_states)) { | 370 | "ibm,cpu-idle-state-flags", flags, dt_idle_states)) { |
| 263 | pr_warn("cpuidle-powernv: missing ibm,cpu-idle-state-flags in DT\n"); | 371 | pr_warn("cpuidle-powernv: missing ibm,cpu-idle-state-flags in DT\n"); |
| 264 | goto out_free; | 372 | goto out; |
| 373 | } | ||
| 374 | |||
| 375 | if (cpu_has_feature(CPU_FTR_ARCH_300)) { | ||
| 376 | if (pnv_arch300_idle_init(np, flags, dt_idle_states)) | ||
| 377 | goto out; | ||
| 265 | } | 378 | } |
| 266 | 379 | ||
| 267 | for (i = 0; i < dt_idle_states; i++) | 380 | for (i = 0; i < dt_idle_states; i++) |
| 268 | supported_cpuidle_states |= flags[i]; | 381 | supported_cpuidle_states |= flags[i]; |
| 269 | 382 | ||
| 383 | out: | ||
| 384 | kfree(flags); | ||
| 385 | } | ||
| 386 | static int __init pnv_init_idle_states(void) | ||
| 387 | { | ||
| 388 | |||
| 389 | supported_cpuidle_states = 0; | ||
| 390 | |||
| 391 | if (cpuidle_disable != IDLE_NO_OVERRIDE) | ||
| 392 | goto out; | ||
| 393 | |||
| 394 | pnv_probe_idle_states(); | ||
| 395 | |||
| 270 | if (!(supported_cpuidle_states & OPAL_PM_SLEEP_ENABLED_ER1)) { | 396 | if (!(supported_cpuidle_states & OPAL_PM_SLEEP_ENABLED_ER1)) { |
| 271 | patch_instruction( | 397 | patch_instruction( |
| 272 | (unsigned int *)pnv_fastsleep_workaround_at_entry, | 398 | (unsigned int *)pnv_fastsleep_workaround_at_entry, |
| @@ -285,8 +411,12 @@ static int __init pnv_init_idle_states(void) | |||
| 285 | } | 411 | } |
| 286 | 412 | ||
| 287 | pnv_alloc_idle_core_states(); | 413 | pnv_alloc_idle_core_states(); |
| 288 | out_free: | 414 | |
| 289 | kfree(flags); | 415 | if (supported_cpuidle_states & OPAL_PM_NAP_ENABLED) |
| 416 | ppc_md.power_save = power7_idle; | ||
| 417 | else if (supported_cpuidle_states & OPAL_PM_STOP_INST_FAST) | ||
| 418 | ppc_md.power_save = power9_idle; | ||
| 419 | |||
| 290 | out: | 420 | out: |
| 291 | return 0; | 421 | return 0; |
| 292 | } | 422 | } |
diff --git a/arch/powerpc/platforms/powernv/npu-dma.c b/arch/powerpc/platforms/powernv/npu-dma.c index 0459e100b4e7..4383a5ff82ba 100644 --- a/arch/powerpc/platforms/powernv/npu-dma.c +++ b/arch/powerpc/platforms/powernv/npu-dma.c | |||
| @@ -180,7 +180,7 @@ long pnv_npu_set_window(struct pnv_ioda_pe *npe, int num, | |||
| 180 | pe_err(npe, "Failed to configure TCE table, err %lld\n", rc); | 180 | pe_err(npe, "Failed to configure TCE table, err %lld\n", rc); |
| 181 | return rc; | 181 | return rc; |
| 182 | } | 182 | } |
| 183 | pnv_pci_ioda2_tce_invalidate_entire(phb, false); | 183 | pnv_pci_phb3_tce_invalidate_entire(phb, false); |
| 184 | 184 | ||
| 185 | /* Add the table to the list so its TCE cache will get invalidated */ | 185 | /* Add the table to the list so its TCE cache will get invalidated */ |
| 186 | pnv_pci_link_table_and_group(phb->hose->node, num, | 186 | pnv_pci_link_table_and_group(phb->hose->node, num, |
| @@ -204,7 +204,7 @@ long pnv_npu_unset_window(struct pnv_ioda_pe *npe, int num) | |||
| 204 | pe_err(npe, "Unmapping failed, ret = %lld\n", rc); | 204 | pe_err(npe, "Unmapping failed, ret = %lld\n", rc); |
| 205 | return rc; | 205 | return rc; |
| 206 | } | 206 | } |
| 207 | pnv_pci_ioda2_tce_invalidate_entire(phb, false); | 207 | pnv_pci_phb3_tce_invalidate_entire(phb, false); |
| 208 | 208 | ||
| 209 | pnv_pci_unlink_table_and_group(npe->table_group.tables[num], | 209 | pnv_pci_unlink_table_and_group(npe->table_group.tables[num], |
| 210 | &npe->table_group); | 210 | &npe->table_group); |
| @@ -270,7 +270,7 @@ static int pnv_npu_dma_set_bypass(struct pnv_ioda_pe *npe) | |||
| 270 | 0 /* bypass base */, top); | 270 | 0 /* bypass base */, top); |
| 271 | 271 | ||
| 272 | if (rc == OPAL_SUCCESS) | 272 | if (rc == OPAL_SUCCESS) |
| 273 | pnv_pci_ioda2_tce_invalidate_entire(phb, false); | 273 | pnv_pci_phb3_tce_invalidate_entire(phb, false); |
| 274 | 274 | ||
| 275 | return rc; | 275 | return rc; |
| 276 | } | 276 | } |
| @@ -334,7 +334,7 @@ void pnv_npu_take_ownership(struct pnv_ioda_pe *npe) | |||
| 334 | pe_err(npe, "Failed to disable bypass, err %lld\n", rc); | 334 | pe_err(npe, "Failed to disable bypass, err %lld\n", rc); |
| 335 | return; | 335 | return; |
| 336 | } | 336 | } |
| 337 | pnv_pci_ioda2_tce_invalidate_entire(npe->phb, false); | 337 | pnv_pci_phb3_tce_invalidate_entire(npe->phb, false); |
| 338 | } | 338 | } |
| 339 | 339 | ||
| 340 | struct pnv_ioda_pe *pnv_pci_npu_setup_iommu(struct pnv_ioda_pe *npe) | 340 | struct pnv_ioda_pe *pnv_pci_npu_setup_iommu(struct pnv_ioda_pe *npe) |
diff --git a/arch/powerpc/platforms/powernv/opal-async.c b/arch/powerpc/platforms/powernv/opal-async.c index bdc8c0c71d15..83bebeec0fea 100644 --- a/arch/powerpc/platforms/powernv/opal-async.c +++ b/arch/powerpc/platforms/powernv/opal-async.c | |||
| @@ -117,6 +117,11 @@ int opal_async_wait_response(uint64_t token, struct opal_msg *msg) | |||
| 117 | return -EINVAL; | 117 | return -EINVAL; |
| 118 | } | 118 | } |
| 119 | 119 | ||
| 120 | /* Wakeup the poller before we wait for events to speed things | ||
| 121 | * up on platforms or simulators where the interrupts aren't | ||
| 122 | * functional. | ||
| 123 | */ | ||
| 124 | opal_wake_poller(); | ||
| 120 | wait_event(opal_async_wait, test_bit(token, opal_async_complete_map)); | 125 | wait_event(opal_async_wait, test_bit(token, opal_async_complete_map)); |
| 121 | memcpy(msg, &opal_async_responses[token], sizeof(*msg)); | 126 | memcpy(msg, &opal_async_responses[token], sizeof(*msg)); |
| 122 | 127 | ||
diff --git a/arch/powerpc/platforms/powernv/opal-memory-errors.c b/arch/powerpc/platforms/powernv/opal-memory-errors.c index 00a29432be39..4495f428b500 100644 --- a/arch/powerpc/platforms/powernv/opal-memory-errors.c +++ b/arch/powerpc/platforms/powernv/opal-memory-errors.c | |||
| @@ -44,7 +44,7 @@ static void handle_memory_error_event(struct OpalMemoryErrorData *merr_evt) | |||
| 44 | { | 44 | { |
| 45 | uint64_t paddr_start, paddr_end; | 45 | uint64_t paddr_start, paddr_end; |
| 46 | 46 | ||
| 47 | pr_debug("%s: Retrived memory error event, type: 0x%x\n", | 47 | pr_debug("%s: Retrieved memory error event, type: 0x%x\n", |
| 48 | __func__, merr_evt->type); | 48 | __func__, merr_evt->type); |
| 49 | switch (merr_evt->type) { | 49 | switch (merr_evt->type) { |
| 50 | case OPAL_MEM_ERR_TYPE_RESILIENCE: | 50 | case OPAL_MEM_ERR_TYPE_RESILIENCE: |
diff --git a/arch/powerpc/platforms/powernv/opal-sensor.c b/arch/powerpc/platforms/powernv/opal-sensor.c index a06059df9239..308efd170c27 100644 --- a/arch/powerpc/platforms/powernv/opal-sensor.c +++ b/arch/powerpc/platforms/powernv/opal-sensor.c | |||
| @@ -55,7 +55,7 @@ int opal_get_sensor_data(u32 sensor_hndl, u32 *sensor_data) | |||
| 55 | goto out_token; | 55 | goto out_token; |
| 56 | } | 56 | } |
| 57 | 57 | ||
| 58 | ret = opal_error_code(be64_to_cpu(msg.params[1])); | 58 | ret = opal_error_code(opal_get_async_rc(msg)); |
| 59 | *sensor_data = be32_to_cpu(data); | 59 | *sensor_data = be32_to_cpu(data); |
| 60 | break; | 60 | break; |
| 61 | 61 | ||
diff --git a/arch/powerpc/platforms/powernv/opal-sysparam.c b/arch/powerpc/platforms/powernv/opal-sysparam.c index afe66c576a38..23fb6647dced 100644 --- a/arch/powerpc/platforms/powernv/opal-sysparam.c +++ b/arch/powerpc/platforms/powernv/opal-sysparam.c | |||
| @@ -67,7 +67,7 @@ static ssize_t opal_get_sys_param(u32 param_id, u32 length, void *buffer) | |||
| 67 | goto out_token; | 67 | goto out_token; |
| 68 | } | 68 | } |
| 69 | 69 | ||
| 70 | ret = opal_error_code(be64_to_cpu(msg.params[1])); | 70 | ret = opal_error_code(opal_get_async_rc(msg)); |
| 71 | 71 | ||
| 72 | out_token: | 72 | out_token: |
| 73 | opal_async_release_token(token); | 73 | opal_async_release_token(token); |
| @@ -103,7 +103,7 @@ static int opal_set_sys_param(u32 param_id, u32 length, void *buffer) | |||
| 103 | goto out_token; | 103 | goto out_token; |
| 104 | } | 104 | } |
| 105 | 105 | ||
| 106 | ret = opal_error_code(be64_to_cpu(msg.params[1])); | 106 | ret = opal_error_code(opal_get_async_rc(msg)); |
| 107 | 107 | ||
| 108 | out_token: | 108 | out_token: |
| 109 | opal_async_release_token(token); | 109 | opal_async_release_token(token); |
diff --git a/arch/powerpc/platforms/powernv/opal-tracepoints.c b/arch/powerpc/platforms/powernv/opal-tracepoints.c index e11273b2386d..1e496b780efd 100644 --- a/arch/powerpc/platforms/powernv/opal-tracepoints.c +++ b/arch/powerpc/platforms/powernv/opal-tracepoints.c | |||
| @@ -1,6 +1,7 @@ | |||
| 1 | #include <linux/percpu.h> | 1 | #include <linux/percpu.h> |
| 2 | #include <linux/jump_label.h> | 2 | #include <linux/jump_label.h> |
| 3 | #include <asm/trace.h> | 3 | #include <asm/trace.h> |
| 4 | #include <asm/asm-prototypes.h> | ||
| 4 | 5 | ||
| 5 | #ifdef HAVE_JUMP_LABEL | 6 | #ifdef HAVE_JUMP_LABEL |
| 6 | struct static_key opal_tracepoint_key = STATIC_KEY_INIT; | 7 | struct static_key opal_tracepoint_key = STATIC_KEY_INIT; |
diff --git a/arch/powerpc/platforms/powernv/opal-wrappers.S b/arch/powerpc/platforms/powernv/opal-wrappers.S index e45b88a5d7e0..cf928bba4d9a 100644 --- a/arch/powerpc/platforms/powernv/opal-wrappers.S +++ b/arch/powerpc/platforms/powernv/opal-wrappers.S | |||
| @@ -59,7 +59,7 @@ END_FTR_SECTION(0, 1); \ | |||
| 59 | #define OPAL_CALL(name, token) \ | 59 | #define OPAL_CALL(name, token) \ |
| 60 | _GLOBAL_TOC(name); \ | 60 | _GLOBAL_TOC(name); \ |
| 61 | mflr r0; \ | 61 | mflr r0; \ |
| 62 | std r0,16(r1); \ | 62 | std r0,PPC_LR_STKOFF(r1); \ |
| 63 | li r0,token; \ | 63 | li r0,token; \ |
| 64 | OPAL_BRANCH(opal_tracepoint_entry) \ | 64 | OPAL_BRANCH(opal_tracepoint_entry) \ |
| 65 | mfcr r12; \ | 65 | mfcr r12; \ |
| @@ -92,7 +92,7 @@ opal_return: | |||
| 92 | FIXUP_ENDIAN | 92 | FIXUP_ENDIAN |
| 93 | ld r2,PACATOC(r13); | 93 | ld r2,PACATOC(r13); |
| 94 | lwz r4,8(r1); | 94 | lwz r4,8(r1); |
| 95 | ld r5,16(r1); | 95 | ld r5,PPC_LR_STKOFF(r1); |
| 96 | ld r6,PACASAVEDMSR(r13); | 96 | ld r6,PACASAVEDMSR(r13); |
| 97 | mtspr SPRN_SRR0,r5; | 97 | mtspr SPRN_SRR0,r5; |
| 98 | mtspr SPRN_SRR1,r6; | 98 | mtspr SPRN_SRR1,r6; |
| @@ -157,43 +157,37 @@ opal_tracepoint_return: | |||
| 157 | blr | 157 | blr |
| 158 | #endif | 158 | #endif |
| 159 | 159 | ||
| 160 | /* | 160 | #define OPAL_CALL_REAL(name, token) \ |
| 161 | * Make opal call in realmode. This is a generic function to be called | 161 | _GLOBAL_TOC(name); \ |
| 162 | * from realmode. It handles endianness. | 162 | mflr r0; \ |
| 163 | * | 163 | std r0,PPC_LR_STKOFF(r1); \ |
| 164 | * r13 - paca pointer | 164 | li r0,token; \ |
| 165 | * r1 - stack pointer | 165 | mfcr r12; \ |
| 166 | * r0 - opal token | 166 | stw r12,8(r1); \ |
| 167 | */ | 167 | \ |
| 168 | _GLOBAL(opal_call_realmode) | 168 | /* Set opal return address */ \ |
| 169 | mflr r12 | 169 | LOAD_REG_ADDR(r11, opal_return_realmode); \ |
| 170 | std r12,PPC_LR_STKOFF(r1) | 170 | mtlr r11; \ |
| 171 | ld r2,PACATOC(r13) | 171 | mfmsr r12; \ |
| 172 | /* Set opal return address */ | 172 | li r11,MSR_LE; \ |
| 173 | LOAD_REG_ADDR(r12,return_from_opal_call) | 173 | andc r12,r12,r11; \ |
| 174 | mtlr r12 | 174 | mtspr SPRN_HSRR1,r12; \ |
| 175 | 175 | LOAD_REG_ADDR(r11,opal); \ | |
| 176 | mfmsr r12 | 176 | ld r12,8(r11); \ |
| 177 | #ifdef __LITTLE_ENDIAN__ | 177 | ld r2,0(r11); \ |
| 178 | /* Handle endian-ness */ | 178 | mtspr SPRN_HSRR0,r12; \ |
| 179 | li r11,MSR_LE | ||
| 180 | andc r12,r12,r11 | ||
| 181 | #endif | ||
| 182 | mtspr SPRN_HSRR1,r12 | ||
| 183 | LOAD_REG_ADDR(r11,opal) | ||
| 184 | ld r12,8(r11) | ||
| 185 | ld r2,0(r11) | ||
| 186 | mtspr SPRN_HSRR0,r12 | ||
| 187 | hrfid | 179 | hrfid |
| 188 | 180 | ||
| 189 | return_from_opal_call: | 181 | opal_return_realmode: |
| 190 | #ifdef __LITTLE_ENDIAN__ | ||
| 191 | FIXUP_ENDIAN | 182 | FIXUP_ENDIAN |
| 192 | #endif | 183 | ld r2,PACATOC(r13); |
| 184 | lwz r11,8(r1); | ||
| 193 | ld r12,PPC_LR_STKOFF(r1) | 185 | ld r12,PPC_LR_STKOFF(r1) |
| 186 | mtcr r11; | ||
| 194 | mtlr r12 | 187 | mtlr r12 |
| 195 | blr | 188 | blr |
| 196 | 189 | ||
| 190 | |||
| 197 | OPAL_CALL(opal_invalid_call, OPAL_INVALID_CALL); | 191 | OPAL_CALL(opal_invalid_call, OPAL_INVALID_CALL); |
| 198 | OPAL_CALL(opal_console_write, OPAL_CONSOLE_WRITE); | 192 | OPAL_CALL(opal_console_write, OPAL_CONSOLE_WRITE); |
| 199 | OPAL_CALL(opal_console_read, OPAL_CONSOLE_READ); | 193 | OPAL_CALL(opal_console_read, OPAL_CONSOLE_READ); |
| @@ -271,6 +265,7 @@ OPAL_CALL(opal_validate_flash, OPAL_FLASH_VALIDATE); | |||
| 271 | OPAL_CALL(opal_manage_flash, OPAL_FLASH_MANAGE); | 265 | OPAL_CALL(opal_manage_flash, OPAL_FLASH_MANAGE); |
| 272 | OPAL_CALL(opal_update_flash, OPAL_FLASH_UPDATE); | 266 | OPAL_CALL(opal_update_flash, OPAL_FLASH_UPDATE); |
| 273 | OPAL_CALL(opal_resync_timebase, OPAL_RESYNC_TIMEBASE); | 267 | OPAL_CALL(opal_resync_timebase, OPAL_RESYNC_TIMEBASE); |
| 268 | OPAL_CALL_REAL(opal_rm_resync_timebase, OPAL_RESYNC_TIMEBASE); | ||
| 274 | OPAL_CALL(opal_check_token, OPAL_CHECK_TOKEN); | 269 | OPAL_CALL(opal_check_token, OPAL_CHECK_TOKEN); |
| 275 | OPAL_CALL(opal_dump_init, OPAL_DUMP_INIT); | 270 | OPAL_CALL(opal_dump_init, OPAL_DUMP_INIT); |
| 276 | OPAL_CALL(opal_dump_info, OPAL_DUMP_INFO); | 271 | OPAL_CALL(opal_dump_info, OPAL_DUMP_INFO); |
| @@ -278,6 +273,7 @@ OPAL_CALL(opal_dump_info2, OPAL_DUMP_INFO2); | |||
| 278 | OPAL_CALL(opal_dump_read, OPAL_DUMP_READ); | 273 | OPAL_CALL(opal_dump_read, OPAL_DUMP_READ); |
| 279 | OPAL_CALL(opal_dump_ack, OPAL_DUMP_ACK); | 274 | OPAL_CALL(opal_dump_ack, OPAL_DUMP_ACK); |
| 280 | OPAL_CALL(opal_get_msg, OPAL_GET_MSG); | 275 | OPAL_CALL(opal_get_msg, OPAL_GET_MSG); |
| 276 | OPAL_CALL(opal_write_oppanel_async, OPAL_WRITE_OPPANEL_ASYNC); | ||
| 281 | OPAL_CALL(opal_check_completion, OPAL_CHECK_ASYNC_COMPLETION); | 277 | OPAL_CALL(opal_check_completion, OPAL_CHECK_ASYNC_COMPLETION); |
| 282 | OPAL_CALL(opal_dump_resend_notification, OPAL_DUMP_RESEND); | 278 | OPAL_CALL(opal_dump_resend_notification, OPAL_DUMP_RESEND); |
| 283 | OPAL_CALL(opal_sync_host_reboot, OPAL_SYNC_HOST_REBOOT); | 279 | OPAL_CALL(opal_sync_host_reboot, OPAL_SYNC_HOST_REBOOT); |
| @@ -285,7 +281,9 @@ OPAL_CALL(opal_sensor_read, OPAL_SENSOR_READ); | |||
| 285 | OPAL_CALL(opal_get_param, OPAL_GET_PARAM); | 281 | OPAL_CALL(opal_get_param, OPAL_GET_PARAM); |
| 286 | OPAL_CALL(opal_set_param, OPAL_SET_PARAM); | 282 | OPAL_CALL(opal_set_param, OPAL_SET_PARAM); |
| 287 | OPAL_CALL(opal_handle_hmi, OPAL_HANDLE_HMI); | 283 | OPAL_CALL(opal_handle_hmi, OPAL_HANDLE_HMI); |
| 284 | OPAL_CALL_REAL(opal_rm_handle_hmi, OPAL_HANDLE_HMI); | ||
| 288 | OPAL_CALL(opal_config_cpu_idle_state, OPAL_CONFIG_CPU_IDLE_STATE); | 285 | OPAL_CALL(opal_config_cpu_idle_state, OPAL_CONFIG_CPU_IDLE_STATE); |
| 286 | OPAL_CALL_REAL(opal_rm_config_cpu_idle_state, OPAL_CONFIG_CPU_IDLE_STATE); | ||
| 289 | OPAL_CALL(opal_slw_set_reg, OPAL_SLW_SET_REG); | 287 | OPAL_CALL(opal_slw_set_reg, OPAL_SLW_SET_REG); |
| 290 | OPAL_CALL(opal_register_dump_region, OPAL_REGISTER_DUMP_REGION); | 288 | OPAL_CALL(opal_register_dump_region, OPAL_REGISTER_DUMP_REGION); |
| 291 | OPAL_CALL(opal_unregister_dump_region, OPAL_UNREGISTER_DUMP_REGION); | 289 | OPAL_CALL(opal_unregister_dump_region, OPAL_UNREGISTER_DUMP_REGION); |
| @@ -302,3 +300,13 @@ OPAL_CALL(opal_prd_msg, OPAL_PRD_MSG); | |||
| 302 | OPAL_CALL(opal_leds_get_ind, OPAL_LEDS_GET_INDICATOR); | 300 | OPAL_CALL(opal_leds_get_ind, OPAL_LEDS_GET_INDICATOR); |
| 303 | OPAL_CALL(opal_leds_set_ind, OPAL_LEDS_SET_INDICATOR); | 301 | OPAL_CALL(opal_leds_set_ind, OPAL_LEDS_SET_INDICATOR); |
| 304 | OPAL_CALL(opal_console_flush, OPAL_CONSOLE_FLUSH); | 302 | OPAL_CALL(opal_console_flush, OPAL_CONSOLE_FLUSH); |
| 303 | OPAL_CALL(opal_get_device_tree, OPAL_GET_DEVICE_TREE); | ||
| 304 | OPAL_CALL(opal_pci_get_presence_state, OPAL_PCI_GET_PRESENCE_STATE); | ||
| 305 | OPAL_CALL(opal_pci_get_power_state, OPAL_PCI_GET_POWER_STATE); | ||
| 306 | OPAL_CALL(opal_pci_set_power_state, OPAL_PCI_SET_POWER_STATE); | ||
| 307 | OPAL_CALL(opal_int_get_xirr, OPAL_INT_GET_XIRR); | ||
| 308 | OPAL_CALL(opal_int_set_cppr, OPAL_INT_SET_CPPR); | ||
| 309 | OPAL_CALL(opal_int_eoi, OPAL_INT_EOI); | ||
| 310 | OPAL_CALL(opal_int_set_mfrr, OPAL_INT_SET_MFRR); | ||
| 311 | OPAL_CALL(opal_pci_tce_kill, OPAL_PCI_TCE_KILL); | ||
| 312 | OPAL_CALL_REAL(opal_rm_pci_tce_kill, OPAL_PCI_TCE_KILL); | ||
diff --git a/arch/powerpc/platforms/powernv/opal.c b/arch/powerpc/platforms/powernv/opal.c index 0256d0729252..8b4fc68cebcb 100644 --- a/arch/powerpc/platforms/powernv/opal.c +++ b/arch/powerpc/platforms/powernv/opal.c | |||
| @@ -55,8 +55,9 @@ struct device_node *opal_node; | |||
| 55 | static DEFINE_SPINLOCK(opal_write_lock); | 55 | static DEFINE_SPINLOCK(opal_write_lock); |
| 56 | static struct atomic_notifier_head opal_msg_notifier_head[OPAL_MSG_TYPE_MAX]; | 56 | static struct atomic_notifier_head opal_msg_notifier_head[OPAL_MSG_TYPE_MAX]; |
| 57 | static uint32_t opal_heartbeat; | 57 | static uint32_t opal_heartbeat; |
| 58 | static struct task_struct *kopald_tsk; | ||
| 58 | 59 | ||
| 59 | static void opal_reinit_cores(void) | 60 | void opal_configure_cores(void) |
| 60 | { | 61 | { |
| 61 | /* Do the actual re-init, This will clobber all FPRs, VRs, etc... | 62 | /* Do the actual re-init, This will clobber all FPRs, VRs, etc... |
| 62 | * | 63 | * |
| @@ -69,6 +70,10 @@ static void opal_reinit_cores(void) | |||
| 69 | #else | 70 | #else |
| 70 | opal_reinit_cpus(OPAL_REINIT_CPUS_HILE_LE); | 71 | opal_reinit_cpus(OPAL_REINIT_CPUS_HILE_LE); |
| 71 | #endif | 72 | #endif |
| 73 | |||
| 74 | /* Restore some bits */ | ||
| 75 | if (cur_cpu_spec->cpu_restore) | ||
| 76 | cur_cpu_spec->cpu_restore(); | ||
| 72 | } | 77 | } |
| 73 | 78 | ||
| 74 | int __init early_init_dt_scan_opal(unsigned long node, | 79 | int __init early_init_dt_scan_opal(unsigned long node, |
| @@ -105,13 +110,6 @@ int __init early_init_dt_scan_opal(unsigned long node, | |||
| 105 | panic("OPAL != V3 detected, no longer supported.\n"); | 110 | panic("OPAL != V3 detected, no longer supported.\n"); |
| 106 | } | 111 | } |
| 107 | 112 | ||
| 108 | /* Reinit all cores with the right endian */ | ||
| 109 | opal_reinit_cores(); | ||
| 110 | |||
| 111 | /* Restore some bits */ | ||
| 112 | if (cur_cpu_spec->cpu_restore) | ||
| 113 | cur_cpu_spec->cpu_restore(); | ||
| 114 | |||
| 115 | return 1; | 113 | return 1; |
| 116 | } | 114 | } |
| 117 | 115 | ||
| @@ -653,6 +651,7 @@ static void opal_i2c_create_devs(void) | |||
| 653 | 651 | ||
| 654 | static int kopald(void *unused) | 652 | static int kopald(void *unused) |
| 655 | { | 653 | { |
| 654 | unsigned long timeout = msecs_to_jiffies(opal_heartbeat) + 1; | ||
| 656 | __be64 events; | 655 | __be64 events; |
| 657 | 656 | ||
| 658 | set_freezable(); | 657 | set_freezable(); |
| @@ -660,12 +659,18 @@ static int kopald(void *unused) | |||
| 660 | try_to_freeze(); | 659 | try_to_freeze(); |
| 661 | opal_poll_events(&events); | 660 | opal_poll_events(&events); |
| 662 | opal_handle_events(be64_to_cpu(events)); | 661 | opal_handle_events(be64_to_cpu(events)); |
| 663 | msleep_interruptible(opal_heartbeat); | 662 | schedule_timeout_interruptible(timeout); |
| 664 | } while (!kthread_should_stop()); | 663 | } while (!kthread_should_stop()); |
| 665 | 664 | ||
| 666 | return 0; | 665 | return 0; |
| 667 | } | 666 | } |
| 668 | 667 | ||
| 668 | void opal_wake_poller(void) | ||
| 669 | { | ||
| 670 | if (kopald_tsk) | ||
| 671 | wake_up_process(kopald_tsk); | ||
| 672 | } | ||
| 673 | |||
| 669 | static void opal_init_heartbeat(void) | 674 | static void opal_init_heartbeat(void) |
| 670 | { | 675 | { |
| 671 | /* Old firwmware, we assume the HVC heartbeat is sufficient */ | 676 | /* Old firwmware, we assume the HVC heartbeat is sufficient */ |
| @@ -674,7 +679,7 @@ static void opal_init_heartbeat(void) | |||
| 674 | opal_heartbeat = 0; | 679 | opal_heartbeat = 0; |
| 675 | 680 | ||
| 676 | if (opal_heartbeat) | 681 | if (opal_heartbeat) |
| 677 | kthread_run(kopald, NULL, "kopald"); | 682 | kopald_tsk = kthread_run(kopald, NULL, "kopald"); |
| 678 | } | 683 | } |
| 679 | 684 | ||
| 680 | static int __init opal_init(void) | 685 | static int __init opal_init(void) |
| @@ -751,6 +756,9 @@ static int __init opal_init(void) | |||
| 751 | opal_pdev_init(opal_node, "ibm,opal-flash"); | 756 | opal_pdev_init(opal_node, "ibm,opal-flash"); |
| 752 | opal_pdev_init(opal_node, "ibm,opal-prd"); | 757 | opal_pdev_init(opal_node, "ibm,opal-prd"); |
| 753 | 758 | ||
| 759 | /* Initialise platform device: oppanel interface */ | ||
| 760 | opal_pdev_init(opal_node, "ibm,opal-oppanel"); | ||
| 761 | |||
| 754 | /* Initialise OPAL kmsg dumper for flushing console on panic */ | 762 | /* Initialise OPAL kmsg dumper for flushing console on panic */ |
| 755 | opal_kmsg_init(); | 763 | opal_kmsg_init(); |
| 756 | 764 | ||
| @@ -885,3 +893,5 @@ EXPORT_SYMBOL_GPL(opal_i2c_request); | |||
| 885 | /* Export these symbols for PowerNV LED class driver */ | 893 | /* Export these symbols for PowerNV LED class driver */ |
| 886 | EXPORT_SYMBOL_GPL(opal_leds_get_ind); | 894 | EXPORT_SYMBOL_GPL(opal_leds_get_ind); |
| 887 | EXPORT_SYMBOL_GPL(opal_leds_set_ind); | 895 | EXPORT_SYMBOL_GPL(opal_leds_set_ind); |
| 896 | /* Export this symbol for PowerNV Operator Panel class driver */ | ||
| 897 | EXPORT_SYMBOL_GPL(opal_write_oppanel_async); | ||
diff --git a/arch/powerpc/platforms/powernv/pci-cxl.c b/arch/powerpc/platforms/powernv/pci-cxl.c new file mode 100644 index 000000000000..1349a099c74c --- /dev/null +++ b/arch/powerpc/platforms/powernv/pci-cxl.c | |||
| @@ -0,0 +1,385 @@ | |||
| 1 | /* | ||
| 2 | * Copyright 2014-2016 IBM Corp. | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or | ||
| 5 | * modify it under the terms of the GNU General Public License | ||
| 6 | * as published by the Free Software Foundation; either version | ||
| 7 | * 2 of the License, or (at your option) any later version. | ||
| 8 | */ | ||
| 9 | |||
| 10 | #include <linux/module.h> | ||
| 11 | #include <linux/msi.h> | ||
| 12 | #include <asm/pci-bridge.h> | ||
| 13 | #include <asm/pnv-pci.h> | ||
| 14 | #include <asm/opal.h> | ||
| 15 | #include <misc/cxl.h> | ||
| 16 | |||
| 17 | #include "pci.h" | ||
| 18 | |||
| 19 | struct device_node *pnv_pci_get_phb_node(struct pci_dev *dev) | ||
| 20 | { | ||
| 21 | struct pci_controller *hose = pci_bus_to_host(dev->bus); | ||
| 22 | |||
| 23 | return of_node_get(hose->dn); | ||
| 24 | } | ||
| 25 | EXPORT_SYMBOL(pnv_pci_get_phb_node); | ||
| 26 | |||
| 27 | int pnv_phb_to_cxl_mode(struct pci_dev *dev, uint64_t mode) | ||
| 28 | { | ||
| 29 | struct pci_controller *hose = pci_bus_to_host(dev->bus); | ||
| 30 | struct pnv_phb *phb = hose->private_data; | ||
| 31 | struct pnv_ioda_pe *pe; | ||
| 32 | int rc; | ||
| 33 | |||
| 34 | pe = pnv_ioda_get_pe(dev); | ||
| 35 | if (!pe) | ||
| 36 | return -ENODEV; | ||
| 37 | |||
| 38 | pe_info(pe, "Switching PHB to CXL\n"); | ||
| 39 | |||
| 40 | rc = opal_pci_set_phb_cxl_mode(phb->opal_id, mode, pe->pe_number); | ||
| 41 | if (rc == OPAL_UNSUPPORTED) | ||
| 42 | dev_err(&dev->dev, "Required cxl mode not supported by firmware - update skiboot\n"); | ||
| 43 | else if (rc) | ||
| 44 | dev_err(&dev->dev, "opal_pci_set_phb_cxl_mode failed: %i\n", rc); | ||
| 45 | |||
| 46 | return rc; | ||
| 47 | } | ||
| 48 | EXPORT_SYMBOL(pnv_phb_to_cxl_mode); | ||
| 49 | |||
| 50 | /* Find PHB for cxl dev and allocate MSI hwirqs? | ||
| 51 | * Returns the absolute hardware IRQ number | ||
| 52 | */ | ||
| 53 | int pnv_cxl_alloc_hwirqs(struct pci_dev *dev, int num) | ||
| 54 | { | ||
| 55 | struct pci_controller *hose = pci_bus_to_host(dev->bus); | ||
| 56 | struct pnv_phb *phb = hose->private_data; | ||
| 57 | int hwirq = msi_bitmap_alloc_hwirqs(&phb->msi_bmp, num); | ||
| 58 | |||
| 59 | if (hwirq < 0) { | ||
| 60 | dev_warn(&dev->dev, "Failed to find a free MSI\n"); | ||
| 61 | return -ENOSPC; | ||
| 62 | } | ||
| 63 | |||
| 64 | return phb->msi_base + hwirq; | ||
| 65 | } | ||
| 66 | EXPORT_SYMBOL(pnv_cxl_alloc_hwirqs); | ||
| 67 | |||
| 68 | void pnv_cxl_release_hwirqs(struct pci_dev *dev, int hwirq, int num) | ||
| 69 | { | ||
| 70 | struct pci_controller *hose = pci_bus_to_host(dev->bus); | ||
| 71 | struct pnv_phb *phb = hose->private_data; | ||
| 72 | |||
| 73 | msi_bitmap_free_hwirqs(&phb->msi_bmp, hwirq - phb->msi_base, num); | ||
| 74 | } | ||
| 75 | EXPORT_SYMBOL(pnv_cxl_release_hwirqs); | ||
| 76 | |||
| 77 | void pnv_cxl_release_hwirq_ranges(struct cxl_irq_ranges *irqs, | ||
| 78 | struct pci_dev *dev) | ||
| 79 | { | ||
| 80 | struct pci_controller *hose = pci_bus_to_host(dev->bus); | ||
| 81 | struct pnv_phb *phb = hose->private_data; | ||
| 82 | int i, hwirq; | ||
| 83 | |||
| 84 | for (i = 1; i < CXL_IRQ_RANGES; i++) { | ||
| 85 | if (!irqs->range[i]) | ||
| 86 | continue; | ||
| 87 | pr_devel("cxl release irq range 0x%x: offset: 0x%lx limit: %ld\n", | ||
| 88 | i, irqs->offset[i], | ||
| 89 | irqs->range[i]); | ||
| 90 | hwirq = irqs->offset[i] - phb->msi_base; | ||
| 91 | msi_bitmap_free_hwirqs(&phb->msi_bmp, hwirq, | ||
| 92 | irqs->range[i]); | ||
| 93 | } | ||
| 94 | } | ||
| 95 | EXPORT_SYMBOL(pnv_cxl_release_hwirq_ranges); | ||
| 96 | |||
| 97 | int pnv_cxl_alloc_hwirq_ranges(struct cxl_irq_ranges *irqs, | ||
| 98 | struct pci_dev *dev, int num) | ||
| 99 | { | ||
| 100 | struct pci_controller *hose = pci_bus_to_host(dev->bus); | ||
| 101 | struct pnv_phb *phb = hose->private_data; | ||
| 102 | int i, hwirq, try; | ||
| 103 | |||
| 104 | memset(irqs, 0, sizeof(struct cxl_irq_ranges)); | ||
| 105 | |||
| 106 | /* 0 is reserved for the multiplexed PSL DSI interrupt */ | ||
| 107 | for (i = 1; i < CXL_IRQ_RANGES && num; i++) { | ||
| 108 | try = num; | ||
| 109 | while (try) { | ||
| 110 | hwirq = msi_bitmap_alloc_hwirqs(&phb->msi_bmp, try); | ||
| 111 | if (hwirq >= 0) | ||
| 112 | break; | ||
| 113 | try /= 2; | ||
| 114 | } | ||
| 115 | if (!try) | ||
| 116 | goto fail; | ||
| 117 | |||
| 118 | irqs->offset[i] = phb->msi_base + hwirq; | ||
| 119 | irqs->range[i] = try; | ||
| 120 | pr_devel("cxl alloc irq range 0x%x: offset: 0x%lx limit: %li\n", | ||
| 121 | i, irqs->offset[i], irqs->range[i]); | ||
| 122 | num -= try; | ||
| 123 | } | ||
| 124 | if (num) | ||
| 125 | goto fail; | ||
| 126 | |||
| 127 | return 0; | ||
| 128 | fail: | ||
| 129 | pnv_cxl_release_hwirq_ranges(irqs, dev); | ||
| 130 | return -ENOSPC; | ||
| 131 | } | ||
| 132 | EXPORT_SYMBOL(pnv_cxl_alloc_hwirq_ranges); | ||
| 133 | |||
| 134 | int pnv_cxl_get_irq_count(struct pci_dev *dev) | ||
| 135 | { | ||
| 136 | struct pci_controller *hose = pci_bus_to_host(dev->bus); | ||
| 137 | struct pnv_phb *phb = hose->private_data; | ||
| 138 | |||
| 139 | return phb->msi_bmp.irq_count; | ||
| 140 | } | ||
| 141 | EXPORT_SYMBOL(pnv_cxl_get_irq_count); | ||
| 142 | |||
| 143 | int pnv_cxl_ioda_msi_setup(struct pci_dev *dev, unsigned int hwirq, | ||
| 144 | unsigned int virq) | ||
| 145 | { | ||
| 146 | struct pci_controller *hose = pci_bus_to_host(dev->bus); | ||
| 147 | struct pnv_phb *phb = hose->private_data; | ||
| 148 | unsigned int xive_num = hwirq - phb->msi_base; | ||
| 149 | struct pnv_ioda_pe *pe; | ||
| 150 | int rc; | ||
| 151 | |||
| 152 | if (!(pe = pnv_ioda_get_pe(dev))) | ||
| 153 | return -ENODEV; | ||
| 154 | |||
| 155 | /* Assign XIVE to PE */ | ||
| 156 | rc = opal_pci_set_xive_pe(phb->opal_id, pe->pe_number, xive_num); | ||
| 157 | if (rc) { | ||
| 158 | pe_warn(pe, "%s: OPAL error %d setting msi_base 0x%x " | ||
| 159 | "hwirq 0x%x XIVE 0x%x PE\n", | ||
| 160 | pci_name(dev), rc, phb->msi_base, hwirq, xive_num); | ||
| 161 | return -EIO; | ||
| 162 | } | ||
| 163 | pnv_set_msi_irq_chip(phb, virq); | ||
| 164 | |||
| 165 | return 0; | ||
| 166 | } | ||
| 167 | EXPORT_SYMBOL(pnv_cxl_ioda_msi_setup); | ||
| 168 | |||
| 169 | #if IS_MODULE(CONFIG_CXL) | ||
| 170 | static inline int get_cxl_module(void) | ||
| 171 | { | ||
| 172 | struct module *cxl_module; | ||
| 173 | |||
| 174 | mutex_lock(&module_mutex); | ||
| 175 | |||
| 176 | cxl_module = find_module("cxl"); | ||
| 177 | if (cxl_module) | ||
| 178 | __module_get(cxl_module); | ||
| 179 | |||
| 180 | mutex_unlock(&module_mutex); | ||
| 181 | |||
| 182 | if (!cxl_module) | ||
| 183 | return -ENODEV; | ||
| 184 | |||
| 185 | return 0; | ||
| 186 | } | ||
| 187 | #else | ||
| 188 | static inline int get_cxl_module(void) { return 0; } | ||
| 189 | #endif | ||
| 190 | |||
| 191 | /* | ||
| 192 | * Sets flags and switches the controller ops to enable the cxl kernel api. | ||
| 193 | * Originally the cxl kernel API operated on a virtual PHB, but certain cards | ||
| 194 | * such as the Mellanox CX4 use a peer model instead and for these cards the | ||
| 195 | * cxl kernel api will operate on the real PHB. | ||
| 196 | */ | ||
| 197 | int pnv_cxl_enable_phb_kernel_api(struct pci_controller *hose, bool enable) | ||
| 198 | { | ||
| 199 | struct pnv_phb *phb = hose->private_data; | ||
| 200 | int rc; | ||
| 201 | |||
| 202 | if (!enable) { | ||
| 203 | /* | ||
| 204 | * Once cxl mode is enabled on the PHB, there is currently no | ||
| 205 | * known safe method to disable it again, and trying risks a | ||
| 206 | * checkstop. If we can find a way to safely disable cxl mode | ||
| 207 | * in the future we can revisit this, but for now the only sane | ||
| 208 | * thing to do is to refuse to disable cxl mode: | ||
| 209 | */ | ||
| 210 | return -EPERM; | ||
| 211 | } | ||
| 212 | |||
| 213 | /* | ||
| 214 | * Hold a reference to the cxl module since several PHB operations now | ||
| 215 | * depend on it, and it would be insane to allow it to be removed so | ||
| 216 | * long as we are in this mode (and since we can't safely disable this | ||
| 217 | * mode once enabled...). | ||
| 218 | */ | ||
| 219 | rc = get_cxl_module(); | ||
| 220 | if (rc) | ||
| 221 | return rc; | ||
| 222 | |||
| 223 | phb->flags |= PNV_PHB_FLAG_CXL; | ||
| 224 | hose->controller_ops = pnv_cxl_cx4_ioda_controller_ops; | ||
| 225 | |||
| 226 | return 0; | ||
| 227 | } | ||
| 228 | EXPORT_SYMBOL_GPL(pnv_cxl_enable_phb_kernel_api); | ||
| 229 | |||
| 230 | bool pnv_pci_on_cxl_phb(struct pci_dev *dev) | ||
| 231 | { | ||
| 232 | struct pci_controller *hose = pci_bus_to_host(dev->bus); | ||
| 233 | struct pnv_phb *phb = hose->private_data; | ||
| 234 | |||
| 235 | return !!(phb->flags & PNV_PHB_FLAG_CXL); | ||
| 236 | } | ||
| 237 | EXPORT_SYMBOL_GPL(pnv_pci_on_cxl_phb); | ||
| 238 | |||
| 239 | struct cxl_afu *pnv_cxl_phb_to_afu(struct pci_controller *hose) | ||
| 240 | { | ||
| 241 | struct pnv_phb *phb = hose->private_data; | ||
| 242 | |||
| 243 | return (struct cxl_afu *)phb->cxl_afu; | ||
| 244 | } | ||
| 245 | EXPORT_SYMBOL_GPL(pnv_cxl_phb_to_afu); | ||
| 246 | |||
| 247 | void pnv_cxl_phb_set_peer_afu(struct pci_dev *dev, struct cxl_afu *afu) | ||
| 248 | { | ||
| 249 | struct pci_controller *hose = pci_bus_to_host(dev->bus); | ||
| 250 | struct pnv_phb *phb = hose->private_data; | ||
| 251 | |||
| 252 | phb->cxl_afu = afu; | ||
| 253 | } | ||
| 254 | EXPORT_SYMBOL_GPL(pnv_cxl_phb_set_peer_afu); | ||
| 255 | |||
| 256 | /* | ||
| 257 | * In the peer cxl model, the XSL/PSL is physical function 0, and will be used | ||
| 258 | * by other functions on the device for memory access and interrupts. When the | ||
| 259 | * other functions are enabled we explicitly take a reference on the cxl | ||
| 260 | * function since they will use it, and allocate a default context associated | ||
| 261 | * with that function just like the vPHB model of the cxl kernel API. | ||
| 262 | */ | ||
| 263 | bool pnv_cxl_enable_device_hook(struct pci_dev *dev) | ||
| 264 | { | ||
| 265 | struct pci_controller *hose = pci_bus_to_host(dev->bus); | ||
| 266 | struct pnv_phb *phb = hose->private_data; | ||
| 267 | struct cxl_afu *afu = phb->cxl_afu; | ||
| 268 | |||
| 269 | if (!pnv_pci_enable_device_hook(dev)) | ||
| 270 | return false; | ||
| 271 | |||
| 272 | |||
| 273 | /* No special handling for the cxl function, which is always PF 0 */ | ||
| 274 | if (PCI_FUNC(dev->devfn) == 0) | ||
| 275 | return true; | ||
| 276 | |||
| 277 | if (!afu) { | ||
| 278 | dev_WARN(&dev->dev, "Attempted to enable function > 0 on CXL PHB without a peer AFU\n"); | ||
| 279 | return false; | ||
| 280 | } | ||
| 281 | |||
| 282 | dev_info(&dev->dev, "Enabling function on CXL enabled PHB with peer AFU\n"); | ||
| 283 | |||
| 284 | /* Make sure the peer AFU can't go away while this device is active */ | ||
| 285 | cxl_afu_get(afu); | ||
| 286 | |||
| 287 | return cxl_pci_associate_default_context(dev, afu); | ||
| 288 | } | ||
| 289 | |||
| 290 | void pnv_cxl_disable_device(struct pci_dev *dev) | ||
| 291 | { | ||
| 292 | struct pci_controller *hose = pci_bus_to_host(dev->bus); | ||
| 293 | struct pnv_phb *phb = hose->private_data; | ||
| 294 | struct cxl_afu *afu = phb->cxl_afu; | ||
| 295 | |||
| 296 | /* No special handling for cxl function: */ | ||
| 297 | if (PCI_FUNC(dev->devfn) == 0) | ||
| 298 | return; | ||
| 299 | |||
| 300 | cxl_pci_disable_device(dev); | ||
| 301 | cxl_afu_put(afu); | ||
| 302 | } | ||
| 303 | |||
| 304 | /* | ||
| 305 | * This is a special version of pnv_setup_msi_irqs for cards in cxl mode. This | ||
| 306 | * function handles setting up the IVTE entries for the XSL to use. | ||
| 307 | * | ||
| 308 | * We are currently not filling out the MSIX table, since the only currently | ||
| 309 | * supported adapter (CX4) uses a custom MSIX table format in cxl mode and it | ||
| 310 | * is up to their driver to fill that out. In the future we may fill out the | ||
| 311 | * MSIX table (and change the IVTE entries to be an index to the MSIX table) | ||
| 312 | * for adapters implementing the Full MSI-X mode described in the CAIA. | ||
| 313 | */ | ||
| 314 | int pnv_cxl_cx4_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) | ||
| 315 | { | ||
| 316 | struct pci_controller *hose = pci_bus_to_host(pdev->bus); | ||
| 317 | struct pnv_phb *phb = hose->private_data; | ||
| 318 | struct msi_desc *entry; | ||
| 319 | struct cxl_context *ctx = NULL; | ||
| 320 | unsigned int virq; | ||
| 321 | int hwirq; | ||
| 322 | int afu_irq = 0; | ||
| 323 | int rc; | ||
| 324 | |||
| 325 | if (WARN_ON(!phb) || !phb->msi_bmp.bitmap) | ||
| 326 | return -ENODEV; | ||
| 327 | |||
| 328 | if (pdev->no_64bit_msi && !phb->msi32_support) | ||
| 329 | return -ENODEV; | ||
| 330 | |||
| 331 | rc = cxl_cx4_setup_msi_irqs(pdev, nvec, type); | ||
| 332 | if (rc) | ||
| 333 | return rc; | ||
| 334 | |||
| 335 | for_each_pci_msi_entry(entry, pdev) { | ||
| 336 | if (!entry->msi_attrib.is_64 && !phb->msi32_support) { | ||
| 337 | pr_warn("%s: Supports only 64-bit MSIs\n", | ||
| 338 | pci_name(pdev)); | ||
| 339 | return -ENXIO; | ||
| 340 | } | ||
| 341 | |||
| 342 | hwirq = cxl_next_msi_hwirq(pdev, &ctx, &afu_irq); | ||
| 343 | if (WARN_ON(hwirq <= 0)) | ||
| 344 | return (hwirq ? hwirq : -ENOMEM); | ||
| 345 | |||
| 346 | virq = irq_create_mapping(NULL, hwirq); | ||
| 347 | if (virq == NO_IRQ) { | ||
| 348 | pr_warn("%s: Failed to map cxl mode MSI to linux irq\n", | ||
| 349 | pci_name(pdev)); | ||
| 350 | return -ENOMEM; | ||
| 351 | } | ||
| 352 | |||
| 353 | rc = pnv_cxl_ioda_msi_setup(pdev, hwirq, virq); | ||
| 354 | if (rc) { | ||
| 355 | pr_warn("%s: Failed to setup cxl mode MSI\n", pci_name(pdev)); | ||
| 356 | irq_dispose_mapping(virq); | ||
| 357 | return rc; | ||
| 358 | } | ||
| 359 | |||
| 360 | irq_set_msi_desc(virq, entry); | ||
| 361 | } | ||
| 362 | |||
| 363 | return 0; | ||
| 364 | } | ||
| 365 | |||
| 366 | void pnv_cxl_cx4_teardown_msi_irqs(struct pci_dev *pdev) | ||
| 367 | { | ||
| 368 | struct pci_controller *hose = pci_bus_to_host(pdev->bus); | ||
| 369 | struct pnv_phb *phb = hose->private_data; | ||
| 370 | struct msi_desc *entry; | ||
| 371 | irq_hw_number_t hwirq; | ||
| 372 | |||
| 373 | if (WARN_ON(!phb)) | ||
| 374 | return; | ||
| 375 | |||
| 376 | for_each_pci_msi_entry(entry, pdev) { | ||
| 377 | if (entry->irq == NO_IRQ) | ||
| 378 | continue; | ||
| 379 | hwirq = virq_to_hw(entry->irq); | ||
| 380 | irq_set_msi_desc(entry->irq, NULL); | ||
| 381 | irq_dispose_mapping(entry->irq); | ||
| 382 | } | ||
| 383 | |||
| 384 | cxl_cx4_teardown_msi_irqs(pdev); | ||
| 385 | } | ||
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c index 3a5ea8236db8..891fc4a453df 100644 --- a/arch/powerpc/platforms/powernv/pci-ioda.c +++ b/arch/powerpc/platforms/powernv/pci-ioda.c | |||
| @@ -55,6 +55,7 @@ | |||
| 55 | #define POWERNV_IOMMU_DEFAULT_LEVELS 1 | 55 | #define POWERNV_IOMMU_DEFAULT_LEVELS 1 |
| 56 | #define POWERNV_IOMMU_MAX_LEVELS 5 | 56 | #define POWERNV_IOMMU_MAX_LEVELS 5 |
| 57 | 57 | ||
| 58 | static const char * const pnv_phb_names[] = { "IODA1", "IODA2", "NPU" }; | ||
| 58 | static void pnv_pci_ioda2_table_free_pages(struct iommu_table *tbl); | 59 | static void pnv_pci_ioda2_table_free_pages(struct iommu_table *tbl); |
| 59 | 60 | ||
| 60 | void pe_level_printk(const struct pnv_ioda_pe *pe, const char *level, | 61 | void pe_level_printk(const struct pnv_ioda_pe *pe, const char *level, |
| @@ -141,16 +142,14 @@ static void pnv_ioda_reserve_pe(struct pnv_phb *phb, int pe_no) | |||
| 141 | 142 | ||
| 142 | static struct pnv_ioda_pe *pnv_ioda_alloc_pe(struct pnv_phb *phb) | 143 | static struct pnv_ioda_pe *pnv_ioda_alloc_pe(struct pnv_phb *phb) |
| 143 | { | 144 | { |
| 144 | unsigned long pe; | 145 | unsigned long pe = phb->ioda.total_pe_num - 1; |
| 145 | 146 | ||
| 146 | do { | 147 | for (pe = phb->ioda.total_pe_num - 1; pe >= 0; pe--) { |
| 147 | pe = find_next_zero_bit(phb->ioda.pe_alloc, | 148 | if (!test_and_set_bit(pe, phb->ioda.pe_alloc)) |
| 148 | phb->ioda.total_pe_num, 0); | 149 | return pnv_ioda_init_pe(phb, pe); |
| 149 | if (pe >= phb->ioda.total_pe_num) | 150 | } |
| 150 | return NULL; | ||
| 151 | } while(test_and_set_bit(pe, phb->ioda.pe_alloc)); | ||
| 152 | 151 | ||
| 153 | return pnv_ioda_init_pe(phb, pe); | 152 | return NULL; |
| 154 | } | 153 | } |
| 155 | 154 | ||
| 156 | static void pnv_ioda_free_pe(struct pnv_ioda_pe *pe) | 155 | static void pnv_ioda_free_pe(struct pnv_ioda_pe *pe) |
| @@ -192,18 +191,15 @@ static int pnv_ioda2_init_m64(struct pnv_phb *phb) | |||
| 192 | goto fail; | 191 | goto fail; |
| 193 | } | 192 | } |
| 194 | 193 | ||
| 195 | /* Mark the M64 BAR assigned */ | ||
| 196 | set_bit(phb->ioda.m64_bar_idx, &phb->ioda.m64_bar_alloc); | ||
| 197 | |||
| 198 | /* | 194 | /* |
| 199 | * Strip off the segment used by the reserved PE, which is | 195 | * Exclude the segments for reserved and root bus PE, which |
| 200 | * expected to be 0 or last one of PE capabicity. | 196 | * are first or last two PEs. |
| 201 | */ | 197 | */ |
| 202 | r = &phb->hose->mem_resources[1]; | 198 | r = &phb->hose->mem_resources[1]; |
| 203 | if (phb->ioda.reserved_pe_idx == 0) | 199 | if (phb->ioda.reserved_pe_idx == 0) |
| 204 | r->start += phb->ioda.m64_segsize; | 200 | r->start += (2 * phb->ioda.m64_segsize); |
| 205 | else if (phb->ioda.reserved_pe_idx == (phb->ioda.total_pe_num - 1)) | 201 | else if (phb->ioda.reserved_pe_idx == (phb->ioda.total_pe_num - 1)) |
| 206 | r->end -= phb->ioda.m64_segsize; | 202 | r->end -= (2 * phb->ioda.m64_segsize); |
| 207 | else | 203 | else |
| 208 | pr_warn(" Cannot strip M64 segment for reserved PE#%d\n", | 204 | pr_warn(" Cannot strip M64 segment for reserved PE#%d\n", |
| 209 | phb->ioda.reserved_pe_idx); | 205 | phb->ioda.reserved_pe_idx); |
| @@ -283,14 +279,14 @@ static int pnv_ioda1_init_m64(struct pnv_phb *phb) | |||
| 283 | } | 279 | } |
| 284 | 280 | ||
| 285 | /* | 281 | /* |
| 286 | * Exclude the segment used by the reserved PE, which | 282 | * Exclude the segments for reserved and root bus PE, which |
| 287 | * is expected to be 0 or last supported PE#. | 283 | * are first or last two PEs. |
| 288 | */ | 284 | */ |
| 289 | r = &phb->hose->mem_resources[1]; | 285 | r = &phb->hose->mem_resources[1]; |
| 290 | if (phb->ioda.reserved_pe_idx == 0) | 286 | if (phb->ioda.reserved_pe_idx == 0) |
| 291 | r->start += phb->ioda.m64_segsize; | 287 | r->start += (2 * phb->ioda.m64_segsize); |
| 292 | else if (phb->ioda.reserved_pe_idx == (phb->ioda.total_pe_num - 1)) | 288 | else if (phb->ioda.reserved_pe_idx == (phb->ioda.total_pe_num - 1)) |
| 293 | r->end -= phb->ioda.m64_segsize; | 289 | r->end -= (2 * phb->ioda.m64_segsize); |
| 294 | else | 290 | else |
| 295 | WARN(1, "Wrong reserved PE#%d on PHB#%d\n", | 291 | WARN(1, "Wrong reserved PE#%d on PHB#%d\n", |
| 296 | phb->ioda.reserved_pe_idx, phb->hose->global_number); | 292 | phb->ioda.reserved_pe_idx, phb->hose->global_number); |
| @@ -405,6 +401,7 @@ static void __init pnv_ioda_parse_m64_window(struct pnv_phb *phb) | |||
| 405 | struct pci_controller *hose = phb->hose; | 401 | struct pci_controller *hose = phb->hose; |
| 406 | struct device_node *dn = hose->dn; | 402 | struct device_node *dn = hose->dn; |
| 407 | struct resource *res; | 403 | struct resource *res; |
| 404 | u32 m64_range[2], i; | ||
| 408 | const u32 *r; | 405 | const u32 *r; |
| 409 | u64 pci_addr; | 406 | u64 pci_addr; |
| 410 | 407 | ||
| @@ -425,6 +422,30 @@ static void __init pnv_ioda_parse_m64_window(struct pnv_phb *phb) | |||
| 425 | return; | 422 | return; |
| 426 | } | 423 | } |
| 427 | 424 | ||
| 425 | /* | ||
| 426 | * Find the available M64 BAR range and pickup the last one for | ||
| 427 | * covering the whole 64-bits space. We support only one range. | ||
| 428 | */ | ||
| 429 | if (of_property_read_u32_array(dn, "ibm,opal-available-m64-ranges", | ||
| 430 | m64_range, 2)) { | ||
| 431 | /* In absence of the property, assume 0..15 */ | ||
| 432 | m64_range[0] = 0; | ||
| 433 | m64_range[1] = 16; | ||
| 434 | } | ||
| 435 | /* We only support 64 bits in our allocator */ | ||
| 436 | if (m64_range[1] > 63) { | ||
| 437 | pr_warn("%s: Limiting M64 range to 63 (from %d) on PHB#%x\n", | ||
| 438 | __func__, m64_range[1], phb->hose->global_number); | ||
| 439 | m64_range[1] = 63; | ||
| 440 | } | ||
| 441 | /* Empty range, no m64 */ | ||
| 442 | if (m64_range[1] <= m64_range[0]) { | ||
| 443 | pr_warn("%s: M64 empty, disabling M64 usage on PHB#%x\n", | ||
| 444 | __func__, phb->hose->global_number); | ||
| 445 | return; | ||
| 446 | } | ||
| 447 | |||
| 448 | /* Configure M64 informations */ | ||
| 428 | res = &hose->mem_resources[1]; | 449 | res = &hose->mem_resources[1]; |
| 429 | res->name = dn->full_name; | 450 | res->name = dn->full_name; |
| 430 | res->start = of_translate_address(dn, r + 2); | 451 | res->start = of_translate_address(dn, r + 2); |
| @@ -437,11 +458,28 @@ static void __init pnv_ioda_parse_m64_window(struct pnv_phb *phb) | |||
| 437 | phb->ioda.m64_segsize = phb->ioda.m64_size / phb->ioda.total_pe_num; | 458 | phb->ioda.m64_segsize = phb->ioda.m64_size / phb->ioda.total_pe_num; |
| 438 | phb->ioda.m64_base = pci_addr; | 459 | phb->ioda.m64_base = pci_addr; |
| 439 | 460 | ||
| 440 | pr_info(" MEM64 0x%016llx..0x%016llx -> 0x%016llx\n", | 461 | /* This lines up nicely with the display from processing OF ranges */ |
| 441 | res->start, res->end, pci_addr); | 462 | pr_info(" MEM 0x%016llx..0x%016llx -> 0x%016llx (M64 #%d..%d)\n", |
| 463 | res->start, res->end, pci_addr, m64_range[0], | ||
| 464 | m64_range[0] + m64_range[1] - 1); | ||
| 465 | |||
| 466 | /* Mark all M64 used up by default */ | ||
| 467 | phb->ioda.m64_bar_alloc = (unsigned long)-1; | ||
| 442 | 468 | ||
| 443 | /* Use last M64 BAR to cover M64 window */ | 469 | /* Use last M64 BAR to cover M64 window */ |
| 444 | phb->ioda.m64_bar_idx = 15; | 470 | m64_range[1]--; |
| 471 | phb->ioda.m64_bar_idx = m64_range[0] + m64_range[1]; | ||
| 472 | |||
| 473 | pr_info(" Using M64 #%d as default window\n", phb->ioda.m64_bar_idx); | ||
| 474 | |||
| 475 | /* Mark remaining ones free */ | ||
| 476 | for (i = m64_range[0]; i < m64_range[1]; i++) | ||
| 477 | clear_bit(i, &phb->ioda.m64_bar_alloc); | ||
| 478 | |||
| 479 | /* | ||
| 480 | * Setup init functions for M64 based on IODA version, IODA3 uses | ||
| 481 | * the IODA2 code. | ||
| 482 | */ | ||
| 445 | if (phb->type == PNV_PHB_IODA1) | 483 | if (phb->type == PNV_PHB_IODA1) |
| 446 | phb->init_m64 = pnv_ioda1_init_m64; | 484 | phb->init_m64 = pnv_ioda1_init_m64; |
| 447 | else | 485 | else |
| @@ -596,7 +634,7 @@ static int pnv_ioda_get_pe_state(struct pnv_phb *phb, int pe_no) | |||
| 596 | * but in the meantime, we need to protect them to avoid warnings | 634 | * but in the meantime, we need to protect them to avoid warnings |
| 597 | */ | 635 | */ |
| 598 | #ifdef CONFIG_PCI_MSI | 636 | #ifdef CONFIG_PCI_MSI |
| 599 | static struct pnv_ioda_pe *pnv_ioda_get_pe(struct pci_dev *dev) | 637 | struct pnv_ioda_pe *pnv_ioda_get_pe(struct pci_dev *dev) |
| 600 | { | 638 | { |
| 601 | struct pci_controller *hose = pci_bus_to_host(dev->bus); | 639 | struct pci_controller *hose = pci_bus_to_host(dev->bus); |
| 602 | struct pnv_phb *phb = hose->private_data; | 640 | struct pnv_phb *phb = hose->private_data; |
| @@ -714,7 +752,6 @@ static int pnv_ioda_set_peltv(struct pnv_phb *phb, | |||
| 714 | return 0; | 752 | return 0; |
| 715 | } | 753 | } |
| 716 | 754 | ||
| 717 | #ifdef CONFIG_PCI_IOV | ||
| 718 | static int pnv_ioda_deconfigure_pe(struct pnv_phb *phb, struct pnv_ioda_pe *pe) | 755 | static int pnv_ioda_deconfigure_pe(struct pnv_phb *phb, struct pnv_ioda_pe *pe) |
| 719 | { | 756 | { |
| 720 | struct pci_dev *parent; | 757 | struct pci_dev *parent; |
| @@ -749,9 +786,11 @@ static int pnv_ioda_deconfigure_pe(struct pnv_phb *phb, struct pnv_ioda_pe *pe) | |||
| 749 | } | 786 | } |
| 750 | rid_end = pe->rid + (count << 8); | 787 | rid_end = pe->rid + (count << 8); |
| 751 | } else { | 788 | } else { |
| 789 | #ifdef CONFIG_PCI_IOV | ||
| 752 | if (pe->flags & PNV_IODA_PE_VF) | 790 | if (pe->flags & PNV_IODA_PE_VF) |
| 753 | parent = pe->parent_dev; | 791 | parent = pe->parent_dev; |
| 754 | else | 792 | else |
| 793 | #endif | ||
| 755 | parent = pe->pdev->bus->self; | 794 | parent = pe->pdev->bus->self; |
| 756 | bcomp = OpalPciBusAll; | 795 | bcomp = OpalPciBusAll; |
| 757 | dcomp = OPAL_COMPARE_RID_DEVICE_NUMBER; | 796 | dcomp = OPAL_COMPARE_RID_DEVICE_NUMBER; |
| @@ -761,7 +800,7 @@ static int pnv_ioda_deconfigure_pe(struct pnv_phb *phb, struct pnv_ioda_pe *pe) | |||
| 761 | 800 | ||
| 762 | /* Clear the reverse map */ | 801 | /* Clear the reverse map */ |
| 763 | for (rid = pe->rid; rid < rid_end; rid++) | 802 | for (rid = pe->rid; rid < rid_end; rid++) |
| 764 | phb->ioda.pe_rmap[rid] = 0; | 803 | phb->ioda.pe_rmap[rid] = IODA_INVALID_PE; |
| 765 | 804 | ||
| 766 | /* Release from all parents PELT-V */ | 805 | /* Release from all parents PELT-V */ |
| 767 | while (parent) { | 806 | while (parent) { |
| @@ -789,11 +828,12 @@ static int pnv_ioda_deconfigure_pe(struct pnv_phb *phb, struct pnv_ioda_pe *pe) | |||
| 789 | 828 | ||
| 790 | pe->pbus = NULL; | 829 | pe->pbus = NULL; |
| 791 | pe->pdev = NULL; | 830 | pe->pdev = NULL; |
| 831 | #ifdef CONFIG_PCI_IOV | ||
| 792 | pe->parent_dev = NULL; | 832 | pe->parent_dev = NULL; |
| 833 | #endif | ||
| 793 | 834 | ||
| 794 | return 0; | 835 | return 0; |
| 795 | } | 836 | } |
| 796 | #endif /* CONFIG_PCI_IOV */ | ||
| 797 | 837 | ||
| 798 | static int pnv_ioda_configure_pe(struct pnv_phb *phb, struct pnv_ioda_pe *pe) | 838 | static int pnv_ioda_configure_pe(struct pnv_phb *phb, struct pnv_ioda_pe *pe) |
| 799 | { | 839 | { |
| @@ -1024,6 +1064,16 @@ static void pnv_ioda_setup_same_PE(struct pci_bus *bus, struct pnv_ioda_pe *pe) | |||
| 1024 | pci_name(dev)); | 1064 | pci_name(dev)); |
| 1025 | continue; | 1065 | continue; |
| 1026 | } | 1066 | } |
| 1067 | |||
| 1068 | /* | ||
| 1069 | * In partial hotplug case, the PCI device might be still | ||
| 1070 | * associated with the PE and needn't attach it to the PE | ||
| 1071 | * again. | ||
| 1072 | */ | ||
| 1073 | if (pdn->pe_number != IODA_INVALID_PE) | ||
| 1074 | continue; | ||
| 1075 | |||
| 1076 | pe->device_count++; | ||
| 1027 | pdn->pcidev = dev; | 1077 | pdn->pcidev = dev; |
| 1028 | pdn->pe_number = pe->pe_number; | 1078 | pdn->pe_number = pe->pe_number; |
| 1029 | if ((pe->flags & PNV_IODA_PE_BUS_ALL) && dev->subordinate) | 1079 | if ((pe->flags & PNV_IODA_PE_BUS_ALL) && dev->subordinate) |
| @@ -1042,9 +1092,26 @@ static struct pnv_ioda_pe *pnv_ioda_setup_bus_PE(struct pci_bus *bus, bool all) | |||
| 1042 | struct pci_controller *hose = pci_bus_to_host(bus); | 1092 | struct pci_controller *hose = pci_bus_to_host(bus); |
| 1043 | struct pnv_phb *phb = hose->private_data; | 1093 | struct pnv_phb *phb = hose->private_data; |
| 1044 | struct pnv_ioda_pe *pe = NULL; | 1094 | struct pnv_ioda_pe *pe = NULL; |
| 1095 | unsigned int pe_num; | ||
| 1096 | |||
| 1097 | /* | ||
| 1098 | * In partial hotplug case, the PE instance might be still alive. | ||
| 1099 | * We should reuse it instead of allocating a new one. | ||
| 1100 | */ | ||
| 1101 | pe_num = phb->ioda.pe_rmap[bus->number << 8]; | ||
| 1102 | if (pe_num != IODA_INVALID_PE) { | ||
| 1103 | pe = &phb->ioda.pe_array[pe_num]; | ||
| 1104 | pnv_ioda_setup_same_PE(bus, pe); | ||
| 1105 | return NULL; | ||
| 1106 | } | ||
| 1107 | |||
| 1108 | /* PE number for root bus should have been reserved */ | ||
| 1109 | if (pci_is_root_bus(bus) && | ||
| 1110 | phb->ioda.root_pe_idx != IODA_INVALID_PE) | ||
| 1111 | pe = &phb->ioda.pe_array[phb->ioda.root_pe_idx]; | ||
| 1045 | 1112 | ||
| 1046 | /* Check if PE is determined by M64 */ | 1113 | /* Check if PE is determined by M64 */ |
| 1047 | if (phb->pick_m64_pe) | 1114 | if (!pe && phb->pick_m64_pe) |
| 1048 | pe = phb->pick_m64_pe(bus, all); | 1115 | pe = phb->pick_m64_pe(bus, all); |
| 1049 | 1116 | ||
| 1050 | /* The PE number isn't pinned by M64 */ | 1117 | /* The PE number isn't pinned by M64 */ |
| @@ -1156,30 +1223,6 @@ static void pnv_ioda_setup_npu_PEs(struct pci_bus *bus) | |||
| 1156 | pnv_ioda_setup_npu_PE(pdev); | 1223 | pnv_ioda_setup_npu_PE(pdev); |
| 1157 | } | 1224 | } |
| 1158 | 1225 | ||
| 1159 | static void pnv_ioda_setup_PEs(struct pci_bus *bus) | ||
| 1160 | { | ||
| 1161 | struct pci_dev *dev; | ||
| 1162 | |||
| 1163 | pnv_ioda_setup_bus_PE(bus, false); | ||
| 1164 | |||
| 1165 | list_for_each_entry(dev, &bus->devices, bus_list) { | ||
| 1166 | if (dev->subordinate) { | ||
| 1167 | if (pci_pcie_type(dev) == PCI_EXP_TYPE_PCI_BRIDGE) | ||
| 1168 | pnv_ioda_setup_bus_PE(dev->subordinate, true); | ||
| 1169 | else | ||
| 1170 | pnv_ioda_setup_PEs(dev->subordinate); | ||
| 1171 | } | ||
| 1172 | } | ||
| 1173 | } | ||
| 1174 | |||
| 1175 | /* | ||
| 1176 | * Configure PEs so that the downstream PCI buses and devices | ||
| 1177 | * could have their associated PE#. Unfortunately, we didn't | ||
| 1178 | * figure out the way to identify the PLX bridge yet. So we | ||
| 1179 | * simply put the PCI bus and the subordinate behind the root | ||
| 1180 | * port to PE# here. The game rule here is expected to be changed | ||
| 1181 | * as soon as we can detected PLX bridge correctly. | ||
| 1182 | */ | ||
| 1183 | static void pnv_pci_ioda_setup_PEs(void) | 1226 | static void pnv_pci_ioda_setup_PEs(void) |
| 1184 | { | 1227 | { |
| 1185 | struct pci_controller *hose, *tmp; | 1228 | struct pci_controller *hose, *tmp; |
| @@ -1187,22 +1230,11 @@ static void pnv_pci_ioda_setup_PEs(void) | |||
| 1187 | 1230 | ||
| 1188 | list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { | 1231 | list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { |
| 1189 | phb = hose->private_data; | 1232 | phb = hose->private_data; |
| 1190 | |||
| 1191 | /* M64 layout might affect PE allocation */ | ||
| 1192 | if (phb->reserve_m64_pe) | ||
| 1193 | phb->reserve_m64_pe(hose->bus, NULL, true); | ||
| 1194 | |||
| 1195 | /* | ||
| 1196 | * On NPU PHB, we expect separate PEs for individual PCI | ||
| 1197 | * functions. PCI bus dependent PEs are required for the | ||
| 1198 | * remaining types of PHBs. | ||
| 1199 | */ | ||
| 1200 | if (phb->type == PNV_PHB_NPU) { | 1233 | if (phb->type == PNV_PHB_NPU) { |
| 1201 | /* PE#0 is needed for error reporting */ | 1234 | /* PE#0 is needed for error reporting */ |
| 1202 | pnv_ioda_reserve_pe(phb, 0); | 1235 | pnv_ioda_reserve_pe(phb, 0); |
| 1203 | pnv_ioda_setup_npu_PEs(hose->bus); | 1236 | pnv_ioda_setup_npu_PEs(hose->bus); |
| 1204 | } else | 1237 | } |
| 1205 | pnv_ioda_setup_PEs(hose->bus); | ||
| 1206 | } | 1238 | } |
| 1207 | } | 1239 | } |
| 1208 | 1240 | ||
| @@ -1728,7 +1760,14 @@ static void pnv_ioda_setup_bus_dma(struct pnv_ioda_pe *pe, | |||
| 1728 | } | 1760 | } |
| 1729 | } | 1761 | } |
| 1730 | 1762 | ||
| 1731 | static void pnv_pci_ioda1_tce_invalidate(struct iommu_table *tbl, | 1763 | static inline __be64 __iomem *pnv_ioda_get_inval_reg(struct pnv_phb *phb, |
| 1764 | bool real_mode) | ||
| 1765 | { | ||
| 1766 | return real_mode ? (__be64 __iomem *)(phb->regs_phys + 0x210) : | ||
| 1767 | (phb->regs + 0x210); | ||
| 1768 | } | ||
| 1769 | |||
| 1770 | static void pnv_pci_p7ioc_tce_invalidate(struct iommu_table *tbl, | ||
| 1732 | unsigned long index, unsigned long npages, bool rm) | 1771 | unsigned long index, unsigned long npages, bool rm) |
| 1733 | { | 1772 | { |
| 1734 | struct iommu_table_group_link *tgl = list_first_entry_or_null( | 1773 | struct iommu_table_group_link *tgl = list_first_entry_or_null( |
| @@ -1736,33 +1775,17 @@ static void pnv_pci_ioda1_tce_invalidate(struct iommu_table *tbl, | |||
| 1736 | next); | 1775 | next); |
| 1737 | struct pnv_ioda_pe *pe = container_of(tgl->table_group, | 1776 | struct pnv_ioda_pe *pe = container_of(tgl->table_group, |
| 1738 | struct pnv_ioda_pe, table_group); | 1777 | struct pnv_ioda_pe, table_group); |
| 1739 | __be64 __iomem *invalidate = rm ? | 1778 | __be64 __iomem *invalidate = pnv_ioda_get_inval_reg(pe->phb, rm); |
| 1740 | (__be64 __iomem *)pe->phb->ioda.tce_inval_reg_phys : | ||
| 1741 | pe->phb->ioda.tce_inval_reg; | ||
| 1742 | unsigned long start, end, inc; | 1779 | unsigned long start, end, inc; |
| 1743 | const unsigned shift = tbl->it_page_shift; | ||
| 1744 | 1780 | ||
| 1745 | start = __pa(((__be64 *)tbl->it_base) + index - tbl->it_offset); | 1781 | start = __pa(((__be64 *)tbl->it_base) + index - tbl->it_offset); |
| 1746 | end = __pa(((__be64 *)tbl->it_base) + index - tbl->it_offset + | 1782 | end = __pa(((__be64 *)tbl->it_base) + index - tbl->it_offset + |
| 1747 | npages - 1); | 1783 | npages - 1); |
| 1748 | 1784 | ||
| 1749 | /* BML uses this case for p6/p7/galaxy2: Shift addr and put in node */ | 1785 | /* p7ioc-style invalidation, 2 TCEs per write */ |
| 1750 | if (tbl->it_busno) { | 1786 | start |= (1ull << 63); |
| 1751 | start <<= shift; | 1787 | end |= (1ull << 63); |
| 1752 | end <<= shift; | 1788 | inc = 16; |
| 1753 | inc = 128ull << shift; | ||
| 1754 | start |= tbl->it_busno; | ||
| 1755 | end |= tbl->it_busno; | ||
| 1756 | } else if (tbl->it_type & TCE_PCI_SWINV_PAIR) { | ||
| 1757 | /* p7ioc-style invalidation, 2 TCEs per write */ | ||
| 1758 | start |= (1ull << 63); | ||
| 1759 | end |= (1ull << 63); | ||
| 1760 | inc = 16; | ||
| 1761 | } else { | ||
| 1762 | /* Default (older HW) */ | ||
| 1763 | inc = 128; | ||
| 1764 | } | ||
| 1765 | |||
| 1766 | end |= inc - 1; /* round up end to be different than start */ | 1789 | end |= inc - 1; /* round up end to be different than start */ |
| 1767 | 1790 | ||
| 1768 | mb(); /* Ensure above stores are visible */ | 1791 | mb(); /* Ensure above stores are visible */ |
| @@ -1788,8 +1811,8 @@ static int pnv_ioda1_tce_build(struct iommu_table *tbl, long index, | |||
| 1788 | int ret = pnv_tce_build(tbl, index, npages, uaddr, direction, | 1811 | int ret = pnv_tce_build(tbl, index, npages, uaddr, direction, |
| 1789 | attrs); | 1812 | attrs); |
| 1790 | 1813 | ||
| 1791 | if (!ret && (tbl->it_type & TCE_PCI_SWINV_CREATE)) | 1814 | if (!ret) |
| 1792 | pnv_pci_ioda1_tce_invalidate(tbl, index, npages, false); | 1815 | pnv_pci_p7ioc_tce_invalidate(tbl, index, npages, false); |
| 1793 | 1816 | ||
| 1794 | return ret; | 1817 | return ret; |
| 1795 | } | 1818 | } |
| @@ -1800,9 +1823,8 @@ static int pnv_ioda1_tce_xchg(struct iommu_table *tbl, long index, | |||
| 1800 | { | 1823 | { |
| 1801 | long ret = pnv_tce_xchg(tbl, index, hpa, direction); | 1824 | long ret = pnv_tce_xchg(tbl, index, hpa, direction); |
| 1802 | 1825 | ||
| 1803 | if (!ret && (tbl->it_type & | 1826 | if (!ret) |
| 1804 | (TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE))) | 1827 | pnv_pci_p7ioc_tce_invalidate(tbl, index, 1, false); |
| 1805 | pnv_pci_ioda1_tce_invalidate(tbl, index, 1, false); | ||
| 1806 | 1828 | ||
| 1807 | return ret; | 1829 | return ret; |
| 1808 | } | 1830 | } |
| @@ -1813,8 +1835,7 @@ static void pnv_ioda1_tce_free(struct iommu_table *tbl, long index, | |||
| 1813 | { | 1835 | { |
| 1814 | pnv_tce_free(tbl, index, npages); | 1836 | pnv_tce_free(tbl, index, npages); |
| 1815 | 1837 | ||
| 1816 | if (tbl->it_type & TCE_PCI_SWINV_FREE) | 1838 | pnv_pci_p7ioc_tce_invalidate(tbl, index, npages, false); |
| 1817 | pnv_pci_ioda1_tce_invalidate(tbl, index, npages, false); | ||
| 1818 | } | 1839 | } |
| 1819 | 1840 | ||
| 1820 | static struct iommu_table_ops pnv_ioda1_iommu_ops = { | 1841 | static struct iommu_table_ops pnv_ioda1_iommu_ops = { |
| @@ -1826,45 +1847,42 @@ static struct iommu_table_ops pnv_ioda1_iommu_ops = { | |||
| 1826 | .get = pnv_tce_get, | 1847 | .get = pnv_tce_get, |
| 1827 | }; | 1848 | }; |
| 1828 | 1849 | ||
| 1829 | #define TCE_KILL_INVAL_ALL PPC_BIT(0) | 1850 | #define PHB3_TCE_KILL_INVAL_ALL PPC_BIT(0) |
| 1830 | #define TCE_KILL_INVAL_PE PPC_BIT(1) | 1851 | #define PHB3_TCE_KILL_INVAL_PE PPC_BIT(1) |
| 1831 | #define TCE_KILL_INVAL_TCE PPC_BIT(2) | 1852 | #define PHB3_TCE_KILL_INVAL_ONE PPC_BIT(2) |
| 1832 | 1853 | ||
| 1833 | void pnv_pci_ioda2_tce_invalidate_entire(struct pnv_phb *phb, bool rm) | 1854 | void pnv_pci_phb3_tce_invalidate_entire(struct pnv_phb *phb, bool rm) |
| 1834 | { | 1855 | { |
| 1835 | const unsigned long val = TCE_KILL_INVAL_ALL; | 1856 | __be64 __iomem *invalidate = pnv_ioda_get_inval_reg(phb, rm); |
| 1857 | const unsigned long val = PHB3_TCE_KILL_INVAL_ALL; | ||
| 1836 | 1858 | ||
| 1837 | mb(); /* Ensure previous TCE table stores are visible */ | 1859 | mb(); /* Ensure previous TCE table stores are visible */ |
| 1838 | if (rm) | 1860 | if (rm) |
| 1839 | __raw_rm_writeq(cpu_to_be64(val), | 1861 | __raw_rm_writeq(cpu_to_be64(val), invalidate); |
| 1840 | (__be64 __iomem *) | ||
| 1841 | phb->ioda.tce_inval_reg_phys); | ||
| 1842 | else | 1862 | else |
| 1843 | __raw_writeq(cpu_to_be64(val), phb->ioda.tce_inval_reg); | 1863 | __raw_writeq(cpu_to_be64(val), invalidate); |
| 1844 | } | 1864 | } |
| 1845 | 1865 | ||
| 1846 | static inline void pnv_pci_ioda2_tce_invalidate_pe(struct pnv_ioda_pe *pe) | 1866 | static inline void pnv_pci_phb3_tce_invalidate_pe(struct pnv_ioda_pe *pe) |
| 1847 | { | 1867 | { |
| 1848 | /* 01xb - invalidate TCEs that match the specified PE# */ | 1868 | /* 01xb - invalidate TCEs that match the specified PE# */ |
| 1849 | unsigned long val = TCE_KILL_INVAL_PE | (pe->pe_number & 0xFF); | 1869 | __be64 __iomem *invalidate = pnv_ioda_get_inval_reg(pe->phb, false); |
| 1850 | struct pnv_phb *phb = pe->phb; | 1870 | unsigned long val = PHB3_TCE_KILL_INVAL_PE | (pe->pe_number & 0xFF); |
| 1851 | |||
| 1852 | if (!phb->ioda.tce_inval_reg) | ||
| 1853 | return; | ||
| 1854 | 1871 | ||
| 1855 | mb(); /* Ensure above stores are visible */ | 1872 | mb(); /* Ensure above stores are visible */ |
| 1856 | __raw_writeq(cpu_to_be64(val), phb->ioda.tce_inval_reg); | 1873 | __raw_writeq(cpu_to_be64(val), invalidate); |
| 1857 | } | 1874 | } |
| 1858 | 1875 | ||
| 1859 | static void pnv_pci_ioda2_do_tce_invalidate(unsigned pe_number, bool rm, | 1876 | static void pnv_pci_phb3_tce_invalidate(struct pnv_ioda_pe *pe, bool rm, |
| 1860 | __be64 __iomem *invalidate, unsigned shift, | 1877 | unsigned shift, unsigned long index, |
| 1861 | unsigned long index, unsigned long npages) | 1878 | unsigned long npages) |
| 1862 | { | 1879 | { |
| 1880 | __be64 __iomem *invalidate = pnv_ioda_get_inval_reg(pe->phb, false); | ||
| 1863 | unsigned long start, end, inc; | 1881 | unsigned long start, end, inc; |
| 1864 | 1882 | ||
| 1865 | /* We'll invalidate DMA address in PE scope */ | 1883 | /* We'll invalidate DMA address in PE scope */ |
| 1866 | start = TCE_KILL_INVAL_TCE; | 1884 | start = PHB3_TCE_KILL_INVAL_ONE; |
| 1867 | start |= (pe_number & 0xFF); | 1885 | start |= (pe->pe_number & 0xFF); |
| 1868 | end = start; | 1886 | end = start; |
| 1869 | 1887 | ||
| 1870 | /* Figure out the start, end and step */ | 1888 | /* Figure out the start, end and step */ |
| @@ -1882,6 +1900,17 @@ static void pnv_pci_ioda2_do_tce_invalidate(unsigned pe_number, bool rm, | |||
| 1882 | } | 1900 | } |
| 1883 | } | 1901 | } |
| 1884 | 1902 | ||
| 1903 | static inline void pnv_pci_ioda2_tce_invalidate_pe(struct pnv_ioda_pe *pe) | ||
| 1904 | { | ||
| 1905 | struct pnv_phb *phb = pe->phb; | ||
| 1906 | |||
| 1907 | if (phb->model == PNV_PHB_MODEL_PHB3 && phb->regs) | ||
| 1908 | pnv_pci_phb3_tce_invalidate_pe(pe); | ||
| 1909 | else | ||
| 1910 | opal_pci_tce_kill(phb->opal_id, OPAL_PCI_TCE_KILL_PE, | ||
| 1911 | pe->pe_number, 0, 0, 0); | ||
| 1912 | } | ||
| 1913 | |||
| 1885 | static void pnv_pci_ioda2_tce_invalidate(struct iommu_table *tbl, | 1914 | static void pnv_pci_ioda2_tce_invalidate(struct iommu_table *tbl, |
| 1886 | unsigned long index, unsigned long npages, bool rm) | 1915 | unsigned long index, unsigned long npages, bool rm) |
| 1887 | { | 1916 | { |
| @@ -1890,22 +1919,31 @@ static void pnv_pci_ioda2_tce_invalidate(struct iommu_table *tbl, | |||
| 1890 | list_for_each_entry_rcu(tgl, &tbl->it_group_list, next) { | 1919 | list_for_each_entry_rcu(tgl, &tbl->it_group_list, next) { |
| 1891 | struct pnv_ioda_pe *pe = container_of(tgl->table_group, | 1920 | struct pnv_ioda_pe *pe = container_of(tgl->table_group, |
| 1892 | struct pnv_ioda_pe, table_group); | 1921 | struct pnv_ioda_pe, table_group); |
| 1893 | __be64 __iomem *invalidate = rm ? | 1922 | struct pnv_phb *phb = pe->phb; |
| 1894 | (__be64 __iomem *)pe->phb->ioda.tce_inval_reg_phys : | 1923 | unsigned int shift = tbl->it_page_shift; |
| 1895 | pe->phb->ioda.tce_inval_reg; | ||
| 1896 | 1924 | ||
| 1897 | if (pe->phb->type == PNV_PHB_NPU) { | 1925 | if (phb->type == PNV_PHB_NPU) { |
| 1898 | /* | 1926 | /* |
| 1899 | * The NVLink hardware does not support TCE kill | 1927 | * The NVLink hardware does not support TCE kill |
| 1900 | * per TCE entry so we have to invalidate | 1928 | * per TCE entry so we have to invalidate |
| 1901 | * the entire cache for it. | 1929 | * the entire cache for it. |
| 1902 | */ | 1930 | */ |
| 1903 | pnv_pci_ioda2_tce_invalidate_entire(pe->phb, rm); | 1931 | pnv_pci_phb3_tce_invalidate_entire(phb, rm); |
| 1904 | continue; | 1932 | continue; |
| 1905 | } | 1933 | } |
| 1906 | pnv_pci_ioda2_do_tce_invalidate(pe->pe_number, rm, | 1934 | if (phb->model == PNV_PHB_MODEL_PHB3 && phb->regs) |
| 1907 | invalidate, tbl->it_page_shift, | 1935 | pnv_pci_phb3_tce_invalidate(pe, rm, shift, |
| 1908 | index, npages); | 1936 | index, npages); |
| 1937 | else if (rm) | ||
| 1938 | opal_rm_pci_tce_kill(phb->opal_id, | ||
| 1939 | OPAL_PCI_TCE_KILL_PAGES, | ||
| 1940 | pe->pe_number, 1u << shift, | ||
| 1941 | index << shift, npages); | ||
| 1942 | else | ||
| 1943 | opal_pci_tce_kill(phb->opal_id, | ||
| 1944 | OPAL_PCI_TCE_KILL_PAGES, | ||
| 1945 | pe->pe_number, 1u << shift, | ||
| 1946 | index << shift, npages); | ||
| 1909 | } | 1947 | } |
| 1910 | } | 1948 | } |
| 1911 | 1949 | ||
| @@ -1917,7 +1955,7 @@ static int pnv_ioda2_tce_build(struct iommu_table *tbl, long index, | |||
| 1917 | int ret = pnv_tce_build(tbl, index, npages, uaddr, direction, | 1955 | int ret = pnv_tce_build(tbl, index, npages, uaddr, direction, |
| 1918 | attrs); | 1956 | attrs); |
| 1919 | 1957 | ||
| 1920 | if (!ret && (tbl->it_type & TCE_PCI_SWINV_CREATE)) | 1958 | if (!ret) |
| 1921 | pnv_pci_ioda2_tce_invalidate(tbl, index, npages, false); | 1959 | pnv_pci_ioda2_tce_invalidate(tbl, index, npages, false); |
| 1922 | 1960 | ||
| 1923 | return ret; | 1961 | return ret; |
| @@ -1929,8 +1967,7 @@ static int pnv_ioda2_tce_xchg(struct iommu_table *tbl, long index, | |||
| 1929 | { | 1967 | { |
| 1930 | long ret = pnv_tce_xchg(tbl, index, hpa, direction); | 1968 | long ret = pnv_tce_xchg(tbl, index, hpa, direction); |
| 1931 | 1969 | ||
| 1932 | if (!ret && (tbl->it_type & | 1970 | if (!ret) |
| 1933 | (TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE))) | ||
| 1934 | pnv_pci_ioda2_tce_invalidate(tbl, index, 1, false); | 1971 | pnv_pci_ioda2_tce_invalidate(tbl, index, 1, false); |
| 1935 | 1972 | ||
| 1936 | return ret; | 1973 | return ret; |
| @@ -1942,8 +1979,7 @@ static void pnv_ioda2_tce_free(struct iommu_table *tbl, long index, | |||
| 1942 | { | 1979 | { |
| 1943 | pnv_tce_free(tbl, index, npages); | 1980 | pnv_tce_free(tbl, index, npages); |
| 1944 | 1981 | ||
| 1945 | if (tbl->it_type & TCE_PCI_SWINV_FREE) | 1982 | pnv_pci_ioda2_tce_invalidate(tbl, index, npages, false); |
| 1946 | pnv_pci_ioda2_tce_invalidate(tbl, index, npages, false); | ||
| 1947 | } | 1983 | } |
| 1948 | 1984 | ||
| 1949 | static void pnv_ioda2_table_free(struct iommu_table *tbl) | 1985 | static void pnv_ioda2_table_free(struct iommu_table *tbl) |
| @@ -2112,12 +2148,6 @@ found: | |||
| 2112 | base * PNV_IODA1_DMA32_SEGSIZE, | 2148 | base * PNV_IODA1_DMA32_SEGSIZE, |
| 2113 | IOMMU_PAGE_SHIFT_4K); | 2149 | IOMMU_PAGE_SHIFT_4K); |
| 2114 | 2150 | ||
| 2115 | /* OPAL variant of P7IOC SW invalidated TCEs */ | ||
| 2116 | if (phb->ioda.tce_inval_reg) | ||
| 2117 | tbl->it_type |= (TCE_PCI_SWINV_CREATE | | ||
| 2118 | TCE_PCI_SWINV_FREE | | ||
| 2119 | TCE_PCI_SWINV_PAIR); | ||
| 2120 | |||
| 2121 | tbl->it_ops = &pnv_ioda1_iommu_ops; | 2151 | tbl->it_ops = &pnv_ioda1_iommu_ops; |
| 2122 | pe->table_group.tce32_start = tbl->it_offset << tbl->it_page_shift; | 2152 | pe->table_group.tce32_start = tbl->it_offset << tbl->it_page_shift; |
| 2123 | pe->table_group.tce32_size = tbl->it_size << tbl->it_page_shift; | 2153 | pe->table_group.tce32_size = tbl->it_size << tbl->it_page_shift; |
| @@ -2179,7 +2209,7 @@ static long pnv_pci_ioda2_set_window(struct iommu_table_group *table_group, | |||
| 2179 | 2209 | ||
| 2180 | pnv_pci_link_table_and_group(phb->hose->node, num, | 2210 | pnv_pci_link_table_and_group(phb->hose->node, num, |
| 2181 | tbl, &pe->table_group); | 2211 | tbl, &pe->table_group); |
| 2182 | pnv_pci_ioda2_tce_invalidate_pe(pe); | 2212 | pnv_pci_phb3_tce_invalidate_pe(pe); |
| 2183 | 2213 | ||
| 2184 | return 0; | 2214 | return 0; |
| 2185 | } | 2215 | } |
| @@ -2240,8 +2270,6 @@ static long pnv_pci_ioda2_create_table(struct iommu_table_group *table_group, | |||
| 2240 | } | 2270 | } |
| 2241 | 2271 | ||
| 2242 | tbl->it_ops = &pnv_ioda2_iommu_ops; | 2272 | tbl->it_ops = &pnv_ioda2_iommu_ops; |
| 2243 | if (pe->phb->ioda.tce_inval_reg) | ||
| 2244 | tbl->it_type |= (TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE); | ||
| 2245 | 2273 | ||
| 2246 | *ptbl = tbl; | 2274 | *ptbl = tbl; |
| 2247 | 2275 | ||
| @@ -2290,10 +2318,6 @@ static long pnv_pci_ioda2_setup_default_config(struct pnv_ioda_pe *pe) | |||
| 2290 | if (!pnv_iommu_bypass_disabled) | 2318 | if (!pnv_iommu_bypass_disabled) |
| 2291 | pnv_pci_ioda2_set_bypass(pe, true); | 2319 | pnv_pci_ioda2_set_bypass(pe, true); |
| 2292 | 2320 | ||
| 2293 | /* OPAL variant of PHB3 invalidated TCEs */ | ||
| 2294 | if (pe->phb->ioda.tce_inval_reg) | ||
| 2295 | tbl->it_type |= (TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE); | ||
| 2296 | |||
| 2297 | /* | 2321 | /* |
| 2298 | * Setting table base here only for carrying iommu_group | 2322 | * Setting table base here only for carrying iommu_group |
| 2299 | * further down to let iommu_add_device() do the job. | 2323 | * further down to let iommu_add_device() do the job. |
| @@ -2323,7 +2347,7 @@ static long pnv_pci_ioda2_unset_window(struct iommu_table_group *table_group, | |||
| 2323 | if (ret) | 2347 | if (ret) |
| 2324 | pe_warn(pe, "Unmapping failed, ret = %ld\n", ret); | 2348 | pe_warn(pe, "Unmapping failed, ret = %ld\n", ret); |
| 2325 | else | 2349 | else |
| 2326 | pnv_pci_ioda2_tce_invalidate_pe(pe); | 2350 | pnv_pci_phb3_tce_invalidate_pe(pe); |
| 2327 | 2351 | ||
| 2328 | pnv_pci_unlink_table_and_group(table_group->tables[num], table_group); | 2352 | pnv_pci_unlink_table_and_group(table_group->tables[num], table_group); |
| 2329 | 2353 | ||
| @@ -2504,19 +2528,6 @@ static void pnv_pci_ioda_setup_iommu_api(void) | |||
| 2504 | static void pnv_pci_ioda_setup_iommu_api(void) { }; | 2528 | static void pnv_pci_ioda_setup_iommu_api(void) { }; |
| 2505 | #endif | 2529 | #endif |
| 2506 | 2530 | ||
| 2507 | static void pnv_pci_ioda_setup_opal_tce_kill(struct pnv_phb *phb) | ||
| 2508 | { | ||
| 2509 | const __be64 *swinvp; | ||
| 2510 | |||
| 2511 | /* OPAL variant of PHB3 invalidated TCEs */ | ||
| 2512 | swinvp = of_get_property(phb->hose->dn, "ibm,opal-tce-kill", NULL); | ||
| 2513 | if (!swinvp) | ||
| 2514 | return; | ||
| 2515 | |||
| 2516 | phb->ioda.tce_inval_reg_phys = be64_to_cpup(swinvp); | ||
| 2517 | phb->ioda.tce_inval_reg = ioremap(phb->ioda.tce_inval_reg_phys, 8); | ||
| 2518 | } | ||
| 2519 | |||
| 2520 | static __be64 *pnv_pci_ioda2_table_do_alloc_pages(int nid, unsigned shift, | 2531 | static __be64 *pnv_pci_ioda2_table_do_alloc_pages(int nid, unsigned shift, |
| 2521 | unsigned levels, unsigned long limit, | 2532 | unsigned levels, unsigned long limit, |
| 2522 | unsigned long *current_offset, unsigned long *total_allocated) | 2533 | unsigned long *current_offset, unsigned long *total_allocated) |
| @@ -2657,6 +2668,9 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb, | |||
| 2657 | { | 2668 | { |
| 2658 | int64_t rc; | 2669 | int64_t rc; |
| 2659 | 2670 | ||
| 2671 | if (!pnv_pci_ioda_pe_dma_weight(pe)) | ||
| 2672 | return; | ||
| 2673 | |||
| 2660 | /* TVE #1 is selected by PCI address bit 59 */ | 2674 | /* TVE #1 is selected by PCI address bit 59 */ |
| 2661 | pe->tce_bypass_base = 1ull << 59; | 2675 | pe->tce_bypass_base = 1ull << 59; |
| 2662 | 2676 | ||
| @@ -2688,49 +2702,6 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb, | |||
| 2688 | pnv_ioda_setup_bus_dma(pe, pe->pbus); | 2702 | pnv_ioda_setup_bus_dma(pe, pe->pbus); |
| 2689 | } | 2703 | } |
| 2690 | 2704 | ||
| 2691 | static void pnv_ioda_setup_dma(struct pnv_phb *phb) | ||
| 2692 | { | ||
| 2693 | struct pci_controller *hose = phb->hose; | ||
| 2694 | struct pnv_ioda_pe *pe; | ||
| 2695 | unsigned int weight; | ||
| 2696 | |||
| 2697 | /* If we have more PE# than segments available, hand out one | ||
| 2698 | * per PE until we run out and let the rest fail. If not, | ||
| 2699 | * then we assign at least one segment per PE, plus more based | ||
| 2700 | * on the amount of devices under that PE | ||
| 2701 | */ | ||
| 2702 | pr_info("PCI: Domain %04x has %d available 32-bit DMA segments\n", | ||
| 2703 | hose->global_number, phb->ioda.dma32_count); | ||
| 2704 | |||
| 2705 | pnv_pci_ioda_setup_opal_tce_kill(phb); | ||
| 2706 | |||
| 2707 | /* Walk our PE list and configure their DMA segments */ | ||
| 2708 | list_for_each_entry(pe, &phb->ioda.pe_list, list) { | ||
| 2709 | weight = pnv_pci_ioda_pe_dma_weight(pe); | ||
| 2710 | if (!weight) | ||
| 2711 | continue; | ||
| 2712 | |||
| 2713 | /* | ||
| 2714 | * For IODA2 compliant PHB3, we needn't care about the weight. | ||
| 2715 | * The all available 32-bits DMA space will be assigned to | ||
| 2716 | * the specific PE. | ||
| 2717 | */ | ||
| 2718 | if (phb->type == PNV_PHB_IODA1) { | ||
| 2719 | pnv_pci_ioda1_setup_dma_pe(phb, pe); | ||
| 2720 | } else if (phb->type == PNV_PHB_IODA2) { | ||
| 2721 | pe_info(pe, "Assign DMA32 space\n"); | ||
| 2722 | pnv_pci_ioda2_setup_dma_pe(phb, pe); | ||
| 2723 | } else if (phb->type == PNV_PHB_NPU) { | ||
| 2724 | /* | ||
| 2725 | * We initialise the DMA space for an NPU PHB | ||
| 2726 | * after setup of the PHB is complete as we | ||
| 2727 | * point the NPU TVT to the the same location | ||
| 2728 | * as the PHB3 TVT. | ||
| 2729 | */ | ||
| 2730 | } | ||
| 2731 | } | ||
| 2732 | } | ||
| 2733 | |||
| 2734 | #ifdef CONFIG_PCI_MSI | 2705 | #ifdef CONFIG_PCI_MSI |
| 2735 | static void pnv_ioda2_msi_eoi(struct irq_data *d) | 2706 | static void pnv_ioda2_msi_eoi(struct irq_data *d) |
| 2736 | { | 2707 | { |
| @@ -2747,12 +2718,13 @@ static void pnv_ioda2_msi_eoi(struct irq_data *d) | |||
| 2747 | } | 2718 | } |
| 2748 | 2719 | ||
| 2749 | 2720 | ||
| 2750 | static void set_msi_irq_chip(struct pnv_phb *phb, unsigned int virq) | 2721 | void pnv_set_msi_irq_chip(struct pnv_phb *phb, unsigned int virq) |
| 2751 | { | 2722 | { |
| 2752 | struct irq_data *idata; | 2723 | struct irq_data *idata; |
| 2753 | struct irq_chip *ichip; | 2724 | struct irq_chip *ichip; |
| 2754 | 2725 | ||
| 2755 | if (phb->type != PNV_PHB_IODA2) | 2726 | /* The MSI EOI OPAL call is only needed on PHB3 */ |
| 2727 | if (phb->model != PNV_PHB_MODEL_PHB3) | ||
| 2756 | return; | 2728 | return; |
| 2757 | 2729 | ||
| 2758 | if (!phb->ioda.irq_chip_init) { | 2730 | if (!phb->ioda.irq_chip_init) { |
| @@ -2769,157 +2741,6 @@ static void set_msi_irq_chip(struct pnv_phb *phb, unsigned int virq) | |||
| 2769 | irq_set_chip(virq, &phb->ioda.irq_chip); | 2741 | irq_set_chip(virq, &phb->ioda.irq_chip); |
| 2770 | } | 2742 | } |
| 2771 | 2743 | ||
| 2772 | #ifdef CONFIG_CXL_BASE | ||
| 2773 | |||
| 2774 | struct device_node *pnv_pci_get_phb_node(struct pci_dev *dev) | ||
| 2775 | { | ||
| 2776 | struct pci_controller *hose = pci_bus_to_host(dev->bus); | ||
| 2777 | |||
| 2778 | return of_node_get(hose->dn); | ||
| 2779 | } | ||
| 2780 | EXPORT_SYMBOL(pnv_pci_get_phb_node); | ||
| 2781 | |||
| 2782 | int pnv_phb_to_cxl_mode(struct pci_dev *dev, uint64_t mode) | ||
| 2783 | { | ||
| 2784 | struct pci_controller *hose = pci_bus_to_host(dev->bus); | ||
| 2785 | struct pnv_phb *phb = hose->private_data; | ||
| 2786 | struct pnv_ioda_pe *pe; | ||
| 2787 | int rc; | ||
| 2788 | |||
| 2789 | pe = pnv_ioda_get_pe(dev); | ||
| 2790 | if (!pe) | ||
| 2791 | return -ENODEV; | ||
| 2792 | |||
| 2793 | pe_info(pe, "Switching PHB to CXL\n"); | ||
| 2794 | |||
| 2795 | rc = opal_pci_set_phb_cxl_mode(phb->opal_id, mode, pe->pe_number); | ||
| 2796 | if (rc) | ||
| 2797 | dev_err(&dev->dev, "opal_pci_set_phb_cxl_mode failed: %i\n", rc); | ||
| 2798 | |||
| 2799 | return rc; | ||
| 2800 | } | ||
| 2801 | EXPORT_SYMBOL(pnv_phb_to_cxl_mode); | ||
| 2802 | |||
| 2803 | /* Find PHB for cxl dev and allocate MSI hwirqs? | ||
| 2804 | * Returns the absolute hardware IRQ number | ||
| 2805 | */ | ||
| 2806 | int pnv_cxl_alloc_hwirqs(struct pci_dev *dev, int num) | ||
| 2807 | { | ||
| 2808 | struct pci_controller *hose = pci_bus_to_host(dev->bus); | ||
| 2809 | struct pnv_phb *phb = hose->private_data; | ||
| 2810 | int hwirq = msi_bitmap_alloc_hwirqs(&phb->msi_bmp, num); | ||
| 2811 | |||
| 2812 | if (hwirq < 0) { | ||
| 2813 | dev_warn(&dev->dev, "Failed to find a free MSI\n"); | ||
| 2814 | return -ENOSPC; | ||
| 2815 | } | ||
| 2816 | |||
| 2817 | return phb->msi_base + hwirq; | ||
| 2818 | } | ||
| 2819 | EXPORT_SYMBOL(pnv_cxl_alloc_hwirqs); | ||
| 2820 | |||
| 2821 | void pnv_cxl_release_hwirqs(struct pci_dev *dev, int hwirq, int num) | ||
| 2822 | { | ||
| 2823 | struct pci_controller *hose = pci_bus_to_host(dev->bus); | ||
| 2824 | struct pnv_phb *phb = hose->private_data; | ||
| 2825 | |||
| 2826 | msi_bitmap_free_hwirqs(&phb->msi_bmp, hwirq - phb->msi_base, num); | ||
| 2827 | } | ||
| 2828 | EXPORT_SYMBOL(pnv_cxl_release_hwirqs); | ||
| 2829 | |||
| 2830 | void pnv_cxl_release_hwirq_ranges(struct cxl_irq_ranges *irqs, | ||
| 2831 | struct pci_dev *dev) | ||
| 2832 | { | ||
| 2833 | struct pci_controller *hose = pci_bus_to_host(dev->bus); | ||
| 2834 | struct pnv_phb *phb = hose->private_data; | ||
| 2835 | int i, hwirq; | ||
| 2836 | |||
| 2837 | for (i = 1; i < CXL_IRQ_RANGES; i++) { | ||
| 2838 | if (!irqs->range[i]) | ||
| 2839 | continue; | ||
| 2840 | pr_devel("cxl release irq range 0x%x: offset: 0x%lx limit: %ld\n", | ||
| 2841 | i, irqs->offset[i], | ||
| 2842 | irqs->range[i]); | ||
| 2843 | hwirq = irqs->offset[i] - phb->msi_base; | ||
| 2844 | msi_bitmap_free_hwirqs(&phb->msi_bmp, hwirq, | ||
| 2845 | irqs->range[i]); | ||
| 2846 | } | ||
| 2847 | } | ||
| 2848 | EXPORT_SYMBOL(pnv_cxl_release_hwirq_ranges); | ||
| 2849 | |||
| 2850 | int pnv_cxl_alloc_hwirq_ranges(struct cxl_irq_ranges *irqs, | ||
| 2851 | struct pci_dev *dev, int num) | ||
| 2852 | { | ||
| 2853 | struct pci_controller *hose = pci_bus_to_host(dev->bus); | ||
| 2854 | struct pnv_phb *phb = hose->private_data; | ||
| 2855 | int i, hwirq, try; | ||
| 2856 | |||
| 2857 | memset(irqs, 0, sizeof(struct cxl_irq_ranges)); | ||
| 2858 | |||
| 2859 | /* 0 is reserved for the multiplexed PSL DSI interrupt */ | ||
| 2860 | for (i = 1; i < CXL_IRQ_RANGES && num; i++) { | ||
| 2861 | try = num; | ||
| 2862 | while (try) { | ||
| 2863 | hwirq = msi_bitmap_alloc_hwirqs(&phb->msi_bmp, try); | ||
| 2864 | if (hwirq >= 0) | ||
| 2865 | break; | ||
| 2866 | try /= 2; | ||
| 2867 | } | ||
| 2868 | if (!try) | ||
| 2869 | goto fail; | ||
| 2870 | |||
| 2871 | irqs->offset[i] = phb->msi_base + hwirq; | ||
| 2872 | irqs->range[i] = try; | ||
| 2873 | pr_devel("cxl alloc irq range 0x%x: offset: 0x%lx limit: %li\n", | ||
| 2874 | i, irqs->offset[i], irqs->range[i]); | ||
| 2875 | num -= try; | ||
| 2876 | } | ||
| 2877 | if (num) | ||
| 2878 | goto fail; | ||
| 2879 | |||
| 2880 | return 0; | ||
| 2881 | fail: | ||
| 2882 | pnv_cxl_release_hwirq_ranges(irqs, dev); | ||
| 2883 | return -ENOSPC; | ||
| 2884 | } | ||
| 2885 | EXPORT_SYMBOL(pnv_cxl_alloc_hwirq_ranges); | ||
| 2886 | |||
| 2887 | int pnv_cxl_get_irq_count(struct pci_dev *dev) | ||
| 2888 | { | ||
| 2889 | struct pci_controller *hose = pci_bus_to_host(dev->bus); | ||
| 2890 | struct pnv_phb *phb = hose->private_data; | ||
| 2891 | |||
| 2892 | return phb->msi_bmp.irq_count; | ||
| 2893 | } | ||
| 2894 | EXPORT_SYMBOL(pnv_cxl_get_irq_count); | ||
| 2895 | |||
| 2896 | int pnv_cxl_ioda_msi_setup(struct pci_dev *dev, unsigned int hwirq, | ||
| 2897 | unsigned int virq) | ||
| 2898 | { | ||
| 2899 | struct pci_controller *hose = pci_bus_to_host(dev->bus); | ||
| 2900 | struct pnv_phb *phb = hose->private_data; | ||
| 2901 | unsigned int xive_num = hwirq - phb->msi_base; | ||
| 2902 | struct pnv_ioda_pe *pe; | ||
| 2903 | int rc; | ||
| 2904 | |||
| 2905 | if (!(pe = pnv_ioda_get_pe(dev))) | ||
| 2906 | return -ENODEV; | ||
| 2907 | |||
| 2908 | /* Assign XIVE to PE */ | ||
| 2909 | rc = opal_pci_set_xive_pe(phb->opal_id, pe->pe_number, xive_num); | ||
| 2910 | if (rc) { | ||
| 2911 | pe_warn(pe, "%s: OPAL error %d setting msi_base 0x%x " | ||
| 2912 | "hwirq 0x%x XIVE 0x%x PE\n", | ||
| 2913 | pci_name(dev), rc, phb->msi_base, hwirq, xive_num); | ||
| 2914 | return -EIO; | ||
| 2915 | } | ||
| 2916 | set_msi_irq_chip(phb, virq); | ||
| 2917 | |||
| 2918 | return 0; | ||
| 2919 | } | ||
| 2920 | EXPORT_SYMBOL(pnv_cxl_ioda_msi_setup); | ||
| 2921 | #endif | ||
| 2922 | |||
| 2923 | static int pnv_pci_ioda_msi_setup(struct pnv_phb *phb, struct pci_dev *dev, | 2744 | static int pnv_pci_ioda_msi_setup(struct pnv_phb *phb, struct pci_dev *dev, |
| 2924 | unsigned int hwirq, unsigned int virq, | 2745 | unsigned int hwirq, unsigned int virq, |
| 2925 | unsigned int is_64, struct msi_msg *msg) | 2746 | unsigned int is_64, struct msi_msg *msg) |
| @@ -2976,7 +2797,7 @@ static int pnv_pci_ioda_msi_setup(struct pnv_phb *phb, struct pci_dev *dev, | |||
| 2976 | } | 2797 | } |
| 2977 | msg->data = be32_to_cpu(data); | 2798 | msg->data = be32_to_cpu(data); |
| 2978 | 2799 | ||
| 2979 | set_msi_irq_chip(phb, virq); | 2800 | pnv_set_msi_irq_chip(phb, virq); |
| 2980 | 2801 | ||
| 2981 | pr_devel("%s: %s-bit MSI on hwirq %x (xive #%d)," | 2802 | pr_devel("%s: %s-bit MSI on hwirq %x (xive #%d)," |
| 2982 | " address=%x_%08x data=%x PE# %d\n", | 2803 | " address=%x_%08x data=%x PE# %d\n", |
| @@ -3197,41 +3018,6 @@ static void pnv_ioda_setup_pe_seg(struct pnv_ioda_pe *pe) | |||
| 3197 | } | 3018 | } |
| 3198 | } | 3019 | } |
| 3199 | 3020 | ||
| 3200 | static void pnv_pci_ioda_setup_seg(void) | ||
| 3201 | { | ||
| 3202 | struct pci_controller *tmp, *hose; | ||
| 3203 | struct pnv_phb *phb; | ||
| 3204 | struct pnv_ioda_pe *pe; | ||
| 3205 | |||
| 3206 | list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { | ||
| 3207 | phb = hose->private_data; | ||
| 3208 | |||
| 3209 | /* NPU PHB does not support IO or MMIO segmentation */ | ||
| 3210 | if (phb->type == PNV_PHB_NPU) | ||
| 3211 | continue; | ||
| 3212 | |||
| 3213 | list_for_each_entry(pe, &phb->ioda.pe_list, list) { | ||
| 3214 | pnv_ioda_setup_pe_seg(pe); | ||
| 3215 | } | ||
| 3216 | } | ||
| 3217 | } | ||
| 3218 | |||
| 3219 | static void pnv_pci_ioda_setup_DMA(void) | ||
| 3220 | { | ||
| 3221 | struct pci_controller *hose, *tmp; | ||
| 3222 | struct pnv_phb *phb; | ||
| 3223 | |||
| 3224 | list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { | ||
| 3225 | pnv_ioda_setup_dma(hose->private_data); | ||
| 3226 | |||
| 3227 | /* Mark the PHB initialization done */ | ||
| 3228 | phb = hose->private_data; | ||
| 3229 | phb->initialized = 1; | ||
| 3230 | } | ||
| 3231 | |||
| 3232 | pnv_pci_ioda_setup_iommu_api(); | ||
| 3233 | } | ||
| 3234 | |||
| 3235 | static void pnv_pci_ioda_create_dbgfs(void) | 3021 | static void pnv_pci_ioda_create_dbgfs(void) |
| 3236 | { | 3022 | { |
| 3237 | #ifdef CONFIG_DEBUG_FS | 3023 | #ifdef CONFIG_DEBUG_FS |
| @@ -3242,6 +3028,9 @@ static void pnv_pci_ioda_create_dbgfs(void) | |||
| 3242 | list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { | 3028 | list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { |
| 3243 | phb = hose->private_data; | 3029 | phb = hose->private_data; |
| 3244 | 3030 | ||
| 3031 | /* Notify initialization of PHB done */ | ||
| 3032 | phb->initialized = 1; | ||
| 3033 | |||
| 3245 | sprintf(name, "PCI%04x", hose->global_number); | 3034 | sprintf(name, "PCI%04x", hose->global_number); |
| 3246 | phb->dbgfs = debugfs_create_dir(name, powerpc_debugfs_root); | 3035 | phb->dbgfs = debugfs_create_dir(name, powerpc_debugfs_root); |
| 3247 | if (!phb->dbgfs) | 3036 | if (!phb->dbgfs) |
| @@ -3254,9 +3043,7 @@ static void pnv_pci_ioda_create_dbgfs(void) | |||
| 3254 | static void pnv_pci_ioda_fixup(void) | 3043 | static void pnv_pci_ioda_fixup(void) |
| 3255 | { | 3044 | { |
| 3256 | pnv_pci_ioda_setup_PEs(); | 3045 | pnv_pci_ioda_setup_PEs(); |
| 3257 | pnv_pci_ioda_setup_seg(); | 3046 | pnv_pci_ioda_setup_iommu_api(); |
| 3258 | pnv_pci_ioda_setup_DMA(); | ||
| 3259 | |||
| 3260 | pnv_pci_ioda_create_dbgfs(); | 3047 | pnv_pci_ioda_create_dbgfs(); |
| 3261 | 3048 | ||
| 3262 | #ifdef CONFIG_EEH | 3049 | #ifdef CONFIG_EEH |
| @@ -3306,6 +3093,115 @@ static resource_size_t pnv_pci_window_alignment(struct pci_bus *bus, | |||
| 3306 | return phb->ioda.io_segsize; | 3093 | return phb->ioda.io_segsize; |
| 3307 | } | 3094 | } |
| 3308 | 3095 | ||
| 3096 | /* | ||
| 3097 | * We are updating root port or the upstream port of the | ||
| 3098 | * bridge behind the root port with PHB's windows in order | ||
| 3099 | * to accommodate the changes on required resources during | ||
| 3100 | * PCI (slot) hotplug, which is connected to either root | ||
| 3101 | * port or the downstream ports of PCIe switch behind the | ||
| 3102 | * root port. | ||
| 3103 | */ | ||
| 3104 | static void pnv_pci_fixup_bridge_resources(struct pci_bus *bus, | ||
| 3105 | unsigned long type) | ||
| 3106 | { | ||
| 3107 | struct pci_controller *hose = pci_bus_to_host(bus); | ||
| 3108 | struct pnv_phb *phb = hose->private_data; | ||
| 3109 | struct pci_dev *bridge = bus->self; | ||
| 3110 | struct resource *r, *w; | ||
| 3111 | bool msi_region = false; | ||
| 3112 | int i; | ||
| 3113 | |||
| 3114 | /* Check if we need apply fixup to the bridge's windows */ | ||
| 3115 | if (!pci_is_root_bus(bridge->bus) && | ||
| 3116 | !pci_is_root_bus(bridge->bus->self->bus)) | ||
| 3117 | return; | ||
| 3118 | |||
| 3119 | /* Fixup the resources */ | ||
| 3120 | for (i = 0; i < PCI_BRIDGE_RESOURCE_NUM; i++) { | ||
| 3121 | r = &bridge->resource[PCI_BRIDGE_RESOURCES + i]; | ||
| 3122 | if (!r->flags || !r->parent) | ||
| 3123 | continue; | ||
| 3124 | |||
| 3125 | w = NULL; | ||
| 3126 | if (r->flags & type & IORESOURCE_IO) | ||
| 3127 | w = &hose->io_resource; | ||
| 3128 | else if (pnv_pci_is_mem_pref_64(r->flags) && | ||
| 3129 | (type & IORESOURCE_PREFETCH) && | ||
| 3130 | phb->ioda.m64_segsize) | ||
| 3131 | w = &hose->mem_resources[1]; | ||
| 3132 | else if (r->flags & type & IORESOURCE_MEM) { | ||
| 3133 | w = &hose->mem_resources[0]; | ||
| 3134 | msi_region = true; | ||
| 3135 | } | ||
| 3136 | |||
| 3137 | r->start = w->start; | ||
| 3138 | r->end = w->end; | ||
| 3139 | |||
| 3140 | /* The 64KB 32-bits MSI region shouldn't be included in | ||
| 3141 | * the 32-bits bridge window. Otherwise, we can see strange | ||
| 3142 | * issues. One of them is EEH error observed on Garrison. | ||
| 3143 | * | ||
| 3144 | * Exclude top 1MB region which is the minimal alignment of | ||
| 3145 | * 32-bits bridge window. | ||
| 3146 | */ | ||
| 3147 | if (msi_region) { | ||
| 3148 | r->end += 0x10000; | ||
| 3149 | r->end -= 0x100000; | ||
| 3150 | } | ||
| 3151 | } | ||
| 3152 | } | ||
| 3153 | |||
| 3154 | static void pnv_pci_setup_bridge(struct pci_bus *bus, unsigned long type) | ||
| 3155 | { | ||
| 3156 | struct pci_controller *hose = pci_bus_to_host(bus); | ||
| 3157 | struct pnv_phb *phb = hose->private_data; | ||
| 3158 | struct pci_dev *bridge = bus->self; | ||
| 3159 | struct pnv_ioda_pe *pe; | ||
| 3160 | bool all = (pci_pcie_type(bridge) == PCI_EXP_TYPE_PCI_BRIDGE); | ||
| 3161 | |||
| 3162 | /* Extend bridge's windows if necessary */ | ||
| 3163 | pnv_pci_fixup_bridge_resources(bus, type); | ||
| 3164 | |||
| 3165 | /* The PE for root bus should be realized before any one else */ | ||
| 3166 | if (!phb->ioda.root_pe_populated) { | ||
| 3167 | pe = pnv_ioda_setup_bus_PE(phb->hose->bus, false); | ||
| 3168 | if (pe) { | ||
| 3169 | phb->ioda.root_pe_idx = pe->pe_number; | ||
| 3170 | phb->ioda.root_pe_populated = true; | ||
| 3171 | } | ||
| 3172 | } | ||
| 3173 | |||
| 3174 | /* Don't assign PE to PCI bus, which doesn't have subordinate devices */ | ||
| 3175 | if (list_empty(&bus->devices)) | ||
| 3176 | return; | ||
| 3177 | |||
| 3178 | /* Reserve PEs according to used M64 resources */ | ||
| 3179 | if (phb->reserve_m64_pe) | ||
| 3180 | phb->reserve_m64_pe(bus, NULL, all); | ||
| 3181 | |||
| 3182 | /* | ||
| 3183 | * Assign PE. We might run here because of partial hotplug. | ||
| 3184 | * For the case, we just pick up the existing PE and should | ||
| 3185 | * not allocate resources again. | ||
| 3186 | */ | ||
| 3187 | pe = pnv_ioda_setup_bus_PE(bus, all); | ||
| 3188 | if (!pe) | ||
| 3189 | return; | ||
| 3190 | |||
| 3191 | pnv_ioda_setup_pe_seg(pe); | ||
| 3192 | switch (phb->type) { | ||
| 3193 | case PNV_PHB_IODA1: | ||
| 3194 | pnv_pci_ioda1_setup_dma_pe(phb, pe); | ||
| 3195 | break; | ||
| 3196 | case PNV_PHB_IODA2: | ||
| 3197 | pnv_pci_ioda2_setup_dma_pe(phb, pe); | ||
| 3198 | break; | ||
| 3199 | default: | ||
| 3200 | pr_warn("%s: No DMA for PHB#%d (type %d)\n", | ||
| 3201 | __func__, phb->hose->global_number, phb->type); | ||
| 3202 | } | ||
| 3203 | } | ||
| 3204 | |||
| 3309 | #ifdef CONFIG_PCI_IOV | 3205 | #ifdef CONFIG_PCI_IOV |
| 3310 | static resource_size_t pnv_pci_iov_resource_alignment(struct pci_dev *pdev, | 3206 | static resource_size_t pnv_pci_iov_resource_alignment(struct pci_dev *pdev, |
| 3311 | int resno) | 3207 | int resno) |
| @@ -3345,7 +3241,7 @@ static resource_size_t pnv_pci_iov_resource_alignment(struct pci_dev *pdev, | |||
| 3345 | /* Prevent enabling devices for which we couldn't properly | 3241 | /* Prevent enabling devices for which we couldn't properly |
| 3346 | * assign a PE | 3242 | * assign a PE |
| 3347 | */ | 3243 | */ |
| 3348 | static bool pnv_pci_enable_device_hook(struct pci_dev *dev) | 3244 | bool pnv_pci_enable_device_hook(struct pci_dev *dev) |
| 3349 | { | 3245 | { |
| 3350 | struct pci_controller *hose = pci_bus_to_host(dev->bus); | 3246 | struct pci_controller *hose = pci_bus_to_host(dev->bus); |
| 3351 | struct pnv_phb *phb = hose->private_data; | 3247 | struct pnv_phb *phb = hose->private_data; |
| @@ -3366,6 +3262,178 @@ static bool pnv_pci_enable_device_hook(struct pci_dev *dev) | |||
| 3366 | return true; | 3262 | return true; |
| 3367 | } | 3263 | } |
| 3368 | 3264 | ||
| 3265 | static long pnv_pci_ioda1_unset_window(struct iommu_table_group *table_group, | ||
| 3266 | int num) | ||
| 3267 | { | ||
| 3268 | struct pnv_ioda_pe *pe = container_of(table_group, | ||
| 3269 | struct pnv_ioda_pe, table_group); | ||
| 3270 | struct pnv_phb *phb = pe->phb; | ||
| 3271 | unsigned int idx; | ||
| 3272 | long rc; | ||
| 3273 | |||
| 3274 | pe_info(pe, "Removing DMA window #%d\n", num); | ||
| 3275 | for (idx = 0; idx < phb->ioda.dma32_count; idx++) { | ||
| 3276 | if (phb->ioda.dma32_segmap[idx] != pe->pe_number) | ||
| 3277 | continue; | ||
| 3278 | |||
| 3279 | rc = opal_pci_map_pe_dma_window(phb->opal_id, pe->pe_number, | ||
| 3280 | idx, 0, 0ul, 0ul, 0ul); | ||
| 3281 | if (rc != OPAL_SUCCESS) { | ||
| 3282 | pe_warn(pe, "Failure %ld unmapping DMA32 segment#%d\n", | ||
| 3283 | rc, idx); | ||
| 3284 | return rc; | ||
| 3285 | } | ||
| 3286 | |||
| 3287 | phb->ioda.dma32_segmap[idx] = IODA_INVALID_PE; | ||
| 3288 | } | ||
| 3289 | |||
| 3290 | pnv_pci_unlink_table_and_group(table_group->tables[num], table_group); | ||
| 3291 | return OPAL_SUCCESS; | ||
| 3292 | } | ||
| 3293 | |||
| 3294 | static void pnv_pci_ioda1_release_pe_dma(struct pnv_ioda_pe *pe) | ||
| 3295 | { | ||
| 3296 | unsigned int weight = pnv_pci_ioda_pe_dma_weight(pe); | ||
| 3297 | struct iommu_table *tbl = pe->table_group.tables[0]; | ||
| 3298 | int64_t rc; | ||
| 3299 | |||
| 3300 | if (!weight) | ||
| 3301 | return; | ||
| 3302 | |||
| 3303 | rc = pnv_pci_ioda1_unset_window(&pe->table_group, 0); | ||
| 3304 | if (rc != OPAL_SUCCESS) | ||
| 3305 | return; | ||
| 3306 | |||
| 3307 | pnv_pci_p7ioc_tce_invalidate(tbl, tbl->it_offset, tbl->it_size, false); | ||
| 3308 | if (pe->table_group.group) { | ||
| 3309 | iommu_group_put(pe->table_group.group); | ||
| 3310 | WARN_ON(pe->table_group.group); | ||
| 3311 | } | ||
| 3312 | |||
| 3313 | free_pages(tbl->it_base, get_order(tbl->it_size << 3)); | ||
| 3314 | iommu_free_table(tbl, "pnv"); | ||
| 3315 | } | ||
| 3316 | |||
| 3317 | static void pnv_pci_ioda2_release_pe_dma(struct pnv_ioda_pe *pe) | ||
| 3318 | { | ||
| 3319 | struct iommu_table *tbl = pe->table_group.tables[0]; | ||
| 3320 | unsigned int weight = pnv_pci_ioda_pe_dma_weight(pe); | ||
| 3321 | #ifdef CONFIG_IOMMU_API | ||
| 3322 | int64_t rc; | ||
| 3323 | #endif | ||
| 3324 | |||
| 3325 | if (!weight) | ||
| 3326 | return; | ||
| 3327 | |||
| 3328 | #ifdef CONFIG_IOMMU_API | ||
| 3329 | rc = pnv_pci_ioda2_unset_window(&pe->table_group, 0); | ||
| 3330 | if (rc) | ||
| 3331 | pe_warn(pe, "OPAL error %ld release DMA window\n", rc); | ||
| 3332 | #endif | ||
| 3333 | |||
| 3334 | pnv_pci_ioda2_set_bypass(pe, false); | ||
| 3335 | if (pe->table_group.group) { | ||
| 3336 | iommu_group_put(pe->table_group.group); | ||
| 3337 | WARN_ON(pe->table_group.group); | ||
| 3338 | } | ||
| 3339 | |||
| 3340 | pnv_pci_ioda2_table_free_pages(tbl); | ||
| 3341 | iommu_free_table(tbl, "pnv"); | ||
| 3342 | } | ||
| 3343 | |||
| 3344 | static void pnv_ioda_free_pe_seg(struct pnv_ioda_pe *pe, | ||
| 3345 | unsigned short win, | ||
| 3346 | unsigned int *map) | ||
| 3347 | { | ||
| 3348 | struct pnv_phb *phb = pe->phb; | ||
| 3349 | int idx; | ||
| 3350 | int64_t rc; | ||
| 3351 | |||
| 3352 | for (idx = 0; idx < phb->ioda.total_pe_num; idx++) { | ||
| 3353 | if (map[idx] != pe->pe_number) | ||
| 3354 | continue; | ||
| 3355 | |||
| 3356 | if (win == OPAL_M64_WINDOW_TYPE) | ||
| 3357 | rc = opal_pci_map_pe_mmio_window(phb->opal_id, | ||
| 3358 | phb->ioda.reserved_pe_idx, win, | ||
| 3359 | idx / PNV_IODA1_M64_SEGS, | ||
| 3360 | idx % PNV_IODA1_M64_SEGS); | ||
| 3361 | else | ||
| 3362 | rc = opal_pci_map_pe_mmio_window(phb->opal_id, | ||
| 3363 | phb->ioda.reserved_pe_idx, win, 0, idx); | ||
| 3364 | |||
| 3365 | if (rc != OPAL_SUCCESS) | ||
| 3366 | pe_warn(pe, "Error %ld unmapping (%d) segment#%d\n", | ||
| 3367 | rc, win, idx); | ||
| 3368 | |||
| 3369 | map[idx] = IODA_INVALID_PE; | ||
| 3370 | } | ||
| 3371 | } | ||
| 3372 | |||
| 3373 | static void pnv_ioda_release_pe_seg(struct pnv_ioda_pe *pe) | ||
| 3374 | { | ||
| 3375 | struct pnv_phb *phb = pe->phb; | ||
| 3376 | |||
| 3377 | if (phb->type == PNV_PHB_IODA1) { | ||
| 3378 | pnv_ioda_free_pe_seg(pe, OPAL_IO_WINDOW_TYPE, | ||
| 3379 | phb->ioda.io_segmap); | ||
| 3380 | pnv_ioda_free_pe_seg(pe, OPAL_M32_WINDOW_TYPE, | ||
| 3381 | phb->ioda.m32_segmap); | ||
| 3382 | pnv_ioda_free_pe_seg(pe, OPAL_M64_WINDOW_TYPE, | ||
| 3383 | phb->ioda.m64_segmap); | ||
| 3384 | } else if (phb->type == PNV_PHB_IODA2) { | ||
| 3385 | pnv_ioda_free_pe_seg(pe, OPAL_M32_WINDOW_TYPE, | ||
| 3386 | phb->ioda.m32_segmap); | ||
| 3387 | } | ||
| 3388 | } | ||
| 3389 | |||
| 3390 | static void pnv_ioda_release_pe(struct pnv_ioda_pe *pe) | ||
| 3391 | { | ||
| 3392 | struct pnv_phb *phb = pe->phb; | ||
| 3393 | struct pnv_ioda_pe *slave, *tmp; | ||
| 3394 | |||
| 3395 | /* Release slave PEs in compound PE */ | ||
| 3396 | if (pe->flags & PNV_IODA_PE_MASTER) { | ||
| 3397 | list_for_each_entry_safe(slave, tmp, &pe->slaves, list) | ||
| 3398 | pnv_ioda_release_pe(slave); | ||
| 3399 | } | ||
| 3400 | |||
| 3401 | list_del(&pe->list); | ||
| 3402 | switch (phb->type) { | ||
| 3403 | case PNV_PHB_IODA1: | ||
| 3404 | pnv_pci_ioda1_release_pe_dma(pe); | ||
| 3405 | break; | ||
| 3406 | case PNV_PHB_IODA2: | ||
| 3407 | pnv_pci_ioda2_release_pe_dma(pe); | ||
| 3408 | break; | ||
| 3409 | default: | ||
| 3410 | WARN_ON(1); | ||
| 3411 | } | ||
| 3412 | |||
| 3413 | pnv_ioda_release_pe_seg(pe); | ||
| 3414 | pnv_ioda_deconfigure_pe(pe->phb, pe); | ||
| 3415 | pnv_ioda_free_pe(pe); | ||
| 3416 | } | ||
| 3417 | |||
| 3418 | static void pnv_pci_release_device(struct pci_dev *pdev) | ||
| 3419 | { | ||
| 3420 | struct pci_controller *hose = pci_bus_to_host(pdev->bus); | ||
| 3421 | struct pnv_phb *phb = hose->private_data; | ||
| 3422 | struct pci_dn *pdn = pci_get_pdn(pdev); | ||
| 3423 | struct pnv_ioda_pe *pe; | ||
| 3424 | |||
| 3425 | if (pdev->is_virtfn) | ||
| 3426 | return; | ||
| 3427 | |||
| 3428 | if (!pdn || pdn->pe_number == IODA_INVALID_PE) | ||
| 3429 | return; | ||
| 3430 | |||
| 3431 | pe = &phb->ioda.pe_array[pdn->pe_number]; | ||
| 3432 | WARN_ON(--pe->device_count < 0); | ||
| 3433 | if (pe->device_count == 0) | ||
| 3434 | pnv_ioda_release_pe(pe); | ||
| 3435 | } | ||
| 3436 | |||
| 3369 | static void pnv_pci_ioda_shutdown(struct pci_controller *hose) | 3437 | static void pnv_pci_ioda_shutdown(struct pci_controller *hose) |
| 3370 | { | 3438 | { |
| 3371 | struct pnv_phb *phb = hose->private_data; | 3439 | struct pnv_phb *phb = hose->private_data; |
| @@ -3382,7 +3450,9 @@ static const struct pci_controller_ops pnv_pci_ioda_controller_ops = { | |||
| 3382 | .teardown_msi_irqs = pnv_teardown_msi_irqs, | 3450 | .teardown_msi_irqs = pnv_teardown_msi_irqs, |
| 3383 | #endif | 3451 | #endif |
| 3384 | .enable_device_hook = pnv_pci_enable_device_hook, | 3452 | .enable_device_hook = pnv_pci_enable_device_hook, |
| 3453 | .release_device = pnv_pci_release_device, | ||
| 3385 | .window_alignment = pnv_pci_window_alignment, | 3454 | .window_alignment = pnv_pci_window_alignment, |
| 3455 | .setup_bridge = pnv_pci_setup_bridge, | ||
| 3386 | .reset_secondary_bus = pnv_pci_reset_secondary_bus, | 3456 | .reset_secondary_bus = pnv_pci_reset_secondary_bus, |
| 3387 | .dma_set_mask = pnv_pci_ioda_dma_set_mask, | 3457 | .dma_set_mask = pnv_pci_ioda_dma_set_mask, |
| 3388 | .dma_get_required_mask = pnv_pci_ioda_dma_get_required_mask, | 3458 | .dma_get_required_mask = pnv_pci_ioda_dma_get_required_mask, |
| @@ -3410,6 +3480,26 @@ static const struct pci_controller_ops pnv_npu_ioda_controller_ops = { | |||
| 3410 | .shutdown = pnv_pci_ioda_shutdown, | 3480 | .shutdown = pnv_pci_ioda_shutdown, |
| 3411 | }; | 3481 | }; |
| 3412 | 3482 | ||
| 3483 | #ifdef CONFIG_CXL_BASE | ||
| 3484 | const struct pci_controller_ops pnv_cxl_cx4_ioda_controller_ops = { | ||
| 3485 | .dma_dev_setup = pnv_pci_dma_dev_setup, | ||
| 3486 | .dma_bus_setup = pnv_pci_dma_bus_setup, | ||
| 3487 | #ifdef CONFIG_PCI_MSI | ||
| 3488 | .setup_msi_irqs = pnv_cxl_cx4_setup_msi_irqs, | ||
| 3489 | .teardown_msi_irqs = pnv_cxl_cx4_teardown_msi_irqs, | ||
| 3490 | #endif | ||
| 3491 | .enable_device_hook = pnv_cxl_enable_device_hook, | ||
| 3492 | .disable_device = pnv_cxl_disable_device, | ||
| 3493 | .release_device = pnv_pci_release_device, | ||
| 3494 | .window_alignment = pnv_pci_window_alignment, | ||
| 3495 | .setup_bridge = pnv_pci_setup_bridge, | ||
| 3496 | .reset_secondary_bus = pnv_pci_reset_secondary_bus, | ||
| 3497 | .dma_set_mask = pnv_pci_ioda_dma_set_mask, | ||
| 3498 | .dma_get_required_mask = pnv_pci_ioda_dma_get_required_mask, | ||
| 3499 | .shutdown = pnv_pci_ioda_shutdown, | ||
| 3500 | }; | ||
| 3501 | #endif | ||
| 3502 | |||
| 3413 | static void __init pnv_pci_init_ioda_phb(struct device_node *np, | 3503 | static void __init pnv_pci_init_ioda_phb(struct device_node *np, |
| 3414 | u64 hub_id, int ioda_type) | 3504 | u64 hub_id, int ioda_type) |
| 3415 | { | 3505 | { |
| @@ -3417,6 +3507,7 @@ static void __init pnv_pci_init_ioda_phb(struct device_node *np, | |||
| 3417 | struct pnv_phb *phb; | 3507 | struct pnv_phb *phb; |
| 3418 | unsigned long size, m64map_off, m32map_off, pemap_off; | 3508 | unsigned long size, m64map_off, m32map_off, pemap_off; |
| 3419 | unsigned long iomap_off = 0, dma32map_off = 0; | 3509 | unsigned long iomap_off = 0, dma32map_off = 0; |
| 3510 | struct resource r; | ||
| 3420 | const __be64 *prop64; | 3511 | const __be64 *prop64; |
| 3421 | const __be32 *prop32; | 3512 | const __be32 *prop32; |
| 3422 | int len; | 3513 | int len; |
| @@ -3425,7 +3516,11 @@ static void __init pnv_pci_init_ioda_phb(struct device_node *np, | |||
| 3425 | void *aux; | 3516 | void *aux; |
| 3426 | long rc; | 3517 | long rc; |
| 3427 | 3518 | ||
| 3428 | pr_info("Initializing IODA%d OPAL PHB %s\n", ioda_type, np->full_name); | 3519 | if (!of_device_is_available(np)) |
| 3520 | return; | ||
| 3521 | |||
| 3522 | pr_info("Initializing %s PHB (%s)\n", | ||
| 3523 | pnv_phb_names[ioda_type], of_node_full_name(np)); | ||
| 3429 | 3524 | ||
| 3430 | prop64 = of_get_property(np, "ibm,opal-phbid", NULL); | 3525 | prop64 = of_get_property(np, "ibm,opal-phbid", NULL); |
| 3431 | if (!prop64) { | 3526 | if (!prop64) { |
| @@ -3476,9 +3571,12 @@ static void __init pnv_pci_init_ioda_phb(struct device_node *np, | |||
| 3476 | pci_process_bridge_OF_ranges(hose, np, !hose->global_number); | 3571 | pci_process_bridge_OF_ranges(hose, np, !hose->global_number); |
| 3477 | 3572 | ||
| 3478 | /* Get registers */ | 3573 | /* Get registers */ |
| 3479 | phb->regs = of_iomap(np, 0); | 3574 | if (!of_address_to_resource(np, 0, &r)) { |
| 3480 | if (phb->regs == NULL) | 3575 | phb->regs_phys = r.start; |
| 3481 | pr_err(" Failed to map registers !\n"); | 3576 | phb->regs = ioremap(r.start, resource_size(&r)); |
| 3577 | if (phb->regs == NULL) | ||
| 3578 | pr_err(" Failed to map registers !\n"); | ||
| 3579 | } | ||
| 3482 | 3580 | ||
| 3483 | /* Initialize more IODA stuff */ | 3581 | /* Initialize more IODA stuff */ |
| 3484 | phb->ioda.total_pe_num = 1; | 3582 | phb->ioda.total_pe_num = 1; |
| @@ -3489,6 +3587,10 @@ static void __init pnv_pci_init_ioda_phb(struct device_node *np, | |||
| 3489 | if (prop32) | 3587 | if (prop32) |
| 3490 | phb->ioda.reserved_pe_idx = be32_to_cpup(prop32); | 3588 | phb->ioda.reserved_pe_idx = be32_to_cpup(prop32); |
| 3491 | 3589 | ||
| 3590 | /* Invalidate RID to PE# mapping */ | ||
| 3591 | for (segno = 0; segno < ARRAY_SIZE(phb->ioda.pe_rmap); segno++) | ||
| 3592 | phb->ioda.pe_rmap[segno] = IODA_INVALID_PE; | ||
| 3593 | |||
| 3492 | /* Parse 64-bit MMIO range */ | 3594 | /* Parse 64-bit MMIO range */ |
| 3493 | pnv_ioda_parse_m64_window(phb); | 3595 | pnv_ioda_parse_m64_window(phb); |
| 3494 | 3596 | ||
| @@ -3540,7 +3642,22 @@ static void __init pnv_pci_init_ioda_phb(struct device_node *np, | |||
| 3540 | phb->ioda.dma32_segmap[segno] = IODA_INVALID_PE; | 3642 | phb->ioda.dma32_segmap[segno] = IODA_INVALID_PE; |
| 3541 | } | 3643 | } |
| 3542 | phb->ioda.pe_array = aux + pemap_off; | 3644 | phb->ioda.pe_array = aux + pemap_off; |
| 3543 | set_bit(phb->ioda.reserved_pe_idx, phb->ioda.pe_alloc); | 3645 | |
| 3646 | /* | ||
| 3647 | * Choose PE number for root bus, which shouldn't have | ||
| 3648 | * M64 resources consumed by its child devices. To pick | ||
| 3649 | * the PE number adjacent to the reserved one if possible. | ||
| 3650 | */ | ||
| 3651 | pnv_ioda_reserve_pe(phb, phb->ioda.reserved_pe_idx); | ||
| 3652 | if (phb->ioda.reserved_pe_idx == 0) { | ||
| 3653 | phb->ioda.root_pe_idx = 1; | ||
| 3654 | pnv_ioda_reserve_pe(phb, phb->ioda.root_pe_idx); | ||
| 3655 | } else if (phb->ioda.reserved_pe_idx == (phb->ioda.total_pe_num - 1)) { | ||
| 3656 | phb->ioda.root_pe_idx = phb->ioda.reserved_pe_idx - 1; | ||
| 3657 | pnv_ioda_reserve_pe(phb, phb->ioda.root_pe_idx); | ||
| 3658 | } else { | ||
| 3659 | phb->ioda.root_pe_idx = IODA_INVALID_PE; | ||
| 3660 | } | ||
| 3544 | 3661 | ||
| 3545 | INIT_LIST_HEAD(&phb->ioda.pe_list); | 3662 | INIT_LIST_HEAD(&phb->ioda.pe_list); |
| 3546 | mutex_init(&phb->ioda.pe_list_mutex); | 3663 | mutex_init(&phb->ioda.pe_list_mutex); |
diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c index 1d92bd93bcd9..6701dd5ded20 100644 --- a/arch/powerpc/platforms/powernv/pci.c +++ b/arch/powerpc/platforms/powernv/pci.c | |||
| @@ -26,6 +26,7 @@ | |||
| 26 | #include <asm/machdep.h> | 26 | #include <asm/machdep.h> |
| 27 | #include <asm/msi_bitmap.h> | 27 | #include <asm/msi_bitmap.h> |
| 28 | #include <asm/ppc-pci.h> | 28 | #include <asm/ppc-pci.h> |
| 29 | #include <asm/pnv-pci.h> | ||
| 29 | #include <asm/opal.h> | 30 | #include <asm/opal.h> |
| 30 | #include <asm/iommu.h> | 31 | #include <asm/iommu.h> |
| 31 | #include <asm/tce.h> | 32 | #include <asm/tce.h> |
| @@ -36,8 +37,124 @@ | |||
| 36 | #include "powernv.h" | 37 | #include "powernv.h" |
| 37 | #include "pci.h" | 38 | #include "pci.h" |
| 38 | 39 | ||
| 39 | /* Delay in usec */ | 40 | int pnv_pci_get_slot_id(struct device_node *np, uint64_t *id) |
| 40 | #define PCI_RESET_DELAY_US 3000000 | 41 | { |
| 42 | struct device_node *parent = np; | ||
| 43 | u32 bdfn; | ||
| 44 | u64 phbid; | ||
| 45 | int ret; | ||
| 46 | |||
| 47 | ret = of_property_read_u32(np, "reg", &bdfn); | ||
| 48 | if (ret) | ||
| 49 | return -ENXIO; | ||
| 50 | |||
| 51 | bdfn = ((bdfn & 0x00ffff00) >> 8); | ||
| 52 | while ((parent = of_get_parent(parent))) { | ||
| 53 | if (!PCI_DN(parent)) { | ||
| 54 | of_node_put(parent); | ||
| 55 | break; | ||
| 56 | } | ||
| 57 | |||
| 58 | if (!of_device_is_compatible(parent, "ibm,ioda2-phb")) { | ||
| 59 | of_node_put(parent); | ||
| 60 | continue; | ||
| 61 | } | ||
| 62 | |||
| 63 | ret = of_property_read_u64(parent, "ibm,opal-phbid", &phbid); | ||
| 64 | if (ret) { | ||
| 65 | of_node_put(parent); | ||
| 66 | return -ENXIO; | ||
| 67 | } | ||
| 68 | |||
| 69 | *id = PCI_SLOT_ID(phbid, bdfn); | ||
| 70 | return 0; | ||
| 71 | } | ||
| 72 | |||
| 73 | return -ENODEV; | ||
| 74 | } | ||
| 75 | EXPORT_SYMBOL_GPL(pnv_pci_get_slot_id); | ||
| 76 | |||
| 77 | int pnv_pci_get_device_tree(uint32_t phandle, void *buf, uint64_t len) | ||
| 78 | { | ||
| 79 | int64_t rc; | ||
| 80 | |||
| 81 | if (!opal_check_token(OPAL_GET_DEVICE_TREE)) | ||
| 82 | return -ENXIO; | ||
| 83 | |||
| 84 | rc = opal_get_device_tree(phandle, (uint64_t)buf, len); | ||
| 85 | if (rc < OPAL_SUCCESS) | ||
| 86 | return -EIO; | ||
| 87 | |||
| 88 | return rc; | ||
| 89 | } | ||
| 90 | EXPORT_SYMBOL_GPL(pnv_pci_get_device_tree); | ||
| 91 | |||
| 92 | int pnv_pci_get_presence_state(uint64_t id, uint8_t *state) | ||
| 93 | { | ||
| 94 | int64_t rc; | ||
| 95 | |||
| 96 | if (!opal_check_token(OPAL_PCI_GET_PRESENCE_STATE)) | ||
| 97 | return -ENXIO; | ||
| 98 | |||
| 99 | rc = opal_pci_get_presence_state(id, (uint64_t)state); | ||
| 100 | if (rc != OPAL_SUCCESS) | ||
| 101 | return -EIO; | ||
| 102 | |||
| 103 | return 0; | ||
| 104 | } | ||
| 105 | EXPORT_SYMBOL_GPL(pnv_pci_get_presence_state); | ||
| 106 | |||
| 107 | int pnv_pci_get_power_state(uint64_t id, uint8_t *state) | ||
| 108 | { | ||
| 109 | int64_t rc; | ||
| 110 | |||
| 111 | if (!opal_check_token(OPAL_PCI_GET_POWER_STATE)) | ||
| 112 | return -ENXIO; | ||
| 113 | |||
| 114 | rc = opal_pci_get_power_state(id, (uint64_t)state); | ||
| 115 | if (rc != OPAL_SUCCESS) | ||
| 116 | return -EIO; | ||
| 117 | |||
| 118 | return 0; | ||
| 119 | } | ||
| 120 | EXPORT_SYMBOL_GPL(pnv_pci_get_power_state); | ||
| 121 | |||
| 122 | int pnv_pci_set_power_state(uint64_t id, uint8_t state, struct opal_msg *msg) | ||
| 123 | { | ||
| 124 | struct opal_msg m; | ||
| 125 | int token, ret; | ||
| 126 | int64_t rc; | ||
| 127 | |||
| 128 | if (!opal_check_token(OPAL_PCI_SET_POWER_STATE)) | ||
| 129 | return -ENXIO; | ||
| 130 | |||
| 131 | token = opal_async_get_token_interruptible(); | ||
| 132 | if (unlikely(token < 0)) | ||
| 133 | return token; | ||
| 134 | |||
| 135 | rc = opal_pci_set_power_state(token, id, (uint64_t)&state); | ||
| 136 | if (rc == OPAL_SUCCESS) { | ||
| 137 | ret = 0; | ||
| 138 | goto exit; | ||
| 139 | } else if (rc != OPAL_ASYNC_COMPLETION) { | ||
| 140 | ret = -EIO; | ||
| 141 | goto exit; | ||
| 142 | } | ||
| 143 | |||
| 144 | ret = opal_async_wait_response(token, &m); | ||
| 145 | if (ret < 0) | ||
| 146 | goto exit; | ||
| 147 | |||
| 148 | if (msg) { | ||
| 149 | ret = 1; | ||
| 150 | memcpy(msg, &m, sizeof(m)); | ||
| 151 | } | ||
| 152 | |||
| 153 | exit: | ||
| 154 | opal_async_release_token(token); | ||
| 155 | return ret; | ||
| 156 | } | ||
| 157 | EXPORT_SYMBOL_GPL(pnv_pci_set_power_state); | ||
| 41 | 158 | ||
| 42 | #ifdef CONFIG_PCI_MSI | 159 | #ifdef CONFIG_PCI_MSI |
| 43 | int pnv_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) | 160 | int pnv_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) |
| @@ -620,8 +737,8 @@ int pnv_tce_xchg(struct iommu_table *tbl, long index, | |||
| 620 | if (newtce & TCE_PCI_WRITE) | 737 | if (newtce & TCE_PCI_WRITE) |
| 621 | newtce |= TCE_PCI_READ; | 738 | newtce |= TCE_PCI_READ; |
| 622 | 739 | ||
| 623 | oldtce = xchg(pnv_tce(tbl, idx), cpu_to_be64(newtce)); | 740 | oldtce = be64_to_cpu(xchg(pnv_tce(tbl, idx), cpu_to_be64(newtce))); |
| 624 | *hpa = be64_to_cpu(oldtce) & ~(TCE_PCI_READ | TCE_PCI_WRITE); | 741 | *hpa = oldtce & ~(TCE_PCI_READ | TCE_PCI_WRITE); |
| 625 | *direction = iommu_tce_direction(oldtce); | 742 | *direction = iommu_tce_direction(oldtce); |
| 626 | 743 | ||
| 627 | return 0; | 744 | return 0; |
| @@ -815,13 +932,14 @@ void __init pnv_pci_init(void) | |||
| 815 | for_each_compatible_node(np, NULL, "ibm,ioda2-phb") | 932 | for_each_compatible_node(np, NULL, "ibm,ioda2-phb") |
| 816 | pnv_pci_init_ioda2_phb(np); | 933 | pnv_pci_init_ioda2_phb(np); |
| 817 | 934 | ||
| 935 | /* Look for ioda3 built-in PHB4's, we treat them as IODA2 */ | ||
| 936 | for_each_compatible_node(np, NULL, "ibm,ioda3-phb") | ||
| 937 | pnv_pci_init_ioda2_phb(np); | ||
| 938 | |||
| 818 | /* Look for NPU PHBs */ | 939 | /* Look for NPU PHBs */ |
| 819 | for_each_compatible_node(np, NULL, "ibm,ioda2-npu-phb") | 940 | for_each_compatible_node(np, NULL, "ibm,ioda2-npu-phb") |
| 820 | pnv_pci_init_npu_phb(np); | 941 | pnv_pci_init_npu_phb(np); |
| 821 | 942 | ||
| 822 | /* Setup the linkage between OF nodes and PHBs */ | ||
| 823 | pci_devs_phb_init(); | ||
| 824 | |||
| 825 | /* Configure IOMMU DMA hooks */ | 943 | /* Configure IOMMU DMA hooks */ |
| 826 | set_pci_dma_ops(&dma_iommu_ops); | 944 | set_pci_dma_ops(&dma_iommu_ops); |
| 827 | } | 945 | } |
diff --git a/arch/powerpc/platforms/powernv/pci.h b/arch/powerpc/platforms/powernv/pci.h index 7dee25e304db..d088d4f06116 100644 --- a/arch/powerpc/platforms/powernv/pci.h +++ b/arch/powerpc/platforms/powernv/pci.h | |||
| @@ -1,6 +1,10 @@ | |||
| 1 | #ifndef __POWERNV_PCI_H | 1 | #ifndef __POWERNV_PCI_H |
| 2 | #define __POWERNV_PCI_H | 2 | #define __POWERNV_PCI_H |
| 3 | 3 | ||
| 4 | #include <linux/iommu.h> | ||
| 5 | #include <asm/iommu.h> | ||
| 6 | #include <asm/msi_bitmap.h> | ||
| 7 | |||
| 4 | struct pci_dn; | 8 | struct pci_dn; |
| 5 | 9 | ||
| 6 | enum pnv_phb_type { | 10 | enum pnv_phb_type { |
| @@ -30,6 +34,7 @@ struct pnv_phb; | |||
| 30 | struct pnv_ioda_pe { | 34 | struct pnv_ioda_pe { |
| 31 | unsigned long flags; | 35 | unsigned long flags; |
| 32 | struct pnv_phb *phb; | 36 | struct pnv_phb *phb; |
| 37 | int device_count; | ||
| 33 | 38 | ||
| 34 | /* A PE can be associated with a single device or an | 39 | /* A PE can be associated with a single device or an |
| 35 | * entire bus (& children). In the former case, pdev | 40 | * entire bus (& children). In the former case, pdev |
| @@ -71,6 +76,7 @@ struct pnv_ioda_pe { | |||
| 71 | }; | 76 | }; |
| 72 | 77 | ||
| 73 | #define PNV_PHB_FLAG_EEH (1 << 0) | 78 | #define PNV_PHB_FLAG_EEH (1 << 0) |
| 79 | #define PNV_PHB_FLAG_CXL (1 << 1) /* Real PHB supporting the cxl kernel API */ | ||
| 74 | 80 | ||
| 75 | struct pnv_phb { | 81 | struct pnv_phb { |
| 76 | struct pci_controller *hose; | 82 | struct pci_controller *hose; |
| @@ -80,6 +86,7 @@ struct pnv_phb { | |||
| 80 | u64 opal_id; | 86 | u64 opal_id; |
| 81 | int flags; | 87 | int flags; |
| 82 | void __iomem *regs; | 88 | void __iomem *regs; |
| 89 | u64 regs_phys; | ||
| 83 | int initialized; | 90 | int initialized; |
| 84 | spinlock_t lock; | 91 | spinlock_t lock; |
| 85 | 92 | ||
| @@ -110,6 +117,8 @@ struct pnv_phb { | |||
| 110 | /* Global bridge info */ | 117 | /* Global bridge info */ |
| 111 | unsigned int total_pe_num; | 118 | unsigned int total_pe_num; |
| 112 | unsigned int reserved_pe_idx; | 119 | unsigned int reserved_pe_idx; |
| 120 | unsigned int root_pe_idx; | ||
| 121 | bool root_pe_populated; | ||
| 113 | 122 | ||
| 114 | /* 32-bit MMIO window */ | 123 | /* 32-bit MMIO window */ |
| 115 | unsigned int m32_size; | 124 | unsigned int m32_size; |
| @@ -152,17 +161,8 @@ struct pnv_phb { | |||
| 152 | struct list_head pe_list; | 161 | struct list_head pe_list; |
| 153 | struct mutex pe_list_mutex; | 162 | struct mutex pe_list_mutex; |
| 154 | 163 | ||
| 155 | /* Reverse map of PEs, will have to extend if | 164 | /* Reverse map of PEs, indexed by {bus, devfn} */ |
| 156 | * we are to support more than 256 PEs, indexed | 165 | unsigned int pe_rmap[0x10000]; |
| 157 | * bus { bus, devfn } | ||
| 158 | */ | ||
| 159 | unsigned char pe_rmap[0x10000]; | ||
| 160 | |||
| 161 | /* TCE cache invalidate registers (physical and | ||
| 162 | * remapped) | ||
| 163 | */ | ||
| 164 | phys_addr_t tce_inval_reg_phys; | ||
| 165 | __be64 __iomem *tce_inval_reg; | ||
| 166 | } ioda; | 166 | } ioda; |
| 167 | 167 | ||
| 168 | /* PHB and hub status structure */ | 168 | /* PHB and hub status structure */ |
| @@ -173,6 +173,9 @@ struct pnv_phb { | |||
| 173 | struct OpalIoP7IOCErrorData hub_diag; | 173 | struct OpalIoP7IOCErrorData hub_diag; |
| 174 | } diag; | 174 | } diag; |
| 175 | 175 | ||
| 176 | #ifdef CONFIG_CXL_BASE | ||
| 177 | struct cxl_afu *cxl_afu; | ||
| 178 | #endif | ||
| 176 | }; | 179 | }; |
| 177 | 180 | ||
| 178 | extern struct pci_ops pnv_pci_ops; | 181 | extern struct pci_ops pnv_pci_ops; |
| @@ -203,8 +206,6 @@ extern void pnv_pci_setup_iommu_table(struct iommu_table *tbl, | |||
| 203 | extern void pnv_pci_init_ioda_hub(struct device_node *np); | 206 | extern void pnv_pci_init_ioda_hub(struct device_node *np); |
| 204 | extern void pnv_pci_init_ioda2_phb(struct device_node *np); | 207 | extern void pnv_pci_init_ioda2_phb(struct device_node *np); |
| 205 | extern void pnv_pci_init_npu_phb(struct device_node *np); | 208 | extern void pnv_pci_init_npu_phb(struct device_node *np); |
| 206 | extern void pnv_pci_ioda_tce_invalidate(struct iommu_table *tbl, | ||
| 207 | __be64 *startp, __be64 *endp, bool rm); | ||
| 208 | extern void pnv_pci_reset_secondary_bus(struct pci_dev *dev); | 209 | extern void pnv_pci_reset_secondary_bus(struct pci_dev *dev); |
| 209 | extern int pnv_eeh_phb_reset(struct pci_controller *hose, int option); | 210 | extern int pnv_eeh_phb_reset(struct pci_controller *hose, int option); |
| 210 | 211 | ||
| @@ -212,6 +213,9 @@ extern void pnv_pci_dma_dev_setup(struct pci_dev *pdev); | |||
| 212 | extern void pnv_pci_dma_bus_setup(struct pci_bus *bus); | 213 | extern void pnv_pci_dma_bus_setup(struct pci_bus *bus); |
| 213 | extern int pnv_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type); | 214 | extern int pnv_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type); |
| 214 | extern void pnv_teardown_msi_irqs(struct pci_dev *pdev); | 215 | extern void pnv_teardown_msi_irqs(struct pci_dev *pdev); |
| 216 | extern struct pnv_ioda_pe *pnv_ioda_get_pe(struct pci_dev *dev); | ||
| 217 | extern void pnv_set_msi_irq_chip(struct pnv_phb *phb, unsigned int virq); | ||
| 218 | extern bool pnv_pci_enable_device_hook(struct pci_dev *dev); | ||
| 215 | 219 | ||
| 216 | extern void pe_level_printk(const struct pnv_ioda_pe *pe, const char *level, | 220 | extern void pe_level_printk(const struct pnv_ioda_pe *pe, const char *level, |
| 217 | const char *fmt, ...); | 221 | const char *fmt, ...); |
| @@ -224,7 +228,7 @@ extern void pe_level_printk(const struct pnv_ioda_pe *pe, const char *level, | |||
| 224 | 228 | ||
| 225 | /* Nvlink functions */ | 229 | /* Nvlink functions */ |
| 226 | extern void pnv_npu_try_dma_set_bypass(struct pci_dev *gpdev, bool bypass); | 230 | extern void pnv_npu_try_dma_set_bypass(struct pci_dev *gpdev, bool bypass); |
| 227 | extern void pnv_pci_ioda2_tce_invalidate_entire(struct pnv_phb *phb, bool rm); | 231 | extern void pnv_pci_phb3_tce_invalidate_entire(struct pnv_phb *phb, bool rm); |
| 228 | extern struct pnv_ioda_pe *pnv_pci_npu_setup_iommu(struct pnv_ioda_pe *npe); | 232 | extern struct pnv_ioda_pe *pnv_pci_npu_setup_iommu(struct pnv_ioda_pe *npe); |
| 229 | extern long pnv_npu_set_window(struct pnv_ioda_pe *npe, int num, | 233 | extern long pnv_npu_set_window(struct pnv_ioda_pe *npe, int num, |
| 230 | struct iommu_table *tbl); | 234 | struct iommu_table *tbl); |
| @@ -232,4 +236,15 @@ extern long pnv_npu_unset_window(struct pnv_ioda_pe *npe, int num); | |||
| 232 | extern void pnv_npu_take_ownership(struct pnv_ioda_pe *npe); | 236 | extern void pnv_npu_take_ownership(struct pnv_ioda_pe *npe); |
| 233 | extern void pnv_npu_release_ownership(struct pnv_ioda_pe *npe); | 237 | extern void pnv_npu_release_ownership(struct pnv_ioda_pe *npe); |
| 234 | 238 | ||
| 239 | |||
| 240 | /* cxl functions */ | ||
| 241 | extern bool pnv_cxl_enable_device_hook(struct pci_dev *dev); | ||
| 242 | extern void pnv_cxl_disable_device(struct pci_dev *dev); | ||
| 243 | extern int pnv_cxl_cx4_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type); | ||
| 244 | extern void pnv_cxl_cx4_teardown_msi_irqs(struct pci_dev *pdev); | ||
| 245 | |||
| 246 | |||
| 247 | /* phb ops (cxl switches these when enabling the kernel api on the phb) */ | ||
| 248 | extern const struct pci_controller_ops pnv_cxl_cx4_ioda_controller_ops; | ||
| 249 | |||
| 235 | #endif /* __POWERNV_PCI_H */ | 250 | #endif /* __POWERNV_PCI_H */ |
diff --git a/arch/powerpc/platforms/powernv/powernv.h b/arch/powerpc/platforms/powernv/powernv.h index 6dbc0a1da1f6..da7c843ac7f1 100644 --- a/arch/powerpc/platforms/powernv/powernv.h +++ b/arch/powerpc/platforms/powernv/powernv.h | |||
| @@ -18,6 +18,7 @@ static inline void pnv_pci_shutdown(void) { } | |||
| 18 | #endif | 18 | #endif |
| 19 | 19 | ||
| 20 | extern u32 pnv_get_supported_cpuidle_states(void); | 20 | extern u32 pnv_get_supported_cpuidle_states(void); |
| 21 | extern u64 pnv_deepest_stop_state; | ||
| 21 | 22 | ||
| 22 | extern void pnv_lpc_init(void); | 23 | extern void pnv_lpc_init(void); |
| 23 | 24 | ||
diff --git a/arch/powerpc/platforms/powernv/setup.c b/arch/powerpc/platforms/powernv/setup.c index ee6430bedcc3..efe8b6bb168b 100644 --- a/arch/powerpc/platforms/powernv/setup.c +++ b/arch/powerpc/platforms/powernv/setup.c | |||
| @@ -58,7 +58,7 @@ static void __init pnv_setup_arch(void) | |||
| 58 | /* XXX PMCS */ | 58 | /* XXX PMCS */ |
| 59 | } | 59 | } |
| 60 | 60 | ||
| 61 | static void __init pnv_init_early(void) | 61 | static void __init pnv_init(void) |
| 62 | { | 62 | { |
| 63 | /* | 63 | /* |
| 64 | * Initialize the LPC bus now so that legacy serial | 64 | * Initialize the LPC bus now so that legacy serial |
| @@ -268,21 +268,16 @@ static void __init pnv_setup_machdep_opal(void) | |||
| 268 | 268 | ||
| 269 | static int __init pnv_probe(void) | 269 | static int __init pnv_probe(void) |
| 270 | { | 270 | { |
| 271 | unsigned long root = of_get_flat_dt_root(); | 271 | if (!of_machine_is_compatible("ibm,powernv")) |
| 272 | |||
| 273 | if (!of_flat_dt_is_compatible(root, "ibm,powernv")) | ||
| 274 | return 0; | 272 | return 0; |
| 275 | 273 | ||
| 276 | if (IS_ENABLED(CONFIG_PPC_RADIX_MMU) && radix_enabled()) | ||
| 277 | radix_init_native(); | ||
| 278 | else if (IS_ENABLED(CONFIG_PPC_STD_MMU_64)) | ||
| 279 | hpte_init_native(); | ||
| 280 | |||
| 281 | if (firmware_has_feature(FW_FEATURE_OPAL)) | 274 | if (firmware_has_feature(FW_FEATURE_OPAL)) |
| 282 | pnv_setup_machdep_opal(); | 275 | pnv_setup_machdep_opal(); |
| 283 | 276 | ||
| 284 | pr_debug("PowerNV detected !\n"); | 277 | pr_debug("PowerNV detected !\n"); |
| 285 | 278 | ||
| 279 | pnv_init(); | ||
| 280 | |||
| 286 | return 1; | 281 | return 1; |
| 287 | } | 282 | } |
| 288 | 283 | ||
| @@ -308,14 +303,13 @@ static unsigned long pnv_get_proc_freq(unsigned int cpu) | |||
| 308 | define_machine(powernv) { | 303 | define_machine(powernv) { |
| 309 | .name = "PowerNV", | 304 | .name = "PowerNV", |
| 310 | .probe = pnv_probe, | 305 | .probe = pnv_probe, |
| 311 | .init_early = pnv_init_early, | ||
| 312 | .setup_arch = pnv_setup_arch, | 306 | .setup_arch = pnv_setup_arch, |
| 313 | .init_IRQ = pnv_init_IRQ, | 307 | .init_IRQ = pnv_init_IRQ, |
| 314 | .show_cpuinfo = pnv_show_cpuinfo, | 308 | .show_cpuinfo = pnv_show_cpuinfo, |
| 315 | .get_proc_freq = pnv_get_proc_freq, | 309 | .get_proc_freq = pnv_get_proc_freq, |
| 316 | .progress = pnv_progress, | 310 | .progress = pnv_progress, |
| 317 | .machine_shutdown = pnv_shutdown, | 311 | .machine_shutdown = pnv_shutdown, |
| 318 | .power_save = power7_idle, | 312 | .power_save = NULL, |
| 319 | .calibrate_decr = generic_calibrate_decr, | 313 | .calibrate_decr = generic_calibrate_decr, |
| 320 | #ifdef CONFIG_KEXEC | 314 | #ifdef CONFIG_KEXEC |
| 321 | .kexec_cpu_down = pnv_kexec_cpu_down, | 315 | .kexec_cpu_down = pnv_kexec_cpu_down, |
diff --git a/arch/powerpc/platforms/powernv/smp.c b/arch/powerpc/platforms/powernv/smp.c index ad7b1a3dbed0..c789258ae1e1 100644 --- a/arch/powerpc/platforms/powernv/smp.c +++ b/arch/powerpc/platforms/powernv/smp.c | |||
| @@ -182,7 +182,9 @@ static void pnv_smp_cpu_kill_self(void) | |||
| 182 | 182 | ||
| 183 | ppc64_runlatch_off(); | 183 | ppc64_runlatch_off(); |
| 184 | 184 | ||
| 185 | if (idle_states & OPAL_PM_WINKLE_ENABLED) | 185 | if (cpu_has_feature(CPU_FTR_ARCH_300)) |
| 186 | srr1 = power9_idle_stop(pnv_deepest_stop_state); | ||
| 187 | else if (idle_states & OPAL_PM_WINKLE_ENABLED) | ||
| 186 | srr1 = power7_winkle(); | 188 | srr1 = power7_winkle(); |
| 187 | else if ((idle_states & OPAL_PM_SLEEP_ENABLED) || | 189 | else if ((idle_states & OPAL_PM_SLEEP_ENABLED) || |
| 188 | (idle_states & OPAL_PM_SLEEP_ENABLED_ER1)) | 190 | (idle_states & OPAL_PM_SLEEP_ENABLED_ER1)) |
diff --git a/arch/powerpc/platforms/ps3/htab.c b/arch/powerpc/platforms/ps3/htab.c index c9a3e677192a..cb3c50328de8 100644 --- a/arch/powerpc/platforms/ps3/htab.c +++ b/arch/powerpc/platforms/ps3/htab.c | |||
| @@ -195,12 +195,12 @@ static void ps3_hpte_clear(void) | |||
| 195 | 195 | ||
| 196 | void __init ps3_hpte_init(unsigned long htab_size) | 196 | void __init ps3_hpte_init(unsigned long htab_size) |
| 197 | { | 197 | { |
| 198 | ppc_md.hpte_invalidate = ps3_hpte_invalidate; | 198 | mmu_hash_ops.hpte_invalidate = ps3_hpte_invalidate; |
| 199 | ppc_md.hpte_updatepp = ps3_hpte_updatepp; | 199 | mmu_hash_ops.hpte_updatepp = ps3_hpte_updatepp; |
| 200 | ppc_md.hpte_updateboltedpp = ps3_hpte_updateboltedpp; | 200 | mmu_hash_ops.hpte_updateboltedpp = ps3_hpte_updateboltedpp; |
| 201 | ppc_md.hpte_insert = ps3_hpte_insert; | 201 | mmu_hash_ops.hpte_insert = ps3_hpte_insert; |
| 202 | ppc_md.hpte_remove = ps3_hpte_remove; | 202 | mmu_hash_ops.hpte_remove = ps3_hpte_remove; |
| 203 | ppc_md.hpte_clear_all = ps3_hpte_clear; | 203 | mmu_hash_ops.hpte_clear_all = ps3_hpte_clear; |
| 204 | 204 | ||
| 205 | ppc64_pft_size = __ilog2(htab_size); | 205 | ppc64_pft_size = __ilog2(htab_size); |
| 206 | } | 206 | } |
diff --git a/arch/powerpc/platforms/ps3/repository.c b/arch/powerpc/platforms/ps3/repository.c index bfccdc7cb85f..814a7eaa7769 100644 --- a/arch/powerpc/platforms/ps3/repository.c +++ b/arch/powerpc/platforms/ps3/repository.c | |||
| @@ -1198,7 +1198,7 @@ int ps3_repository_delete_highmem_info(unsigned int region_index) | |||
| 1198 | return result ? -1 : 0; | 1198 | return result ? -1 : 0; |
| 1199 | } | 1199 | } |
| 1200 | 1200 | ||
| 1201 | #endif /* defined(CONFIG_PS3_WRITE_REPOSITORY) */ | 1201 | #endif /* defined(CONFIG_PS3_REPOSITORY_WRITE) */ |
| 1202 | 1202 | ||
| 1203 | #if defined(DEBUG) | 1203 | #if defined(DEBUG) |
| 1204 | 1204 | ||
diff --git a/arch/powerpc/platforms/ps3/setup.c b/arch/powerpc/platforms/ps3/setup.c index 799c8580ab09..3a487e7f4a5e 100644 --- a/arch/powerpc/platforms/ps3/setup.c +++ b/arch/powerpc/platforms/ps3/setup.c | |||
| @@ -80,7 +80,7 @@ static void ps3_power_save(void) | |||
| 80 | lv1_pause(0); | 80 | lv1_pause(0); |
| 81 | } | 81 | } |
| 82 | 82 | ||
| 83 | static void ps3_restart(char *cmd) | 83 | static void __noreturn ps3_restart(char *cmd) |
| 84 | { | 84 | { |
| 85 | DBG("%s:%d cmd '%s'\n", __func__, __LINE__, cmd); | 85 | DBG("%s:%d cmd '%s'\n", __func__, __LINE__, cmd); |
| 86 | 86 | ||
| @@ -96,7 +96,7 @@ static void ps3_power_off(void) | |||
| 96 | ps3_sys_manager_power_off(); /* never returns */ | 96 | ps3_sys_manager_power_off(); /* never returns */ |
| 97 | } | 97 | } |
| 98 | 98 | ||
| 99 | static void ps3_halt(void) | 99 | static void __noreturn ps3_halt(void) |
| 100 | { | 100 | { |
| 101 | DBG("%s:%d\n", __func__, __LINE__); | 101 | DBG("%s:%d\n", __func__, __LINE__); |
| 102 | 102 | ||
| @@ -226,23 +226,24 @@ static void __init ps3_progress(char *s, unsigned short hex) | |||
| 226 | printk("*** %04x : %s\n", hex, s ? s : ""); | 226 | printk("*** %04x : %s\n", hex, s ? s : ""); |
| 227 | } | 227 | } |
| 228 | 228 | ||
| 229 | static int __init ps3_probe(void) | 229 | void __init ps3_early_mm_init(void) |
| 230 | { | 230 | { |
| 231 | unsigned long htab_size; | 231 | unsigned long htab_size; |
| 232 | unsigned long dt_root; | ||
| 233 | 232 | ||
| 233 | ps3_mm_init(); | ||
| 234 | ps3_mm_vas_create(&htab_size); | ||
| 235 | ps3_hpte_init(htab_size); | ||
| 236 | } | ||
| 237 | |||
| 238 | static int __init ps3_probe(void) | ||
| 239 | { | ||
| 234 | DBG(" -> %s:%d\n", __func__, __LINE__); | 240 | DBG(" -> %s:%d\n", __func__, __LINE__); |
| 235 | 241 | ||
| 236 | dt_root = of_get_flat_dt_root(); | 242 | if (!of_machine_is_compatible("sony,ps3")) |
| 237 | if (!of_flat_dt_is_compatible(dt_root, "sony,ps3")) | ||
| 238 | return 0; | 243 | return 0; |
| 239 | 244 | ||
| 240 | powerpc_firmware_features |= FW_FEATURE_PS3_POSSIBLE; | ||
| 241 | |||
| 242 | ps3_os_area_save_params(); | 245 | ps3_os_area_save_params(); |
| 243 | ps3_mm_init(); | 246 | |
| 244 | ps3_mm_vas_create(&htab_size); | ||
| 245 | ps3_hpte_init(htab_size); | ||
| 246 | pm_power_off = ps3_power_off; | 247 | pm_power_off = ps3_power_off; |
| 247 | 248 | ||
| 248 | DBG(" <- %s:%d\n", __func__, __LINE__); | 249 | DBG(" <- %s:%d\n", __func__, __LINE__); |
diff --git a/arch/powerpc/platforms/pseries/cmm.c b/arch/powerpc/platforms/pseries/cmm.c index fc44ad0475f8..66e7227469b8 100644 --- a/arch/powerpc/platforms/pseries/cmm.c +++ b/arch/powerpc/platforms/pseries/cmm.c | |||
| @@ -574,7 +574,7 @@ static int cmm_mem_going_offline(void *arg) | |||
| 574 | cmm_dbg("Failed to allocate memory for list " | 574 | cmm_dbg("Failed to allocate memory for list " |
| 575 | "management. Memory hotplug " | 575 | "management. Memory hotplug " |
| 576 | "failed.\n"); | 576 | "failed.\n"); |
| 577 | return ENOMEM; | 577 | return -ENOMEM; |
| 578 | } | 578 | } |
| 579 | memcpy(npa, pa_curr, PAGE_SIZE); | 579 | memcpy(npa, pa_curr, PAGE_SIZE); |
| 580 | if (pa_curr == cmm_page_list) | 580 | if (pa_curr == cmm_page_list) |
diff --git a/arch/powerpc/platforms/pseries/dlpar.c b/arch/powerpc/platforms/pseries/dlpar.c index 2b93ae8d557a..4748124faa10 100644 --- a/arch/powerpc/platforms/pseries/dlpar.c +++ b/arch/powerpc/platforms/pseries/dlpar.c | |||
| @@ -27,6 +27,15 @@ | |||
| 27 | #include <asm/uaccess.h> | 27 | #include <asm/uaccess.h> |
| 28 | #include <asm/rtas.h> | 28 | #include <asm/rtas.h> |
| 29 | 29 | ||
| 30 | struct workqueue_struct *pseries_hp_wq; | ||
| 31 | |||
| 32 | struct pseries_hp_work { | ||
| 33 | struct work_struct work; | ||
| 34 | struct pseries_hp_errorlog *errlog; | ||
| 35 | struct completion *hp_completion; | ||
| 36 | int *rc; | ||
| 37 | }; | ||
| 38 | |||
| 30 | struct cc_workarea { | 39 | struct cc_workarea { |
| 31 | __be32 drc_index; | 40 | __be32 drc_index; |
| 32 | __be32 zero; | 41 | __be32 zero; |
| @@ -368,10 +377,51 @@ static int handle_dlpar_errorlog(struct pseries_hp_errorlog *hp_elog) | |||
| 368 | return rc; | 377 | return rc; |
| 369 | } | 378 | } |
| 370 | 379 | ||
| 380 | void pseries_hp_work_fn(struct work_struct *work) | ||
| 381 | { | ||
| 382 | struct pseries_hp_work *hp_work = | ||
| 383 | container_of(work, struct pseries_hp_work, work); | ||
| 384 | |||
| 385 | if (hp_work->rc) | ||
| 386 | *(hp_work->rc) = handle_dlpar_errorlog(hp_work->errlog); | ||
| 387 | else | ||
| 388 | handle_dlpar_errorlog(hp_work->errlog); | ||
| 389 | |||
| 390 | if (hp_work->hp_completion) | ||
| 391 | complete(hp_work->hp_completion); | ||
| 392 | |||
| 393 | kfree(hp_work->errlog); | ||
| 394 | kfree((void *)work); | ||
| 395 | } | ||
| 396 | |||
| 397 | void queue_hotplug_event(struct pseries_hp_errorlog *hp_errlog, | ||
| 398 | struct completion *hotplug_done, int *rc) | ||
| 399 | { | ||
| 400 | struct pseries_hp_work *work; | ||
| 401 | struct pseries_hp_errorlog *hp_errlog_copy; | ||
| 402 | |||
| 403 | hp_errlog_copy = kmalloc(sizeof(struct pseries_hp_errorlog), | ||
| 404 | GFP_KERNEL); | ||
| 405 | memcpy(hp_errlog_copy, hp_errlog, sizeof(struct pseries_hp_errorlog)); | ||
| 406 | |||
| 407 | work = kmalloc(sizeof(struct pseries_hp_work), GFP_KERNEL); | ||
| 408 | if (work) { | ||
| 409 | INIT_WORK((struct work_struct *)work, pseries_hp_work_fn); | ||
| 410 | work->errlog = hp_errlog_copy; | ||
| 411 | work->hp_completion = hotplug_done; | ||
| 412 | work->rc = rc; | ||
| 413 | queue_work(pseries_hp_wq, (struct work_struct *)work); | ||
| 414 | } else { | ||
| 415 | *rc = -ENOMEM; | ||
| 416 | complete(hotplug_done); | ||
| 417 | } | ||
| 418 | } | ||
| 419 | |||
| 371 | static ssize_t dlpar_store(struct class *class, struct class_attribute *attr, | 420 | static ssize_t dlpar_store(struct class *class, struct class_attribute *attr, |
| 372 | const char *buf, size_t count) | 421 | const char *buf, size_t count) |
| 373 | { | 422 | { |
| 374 | struct pseries_hp_errorlog *hp_elog; | 423 | struct pseries_hp_errorlog *hp_elog; |
| 424 | struct completion hotplug_done; | ||
| 375 | const char *arg; | 425 | const char *arg; |
| 376 | int rc; | 426 | int rc; |
| 377 | 427 | ||
| @@ -439,7 +489,9 @@ static ssize_t dlpar_store(struct class *class, struct class_attribute *attr, | |||
| 439 | goto dlpar_store_out; | 489 | goto dlpar_store_out; |
| 440 | } | 490 | } |
| 441 | 491 | ||
| 442 | rc = handle_dlpar_errorlog(hp_elog); | 492 | init_completion(&hotplug_done); |
| 493 | queue_hotplug_event(hp_elog, &hotplug_done, &rc); | ||
| 494 | wait_for_completion(&hotplug_done); | ||
| 443 | 495 | ||
| 444 | dlpar_store_out: | 496 | dlpar_store_out: |
| 445 | kfree(hp_elog); | 497 | kfree(hp_elog); |
| @@ -450,6 +502,8 @@ static CLASS_ATTR(dlpar, S_IWUSR, NULL, dlpar_store); | |||
| 450 | 502 | ||
| 451 | static int __init pseries_dlpar_init(void) | 503 | static int __init pseries_dlpar_init(void) |
| 452 | { | 504 | { |
| 505 | pseries_hp_wq = alloc_workqueue("pseries hotplug workqueue", | ||
| 506 | WQ_UNBOUND, 1); | ||
| 453 | return sysfs_create_file(kernel_kobj, &class_attr_dlpar.attr); | 507 | return sysfs_create_file(kernel_kobj, &class_attr_dlpar.attr); |
| 454 | } | 508 | } |
| 455 | machine_device_initcall(pseries, pseries_dlpar_init); | 509 | machine_device_initcall(pseries, pseries_dlpar_init); |
diff --git a/arch/powerpc/platforms/pseries/eeh_pseries.c b/arch/powerpc/platforms/pseries/eeh_pseries.c index 3998e0f9a03b..1c428f06b14c 100644 --- a/arch/powerpc/platforms/pseries/eeh_pseries.c +++ b/arch/powerpc/platforms/pseries/eeh_pseries.c | |||
| @@ -2,7 +2,7 @@ | |||
| 2 | * The file intends to implement the platform dependent EEH operations on pseries. | 2 | * The file intends to implement the platform dependent EEH operations on pseries. |
| 3 | * Actually, the pseries platform is built based on RTAS heavily. That means the | 3 | * Actually, the pseries platform is built based on RTAS heavily. That means the |
| 4 | * pseries platform dependent EEH operations will be built on RTAS calls. The functions | 4 | * pseries platform dependent EEH operations will be built on RTAS calls. The functions |
| 5 | * are devired from arch/powerpc/platforms/pseries/eeh.c and necessary cleanup has | 5 | * are derived from arch/powerpc/platforms/pseries/eeh.c and necessary cleanup has |
| 6 | * been done. | 6 | * been done. |
| 7 | * | 7 | * |
| 8 | * Copyright Benjamin Herrenschmidt & Gavin Shan, IBM Corporation 2011. | 8 | * Copyright Benjamin Herrenschmidt & Gavin Shan, IBM Corporation 2011. |
diff --git a/arch/powerpc/platforms/pseries/event_sources.c b/arch/powerpc/platforms/pseries/event_sources.c index 18380e8f6dfe..a6ddca833119 100644 --- a/arch/powerpc/platforms/pseries/event_sources.c +++ b/arch/powerpc/platforms/pseries/event_sources.c | |||
| @@ -26,48 +26,21 @@ void request_event_sources_irqs(struct device_node *np, | |||
| 26 | { | 26 | { |
| 27 | int i, index, count = 0; | 27 | int i, index, count = 0; |
| 28 | struct of_phandle_args oirq; | 28 | struct of_phandle_args oirq; |
| 29 | const u32 *opicprop; | ||
| 30 | unsigned int opicplen; | ||
| 31 | unsigned int virqs[16]; | 29 | unsigned int virqs[16]; |
| 32 | 30 | ||
| 33 | /* Check for obsolete "open-pic-interrupt" property. If present, then | 31 | /* First try to do a proper OF tree parsing */ |
| 34 | * map those interrupts using the default interrupt host and default | 32 | for (index = 0; of_irq_parse_one(np, index, &oirq) == 0; |
| 35 | * trigger | 33 | index++) { |
| 36 | */ | 34 | if (count > 15) |
| 37 | opicprop = of_get_property(np, "open-pic-interrupt", &opicplen); | 35 | break; |
| 38 | if (opicprop) { | 36 | virqs[count] = irq_create_of_mapping(&oirq); |
| 39 | opicplen /= sizeof(u32); | 37 | if (virqs[count] == NO_IRQ) { |
| 40 | for (i = 0; i < opicplen; i++) { | 38 | pr_err("event-sources: Unable to allocate " |
| 41 | if (count > 15) | 39 | "interrupt number for %s\n", |
| 42 | break; | 40 | np->full_name); |
| 43 | virqs[count] = irq_create_mapping(NULL, *(opicprop++)); | 41 | WARN_ON(1); |
| 44 | if (virqs[count] == NO_IRQ) { | 42 | } else { |
| 45 | pr_err("event-sources: Unable to allocate " | 43 | count++; |
| 46 | "interrupt number for %s\n", | ||
| 47 | np->full_name); | ||
| 48 | WARN_ON(1); | ||
| 49 | } | ||
| 50 | else | ||
| 51 | count++; | ||
| 52 | |||
| 53 | } | ||
| 54 | } | ||
| 55 | /* Else use normal interrupt tree parsing */ | ||
| 56 | else { | ||
| 57 | /* First try to do a proper OF tree parsing */ | ||
| 58 | for (index = 0; of_irq_parse_one(np, index, &oirq) == 0; | ||
| 59 | index++) { | ||
| 60 | if (count > 15) | ||
| 61 | break; | ||
| 62 | virqs[count] = irq_create_of_mapping(&oirq); | ||
| 63 | if (virqs[count] == NO_IRQ) { | ||
| 64 | pr_err("event-sources: Unable to allocate " | ||
| 65 | "interrupt number for %s\n", | ||
| 66 | np->full_name); | ||
| 67 | WARN_ON(1); | ||
| 68 | } | ||
| 69 | else | ||
| 70 | count++; | ||
| 71 | } | 44 | } |
| 72 | } | 45 | } |
| 73 | 46 | ||
diff --git a/arch/powerpc/platforms/pseries/firmware.c b/arch/powerpc/platforms/pseries/firmware.c index 8c80588abacc..ea7f09bd73b1 100644 --- a/arch/powerpc/platforms/pseries/firmware.c +++ b/arch/powerpc/platforms/pseries/firmware.c | |||
| @@ -22,6 +22,7 @@ | |||
| 22 | */ | 22 | */ |
| 23 | 23 | ||
| 24 | 24 | ||
| 25 | #include <linux/of_fdt.h> | ||
| 25 | #include <asm/firmware.h> | 26 | #include <asm/firmware.h> |
| 26 | #include <asm/prom.h> | 27 | #include <asm/prom.h> |
| 27 | #include <asm/udbg.h> | 28 | #include <asm/udbg.h> |
| @@ -69,7 +70,8 @@ hypertas_fw_features_table[] = { | |||
| 69 | * device-tree/ibm,hypertas-functions. Ultimately this functionality may | 70 | * device-tree/ibm,hypertas-functions. Ultimately this functionality may |
| 70 | * be moved into prom.c prom_init(). | 71 | * be moved into prom.c prom_init(). |
| 71 | */ | 72 | */ |
| 72 | void __init fw_hypertas_feature_init(const char *hypertas, unsigned long len) | 73 | static void __init fw_hypertas_feature_init(const char *hypertas, |
| 74 | unsigned long len) | ||
| 73 | { | 75 | { |
| 74 | const char *s; | 76 | const char *s; |
| 75 | int i; | 77 | int i; |
| @@ -113,7 +115,7 @@ vec5_fw_features_table[] = { | |||
| 113 | {FW_FEATURE_PRRN, OV5_PRRN}, | 115 | {FW_FEATURE_PRRN, OV5_PRRN}, |
| 114 | }; | 116 | }; |
| 115 | 117 | ||
| 116 | void __init fw_vec5_feature_init(const char *vec5, unsigned long len) | 118 | static void __init fw_vec5_feature_init(const char *vec5, unsigned long len) |
| 117 | { | 119 | { |
| 118 | unsigned int index, feat; | 120 | unsigned int index, feat; |
| 119 | int i; | 121 | int i; |
| @@ -131,3 +133,45 @@ void __init fw_vec5_feature_init(const char *vec5, unsigned long len) | |||
| 131 | 133 | ||
| 132 | pr_debug(" <- fw_vec5_feature_init()\n"); | 134 | pr_debug(" <- fw_vec5_feature_init()\n"); |
| 133 | } | 135 | } |
| 136 | |||
| 137 | /* | ||
| 138 | * Called very early, MMU is off, device-tree isn't unflattened | ||
| 139 | */ | ||
| 140 | static int __init probe_fw_features(unsigned long node, const char *uname, int | ||
| 141 | depth, void *data) | ||
| 142 | { | ||
| 143 | const char *prop; | ||
| 144 | int len; | ||
| 145 | static int hypertas_found; | ||
| 146 | static int vec5_found; | ||
| 147 | |||
| 148 | if (depth != 1) | ||
| 149 | return 0; | ||
| 150 | |||
| 151 | if (!strcmp(uname, "rtas") || !strcmp(uname, "rtas@0")) { | ||
| 152 | prop = of_get_flat_dt_prop(node, "ibm,hypertas-functions", | ||
| 153 | &len); | ||
| 154 | if (prop) { | ||
| 155 | powerpc_firmware_features |= FW_FEATURE_LPAR; | ||
| 156 | fw_hypertas_feature_init(prop, len); | ||
| 157 | } | ||
| 158 | |||
| 159 | hypertas_found = 1; | ||
| 160 | } | ||
| 161 | |||
| 162 | if (!strcmp(uname, "chosen")) { | ||
| 163 | prop = of_get_flat_dt_prop(node, "ibm,architecture-vec-5", | ||
| 164 | &len); | ||
| 165 | if (prop) | ||
| 166 | fw_vec5_feature_init(prop, len); | ||
| 167 | |||
| 168 | vec5_found = 1; | ||
| 169 | } | ||
| 170 | |||
| 171 | return hypertas_found && vec5_found; | ||
| 172 | } | ||
| 173 | |||
| 174 | void __init pseries_probe_fw_features(void) | ||
| 175 | { | ||
| 176 | of_scan_flat_dt(probe_fw_features, NULL); | ||
| 177 | } | ||
diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c index 282837a1d74b..a1b63e00b2f7 100644 --- a/arch/powerpc/platforms/pseries/hotplug-cpu.c +++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c | |||
| @@ -903,8 +903,6 @@ static int parse_cede_parameters(void) | |||
| 903 | 903 | ||
| 904 | static int __init pseries_cpu_hotplug_init(void) | 904 | static int __init pseries_cpu_hotplug_init(void) |
| 905 | { | 905 | { |
| 906 | struct device_node *np; | ||
| 907 | const char *typep; | ||
| 908 | int cpu; | 906 | int cpu; |
| 909 | int qcss_tok; | 907 | int qcss_tok; |
| 910 | 908 | ||
| @@ -913,17 +911,6 @@ static int __init pseries_cpu_hotplug_init(void) | |||
| 913 | ppc_md.cpu_release = dlpar_cpu_release; | 911 | ppc_md.cpu_release = dlpar_cpu_release; |
| 914 | #endif /* CONFIG_ARCH_CPU_PROBE_RELEASE */ | 912 | #endif /* CONFIG_ARCH_CPU_PROBE_RELEASE */ |
| 915 | 913 | ||
| 916 | for_each_node_by_name(np, "interrupt-controller") { | ||
| 917 | typep = of_get_property(np, "compatible", NULL); | ||
| 918 | if (strstr(typep, "open-pic")) { | ||
| 919 | of_node_put(np); | ||
| 920 | |||
| 921 | printk(KERN_INFO "CPU Hotplug not supported on " | ||
| 922 | "systems using MPIC\n"); | ||
| 923 | return 0; | ||
| 924 | } | ||
| 925 | } | ||
| 926 | |||
| 927 | rtas_stop_self_token = rtas_token("stop-self"); | 914 | rtas_stop_self_token = rtas_token("stop-self"); |
| 928 | qcss_tok = rtas_token("query-cpu-stopped-state"); | 915 | qcss_tok = rtas_token("query-cpu-stopped-state"); |
| 929 | 916 | ||
diff --git a/arch/powerpc/platforms/pseries/hotplug-memory.c b/arch/powerpc/platforms/pseries/hotplug-memory.c index 2ce138542083..43f7beb2902d 100644 --- a/arch/powerpc/platforms/pseries/hotplug-memory.c +++ b/arch/powerpc/platforms/pseries/hotplug-memory.c | |||
| @@ -69,13 +69,36 @@ unsigned long pseries_memory_block_size(void) | |||
| 69 | return memblock_size; | 69 | return memblock_size; |
| 70 | } | 70 | } |
| 71 | 71 | ||
| 72 | static void dlpar_free_drconf_property(struct property *prop) | 72 | static void dlpar_free_property(struct property *prop) |
| 73 | { | 73 | { |
| 74 | kfree(prop->name); | 74 | kfree(prop->name); |
| 75 | kfree(prop->value); | 75 | kfree(prop->value); |
| 76 | kfree(prop); | 76 | kfree(prop); |
| 77 | } | 77 | } |
| 78 | 78 | ||
| 79 | static struct property *dlpar_clone_property(struct property *prop, | ||
| 80 | u32 prop_size) | ||
| 81 | { | ||
| 82 | struct property *new_prop; | ||
| 83 | |||
| 84 | new_prop = kzalloc(sizeof(*new_prop), GFP_KERNEL); | ||
| 85 | if (!new_prop) | ||
| 86 | return NULL; | ||
| 87 | |||
| 88 | new_prop->name = kstrdup(prop->name, GFP_KERNEL); | ||
| 89 | new_prop->value = kzalloc(prop_size, GFP_KERNEL); | ||
| 90 | if (!new_prop->name || !new_prop->value) { | ||
| 91 | dlpar_free_property(new_prop); | ||
| 92 | return NULL; | ||
| 93 | } | ||
| 94 | |||
| 95 | memcpy(new_prop->value, prop->value, prop->length); | ||
| 96 | new_prop->length = prop_size; | ||
| 97 | |||
| 98 | of_property_set_flag(new_prop, OF_DYNAMIC); | ||
| 99 | return new_prop; | ||
| 100 | } | ||
| 101 | |||
| 79 | static struct property *dlpar_clone_drconf_property(struct device_node *dn) | 102 | static struct property *dlpar_clone_drconf_property(struct device_node *dn) |
| 80 | { | 103 | { |
| 81 | struct property *prop, *new_prop; | 104 | struct property *prop, *new_prop; |
| @@ -87,19 +110,10 @@ static struct property *dlpar_clone_drconf_property(struct device_node *dn) | |||
| 87 | if (!prop) | 110 | if (!prop) |
| 88 | return NULL; | 111 | return NULL; |
| 89 | 112 | ||
| 90 | new_prop = kzalloc(sizeof(*new_prop), GFP_KERNEL); | 113 | new_prop = dlpar_clone_property(prop, prop->length); |
| 91 | if (!new_prop) | 114 | if (!new_prop) |
| 92 | return NULL; | 115 | return NULL; |
| 93 | 116 | ||
| 94 | new_prop->name = kstrdup(prop->name, GFP_KERNEL); | ||
| 95 | new_prop->value = kmemdup(prop->value, prop->length, GFP_KERNEL); | ||
| 96 | if (!new_prop->name || !new_prop->value) { | ||
| 97 | dlpar_free_drconf_property(new_prop); | ||
| 98 | return NULL; | ||
| 99 | } | ||
| 100 | |||
| 101 | new_prop->length = prop->length; | ||
| 102 | |||
| 103 | /* Convert the property to cpu endian-ness */ | 117 | /* Convert the property to cpu endian-ness */ |
| 104 | p = new_prop->value; | 118 | p = new_prop->value; |
| 105 | *p = be32_to_cpu(*p); | 119 | *p = be32_to_cpu(*p); |
| @@ -177,14 +191,74 @@ static int dlpar_update_device_tree_lmb(struct of_drconf_cell *lmb) | |||
| 177 | return 0; | 191 | return 0; |
| 178 | } | 192 | } |
| 179 | 193 | ||
| 194 | static u32 find_aa_index(struct device_node *dr_node, | ||
| 195 | struct property *ala_prop, const u32 *lmb_assoc) | ||
| 196 | { | ||
| 197 | u32 *assoc_arrays; | ||
| 198 | u32 aa_index; | ||
| 199 | int aa_arrays, aa_array_entries, aa_array_sz; | ||
| 200 | int i, index; | ||
| 201 | |||
| 202 | /* | ||
| 203 | * The ibm,associativity-lookup-arrays property is defined to be | ||
| 204 | * a 32-bit value specifying the number of associativity arrays | ||
| 205 | * followed by a 32-bitvalue specifying the number of entries per | ||
| 206 | * array, followed by the associativity arrays. | ||
| 207 | */ | ||
| 208 | assoc_arrays = ala_prop->value; | ||
| 209 | |||
| 210 | aa_arrays = be32_to_cpu(assoc_arrays[0]); | ||
| 211 | aa_array_entries = be32_to_cpu(assoc_arrays[1]); | ||
| 212 | aa_array_sz = aa_array_entries * sizeof(u32); | ||
| 213 | |||
| 214 | aa_index = -1; | ||
| 215 | for (i = 0; i < aa_arrays; i++) { | ||
| 216 | index = (i * aa_array_entries) + 2; | ||
| 217 | |||
| 218 | if (memcmp(&assoc_arrays[index], &lmb_assoc[1], aa_array_sz)) | ||
| 219 | continue; | ||
| 220 | |||
| 221 | aa_index = i; | ||
| 222 | break; | ||
| 223 | } | ||
| 224 | |||
| 225 | if (aa_index == -1) { | ||
| 226 | struct property *new_prop; | ||
| 227 | u32 new_prop_size; | ||
| 228 | |||
| 229 | new_prop_size = ala_prop->length + aa_array_sz; | ||
| 230 | new_prop = dlpar_clone_property(ala_prop, new_prop_size); | ||
| 231 | if (!new_prop) | ||
| 232 | return -1; | ||
| 233 | |||
| 234 | assoc_arrays = new_prop->value; | ||
| 235 | |||
| 236 | /* increment the number of entries in the lookup array */ | ||
| 237 | assoc_arrays[0] = cpu_to_be32(aa_arrays + 1); | ||
| 238 | |||
| 239 | /* copy the new associativity into the lookup array */ | ||
| 240 | index = aa_arrays * aa_array_entries + 2; | ||
| 241 | memcpy(&assoc_arrays[index], &lmb_assoc[1], aa_array_sz); | ||
| 242 | |||
| 243 | of_update_property(dr_node, new_prop); | ||
| 244 | |||
| 245 | /* | ||
| 246 | * The associativity lookup array index for this lmb is | ||
| 247 | * number of entries - 1 since we added its associativity | ||
| 248 | * to the end of the lookup array. | ||
| 249 | */ | ||
| 250 | aa_index = be32_to_cpu(assoc_arrays[0]) - 1; | ||
| 251 | } | ||
| 252 | |||
| 253 | return aa_index; | ||
| 254 | } | ||
| 255 | |||
| 180 | static u32 lookup_lmb_associativity_index(struct of_drconf_cell *lmb) | 256 | static u32 lookup_lmb_associativity_index(struct of_drconf_cell *lmb) |
| 181 | { | 257 | { |
| 182 | struct device_node *parent, *lmb_node, *dr_node; | 258 | struct device_node *parent, *lmb_node, *dr_node; |
| 259 | struct property *ala_prop; | ||
| 183 | const u32 *lmb_assoc; | 260 | const u32 *lmb_assoc; |
| 184 | const u32 *assoc_arrays; | ||
| 185 | u32 aa_index; | 261 | u32 aa_index; |
| 186 | int aa_arrays, aa_array_entries, aa_array_sz; | ||
| 187 | int i; | ||
| 188 | 262 | ||
| 189 | parent = of_find_node_by_path("/"); | 263 | parent = of_find_node_by_path("/"); |
| 190 | if (!parent) | 264 | if (!parent) |
| @@ -208,34 +282,15 @@ static u32 lookup_lmb_associativity_index(struct of_drconf_cell *lmb) | |||
| 208 | return -ENODEV; | 282 | return -ENODEV; |
| 209 | } | 283 | } |
| 210 | 284 | ||
| 211 | assoc_arrays = of_get_property(dr_node, | 285 | ala_prop = of_find_property(dr_node, "ibm,associativity-lookup-arrays", |
| 212 | "ibm,associativity-lookup-arrays", | 286 | NULL); |
| 213 | NULL); | 287 | if (!ala_prop) { |
| 214 | of_node_put(dr_node); | 288 | of_node_put(dr_node); |
| 215 | if (!assoc_arrays) { | ||
| 216 | dlpar_free_cc_nodes(lmb_node); | 289 | dlpar_free_cc_nodes(lmb_node); |
| 217 | return -ENODEV; | 290 | return -ENODEV; |
| 218 | } | 291 | } |
| 219 | 292 | ||
| 220 | /* The ibm,associativity-lookup-arrays property is defined to be | 293 | aa_index = find_aa_index(dr_node, ala_prop, lmb_assoc); |
| 221 | * a 32-bit value specifying the number of associativity arrays | ||
| 222 | * followed by a 32-bitvalue specifying the number of entries per | ||
| 223 | * array, followed by the associativity arrays. | ||
| 224 | */ | ||
| 225 | aa_arrays = be32_to_cpu(assoc_arrays[0]); | ||
| 226 | aa_array_entries = be32_to_cpu(assoc_arrays[1]); | ||
| 227 | aa_array_sz = aa_array_entries * sizeof(u32); | ||
| 228 | |||
| 229 | aa_index = -1; | ||
| 230 | for (i = 0; i < aa_arrays; i++) { | ||
| 231 | int indx = (i * aa_array_entries) + 2; | ||
| 232 | |||
| 233 | if (memcmp(&assoc_arrays[indx], &lmb_assoc[1], aa_array_sz)) | ||
| 234 | continue; | ||
| 235 | |||
| 236 | aa_index = i; | ||
| 237 | break; | ||
| 238 | } | ||
| 239 | 294 | ||
| 240 | dlpar_free_cc_nodes(lmb_node); | 295 | dlpar_free_cc_nodes(lmb_node); |
| 241 | return aa_index; | 296 | return aa_index; |
| @@ -533,50 +588,11 @@ static int dlpar_memory_remove_by_index(u32 drc_index, struct property *prop) | |||
| 533 | 588 | ||
| 534 | #endif /* CONFIG_MEMORY_HOTREMOVE */ | 589 | #endif /* CONFIG_MEMORY_HOTREMOVE */ |
| 535 | 590 | ||
| 536 | static int dlpar_add_lmb_memory(struct of_drconf_cell *lmb) | 591 | static int dlpar_add_lmb(struct of_drconf_cell *lmb) |
| 537 | { | 592 | { |
| 538 | struct memory_block *mem_block; | ||
| 539 | unsigned long block_sz; | 593 | unsigned long block_sz; |
| 540 | int nid, rc; | 594 | int nid, rc; |
| 541 | 595 | ||
| 542 | block_sz = memory_block_size_bytes(); | ||
| 543 | |||
| 544 | /* Find the node id for this address */ | ||
| 545 | nid = memory_add_physaddr_to_nid(lmb->base_addr); | ||
| 546 | |||
| 547 | /* Add the memory */ | ||
| 548 | rc = add_memory(nid, lmb->base_addr, block_sz); | ||
| 549 | if (rc) | ||
| 550 | return rc; | ||
| 551 | |||
| 552 | /* Register this block of memory */ | ||
| 553 | rc = memblock_add(lmb->base_addr, block_sz); | ||
| 554 | if (rc) { | ||
| 555 | remove_memory(nid, lmb->base_addr, block_sz); | ||
| 556 | return rc; | ||
| 557 | } | ||
| 558 | |||
| 559 | mem_block = lmb_to_memblock(lmb); | ||
| 560 | if (!mem_block) { | ||
| 561 | remove_memory(nid, lmb->base_addr, block_sz); | ||
| 562 | return -EINVAL; | ||
| 563 | } | ||
| 564 | |||
| 565 | rc = device_online(&mem_block->dev); | ||
| 566 | put_device(&mem_block->dev); | ||
| 567 | if (rc) { | ||
| 568 | remove_memory(nid, lmb->base_addr, block_sz); | ||
| 569 | return rc; | ||
| 570 | } | ||
| 571 | |||
| 572 | lmb->flags |= DRCONF_MEM_ASSIGNED; | ||
| 573 | return 0; | ||
| 574 | } | ||
| 575 | |||
| 576 | static int dlpar_add_lmb(struct of_drconf_cell *lmb) | ||
| 577 | { | ||
| 578 | int rc; | ||
| 579 | |||
| 580 | if (lmb->flags & DRCONF_MEM_ASSIGNED) | 596 | if (lmb->flags & DRCONF_MEM_ASSIGNED) |
| 581 | return -EINVAL; | 597 | return -EINVAL; |
| 582 | 598 | ||
| @@ -592,10 +608,18 @@ static int dlpar_add_lmb(struct of_drconf_cell *lmb) | |||
| 592 | return rc; | 608 | return rc; |
| 593 | } | 609 | } |
| 594 | 610 | ||
| 595 | rc = dlpar_add_lmb_memory(lmb); | 611 | block_sz = memory_block_size_bytes(); |
| 612 | |||
| 613 | /* Find the node id for this address */ | ||
| 614 | nid = memory_add_physaddr_to_nid(lmb->base_addr); | ||
| 615 | |||
| 616 | /* Add the memory */ | ||
| 617 | rc = add_memory(nid, lmb->base_addr, block_sz); | ||
| 596 | if (rc) { | 618 | if (rc) { |
| 597 | dlpar_remove_device_tree_lmb(lmb); | 619 | dlpar_remove_device_tree_lmb(lmb); |
| 598 | dlpar_release_drc(lmb->drc_index); | 620 | dlpar_release_drc(lmb->drc_index); |
| 621 | } else { | ||
| 622 | lmb->flags |= DRCONF_MEM_ASSIGNED; | ||
| 599 | } | 623 | } |
| 600 | 624 | ||
| 601 | return rc; | 625 | return rc; |
| @@ -748,7 +772,7 @@ int dlpar_memory(struct pseries_hp_errorlog *hp_elog) | |||
| 748 | break; | 772 | break; |
| 749 | } | 773 | } |
| 750 | 774 | ||
| 751 | dlpar_free_drconf_property(prop); | 775 | dlpar_free_property(prop); |
| 752 | 776 | ||
| 753 | dlpar_memory_out: | 777 | dlpar_memory_out: |
| 754 | of_node_put(dn); | 778 | of_node_put(dn); |
diff --git a/arch/powerpc/platforms/pseries/io_event_irq.c b/arch/powerpc/platforms/pseries/io_event_irq.c index 0240c4ff878a..f053bda64ee7 100644 --- a/arch/powerpc/platforms/pseries/io_event_irq.c +++ b/arch/powerpc/platforms/pseries/io_event_irq.c | |||
| @@ -113,7 +113,7 @@ static struct pseries_io_event * ioei_find_event(struct rtas_error_log *elog) | |||
| 113 | * - The owner of an event is determined by combinations of scope, | 113 | * - The owner of an event is determined by combinations of scope, |
| 114 | * event type, and sub-type. There is no easy way to pre-sort clients | 114 | * event type, and sub-type. There is no easy way to pre-sort clients |
| 115 | * by scope or event type alone. For example, Torrent ISR route change | 115 | * by scope or event type alone. For example, Torrent ISR route change |
| 116 | * event is reported with scope 0x00 (Not Applicatable) rather than | 116 | * event is reported with scope 0x00 (Not Applicable) rather than |
| 117 | * 0x3B (Torrent-hub). It is better to let the clients to identify | 117 | * 0x3B (Torrent-hub). It is better to let the clients to identify |
| 118 | * who owns the event. | 118 | * who owns the event. |
| 119 | */ | 119 | */ |
diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c index 3e8865b187de..770a753b52c9 100644 --- a/arch/powerpc/platforms/pseries/iommu.c +++ b/arch/powerpc/platforms/pseries/iommu.c | |||
| @@ -120,35 +120,6 @@ static void iommu_pseries_free_group(struct iommu_table_group *table_group, | |||
| 120 | kfree(table_group); | 120 | kfree(table_group); |
| 121 | } | 121 | } |
| 122 | 122 | ||
| 123 | static void tce_invalidate_pSeries_sw(struct iommu_table *tbl, | ||
| 124 | __be64 *startp, __be64 *endp) | ||
| 125 | { | ||
| 126 | u64 __iomem *invalidate = (u64 __iomem *)tbl->it_index; | ||
| 127 | unsigned long start, end, inc; | ||
| 128 | |||
| 129 | start = __pa(startp); | ||
| 130 | end = __pa(endp); | ||
| 131 | inc = L1_CACHE_BYTES; /* invalidate a cacheline of TCEs at a time */ | ||
| 132 | |||
| 133 | /* If this is non-zero, change the format. We shift the | ||
| 134 | * address and or in the magic from the device tree. */ | ||
| 135 | if (tbl->it_busno) { | ||
| 136 | start <<= 12; | ||
| 137 | end <<= 12; | ||
| 138 | inc <<= 12; | ||
| 139 | start |= tbl->it_busno; | ||
| 140 | end |= tbl->it_busno; | ||
| 141 | } | ||
| 142 | |||
| 143 | end |= inc - 1; /* round up end to be different than start */ | ||
| 144 | |||
| 145 | mb(); /* Make sure TCEs in memory are written */ | ||
| 146 | while (start <= end) { | ||
| 147 | out_be64(invalidate, start); | ||
| 148 | start += inc; | ||
| 149 | } | ||
| 150 | } | ||
| 151 | |||
| 152 | static int tce_build_pSeries(struct iommu_table *tbl, long index, | 123 | static int tce_build_pSeries(struct iommu_table *tbl, long index, |
| 153 | long npages, unsigned long uaddr, | 124 | long npages, unsigned long uaddr, |
| 154 | enum dma_data_direction direction, | 125 | enum dma_data_direction direction, |
| @@ -173,9 +144,6 @@ static int tce_build_pSeries(struct iommu_table *tbl, long index, | |||
| 173 | uaddr += TCE_PAGE_SIZE; | 144 | uaddr += TCE_PAGE_SIZE; |
| 174 | tcep++; | 145 | tcep++; |
| 175 | } | 146 | } |
| 176 | |||
| 177 | if (tbl->it_type & TCE_PCI_SWINV_CREATE) | ||
| 178 | tce_invalidate_pSeries_sw(tbl, tces, tcep - 1); | ||
| 179 | return 0; | 147 | return 0; |
| 180 | } | 148 | } |
| 181 | 149 | ||
| @@ -188,9 +156,6 @@ static void tce_free_pSeries(struct iommu_table *tbl, long index, long npages) | |||
| 188 | 156 | ||
| 189 | while (npages--) | 157 | while (npages--) |
| 190 | *(tcep++) = 0; | 158 | *(tcep++) = 0; |
| 191 | |||
| 192 | if (tbl->it_type & TCE_PCI_SWINV_FREE) | ||
| 193 | tce_invalidate_pSeries_sw(tbl, tces, tcep - 1); | ||
| 194 | } | 159 | } |
| 195 | 160 | ||
| 196 | static unsigned long tce_get_pseries(struct iommu_table *tbl, long index) | 161 | static unsigned long tce_get_pseries(struct iommu_table *tbl, long index) |
| @@ -537,7 +502,7 @@ static void iommu_table_setparms(struct pci_controller *phb, | |||
| 537 | struct iommu_table *tbl) | 502 | struct iommu_table *tbl) |
| 538 | { | 503 | { |
| 539 | struct device_node *node; | 504 | struct device_node *node; |
| 540 | const unsigned long *basep, *sw_inval; | 505 | const unsigned long *basep; |
| 541 | const u32 *sizep; | 506 | const u32 *sizep; |
| 542 | 507 | ||
| 543 | node = phb->dn; | 508 | node = phb->dn; |
| @@ -575,22 +540,6 @@ static void iommu_table_setparms(struct pci_controller *phb, | |||
| 575 | tbl->it_index = 0; | 540 | tbl->it_index = 0; |
| 576 | tbl->it_blocksize = 16; | 541 | tbl->it_blocksize = 16; |
| 577 | tbl->it_type = TCE_PCI; | 542 | tbl->it_type = TCE_PCI; |
| 578 | |||
| 579 | sw_inval = of_get_property(node, "linux,tce-sw-invalidate-info", NULL); | ||
| 580 | if (sw_inval) { | ||
| 581 | /* | ||
| 582 | * This property contains information on how to | ||
| 583 | * invalidate the TCE entry. The first property is | ||
| 584 | * the base MMIO address used to invalidate entries. | ||
| 585 | * The second property tells us the format of the TCE | ||
| 586 | * invalidate (whether it needs to be shifted) and | ||
| 587 | * some magic routing info to add to our invalidate | ||
| 588 | * command. | ||
| 589 | */ | ||
| 590 | tbl->it_index = (unsigned long) ioremap(sw_inval[0], 8); | ||
| 591 | tbl->it_busno = sw_inval[1]; /* overload this with magic */ | ||
| 592 | tbl->it_type = TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE; | ||
| 593 | } | ||
| 594 | } | 543 | } |
| 595 | 544 | ||
| 596 | /* | 545 | /* |
diff --git a/arch/powerpc/platforms/pseries/kexec.c b/arch/powerpc/platforms/pseries/kexec.c index 13fa95b3aa8b..6681ac97fb18 100644 --- a/arch/powerpc/platforms/pseries/kexec.c +++ b/arch/powerpc/platforms/pseries/kexec.c | |||
| @@ -14,14 +14,13 @@ | |||
| 14 | #include <asm/page.h> | 14 | #include <asm/page.h> |
| 15 | #include <asm/firmware.h> | 15 | #include <asm/firmware.h> |
| 16 | #include <asm/kexec.h> | 16 | #include <asm/kexec.h> |
| 17 | #include <asm/mpic.h> | ||
| 18 | #include <asm/xics.h> | 17 | #include <asm/xics.h> |
| 19 | #include <asm/smp.h> | 18 | #include <asm/smp.h> |
| 20 | #include <asm/plpar_wrappers.h> | 19 | #include <asm/plpar_wrappers.h> |
| 21 | 20 | ||
| 22 | #include "pseries.h" | 21 | #include "pseries.h" |
| 23 | 22 | ||
| 24 | static void pseries_kexec_cpu_down(int crash_shutdown, int secondary) | 23 | void pseries_kexec_cpu_down(int crash_shutdown, int secondary) |
| 25 | { | 24 | { |
| 26 | /* Don't risk a hypervisor call if we're crashing */ | 25 | /* Don't risk a hypervisor call if we're crashing */ |
| 27 | if (firmware_has_feature(FW_FEATURE_SPLPAR) && !crash_shutdown) { | 26 | if (firmware_has_feature(FW_FEATURE_SPLPAR) && !crash_shutdown) { |
| @@ -51,26 +50,6 @@ static void pseries_kexec_cpu_down(int crash_shutdown, int secondary) | |||
| 51 | "(hw %d) failed with %d\n", cpu, hwcpu, ret); | 50 | "(hw %d) failed with %d\n", cpu, hwcpu, ret); |
| 52 | } | 51 | } |
| 53 | } | 52 | } |
| 54 | } | ||
| 55 | |||
| 56 | static void pseries_kexec_cpu_down_mpic(int crash_shutdown, int secondary) | ||
| 57 | { | ||
| 58 | pseries_kexec_cpu_down(crash_shutdown, secondary); | ||
| 59 | mpic_teardown_this_cpu(secondary); | ||
| 60 | } | ||
| 61 | 53 | ||
| 62 | void __init setup_kexec_cpu_down_mpic(void) | ||
| 63 | { | ||
| 64 | ppc_md.kexec_cpu_down = pseries_kexec_cpu_down_mpic; | ||
| 65 | } | ||
| 66 | |||
| 67 | static void pseries_kexec_cpu_down_xics(int crash_shutdown, int secondary) | ||
| 68 | { | ||
| 69 | pseries_kexec_cpu_down(crash_shutdown, secondary); | ||
| 70 | xics_kexec_teardown_cpu(secondary); | 54 | xics_kexec_teardown_cpu(secondary); |
| 71 | } | 55 | } |
| 72 | |||
| 73 | void __init setup_kexec_cpu_down_xics(void) | ||
| 74 | { | ||
| 75 | ppc_md.kexec_cpu_down = pseries_kexec_cpu_down_xics; | ||
| 76 | } | ||
diff --git a/arch/powerpc/platforms/pseries/lpar.c b/arch/powerpc/platforms/pseries/lpar.c index 7f6100d91b4b..86707e67843f 100644 --- a/arch/powerpc/platforms/pseries/lpar.c +++ b/arch/powerpc/platforms/pseries/lpar.c | |||
| @@ -45,6 +45,7 @@ | |||
| 45 | #include <asm/plpar_wrappers.h> | 45 | #include <asm/plpar_wrappers.h> |
| 46 | #include <asm/kexec.h> | 46 | #include <asm/kexec.h> |
| 47 | #include <asm/fadump.h> | 47 | #include <asm/fadump.h> |
| 48 | #include <asm/asm-prototypes.h> | ||
| 48 | 49 | ||
| 49 | #include "pseries.h" | 50 | #include "pseries.h" |
| 50 | 51 | ||
| @@ -260,24 +261,8 @@ static void pSeries_lpar_hptab_clear(void) | |||
| 260 | * This is also called on boot when a fadump happens. In that case we | 261 | * This is also called on boot when a fadump happens. In that case we |
| 261 | * must not change the exception endian mode. | 262 | * must not change the exception endian mode. |
| 262 | */ | 263 | */ |
| 263 | if (firmware_has_feature(FW_FEATURE_SET_MODE) && !is_fadump_active()) { | 264 | if (firmware_has_feature(FW_FEATURE_SET_MODE) && !is_fadump_active()) |
| 264 | long rc; | 265 | pseries_big_endian_exceptions(); |
| 265 | |||
| 266 | rc = pseries_big_endian_exceptions(); | ||
| 267 | /* | ||
| 268 | * At this point it is unlikely panic() will get anything | ||
| 269 | * out to the user, but at least this will stop us from | ||
| 270 | * continuing on further and creating an even more | ||
| 271 | * difficult to debug situation. | ||
| 272 | * | ||
| 273 | * There is a known problem when kdump'ing, if cpus are offline | ||
| 274 | * the above call will fail. Rather than panicking again, keep | ||
| 275 | * going and hope the kdump kernel is also little endian, which | ||
| 276 | * it usually is. | ||
| 277 | */ | ||
| 278 | if (rc && !kdump_in_progress()) | ||
| 279 | panic("Could not enable big endian exceptions"); | ||
| 280 | } | ||
| 281 | #endif | 266 | #endif |
| 282 | } | 267 | } |
| 283 | 268 | ||
| @@ -604,17 +589,17 @@ static int __init disable_bulk_remove(char *str) | |||
| 604 | 589 | ||
| 605 | __setup("bulk_remove=", disable_bulk_remove); | 590 | __setup("bulk_remove=", disable_bulk_remove); |
| 606 | 591 | ||
| 607 | void __init hpte_init_lpar(void) | 592 | void __init hpte_init_pseries(void) |
| 608 | { | 593 | { |
| 609 | ppc_md.hpte_invalidate = pSeries_lpar_hpte_invalidate; | 594 | mmu_hash_ops.hpte_invalidate = pSeries_lpar_hpte_invalidate; |
| 610 | ppc_md.hpte_updatepp = pSeries_lpar_hpte_updatepp; | 595 | mmu_hash_ops.hpte_updatepp = pSeries_lpar_hpte_updatepp; |
| 611 | ppc_md.hpte_updateboltedpp = pSeries_lpar_hpte_updateboltedpp; | 596 | mmu_hash_ops.hpte_updateboltedpp = pSeries_lpar_hpte_updateboltedpp; |
| 612 | ppc_md.hpte_insert = pSeries_lpar_hpte_insert; | 597 | mmu_hash_ops.hpte_insert = pSeries_lpar_hpte_insert; |
| 613 | ppc_md.hpte_remove = pSeries_lpar_hpte_remove; | 598 | mmu_hash_ops.hpte_remove = pSeries_lpar_hpte_remove; |
| 614 | ppc_md.hpte_removebolted = pSeries_lpar_hpte_removebolted; | 599 | mmu_hash_ops.hpte_removebolted = pSeries_lpar_hpte_removebolted; |
| 615 | ppc_md.flush_hash_range = pSeries_lpar_flush_hash_range; | 600 | mmu_hash_ops.flush_hash_range = pSeries_lpar_flush_hash_range; |
| 616 | ppc_md.hpte_clear_all = pSeries_lpar_hptab_clear; | 601 | mmu_hash_ops.hpte_clear_all = pSeries_lpar_hptab_clear; |
| 617 | ppc_md.hugepage_invalidate = pSeries_lpar_hugepage_invalidate; | 602 | mmu_hash_ops.hugepage_invalidate = pSeries_lpar_hugepage_invalidate; |
| 618 | } | 603 | } |
| 619 | 604 | ||
| 620 | #ifdef CONFIG_PPC_SMLPAR | 605 | #ifdef CONFIG_PPC_SMLPAR |
diff --git a/arch/powerpc/platforms/pseries/nvram.c b/arch/powerpc/platforms/pseries/nvram.c index 9f8184175c86..79aef8c1c5b3 100644 --- a/arch/powerpc/platforms/pseries/nvram.c +++ b/arch/powerpc/platforms/pseries/nvram.c | |||
| @@ -17,8 +17,6 @@ | |||
| 17 | #include <linux/init.h> | 17 | #include <linux/init.h> |
| 18 | #include <linux/spinlock.h> | 18 | #include <linux/spinlock.h> |
| 19 | #include <linux/slab.h> | 19 | #include <linux/slab.h> |
| 20 | #include <linux/kmsg_dump.h> | ||
| 21 | #include <linux/pstore.h> | ||
| 22 | #include <linux/ctype.h> | 20 | #include <linux/ctype.h> |
| 23 | #include <asm/uaccess.h> | 21 | #include <asm/uaccess.h> |
| 24 | #include <asm/nvram.h> | 22 | #include <asm/nvram.h> |
diff --git a/arch/powerpc/platforms/pseries/power.c b/arch/powerpc/platforms/pseries/power.c index c26eadde434c..a4a0b57d1d81 100644 --- a/arch/powerpc/platforms/pseries/power.c +++ b/arch/powerpc/platforms/pseries/power.c | |||
| @@ -27,6 +27,8 @@ | |||
| 27 | #include <linux/init.h> | 27 | #include <linux/init.h> |
| 28 | #include <asm/machdep.h> | 28 | #include <asm/machdep.h> |
| 29 | 29 | ||
| 30 | #include "pseries.h" | ||
| 31 | |||
| 30 | unsigned long rtas_poweron_auto; /* default and normal state is 0 */ | 32 | unsigned long rtas_poweron_auto; /* default and normal state is 0 */ |
| 31 | 33 | ||
| 32 | static ssize_t auto_poweron_show(struct kobject *kobj, | 34 | static ssize_t auto_poweron_show(struct kobject *kobj, |
diff --git a/arch/powerpc/platforms/pseries/pseries.h b/arch/powerpc/platforms/pseries/pseries.h index 7aa83f00ac62..b1be7b713fe6 100644 --- a/arch/powerpc/platforms/pseries/pseries.h +++ b/arch/powerpc/platforms/pseries/pseries.h | |||
| @@ -20,31 +20,18 @@ extern void request_event_sources_irqs(struct device_node *np, | |||
| 20 | 20 | ||
| 21 | #include <linux/of.h> | 21 | #include <linux/of.h> |
| 22 | 22 | ||
| 23 | extern void __init fw_hypertas_feature_init(const char *hypertas, | ||
| 24 | unsigned long len); | ||
| 25 | extern void __init fw_vec5_feature_init(const char *hypertas, | ||
| 26 | unsigned long len); | ||
| 27 | |||
| 28 | struct pt_regs; | 23 | struct pt_regs; |
| 29 | 24 | ||
| 30 | extern int pSeries_system_reset_exception(struct pt_regs *regs); | 25 | extern int pSeries_system_reset_exception(struct pt_regs *regs); |
| 31 | extern int pSeries_machine_check_exception(struct pt_regs *regs); | 26 | extern int pSeries_machine_check_exception(struct pt_regs *regs); |
| 32 | 27 | ||
| 33 | #ifdef CONFIG_SMP | 28 | #ifdef CONFIG_SMP |
| 34 | extern void smp_init_pseries_mpic(void); | 29 | extern void smp_init_pseries(void); |
| 35 | extern void smp_init_pseries_xics(void); | ||
| 36 | #else | 30 | #else |
| 37 | static inline void smp_init_pseries_mpic(void) { }; | 31 | static inline void smp_init_pseries(void) { }; |
| 38 | static inline void smp_init_pseries_xics(void) { }; | ||
| 39 | #endif | 32 | #endif |
| 40 | 33 | ||
| 41 | #ifdef CONFIG_KEXEC | 34 | extern void pseries_kexec_cpu_down(int crash_shutdown, int secondary); |
| 42 | extern void setup_kexec_cpu_down_xics(void); | ||
| 43 | extern void setup_kexec_cpu_down_mpic(void); | ||
| 44 | #else | ||
| 45 | static inline void setup_kexec_cpu_down_xics(void) { } | ||
| 46 | static inline void setup_kexec_cpu_down_mpic(void) { } | ||
| 47 | #endif | ||
| 48 | 35 | ||
| 49 | extern void pSeries_final_fixup(void); | 36 | extern void pSeries_final_fixup(void); |
| 50 | 37 | ||
| @@ -64,6 +51,8 @@ extern int dlpar_detach_node(struct device_node *); | |||
| 64 | extern int dlpar_acquire_drc(u32 drc_index); | 51 | extern int dlpar_acquire_drc(u32 drc_index); |
| 65 | extern int dlpar_release_drc(u32 drc_index); | 52 | extern int dlpar_release_drc(u32 drc_index); |
| 66 | 53 | ||
| 54 | void queue_hotplug_event(struct pseries_hp_errorlog *hp_errlog, | ||
| 55 | struct completion *hotplug_done, int *rc); | ||
| 67 | #ifdef CONFIG_MEMORY_HOTPLUG | 56 | #ifdef CONFIG_MEMORY_HOTPLUG |
| 68 | int dlpar_memory(struct pseries_hp_errorlog *hp_elog); | 57 | int dlpar_memory(struct pseries_hp_errorlog *hp_elog); |
| 69 | #else | 58 | #else |
diff --git a/arch/powerpc/platforms/pseries/pseries_energy.c b/arch/powerpc/platforms/pseries/pseries_energy.c index 92767791f93b..164a13d3998a 100644 --- a/arch/powerpc/platforms/pseries/pseries_energy.c +++ b/arch/powerpc/platforms/pseries/pseries_energy.c | |||
| @@ -208,19 +208,19 @@ static ssize_t percpu_deactivate_hint_show(struct device *dev, | |||
| 208 | * Per-cpu value of the hint | 208 | * Per-cpu value of the hint |
| 209 | */ | 209 | */ |
| 210 | 210 | ||
| 211 | struct device_attribute attr_cpu_activate_hint_list = | 211 | static struct device_attribute attr_cpu_activate_hint_list = |
| 212 | __ATTR(pseries_activate_hint_list, 0444, | 212 | __ATTR(pseries_activate_hint_list, 0444, |
| 213 | cpu_activate_hint_list_show, NULL); | 213 | cpu_activate_hint_list_show, NULL); |
| 214 | 214 | ||
| 215 | struct device_attribute attr_cpu_deactivate_hint_list = | 215 | static struct device_attribute attr_cpu_deactivate_hint_list = |
| 216 | __ATTR(pseries_deactivate_hint_list, 0444, | 216 | __ATTR(pseries_deactivate_hint_list, 0444, |
| 217 | cpu_deactivate_hint_list_show, NULL); | 217 | cpu_deactivate_hint_list_show, NULL); |
| 218 | 218 | ||
| 219 | struct device_attribute attr_percpu_activate_hint = | 219 | static struct device_attribute attr_percpu_activate_hint = |
| 220 | __ATTR(pseries_activate_hint, 0444, | 220 | __ATTR(pseries_activate_hint, 0444, |
| 221 | percpu_activate_hint_show, NULL); | 221 | percpu_activate_hint_show, NULL); |
| 222 | 222 | ||
| 223 | struct device_attribute attr_percpu_deactivate_hint = | 223 | static struct device_attribute attr_percpu_deactivate_hint = |
| 224 | __ATTR(pseries_deactivate_hint, 0444, | 224 | __ATTR(pseries_deactivate_hint, 0444, |
| 225 | percpu_deactivate_hint_show, NULL); | 225 | percpu_deactivate_hint_show, NULL); |
| 226 | 226 | ||
diff --git a/arch/powerpc/platforms/pseries/ras.c b/arch/powerpc/platforms/pseries/ras.c index 9a3e27b863ce..904a677208d1 100644 --- a/arch/powerpc/platforms/pseries/ras.c +++ b/arch/powerpc/platforms/pseries/ras.c | |||
| @@ -43,6 +43,7 @@ static int ras_check_exception_token; | |||
| 43 | /* EPOW events counter variable */ | 43 | /* EPOW events counter variable */ |
| 44 | static int num_epow_events; | 44 | static int num_epow_events; |
| 45 | 45 | ||
| 46 | static irqreturn_t ras_hotplug_interrupt(int irq, void *dev_id); | ||
| 46 | static irqreturn_t ras_epow_interrupt(int irq, void *dev_id); | 47 | static irqreturn_t ras_epow_interrupt(int irq, void *dev_id); |
| 47 | static irqreturn_t ras_error_interrupt(int irq, void *dev_id); | 48 | static irqreturn_t ras_error_interrupt(int irq, void *dev_id); |
| 48 | 49 | ||
| @@ -65,6 +66,14 @@ static int __init init_ras_IRQ(void) | |||
| 65 | of_node_put(np); | 66 | of_node_put(np); |
| 66 | } | 67 | } |
| 67 | 68 | ||
| 69 | /* Hotplug Events */ | ||
| 70 | np = of_find_node_by_path("/event-sources/hot-plug-events"); | ||
| 71 | if (np != NULL) { | ||
| 72 | request_event_sources_irqs(np, ras_hotplug_interrupt, | ||
| 73 | "RAS_HOTPLUG"); | ||
| 74 | of_node_put(np); | ||
| 75 | } | ||
| 76 | |||
| 68 | /* EPOW Events */ | 77 | /* EPOW Events */ |
| 69 | np = of_find_node_by_path("/event-sources/epow-events"); | 78 | np = of_find_node_by_path("/event-sources/epow-events"); |
| 70 | if (np != NULL) { | 79 | if (np != NULL) { |
| @@ -190,6 +199,36 @@ static void rtas_parse_epow_errlog(struct rtas_error_log *log) | |||
| 190 | num_epow_events++; | 199 | num_epow_events++; |
| 191 | } | 200 | } |
| 192 | 201 | ||
| 202 | static irqreturn_t ras_hotplug_interrupt(int irq, void *dev_id) | ||
| 203 | { | ||
| 204 | struct pseries_errorlog *pseries_log; | ||
| 205 | struct pseries_hp_errorlog *hp_elog; | ||
| 206 | |||
| 207 | spin_lock(&ras_log_buf_lock); | ||
| 208 | |||
| 209 | rtas_call(ras_check_exception_token, 6, 1, NULL, | ||
| 210 | RTAS_VECTOR_EXTERNAL_INTERRUPT, virq_to_hw(irq), | ||
| 211 | RTAS_HOTPLUG_EVENTS, 0, __pa(&ras_log_buf), | ||
| 212 | rtas_get_error_log_max()); | ||
| 213 | |||
| 214 | pseries_log = get_pseries_errorlog((struct rtas_error_log *)ras_log_buf, | ||
| 215 | PSERIES_ELOG_SECT_ID_HOTPLUG); | ||
| 216 | hp_elog = (struct pseries_hp_errorlog *)pseries_log->data; | ||
| 217 | |||
| 218 | /* | ||
| 219 | * Since PCI hotplug is not currently supported on pseries, put PCI | ||
| 220 | * hotplug events on the ras_log_buf to be handled by rtas_errd. | ||
| 221 | */ | ||
| 222 | if (hp_elog->resource == PSERIES_HP_ELOG_RESOURCE_MEM || | ||
| 223 | hp_elog->resource == PSERIES_HP_ELOG_RESOURCE_CPU) | ||
| 224 | queue_hotplug_event(hp_elog, NULL, NULL); | ||
| 225 | else | ||
| 226 | log_error(ras_log_buf, ERR_TYPE_RTAS_LOG, 0); | ||
| 227 | |||
| 228 | spin_unlock(&ras_log_buf_lock); | ||
| 229 | return IRQ_HANDLED; | ||
| 230 | } | ||
| 231 | |||
| 193 | /* Handle environmental and power warning (EPOW) interrupts. */ | 232 | /* Handle environmental and power warning (EPOW) interrupts. */ |
| 194 | static irqreturn_t ras_epow_interrupt(int irq, void *dev_id) | 233 | static irqreturn_t ras_epow_interrupt(int irq, void *dev_id) |
| 195 | { | 234 | { |
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c index 9883bc7ea007..4ffcaa6f8670 100644 --- a/arch/powerpc/platforms/pseries/setup.c +++ b/arch/powerpc/platforms/pseries/setup.c | |||
| @@ -57,7 +57,6 @@ | |||
| 57 | #include <asm/time.h> | 57 | #include <asm/time.h> |
| 58 | #include <asm/nvram.h> | 58 | #include <asm/nvram.h> |
| 59 | #include <asm/pmc.h> | 59 | #include <asm/pmc.h> |
| 60 | #include <asm/mpic.h> | ||
| 61 | #include <asm/xics.h> | 60 | #include <asm/xics.h> |
| 62 | #include <asm/ppc-pci.h> | 61 | #include <asm/ppc-pci.h> |
| 63 | #include <asm/i8259.h> | 62 | #include <asm/i8259.h> |
| @@ -77,8 +76,6 @@ EXPORT_SYMBOL(CMO_PageSize); | |||
| 77 | 76 | ||
| 78 | int fwnmi_active; /* TRUE if an FWNMI handler is present */ | 77 | int fwnmi_active; /* TRUE if an FWNMI handler is present */ |
| 79 | 78 | ||
| 80 | static struct device_node *pSeries_mpic_node; | ||
| 81 | |||
| 82 | static void pSeries_show_cpuinfo(struct seq_file *m) | 79 | static void pSeries_show_cpuinfo(struct seq_file *m) |
| 83 | { | 80 | { |
| 84 | struct device_node *root; | 81 | struct device_node *root; |
| @@ -172,48 +169,7 @@ static void __init pseries_setup_i8259_cascade(void) | |||
| 172 | irq_set_chained_handler(cascade, pseries_8259_cascade); | 169 | irq_set_chained_handler(cascade, pseries_8259_cascade); |
| 173 | } | 170 | } |
| 174 | 171 | ||
| 175 | static void __init pseries_mpic_init_IRQ(void) | 172 | static void __init pseries_init_irq(void) |
| 176 | { | ||
| 177 | struct device_node *np; | ||
| 178 | const unsigned int *opprop; | ||
| 179 | unsigned long openpic_addr = 0; | ||
| 180 | int naddr, n, i, opplen; | ||
| 181 | struct mpic *mpic; | ||
| 182 | |||
| 183 | np = of_find_node_by_path("/"); | ||
| 184 | naddr = of_n_addr_cells(np); | ||
| 185 | opprop = of_get_property(np, "platform-open-pic", &opplen); | ||
| 186 | if (opprop != NULL) { | ||
| 187 | openpic_addr = of_read_number(opprop, naddr); | ||
| 188 | printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr); | ||
| 189 | } | ||
| 190 | of_node_put(np); | ||
| 191 | |||
| 192 | BUG_ON(openpic_addr == 0); | ||
| 193 | |||
| 194 | /* Setup the openpic driver */ | ||
| 195 | mpic = mpic_alloc(pSeries_mpic_node, openpic_addr, | ||
| 196 | MPIC_NO_RESET, 16, 0, " MPIC "); | ||
| 197 | BUG_ON(mpic == NULL); | ||
| 198 | |||
| 199 | /* Add ISUs */ | ||
| 200 | opplen /= sizeof(u32); | ||
| 201 | for (n = 0, i = naddr; i < opplen; i += naddr, n++) { | ||
| 202 | unsigned long isuaddr = of_read_number(opprop + i, naddr); | ||
| 203 | mpic_assign_isu(mpic, n, isuaddr); | ||
| 204 | } | ||
| 205 | |||
| 206 | /* Setup top-level get_irq */ | ||
| 207 | ppc_md.get_irq = mpic_get_irq; | ||
| 208 | |||
| 209 | /* All ISUs are setup, complete initialization */ | ||
| 210 | mpic_init(mpic); | ||
| 211 | |||
| 212 | /* Look for cascade */ | ||
| 213 | pseries_setup_i8259_cascade(); | ||
| 214 | } | ||
| 215 | |||
| 216 | static void __init pseries_xics_init_IRQ(void) | ||
| 217 | { | 173 | { |
| 218 | xics_init(); | 174 | xics_init(); |
| 219 | pseries_setup_i8259_cascade(); | 175 | pseries_setup_i8259_cascade(); |
| @@ -228,32 +184,6 @@ static void pseries_lpar_enable_pmcs(void) | |||
| 228 | plpar_hcall_norets(H_PERFMON, set, reset); | 184 | plpar_hcall_norets(H_PERFMON, set, reset); |
| 229 | } | 185 | } |
| 230 | 186 | ||
| 231 | static void __init pseries_discover_pic(void) | ||
| 232 | { | ||
| 233 | struct device_node *np; | ||
| 234 | const char *typep; | ||
| 235 | |||
| 236 | for_each_node_by_name(np, "interrupt-controller") { | ||
| 237 | typep = of_get_property(np, "compatible", NULL); | ||
| 238 | if (!typep) | ||
| 239 | continue; | ||
| 240 | if (strstr(typep, "open-pic")) { | ||
| 241 | pSeries_mpic_node = of_node_get(np); | ||
| 242 | ppc_md.init_IRQ = pseries_mpic_init_IRQ; | ||
| 243 | setup_kexec_cpu_down_mpic(); | ||
| 244 | smp_init_pseries_mpic(); | ||
| 245 | return; | ||
| 246 | } else if (strstr(typep, "ppc-xicp")) { | ||
| 247 | ppc_md.init_IRQ = pseries_xics_init_IRQ; | ||
| 248 | setup_kexec_cpu_down_xics(); | ||
| 249 | smp_init_pseries_xics(); | ||
| 250 | return; | ||
| 251 | } | ||
| 252 | } | ||
| 253 | printk(KERN_ERR "pSeries_discover_pic: failed to recognize" | ||
| 254 | " interrupt-controller\n"); | ||
| 255 | } | ||
| 256 | |||
| 257 | static int pci_dn_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *data) | 187 | static int pci_dn_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *data) |
| 258 | { | 188 | { |
| 259 | struct of_reconfig_data *rd = data; | 189 | struct of_reconfig_data *rd = data; |
| @@ -265,11 +195,8 @@ static int pci_dn_reconfig_notifier(struct notifier_block *nb, unsigned long act | |||
| 265 | case OF_RECONFIG_ATTACH_NODE: | 195 | case OF_RECONFIG_ATTACH_NODE: |
| 266 | parent = of_get_parent(np); | 196 | parent = of_get_parent(np); |
| 267 | pdn = parent ? PCI_DN(parent) : NULL; | 197 | pdn = parent ? PCI_DN(parent) : NULL; |
| 268 | if (pdn) { | 198 | if (pdn) |
| 269 | /* Create pdn and EEH device */ | ||
| 270 | pci_add_device_node_info(pdn->phb, np); | 199 | pci_add_device_node_info(pdn->phb, np); |
| 271 | eeh_dev_init(PCI_DN(np), pdn->phb); | ||
| 272 | } | ||
| 273 | 200 | ||
| 274 | of_node_put(parent); | 201 | of_node_put(parent); |
| 275 | break; | 202 | break; |
| @@ -367,7 +294,7 @@ static void pseries_lpar_idle(void) | |||
| 367 | { | 294 | { |
| 368 | /* | 295 | /* |
| 369 | * Default handler to go into low thread priority and possibly | 296 | * Default handler to go into low thread priority and possibly |
| 370 | * low power mode by cedeing processor to hypervisor | 297 | * low power mode by ceding processor to hypervisor |
| 371 | */ | 298 | */ |
| 372 | 299 | ||
| 373 | /* Indicate to hypervisor that we are idle. */ | 300 | /* Indicate to hypervisor that we are idle. */ |
| @@ -392,15 +319,23 @@ static void pseries_lpar_idle(void) | |||
| 392 | * to ever be a problem in practice we can move this into a kernel thread to | 319 | * to ever be a problem in practice we can move this into a kernel thread to |
| 393 | * finish off the process later in boot. | 320 | * finish off the process later in boot. |
| 394 | */ | 321 | */ |
| 395 | long pSeries_enable_reloc_on_exc(void) | 322 | void pseries_enable_reloc_on_exc(void) |
| 396 | { | 323 | { |
| 397 | long rc; | 324 | long rc; |
| 398 | unsigned int delay, total_delay = 0; | 325 | unsigned int delay, total_delay = 0; |
| 399 | 326 | ||
| 400 | while (1) { | 327 | while (1) { |
| 401 | rc = enable_reloc_on_exceptions(); | 328 | rc = enable_reloc_on_exceptions(); |
| 402 | if (!H_IS_LONG_BUSY(rc)) | 329 | if (!H_IS_LONG_BUSY(rc)) { |
| 403 | return rc; | 330 | if (rc == H_P2) { |
| 331 | pr_info("Relocation on exceptions not" | ||
| 332 | " supported\n"); | ||
| 333 | } else if (rc != H_SUCCESS) { | ||
| 334 | pr_warn("Unable to enable relocation" | ||
| 335 | " on exceptions: %ld\n", rc); | ||
| 336 | } | ||
| 337 | break; | ||
| 338 | } | ||
| 404 | 339 | ||
| 405 | delay = get_longbusy_msecs(rc); | 340 | delay = get_longbusy_msecs(rc); |
| 406 | total_delay += delay; | 341 | total_delay += delay; |
| @@ -408,66 +343,81 @@ long pSeries_enable_reloc_on_exc(void) | |||
| 408 | pr_warn("Warning: Giving up waiting to enable " | 343 | pr_warn("Warning: Giving up waiting to enable " |
| 409 | "relocation on exceptions (%u msec)!\n", | 344 | "relocation on exceptions (%u msec)!\n", |
| 410 | total_delay); | 345 | total_delay); |
| 411 | return rc; | 346 | return; |
| 412 | } | 347 | } |
| 413 | 348 | ||
| 414 | mdelay(delay); | 349 | mdelay(delay); |
| 415 | } | 350 | } |
| 416 | } | 351 | } |
| 417 | EXPORT_SYMBOL(pSeries_enable_reloc_on_exc); | 352 | EXPORT_SYMBOL(pseries_enable_reloc_on_exc); |
| 418 | 353 | ||
| 419 | long pSeries_disable_reloc_on_exc(void) | 354 | void pseries_disable_reloc_on_exc(void) |
| 420 | { | 355 | { |
| 421 | long rc; | 356 | long rc; |
| 422 | 357 | ||
| 423 | while (1) { | 358 | while (1) { |
| 424 | rc = disable_reloc_on_exceptions(); | 359 | rc = disable_reloc_on_exceptions(); |
| 425 | if (!H_IS_LONG_BUSY(rc)) | 360 | if (!H_IS_LONG_BUSY(rc)) |
| 426 | return rc; | 361 | break; |
| 427 | mdelay(get_longbusy_msecs(rc)); | 362 | mdelay(get_longbusy_msecs(rc)); |
| 428 | } | 363 | } |
| 364 | if (rc != H_SUCCESS) | ||
| 365 | pr_warning("Warning: Failed to disable relocation on " | ||
| 366 | "exceptions: %ld\n", rc); | ||
| 429 | } | 367 | } |
| 430 | EXPORT_SYMBOL(pSeries_disable_reloc_on_exc); | 368 | EXPORT_SYMBOL(pseries_disable_reloc_on_exc); |
| 431 | 369 | ||
| 432 | #ifdef CONFIG_KEXEC | 370 | #ifdef CONFIG_KEXEC |
| 433 | static void pSeries_machine_kexec(struct kimage *image) | 371 | static void pSeries_machine_kexec(struct kimage *image) |
| 434 | { | 372 | { |
| 435 | long rc; | 373 | if (firmware_has_feature(FW_FEATURE_SET_MODE)) |
| 436 | 374 | pseries_disable_reloc_on_exc(); | |
| 437 | if (firmware_has_feature(FW_FEATURE_SET_MODE)) { | ||
| 438 | rc = pSeries_disable_reloc_on_exc(); | ||
| 439 | if (rc != H_SUCCESS) | ||
| 440 | pr_warning("Warning: Failed to disable relocation on " | ||
| 441 | "exceptions: %ld\n", rc); | ||
| 442 | } | ||
| 443 | 375 | ||
| 444 | default_machine_kexec(image); | 376 | default_machine_kexec(image); |
| 445 | } | 377 | } |
| 446 | #endif | 378 | #endif |
| 447 | 379 | ||
| 448 | #ifdef __LITTLE_ENDIAN__ | 380 | #ifdef __LITTLE_ENDIAN__ |
| 449 | long pseries_big_endian_exceptions(void) | 381 | void pseries_big_endian_exceptions(void) |
| 450 | { | 382 | { |
| 451 | long rc; | 383 | long rc; |
| 452 | 384 | ||
| 453 | while (1) { | 385 | while (1) { |
| 454 | rc = enable_big_endian_exceptions(); | 386 | rc = enable_big_endian_exceptions(); |
| 455 | if (!H_IS_LONG_BUSY(rc)) | 387 | if (!H_IS_LONG_BUSY(rc)) |
| 456 | return rc; | 388 | break; |
| 457 | mdelay(get_longbusy_msecs(rc)); | 389 | mdelay(get_longbusy_msecs(rc)); |
| 458 | } | 390 | } |
| 391 | |||
| 392 | /* | ||
| 393 | * At this point it is unlikely panic() will get anything | ||
| 394 | * out to the user, since this is called very late in kexec | ||
| 395 | * but at least this will stop us from continuing on further | ||
| 396 | * and creating an even more difficult to debug situation. | ||
| 397 | * | ||
| 398 | * There is a known problem when kdump'ing, if cpus are offline | ||
| 399 | * the above call will fail. Rather than panicking again, keep | ||
| 400 | * going and hope the kdump kernel is also little endian, which | ||
| 401 | * it usually is. | ||
| 402 | */ | ||
| 403 | if (rc && !kdump_in_progress()) | ||
| 404 | panic("Could not enable big endian exceptions"); | ||
| 459 | } | 405 | } |
| 460 | 406 | ||
| 461 | static long pseries_little_endian_exceptions(void) | 407 | void pseries_little_endian_exceptions(void) |
| 462 | { | 408 | { |
| 463 | long rc; | 409 | long rc; |
| 464 | 410 | ||
| 465 | while (1) { | 411 | while (1) { |
| 466 | rc = enable_little_endian_exceptions(); | 412 | rc = enable_little_endian_exceptions(); |
| 467 | if (!H_IS_LONG_BUSY(rc)) | 413 | if (!H_IS_LONG_BUSY(rc)) |
| 468 | return rc; | 414 | break; |
| 469 | mdelay(get_longbusy_msecs(rc)); | 415 | mdelay(get_longbusy_msecs(rc)); |
| 470 | } | 416 | } |
| 417 | if (rc) { | ||
| 418 | ppc_md.progress("H_SET_MODE LE exception fail", 0); | ||
| 419 | panic("Could not enable little endian exceptions"); | ||
| 420 | } | ||
| 471 | } | 421 | } |
| 472 | #endif | 422 | #endif |
| 473 | 423 | ||
| @@ -492,7 +442,6 @@ static void __init find_and_init_phbs(void) | |||
| 492 | } | 442 | } |
| 493 | 443 | ||
| 494 | of_node_put(root); | 444 | of_node_put(root); |
| 495 | pci_devs_phb_init(); | ||
| 496 | 445 | ||
| 497 | /* | 446 | /* |
| 498 | * PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS can be set via properties | 447 | * PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS can be set via properties |
| @@ -506,7 +455,8 @@ static void __init pSeries_setup_arch(void) | |||
| 506 | set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT); | 455 | set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT); |
| 507 | 456 | ||
| 508 | /* Discover PIC type and setup ppc_md accordingly */ | 457 | /* Discover PIC type and setup ppc_md accordingly */ |
| 509 | pseries_discover_pic(); | 458 | smp_init_pseries(); |
| 459 | |||
| 510 | 460 | ||
| 511 | /* openpic global configuration register (64-bit format). */ | 461 | /* openpic global configuration register (64-bit format). */ |
| 512 | /* openpic Interrupt Source Unit pointer (64-bit format). */ | 462 | /* openpic Interrupt Source Unit pointer (64-bit format). */ |
| @@ -537,18 +487,6 @@ static void __init pSeries_setup_arch(void) | |||
| 537 | } | 487 | } |
| 538 | 488 | ||
| 539 | ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare; | 489 | ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare; |
| 540 | |||
| 541 | if (firmware_has_feature(FW_FEATURE_SET_MODE)) { | ||
| 542 | long rc; | ||
| 543 | |||
| 544 | rc = pSeries_enable_reloc_on_exc(); | ||
| 545 | if (rc == H_P2) { | ||
| 546 | pr_info("Relocation on exceptions not supported\n"); | ||
| 547 | } else if (rc != H_SUCCESS) { | ||
| 548 | pr_warn("Unable to enable relocation on exceptions: " | ||
| 549 | "%ld\n", rc); | ||
| 550 | } | ||
| 551 | } | ||
| 552 | } | 490 | } |
| 553 | 491 | ||
| 554 | static int __init pSeries_init_panel(void) | 492 | static int __init pSeries_init_panel(void) |
| @@ -682,9 +620,9 @@ static void pSeries_cmo_feature_init(void) | |||
| 682 | /* | 620 | /* |
| 683 | * Early initialization. Relocation is on but do not reference unbolted pages | 621 | * Early initialization. Relocation is on but do not reference unbolted pages |
| 684 | */ | 622 | */ |
| 685 | static void __init pSeries_init_early(void) | 623 | static void __init pseries_init(void) |
| 686 | { | 624 | { |
| 687 | pr_debug(" -> pSeries_init_early()\n"); | 625 | pr_debug(" -> pseries_init()\n"); |
| 688 | 626 | ||
| 689 | #ifdef CONFIG_HVC_CONSOLE | 627 | #ifdef CONFIG_HVC_CONSOLE |
| 690 | if (firmware_has_feature(FW_FEATURE_LPAR)) | 628 | if (firmware_has_feature(FW_FEATURE_LPAR)) |
| @@ -701,7 +639,7 @@ static void __init pSeries_init_early(void) | |||
| 701 | pSeries_cmo_feature_init(); | 639 | pSeries_cmo_feature_init(); |
| 702 | iommu_init_early_pSeries(); | 640 | iommu_init_early_pSeries(); |
| 703 | 641 | ||
| 704 | pr_debug(" <- pSeries_init_early()\n"); | 642 | pr_debug(" <- pseries_init()\n"); |
| 705 | } | 643 | } |
| 706 | 644 | ||
| 707 | /** | 645 | /** |
| @@ -732,49 +670,9 @@ static void pseries_power_off(void) | |||
| 732 | for (;;); | 670 | for (;;); |
| 733 | } | 671 | } |
| 734 | 672 | ||
| 735 | /* | ||
| 736 | * Called very early, MMU is off, device-tree isn't unflattened | ||
| 737 | */ | ||
| 738 | |||
| 739 | static int __init pseries_probe_fw_features(unsigned long node, | ||
| 740 | const char *uname, int depth, | ||
| 741 | void *data) | ||
| 742 | { | ||
| 743 | const char *prop; | ||
| 744 | int len; | ||
| 745 | static int hypertas_found; | ||
| 746 | static int vec5_found; | ||
| 747 | |||
| 748 | if (depth != 1) | ||
| 749 | return 0; | ||
| 750 | |||
| 751 | if (!strcmp(uname, "rtas") || !strcmp(uname, "rtas@0")) { | ||
| 752 | prop = of_get_flat_dt_prop(node, "ibm,hypertas-functions", | ||
| 753 | &len); | ||
| 754 | if (prop) { | ||
| 755 | powerpc_firmware_features |= FW_FEATURE_LPAR; | ||
| 756 | fw_hypertas_feature_init(prop, len); | ||
| 757 | } | ||
| 758 | |||
| 759 | hypertas_found = 1; | ||
| 760 | } | ||
| 761 | |||
| 762 | if (!strcmp(uname, "chosen")) { | ||
| 763 | prop = of_get_flat_dt_prop(node, "ibm,architecture-vec-5", | ||
| 764 | &len); | ||
| 765 | if (prop) | ||
| 766 | fw_vec5_feature_init(prop, len); | ||
| 767 | |||
| 768 | vec5_found = 1; | ||
| 769 | } | ||
| 770 | |||
| 771 | return hypertas_found && vec5_found; | ||
| 772 | } | ||
| 773 | |||
| 774 | static int __init pSeries_probe(void) | 673 | static int __init pSeries_probe(void) |
| 775 | { | 674 | { |
| 776 | unsigned long root = of_get_flat_dt_root(); | 675 | const char *dtype = of_get_property(of_root, "device_type", NULL); |
| 777 | const char *dtype = of_get_flat_dt_prop(root, "device_type", NULL); | ||
| 778 | 676 | ||
| 779 | if (dtype == NULL) | 677 | if (dtype == NULL) |
| 780 | return 0; | 678 | return 0; |
| @@ -784,41 +682,17 @@ static int __init pSeries_probe(void) | |||
| 784 | /* Cell blades firmware claims to be chrp while it's not. Until this | 682 | /* Cell blades firmware claims to be chrp while it's not. Until this |
| 785 | * is fixed, we need to avoid those here. | 683 | * is fixed, we need to avoid those here. |
| 786 | */ | 684 | */ |
| 787 | if (of_flat_dt_is_compatible(root, "IBM,CPBW-1.0") || | 685 | if (of_machine_is_compatible("IBM,CPBW-1.0") || |
| 788 | of_flat_dt_is_compatible(root, "IBM,CBEA")) | 686 | of_machine_is_compatible("IBM,CBEA")) |
| 789 | return 0; | 687 | return 0; |
| 790 | 688 | ||
| 791 | pr_debug("pSeries detected, looking for LPAR capability...\n"); | ||
| 792 | |||
| 793 | /* Now try to figure out if we are running on LPAR */ | ||
| 794 | of_scan_flat_dt(pseries_probe_fw_features, NULL); | ||
| 795 | |||
| 796 | #ifdef __LITTLE_ENDIAN__ | ||
| 797 | if (firmware_has_feature(FW_FEATURE_SET_MODE)) { | ||
| 798 | long rc; | ||
| 799 | /* | ||
| 800 | * Tell the hypervisor that we want our exceptions to | ||
| 801 | * be taken in little endian mode. If this fails we don't | ||
| 802 | * want to use BUG() because it will trigger an exception. | ||
| 803 | */ | ||
| 804 | rc = pseries_little_endian_exceptions(); | ||
| 805 | if (rc) { | ||
| 806 | ppc_md.progress("H_SET_MODE LE exception fail", 0); | ||
| 807 | panic("Could not enable little endian exceptions"); | ||
| 808 | } | ||
| 809 | } | ||
| 810 | #endif | ||
| 811 | |||
| 812 | if (firmware_has_feature(FW_FEATURE_LPAR)) | ||
| 813 | hpte_init_lpar(); | ||
| 814 | else | ||
| 815 | hpte_init_native(); | ||
| 816 | |||
| 817 | pm_power_off = pseries_power_off; | 689 | pm_power_off = pseries_power_off; |
| 818 | 690 | ||
| 819 | pr_debug("Machine is%s LPAR !\n", | 691 | pr_debug("Machine is%s LPAR !\n", |
| 820 | (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not"); | 692 | (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not"); |
| 821 | 693 | ||
| 694 | pseries_init(); | ||
| 695 | |||
| 822 | return 1; | 696 | return 1; |
| 823 | } | 697 | } |
| 824 | 698 | ||
| @@ -837,7 +711,7 @@ define_machine(pseries) { | |||
| 837 | .name = "pSeries", | 711 | .name = "pSeries", |
| 838 | .probe = pSeries_probe, | 712 | .probe = pSeries_probe, |
| 839 | .setup_arch = pSeries_setup_arch, | 713 | .setup_arch = pSeries_setup_arch, |
| 840 | .init_early = pSeries_init_early, | 714 | .init_IRQ = pseries_init_irq, |
| 841 | .show_cpuinfo = pSeries_show_cpuinfo, | 715 | .show_cpuinfo = pSeries_show_cpuinfo, |
| 842 | .log_error = pSeries_log_error, | 716 | .log_error = pSeries_log_error, |
| 843 | .pcibios_fixup = pSeries_final_fixup, | 717 | .pcibios_fixup = pSeries_final_fixup, |
| @@ -853,6 +727,7 @@ define_machine(pseries) { | |||
| 853 | .machine_check_exception = pSeries_machine_check_exception, | 727 | .machine_check_exception = pSeries_machine_check_exception, |
| 854 | #ifdef CONFIG_KEXEC | 728 | #ifdef CONFIG_KEXEC |
| 855 | .machine_kexec = pSeries_machine_kexec, | 729 | .machine_kexec = pSeries_machine_kexec, |
| 730 | .kexec_cpu_down = pseries_kexec_cpu_down, | ||
| 856 | #endif | 731 | #endif |
| 857 | #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE | 732 | #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE |
| 858 | .memory_block_size = pseries_memory_block_size, | 733 | .memory_block_size = pseries_memory_block_size, |
diff --git a/arch/powerpc/platforms/pseries/smp.c b/arch/powerpc/platforms/pseries/smp.c index 6932ea803e33..f6f83aeccaaa 100644 --- a/arch/powerpc/platforms/pseries/smp.c +++ b/arch/powerpc/platforms/pseries/smp.c | |||
| @@ -38,7 +38,6 @@ | |||
| 38 | #include <asm/cputable.h> | 38 | #include <asm/cputable.h> |
| 39 | #include <asm/firmware.h> | 39 | #include <asm/firmware.h> |
| 40 | #include <asm/rtas.h> | 40 | #include <asm/rtas.h> |
| 41 | #include <asm/mpic.h> | ||
| 42 | #include <asm/vdso_datapage.h> | 41 | #include <asm/vdso_datapage.h> |
| 43 | #include <asm/cputhreads.h> | 42 | #include <asm/cputhreads.h> |
| 44 | #include <asm/xics.h> | 43 | #include <asm/xics.h> |
| @@ -140,7 +139,7 @@ out: | |||
| 140 | return 1; | 139 | return 1; |
| 141 | } | 140 | } |
| 142 | 141 | ||
| 143 | static void smp_xics_setup_cpu(int cpu) | 142 | static void smp_setup_cpu(int cpu) |
| 144 | { | 143 | { |
| 145 | if (cpu != boot_cpuid) | 144 | if (cpu != boot_cpuid) |
| 146 | xics_setup_cpu(); | 145 | xics_setup_cpu(); |
| @@ -207,28 +206,22 @@ static __init void pSeries_smp_probe(void) | |||
| 207 | } | 206 | } |
| 208 | } | 207 | } |
| 209 | 208 | ||
| 210 | static struct smp_ops_t pSeries_mpic_smp_ops = { | 209 | static struct smp_ops_t pseries_smp_ops = { |
| 211 | .message_pass = smp_mpic_message_pass, | ||
| 212 | .probe = smp_mpic_probe, | ||
| 213 | .kick_cpu = smp_pSeries_kick_cpu, | ||
| 214 | .setup_cpu = smp_mpic_setup_cpu, | ||
| 215 | }; | ||
| 216 | |||
| 217 | static struct smp_ops_t pSeries_xics_smp_ops = { | ||
| 218 | .message_pass = NULL, /* Use smp_muxed_ipi_message_pass */ | 210 | .message_pass = NULL, /* Use smp_muxed_ipi_message_pass */ |
| 219 | .cause_ipi = NULL, /* Filled at runtime by pSeries_smp_probe() */ | 211 | .cause_ipi = NULL, /* Filled at runtime by pSeries_smp_probe() */ |
| 220 | .probe = pSeries_smp_probe, | 212 | .probe = pSeries_smp_probe, |
| 221 | .kick_cpu = smp_pSeries_kick_cpu, | 213 | .kick_cpu = smp_pSeries_kick_cpu, |
| 222 | .setup_cpu = smp_xics_setup_cpu, | 214 | .setup_cpu = smp_setup_cpu, |
| 223 | .cpu_bootable = smp_generic_cpu_bootable, | 215 | .cpu_bootable = smp_generic_cpu_bootable, |
| 224 | }; | 216 | }; |
| 225 | 217 | ||
| 226 | /* This is called very early */ | 218 | /* This is called very early */ |
| 227 | static void __init smp_init_pseries(void) | 219 | void __init smp_init_pseries(void) |
| 228 | { | 220 | { |
| 229 | int i; | 221 | int i; |
| 230 | 222 | ||
| 231 | pr_debug(" -> smp_init_pSeries()\n"); | 223 | pr_debug(" -> smp_init_pSeries()\n"); |
| 224 | smp_ops = &pseries_smp_ops; | ||
| 232 | 225 | ||
| 233 | alloc_bootmem_cpumask_var(&of_spin_mask); | 226 | alloc_bootmem_cpumask_var(&of_spin_mask); |
| 234 | 227 | ||
| @@ -258,17 +251,3 @@ static void __init smp_init_pseries(void) | |||
| 258 | 251 | ||
| 259 | pr_debug(" <- smp_init_pSeries()\n"); | 252 | pr_debug(" <- smp_init_pSeries()\n"); |
| 260 | } | 253 | } |
| 261 | |||
| 262 | void __init smp_init_pseries_mpic(void) | ||
| 263 | { | ||
| 264 | smp_ops = &pSeries_mpic_smp_ops; | ||
| 265 | |||
| 266 | smp_init_pseries(); | ||
| 267 | } | ||
| 268 | |||
| 269 | void __init smp_init_pseries_xics(void) | ||
| 270 | { | ||
| 271 | smp_ops = &pSeries_xics_smp_ops; | ||
| 272 | |||
| 273 | smp_init_pseries(); | ||
| 274 | } | ||
diff --git a/arch/powerpc/sysdev/cpm_common.c b/arch/powerpc/sysdev/cpm_common.c index 0ac12e5fd8ab..911456d17713 100644 --- a/arch/powerpc/sysdev/cpm_common.c +++ b/arch/powerpc/sysdev/cpm_common.c | |||
| @@ -28,6 +28,7 @@ | |||
| 28 | #include <asm/udbg.h> | 28 | #include <asm/udbg.h> |
| 29 | #include <asm/io.h> | 29 | #include <asm/io.h> |
| 30 | #include <asm/cpm.h> | 30 | #include <asm/cpm.h> |
| 31 | #include <asm/fixmap.h> | ||
| 31 | #include <soc/fsl/qe/qe.h> | 32 | #include <soc/fsl/qe/qe.h> |
| 32 | 33 | ||
| 33 | #include <mm/mmu_decl.h> | 34 | #include <mm/mmu_decl.h> |
| @@ -37,25 +38,36 @@ | |||
| 37 | #endif | 38 | #endif |
| 38 | 39 | ||
| 39 | #ifdef CONFIG_PPC_EARLY_DEBUG_CPM | 40 | #ifdef CONFIG_PPC_EARLY_DEBUG_CPM |
| 40 | static u32 __iomem *cpm_udbg_txdesc = | 41 | static u32 __iomem *cpm_udbg_txdesc; |
| 41 | (u32 __iomem __force *)CONFIG_PPC_EARLY_DEBUG_CPM_ADDR; | 42 | static u8 __iomem *cpm_udbg_txbuf; |
| 42 | 43 | ||
| 43 | static void udbg_putc_cpm(char c) | 44 | static void udbg_putc_cpm(char c) |
| 44 | { | 45 | { |
| 45 | u8 __iomem *txbuf = (u8 __iomem __force *)in_be32(&cpm_udbg_txdesc[1]); | ||
| 46 | |||
| 47 | if (c == '\n') | 46 | if (c == '\n') |
| 48 | udbg_putc_cpm('\r'); | 47 | udbg_putc_cpm('\r'); |
| 49 | 48 | ||
| 50 | while (in_be32(&cpm_udbg_txdesc[0]) & 0x80000000) | 49 | while (in_be32(&cpm_udbg_txdesc[0]) & 0x80000000) |
| 51 | ; | 50 | ; |
| 52 | 51 | ||
| 53 | out_8(txbuf, c); | 52 | out_8(cpm_udbg_txbuf, c); |
| 54 | out_be32(&cpm_udbg_txdesc[0], 0xa0000001); | 53 | out_be32(&cpm_udbg_txdesc[0], 0xa0000001); |
| 55 | } | 54 | } |
| 56 | 55 | ||
| 57 | void __init udbg_init_cpm(void) | 56 | void __init udbg_init_cpm(void) |
| 58 | { | 57 | { |
| 58 | #ifdef CONFIG_PPC_8xx | ||
| 59 | cpm_udbg_txdesc = (u32 __iomem __force *) | ||
| 60 | (CONFIG_PPC_EARLY_DEBUG_CPM_ADDR - PHYS_IMMR_BASE + | ||
| 61 | VIRT_IMMR_BASE); | ||
| 62 | cpm_udbg_txbuf = (u8 __iomem __force *) | ||
| 63 | (in_be32(&cpm_udbg_txdesc[1]) - PHYS_IMMR_BASE + | ||
| 64 | VIRT_IMMR_BASE); | ||
| 65 | #else | ||
| 66 | cpm_udbg_txdesc = (u32 __iomem __force *) | ||
| 67 | CONFIG_PPC_EARLY_DEBUG_CPM_ADDR; | ||
| 68 | cpm_udbg_txbuf = (u8 __iomem __force *)in_be32(&cpm_udbg_txdesc[1]); | ||
| 69 | #endif | ||
| 70 | |||
| 59 | if (cpm_udbg_txdesc) { | 71 | if (cpm_udbg_txdesc) { |
| 60 | #ifdef CONFIG_CPM2 | 72 | #ifdef CONFIG_CPM2 |
| 61 | setbat(1, 0xf0000000, 0xf0000000, 1024*1024, PAGE_KERNEL_NCG); | 73 | setbat(1, 0xf0000000, 0xf0000000, 1024*1024, PAGE_KERNEL_NCG); |
diff --git a/arch/powerpc/sysdev/dart_iommu.c b/arch/powerpc/sysdev/dart_iommu.c index b7348637eae0..26904f4879ec 100644 --- a/arch/powerpc/sysdev/dart_iommu.c +++ b/arch/powerpc/sysdev/dart_iommu.c | |||
| @@ -48,16 +48,10 @@ | |||
| 48 | 48 | ||
| 49 | #include "dart.h" | 49 | #include "dart.h" |
| 50 | 50 | ||
| 51 | /* Physical base address and size of the DART table */ | 51 | /* DART table address and size */ |
| 52 | unsigned long dart_tablebase; /* exported to htab_initialize */ | 52 | static u32 *dart_tablebase; |
| 53 | static unsigned long dart_tablesize; | 53 | static unsigned long dart_tablesize; |
| 54 | 54 | ||
| 55 | /* Virtual base address of the DART table */ | ||
| 56 | static u32 *dart_vbase; | ||
| 57 | #ifdef CONFIG_PM | ||
| 58 | static u32 *dart_copy; | ||
| 59 | #endif | ||
| 60 | |||
| 61 | /* Mapped base address for the dart */ | 55 | /* Mapped base address for the dart */ |
| 62 | static unsigned int __iomem *dart; | 56 | static unsigned int __iomem *dart; |
| 63 | 57 | ||
| @@ -151,6 +145,34 @@ wait_more: | |||
| 151 | spin_unlock_irqrestore(&invalidate_lock, flags); | 145 | spin_unlock_irqrestore(&invalidate_lock, flags); |
| 152 | } | 146 | } |
| 153 | 147 | ||
| 148 | static void dart_cache_sync(unsigned int *base, unsigned int count) | ||
| 149 | { | ||
| 150 | /* | ||
| 151 | * We add 1 to the number of entries to flush, following a | ||
| 152 | * comment in Darwin indicating that the memory controller | ||
| 153 | * can prefetch unmapped memory under some circumstances. | ||
| 154 | */ | ||
| 155 | unsigned long start = (unsigned long)base; | ||
| 156 | unsigned long end = start + (count + 1) * sizeof(unsigned int); | ||
| 157 | unsigned int tmp; | ||
| 158 | |||
| 159 | /* Perform a standard cache flush */ | ||
| 160 | flush_inval_dcache_range(start, end); | ||
| 161 | |||
| 162 | /* | ||
| 163 | * Perform the sequence described in the CPC925 manual to | ||
| 164 | * ensure all the data gets to a point the cache incoherent | ||
| 165 | * DART hardware will see. | ||
| 166 | */ | ||
| 167 | asm volatile(" sync;" | ||
| 168 | " isync;" | ||
| 169 | " dcbf 0,%1;" | ||
| 170 | " sync;" | ||
| 171 | " isync;" | ||
| 172 | " lwz %0,0(%1);" | ||
| 173 | " isync" : "=r" (tmp) : "r" (end) : "memory"); | ||
| 174 | } | ||
| 175 | |||
| 154 | static void dart_flush(struct iommu_table *tbl) | 176 | static void dart_flush(struct iommu_table *tbl) |
| 155 | { | 177 | { |
| 156 | mb(); | 178 | mb(); |
| @@ -165,13 +187,13 @@ static int dart_build(struct iommu_table *tbl, long index, | |||
| 165 | enum dma_data_direction direction, | 187 | enum dma_data_direction direction, |
| 166 | struct dma_attrs *attrs) | 188 | struct dma_attrs *attrs) |
| 167 | { | 189 | { |
| 168 | unsigned int *dp; | 190 | unsigned int *dp, *orig_dp; |
| 169 | unsigned int rpn; | 191 | unsigned int rpn; |
| 170 | long l; | 192 | long l; |
| 171 | 193 | ||
| 172 | DBG("dart: build at: %lx, %lx, addr: %x\n", index, npages, uaddr); | 194 | DBG("dart: build at: %lx, %lx, addr: %x\n", index, npages, uaddr); |
| 173 | 195 | ||
| 174 | dp = ((unsigned int*)tbl->it_base) + index; | 196 | orig_dp = dp = ((unsigned int*)tbl->it_base) + index; |
| 175 | 197 | ||
| 176 | /* On U3, all memory is contiguous, so we can move this | 198 | /* On U3, all memory is contiguous, so we can move this |
| 177 | * out of the loop. | 199 | * out of the loop. |
| @@ -184,11 +206,7 @@ static int dart_build(struct iommu_table *tbl, long index, | |||
| 184 | 206 | ||
| 185 | uaddr += DART_PAGE_SIZE; | 207 | uaddr += DART_PAGE_SIZE; |
| 186 | } | 208 | } |
| 187 | 209 | dart_cache_sync(orig_dp, npages); | |
| 188 | /* make sure all updates have reached memory */ | ||
| 189 | mb(); | ||
| 190 | in_be32((unsigned __iomem *)dp); | ||
| 191 | mb(); | ||
| 192 | 210 | ||
| 193 | if (dart_is_u4) { | 211 | if (dart_is_u4) { |
| 194 | rpn = index; | 212 | rpn = index; |
| @@ -203,7 +221,8 @@ static int dart_build(struct iommu_table *tbl, long index, | |||
| 203 | 221 | ||
| 204 | static void dart_free(struct iommu_table *tbl, long index, long npages) | 222 | static void dart_free(struct iommu_table *tbl, long index, long npages) |
| 205 | { | 223 | { |
| 206 | unsigned int *dp; | 224 | unsigned int *dp, *orig_dp; |
| 225 | long orig_npages = npages; | ||
| 207 | 226 | ||
| 208 | /* We don't worry about flushing the TLB cache. The only drawback of | 227 | /* We don't worry about flushing the TLB cache. The only drawback of |
| 209 | * not doing it is that we won't catch buggy device drivers doing | 228 | * not doing it is that we won't catch buggy device drivers doing |
| @@ -212,34 +231,30 @@ static void dart_free(struct iommu_table *tbl, long index, long npages) | |||
| 212 | 231 | ||
| 213 | DBG("dart: free at: %lx, %lx\n", index, npages); | 232 | DBG("dart: free at: %lx, %lx\n", index, npages); |
| 214 | 233 | ||
| 215 | dp = ((unsigned int *)tbl->it_base) + index; | 234 | orig_dp = dp = ((unsigned int *)tbl->it_base) + index; |
| 216 | 235 | ||
| 217 | while (npages--) | 236 | while (npages--) |
| 218 | *(dp++) = dart_emptyval; | 237 | *(dp++) = dart_emptyval; |
| 219 | } | ||
| 220 | 238 | ||
| 239 | dart_cache_sync(orig_dp, orig_npages); | ||
| 240 | } | ||
| 221 | 241 | ||
| 222 | static int __init dart_init(struct device_node *dart_node) | 242 | static void allocate_dart(void) |
| 223 | { | 243 | { |
| 224 | unsigned int i; | 244 | unsigned long tmp; |
| 225 | unsigned long tmp, base, size; | ||
| 226 | struct resource r; | ||
| 227 | |||
| 228 | if (dart_tablebase == 0 || dart_tablesize == 0) { | ||
| 229 | printk(KERN_INFO "DART: table not allocated, using " | ||
| 230 | "direct DMA\n"); | ||
| 231 | return -ENODEV; | ||
| 232 | } | ||
| 233 | 245 | ||
| 234 | if (of_address_to_resource(dart_node, 0, &r)) | 246 | /* 512 pages (2MB) is max DART tablesize. */ |
| 235 | panic("DART: can't get register base ! "); | 247 | dart_tablesize = 1UL << 21; |
| 236 | 248 | ||
| 237 | /* Make sure nothing from the DART range remains in the CPU cache | 249 | /* |
| 238 | * from a previous mapping that existed before the kernel took | 250 | * 16MB (1 << 24) alignment. We allocate a full 16Mb chuck since we |
| 239 | * over | 251 | * will blow up an entire large page anyway in the kernel mapping. |
| 240 | */ | 252 | */ |
| 241 | flush_dcache_phys_range(dart_tablebase, | 253 | dart_tablebase = __va(memblock_alloc_base(1UL<<24, |
| 242 | dart_tablebase + dart_tablesize); | 254 | 1UL<<24, 0x80000000L)); |
| 255 | |||
| 256 | /* There is no point scanning the DART space for leaks*/ | ||
| 257 | kmemleak_no_scan((void *)dart_tablebase); | ||
| 243 | 258 | ||
| 244 | /* Allocate a spare page to map all invalid DART pages. We need to do | 259 | /* Allocate a spare page to map all invalid DART pages. We need to do |
| 245 | * that to work around what looks like a problem with the HT bridge | 260 | * that to work around what looks like a problem with the HT bridge |
| @@ -249,20 +264,51 @@ static int __init dart_init(struct device_node *dart_node) | |||
| 249 | dart_emptyval = DARTMAP_VALID | ((tmp >> DART_PAGE_SHIFT) & | 264 | dart_emptyval = DARTMAP_VALID | ((tmp >> DART_PAGE_SHIFT) & |
| 250 | DARTMAP_RPNMASK); | 265 | DARTMAP_RPNMASK); |
| 251 | 266 | ||
| 267 | printk(KERN_INFO "DART table allocated at: %p\n", dart_tablebase); | ||
| 268 | } | ||
| 269 | |||
| 270 | static int __init dart_init(struct device_node *dart_node) | ||
| 271 | { | ||
| 272 | unsigned int i; | ||
| 273 | unsigned long base, size; | ||
| 274 | struct resource r; | ||
| 275 | |||
| 276 | /* IOMMU disabled by the user ? bail out */ | ||
| 277 | if (iommu_is_off) | ||
| 278 | return -ENODEV; | ||
| 279 | |||
| 280 | /* | ||
| 281 | * Only use the DART if the machine has more than 1GB of RAM | ||
| 282 | * or if requested with iommu=on on cmdline. | ||
| 283 | * | ||
| 284 | * 1GB of RAM is picked as limit because some default devices | ||
| 285 | * (i.e. Airport Extreme) have 30 bit address range limits. | ||
| 286 | */ | ||
| 287 | |||
| 288 | if (!iommu_force_on && memblock_end_of_DRAM() <= 0x40000000ull) | ||
| 289 | return -ENODEV; | ||
| 290 | |||
| 291 | /* Get DART registers */ | ||
| 292 | if (of_address_to_resource(dart_node, 0, &r)) | ||
| 293 | panic("DART: can't get register base ! "); | ||
| 294 | |||
| 252 | /* Map in DART registers */ | 295 | /* Map in DART registers */ |
| 253 | dart = ioremap(r.start, resource_size(&r)); | 296 | dart = ioremap(r.start, resource_size(&r)); |
| 254 | if (dart == NULL) | 297 | if (dart == NULL) |
| 255 | panic("DART: Cannot map registers!"); | 298 | panic("DART: Cannot map registers!"); |
| 256 | 299 | ||
| 257 | /* Map in DART table */ | 300 | /* Allocate the DART and dummy page */ |
| 258 | dart_vbase = ioremap(__pa(dart_tablebase), dart_tablesize); | 301 | allocate_dart(); |
| 259 | 302 | ||
| 260 | /* Fill initial table */ | 303 | /* Fill initial table */ |
| 261 | for (i = 0; i < dart_tablesize/4; i++) | 304 | for (i = 0; i < dart_tablesize/4; i++) |
| 262 | dart_vbase[i] = dart_emptyval; | 305 | dart_tablebase[i] = dart_emptyval; |
| 306 | |||
| 307 | /* Push to memory */ | ||
| 308 | dart_cache_sync(dart_tablebase, dart_tablesize / sizeof(u32)); | ||
| 263 | 309 | ||
| 264 | /* Initialize DART with table base and enable it. */ | 310 | /* Initialize DART with table base and enable it. */ |
| 265 | base = dart_tablebase >> DART_PAGE_SHIFT; | 311 | base = ((unsigned long)dart_tablebase) >> DART_PAGE_SHIFT; |
| 266 | size = dart_tablesize >> DART_PAGE_SHIFT; | 312 | size = dart_tablesize >> DART_PAGE_SHIFT; |
| 267 | if (dart_is_u4) { | 313 | if (dart_is_u4) { |
| 268 | size &= DART_SIZE_U4_SIZE_MASK; | 314 | size &= DART_SIZE_U4_SIZE_MASK; |
| @@ -301,7 +347,7 @@ static void iommu_table_dart_setup(void) | |||
| 301 | iommu_table_dart.it_page_shift = IOMMU_PAGE_SHIFT_4K; | 347 | iommu_table_dart.it_page_shift = IOMMU_PAGE_SHIFT_4K; |
| 302 | 348 | ||
| 303 | /* Initialize the common IOMMU code */ | 349 | /* Initialize the common IOMMU code */ |
| 304 | iommu_table_dart.it_base = (unsigned long)dart_vbase; | 350 | iommu_table_dart.it_base = (unsigned long)dart_tablebase; |
| 305 | iommu_table_dart.it_index = 0; | 351 | iommu_table_dart.it_index = 0; |
| 306 | iommu_table_dart.it_blocksize = 1; | 352 | iommu_table_dart.it_blocksize = 1; |
| 307 | iommu_table_dart.it_ops = &iommu_dart_ops; | 353 | iommu_table_dart.it_ops = &iommu_dart_ops; |
| @@ -404,75 +450,21 @@ void __init iommu_init_early_dart(struct pci_controller_ops *controller_ops) | |||
| 404 | } | 450 | } |
| 405 | 451 | ||
| 406 | #ifdef CONFIG_PM | 452 | #ifdef CONFIG_PM |
| 407 | static void iommu_dart_save(void) | ||
| 408 | { | ||
| 409 | memcpy(dart_copy, dart_vbase, 2*1024*1024); | ||
| 410 | } | ||
| 411 | |||
| 412 | static void iommu_dart_restore(void) | 453 | static void iommu_dart_restore(void) |
| 413 | { | 454 | { |
| 414 | memcpy(dart_vbase, dart_copy, 2*1024*1024); | 455 | dart_cache_sync(dart_tablebase, dart_tablesize / sizeof(u32)); |
| 415 | dart_tlb_invalidate_all(); | 456 | dart_tlb_invalidate_all(); |
| 416 | } | 457 | } |
| 417 | 458 | ||
| 418 | static int __init iommu_init_late_dart(void) | 459 | static int __init iommu_init_late_dart(void) |
| 419 | { | 460 | { |
| 420 | unsigned long tbasepfn; | ||
| 421 | struct page *p; | ||
| 422 | |||
| 423 | /* if no dart table exists then we won't need to save it | ||
| 424 | * and the area has also not been reserved */ | ||
| 425 | if (!dart_tablebase) | 461 | if (!dart_tablebase) |
| 426 | return 0; | 462 | return 0; |
| 427 | 463 | ||
| 428 | tbasepfn = __pa(dart_tablebase) >> PAGE_SHIFT; | ||
| 429 | register_nosave_region_late(tbasepfn, | ||
| 430 | tbasepfn + ((1<<24) >> PAGE_SHIFT)); | ||
| 431 | |||
| 432 | /* For suspend we need to copy the dart contents because | ||
| 433 | * it is not part of the regular mapping (see above) and | ||
| 434 | * thus not saved automatically. The memory for this copy | ||
| 435 | * must be allocated early because we need 2 MB. */ | ||
| 436 | p = alloc_pages(GFP_KERNEL, 21 - PAGE_SHIFT); | ||
| 437 | BUG_ON(!p); | ||
| 438 | dart_copy = page_address(p); | ||
| 439 | |||
| 440 | ppc_md.iommu_save = iommu_dart_save; | ||
| 441 | ppc_md.iommu_restore = iommu_dart_restore; | 464 | ppc_md.iommu_restore = iommu_dart_restore; |
| 442 | 465 | ||
| 443 | return 0; | 466 | return 0; |
| 444 | } | 467 | } |
| 445 | 468 | ||
| 446 | late_initcall(iommu_init_late_dart); | 469 | late_initcall(iommu_init_late_dart); |
| 447 | #endif | 470 | #endif /* CONFIG_PM */ |
| 448 | |||
| 449 | void __init alloc_dart_table(void) | ||
| 450 | { | ||
| 451 | /* Only reserve DART space if machine has more than 1GB of RAM | ||
| 452 | * or if requested with iommu=on on cmdline. | ||
| 453 | * | ||
| 454 | * 1GB of RAM is picked as limit because some default devices | ||
| 455 | * (i.e. Airport Extreme) have 30 bit address range limits. | ||
| 456 | */ | ||
| 457 | |||
| 458 | if (iommu_is_off) | ||
| 459 | return; | ||
| 460 | |||
| 461 | if (!iommu_force_on && memblock_end_of_DRAM() <= 0x40000000ull) | ||
| 462 | return; | ||
| 463 | |||
| 464 | /* 512 pages (2MB) is max DART tablesize. */ | ||
| 465 | dart_tablesize = 1UL << 21; | ||
| 466 | /* 16MB (1 << 24) alignment. We allocate a full 16Mb chuck since we | ||
| 467 | * will blow up an entire large page anyway in the kernel mapping | ||
| 468 | */ | ||
| 469 | dart_tablebase = (unsigned long) | ||
| 470 | __va(memblock_alloc_base(1UL<<24, 1UL<<24, 0x80000000L)); | ||
| 471 | /* | ||
| 472 | * The DART space is later unmapped from the kernel linear mapping and | ||
| 473 | * accessing dart_tablebase during kmemleak scanning will fault. | ||
| 474 | */ | ||
| 475 | kmemleak_no_scan((void *)dart_tablebase); | ||
| 476 | |||
| 477 | printk(KERN_INFO "DART table allocated at: %lx\n", dart_tablebase); | ||
| 478 | } | ||
diff --git a/arch/powerpc/sysdev/fsl_85xx_l2ctlr.c b/arch/powerpc/sysdev/fsl_85xx_l2ctlr.c index 861cebf9c292..c27058e5df26 100644 --- a/arch/powerpc/sysdev/fsl_85xx_l2ctlr.c +++ b/arch/powerpc/sysdev/fsl_85xx_l2ctlr.c | |||
| @@ -90,12 +90,8 @@ static int mpc85xx_l2ctlr_of_probe(struct platform_device *dev) | |||
| 90 | } | 90 | } |
| 91 | l2cache_size = *prop; | 91 | l2cache_size = *prop; |
| 92 | 92 | ||
| 93 | if (get_cache_sram_params(&sram_params)) { | 93 | if (get_cache_sram_params(&sram_params)) |
| 94 | dev_err(&dev->dev, | 94 | return 0; /* fall back to L2 cache only */ |
| 95 | "Entire L2 as cache, provide valid sram offset and size\n"); | ||
| 96 | return -EINVAL; | ||
| 97 | } | ||
| 98 | |||
| 99 | 95 | ||
| 100 | rem = l2cache_size % sram_params.sram_size; | 96 | rem = l2cache_size % sram_params.sram_size; |
| 101 | ways = LOCK_WAYS_FULL * sram_params.sram_size / l2cache_size; | 97 | ways = LOCK_WAYS_FULL * sram_params.sram_size / l2cache_size; |
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c index 99269c041615..a09ca704de58 100644 --- a/arch/powerpc/sysdev/fsl_soc.c +++ b/arch/powerpc/sysdev/fsl_soc.c | |||
| @@ -204,7 +204,7 @@ static int __init setup_rstcr(void) | |||
| 204 | 204 | ||
| 205 | arch_initcall(setup_rstcr); | 205 | arch_initcall(setup_rstcr); |
| 206 | 206 | ||
| 207 | void fsl_rstcr_restart(char *cmd) | 207 | void __noreturn fsl_rstcr_restart(char *cmd) |
| 208 | { | 208 | { |
| 209 | local_irq_disable(); | 209 | local_irq_disable(); |
| 210 | if (rstcr) | 210 | if (rstcr) |
| @@ -228,10 +228,11 @@ EXPORT_SYMBOL(diu_ops); | |||
| 228 | * to initiate a partition restart when we're running under the Freescale | 228 | * to initiate a partition restart when we're running under the Freescale |
| 229 | * hypervisor. | 229 | * hypervisor. |
| 230 | */ | 230 | */ |
| 231 | void fsl_hv_restart(char *cmd) | 231 | void __noreturn fsl_hv_restart(char *cmd) |
| 232 | { | 232 | { |
| 233 | pr_info("hv restart\n"); | 233 | pr_info("hv restart\n"); |
| 234 | fh_partition_restart(-1); | 234 | fh_partition_restart(-1); |
| 235 | while (1) ; | ||
| 235 | } | 236 | } |
| 236 | 237 | ||
| 237 | /* | 238 | /* |
| @@ -241,9 +242,10 @@ void fsl_hv_restart(char *cmd) | |||
| 241 | * function pointers, to shut down the partition when we're running under | 242 | * function pointers, to shut down the partition when we're running under |
| 242 | * the Freescale hypervisor. | 243 | * the Freescale hypervisor. |
| 243 | */ | 244 | */ |
| 244 | void fsl_hv_halt(void) | 245 | void __noreturn fsl_hv_halt(void) |
| 245 | { | 246 | { |
| 246 | pr_info("hv exit\n"); | 247 | pr_info("hv exit\n"); |
| 247 | fh_partition_stop(-1); | 248 | fh_partition_stop(-1); |
| 249 | while (1) ; | ||
| 248 | } | 250 | } |
| 249 | #endif | 251 | #endif |
diff --git a/arch/powerpc/sysdev/fsl_soc.h b/arch/powerpc/sysdev/fsl_soc.h index 4c5a19ef4f0b..433566a5ef19 100644 --- a/arch/powerpc/sysdev/fsl_soc.h +++ b/arch/powerpc/sysdev/fsl_soc.h | |||
| @@ -19,7 +19,7 @@ extern u32 fsl_get_sys_freq(void); | |||
| 19 | struct spi_board_info; | 19 | struct spi_board_info; |
| 20 | struct device_node; | 20 | struct device_node; |
| 21 | 21 | ||
| 22 | extern void fsl_rstcr_restart(char *cmd); | 22 | extern void __noreturn fsl_rstcr_restart(char *cmd); |
| 23 | 23 | ||
| 24 | /* The different ports that the DIU can be connected to */ | 24 | /* The different ports that the DIU can be connected to */ |
| 25 | enum fsl_diu_monitor_port { | 25 | enum fsl_diu_monitor_port { |
| @@ -42,8 +42,8 @@ struct platform_diu_data_ops { | |||
| 42 | 42 | ||
| 43 | extern struct platform_diu_data_ops diu_ops; | 43 | extern struct platform_diu_data_ops diu_ops; |
| 44 | 44 | ||
| 45 | void fsl_hv_restart(char *cmd); | 45 | void __noreturn fsl_hv_restart(char *cmd); |
| 46 | void fsl_hv_halt(void); | 46 | void __noreturn fsl_hv_halt(void); |
| 47 | 47 | ||
| 48 | #endif | 48 | #endif |
| 49 | #endif | 49 | #endif |
diff --git a/arch/powerpc/sysdev/xics/Makefile b/arch/powerpc/sysdev/xics/Makefile index c606aa8ba60a..5d7f5a6564de 100644 --- a/arch/powerpc/sysdev/xics/Makefile +++ b/arch/powerpc/sysdev/xics/Makefile | |||
| @@ -4,4 +4,4 @@ obj-y += xics-common.o | |||
| 4 | obj-$(CONFIG_PPC_ICP_NATIVE) += icp-native.o | 4 | obj-$(CONFIG_PPC_ICP_NATIVE) += icp-native.o |
| 5 | obj-$(CONFIG_PPC_ICP_HV) += icp-hv.o | 5 | obj-$(CONFIG_PPC_ICP_HV) += icp-hv.o |
| 6 | obj-$(CONFIG_PPC_ICS_RTAS) += ics-rtas.o | 6 | obj-$(CONFIG_PPC_ICS_RTAS) += ics-rtas.o |
| 7 | obj-$(CONFIG_PPC_POWERNV) += ics-opal.o | 7 | obj-$(CONFIG_PPC_POWERNV) += ics-opal.o icp-opal.o |
diff --git a/arch/powerpc/sysdev/xics/icp-opal.c b/arch/powerpc/sysdev/xics/icp-opal.c new file mode 100644 index 000000000000..57d72f10a97f --- /dev/null +++ b/arch/powerpc/sysdev/xics/icp-opal.c | |||
| @@ -0,0 +1,144 @@ | |||
| 1 | /* | ||
| 2 | * Copyright 2016 IBM Corporation. | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or | ||
| 5 | * modify it under the terms of the GNU General Public License | ||
| 6 | * as published by the Free Software Foundation; either version | ||
| 7 | * 2 of the License, or (at your option) any later version. | ||
| 8 | */ | ||
| 9 | #include <linux/types.h> | ||
| 10 | #include <linux/kernel.h> | ||
| 11 | #include <linux/irq.h> | ||
| 12 | #include <linux/smp.h> | ||
| 13 | #include <linux/interrupt.h> | ||
| 14 | #include <linux/cpu.h> | ||
| 15 | #include <linux/of.h> | ||
| 16 | |||
| 17 | #include <asm/smp.h> | ||
| 18 | #include <asm/irq.h> | ||
| 19 | #include <asm/errno.h> | ||
| 20 | #include <asm/xics.h> | ||
| 21 | #include <asm/io.h> | ||
| 22 | #include <asm/opal.h> | ||
| 23 | |||
| 24 | static void icp_opal_teardown_cpu(void) | ||
| 25 | { | ||
| 26 | int cpu = smp_processor_id(); | ||
| 27 | |||
| 28 | /* Clear any pending IPI */ | ||
| 29 | opal_int_set_mfrr(cpu, 0xff); | ||
| 30 | } | ||
| 31 | |||
| 32 | static void icp_opal_flush_ipi(void) | ||
| 33 | { | ||
| 34 | /* | ||
| 35 | * We take the ipi irq but and never return so we need to EOI the IPI, | ||
| 36 | * but want to leave our priority 0. | ||
| 37 | * | ||
| 38 | * Should we check all the other interrupts too? | ||
| 39 | * Should we be flagging idle loop instead? | ||
| 40 | * Or creating some task to be scheduled? | ||
| 41 | */ | ||
| 42 | opal_int_eoi((0x00 << 24) | XICS_IPI); | ||
| 43 | } | ||
| 44 | |||
| 45 | static unsigned int icp_opal_get_irq(void) | ||
| 46 | { | ||
| 47 | unsigned int xirr; | ||
| 48 | unsigned int vec; | ||
| 49 | unsigned int irq; | ||
| 50 | int64_t rc; | ||
| 51 | |||
| 52 | rc = opal_int_get_xirr(&xirr, false); | ||
| 53 | if (rc < 0) | ||
| 54 | return NO_IRQ; | ||
| 55 | xirr = be32_to_cpu(xirr); | ||
| 56 | vec = xirr & 0x00ffffff; | ||
| 57 | if (vec == XICS_IRQ_SPURIOUS) | ||
| 58 | return NO_IRQ; | ||
| 59 | |||
| 60 | irq = irq_find_mapping(xics_host, vec); | ||
| 61 | if (likely(irq != NO_IRQ)) { | ||
| 62 | xics_push_cppr(vec); | ||
| 63 | return irq; | ||
| 64 | } | ||
| 65 | |||
| 66 | /* We don't have a linux mapping, so have rtas mask it. */ | ||
| 67 | xics_mask_unknown_vec(vec); | ||
| 68 | |||
| 69 | /* We might learn about it later, so EOI it */ | ||
| 70 | opal_int_eoi(xirr); | ||
| 71 | |||
| 72 | return NO_IRQ; | ||
| 73 | } | ||
| 74 | |||
| 75 | static void icp_opal_set_cpu_priority(unsigned char cppr) | ||
| 76 | { | ||
| 77 | xics_set_base_cppr(cppr); | ||
| 78 | opal_int_set_cppr(cppr); | ||
| 79 | iosync(); | ||
| 80 | } | ||
| 81 | |||
| 82 | static void icp_opal_eoi(struct irq_data *d) | ||
| 83 | { | ||
| 84 | unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d); | ||
| 85 | int64_t rc; | ||
| 86 | |||
| 87 | iosync(); | ||
| 88 | rc = opal_int_eoi((xics_pop_cppr() << 24) | hw_irq); | ||
| 89 | |||
| 90 | /* | ||
| 91 | * EOI tells us whether there are more interrupts to fetch. | ||
| 92 | * | ||
| 93 | * Some HW implementations might not be able to send us another | ||
| 94 | * external interrupt in that case, so we force a replay. | ||
| 95 | */ | ||
| 96 | if (rc > 0) | ||
| 97 | force_external_irq_replay(); | ||
| 98 | } | ||
| 99 | |||
| 100 | #ifdef CONFIG_SMP | ||
| 101 | |||
| 102 | static void icp_opal_cause_ipi(int cpu, unsigned long data) | ||
| 103 | { | ||
| 104 | opal_int_set_mfrr(cpu, IPI_PRIORITY); | ||
| 105 | } | ||
| 106 | |||
| 107 | static irqreturn_t icp_opal_ipi_action(int irq, void *dev_id) | ||
| 108 | { | ||
| 109 | int cpu = smp_processor_id(); | ||
| 110 | |||
| 111 | opal_int_set_mfrr(cpu, 0xff); | ||
| 112 | |||
| 113 | return smp_ipi_demux(); | ||
| 114 | } | ||
| 115 | |||
| 116 | #endif /* CONFIG_SMP */ | ||
| 117 | |||
| 118 | static const struct icp_ops icp_opal_ops = { | ||
| 119 | .get_irq = icp_opal_get_irq, | ||
| 120 | .eoi = icp_opal_eoi, | ||
| 121 | .set_priority = icp_opal_set_cpu_priority, | ||
| 122 | .teardown_cpu = icp_opal_teardown_cpu, | ||
| 123 | .flush_ipi = icp_opal_flush_ipi, | ||
| 124 | #ifdef CONFIG_SMP | ||
| 125 | .ipi_action = icp_opal_ipi_action, | ||
| 126 | .cause_ipi = icp_opal_cause_ipi, | ||
| 127 | #endif | ||
| 128 | }; | ||
| 129 | |||
| 130 | int icp_opal_init(void) | ||
| 131 | { | ||
| 132 | struct device_node *np; | ||
| 133 | |||
| 134 | np = of_find_compatible_node(NULL, NULL, "ibm,opal-intc"); | ||
| 135 | if (!np) | ||
| 136 | return -ENODEV; | ||
| 137 | |||
| 138 | icp_ops = &icp_opal_ops; | ||
| 139 | |||
| 140 | printk("XICS: Using OPAL ICP fallbacks\n"); | ||
| 141 | |||
| 142 | return 0; | ||
| 143 | } | ||
| 144 | |||
diff --git a/arch/powerpc/sysdev/xics/xics-common.c b/arch/powerpc/sysdev/xics/xics-common.c index 47e43b7b076b..a795a5f0301c 100644 --- a/arch/powerpc/sysdev/xics/xics-common.c +++ b/arch/powerpc/sysdev/xics/xics-common.c | |||
| @@ -404,8 +404,11 @@ void __init xics_init(void) | |||
| 404 | /* Fist locate ICP */ | 404 | /* Fist locate ICP */ |
| 405 | if (firmware_has_feature(FW_FEATURE_LPAR)) | 405 | if (firmware_has_feature(FW_FEATURE_LPAR)) |
| 406 | rc = icp_hv_init(); | 406 | rc = icp_hv_init(); |
| 407 | if (rc < 0) | 407 | if (rc < 0) { |
| 408 | rc = icp_native_init(); | 408 | rc = icp_native_init(); |
| 409 | if (rc == -ENODEV) | ||
| 410 | rc = icp_opal_init(); | ||
| 411 | } | ||
| 409 | if (rc < 0) { | 412 | if (rc < 0) { |
| 410 | pr_warning("XICS: Cannot find a Presentation Controller !\n"); | 413 | pr_warning("XICS: Cannot find a Presentation Controller !\n"); |
| 411 | return; | 414 | return; |
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c index c5e155108be5..760545519a0b 100644 --- a/arch/powerpc/xmon/xmon.c +++ b/arch/powerpc/xmon/xmon.c | |||
| @@ -184,9 +184,6 @@ static void dump_tlb_book3e(void); | |||
| 184 | 184 | ||
| 185 | static int xmon_no_auto_backtrace; | 185 | static int xmon_no_auto_backtrace; |
| 186 | 186 | ||
| 187 | extern void xmon_enter(void); | ||
| 188 | extern void xmon_leave(void); | ||
| 189 | |||
| 190 | #ifdef CONFIG_PPC64 | 187 | #ifdef CONFIG_PPC64 |
| 191 | #define REG "%.16lx" | 188 | #define REG "%.16lx" |
| 192 | #else | 189 | #else |
| @@ -1685,9 +1682,78 @@ write_spr(int n, unsigned long val) | |||
| 1685 | catch_spr_faults = 0; | 1682 | catch_spr_faults = 0; |
| 1686 | } | 1683 | } |
| 1687 | 1684 | ||
| 1688 | static unsigned long regno; | 1685 | static void dump_206_sprs(void) |
| 1689 | extern char exc_prolog; | 1686 | { |
| 1690 | extern char dec_exc; | 1687 | #ifdef CONFIG_PPC64 |
| 1688 | if (!cpu_has_feature(CPU_FTR_ARCH_206)) | ||
| 1689 | return; | ||
| 1690 | |||
| 1691 | /* Actually some of these pre-date 2.06, but whatevs */ | ||
| 1692 | |||
| 1693 | printf("srr0 = %.16x srr1 = %.16x dsisr = %.8x\n", | ||
| 1694 | mfspr(SPRN_SRR0), mfspr(SPRN_SRR1), mfspr(SPRN_DSISR)); | ||
| 1695 | printf("dscr = %.16x ppr = %.16x pir = %.8x\n", | ||
| 1696 | mfspr(SPRN_DSCR), mfspr(SPRN_PPR), mfspr(SPRN_PIR)); | ||
| 1697 | |||
| 1698 | if (!(mfmsr() & MSR_HV)) | ||
| 1699 | return; | ||
| 1700 | |||
| 1701 | printf("sdr1 = %.16x hdar = %.16x hdsisr = %.8x\n", | ||
| 1702 | mfspr(SPRN_SDR1), mfspr(SPRN_HDAR), mfspr(SPRN_HDSISR)); | ||
| 1703 | printf("hsrr0 = %.16x hsrr1 = %.16x hdec = %.8x\n", | ||
| 1704 | mfspr(SPRN_HSRR0), mfspr(SPRN_HSRR1), mfspr(SPRN_HDEC)); | ||
| 1705 | printf("lpcr = %.16x pcr = %.16x lpidr = %.8x\n", | ||
| 1706 | mfspr(SPRN_LPCR), mfspr(SPRN_PCR), mfspr(SPRN_LPID)); | ||
| 1707 | printf("hsprg0 = %.16x hsprg1 = %.16x\n", | ||
| 1708 | mfspr(SPRN_HSPRG0), mfspr(SPRN_HSPRG1)); | ||
| 1709 | printf("dabr = %.16x dabrx = %.16x\n", | ||
| 1710 | mfspr(SPRN_DABR), mfspr(SPRN_DABRX)); | ||
| 1711 | #endif | ||
| 1712 | } | ||
| 1713 | |||
| 1714 | static void dump_207_sprs(void) | ||
| 1715 | { | ||
| 1716 | #ifdef CONFIG_PPC64 | ||
| 1717 | unsigned long msr; | ||
| 1718 | |||
| 1719 | if (!cpu_has_feature(CPU_FTR_ARCH_207S)) | ||
| 1720 | return; | ||
| 1721 | |||
| 1722 | printf("dpdes = %.16x tir = %.16x cir = %.8x\n", | ||
| 1723 | mfspr(SPRN_DPDES), mfspr(SPRN_TIR), mfspr(SPRN_CIR)); | ||
| 1724 | |||
| 1725 | printf("fscr = %.16x tar = %.16x pspb = %.8x\n", | ||
| 1726 | mfspr(SPRN_FSCR), mfspr(SPRN_TAR), mfspr(SPRN_PSPB)); | ||
| 1727 | |||
| 1728 | msr = mfmsr(); | ||
| 1729 | if (msr & MSR_TM) { | ||
| 1730 | /* Only if TM has been enabled in the kernel */ | ||
| 1731 | printf("tfhar = %.16x tfiar = %.16x texasr = %.16x\n", | ||
| 1732 | mfspr(SPRN_TFHAR), mfspr(SPRN_TFIAR), | ||
| 1733 | mfspr(SPRN_TEXASR)); | ||
| 1734 | } | ||
| 1735 | |||
| 1736 | printf("mmcr0 = %.16x mmcr1 = %.16x mmcr2 = %.16x\n", | ||
| 1737 | mfspr(SPRN_MMCR0), mfspr(SPRN_MMCR1), mfspr(SPRN_MMCR2)); | ||
| 1738 | printf("pmc1 = %.8x pmc2 = %.8x pmc3 = %.8x pmc4 = %.8x\n", | ||
| 1739 | mfspr(SPRN_PMC1), mfspr(SPRN_PMC2), | ||
| 1740 | mfspr(SPRN_PMC3), mfspr(SPRN_PMC4)); | ||
| 1741 | printf("mmcra = %.16x siar = %.16x pmc5 = %.8x\n", | ||
| 1742 | mfspr(SPRN_MMCRA), mfspr(SPRN_SIAR), mfspr(SPRN_PMC5)); | ||
| 1743 | printf("sdar = %.16x sier = %.16x pmc6 = %.8x\n", | ||
| 1744 | mfspr(SPRN_SDAR), mfspr(SPRN_SIER), mfspr(SPRN_PMC6)); | ||
| 1745 | printf("ebbhr = %.16x ebbrr = %.16x bescr = %.16x\n", | ||
| 1746 | mfspr(SPRN_EBBHR), mfspr(SPRN_EBBRR), mfspr(SPRN_BESCR)); | ||
| 1747 | |||
| 1748 | if (!(msr & MSR_HV)) | ||
| 1749 | return; | ||
| 1750 | |||
| 1751 | printf("hfscr = %.16x dhdes = %.16x rpr = %.16x\n", | ||
| 1752 | mfspr(SPRN_HFSCR), mfspr(SPRN_DHDES), mfspr(SPRN_RPR)); | ||
| 1753 | printf("dawr = %.16x dawrx = %.16x ciabr = %.16x\n", | ||
| 1754 | mfspr(SPRN_DAWR), mfspr(SPRN_DAWRX), mfspr(SPRN_CIABR)); | ||
| 1755 | #endif | ||
| 1756 | } | ||
| 1691 | 1757 | ||
| 1692 | static void dump_one_spr(int spr, bool show_unimplemented) | 1758 | static void dump_one_spr(int spr, bool show_unimplemented) |
| 1693 | { | 1759 | { |
| @@ -1719,6 +1785,7 @@ static void dump_one_spr(int spr, bool show_unimplemented) | |||
| 1719 | 1785 | ||
| 1720 | static void super_regs(void) | 1786 | static void super_regs(void) |
| 1721 | { | 1787 | { |
| 1788 | static unsigned long regno; | ||
| 1722 | int cmd; | 1789 | int cmd; |
| 1723 | int spr; | 1790 | int spr; |
| 1724 | 1791 | ||
| @@ -1730,14 +1797,18 @@ static void super_regs(void) | |||
| 1730 | asm("mr %0,1" : "=r" (sp) :); | 1797 | asm("mr %0,1" : "=r" (sp) :); |
| 1731 | asm("mr %0,2" : "=r" (toc) :); | 1798 | asm("mr %0,2" : "=r" (toc) :); |
| 1732 | 1799 | ||
| 1733 | printf("msr = "REG" sprg0= "REG"\n", | 1800 | printf("msr = "REG" sprg0 = "REG"\n", |
| 1734 | mfmsr(), mfspr(SPRN_SPRG0)); | 1801 | mfmsr(), mfspr(SPRN_SPRG0)); |
| 1735 | printf("pvr = "REG" sprg1= "REG"\n", | 1802 | printf("pvr = "REG" sprg1 = "REG"\n", |
| 1736 | mfspr(SPRN_PVR), mfspr(SPRN_SPRG1)); | 1803 | mfspr(SPRN_PVR), mfspr(SPRN_SPRG1)); |
| 1737 | printf("dec = "REG" sprg2= "REG"\n", | 1804 | printf("dec = "REG" sprg2 = "REG"\n", |
| 1738 | mfspr(SPRN_DEC), mfspr(SPRN_SPRG2)); | 1805 | mfspr(SPRN_DEC), mfspr(SPRN_SPRG2)); |
| 1739 | printf("sp = "REG" sprg3= "REG"\n", sp, mfspr(SPRN_SPRG3)); | 1806 | printf("sp = "REG" sprg3 = "REG"\n", sp, mfspr(SPRN_SPRG3)); |
| 1740 | printf("toc = "REG" dar = "REG"\n", toc, mfspr(SPRN_DAR)); | 1807 | printf("toc = "REG" dar = "REG"\n", toc, mfspr(SPRN_DAR)); |
| 1808 | |||
| 1809 | dump_206_sprs(); | ||
| 1810 | dump_207_sprs(); | ||
| 1811 | |||
| 1741 | return; | 1812 | return; |
| 1742 | } | 1813 | } |
| 1743 | case 'w': { | 1814 | case 'w': { |
| @@ -2213,13 +2284,13 @@ static void dump_one_paca(int cpu) | |||
| 2213 | DUMP(p, subcore_sibling_mask, "x"); | 2284 | DUMP(p, subcore_sibling_mask, "x"); |
| 2214 | #endif | 2285 | #endif |
| 2215 | 2286 | ||
| 2216 | DUMP(p, user_time, "llx"); | 2287 | DUMP(p, accounting.user_time, "llx"); |
| 2217 | DUMP(p, system_time, "llx"); | 2288 | DUMP(p, accounting.system_time, "llx"); |
| 2218 | DUMP(p, user_time_scaled, "llx"); | 2289 | DUMP(p, accounting.user_time_scaled, "llx"); |
| 2219 | DUMP(p, starttime, "llx"); | 2290 | DUMP(p, accounting.starttime, "llx"); |
| 2220 | DUMP(p, starttime_user, "llx"); | 2291 | DUMP(p, accounting.starttime_user, "llx"); |
| 2221 | DUMP(p, startspurr, "llx"); | 2292 | DUMP(p, accounting.startspurr, "llx"); |
| 2222 | DUMP(p, utime_sspurr, "llx"); | 2293 | DUMP(p, accounting.utime_sspurr, "llx"); |
| 2223 | DUMP(p, stolen_time, "llx"); | 2294 | DUMP(p, stolen_time, "llx"); |
| 2224 | #undef DUMP | 2295 | #undef DUMP |
| 2225 | 2296 | ||