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-rw-r--r--arch/powerpc/kernel/Makefile5
-rw-r--r--arch/powerpc/kernel/align.c18
-rw-r--r--arch/powerpc/kernel/asm-offsets.c80
-rw-r--r--arch/powerpc/kernel/cpu_setup_6xx.S2
-rw-r--r--arch/powerpc/kernel/cpu_setup_power.S20
-rw-r--r--arch/powerpc/kernel/cputable.c4
-rw-r--r--arch/powerpc/kernel/crash.c15
-rw-r--r--arch/powerpc/kernel/eeh_cache.c8
-rw-r--r--arch/powerpc/kernel/eeh_dev.c17
-rw-r--r--arch/powerpc/kernel/eeh_driver.c2
-rw-r--r--arch/powerpc/kernel/entry_32.S17
-rw-r--r--arch/powerpc/kernel/entry_64.S8
-rw-r--r--arch/powerpc/kernel/exceptions-64e.S6
-rw-r--r--arch/powerpc/kernel/exceptions-64s.S66
-rw-r--r--arch/powerpc/kernel/fadump.c3
-rw-r--r--arch/powerpc/kernel/ftrace.c39
-rw-r--r--arch/powerpc/kernel/head_64.S7
-rw-r--r--arch/powerpc/kernel/head_8xx.S159
-rw-r--r--arch/powerpc/kernel/idle_book3s.S (renamed from arch/powerpc/kernel/idle_power7.S)371
-rw-r--r--arch/powerpc/kernel/irq.c17
-rw-r--r--arch/powerpc/kernel/kprobes.c17
-rw-r--r--arch/powerpc/kernel/machine_kexec_64.c10
-rw-r--r--arch/powerpc/kernel/misc_32.S14
-rw-r--r--arch/powerpc/kernel/misc_64.S4
-rw-r--r--arch/powerpc/kernel/module_64.c9
-rw-r--r--arch/powerpc/kernel/pci-common.c82
-rw-r--r--arch/powerpc/kernel/pci_64.c2
-rw-r--r--arch/powerpc/kernel/pci_dn.c34
-rw-r--r--arch/powerpc/kernel/process.c48
-rw-r--r--arch/powerpc/kernel/prom.c25
-rw-r--r--arch/powerpc/kernel/rtas-proc.c2
-rw-r--r--arch/powerpc/kernel/rtas.c8
-rw-r--r--arch/powerpc/kernel/rtasd.c28
-rw-r--r--arch/powerpc/kernel/setup-common.c189
-rw-r--r--arch/powerpc/kernel/setup.h58
-rw-r--r--arch/powerpc/kernel/setup_32.c113
-rw-r--r--arch/powerpc/kernel/setup_64.c287
-rw-r--r--arch/powerpc/kernel/signal_64.c11
-rw-r--r--arch/powerpc/kernel/smp.c3
-rw-r--r--arch/powerpc/kernel/sysfs.c2
-rw-r--r--arch/powerpc/kernel/time.c148
-rw-r--r--arch/powerpc/kernel/tm.S3
-rw-r--r--arch/powerpc/kernel/traps.c13
-rw-r--r--arch/powerpc/kernel/vector.S9
-rw-r--r--arch/powerpc/kernel/vmlinux.lds.S2
45 files changed, 1201 insertions, 784 deletions
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index 2da380fcc34c..fe4c075bcf50 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -42,12 +42,11 @@ obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o
42obj-$(CONFIG_PPC_BOOK3S_64) += cpu_setup_ppc970.o cpu_setup_pa6t.o 42obj-$(CONFIG_PPC_BOOK3S_64) += cpu_setup_ppc970.o cpu_setup_pa6t.o
43obj-$(CONFIG_PPC_BOOK3S_64) += cpu_setup_power.o 43obj-$(CONFIG_PPC_BOOK3S_64) += cpu_setup_power.o
44obj-$(CONFIG_PPC_BOOK3S_64) += mce.o mce_power.o 44obj-$(CONFIG_PPC_BOOK3S_64) += mce.o mce_power.o
45obj64-$(CONFIG_RELOCATABLE) += reloc_64.o
46obj-$(CONFIG_PPC_BOOK3E_64) += exceptions-64e.o idle_book3e.o 45obj-$(CONFIG_PPC_BOOK3E_64) += exceptions-64e.o idle_book3e.o
47obj-$(CONFIG_PPC64) += vdso64/ 46obj-$(CONFIG_PPC64) += vdso64/
48obj-$(CONFIG_ALTIVEC) += vecemu.o 47obj-$(CONFIG_ALTIVEC) += vecemu.o
49obj-$(CONFIG_PPC_970_NAP) += idle_power4.o 48obj-$(CONFIG_PPC_970_NAP) += idle_power4.o
50obj-$(CONFIG_PPC_P7_NAP) += idle_power7.o 49obj-$(CONFIG_PPC_P7_NAP) += idle_book3s.o
51procfs-y := proc_powerpc.o 50procfs-y := proc_powerpc.o
52obj-$(CONFIG_PROC_FS) += $(procfs-y) 51obj-$(CONFIG_PROC_FS) += $(procfs-y)
53rtaspci-$(CONFIG_PPC64)-$(CONFIG_PCI) := rtas_pci.o 52rtaspci-$(CONFIG_PPC64)-$(CONFIG_PCI) := rtas_pci.o
@@ -87,7 +86,7 @@ extra-$(CONFIG_FSL_BOOKE) := head_fsl_booke.o
87extra-$(CONFIG_8xx) := head_8xx.o 86extra-$(CONFIG_8xx) := head_8xx.o
88extra-y += vmlinux.lds 87extra-y += vmlinux.lds
89 88
90obj-$(CONFIG_RELOCATABLE_PPC32) += reloc_32.o 89obj-$(CONFIG_RELOCATABLE) += reloc_$(CONFIG_WORD_SIZE).o
91 90
92obj-$(CONFIG_PPC32) += entry_32.o setup_32.o 91obj-$(CONFIG_PPC32) += entry_32.o setup_32.o
93obj-$(CONFIG_PPC64) += dma-iommu.o iommu.o 92obj-$(CONFIG_PPC64) += dma-iommu.o iommu.o
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c
index 8e7cb8e2b21a..c7097f933114 100644
--- a/arch/powerpc/kernel/align.c
+++ b/arch/powerpc/kernel/align.c
@@ -228,9 +228,7 @@ static int emulate_dcbz(struct pt_regs *regs, unsigned char __user *addr)
228#else 228#else
229#define REG_BYTE(rp, i) *((u8 *)(rp) + (i)) 229#define REG_BYTE(rp, i) *((u8 *)(rp) + (i))
230#endif 230#endif
231#endif 231#else
232
233#ifdef __LITTLE_ENDIAN__
234#define REG_BYTE(rp, i) (*(((u8 *)((rp) + ((i)>>2)) + ((i)&3)))) 232#define REG_BYTE(rp, i) (*(((u8 *)((rp) + ((i)>>2)) + ((i)&3))))
235#endif 233#endif
236 234
@@ -875,6 +873,20 @@ int fix_alignment(struct pt_regs *regs)
875 return emulate_vsx(addr, reg, areg, regs, flags, nb, elsize); 873 return emulate_vsx(addr, reg, areg, regs, flags, nb, elsize);
876 } 874 }
877#endif 875#endif
876
877 /*
878 * ISA 3.0 (such as P9) copy, copy_first, paste and paste_last alignment
879 * check.
880 *
881 * Send a SIGBUS to the process that caused the fault.
882 *
883 * We do not emulate these because paste may contain additional metadata
884 * when pasting to a co-processor. Furthermore, paste_last is the
885 * synchronisation point for preceding copy/paste sequences.
886 */
887 if ((instruction & 0xfc0006fe) == PPC_INST_COPY)
888 return -EIO;
889
878 /* A size of 0 indicates an instruction we don't support, with 890 /* A size of 0 indicates an instruction we don't support, with
879 * the exception of DCBZ which is handled as a special case here 891 * the exception of DCBZ which is handled as a special case here
880 */ 892 */
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index 9ea09551a2cd..b89d14c0352c 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -68,17 +68,18 @@
68#include "../mm/mmu_decl.h" 68#include "../mm/mmu_decl.h"
69#endif 69#endif
70 70
71#ifdef CONFIG_PPC_8xx
72#include <asm/fixmap.h>
73#endif
74
71int main(void) 75int main(void)
72{ 76{
73 DEFINE(THREAD, offsetof(struct task_struct, thread)); 77 DEFINE(THREAD, offsetof(struct task_struct, thread));
74 DEFINE(MM, offsetof(struct task_struct, mm)); 78 DEFINE(MM, offsetof(struct task_struct, mm));
75 DEFINE(MMCONTEXTID, offsetof(struct mm_struct, context.id)); 79 DEFINE(MMCONTEXTID, offsetof(struct mm_struct, context.id));
76#ifdef CONFIG_PPC64 80#ifdef CONFIG_PPC64
77 DEFINE(AUDITCONTEXT, offsetof(struct task_struct, audit_context));
78 DEFINE(SIGSEGV, SIGSEGV); 81 DEFINE(SIGSEGV, SIGSEGV);
79 DEFINE(NMI_MASK, NMI_MASK); 82 DEFINE(NMI_MASK, NMI_MASK);
80 DEFINE(THREAD_DSCR, offsetof(struct thread_struct, dscr));
81 DEFINE(THREAD_DSCR_INHERIT, offsetof(struct thread_struct, dscr_inherit));
82 DEFINE(TASKTHREADPPR, offsetof(struct task_struct, thread.ppr)); 83 DEFINE(TASKTHREADPPR, offsetof(struct task_struct, thread.ppr));
83#else 84#else
84 DEFINE(THREAD_INFO, offsetof(struct task_struct, stack)); 85 DEFINE(THREAD_INFO, offsetof(struct task_struct, stack));
@@ -132,17 +133,6 @@ int main(void)
132 DEFINE(THREAD_KVM_VCPU, offsetof(struct thread_struct, kvm_vcpu)); 133 DEFINE(THREAD_KVM_VCPU, offsetof(struct thread_struct, kvm_vcpu));
133#endif 134#endif
134 135
135#ifdef CONFIG_PPC_BOOK3S_64
136 DEFINE(THREAD_TAR, offsetof(struct thread_struct, tar));
137 DEFINE(THREAD_BESCR, offsetof(struct thread_struct, bescr));
138 DEFINE(THREAD_EBBHR, offsetof(struct thread_struct, ebbhr));
139 DEFINE(THREAD_EBBRR, offsetof(struct thread_struct, ebbrr));
140 DEFINE(THREAD_SIAR, offsetof(struct thread_struct, siar));
141 DEFINE(THREAD_SDAR, offsetof(struct thread_struct, sdar));
142 DEFINE(THREAD_SIER, offsetof(struct thread_struct, sier));
143 DEFINE(THREAD_MMCR0, offsetof(struct thread_struct, mmcr0));
144 DEFINE(THREAD_MMCR2, offsetof(struct thread_struct, mmcr2));
145#endif
146#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 136#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
147 DEFINE(PACATMSCRATCH, offsetof(struct paca_struct, tm_scratch)); 137 DEFINE(PACATMSCRATCH, offsetof(struct paca_struct, tm_scratch));
148 DEFINE(THREAD_TM_TFHAR, offsetof(struct thread_struct, tm_tfhar)); 138 DEFINE(THREAD_TM_TFHAR, offsetof(struct thread_struct, tm_tfhar));
@@ -178,7 +168,6 @@ int main(void)
178 DEFINE(ICACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, ilines_per_page)); 168 DEFINE(ICACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, ilines_per_page));
179 /* paca */ 169 /* paca */
180 DEFINE(PACA_SIZE, sizeof(struct paca_struct)); 170 DEFINE(PACA_SIZE, sizeof(struct paca_struct));
181 DEFINE(PACA_LOCK_TOKEN, offsetof(struct paca_struct, lock_token));
182 DEFINE(PACAPACAINDEX, offsetof(struct paca_struct, paca_index)); 171 DEFINE(PACAPACAINDEX, offsetof(struct paca_struct, paca_index));
183 DEFINE(PACAPROCSTART, offsetof(struct paca_struct, cpu_start)); 172 DEFINE(PACAPROCSTART, offsetof(struct paca_struct, cpu_start));
184 DEFINE(PACAKSAVE, offsetof(struct paca_struct, kstack)); 173 DEFINE(PACAKSAVE, offsetof(struct paca_struct, kstack));
@@ -255,13 +244,28 @@ int main(void)
255 DEFINE(PACAHWCPUID, offsetof(struct paca_struct, hw_cpu_id)); 244 DEFINE(PACAHWCPUID, offsetof(struct paca_struct, hw_cpu_id));
256 DEFINE(PACAKEXECSTATE, offsetof(struct paca_struct, kexec_state)); 245 DEFINE(PACAKEXECSTATE, offsetof(struct paca_struct, kexec_state));
257 DEFINE(PACA_DSCR_DEFAULT, offsetof(struct paca_struct, dscr_default)); 246 DEFINE(PACA_DSCR_DEFAULT, offsetof(struct paca_struct, dscr_default));
258 DEFINE(PACA_STARTTIME, offsetof(struct paca_struct, starttime)); 247 DEFINE(ACCOUNT_STARTTIME,
259 DEFINE(PACA_STARTTIME_USER, offsetof(struct paca_struct, starttime_user)); 248 offsetof(struct paca_struct, accounting.starttime));
260 DEFINE(PACA_USER_TIME, offsetof(struct paca_struct, user_time)); 249 DEFINE(ACCOUNT_STARTTIME_USER,
261 DEFINE(PACA_SYSTEM_TIME, offsetof(struct paca_struct, system_time)); 250 offsetof(struct paca_struct, accounting.starttime_user));
251 DEFINE(ACCOUNT_USER_TIME,
252 offsetof(struct paca_struct, accounting.user_time));
253 DEFINE(ACCOUNT_SYSTEM_TIME,
254 offsetof(struct paca_struct, accounting.system_time));
262 DEFINE(PACA_TRAP_SAVE, offsetof(struct paca_struct, trap_save)); 255 DEFINE(PACA_TRAP_SAVE, offsetof(struct paca_struct, trap_save));
263 DEFINE(PACA_NAPSTATELOST, offsetof(struct paca_struct, nap_state_lost)); 256 DEFINE(PACA_NAPSTATELOST, offsetof(struct paca_struct, nap_state_lost));
264 DEFINE(PACA_SPRG_VDSO, offsetof(struct paca_struct, sprg_vdso)); 257 DEFINE(PACA_SPRG_VDSO, offsetof(struct paca_struct, sprg_vdso));
258#else /* CONFIG_PPC64 */
259#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
260 DEFINE(ACCOUNT_STARTTIME,
261 offsetof(struct thread_info, accounting.starttime));
262 DEFINE(ACCOUNT_STARTTIME_USER,
263 offsetof(struct thread_info, accounting.starttime_user));
264 DEFINE(ACCOUNT_USER_TIME,
265 offsetof(struct thread_info, accounting.user_time));
266 DEFINE(ACCOUNT_SYSTEM_TIME,
267 offsetof(struct thread_info, accounting.system_time));
268#endif
265#endif /* CONFIG_PPC64 */ 269#endif /* CONFIG_PPC64 */
266 270
267 /* RTAS */ 271 /* RTAS */
@@ -275,12 +279,6 @@ int main(void)
275 /* Create extra stack space for SRR0 and SRR1 when calling prom/rtas. */ 279 /* Create extra stack space for SRR0 and SRR1 when calling prom/rtas. */
276 DEFINE(PROM_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16); 280 DEFINE(PROM_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
277 DEFINE(RTAS_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16); 281 DEFINE(RTAS_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
278
279 /* hcall statistics */
280 DEFINE(HCALL_STAT_SIZE, sizeof(struct hcall_stats));
281 DEFINE(HCALL_STAT_CALLS, offsetof(struct hcall_stats, num_calls));
282 DEFINE(HCALL_STAT_TB, offsetof(struct hcall_stats, tb_total));
283 DEFINE(HCALL_STAT_PURR, offsetof(struct hcall_stats, purr_total));
284#endif /* CONFIG_PPC64 */ 282#endif /* CONFIG_PPC64 */
285 DEFINE(GPR0, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[0])); 283 DEFINE(GPR0, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[0]));
286 DEFINE(GPR1, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[1])); 284 DEFINE(GPR1, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[1]));
@@ -298,23 +296,6 @@ int main(void)
298 DEFINE(GPR13, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[13])); 296 DEFINE(GPR13, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[13]));
299#ifndef CONFIG_PPC64 297#ifndef CONFIG_PPC64
300 DEFINE(GPR14, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[14])); 298 DEFINE(GPR14, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[14]));
301 DEFINE(GPR15, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[15]));
302 DEFINE(GPR16, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[16]));
303 DEFINE(GPR17, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[17]));
304 DEFINE(GPR18, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[18]));
305 DEFINE(GPR19, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[19]));
306 DEFINE(GPR20, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[20]));
307 DEFINE(GPR21, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[21]));
308 DEFINE(GPR22, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[22]));
309 DEFINE(GPR23, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[23]));
310 DEFINE(GPR24, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[24]));
311 DEFINE(GPR25, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[25]));
312 DEFINE(GPR26, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[26]));
313 DEFINE(GPR27, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[27]));
314 DEFINE(GPR28, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[28]));
315 DEFINE(GPR29, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[29]));
316 DEFINE(GPR30, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[30]));
317 DEFINE(GPR31, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[31]));
318#endif /* CONFIG_PPC64 */ 299#endif /* CONFIG_PPC64 */
319 /* 300 /*
320 * Note: these symbols include _ because they overlap with special 301 * Note: these symbols include _ because they overlap with special
@@ -332,7 +313,6 @@ int main(void)
332 DEFINE(RESULT, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, result)); 313 DEFINE(RESULT, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, result));
333 DEFINE(_TRAP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, trap)); 314 DEFINE(_TRAP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, trap));
334#ifndef CONFIG_PPC64 315#ifndef CONFIG_PPC64
335 DEFINE(_MQ, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, mq));
336 /* 316 /*
337 * The PowerPC 400-class & Book-E processors have neither the DAR 317 * The PowerPC 400-class & Book-E processors have neither the DAR
338 * nor the DSISR SPRs. Hence, we overload them to hold the similar 318 * nor the DSISR SPRs. Hence, we overload them to hold the similar
@@ -369,8 +349,6 @@ int main(void)
369 DEFINE(SAVED_KSP_LIMIT, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, saved_ksp_limit)); 349 DEFINE(SAVED_KSP_LIMIT, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, saved_ksp_limit));
370#endif 350#endif
371#endif 351#endif
372 DEFINE(CLONE_VM, CLONE_VM);
373 DEFINE(CLONE_UNTRACED, CLONE_UNTRACED);
374 352
375#ifndef CONFIG_PPC64 353#ifndef CONFIG_PPC64
376 DEFINE(MM_PGD, offsetof(struct mm_struct, pgd)); 354 DEFINE(MM_PGD, offsetof(struct mm_struct, pgd));
@@ -380,7 +358,6 @@ int main(void)
380 DEFINE(CPU_SPEC_FEATURES, offsetof(struct cpu_spec, cpu_features)); 358 DEFINE(CPU_SPEC_FEATURES, offsetof(struct cpu_spec, cpu_features));
381 DEFINE(CPU_SPEC_SETUP, offsetof(struct cpu_spec, cpu_setup)); 359 DEFINE(CPU_SPEC_SETUP, offsetof(struct cpu_spec, cpu_setup));
382 DEFINE(CPU_SPEC_RESTORE, offsetof(struct cpu_spec, cpu_restore)); 360 DEFINE(CPU_SPEC_RESTORE, offsetof(struct cpu_spec, cpu_restore));
383 DEFINE(CPU_DOWN_FLUSH, offsetof(struct cpu_spec, cpu_down_flush));
384 361
385 DEFINE(pbe_address, offsetof(struct pbe, address)); 362 DEFINE(pbe_address, offsetof(struct pbe, address));
386 DEFINE(pbe_orig_address, offsetof(struct pbe, orig_address)); 363 DEFINE(pbe_orig_address, offsetof(struct pbe, orig_address));
@@ -395,7 +372,6 @@ int main(void)
395 DEFINE(CFG_TB_ORIG_STAMP, offsetof(struct vdso_data, tb_orig_stamp)); 372 DEFINE(CFG_TB_ORIG_STAMP, offsetof(struct vdso_data, tb_orig_stamp));
396 DEFINE(CFG_TB_TICKS_PER_SEC, offsetof(struct vdso_data, tb_ticks_per_sec)); 373 DEFINE(CFG_TB_TICKS_PER_SEC, offsetof(struct vdso_data, tb_ticks_per_sec));
397 DEFINE(CFG_TB_TO_XS, offsetof(struct vdso_data, tb_to_xs)); 374 DEFINE(CFG_TB_TO_XS, offsetof(struct vdso_data, tb_to_xs));
398 DEFINE(CFG_STAMP_XSEC, offsetof(struct vdso_data, stamp_xsec));
399 DEFINE(CFG_TB_UPDATE_COUNT, offsetof(struct vdso_data, tb_update_count)); 375 DEFINE(CFG_TB_UPDATE_COUNT, offsetof(struct vdso_data, tb_update_count));
400 DEFINE(CFG_TZ_MINUTEWEST, offsetof(struct vdso_data, tz_minuteswest)); 376 DEFINE(CFG_TZ_MINUTEWEST, offsetof(struct vdso_data, tz_minuteswest));
401 DEFINE(CFG_TZ_DSTTIME, offsetof(struct vdso_data, tz_dsttime)); 377 DEFINE(CFG_TZ_DSTTIME, offsetof(struct vdso_data, tz_dsttime));
@@ -517,7 +493,6 @@ int main(void)
517 DEFINE(KVM_HOST_SDR1, offsetof(struct kvm, arch.host_sdr1)); 493 DEFINE(KVM_HOST_SDR1, offsetof(struct kvm, arch.host_sdr1));
518 DEFINE(KVM_NEED_FLUSH, offsetof(struct kvm, arch.need_tlb_flush.bits)); 494 DEFINE(KVM_NEED_FLUSH, offsetof(struct kvm, arch.need_tlb_flush.bits));
519 DEFINE(KVM_ENABLED_HCALLS, offsetof(struct kvm, arch.enabled_hcalls)); 495 DEFINE(KVM_ENABLED_HCALLS, offsetof(struct kvm, arch.enabled_hcalls));
520 DEFINE(KVM_LPCR, offsetof(struct kvm, arch.lpcr));
521 DEFINE(KVM_VRMA_SLB_V, offsetof(struct kvm, arch.vrma_slb_v)); 496 DEFINE(KVM_VRMA_SLB_V, offsetof(struct kvm, arch.vrma_slb_v));
522 DEFINE(VCPU_DSISR, offsetof(struct kvm_vcpu, arch.shregs.dsisr)); 497 DEFINE(VCPU_DSISR, offsetof(struct kvm_vcpu, arch.shregs.dsisr));
523 DEFINE(VCPU_DAR, offsetof(struct kvm_vcpu, arch.shregs.dar)); 498 DEFINE(VCPU_DAR, offsetof(struct kvm_vcpu, arch.shregs.dar));
@@ -528,7 +503,6 @@ int main(void)
528 DEFINE(VCPU_THREAD_CPU, offsetof(struct kvm_vcpu, arch.thread_cpu)); 503 DEFINE(VCPU_THREAD_CPU, offsetof(struct kvm_vcpu, arch.thread_cpu));
529#endif 504#endif
530#ifdef CONFIG_PPC_BOOK3S 505#ifdef CONFIG_PPC_BOOK3S
531 DEFINE(VCPU_VCPUID, offsetof(struct kvm_vcpu, vcpu_id));
532 DEFINE(VCPU_PURR, offsetof(struct kvm_vcpu, arch.purr)); 506 DEFINE(VCPU_PURR, offsetof(struct kvm_vcpu, arch.purr));
533 DEFINE(VCPU_SPURR, offsetof(struct kvm_vcpu, arch.spurr)); 507 DEFINE(VCPU_SPURR, offsetof(struct kvm_vcpu, arch.spurr));
534 DEFINE(VCPU_IC, offsetof(struct kvm_vcpu, arch.ic)); 508 DEFINE(VCPU_IC, offsetof(struct kvm_vcpu, arch.ic));
@@ -566,7 +540,6 @@ int main(void)
566 DEFINE(VCPU_CFAR, offsetof(struct kvm_vcpu, arch.cfar)); 540 DEFINE(VCPU_CFAR, offsetof(struct kvm_vcpu, arch.cfar));
567 DEFINE(VCPU_PPR, offsetof(struct kvm_vcpu, arch.ppr)); 541 DEFINE(VCPU_PPR, offsetof(struct kvm_vcpu, arch.ppr));
568 DEFINE(VCPU_FSCR, offsetof(struct kvm_vcpu, arch.fscr)); 542 DEFINE(VCPU_FSCR, offsetof(struct kvm_vcpu, arch.fscr));
569 DEFINE(VCPU_SHADOW_FSCR, offsetof(struct kvm_vcpu, arch.shadow_fscr));
570 DEFINE(VCPU_PSPB, offsetof(struct kvm_vcpu, arch.pspb)); 543 DEFINE(VCPU_PSPB, offsetof(struct kvm_vcpu, arch.pspb));
571 DEFINE(VCPU_EBBHR, offsetof(struct kvm_vcpu, arch.ebbhr)); 544 DEFINE(VCPU_EBBHR, offsetof(struct kvm_vcpu, arch.ebbhr));
572 DEFINE(VCPU_EBBRR, offsetof(struct kvm_vcpu, arch.ebbrr)); 545 DEFINE(VCPU_EBBRR, offsetof(struct kvm_vcpu, arch.ebbrr));
@@ -576,7 +549,6 @@ int main(void)
576 DEFINE(VCPU_TCSCR, offsetof(struct kvm_vcpu, arch.tcscr)); 549 DEFINE(VCPU_TCSCR, offsetof(struct kvm_vcpu, arch.tcscr));
577 DEFINE(VCPU_ACOP, offsetof(struct kvm_vcpu, arch.acop)); 550 DEFINE(VCPU_ACOP, offsetof(struct kvm_vcpu, arch.acop));
578 DEFINE(VCPU_WORT, offsetof(struct kvm_vcpu, arch.wort)); 551 DEFINE(VCPU_WORT, offsetof(struct kvm_vcpu, arch.wort));
579 DEFINE(VCPU_SHADOW_SRR1, offsetof(struct kvm_vcpu, arch.shadow_srr1));
580 DEFINE(VCORE_ENTRY_EXIT, offsetof(struct kvmppc_vcore, entry_exit_map)); 552 DEFINE(VCORE_ENTRY_EXIT, offsetof(struct kvmppc_vcore, entry_exit_map));
581 DEFINE(VCORE_IN_GUEST, offsetof(struct kvmppc_vcore, in_guest)); 553 DEFINE(VCORE_IN_GUEST, offsetof(struct kvmppc_vcore, in_guest));
582 DEFINE(VCORE_NAPPING_THREADS, offsetof(struct kvmppc_vcore, napping_threads)); 554 DEFINE(VCORE_NAPPING_THREADS, offsetof(struct kvmppc_vcore, napping_threads));
@@ -693,7 +665,6 @@ int main(void)
693 DEFINE(KVM_SPLIT_RPR, offsetof(struct kvm_split_mode, rpr)); 665 DEFINE(KVM_SPLIT_RPR, offsetof(struct kvm_split_mode, rpr));
694 DEFINE(KVM_SPLIT_PMMAR, offsetof(struct kvm_split_mode, pmmar)); 666 DEFINE(KVM_SPLIT_PMMAR, offsetof(struct kvm_split_mode, pmmar));
695 DEFINE(KVM_SPLIT_LDBAR, offsetof(struct kvm_split_mode, ldbar)); 667 DEFINE(KVM_SPLIT_LDBAR, offsetof(struct kvm_split_mode, ldbar));
696 DEFINE(KVM_SPLIT_SIZE, offsetof(struct kvm_split_mode, subcore_size));
697 DEFINE(KVM_SPLIT_DO_NAP, offsetof(struct kvm_split_mode, do_nap)); 668 DEFINE(KVM_SPLIT_DO_NAP, offsetof(struct kvm_split_mode, do_nap));
698 DEFINE(KVM_SPLIT_NAPPED, offsetof(struct kvm_split_mode, napped)); 669 DEFINE(KVM_SPLIT_NAPPED, offsetof(struct kvm_split_mode, napped));
699#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */ 670#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
@@ -756,7 +727,6 @@ int main(void)
756#ifdef CONFIG_KVM_BOOKE_HV 727#ifdef CONFIG_KVM_BOOKE_HV
757 DEFINE(VCPU_HOST_MAS4, offsetof(struct kvm_vcpu, arch.host_mas4)); 728 DEFINE(VCPU_HOST_MAS4, offsetof(struct kvm_vcpu, arch.host_mas4));
758 DEFINE(VCPU_HOST_MAS6, offsetof(struct kvm_vcpu, arch.host_mas6)); 729 DEFINE(VCPU_HOST_MAS6, offsetof(struct kvm_vcpu, arch.host_mas6));
759 DEFINE(VCPU_EPLC, offsetof(struct kvm_vcpu, arch.eplc));
760#endif 730#endif
761 731
762#ifdef CONFIG_KVM_EXIT_TIMING 732#ifdef CONFIG_KVM_EXIT_TIMING
@@ -783,5 +753,9 @@ int main(void)
783 753
784 DEFINE(PPC_DBELL_SERVER, PPC_DBELL_SERVER); 754 DEFINE(PPC_DBELL_SERVER, PPC_DBELL_SERVER);
785 755
756#ifdef CONFIG_PPC_8xx
757 DEFINE(VIRT_IMMR_BASE, (u64)__fix_to_virt(FIX_IMMR_BASE));
758#endif
759
786 return 0; 760 return 0;
787} 761}
diff --git a/arch/powerpc/kernel/cpu_setup_6xx.S b/arch/powerpc/kernel/cpu_setup_6xx.S
index f8cd9fba4d35..c5e5a94d9892 100644
--- a/arch/powerpc/kernel/cpu_setup_6xx.S
+++ b/arch/powerpc/kernel/cpu_setup_6xx.S
@@ -156,7 +156,7 @@ setup_7410_workarounds:
156 blr 156 blr
157 157
158/* 740/750/7400/7410 158/* 740/750/7400/7410
159 * Enable Store Gathering (SGE), Address Brodcast (ABE), 159 * Enable Store Gathering (SGE), Address Broadcast (ABE),
160 * Branch History Table (BHTE), Branch Target ICache (BTIC) 160 * Branch History Table (BHTE), Branch Target ICache (BTIC)
161 * Dynamic Power Management (DPM), Speculative (SPD) 161 * Dynamic Power Management (DPM), Speculative (SPD)
162 * Clear Instruction cache throttling (ICTC) 162 * Clear Instruction cache throttling (ICTC)
diff --git a/arch/powerpc/kernel/cpu_setup_power.S b/arch/powerpc/kernel/cpu_setup_power.S
index 584e119fa8b0..52ff3f025437 100644
--- a/arch/powerpc/kernel/cpu_setup_power.S
+++ b/arch/powerpc/kernel/cpu_setup_power.S
@@ -51,6 +51,7 @@ _GLOBAL(__setup_cpu_power8)
51 mflr r11 51 mflr r11
52 bl __init_FSCR 52 bl __init_FSCR
53 bl __init_PMU 53 bl __init_PMU
54 bl __init_PMU_ISA207
54 bl __init_hvmode_206 55 bl __init_hvmode_206
55 mtlr r11 56 mtlr r11
56 beqlr 57 beqlr
@@ -62,6 +63,7 @@ _GLOBAL(__setup_cpu_power8)
62 bl __init_HFSCR 63 bl __init_HFSCR
63 bl __init_tlb_power8 64 bl __init_tlb_power8
64 bl __init_PMU_HV 65 bl __init_PMU_HV
66 bl __init_PMU_HV_ISA207
65 mtlr r11 67 mtlr r11
66 blr 68 blr
67 69
@@ -69,6 +71,7 @@ _GLOBAL(__restore_cpu_power8)
69 mflr r11 71 mflr r11
70 bl __init_FSCR 72 bl __init_FSCR
71 bl __init_PMU 73 bl __init_PMU
74 bl __init_PMU_ISA207
72 mfmsr r3 75 mfmsr r3
73 rldicl. r0,r3,4,63 76 rldicl. r0,r3,4,63
74 mtlr r11 77 mtlr r11
@@ -81,12 +84,14 @@ _GLOBAL(__restore_cpu_power8)
81 bl __init_HFSCR 84 bl __init_HFSCR
82 bl __init_tlb_power8 85 bl __init_tlb_power8
83 bl __init_PMU_HV 86 bl __init_PMU_HV
87 bl __init_PMU_HV_ISA207
84 mtlr r11 88 mtlr r11
85 blr 89 blr
86 90
87_GLOBAL(__setup_cpu_power9) 91_GLOBAL(__setup_cpu_power9)
88 mflr r11 92 mflr r11
89 bl __init_FSCR 93 bl __init_FSCR
94 bl __init_PMU
90 bl __init_hvmode_206 95 bl __init_hvmode_206
91 mtlr r11 96 mtlr r11
92 beqlr 97 beqlr
@@ -94,15 +99,18 @@ _GLOBAL(__setup_cpu_power9)
94 mtspr SPRN_LPID,r0 99 mtspr SPRN_LPID,r0
95 mfspr r3,SPRN_LPCR 100 mfspr r3,SPRN_LPCR
96 ori r3, r3, LPCR_PECEDH 101 ori r3, r3, LPCR_PECEDH
102 ori r3, r3, LPCR_HVICE
97 bl __init_LPCR 103 bl __init_LPCR
98 bl __init_HFSCR 104 bl __init_HFSCR
99 bl __init_tlb_power9 105 bl __init_tlb_power9
106 bl __init_PMU_HV
100 mtlr r11 107 mtlr r11
101 blr 108 blr
102 109
103_GLOBAL(__restore_cpu_power9) 110_GLOBAL(__restore_cpu_power9)
104 mflr r11 111 mflr r11
105 bl __init_FSCR 112 bl __init_FSCR
113 bl __init_PMU
106 mfmsr r3 114 mfmsr r3
107 rldicl. r0,r3,4,63 115 rldicl. r0,r3,4,63
108 mtlr r11 116 mtlr r11
@@ -111,9 +119,11 @@ _GLOBAL(__restore_cpu_power9)
111 mtspr SPRN_LPID,r0 119 mtspr SPRN_LPID,r0
112 mfspr r3,SPRN_LPCR 120 mfspr r3,SPRN_LPCR
113 ori r3, r3, LPCR_PECEDH 121 ori r3, r3, LPCR_PECEDH
122 ori r3, r3, LPCR_HVICE
114 bl __init_LPCR 123 bl __init_LPCR
115 bl __init_HFSCR 124 bl __init_HFSCR
116 bl __init_tlb_power9 125 bl __init_tlb_power9
126 bl __init_PMU_HV
117 mtlr r11 127 mtlr r11
118 blr 128 blr
119 129
@@ -208,14 +218,22 @@ __init_tlb_power9:
208__init_PMU_HV: 218__init_PMU_HV:
209 li r5,0 219 li r5,0
210 mtspr SPRN_MMCRC,r5 220 mtspr SPRN_MMCRC,r5
221 blr
222
223__init_PMU_HV_ISA207:
224 li r5,0
211 mtspr SPRN_MMCRH,r5 225 mtspr SPRN_MMCRH,r5
212 blr 226 blr
213 227
214__init_PMU: 228__init_PMU:
215 li r5,0 229 li r5,0
216 mtspr SPRN_MMCRS,r5
217 mtspr SPRN_MMCRA,r5 230 mtspr SPRN_MMCRA,r5
218 mtspr SPRN_MMCR0,r5 231 mtspr SPRN_MMCR0,r5
219 mtspr SPRN_MMCR1,r5 232 mtspr SPRN_MMCR1,r5
220 mtspr SPRN_MMCR2,r5 233 mtspr SPRN_MMCR2,r5
221 blr 234 blr
235
236__init_PMU_ISA207:
237 li r5,0
238 mtspr SPRN_MMCRS,r5
239 blr
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index eeeacf6235a3..d81f826d1029 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -137,7 +137,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
137 .cpu_name = "POWER4 (gp)", 137 .cpu_name = "POWER4 (gp)",
138 .cpu_features = CPU_FTRS_POWER4, 138 .cpu_features = CPU_FTRS_POWER4,
139 .cpu_user_features = COMMON_USER_POWER4, 139 .cpu_user_features = COMMON_USER_POWER4,
140 .mmu_features = MMU_FTRS_POWER4, 140 .mmu_features = MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA,
141 .icache_bsize = 128, 141 .icache_bsize = 128,
142 .dcache_bsize = 128, 142 .dcache_bsize = 128,
143 .num_pmcs = 8, 143 .num_pmcs = 8,
@@ -152,7 +152,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
152 .cpu_name = "POWER4+ (gq)", 152 .cpu_name = "POWER4+ (gq)",
153 .cpu_features = CPU_FTRS_POWER4, 153 .cpu_features = CPU_FTRS_POWER4,
154 .cpu_user_features = COMMON_USER_POWER4, 154 .cpu_user_features = COMMON_USER_POWER4,
155 .mmu_features = MMU_FTRS_POWER4, 155 .mmu_features = MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA,
156 .icache_bsize = 128, 156 .icache_bsize = 128,
157 .dcache_bsize = 128, 157 .dcache_bsize = 128,
158 .num_pmcs = 8, 158 .num_pmcs = 8,
diff --git a/arch/powerpc/kernel/crash.c b/arch/powerpc/kernel/crash.c
index 2bb252c01f07..47b63de81f9b 100644
--- a/arch/powerpc/kernel/crash.c
+++ b/arch/powerpc/kernel/crash.c
@@ -48,8 +48,8 @@ int crashing_cpu = -1;
48static int time_to_dump; 48static int time_to_dump;
49 49
50#define CRASH_HANDLER_MAX 3 50#define CRASH_HANDLER_MAX 3
51/* NULL terminated list of shutdown handles */ 51/* List of shutdown handles */
52static crash_shutdown_t crash_shutdown_handles[CRASH_HANDLER_MAX+1]; 52static crash_shutdown_t crash_shutdown_handles[CRASH_HANDLER_MAX];
53static DEFINE_SPINLOCK(crash_handlers_lock); 53static DEFINE_SPINLOCK(crash_handlers_lock);
54 54
55static unsigned long crash_shutdown_buf[JMP_BUF_LEN]; 55static unsigned long crash_shutdown_buf[JMP_BUF_LEN];
@@ -65,7 +65,7 @@ static int handle_fault(struct pt_regs *regs)
65#ifdef CONFIG_SMP 65#ifdef CONFIG_SMP
66 66
67static atomic_t cpus_in_crash; 67static atomic_t cpus_in_crash;
68void crash_ipi_callback(struct pt_regs *regs) 68static void crash_ipi_callback(struct pt_regs *regs)
69{ 69{
70 static cpumask_t cpus_state_saved = CPU_MASK_NONE; 70 static cpumask_t cpus_state_saved = CPU_MASK_NONE;
71 71
@@ -288,9 +288,14 @@ int crash_shutdown_unregister(crash_shutdown_t handler)
288 rc = 1; 288 rc = 1;
289 } else { 289 } else {
290 /* Shift handles down */ 290 /* Shift handles down */
291 for (; crash_shutdown_handles[i]; i++) 291 for (; i < (CRASH_HANDLER_MAX - 1); i++)
292 crash_shutdown_handles[i] = 292 crash_shutdown_handles[i] =
293 crash_shutdown_handles[i+1]; 293 crash_shutdown_handles[i+1];
294 /*
295 * Reset last entry to NULL now that it has been shifted down,
296 * this will allow new handles to be added here.
297 */
298 crash_shutdown_handles[i] = NULL;
294 rc = 0; 299 rc = 0;
295 } 300 }
296 301
@@ -346,7 +351,7 @@ void default_machine_crash_shutdown(struct pt_regs *regs)
346 old_handler = __debugger_fault_handler; 351 old_handler = __debugger_fault_handler;
347 __debugger_fault_handler = handle_fault; 352 __debugger_fault_handler = handle_fault;
348 crash_shutdown_cpu = smp_processor_id(); 353 crash_shutdown_cpu = smp_processor_id();
349 for (i = 0; crash_shutdown_handles[i]; i++) { 354 for (i = 0; i < CRASH_HANDLER_MAX && crash_shutdown_handles[i]; i++) {
350 if (setjmp(crash_shutdown_buf) == 0) { 355 if (setjmp(crash_shutdown_buf) == 0) {
351 /* 356 /*
352 * Insert syncs and delay to ensure 357 * Insert syncs and delay to ensure
diff --git a/arch/powerpc/kernel/eeh_cache.c b/arch/powerpc/kernel/eeh_cache.c
index ddbcfab7efdf..d4cc26618809 100644
--- a/arch/powerpc/kernel/eeh_cache.c
+++ b/arch/powerpc/kernel/eeh_cache.c
@@ -114,9 +114,9 @@ static void eeh_addr_cache_print(struct pci_io_addr_cache *cache)
114 while (n) { 114 while (n) {
115 struct pci_io_addr_range *piar; 115 struct pci_io_addr_range *piar;
116 piar = rb_entry(n, struct pci_io_addr_range, rb_node); 116 piar = rb_entry(n, struct pci_io_addr_range, rb_node);
117 pr_debug("PCI: %s addr range %d [%lx-%lx]: %s\n", 117 pr_debug("PCI: %s addr range %d [%pap-%pap]: %s\n",
118 (piar->flags & IORESOURCE_IO) ? "i/o" : "mem", cnt, 118 (piar->flags & IORESOURCE_IO) ? "i/o" : "mem", cnt,
119 piar->addr_lo, piar->addr_hi, pci_name(piar->pcidev)); 119 &piar->addr_lo, &piar->addr_hi, pci_name(piar->pcidev));
120 cnt++; 120 cnt++;
121 n = rb_next(n); 121 n = rb_next(n);
122 } 122 }
@@ -159,8 +159,8 @@ eeh_addr_cache_insert(struct pci_dev *dev, resource_size_t alo,
159 piar->flags = flags; 159 piar->flags = flags;
160 160
161#ifdef DEBUG 161#ifdef DEBUG
162 pr_debug("PIAR: insert range=[%lx:%lx] dev=%s\n", 162 pr_debug("PIAR: insert range=[%pap:%pap] dev=%s\n",
163 alo, ahi, pci_name(dev)); 163 &alo, &ahi, pci_name(dev));
164#endif 164#endif
165 165
166 rb_link_node(&piar->rb_node, parent, p); 166 rb_link_node(&piar->rb_node, parent, p);
diff --git a/arch/powerpc/kernel/eeh_dev.c b/arch/powerpc/kernel/eeh_dev.c
index 7815095fe3d8..d6b2ca70d14d 100644
--- a/arch/powerpc/kernel/eeh_dev.c
+++ b/arch/powerpc/kernel/eeh_dev.c
@@ -44,14 +44,13 @@
44/** 44/**
45 * eeh_dev_init - Create EEH device according to OF node 45 * eeh_dev_init - Create EEH device according to OF node
46 * @pdn: PCI device node 46 * @pdn: PCI device node
47 * @data: PHB
48 * 47 *
49 * It will create EEH device according to the given OF node. The function 48 * It will create EEH device according to the given OF node. The function
50 * might be called by PCI emunation, DR, PHB hotplug. 49 * might be called by PCI emunation, DR, PHB hotplug.
51 */ 50 */
52void *eeh_dev_init(struct pci_dn *pdn, void *data) 51struct eeh_dev *eeh_dev_init(struct pci_dn *pdn)
53{ 52{
54 struct pci_controller *phb = data; 53 struct pci_controller *phb = pdn->phb;
55 struct eeh_dev *edev; 54 struct eeh_dev *edev;
56 55
57 /* Allocate EEH device */ 56 /* Allocate EEH device */
@@ -69,7 +68,7 @@ void *eeh_dev_init(struct pci_dn *pdn, void *data)
69 INIT_LIST_HEAD(&edev->list); 68 INIT_LIST_HEAD(&edev->list);
70 INIT_LIST_HEAD(&edev->rmv_list); 69 INIT_LIST_HEAD(&edev->rmv_list);
71 70
72 return NULL; 71 return edev;
73} 72}
74 73
75/** 74/**
@@ -81,16 +80,8 @@ void *eeh_dev_init(struct pci_dn *pdn, void *data)
81 */ 80 */
82void eeh_dev_phb_init_dynamic(struct pci_controller *phb) 81void eeh_dev_phb_init_dynamic(struct pci_controller *phb)
83{ 82{
84 struct pci_dn *root = phb->pci_data;
85
86 /* EEH PE for PHB */ 83 /* EEH PE for PHB */
87 eeh_phb_pe_create(phb); 84 eeh_phb_pe_create(phb);
88
89 /* EEH device for PHB */
90 eeh_dev_init(root, phb);
91
92 /* EEH devices for children OF nodes */
93 traverse_pci_dn(root, eeh_dev_init, phb);
94} 85}
95 86
96/** 87/**
@@ -106,8 +97,6 @@ static int __init eeh_dev_phb_init(void)
106 list_for_each_entry_safe(phb, tmp, &hose_list, list_node) 97 list_for_each_entry_safe(phb, tmp, &hose_list, list_node)
107 eeh_dev_phb_init_dynamic(phb); 98 eeh_dev_phb_init_dynamic(phb);
108 99
109 pr_info("EEH: devices created\n");
110
111 return 0; 100 return 0;
112} 101}
113 102
diff --git a/arch/powerpc/kernel/eeh_driver.c b/arch/powerpc/kernel/eeh_driver.c
index d70101e1e25c..5f36e8a70daa 100644
--- a/arch/powerpc/kernel/eeh_driver.c
+++ b/arch/powerpc/kernel/eeh_driver.c
@@ -139,7 +139,7 @@ static void eeh_enable_irq(struct pci_dev *dev)
139 * into it. 139 * into it.
140 * 140 *
141 * That's just wrong.The warning in the core code is 141 * That's just wrong.The warning in the core code is
142 * there to tell people to fix their assymetries in 142 * there to tell people to fix their asymmetries in
143 * their own code, not by abusing the core information 143 * their own code, not by abusing the core information
144 * to avoid it. 144 * to avoid it.
145 * 145 *
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 2405631e91a2..9899032230b4 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -175,6 +175,12 @@ transfer_to_handler:
175 addi r12,r12,-1 175 addi r12,r12,-1
176 stw r12,4(r11) 176 stw r12,4(r11)
177#endif 177#endif
178#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
179 CURRENT_THREAD_INFO(r9, r1)
180 tophys(r9, r9)
181 ACCOUNT_CPU_USER_ENTRY(r9, r11, r12)
182#endif
183
178 b 3f 184 b 3f
179 185
1802: /* if from kernel, check interrupted DOZE/NAP mode and 1862: /* if from kernel, check interrupted DOZE/NAP mode and
@@ -398,6 +404,13 @@ BEGIN_FTR_SECTION
398 lwarx r7,0,r1 404 lwarx r7,0,r1
399END_FTR_SECTION_IFSET(CPU_FTR_NEED_PAIRED_STWCX) 405END_FTR_SECTION_IFSET(CPU_FTR_NEED_PAIRED_STWCX)
400 stwcx. r0,0,r1 /* to clear the reservation */ 406 stwcx. r0,0,r1 /* to clear the reservation */
407#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
408 andi. r4,r8,MSR_PR
409 beq 3f
410 CURRENT_THREAD_INFO(r4, r1)
411 ACCOUNT_CPU_USER_EXIT(r4, r5, r7)
4123:
413#endif
401 lwz r4,_LINK(r1) 414 lwz r4,_LINK(r1)
402 lwz r5,_CCR(r1) 415 lwz r5,_CCR(r1)
403 mtlr r4 416 mtlr r4
@@ -769,6 +782,10 @@ restore_user:
769 andis. r10,r0,DBCR0_IDM@h 782 andis. r10,r0,DBCR0_IDM@h
770 bnel- load_dbcr0 783 bnel- load_dbcr0
771#endif 784#endif
785#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
786 CURRENT_THREAD_INFO(r9, r1)
787 ACCOUNT_CPU_USER_EXIT(r9, r10, r11)
788#endif
772 789
773 b restore 790 b restore
774 791
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 73e461a3dfbb..fcb2887f5a33 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -72,7 +72,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_TM)
72 std r0,GPR0(r1) 72 std r0,GPR0(r1)
73 std r10,GPR1(r1) 73 std r10,GPR1(r1)
74 beq 2f /* if from kernel mode */ 74 beq 2f /* if from kernel mode */
75 ACCOUNT_CPU_USER_ENTRY(r10, r11) 75 ACCOUNT_CPU_USER_ENTRY(r13, r10, r11)
762: std r2,GPR2(r1) 762: std r2,GPR2(r1)
77 std r3,GPR3(r1) 77 std r3,GPR3(r1)
78 mfcr r2 78 mfcr r2
@@ -246,7 +246,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_STCX_CHECKS_ADDRESS)
246 ld r4,_LINK(r1) 246 ld r4,_LINK(r1)
247 247
248 beq- 1f 248 beq- 1f
249 ACCOUNT_CPU_USER_EXIT(r11, r12) 249 ACCOUNT_CPU_USER_EXIT(r13, r11, r12)
250 250
251BEGIN_FTR_SECTION 251BEGIN_FTR_SECTION
252 HMT_MEDIUM_LOW 252 HMT_MEDIUM_LOW
@@ -453,7 +453,7 @@ _GLOBAL(ret_from_kernel_thread)
453 REST_NVGPRS(r1) 453 REST_NVGPRS(r1)
454 mtlr r14 454 mtlr r14
455 mr r3,r15 455 mr r3,r15
456#if defined(_CALL_ELF) && _CALL_ELF == 2 456#ifdef PPC64_ELF_ABI_v2
457 mr r12,r14 457 mr r12,r14
458#endif 458#endif
459 blrl 459 blrl
@@ -859,7 +859,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
859BEGIN_FTR_SECTION 859BEGIN_FTR_SECTION
860 mtspr SPRN_PPR,r2 /* Restore PPR */ 860 mtspr SPRN_PPR,r2 /* Restore PPR */
861END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR) 861END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
862 ACCOUNT_CPU_USER_EXIT(r2, r4) 862 ACCOUNT_CPU_USER_EXIT(r13, r2, r4)
863 REST_GPR(13, r1) 863 REST_GPR(13, r1)
8641: 8641:
865 mtspr SPRN_SRR1,r3 865 mtspr SPRN_SRR1,r3
diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S
index 488e6314f993..38a1f96430e1 100644
--- a/arch/powerpc/kernel/exceptions-64e.S
+++ b/arch/powerpc/kernel/exceptions-64e.S
@@ -386,7 +386,7 @@ exc_##n##_common: \
386 std r10,_NIP(r1); /* save SRR0 to stackframe */ \ 386 std r10,_NIP(r1); /* save SRR0 to stackframe */ \
387 std r11,_MSR(r1); /* save SRR1 to stackframe */ \ 387 std r11,_MSR(r1); /* save SRR1 to stackframe */ \
388 beq 2f; /* if from kernel mode */ \ 388 beq 2f; /* if from kernel mode */ \
389 ACCOUNT_CPU_USER_ENTRY(r10,r11);/* accounting (uses cr0+eq) */ \ 389 ACCOUNT_CPU_USER_ENTRY(r13,r10,r11);/* accounting (uses cr0+eq) */ \
3902: ld r3,excf+EX_R10(r13); /* get back r10 */ \ 3902: ld r3,excf+EX_R10(r13); /* get back r10 */ \
391 ld r4,excf+EX_R11(r13); /* get back r11 */ \ 391 ld r4,excf+EX_R11(r13); /* get back r11 */ \
392 mfspr r5,scratch; /* get back r13 */ \ 392 mfspr r5,scratch; /* get back r13 */ \
@@ -453,7 +453,7 @@ exc_##n##_bad_stack: \
453 sth r1,PACA_TRAP_SAVE(r13); /* store trap */ \ 453 sth r1,PACA_TRAP_SAVE(r13); /* store trap */ \
454 b bad_stack_book3e; /* bad stack error */ 454 b bad_stack_book3e; /* bad stack error */
455 455
456/* WARNING: If you change the layout of this stub, make sure you chcek 456/* WARNING: If you change the layout of this stub, make sure you check
457 * the debug exception handler which handles single stepping 457 * the debug exception handler which handles single stepping
458 * into exceptions from userspace, and the MM code in 458 * into exceptions from userspace, and the MM code in
459 * arch/powerpc/mm/tlb_nohash.c which patches the branch here 459 * arch/powerpc/mm/tlb_nohash.c which patches the branch here
@@ -1059,7 +1059,7 @@ fast_exception_return:
1059 andi. r6,r10,MSR_PR 1059 andi. r6,r10,MSR_PR
1060 REST_2GPRS(6, r1) 1060 REST_2GPRS(6, r1)
1061 beq 1f 1061 beq 1f
1062 ACCOUNT_CPU_USER_EXIT(r10, r11) 1062 ACCOUNT_CPU_USER_EXIT(r13, r10, r11)
1063 ld r0,GPR13(r1) 1063 ld r0,GPR13(r1)
1064 1064
10651: stdcx. r0,0,r1 /* to clear the reservation */ 10651: stdcx. r0,0,r1 /* to clear the reservation */
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index 8bcc1b457115..6200e4925d26 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -107,25 +107,9 @@ BEGIN_FTR_SECTION
107 beq 9f 107 beq 9f
108 108
109 cmpwi cr3,r13,2 109 cmpwi cr3,r13,2
110
111 /*
112 * Check if last bit of HSPGR0 is set. This indicates whether we are
113 * waking up from winkle.
114 */
115 GET_PACA(r13) 110 GET_PACA(r13)
116 clrldi r5,r13,63 111 bl pnv_restore_hyp_resource
117 clrrdi r13,r13,1
118 cmpwi cr4,r5,1
119 mtspr SPRN_HSPRG0,r13
120
121 lbz r0,PACA_THREAD_IDLE_STATE(r13)
122 cmpwi cr2,r0,PNV_THREAD_NAP
123 bgt cr2,8f /* Either sleep or Winkle */
124 112
125 /* Waking up from nap should not cause hypervisor state loss */
126 bgt cr3,.
127
128 /* Waking up from nap */
129 li r0,PNV_THREAD_RUNNING 113 li r0,PNV_THREAD_RUNNING
130 stb r0,PACA_THREAD_IDLE_STATE(r13) /* Clear thread state */ 114 stb r0,PACA_THREAD_IDLE_STATE(r13) /* Clear thread state */
131 115
@@ -143,13 +127,9 @@ BEGIN_FTR_SECTION
143 127
144 /* Return SRR1 from power7_nap() */ 128 /* Return SRR1 from power7_nap() */
145 mfspr r3,SPRN_SRR1 129 mfspr r3,SPRN_SRR1
146 beq cr3,2f 130 blt cr3,2f
147 b power7_wakeup_noloss 131 b pnv_wakeup_loss
1482: b power7_wakeup_loss 1322: b pnv_wakeup_noloss
149
150 /* Fast Sleep wakeup on PowerNV */
1518: GET_PACA(r13)
152 b power7_wakeup_tb_loss
153 133
1549: 1349:
155END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) 135END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
@@ -351,6 +331,12 @@ hv_doorbell_trampoline:
351 EXCEPTION_PROLOG_0(PACA_EXGEN) 331 EXCEPTION_PROLOG_0(PACA_EXGEN)
352 b h_doorbell_hv 332 b h_doorbell_hv
353 333
334 . = 0xea0
335hv_virt_irq_trampoline:
336 SET_SCRATCH0(r13)
337 EXCEPTION_PROLOG_0(PACA_EXGEN)
338 b h_virt_irq_hv
339
354 /* We need to deal with the Altivec unavailable exception 340 /* We need to deal with the Altivec unavailable exception
355 * here which is at 0xf20, thus in the middle of the 341 * here which is at 0xf20, thus in the middle of the
356 * prolog code of the PerformanceMonitor one. A little 342 * prolog code of the PerformanceMonitor one. A little
@@ -601,6 +587,9 @@ END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
601 MASKABLE_EXCEPTION_HV_OOL(0xe82, h_doorbell) 587 MASKABLE_EXCEPTION_HV_OOL(0xe82, h_doorbell)
602 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe82) 588 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe82)
603 589
590 MASKABLE_EXCEPTION_HV_OOL(0xea2, h_virt_irq)
591 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xea2)
592
604 /* moved from 0xf00 */ 593 /* moved from 0xf00 */
605 STD_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor) 594 STD_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor)
606 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf00) 595 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf00)
@@ -680,6 +669,8 @@ _GLOBAL(__replay_interrupt)
680BEGIN_FTR_SECTION 669BEGIN_FTR_SECTION
681 cmpwi r3,0xe80 670 cmpwi r3,0xe80
682 beq h_doorbell_common 671 beq h_doorbell_common
672 cmpwi r3,0xea0
673 beq h_virt_irq_common
683FTR_SECTION_ELSE 674FTR_SECTION_ELSE
684 cmpwi r3,0xa00 675 cmpwi r3,0xa00
685 beq doorbell_super_common 676 beq doorbell_super_common
@@ -754,6 +745,7 @@ kvmppc_skip_Hinterrupt:
754#else 745#else
755 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, unknown_exception) 746 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, unknown_exception)
756#endif 747#endif
748 STD_EXCEPTION_COMMON_ASYNC(0xea0, h_virt_irq, do_IRQ)
757 STD_EXCEPTION_COMMON_ASYNC(0xf00, performance_monitor, performance_monitor_exception) 749 STD_EXCEPTION_COMMON_ASYNC(0xf00, performance_monitor, performance_monitor_exception)
758 STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, instruction_breakpoint_exception) 750 STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, instruction_breakpoint_exception)
759 STD_EXCEPTION_COMMON(0x1502, denorm, unknown_exception) 751 STD_EXCEPTION_COMMON(0x1502, denorm, unknown_exception)
@@ -762,11 +754,6 @@ kvmppc_skip_Hinterrupt:
762#else 754#else
763 STD_EXCEPTION_COMMON(0x1700, altivec_assist, unknown_exception) 755 STD_EXCEPTION_COMMON(0x1700, altivec_assist, unknown_exception)
764#endif 756#endif
765#ifdef CONFIG_CBE_RAS
766 STD_EXCEPTION_COMMON(0x1200, cbe_system_error, cbe_system_error_exception)
767 STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, cbe_maintenance_exception)
768 STD_EXCEPTION_COMMON(0x1800, cbe_thermal, cbe_thermal_exception)
769#endif /* CONFIG_CBE_RAS */
770 757
771 /* 758 /*
772 * Relocation-on interrupts: A subset of the interrupts can be delivered 759 * Relocation-on interrupts: A subset of the interrupts can be delivered
@@ -877,6 +864,12 @@ h_doorbell_relon_trampoline:
877 EXCEPTION_PROLOG_0(PACA_EXGEN) 864 EXCEPTION_PROLOG_0(PACA_EXGEN)
878 b h_doorbell_relon_hv 865 b h_doorbell_relon_hv
879 866
867 . = 0x4ea0
868h_virt_irq_relon_trampoline:
869 SET_SCRATCH0(r13)
870 EXCEPTION_PROLOG_0(PACA_EXGEN)
871 b h_virt_irq_relon_hv
872
880 . = 0x4f00 873 . = 0x4f00
881performance_monitor_relon_pseries_trampoline: 874performance_monitor_relon_pseries_trampoline:
882 SET_SCRATCH0(r13) 875 SET_SCRATCH0(r13)
@@ -1131,12 +1124,10 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX)
1131 bl vsx_unavailable_exception 1124 bl vsx_unavailable_exception
1132 b ret_from_except 1125 b ret_from_except
1133 1126
1134 STD_EXCEPTION_COMMON(0xf60, facility_unavailable, facility_unavailable_exception)
1135 STD_EXCEPTION_COMMON(0xf80, hv_facility_unavailable, facility_unavailable_exception)
1136
1137 /* Equivalents to the above handlers for relocation-on interrupt vectors */ 1127 /* Equivalents to the above handlers for relocation-on interrupt vectors */
1138 STD_RELON_EXCEPTION_HV_OOL(0xe40, emulation_assist) 1128 STD_RELON_EXCEPTION_HV_OOL(0xe40, emulation_assist)
1139 MASKABLE_RELON_EXCEPTION_HV_OOL(0xe80, h_doorbell) 1129 MASKABLE_RELON_EXCEPTION_HV_OOL(0xe80, h_doorbell)
1130 MASKABLE_RELON_EXCEPTION_HV_OOL(0xea0, h_virt_irq)
1140 1131
1141 STD_RELON_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor) 1132 STD_RELON_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor)
1142 STD_RELON_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable) 1133 STD_RELON_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable)
@@ -1170,6 +1161,15 @@ fwnmi_data_area:
1170 . = 0x8000 1161 . = 0x8000
1171#endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */ 1162#endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */
1172 1163
1164 STD_EXCEPTION_COMMON(0xf60, facility_unavailable, facility_unavailable_exception)
1165 STD_EXCEPTION_COMMON(0xf80, hv_facility_unavailable, facility_unavailable_exception)
1166
1167#ifdef CONFIG_CBE_RAS
1168 STD_EXCEPTION_COMMON(0x1200, cbe_system_error, cbe_system_error_exception)
1169 STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, cbe_maintenance_exception)
1170 STD_EXCEPTION_COMMON(0x1800, cbe_thermal, cbe_thermal_exception)
1171#endif /* CONFIG_CBE_RAS */
1172
1173 .globl hmi_exception_early 1173 .globl hmi_exception_early
1174hmi_exception_early: 1174hmi_exception_early:
1175 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0xe60) 1175 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0xe60)
@@ -1289,7 +1289,7 @@ machine_check_handle_early:
1289 GET_PACA(r13) 1289 GET_PACA(r13)
1290 ld r1,PACAR1(r13) 1290 ld r1,PACAR1(r13)
1291 li r3,PNV_THREAD_NAP 1291 li r3,PNV_THREAD_NAP
1292 b power7_enter_nap_mode 1292 b pnv_enter_arch207_idle_mode
12934: 12934:
1294#endif 1294#endif
1295 /* 1295 /*
diff --git a/arch/powerpc/kernel/fadump.c b/arch/powerpc/kernel/fadump.c
index 3cb3b02a13dd..b3a663333d36 100644
--- a/arch/powerpc/kernel/fadump.c
+++ b/arch/powerpc/kernel/fadump.c
@@ -1009,8 +1009,7 @@ static int fadump_invalidate_dump(struct fadump_mem_struct *fdm)
1009 } while (wait_time); 1009 } while (wait_time);
1010 1010
1011 if (rc) { 1011 if (rc) {
1012 printk(KERN_ERR "Failed to invalidate firmware-assisted dump " 1012 pr_err("Failed to invalidate firmware-assisted dump registration. Unexpected error (%d).\n", rc);
1013 "rgistration. unexpected error(%d).\n", rc);
1014 return rc; 1013 return rc;
1015 } 1014 }
1016 fw_dump.dump_active = 0; 1015 fw_dump.dump_active = 0;
diff --git a/arch/powerpc/kernel/ftrace.c b/arch/powerpc/kernel/ftrace.c
index 1123a4d8d8dd..cc52d9795f88 100644
--- a/arch/powerpc/kernel/ftrace.c
+++ b/arch/powerpc/kernel/ftrace.c
@@ -144,6 +144,21 @@ __ftrace_make_nop(struct module *mod,
144 return -EINVAL; 144 return -EINVAL;
145 } 145 }
146 146
147#ifdef CC_USING_MPROFILE_KERNEL
148 /* When using -mkernel_profile there is no load to jump over */
149 pop = PPC_INST_NOP;
150
151 if (probe_kernel_read(&op, (void *)(ip - 4), 4)) {
152 pr_err("Fetching instruction at %lx failed.\n", ip - 4);
153 return -EFAULT;
154 }
155
156 /* We expect either a mflr r0, or a std r0, LRSAVE(r1) */
157 if (op != PPC_INST_MFLR && op != PPC_INST_STD_LR) {
158 pr_err("Unexpected instruction %08x around bl _mcount\n", op);
159 return -EINVAL;
160 }
161#else
147 /* 162 /*
148 * Our original call site looks like: 163 * Our original call site looks like:
149 * 164 *
@@ -170,24 +185,10 @@ __ftrace_make_nop(struct module *mod,
170 } 185 }
171 186
172 if (op != PPC_INST_LD_TOC) { 187 if (op != PPC_INST_LD_TOC) {
173 unsigned int inst; 188 pr_err("Expected %08x found %08x\n", PPC_INST_LD_TOC, op);
174 189 return -EINVAL;
175 if (probe_kernel_read(&inst, (void *)(ip - 4), 4)) {
176 pr_err("Fetching instruction at %lx failed.\n", ip - 4);
177 return -EFAULT;
178 }
179
180 /* We expect either a mlfr r0, or a std r0, LRSAVE(r1) */
181 if (inst != PPC_INST_MFLR && inst != PPC_INST_STD_LR) {
182 pr_err("Unexpected instructions around bl _mcount\n"
183 "when enabling dynamic ftrace!\t"
184 "(%08x,bl,%08x)\n", inst, op);
185 return -EINVAL;
186 }
187
188 /* When using -mkernel_profile there is no load to jump over */
189 pop = PPC_INST_NOP;
190 } 190 }
191#endif /* CC_USING_MPROFILE_KERNEL */
191 192
192 if (patch_instruction((unsigned int *)ip, pop)) { 193 if (patch_instruction((unsigned int *)ip, pop)) {
193 pr_err("Patching NOP failed.\n"); 194 pr_err("Patching NOP failed.\n");
@@ -608,7 +609,7 @@ unsigned long __init arch_syscall_addr(int nr)
608} 609}
609#endif /* CONFIG_FTRACE_SYSCALLS && CONFIG_PPC64 */ 610#endif /* CONFIG_FTRACE_SYSCALLS && CONFIG_PPC64 */
610 611
611#if defined(CONFIG_PPC64) && (!defined(_CALL_ELF) || _CALL_ELF != 2) 612#ifdef PPC64_ELF_ABI_v1
612char *arch_ftrace_match_adjust(char *str, const char *search) 613char *arch_ftrace_match_adjust(char *str, const char *search)
613{ 614{
614 if (str[0] == '.' && search[0] != '.') 615 if (str[0] == '.' && search[0] != '.')
@@ -616,4 +617,4 @@ char *arch_ftrace_match_adjust(char *str, const char *search)
616 else 617 else
617 return str; 618 return str;
618} 619}
619#endif /* defined(CONFIG_PPC64) && (!defined(_CALL_ELF) || _CALL_ELF != 2) */ 620#endif /* PPC64_ELF_ABI_v1 */
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 2d14774af6b4..f765b0434731 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -401,7 +401,7 @@ generic_secondary_common_init:
401 ld r12,CPU_SPEC_RESTORE(r23) 401 ld r12,CPU_SPEC_RESTORE(r23)
402 cmpdi 0,r12,0 402 cmpdi 0,r12,0
403 beq 3f 403 beq 3f
404#if !defined(_CALL_ELF) || _CALL_ELF != 2 404#ifdef PPC64_ELF_ABI_v1
405 ld r12,0(r12) 405 ld r12,0(r12)
406#endif 406#endif
407 mtctr r12 407 mtctr r12
@@ -941,7 +941,7 @@ start_here_multiplatform:
941 mtspr SPRN_SRR1,r4 941 mtspr SPRN_SRR1,r4
942 RFI 942 RFI
943 b . /* prevent speculative execution */ 943 b . /* prevent speculative execution */
944 944
945 /* This is where all platforms converge execution */ 945 /* This is where all platforms converge execution */
946 946
947start_here_common: 947start_here_common:
@@ -951,9 +951,6 @@ start_here_common:
951 /* Load the TOC (virtual address) */ 951 /* Load the TOC (virtual address) */
952 ld r2,PACATOC(r13) 952 ld r2,PACATOC(r13)
953 953
954 /* Do more system initializations in virtual mode */
955 bl setup_system
956
957 /* Mark interrupts soft and hard disabled (they might be enabled 954 /* Mark interrupts soft and hard disabled (they might be enabled
958 * in the PACA when doing hotplug) 955 * in the PACA when doing hotplug)
959 */ 956 */
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index 80c69472314e..43ddaae42baf 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -30,6 +30,7 @@
30#include <asm/ppc_asm.h> 30#include <asm/ppc_asm.h>
31#include <asm/asm-offsets.h> 31#include <asm/asm-offsets.h>
32#include <asm/ptrace.h> 32#include <asm/ptrace.h>
33#include <asm/fixmap.h>
33 34
34/* Macro to make the code more readable. */ 35/* Macro to make the code more readable. */
35#ifdef CONFIG_8xx_CPU6 36#ifdef CONFIG_8xx_CPU6
@@ -383,28 +384,57 @@ InstructionTLBMiss:
383 EXCEPTION_EPILOG_0 384 EXCEPTION_EPILOG_0
384 rfi 385 rfi
385 386
387/*
388 * Bottom part of DataStoreTLBMiss handler for IMMR area
389 * not enough space in the DataStoreTLBMiss area
390 */
391DTLBMissIMMR:
392 mtcr r10
393 /* Set 512k byte guarded page and mark it valid */
394 li r10, MD_PS512K | MD_GUARDED | MD_SVALID
395 MTSPR_CPU6(SPRN_MD_TWC, r10, r11)
396 mfspr r10, SPRN_IMMR /* Get current IMMR */
397 rlwinm r10, r10, 0, 0xfff80000 /* Get 512 kbytes boundary */
398 ori r10, r10, 0xf0 | MD_SPS16K | _PAGE_SHARED | _PAGE_DIRTY | \
399 _PAGE_PRESENT | _PAGE_NO_CACHE
400 MTSPR_CPU6(SPRN_MD_RPN, r10, r11) /* Update TLB entry */
401
402 li r11, RPN_PATTERN
403 mtspr SPRN_DAR, r11 /* Tag DAR */
404 EXCEPTION_EPILOG_0
405 rfi
406
386 . = 0x1200 407 . = 0x1200
387DataStoreTLBMiss: 408DataStoreTLBMiss:
388 mtspr SPRN_SPRG_SCRATCH2, r3
389 EXCEPTION_PROLOG_0 409 EXCEPTION_PROLOG_0
390 mfcr r3 410 mfcr r10
391 411
392 /* If we are faulting a kernel address, we have to use the 412 /* If we are faulting a kernel address, we have to use the
393 * kernel page tables. 413 * kernel page tables.
394 */ 414 */
395 mfspr r10, SPRN_MD_EPN 415 mfspr r11, SPRN_MD_EPN
396 IS_KERNEL(r11, r10) 416 rlwinm r11, r11, 16, 0xfff8
417#ifndef CONFIG_PIN_TLB_IMMR
418 cmpli cr0, r11, VIRT_IMMR_BASE@h
419#endif
420 cmpli cr7, r11, PAGE_OFFSET@h
421#ifndef CONFIG_PIN_TLB_IMMR
422_ENTRY(DTLBMiss_jmp)
423 beq- DTLBMissIMMR
424#endif
425 bge- cr7, 4f
426
397 mfspr r11, SPRN_M_TW /* Get level 1 table */ 427 mfspr r11, SPRN_M_TW /* Get level 1 table */
398 BRANCH_UNLESS_KERNEL(3f)
399 lis r11, (swapper_pg_dir-PAGE_OFFSET)@ha
4003: 4283:
429 mtcr r10
430#ifdef CONFIG_8xx_CPU6
431 mtspr SPRN_SPRG_SCRATCH2, r3
432#endif
433 mfspr r10, SPRN_MD_EPN
401 434
402 /* Insert level 1 index */ 435 /* Insert level 1 index */
403 rlwimi r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29 436 rlwimi r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
404 lwz r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11) /* Get the level 1 entry */ 437 lwz r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11) /* Get the level 1 entry */
405 mtcr r11
406 bt- 28,DTLBMiss8M /* bit 28 = Large page (8M) */
407 mtcr r3
408 438
409 /* We have a pte table, so load fetch the pte from the table. 439 /* We have a pte table, so load fetch the pte from the table.
410 */ 440 */
@@ -452,29 +482,30 @@ DataStoreTLBMiss:
452 MTSPR_CPU6(SPRN_MD_RPN, r10, r3) /* Update TLB entry */ 482 MTSPR_CPU6(SPRN_MD_RPN, r10, r3) /* Update TLB entry */
453 483
454 /* Restore registers */ 484 /* Restore registers */
485#ifdef CONFIG_8xx_CPU6
455 mfspr r3, SPRN_SPRG_SCRATCH2 486 mfspr r3, SPRN_SPRG_SCRATCH2
487#endif
456 mtspr SPRN_DAR, r11 /* Tag DAR */ 488 mtspr SPRN_DAR, r11 /* Tag DAR */
457 EXCEPTION_EPILOG_0 489 EXCEPTION_EPILOG_0
458 rfi 490 rfi
459 491
460DTLBMiss8M: 4924:
461 mtcr r3 493_ENTRY(DTLBMiss_cmp)
462 ori r11, r11, MD_SVALID 494 cmpli cr0, r11, (PAGE_OFFSET + 0x1800000)@h
463 MTSPR_CPU6(SPRN_MD_TWC, r11, r3) 495 lis r11, (swapper_pg_dir-PAGE_OFFSET)@ha
464#ifdef CONFIG_PPC_16K_PAGES 496 bge- 3b
465 /* 497
466 * In 16k pages mode, each PGD entry defines a 64M block. 498 mtcr r10
467 * Here we select the 8M page within the block. 499 /* Set 8M byte page and mark it valid */
468 */ 500 li r10, MD_PS8MEG | MD_SVALID
469 rlwimi r11, r10, 0, 0x03800000 501 MTSPR_CPU6(SPRN_MD_TWC, r10, r11)
470#endif 502 mfspr r10, SPRN_MD_EPN
471 rlwinm r10, r11, 0, 0xff800000 503 rlwinm r10, r10, 0, 0x0f800000 /* 8xx supports max 256Mb RAM */
472 ori r10, r10, 0xf0 | MD_SPS16K | _PAGE_SHARED | _PAGE_DIRTY | \ 504 ori r10, r10, 0xf0 | MD_SPS16K | _PAGE_SHARED | _PAGE_DIRTY | \
473 _PAGE_PRESENT 505 _PAGE_PRESENT
474 MTSPR_CPU6(SPRN_MD_RPN, r10, r3) /* Update TLB entry */ 506 MTSPR_CPU6(SPRN_MD_RPN, r10, r11) /* Update TLB entry */
475 507
476 li r11, RPN_PATTERN 508 li r11, RPN_PATTERN
477 mfspr r3, SPRN_SPRG_SCRATCH2
478 mtspr SPRN_DAR, r11 /* Tag DAR */ 509 mtspr SPRN_DAR, r11 /* Tag DAR */
479 EXCEPTION_EPILOG_0 510 EXCEPTION_EPILOG_0
480 rfi 511 rfi
@@ -553,12 +584,14 @@ FixupDAR:/* Entry point for dcbx workaround. */
553 IS_KERNEL(r11, r10) 584 IS_KERNEL(r11, r10)
554 mfspr r11, SPRN_M_TW /* Get level 1 table */ 585 mfspr r11, SPRN_M_TW /* Get level 1 table */
555 BRANCH_UNLESS_KERNEL(3f) 586 BRANCH_UNLESS_KERNEL(3f)
587 rlwinm r11, r10, 16, 0xfff8
588_ENTRY(FixupDAR_cmp)
589 cmpli cr7, r11, (PAGE_OFFSET + 0x1800000)@h
590 blt- cr7, 200f
556 lis r11, (swapper_pg_dir-PAGE_OFFSET)@ha 591 lis r11, (swapper_pg_dir-PAGE_OFFSET)@ha
557 /* Insert level 1 index */ 592 /* Insert level 1 index */
5583: rlwimi r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29 5933: rlwimi r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
559 lwz r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11) /* Get the level 1 entry */ 594 lwz r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11) /* Get the level 1 entry */
560 mtcr r11
561 bt 28,200f /* bit 28 = Large page (8M) */
562 rlwinm r11, r11,0,0,19 /* Extract page descriptor page address */ 595 rlwinm r11, r11,0,0,19 /* Extract page descriptor page address */
563 /* Insert level 2 index */ 596 /* Insert level 2 index */
564 rlwimi r11, r10, 32 - (PAGE_SHIFT - 2), 32 - PAGE_SHIFT, 29 597 rlwimi r11, r10, 32 - (PAGE_SHIFT - 2), 32 - PAGE_SHIFT, 29
@@ -584,8 +617,8 @@ FixupDAR:/* Entry point for dcbx workaround. */
584141: mfspr r10,SPRN_SPRG_SCRATCH2 617141: mfspr r10,SPRN_SPRG_SCRATCH2
585 b DARFixed /* Nope, go back to normal TLB processing */ 618 b DARFixed /* Nope, go back to normal TLB processing */
586 619
587 /* concat physical page address(r11) and page offset(r10) */ 620 /* create physical page address from effective address */
588200: rlwimi r11, r10, 0, 32 - (PAGE_SHIFT << 1), 31 621200: tophys(r11, r10)
589 b 201b 622 b 201b
590 623
591144: mfspr r10, SPRN_DSISR 624144: mfspr r10, SPRN_DSISR
@@ -763,10 +796,18 @@ start_here:
763 * virtual to physical. Also, set the cache mode since that is defined 796 * virtual to physical. Also, set the cache mode since that is defined
764 * by TLB entries and perform any additional mapping (like of the IMMR). 797 * by TLB entries and perform any additional mapping (like of the IMMR).
765 * If configured to pin some TLBs, we pin the first 8 Mbytes of kernel, 798 * If configured to pin some TLBs, we pin the first 8 Mbytes of kernel,
766 * 24 Mbytes of data, and the 8M IMMR space. Anything not covered by 799 * 24 Mbytes of data, and the 512k IMMR space. Anything not covered by
767 * these mappings is mapped by page tables. 800 * these mappings is mapped by page tables.
768 */ 801 */
769initial_mmu: 802initial_mmu:
803 li r8, 0
804 mtspr SPRN_MI_CTR, r8 /* remove PINNED ITLB entries */
805 lis r10, MD_RESETVAL@h
806#ifndef CONFIG_8xx_COPYBACK
807 oris r10, r10, MD_WTDEF@h
808#endif
809 mtspr SPRN_MD_CTR, r10 /* remove PINNED DTLB entries */
810
770 tlbia /* Invalidate all TLB entries */ 811 tlbia /* Invalidate all TLB entries */
771/* Always pin the first 8 MB ITLB to prevent ITLB 812/* Always pin the first 8 MB ITLB to prevent ITLB
772 misses while mucking around with SRR0/SRR1 in asm 813 misses while mucking around with SRR0/SRR1 in asm
@@ -777,34 +818,20 @@ initial_mmu:
777 mtspr SPRN_MI_CTR, r8 /* Set instruction MMU control */ 818 mtspr SPRN_MI_CTR, r8 /* Set instruction MMU control */
778 819
779#ifdef CONFIG_PIN_TLB 820#ifdef CONFIG_PIN_TLB
780 lis r10, (MD_RSV4I | MD_RESETVAL)@h 821 oris r10, r10, MD_RSV4I@h
781 ori r10, r10, 0x1c00
782 mr r8, r10
783#else
784 lis r10, MD_RESETVAL@h
785#endif
786#ifndef CONFIG_8xx_COPYBACK
787 oris r10, r10, MD_WTDEF@h
788#endif
789 mtspr SPRN_MD_CTR, r10 /* Set data TLB control */ 822 mtspr SPRN_MD_CTR, r10 /* Set data TLB control */
823#endif
790 824
791 /* Now map the lower 8 Meg into the TLBs. For this quick hack, 825 /* Now map the lower 8 Meg into the ITLB. */
792 * we can load the instruction and data TLB registers with the
793 * same values.
794 */
795 lis r8, KERNELBASE@h /* Create vaddr for TLB */ 826 lis r8, KERNELBASE@h /* Create vaddr for TLB */
796 ori r8, r8, MI_EVALID /* Mark it valid */ 827 ori r8, r8, MI_EVALID /* Mark it valid */
797 mtspr SPRN_MI_EPN, r8 828 mtspr SPRN_MI_EPN, r8
798 mtspr SPRN_MD_EPN, r8
799 li r8, MI_PS8MEG | (2 << 5) /* Set 8M byte page, APG 2 */ 829 li r8, MI_PS8MEG | (2 << 5) /* Set 8M byte page, APG 2 */
800 ori r8, r8, MI_SVALID /* Make it valid */ 830 ori r8, r8, MI_SVALID /* Make it valid */
801 mtspr SPRN_MI_TWC, r8 831 mtspr SPRN_MI_TWC, r8
802 li r8, MI_PS8MEG /* Set 8M byte page, APG 0 */
803 ori r8, r8, MI_SVALID /* Make it valid */
804 mtspr SPRN_MD_TWC, r8
805 li r8, MI_BOOTINIT /* Create RPN for address 0 */ 832 li r8, MI_BOOTINIT /* Create RPN for address 0 */
806 mtspr SPRN_MI_RPN, r8 /* Store TLB entry */ 833 mtspr SPRN_MI_RPN, r8 /* Store TLB entry */
807 mtspr SPRN_MD_RPN, r8 834
808 lis r8, MI_APG_INIT@h /* Set protection modes */ 835 lis r8, MI_APG_INIT@h /* Set protection modes */
809 ori r8, r8, MI_APG_INIT@l 836 ori r8, r8, MI_APG_INIT@l
810 mtspr SPRN_MI_AP, r8 837 mtspr SPRN_MI_AP, r8
@@ -812,51 +839,25 @@ initial_mmu:
812 ori r8, r8, MD_APG_INIT@l 839 ori r8, r8, MD_APG_INIT@l
813 mtspr SPRN_MD_AP, r8 840 mtspr SPRN_MD_AP, r8
814 841
815 /* Map another 8 MByte at the IMMR to get the processor 842 /* Map a 512k page for the IMMR to get the processor
816 * internal registers (among other things). 843 * internal registers (among other things).
817 */ 844 */
818#ifdef CONFIG_PIN_TLB 845#ifdef CONFIG_PIN_TLB_IMMR
819 addi r10, r10, 0x0100 846 ori r10, r10, 0x1c00
820 mtspr SPRN_MD_CTR, r10 847 mtspr SPRN_MD_CTR, r10
821#endif 848
822 mfspr r9, 638 /* Get current IMMR */ 849 mfspr r9, 638 /* Get current IMMR */
823 andis. r9, r9, 0xff80 /* Get 8Mbyte boundary */ 850 andis. r9, r9, 0xfff8 /* Get 512 kbytes boundary */
824 851
825 mr r8, r9 /* Create vaddr for TLB */ 852 lis r8, VIRT_IMMR_BASE@h /* Create vaddr for TLB */
826 ori r8, r8, MD_EVALID /* Mark it valid */ 853 ori r8, r8, MD_EVALID /* Mark it valid */
827 mtspr SPRN_MD_EPN, r8 854 mtspr SPRN_MD_EPN, r8
828 li r8, MD_PS8MEG /* Set 8M byte page */ 855 li r8, MD_PS512K | MD_GUARDED /* Set 512k byte page */
829 ori r8, r8, MD_SVALID /* Make it valid */ 856 ori r8, r8, MD_SVALID /* Make it valid */
830 mtspr SPRN_MD_TWC, r8 857 mtspr SPRN_MD_TWC, r8
831 mr r8, r9 /* Create paddr for TLB */ 858 mr r8, r9 /* Create paddr for TLB */
832 ori r8, r8, MI_BOOTINIT|0x2 /* Inhibit cache -- Cort */ 859 ori r8, r8, MI_BOOTINIT|0x2 /* Inhibit cache -- Cort */
833 mtspr SPRN_MD_RPN, r8 860 mtspr SPRN_MD_RPN, r8
834
835#ifdef CONFIG_PIN_TLB
836 /* Map two more 8M kernel data pages.
837 */
838 addi r10, r10, 0x0100
839 mtspr SPRN_MD_CTR, r10
840
841 lis r8, KERNELBASE@h /* Create vaddr for TLB */
842 addis r8, r8, 0x0080 /* Add 8M */
843 ori r8, r8, MI_EVALID /* Mark it valid */
844 mtspr SPRN_MD_EPN, r8
845 li r9, MI_PS8MEG /* Set 8M byte page */
846 ori r9, r9, MI_SVALID /* Make it valid */
847 mtspr SPRN_MD_TWC, r9
848 li r11, MI_BOOTINIT /* Create RPN for address 0 */
849 addis r11, r11, 0x0080 /* Add 8M */
850 mtspr SPRN_MD_RPN, r11
851
852 addi r10, r10, 0x0100
853 mtspr SPRN_MD_CTR, r10
854
855 addis r8, r8, 0x0080 /* Add 8M */
856 mtspr SPRN_MD_EPN, r8
857 mtspr SPRN_MD_TWC, r9
858 addis r11, r11, 0x0080 /* Add 8M */
859 mtspr SPRN_MD_RPN, r11
860#endif 861#endif
861 862
862 /* Since the cache is enabled according to the information we 863 /* Since the cache is enabled according to the information we
diff --git a/arch/powerpc/kernel/idle_power7.S b/arch/powerpc/kernel/idle_book3s.S
index 470ceebd2d23..335eb6cedae5 100644
--- a/arch/powerpc/kernel/idle_power7.S
+++ b/arch/powerpc/kernel/idle_book3s.S
@@ -1,5 +1,6 @@
1/* 1/*
2 * This file contains the power_save function for Power7 CPUs. 2 * This file contains idle entry/exit functions for POWER7,
3 * POWER8 and POWER9 CPUs.
3 * 4 *
4 * This program is free software; you can redistribute it and/or 5 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License 6 * modify it under the terms of the GNU General Public License
@@ -20,6 +21,7 @@
20#include <asm/opal.h> 21#include <asm/opal.h>
21#include <asm/cpuidle.h> 22#include <asm/cpuidle.h>
22#include <asm/book3s/64/mmu-hash.h> 23#include <asm/book3s/64/mmu-hash.h>
24#include <asm/mmu.h>
23 25
24#undef DEBUG 26#undef DEBUG
25 27
@@ -36,6 +38,11 @@
36#define _AMOR GPR9 38#define _AMOR GPR9
37#define _WORT GPR10 39#define _WORT GPR10
38#define _WORC GPR11 40#define _WORC GPR11
41#define _PTCR GPR12
42
43#define PSSCR_HV_TEMPLATE PSSCR_ESL | PSSCR_EC | \
44 PSSCR_PSLL_MASK | PSSCR_TR_MASK | \
45 PSSCR_MTL_MASK
39 46
40/* Idle state entry routines */ 47/* Idle state entry routines */
41 48
@@ -52,6 +59,45 @@
52 .text 59 .text
53 60
54/* 61/*
62 * Used by threads before entering deep idle states. Saves SPRs
63 * in interrupt stack frame
64 */
65save_sprs_to_stack:
66 /*
67 * Note all register i.e per-core, per-subcore or per-thread is saved
68 * here since any thread in the core might wake up first
69 */
70BEGIN_FTR_SECTION
71 mfspr r3,SPRN_PTCR
72 std r3,_PTCR(r1)
73 /*
74 * Note - SDR1 is dropped in Power ISA v3. Hence not restoring
75 * SDR1 here
76 */
77FTR_SECTION_ELSE
78 mfspr r3,SPRN_SDR1
79 std r3,_SDR1(r1)
80ALT_FTR_SECTION_END_IFSET(CPU_FTR_ARCH_300)
81 mfspr r3,SPRN_RPR
82 std r3,_RPR(r1)
83 mfspr r3,SPRN_SPURR
84 std r3,_SPURR(r1)
85 mfspr r3,SPRN_PURR
86 std r3,_PURR(r1)
87 mfspr r3,SPRN_TSCR
88 std r3,_TSCR(r1)
89 mfspr r3,SPRN_DSCR
90 std r3,_DSCR(r1)
91 mfspr r3,SPRN_AMOR
92 std r3,_AMOR(r1)
93 mfspr r3,SPRN_WORT
94 std r3,_WORT(r1)
95 mfspr r3,SPRN_WORC
96 std r3,_WORC(r1)
97
98 blr
99
100/*
55 * Used by threads when the lock bit of core_idle_state is set. 101 * Used by threads when the lock bit of core_idle_state is set.
56 * Threads will spin in HMT_LOW until the lock bit is cleared. 102 * Threads will spin in HMT_LOW until the lock bit is cleared.
57 * r14 - pointer to core_idle_state 103 * r14 - pointer to core_idle_state
@@ -69,13 +115,16 @@ core_idle_lock_held:
69 115
70/* 116/*
71 * Pass requested state in r3: 117 * Pass requested state in r3:
72 * r3 - PNV_THREAD_NAP/SLEEP/WINKLE 118 * r3 - PNV_THREAD_NAP/SLEEP/WINKLE in POWER8
119 * - Requested STOP state in POWER9
73 * 120 *
74 * To check IRQ_HAPPENED in r4 121 * To check IRQ_HAPPENED in r4
75 * 0 - don't check 122 * 0 - don't check
76 * 1 - check 123 * 1 - check
124 *
125 * Address to 'rfid' to in r5
77 */ 126 */
78_GLOBAL(power7_powersave_common) 127_GLOBAL(pnv_powersave_common)
79 /* Use r3 to pass state nap/sleep/winkle */ 128 /* Use r3 to pass state nap/sleep/winkle */
80 /* NAP is a state loss, we create a regs frame on the 129 /* NAP is a state loss, we create a regs frame on the
81 * stack, fill it up with the state we care about and 130 * stack, fill it up with the state we care about and
@@ -126,28 +175,28 @@ _GLOBAL(power7_powersave_common)
126 std r9,_MSR(r1) 175 std r9,_MSR(r1)
127 std r1,PACAR1(r13) 176 std r1,PACAR1(r13)
128 177
178#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
179 /* Tell KVM we're entering idle */
180 li r4,KVM_HWTHREAD_IN_IDLE
181 stb r4,HSTATE_HWTHREAD_STATE(r13)
182#endif
183
129 /* 184 /*
130 * Go to real mode to do the nap, as required by the architecture. 185 * Go to real mode to do the nap, as required by the architecture.
131 * Also, we need to be in real mode before setting hwthread_state, 186 * Also, we need to be in real mode before setting hwthread_state,
132 * because as soon as we do that, another thread can switch 187 * because as soon as we do that, another thread can switch
133 * the MMU context to the guest. 188 * the MMU context to the guest.
134 */ 189 */
135 LOAD_REG_IMMEDIATE(r5, MSR_IDLE) 190 LOAD_REG_IMMEDIATE(r7, MSR_IDLE)
136 li r6, MSR_RI 191 li r6, MSR_RI
137 andc r6, r9, r6 192 andc r6, r9, r6
138 LOAD_REG_ADDR(r7, power7_enter_nap_mode)
139 mtmsrd r6, 1 /* clear RI before setting SRR0/1 */ 193 mtmsrd r6, 1 /* clear RI before setting SRR0/1 */
140 mtspr SPRN_SRR0, r7 194 mtspr SPRN_SRR0, r5
141 mtspr SPRN_SRR1, r5 195 mtspr SPRN_SRR1, r7
142 rfid 196 rfid
143 197
144 .globl power7_enter_nap_mode 198 .globl pnv_enter_arch207_idle_mode
145power7_enter_nap_mode: 199pnv_enter_arch207_idle_mode:
146#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
147 /* Tell KVM we're napping */
148 li r4,KVM_HWTHREAD_IN_NAP
149 stb r4,HSTATE_HWTHREAD_STATE(r13)
150#endif
151 stb r3,PACA_THREAD_IDLE_STATE(r13) 200 stb r3,PACA_THREAD_IDLE_STATE(r13)
152 cmpwi cr3,r3,PNV_THREAD_SLEEP 201 cmpwi cr3,r3,PNV_THREAD_SLEEP
153 bge cr3,2f 202 bge cr3,2f
@@ -196,8 +245,7 @@ fastsleep_workaround_at_entry:
196 /* Fast sleep workaround */ 245 /* Fast sleep workaround */
197 li r3,1 246 li r3,1
198 li r4,1 247 li r4,1
199 li r0,OPAL_CONFIG_CPU_IDLE_STATE 248 bl opal_rm_config_cpu_idle_state
200 bl opal_call_realmode
201 249
202 /* Clear Lock bit */ 250 /* Clear Lock bit */
203 li r0,0 251 li r0,0
@@ -206,30 +254,45 @@ fastsleep_workaround_at_entry:
206 b common_enter 254 b common_enter
207 255
208enter_winkle: 256enter_winkle:
209 /* 257 bl save_sprs_to_stack
210 * Note all register i.e per-core, per-subcore or per-thread is saved 258
211 * here since any thread in the core might wake up first
212 */
213 mfspr r3,SPRN_SDR1
214 std r3,_SDR1(r1)
215 mfspr r3,SPRN_RPR
216 std r3,_RPR(r1)
217 mfspr r3,SPRN_SPURR
218 std r3,_SPURR(r1)
219 mfspr r3,SPRN_PURR
220 std r3,_PURR(r1)
221 mfspr r3,SPRN_TSCR
222 std r3,_TSCR(r1)
223 mfspr r3,SPRN_DSCR
224 std r3,_DSCR(r1)
225 mfspr r3,SPRN_AMOR
226 std r3,_AMOR(r1)
227 mfspr r3,SPRN_WORT
228 std r3,_WORT(r1)
229 mfspr r3,SPRN_WORC
230 std r3,_WORC(r1)
231 IDLE_STATE_ENTER_SEQ(PPC_WINKLE) 259 IDLE_STATE_ENTER_SEQ(PPC_WINKLE)
232 260
261/*
262 * r3 - requested stop state
263 */
264power_enter_stop:
265/*
266 * Check if the requested state is a deep idle state.
267 */
268 LOAD_REG_ADDRBASE(r5,pnv_first_deep_stop_state)
269 ld r4,ADDROFF(pnv_first_deep_stop_state)(r5)
270 cmpd r3,r4
271 bge 2f
272 IDLE_STATE_ENTER_SEQ(PPC_STOP)
2732:
274/*
275 * Entering deep idle state.
276 * Clear thread bit in PACA_CORE_IDLE_STATE, save SPRs to
277 * stack and enter stop
278 */
279 lbz r7,PACA_THREAD_MASK(r13)
280 ld r14,PACA_CORE_IDLE_STATE_PTR(r13)
281
282lwarx_loop_stop:
283 lwarx r15,0,r14
284 andi. r9,r15,PNV_CORE_IDLE_LOCK_BIT
285 bnel core_idle_lock_held
286 andc r15,r15,r7 /* Clear thread bit */
287
288 stwcx. r15,0,r14
289 bne- lwarx_loop_stop
290 isync
291
292 bl save_sprs_to_stack
293
294 IDLE_STATE_ENTER_SEQ(PPC_STOP)
295
233_GLOBAL(power7_idle) 296_GLOBAL(power7_idle)
234 /* Now check if user or arch enabled NAP mode */ 297 /* Now check if user or arch enabled NAP mode */
235 LOAD_REG_ADDRBASE(r3,powersave_nap) 298 LOAD_REG_ADDRBASE(r3,powersave_nap)
@@ -242,19 +305,22 @@ _GLOBAL(power7_idle)
242_GLOBAL(power7_nap) 305_GLOBAL(power7_nap)
243 mr r4,r3 306 mr r4,r3
244 li r3,PNV_THREAD_NAP 307 li r3,PNV_THREAD_NAP
245 b power7_powersave_common 308 LOAD_REG_ADDR(r5, pnv_enter_arch207_idle_mode)
309 b pnv_powersave_common
246 /* No return */ 310 /* No return */
247 311
248_GLOBAL(power7_sleep) 312_GLOBAL(power7_sleep)
249 li r3,PNV_THREAD_SLEEP 313 li r3,PNV_THREAD_SLEEP
250 li r4,1 314 li r4,1
251 b power7_powersave_common 315 LOAD_REG_ADDR(r5, pnv_enter_arch207_idle_mode)
316 b pnv_powersave_common
252 /* No return */ 317 /* No return */
253 318
254_GLOBAL(power7_winkle) 319_GLOBAL(power7_winkle)
255 li r3,3 320 li r3,PNV_THREAD_WINKLE
256 li r4,1 321 li r4,1
257 b power7_powersave_common 322 LOAD_REG_ADDR(r5, pnv_enter_arch207_idle_mode)
323 b pnv_powersave_common
258 /* No return */ 324 /* No return */
259 325
260#define CHECK_HMI_INTERRUPT \ 326#define CHECK_HMI_INTERRUPT \
@@ -270,25 +336,104 @@ ALT_FTR_SECTION_END_NESTED_IFSET(CPU_FTR_ARCH_207S, 66); \
270 ld r2,PACATOC(r13); \ 336 ld r2,PACATOC(r13); \
271 ld r1,PACAR1(r13); \ 337 ld r1,PACAR1(r13); \
272 std r3,ORIG_GPR3(r1); /* Save original r3 */ \ 338 std r3,ORIG_GPR3(r1); /* Save original r3 */ \
273 li r0,OPAL_HANDLE_HMI; /* Pass opal token argument*/ \ 339 bl opal_rm_handle_hmi; \
274 bl opal_call_realmode; \
275 ld r3,ORIG_GPR3(r1); /* Restore original r3 */ \ 340 ld r3,ORIG_GPR3(r1); /* Restore original r3 */ \
27620: nop; 34120: nop;
277 342
278 343
279_GLOBAL(power7_wakeup_tb_loss) 344/*
345 * r3 - requested stop state
346 */
347_GLOBAL(power9_idle_stop)
348 LOAD_REG_IMMEDIATE(r4, PSSCR_HV_TEMPLATE)
349 or r4,r4,r3
350 mtspr SPRN_PSSCR, r4
351 li r4, 1
352 LOAD_REG_ADDR(r5,power_enter_stop)
353 b pnv_powersave_common
354 /* No return */
355/*
356 * Called from reset vector. Check whether we have woken up with
357 * hypervisor state loss. If yes, restore hypervisor state and return
358 * back to reset vector.
359 *
360 * r13 - Contents of HSPRG0
361 * cr3 - set to gt if waking up with partial/complete hypervisor state loss
362 */
363_GLOBAL(pnv_restore_hyp_resource)
280 ld r2,PACATOC(r13); 364 ld r2,PACATOC(r13);
365BEGIN_FTR_SECTION
366 /*
367 * POWER ISA 3. Use PSSCR to determine if we
368 * are waking up from deep idle state
369 */
370 LOAD_REG_ADDRBASE(r5,pnv_first_deep_stop_state)
371 ld r4,ADDROFF(pnv_first_deep_stop_state)(r5)
372
373 mfspr r5,SPRN_PSSCR
374 /*
375 * 0-3 bits correspond to Power-Saving Level Status
376 * which indicates the idle state we are waking up from
377 */
378 rldicl r5,r5,4,60
379 cmpd cr4,r5,r4
380 bge cr4,pnv_wakeup_tb_loss
381 /*
382 * Waking up without hypervisor state loss. Return to
383 * reset vector
384 */
385 blr
386
387END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
388
389 /*
390 * POWER ISA 2.07 or less.
391 * Check if last bit of HSPGR0 is set. This indicates whether we are
392 * waking up from winkle.
393 */
394 clrldi r5,r13,63
395 clrrdi r13,r13,1
396 cmpwi cr4,r5,1
397 mtspr SPRN_HSPRG0,r13
398
399 lbz r0,PACA_THREAD_IDLE_STATE(r13)
400 cmpwi cr2,r0,PNV_THREAD_NAP
401 bgt cr2,pnv_wakeup_tb_loss /* Either sleep or Winkle */
402
403 /*
404 * We fall through here if PACA_THREAD_IDLE_STATE shows we are waking
405 * up from nap. At this stage CR3 shouldn't contains 'gt' since that
406 * indicates we are waking with hypervisor state loss from nap.
407 */
408 bgt cr3,.
409
410 blr /* Return back to System Reset vector from where
411 pnv_restore_hyp_resource was invoked */
412
413/*
414 * Called if waking up from idle state which can cause either partial or
415 * complete hyp state loss.
416 * In POWER8, called if waking up from fastsleep or winkle
417 * In POWER9, called if waking up from stop state >= pnv_first_deep_stop_state
418 *
419 * r13 - PACA
420 * cr3 - gt if waking up with partial/complete hypervisor state loss
421 * cr4 - eq if waking up from complete hypervisor state loss.
422 */
423_GLOBAL(pnv_wakeup_tb_loss)
281 ld r1,PACAR1(r13) 424 ld r1,PACAR1(r13)
282 /* 425 /*
283 * Before entering any idle state, the NVGPRs are saved in the stack 426 * Before entering any idle state, the NVGPRs are saved in the stack
284 * and they are restored before switching to the process context. Hence 427 * and they are restored before switching to the process context. Hence
285 * until they are restored, they are free to be used. 428 * until they are restored, they are free to be used.
286 * 429 *
287 * Save SRR1 in a NVGPR as it might be clobbered in opal_call_realmode 430 * Save SRR1 and LR in NVGPRs as they might be clobbered in
288 * (called in CHECK_HMI_INTERRUPT). SRR1 is required to determine the 431 * opal_call() (called in CHECK_HMI_INTERRUPT). SRR1 is required
289 * wakeup reason if we branch to kvm_start_guest. 432 * to determine the wakeup reason if we branch to kvm_start_guest. LR
433 * is required to return back to reset vector after hypervisor state
434 * restore is complete.
290 */ 435 */
291 436 mflr r17
292 mfspr r16,SPRN_SRR1 437 mfspr r16,SPRN_SRR1
293BEGIN_FTR_SECTION 438BEGIN_FTR_SECTION
294 CHECK_HMI_INTERRUPT 439 CHECK_HMI_INTERRUPT
@@ -310,35 +455,35 @@ lwarx_loop2:
310 bnel core_idle_lock_held 455 bnel core_idle_lock_held
311 456
312 cmpwi cr2,r15,0 457 cmpwi cr2,r15,0
313 lbz r4,PACA_SUBCORE_SIBLING_MASK(r13)
314 and r4,r4,r15
315 cmpwi cr1,r4,0 /* Check if first in subcore */
316 458
317 /* 459 /*
318 * At this stage 460 * At this stage
319 * cr1 - 0b0100 if first thread to wakeup in subcore 461 * cr2 - eq if first thread to wakeup in core
320 * cr2 - 0b0100 if first thread to wakeup in core 462 * cr3- gt if waking up with partial/complete hypervisor state loss
321 * cr3- 0b0010 if waking up from sleep or winkle 463 * cr4 - eq if waking up from complete hypervisor state loss.
322 * cr4 - 0b0100 if waking up from winkle
323 */ 464 */
324 465
325 or r15,r15,r7 /* Set thread bit */
326
327 beq cr1,first_thread_in_subcore
328
329 /* Not first thread in subcore to wake up */
330 stwcx. r15,0,r14
331 bne- lwarx_loop2
332 isync
333 b common_exit
334
335first_thread_in_subcore:
336 /* First thread in subcore to wakeup */
337 ori r15,r15,PNV_CORE_IDLE_LOCK_BIT 466 ori r15,r15,PNV_CORE_IDLE_LOCK_BIT
338 stwcx. r15,0,r14 467 stwcx. r15,0,r14
339 bne- lwarx_loop2 468 bne- lwarx_loop2
340 isync 469 isync
341 470
471BEGIN_FTR_SECTION
472 lbz r4,PACA_SUBCORE_SIBLING_MASK(r13)
473 and r4,r4,r15
474 cmpwi r4,0 /* Check if first in subcore */
475
476 or r15,r15,r7 /* Set thread bit */
477 beq first_thread_in_subcore
478END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_300)
479
480 or r15,r15,r7 /* Set thread bit */
481 beq cr2,first_thread_in_core
482
483 /* Not first thread in core or subcore to wake up */
484 b clear_lock
485
486first_thread_in_subcore:
342 /* 487 /*
343 * If waking up from sleep, subcore state is not lost. Hence 488 * If waking up from sleep, subcore state is not lost. Hence
344 * skip subcore state restore 489 * skip subcore state restore
@@ -348,6 +493,7 @@ first_thread_in_subcore:
348 /* Restore per-subcore state */ 493 /* Restore per-subcore state */
349 ld r4,_SDR1(r1) 494 ld r4,_SDR1(r1)
350 mtspr SPRN_SDR1,r4 495 mtspr SPRN_SDR1,r4
496
351 ld r4,_RPR(r1) 497 ld r4,_RPR(r1)
352 mtspr SPRN_RPR,r4 498 mtspr SPRN_RPR,r4
353 ld r4,_AMOR(r1) 499 ld r4,_AMOR(r1)
@@ -363,32 +509,44 @@ subcore_state_restored:
363first_thread_in_core: 509first_thread_in_core:
364 510
365 /* 511 /*
366 * First thread in the core waking up from fastsleep. It needs to 512 * First thread in the core waking up from any state which can cause
513 * partial or complete hypervisor state loss. It needs to
367 * call the fastsleep workaround code if the platform requires it. 514 * call the fastsleep workaround code if the platform requires it.
368 * Call it unconditionally here. The below branch instruction will 515 * Call it unconditionally here. The below branch instruction will
369 * be patched out when the idle states are discovered if platform 516 * be patched out if the platform does not have fastsleep or does not
370 * does not require workaround. 517 * require the workaround. Patching will be performed during the
518 * discovery of idle-states.
371 */ 519 */
372.global pnv_fastsleep_workaround_at_exit 520.global pnv_fastsleep_workaround_at_exit
373pnv_fastsleep_workaround_at_exit: 521pnv_fastsleep_workaround_at_exit:
374 b fastsleep_workaround_at_exit 522 b fastsleep_workaround_at_exit
375 523
376timebase_resync: 524timebase_resync:
377 /* Do timebase resync if we are waking up from sleep. Use cr3 value 525 /*
378 * set in exceptions-64s.S */ 526 * Use cr3 which indicates that we are waking up with atleast partial
527 * hypervisor state loss to determine if TIMEBASE RESYNC is needed.
528 */
379 ble cr3,clear_lock 529 ble cr3,clear_lock
380 /* Time base re-sync */ 530 /* Time base re-sync */
381 li r0,OPAL_RESYNC_TIMEBASE 531 bl opal_rm_resync_timebase;
382 bl opal_call_realmode;
383 /* TODO: Check r3 for failure */
384
385 /* 532 /*
386 * If waking up from sleep, per core state is not lost, skip to 533 * If waking up from sleep, per core state is not lost, skip to
387 * clear_lock. 534 * clear_lock.
388 */ 535 */
389 bne cr4,clear_lock 536 bne cr4,clear_lock
390 537
391 /* Restore per core state */ 538 /*
539 * First thread in the core to wake up and its waking up with
540 * complete hypervisor state loss. Restore per core hypervisor
541 * state.
542 */
543BEGIN_FTR_SECTION
544 ld r4,_PTCR(r1)
545 mtspr SPRN_PTCR,r4
546 ld r4,_RPR(r1)
547 mtspr SPRN_RPR,r4
548END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
549
392 ld r4,_TSCR(r1) 550 ld r4,_TSCR(r1)
393 mtspr SPRN_TSCR,r4 551 mtspr SPRN_TSCR,r4
394 ld r4,_WORC(r1) 552 ld r4,_WORC(r1)
@@ -410,9 +568,9 @@ common_exit:
410 568
411 /* Waking up from winkle */ 569 /* Waking up from winkle */
412 570
413 /* Restore per thread state */ 571BEGIN_MMU_FTR_SECTION
414 bl __restore_cpu_power8 572 b no_segments
415 573END_MMU_FTR_SECTION_IFSET(MMU_FTR_RADIX)
416 /* Restore SLB from PACA */ 574 /* Restore SLB from PACA */
417 ld r8,PACA_SLBSHADOWPTR(r13) 575 ld r8,PACA_SLBSHADOWPTR(r13)
418 576
@@ -426,6 +584,9 @@ common_exit:
426 slbmte r6,r5 584 slbmte r6,r5
4271: addi r8,r8,16 5851: addi r8,r8,16
428 .endr 586 .endr
587no_segments:
588
589 /* Restore per thread state */
429 590
430 ld r4,_SPURR(r1) 591 ld r4,_SPURR(r1)
431 mtspr SPRN_SPURR,r4 592 mtspr SPRN_SPURR,r4
@@ -436,48 +597,34 @@ common_exit:
436 ld r4,_WORT(r1) 597 ld r4,_WORT(r1)
437 mtspr SPRN_WORT,r4 598 mtspr SPRN_WORT,r4
438 599
439hypervisor_state_restored: 600 /* Call cur_cpu_spec->cpu_restore() */
601 LOAD_REG_ADDR(r4, cur_cpu_spec)
602 ld r4,0(r4)
603 ld r12,CPU_SPEC_RESTORE(r4)
604#ifdef PPC64_ELF_ABI_v1
605 ld r12,0(r12)
606#endif
607 mtctr r12
608 bctrl
440 609
441 li r5,PNV_THREAD_RUNNING 610hypervisor_state_restored:
442 stb r5,PACA_THREAD_IDLE_STATE(r13)
443 611
444 mtspr SPRN_SRR1,r16 612 mtspr SPRN_SRR1,r16
445#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 613 mtlr r17
446 li r0,KVM_HWTHREAD_IN_KERNEL 614 blr /* Return back to System Reset vector from where
447 stb r0,HSTATE_HWTHREAD_STATE(r13) 615 pnv_restore_hyp_resource was invoked */
448 /* Order setting hwthread_state vs. testing hwthread_req */
449 sync
450 lbz r0,HSTATE_HWTHREAD_REQ(r13)
451 cmpwi r0,0
452 beq 6f
453 b kvm_start_guest
4546:
455#endif
456
457 REST_NVGPRS(r1)
458 REST_GPR(2, r1)
459 ld r3,_CCR(r1)
460 ld r4,_MSR(r1)
461 ld r5,_NIP(r1)
462 addi r1,r1,INT_FRAME_SIZE
463 mtcr r3
464 mfspr r3,SPRN_SRR1 /* Return SRR1 */
465 mtspr SPRN_SRR1,r4
466 mtspr SPRN_SRR0,r5
467 rfid
468 616
469fastsleep_workaround_at_exit: 617fastsleep_workaround_at_exit:
470 li r3,1 618 li r3,1
471 li r4,0 619 li r4,0
472 li r0,OPAL_CONFIG_CPU_IDLE_STATE 620 bl opal_rm_config_cpu_idle_state
473 bl opal_call_realmode
474 b timebase_resync 621 b timebase_resync
475 622
476/* 623/*
477 * R3 here contains the value that will be returned to the caller 624 * R3 here contains the value that will be returned to the caller
478 * of power7_nap. 625 * of power7_nap.
479 */ 626 */
480_GLOBAL(power7_wakeup_loss) 627_GLOBAL(pnv_wakeup_loss)
481 ld r1,PACAR1(r13) 628 ld r1,PACAR1(r13)
482BEGIN_FTR_SECTION 629BEGIN_FTR_SECTION
483 CHECK_HMI_INTERRUPT 630 CHECK_HMI_INTERRUPT
@@ -497,10 +644,10 @@ END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
497 * R3 here contains the value that will be returned to the caller 644 * R3 here contains the value that will be returned to the caller
498 * of power7_nap. 645 * of power7_nap.
499 */ 646 */
500_GLOBAL(power7_wakeup_noloss) 647_GLOBAL(pnv_wakeup_noloss)
501 lbz r0,PACA_NAPSTATELOST(r13) 648 lbz r0,PACA_NAPSTATELOST(r13)
502 cmpwi r0,0 649 cmpwi r0,0
503 bne power7_wakeup_loss 650 bne pnv_wakeup_loss
504BEGIN_FTR_SECTION 651BEGIN_FTR_SECTION
505 CHECK_HMI_INTERRUPT 652 CHECK_HMI_INTERRUPT
506END_FTR_SECTION_IFSET(CPU_FTR_HVMODE) 653END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 3cb46a3b1de7..ac910d9982df 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -250,7 +250,7 @@ notrace void arch_local_irq_restore(unsigned long en)
250 if (WARN_ON(mfmsr() & MSR_EE)) 250 if (WARN_ON(mfmsr() & MSR_EE))
251 __hard_irq_disable(); 251 __hard_irq_disable();
252 } 252 }
253#endif /* CONFIG_TRACE_IRQFLAG */ 253#endif /* CONFIG_TRACE_IRQFLAGS */
254 254
255 set_soft_enabled(0); 255 set_soft_enabled(0);
256 256
@@ -342,6 +342,21 @@ bool prep_irq_for_idle(void)
342 return true; 342 return true;
343} 343}
344 344
345/*
346 * Force a replay of the external interrupt handler on this CPU.
347 */
348void force_external_irq_replay(void)
349{
350 /*
351 * This must only be called with interrupts soft-disabled,
352 * the replay will happen when re-enabling.
353 */
354 WARN_ON(!arch_irqs_disabled());
355
356 /* Indicate in the PACA that we have an interrupt to replay */
357 local_paca->irq_happened |= PACA_IRQ_EE;
358}
359
345#endif /* CONFIG_PPC64 */ 360#endif /* CONFIG_PPC64 */
346 361
347int arch_show_interrupts(struct seq_file *p, int prec) 362int arch_show_interrupts(struct seq_file *p, int prec)
diff --git a/arch/powerpc/kernel/kprobes.c b/arch/powerpc/kernel/kprobes.c
index 7c053f281406..3ed8ec09b5c9 100644
--- a/arch/powerpc/kernel/kprobes.c
+++ b/arch/powerpc/kernel/kprobes.c
@@ -278,12 +278,11 @@ no_kprobe:
278 * - When the probed function returns, this probe 278 * - When the probed function returns, this probe
279 * causes the handlers to fire 279 * causes the handlers to fire
280 */ 280 */
281static void __used kretprobe_trampoline_holder(void) 281asm(".global kretprobe_trampoline\n"
282{ 282 ".type kretprobe_trampoline, @function\n"
283 asm volatile(".global kretprobe_trampoline\n" 283 "kretprobe_trampoline:\n"
284 "kretprobe_trampoline:\n" 284 "nop\n"
285 "nop\n"); 285 ".size kretprobe_trampoline, .-kretprobe_trampoline\n");
286}
287 286
288/* 287/*
289 * Called when the probe at kretprobe trampoline is hit 288 * Called when the probe at kretprobe trampoline is hit
@@ -506,13 +505,11 @@ int __kprobes setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs)
506 505
507 /* setup return addr to the jprobe handler routine */ 506 /* setup return addr to the jprobe handler routine */
508 regs->nip = arch_deref_entry_point(jp->entry); 507 regs->nip = arch_deref_entry_point(jp->entry);
509#ifdef CONFIG_PPC64 508#ifdef PPC64_ELF_ABI_v2
510#if defined(_CALL_ELF) && _CALL_ELF == 2
511 regs->gpr[12] = (unsigned long)jp->entry; 509 regs->gpr[12] = (unsigned long)jp->entry;
512#else 510#elif defined(PPC64_ELF_ABI_v1)
513 regs->gpr[2] = (unsigned long)(((func_descr_t *)jp->entry)->toc); 511 regs->gpr[2] = (unsigned long)(((func_descr_t *)jp->entry)->toc);
514#endif 512#endif
515#endif
516 513
517 return 1; 514 return 1;
518} 515}
diff --git a/arch/powerpc/kernel/machine_kexec_64.c b/arch/powerpc/kernel/machine_kexec_64.c
index b8c202d63ecb..4c780a342282 100644
--- a/arch/powerpc/kernel/machine_kexec_64.c
+++ b/arch/powerpc/kernel/machine_kexec_64.c
@@ -29,6 +29,7 @@
29#include <asm/prom.h> 29#include <asm/prom.h>
30#include <asm/smp.h> 30#include <asm/smp.h>
31#include <asm/hw_breakpoint.h> 31#include <asm/hw_breakpoint.h>
32#include <asm/asm-prototypes.h>
32 33
33#ifdef CONFIG_PPC_BOOK3E 34#ifdef CONFIG_PPC_BOOK3E
34int default_machine_kexec_prepare(struct kimage *image) 35int default_machine_kexec_prepare(struct kimage *image)
@@ -54,7 +55,7 @@ int default_machine_kexec_prepare(struct kimage *image)
54 const unsigned long *basep; 55 const unsigned long *basep;
55 const unsigned int *sizep; 56 const unsigned int *sizep;
56 57
57 if (!ppc_md.hpte_clear_all) 58 if (!mmu_hash_ops.hpte_clear_all)
58 return -ENOENT; 59 return -ENOENT;
59 60
60 /* 61 /*
@@ -379,7 +380,12 @@ void default_machine_kexec(struct kimage *image)
379 */ 380 */
380 kexec_sequence(&kexec_stack, image->start, image, 381 kexec_sequence(&kexec_stack, image->start, image,
381 page_address(image->control_code_page), 382 page_address(image->control_code_page),
382 ppc_md.hpte_clear_all); 383#ifdef CONFIG_PPC_STD_MMU
384 mmu_hash_ops.hpte_clear_all
385#else
386 NULL
387#endif
388 );
383 /* NOTREACHED */ 389 /* NOTREACHED */
384} 390}
385 391
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index 285ca8c6cc2e..d9c912b6e632 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -104,20 +104,6 @@ _GLOBAL(mulhdu)
104 blr 104 blr
105 105
106/* 106/*
107 * sub_reloc_offset(x) returns x - reloc_offset().
108 */
109_GLOBAL(sub_reloc_offset)
110 mflr r0
111 bl 1f
1121: mflr r5
113 lis r4,1b@ha
114 addi r4,r4,1b@l
115 subf r5,r4,r5
116 subf r3,r5,r3
117 mtlr r0
118 blr
119
120/*
121 * reloc_got2 runs through the .got2 section adding an offset 107 * reloc_got2 runs through the .got2 section adding an offset
122 * to each entry. 108 * to each entry.
123 */ 109 */
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
index f28754c497e5..cb195157b318 100644
--- a/arch/powerpc/kernel/misc_64.S
+++ b/arch/powerpc/kernel/misc_64.S
@@ -661,13 +661,13 @@ _GLOBAL(kexec_sequence)
661 661
662#ifndef CONFIG_PPC_BOOK3E 662#ifndef CONFIG_PPC_BOOK3E
663 /* clear out hardware hash page table and tlb */ 663 /* clear out hardware hash page table and tlb */
664#if !defined(_CALL_ELF) || _CALL_ELF != 2 664#ifdef PPC64_ELF_ABI_v1
665 ld r12,0(r27) /* deref function descriptor */ 665 ld r12,0(r27) /* deref function descriptor */
666#else 666#else
667 mr r12,r27 667 mr r12,r27
668#endif 668#endif
669 mtctr r12 669 mtctr r12
670 bctrl /* ppc_md.hpte_clear_all(void); */ 670 bctrl /* mmu_hash_ops.hpte_clear_all(void); */
671#endif /* !CONFIG_PPC_BOOK3E */ 671#endif /* !CONFIG_PPC_BOOK3E */
672 672
673/* 673/*
diff --git a/arch/powerpc/kernel/module_64.c b/arch/powerpc/kernel/module_64.c
index 9ce9a25f58b5..183368e008cf 100644
--- a/arch/powerpc/kernel/module_64.c
+++ b/arch/powerpc/kernel/module_64.c
@@ -41,7 +41,7 @@
41 this, and makes other things simpler. Anton? 41 this, and makes other things simpler. Anton?
42 --RR. */ 42 --RR. */
43 43
44#if defined(_CALL_ELF) && _CALL_ELF == 2 44#ifdef PPC64_ELF_ABI_v2
45 45
46/* An address is simply the address of the function. */ 46/* An address is simply the address of the function. */
47typedef unsigned long func_desc_t; 47typedef unsigned long func_desc_t;
@@ -132,7 +132,7 @@ static u32 ppc64_stub_insns[] = {
132 /* Save current r2 value in magic place on the stack. */ 132 /* Save current r2 value in magic place on the stack. */
133 0xf8410000|R2_STACK_OFFSET, /* std r2,R2_STACK_OFFSET(r1) */ 133 0xf8410000|R2_STACK_OFFSET, /* std r2,R2_STACK_OFFSET(r1) */
134 0xe98b0020, /* ld r12,32(r11) */ 134 0xe98b0020, /* ld r12,32(r11) */
135#if !defined(_CALL_ELF) || _CALL_ELF != 2 135#ifdef PPC64_ELF_ABI_v1
136 /* Set up new r2 from function descriptor */ 136 /* Set up new r2 from function descriptor */
137 0xe84b0028, /* ld r2,40(r11) */ 137 0xe84b0028, /* ld r2,40(r11) */
138#endif 138#endif
@@ -494,9 +494,10 @@ static bool is_early_mcount_callsite(u32 *instruction)
494 restore r2. */ 494 restore r2. */
495static int restore_r2(u32 *instruction, struct module *me) 495static int restore_r2(u32 *instruction, struct module *me)
496{ 496{
497 if (is_early_mcount_callsite(instruction - 1))
498 return 1;
499
497 if (*instruction != PPC_INST_NOP) { 500 if (*instruction != PPC_INST_NOP) {
498 if (is_early_mcount_callsite(instruction - 1))
499 return 1;
500 pr_err("%s: Expect noop after relocate, got %08x\n", 501 pr_err("%s: Expect noop after relocate, got %08x\n",
501 me->name, *instruction); 502 me->name, *instruction);
502 return 0; 503 return 0;
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 0f7a60f1e9f6..f93942b4b6a6 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -41,11 +41,18 @@
41#include <asm/ppc-pci.h> 41#include <asm/ppc-pci.h>
42#include <asm/eeh.h> 42#include <asm/eeh.h>
43 43
44/* hose_spinlock protects accesses to the the phb_bitmap. */
44static DEFINE_SPINLOCK(hose_spinlock); 45static DEFINE_SPINLOCK(hose_spinlock);
45LIST_HEAD(hose_list); 46LIST_HEAD(hose_list);
46 47
47/* XXX kill that some day ... */ 48/* For dynamic PHB numbering on get_phb_number(): max number of PHBs. */
48static int global_phb_number; /* Global phb counter */ 49#define MAX_PHBS 0x10000
50
51/*
52 * For dynamic PHB numbering: used/free PHBs tracking bitmap.
53 * Accesses to this bitmap should be protected by hose_spinlock.
54 */
55static DECLARE_BITMAP(phb_bitmap, MAX_PHBS);
49 56
50/* ISA Memory physical address */ 57/* ISA Memory physical address */
51resource_size_t isa_mem_base; 58resource_size_t isa_mem_base;
@@ -64,6 +71,42 @@ struct dma_map_ops *get_pci_dma_ops(void)
64} 71}
65EXPORT_SYMBOL(get_pci_dma_ops); 72EXPORT_SYMBOL(get_pci_dma_ops);
66 73
74/*
75 * This function should run under locking protection, specifically
76 * hose_spinlock.
77 */
78static int get_phb_number(struct device_node *dn)
79{
80 int ret, phb_id = -1;
81 u64 prop;
82
83 /*
84 * Try fixed PHB numbering first, by checking archs and reading
85 * the respective device-tree properties. Firstly, try powernv by
86 * reading "ibm,opal-phbid", only present in OPAL environment.
87 */
88 ret = of_property_read_u64(dn, "ibm,opal-phbid", &prop);
89 if (ret)
90 ret = of_property_read_u32_index(dn, "reg", 1, (u32 *)&prop);
91
92 if (!ret)
93 phb_id = (int)(prop & (MAX_PHBS - 1));
94
95 /* We need to be sure to not use the same PHB number twice. */
96 if ((phb_id >= 0) && !test_and_set_bit(phb_id, phb_bitmap))
97 return phb_id;
98
99 /*
100 * If not pseries nor powernv, or if fixed PHB numbering tried to add
101 * the same PHB number twice, then fallback to dynamic PHB numbering.
102 */
103 phb_id = find_first_zero_bit(phb_bitmap, MAX_PHBS);
104 BUG_ON(phb_id >= MAX_PHBS);
105 set_bit(phb_id, phb_bitmap);
106
107 return phb_id;
108}
109
67struct pci_controller *pcibios_alloc_controller(struct device_node *dev) 110struct pci_controller *pcibios_alloc_controller(struct device_node *dev)
68{ 111{
69 struct pci_controller *phb; 112 struct pci_controller *phb;
@@ -72,7 +115,7 @@ struct pci_controller *pcibios_alloc_controller(struct device_node *dev)
72 if (phb == NULL) 115 if (phb == NULL)
73 return NULL; 116 return NULL;
74 spin_lock(&hose_spinlock); 117 spin_lock(&hose_spinlock);
75 phb->global_number = global_phb_number++; 118 phb->global_number = get_phb_number(dev);
76 list_add_tail(&phb->list_node, &hose_list); 119 list_add_tail(&phb->list_node, &hose_list);
77 spin_unlock(&hose_spinlock); 120 spin_unlock(&hose_spinlock);
78 phb->dn = dev; 121 phb->dn = dev;
@@ -94,6 +137,11 @@ EXPORT_SYMBOL_GPL(pcibios_alloc_controller);
94void pcibios_free_controller(struct pci_controller *phb) 137void pcibios_free_controller(struct pci_controller *phb)
95{ 138{
96 spin_lock(&hose_spinlock); 139 spin_lock(&hose_spinlock);
140
141 /* Clear bit of phb_bitmap to allow reuse of this PHB number. */
142 if (phb->global_number < MAX_PHBS)
143 clear_bit(phb->global_number, phb_bitmap);
144
97 list_del(&phb->list_node); 145 list_del(&phb->list_node);
98 spin_unlock(&hose_spinlock); 146 spin_unlock(&hose_spinlock);
99 147
@@ -124,6 +172,14 @@ resource_size_t pcibios_window_alignment(struct pci_bus *bus,
124 return 1; 172 return 1;
125} 173}
126 174
175void pcibios_setup_bridge(struct pci_bus *bus, unsigned long type)
176{
177 struct pci_controller *hose = pci_bus_to_host(bus);
178
179 if (hose->controller_ops.setup_bridge)
180 hose->controller_ops.setup_bridge(bus, type);
181}
182
127void pcibios_reset_secondary_bus(struct pci_dev *dev) 183void pcibios_reset_secondary_bus(struct pci_dev *dev)
128{ 184{
129 struct pci_controller *phb = pci_bus_to_host(dev->bus); 185 struct pci_controller *phb = pci_bus_to_host(dev->bus);
@@ -1362,8 +1418,10 @@ void __init pcibios_resource_survey(void)
1362 /* Allocate and assign resources */ 1418 /* Allocate and assign resources */
1363 list_for_each_entry(b, &pci_root_buses, node) 1419 list_for_each_entry(b, &pci_root_buses, node)
1364 pcibios_allocate_bus_resources(b); 1420 pcibios_allocate_bus_resources(b);
1365 pcibios_allocate_resources(0); 1421 if (!pci_has_flag(PCI_REASSIGN_ALL_RSRC)) {
1366 pcibios_allocate_resources(1); 1422 pcibios_allocate_resources(0);
1423 pcibios_allocate_resources(1);
1424 }
1367 1425
1368 /* Before we start assigning unassigned resource, we try to reserve 1426 /* Before we start assigning unassigned resource, we try to reserve
1369 * the low IO area and the VGA memory area if they intersect the 1427 * the low IO area and the VGA memory area if they intersect the
@@ -1436,8 +1494,12 @@ void pcibios_finish_adding_to_bus(struct pci_bus *bus)
1436 /* Allocate bus and devices resources */ 1494 /* Allocate bus and devices resources */
1437 pcibios_allocate_bus_resources(bus); 1495 pcibios_allocate_bus_resources(bus);
1438 pcibios_claim_one_bus(bus); 1496 pcibios_claim_one_bus(bus);
1439 if (!pci_has_flag(PCI_PROBE_ONLY)) 1497 if (!pci_has_flag(PCI_PROBE_ONLY)) {
1440 pci_assign_unassigned_bus_resources(bus); 1498 if (bus->self)
1499 pci_assign_unassigned_bridge_resources(bus->self);
1500 else
1501 pci_assign_unassigned_bus_resources(bus);
1502 }
1441 1503
1442 /* Fixup EEH */ 1504 /* Fixup EEH */
1443 eeh_add_device_tree_late(bus); 1505 eeh_add_device_tree_late(bus);
@@ -1485,9 +1547,9 @@ static void pcibios_setup_phb_resources(struct pci_controller *hose,
1485 res = &hose->io_resource; 1547 res = &hose->io_resource;
1486 1548
1487 if (!res->flags) { 1549 if (!res->flags) {
1488 pr_info("PCI: I/O resource not set for host" 1550 pr_debug("PCI: I/O resource not set for host"
1489 " bridge %s (domain %d)\n", 1551 " bridge %s (domain %d)\n",
1490 hose->dn->full_name, hose->global_number); 1552 hose->dn->full_name, hose->global_number);
1491 } else { 1553 } else {
1492 offset = pcibios_io_space_offset(hose); 1554 offset = pcibios_io_space_offset(hose);
1493 1555
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index a5ae49a2dcc4..ed5e9ff61a68 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -81,7 +81,7 @@ int pcibios_unmap_io_space(struct pci_bus *bus)
81 81
82 /* If this is not a PHB, we only flush the hash table over 82 /* If this is not a PHB, we only flush the hash table over
83 * the area mapped by this bridge. We don't play with the PTE 83 * the area mapped by this bridge. We don't play with the PTE
84 * mappings since we might have to deal with sub-page alignemnts 84 * mappings since we might have to deal with sub-page alignments
85 * so flushing the hash table is the only sane way to make sure 85 * so flushing the hash table is the only sane way to make sure
86 * that no hash entries are covering that removed bridge area 86 * that no hash entries are covering that removed bridge area
87 * while still allowing other busses overlapping those pages 87 * while still allowing other busses overlapping those pages
diff --git a/arch/powerpc/kernel/pci_dn.c b/arch/powerpc/kernel/pci_dn.c
index ecdccce78719..592693437070 100644
--- a/arch/powerpc/kernel/pci_dn.c
+++ b/arch/powerpc/kernel/pci_dn.c
@@ -31,6 +31,7 @@
31#include <asm/pci-bridge.h> 31#include <asm/pci-bridge.h>
32#include <asm/ppc-pci.h> 32#include <asm/ppc-pci.h>
33#include <asm/firmware.h> 33#include <asm/firmware.h>
34#include <asm/eeh.h>
34 35
35/* 36/*
36 * The function is used to find the firmware data of one 37 * The function is used to find the firmware data of one
@@ -181,7 +182,6 @@ struct pci_dn *add_dev_pci_data(struct pci_dev *pdev)
181{ 182{
182#ifdef CONFIG_PCI_IOV 183#ifdef CONFIG_PCI_IOV
183 struct pci_dn *parent, *pdn; 184 struct pci_dn *parent, *pdn;
184 struct eeh_dev *edev;
185 int i; 185 int i;
186 186
187 /* Only support IOV for now */ 187 /* Only support IOV for now */
@@ -199,6 +199,8 @@ struct pci_dn *add_dev_pci_data(struct pci_dev *pdev)
199 return NULL; 199 return NULL;
200 200
201 for (i = 0; i < pci_sriov_get_totalvfs(pdev); i++) { 201 for (i = 0; i < pci_sriov_get_totalvfs(pdev); i++) {
202 struct eeh_dev *edev __maybe_unused;
203
202 pdn = add_one_dev_pci_data(parent, NULL, i, 204 pdn = add_one_dev_pci_data(parent, NULL, i,
203 pci_iov_virtfn_bus(pdev, i), 205 pci_iov_virtfn_bus(pdev, i),
204 pci_iov_virtfn_devfn(pdev, i)); 206 pci_iov_virtfn_devfn(pdev, i));
@@ -208,11 +210,12 @@ struct pci_dn *add_dev_pci_data(struct pci_dev *pdev)
208 return NULL; 210 return NULL;
209 } 211 }
210 212
213#ifdef CONFIG_EEH
211 /* Create the EEH device for the VF */ 214 /* Create the EEH device for the VF */
212 eeh_dev_init(pdn, pci_bus_to_host(pdev->bus)); 215 edev = eeh_dev_init(pdn);
213 edev = pdn_to_eeh_dev(pdn);
214 BUG_ON(!edev); 216 BUG_ON(!edev);
215 edev->physfn = pdev; 217 edev->physfn = pdev;
218#endif /* CONFIG_EEH */
216 } 219 }
217#endif /* CONFIG_PCI_IOV */ 220#endif /* CONFIG_PCI_IOV */
218 221
@@ -224,7 +227,6 @@ void remove_dev_pci_data(struct pci_dev *pdev)
224#ifdef CONFIG_PCI_IOV 227#ifdef CONFIG_PCI_IOV
225 struct pci_dn *parent; 228 struct pci_dn *parent;
226 struct pci_dn *pdn, *tmp; 229 struct pci_dn *pdn, *tmp;
227 struct eeh_dev *edev;
228 int i; 230 int i;
229 231
230 /* 232 /*
@@ -260,18 +262,22 @@ void remove_dev_pci_data(struct pci_dev *pdev)
260 * a batch mode. 262 * a batch mode.
261 */ 263 */
262 for (i = 0; i < pci_sriov_get_totalvfs(pdev); i++) { 264 for (i = 0; i < pci_sriov_get_totalvfs(pdev); i++) {
265 struct eeh_dev *edev __maybe_unused;
266
263 list_for_each_entry_safe(pdn, tmp, 267 list_for_each_entry_safe(pdn, tmp,
264 &parent->child_list, list) { 268 &parent->child_list, list) {
265 if (pdn->busno != pci_iov_virtfn_bus(pdev, i) || 269 if (pdn->busno != pci_iov_virtfn_bus(pdev, i) ||
266 pdn->devfn != pci_iov_virtfn_devfn(pdev, i)) 270 pdn->devfn != pci_iov_virtfn_devfn(pdev, i))
267 continue; 271 continue;
268 272
273#ifdef CONFIG_EEH
269 /* Release EEH device for the VF */ 274 /* Release EEH device for the VF */
270 edev = pdn_to_eeh_dev(pdn); 275 edev = pdn_to_eeh_dev(pdn);
271 if (edev) { 276 if (edev) {
272 pdn->edev = NULL; 277 pdn->edev = NULL;
273 kfree(edev); 278 kfree(edev);
274 } 279 }
280#endif /* CONFIG_EEH */
275 281
276 if (!list_empty(&pdn->list)) 282 if (!list_empty(&pdn->list))
277 list_del(&pdn->list); 283 list_del(&pdn->list);
@@ -289,8 +295,11 @@ struct pci_dn *pci_add_device_node_info(struct pci_controller *hose,
289 const __be32 *regs; 295 const __be32 *regs;
290 struct device_node *parent; 296 struct device_node *parent;
291 struct pci_dn *pdn; 297 struct pci_dn *pdn;
298#ifdef CONFIG_EEH
299 struct eeh_dev *edev;
300#endif
292 301
293 pdn = zalloc_maybe_bootmem(sizeof(*pdn), GFP_KERNEL); 302 pdn = kzalloc(sizeof(*pdn), GFP_KERNEL);
294 if (pdn == NULL) 303 if (pdn == NULL)
295 return NULL; 304 return NULL;
296 dn->data = pdn; 305 dn->data = pdn;
@@ -319,6 +328,15 @@ struct pci_dn *pci_add_device_node_info(struct pci_controller *hose,
319 /* Extended config space */ 328 /* Extended config space */
320 pdn->pci_ext_config_space = (type && of_read_number(type, 1) == 1); 329 pdn->pci_ext_config_space = (type && of_read_number(type, 1) == 1);
321 330
331 /* Create EEH device */
332#ifdef CONFIG_EEH
333 edev = eeh_dev_init(pdn);
334 if (!edev) {
335 kfree(pdn);
336 return NULL;
337 }
338#endif
339
322 /* Attach to parent node */ 340 /* Attach to parent node */
323 INIT_LIST_HEAD(&pdn->child_list); 341 INIT_LIST_HEAD(&pdn->child_list);
324 INIT_LIST_HEAD(&pdn->list); 342 INIT_LIST_HEAD(&pdn->list);
@@ -504,15 +522,19 @@ void pci_devs_phb_init_dynamic(struct pci_controller *phb)
504 * pci device found underneath. This routine runs once, 522 * pci device found underneath. This routine runs once,
505 * early in the boot sequence. 523 * early in the boot sequence.
506 */ 524 */
507void __init pci_devs_phb_init(void) 525static int __init pci_devs_phb_init(void)
508{ 526{
509 struct pci_controller *phb, *tmp; 527 struct pci_controller *phb, *tmp;
510 528
511 /* This must be done first so the device nodes have valid pci info! */ 529 /* This must be done first so the device nodes have valid pci info! */
512 list_for_each_entry_safe(phb, tmp, &hose_list, list_node) 530 list_for_each_entry_safe(phb, tmp, &hose_list, list_node)
513 pci_devs_phb_init_dynamic(phb); 531 pci_devs_phb_init_dynamic(phb);
532
533 return 0;
514} 534}
515 535
536core_initcall(pci_devs_phb_init);
537
516static void pci_dev_pdn_setup(struct pci_dev *pdev) 538static void pci_dev_pdn_setup(struct pci_dev *pdev)
517{ 539{
518 struct pci_dn *pdn; 540 struct pci_dn *pdn;
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 0b93893424f5..a8cca88e972f 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -139,12 +139,16 @@ EXPORT_SYMBOL(__msr_check_and_clear);
139#ifdef CONFIG_PPC_FPU 139#ifdef CONFIG_PPC_FPU
140void __giveup_fpu(struct task_struct *tsk) 140void __giveup_fpu(struct task_struct *tsk)
141{ 141{
142 unsigned long msr;
143
142 save_fpu(tsk); 144 save_fpu(tsk);
143 tsk->thread.regs->msr &= ~MSR_FP; 145 msr = tsk->thread.regs->msr;
146 msr &= ~MSR_FP;
144#ifdef CONFIG_VSX 147#ifdef CONFIG_VSX
145 if (cpu_has_feature(CPU_FTR_VSX)) 148 if (cpu_has_feature(CPU_FTR_VSX))
146 tsk->thread.regs->msr &= ~MSR_VSX; 149 msr &= ~MSR_VSX;
147#endif 150#endif
151 tsk->thread.regs->msr = msr;
148} 152}
149 153
150void giveup_fpu(struct task_struct *tsk) 154void giveup_fpu(struct task_struct *tsk)
@@ -219,12 +223,16 @@ static int restore_fp(struct task_struct *tsk) { return 0; }
219 223
220static void __giveup_altivec(struct task_struct *tsk) 224static void __giveup_altivec(struct task_struct *tsk)
221{ 225{
226 unsigned long msr;
227
222 save_altivec(tsk); 228 save_altivec(tsk);
223 tsk->thread.regs->msr &= ~MSR_VEC; 229 msr = tsk->thread.regs->msr;
230 msr &= ~MSR_VEC;
224#ifdef CONFIG_VSX 231#ifdef CONFIG_VSX
225 if (cpu_has_feature(CPU_FTR_VSX)) 232 if (cpu_has_feature(CPU_FTR_VSX))
226 tsk->thread.regs->msr &= ~MSR_VSX; 233 msr &= ~MSR_VSX;
227#endif 234#endif
235 tsk->thread.regs->msr = msr;
228} 236}
229 237
230void giveup_altivec(struct task_struct *tsk) 238void giveup_altivec(struct task_struct *tsk)
@@ -794,7 +802,7 @@ static void tm_reclaim_thread(struct thread_struct *thr,
794 * this state. 802 * this state.
795 * We do this using the current MSR, rather tracking it in 803 * We do this using the current MSR, rather tracking it in
796 * some specific thread_struct bit, as it has the additional 804 * some specific thread_struct bit, as it has the additional
797 * benifit of checking for a potential TM bad thing exception. 805 * benefit of checking for a potential TM bad thing exception.
798 */ 806 */
799 if (!MSR_TM_SUSPENDED(mfmsr())) 807 if (!MSR_TM_SUSPENDED(mfmsr()))
800 return; 808 return;
@@ -1009,6 +1017,14 @@ static inline void save_sprs(struct thread_struct *t)
1009 */ 1017 */
1010 t->tar = mfspr(SPRN_TAR); 1018 t->tar = mfspr(SPRN_TAR);
1011 } 1019 }
1020
1021 if (cpu_has_feature(CPU_FTR_ARCH_300)) {
1022 /* Conditionally save Load Monitor registers, if enabled */
1023 if (t->fscr & FSCR_LM) {
1024 t->lmrr = mfspr(SPRN_LMRR);
1025 t->lmser = mfspr(SPRN_LMSER);
1026 }
1027 }
1012#endif 1028#endif
1013} 1029}
1014 1030
@@ -1023,18 +1039,11 @@ static inline void restore_sprs(struct thread_struct *old_thread,
1023#ifdef CONFIG_PPC_BOOK3S_64 1039#ifdef CONFIG_PPC_BOOK3S_64
1024 if (cpu_has_feature(CPU_FTR_DSCR)) { 1040 if (cpu_has_feature(CPU_FTR_DSCR)) {
1025 u64 dscr = get_paca()->dscr_default; 1041 u64 dscr = get_paca()->dscr_default;
1026 u64 fscr = old_thread->fscr & ~FSCR_DSCR; 1042 if (new_thread->dscr_inherit)
1027
1028 if (new_thread->dscr_inherit) {
1029 dscr = new_thread->dscr; 1043 dscr = new_thread->dscr;
1030 fscr |= FSCR_DSCR;
1031 }
1032 1044
1033 if (old_thread->dscr != dscr) 1045 if (old_thread->dscr != dscr)
1034 mtspr(SPRN_DSCR, dscr); 1046 mtspr(SPRN_DSCR, dscr);
1035
1036 if (old_thread->fscr != fscr)
1037 mtspr(SPRN_FSCR, fscr);
1038 } 1047 }
1039 1048
1040 if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 1049 if (cpu_has_feature(CPU_FTR_ARCH_207S)) {
@@ -1045,9 +1054,22 @@ static inline void restore_sprs(struct thread_struct *old_thread,
1045 if (old_thread->ebbrr != new_thread->ebbrr) 1054 if (old_thread->ebbrr != new_thread->ebbrr)
1046 mtspr(SPRN_EBBRR, new_thread->ebbrr); 1055 mtspr(SPRN_EBBRR, new_thread->ebbrr);
1047 1056
1057 if (old_thread->fscr != new_thread->fscr)
1058 mtspr(SPRN_FSCR, new_thread->fscr);
1059
1048 if (old_thread->tar != new_thread->tar) 1060 if (old_thread->tar != new_thread->tar)
1049 mtspr(SPRN_TAR, new_thread->tar); 1061 mtspr(SPRN_TAR, new_thread->tar);
1050 } 1062 }
1063
1064 if (cpu_has_feature(CPU_FTR_ARCH_300)) {
1065 /* Conditionally restore Load Monitor registers, if enabled */
1066 if (new_thread->fscr & FSCR_LM) {
1067 if (old_thread->lmrr != new_thread->lmrr)
1068 mtspr(SPRN_LMRR, new_thread->lmrr);
1069 if (old_thread->lmser != new_thread->lmser)
1070 mtspr(SPRN_LMSER, new_thread->lmser);
1071 }
1072 }
1051#endif 1073#endif
1052} 1074}
1053 1075
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 946e34ffeae9..bae3db791150 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -56,6 +56,8 @@
56#include <asm/opal.h> 56#include <asm/opal.h>
57#include <asm/fadump.h> 57#include <asm/fadump.h>
58#include <asm/debug.h> 58#include <asm/debug.h>
59#include <asm/epapr_hcalls.h>
60#include <asm/firmware.h>
59 61
60#include <mm/mmu_decl.h> 62#include <mm/mmu_decl.h>
61 63
@@ -645,6 +647,14 @@ static void __init early_reserve_mem(void)
645#endif 647#endif
646} 648}
647 649
650static bool disable_radix;
651static int __init parse_disable_radix(char *p)
652{
653 disable_radix = true;
654 return 0;
655}
656early_param("disable_radix", parse_disable_radix);
657
648void __init early_init_devtree(void *params) 658void __init early_init_devtree(void *params)
649{ 659{
650 phys_addr_t limit; 660 phys_addr_t limit;
@@ -734,11 +744,26 @@ void __init early_init_devtree(void *params)
734 */ 744 */
735 spinning_secondaries = boot_cpu_count - 1; 745 spinning_secondaries = boot_cpu_count - 1;
736#endif 746#endif
747 /*
748 * now fixup radix MMU mode based on kernel command line
749 */
750 if (disable_radix)
751 cur_cpu_spec->mmu_features &= ~MMU_FTR_RADIX;
737 752
738#ifdef CONFIG_PPC_POWERNV 753#ifdef CONFIG_PPC_POWERNV
739 /* Scan and build the list of machine check recoverable ranges */ 754 /* Scan and build the list of machine check recoverable ranges */
740 of_scan_flat_dt(early_init_dt_scan_recoverable_ranges, NULL); 755 of_scan_flat_dt(early_init_dt_scan_recoverable_ranges, NULL);
741#endif 756#endif
757 epapr_paravirt_early_init();
758
759 /* Now try to figure out if we are running on LPAR and so on */
760 pseries_probe_fw_features();
761
762#ifdef CONFIG_PPC_PS3
763 /* Identify PS3 firmware */
764 if (of_flat_dt_is_compatible(of_get_flat_dt_root(), "sony,ps3"))
765 powerpc_firmware_features |= FW_FEATURE_PS3_POSSIBLE;
766#endif
742 767
743 DBG(" <- early_init_devtree()\n"); 768 DBG(" <- early_init_devtree()\n");
744} 769}
diff --git a/arch/powerpc/kernel/rtas-proc.c b/arch/powerpc/kernel/rtas-proc.c
index fb2fb3ea85e5..c82eed97bd22 100644
--- a/arch/powerpc/kernel/rtas-proc.c
+++ b/arch/powerpc/kernel/rtas-proc.c
@@ -698,7 +698,7 @@ static void check_location(struct seq_file *m, const char *c)
698/* 698/*
699 * Format: 699 * Format:
700 * ${LETTER}${NUMBER}[[-/]${LETTER}${NUMBER} [ ... ] ] 700 * ${LETTER}${NUMBER}[[-/]${LETTER}${NUMBER} [ ... ] ]
701 * the '.' may be an abbrevation 701 * the '.' may be an abbreviation
702 */ 702 */
703static void check_location_string(struct seq_file *m, const char *c) 703static void check_location_string(struct seq_file *m, const char *c)
704{ 704{
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c
index 28736ff27fea..6a3e5de544ce 100644
--- a/arch/powerpc/kernel/rtas.c
+++ b/arch/powerpc/kernel/rtas.c
@@ -685,7 +685,7 @@ int rtas_set_indicator_fast(int indicator, int index, int new_value)
685 return rc; 685 return rc;
686} 686}
687 687
688void rtas_restart(char *cmd) 688void __noreturn rtas_restart(char *cmd)
689{ 689{
690 if (rtas_flash_term_hook) 690 if (rtas_flash_term_hook)
691 rtas_flash_term_hook(SYS_RESTART); 691 rtas_flash_term_hook(SYS_RESTART);
@@ -704,7 +704,7 @@ void rtas_power_off(void)
704 for (;;); 704 for (;;);
705} 705}
706 706
707void rtas_halt(void) 707void __noreturn rtas_halt(void)
708{ 708{
709 if (rtas_flash_term_hook) 709 if (rtas_flash_term_hook)
710 rtas_flash_term_hook(SYS_HALT); 710 rtas_flash_term_hook(SYS_HALT);
@@ -1070,7 +1070,7 @@ asmlinkage int ppc_rtas(struct rtas_args __user *uargs)
1070 nret = be32_to_cpu(args.nret); 1070 nret = be32_to_cpu(args.nret);
1071 token = be32_to_cpu(args.token); 1071 token = be32_to_cpu(args.token);
1072 1072
1073 if (nargs > ARRAY_SIZE(args.args) 1073 if (nargs >= ARRAY_SIZE(args.args)
1074 || nret > ARRAY_SIZE(args.args) 1074 || nret > ARRAY_SIZE(args.args)
1075 || nargs + nret > ARRAY_SIZE(args.args)) 1075 || nargs + nret > ARRAY_SIZE(args.args))
1076 return -EINVAL; 1076 return -EINVAL;
@@ -1174,7 +1174,7 @@ void __init rtas_initialize(void)
1174 * the stop-self token if any 1174 * the stop-self token if any
1175 */ 1175 */
1176#ifdef CONFIG_PPC64 1176#ifdef CONFIG_PPC64
1177 if (machine_is(pseries) && firmware_has_feature(FW_FEATURE_LPAR)) { 1177 if (firmware_has_feature(FW_FEATURE_LPAR)) {
1178 rtas_region = min(ppc64_rma_size, RTAS_INSTANTIATE_MAX); 1178 rtas_region = min(ppc64_rma_size, RTAS_INSTANTIATE_MAX);
1179 ibm_suspend_me_token = rtas_token("ibm,suspend-me"); 1179 ibm_suspend_me_token = rtas_token("ibm,suspend-me");
1180 } 1180 }
diff --git a/arch/powerpc/kernel/rtasd.c b/arch/powerpc/kernel/rtasd.c
index c638e2487a9c..a26a02006576 100644
--- a/arch/powerpc/kernel/rtasd.c
+++ b/arch/powerpc/kernel/rtasd.c
@@ -483,7 +483,7 @@ static void rtas_event_scan(struct work_struct *w)
483} 483}
484 484
485#ifdef CONFIG_PPC64 485#ifdef CONFIG_PPC64
486static void retreive_nvram_error_log(void) 486static void retrieve_nvram_error_log(void)
487{ 487{
488 unsigned int err_type ; 488 unsigned int err_type ;
489 int rc ; 489 int rc ;
@@ -501,7 +501,7 @@ static void retreive_nvram_error_log(void)
501 } 501 }
502} 502}
503#else /* CONFIG_PPC64 */ 503#else /* CONFIG_PPC64 */
504static void retreive_nvram_error_log(void) 504static void retrieve_nvram_error_log(void)
505{ 505{
506} 506}
507#endif /* CONFIG_PPC64 */ 507#endif /* CONFIG_PPC64 */
@@ -513,7 +513,7 @@ static void start_event_scan(void)
513 (30000 / rtas_event_scan_rate)); 513 (30000 / rtas_event_scan_rate));
514 514
515 /* Retrieve errors from nvram if any */ 515 /* Retrieve errors from nvram if any */
516 retreive_nvram_error_log(); 516 retrieve_nvram_error_log();
517 517
518 schedule_delayed_work_on(cpumask_first(cpu_online_mask), 518 schedule_delayed_work_on(cpumask_first(cpu_online_mask),
519 &event_scan_work, event_scan_delay); 519 &event_scan_work, event_scan_delay);
@@ -526,10 +526,8 @@ void rtas_cancel_event_scan(void)
526} 526}
527EXPORT_SYMBOL_GPL(rtas_cancel_event_scan); 527EXPORT_SYMBOL_GPL(rtas_cancel_event_scan);
528 528
529static int __init rtas_init(void) 529static int __init rtas_event_scan_init(void)
530{ 530{
531 struct proc_dir_entry *entry;
532
533 if (!machine_is(pseries) && !machine_is(chrp)) 531 if (!machine_is(pseries) && !machine_is(chrp))
534 return 0; 532 return 0;
535 533
@@ -562,13 +560,27 @@ static int __init rtas_init(void)
562 return -ENOMEM; 560 return -ENOMEM;
563 } 561 }
564 562
563 start_event_scan();
564
565 return 0;
566}
567arch_initcall(rtas_event_scan_init);
568
569static int __init rtas_init(void)
570{
571 struct proc_dir_entry *entry;
572
573 if (!machine_is(pseries) && !machine_is(chrp))
574 return 0;
575
576 if (!rtas_log_buf)
577 return -ENODEV;
578
565 entry = proc_create("powerpc/rtas/error_log", S_IRUSR, NULL, 579 entry = proc_create("powerpc/rtas/error_log", S_IRUSR, NULL,
566 &proc_rtas_log_operations); 580 &proc_rtas_log_operations);
567 if (!entry) 581 if (!entry)
568 printk(KERN_ERR "Failed to create error_log proc entry\n"); 582 printk(KERN_ERR "Failed to create error_log proc entry\n");
569 583
570 start_event_scan();
571
572 return 0; 584 return 0;
573} 585}
574__initcall(rtas_init); 586__initcall(rtas_init);
diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c
index 8ca79b7503d8..714b4ba7ab86 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -35,6 +35,7 @@
35#include <linux/percpu.h> 35#include <linux/percpu.h>
36#include <linux/memblock.h> 36#include <linux/memblock.h>
37#include <linux/of_platform.h> 37#include <linux/of_platform.h>
38#include <linux/hugetlb.h>
38#include <asm/io.h> 39#include <asm/io.h>
39#include <asm/paca.h> 40#include <asm/paca.h>
40#include <asm/prom.h> 41#include <asm/prom.h>
@@ -61,6 +62,12 @@
61#include <asm/cputhreads.h> 62#include <asm/cputhreads.h>
62#include <mm/mmu_decl.h> 63#include <mm/mmu_decl.h>
63#include <asm/fadump.h> 64#include <asm/fadump.h>
65#include <asm/udbg.h>
66#include <asm/hugetlb.h>
67#include <asm/livepatch.h>
68#include <asm/mmu_context.h>
69
70#include "setup.h"
64 71
65#ifdef DEBUG 72#ifdef DEBUG
66#include <asm/udbg.h> 73#include <asm/udbg.h>
@@ -494,7 +501,7 @@ void __init smp_setup_cpu_maps(void)
494 * On pSeries LPAR, we need to know how many cpus 501 * On pSeries LPAR, we need to know how many cpus
495 * could possibly be added to this partition. 502 * could possibly be added to this partition.
496 */ 503 */
497 if (machine_is(pseries) && firmware_has_feature(FW_FEATURE_LPAR) && 504 if (firmware_has_feature(FW_FEATURE_LPAR) &&
498 (dn = of_find_node_by_path("/rtas"))) { 505 (dn = of_find_node_by_path("/rtas"))) {
499 int num_addr_cell, num_size_cell, maxcpus; 506 int num_addr_cell, num_size_cell, maxcpus;
500 const __be32 *ireg; 507 const __be32 *ireg;
@@ -575,6 +582,7 @@ void probe_machine(void)
575{ 582{
576 extern struct machdep_calls __machine_desc_start; 583 extern struct machdep_calls __machine_desc_start;
577 extern struct machdep_calls __machine_desc_end; 584 extern struct machdep_calls __machine_desc_end;
585 unsigned int i;
578 586
579 /* 587 /*
580 * Iterate all ppc_md structures until we find the proper 588 * Iterate all ppc_md structures until we find the proper
@@ -582,6 +590,17 @@ void probe_machine(void)
582 */ 590 */
583 DBG("Probing machine type ...\n"); 591 DBG("Probing machine type ...\n");
584 592
593 /*
594 * Check ppc_md is empty, if not we have a bug, ie, we setup an
595 * entry before probe_machine() which will be overwritten
596 */
597 for (i = 0; i < (sizeof(ppc_md) / sizeof(void *)); i++) {
598 if (((void **)&ppc_md)[i]) {
599 printk(KERN_ERR "Entry %d in ppc_md non empty before"
600 " machine probe !\n", i);
601 }
602 }
603
585 for (machine_id = &__machine_desc_start; 604 for (machine_id = &__machine_desc_start;
586 machine_id < &__machine_desc_end; 605 machine_id < &__machine_desc_end;
587 machine_id++) { 606 machine_id++) {
@@ -676,6 +695,8 @@ static struct notifier_block ppc_panic_block = {
676 695
677void __init setup_panic(void) 696void __init setup_panic(void)
678{ 697{
698 if (!ppc_md.panic)
699 return;
679 atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block); 700 atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
680} 701}
681 702
@@ -744,3 +765,169 @@ void arch_setup_pdev_archdata(struct platform_device *pdev)
744 pdev->dev.dma_mask = &pdev->archdata.dma_mask; 765 pdev->dev.dma_mask = &pdev->archdata.dma_mask;
745 set_dma_ops(&pdev->dev, &dma_direct_ops); 766 set_dma_ops(&pdev->dev, &dma_direct_ops);
746} 767}
768
769static __init void print_system_info(void)
770{
771 pr_info("-----------------------------------------------------\n");
772#ifdef CONFIG_PPC_STD_MMU_64
773 pr_info("ppc64_pft_size = 0x%llx\n", ppc64_pft_size);
774#endif
775#ifdef CONFIG_PPC_STD_MMU_32
776 pr_info("Hash_size = 0x%lx\n", Hash_size);
777#endif
778 pr_info("phys_mem_size = 0x%llx\n",
779 (unsigned long long)memblock_phys_mem_size());
780
781 pr_info("dcache_bsize = 0x%x\n", dcache_bsize);
782 pr_info("icache_bsize = 0x%x\n", icache_bsize);
783 if (ucache_bsize != 0)
784 pr_info("ucache_bsize = 0x%x\n", ucache_bsize);
785
786 pr_info("cpu_features = 0x%016lx\n", cur_cpu_spec->cpu_features);
787 pr_info(" possible = 0x%016lx\n",
788 (unsigned long)CPU_FTRS_POSSIBLE);
789 pr_info(" always = 0x%016lx\n",
790 (unsigned long)CPU_FTRS_ALWAYS);
791 pr_info("cpu_user_features = 0x%08x 0x%08x\n",
792 cur_cpu_spec->cpu_user_features,
793 cur_cpu_spec->cpu_user_features2);
794 pr_info("mmu_features = 0x%08x\n", cur_cpu_spec->mmu_features);
795#ifdef CONFIG_PPC64
796 pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features);
797#endif
798
799#ifdef CONFIG_PPC_STD_MMU_64
800 if (htab_address)
801 pr_info("htab_address = 0x%p\n", htab_address);
802 if (htab_hash_mask)
803 pr_info("htab_hash_mask = 0x%lx\n", htab_hash_mask);
804#endif
805#ifdef CONFIG_PPC_STD_MMU_32
806 if (Hash)
807 pr_info("Hash = 0x%p\n", Hash);
808 if (Hash_mask)
809 pr_info("Hash_mask = 0x%lx\n", Hash_mask);
810#endif
811
812 if (PHYSICAL_START > 0)
813 pr_info("physical_start = 0x%llx\n",
814 (unsigned long long)PHYSICAL_START);
815 pr_info("-----------------------------------------------------\n");
816}
817
818/*
819 * Called into from start_kernel this initializes memblock, which is used
820 * to manage page allocation until mem_init is called.
821 */
822void __init setup_arch(char **cmdline_p)
823{
824 *cmdline_p = boot_command_line;
825
826 /* Set a half-reasonable default so udelay does something sensible */
827 loops_per_jiffy = 500000000 / HZ;
828
829 /* Unflatten the device-tree passed by prom_init or kexec */
830 unflatten_device_tree();
831
832 /*
833 * Initialize cache line/block info from device-tree (on ppc64) or
834 * just cputable (on ppc32).
835 */
836 initialize_cache_info();
837
838 /* Initialize RTAS if available. */
839 rtas_initialize();
840
841 /* Check if we have an initrd provided via the device-tree. */
842 check_for_initrd();
843
844 /* Probe the machine type, establish ppc_md. */
845 probe_machine();
846
847 /* Setup panic notifier if requested by the platform. */
848 setup_panic();
849
850 /*
851 * Configure ppc_md.power_save (ppc32 only, 64-bit machines do
852 * it from their respective probe() function.
853 */
854 setup_power_save();
855
856 /* Discover standard serial ports. */
857 find_legacy_serial_ports();
858
859 /* Register early console with the printk subsystem. */
860 register_early_udbg_console();
861
862 /* Setup the various CPU maps based on the device-tree. */
863 smp_setup_cpu_maps();
864
865 /* Initialize xmon. */
866 xmon_setup();
867
868 /* Check the SMT related command line arguments (ppc64). */
869 check_smt_enabled();
870
871 /* On BookE, setup per-core TLB data structures. */
872 setup_tlb_core_data();
873
874 /*
875 * Release secondary cpus out of their spinloops at 0x60 now that
876 * we can map physical -> logical CPU ids.
877 *
878 * Freescale Book3e parts spin in a loop provided by firmware,
879 * so smp_release_cpus() does nothing for them.
880 */
881#ifdef CONFIG_SMP
882 smp_release_cpus();
883#endif
884
885 /* Print various info about the machine that has been gathered so far. */
886 print_system_info();
887
888 /* Reserve large chunks of memory for use by CMA for KVM. */
889 kvm_cma_reserve();
890
891 /*
892 * Reserve any gigantic pages requested on the command line.
893 * memblock needs to have been initialized by the time this is
894 * called since this will reserve memory.
895 */
896 reserve_hugetlb_gpages();
897
898 klp_init_thread_info(&init_thread_info);
899
900 init_mm.start_code = (unsigned long)_stext;
901 init_mm.end_code = (unsigned long) _etext;
902 init_mm.end_data = (unsigned long) _edata;
903 init_mm.brk = klimit;
904#ifdef CONFIG_PPC_64K_PAGES
905 init_mm.context.pte_frag = NULL;
906#endif
907#ifdef CONFIG_SPAPR_TCE_IOMMU
908 mm_iommu_init(&init_mm.context);
909#endif
910 irqstack_early_init();
911 exc_lvl_early_init();
912 emergency_stack_init();
913
914 initmem_init();
915
916#ifdef CONFIG_DUMMY_CONSOLE
917 conswitchp = &dummy_con;
918#endif
919 if (ppc_md.setup_arch)
920 ppc_md.setup_arch();
921
922 paging_init();
923
924 /* Initialize the MMU context management stuff. */
925 mmu_context_init();
926
927#ifdef CONFIG_PPC64
928 /* Interrupt code needs to be 64K-aligned. */
929 if ((unsigned long)_stext & 0xffff)
930 panic("Kernelbase not 64K-aligned (0x%lx)!\n",
931 (unsigned long)_stext);
932#endif
933}
diff --git a/arch/powerpc/kernel/setup.h b/arch/powerpc/kernel/setup.h
new file mode 100644
index 000000000000..cfba134b3024
--- /dev/null
+++ b/arch/powerpc/kernel/setup.h
@@ -0,0 +1,58 @@
1/*
2 * Prototypes for functions that are shared between setup_(32|64|common).c
3 *
4 * Copyright 2016 Michael Ellerman, IBM Corporation.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef __ARCH_POWERPC_KERNEL_SETUP_H
13#define __ARCH_POWERPC_KERNEL_SETUP_H
14
15void initialize_cache_info(void);
16void irqstack_early_init(void);
17
18#ifdef CONFIG_PPC32
19void setup_power_save(void);
20#else
21static inline void setup_power_save(void) { };
22#endif
23
24#if defined(CONFIG_PPC64) && defined(CONFIG_SMP)
25void check_smt_enabled(void);
26#else
27static inline void check_smt_enabled(void) { };
28#endif
29
30#if defined(CONFIG_PPC_BOOK3E) && defined(CONFIG_SMP)
31void setup_tlb_core_data(void);
32#else
33static inline void setup_tlb_core_data(void) { };
34#endif
35
36#if defined(CONFIG_PPC_BOOK3E) || defined(CONFIG_BOOKE) || defined(CONFIG_40x)
37void exc_lvl_early_init(void);
38#else
39static inline void exc_lvl_early_init(void) { };
40#endif
41
42#ifdef CONFIG_PPC64
43void emergency_stack_init(void);
44#else
45static inline void emergency_stack_init(void) { };
46#endif
47
48/*
49 * Having this in kvm_ppc.h makes include dependencies too
50 * tricky to solve for setup-common.c so have it here.
51 */
52#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
53void kvm_cma_reserve(void);
54#else
55static inline void kvm_cma_reserve(void) { };
56#endif
57
58#endif /* __ARCH_POWERPC_KERNEL_SETUP_H */
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index d544fa311757..00f57754407e 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -36,8 +36,6 @@
36#include <asm/time.h> 36#include <asm/time.h>
37#include <asm/serial.h> 37#include <asm/serial.h>
38#include <asm/udbg.h> 38#include <asm/udbg.h>
39#include <asm/mmu_context.h>
40#include <asm/epapr_hcalls.h>
41#include <asm/code-patching.h> 39#include <asm/code-patching.h>
42 40
43#define DBG(fmt...) 41#define DBG(fmt...)
@@ -62,9 +60,7 @@ int icache_bsize;
62int ucache_bsize; 60int ucache_bsize;
63 61
64/* 62/*
65 * We're called here very early in the boot. We determine the machine 63 * We're called here very early in the boot.
66 * type and call the appropriate low-level setup functions.
67 * -- Cort <cort@fsmlabs.com>
68 * 64 *
69 * Note that the kernel may be running at an address which is different 65 * Note that the kernel may be running at an address which is different
70 * from the address that it was linked at, so we must use RELOC/PTRRELOC 66 * from the address that it was linked at, so we must use RELOC/PTRRELOC
@@ -73,7 +69,6 @@ int ucache_bsize;
73notrace unsigned long __init early_init(unsigned long dt_ptr) 69notrace unsigned long __init early_init(unsigned long dt_ptr)
74{ 70{
75 unsigned long offset = reloc_offset(); 71 unsigned long offset = reloc_offset();
76 struct cpu_spec *spec;
77 72
78 /* First zero the BSS -- use memset_io, some platforms don't have 73 /* First zero the BSS -- use memset_io, some platforms don't have
79 * caches on yet */ 74 * caches on yet */
@@ -84,27 +79,19 @@ notrace unsigned long __init early_init(unsigned long dt_ptr)
84 * Identify the CPU type and fix up code sections 79 * Identify the CPU type and fix up code sections
85 * that depend on which cpu we have. 80 * that depend on which cpu we have.
86 */ 81 */
87 spec = identify_cpu(offset, mfspr(SPRN_PVR)); 82 identify_cpu(offset, mfspr(SPRN_PVR));
88 83
89 do_feature_fixups(spec->cpu_features, 84 apply_feature_fixups();
90 PTRRELOC(&__start___ftr_fixup),
91 PTRRELOC(&__stop___ftr_fixup));
92
93 do_feature_fixups(spec->mmu_features,
94 PTRRELOC(&__start___mmu_ftr_fixup),
95 PTRRELOC(&__stop___mmu_ftr_fixup));
96
97 do_lwsync_fixups(spec->cpu_features,
98 PTRRELOC(&__start___lwsync_fixup),
99 PTRRELOC(&__stop___lwsync_fixup));
100
101 do_final_fixups();
102 85
103 return KERNELBASE + offset; 86 return KERNELBASE + offset;
104} 87}
105 88
106 89
107/* 90/*
91 * This is run before start_kernel(), the kernel has been relocated
92 * and we are running with enough of the MMU enabled to have our
93 * proper kernel virtual addresses
94 *
108 * Find out what kind of machine we're on and save any data we need 95 * Find out what kind of machine we're on and save any data we need
109 * from the early boot process (devtree is copied on pmac by prom_init()). 96 * from the early boot process (devtree is copied on pmac by prom_init()).
110 * This is called very early on the boot process, after a minimal 97 * This is called very early on the boot process, after a minimal
@@ -123,27 +110,9 @@ notrace void __init machine_init(u64 dt_ptr)
123 /* Do some early initialization based on the flat device tree */ 110 /* Do some early initialization based on the flat device tree */
124 early_init_devtree(__va(dt_ptr)); 111 early_init_devtree(__va(dt_ptr));
125 112
126 epapr_paravirt_early_init();
127
128 early_init_mmu(); 113 early_init_mmu();
129 114
130 probe_machine();
131
132 setup_kdump_trampoline(); 115 setup_kdump_trampoline();
133
134#ifdef CONFIG_6xx
135 if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
136 cpu_has_feature(CPU_FTR_CAN_NAP))
137 ppc_md.power_save = ppc6xx_idle;
138#endif
139
140#ifdef CONFIG_E500
141 if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
142 cpu_has_feature(CPU_FTR_CAN_NAP))
143 ppc_md.power_save = e500_idle;
144#endif
145 if (ppc_md.progress)
146 ppc_md.progress("id mach(): done", 0x200);
147} 116}
148 117
149/* Checks "l2cr=xxxx" command-line option */ 118/* Checks "l2cr=xxxx" command-line option */
@@ -221,7 +190,7 @@ int __init ppc_init(void)
221 190
222arch_initcall(ppc_init); 191arch_initcall(ppc_init);
223 192
224static void __init irqstack_early_init(void) 193void __init irqstack_early_init(void)
225{ 194{
226 unsigned int i; 195 unsigned int i;
227 196
@@ -236,7 +205,7 @@ static void __init irqstack_early_init(void)
236} 205}
237 206
238#if defined(CONFIG_BOOKE) || defined(CONFIG_40x) 207#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
239static void __init exc_lvl_early_init(void) 208void __init exc_lvl_early_init(void)
240{ 209{
241 unsigned int i, hw_cpu; 210 unsigned int i, hw_cpu;
242 211
@@ -259,33 +228,25 @@ static void __init exc_lvl_early_init(void)
259#endif 228#endif
260 } 229 }
261} 230}
262#else
263#define exc_lvl_early_init()
264#endif 231#endif
265 232
266/* Warning, IO base is not yet inited */ 233void __init setup_power_save(void)
267void __init setup_arch(char **cmdline_p)
268{ 234{
269 *cmdline_p = boot_command_line; 235#ifdef CONFIG_6xx
270 236 if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
271 /* so udelay does something sensible, assume <= 1000 bogomips */ 237 cpu_has_feature(CPU_FTR_CAN_NAP))
272 loops_per_jiffy = 500000000 / HZ; 238 ppc_md.power_save = ppc6xx_idle;
273 239#endif
274 unflatten_device_tree();
275 check_for_initrd();
276
277 if (ppc_md.init_early)
278 ppc_md.init_early();
279
280 find_legacy_serial_ports();
281
282 smp_setup_cpu_maps();
283
284 /* Register early console */
285 register_early_udbg_console();
286 240
287 xmon_setup(); 241#ifdef CONFIG_E500
242 if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
243 cpu_has_feature(CPU_FTR_CAN_NAP))
244 ppc_md.power_save = e500_idle;
245#endif
246}
288 247
248__init void initialize_cache_info(void)
249{
289 /* 250 /*
290 * Set cache line size based on type of cpu as a default. 251 * Set cache line size based on type of cpu as a default.
291 * Systems with OF can look in the properties on the cpu node(s) 252 * Systems with OF can look in the properties on the cpu node(s)
@@ -296,32 +257,4 @@ void __init setup_arch(char **cmdline_p)
296 ucache_bsize = 0; 257 ucache_bsize = 0;
297 if (cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE)) 258 if (cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE))
298 ucache_bsize = icache_bsize = dcache_bsize; 259 ucache_bsize = icache_bsize = dcache_bsize;
299
300 if (ppc_md.panic)
301 setup_panic();
302
303 init_mm.start_code = (unsigned long)_stext;
304 init_mm.end_code = (unsigned long) _etext;
305 init_mm.end_data = (unsigned long) _edata;
306 init_mm.brk = klimit;
307
308 exc_lvl_early_init();
309
310 irqstack_early_init();
311
312 initmem_init();
313 if ( ppc_md.progress ) ppc_md.progress("setup_arch: initmem", 0x3eab);
314
315#ifdef CONFIG_DUMMY_CONSOLE
316 conswitchp = &dummy_con;
317#endif
318
319 if (ppc_md.setup_arch)
320 ppc_md.setup_arch();
321 if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab);
322
323 paging_init();
324
325 /* Initialize the MMU context management stuff */
326 mmu_context_init();
327} 260}
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 96d4a2b23d0f..d8216aed22b7 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -35,7 +35,6 @@
35#include <linux/pci.h> 35#include <linux/pci.h>
36#include <linux/lockdep.h> 36#include <linux/lockdep.h>
37#include <linux/memblock.h> 37#include <linux/memblock.h>
38#include <linux/hugetlb.h>
39#include <linux/memory.h> 38#include <linux/memory.h>
40#include <linux/nmi.h> 39#include <linux/nmi.h>
41 40
@@ -64,12 +63,10 @@
64#include <asm/xmon.h> 63#include <asm/xmon.h>
65#include <asm/udbg.h> 64#include <asm/udbg.h>
66#include <asm/kexec.h> 65#include <asm/kexec.h>
67#include <asm/mmu_context.h>
68#include <asm/code-patching.h> 66#include <asm/code-patching.h>
69#include <asm/kvm_ppc.h>
70#include <asm/hugetlb.h>
71#include <asm/epapr_hcalls.h>
72#include <asm/livepatch.h> 67#include <asm/livepatch.h>
68#include <asm/opal.h>
69#include <asm/cputhreads.h>
73 70
74#ifdef DEBUG 71#ifdef DEBUG
75#define DBG(fmt...) udbg_printf(fmt) 72#define DBG(fmt...) udbg_printf(fmt)
@@ -100,7 +97,7 @@ int icache_bsize;
100int ucache_bsize; 97int ucache_bsize;
101 98
102#if defined(CONFIG_PPC_BOOK3E) && defined(CONFIG_SMP) 99#if defined(CONFIG_PPC_BOOK3E) && defined(CONFIG_SMP)
103static void setup_tlb_core_data(void) 100void __init setup_tlb_core_data(void)
104{ 101{
105 int cpu; 102 int cpu;
106 103
@@ -133,10 +130,6 @@ static void setup_tlb_core_data(void)
133 } 130 }
134 } 131 }
135} 132}
136#else
137static void setup_tlb_core_data(void)
138{
139}
140#endif 133#endif
141 134
142#ifdef CONFIG_SMP 135#ifdef CONFIG_SMP
@@ -144,7 +137,7 @@ static void setup_tlb_core_data(void)
144static char *smt_enabled_cmdline; 137static char *smt_enabled_cmdline;
145 138
146/* Look for ibm,smt-enabled OF option */ 139/* Look for ibm,smt-enabled OF option */
147static void check_smt_enabled(void) 140void __init check_smt_enabled(void)
148{ 141{
149 struct device_node *dn; 142 struct device_node *dn;
150 const char *smt_option; 143 const char *smt_option;
@@ -193,12 +186,10 @@ static int __init early_smt_enabled(char *p)
193} 186}
194early_param("smt-enabled", early_smt_enabled); 187early_param("smt-enabled", early_smt_enabled);
195 188
196#else
197#define check_smt_enabled()
198#endif /* CONFIG_SMP */ 189#endif /* CONFIG_SMP */
199 190
200/** Fix up paca fields required for the boot cpu */ 191/** Fix up paca fields required for the boot cpu */
201static void fixup_boot_paca(void) 192static void __init fixup_boot_paca(void)
202{ 193{
203 /* The boot cpu is started */ 194 /* The boot cpu is started */
204 get_paca()->cpu_start = 1; 195 get_paca()->cpu_start = 1;
@@ -206,23 +197,50 @@ static void fixup_boot_paca(void)
206 get_paca()->data_offset = 0; 197 get_paca()->data_offset = 0;
207} 198}
208 199
209static void cpu_ready_for_interrupts(void) 200static void __init configure_exceptions(void)
210{ 201{
211 /* Set IR and DR in PACA MSR */
212 get_paca()->kernel_msr = MSR_KERNEL;
213
214 /* 202 /*
215 * Enable AIL if supported, and we are in hypervisor mode. If we are 203 * Setup the trampolines from the lowmem exception vectors
216 * not in hypervisor mode, we enable relocation-on interrupts later 204 * to the kdump kernel when not using a relocatable kernel.
217 * in pSeries_setup_arch() using the H_SET_MODE hcall.
218 */ 205 */
219 if (cpu_has_feature(CPU_FTR_HVMODE) && 206 setup_kdump_trampoline();
220 cpu_has_feature(CPU_FTR_ARCH_207S)) { 207
221 unsigned long lpcr = mfspr(SPRN_LPCR); 208 /* Under a PAPR hypervisor, we need hypercalls */
222 mtspr(SPRN_LPCR, lpcr | LPCR_AIL_3); 209 if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
210 /* Enable AIL if possible */
211 pseries_enable_reloc_on_exc();
212
213 /*
214 * Tell the hypervisor that we want our exceptions to
215 * be taken in little endian mode.
216 *
217 * We don't call this for big endian as our calling convention
218 * makes us always enter in BE, and the call may fail under
219 * some circumstances with kdump.
220 */
221#ifdef __LITTLE_ENDIAN__
222 pseries_little_endian_exceptions();
223#endif
224 } else {
225 /* Set endian mode using OPAL */
226 if (firmware_has_feature(FW_FEATURE_OPAL))
227 opal_configure_cores();
228
229 /* Enable AIL if supported, and we are in hypervisor mode */
230 if (cpu_has_feature(CPU_FTR_HVMODE) &&
231 cpu_has_feature(CPU_FTR_ARCH_207S)) {
232 unsigned long lpcr = mfspr(SPRN_LPCR);
233 mtspr(SPRN_LPCR, lpcr | LPCR_AIL_3);
234 }
223 } 235 }
224} 236}
225 237
238static void cpu_ready_for_interrupts(void)
239{
240 /* Set IR and DR in PACA MSR */
241 get_paca()->kernel_msr = MSR_KERNEL;
242}
243
226/* 244/*
227 * Early initialization entry point. This is called by head.S 245 * Early initialization entry point. This is called by head.S
228 * with MMU translation disabled. We rely on the "feature" of 246 * with MMU translation disabled. We rely on the "feature" of
@@ -270,22 +288,22 @@ void __init early_setup(unsigned long dt_ptr)
270 */ 288 */
271 early_init_devtree(__va(dt_ptr)); 289 early_init_devtree(__va(dt_ptr));
272 290
273 epapr_paravirt_early_init();
274
275 /* Now we know the logical id of our boot cpu, setup the paca. */ 291 /* Now we know the logical id of our boot cpu, setup the paca. */
276 setup_paca(&paca[boot_cpuid]); 292 setup_paca(&paca[boot_cpuid]);
277 fixup_boot_paca(); 293 fixup_boot_paca();
278 294
279 /* Probe the machine type */ 295 /*
280 probe_machine(); 296 * Configure exception handlers. This include setting up trampolines
281 297 * if needed, setting exception endian mode, etc...
282 setup_kdump_trampoline(); 298 */
283 299 configure_exceptions();
284 DBG("Found, Initializing memory management...\n");
285 300
286 /* Initialize the hash table or TLB handling */ 301 /* Initialize the hash table or TLB handling */
287 early_init_mmu(); 302 early_init_mmu();
288 303
304 /* Apply all the dynamic patching */
305 apply_feature_fixups();
306
289 /* 307 /*
290 * At this point, we can let interrupts switch to virtual mode 308 * At this point, we can let interrupts switch to virtual mode
291 * (the MMU has been setup), so adjust the MSR in the PACA to 309 * (the MMU has been setup), so adjust the MSR in the PACA to
@@ -293,16 +311,6 @@ void __init early_setup(unsigned long dt_ptr)
293 */ 311 */
294 cpu_ready_for_interrupts(); 312 cpu_ready_for_interrupts();
295 313
296 /* Reserve large chunks of memory for use by CMA for KVM */
297 kvm_cma_reserve();
298
299 /*
300 * Reserve any gigantic pages requested on the command line.
301 * memblock needs to have been initialized by the time this is
302 * called since this will reserve memory.
303 */
304 reserve_hugetlb_gpages();
305
306 DBG(" <- early_setup()\n"); 314 DBG(" <- early_setup()\n");
307 315
308#ifdef CONFIG_PPC_EARLY_DEBUG_BOOTX 316#ifdef CONFIG_PPC_EARLY_DEBUG_BOOTX
@@ -321,7 +329,7 @@ void __init early_setup(unsigned long dt_ptr)
321#ifdef CONFIG_SMP 329#ifdef CONFIG_SMP
322void early_setup_secondary(void) 330void early_setup_secondary(void)
323{ 331{
324 /* Mark interrupts enabled in PACA */ 332 /* Mark interrupts disabled in PACA */
325 get_paca()->soft_enabled = 0; 333 get_paca()->soft_enabled = 0;
326 334
327 /* Initialize the hash table or TLB handling */ 335 /* Initialize the hash table or TLB handling */
@@ -391,7 +399,7 @@ void smp_release_cpus(void)
391 * cache informations about the CPU that will be used by cache flush 399 * cache informations about the CPU that will be used by cache flush
392 * routines and/or provided to userland 400 * routines and/or provided to userland
393 */ 401 */
394static void __init initialize_cache_info(void) 402void __init initialize_cache_info(void)
395{ 403{
396 struct device_node *np; 404 struct device_node *np;
397 unsigned long num_cpus = 0; 405 unsigned long num_cpus = 0;
@@ -456,127 +464,11 @@ static void __init initialize_cache_info(void)
456 } 464 }
457 } 465 }
458 466
459 DBG(" <- initialize_cache_info()\n"); 467 /* For use by binfmt_elf */
460} 468 dcache_bsize = ppc64_caches.dline_size;
461 469 icache_bsize = ppc64_caches.iline_size;
462
463/*
464 * Do some initial setup of the system. The parameters are those which
465 * were passed in from the bootloader.
466 */
467void __init setup_system(void)
468{
469 DBG(" -> setup_system()\n");
470
471 /* Apply the CPUs-specific and firmware specific fixups to kernel
472 * text (nop out sections not relevant to this CPU or this firmware)
473 */
474 do_feature_fixups(cur_cpu_spec->cpu_features,
475 &__start___ftr_fixup, &__stop___ftr_fixup);
476 do_feature_fixups(cur_cpu_spec->mmu_features,
477 &__start___mmu_ftr_fixup, &__stop___mmu_ftr_fixup);
478 do_feature_fixups(powerpc_firmware_features,
479 &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup);
480 do_lwsync_fixups(cur_cpu_spec->cpu_features,
481 &__start___lwsync_fixup, &__stop___lwsync_fixup);
482 do_final_fixups();
483
484 /*
485 * Unflatten the device-tree passed by prom_init or kexec
486 */
487 unflatten_device_tree();
488
489 /*
490 * Fill the ppc64_caches & systemcfg structures with informations
491 * retrieved from the device-tree.
492 */
493 initialize_cache_info();
494
495#ifdef CONFIG_PPC_RTAS
496 /*
497 * Initialize RTAS if available
498 */
499 rtas_initialize();
500#endif /* CONFIG_PPC_RTAS */
501
502 /*
503 * Check if we have an initrd provided via the device-tree
504 */
505 check_for_initrd();
506
507 /*
508 * Do some platform specific early initializations, that includes
509 * setting up the hash table pointers. It also sets up some interrupt-mapping
510 * related options that will be used by finish_device_tree()
511 */
512 if (ppc_md.init_early)
513 ppc_md.init_early();
514
515 /*
516 * We can discover serial ports now since the above did setup the
517 * hash table management for us, thus ioremap works. We do that early
518 * so that further code can be debugged
519 */
520 find_legacy_serial_ports();
521
522 /*
523 * Register early console
524 */
525 register_early_udbg_console();
526
527 /*
528 * Initialize xmon
529 */
530 xmon_setup();
531
532 smp_setup_cpu_maps();
533 check_smt_enabled();
534 setup_tlb_core_data();
535
536 /*
537 * Freescale Book3e parts spin in a loop provided by firmware,
538 * so smp_release_cpus() does nothing for them
539 */
540#if defined(CONFIG_SMP)
541 /* Release secondary cpus out of their spinloops at 0x60 now that
542 * we can map physical -> logical CPU ids
543 */
544 smp_release_cpus();
545#endif
546
547 pr_info("Starting Linux %s %s\n", init_utsname()->machine,
548 init_utsname()->version);
549
550 pr_info("-----------------------------------------------------\n");
551 pr_info("ppc64_pft_size = 0x%llx\n", ppc64_pft_size);
552 pr_info("phys_mem_size = 0x%llx\n", memblock_phys_mem_size());
553
554 if (ppc64_caches.dline_size != 0x80)
555 pr_info("dcache_line_size = 0x%x\n", ppc64_caches.dline_size);
556 if (ppc64_caches.iline_size != 0x80)
557 pr_info("icache_line_size = 0x%x\n", ppc64_caches.iline_size);
558
559 pr_info("cpu_features = 0x%016lx\n", cur_cpu_spec->cpu_features);
560 pr_info(" possible = 0x%016lx\n", CPU_FTRS_POSSIBLE);
561 pr_info(" always = 0x%016lx\n", CPU_FTRS_ALWAYS);
562 pr_info("cpu_user_features = 0x%08x 0x%08x\n", cur_cpu_spec->cpu_user_features,
563 cur_cpu_spec->cpu_user_features2);
564 pr_info("mmu_features = 0x%08x\n", cur_cpu_spec->mmu_features);
565 pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features);
566
567#ifdef CONFIG_PPC_STD_MMU_64
568 if (htab_address)
569 pr_info("htab_address = 0x%p\n", htab_address);
570
571 pr_info("htab_hash_mask = 0x%lx\n", htab_hash_mask);
572#endif
573
574 if (PHYSICAL_START > 0)
575 pr_info("physical_start = 0x%llx\n",
576 (unsigned long long)PHYSICAL_START);
577 pr_info("-----------------------------------------------------\n");
578 470
579 DBG(" <- setup_system()\n"); 471 DBG(" <- initialize_cache_info()\n");
580} 472}
581 473
582/* This returns the limit below which memory accesses to the linear 474/* This returns the limit below which memory accesses to the linear
@@ -584,7 +476,7 @@ void __init setup_system(void)
584 * used to allocate interrupt or emergency stacks for which our 476 * used to allocate interrupt or emergency stacks for which our
585 * exception entry path doesn't deal with being interrupted. 477 * exception entry path doesn't deal with being interrupted.
586 */ 478 */
587static u64 safe_stack_limit(void) 479static __init u64 safe_stack_limit(void)
588{ 480{
589#ifdef CONFIG_PPC_BOOK3E 481#ifdef CONFIG_PPC_BOOK3E
590 /* Freescale BookE bolts the entire linear mapping */ 482 /* Freescale BookE bolts the entire linear mapping */
@@ -600,7 +492,7 @@ static u64 safe_stack_limit(void)
600#endif 492#endif
601} 493}
602 494
603static void __init irqstack_early_init(void) 495void __init irqstack_early_init(void)
604{ 496{
605 u64 limit = safe_stack_limit(); 497 u64 limit = safe_stack_limit();
606 unsigned int i; 498 unsigned int i;
@@ -620,7 +512,7 @@ static void __init irqstack_early_init(void)
620} 512}
621 513
622#ifdef CONFIG_PPC_BOOK3E 514#ifdef CONFIG_PPC_BOOK3E
623static void __init exc_lvl_early_init(void) 515void __init exc_lvl_early_init(void)
624{ 516{
625 unsigned int i; 517 unsigned int i;
626 unsigned long sp; 518 unsigned long sp;
@@ -642,8 +534,6 @@ static void __init exc_lvl_early_init(void)
642 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) 534 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC))
643 patch_exception(0x040, exc_debug_debug_book3e); 535 patch_exception(0x040, exc_debug_debug_book3e);
644} 536}
645#else
646#define exc_lvl_early_init()
647#endif 537#endif
648 538
649/* 539/*
@@ -651,7 +541,7 @@ static void __init exc_lvl_early_init(void)
651 * early in SMP boots before relocation is enabled. Exclusive emergency 541 * early in SMP boots before relocation is enabled. Exclusive emergency
652 * stack for machine checks. 542 * stack for machine checks.
653 */ 543 */
654static void __init emergency_stack_init(void) 544void __init emergency_stack_init(void)
655{ 545{
656 u64 limit; 546 u64 limit;
657 unsigned int i; 547 unsigned int i;
@@ -682,61 +572,6 @@ static void __init emergency_stack_init(void)
682 } 572 }
683} 573}
684 574
685/*
686 * Called into from start_kernel this initializes memblock, which is used
687 * to manage page allocation until mem_init is called.
688 */
689void __init setup_arch(char **cmdline_p)
690{
691 *cmdline_p = boot_command_line;
692
693 /*
694 * Set cache line size based on type of cpu as a default.
695 * Systems with OF can look in the properties on the cpu node(s)
696 * for a possibly more accurate value.
697 */
698 dcache_bsize = ppc64_caches.dline_size;
699 icache_bsize = ppc64_caches.iline_size;
700
701 if (ppc_md.panic)
702 setup_panic();
703
704 klp_init_thread_info(&init_thread_info);
705
706 init_mm.start_code = (unsigned long)_stext;
707 init_mm.end_code = (unsigned long) _etext;
708 init_mm.end_data = (unsigned long) _edata;
709 init_mm.brk = klimit;
710#ifdef CONFIG_PPC_64K_PAGES
711 init_mm.context.pte_frag = NULL;
712#endif
713#ifdef CONFIG_SPAPR_TCE_IOMMU
714 mm_iommu_init(&init_mm.context);
715#endif
716 irqstack_early_init();
717 exc_lvl_early_init();
718 emergency_stack_init();
719
720 initmem_init();
721
722#ifdef CONFIG_DUMMY_CONSOLE
723 conswitchp = &dummy_con;
724#endif
725
726 if (ppc_md.setup_arch)
727 ppc_md.setup_arch();
728
729 paging_init();
730
731 /* Initialize the MMU context management stuff */
732 mmu_context_init();
733
734 /* Interrupt code needs to be 64K-aligned */
735 if ((unsigned long)_stext & 0xffff)
736 panic("Kernelbase not 64K-aligned (0x%lx)!\n",
737 (unsigned long)_stext);
738}
739
740#ifdef CONFIG_SMP 575#ifdef CONFIG_SMP
741#define PCPU_DYN_SIZE () 576#define PCPU_DYN_SIZE ()
742 577
diff --git a/arch/powerpc/kernel/signal_64.c b/arch/powerpc/kernel/signal_64.c
index 25520794aa37..7e49984d4331 100644
--- a/arch/powerpc/kernel/signal_64.c
+++ b/arch/powerpc/kernel/signal_64.c
@@ -104,6 +104,7 @@ static long setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs,
104 */ 104 */
105#ifdef CONFIG_ALTIVEC 105#ifdef CONFIG_ALTIVEC
106 elf_vrreg_t __user *v_regs = sigcontext_vmx_regs(sc); 106 elf_vrreg_t __user *v_regs = sigcontext_vmx_regs(sc);
107 unsigned long vrsave;
107#endif 108#endif
108 unsigned long msr = regs->msr; 109 unsigned long msr = regs->msr;
109 long err = 0; 110 long err = 0;
@@ -125,9 +126,13 @@ static long setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs,
125 /* We always copy to/from vrsave, it's 0 if we don't have or don't 126 /* We always copy to/from vrsave, it's 0 if we don't have or don't
126 * use altivec. 127 * use altivec.
127 */ 128 */
128 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 129 vrsave = 0;
129 current->thread.vrsave = mfspr(SPRN_VRSAVE); 130 if (cpu_has_feature(CPU_FTR_ALTIVEC)) {
130 err |= __put_user(current->thread.vrsave, (u32 __user *)&v_regs[33]); 131 vrsave = mfspr(SPRN_VRSAVE);
132 current->thread.vrsave = vrsave;
133 }
134
135 err |= __put_user(vrsave, (u32 __user *)&v_regs[33]);
131#else /* CONFIG_ALTIVEC */ 136#else /* CONFIG_ALTIVEC */
132 err |= __put_user(0, &sc->v_regs); 137 err |= __put_user(0, &sc->v_regs);
133#endif /* CONFIG_ALTIVEC */ 138#endif /* CONFIG_ALTIVEC */
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index 55c924b65f71..5a1f015ea9f3 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -31,6 +31,7 @@
31#include <linux/cpu.h> 31#include <linux/cpu.h>
32#include <linux/notifier.h> 32#include <linux/notifier.h>
33#include <linux/topology.h> 33#include <linux/topology.h>
34#include <linux/profile.h>
34 35
35#include <asm/ptrace.h> 36#include <asm/ptrace.h>
36#include <linux/atomic.h> 37#include <linux/atomic.h>
@@ -53,6 +54,7 @@
53#include <asm/vdso.h> 54#include <asm/vdso.h>
54#include <asm/debug.h> 55#include <asm/debug.h>
55#include <asm/kexec.h> 56#include <asm/kexec.h>
57#include <asm/asm-prototypes.h>
56 58
57#ifdef DEBUG 59#ifdef DEBUG
58#include <asm/udbg.h> 60#include <asm/udbg.h>
@@ -593,6 +595,7 @@ out:
593 of_node_put(np); 595 of_node_put(np);
594 return id; 596 return id;
595} 597}
598EXPORT_SYMBOL_GPL(cpu_to_core_id);
596 599
597/* Helper routines for cpu to core mapping */ 600/* Helper routines for cpu to core mapping */
598int cpu_core_index_of_thread(int cpu) 601int cpu_core_index_of_thread(int cpu)
diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c
index 692873bff334..c4f1d1f7bae0 100644
--- a/arch/powerpc/kernel/sysfs.c
+++ b/arch/powerpc/kernel/sysfs.c
@@ -35,7 +35,7 @@ static DEFINE_PER_CPU(struct cpu, cpu_devices);
35#ifdef CONFIG_PPC64 35#ifdef CONFIG_PPC64
36 36
37/* Time in microseconds we delay before sleeping in the idle loop */ 37/* Time in microseconds we delay before sleeping in the idle loop */
38DEFINE_PER_CPU(long, smt_snooze_delay) = { 100 }; 38static DEFINE_PER_CPU(long, smt_snooze_delay) = { 100 };
39 39
40static ssize_t store_smt_snooze_delay(struct device *dev, 40static ssize_t store_smt_snooze_delay(struct device *dev,
41 struct device_attribute *attr, 41 struct device_attribute *attr,
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index 3ed9a5a21d77..4e7759c8ca30 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -96,7 +96,8 @@ static struct clocksource clocksource_timebase = {
96 .read = timebase_read, 96 .read = timebase_read,
97}; 97};
98 98
99#define DECREMENTER_MAX 0x7fffffff 99#define DECREMENTER_DEFAULT_MAX 0x7FFFFFFF
100u64 decrementer_max = DECREMENTER_DEFAULT_MAX;
100 101
101static int decrementer_set_next_event(unsigned long evt, 102static int decrementer_set_next_event(unsigned long evt,
102 struct clock_event_device *dev); 103 struct clock_event_device *dev);
@@ -166,7 +167,15 @@ DEFINE_PER_CPU(unsigned long, cputime_scaled_last_delta);
166 167
167cputime_t cputime_one_jiffy; 168cputime_t cputime_one_jiffy;
168 169
170#ifdef CONFIG_PPC_SPLPAR
169void (*dtl_consumer)(struct dtl_entry *, u64); 171void (*dtl_consumer)(struct dtl_entry *, u64);
172#endif
173
174#ifdef CONFIG_PPC64
175#define get_accounting(tsk) (&get_paca()->accounting)
176#else
177#define get_accounting(tsk) (&task_thread_info(tsk)->accounting)
178#endif
170 179
171static void calc_cputime_factors(void) 180static void calc_cputime_factors(void)
172{ 181{
@@ -186,7 +195,7 @@ static void calc_cputime_factors(void)
186 * Read the SPURR on systems that have it, otherwise the PURR, 195 * Read the SPURR on systems that have it, otherwise the PURR,
187 * or if that doesn't exist return the timebase value passed in. 196 * or if that doesn't exist return the timebase value passed in.
188 */ 197 */
189static u64 read_spurr(u64 tb) 198static unsigned long read_spurr(unsigned long tb)
190{ 199{
191 if (cpu_has_feature(CPU_FTR_SPURR)) 200 if (cpu_has_feature(CPU_FTR_SPURR))
192 return mfspr(SPRN_SPURR); 201 return mfspr(SPRN_SPURR);
@@ -249,8 +258,8 @@ static u64 scan_dispatch_log(u64 stop_tb)
249void accumulate_stolen_time(void) 258void accumulate_stolen_time(void)
250{ 259{
251 u64 sst, ust; 260 u64 sst, ust;
252
253 u8 save_soft_enabled = local_paca->soft_enabled; 261 u8 save_soft_enabled = local_paca->soft_enabled;
262 struct cpu_accounting_data *acct = &local_paca->accounting;
254 263
255 /* We are called early in the exception entry, before 264 /* We are called early in the exception entry, before
256 * soft/hard_enabled are sync'ed to the expected state 265 * soft/hard_enabled are sync'ed to the expected state
@@ -260,10 +269,10 @@ void accumulate_stolen_time(void)
260 */ 269 */
261 local_paca->soft_enabled = 0; 270 local_paca->soft_enabled = 0;
262 271
263 sst = scan_dispatch_log(local_paca->starttime_user); 272 sst = scan_dispatch_log(acct->starttime_user);
264 ust = scan_dispatch_log(local_paca->starttime); 273 ust = scan_dispatch_log(acct->starttime);
265 local_paca->system_time -= sst; 274 acct->system_time -= sst;
266 local_paca->user_time -= ust; 275 acct->user_time -= ust;
267 local_paca->stolen_time += ust + sst; 276 local_paca->stolen_time += ust + sst;
268 277
269 local_paca->soft_enabled = save_soft_enabled; 278 local_paca->soft_enabled = save_soft_enabled;
@@ -275,7 +284,7 @@ static inline u64 calculate_stolen_time(u64 stop_tb)
275 284
276 if (get_paca()->dtl_ridx != be64_to_cpu(get_lppaca()->dtl_idx)) { 285 if (get_paca()->dtl_ridx != be64_to_cpu(get_lppaca()->dtl_idx)) {
277 stolen = scan_dispatch_log(stop_tb); 286 stolen = scan_dispatch_log(stop_tb);
278 get_paca()->system_time -= stolen; 287 get_paca()->accounting.system_time -= stolen;
279 } 288 }
280 289
281 stolen += get_paca()->stolen_time; 290 stolen += get_paca()->stolen_time;
@@ -295,27 +304,29 @@ static inline u64 calculate_stolen_time(u64 stop_tb)
295 * Account time for a transition between system, hard irq 304 * Account time for a transition between system, hard irq
296 * or soft irq state. 305 * or soft irq state.
297 */ 306 */
298static u64 vtime_delta(struct task_struct *tsk, 307static unsigned long vtime_delta(struct task_struct *tsk,
299 u64 *sys_scaled, u64 *stolen) 308 unsigned long *sys_scaled,
309 unsigned long *stolen)
300{ 310{
301 u64 now, nowscaled, deltascaled; 311 unsigned long now, nowscaled, deltascaled;
302 u64 udelta, delta, user_scaled; 312 unsigned long udelta, delta, user_scaled;
313 struct cpu_accounting_data *acct = get_accounting(tsk);
303 314
304 WARN_ON_ONCE(!irqs_disabled()); 315 WARN_ON_ONCE(!irqs_disabled());
305 316
306 now = mftb(); 317 now = mftb();
307 nowscaled = read_spurr(now); 318 nowscaled = read_spurr(now);
308 get_paca()->system_time += now - get_paca()->starttime; 319 acct->system_time += now - acct->starttime;
309 get_paca()->starttime = now; 320 acct->starttime = now;
310 deltascaled = nowscaled - get_paca()->startspurr; 321 deltascaled = nowscaled - acct->startspurr;
311 get_paca()->startspurr = nowscaled; 322 acct->startspurr = nowscaled;
312 323
313 *stolen = calculate_stolen_time(now); 324 *stolen = calculate_stolen_time(now);
314 325
315 delta = get_paca()->system_time; 326 delta = acct->system_time;
316 get_paca()->system_time = 0; 327 acct->system_time = 0;
317 udelta = get_paca()->user_time - get_paca()->utime_sspurr; 328 udelta = acct->user_time - acct->utime_sspurr;
318 get_paca()->utime_sspurr = get_paca()->user_time; 329 acct->utime_sspurr = acct->user_time;
319 330
320 /* 331 /*
321 * Because we don't read the SPURR on every kernel entry/exit, 332 * Because we don't read the SPURR on every kernel entry/exit,
@@ -337,14 +348,14 @@ static u64 vtime_delta(struct task_struct *tsk,
337 *sys_scaled = deltascaled; 348 *sys_scaled = deltascaled;
338 } 349 }
339 } 350 }
340 get_paca()->user_time_scaled += user_scaled; 351 acct->user_time_scaled += user_scaled;
341 352
342 return delta; 353 return delta;
343} 354}
344 355
345void vtime_account_system(struct task_struct *tsk) 356void vtime_account_system(struct task_struct *tsk)
346{ 357{
347 u64 delta, sys_scaled, stolen; 358 unsigned long delta, sys_scaled, stolen;
348 359
349 delta = vtime_delta(tsk, &sys_scaled, &stolen); 360 delta = vtime_delta(tsk, &sys_scaled, &stolen);
350 account_system_time(tsk, 0, delta, sys_scaled); 361 account_system_time(tsk, 0, delta, sys_scaled);
@@ -355,7 +366,7 @@ EXPORT_SYMBOL_GPL(vtime_account_system);
355 366
356void vtime_account_idle(struct task_struct *tsk) 367void vtime_account_idle(struct task_struct *tsk)
357{ 368{
358 u64 delta, sys_scaled, stolen; 369 unsigned long delta, sys_scaled, stolen;
359 370
360 delta = vtime_delta(tsk, &sys_scaled, &stolen); 371 delta = vtime_delta(tsk, &sys_scaled, &stolen);
361 account_idle_time(delta + stolen); 372 account_idle_time(delta + stolen);
@@ -373,15 +384,32 @@ void vtime_account_idle(struct task_struct *tsk)
373void vtime_account_user(struct task_struct *tsk) 384void vtime_account_user(struct task_struct *tsk)
374{ 385{
375 cputime_t utime, utimescaled; 386 cputime_t utime, utimescaled;
387 struct cpu_accounting_data *acct = get_accounting(tsk);
376 388
377 utime = get_paca()->user_time; 389 utime = acct->user_time;
378 utimescaled = get_paca()->user_time_scaled; 390 utimescaled = acct->user_time_scaled;
379 get_paca()->user_time = 0; 391 acct->user_time = 0;
380 get_paca()->user_time_scaled = 0; 392 acct->user_time_scaled = 0;
381 get_paca()->utime_sspurr = 0; 393 acct->utime_sspurr = 0;
382 account_user_time(tsk, utime, utimescaled); 394 account_user_time(tsk, utime, utimescaled);
383} 395}
384 396
397#ifdef CONFIG_PPC32
398/*
399 * Called from the context switch with interrupts disabled, to charge all
400 * accumulated times to the current process, and to prepare accounting on
401 * the next process.
402 */
403void arch_vtime_task_switch(struct task_struct *prev)
404{
405 struct cpu_accounting_data *acct = get_accounting(current);
406
407 acct->starttime = get_accounting(prev)->starttime;
408 acct->system_time = 0;
409 acct->user_time = 0;
410}
411#endif /* CONFIG_PPC32 */
412
385#else /* ! CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ 413#else /* ! CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */
386#define calc_cputime_factors() 414#define calc_cputime_factors()
387#endif 415#endif
@@ -504,8 +532,8 @@ static void __timer_interrupt(void)
504 __this_cpu_inc(irq_stat.timer_irqs_event); 532 __this_cpu_inc(irq_stat.timer_irqs_event);
505 } else { 533 } else {
506 now = *next_tb - now; 534 now = *next_tb - now;
507 if (now <= DECREMENTER_MAX) 535 if (now <= decrementer_max)
508 set_dec((int)now); 536 set_dec(now);
509 /* We may have raced with new irq work */ 537 /* We may have raced with new irq work */
510 if (test_irq_work_pending()) 538 if (test_irq_work_pending())
511 set_dec(1); 539 set_dec(1);
@@ -535,7 +563,7 @@ void timer_interrupt(struct pt_regs * regs)
535 /* Ensure a positive value is written to the decrementer, or else 563 /* Ensure a positive value is written to the decrementer, or else
536 * some CPUs will continue to take decrementer exceptions. 564 * some CPUs will continue to take decrementer exceptions.
537 */ 565 */
538 set_dec(DECREMENTER_MAX); 566 set_dec(decrementer_max);
539 567
540 /* Some implementations of hotplug will get timer interrupts while 568 /* Some implementations of hotplug will get timer interrupts while
541 * offline, just ignore these and we also need to set 569 * offline, just ignore these and we also need to set
@@ -583,9 +611,9 @@ static void generic_suspend_disable_irqs(void)
583 * with suspending. 611 * with suspending.
584 */ 612 */
585 613
586 set_dec(DECREMENTER_MAX); 614 set_dec(decrementer_max);
587 local_irq_disable(); 615 local_irq_disable();
588 set_dec(DECREMENTER_MAX); 616 set_dec(decrementer_max);
589} 617}
590 618
591static void generic_suspend_enable_irqs(void) 619static void generic_suspend_enable_irqs(void)
@@ -866,7 +894,7 @@ static int decrementer_set_next_event(unsigned long evt,
866 894
867static int decrementer_shutdown(struct clock_event_device *dev) 895static int decrementer_shutdown(struct clock_event_device *dev)
868{ 896{
869 decrementer_set_next_event(DECREMENTER_MAX, dev); 897 decrementer_set_next_event(decrementer_max, dev);
870 return 0; 898 return 0;
871} 899}
872 900
@@ -892,6 +920,49 @@ static void register_decrementer_clockevent(int cpu)
892 clockevents_register_device(dec); 920 clockevents_register_device(dec);
893} 921}
894 922
923static void enable_large_decrementer(void)
924{
925 if (!cpu_has_feature(CPU_FTR_ARCH_300))
926 return;
927
928 if (decrementer_max <= DECREMENTER_DEFAULT_MAX)
929 return;
930
931 /*
932 * If we're running as the hypervisor we need to enable the LD manually
933 * otherwise firmware should have done it for us.
934 */
935 if (cpu_has_feature(CPU_FTR_HVMODE))
936 mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) | LPCR_LD);
937}
938
939static void __init set_decrementer_max(void)
940{
941 struct device_node *cpu;
942 u32 bits = 32;
943
944 /* Prior to ISAv3 the decrementer is always 32 bit */
945 if (!cpu_has_feature(CPU_FTR_ARCH_300))
946 return;
947
948 cpu = of_find_node_by_type(NULL, "cpu");
949
950 if (of_property_read_u32(cpu, "ibm,dec-bits", &bits) == 0) {
951 if (bits > 64 || bits < 32) {
952 pr_warn("time_init: firmware supplied invalid ibm,dec-bits");
953 bits = 32;
954 }
955
956 /* calculate the signed maximum given this many bits */
957 decrementer_max = (1ul << (bits - 1)) - 1;
958 }
959
960 of_node_put(cpu);
961
962 pr_info("time_init: %u bit decrementer (max: %llx)\n",
963 bits, decrementer_max);
964}
965
895static void __init init_decrementer_clockevent(void) 966static void __init init_decrementer_clockevent(void)
896{ 967{
897 int cpu = smp_processor_id(); 968 int cpu = smp_processor_id();
@@ -899,7 +970,7 @@ static void __init init_decrementer_clockevent(void)
899 clockevents_calc_mult_shift(&decrementer_clockevent, ppc_tb_freq, 4); 970 clockevents_calc_mult_shift(&decrementer_clockevent, ppc_tb_freq, 4);
900 971
901 decrementer_clockevent.max_delta_ns = 972 decrementer_clockevent.max_delta_ns =
902 clockevent_delta2ns(DECREMENTER_MAX, &decrementer_clockevent); 973 clockevent_delta2ns(decrementer_max, &decrementer_clockevent);
903 decrementer_clockevent.min_delta_ns = 974 decrementer_clockevent.min_delta_ns =
904 clockevent_delta2ns(2, &decrementer_clockevent); 975 clockevent_delta2ns(2, &decrementer_clockevent);
905 976
@@ -908,6 +979,9 @@ static void __init init_decrementer_clockevent(void)
908 979
909void secondary_cpu_time_init(void) 980void secondary_cpu_time_init(void)
910{ 981{
982 /* Enable and test the large decrementer for this cpu */
983 enable_large_decrementer();
984
911 /* Start the decrementer on CPUs that have manual control 985 /* Start the decrementer on CPUs that have manual control
912 * such as BookE 986 * such as BookE
913 */ 987 */
@@ -973,6 +1047,10 @@ void __init time_init(void)
973 vdso_data->tb_update_count = 0; 1047 vdso_data->tb_update_count = 0;
974 vdso_data->tb_ticks_per_sec = tb_ticks_per_sec; 1048 vdso_data->tb_ticks_per_sec = tb_ticks_per_sec;
975 1049
1050 /* initialise and enable the large decrementer (if we have one) */
1051 set_decrementer_max();
1052 enable_large_decrementer();
1053
976 /* Start the decrementer on CPUs that have manual control 1054 /* Start the decrementer on CPUs that have manual control
977 * such as BookE 1055 * such as BookE
978 */ 1056 */
diff --git a/arch/powerpc/kernel/tm.S b/arch/powerpc/kernel/tm.S
index b7019b559ddb..298afcf3bf2a 100644
--- a/arch/powerpc/kernel/tm.S
+++ b/arch/powerpc/kernel/tm.S
@@ -338,8 +338,6 @@ _GLOBAL(__tm_recheckpoint)
338 */ 338 */
339 subi r7, r7, STACK_FRAME_OVERHEAD 339 subi r7, r7, STACK_FRAME_OVERHEAD
340 340
341 SET_SCRATCH0(r1)
342
343 mfmsr r6 341 mfmsr r6
344 /* R4 = original MSR to indicate whether thread used FP/Vector etc. */ 342 /* R4 = original MSR to indicate whether thread used FP/Vector etc. */
345 343
@@ -468,6 +466,7 @@ restore_gprs:
468 * until we turn MSR RI back on. 466 * until we turn MSR RI back on.
469 */ 467 */
470 468
469 SET_SCRATCH0(r1)
471 ld r5, -8(r1) 470 ld r5, -8(r1)
472 ld r1, -16(r1) 471 ld r1, -16(r1)
473 472
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 9229ba63c370..f7e2f2e318bd 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -60,6 +60,7 @@
60#include <asm/switch_to.h> 60#include <asm/switch_to.h>
61#include <asm/tm.h> 61#include <asm/tm.h>
62#include <asm/debug.h> 62#include <asm/debug.h>
63#include <asm/asm-prototypes.h>
63#include <sysdev/fsl_pci.h> 64#include <sysdev/fsl_pci.h>
64 65
65#if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC) 66#if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
@@ -1376,6 +1377,7 @@ void facility_unavailable_exception(struct pt_regs *regs)
1376 [FSCR_TM_LG] = "TM", 1377 [FSCR_TM_LG] = "TM",
1377 [FSCR_EBB_LG] = "EBB", 1378 [FSCR_EBB_LG] = "EBB",
1378 [FSCR_TAR_LG] = "TAR", 1379 [FSCR_TAR_LG] = "TAR",
1380 [FSCR_LM_LG] = "LM",
1379 }; 1381 };
1380 char *facility = "unknown"; 1382 char *facility = "unknown";
1381 u64 value; 1383 u64 value;
@@ -1418,7 +1420,8 @@ void facility_unavailable_exception(struct pt_regs *regs)
1418 rd = (instword >> 21) & 0x1f; 1420 rd = (instword >> 21) & 0x1f;
1419 current->thread.dscr = regs->gpr[rd]; 1421 current->thread.dscr = regs->gpr[rd];
1420 current->thread.dscr_inherit = 1; 1422 current->thread.dscr_inherit = 1;
1421 mtspr(SPRN_FSCR, value | FSCR_DSCR); 1423 current->thread.fscr |= FSCR_DSCR;
1424 mtspr(SPRN_FSCR, current->thread.fscr);
1422 } 1425 }
1423 1426
1424 /* Read from DSCR (mfspr RT, 0x03) */ 1427 /* Read from DSCR (mfspr RT, 0x03) */
@@ -1432,6 +1435,14 @@ void facility_unavailable_exception(struct pt_regs *regs)
1432 emulate_single_step(regs); 1435 emulate_single_step(regs);
1433 } 1436 }
1434 return; 1437 return;
1438 } else if ((status == FSCR_LM_LG) && cpu_has_feature(CPU_FTR_ARCH_300)) {
1439 /*
1440 * This process has touched LM, so turn it on forever
1441 * for this process
1442 */
1443 current->thread.fscr |= FSCR_LM;
1444 mtspr(SPRN_FSCR, current->thread.fscr);
1445 return;
1435 } 1446 }
1436 1447
1437 if ((status < ARRAY_SIZE(facility_strings)) && 1448 if ((status < ARRAY_SIZE(facility_strings)) &&
diff --git a/arch/powerpc/kernel/vector.S b/arch/powerpc/kernel/vector.S
index 1c2e7a343bf5..616a6d854638 100644
--- a/arch/powerpc/kernel/vector.S
+++ b/arch/powerpc/kernel/vector.S
@@ -70,10 +70,11 @@ _GLOBAL(load_up_altivec)
70 MTMSRD(r5) /* enable use of AltiVec now */ 70 MTMSRD(r5) /* enable use of AltiVec now */
71 isync 71 isync
72 72
73 /* Hack: if we get an altivec unavailable trap with VRSAVE 73 /*
74 * set to all zeros, we assume this is a broken application 74 * While userspace in general ignores VRSAVE, glibc uses it as a boolean
75 * that fails to set it properly, and thus we switch it to 75 * to optimise userspace context save/restore. Whenever we take an
76 * all 1's 76 * altivec unavailable exception we must set VRSAVE to something non
77 * zero. Set it to all 1s. See also the programming note in the ISA.
77 */ 78 */
78 mfspr r4,SPRN_VRSAVE 79 mfspr r4,SPRN_VRSAVE
79 cmpwi 0,r4,0 80 cmpwi 0,r4,0
diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S
index 2dd91f79de05..b5fba689fca6 100644
--- a/arch/powerpc/kernel/vmlinux.lds.S
+++ b/arch/powerpc/kernel/vmlinux.lds.S
@@ -165,7 +165,7 @@ SECTIONS
165 . = ALIGN(8); 165 . = ALIGN(8);
166 .dynsym : AT(ADDR(.dynsym) - LOAD_OFFSET) 166 .dynsym : AT(ADDR(.dynsym) - LOAD_OFFSET)
167 { 167 {
168#ifdef CONFIG_RELOCATABLE_PPC32 168#ifdef CONFIG_PPC32
169 __dynamic_symtab = .; 169 __dynamic_symtab = .;
170#endif 170#endif
171 *(.dynsym) 171 *(.dynsym)
generated by cgit v1.2.2 (git 2.25.0) at 2025-10-17 10:06:15 -0400