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authorLinus Torvalds <torvalds@linux-foundation.org>2015-06-26 16:18:51 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2015-06-26 16:18:51 -0400
commit099bfbfc7fbbe22356c02f0caf709ac32e1126ea (patch)
treec2dfe2f9445255d866e9203cff9e9f865ef93513 /include/uapi/linux/virtio_gpu.h
parent22165fa79814e71e7a5974b3c37a5028ed16c8f9 (diff)
parentc5fd936e992dd2829167d2adc63e151675ca6898 (diff)
Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux
Pull drm updates from Dave Airlie: "This is the main drm pull request for v4.2. I've one other new driver from freescale on my radar, it's been posted and reviewed, I'd just like to get someone to give it a last look, so maybe I'll send it or maybe I'll leave it. There is no major nouveau changes in here, Ben was working on something big, and we agreed it was a bit late, there wasn't anything else he considered urgent to merge. There might be another msm pull for some bits that are waiting on arm-soc, I'll see how we time it. This touches some "of" stuff, acks are in place except for the fixes to the build in various configs,t hat I just applied. Summary: New drivers: - virtio-gpu: KMS only pieces of driver for virtio-gpu in qemu. This is just the first part of this driver, enough to run unaccelerated userspace on. As qemu merges more we'll start adding the 3D features for the virgl 3d work. - amdgpu: a new driver from AMD to driver their newer GPUs. (VI+) It contains a new cleaner userspace API, and is a clean break from radeon moving forward, that AMD are going to concentrate on. It also contains a set of register headers auto generated from AMD internal database. core: - atomic modesetting API completed, enabled by default now. - Add support for mode_id blob to atomic ioctl to complete interface. - bunch of Displayport MST fixes - lots of misc fixes. panel: - new simple panels - fix some long-standing build issues with bridge drivers radeon: - VCE1 support - add a GPU reset counter for userspace - lots of fixes. amdkfd: - H/W debugger support module - static user-mode queues - support killing all the waves when a process terminates - use standard DECLARE_BITMAP i915: - Add Broxton support - S3, rotation support for Skylake - RPS booting tuning - CPT modeset sequence fixes - ns2501 dither support - enable cmd parser on haswell - cdclk handling fixes - gen8 dynamic pte allocation - lots of atomic conversion work exynos: - Add atomic modesetting support - Add iommu support - Consolidate drm driver initialization - and MIC, DECON and MIPI-DSI support for exynos5433 omapdrm: - atomic modesetting support (fixes lots of things in rewrite) tegra: - DP aux transaction fixes - iommu support fix msm: - adreno a306 support - various dsi bits - various 64-bit fixes - NV12MT support rcar-du: - atomic and misc fixes sti: - fix HDMI timing complaince tilcdc: - use drm component API to access tda998x driver - fix module unloading qxl: - stability fixes" * 'drm-next' of git://people.freedesktop.org/~airlied/linux: (872 commits) drm/nouveau: Pause between setting gpu to D3hot and cutting the power drm/dp/mst: close deadlock in connector destruction. drm: Always enable atomic API drm/vgem: Set unique to "vgem" of: fix a build error to of_graph_get_endpoint_by_regs function drm/dp/mst: take lock around looking up the branch device on hpd irq drm/dp/mst: make sure mst_primary mstb is valid in work function of: add EXPORT_SYMBOL for of_graph_get_endpoint_by_regs ARM: dts: rename the clock of MIPI DSI 'pll_clk' to 'sclk_mipi' drm/atomic: Don't set crtc_state->enable manually drm/exynos: dsi: do not set TE GPIO direction by input drm/exynos: dsi: add support for MIC driver as a bridge drm/exynos: dsi: add support for Exynos5433 drm/exynos: dsi: make use of array for clock access drm/exynos: dsi: make use of driver data for static values drm/exynos: dsi: add macros for register access drm/exynos: dsi: rename pll_clk to sclk_clk drm/exynos: mic: add MIC driver of: add helper for getting endpoint node of specific identifiers drm/exynos: add Exynos5433 decon driver ...
Diffstat (limited to 'include/uapi/linux/virtio_gpu.h')
-rw-r--r--include/uapi/linux/virtio_gpu.h206
1 files changed, 206 insertions, 0 deletions
diff --git a/include/uapi/linux/virtio_gpu.h b/include/uapi/linux/virtio_gpu.h
new file mode 100644
index 000000000000..478be5270e26
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+++ b/include/uapi/linux/virtio_gpu.h
@@ -0,0 +1,206 @@
1/*
2 * Virtio GPU Device
3 *
4 * Copyright Red Hat, Inc. 2013-2014
5 *
6 * Authors:
7 * Dave Airlie <airlied@redhat.com>
8 * Gerd Hoffmann <kraxel@redhat.com>
9 *
10 * This header is BSD licensed so anyone can use the definitions
11 * to implement compatible drivers/servers:
12 *
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
15 * are met:
16 * 1. Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution.
21 * 3. Neither the name of IBM nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
27 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL IBM OR
28 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
30 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
31 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
32 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
34 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 */
37
38#ifndef VIRTIO_GPU_HW_H
39#define VIRTIO_GPU_HW_H
40
41#include <linux/types.h>
42
43enum virtio_gpu_ctrl_type {
44 VIRTIO_GPU_UNDEFINED = 0,
45
46 /* 2d commands */
47 VIRTIO_GPU_CMD_GET_DISPLAY_INFO = 0x0100,
48 VIRTIO_GPU_CMD_RESOURCE_CREATE_2D,
49 VIRTIO_GPU_CMD_RESOURCE_UNREF,
50 VIRTIO_GPU_CMD_SET_SCANOUT,
51 VIRTIO_GPU_CMD_RESOURCE_FLUSH,
52 VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D,
53 VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING,
54 VIRTIO_GPU_CMD_RESOURCE_DETACH_BACKING,
55
56 /* cursor commands */
57 VIRTIO_GPU_CMD_UPDATE_CURSOR = 0x0300,
58 VIRTIO_GPU_CMD_MOVE_CURSOR,
59
60 /* success responses */
61 VIRTIO_GPU_RESP_OK_NODATA = 0x1100,
62 VIRTIO_GPU_RESP_OK_DISPLAY_INFO,
63
64 /* error responses */
65 VIRTIO_GPU_RESP_ERR_UNSPEC = 0x1200,
66 VIRTIO_GPU_RESP_ERR_OUT_OF_MEMORY,
67 VIRTIO_GPU_RESP_ERR_INVALID_SCANOUT_ID,
68 VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID,
69 VIRTIO_GPU_RESP_ERR_INVALID_CONTEXT_ID,
70 VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER,
71};
72
73#define VIRTIO_GPU_FLAG_FENCE (1 << 0)
74
75struct virtio_gpu_ctrl_hdr {
76 __le32 type;
77 __le32 flags;
78 __le64 fence_id;
79 __le32 ctx_id;
80 __le32 padding;
81};
82
83/* data passed in the cursor vq */
84
85struct virtio_gpu_cursor_pos {
86 __le32 scanout_id;
87 __le32 x;
88 __le32 y;
89 __le32 padding;
90};
91
92/* VIRTIO_GPU_CMD_UPDATE_CURSOR, VIRTIO_GPU_CMD_MOVE_CURSOR */
93struct virtio_gpu_update_cursor {
94 struct virtio_gpu_ctrl_hdr hdr;
95 struct virtio_gpu_cursor_pos pos; /* update & move */
96 __le32 resource_id; /* update only */
97 __le32 hot_x; /* update only */
98 __le32 hot_y; /* update only */
99 __le32 padding;
100};
101
102/* data passed in the control vq, 2d related */
103
104struct virtio_gpu_rect {
105 __le32 x;
106 __le32 y;
107 __le32 width;
108 __le32 height;
109};
110
111/* VIRTIO_GPU_CMD_RESOURCE_UNREF */
112struct virtio_gpu_resource_unref {
113 struct virtio_gpu_ctrl_hdr hdr;
114 __le32 resource_id;
115 __le32 padding;
116};
117
118/* VIRTIO_GPU_CMD_RESOURCE_CREATE_2D: create a 2d resource with a format */
119struct virtio_gpu_resource_create_2d {
120 struct virtio_gpu_ctrl_hdr hdr;
121 __le32 resource_id;
122 __le32 format;
123 __le32 width;
124 __le32 height;
125};
126
127/* VIRTIO_GPU_CMD_SET_SCANOUT */
128struct virtio_gpu_set_scanout {
129 struct virtio_gpu_ctrl_hdr hdr;
130 struct virtio_gpu_rect r;
131 __le32 scanout_id;
132 __le32 resource_id;
133};
134
135/* VIRTIO_GPU_CMD_RESOURCE_FLUSH */
136struct virtio_gpu_resource_flush {
137 struct virtio_gpu_ctrl_hdr hdr;
138 struct virtio_gpu_rect r;
139 __le32 resource_id;
140 __le32 padding;
141};
142
143/* VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D: simple transfer to_host */
144struct virtio_gpu_transfer_to_host_2d {
145 struct virtio_gpu_ctrl_hdr hdr;
146 struct virtio_gpu_rect r;
147 __le64 offset;
148 __le32 resource_id;
149 __le32 padding;
150};
151
152struct virtio_gpu_mem_entry {
153 __le64 addr;
154 __le32 length;
155 __le32 padding;
156};
157
158/* VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING */
159struct virtio_gpu_resource_attach_backing {
160 struct virtio_gpu_ctrl_hdr hdr;
161 __le32 resource_id;
162 __le32 nr_entries;
163};
164
165/* VIRTIO_GPU_CMD_RESOURCE_DETACH_BACKING */
166struct virtio_gpu_resource_detach_backing {
167 struct virtio_gpu_ctrl_hdr hdr;
168 __le32 resource_id;
169 __le32 padding;
170};
171
172/* VIRTIO_GPU_RESP_OK_DISPLAY_INFO */
173#define VIRTIO_GPU_MAX_SCANOUTS 16
174struct virtio_gpu_resp_display_info {
175 struct virtio_gpu_ctrl_hdr hdr;
176 struct virtio_gpu_display_one {
177 struct virtio_gpu_rect r;
178 __le32 enabled;
179 __le32 flags;
180 } pmodes[VIRTIO_GPU_MAX_SCANOUTS];
181};
182
183#define VIRTIO_GPU_EVENT_DISPLAY (1 << 0)
184
185struct virtio_gpu_config {
186 __u32 events_read;
187 __u32 events_clear;
188 __u32 num_scanouts;
189 __u32 reserved;
190};
191
192/* simple formats for fbcon/X use */
193enum virtio_gpu_formats {
194 VIRTIO_GPU_FORMAT_B8G8R8A8_UNORM = 1,
195 VIRTIO_GPU_FORMAT_B8G8R8X8_UNORM = 2,
196 VIRTIO_GPU_FORMAT_A8R8G8B8_UNORM = 3,
197 VIRTIO_GPU_FORMAT_X8R8G8B8_UNORM = 4,
198
199 VIRTIO_GPU_FORMAT_R8G8B8A8_UNORM = 67,
200 VIRTIO_GPU_FORMAT_X8B8G8R8_UNORM = 68,
201
202 VIRTIO_GPU_FORMAT_A8B8G8R8_UNORM = 121,
203 VIRTIO_GPU_FORMAT_R8G8B8X8_UNORM = 134,
204};
205
206#endif