Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux

Pull drm updates from Dave Airlie:
 "This is the main drm pull request for v4.2.

  I've one other new driver from freescale on my radar, it's been posted
  and reviewed, I'd just like to get someone to give it a last look, so
  maybe I'll send it or maybe I'll leave it.

  There is no major nouveau changes in here, Ben was working on
  something big, and we agreed it was a bit late, there wasn't anything
  else he considered urgent to merge.

  There might be another msm pull for some bits that are waiting on
  arm-soc, I'll see how we time it.

  This touches some "of" stuff, acks are in place except for the fixes
  to the build in various configs,t hat I just applied.

  Summary:

  New drivers:
      - virtio-gpu:
                KMS only pieces of driver for virtio-gpu in qemu.
                This is just the first part of this driver, enough to run
                unaccelerated userspace on. As qemu merges more we'll start
                adding the 3D features for the virgl 3d work.
      - amdgpu:
                a new driver from AMD to driver their newer GPUs. (VI+)
                It contains a new cleaner userspace API, and is a clean
                break from radeon moving forward, that AMD are going to
                concentrate on. It also contains a set of register headers
                auto generated from AMD internal database.

  core:
      - atomic modesetting API completed, enabled by default now.
      - Add support for mode_id blob to atomic ioctl to complete interface.
      - bunch of Displayport MST fixes
      - lots of misc fixes.

  panel:
      - new simple panels
      - fix some long-standing build issues with bridge drivers

  radeon:
      - VCE1 support
      - add a GPU reset counter for userspace
      - lots of fixes.

  amdkfd:
      - H/W debugger support module
      - static user-mode queues
      - support killing all the waves when a process terminates
      - use standard DECLARE_BITMAP

  i915:
      - Add Broxton support
      - S3, rotation support for Skylake
      - RPS booting tuning
      - CPT modeset sequence fixes
      - ns2501 dither support
      - enable cmd parser on haswell
      - cdclk handling fixes
      - gen8 dynamic pte allocation
      - lots of atomic conversion work

  exynos:
      - Add atomic modesetting support
      - Add iommu support
      - Consolidate drm driver initialization
      - and MIC, DECON and MIPI-DSI support for exynos5433

  omapdrm:
      - atomic modesetting support (fixes lots of things in rewrite)

  tegra:
      - DP aux transaction fixes
      - iommu support fix

  msm:
      - adreno a306 support
      - various dsi bits
      - various 64-bit fixes
      - NV12MT support

  rcar-du:
      - atomic and misc fixes

  sti:
      - fix HDMI timing complaince

  tilcdc:
      - use drm component API to access tda998x driver
      - fix module unloading

  qxl:
      - stability fixes"

* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (872 commits)
  drm/nouveau: Pause between setting gpu to D3hot and cutting the power
  drm/dp/mst: close deadlock in connector destruction.
  drm: Always enable atomic API
  drm/vgem: Set unique to "vgem"
  of: fix a build error to of_graph_get_endpoint_by_regs function
  drm/dp/mst: take lock around looking up the branch device on hpd irq
  drm/dp/mst: make sure mst_primary mstb is valid in work function
  of: add EXPORT_SYMBOL for of_graph_get_endpoint_by_regs
  ARM: dts: rename the clock of MIPI DSI 'pll_clk' to 'sclk_mipi'
  drm/atomic: Don't set crtc_state->enable manually
  drm/exynos: dsi: do not set TE GPIO direction by input
  drm/exynos: dsi: add support for MIC driver as a bridge
  drm/exynos: dsi: add support for Exynos5433
  drm/exynos: dsi: make use of array for clock access
  drm/exynos: dsi: make use of driver data for static values
  drm/exynos: dsi: add macros for register access
  drm/exynos: dsi: rename pll_clk to sclk_clk
  drm/exynos: mic: add MIC driver
  of: add helper for getting endpoint node of specific identifiers
  drm/exynos: add Exynos5433 decon driver
  ...

4 files changed, 341 insertions, 2 deletions

diff --git a/include/uapi/linux/Kbuild b/include/uapi/linux/Kbuild
index 1a0006a76b00..4460e5820b0e 100644
--- a/include/uapi/linux/Kbuild
+++ b/include/uapi/linux/Kbuild
@@ -430,6 +430,7 @@ header-y += virtio_balloon.h
 header-y += virtio_blk.h
 header-y += virtio_config.h
 header-y += virtio_console.h
+header-y += virtio_gpu.h
 header-y += virtio_ids.h
 header-y += virtio_input.h
 header-y += virtio_net.h
diff --git a/include/uapi/linux/kfd_ioctl.h b/include/uapi/linux/kfd_ioctl.h
index af94f31e33ac..d6833426fdef 100644
--- a/include/uapi/linux/kfd_ioctl.h
+++ b/include/uapi/linux/kfd_ioctl.h
@@ -27,7 +27,7 @@
 #include <linux/ioctl.h>
 
 #define KFD_IOCTL_MAJOR_VERSION 1
-#define KFD_IOCTL_MINOR_VERSION 0
+#define KFD_IOCTL_MINOR_VERSION 1
 
 struct kfd_ioctl_get_version_args {
         uint32_t major_version; /* from KFD */
@@ -128,6 +128,110 @@ struct kfd_ioctl_get_process_apertures_args {
         uint32_t pad;
 };
 
+#define MAX_ALLOWED_NUM_POINTS    100
+#define MAX_ALLOWED_AW_BUFF_SIZE 4096
+#define MAX_ALLOWED_WAC_BUFF_SIZE  128
+
+struct kfd_ioctl_dbg_register_args {
+        uint32_t gpu_id;                /* to KFD */
+        uint32_t pad;
+};
+
+struct kfd_ioctl_dbg_unregister_args {
+        uint32_t gpu_id;                /* to KFD */
+        uint32_t pad;
+};
+
+struct kfd_ioctl_dbg_address_watch_args {
+        uint64_t content_ptr;           /* a pointer to the actual content */
+        uint32_t gpu_id;                /* to KFD */
+        uint32_t buf_size_in_bytes;     /*including gpu_id and buf_size */
+};
+
+struct kfd_ioctl_dbg_wave_control_args {
+        uint64_t content_ptr;           /* a pointer to the actual content */
+        uint32_t gpu_id;                /* to KFD */
+        uint32_t buf_size_in_bytes;     /*including gpu_id and buf_size */
+};
+
+/* Matching HSA_EVENTTYPE */
+#define KFD_IOC_EVENT_SIGNAL                    0
+#define KFD_IOC_EVENT_NODECHANGE                1
+#define KFD_IOC_EVENT_DEVICESTATECHANGE         2
+#define KFD_IOC_EVENT_HW_EXCEPTION              3
+#define KFD_IOC_EVENT_SYSTEM_EVENT              4
+#define KFD_IOC_EVENT_DEBUG_EVENT               5
+#define KFD_IOC_EVENT_PROFILE_EVENT             6
+#define KFD_IOC_EVENT_QUEUE_EVENT               7
+#define KFD_IOC_EVENT_MEMORY                    8
+
+#define KFD_IOC_WAIT_RESULT_COMPLETE            0
+#define KFD_IOC_WAIT_RESULT_TIMEOUT             1
+#define KFD_IOC_WAIT_RESULT_FAIL                2
+
+#define KFD_SIGNAL_EVENT_LIMIT                  256
+
+struct kfd_ioctl_create_event_args {
+        uint64_t event_page_offset;     /* from KFD */
+        uint32_t event_trigger_data;    /* from KFD - signal events only */
+        uint32_t event_type;            /* to KFD */
+        uint32_t auto_reset;            /* to KFD */
+        uint32_t node_id;               /* to KFD - only valid for certain
+                                                        event types */
+        uint32_t event_id;              /* from KFD */
+        uint32_t event_slot_index;      /* from KFD */
+};
+
+struct kfd_ioctl_destroy_event_args {
+        uint32_t event_id;              /* to KFD */
+        uint32_t pad;
+};
+
+struct kfd_ioctl_set_event_args {
+        uint32_t event_id;              /* to KFD */
+        uint32_t pad;
+};
+
+struct kfd_ioctl_reset_event_args {
+        uint32_t event_id;              /* to KFD */
+        uint32_t pad;
+};
+
+struct kfd_memory_exception_failure {
+        uint32_t NotPresent;    /* Page not present or supervisor privilege */
+        uint32_t ReadOnly;      /* Write access to a read-only page */
+        uint32_t NoExecute;     /* Execute access to a page marked NX */
+        uint32_t pad;
+};
+
+/* memory exception data*/
+struct kfd_hsa_memory_exception_data {
+        struct kfd_memory_exception_failure failure;
+        uint64_t va;
+        uint32_t gpu_id;
+        uint32_t pad;
+};
+
+/* Event data*/
+struct kfd_event_data {
+        union {
+                struct kfd_hsa_memory_exception_data memory_exception_data;
+        };                              /* From KFD */
+        uint64_t kfd_event_data_ext;    /* pointer to an extension structure
+                                           for future exception types */
+        uint32_t event_id;              /* to KFD */
+        uint32_t pad;
+};
+
+struct kfd_ioctl_wait_events_args {
+        uint64_t events_ptr;            /* pointed to struct
+                                           kfd_event_data array, to KFD */
+        uint32_t num_events;            /* to KFD */
+        uint32_t wait_for_all;          /* to KFD */
+        uint32_t timeout;               /* to KFD */
+        uint32_t wait_result;           /* from KFD */
+};
+
 #define AMDKFD_IOCTL_BASE 'K'
 #define AMDKFD_IO(nr)                   _IO(AMDKFD_IOCTL_BASE, nr)
 #define AMDKFD_IOR(nr, type)            _IOR(AMDKFD_IOCTL_BASE, nr, type)
@@ -155,7 +259,34 @@ struct kfd_ioctl_get_process_apertures_args {
 #define AMDKFD_IOC_UPDATE_QUEUE                 \
                 AMDKFD_IOW(0x07, struct kfd_ioctl_update_queue_args)
 
+#define AMDKFD_IOC_CREATE_EVENT                 \
+                AMDKFD_IOWR(0x08, struct kfd_ioctl_create_event_args)
+
+#define AMDKFD_IOC_DESTROY_EVENT                \
+                AMDKFD_IOW(0x09, struct kfd_ioctl_destroy_event_args)
+
+#define AMDKFD_IOC_SET_EVENT                    \
+                AMDKFD_IOW(0x0A, struct kfd_ioctl_set_event_args)
+
+#define AMDKFD_IOC_RESET_EVENT                  \
+                AMDKFD_IOW(0x0B, struct kfd_ioctl_reset_event_args)
+
+#define AMDKFD_IOC_WAIT_EVENTS                  \
+                AMDKFD_IOWR(0x0C, struct kfd_ioctl_wait_events_args)
+
+#define AMDKFD_IOC_DBG_REGISTER                 \
+                AMDKFD_IOW(0x0D, struct kfd_ioctl_dbg_register_args)
+
+#define AMDKFD_IOC_DBG_UNREGISTER               \
+                AMDKFD_IOW(0x0E, struct kfd_ioctl_dbg_unregister_args)
+
+#define AMDKFD_IOC_DBG_ADDRESS_WATCH            \
+                AMDKFD_IOW(0x0F, struct kfd_ioctl_dbg_address_watch_args)
+
+#define AMDKFD_IOC_DBG_WAVE_CONTROL             \
+                AMDKFD_IOW(0x10, struct kfd_ioctl_dbg_wave_control_args)
+
 #define AMDKFD_COMMAND_START            0x01
-#define AMDKFD_COMMAND_END              0x08
+#define AMDKFD_COMMAND_END              0x11
 
 #endif
diff --git a/include/uapi/linux/virtio_gpu.h b/include/uapi/linux/virtio_gpu.h
new file mode 100644
index 000000000000..478be5270e26
--- /dev/null
+++ b/include/uapi/linux/virtio_gpu.h
@@ -0,0 +1,206 @@
+/*
+ * Virtio GPU Device
+ *
+ * Copyright Red Hat, Inc. 2013-2014
+ *
+ * Authors:
+ *     Dave Airlie <airlied@redhat.com>
+ *     Gerd Hoffmann <kraxel@redhat.com>
+ *
+ * This header is BSD licensed so anyone can use the definitions
+ * to implement compatible drivers/servers:
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of IBM nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL IBM OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef VIRTIO_GPU_HW_H
+#define VIRTIO_GPU_HW_H
+
+#include <linux/types.h>
+
+enum virtio_gpu_ctrl_type {
+        VIRTIO_GPU_UNDEFINED = 0,
+
+        /* 2d commands */
+        VIRTIO_GPU_CMD_GET_DISPLAY_INFO = 0x0100,
+        VIRTIO_GPU_CMD_RESOURCE_CREATE_2D,
+        VIRTIO_GPU_CMD_RESOURCE_UNREF,
+        VIRTIO_GPU_CMD_SET_SCANOUT,
+        VIRTIO_GPU_CMD_RESOURCE_FLUSH,
+        VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D,
+        VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING,
+        VIRTIO_GPU_CMD_RESOURCE_DETACH_BACKING,
+
+        /* cursor commands */
+        VIRTIO_GPU_CMD_UPDATE_CURSOR = 0x0300,
+        VIRTIO_GPU_CMD_MOVE_CURSOR,
+
+        /* success responses */
+        VIRTIO_GPU_RESP_OK_NODATA = 0x1100,
+        VIRTIO_GPU_RESP_OK_DISPLAY_INFO,
+
+        /* error responses */
+        VIRTIO_GPU_RESP_ERR_UNSPEC = 0x1200,
+        VIRTIO_GPU_RESP_ERR_OUT_OF_MEMORY,
+        VIRTIO_GPU_RESP_ERR_INVALID_SCANOUT_ID,
+        VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID,
+        VIRTIO_GPU_RESP_ERR_INVALID_CONTEXT_ID,
+        VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER,
+};
+
+#define VIRTIO_GPU_FLAG_FENCE (1 << 0)
+
+struct virtio_gpu_ctrl_hdr {
+        __le32 type;
+        __le32 flags;
+        __le64 fence_id;
+        __le32 ctx_id;
+        __le32 padding;
+};
+
+/* data passed in the cursor vq */
+
+struct virtio_gpu_cursor_pos {
+        __le32 scanout_id;
+        __le32 x;
+        __le32 y;
+        __le32 padding;
+};
+
+/* VIRTIO_GPU_CMD_UPDATE_CURSOR, VIRTIO_GPU_CMD_MOVE_CURSOR */
+struct virtio_gpu_update_cursor {
+        struct virtio_gpu_ctrl_hdr hdr;
+        struct virtio_gpu_cursor_pos pos;  /* update & move */
+        __le32 resource_id;           /* update only */
+        __le32 hot_x;                 /* update only */
+        __le32 hot_y;                 /* update only */
+        __le32 padding;
+};
+
+/* data passed in the control vq, 2d related */
+
+struct virtio_gpu_rect {
+        __le32 x;
+        __le32 y;
+        __le32 width;
+        __le32 height;
+};
+
+/* VIRTIO_GPU_CMD_RESOURCE_UNREF */
+struct virtio_gpu_resource_unref {
+        struct virtio_gpu_ctrl_hdr hdr;
+        __le32 resource_id;
+        __le32 padding;
+};
+
+/* VIRTIO_GPU_CMD_RESOURCE_CREATE_2D: create a 2d resource with a format */
+struct virtio_gpu_resource_create_2d {
+        struct virtio_gpu_ctrl_hdr hdr;
+        __le32 resource_id;
+        __le32 format;
+        __le32 width;
+        __le32 height;
+};
+
+/* VIRTIO_GPU_CMD_SET_SCANOUT */
+struct virtio_gpu_set_scanout {
+        struct virtio_gpu_ctrl_hdr hdr;
+        struct virtio_gpu_rect r;
+        __le32 scanout_id;
+        __le32 resource_id;
+};
+
+/* VIRTIO_GPU_CMD_RESOURCE_FLUSH */
+struct virtio_gpu_resource_flush {
+        struct virtio_gpu_ctrl_hdr hdr;
+        struct virtio_gpu_rect r;
+        __le32 resource_id;
+        __le32 padding;
+};
+
+/* VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D: simple transfer to_host */
+struct virtio_gpu_transfer_to_host_2d {
+        struct virtio_gpu_ctrl_hdr hdr;
+        struct virtio_gpu_rect r;
+        __le64 offset;
+        __le32 resource_id;
+        __le32 padding;
+};
+
+struct virtio_gpu_mem_entry {
+        __le64 addr;
+        __le32 length;
+        __le32 padding;
+};
+
+/* VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING */
+struct virtio_gpu_resource_attach_backing {
+        struct virtio_gpu_ctrl_hdr hdr;
+        __le32 resource_id;
+        __le32 nr_entries;
+};
+
+/* VIRTIO_GPU_CMD_RESOURCE_DETACH_BACKING */
+struct virtio_gpu_resource_detach_backing {
+        struct virtio_gpu_ctrl_hdr hdr;
+        __le32 resource_id;
+        __le32 padding;
+};
+
+/* VIRTIO_GPU_RESP_OK_DISPLAY_INFO */
+#define VIRTIO_GPU_MAX_SCANOUTS 16
+struct virtio_gpu_resp_display_info {
+        struct virtio_gpu_ctrl_hdr hdr;
+        struct virtio_gpu_display_one {
+                struct virtio_gpu_rect r;
+                __le32 enabled;
+                __le32 flags;
+        } pmodes[VIRTIO_GPU_MAX_SCANOUTS];
+};
+
+#define VIRTIO_GPU_EVENT_DISPLAY (1 << 0)
+
+struct virtio_gpu_config {
+        __u32 events_read;
+        __u32 events_clear;
+        __u32 num_scanouts;
+        __u32 reserved;
+};
+
+/* simple formats for fbcon/X use */
+enum virtio_gpu_formats {
+        VIRTIO_GPU_FORMAT_B8G8R8A8_UNORM  = 1,
+        VIRTIO_GPU_FORMAT_B8G8R8X8_UNORM  = 2,
+        VIRTIO_GPU_FORMAT_A8R8G8B8_UNORM  = 3,
+        VIRTIO_GPU_FORMAT_X8R8G8B8_UNORM  = 4,
+
+        VIRTIO_GPU_FORMAT_R8G8B8A8_UNORM  = 67,
+        VIRTIO_GPU_FORMAT_X8B8G8R8_UNORM  = 68,
+
+        VIRTIO_GPU_FORMAT_A8B8G8R8_UNORM  = 121,
+        VIRTIO_GPU_FORMAT_R8G8B8X8_UNORM  = 134,
+};
+
+#endif
diff --git a/include/uapi/linux/virtio_ids.h b/include/uapi/linux/virtio_ids.h
index 5f60aa4be50a..77925f587b15 100644
--- a/include/uapi/linux/virtio_ids.h
+++ b/include/uapi/linux/virtio_ids.h
@@ -39,6 +39,7 @@
 #define VIRTIO_ID_9P            9 /* 9p virtio console */
 #define VIRTIO_ID_RPROC_SERIAL 11 /* virtio remoteproc serial link */
 #define VIRTIO_ID_CAIF         12 /* Virtio caif */
+#define VIRTIO_ID_GPU          16 /* virtio GPU */
 #define VIRTIO_ID_INPUT        18 /* virtio input */
 
 #endif /* _LINUX_VIRTIO_IDS_H */