diff options
| author | Rex Zhu <Rex.Zhu@amd.com> | 2017-09-06 03:27:59 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2017-09-18 23:30:34 -0400 |
| commit | cfa289fd4986c504b0396cce167802dfcf4943d0 (patch) | |
| tree | 8c616086e99e4a5b777a22d8f6e95b22bd4d1a9d /drivers/gpu | |
| parent | 698f88e697cc8852558d120fdecfdb38c18c2ff7 (diff) | |
drm/amdgpu: rename amdgpu_dpm_funcs to amd_pm_funcs
renamed amdgpu_dpm_funcs and moved to amd_shared.h
so can shared with powerplay.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h | 47 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/ci_dpm.c | 100 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/kv_dpm.c | 53 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/si_dpm.c | 69 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/include/amd_shared.h | 51 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h | 6 |
7 files changed, 201 insertions, 129 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c index 1cb52fd19060..e997ebbe43ea 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c | |||
| @@ -960,8 +960,10 @@ u8 amdgpu_encode_pci_lane_width(u32 lanes) | |||
| 960 | } | 960 | } |
| 961 | 961 | ||
| 962 | struct amd_vce_state* | 962 | struct amd_vce_state* |
| 963 | amdgpu_get_vce_clock_state(struct amdgpu_device *adev, unsigned idx) | 963 | amdgpu_get_vce_clock_state(void *handle, u32 idx) |
| 964 | { | 964 | { |
| 965 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 966 | |||
| 965 | if (idx < adev->pm.dpm.num_of_vce_states) | 967 | if (idx < adev->pm.dpm.num_of_vce_states) |
| 966 | return &adev->pm.dpm.vce_states[idx]; | 968 | return &adev->pm.dpm.vce_states[idx]; |
| 967 | 969 | ||
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h index 3eba4137508b..2f2bdb032d30 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h | |||
| @@ -241,49 +241,6 @@ enum amdgpu_pcie_gen { | |||
| 241 | AMDGPU_PCIE_GEN_INVALID = 0xffff | 241 | AMDGPU_PCIE_GEN_INVALID = 0xffff |
| 242 | }; | 242 | }; |
| 243 | 243 | ||
| 244 | struct amdgpu_dpm_funcs { | ||
| 245 | int (*get_temperature)(struct amdgpu_device *adev); | ||
| 246 | int (*pre_set_power_state)(struct amdgpu_device *adev); | ||
| 247 | int (*set_power_state)(struct amdgpu_device *adev); | ||
| 248 | void (*post_set_power_state)(struct amdgpu_device *adev); | ||
| 249 | void (*display_configuration_changed)(struct amdgpu_device *adev); | ||
| 250 | u32 (*get_sclk)(struct amdgpu_device *adev, bool low); | ||
| 251 | u32 (*get_mclk)(struct amdgpu_device *adev, bool low); | ||
| 252 | void (*print_power_state)(struct amdgpu_device *adev, struct amdgpu_ps *ps); | ||
| 253 | void (*debugfs_print_current_performance_level)(struct amdgpu_device *adev, struct seq_file *m); | ||
| 254 | int (*force_performance_level)(struct amdgpu_device *adev, enum amd_dpm_forced_level level); | ||
| 255 | bool (*vblank_too_short)(struct amdgpu_device *adev); | ||
| 256 | void (*powergate_uvd)(struct amdgpu_device *adev, bool gate); | ||
| 257 | void (*powergate_vce)(struct amdgpu_device *adev, bool gate); | ||
| 258 | void (*enable_bapm)(struct amdgpu_device *adev, bool enable); | ||
| 259 | void (*set_fan_control_mode)(struct amdgpu_device *adev, u32 mode); | ||
| 260 | u32 (*get_fan_control_mode)(struct amdgpu_device *adev); | ||
| 261 | int (*set_fan_speed_percent)(struct amdgpu_device *adev, u32 speed); | ||
| 262 | int (*get_fan_speed_percent)(struct amdgpu_device *adev, u32 *speed); | ||
| 263 | int (*force_clock_level)(struct amdgpu_device *adev, enum pp_clock_type type, uint32_t mask); | ||
| 264 | int (*print_clock_levels)(struct amdgpu_device *adev, enum pp_clock_type type, char *buf); | ||
| 265 | int (*get_sclk_od)(struct amdgpu_device *adev); | ||
| 266 | int (*set_sclk_od)(struct amdgpu_device *adev, uint32_t value); | ||
| 267 | int (*get_mclk_od)(struct amdgpu_device *adev); | ||
| 268 | int (*set_mclk_od)(struct amdgpu_device *adev, uint32_t value); | ||
| 269 | int (*check_state_equal)(struct amdgpu_device *adev, | ||
| 270 | struct amdgpu_ps *cps, | ||
| 271 | struct amdgpu_ps *rps, | ||
| 272 | bool *equal); | ||
| 273 | int (*read_sensor)(struct amdgpu_device *adev, int idx, void *value, | ||
| 274 | int *size); | ||
| 275 | |||
| 276 | struct amd_vce_state* (*get_vce_clock_state)(struct amdgpu_device *adev, unsigned idx); | ||
| 277 | int (*reset_power_profile_state)(struct amdgpu_device *adev, | ||
| 278 | struct amd_pp_profile *request); | ||
| 279 | int (*get_power_profile_state)(struct amdgpu_device *adev, | ||
| 280 | struct amd_pp_profile *query); | ||
| 281 | int (*set_power_profile_state)(struct amdgpu_device *adev, | ||
| 282 | struct amd_pp_profile *request); | ||
| 283 | int (*switch_power_profile)(struct amdgpu_device *adev, | ||
| 284 | enum amd_pp_profile_type type); | ||
| 285 | }; | ||
| 286 | |||
| 287 | #define amdgpu_dpm_pre_set_power_state(adev) (adev)->pm.funcs->pre_set_power_state((adev)) | 244 | #define amdgpu_dpm_pre_set_power_state(adev) (adev)->pm.funcs->pre_set_power_state((adev)) |
| 288 | #define amdgpu_dpm_set_power_state(adev) (adev)->pm.funcs->set_power_state((adev)) | 245 | #define amdgpu_dpm_set_power_state(adev) (adev)->pm.funcs->set_power_state((adev)) |
| 289 | #define amdgpu_dpm_post_set_power_state(adev) (adev)->pm.funcs->post_set_power_state((adev)) | 246 | #define amdgpu_dpm_post_set_power_state(adev) (adev)->pm.funcs->post_set_power_state((adev)) |
| @@ -485,7 +442,7 @@ struct amdgpu_pm { | |||
| 485 | struct amdgpu_dpm dpm; | 442 | struct amdgpu_dpm dpm; |
| 486 | const struct firmware *fw; /* SMC firmware */ | 443 | const struct firmware *fw; /* SMC firmware */ |
| 487 | uint32_t fw_version; | 444 | uint32_t fw_version; |
| 488 | const struct amdgpu_dpm_funcs *funcs; | 445 | const struct amd_pm_funcs *funcs; |
| 489 | uint32_t pcie_gen_mask; | 446 | uint32_t pcie_gen_mask; |
| 490 | uint32_t pcie_mlw_mask; | 447 | uint32_t pcie_mlw_mask; |
| 491 | struct amd_pp_display_configuration pm_display_cfg;/* set by DAL */ | 448 | struct amd_pp_display_configuration pm_display_cfg;/* set by DAL */ |
| @@ -551,6 +508,6 @@ u16 amdgpu_get_pcie_lane_support(struct amdgpu_device *adev, | |||
| 551 | u8 amdgpu_encode_pci_lane_width(u32 lanes); | 508 | u8 amdgpu_encode_pci_lane_width(u32 lanes); |
| 552 | 509 | ||
| 553 | struct amd_vce_state* | 510 | struct amd_vce_state* |
| 554 | amdgpu_get_vce_clock_state(struct amdgpu_device *adev, unsigned idx); | 511 | amdgpu_get_vce_clock_state(void *handle, u32 idx); |
| 555 | 512 | ||
| 556 | #endif | 513 | #endif |
diff --git a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c index cb508a211b2f..bdf792822ff5 100644 --- a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c +++ b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c | |||
| @@ -883,8 +883,9 @@ static int ci_power_control_set_level(struct amdgpu_device *adev) | |||
| 883 | return ret; | 883 | return ret; |
| 884 | } | 884 | } |
| 885 | 885 | ||
| 886 | static void ci_dpm_powergate_uvd(struct amdgpu_device *adev, bool gate) | 886 | static void ci_dpm_powergate_uvd(void *handle, bool gate) |
| 887 | { | 887 | { |
| 888 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 888 | struct ci_power_info *pi = ci_get_pi(adev); | 889 | struct ci_power_info *pi = ci_get_pi(adev); |
| 889 | 890 | ||
| 890 | pi->uvd_power_gated = gate; | 891 | pi->uvd_power_gated = gate; |
| @@ -901,8 +902,9 @@ static void ci_dpm_powergate_uvd(struct amdgpu_device *adev, bool gate) | |||
| 901 | } | 902 | } |
| 902 | } | 903 | } |
| 903 | 904 | ||
| 904 | static bool ci_dpm_vblank_too_short(struct amdgpu_device *adev) | 905 | static bool ci_dpm_vblank_too_short(void *handle) |
| 905 | { | 906 | { |
| 907 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 906 | u32 vblank_time = amdgpu_dpm_get_vblank_time(adev); | 908 | u32 vblank_time = amdgpu_dpm_get_vblank_time(adev); |
| 907 | u32 switch_limit = adev->mc.vram_type == AMDGPU_VRAM_TYPE_GDDR5 ? 450 : 300; | 909 | u32 switch_limit = adev->mc.vram_type == AMDGPU_VRAM_TYPE_GDDR5 ? 450 : 300; |
| 908 | 910 | ||
| @@ -1210,11 +1212,12 @@ static int ci_fan_ctrl_stop_smc_fan_control(struct amdgpu_device *adev) | |||
| 1210 | } | 1212 | } |
| 1211 | } | 1213 | } |
| 1212 | 1214 | ||
| 1213 | static int ci_dpm_get_fan_speed_percent(struct amdgpu_device *adev, | 1215 | static int ci_dpm_get_fan_speed_percent(void *handle, |
| 1214 | u32 *speed) | 1216 | u32 *speed) |
| 1215 | { | 1217 | { |
| 1216 | u32 duty, duty100; | 1218 | u32 duty, duty100; |
| 1217 | u64 tmp64; | 1219 | u64 tmp64; |
| 1220 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 1218 | 1221 | ||
| 1219 | if (adev->pm.no_fan) | 1222 | if (adev->pm.no_fan) |
| 1220 | return -ENOENT; | 1223 | return -ENOENT; |
| @@ -1237,12 +1240,13 @@ static int ci_dpm_get_fan_speed_percent(struct amdgpu_device *adev, | |||
| 1237 | return 0; | 1240 | return 0; |
| 1238 | } | 1241 | } |
| 1239 | 1242 | ||
| 1240 | static int ci_dpm_set_fan_speed_percent(struct amdgpu_device *adev, | 1243 | static int ci_dpm_set_fan_speed_percent(void *handle, |
| 1241 | u32 speed) | 1244 | u32 speed) |
| 1242 | { | 1245 | { |
| 1243 | u32 tmp; | 1246 | u32 tmp; |
| 1244 | u32 duty, duty100; | 1247 | u32 duty, duty100; |
| 1245 | u64 tmp64; | 1248 | u64 tmp64; |
| 1249 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 1246 | struct ci_power_info *pi = ci_get_pi(adev); | 1250 | struct ci_power_info *pi = ci_get_pi(adev); |
| 1247 | 1251 | ||
| 1248 | if (adev->pm.no_fan) | 1252 | if (adev->pm.no_fan) |
| @@ -1271,8 +1275,10 @@ static int ci_dpm_set_fan_speed_percent(struct amdgpu_device *adev, | |||
| 1271 | return 0; | 1275 | return 0; |
| 1272 | } | 1276 | } |
| 1273 | 1277 | ||
| 1274 | static void ci_dpm_set_fan_control_mode(struct amdgpu_device *adev, u32 mode) | 1278 | static void ci_dpm_set_fan_control_mode(void *handle, u32 mode) |
| 1275 | { | 1279 | { |
| 1280 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 1281 | |||
| 1276 | switch (mode) { | 1282 | switch (mode) { |
| 1277 | case AMD_FAN_CTRL_NONE: | 1283 | case AMD_FAN_CTRL_NONE: |
| 1278 | if (adev->pm.dpm.fan.ucode_fan_control) | 1284 | if (adev->pm.dpm.fan.ucode_fan_control) |
| @@ -1292,8 +1298,9 @@ static void ci_dpm_set_fan_control_mode(struct amdgpu_device *adev, u32 mode) | |||
| 1292 | } | 1298 | } |
| 1293 | } | 1299 | } |
| 1294 | 1300 | ||
| 1295 | static u32 ci_dpm_get_fan_control_mode(struct amdgpu_device *adev) | 1301 | static u32 ci_dpm_get_fan_control_mode(void *handle) |
| 1296 | { | 1302 | { |
| 1303 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 1297 | struct ci_power_info *pi = ci_get_pi(adev); | 1304 | struct ci_power_info *pi = ci_get_pi(adev); |
| 1298 | 1305 | ||
| 1299 | if (pi->fan_is_controlled_by_smc) | 1306 | if (pi->fan_is_controlled_by_smc) |
| @@ -4378,9 +4385,10 @@ static u32 ci_get_lowest_enabled_level(struct amdgpu_device *adev, | |||
| 4378 | } | 4385 | } |
| 4379 | 4386 | ||
| 4380 | 4387 | ||
| 4381 | static int ci_dpm_force_performance_level(struct amdgpu_device *adev, | 4388 | static int ci_dpm_force_performance_level(void *handle, |
| 4382 | enum amd_dpm_forced_level level) | 4389 | enum amd_dpm_forced_level level) |
| 4383 | { | 4390 | { |
| 4391 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 4384 | struct ci_power_info *pi = ci_get_pi(adev); | 4392 | struct ci_power_info *pi = ci_get_pi(adev); |
| 4385 | u32 tmp, levels, i; | 4393 | u32 tmp, levels, i; |
| 4386 | int ret; | 4394 | int ret; |
| @@ -5291,8 +5299,9 @@ static void ci_update_requested_ps(struct amdgpu_device *adev, | |||
| 5291 | adev->pm.dpm.requested_ps = &pi->requested_rps; | 5299 | adev->pm.dpm.requested_ps = &pi->requested_rps; |
| 5292 | } | 5300 | } |
| 5293 | 5301 | ||
| 5294 | static int ci_dpm_pre_set_power_state(struct amdgpu_device *adev) | 5302 | static int ci_dpm_pre_set_power_state(void *handle) |
| 5295 | { | 5303 | { |
| 5304 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 5296 | struct ci_power_info *pi = ci_get_pi(adev); | 5305 | struct ci_power_info *pi = ci_get_pi(adev); |
| 5297 | struct amdgpu_ps requested_ps = *adev->pm.dpm.requested_ps; | 5306 | struct amdgpu_ps requested_ps = *adev->pm.dpm.requested_ps; |
| 5298 | struct amdgpu_ps *new_ps = &requested_ps; | 5307 | struct amdgpu_ps *new_ps = &requested_ps; |
| @@ -5304,8 +5313,9 @@ static int ci_dpm_pre_set_power_state(struct amdgpu_device *adev) | |||
| 5304 | return 0; | 5313 | return 0; |
| 5305 | } | 5314 | } |
| 5306 | 5315 | ||
| 5307 | static void ci_dpm_post_set_power_state(struct amdgpu_device *adev) | 5316 | static void ci_dpm_post_set_power_state(void *handle) |
| 5308 | { | 5317 | { |
| 5318 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 5309 | struct ci_power_info *pi = ci_get_pi(adev); | 5319 | struct ci_power_info *pi = ci_get_pi(adev); |
| 5310 | struct amdgpu_ps *new_ps = &pi->requested_rps; | 5320 | struct amdgpu_ps *new_ps = &pi->requested_rps; |
| 5311 | 5321 | ||
| @@ -5479,8 +5489,9 @@ static void ci_dpm_disable(struct amdgpu_device *adev) | |||
| 5479 | ci_update_current_ps(adev, boot_ps); | 5489 | ci_update_current_ps(adev, boot_ps); |
| 5480 | } | 5490 | } |
| 5481 | 5491 | ||
| 5482 | static int ci_dpm_set_power_state(struct amdgpu_device *adev) | 5492 | static int ci_dpm_set_power_state(void *handle) |
| 5483 | { | 5493 | { |
| 5494 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 5484 | struct ci_power_info *pi = ci_get_pi(adev); | 5495 | struct ci_power_info *pi = ci_get_pi(adev); |
| 5485 | struct amdgpu_ps *new_ps = &pi->requested_rps; | 5496 | struct amdgpu_ps *new_ps = &pi->requested_rps; |
| 5486 | struct amdgpu_ps *old_ps = &pi->current_rps; | 5497 | struct amdgpu_ps *old_ps = &pi->current_rps; |
| @@ -5551,8 +5562,10 @@ static void ci_dpm_reset_asic(struct amdgpu_device *adev) | |||
| 5551 | } | 5562 | } |
| 5552 | #endif | 5563 | #endif |
| 5553 | 5564 | ||
| 5554 | static void ci_dpm_display_configuration_changed(struct amdgpu_device *adev) | 5565 | static void ci_dpm_display_configuration_changed(void *handle) |
| 5555 | { | 5566 | { |
| 5567 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 5568 | |||
| 5556 | ci_program_display_gap(adev); | 5569 | ci_program_display_gap(adev); |
| 5557 | } | 5570 | } |
| 5558 | 5571 | ||
| @@ -6105,9 +6118,10 @@ static int ci_dpm_init(struct amdgpu_device *adev) | |||
| 6105 | } | 6118 | } |
| 6106 | 6119 | ||
| 6107 | static void | 6120 | static void |
| 6108 | ci_dpm_debugfs_print_current_performance_level(struct amdgpu_device *adev, | 6121 | ci_dpm_debugfs_print_current_performance_level(void *handle, |
| 6109 | struct seq_file *m) | 6122 | struct seq_file *m) |
| 6110 | { | 6123 | { |
| 6124 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 6111 | struct ci_power_info *pi = ci_get_pi(adev); | 6125 | struct ci_power_info *pi = ci_get_pi(adev); |
| 6112 | struct amdgpu_ps *rps = &pi->current_rps; | 6126 | struct amdgpu_ps *rps = &pi->current_rps; |
| 6113 | u32 sclk = ci_get_average_sclk_freq(adev); | 6127 | u32 sclk = ci_get_average_sclk_freq(adev); |
| @@ -6131,12 +6145,13 @@ ci_dpm_debugfs_print_current_performance_level(struct amdgpu_device *adev, | |||
| 6131 | seq_printf(m, "GPU load: %u %%\n", activity_percent); | 6145 | seq_printf(m, "GPU load: %u %%\n", activity_percent); |
| 6132 | } | 6146 | } |
| 6133 | 6147 | ||
| 6134 | static void ci_dpm_print_power_state(struct amdgpu_device *adev, | 6148 | static void ci_dpm_print_power_state(void *handle, void *current_ps) |
| 6135 | struct amdgpu_ps *rps) | ||
| 6136 | { | 6149 | { |
| 6150 | struct amdgpu_ps *rps = (struct amdgpu_ps *)current_ps; | ||
| 6137 | struct ci_ps *ps = ci_get_ps(rps); | 6151 | struct ci_ps *ps = ci_get_ps(rps); |
| 6138 | struct ci_pl *pl; | 6152 | struct ci_pl *pl; |
| 6139 | int i; | 6153 | int i; |
| 6154 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 6140 | 6155 | ||
| 6141 | amdgpu_dpm_print_class_info(rps->class, rps->class2); | 6156 | amdgpu_dpm_print_class_info(rps->class, rps->class2); |
| 6142 | amdgpu_dpm_print_cap_info(rps->caps); | 6157 | amdgpu_dpm_print_cap_info(rps->caps); |
| @@ -6158,20 +6173,23 @@ static inline bool ci_are_power_levels_equal(const struct ci_pl *ci_cpl1, | |||
| 6158 | (ci_cpl1->pcie_lane == ci_cpl2->pcie_lane)); | 6173 | (ci_cpl1->pcie_lane == ci_cpl2->pcie_lane)); |
| 6159 | } | 6174 | } |
| 6160 | 6175 | ||
| 6161 | static int ci_check_state_equal(struct amdgpu_device *adev, | 6176 | static int ci_check_state_equal(void *handle, |
| 6162 | struct amdgpu_ps *cps, | 6177 | void *current_ps, |
| 6163 | struct amdgpu_ps *rps, | 6178 | void *request_ps, |
| 6164 | bool *equal) | 6179 | bool *equal) |
| 6165 | { | 6180 | { |
| 6166 | struct ci_ps *ci_cps; | 6181 | struct ci_ps *ci_cps; |
| 6167 | struct ci_ps *ci_rps; | 6182 | struct ci_ps *ci_rps; |
| 6168 | int i; | 6183 | int i; |
| 6184 | struct amdgpu_ps *cps = (struct amdgpu_ps *)current_ps; | ||
| 6185 | struct amdgpu_ps *rps = (struct amdgpu_ps *)request_ps; | ||
| 6186 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 6169 | 6187 | ||
| 6170 | if (adev == NULL || cps == NULL || rps == NULL || equal == NULL) | 6188 | if (adev == NULL || cps == NULL || rps == NULL || equal == NULL) |
| 6171 | return -EINVAL; | 6189 | return -EINVAL; |
| 6172 | 6190 | ||
| 6173 | ci_cps = ci_get_ps(cps); | 6191 | ci_cps = ci_get_ps((struct amdgpu_ps *)cps); |
| 6174 | ci_rps = ci_get_ps(rps); | 6192 | ci_rps = ci_get_ps((struct amdgpu_ps *)rps); |
| 6175 | 6193 | ||
| 6176 | if (ci_cps == NULL) { | 6194 | if (ci_cps == NULL) { |
| 6177 | *equal = false; | 6195 | *equal = false; |
| @@ -6199,8 +6217,9 @@ static int ci_check_state_equal(struct amdgpu_device *adev, | |||
| 6199 | return 0; | 6217 | return 0; |
| 6200 | } | 6218 | } |
| 6201 | 6219 | ||
| 6202 | static u32 ci_dpm_get_sclk(struct amdgpu_device *adev, bool low) | 6220 | static u32 ci_dpm_get_sclk(void *handle, bool low) |
| 6203 | { | 6221 | { |
| 6222 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 6204 | struct ci_power_info *pi = ci_get_pi(adev); | 6223 | struct ci_power_info *pi = ci_get_pi(adev); |
| 6205 | struct ci_ps *requested_state = ci_get_ps(&pi->requested_rps); | 6224 | struct ci_ps *requested_state = ci_get_ps(&pi->requested_rps); |
| 6206 | 6225 | ||
| @@ -6210,8 +6229,9 @@ static u32 ci_dpm_get_sclk(struct amdgpu_device *adev, bool low) | |||
| 6210 | return requested_state->performance_levels[requested_state->performance_level_count - 1].sclk; | 6229 | return requested_state->performance_levels[requested_state->performance_level_count - 1].sclk; |
| 6211 | } | 6230 | } |
| 6212 | 6231 | ||
| 6213 | static u32 ci_dpm_get_mclk(struct amdgpu_device *adev, bool low) | 6232 | static u32 ci_dpm_get_mclk(void *handle, bool low) |
| 6214 | { | 6233 | { |
| 6234 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 6215 | struct ci_power_info *pi = ci_get_pi(adev); | 6235 | struct ci_power_info *pi = ci_get_pi(adev); |
| 6216 | struct ci_ps *requested_state = ci_get_ps(&pi->requested_rps); | 6236 | struct ci_ps *requested_state = ci_get_ps(&pi->requested_rps); |
| 6217 | 6237 | ||
| @@ -6222,10 +6242,11 @@ static u32 ci_dpm_get_mclk(struct amdgpu_device *adev, bool low) | |||
| 6222 | } | 6242 | } |
| 6223 | 6243 | ||
| 6224 | /* get temperature in millidegrees */ | 6244 | /* get temperature in millidegrees */ |
| 6225 | static int ci_dpm_get_temp(struct amdgpu_device *adev) | 6245 | static int ci_dpm_get_temp(void *handle) |
| 6226 | { | 6246 | { |
| 6227 | u32 temp; | 6247 | u32 temp; |
| 6228 | int actual_temp = 0; | 6248 | int actual_temp = 0; |
| 6249 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 6229 | 6250 | ||
| 6230 | temp = (RREG32_SMC(ixCG_MULT_THERMAL_STATUS) & CG_MULT_THERMAL_STATUS__CTF_TEMP_MASK) >> | 6251 | temp = (RREG32_SMC(ixCG_MULT_THERMAL_STATUS) & CG_MULT_THERMAL_STATUS__CTF_TEMP_MASK) >> |
| 6231 | CG_MULT_THERMAL_STATUS__CTF_TEMP__SHIFT; | 6252 | CG_MULT_THERMAL_STATUS__CTF_TEMP__SHIFT; |
| @@ -6551,9 +6572,10 @@ static int ci_dpm_set_powergating_state(void *handle, | |||
| 6551 | return 0; | 6572 | return 0; |
| 6552 | } | 6573 | } |
| 6553 | 6574 | ||
| 6554 | static int ci_dpm_print_clock_levels(struct amdgpu_device *adev, | 6575 | static int ci_dpm_print_clock_levels(void *handle, |
| 6555 | enum pp_clock_type type, char *buf) | 6576 | enum pp_clock_type type, char *buf) |
| 6556 | { | 6577 | { |
| 6578 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 6557 | struct ci_power_info *pi = ci_get_pi(adev); | 6579 | struct ci_power_info *pi = ci_get_pi(adev); |
| 6558 | struct ci_single_dpm_table *sclk_table = &pi->dpm_table.sclk_table; | 6580 | struct ci_single_dpm_table *sclk_table = &pi->dpm_table.sclk_table; |
| 6559 | struct ci_single_dpm_table *mclk_table = &pi->dpm_table.mclk_table; | 6581 | struct ci_single_dpm_table *mclk_table = &pi->dpm_table.mclk_table; |
| @@ -6618,9 +6640,10 @@ static int ci_dpm_print_clock_levels(struct amdgpu_device *adev, | |||
| 6618 | return size; | 6640 | return size; |
| 6619 | } | 6641 | } |
| 6620 | 6642 | ||
| 6621 | static int ci_dpm_force_clock_level(struct amdgpu_device *adev, | 6643 | static int ci_dpm_force_clock_level(void *handle, |
| 6622 | enum pp_clock_type type, uint32_t mask) | 6644 | enum pp_clock_type type, uint32_t mask) |
| 6623 | { | 6645 | { |
| 6646 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 6624 | struct ci_power_info *pi = ci_get_pi(adev); | 6647 | struct ci_power_info *pi = ci_get_pi(adev); |
| 6625 | 6648 | ||
| 6626 | if (adev->pm.dpm.forced_level & (AMD_DPM_FORCED_LEVEL_AUTO | | 6649 | if (adev->pm.dpm.forced_level & (AMD_DPM_FORCED_LEVEL_AUTO | |
| @@ -6664,8 +6687,9 @@ static int ci_dpm_force_clock_level(struct amdgpu_device *adev, | |||
| 6664 | return 0; | 6687 | return 0; |
| 6665 | } | 6688 | } |
| 6666 | 6689 | ||
| 6667 | static int ci_dpm_get_sclk_od(struct amdgpu_device *adev) | 6690 | static int ci_dpm_get_sclk_od(void *handle) |
| 6668 | { | 6691 | { |
| 6692 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 6669 | struct ci_power_info *pi = ci_get_pi(adev); | 6693 | struct ci_power_info *pi = ci_get_pi(adev); |
| 6670 | struct ci_single_dpm_table *sclk_table = &(pi->dpm_table.sclk_table); | 6694 | struct ci_single_dpm_table *sclk_table = &(pi->dpm_table.sclk_table); |
| 6671 | struct ci_single_dpm_table *golden_sclk_table = | 6695 | struct ci_single_dpm_table *golden_sclk_table = |
| @@ -6680,8 +6704,9 @@ static int ci_dpm_get_sclk_od(struct amdgpu_device *adev) | |||
| 6680 | return value; | 6704 | return value; |
| 6681 | } | 6705 | } |
| 6682 | 6706 | ||
| 6683 | static int ci_dpm_set_sclk_od(struct amdgpu_device *adev, uint32_t value) | 6707 | static int ci_dpm_set_sclk_od(void *handle, uint32_t value) |
| 6684 | { | 6708 | { |
| 6709 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 6685 | struct ci_power_info *pi = ci_get_pi(adev); | 6710 | struct ci_power_info *pi = ci_get_pi(adev); |
| 6686 | struct ci_ps *ps = ci_get_ps(adev->pm.dpm.requested_ps); | 6711 | struct ci_ps *ps = ci_get_ps(adev->pm.dpm.requested_ps); |
| 6687 | struct ci_single_dpm_table *golden_sclk_table = | 6712 | struct ci_single_dpm_table *golden_sclk_table = |
| @@ -6698,8 +6723,9 @@ static int ci_dpm_set_sclk_od(struct amdgpu_device *adev, uint32_t value) | |||
| 6698 | return 0; | 6723 | return 0; |
| 6699 | } | 6724 | } |
| 6700 | 6725 | ||
| 6701 | static int ci_dpm_get_mclk_od(struct amdgpu_device *adev) | 6726 | static int ci_dpm_get_mclk_od(void *handle) |
| 6702 | { | 6727 | { |
| 6728 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 6703 | struct ci_power_info *pi = ci_get_pi(adev); | 6729 | struct ci_power_info *pi = ci_get_pi(adev); |
| 6704 | struct ci_single_dpm_table *mclk_table = &(pi->dpm_table.mclk_table); | 6730 | struct ci_single_dpm_table *mclk_table = &(pi->dpm_table.mclk_table); |
| 6705 | struct ci_single_dpm_table *golden_mclk_table = | 6731 | struct ci_single_dpm_table *golden_mclk_table = |
| @@ -6714,8 +6740,9 @@ static int ci_dpm_get_mclk_od(struct amdgpu_device *adev) | |||
| 6714 | return value; | 6740 | return value; |
| 6715 | } | 6741 | } |
| 6716 | 6742 | ||
| 6717 | static int ci_dpm_set_mclk_od(struct amdgpu_device *adev, uint32_t value) | 6743 | static int ci_dpm_set_mclk_od(void *handle, uint32_t value) |
| 6718 | { | 6744 | { |
| 6745 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 6719 | struct ci_power_info *pi = ci_get_pi(adev); | 6746 | struct ci_power_info *pi = ci_get_pi(adev); |
| 6720 | struct ci_ps *ps = ci_get_ps(adev->pm.dpm.requested_ps); | 6747 | struct ci_ps *ps = ci_get_ps(adev->pm.dpm.requested_ps); |
| 6721 | struct ci_single_dpm_table *golden_mclk_table = | 6748 | struct ci_single_dpm_table *golden_mclk_table = |
| @@ -6732,9 +6759,10 @@ static int ci_dpm_set_mclk_od(struct amdgpu_device *adev, uint32_t value) | |||
| 6732 | return 0; | 6759 | return 0; |
| 6733 | } | 6760 | } |
| 6734 | 6761 | ||
| 6735 | static int ci_dpm_get_power_profile_state(struct amdgpu_device *adev, | 6762 | static int ci_dpm_get_power_profile_state(void *handle, |
| 6736 | struct amd_pp_profile *query) | 6763 | struct amd_pp_profile *query) |
| 6737 | { | 6764 | { |
| 6765 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 6738 | struct ci_power_info *pi = ci_get_pi(adev); | 6766 | struct ci_power_info *pi = ci_get_pi(adev); |
| 6739 | 6767 | ||
| 6740 | if (!pi || !query) | 6768 | if (!pi || !query) |
| @@ -6851,9 +6879,10 @@ static int ci_set_power_profile_state(struct amdgpu_device *adev, | |||
| 6851 | return result; | 6879 | return result; |
| 6852 | } | 6880 | } |
| 6853 | 6881 | ||
| 6854 | static int ci_dpm_set_power_profile_state(struct amdgpu_device *adev, | 6882 | static int ci_dpm_set_power_profile_state(void *handle, |
| 6855 | struct amd_pp_profile *request) | 6883 | struct amd_pp_profile *request) |
| 6856 | { | 6884 | { |
| 6885 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 6857 | struct ci_power_info *pi = ci_get_pi(adev); | 6886 | struct ci_power_info *pi = ci_get_pi(adev); |
| 6858 | int ret = -1; | 6887 | int ret = -1; |
| 6859 | 6888 | ||
| @@ -6906,9 +6935,10 @@ static int ci_dpm_set_power_profile_state(struct amdgpu_device *adev, | |||
| 6906 | return 0; | 6935 | return 0; |
| 6907 | } | 6936 | } |
| 6908 | 6937 | ||
| 6909 | static int ci_dpm_reset_power_profile_state(struct amdgpu_device *adev, | 6938 | static int ci_dpm_reset_power_profile_state(void *handle, |
| 6910 | struct amd_pp_profile *request) | 6939 | struct amd_pp_profile *request) |
| 6911 | { | 6940 | { |
| 6941 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 6912 | struct ci_power_info *pi = ci_get_pi(adev); | 6942 | struct ci_power_info *pi = ci_get_pi(adev); |
| 6913 | 6943 | ||
| 6914 | if (!pi || !request) | 6944 | if (!pi || !request) |
| @@ -6927,9 +6957,10 @@ static int ci_dpm_reset_power_profile_state(struct amdgpu_device *adev, | |||
| 6927 | return -EINVAL; | 6957 | return -EINVAL; |
| 6928 | } | 6958 | } |
| 6929 | 6959 | ||
| 6930 | static int ci_dpm_switch_power_profile(struct amdgpu_device *adev, | 6960 | static int ci_dpm_switch_power_profile(void *handle, |
| 6931 | enum amd_pp_profile_type type) | 6961 | enum amd_pp_profile_type type) |
| 6932 | { | 6962 | { |
| 6963 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 6933 | struct ci_power_info *pi = ci_get_pi(adev); | 6964 | struct ci_power_info *pi = ci_get_pi(adev); |
| 6934 | struct amd_pp_profile request = {0}; | 6965 | struct amd_pp_profile request = {0}; |
| 6935 | 6966 | ||
| @@ -6944,11 +6975,12 @@ static int ci_dpm_switch_power_profile(struct amdgpu_device *adev, | |||
| 6944 | return 0; | 6975 | return 0; |
| 6945 | } | 6976 | } |
| 6946 | 6977 | ||
| 6947 | static int ci_dpm_read_sensor(struct amdgpu_device *adev, int idx, | 6978 | static int ci_dpm_read_sensor(void *handle, int idx, |
| 6948 | void *value, int *size) | 6979 | void *value, int *size) |
| 6949 | { | 6980 | { |
| 6950 | u32 activity_percent = 50; | 6981 | u32 activity_percent = 50; |
| 6951 | int ret; | 6982 | int ret; |
| 6983 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 6952 | 6984 | ||
| 6953 | /* size must be at least 4 bytes for all sensors */ | 6985 | /* size must be at least 4 bytes for all sensors */ |
| 6954 | if (*size < 4) | 6986 | if (*size < 4) |
| @@ -7003,7 +7035,7 @@ const struct amd_ip_funcs ci_dpm_ip_funcs = { | |||
| 7003 | .set_powergating_state = ci_dpm_set_powergating_state, | 7035 | .set_powergating_state = ci_dpm_set_powergating_state, |
| 7004 | }; | 7036 | }; |
| 7005 | 7037 | ||
| 7006 | static const struct amdgpu_dpm_funcs ci_dpm_funcs = { | 7038 | static const struct amd_pm_funcs ci_dpm_funcs = { |
| 7007 | .get_temperature = &ci_dpm_get_temp, | 7039 | .get_temperature = &ci_dpm_get_temp, |
| 7008 | .pre_set_power_state = &ci_dpm_pre_set_power_state, | 7040 | .pre_set_power_state = &ci_dpm_pre_set_power_state, |
| 7009 | .set_power_state = &ci_dpm_set_power_state, | 7041 | .set_power_state = &ci_dpm_set_power_state, |
diff --git a/drivers/gpu/drm/amd/amdgpu/kv_dpm.c b/drivers/gpu/drm/amd/amdgpu/kv_dpm.c index 3bbf2ccfca89..f68d7abe1ed9 100644 --- a/drivers/gpu/drm/amd/amdgpu/kv_dpm.c +++ b/drivers/gpu/drm/amd/amdgpu/kv_dpm.c | |||
| @@ -64,7 +64,7 @@ static int kv_set_thermal_temperature_range(struct amdgpu_device *adev, | |||
| 64 | int min_temp, int max_temp); | 64 | int min_temp, int max_temp); |
| 65 | static int kv_init_fps_limits(struct amdgpu_device *adev); | 65 | static int kv_init_fps_limits(struct amdgpu_device *adev); |
| 66 | 66 | ||
| 67 | static void kv_dpm_powergate_uvd(struct amdgpu_device *adev, bool gate); | 67 | static void kv_dpm_powergate_uvd(void *handle, bool gate); |
| 68 | static void kv_dpm_powergate_vce(struct amdgpu_device *adev, bool gate); | 68 | static void kv_dpm_powergate_vce(struct amdgpu_device *adev, bool gate); |
| 69 | static void kv_dpm_powergate_samu(struct amdgpu_device *adev, bool gate); | 69 | static void kv_dpm_powergate_samu(struct amdgpu_device *adev, bool gate); |
| 70 | static void kv_dpm_powergate_acp(struct amdgpu_device *adev, bool gate); | 70 | static void kv_dpm_powergate_acp(struct amdgpu_device *adev, bool gate); |
| @@ -1245,8 +1245,9 @@ static void kv_update_requested_ps(struct amdgpu_device *adev, | |||
| 1245 | adev->pm.dpm.requested_ps = &pi->requested_rps; | 1245 | adev->pm.dpm.requested_ps = &pi->requested_rps; |
| 1246 | } | 1246 | } |
| 1247 | 1247 | ||
| 1248 | static void kv_dpm_enable_bapm(struct amdgpu_device *adev, bool enable) | 1248 | static void kv_dpm_enable_bapm(void *handle, bool enable) |
| 1249 | { | 1249 | { |
| 1250 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 1250 | struct kv_power_info *pi = kv_get_pi(adev); | 1251 | struct kv_power_info *pi = kv_get_pi(adev); |
| 1251 | int ret; | 1252 | int ret; |
| 1252 | 1253 | ||
| @@ -1672,8 +1673,9 @@ static int kv_update_acp_dpm(struct amdgpu_device *adev, bool gate) | |||
| 1672 | return kv_enable_acp_dpm(adev, !gate); | 1673 | return kv_enable_acp_dpm(adev, !gate); |
| 1673 | } | 1674 | } |
| 1674 | 1675 | ||
| 1675 | static void kv_dpm_powergate_uvd(struct amdgpu_device *adev, bool gate) | 1676 | static void kv_dpm_powergate_uvd(void *handle, bool gate) |
| 1676 | { | 1677 | { |
| 1678 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 1677 | struct kv_power_info *pi = kv_get_pi(adev); | 1679 | struct kv_power_info *pi = kv_get_pi(adev); |
| 1678 | int ret; | 1680 | int ret; |
| 1679 | 1681 | ||
| @@ -1868,10 +1870,11 @@ static int kv_enable_nb_dpm(struct amdgpu_device *adev, | |||
| 1868 | return ret; | 1870 | return ret; |
| 1869 | } | 1871 | } |
| 1870 | 1872 | ||
| 1871 | static int kv_dpm_force_performance_level(struct amdgpu_device *adev, | 1873 | static int kv_dpm_force_performance_level(void *handle, |
| 1872 | enum amd_dpm_forced_level level) | 1874 | enum amd_dpm_forced_level level) |
| 1873 | { | 1875 | { |
| 1874 | int ret; | 1876 | int ret; |
| 1877 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 1875 | 1878 | ||
| 1876 | if (level == AMD_DPM_FORCED_LEVEL_HIGH) { | 1879 | if (level == AMD_DPM_FORCED_LEVEL_HIGH) { |
| 1877 | ret = kv_force_dpm_highest(adev); | 1880 | ret = kv_force_dpm_highest(adev); |
| @@ -1892,8 +1895,9 @@ static int kv_dpm_force_performance_level(struct amdgpu_device *adev, | |||
| 1892 | return 0; | 1895 | return 0; |
| 1893 | } | 1896 | } |
| 1894 | 1897 | ||
| 1895 | static int kv_dpm_pre_set_power_state(struct amdgpu_device *adev) | 1898 | static int kv_dpm_pre_set_power_state(void *handle) |
| 1896 | { | 1899 | { |
| 1900 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 1897 | struct kv_power_info *pi = kv_get_pi(adev); | 1901 | struct kv_power_info *pi = kv_get_pi(adev); |
| 1898 | struct amdgpu_ps requested_ps = *adev->pm.dpm.requested_ps; | 1902 | struct amdgpu_ps requested_ps = *adev->pm.dpm.requested_ps; |
| 1899 | struct amdgpu_ps *new_ps = &requested_ps; | 1903 | struct amdgpu_ps *new_ps = &requested_ps; |
| @@ -1907,8 +1911,9 @@ static int kv_dpm_pre_set_power_state(struct amdgpu_device *adev) | |||
| 1907 | return 0; | 1911 | return 0; |
| 1908 | } | 1912 | } |
| 1909 | 1913 | ||
| 1910 | static int kv_dpm_set_power_state(struct amdgpu_device *adev) | 1914 | static int kv_dpm_set_power_state(void *handle) |
| 1911 | { | 1915 | { |
| 1916 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 1912 | struct kv_power_info *pi = kv_get_pi(adev); | 1917 | struct kv_power_info *pi = kv_get_pi(adev); |
| 1913 | struct amdgpu_ps *new_ps = &pi->requested_rps; | 1918 | struct amdgpu_ps *new_ps = &pi->requested_rps; |
| 1914 | struct amdgpu_ps *old_ps = &pi->current_rps; | 1919 | struct amdgpu_ps *old_ps = &pi->current_rps; |
| @@ -1981,8 +1986,9 @@ static int kv_dpm_set_power_state(struct amdgpu_device *adev) | |||
| 1981 | return 0; | 1986 | return 0; |
| 1982 | } | 1987 | } |
| 1983 | 1988 | ||
| 1984 | static void kv_dpm_post_set_power_state(struct amdgpu_device *adev) | 1989 | static void kv_dpm_post_set_power_state(void *handle) |
| 1985 | { | 1990 | { |
| 1991 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 1986 | struct kv_power_info *pi = kv_get_pi(adev); | 1992 | struct kv_power_info *pi = kv_get_pi(adev); |
| 1987 | struct amdgpu_ps *new_ps = &pi->requested_rps; | 1993 | struct amdgpu_ps *new_ps = &pi->requested_rps; |
| 1988 | 1994 | ||
| @@ -2848,9 +2854,10 @@ static int kv_dpm_init(struct amdgpu_device *adev) | |||
| 2848 | } | 2854 | } |
| 2849 | 2855 | ||
| 2850 | static void | 2856 | static void |
| 2851 | kv_dpm_debugfs_print_current_performance_level(struct amdgpu_device *adev, | 2857 | kv_dpm_debugfs_print_current_performance_level(void *handle, |
| 2852 | struct seq_file *m) | 2858 | struct seq_file *m) |
| 2853 | { | 2859 | { |
| 2860 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 2854 | struct kv_power_info *pi = kv_get_pi(adev); | 2861 | struct kv_power_info *pi = kv_get_pi(adev); |
| 2855 | u32 current_index = | 2862 | u32 current_index = |
| 2856 | (RREG32_SMC(ixTARGET_AND_CURRENT_PROFILE_INDEX) & | 2863 | (RREG32_SMC(ixTARGET_AND_CURRENT_PROFILE_INDEX) & |
| @@ -2875,11 +2882,12 @@ kv_dpm_debugfs_print_current_performance_level(struct amdgpu_device *adev, | |||
| 2875 | } | 2882 | } |
| 2876 | 2883 | ||
| 2877 | static void | 2884 | static void |
| 2878 | kv_dpm_print_power_state(struct amdgpu_device *adev, | 2885 | kv_dpm_print_power_state(void *handle, void *request_ps) |
| 2879 | struct amdgpu_ps *rps) | ||
| 2880 | { | 2886 | { |
| 2881 | int i; | 2887 | int i; |
| 2888 | struct amdgpu_ps *rps = (struct amdgpu_ps *)request_ps; | ||
| 2882 | struct kv_ps *ps = kv_get_ps(rps); | 2889 | struct kv_ps *ps = kv_get_ps(rps); |
| 2890 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 2883 | 2891 | ||
| 2884 | amdgpu_dpm_print_class_info(rps->class, rps->class2); | 2892 | amdgpu_dpm_print_class_info(rps->class, rps->class2); |
| 2885 | amdgpu_dpm_print_cap_info(rps->caps); | 2893 | amdgpu_dpm_print_cap_info(rps->caps); |
| @@ -2905,13 +2913,14 @@ static void kv_dpm_fini(struct amdgpu_device *adev) | |||
| 2905 | amdgpu_free_extended_power_table(adev); | 2913 | amdgpu_free_extended_power_table(adev); |
| 2906 | } | 2914 | } |
| 2907 | 2915 | ||
| 2908 | static void kv_dpm_display_configuration_changed(struct amdgpu_device *adev) | 2916 | static void kv_dpm_display_configuration_changed(void *handle) |
| 2909 | { | 2917 | { |
| 2910 | 2918 | ||
| 2911 | } | 2919 | } |
| 2912 | 2920 | ||
| 2913 | static u32 kv_dpm_get_sclk(struct amdgpu_device *adev, bool low) | 2921 | static u32 kv_dpm_get_sclk(void *handle, bool low) |
| 2914 | { | 2922 | { |
| 2923 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 2915 | struct kv_power_info *pi = kv_get_pi(adev); | 2924 | struct kv_power_info *pi = kv_get_pi(adev); |
| 2916 | struct kv_ps *requested_state = kv_get_ps(&pi->requested_rps); | 2925 | struct kv_ps *requested_state = kv_get_ps(&pi->requested_rps); |
| 2917 | 2926 | ||
| @@ -2921,18 +2930,20 @@ static u32 kv_dpm_get_sclk(struct amdgpu_device *adev, bool low) | |||
| 2921 | return requested_state->levels[requested_state->num_levels - 1].sclk; | 2930 | return requested_state->levels[requested_state->num_levels - 1].sclk; |
| 2922 | } | 2931 | } |
| 2923 | 2932 | ||
| 2924 | static u32 kv_dpm_get_mclk(struct amdgpu_device *adev, bool low) | 2933 | static u32 kv_dpm_get_mclk(void *handle, bool low) |
| 2925 | { | 2934 | { |
| 2935 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 2926 | struct kv_power_info *pi = kv_get_pi(adev); | 2936 | struct kv_power_info *pi = kv_get_pi(adev); |
| 2927 | 2937 | ||
| 2928 | return pi->sys_info.bootup_uma_clk; | 2938 | return pi->sys_info.bootup_uma_clk; |
| 2929 | } | 2939 | } |
| 2930 | 2940 | ||
| 2931 | /* get temperature in millidegrees */ | 2941 | /* get temperature in millidegrees */ |
| 2932 | static int kv_dpm_get_temp(struct amdgpu_device *adev) | 2942 | static int kv_dpm_get_temp(void *handle) |
| 2933 | { | 2943 | { |
| 2934 | u32 temp; | 2944 | u32 temp; |
| 2935 | int actual_temp = 0; | 2945 | int actual_temp = 0; |
| 2946 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 2936 | 2947 | ||
| 2937 | temp = RREG32_SMC(0xC0300E0C); | 2948 | temp = RREG32_SMC(0xC0300E0C); |
| 2938 | 2949 | ||
| @@ -3222,14 +3233,17 @@ static inline bool kv_are_power_levels_equal(const struct kv_pl *kv_cpl1, | |||
| 3222 | (kv_cpl1->force_nbp_state == kv_cpl2->force_nbp_state)); | 3233 | (kv_cpl1->force_nbp_state == kv_cpl2->force_nbp_state)); |
| 3223 | } | 3234 | } |
| 3224 | 3235 | ||
| 3225 | static int kv_check_state_equal(struct amdgpu_device *adev, | 3236 | static int kv_check_state_equal(void *handle, |
| 3226 | struct amdgpu_ps *cps, | 3237 | void *current_ps, |
| 3227 | struct amdgpu_ps *rps, | 3238 | void *request_ps, |
| 3228 | bool *equal) | 3239 | bool *equal) |
| 3229 | { | 3240 | { |
| 3230 | struct kv_ps *kv_cps; | 3241 | struct kv_ps *kv_cps; |
| 3231 | struct kv_ps *kv_rps; | 3242 | struct kv_ps *kv_rps; |
| 3232 | int i; | 3243 | int i; |
| 3244 | struct amdgpu_ps *cps = (struct amdgpu_ps *)current_ps; | ||
| 3245 | struct amdgpu_ps *rps = (struct amdgpu_ps *)request_ps; | ||
| 3246 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 3233 | 3247 | ||
| 3234 | if (adev == NULL || cps == NULL || rps == NULL || equal == NULL) | 3248 | if (adev == NULL || cps == NULL || rps == NULL || equal == NULL) |
| 3235 | return -EINVAL; | 3249 | return -EINVAL; |
| @@ -3262,9 +3276,10 @@ static int kv_check_state_equal(struct amdgpu_device *adev, | |||
| 3262 | return 0; | 3276 | return 0; |
| 3263 | } | 3277 | } |
| 3264 | 3278 | ||
| 3265 | static int kv_dpm_read_sensor(struct amdgpu_device *adev, int idx, | 3279 | static int kv_dpm_read_sensor(void *handle, int idx, |
| 3266 | void *value, int *size) | 3280 | void *value, int *size) |
| 3267 | { | 3281 | { |
| 3282 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 3268 | struct kv_power_info *pi = kv_get_pi(adev); | 3283 | struct kv_power_info *pi = kv_get_pi(adev); |
| 3269 | uint32_t sclk; | 3284 | uint32_t sclk; |
| 3270 | u32 pl_index = | 3285 | u32 pl_index = |
| @@ -3312,7 +3327,7 @@ const struct amd_ip_funcs kv_dpm_ip_funcs = { | |||
| 3312 | .set_powergating_state = kv_dpm_set_powergating_state, | 3327 | .set_powergating_state = kv_dpm_set_powergating_state, |
| 3313 | }; | 3328 | }; |
| 3314 | 3329 | ||
| 3315 | static const struct amdgpu_dpm_funcs kv_dpm_funcs = { | 3330 | static const struct amd_pm_funcs kv_dpm_funcs = { |
| 3316 | .get_temperature = &kv_dpm_get_temp, | 3331 | .get_temperature = &kv_dpm_get_temp, |
| 3317 | .pre_set_power_state = &kv_dpm_pre_set_power_state, | 3332 | .pre_set_power_state = &kv_dpm_pre_set_power_state, |
| 3318 | .set_power_state = &kv_dpm_set_power_state, | 3333 | .set_power_state = &kv_dpm_set_power_state, |
diff --git a/drivers/gpu/drm/amd/amdgpu/si_dpm.c b/drivers/gpu/drm/amd/amdgpu/si_dpm.c index d63873f3f574..05b3dbf585d5 100644 --- a/drivers/gpu/drm/amd/amdgpu/si_dpm.c +++ b/drivers/gpu/drm/amd/amdgpu/si_dpm.c | |||
| @@ -3060,9 +3060,9 @@ static int si_get_vce_clock_voltage(struct amdgpu_device *adev, | |||
| 3060 | return ret; | 3060 | return ret; |
| 3061 | } | 3061 | } |
| 3062 | 3062 | ||
| 3063 | static bool si_dpm_vblank_too_short(struct amdgpu_device *adev) | 3063 | static bool si_dpm_vblank_too_short(void *handle) |
| 3064 | { | 3064 | { |
| 3065 | 3065 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | |
| 3066 | u32 vblank_time = amdgpu_dpm_get_vblank_time(adev); | 3066 | u32 vblank_time = amdgpu_dpm_get_vblank_time(adev); |
| 3067 | /* we never hit the non-gddr5 limit so disable it */ | 3067 | /* we never hit the non-gddr5 limit so disable it */ |
| 3068 | u32 switch_limit = adev->mc.vram_type == AMDGPU_VRAM_TYPE_GDDR5 ? 450 : 0; | 3068 | u32 switch_limit = adev->mc.vram_type == AMDGPU_VRAM_TYPE_GDDR5 ? 450 : 0; |
| @@ -3871,9 +3871,10 @@ static int si_restrict_performance_levels_before_switch(struct amdgpu_device *ad | |||
| 3871 | 0 : -EINVAL; | 3871 | 0 : -EINVAL; |
| 3872 | } | 3872 | } |
| 3873 | 3873 | ||
| 3874 | static int si_dpm_force_performance_level(struct amdgpu_device *adev, | 3874 | static int si_dpm_force_performance_level(void *handle, |
| 3875 | enum amd_dpm_forced_level level) | 3875 | enum amd_dpm_forced_level level) |
| 3876 | { | 3876 | { |
| 3877 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 3877 | struct amdgpu_ps *rps = adev->pm.dpm.current_ps; | 3878 | struct amdgpu_ps *rps = adev->pm.dpm.current_ps; |
| 3878 | struct si_ps *ps = si_get_ps(rps); | 3879 | struct si_ps *ps = si_get_ps(rps); |
| 3879 | u32 levels = ps->performance_level_count; | 3880 | u32 levels = ps->performance_level_count; |
| @@ -6575,11 +6576,12 @@ static int si_fan_ctrl_stop_smc_fan_control(struct amdgpu_device *adev) | |||
| 6575 | } | 6576 | } |
| 6576 | } | 6577 | } |
| 6577 | 6578 | ||
| 6578 | static int si_dpm_get_fan_speed_percent(struct amdgpu_device *adev, | 6579 | static int si_dpm_get_fan_speed_percent(void *handle, |
| 6579 | u32 *speed) | 6580 | u32 *speed) |
| 6580 | { | 6581 | { |
| 6581 | u32 duty, duty100; | 6582 | u32 duty, duty100; |
| 6582 | u64 tmp64; | 6583 | u64 tmp64; |
| 6584 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 6583 | 6585 | ||
| 6584 | if (adev->pm.no_fan) | 6586 | if (adev->pm.no_fan) |
| 6585 | return -ENOENT; | 6587 | return -ENOENT; |
| @@ -6600,9 +6602,10 @@ static int si_dpm_get_fan_speed_percent(struct amdgpu_device *adev, | |||
| 6600 | return 0; | 6602 | return 0; |
| 6601 | } | 6603 | } |
| 6602 | 6604 | ||
| 6603 | static int si_dpm_set_fan_speed_percent(struct amdgpu_device *adev, | 6605 | static int si_dpm_set_fan_speed_percent(void *handle, |
| 6604 | u32 speed) | 6606 | u32 speed) |
| 6605 | { | 6607 | { |
| 6608 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 6606 | struct si_power_info *si_pi = si_get_pi(adev); | 6609 | struct si_power_info *si_pi = si_get_pi(adev); |
| 6607 | u32 tmp; | 6610 | u32 tmp; |
| 6608 | u32 duty, duty100; | 6611 | u32 duty, duty100; |
| @@ -6633,8 +6636,10 @@ static int si_dpm_set_fan_speed_percent(struct amdgpu_device *adev, | |||
| 6633 | return 0; | 6636 | return 0; |
| 6634 | } | 6637 | } |
| 6635 | 6638 | ||
| 6636 | static void si_dpm_set_fan_control_mode(struct amdgpu_device *adev, u32 mode) | 6639 | static void si_dpm_set_fan_control_mode(void *handle, u32 mode) |
| 6637 | { | 6640 | { |
| 6641 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 6642 | |||
| 6638 | if (mode) { | 6643 | if (mode) { |
| 6639 | /* stop auto-manage */ | 6644 | /* stop auto-manage */ |
| 6640 | if (adev->pm.dpm.fan.ucode_fan_control) | 6645 | if (adev->pm.dpm.fan.ucode_fan_control) |
| @@ -6649,8 +6654,9 @@ static void si_dpm_set_fan_control_mode(struct amdgpu_device *adev, u32 mode) | |||
| 6649 | } | 6654 | } |
| 6650 | } | 6655 | } |
| 6651 | 6656 | ||
| 6652 | static u32 si_dpm_get_fan_control_mode(struct amdgpu_device *adev) | 6657 | static u32 si_dpm_get_fan_control_mode(void *handle) |
| 6653 | { | 6658 | { |
| 6659 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 6654 | struct si_power_info *si_pi = si_get_pi(adev); | 6660 | struct si_power_info *si_pi = si_get_pi(adev); |
| 6655 | u32 tmp; | 6661 | u32 tmp; |
| 6656 | 6662 | ||
| @@ -6946,8 +6952,9 @@ static void si_dpm_disable(struct amdgpu_device *adev) | |||
| 6946 | ni_update_current_ps(adev, boot_ps); | 6952 | ni_update_current_ps(adev, boot_ps); |
| 6947 | } | 6953 | } |
| 6948 | 6954 | ||
| 6949 | static int si_dpm_pre_set_power_state(struct amdgpu_device *adev) | 6955 | static int si_dpm_pre_set_power_state(void *handle) |
| 6950 | { | 6956 | { |
| 6957 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 6951 | struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); | 6958 | struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); |
| 6952 | struct amdgpu_ps requested_ps = *adev->pm.dpm.requested_ps; | 6959 | struct amdgpu_ps requested_ps = *adev->pm.dpm.requested_ps; |
| 6953 | struct amdgpu_ps *new_ps = &requested_ps; | 6960 | struct amdgpu_ps *new_ps = &requested_ps; |
| @@ -6984,8 +6991,9 @@ static int si_power_control_set_level(struct amdgpu_device *adev) | |||
| 6984 | return 0; | 6991 | return 0; |
| 6985 | } | 6992 | } |
| 6986 | 6993 | ||
| 6987 | static int si_dpm_set_power_state(struct amdgpu_device *adev) | 6994 | static int si_dpm_set_power_state(void *handle) |
| 6988 | { | 6995 | { |
| 6996 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 6989 | struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); | 6997 | struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); |
| 6990 | struct amdgpu_ps *new_ps = &eg_pi->requested_rps; | 6998 | struct amdgpu_ps *new_ps = &eg_pi->requested_rps; |
| 6991 | struct amdgpu_ps *old_ps = &eg_pi->current_rps; | 6999 | struct amdgpu_ps *old_ps = &eg_pi->current_rps; |
| @@ -7086,8 +7094,9 @@ static int si_dpm_set_power_state(struct amdgpu_device *adev) | |||
| 7086 | return 0; | 7094 | return 0; |
| 7087 | } | 7095 | } |
| 7088 | 7096 | ||
| 7089 | static void si_dpm_post_set_power_state(struct amdgpu_device *adev) | 7097 | static void si_dpm_post_set_power_state(void *handle) |
| 7090 | { | 7098 | { |
| 7099 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 7091 | struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); | 7100 | struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); |
| 7092 | struct amdgpu_ps *new_ps = &eg_pi->requested_rps; | 7101 | struct amdgpu_ps *new_ps = &eg_pi->requested_rps; |
| 7093 | 7102 | ||
| @@ -7103,8 +7112,10 @@ void si_dpm_reset_asic(struct amdgpu_device *adev) | |||
| 7103 | } | 7112 | } |
| 7104 | #endif | 7113 | #endif |
| 7105 | 7114 | ||
| 7106 | static void si_dpm_display_configuration_changed(struct amdgpu_device *adev) | 7115 | static void si_dpm_display_configuration_changed(void *handle) |
| 7107 | { | 7116 | { |
| 7117 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 7118 | |||
| 7108 | si_program_display_gap(adev); | 7119 | si_program_display_gap(adev); |
| 7109 | } | 7120 | } |
| 7110 | 7121 | ||
| @@ -7486,9 +7497,10 @@ static void si_dpm_fini(struct amdgpu_device *adev) | |||
| 7486 | amdgpu_free_extended_power_table(adev); | 7497 | amdgpu_free_extended_power_table(adev); |
| 7487 | } | 7498 | } |
| 7488 | 7499 | ||
| 7489 | static void si_dpm_debugfs_print_current_performance_level(struct amdgpu_device *adev, | 7500 | static void si_dpm_debugfs_print_current_performance_level(void *handle, |
| 7490 | struct seq_file *m) | 7501 | struct seq_file *m) |
| 7491 | { | 7502 | { |
| 7503 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 7492 | struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); | 7504 | struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); |
| 7493 | struct amdgpu_ps *rps = &eg_pi->current_rps; | 7505 | struct amdgpu_ps *rps = &eg_pi->current_rps; |
| 7494 | struct si_ps *ps = si_get_ps(rps); | 7506 | struct si_ps *ps = si_get_ps(rps); |
| @@ -7860,10 +7872,11 @@ static int si_dpm_set_powergating_state(void *handle, | |||
| 7860 | } | 7872 | } |
| 7861 | 7873 | ||
| 7862 | /* get temperature in millidegrees */ | 7874 | /* get temperature in millidegrees */ |
| 7863 | static int si_dpm_get_temp(struct amdgpu_device *adev) | 7875 | static int si_dpm_get_temp(void *handle) |
| 7864 | { | 7876 | { |
| 7865 | u32 temp; | 7877 | u32 temp; |
| 7866 | int actual_temp = 0; | 7878 | int actual_temp = 0; |
| 7879 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 7867 | 7880 | ||
| 7868 | temp = (RREG32(CG_MULT_THERMAL_STATUS) & CTF_TEMP_MASK) >> | 7881 | temp = (RREG32(CG_MULT_THERMAL_STATUS) & CTF_TEMP_MASK) >> |
| 7869 | CTF_TEMP_SHIFT; | 7882 | CTF_TEMP_SHIFT; |
| @@ -7878,8 +7891,9 @@ static int si_dpm_get_temp(struct amdgpu_device *adev) | |||
| 7878 | return actual_temp; | 7891 | return actual_temp; |
| 7879 | } | 7892 | } |
| 7880 | 7893 | ||
| 7881 | static u32 si_dpm_get_sclk(struct amdgpu_device *adev, bool low) | 7894 | static u32 si_dpm_get_sclk(void *handle, bool low) |
| 7882 | { | 7895 | { |
| 7896 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 7883 | struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); | 7897 | struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); |
| 7884 | struct si_ps *requested_state = si_get_ps(&eg_pi->requested_rps); | 7898 | struct si_ps *requested_state = si_get_ps(&eg_pi->requested_rps); |
| 7885 | 7899 | ||
| @@ -7889,8 +7903,9 @@ static u32 si_dpm_get_sclk(struct amdgpu_device *adev, bool low) | |||
| 7889 | return requested_state->performance_levels[requested_state->performance_level_count - 1].sclk; | 7903 | return requested_state->performance_levels[requested_state->performance_level_count - 1].sclk; |
| 7890 | } | 7904 | } |
| 7891 | 7905 | ||
| 7892 | static u32 si_dpm_get_mclk(struct amdgpu_device *adev, bool low) | 7906 | static u32 si_dpm_get_mclk(void *handle, bool low) |
| 7893 | { | 7907 | { |
| 7908 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 7894 | struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); | 7909 | struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); |
| 7895 | struct si_ps *requested_state = si_get_ps(&eg_pi->requested_rps); | 7910 | struct si_ps *requested_state = si_get_ps(&eg_pi->requested_rps); |
| 7896 | 7911 | ||
| @@ -7900,9 +7915,11 @@ static u32 si_dpm_get_mclk(struct amdgpu_device *adev, bool low) | |||
| 7900 | return requested_state->performance_levels[requested_state->performance_level_count - 1].mclk; | 7915 | return requested_state->performance_levels[requested_state->performance_level_count - 1].mclk; |
| 7901 | } | 7916 | } |
| 7902 | 7917 | ||
| 7903 | static void si_dpm_print_power_state(struct amdgpu_device *adev, | 7918 | static void si_dpm_print_power_state(void *handle, |
| 7904 | struct amdgpu_ps *rps) | 7919 | void *current_ps) |
| 7905 | { | 7920 | { |
| 7921 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 7922 | struct amdgpu_ps *rps = (struct amdgpu_ps *)current_ps; | ||
| 7906 | struct si_ps *ps = si_get_ps(rps); | 7923 | struct si_ps *ps = si_get_ps(rps); |
| 7907 | struct rv7xx_pl *pl; | 7924 | struct rv7xx_pl *pl; |
| 7908 | int i; | 7925 | int i; |
| @@ -7942,20 +7959,23 @@ static inline bool si_are_power_levels_equal(const struct rv7xx_pl *si_cpl1, | |||
| 7942 | (si_cpl1->vddci == si_cpl2->vddci)); | 7959 | (si_cpl1->vddci == si_cpl2->vddci)); |
| 7943 | } | 7960 | } |
| 7944 | 7961 | ||
| 7945 | static int si_check_state_equal(struct amdgpu_device *adev, | 7962 | static int si_check_state_equal(void *handle, |
| 7946 | struct amdgpu_ps *cps, | 7963 | void *current_ps, |
| 7947 | struct amdgpu_ps *rps, | 7964 | void *request_ps, |
| 7948 | bool *equal) | 7965 | bool *equal) |
| 7949 | { | 7966 | { |
| 7950 | struct si_ps *si_cps; | 7967 | struct si_ps *si_cps; |
| 7951 | struct si_ps *si_rps; | 7968 | struct si_ps *si_rps; |
| 7952 | int i; | 7969 | int i; |
| 7970 | struct amdgpu_ps *cps = (struct amdgpu_ps *)current_ps; | ||
| 7971 | struct amdgpu_ps *rps = (struct amdgpu_ps *)request_ps; | ||
| 7972 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 7953 | 7973 | ||
| 7954 | if (adev == NULL || cps == NULL || rps == NULL || equal == NULL) | 7974 | if (adev == NULL || cps == NULL || rps == NULL || equal == NULL) |
| 7955 | return -EINVAL; | 7975 | return -EINVAL; |
| 7956 | 7976 | ||
| 7957 | si_cps = si_get_ps(cps); | 7977 | si_cps = si_get_ps((struct amdgpu_ps *)cps); |
| 7958 | si_rps = si_get_ps(rps); | 7978 | si_rps = si_get_ps((struct amdgpu_ps *)rps); |
| 7959 | 7979 | ||
| 7960 | if (si_cps == NULL) { | 7980 | if (si_cps == NULL) { |
| 7961 | printk("si_cps is NULL\n"); | 7981 | printk("si_cps is NULL\n"); |
| @@ -7983,9 +8003,10 @@ static int si_check_state_equal(struct amdgpu_device *adev, | |||
| 7983 | return 0; | 8003 | return 0; |
| 7984 | } | 8004 | } |
| 7985 | 8005 | ||
| 7986 | static int si_dpm_read_sensor(struct amdgpu_device *adev, int idx, | 8006 | static int si_dpm_read_sensor(void *handle, int idx, |
| 7987 | void *value, int *size) | 8007 | void *value, int *size) |
| 7988 | { | 8008 | { |
| 8009 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
| 7989 | struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); | 8010 | struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); |
| 7990 | struct amdgpu_ps *rps = &eg_pi->current_rps; | 8011 | struct amdgpu_ps *rps = &eg_pi->current_rps; |
| 7991 | struct si_ps *ps = si_get_ps(rps); | 8012 | struct si_ps *ps = si_get_ps(rps); |
| @@ -8041,7 +8062,7 @@ const struct amd_ip_funcs si_dpm_ip_funcs = { | |||
| 8041 | .set_powergating_state = si_dpm_set_powergating_state, | 8062 | .set_powergating_state = si_dpm_set_powergating_state, |
| 8042 | }; | 8063 | }; |
| 8043 | 8064 | ||
| 8044 | static const struct amdgpu_dpm_funcs si_dpm_funcs = { | 8065 | static const struct amd_pm_funcs si_dpm_funcs = { |
| 8045 | .get_temperature = &si_dpm_get_temp, | 8066 | .get_temperature = &si_dpm_get_temp, |
| 8046 | .pre_set_power_state = &si_dpm_pre_set_power_state, | 8067 | .pre_set_power_state = &si_dpm_pre_set_power_state, |
| 8047 | .set_power_state = &si_dpm_set_power_state, | 8068 | .set_power_state = &si_dpm_set_power_state, |
diff --git a/drivers/gpu/drm/amd/include/amd_shared.h b/drivers/gpu/drm/amd/include/amd_shared.h index 70e8c20acb2f..140ff6438390 100644 --- a/drivers/gpu/drm/amd/include/amd_shared.h +++ b/drivers/gpu/drm/amd/include/amd_shared.h | |||
| @@ -25,6 +25,8 @@ | |||
| 25 | 25 | ||
| 26 | #define AMD_MAX_USEC_TIMEOUT 200000 /* 200 ms */ | 26 | #define AMD_MAX_USEC_TIMEOUT 200000 /* 200 ms */ |
| 27 | 27 | ||
| 28 | struct seq_file; | ||
| 29 | |||
| 28 | /* | 30 | /* |
| 29 | * Supported ASIC types | 31 | * Supported ASIC types |
| 30 | */ | 32 | */ |
| @@ -144,6 +146,12 @@ enum amd_fan_ctrl_mode { | |||
| 144 | AMD_FAN_CTRL_AUTO = 2, | 146 | AMD_FAN_CTRL_AUTO = 2, |
| 145 | }; | 147 | }; |
| 146 | 148 | ||
| 149 | enum pp_clock_type { | ||
| 150 | PP_SCLK, | ||
| 151 | PP_MCLK, | ||
| 152 | PP_PCIE, | ||
| 153 | }; | ||
| 154 | |||
| 147 | /* CG flags */ | 155 | /* CG flags */ |
| 148 | #define AMD_CG_SUPPORT_GFX_MGCG (1 << 0) | 156 | #define AMD_CG_SUPPORT_GFX_MGCG (1 << 0) |
| 149 | #define AMD_CG_SUPPORT_GFX_MGLS (1 << 1) | 157 | #define AMD_CG_SUPPORT_GFX_MGLS (1 << 1) |
| @@ -249,4 +257,47 @@ struct amd_ip_funcs { | |||
| 249 | void (*get_clockgating_state)(void *handle, u32 *flags); | 257 | void (*get_clockgating_state)(void *handle, u32 *flags); |
| 250 | }; | 258 | }; |
| 251 | 259 | ||
| 260 | struct amd_pm_funcs { | ||
| 261 | int (*get_temperature)(void *handle); | ||
| 262 | int (*pre_set_power_state)(void *handle); | ||
| 263 | int (*set_power_state)(void *handle); | ||
| 264 | void (*post_set_power_state)(void *handle); | ||
| 265 | void (*display_configuration_changed)(void *handle); | ||
| 266 | u32 (*get_sclk)(void *handle, bool low); | ||
| 267 | u32 (*get_mclk)(void *handle, bool low); | ||
| 268 | void (*print_power_state)(void *handle, void *ps); | ||
| 269 | void (*debugfs_print_current_performance_level)(void *handle, struct seq_file *m); | ||
| 270 | int (*force_performance_level)(void *handle, enum amd_dpm_forced_level level); | ||
| 271 | bool (*vblank_too_short)(void *handle); | ||
| 272 | void (*powergate_uvd)(void *handle, bool gate); | ||
| 273 | void (*powergate_vce)(void *handle, bool gate); | ||
| 274 | void (*enable_bapm)(void *handle, bool enable); | ||
| 275 | void (*set_fan_control_mode)(void *handle, u32 mode); | ||
| 276 | u32 (*get_fan_control_mode)(void *handle); | ||
| 277 | int (*set_fan_speed_percent)(void *handle, u32 speed); | ||
| 278 | int (*get_fan_speed_percent)(void *handle, u32 *speed); | ||
| 279 | int (*force_clock_level)(void *handle, enum pp_clock_type type, uint32_t mask); | ||
| 280 | int (*print_clock_levels)(void *handle, enum pp_clock_type type, char *buf); | ||
| 281 | int (*get_sclk_od)(void *handle); | ||
| 282 | int (*set_sclk_od)(void *handle, uint32_t value); | ||
| 283 | int (*get_mclk_od)(void *handle); | ||
| 284 | int (*set_mclk_od)(void *handle, uint32_t value); | ||
| 285 | int (*check_state_equal)(void *handle, | ||
| 286 | void *cps, | ||
| 287 | void *rps, | ||
| 288 | bool *equal); | ||
| 289 | int (*read_sensor)(void *handle, int idx, void *value, | ||
| 290 | int *size); | ||
| 291 | |||
| 292 | struct amd_vce_state* (*get_vce_clock_state)(void *handle, u32 idx); | ||
| 293 | int (*reset_power_profile_state)(void *handle, | ||
| 294 | struct amd_pp_profile *request); | ||
| 295 | int (*get_power_profile_state)(void *handle, | ||
| 296 | struct amd_pp_profile *query); | ||
| 297 | int (*set_power_profile_state)(void *handle, | ||
| 298 | struct amd_pp_profile *request); | ||
| 299 | int (*switch_power_profile)(void *handle, | ||
| 300 | enum amd_pp_profile_type type); | ||
| 301 | }; | ||
| 302 | |||
| 252 | #endif /* __AMD_SHARED_H__ */ | 303 | #endif /* __AMD_SHARED_H__ */ |
diff --git a/drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h b/drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h index f471b99f456b..832340b8d1af 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h +++ b/drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h | |||
| @@ -213,12 +213,6 @@ enum { | |||
| 213 | PP_GROUP_MAX | 213 | PP_GROUP_MAX |
| 214 | }; | 214 | }; |
| 215 | 215 | ||
| 216 | enum pp_clock_type { | ||
| 217 | PP_SCLK, | ||
| 218 | PP_MCLK, | ||
| 219 | PP_PCIE, | ||
| 220 | }; | ||
| 221 | |||
| 222 | struct pp_states_info { | 216 | struct pp_states_info { |
| 223 | uint32_t nums; | 217 | uint32_t nums; |
| 224 | uint32_t states[16]; | 218 | uint32_t states[16]; |
