diff options
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/ci_dpm.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/ci_dpm.c | 100 |
1 files changed, 66 insertions, 34 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c index cb508a211b2f..bdf792822ff5 100644 --- a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c +++ b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c | |||
@@ -883,8 +883,9 @@ static int ci_power_control_set_level(struct amdgpu_device *adev) | |||
883 | return ret; | 883 | return ret; |
884 | } | 884 | } |
885 | 885 | ||
886 | static void ci_dpm_powergate_uvd(struct amdgpu_device *adev, bool gate) | 886 | static void ci_dpm_powergate_uvd(void *handle, bool gate) |
887 | { | 887 | { |
888 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
888 | struct ci_power_info *pi = ci_get_pi(adev); | 889 | struct ci_power_info *pi = ci_get_pi(adev); |
889 | 890 | ||
890 | pi->uvd_power_gated = gate; | 891 | pi->uvd_power_gated = gate; |
@@ -901,8 +902,9 @@ static void ci_dpm_powergate_uvd(struct amdgpu_device *adev, bool gate) | |||
901 | } | 902 | } |
902 | } | 903 | } |
903 | 904 | ||
904 | static bool ci_dpm_vblank_too_short(struct amdgpu_device *adev) | 905 | static bool ci_dpm_vblank_too_short(void *handle) |
905 | { | 906 | { |
907 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
906 | u32 vblank_time = amdgpu_dpm_get_vblank_time(adev); | 908 | u32 vblank_time = amdgpu_dpm_get_vblank_time(adev); |
907 | u32 switch_limit = adev->mc.vram_type == AMDGPU_VRAM_TYPE_GDDR5 ? 450 : 300; | 909 | u32 switch_limit = adev->mc.vram_type == AMDGPU_VRAM_TYPE_GDDR5 ? 450 : 300; |
908 | 910 | ||
@@ -1210,11 +1212,12 @@ static int ci_fan_ctrl_stop_smc_fan_control(struct amdgpu_device *adev) | |||
1210 | } | 1212 | } |
1211 | } | 1213 | } |
1212 | 1214 | ||
1213 | static int ci_dpm_get_fan_speed_percent(struct amdgpu_device *adev, | 1215 | static int ci_dpm_get_fan_speed_percent(void *handle, |
1214 | u32 *speed) | 1216 | u32 *speed) |
1215 | { | 1217 | { |
1216 | u32 duty, duty100; | 1218 | u32 duty, duty100; |
1217 | u64 tmp64; | 1219 | u64 tmp64; |
1220 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
1218 | 1221 | ||
1219 | if (adev->pm.no_fan) | 1222 | if (adev->pm.no_fan) |
1220 | return -ENOENT; | 1223 | return -ENOENT; |
@@ -1237,12 +1240,13 @@ static int ci_dpm_get_fan_speed_percent(struct amdgpu_device *adev, | |||
1237 | return 0; | 1240 | return 0; |
1238 | } | 1241 | } |
1239 | 1242 | ||
1240 | static int ci_dpm_set_fan_speed_percent(struct amdgpu_device *adev, | 1243 | static int ci_dpm_set_fan_speed_percent(void *handle, |
1241 | u32 speed) | 1244 | u32 speed) |
1242 | { | 1245 | { |
1243 | u32 tmp; | 1246 | u32 tmp; |
1244 | u32 duty, duty100; | 1247 | u32 duty, duty100; |
1245 | u64 tmp64; | 1248 | u64 tmp64; |
1249 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
1246 | struct ci_power_info *pi = ci_get_pi(adev); | 1250 | struct ci_power_info *pi = ci_get_pi(adev); |
1247 | 1251 | ||
1248 | if (adev->pm.no_fan) | 1252 | if (adev->pm.no_fan) |
@@ -1271,8 +1275,10 @@ static int ci_dpm_set_fan_speed_percent(struct amdgpu_device *adev, | |||
1271 | return 0; | 1275 | return 0; |
1272 | } | 1276 | } |
1273 | 1277 | ||
1274 | static void ci_dpm_set_fan_control_mode(struct amdgpu_device *adev, u32 mode) | 1278 | static void ci_dpm_set_fan_control_mode(void *handle, u32 mode) |
1275 | { | 1279 | { |
1280 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
1281 | |||
1276 | switch (mode) { | 1282 | switch (mode) { |
1277 | case AMD_FAN_CTRL_NONE: | 1283 | case AMD_FAN_CTRL_NONE: |
1278 | if (adev->pm.dpm.fan.ucode_fan_control) | 1284 | if (adev->pm.dpm.fan.ucode_fan_control) |
@@ -1292,8 +1298,9 @@ static void ci_dpm_set_fan_control_mode(struct amdgpu_device *adev, u32 mode) | |||
1292 | } | 1298 | } |
1293 | } | 1299 | } |
1294 | 1300 | ||
1295 | static u32 ci_dpm_get_fan_control_mode(struct amdgpu_device *adev) | 1301 | static u32 ci_dpm_get_fan_control_mode(void *handle) |
1296 | { | 1302 | { |
1303 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
1297 | struct ci_power_info *pi = ci_get_pi(adev); | 1304 | struct ci_power_info *pi = ci_get_pi(adev); |
1298 | 1305 | ||
1299 | if (pi->fan_is_controlled_by_smc) | 1306 | if (pi->fan_is_controlled_by_smc) |
@@ -4378,9 +4385,10 @@ static u32 ci_get_lowest_enabled_level(struct amdgpu_device *adev, | |||
4378 | } | 4385 | } |
4379 | 4386 | ||
4380 | 4387 | ||
4381 | static int ci_dpm_force_performance_level(struct amdgpu_device *adev, | 4388 | static int ci_dpm_force_performance_level(void *handle, |
4382 | enum amd_dpm_forced_level level) | 4389 | enum amd_dpm_forced_level level) |
4383 | { | 4390 | { |
4391 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
4384 | struct ci_power_info *pi = ci_get_pi(adev); | 4392 | struct ci_power_info *pi = ci_get_pi(adev); |
4385 | u32 tmp, levels, i; | 4393 | u32 tmp, levels, i; |
4386 | int ret; | 4394 | int ret; |
@@ -5291,8 +5299,9 @@ static void ci_update_requested_ps(struct amdgpu_device *adev, | |||
5291 | adev->pm.dpm.requested_ps = &pi->requested_rps; | 5299 | adev->pm.dpm.requested_ps = &pi->requested_rps; |
5292 | } | 5300 | } |
5293 | 5301 | ||
5294 | static int ci_dpm_pre_set_power_state(struct amdgpu_device *adev) | 5302 | static int ci_dpm_pre_set_power_state(void *handle) |
5295 | { | 5303 | { |
5304 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
5296 | struct ci_power_info *pi = ci_get_pi(adev); | 5305 | struct ci_power_info *pi = ci_get_pi(adev); |
5297 | struct amdgpu_ps requested_ps = *adev->pm.dpm.requested_ps; | 5306 | struct amdgpu_ps requested_ps = *adev->pm.dpm.requested_ps; |
5298 | struct amdgpu_ps *new_ps = &requested_ps; | 5307 | struct amdgpu_ps *new_ps = &requested_ps; |
@@ -5304,8 +5313,9 @@ static int ci_dpm_pre_set_power_state(struct amdgpu_device *adev) | |||
5304 | return 0; | 5313 | return 0; |
5305 | } | 5314 | } |
5306 | 5315 | ||
5307 | static void ci_dpm_post_set_power_state(struct amdgpu_device *adev) | 5316 | static void ci_dpm_post_set_power_state(void *handle) |
5308 | { | 5317 | { |
5318 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
5309 | struct ci_power_info *pi = ci_get_pi(adev); | 5319 | struct ci_power_info *pi = ci_get_pi(adev); |
5310 | struct amdgpu_ps *new_ps = &pi->requested_rps; | 5320 | struct amdgpu_ps *new_ps = &pi->requested_rps; |
5311 | 5321 | ||
@@ -5479,8 +5489,9 @@ static void ci_dpm_disable(struct amdgpu_device *adev) | |||
5479 | ci_update_current_ps(adev, boot_ps); | 5489 | ci_update_current_ps(adev, boot_ps); |
5480 | } | 5490 | } |
5481 | 5491 | ||
5482 | static int ci_dpm_set_power_state(struct amdgpu_device *adev) | 5492 | static int ci_dpm_set_power_state(void *handle) |
5483 | { | 5493 | { |
5494 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
5484 | struct ci_power_info *pi = ci_get_pi(adev); | 5495 | struct ci_power_info *pi = ci_get_pi(adev); |
5485 | struct amdgpu_ps *new_ps = &pi->requested_rps; | 5496 | struct amdgpu_ps *new_ps = &pi->requested_rps; |
5486 | struct amdgpu_ps *old_ps = &pi->current_rps; | 5497 | struct amdgpu_ps *old_ps = &pi->current_rps; |
@@ -5551,8 +5562,10 @@ static void ci_dpm_reset_asic(struct amdgpu_device *adev) | |||
5551 | } | 5562 | } |
5552 | #endif | 5563 | #endif |
5553 | 5564 | ||
5554 | static void ci_dpm_display_configuration_changed(struct amdgpu_device *adev) | 5565 | static void ci_dpm_display_configuration_changed(void *handle) |
5555 | { | 5566 | { |
5567 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
5568 | |||
5556 | ci_program_display_gap(adev); | 5569 | ci_program_display_gap(adev); |
5557 | } | 5570 | } |
5558 | 5571 | ||
@@ -6105,9 +6118,10 @@ static int ci_dpm_init(struct amdgpu_device *adev) | |||
6105 | } | 6118 | } |
6106 | 6119 | ||
6107 | static void | 6120 | static void |
6108 | ci_dpm_debugfs_print_current_performance_level(struct amdgpu_device *adev, | 6121 | ci_dpm_debugfs_print_current_performance_level(void *handle, |
6109 | struct seq_file *m) | 6122 | struct seq_file *m) |
6110 | { | 6123 | { |
6124 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
6111 | struct ci_power_info *pi = ci_get_pi(adev); | 6125 | struct ci_power_info *pi = ci_get_pi(adev); |
6112 | struct amdgpu_ps *rps = &pi->current_rps; | 6126 | struct amdgpu_ps *rps = &pi->current_rps; |
6113 | u32 sclk = ci_get_average_sclk_freq(adev); | 6127 | u32 sclk = ci_get_average_sclk_freq(adev); |
@@ -6131,12 +6145,13 @@ ci_dpm_debugfs_print_current_performance_level(struct amdgpu_device *adev, | |||
6131 | seq_printf(m, "GPU load: %u %%\n", activity_percent); | 6145 | seq_printf(m, "GPU load: %u %%\n", activity_percent); |
6132 | } | 6146 | } |
6133 | 6147 | ||
6134 | static void ci_dpm_print_power_state(struct amdgpu_device *adev, | 6148 | static void ci_dpm_print_power_state(void *handle, void *current_ps) |
6135 | struct amdgpu_ps *rps) | ||
6136 | { | 6149 | { |
6150 | struct amdgpu_ps *rps = (struct amdgpu_ps *)current_ps; | ||
6137 | struct ci_ps *ps = ci_get_ps(rps); | 6151 | struct ci_ps *ps = ci_get_ps(rps); |
6138 | struct ci_pl *pl; | 6152 | struct ci_pl *pl; |
6139 | int i; | 6153 | int i; |
6154 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
6140 | 6155 | ||
6141 | amdgpu_dpm_print_class_info(rps->class, rps->class2); | 6156 | amdgpu_dpm_print_class_info(rps->class, rps->class2); |
6142 | amdgpu_dpm_print_cap_info(rps->caps); | 6157 | amdgpu_dpm_print_cap_info(rps->caps); |
@@ -6158,20 +6173,23 @@ static inline bool ci_are_power_levels_equal(const struct ci_pl *ci_cpl1, | |||
6158 | (ci_cpl1->pcie_lane == ci_cpl2->pcie_lane)); | 6173 | (ci_cpl1->pcie_lane == ci_cpl2->pcie_lane)); |
6159 | } | 6174 | } |
6160 | 6175 | ||
6161 | static int ci_check_state_equal(struct amdgpu_device *adev, | 6176 | static int ci_check_state_equal(void *handle, |
6162 | struct amdgpu_ps *cps, | 6177 | void *current_ps, |
6163 | struct amdgpu_ps *rps, | 6178 | void *request_ps, |
6164 | bool *equal) | 6179 | bool *equal) |
6165 | { | 6180 | { |
6166 | struct ci_ps *ci_cps; | 6181 | struct ci_ps *ci_cps; |
6167 | struct ci_ps *ci_rps; | 6182 | struct ci_ps *ci_rps; |
6168 | int i; | 6183 | int i; |
6184 | struct amdgpu_ps *cps = (struct amdgpu_ps *)current_ps; | ||
6185 | struct amdgpu_ps *rps = (struct amdgpu_ps *)request_ps; | ||
6186 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
6169 | 6187 | ||
6170 | if (adev == NULL || cps == NULL || rps == NULL || equal == NULL) | 6188 | if (adev == NULL || cps == NULL || rps == NULL || equal == NULL) |
6171 | return -EINVAL; | 6189 | return -EINVAL; |
6172 | 6190 | ||
6173 | ci_cps = ci_get_ps(cps); | 6191 | ci_cps = ci_get_ps((struct amdgpu_ps *)cps); |
6174 | ci_rps = ci_get_ps(rps); | 6192 | ci_rps = ci_get_ps((struct amdgpu_ps *)rps); |
6175 | 6193 | ||
6176 | if (ci_cps == NULL) { | 6194 | if (ci_cps == NULL) { |
6177 | *equal = false; | 6195 | *equal = false; |
@@ -6199,8 +6217,9 @@ static int ci_check_state_equal(struct amdgpu_device *adev, | |||
6199 | return 0; | 6217 | return 0; |
6200 | } | 6218 | } |
6201 | 6219 | ||
6202 | static u32 ci_dpm_get_sclk(struct amdgpu_device *adev, bool low) | 6220 | static u32 ci_dpm_get_sclk(void *handle, bool low) |
6203 | { | 6221 | { |
6222 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
6204 | struct ci_power_info *pi = ci_get_pi(adev); | 6223 | struct ci_power_info *pi = ci_get_pi(adev); |
6205 | struct ci_ps *requested_state = ci_get_ps(&pi->requested_rps); | 6224 | struct ci_ps *requested_state = ci_get_ps(&pi->requested_rps); |
6206 | 6225 | ||
@@ -6210,8 +6229,9 @@ static u32 ci_dpm_get_sclk(struct amdgpu_device *adev, bool low) | |||
6210 | return requested_state->performance_levels[requested_state->performance_level_count - 1].sclk; | 6229 | return requested_state->performance_levels[requested_state->performance_level_count - 1].sclk; |
6211 | } | 6230 | } |
6212 | 6231 | ||
6213 | static u32 ci_dpm_get_mclk(struct amdgpu_device *adev, bool low) | 6232 | static u32 ci_dpm_get_mclk(void *handle, bool low) |
6214 | { | 6233 | { |
6234 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
6215 | struct ci_power_info *pi = ci_get_pi(adev); | 6235 | struct ci_power_info *pi = ci_get_pi(adev); |
6216 | struct ci_ps *requested_state = ci_get_ps(&pi->requested_rps); | 6236 | struct ci_ps *requested_state = ci_get_ps(&pi->requested_rps); |
6217 | 6237 | ||
@@ -6222,10 +6242,11 @@ static u32 ci_dpm_get_mclk(struct amdgpu_device *adev, bool low) | |||
6222 | } | 6242 | } |
6223 | 6243 | ||
6224 | /* get temperature in millidegrees */ | 6244 | /* get temperature in millidegrees */ |
6225 | static int ci_dpm_get_temp(struct amdgpu_device *adev) | 6245 | static int ci_dpm_get_temp(void *handle) |
6226 | { | 6246 | { |
6227 | u32 temp; | 6247 | u32 temp; |
6228 | int actual_temp = 0; | 6248 | int actual_temp = 0; |
6249 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
6229 | 6250 | ||
6230 | temp = (RREG32_SMC(ixCG_MULT_THERMAL_STATUS) & CG_MULT_THERMAL_STATUS__CTF_TEMP_MASK) >> | 6251 | temp = (RREG32_SMC(ixCG_MULT_THERMAL_STATUS) & CG_MULT_THERMAL_STATUS__CTF_TEMP_MASK) >> |
6231 | CG_MULT_THERMAL_STATUS__CTF_TEMP__SHIFT; | 6252 | CG_MULT_THERMAL_STATUS__CTF_TEMP__SHIFT; |
@@ -6551,9 +6572,10 @@ static int ci_dpm_set_powergating_state(void *handle, | |||
6551 | return 0; | 6572 | return 0; |
6552 | } | 6573 | } |
6553 | 6574 | ||
6554 | static int ci_dpm_print_clock_levels(struct amdgpu_device *adev, | 6575 | static int ci_dpm_print_clock_levels(void *handle, |
6555 | enum pp_clock_type type, char *buf) | 6576 | enum pp_clock_type type, char *buf) |
6556 | { | 6577 | { |
6578 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
6557 | struct ci_power_info *pi = ci_get_pi(adev); | 6579 | struct ci_power_info *pi = ci_get_pi(adev); |
6558 | struct ci_single_dpm_table *sclk_table = &pi->dpm_table.sclk_table; | 6580 | struct ci_single_dpm_table *sclk_table = &pi->dpm_table.sclk_table; |
6559 | struct ci_single_dpm_table *mclk_table = &pi->dpm_table.mclk_table; | 6581 | struct ci_single_dpm_table *mclk_table = &pi->dpm_table.mclk_table; |
@@ -6618,9 +6640,10 @@ static int ci_dpm_print_clock_levels(struct amdgpu_device *adev, | |||
6618 | return size; | 6640 | return size; |
6619 | } | 6641 | } |
6620 | 6642 | ||
6621 | static int ci_dpm_force_clock_level(struct amdgpu_device *adev, | 6643 | static int ci_dpm_force_clock_level(void *handle, |
6622 | enum pp_clock_type type, uint32_t mask) | 6644 | enum pp_clock_type type, uint32_t mask) |
6623 | { | 6645 | { |
6646 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
6624 | struct ci_power_info *pi = ci_get_pi(adev); | 6647 | struct ci_power_info *pi = ci_get_pi(adev); |
6625 | 6648 | ||
6626 | if (adev->pm.dpm.forced_level & (AMD_DPM_FORCED_LEVEL_AUTO | | 6649 | if (adev->pm.dpm.forced_level & (AMD_DPM_FORCED_LEVEL_AUTO | |
@@ -6664,8 +6687,9 @@ static int ci_dpm_force_clock_level(struct amdgpu_device *adev, | |||
6664 | return 0; | 6687 | return 0; |
6665 | } | 6688 | } |
6666 | 6689 | ||
6667 | static int ci_dpm_get_sclk_od(struct amdgpu_device *adev) | 6690 | static int ci_dpm_get_sclk_od(void *handle) |
6668 | { | 6691 | { |
6692 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
6669 | struct ci_power_info *pi = ci_get_pi(adev); | 6693 | struct ci_power_info *pi = ci_get_pi(adev); |
6670 | struct ci_single_dpm_table *sclk_table = &(pi->dpm_table.sclk_table); | 6694 | struct ci_single_dpm_table *sclk_table = &(pi->dpm_table.sclk_table); |
6671 | struct ci_single_dpm_table *golden_sclk_table = | 6695 | struct ci_single_dpm_table *golden_sclk_table = |
@@ -6680,8 +6704,9 @@ static int ci_dpm_get_sclk_od(struct amdgpu_device *adev) | |||
6680 | return value; | 6704 | return value; |
6681 | } | 6705 | } |
6682 | 6706 | ||
6683 | static int ci_dpm_set_sclk_od(struct amdgpu_device *adev, uint32_t value) | 6707 | static int ci_dpm_set_sclk_od(void *handle, uint32_t value) |
6684 | { | 6708 | { |
6709 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
6685 | struct ci_power_info *pi = ci_get_pi(adev); | 6710 | struct ci_power_info *pi = ci_get_pi(adev); |
6686 | struct ci_ps *ps = ci_get_ps(adev->pm.dpm.requested_ps); | 6711 | struct ci_ps *ps = ci_get_ps(adev->pm.dpm.requested_ps); |
6687 | struct ci_single_dpm_table *golden_sclk_table = | 6712 | struct ci_single_dpm_table *golden_sclk_table = |
@@ -6698,8 +6723,9 @@ static int ci_dpm_set_sclk_od(struct amdgpu_device *adev, uint32_t value) | |||
6698 | return 0; | 6723 | return 0; |
6699 | } | 6724 | } |
6700 | 6725 | ||
6701 | static int ci_dpm_get_mclk_od(struct amdgpu_device *adev) | 6726 | static int ci_dpm_get_mclk_od(void *handle) |
6702 | { | 6727 | { |
6728 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
6703 | struct ci_power_info *pi = ci_get_pi(adev); | 6729 | struct ci_power_info *pi = ci_get_pi(adev); |
6704 | struct ci_single_dpm_table *mclk_table = &(pi->dpm_table.mclk_table); | 6730 | struct ci_single_dpm_table *mclk_table = &(pi->dpm_table.mclk_table); |
6705 | struct ci_single_dpm_table *golden_mclk_table = | 6731 | struct ci_single_dpm_table *golden_mclk_table = |
@@ -6714,8 +6740,9 @@ static int ci_dpm_get_mclk_od(struct amdgpu_device *adev) | |||
6714 | return value; | 6740 | return value; |
6715 | } | 6741 | } |
6716 | 6742 | ||
6717 | static int ci_dpm_set_mclk_od(struct amdgpu_device *adev, uint32_t value) | 6743 | static int ci_dpm_set_mclk_od(void *handle, uint32_t value) |
6718 | { | 6744 | { |
6745 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
6719 | struct ci_power_info *pi = ci_get_pi(adev); | 6746 | struct ci_power_info *pi = ci_get_pi(adev); |
6720 | struct ci_ps *ps = ci_get_ps(adev->pm.dpm.requested_ps); | 6747 | struct ci_ps *ps = ci_get_ps(adev->pm.dpm.requested_ps); |
6721 | struct ci_single_dpm_table *golden_mclk_table = | 6748 | struct ci_single_dpm_table *golden_mclk_table = |
@@ -6732,9 +6759,10 @@ static int ci_dpm_set_mclk_od(struct amdgpu_device *adev, uint32_t value) | |||
6732 | return 0; | 6759 | return 0; |
6733 | } | 6760 | } |
6734 | 6761 | ||
6735 | static int ci_dpm_get_power_profile_state(struct amdgpu_device *adev, | 6762 | static int ci_dpm_get_power_profile_state(void *handle, |
6736 | struct amd_pp_profile *query) | 6763 | struct amd_pp_profile *query) |
6737 | { | 6764 | { |
6765 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
6738 | struct ci_power_info *pi = ci_get_pi(adev); | 6766 | struct ci_power_info *pi = ci_get_pi(adev); |
6739 | 6767 | ||
6740 | if (!pi || !query) | 6768 | if (!pi || !query) |
@@ -6851,9 +6879,10 @@ static int ci_set_power_profile_state(struct amdgpu_device *adev, | |||
6851 | return result; | 6879 | return result; |
6852 | } | 6880 | } |
6853 | 6881 | ||
6854 | static int ci_dpm_set_power_profile_state(struct amdgpu_device *adev, | 6882 | static int ci_dpm_set_power_profile_state(void *handle, |
6855 | struct amd_pp_profile *request) | 6883 | struct amd_pp_profile *request) |
6856 | { | 6884 | { |
6885 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
6857 | struct ci_power_info *pi = ci_get_pi(adev); | 6886 | struct ci_power_info *pi = ci_get_pi(adev); |
6858 | int ret = -1; | 6887 | int ret = -1; |
6859 | 6888 | ||
@@ -6906,9 +6935,10 @@ static int ci_dpm_set_power_profile_state(struct amdgpu_device *adev, | |||
6906 | return 0; | 6935 | return 0; |
6907 | } | 6936 | } |
6908 | 6937 | ||
6909 | static int ci_dpm_reset_power_profile_state(struct amdgpu_device *adev, | 6938 | static int ci_dpm_reset_power_profile_state(void *handle, |
6910 | struct amd_pp_profile *request) | 6939 | struct amd_pp_profile *request) |
6911 | { | 6940 | { |
6941 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
6912 | struct ci_power_info *pi = ci_get_pi(adev); | 6942 | struct ci_power_info *pi = ci_get_pi(adev); |
6913 | 6943 | ||
6914 | if (!pi || !request) | 6944 | if (!pi || !request) |
@@ -6927,9 +6957,10 @@ static int ci_dpm_reset_power_profile_state(struct amdgpu_device *adev, | |||
6927 | return -EINVAL; | 6957 | return -EINVAL; |
6928 | } | 6958 | } |
6929 | 6959 | ||
6930 | static int ci_dpm_switch_power_profile(struct amdgpu_device *adev, | 6960 | static int ci_dpm_switch_power_profile(void *handle, |
6931 | enum amd_pp_profile_type type) | 6961 | enum amd_pp_profile_type type) |
6932 | { | 6962 | { |
6963 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
6933 | struct ci_power_info *pi = ci_get_pi(adev); | 6964 | struct ci_power_info *pi = ci_get_pi(adev); |
6934 | struct amd_pp_profile request = {0}; | 6965 | struct amd_pp_profile request = {0}; |
6935 | 6966 | ||
@@ -6944,11 +6975,12 @@ static int ci_dpm_switch_power_profile(struct amdgpu_device *adev, | |||
6944 | return 0; | 6975 | return 0; |
6945 | } | 6976 | } |
6946 | 6977 | ||
6947 | static int ci_dpm_read_sensor(struct amdgpu_device *adev, int idx, | 6978 | static int ci_dpm_read_sensor(void *handle, int idx, |
6948 | void *value, int *size) | 6979 | void *value, int *size) |
6949 | { | 6980 | { |
6950 | u32 activity_percent = 50; | 6981 | u32 activity_percent = 50; |
6951 | int ret; | 6982 | int ret; |
6983 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
6952 | 6984 | ||
6953 | /* size must be at least 4 bytes for all sensors */ | 6985 | /* size must be at least 4 bytes for all sensors */ |
6954 | if (*size < 4) | 6986 | if (*size < 4) |
@@ -7003,7 +7035,7 @@ const struct amd_ip_funcs ci_dpm_ip_funcs = { | |||
7003 | .set_powergating_state = ci_dpm_set_powergating_state, | 7035 | .set_powergating_state = ci_dpm_set_powergating_state, |
7004 | }; | 7036 | }; |
7005 | 7037 | ||
7006 | static const struct amdgpu_dpm_funcs ci_dpm_funcs = { | 7038 | static const struct amd_pm_funcs ci_dpm_funcs = { |
7007 | .get_temperature = &ci_dpm_get_temp, | 7039 | .get_temperature = &ci_dpm_get_temp, |
7008 | .pre_set_power_state = &ci_dpm_pre_set_power_state, | 7040 | .pre_set_power_state = &ci_dpm_pre_set_power_state, |
7009 | .set_power_state = &ci_dpm_set_power_state, | 7041 | .set_power_state = &ci_dpm_set_power_state, |