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authorLinus Torvalds <torvalds@linux-foundation.org>2018-12-27 13:43:24 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2018-12-27 13:43:24 -0500
commit8d6973327ee84c2f40dd9efd8928d4a1186c96e2 (patch)
tree1c6accd71b6e9c4e05d5aaae766b958ad440d320 /arch/powerpc/include/asm/mmu.h
parent6d101ba6be2a26a3e1f513b5e293f0fd2b79ec5c (diff)
parent12526b0d6c580df860b31e59d68e5696e16c6e5b (diff)
Merge tag 'powerpc-4.21-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
Pull powerpc updates from Michael Ellerman: "Notable changes: - Mitigations for Spectre v2 on some Freescale (NXP) CPUs. - A large series adding support for pass-through of Nvidia V100 GPUs to guests on Power9. - Another large series to enable hardware assistance for TLB table walk on MPC8xx CPUs. - Some preparatory changes to our DMA code, to make way for further cleanups from Christoph. - Several fixes for our Transactional Memory handling discovered by fuzzing the signal return path. - Support for generating our system call table(s) from a text file like other architectures. - A fix to our page fault handler so that instead of generating a WARN_ON_ONCE, user accesses of kernel addresses instead print a ratelimited and appropriately scary warning. - A cosmetic change to make our unhandled page fault messages more similar to other arches and also more compact and informative. - Freescale updates from Scott: "Highlights include elimination of legacy clock bindings use from dts files, an 83xx watchdog handler, fixes to old dts interrupt errors, and some minor cleanup." And many clean-ups, reworks and minor fixes etc. Thanks to: Alexandre Belloni, Alexey Kardashevskiy, Andrew Donnellan, Aneesh Kumar K.V, Arnd Bergmann, Benjamin Herrenschmidt, Breno Leitao, Christian Lamparter, Christophe Leroy, Christoph Hellwig, Daniel Axtens, Darren Stevens, David Gibson, Diana Craciun, Dmitry V. Levin, Firoz Khan, Geert Uytterhoeven, Greg Kurz, Gustavo Romero, Hari Bathini, Joel Stanley, Kees Cook, Madhavan Srinivasan, Mahesh Salgaonkar, Markus Elfring, Mathieu Malaterre, Michal Suchánek, Naveen N. Rao, Nick Desaulniers, Oliver O'Halloran, Paul Mackerras, Ram Pai, Ravi Bangoria, Rob Herring, Russell Currey, Sabyasachi Gupta, Sam Bobroff, Satheesh Rajendran, Scott Wood, Segher Boessenkool, Stephen Rothwell, Tang Yuantian, Thiago Jung Bauermann, Yangtao Li, Yuantian Tang, Yue Haibing" * tag 'powerpc-4.21-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (201 commits) Revert "powerpc/fsl_pci: simplify fsl_pci_dma_set_mask" powerpc/zImage: Also check for stdout-path powerpc: Fix HMIs on big-endian with CONFIG_RELOCATABLE=y macintosh: Use of_node_name_{eq, prefix} for node name comparisons ide: Use of_node_name_eq for node name comparisons powerpc: Use of_node_name_eq for node name comparisons powerpc/pseries/pmem: Convert to %pOFn instead of device_node.name powerpc/mm: Remove very old comment in hash-4k.h powerpc/pseries: Fix node leak in update_lmb_associativity_index() powerpc/configs/85xx: Enable CONFIG_DEBUG_KERNEL powerpc/dts/fsl: Fix dtc-flagged interrupt errors clk: qoriq: add more compatibles strings powerpc/fsl: Use new clockgen binding powerpc/83xx: handle machine check caused by watchdog timer powerpc/fsl-rio: fix spelling mistake "reserverd" -> "reserved" powerpc/fsl_pci: simplify fsl_pci_dma_set_mask arch/powerpc/fsl_rmu: Use dma_zalloc_coherent vfio_pci: Add NVIDIA GV100GL [Tesla V100 SXM2] subdriver vfio_pci: Allow regions to add own capabilities vfio_pci: Allow mapping extra regions ...
Diffstat (limited to 'arch/powerpc/include/asm/mmu.h')
-rw-r--r--arch/powerpc/include/asm/mmu.h49
1 files changed, 30 insertions, 19 deletions
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index eb20eb3b8fb0..25607604a7a5 100644
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -48,7 +48,7 @@
48#define MMU_FTR_USE_HIGH_BATS ASM_CONST(0x00010000) 48#define MMU_FTR_USE_HIGH_BATS ASM_CONST(0x00010000)
49 49
50/* Enable >32-bit physical addresses on 32-bit processor, only used 50/* Enable >32-bit physical addresses on 32-bit processor, only used
51 * by CONFIG_6xx currently as BookE supports that from day 1 51 * by CONFIG_PPC_BOOK3S_32 currently as BookE supports that from day 1
52 */ 52 */
53#define MMU_FTR_BIG_PHYS ASM_CONST(0x00020000) 53#define MMU_FTR_BIG_PHYS ASM_CONST(0x00020000)
54 54
@@ -131,16 +131,37 @@ DECLARE_PER_CPU(int, next_tlbcam_idx);
131#endif 131#endif
132 132
133enum { 133enum {
134 MMU_FTRS_POSSIBLE = MMU_FTR_HPTE_TABLE | MMU_FTR_TYPE_8xx | 134 MMU_FTRS_POSSIBLE =
135 MMU_FTR_TYPE_40x | MMU_FTR_TYPE_44x | MMU_FTR_TYPE_FSL_E | 135#ifdef CONFIG_PPC_BOOK3S
136 MMU_FTR_TYPE_47x | MMU_FTR_USE_HIGH_BATS | MMU_FTR_BIG_PHYS | 136 MMU_FTR_HPTE_TABLE |
137 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_USE_TLBILX | 137#endif
138 MMU_FTR_LOCK_BCAST_INVAL | MMU_FTR_NEED_DTLB_SW_LRU | 138#ifdef CONFIG_PPC_8xx
139 MMU_FTR_TYPE_8xx |
140#endif
141#ifdef CONFIG_40x
142 MMU_FTR_TYPE_40x |
143#endif
144#ifdef CONFIG_44x
145 MMU_FTR_TYPE_44x |
146#endif
147#if defined(CONFIG_E200) || defined(CONFIG_E500)
148 MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | MMU_FTR_USE_TLBILX |
149#endif
150#ifdef CONFIG_PPC_47x
151 MMU_FTR_TYPE_47x | MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL |
152#endif
153#ifdef CONFIG_PPC_BOOK3S_32
154 MMU_FTR_USE_HIGH_BATS | MMU_FTR_NEED_DTLB_SW_LRU |
155#endif
156#ifdef CONFIG_PPC_BOOK3E_64
139 MMU_FTR_USE_TLBRSRV | MMU_FTR_USE_PAIRED_MAS | 157 MMU_FTR_USE_TLBRSRV | MMU_FTR_USE_PAIRED_MAS |
158#endif
159#ifdef CONFIG_PPC_BOOK3S_64
140 MMU_FTR_NO_SLBIE_B | MMU_FTR_16M_PAGE | MMU_FTR_TLBIEL | 160 MMU_FTR_NO_SLBIE_B | MMU_FTR_16M_PAGE | MMU_FTR_TLBIEL |
141 MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_CI_LARGE_PAGE | 161 MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_CI_LARGE_PAGE |
142 MMU_FTR_1T_SEGMENT | MMU_FTR_TLBIE_CROP_VA | 162 MMU_FTR_1T_SEGMENT | MMU_FTR_TLBIE_CROP_VA |
143 MMU_FTR_KERNEL_RO | MMU_FTR_68_BIT_VA | 163 MMU_FTR_KERNEL_RO | MMU_FTR_68_BIT_VA |
164#endif
144#ifdef CONFIG_PPC_RADIX_MMU 165#ifdef CONFIG_PPC_RADIX_MMU
145 MMU_FTR_TYPE_RADIX | 166 MMU_FTR_TYPE_RADIX |
146#endif 167#endif
@@ -338,21 +359,11 @@ static inline void mmu_early_init_devtree(void) { }
338#endif /* __ASSEMBLY__ */ 359#endif /* __ASSEMBLY__ */
339#endif 360#endif
340 361
341#if defined(CONFIG_PPC_STD_MMU_32) 362#if defined(CONFIG_PPC_BOOK3S_32)
342/* 32-bit classic hash table MMU */ 363/* 32-bit classic hash table MMU */
343#include <asm/book3s/32/mmu-hash.h> 364#include <asm/book3s/32/mmu-hash.h>
344#elif defined(CONFIG_40x) 365#elif defined(CONFIG_PPC_MMU_NOHASH)
345/* 40x-style software loaded TLB */ 366#include <asm/nohash/mmu.h>
346# include <asm/mmu-40x.h>
347#elif defined(CONFIG_44x)
348/* 44x-style software loaded TLB */
349# include <asm/mmu-44x.h>
350#elif defined(CONFIG_PPC_BOOK3E_MMU)
351/* Freescale Book-E software loaded TLB or Book-3e (ISA 2.06+) MMU */
352# include <asm/mmu-book3e.h>
353#elif defined (CONFIG_PPC_8xx)
354/* Motorola/Freescale 8xx software loaded TLB */
355# include <asm/mmu-8xx.h>
356#endif 367#endif
357 368
358#endif /* __KERNEL__ */ 369#endif /* __KERNEL__ */