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authorJoshua Bakita <bakitajoshua@gmail.com>2023-10-29 13:07:40 -0400
committerJoshua Bakita <bakitajoshua@gmail.com>2023-10-29 13:10:52 -0400
commit2c5337a24f7f2d02989dfb733c55d6d8c7e90493 (patch)
treeb9f1028cb443b03190b710c0d7ee640bf5958631 /include/nvgpu/hw/gk20a
parentaa06f84f03cba7ad1aae5cd527355bb3d8c152a6 (diff)
Update includes to L4T r32.7.4 and drop nvgpu/gk20a.h dependency
Also add instructions for updating `include/`. These files are now only needed to build on Linux 4.9-based Tegra platforms.
Diffstat (limited to 'include/nvgpu/hw/gk20a')
-rw-r--r--include/nvgpu/hw/gk20a/hw_gr_gk20a.h61
1 files changed, 61 insertions, 0 deletions
diff --git a/include/nvgpu/hw/gk20a/hw_gr_gk20a.h b/include/nvgpu/hw/gk20a/hw_gr_gk20a.h
index 826108f..376cc8f 100644
--- a/include/nvgpu/hw/gk20a/hw_gr_gk20a.h
+++ b/include/nvgpu/hw/gk20a/hw_gr_gk20a.h
@@ -1380,6 +1380,10 @@ static inline u32 gr_gpc0_gpccs_ctxsw_status_1_r(void)
1380{ 1380{
1381 return 0x00502400U; 1381 return 0x00502400U;
1382} 1382}
1383static inline u32 gr_gpc0_gpccs_ctxsw_mailbox__size_1_v(void)
1384{
1385 return 0x00000010U;
1386}
1383static inline u32 gr_fecs_ctxsw_idlestate_r(void) 1387static inline u32 gr_fecs_ctxsw_idlestate_r(void)
1384{ 1388{
1385 return 0x00409420U; 1389 return 0x00409420U;
@@ -3804,4 +3808,61 @@ static inline u32 gr_gpcs_tpcs_sm_dbgr_control0_run_trigger_task_f(void)
3804{ 3808{
3805 return 0x40000000U; 3809 return 0x40000000U;
3806} 3810}
3811
3812static inline u32 gr_gpc0_gpccs_falcon_irqstat_r(void)
3813{
3814 return 0x00502008U;
3815}
3816static inline u32 gr_gpc0_gpccs_falcon_irqmode_r(void)
3817{
3818 return 0x0050200cU;
3819}
3820static inline u32 gr_gpc0_gpccs_falcon_irqmask_r(void)
3821{
3822 return 0x00502018U;
3823}
3824static inline u32 gr_gpc0_gpccs_falcon_irqdest_r(void)
3825{
3826 return 0x0050201cU;
3827}
3828static inline u32 gr_gpc0_gpccs_falcon_debug1_r(void)
3829{
3830 return 0x00502090U;
3831}
3832static inline u32 gr_gpc0_gpccs_falcon_debuginfo_r(void)
3833{
3834 return 0x00502094U;
3835}
3836static inline u32 gr_gpc0_gpccs_falcon_engctl_r(void)
3837{
3838 return 0x005020a4U;
3839}
3840static inline u32 gr_gpc0_gpccs_falcon_curctx_r(void)
3841{
3842 return 0x00502050U;
3843}
3844static inline u32 gr_gpc0_gpccs_falcon_nxtctx_r(void)
3845{
3846 return 0x00502054U;
3847}
3848static inline u32 gr_gpc0_gpccs_ctxsw_mailbox_r(u32 i)
3849{
3850 return 0x00502800U + i*4U;
3851}
3852static inline u32 gr_gpc0_gpccs_falcon_icd_cmd_r(void)
3853{
3854 return 0x00502200U;
3855}
3856static inline u32 gr_gpc0_gpccs_falcon_icd_cmd_opc_rreg_f(void)
3857{
3858 return 0x8U;
3859}
3860static inline u32 gr_gpc0_gpccs_falcon_icd_cmd_idx_f(u32 v)
3861{
3862 return (v & 0x1fU) << 8U;
3863}
3864static inline u32 gr_gpc_gpccs_falcon_icd_rdata_r(void)
3865{
3866 return 0x0050220cU;
3867}
3807#endif 3868#endif