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* drm/nouveau/clock: fix support for more than 2 monitors on nve0Aleksi Torhamo2013-01-13
| | | | | | | | | | | | | | | | | | | | | | | Fixes regression introduced in commit 70790f4f "drm/nouveau/clock: pull in the implementation from all over the place" When code was moved from nv50_crtc_set_clock to nvc0_clock_pll_set, the PLLs it is used for got limited to only the first two VPLLs. nv50_crtc_set_clock was only called to change VPLLs, so it didn't limit what it was used for in any way. Since nvc0_clock_pll_set is used for all PLLs, it has to specify which PLLs the code is used for, and only listed the first two VPLLs. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=58735 This patch is a -stable candidate for 3.7. Signed-off-by: Aleksi Torhamo <aleksi@torhamo.net> Tested-by: Aleksi Torhamo <aleksi@torhamo.net> Tested-by: Sean Santos <quantheory@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Cc: stable@vger.kernel.org
* drm/nv50/disp: fix selection of bios script for analog outputsMarcin Slusarz2013-01-13
| | | | | | | | | | | | | | | | | | | | Analog output number was overwritten by value from digital output path. Fix it. Fixes resume from s2ram: https://bugs.freedesktop.org/show_bug.cgi?id=58729 (as stumbled on by J Binder, Pontus Fuchs and me) Fixes blank screen on module load (reported by Sune Mølgaard). Fixes regression from commit 186ecad21c854385823a430b1402053ae7fd59dc ("drm/nv50/disp: move remaining interrupt handling into core"). Reported-by: J Binder <wheel@herr-der-mails.de> Reported-by: Pontus Fuchs <pontus.fuchs@gmail.com> Reported-by: Sune Mølgaard <sune@molgaard.org> Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com> Tested-by: Marcin Slusarz <marcin.slusarz@gmail.com> Tested-by: Sune Mølgaard <sune@molgaard.org> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv17-50: restore fence buffer on resumeMarcin Slusarz2013-01-13
| | | | | | | | | | | | | | | | | | Since commit 5e120f6e4b3f35b741c5445dfc755f50128c3c44 "drm/nouveau/fence: convert to exec engine, and improve channel sync" nouveau fence sync implementation for nv17-50 and nvc0+ started to rely on state of fence buffer left by previous sync operation. But as pinned bo's (where fence state is stored) are not saved+restored across suspend/resume, we need to do it manually. nvc0+ was fixed by commit d6ba6d215a538a58f0f0026f0961b0b9125e8042 "drm/nvc0/fence: restore pre-suspend fence buffer context on resume". Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=50121 Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Cc: stable@vger.kernel.org
* drm/nouveau: fix blank LVDS screen regression on pre-nv50 cardsMarcin Slusarz2013-01-13
| | | | | | | | | | | | | | | | | | | | | | | Commit 2a44e499 ("drm/nouveau/disp: introduce proper init/fini, separate from create/destroy") started to call display init routines on pre-nv50 hardware on module load. But LVDS init code sets driver state in a way which prevents modesetting code from operating properly. nv04_display_init calls nv04_dfp_restore, which sets encoder->last_dpms to NV_DPMS_CLEARED. drm_crtc_helper_set_mode nv04_dfp_prepare nv04_lvds_dpms(DRM_MODE_DPMS_OFF) nv04_lvds_dpms checks last_dpms mode (which is NV_DPMS_CLEARED) and wrongly assumes it's a "powersaving mode", the new one (DRM_MODE_DPMS_OFF) is too, so it skips calling some crucial lvds scripts. Reported-by: Chris Paulson-Ellis <chris@edesix.com> Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Cc: stable@vger.kernel.org
* drm/nouveau: fix nouveau_client allocation failure pathMarcin Slusarz2013-01-13
| | | | | | | | Depending on the point of failure, freed object would be returned or memory leak would happen. Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: don't return freed object from nouveau_handle_createMarcin Slusarz2013-01-13
| | | | | Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/vm: fix memory corruption when pgt allocation failsMarcin Slusarz2013-01-13
| | | | | | | | | If we return freed vm, nouveau_drm_open will happily call nouveau_cli_destroy, which will try to free it again. Reported-by: Peter Hurley <peter@hurleysoftware.com> Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: add locking around instobj list operationsMarcin Slusarz2013-01-13
| | | | | | | | | Fixes memory corruptions, oopses, etc. when multiple gpuobjs are simultaneously created or destroyed. Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Cc: stable@vger.kernel.org
* drm/nouveau: do not forcibly power on lvds panelsBen Skeggs2013-01-13
| | | | | | | | | | | | | | This fix was put in place to fix a bug where the eDP panel on certain laptops fails to respond over the aux channel after suspend. It appears that on some systems (Dell M6600, with LVDS panel) there's a very bad interaction with the eDP init table that causes the SOR to get very confused and not drive the panel correctly, leading to bleed. A DPMS off/on cycle is enough to bring it back, but, this will avoid the problem by not touching the panel GPIOs at times we're not meant to. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/devinit: ensure legacy vga control is enabled during postBen Skeggs2013-01-13
| | | | | | Fixes ACPI backlight control after suspend on some systems. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nve0/graph: fix fuc, and enable acceleration on all known chipsetsBen Skeggs2012-12-23
| | | | | | Also adds GK106 to chipsets known by ucode. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvc0/graph: fix fuc, and enable acceleration on GF119Ben Skeggs2012-12-23
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/bios: cache ramcfg strap on later chipsetsBen Skeggs2012-12-23
| | | | | | This fixes suspend/resume on at least Quadro 400. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/mxm: silence output if no bios dataBen Skeggs2012-12-23
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/bios: parse/display extra version componentBen Skeggs2012-12-23
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/bios: implement opcode 0xa9Ben Skeggs2012-12-23
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/bios: update gpio parsing apis to match current designBen Skeggs2012-12-23
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: initial support for GK106Ben Skeggs2012-12-23
| | | | | | | | | | Modesetting seems to work alright, as does graphics (using binary driver fuc from nve7...). Lots to be done no doubt, but this'll get an image on the screen for people. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds2012-12-19
|\ | | | | | | | | | | | | | | | | Pull drm bugfix from Dave Airlie: "Just a single urgent regression fix, seeing a few wierd behaviours I'd like not to persist." * 'drm-next' of git://people.freedesktop.org/~airlied/linux: drm/ttm: fix delayed ttm_bo_cleanup_refs_and_unlock delayed handling
| * drm/ttm: fix delayed ttm_bo_cleanup_refs_and_unlock delayed handlingMaarten Lankhorst2012-12-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix regression introduced by 85b144f860176 "drm/ttm: call ttm_bo_cleanup_refs with reservation and lru lock held, v3" Slowpath ttm_bo_cleanup_refs_and_unlock accidentally tried to increase refcount on &bo->sync_obj instead of bo->sync_obj. The compiler didn't complain since sync_obj_ref takes a void pointer, so it was still valid c. This could result in lockups, memory corruptions, and warnings like these when graphics card VRAM usage is high: ------------[ cut here ]------------ WARNING: at include/linux/kref.h:42 radeon_fence_ref+0x2c/0x40() Hardware name: System Product Name Pid: 157, comm: X Not tainted 3.7.0-rc7-00520-g85b144f-dirty #174 Call Trace: [<ffffffff81058c84>] ? warn_slowpath_common+0x74/0xb0 [<ffffffff8129273c>] ? radeon_fence_ref+0x2c/0x40 [<ffffffff8125e95c>] ? ttm_bo_cleanup_refs_and_unlock+0x18c/0x2d0 [<ffffffff8125f17c>] ? ttm_mem_evict_first+0x1dc/0x2a0 [<ffffffff81264452>] ? ttm_bo_man_get_node+0x62/0xb0 [<ffffffff8125f4ce>] ? ttm_bo_mem_space+0x28e/0x340 [<ffffffff8125fb0c>] ? ttm_bo_move_buffer+0xfc/0x170 [<ffffffff810de172>] ? kmem_cache_alloc+0xb2/0xc0 [<ffffffff8125fc15>] ? ttm_bo_validate+0x95/0x110 [<ffffffff8125ff7c>] ? ttm_bo_init+0x2ec/0x3b0 [<ffffffff8129419a>] ? radeon_bo_create+0x18a/0x200 [<ffffffff81293e80>] ? radeon_bo_clear_va+0x40/0x40 [<ffffffff812a5342>] ? radeon_gem_object_create+0x92/0x160 [<ffffffff812a575c>] ? radeon_gem_create_ioctl+0x6c/0x150 [<ffffffff812a529f>] ? radeon_gem_object_free+0x2f/0x40 [<ffffffff81246b60>] ? drm_ioctl+0x420/0x4f0 [<ffffffff812a56f0>] ? radeon_gem_pwrite_ioctl+0x20/0x20 [<ffffffff810f53a4>] ? do_vfs_ioctl+0x2e4/0x4e0 [<ffffffff810e5588>] ? vfs_read+0x118/0x160 [<ffffffff810f55ec>] ? sys_ioctl+0x4c/0xa0 [<ffffffff810e5851>] ? sys_read+0x51/0xa0 [<ffffffff814b0612>] ? system_call_fastpath+0x16/0x1b Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Reported-by: Markus Trippelsdorf <markus@trippelsdorf.de> Acked-by: Paul Menzel <paulepanter@users.sourceforge.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds2012-12-17
|\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull DRM updates from Dave Airlie: "This is the one and only next pull for 3.8, we had a regression we found last week, so I was waiting for that to resolve itself, and I ended up with some Intel fixes on top as well. Highlights: - new driver: nvidia tegra 20/30/hdmi support - radeon: add support for previously unused DMA engines, more HDMI regs, eviction speeds ups and fixes - i915: HSW support enable, agp removal on GEN6, seqno wrapping - exynos: IPP subsystem support (image post proc), HDMI - nouveau: display class reworking, nv20->40 z compression - ttm: start of locking fixes, rcu usage for lookups, - core: documentation updates, docbook integration, monotonic clock usage, move from connector to object properties" * 'drm-next' of git://people.freedesktop.org/~airlied/linux: (590 commits) drm/exynos: add gsc ipp driver drm/exynos: add rotator ipp driver drm/exynos: add fimc ipp driver drm/exynos: add iommu support for ipp drm/exynos: add ipp subsystem drm/exynos: support device tree for fimd radeon: fix regression with eviction since evict caching changes drm/radeon: add more pedantic checks in the CP DMA checker drm/radeon: bump version for CS ioctl support for async DMA drm/radeon: enable the async DMA rings in the CS ioctl drm/radeon: add VM CS parser support for async DMA on cayman/TN/SI drm/radeon/kms: add evergreen/cayman CS parser for async DMA (v2) drm/radeon/kms: add 6xx/7xx CS parser for async DMA (v2) drm/radeon: fix htile buffer size computation for command stream checker drm/radeon: fix fence locking in the pageflip callback drm/radeon: make indirect register access concurrency-safe drm/radeon: add W|RREG32_IDX for MM_INDEX|DATA based mmio accesss drm/exynos: support extended screen coordinate of fimd drm/exynos: fix x, y coordinates for right bottom pixel drm/exynos: fix fb offset calculation for plane ...
| * Merge branch 'drm-intel-fixes' of ↵Dave Airlie2012-12-16
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://people.freedesktop.org/~danvet/drm-intel into drm-next Daniel writes: A few leftover fixes for 3.8: - VIC support for hdmi infoframes with the associated drm helper, fixes some black TVs (Paulo Zanoni) - Modeset state check (and fixup if the BIOS messed with the hw) for lid-open. modeset-rework fallout. Somehow the original reporter went awol, so this stalled for way too long until we've found a new victim^Wreporter with broken BIOS. - seqno wrap fixes from Mika and Chris. - Some minor fixes all over from various people. - Another race fix in the pageflip vs. unpin code from Chris. - hsw vga resume support and a few more fdi link fixes (only used for vga on hsw) from Paulo. - Regression fix for DMAR from Zhenyu Wang - I've scavenged memory from my DMAR for a while and it broke right away :( - Regression fix from Takashi Iwai for ivb lvds - some w/a needs to be (partially) moved back into place. Note that these are regressions in -next. - One more fix for ivb 3 pipe support - it now actually seems to work. * 'drm-intel-fixes' of git://people.freedesktop.org/~danvet/drm-intel: (25 commits) drm/i915: Fix missed needs_dmar setting drm/i915: Fix shifted screen on top of LVDS on IVY laptop drm/i915: disable cpt phase pointer fdi rx workaround drm/i915: set the LPT FDI RX polarity reversal bit when needed drm/i915: add lpt_init_pch_refclk drm/i915: add support for mPHY destination on intel_sbi_{read, write} drm/i915: reject modes the LPT FDI receiver can't handle drm/i915: fix hsw_fdi_link_train "retry" code drm/i915: Close race between processing unpin task and queueing the flip drm/i915: fixup l3 parity sysfs access check drm/i915: Clear the existing watermarks for g4x when modifying the cursor sr drm/i915: do not access BLC_PWM_CTL2 on pre-gen4 hardware drm/i915: Don't allow ring tail to reach the same cacheline as head drm/i915: Decouple the object from the unbound list before freeing pages drm/i915: Set sync_seqno properly after seqno wrap drm/i915: Include the last semaphore sync point in the error-state drm/i915: Rearrange code to only have a single method for waiting upon the ring drm/i915: Simplify flushing activity on the ring drm/i915: Preallocate next seqno before touching the ring drm/i915: force restore on lid open ...
| | * drm/i915: Fix missed needs_dmar settingZhenyu Wang2012-12-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From Ben's AGP dependence removal change, "needs_dmar" flag has not been properly setup for new chips using new GTT init function. This one adds missed setting of that flag to make sure we do pci mappings with IOMMU enabled. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| | * drm/i915: Fix shifted screen on top of LVDS on IVY laptopTakashi Iwai2012-12-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit [23670b322: drm/i915: CPT+ pch transcoder workaround] caused a regression on some HP laptops with IvyBridge. The whole laptop screen is shifted downward for a few pixels constantly. The problem appears only on LVDS while DP and VGA seem unaffected. Also, the problem disappears once when go and back from S3. (S4 resume still shows the same problem.) This patch revives the minimum part the commit above dropped. For fixing this regression, only the setup of CHICKEN2 bit in cpt_init_clock_gating() is needed. Signed-off-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| | * drm/i915: disable cpt phase pointer fdi rx workaroundDaniel Vetter2012-12-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We've originally added this in commit 291427f5fdadec6e4be2924172e83588880e1539 Author: Jesse Barnes <jbarnes@virtuousgeek.org> Date: Fri Jul 29 12:42:37 2011 -0700 drm/i915: apply phase pointer override on SNB+ too and then copy-pasted it over to ivb/ppt. The w/a was originally added for ilk/ibx in commit 5b2adf897146edeac6a1e438fb67b5a53dbbdf34 Author: Jesse Barnes <jbarnes@virtuousgeek.org> Date: Thu Oct 7 16:01:15 2010 -0700 drm/i915: add Ironlake clock gating workaround for FDI link training and fixed up a bit in commit 6f06ce184c765fd8d50669a8d12fdd566c920859 Author: Jesse Barnes <jbarnes@virtuousgeek.org> Date: Tue Jan 4 15:09:38 2011 -0800 drm/i915: set phase sync pointer override enable before setting phase sync pointer It turns out that this w/a isn't actually required on cpt/ppt and positively harmful on ivb/ppt when using fdi B/C links - it results in a black screen occasionally, with seemingfully everything working as it should. The only failure indication I've found in the hw is that eventually (but not right after the modeset completes) a pipe underrun is signalled. Big thanks to Arthur Runyan for all the ideas for registers to check and changes to test, otherwise I couldn't ever have tracked this down! Cc: "Runyan, Arthur J" <arthur.j.runyan@intel.com> Cc: stable@vger.kernel.org Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| | * drm/i915: set the LPT FDI RX polarity reversal bit when neededPaulo Zanoni2012-12-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If we fail to set the bit when needed we get some nice FDI link training failures (AKA "black screen on VGA output"). While we don't really know how to properly choose whether we need to set the bit or not (VBT?), just read the initial value set by the BIOS and store it for later usage. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| | * drm/i915: add lpt_init_pch_refclkPaulo Zanoni2012-12-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need this code to init the PCH SSC refclk and the FDI registers. The BIOS does this too and that's why VGA worked before this patch, until you tried to suspend the machine... This patch implements the "Sequence to enable CLKOUT_DP for FDI usage and configure PCH FDI/IO" from our documentation. v2: - Squash Damien Lespiau's reset spelling fix on top. - Add a comment that we don't need to bother about the ULT special case Damien noticed, since ULT won't have VGA. - Add a comment to rip out the SDV codepaths once haswell ships for real. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> (v1) Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| | * drm/i915: add support for mPHY destination on intel_sbi_{read, write}Paulo Zanoni2012-12-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This way we should be able to write mPHY registers using the Sideband Interface in the next commit. Also fixed some syntax oddities in the related code. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| | * drm/i915: reject modes the LPT FDI receiver can't handlePaulo Zanoni2012-12-08
| | | | | | | | | | | | | | | | | | | | | | | | More specifically, the LPT FDI RX only supports 8bpc and a maximum of 2 lanes, so anything above that won't work and should be rejected. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| | * drm/i915: fix hsw_fdi_link_train "retry" codePaulo Zanoni2012-12-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We were previously doing exactly what the "mode set sequence for CRT" document mandates, but whenever we failed to train the link in the first tentative, all the other subsequent retries always failed. In one of my monitors that has 47 modes, I was usually getting around 3 failures when running "testdisplay -a". After this patch, even if we fail in the first tentative, we can succeed in the next ones. So now when running "testdisplay -a" I see around 3 times the message "FDI link training done on step 1" and no failures. Notice that now the "retry" code looks a lot like the DP retry code. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| | * drm/i915: Close race between processing unpin task and queueing the flipChris Wilson2012-12-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before queuing the flip but crucially after attaching the unpin-work to the crtc, we continue to setup the unpin-work. However, should the hardware fire early, we see the connected unpin-work and queue the task. The task then promptly runs and unpins the fb before we finish taking the required references or even pinning it... Havoc. To close the race, we use the flip-pending atomic to indicate when the flip is finally setup and enqueued. So during the flip-done processing, we can check more accurately whether the flip was expected. v2: Add the appropriate mb() to ensure that the writes to the page-flip worker are complete prior to marking it active and emitting the MI_FLIP. On the read side, the mb should be enforced by the spinlocks. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: stable@vger.kernel.org [danvet: Review the barriers a bit, we need a write barrier both before and after updating ->pending. Similarly we need a read barrier in the interrupt handler both before and after reading ->pending. With well-ordered irqs only one barrier in each place should be required, but since this patch explicitly sets out to combat spurious interrupts with is staged activation of the unpin work we need to go full-bore on the barriers, too. Discussed with Chris Wilson on irc and changes acked by him.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| | * drm/i915: fixup l3 parity sysfs access checkDaniel Vetter2012-12-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When l3 parity support for Haswell was enabled in commit f27b92651d72e863c308ea5dca5615fc98e38ca6 Author: Ben Widawsky <benjamin.widawsky@intel.com> Date: Tue Jul 24 20:47:32 2012 -0700 drm/i915: Expand DPF support to Haswell no one noticed that the patch which introduced this macro commit e1ef7cc299839e68dae3f1843f62e52acda04538 Author: Ben Widawsky <benjamin.widawsky@intel.com> Date: Tue Jul 24 20:47:31 2012 -0700 drm/i915: Macro to determine DPF support missed one spot. Fix this. Cc: Ben Widawsky <benjamin.widawsky@intel.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=57441 Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| | * drm/i915: Clear the existing watermarks for g4x when modifying the cursor srChris Wilson2012-12-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In a couple of places we attempt to adjust the existing watermark registers to update them for the new cursor watermarks. This goes horribly wrong as instead of clearing the cursor bits prior to or'ing in the new values, we clear the rest of the register with the result that the watermark registers contain bogus values. References: https://bugs.freedesktop.org/show_bug.cgi?id=47034 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| | * drm/i915: do not access BLC_PWM_CTL2 on pre-gen4 hardwareJani Nikula2012-12-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | The BLC_PWM_CTL2 register does not exist before gen4. While at it, do a slight drive by cleanup of the code. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| | * drm/i915: Don't allow ring tail to reach the same cacheline as headVille Syrjälä2012-12-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From BSpec: "If the Ring Buffer Head Pointer and the Tail Pointer are on the same cacheline, the Head Pointer must not be greater than the Tail Pointer." The easiest way to enforce this is to reduce the reported ring space. References: Gen2 BSpec "1. Programming Environment" / 1.4.4.6 "Ring Buffer Use" Gen3 BSpec "vol1c Memory Interface Functions" / 2.3.4.5 "Ring Buffer Use" Gen4+ BSpec "vol1c Memory Interface and Command Stream" / 5.3.4.5 "Ring Buffer Use" v2: Include the exact BSpec references in the description v3: s/64/I915_RING_FREE_SPACE, and add the BSpec information to the code Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| | * drm/i915: Decouple the object from the unbound list before freeing pagesChris Wilson2012-12-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As we may actually allocate in order to save the physical swizzling bits during the free, we have to be careful not to trigger the shrinker on the same object. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> [danvet: Added a small comment in the code to really drive the scariness of this patch home.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| | * drm/i915: Set sync_seqno properly after seqno wrapMika Kuoppala2012-11-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | i915_gem_handle_seqno_wrap() will zero all sync_seqnos but as the wrap can happen inside ring->sync_to(), pre wrap seqno was carried over and overwrote the zeroed sync_seqno. When wrap is handled, all outstanding requests will be retired and objects moved to inactive queue, causing their last_read_seqno to be zero. Use this to update the sync_seqno correctly. RING_SYNC registers after wrap will contain pre wrap values which are >= seqno. So injecting the semaphore wait into ring completes immediately. Original idea for using last_read_seqno from Chris Wilson. Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| | * drm/i915: Include the last semaphore sync point in the error-stateChris Wilson2012-11-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | Should be useful to know what the driver thought the other ring's seqno was when it last used a semaphore. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| | * drm/i915: Rearrange code to only have a single method for waiting upon the ringChris Wilson2012-11-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace the wait for the ring to be clear with the more common wait for the ring to be idle. The principle advantage is one less exported intel_ring_wait function, and the removal of a hardcoded value. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| | * drm/i915: Simplify flushing activity on the ringChris Wilson2012-11-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As we now always preallocate the seqno before writing to the ring, we can trivially test if we have any pending activity on the ring by inspecting the olr. This makes it then possible to flush operations that are not normally associated with a request, like power-management. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| | * drm/i915: Preallocate next seqno before touching the ringChris Wilson2012-11-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on the work by Mika Kuoppala, we realised that we need to handle seqno wraparound prior to committing our changes to the ring. The most obvious point then is to grab the seqno inside intel_ring_begin(), and then to reuse that seqno for all ring operations until the next request. As intel_ring_begin() can fail, the callers must already be prepared to handle such failure and so we can safely add further checks. This patch looks like it should be split up into the interface changes and the tweaks to move seqno wrapping from the execbuffer into the core seqno increment. However, I found no easy way to break it into incremental steps without introducing further broken behaviour. v2: Mika found a silly mistake and a subtle error in the existing code; inside i915_gem_retire_requests() we were resetting the sync_seqno of the target ring based on the seqno from this ring - which are only related by the order of their allocation, not retirement. Hence we were applying the optimisation that the rings were synchronised too early, fortunately the only real casualty there is the handling of seqno wrapping. v3: Do not forget to reset the sync_seqno upon module reinitialisation, ala resume. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@intel.com> Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=863861 Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> [v2] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| | * drm/i915: force restore on lid openDaniel Vetter2012-11-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There seem to be indeed some awkwards machines around, mostly those without OpRegion support, where the firmware changes the display hw state behind our backs when closing the lid. This force-restore logic has been originally introduced in commit c1c7af60892070e4b82ad63bbfb95ae745056de0 Author: Jesse Barnes <jbarnes@virtuousgeek.org> Date: Thu Sep 10 15:28:03 2009 -0700 drm/i915: force mode set at lid open time but after the modeset-rework we've disabled it in the vain hope that it's no longer required: commit 3b7a89fce3e3dc96b549d6d829387b4439044d0d Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Mon Sep 17 22:27:21 2012 +0200 drm/i915: fix OOPS in lid_notify Alas, no. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54677 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=57434 Tested-by: Krzysztof Mazur <krzysiek@podlesie.net> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| | * drm/i915: Wait upon the last request seqno, rather than a future seqnoChris Wilson2012-11-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In commit 69c2fc891343cb5217c866d10709343cff190bdc Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Fri Jul 20 12:41:03 2012 +0100 drm/i915: Remove the per-ring write list the explicit flush was removed from i915_ring_idle(). However, we continued to wait upon the next seqno which now did not correspond to any request (except for the unusual condition of a failure to queue a request after execbuffer) and so would wait indefinitely. This has an important side-effect that i915_gpu_idle() does not cause the seqno to be incremented. This is vital if we are to be able to idle the GPU to handle seqno wraparound, as in subsequent patches. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| | * drm/i915: fix possible NULL dereference of dev_privMika Kuoppala2012-11-29
| | | | | | | | | | | | | | | | | | | | | | | | Dereference dev_priv only after we know it is valid. Found with smatch. Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| | * drm/i915: Increase the response time for slow SDVO devicesChris Wilson2012-11-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some devices may respond very slowly and only flag that the reply is pending within the first 15us response window. Be kind to such devices and wait a further 15ms, before checking for the pending reply. This moves the existing special case delay of 30ms down from the detection routine into the common path and pretends to explain it... v2: Simplify the loop constructs as suggested by Jani Nikula. References: https://bugs.freedesktop.org/show_bug.cgi?id=36997 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| | * drm/i915: set the VIC of the mode on the AVI InfoFramePaulo Zanoni2012-11-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We currently set "0" as the VIC value of the AVI InfoFrames. According to the specs this should be fine and work for every mode, so to my point of view we can't consider the current behavior as a bug. The problem is that we recently received a bug report (Kernel bug #50371) from a user that has an AV receiver that gives a black screen for any mode with VIC set to 0. So in order to make at least some modes work for him, this patch sets the correct VIC number when sending AVI InfoFrames. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=50371 Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| | * drm: add drm_mode_cea_vicPaulo Zanoni2012-11-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function returns the VIC of the mode. This value can be used when creating AVI InfoFrames. Cc: Thierry Reding <thierry.reding@avionic-design.de> Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=50371 Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de> Acked-by: Dave Airlie <airlied@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * | Merge branch 'exynos-drm-next' of ↵Dave Airlie2012-12-16
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next Inki writes: "- add dmabuf attach/detach feature . This patch would resolve performance deterioration issue when v4l2-based driver is using the buffer imported from gem. - drm/exynos: use DMA_ATTR_NO_KERNEL_MAPPING attribute . With gem allocation, kernel space mapping isn't allocated and also physical pages aren't mapped with the kernel space. The physical pages are mapped with kernel space though vmap function only for console framebuffer. - add the below two patches I missed. drm: exynos: moved exynos drm device registration to drm driver drm: exynos: moved exynos drm hdmi device registration to drm driver - add IPP subsystem framework and its-based device drivers. . This patch set includes fimc, rotator and gsc drivers to perform image scaling, rotation and color space conversion. - add runtime pm support to hdmi driver. - And fixups and cleanups." * 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos: (30 commits) drm/exynos: add gsc ipp driver drm/exynos: add rotator ipp driver drm/exynos: add fimc ipp driver drm/exynos: add iommu support for ipp drm/exynos: add ipp subsystem drm/exynos: support device tree for fimd drm/exynos: support extended screen coordinate of fimd drm/exynos: fix x, y coordinates for right bottom pixel drm/exynos: fix fb offset calculation for plane drm/exynos: hdmi: Fix potential NULL pointer dereference error drm/exynos: hdmi: Add CONFIG_OF and use of_match_ptr() macro drm/exynos: add support for hdmiphy power control for exynos5 drm/exynos: add runtime pm support for mixer drm/exynos: added runtime pm support for hdmi drm/exynos: fix allocation and cache mapping type drm/exynos: reorder framebuffer init sequence drm/exynos/iommu: fix return value check in drm_create_iommu_mapping() drm/exynos: remove unused vaddr member drm/exynos: use DMA_ATTR_NO_KERNEL_MAPPING attribute drm/exynos: add exception codes to exynos_drm_fbdev_create() ...
| | * | drm/exynos: add gsc ipp driverEunchul Kim2012-12-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds IPP subsystem-based gsc driver for exynos5 series. GSC is stand for General SCaler and supports the following features: - image scaler/rotator/crop/flip/csc and input/output DMA operations. - image rotation and image effect functions. - writeback and display output operations. - M2M operation to crop, scale, rotation and csc. The below is GSC hardware path: Memory------->GSC------>Memory FIMD--------->GSC------>HDMI FIMD--------->GSC------>Memory Memory------->GSC------>FIMD, Mixer This driver is registered to IPP subsystem framework to be used by user side and user can control the GSC hardware through some interfaces of IPP subsystem framework. Changelog v1 ~ v5: - added comments, code fixups and cleanups. Signed-off-by: Eunchul Kim <chulspro.kim@samsung.com> Signed-off-by: Jinyoung Jeon <jy0.jeon@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Kyungmin.park <kyungmin.park@samsung.com>
| | * | drm/exynos: add rotator ipp driverEunchul Kim2012-12-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds IPP subsystem-based rotator driver. And Rotator supports the following features. - Image crop operation support. - Rotate operation support to 90, 180 or 270 degree. - Flip operation support to vertical, horizontal or both. . as limitaions, the pixel format to source buffer should be same as the one to destination buffer and no scaler. This driver is registered to IPP subsystem framework to be used by user side and user can control the Rotator hardware through some interfaces of IPP subsystem framework. Changelog v6: - fix build warning. Changelog v1 ~ v5: - added comments, code fixups and cleanups. Signed-off-by: Eunchul Kim <chulspro.kim@samsung.com> Signed-off-by: Youngjun Cho <yj44.cho@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>