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authorChris Wilson <chris@chris-wilson.co.uk>2012-12-04 11:33:19 -0500
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-12-04 16:43:39 -0500
commit8c919b28932d2a1fcadd196bbf36d8866afc458a (patch)
tree141704563169397e78e6a04e07eccb827d17beff /drivers/gpu
parentbfd7590d3eed3650e910a22a92dc23ea50e60a41 (diff)
drm/i915: Clear the existing watermarks for g4x when modifying the cursor sr
In a couple of places we attempt to adjust the existing watermark registers to update them for the new cursor watermarks. This goes horribly wrong as instead of clearing the cursor bits prior to or'ing in the new values, we clear the rest of the register with the result that the watermark registers contain bogus values. References: https://bugs.freedesktop.org/show_bug.cgi?id=47034 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index f595b8d56cc3..522ff05e3789 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -1325,10 +1325,11 @@ static void valleyview_update_wm(struct drm_device *dev)
1325 (planeb_wm << DSPFW_PLANEB_SHIFT) | 1325 (planeb_wm << DSPFW_PLANEB_SHIFT) |
1326 planea_wm); 1326 planea_wm);
1327 I915_WRITE(DSPFW2, 1327 I915_WRITE(DSPFW2,
1328 (I915_READ(DSPFW2) & DSPFW_CURSORA_MASK) | 1328 (I915_READ(DSPFW2) & ~DSPFW_CURSORA_MASK) |
1329 (cursora_wm << DSPFW_CURSORA_SHIFT)); 1329 (cursora_wm << DSPFW_CURSORA_SHIFT));
1330 I915_WRITE(DSPFW3, 1330 I915_WRITE(DSPFW3,
1331 (I915_READ(DSPFW3) | (cursor_sr << DSPFW_CURSOR_SR_SHIFT))); 1331 (I915_READ(DSPFW3) & ~DSPFW_CURSOR_SR_MASK) |
1332 (cursor_sr << DSPFW_CURSOR_SR_SHIFT));
1332} 1333}
1333 1334
1334static void g4x_update_wm(struct drm_device *dev) 1335static void g4x_update_wm(struct drm_device *dev)
@@ -1374,11 +1375,11 @@ static void g4x_update_wm(struct drm_device *dev)
1374 (planeb_wm << DSPFW_PLANEB_SHIFT) | 1375 (planeb_wm << DSPFW_PLANEB_SHIFT) |
1375 planea_wm); 1376 planea_wm);
1376 I915_WRITE(DSPFW2, 1377 I915_WRITE(DSPFW2,
1377 (I915_READ(DSPFW2) & DSPFW_CURSORA_MASK) | 1378 (I915_READ(DSPFW2) & ~DSPFW_CURSORA_MASK) |
1378 (cursora_wm << DSPFW_CURSORA_SHIFT)); 1379 (cursora_wm << DSPFW_CURSORA_SHIFT));
1379 /* HPLL off in SR has some issues on G4x... disable it */ 1380 /* HPLL off in SR has some issues on G4x... disable it */
1380 I915_WRITE(DSPFW3, 1381 I915_WRITE(DSPFW3,
1381 (I915_READ(DSPFW3) & ~DSPFW_HPLL_SR_EN) | 1382 (I915_READ(DSPFW3) & ~(DSPFW_HPLL_SR_EN | DSPFW_CURSOR_SR_MASK)) |
1382 (cursor_sr << DSPFW_CURSOR_SR_SHIFT)); 1383 (cursor_sr << DSPFW_CURSOR_SR_SHIFT));
1383} 1384}
1384 1385