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path: root/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
Commit message (Expand)AuthorAge
* sh: rework mode pin codeMagnus Damm2009-06-11
* sh: hook up shared div4 clock code to sh7785Magnus Damm2009-06-01
* sh: hook up shared mstp32 clock code to sh7785Magnus Damm2009-06-01
* sh: sh7785 pll configuration from mode pinMagnus Damm2009-06-01
* sh: use shared frequency tables on sh7785Magnus Damm2009-05-26
* sh: add pll_clk to sh7785Magnus Damm2009-05-26
* sh: clkfwk: Add MSTP bits to SH7785 clock framework.Paul Mundt2009-05-14
* sh: clkfwk: rate table construction and rounding for SH7785.Paul Mundt2009-05-13
* sh: clkfwk: Update SH7785 for refactored clock framework.Paul Mundt2009-05-13
* sh: clkfwk: Rework legacy CPG clock handling.Paul Mundt2009-05-13
* sh: clkfwk: Use arch_clk_init() for on-chip clock registration.Paul Mundt2009-05-12
* sh: clkfwk: Tidy up on-chip clock registration and rate propagation.Paul Mundt2009-05-11
* sh: clkfwk: Consolidate the ALWAYS_ENABLED / NEEDS_INIT mess.Paul Mundt2009-05-11
* sh: clkfwk: Make recalc return an unsigned long.Paul Mundt2009-05-11
* sh: fix sh7785 master clock valueYoshihiro Shimoda2008-05-16
* sh: Add SH7785 Highlander board support (R7785RP).Paul Mundt2007-05-06
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