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* MIPS: ath79: add USB controller registration code for the QCA955X SoCsGabor Juhos2013-02-19
| | | | | | | | | | | | Register platfom devices for the built-in USB controllers of the SoCs. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4952/ Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: ath79: add PCI controller registration code for the QCA955X SoCsGabor Juhos2013-02-19
| | | | | | | | | | | | Add SoC specific PCI IRQ map, and register platform devices for the two built-in PCIe RCs. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4951/ Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: ath79: add WMAC registration code for the QCA955X SoCsGabor Juhos2013-02-19
| | | | | | | | | | | | The SoC has a built-in wireless MAC. Register a platform device for that to make it usable with the ath9k driver. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4956/ Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: ath79: add QCA955X specific glue to ath79_device_reset_{set, clear}Gabor Juhos2013-02-19
| | | | | | | | | | | | | The ath79_device_reset_* are causing BUG when those are used on the QCA955x SoCs. The patch adds the required code to avoid that. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4948/ Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: ath79: add GPIO setup code for the QCA955X SoCsGabor Juhos2013-02-19
| | | | | | | | | | | | | The existing code can handle the GPIO controller of the QCA955x SoCs. Add a minimal glue code to make it working. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4947/ Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: ath79: add IRQ handling code for the QCA955X SoCsGabor Juhos2013-02-19
| | | | | | | | | | | | | The IRQ routing in the QCA955x SoCs is slightly different from the routing implemented in the already supported SoCs. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4955/ Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: ath79: add clock setup code for the QCA955X SoCsGabor Juhos2013-02-19
| | | | | | | | | | | | The patch adds code to get various clock frequencies from the PLLs used in the QCA955x SoCs. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4945/ Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: ath79: add SoC detection code for the QCA955X SoCsGabor Juhos2013-02-19
| | | | | | | | | | | | Also add 'soc_is_qca955[68x]' helper functions and a Kconfig symbol for the SoC family. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4943/ Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: ath79: add early printk support for the QCA955X SoCsGabor Juhos2013-02-19
| | | | | | | | | | | | The patch allows to see kernel messages on the QCA955X SoCs in early boot stage. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4944/ Signed-off-by: John Crispin <blogic@openwrt.org>
* ath79: remove ATH79_MISC_IRQ_* definesGabor Juhos2013-02-16
| | | | | | | | Use the ATH79_MISC_IRQ() macro instead. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4930/ Signed-off-by: John Crispin <blogic@openwrt.org>
* ath79: add ATH79_CPU_IRQ() macroGabor Juhos2013-02-16
| | | | | | | | | Remove the individual ATH79_CPU_IRQ_* constants and use the new macro instead of those. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4929/ Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: pci-ar724x: setup command register of the PCI controllerGabor Juhos2013-02-16
| | | | | | | | | | | | | | The command register of the PCI controller is not initialized correctly by the bootloader on some boards and this leads to non working PCI bus. Add code to initialize the command register from the Linux code to avoid this. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4916/ Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: add dummy pci_load_of_rangesGabor Juhos2013-02-16
| | | | | | | | | | | | The pci_load_of_ranges function is only available if CONFIG_OF is selected. If the function is used without CONFIG_OF being enabled it will cause a build error. Add a dummy inline function to avoid this. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4911/ Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: ath79: remove unused ar7{1x,24}x_pcibios_init functionsGabor Juhos2013-02-16
| | | | | | | | The functions are unused now, so remove them. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4909/ Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: ath79: move global PCI defines into a common headerGabor Juhos2013-02-16
| | | | | | | | The constants will be used by a subsequent patch. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4907/ Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: add irqdomain support for the CPU IRQ controllerGabor Juhos2013-02-16
| | | | | | | | | | Add code to load a irq_domain for the MIPS IRQ controller from a devicetree file. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: David Daney <david.daney@cavium.com> Patchwork: http://patchwork.linux-mips.org/patch/4902/
* MIPS: ralink: adds support for RT305x SoC familyJohn Crispin2013-02-16
| | | | | | | | | | Add support code for rt3050, rt3052, rt3350, rt3352 and rt5350 SOC. The code detects the SoC and registers the clk / pinmux settings. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4896/
* MIPS: ralink: adds include filesJohn Crispin2013-02-16
| | | | | | | | Before we start adding the platform code we add the common include files. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4893/
* MIPS: ath79: simplify MISC IRQ handlingGabor Juhos2013-02-16
| | | | | | | | | | | | | | | The current code uses multiple if statements for demultiplexing the different interrupt sources. Additionally, the MISC interrupt controller has 32 interrupt sources and the current code does not handles all of them. Get rid of the if statements and process all interrupt sources in a loop to fix these issues. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4874/ Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: ath79: fix GPIO function selection for AR934x SoCsGabor Juhos2013-02-16
| | | | | | | | | | | | | | GPIO function selection is not working on the AR934x SoCs because the offset of the function selection register is different on those. Add a helper routine which returns the correct register address based on the SoC type, and use that in the 'ath79_gpio_function_*' routines. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4870/ Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: Add new GIC clocksource.Steven J. Hill2013-02-16
| | | | | | | | | Add new clocksource that uses the counter present on the MIPS Global Interrupt Controller. Signed-off-by: Steven J. Hill <sjhill@mips.com> Patchwork: http://patchwork.linux-mips.org/patch/4681/ Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: dsp: Simplify the DSP macros.Steven J. Hill2013-02-16
| | | | | | | | | Simplify the DSP macros for vanilla (non-microMIPS) kernels and toolchains that do not support the DSP ASEs. Signed-off-by: Steven J. Hill <sjhill@mips.com> Patchwork: http://patchwork.linux-mips.org/patch/4687/ Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: dsp: Support toolchains without DSP ASE and microMIPS.Steven J. Hill2013-02-16
| | | | | | | | | Add macros to support the DSP ASE with microMIPS kernels when the toolchain does not have support. Signed-off-by: Steven J. Hill <sjhill@mips.com> Patchwork: http://patchwork.linux-mips.org/patch/4686/ Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: dsp: Add assembler support for DSP ASEs.Steven J. Hill2013-02-16
| | | | | | | | | | | Newer toolchains support the DSP and DSP Rev2 instructions. This patch performs a check for that support and adds compiler and assembler flags for only the files that need use those instructions. Signed-off-by: Steven J. Hill <sjhill@mips.com> Acked-by: Florian Fainelli <florian@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4752/ Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: Add support for the M14KEc core.Steven J. Hill2013-02-16
| | | | | | Signed-off-by: Steven J. Hill <sjhill@mips.com> Patchwork: http://patchwork.linux-mips.org/patch/4682/ Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: Clean-ups for MIPS Technologies Inc. generic header file.Steven J. Hill2013-02-16
| | | | | | | | Clean up standard header text and remove unused #define. Signed-off-by: Steven J. Hill <sjhill@mips.com> Patchwork: http://patchwork.linux-mips.org/patch/4703/ Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: Netlogic: No hazards needed for XLR/XLSJayachandran C2013-02-16
| | | | | | | | | | TLB and COP0 hazards are handled in hardware for Netlogic XLR/XLS SoCs. Update hazards.h to pick more optimal set of definitions when compiling for XLR/XLS. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4788/ Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: Netlogic: Use PIC timer as a clocksourceJayachandran C2013-02-16
| | | | | | | | | | | | | | | | | The XLR/XLS/XLP PIC has a 8 countdown timers which run at the PIC frequencey. One of these can be used as a clocksource to provide timestamps that is common across cores. This can be used in place of the count/compare clocksource which is per-CPU. On XLR/XLS PIC registers are 32-bit, so we just use the lower 32-bits of the PIC counter. On XLP, the whole 64-bit can be used. Provide common macros and functions for PIC timer registers on XLR/XLS and XLP, and use them to register a PIC clocksource. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4786/ Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: Netlogic: Split XLP L1 i-cache among threadsJayachandran C2013-02-16
| | | | | | | | | | | | Since we now use r4k cache code for Netlogic XLP, it is better to split L1 icache among the active threads, so that threads won't step on each other while flushing icache. The L1 dcache is already split among the threads in the core. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4787/ Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: Netlogic: Optimize EIMR/EIRR accesses in 32-bitJayachandran C2013-02-16
| | | | | | | | | | | | | | | | | | | Provide functions ack_c0_eirr(), set_c0_eimr(), clear_c0_eimr() and read_c0_eirr_and_eimr() that do the EIMR and EIRR operations and update the interrupt handling code to use these functions. Also, use the EIMR register functions to mask interrupts in the irq code. The 64-bit interrupt request and mask registers (EIRR and EIMR) are accessed when the interrupts are off, and the common operations are to set or clear a bit in these registers. Using the 64-bit c0 access functions for these operations is not optimal in 32-bit, because it will disable/restore interrupts and split/join the 64-bit value during each register access. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4790/ Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: lantiq: rework external irq codeJohn Crispin2013-02-16
| | | | | | | | | This code makes the irqs used by the EIU loadable from the DT. Additionally we add a helper that allows the pinctrl layer to map external irqs to real irq numbers. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4818/
* MIPS: lantiq: adds static clock for PP32John Crispin2013-02-16
| | | | | | | | The Lantiq DSL SoCs have an internal networking processor. Add code to read the static clock rate. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4815/
* MIPS: BCM47XX: add bcm47xx prefix in front of nvram function namesHauke Mehrtens2013-02-15
| | | | | | | | | | The nvram functions are exported and used by some normal drivers. To prevent name clashes with ofter parts of the kernel code add a bcm47xx_ prefix in front of the function names and the header file name. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Patchwork: http://patchwork.linux-mips.org/patch/4744/ Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: BCM47XX: use common error codes in nvram readsHauke Mehrtens2013-02-15
| | | | | | | | Instead of using our own error codes use some common codes. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Patchwork: http://patchwork.linux-mips.org/patch/4739/ Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: DSP: Fix DSP mask for registers.Steven J. Hill2013-01-24
| | | | | | | | | | | | | The DSP bit mask for the RDDSP and WRDSP instructions was wrong. [ralf@linux-mips.org: The mask field of the RDDSP and WRDSP instructions is 10 bits long. DSP_MASK had all these fields which according to the architecture specification may result in UNPREDICTABLE operation.] Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/4683/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Fix build failure by adding definition of pfn_pmd().David Daney2013-01-23
| | | | | | | | | | | | | | | | | | With CONFIG_TRANSPARENT_HUGEPAGE=y and CONFIG_HUGETLBFS=y we get the following build failure: CC mm/huge_memory.o mm/huge_memory.c: In function 'set_huge_zero_page': mm/huge_memory.c:780:2: error: implicit declaration of function 'pfn_pmd' [-Werror=implicit-function-declaration] mm/huge_memory.c:780:8: error: incompatible types when assigning to type 'pmd_t' from type 'int' Add a definition of pfn_pmd() for 64-bit kernels (the only place huge pages are currently supported). Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4813/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: PNX833x: Fix comment.Ralf Baechle2013-01-22
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add struct p_format to union mips_instruction.Ralf Baechle2013-01-17
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Export <asm/break.h>.Ralf Baechle2013-01-16
| | | | | | It always should have been ... Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2013-01-07
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MIPS fixes from Ralf Baechle: "Various fixes across the tree. The modpost error due to virt_addr_valid() not being usable from modules required a number of preparatory cleanups so a clean fix was possible." * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: MIPS: 64-bit: Fix build if !CONFIG_MODULES MIPS: Wire up finit_module syscall. MIPS: Fix modpost error in modules attepting to use virt_addr_valid(). MIPS: page.h: Remove now unnecessary #ifndef __ASSEMBLY__ wrapper. MIPS: Switch remaining assembler PAGE_SIZE users to <asm/asm-offsets.h>. MIPS: Include PAGE_S{IZE,HIFT} in <asm/offset.h>. MIPS: Don't include <asm/page.h> unnecessarily. MIPS: Fix comment. Revert "MIPS: Optimise TLB handlers for MIPS32/64 R2 cores." MIPS: perf: Fix build failure in XLP perf support. MIPS: Alchemy: Make 32kHz and r4k timer coexist peacefully
| * MIPS: Wire up finit_module syscall.Ralf Baechle2012-12-28
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Fix modpost error in modules attepting to use virt_addr_valid().Ralf Baechle2012-12-28
| | | | | | | | | | | | | | | | | | | | ERROR: "min_low_pfn" [drivers/block/aoe/aoe.ko] undefined! Fixed by moving the implementation of virt_addr_valid() into the kernel proper and exporting it which removes the pains of an inline or macro implementation. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: page.h: Remove now unnecessary #ifndef __ASSEMBLY__ wrapper.Ralf Baechle2012-12-28
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Fix comment.Ralf Baechle2012-12-27
| | | | | | | | | | | | The value is incorrect and were copied in Linux 2.5.4 from i386. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: drivers: remove __dev* attributes.Greg Kroah-Hartman2013-01-03
|/ | | | | | | | | | | | | | CONFIG_HOTPLUG is going away as an option. As a result, the __dev* markings need to be removed. This change removes the use of __devinit, __devexit_p, __devinitdata, and __devexit from these drivers. Based on patches originally written by Bill Pemberton, but redone by me in order to handle some of the coding style issues better, by hand. Cc: Bill Pemberton <wfp5p@virginia.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* Merge branch 'for-linus' of ↵Linus Torvalds2012-12-20
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/viro/signal Pull signal handling cleanups from Al Viro: "sigaltstack infrastructure + conversion for x86, alpha and um, COMPAT_SYSCALL_DEFINE infrastructure. Note that there are several conflicts between "unify SS_ONSTACK/SS_DISABLE definitions" and UAPI patches in mainline; resolution is trivial - just remove definitions of SS_ONSTACK and SS_DISABLED from arch/*/uapi/asm/signal.h; they are all identical and include/uapi/linux/signal.h contains the unified variant." Fixed up conflicts as per Al. * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/signal: alpha: switch to generic sigaltstack new helpers: __save_altstack/__compat_save_altstack, switch x86 and um to those generic compat_sys_sigaltstack() introduce generic sys_sigaltstack(), switch x86 and um to it new helper: compat_user_stack_pointer() new helper: restore_altstack() unify SS_ONSTACK/SS_DISABLE definitions new helper: current_user_stack_pointer() missing user_stack_pointer() instances Bury the conditionals from kernel_thread/kernel_execve series COMPAT_SYSCALL_DEFINE: infrastructure
| * unify SS_ONSTACK/SS_DISABLE definitionsAl Viro2012-12-19
| | | | | | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
| * missing user_stack_pointer() instancesAl Viro2012-12-19
| | | | | | | | | | | | | | for the architectures that have usp in pt_regs and do not have user_stack_pointer() already defined. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
| * Bury the conditionals from kernel_thread/kernel_execve seriesAl Viro2012-12-19
| | | | | | | | | | | | | | | | | | | | | | | | All architectures have CONFIG_GENERIC_KERNEL_THREAD CONFIG_GENERIC_KERNEL_EXECVE __ARCH_WANT_SYS_EXECVE None of them have __ARCH_WANT_KERNEL_EXECVE and there are only two callers of kernel_execve() (which is a trivial wrapper for do_execve() now) left. Kill the conditionals and make both callers use do_execve(). Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
* | Merge tag 'iommu-updates-v3.8' of ↵Linus Torvalds2012-12-20
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu Pull IOMMU updates from Joerg Roedel: "A few new features this merge-window. The most important one is probably, that dma-debug now warns if a dma-handle is not checked with dma_mapping_error by the device driver. This requires minor changes to some architectures which make use of dma-debug. Most of these changes have the respective Acks by the Arch-Maintainers. Besides that there are updates to the AMD IOMMU driver for refactor the IOMMU-Groups support and to make sure it does not trigger a hardware erratum. The OMAP changes (for which I pulled in a branch from Tony Lindgren's tree) have a conflict in linux-next with the arm-soc tree. The conflict is in the file arch/arm/mach-omap2/clock44xx_data.c which is deleted in the arm-soc tree. It is safe to delete the file too so solve the conflict. Similar changes are done in the arm-soc tree in the common clock framework migration. A missing hunk from the patch in the IOMMU tree will be submitted as a seperate patch when the merge-window is closed." * tag 'iommu-updates-v3.8' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (29 commits) ARM: dma-mapping: support debug_dma_mapping_error ARM: OMAP4: hwmod data: ipu and dsp to use parent clocks instead of leaf clocks iommu/omap: Adapt to runtime pm iommu/omap: Migrate to hwmod framework iommu/omap: Keep mmu enabled when requested iommu/omap: Remove redundant clock handling on ISR iommu/amd: Remove obsolete comment iommu/amd: Don't use 512GB pages iommu/tegra: smmu: Move bus_set_iommu after probe for multi arch iommu/tegra: gart: Move bus_set_iommu after probe for multi arch iommu/tegra: smmu: Remove unnecessary PTC/TLB flush all tile: dma_debug: add debug_dma_mapping_error support sh: dma_debug: add debug_dma_mapping_error support powerpc: dma_debug: add debug_dma_mapping_error support mips: dma_debug: add debug_dma_mapping_error support microblaze: dma-mapping: support debug_dma_mapping_error ia64: dma_debug: add debug_dma_mapping_error support c6x: dma_debug: add debug_dma_mapping_error support ARM64: dma_debug: add debug_dma_mapping_error support intel-iommu: Prevent devices with RMRRs from being placed into SI Domain ...
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